| Document | Document Title |
|---|---|
| US10805503B2 |
Information processing apparatus, method, and computer-readable medium for receiving instruction to transmit error notification and transmitting error notification to external device
An information processing apparatus includes a user interface, a communication interface, and a controller configured to, in response to receiving via the user interface an instruction to transmit an error notification, refer to one or more error records registered in error history data stored in a memory, each error record representing an error caused in the information processing apparatus, determine whether the one or more error records referred to include at least one error record associated with a previously selected error type, and in response to determining that the one or more error records referred to include the at least one error record associated with the previously selected error type, transmit the error notification to an external device via the communication interface. |
| US10805498B2 |
Printing system, and set and computer-readable medium therefor
A printing system includes a printer and an information processing device that includes a processor and a memory storing processor-executable instructions, the instructions being configured to, when executed by the processor, cause the processor to accept a print instruction, in response to accepting the print instruction, determine whether to instruct the printer to start a pre-printing operation based on preparation instruction information, in response to determining to instruct the printer to start the pre-printing operation, transmit the preparation instruction information to the printer, in response to determining to instruct the printer to start the pre-printing operation and transmitting the preparation instruction information to the printer, generate print data based on specified contents data, and transmit print instruction information to the printer. |
| US10805497B2 |
Device settings based on usage history
In one example, a system is disclosed, which may include a recognition unit to obtain a user profile from a mobile device via a short-range wireless communication between the mobile device and the multi-functional device. Further, the system may include a retrieving unit to retrieve usage history associated with the user profile. Furthermore, the system may include a configuration unit to temporarily configure operational settings for the multi-functional device based on the usage history. |
| US10805488B1 |
Apparatus and method for managing the language used for documentation in a multi function device
Systems, methods, and devices are configured to manage the language used for documentation in a multi-function device (MFD). They include providing a message to a user, the message comprising a selection to choose a language as part of the initialization of the MFD. They also include receiving an input including the language chosen by the user. They further include determining if the language chosen by the user matches a default language in the MFD and modifying code associated with settings in electronic documentation to enable use of the language chosen by the user during the initialization in place of the default language in the electronic documentation when it is determined that the language chosen by the user does not match the default language, the electronic documentation providing information to the user for operation of the MFD. |
| US10805486B2 |
Remote management system that displays input screen according to drop in communication speed
A remote management system includes an information processing apparatus and an electronic apparatus. A second controller of the information processing apparatus detects communication speed between the information processing apparatus and the electronic apparatus, and transmits, when the communication speed drops to a predetermined level, a second instruction for reducing a data amount of a first input screen, from a second communication device to the electronic apparatus. A first controller of the electronic apparatus reduces the data amount of the first input screen to a predetermined amount, when a first communication device receives the second instruction, and transmits a second input screen having the reduced data amount, from the first communication device to the information processing apparatus. The second controller causes, when the second communication device receives the second input screen transmitted from the electronic apparatus, a second display device to display the second input screen received. |
| US10805483B2 |
Image processing apparatus which performs an image process based upon acquired image data and method for controlling image processing apparatus
An image processing apparatus includes an acquisition unit, a storage medium, and a controller. The controller determines whether or not acquired image data includes a first type image and a second type image. In a case where the acquired image data includes the first type image and the second type image, the controller performs an image process corresponding to the first type image with respect to the acquired image data and generates job execution image data. Based on the execution image data thus generated, the controller performs a job corresponding to the second type image. |
| US10805481B2 |
Image processing apparatus receiving setting values for scan process and outputting scan data
In an image processing apparatus, in a case where setting values indicate to create scan data by using digital halftoning and requires execution of a prescribed process using a result of character recognition, a controller outputs an instruction to create multiple-value scan data having a pixel value represented by two or more bits. The controller executes the character recognition on the multiple-value scan data. The controller converts the multiple-value scan data into converted scan data by using digital halftoning, and executes the prescribed process on the converted scan data. In a case where the setting values indicate to create scan data by using a method different from the digital halftoning, and requires execution of the prescribed process, the controller outputs an instruction to create setting-based scan data. The controller executes the character recognition on the setting-based scan data. The controller executes the prescribed process on the setting-based scan data. |
| US10805479B2 |
System and method for sending, delivery or receiving of faxes, over a computer based network according to security or other protocols
Embodiments of systems and methods for the sending, delivery and receiving of faxes according to particular protocols are disclosed. Certain embodiments may receive a fax from a sender and determine if the ability exists to send the fax over a computer based network according to a particular protocol. If there is no destination associated with the fax number for the protocol the fax may be sent according to the fax number. If, however, there is a destination for the protocol associated with the fax number an attempt is made to send the fax to the destination according to the protocol. |
| US10805474B1 |
System and method for providing a network service in a distributed fashion to a mobile device
A mobile virtual network operator is provided. The operator includes a server that is communicatively coupled to a mobile device. The mobile device includes application software provided by the virtual network operator for allowing phone call and data connectivity. |
| US10805472B2 |
Terminal apparatus, information processing system, and information transmission method
A terminal apparatus has a first setting and a second setting that includes a receiver receiving first transmission information and second transmission information including a part of the information, a transmission information storage storing transmission information including the first and the second transmission information, a display processor displaying the first transmission information based on information specified by the information processing apparatus in the first setting, and displaying the second transmission information based on an operation performed on the terminal apparatus in the second setting, and a transmission storage controller controlling the transmission information storage to store the first transmission information based on the specified information in a first storage area for a first setting use in the transmission information storage, and to store the second transmission information based on the operation in a second storage area for a second setting use in the transmission information storage. |
| US10805469B1 |
Systems and methods for intelligent routing call center solutions
Intelligent routing systems and methods of use to match a user from a user call with a unique ID associated with the user, generate a plurality of call reason predictions for the user call with an intelligent router module of the intelligent routing system based on the unique ID, generate a confidence level and a likelihood rating with the intelligent router module for each call reason prediction of the plurality of call reason predictions, determine a call reason prediction with a highest likelihood rating and such that the confidence level for the call reason prediction exceeds an associated confidence level threshold that is machine learned and adjustable, determine a call routing service mode from a plurality of service modes based on the call reason prediction, and route the user call to the call routing service mode. |
| US10805464B2 |
System and method for monitoring and visualizing emotions in call center dialogs at call centers
A method, system, and a computer program product are provided for monitoring an emotional state of a conversation by monitoring a communication between first and second persons to determine an emotional state of the communication, providing a visual representation of the emotional state of the communication for display to a person having access to the communication, and performing an intervention action to improve the emotional state of the communication in response to detecting the emotional state of the communication meets one or more specified intervention criteria. |
| US10805458B1 |
Method and system for automatically blocking recorded robocalls
A method and system for automatically blocking recorded robocalls. Caller identification information from an incoming is checked with plural different tests and with one test that requires a caller input a selection input. Requiring a response from such a selection input provides an additional level of detection for recorded robocalls. In addition, plural different cloud based databases of known robocall numbers are checked with plural different tests with cloud based Software as a Service (SaaS) applications to provide other levels of detection for recorded robocalls. The method and system automatically identify and process recorded robocalls and help prevent call spoofing and neighbor spoofing by recorded robocalls. |
| US10805456B2 |
System and method for dynamic redundant call recording
A system or method for dynamic redundant call recording may include a plurality of recording devices, each recording device having a plurality of recording resources, and a resource allocator. The resource allocator may receive a request from a call receiving node for commencement of a recording session. It may then attempt to connect to a first one of the plurality of recording devices and if successful, establish a recording session between the call receiving node and the recording device, or if not successful, attempting to connect the recording session controller to a second one of the multiple recording devices. Two resource allocators may operate in parallel to establish dual recording using resources at two different recording devices. Call content may be recorded separately from call metadata and may be integrated with the metadata using a unique call ID. |
| US10805455B2 |
Call management between multiple user devices
A connection manager manages connections for associated user devices by determining whether an incoming connection has been answered at a user device, and if so then generating and transmitting silencing commands to associated user devices using first and second wireless communication modes, with one mode being faster. Connections can comprise phone calls, and modes can comprise push and Bluetooth® messaging. The connection manager can instruct device outputs to provide connection alerts, limited to visual alerts when an associated user device is active, listen for associated user device communications, and instruct device outputs to stop providing alerts when a silencing command is received. Further, a connection manager can receive a signal regarding a headset status, route an outside connection from a phone to the headset when the headset is active or to another device when the headset is not active, detect a change in headset status, and reroute the connection accordingly. |
| US10805450B2 |
Device capable of notifying operation state change thereof through network and communication method of the device
An example method of notifying a user of a message received by a first device of the user includes connecting, by the first device, to a second device of the user through a local communication network, wherein the second device is currently registered by the first device; receiving, by the first device, a message, from an external device of another user; in response to determining the first device is not currently being used when the message is received, determining whether the registered second device is currently being used; and transmitting notification information of the received message to the second device currently being used by the user, wherein a notification regarding the received message is displayed on a display of the second device currently being used by the user. |
| US10805447B2 |
Apparatus, system, and method for securing and using a mobile device in a vehicle
Disclosed is a mobile device vehicle apparatus comprising a housing portion having a wiring harness and a shelf portion having an inclined surface and lip, the lip extending away from the inclined surface, wherein the housing portion or the shelf portion further comprising a wireless data transmission module, a wiring harness, and a wireless charger; and wherein the wireless charger is provided behind the inclined surface of the shelf portion. |
| US10805440B1 |
Light-emitting-diode (#LED#) system and method for illuminating a cover for a portable electronic device commensurate with sound or vibration emitted therefrom
A cover system for covering a portable electronic device may include: a protective cover that covers the portable electronic device, the protective cover having: an assembly energized by an electrical signal, the assembly being removably coupled with the protective cover; and an electronic panel fixedly coupled with the assembly and the protective cover, the electronic panel having: a microphone that detects a sound and/or a vibration emitted by the portable electronic device to generate a communication signal indicative thereof; a plurality of light-emitting-diodes (LEDs) embedded in the electronic panel; a plug powering the plurality of LEDs; and an integrated circuit that generates the electrical signal to activate the plurality of LEDs in response to receipt of the communication signal from the microphone to cause the LEDs to produce a luminescence proportionate to and commensurate with an intensity and/or a rhythm of the sound and/or the vibration. |
| US10805438B2 |
Configuring the protocol-based generation of event streams by remote capture agents
The disclosed embodiments provide a system that processes network data. During operation, the system obtains, at a remote capture agent, a first protocol classification for a first packet flow captured by the remote capture agent. Next, the system uses configuration information associated with the first protocol classification to build a first event stream from the first packet flow at the remote capture agent, wherein the first event stream comprises time-series event data generated from network packets in the first packet flow based on the first protocol classification. The system then transmits the first event stream over a network for subsequent storage and processing of the first event stream by one or more components on the network. |
| US10805437B2 |
Compiler and hardware interactions to remove action dependencies in the data plane of a network forwarding element
A method of configuring a forwarding element that includes several data plane message processing stages. The method stores a set of action codes in an instruction memory in the data plane of the forwarding element. Each action code identifies an operation to perform on a field of a message received at the data plane. The method determines action codes required to process each field of the message in each message processing stage. The method configures a data-plane processing unit of the forwarding element to concurrently perform a group of the action codes in the same data plane processing stage when (i) the action codes are the same and (ii) operate on the same field of the message. |
| US10805435B2 |
Method of processing data stream, computer program product and classifier for processing data stream
The invention relates to a method of processing in real-time a data stream exchanged between a source and a server over a telecommunications network, the method being carried out by a classifier, said classifier storing a first set of a least one test, and a list of existing TCP connections, the method comprising: receiving a TCP segment of the data stream, the TCP segment including data payload, said payload comprising at least a portion of a HTTP message; identifying a first TCP connection to which the TCP segment belongs or creating a new first TCP connection for the received TCP segment; detecting, in the portion of the HTTP message, presence of JavaScript Object Notation, JSON, data; in the case where JSON data is detected, building a tree graph based on the JSON data; performing at least one test of the first set on properties of the built tree graph to determine whether the JSON data is invalid; if the JSON data is invalid, interrupting the first TCP connection. |
| US10805434B2 |
Dynamic TCP stream processing with modification notification
Techniques for content inspection in a communication network, including detecting a packet in transit between a first and second endpoint, determining that content of the packet fails a content check, modifying a payload containing the content, adjusting a sequence number to account for the modification, and injecting a response message into a corresponding stream in an opposite direction. The response message may contain information relating to a reason for the rejection. |
| US10805428B2 |
Remote power management
Embodiments of the present disclosure provide a remote power management apparatus and management method, wherein the apparatus for managing a power supply by a remote server comprises a managing unit configured to manage the power supply and an interface provided between the remote server and the managing unit, wherein the remote server controls the managing unit via the interface to manage the power supply. |
| US10805427B1 |
Backup and restore of customer devices
A method of consolidating user actions across a plurality of electronic devices. The method comprises receiving information from each of a plurality of electronic devices associated with a common user, where the receiving is performed by a consolidation application executing on a server computer, and analyzing the information by the consolidation application. The method further comprises identifying by the consolidation application a first application installed on a first one of the electronic devices, based on a plurality of mappings of related applications to different compatible electronic devices, determining that a second application related to the first application is compatible with a second one of the electronic devices, and sending a message to the second one of the electronic devices that suggests that the second application be installed on the second one of the electronic devices, whereby a user installs the second application on the second one of the electronic devices. |
| US10805423B2 |
Device profile data usage for state management in mobile device authentication
Described herein are systems and methods for creating and managing a device profile on a mobile device for continued authentication of the mobile device. The device profile includes a state assigned to a mobile device. The state of the device can be managed through the device profile. The mobile device is allowed to conduct payments based on the current state assigned to the mobile device. In response to a request to conduct a payment transaction using the mobile device, the state information in the mobile device profile is checked. The payment transaction using the mobile device is allowed when the state information indicates a trusted state. The payment transaction using the mobile device is limited when the state information indicates a suspended state. The payment transaction using the mobile device is prevented when the state information indicates an untrusted state. |
| US10805422B2 |
Memory device with a multi-mode communication mechanism
A memory device includes a memory array including a first communication circuit element configured to communicate a first signal between components in the memory device; a second communication circuit element configured to communicate a second signal between the components in the memory device; and a configurable grouping mechanism coupled to the first communication circuit element and the second communication circuit element, the configurable grouping mechanism configured to select between: operating the first communication circuit element and the second communication circuit element independent of each other, where in the first signal and the second signal are independent signals, and operating the first communication circuit element and the second communication circuit element as a group, wherein the first signal corresponds to the second signal. |
| US10805419B2 |
Web application configuration management
A method performed by a computing system includes executing a web application container and in response to determining that a runtime web application for the web application container is not locally accessible, prompting a user for credentials. The method further includes sending the credentials to a configuration server and after sending the credentials to the configuration server, receiving a target uniform resource locator (URL). The target URL may point to a runtime web application on a first runtime web application server. The method further includes downloading the runtime web application to the computing system and executing the runtime web application. |
| US10805416B2 |
Smart factory application integration
Systems and methods for selectively enforcing business logic on a plurality of applications have been provided. The system architecture may include one or more systems of record and a plurality of applications running on a plurality of client machines. A smart factory may store customer data and associated logic obtained from a system of record. The logic may include rules governing use of the customer data in an application user interface. The smart factory may transmit the rules to the plurality of applications. Each application may include an application integrator configured to receive the rules and execute an update to enforce the rules on an application user interface. In addition, the smart factory customer data may be accessed by the applications to prevent repeated calls to the systems of record for commonly used information. |
| US10805415B2 |
Communicating data between computers by harmonizing data types
A computer-implemented method is used to transmit data from a first computer to a second computer using a first protocol. The computers belong to first and second computer groups. Inter-group communication is restricted to data packets with first type data. A client module of the first computer provides data packets with first and second type data. An intermediate module receives data packets from the client module and forwards data packets to a modifier module of an auxiliary computer, using a second protocol. The auxiliary computer belongs to the first computer group. The intermediate module receives modified data packets from the modifier module using the second protocol. The packets contain first type data. The intermediate module forwards the modified data packets to a protocol module on the first computer that encodes the modified data packets. The protocol module transmits encoded modified data packets to the second computer, using the first protocol. |
| US10805414B2 |
Dynamic resource broker services
One or more programs in a computing environment of a first service provider obtain an indication from a portion of an infrastructure of a second service provider, where the portion of the infrastructure has available computing capacity, and where the portion of an infrastructure includes at least one component. The one or more programs determine if the first service provider can deploy the portion as a portion of services deployed from the first service provider and based on making the determination that the first service provider can deploy the portion of the infrastructure, the one or more programs register the portion of the infrastructure to make it available for deployment by the first service provider. The one or more programs provision the at least one component for deployment by the first service provider in a service that includes the at least one component. |
| US10805410B2 |
Resource processing method and apparatus
One example method includes receiving, by the one or more processors and from a user device, a request for a service, the request including a user identification of a user of the user device; determining, by the one or more processors, a consumption quantity of the service, the consumption quantity indicating a value associated with providing the service; determining, by the one or more processors, a pre-created general resource account associated with the user identification and including a total value that indicates an aggregated value of one or more sets of prepaid resources that belong to the user; and deducting, by the one or more processors, one or more prepaid resources from the total value of the general resource account, the one or more prepaid resources adding up to the value of the consumption quantity of the service, and in response, providing the service to the user device. |
| US10805402B1 |
Automated location verification
A method and system for verifying a location of an entity is provided. The method includes monitoring a request broadcast by an entity for verifying a first location of the entity. The request is detected as being received and verification data indicating that the entity has been located at the first location during a specified timeframe is received. A resulting acknowledgement is transmitted, and the verification data is stored in a database. A compensation indication associated with providing the verification data is transmitted to a device. |
| US10805400B2 |
Monitoring and controlling of distributed machines
Exemplary embodiments are disclosed of apparatus and methods for monitoring and controlling distributed machines. In an exemplary embodiment, a network includes machines each having sensor(s) and/or actuator(s). Each machine has a node resident on the machine and/or in communication with the machine and that provides raw data from the sensor(s) and/or actuator(s). Each node has a network interface, and a processor and memory configured as a node agent to embed the raw data in message(s) without reformatting the raw data. An engine receives and reformats messages from the node agents without reformatting raw data embedded in the messages. The engine directs the reformatted messages including the raw data to user device(s) for use in managing machine activity and/or status. The engine also sends a message from a user device to a node of a given machine, for use in controlling activity and/or status of the given machine. |
| US10805399B2 |
Data server unit and communication system including master-slave management circuitry
A data server includes a controller, a memory that stores first information collected from devices, and master-slave management circuitry that sets whether the data server operates according to one of a master function for managing a data server and a slave function for being managed by the data server. In a case where the master function is set by the master-slave management circuitry, the controller sends to an external client, in response to receiving a data collection request from the external client, information corresponding to the data collection request that is one of data stored in the memory and data received from the other data server. In a case where the slave function is set by the master-slave management circuitry, the controller sends the first information to the other data server in which the master function is set. |
| US10805395B2 |
Enhanced proximity services (ProSe) protocols for vehicle-to-anything (V2X) communication
Technology for a vehicle-to-anything (V2X) a user equipment (UE) to perform V2X communication within a wireless communication network is disclosed. The V2X UE can process, by the V2X UE, for transmission to a V2X function a V2X service registration request having one or more parameters to confirm and authorize the V2X service registration request. The V2X UE can process a V2X service registration authorization response and V2X operation parameters, received by from the V2X function, for permitting the V2X UE to operate in one of a plurality of V2X operation modes. The V2X UE can operate in the one of the plurality of V2X operation modes using the V2X operation parameters. |
| US10805392B2 |
Distributed gather/scatter operations across a network of memory nodes
Devices, methods, and systems for distributed gather and scatter operations in a network of memory nodes. A responding memory node includes a memory; a communications interface having circuitry configured to communicate with at least one other memory node; and a controller. The controller includes circuitry configured to receive a request message from a requesting node via the communications interface. The request message indicates a gather or scatter operation, and instructs the responding node to retrieve data elements from a source memory data structure and store the data elements to a destination memory data structure. The controller further includes circuitry configured to transmit a response message to the requesting node via the communications interface. The response message indicates that the data elements have been stored into the destination memory data structure. |
| US10805386B2 |
Reducing transmissions by suggesting digital content for display in a group-based communication interface
Provided is a group-based communication interface and an apparatus configured to programmatically generate and provide digests of relevant group-based communications transmitted between a plurality of client devices and a group-based communication system. |
| US10805385B2 |
Method and apparatus for managing resource on cloud platform
A method and an apparatus for managing a resource on a cloud platform is disclosed. The method includes: determining a resource adjustment policy according to first status information of the cloud platform, determining a size of an intelligent sliding window (ISW) according to second status information of the cloud platform, where the ISW is used to indicate an allowed maximum page view PV of the application in a unit time; and adjusting, according to the resource adjustment policy, the quantity of resources allocated to the application, and adjusting the ISW according to the determined size of the ISW. |
| US10805382B2 |
Resource position planning for distributed demand satisfaction
Methods, systems and computer program products for resource position planning are provided herein. A computer-implemented method includes generating a multi-commodity flow network for locations of a distributed service network over a planning horizon. The method also includes obtaining a set of candidate outage scenarios for the distributed service network, each of the set of candidate outage scenarios being associated with a corresponding probability of occurrence. The method also includes generating a resource positioning configuration for resources in the multi-commodity flow network utilizing an optimization model that reduces unmet demand for each of the set of candidate outage scenarios based at least in part on the probability of occurrence of each of the set of candidate outage scenarios. The method also includes providing the resource positioning configuration to the distributed service network to modify positioning of one or more resources in the distributed service network based on the generated resource positioning configuration. |
| US10805380B2 |
Data transmission method and device
Embodiments of the present disclosure provide a data transmission method performed at a server. The server presets logic response files corresponding to identity types. A target terminal may obtain a target logic response file corresponding to an identity type of the target terminal from the server. The target logic response file includes response information to control instructions sent by a peer device and a correspondence between input information and a control instruction to send to the peer device. Because the response information is used for indicating an operation performed in response to the corresponding control instruction, and the input information is used for controlling the peer device, the target terminal can respond to the control instructions of the peer device through the target logic response file and generate a control instruction for controlling the peer device through the target logic response file, to achieve bidirectional communication between devices. |
| US10805379B2 |
Techniques of video update on a client based on browser status
In an aspect of the disclosure, a method, a computer-readable medium, and a computer system are provided. The computer system includes a BMC of a host. The BMC redirects images from the host to a device for displaying at a redirection display. The BMC further receives an indication that the redirection display is no longer in an active mode. The BMC then stops redirecting the images from the BMC to the device in response to the indication. |
| US10805378B2 |
Mechanism for sharing of information associated with events
Techniques are provided that allow users to collaborate in relationship to data views, application displays, applications or events. A user can type in a text view related to a specific view in an application display, and the information is shared with other users that take part in sharing that view. A user that expresses an interest in an event is notified about the event and has the capability to interact, in relation to the event, with other users (e.g. by text). The particular form of interaction (and sharing) can be selectively specified. This interaction is comparable to a dynamic bulletin board where the subject is event driven. In the case of an event interest(s), users specify their interest (e.g. in other user application events or system events) and the system automatically alerts them to the occurrence of the event. |
| US10805376B2 |
Communication server and method for selective use of real-time communication features
An apparatus and method for receiving, at a communication server, a web-based request for a real-time communication session, selecting, at the communication server, a number of applications based on information included in the web-based request to support the real-time communication session, the number of applications being from among the plurality of applications running on the one or more application servers, communicating with the one or more application servers to enable provision of the number of applications for the real-time communication session, and enabling the real-time communication session between a first device and a second device. |
| US10805374B1 |
Systems and methods for providing real-time streaming data processing at edge servers
Systems and methods provide real-time processing in edge servers of a network. In one example, an edge server receives real-time streaming data from at least a first client device and processes, in real-time, the received real-time streaming data to produce real-time edge processed data. The edge server receives a request for real-time streaming data from at least a second client device and provides in real-time, the real-time edge processed data to the requesting second client device. In some embodiments the edge server forwards the received real-time streaming data, and if desired, the edge processed data to a central server or other server, for processing. |
| US10805372B2 |
Communication event
In a communication event via a network between a requesting user, operating a first user device, and a responding user, operating a second user device, each of the user devices captures a stream of audio data, transmits the captured stream of audio data to the other user device via the network for receiving thereat, and outputs, to its user, the audio stream received from the other user device. A video exchange function is initially suppressed for the communication event for both of the user devices. The first user device transmits to the second user device a request to stop suppressing video. If the responding user does not accept the request, the video exchange function continues to be suppressed for both of the user devices. If the responding user accepts the request, the video exchange function stops being suppressed for both of the user devices. |
| US10805370B2 |
Alarms for a system of smart media playback devices
One embodiment provides for a media playback device comprising a memory device to store instructions; one or more processors to execute the instructions stored on the memory device, the instructions to cause the one or more processors to provide a playback queue manager to manage one or more media playback queues including a set of media items associated with a scheduled event and a playback routing manager to determine an output destination for the set of media items based on context associated with the scheduled event, the playback routing manager to route output of playback of the set of media items to one or more of multiple different connected media playback devices based on the context associated with the scheduled event. |
| US10805368B2 |
Systems, methods, and media for controlling delivery of content
Methods, systems, and computer readable media for controlling delivery of content are provided. In some embodiments, a system for controlling delivery of content is provided. The system includes processing circuitry configured to: transmit, to a server, a plurality of requests for blocks of the content; while at least some of the plurality of requests are still outstanding: detect a change of a service characteristic of a connection between the system and the server; determine a preferred number of outstanding requests; and cancel at least some of the requests from the plurality that are still outstanding based on the preferred number and a count of the requests from the plurality that are still outstanding. |
| US10805365B2 |
System and method for tracking events and providing feedback in a virtual conference
A virtual conferencing system is described which tracks events during a virtual conference, provides a user interface for reviewing the events, and allows a moderator and/or other participant to provide feedback related to the events. For example, one embodiment of a virtual conferencing system comprises: a plurality of clients operated by participants and at least one moderator of a virtual conference, each of the clients comprising state management logic to maintain a current state of the virtual conference; a virtual conferencing service to establish audio and/or video connections between the plurality of clients during the virtual conference, the virtual conferencing service further including a state synchronization service communicatively coupled to the state management logic on each client to ensure that the current state of the virtual conference is consistent on each client; a virtual conferencing graphical user interface (GUI) to be rendered on the plurality of clients, the virtual conferencing GUI configured, via signals sent from the state synchronization service, to display a video stream of one or more current speakers during the virtual conference utilizing the established video connections; and a contribution identification module to identify events related to actions of participants during the virtual conference; an event log to store the events identified by the contribution identification module; and an event filter to provide options for searching for specific types of events within the event log based on input from the moderator and/or participants when reviewing a recording of the virtual conference, the event filter to generate a filtered set of events based on the input from the moderator and/or participants. |
| US10805364B2 |
Routing of conference participant based on caller recognition
Aspects of the present disclosure involve systems, methods, computer program products, and the like, for routing one or more requests to join or initiate a collaboration conference based on at least an identifier of a requesting device. In one embodiment, a telecommunications network obtains an identifier, such as the telephone number, of a device requesting to join or initiate a collaboration conference. The identifying information is then compared to a database of user accounts maintained by the network. The network may then prompt the user of the requesting device to join a particular conferencing bridge or provide particular conferencing features based on the one or more preferences associated with the user's account. A response to the prompt may be received and then acted upon by the network to connect the requesting device to a collaboration conference and/or provide the one or more conferencing features to the requesting device. |
| US10805359B2 |
Systems and methods for conferencing
Systems and methods are provided for establishing a video conference session. The systems and methods may include receiving, from a first conference client device, a request to establish a conference session with a second conference client device; determining a first media router for forwarding, to the second conference client device, a media data stream with predetermined attributes of a plurality of first media data streams generated by the first conference client device; determining a second media router for forwarding, to the first conference client, a media data stream with predetermined media attributes of a plurality of second media data streams generated by the second conference client device; and transmitting, to the first conference client device, a first address associated with the first media router and a second address associated with the second media router. |
| US10805356B1 |
Client-specific control of shared telecommunications services
Aspects of the present disclosure are directed to providing remote services for endpoint devices of a plurality disparate client entities. In an example embodiment, an apparatus includes a computing server configured to provide communications for a plurality of endpoint devices respectively associated with a plurality of disparate client entities according to and responsive to client-specific sets of control data. The apparatus also includes a processing circuit configured to adjust routing of the communications by the computing server, in response to call event data generated by the computing server, by generating the client-specific sets of control data for each client entity according to a respective set of directives. |
| US10805354B2 |
Data processing systems and methods for performing privacy assessments and monitoring of new versions of computer code for privacy compliance
Data processing systems and methods, according to various embodiments, perform privacy assessments and monitor new versions of computer code for updated features and conditions that relate to compliance with privacy standards. The systems and methods may obtain a copy of computer code (e.g., a software application or code associated with a website) that collects and/or uses personal data, and then automatically analyze the computer code to identify one or more privacy-related attributes that may impact compliance with applicable privacy standards. The system may be adapted to monitor one or more locations (e.g., an online software application marketplace, and/or a specified website) to determine whether the application or website has changed. The system may, after analyzing the computer code, display the privacy-related attributes, collect information regarding the attributes, and automatically notify one or more designated individuals (e.g., privacy office representatives) regarding the attributes and information collected. |
| US10805349B2 |
Method and system to secure and dynamically share IOT information cross multiple platforms in 5G network
A device includes a processor having a trusted security zone and trusted memory communicatively coupled to the trusted security zone to form a trusted execution environment (TEE) in which trusted applications operate. The trusted memory has a common repository. The device includes memory storing instructions that cause the processor to effectuate operations. The operations include receiving, from a first trusted application of the trusted applications, a first application data and storing the first application data in the common repository. The operations include determining that a second trusted application of the trusted applications has permission to access the first application data based on a policy module of the TEE and allowing the second trusted application to access the first application data. |
| US10805346B2 |
Phishing attack detection
A computerized method for analyzing a subject URL to determine whether the subject URL is associated with a phishing attack is disclosed. The method includes steps of detecting keypoints within a screenshot of a webpage corresponding to the subject URL and determining a set of confidences based on an analysis of the detected keypoints with a model. Each confidence within the set of confidences is assigned to feature vector within a set of training feature vectors representing a training set of URLs used in generating the model. The method comprises performing an image comparison between the screenshot and a screenshot corresponding to a feature vector within the set of training feature vectors, the feature vector being assigned a highest confidence. Responsive to determining the image comparison result exceeds a predefined threshold, transmitting an alert indicating that the subject URL is associated with the phishing attack. |
| US10805344B2 |
Apparatus and method for obscuring wireless communication patterns
An apparatus and method are described for obscuring wireless communication patterns. For example, one embodiment of a system comprises: an Internet of Things (IoT) device comprising a wireless communication interface to establish communication with an IoT service; the IoT device including an application to execute commands received from the IoT service and to responsively generate a response; and messaging obfuscation logic to modify timing for transmitting the response to the IoT service. |
| US10805339B2 |
Method to mitigate timing based attacks on key agreement schemes over controller area network
A method of operating at least one node in a communication network that uses a shared communication medium has been developed to reduce or eliminate timing side-channel attacks performed by an adversary that is connected to the shared communication medium. The method includes generating, with a controller in a first node, a first jitter time offset randomly generated from within a predetermined time range, and transmitting, with a transceiver in the first node, a first data bit through an output of the transceiver that is connected to a shared communication medium, the first data bit being transmitted at a first time corresponding to the first jitter time offset added to a first predetermined transmission time. |
| US10805338B2 |
Analyzing encrypted traffic behavior using contextual traffic data
In one embodiment, a device in a network detects an encrypted traffic flow associated with a client in the network. The device captures contextual traffic data regarding the encrypted traffic flow from one or more unencrypted packets associated with the client. The device performs a classification of the encrypted traffic flow by using the contextual traffic data as input to a machine learning-based classifier. The device generates an alert based on the classification of the encrypted traffic flow. |
| US10805331B2 |
Information technology security assessment system
A method and system for creating a composite security rating from security characterization data of a third party computer system. The security characterization data is derived from externally observable characteristics of the third party computer system. Advantageously, the composite security score has a relatively high likelihood of corresponding to an internal audit score despite use of externally observable security characteristics. Also, the method and system may include use of multiple security characterizations all solely derived from externally observable characteristics of the third party computer system. |
| US10805330B2 |
Identifying and handling threats to data compute nodes in public cloud
Some embodiments provide a method for a public cloud manager that interacts with a management system of a public datacenter. The method receives a notification from a network controller that a second data compute node is compromised. The second data compute node operates on a host machine in the public datacenter and executes a forwarding element managed by network controller. The method interacts with application programming interfaces (APIs) of the public datacenter to quarantine the data compute node. |
| US10805325B2 |
Techniques for detecting enterprise intrusions utilizing active tokens
A Token Transmission Server transmits active tokens within an enterprise network. The active tokens include either active data tokens or active request tokens, and are fraudulent from the perspective of the enterprise. A Token Monitoring Server monitors network traffic within the enterprise network to detect the presence of network traffic being originated by an enterprise device based upon the active tokens, and generates an alert indicating that the enterprise device is likely compromised. |
| US10805321B2 |
System and method for evaluating network threats and usage
Systems and methods are presented for generating a threat score and a usage score of each of a plurality of IP addresses. The threat score may be determined based on quantity of occurrences and recency of each occurrence of an IP address in network alert datasets, in addition to a weighting factor for each data source indicating the accuracy of the data source. |
| US10805314B2 |
Using message context to evaluate security of requested data
Information of an electronic message to be delivered to an intended recipient is received. For an original resource identifier included in the electronic message, a corresponding alternative resource identifier that can be at least in part used to obtain the original resource identifier and obtain context information associated with the electronic message is determined. The original resource identifier included in the electronic message is replaced with the alternative resource identifier to generate a modified electronic message. The modified electronic message with the alternative resource identifier is allowed to be delivered to the intended recipient instead of the electronic message with the original resource identifier. A request made using the alternative resource identifier in the modified message triggers a security action based at least in part on the context information associated with the electronic message. |
| US10805313B2 |
Systems, methods, and devices for provisioning and processing geolocation information for V2X devices
Systems, methods, and devices for securely provisioning a roadside unit (RSU) that includes an application certificate, wherein the RSU is geographically restricted according to the application certificate. An enhanced SCMS system may receive a request for an application certificate for the RSU; determine, in response to the request, an operating geolocation for the RSU; verify that the operating geolocation is within the allowed geo-region for the RSU; generate an application certificate that includes the operating geolocation; and provide the application certificate to the RSU device. Also provided is an application certificate that includes precise operating geolocation information, an improved application certificate provisioning request that allows the requestor to specify a precise operating geolocation, new processes for generating and providing improved application certificates having geographic-restriction information, an enhanced SCMS that performs the processes, and improved computerized devices, such as RSUs, that employ the precise, operating geolocation information from the application certificates. |
| US10805309B2 |
System, method and computer program product for managing access to systems, products, and data based on information associated with a physical location of a user
In accordance with embodiments, there are provided mechanisms and methods for managing access to data based on information associated with a physical location of a user. These mechanisms and methods for managing access to systems, products, or data based on information associated with a physical location of a user can enable improved data management efficiency, enhanced data management accuracy, decreased data management costs, decreased licensing costs, increased security, additional marketing opportunities, etc. |
| US10805306B1 |
Multiple data store authentication
Systems and methods for authenticating access to multiple data stores substantially in real-time are disclosed. The system may include a server coupled to a network, a client device in communication with the server via the network and a plurality of data stores. The server may authenticate access to the data stores and forward information from those stores to the client device. An exemplary authentication method may include receipt of a request for access to data. Information concerning access to that data is stored and associated with an identifier assigned to a client device. If the identifier is found to correspond to the stored information during a future request for access to the store, access to that store is granted. |
| US10805304B2 |
Edge server and management server
An edge server includes: an application execution management unit that manages execution of an application that uses a function of an edge device and/or access processing data of the edge device; a skill information acquisition unit that acquires skill information of a user who is authorized to log into a system including the edge server; and an access control unit determines whether the user has an access right to use the function of the edge device and/or access the processing data of the edge device on the basis of the skill information of the user and a skill-based access list for the use of the function of the edge device and the access to the processing data of the edge device and allows the access when it is determined that the user has the access right. |
| US10805299B2 |
Interface manager device in an aircraft
An interface manager device interconnects peripheral devices to a network of ACD type or of AISD type of an aircraft, and includes: a first data interface for connecting it to the network; a first electrical power supply interface for connecting it to a general electrical power source; second data interfaces and second electrical power supply interfaces, for connecting it to the peripheral devices, which are deactivated by default. The interface manager device is configurable via a configuration interface so as to selectively authorize connections between the second data interfaces and the first data interface, and to selectively authorize connections between the second electrical power supply interfaces which are associated with them and the first electrical power supply interface, and to activate the second interfaces concerned. The interface manager device propagates a received data packet when said data packet relate to an authorized connection and deletes said data packet otherwise. |
| US10805291B2 |
Embedded authentication in a service provider network
Systems and methods are described for extending the trust relationship established with a network interface device that provides access to a service provider network that includes an IP-based overlay network. The trust relationship is extended to a consumer premises equipment (CPE) device operating on the overlay network. A network element of the service provider network may authenticate the CPE device when communicating via the overlay network. The service provider network may store an association between network configuration data of the network interface device and the CPE device provisioned via the network interface device and may provide the CPE device with an identity token that encodes this network configuration data. The CPE device may provide the identity token to a network element of the service provider network, and the service provider network may authenticate the identity of the CPE device using the identity token provided. |
| US10805282B2 |
Role-based notification service
A notification system automatically sends notifications to users based on the defined roles of the notifications. The notification system allows an application to define in a secure manner users to roles. The notification system also allows the users to register in a secure manner their devices with the notification system. The notification system allows the application to then send a notification to users with a target role. Upon receiving the notification, the notification system identifies the devices of the users with the target role and sends the notification to those devices. |
| US10805281B2 |
System and method for secure two-party evaluation of utility of sharing data
Embodiments described herein provide a system for improving a classifier by computing a statistic for the utility of sharing data with a second party. The system may encrypt a set of class labels based on a public key/private key pair to obtain a set of encrypted class labels. The system may send a public key and the set of encrypted class labels to a second computing device. The system may receive an encrypted value computed by the second computing device based on the public key. The system may decrypt the encrypted value based on a private key to obtain a decrypted value. The system may then send a pair of encrypted values computed based on the decrypted value to the second computing device. The system may subsequently receive an encrypted utility statistic from the second computing device, and decrypt the encrypted utility statistic to obtain a decrypted utility statistic. |
| US10805278B2 |
Network device proximity-based authentication
A wireless system can be used to authenticate a user device via proximity information of wireless network devices. The system can include the user device, the wireless network devices, and a server. At least some of the wireless network devices can be wirelessly connected to the user device and at least some other wireless network devices can be wirelessly unconnected to the user device. The server can use proximity information about the user device with respect to the wireless network devices to authenticate a user. |
| US10805274B2 |
Central management platform without user management
Methods, systems, and computer-readable storage media for central management of multiple landscapes using a central management platform that is absent user management functionality. |
| US10805273B2 |
Systems for improving performance and security in a cloud computing system
Methods in a cloud object store facilitate strong data encryption, customer-management of object (encryption) keys, reductions in latency, globally-distributed object storage, and handling of streamed uploads. A method for encrypting objects stored in a cloud includes encrypting each object with a unique encryption (object) key. The plaintext object keys are generated in advance of uploads. The plaintext object keys can be stored in an object database in the cloud. Alternatively, the plaintext object keys can be provided to a customer's HSM, encrypted, and returned to the cloud, such that encrypted object keys, encrypted by the customer, are stored in the cloud. The cloud can alternatively encrypt the customer's object keys with a master key for the customer, which is then encrypted by the customer's HSM before being stored in the cloud. Proxies are also deployed for efficiently communicating with customer security modules. |
| US10805268B2 |
Method and apparatuses for enabling routing of data packets between a wireless device and a service provider based in the local service cloud
There is provided a method for constructing a traffic filter enabling routing of data between a wireless device and a Local Service Cloud, LSC, based service provider and a corresponding system, computer program and computer program carrier. There is also provided a method for enabling routing of data packets between a wireless device in a cellular communication network and a Local Service Cloud, LSC, based service provider, a method for routing data packets between a wireless device in a cellular communication network and a Local Service Cloud, LSC, based service provider and corresponding network nodes. |
| US10805264B2 |
Automatic hostname assignment for microservers
A Chassis Baseboard Management Controller (CBMC) includes at least one memory for storing data related to a plurality of microservers in a server chassis. A request is received from a remote device for microserver hostnames to build a locality map for a storage or processing pool in a distributed storage or processing network. A device slot number corresponding to a physical location of the microserver in the server chassis is determined for each microserver. The determined device slot number is appended to a chassis hostname to create respective microserver hostnames. According to one aspect, a microserver hostname is received from a CBMC and stored in a memory of a μBMC of a microserver. The microserver hostname is retrieved from the memory by a processor of the microserver during a boot sequence. The retrieved microserver hostname is set as a hostname for communicating via at least one network interface. |
| US10805263B2 |
Domain name registry database
Presented herein are methods, non-transitory computer readable media, and devices for providing and managing a Top-Level Domain that uniquely identifies an object or a role The method may comprise linking the domain name with an object (e.g., an artwork) by adding approximately eight additional fields to the domain name “Whois” record. “Whatis” (the combination of existing “Whois” and a number of additional fields) directly links the domain name, the registrant, and an (art) object. Any or all of the additional fields can be employed in many varieties of ways as a link and identification with objects or roles, transferring with the ownership of an object or, say, title or position of a role. |
| US10805259B2 |
Geolocation using reverse domain name server information
Generating an improved/more accurate geolocation database is provided. Given a dataset of reverse DNS hostnames for IP addresses, ground truth information, and a hierarchical geographical database, a machine learning classifier can be trained to extract and disambiguate location information from the reverse DNS hostnames of IP addresses and to apply machine learning algorithms to determine location candidates and to select a most probable candidate for a reverse DNS hostname based on a confidence score. The classifier can be used to generate an accurate geolocation database, or to provide accurate geolocation information as a service. |
| US10805258B2 |
Multiple link layer address resolution protocol (ARP)
A computer-implemented method comprising a processor providing a Multiple Address Resolution Protocol (MARP) message, wherein the MARP message comprises multiple Media Access Control (MAC) addresses associated with an Internet Protocol (IP) address. |
| US10805257B2 |
Unified messaging system with integration of call log data
In particular embodiments, a mobile computing device receives an incoming communication from a source. The mobile computing device queries a social-networking system operable to aggregate communications between the source and a user associated with the mobile computing device. The mobile computing device receives from the social-networking system one or more aggregated communications between the source and the user and at least a portion of a profile associated with the source in the social-networking system. The mobile computing device displays the aggregated communications and the portion of the profile in a screen of the mobile computing device. |
| US10805252B2 |
Prioritizing messages within a message network
A system and a method are disclosed for recommending electronic messages in a message sharing system. Users can post messages to the message sharing system. These messages from posting users are received by the system and sent to receiving users that have subscribed to the posting users. The receiving users interact with the messages in various ways, such as by sharing the messages with other users. Interaction information is received for each of the electronic messages. The interaction information includes an indication of the number of interactions with the electronic message by receiving users. A score is determined for each electronic message based on the interaction information. Electronic messages are selected for being recommended to a user or a group of users based on the scores. The recommendations are then sent to the users, enabling users to better focus their attention on messages that are likely to be interesting. |
| US10805250B2 |
Method and system for providing a collaborative event-share service
A method, a system and a computer readable medium for supporting collaborative media sharing among users at an event are disclosed. For example, the method creates an event-share group relating to an event, and provides an event tag to a plurality of members of the event-share group, where the event tag uniquely identifies the event-share group or the event. The method receives a captured media from at least one of the plurality of members, wherein the event tag is attached to the captured media and provides the captured media to the plurality of members. |
| US10805249B1 |
Systems and methods for sharing content
Systems, methods, and non-transitory computer-readable media can determine at least one message to be sent through a message thread, wherein the message thread is used to exchange messages among users. At least one visual augmentation to be applied to the at least one message can be determined. The at least one visual augmentation can be applied to the at least one message. The at least one visually augmented message is sent through the message thread. |
| US10805247B1 |
Method and apparatus for requesting private replies in messaging
A method and apparatus relates to the operation of a plurality of messaging devices that includes a first device operated by a first group user and remaining devices operated by remaining group users, wherein the first group user and the remaining group users are a plurality of group users communicating with each other in a messaging channel. A private reply requested text message is received in a message channel. The private reply requested text message is entered into a first device from a first group user. The private reply requested text message is transmitted to remaining group users so that the private reply requested text message appears in the messaging channel on the first device and on the remaining devices. Each of the remaining group users may reply to the private reply requested text message in the messaging channel with a respective reply. Each respective reply to the private reply requested text message is displayed on the first device, but fewer than each respective reply is displayed on at least one of the remaining devices. |
| US10805244B2 |
Service platform to support automated chat communications and methods for use therewith
Aspects of the subject disclosure may include, for example, a service platform that receives a chat request from a client device associated with a user. A chat database of previous chat sessions associated with other users is searched based on the chat request to identify a previous chat session corresponding to the chat request. Chat data corresponding to the previous chat session is retrieved from the chat database and sent to the client device. Other embodiments are disclosed. |
| US10805243B2 |
Artificial intelligence conversation interface for receiving and interpreting user input
An information processing device includes a controller that, when an instruction content including information indicating a content of a service and information of a resource to be used for the service is transmitted to a conversation partner in an interface where a user makes a conversation with the conversation partner, controls a notification of information on a process corresponding to the instruction content. |
| US10805242B2 |
Techniques for a configuration mechanism of a virtual switch
Examples include techniques for a configuration mechanism of a virtual switch. Example techniques include monitoring a database including parameter to configure a virtual switch at a computing platform hosting a plurality of virtual machines or containers. Changes to one or more parameters may cause changes in allocations of computing resources associated with supporting the virtual switch. |
| US10805231B2 |
Service processing method and system and device
A service processing method and system, and a device to reduce a large quantity of back end servers, and to simplify a structure of a distributed system where the method includes receiving, by a master device in a resource pool, a service processing request, determining, by the master device, a resource required by a service, determining, according to a remaining resource of each slave device in the resource pool, a slave device that satisfies the resource required by the service, and assigning, by the master device, the service to the corresponding slave device for processing, where the master device and the slave device are both video surveillance front end devices, and the master device determines a device that is in the front end devices and whose remaining resource satisfies a preset threshold as the slave device. |
| US10805229B2 |
Generating, at least in part, and/or receiving, at least in part, at least one request
In an embodiment, an apparatus is provided that may include circuitry to generate, at least in part, and/or receive, at least in part, at least one request that at least one network node generate, at least in part, information. The information may be to permit selection, at least in part, of (1) at least one power consumption state of the at least one network node, and (2) at least one time period. The at least one time period may be to elapse, after receipt by at least one other network node of at least one packet, prior to requesting at least one change in the at least one power consumption state. The at least one packet may be to be transmitted to the at least one network node. Of course, many alternatives, modifications, and variations are possible without departing from this embodiment. |
| US10805227B2 |
System and method for controlling access to web services resources
A system and method for controlling access to web services resources. A system may include a storage medium configured to store instructions and one or more processors configured to access the storage medium. The instructions may be executable by at least one of the processors to implement a web services access control system (ACS) configured to receive requests. Each request specifies an access operation to be performed with respect to a corresponding resource. Each of the requests is associated with a corresponding principal. For each received request, the ACS may be further configured to determine whether an access control entry exists that is associated with both the resource and principal associated with the request and that specifies an access type sufficient to perform the access operation. If no such entry exists, the ACS may deny the request. |
| US10805226B2 |
Resource manager, system, and method for communicating resource management information for smart energy and media resources
According to an aspect of the disclosure, a resource management platform, system and method of communicating resource management information for smart energy and media resources is provided. A resource management platform can include an interface configured to communicate media management information and energy management information. The resource management platform also includes a processor configured to detect an incoming communication to alter an operating condition in response to receiving the media management information or the energy management information. The processor can further be configured to initiate an output of media content in response to detecting media management information, and initiate altering an operating status of a device in response to detecting the energy management information. The processor can also initiate storing at least a portion of the media content and the energy management information within a memory. |
| US10805224B2 |
Parallel scheduling method and parallel scheduling apparatus
A parallel scheduling apparatus includes an information managing unit generating a first request information for scheduling, a first scheduling unit performing first scheduling and then generating first matching information on the basis of the first request information, and a second scheduling unit performing second scheduling on the basis of the first request information and the first matching information. The parallel scheduling has an advantage of improving the scheduling performance and lowering the implementation complexity, ensuring low delay and transmission fairness among VOQs at low input traffic, being applied to all scheduling algorithms that perform existing multi-iterations, and providing efficient scheduling in a packet switch having a long RTT time or having a very short time slot or cell size, such as an optical switch. |
| US10805221B2 |
Service function chain (SFC) path selection method and system
A service function chain (SFC) path selection method. The disclosed method receives an SFC request for scheduling an SFC, rearranges SFC with respect to workload of service function forwarders (SFFs) utilized in the SFC while conforming to SFC arrangement rules concluded from a history of deployed SFC. The SFC arrangement rules may be created from machine learning processes or manually created by an administrator. |
| US10805219B2 |
Methods and systems for evaluating network performance of an aggregated connection
Methods and systems for transmitting data packets through a selected connection that the first data packet of a data session satisfies a match condition. The match condition is received through a user interface. When data packets of the data session are received, the data packets will then be transmitted through a selected connection. The selected connection is selected from connections based on a connection selection criteria. Further differentiated services code point (DSCP) of first data packet is changed when sent by a computing device. After a network node receives the first data packet, then resets the DSCP value before sending the first data packet. |
| US10805215B2 |
Intra-host and end-to-end packet path and treatment tracing using in-situ OAM in container networking architecture
Presented herein are techniques for monitoring packets in a container networking environment. A method includes receiving a packet at a network node, the packet having been routed to the network node in accordance with instructions from a container orchestration system, inserting an additional field in the packet that is configured to record a path of the packet within a first POD of the host device that includes at least one container, forwarding the packet to the first POD of the host device in accordance with the instructions from the container orchestration system, updating the additional field with container networking path information as the packet transits the first POD and the at least one container therein, storing the container path information in an analytics node of the network node, removing the additional field from the packet, and transmitting the packet from the network node to the network. |
| US10805212B2 |
Static route configuration for logical router
Some embodiments provide a method for implementing a logical router in a logical network. In some embodiments, the method receives a configuration of a static route for the logical router, which includes several routing components with separate routing tables. The method identifies which of the routing components require addition of a route to a corresponding routing table to implement the configuration of the static route. The method adds the routes to the corresponding separate routing tables of the identified routing components. |
| US10805211B2 |
Forecasting SDN fabric saturation and machine learning-based flow admission control
In one embodiment, a supervisory device for a software defined networking (SDN) fabric predicts characteristics of a new traffic flow to be admitted to the fabric, based on a set of initial packets of the flow. The supervisory device predicts an impact of admitting the flow to the SDN fabric, using a heatmap-based saturation model for the SDN fabric. The supervisory device admits the flow to the SDN fabric, based on the predicted impact. The supervisory device uses reinforcement learning to adjust one or more call admission control (CAC) parameters of the SDN fabric, based on captured telemetry data regarding the admitted flow. |
| US10805207B2 |
System and method for determining an optimal path arrangement of an infrastructure link network
A method for determining an optimal path arrangement of an infrastructure link network, and a related system for performing the method. The method includes modelling a geographic terrain having a plurality of geographic locations to be connected with each other via an infrastructure link network; modelling each of a laying cost and a repair rate as a respective function affecting the optimal path arrangement of the infrastructure link network; applying a respective weighting to each of the functions to determine a minimized cost function; and determining, based on the determined minimized cost function, the optimal path arrangement connecting the plurality of geographical locations. The determined optimal path arrangement of the infrastructure link network includes a trunk-and-branch topology with a plurality of infrastructure links and one or more connection points connecting the infrastructure links. |
| US10805206B1 |
Method for rerouting traffic in software defined networking network and switch thereof
A method for rerouting traffic by a switch in a software defined networking (SDN) arrangement comprises an additional switch, multiple routing paths between the original switch and the additional switch being preconfigured by a SDN controller. The original switch collects network statistics by transmitting monitoring packets on each of the multiple routing paths and then calculating a round-trip time (RTT) value for each path on the return of the monitoring packets to the additional switch, the two switches functioning together as local controllers. After collection of network statistics from all the multiple routing paths, the original switch selects the routing path with the smallest RTT value and reroutes traffic accordingly. |
| US10805200B2 |
Efficient communication for devices of a home network
Systems and methods are provided for efficient communication through a fabric network of devices in a home environment or similar environment. For example, an electronic device may efficiently control communication to balance power and reliability concerns, may efficiently communicate messages to certain preferred networks by analyzing Internet Protocol version 6 (IPv6) packet headers that use an Extended Unique Local Address (EULA), may efficiently communicate software updates and status reports throughout a fabric network, and/or may easily and efficiently join a fabric network. |
| US10805199B1 |
Testing forwarding information in a network switch
A deterministic model is described that is used for testing networks by exercising forwarding rules (e.g., layer 2 and layer 3) on network devices. Within a single network hop, a light-weight agent can be used to control the testing. One or more probe packets can be injected into an ingress pipeline of a network device using the agent executing on a local processor. The probes are detected after performing at least layer 2 and layer 3 lookups. Hardware in switching logic redirects the probes to the local processor in order to verify the actual forwarding behavior applied on the probe packet. |
| US10805196B2 |
Packet loss and bandwidth coordination
A method of transmitting a stream of packets over a network, the method comprising the steps of: a transmitting device maintaining a measure of network quality; analyzing the measure of network quality so as to determine whether the bandwidth of the network is degrading, beyond a predetermined threshold, the network quality for a transmission over the network; the transmitting device determining a transmission bitrate and a proportion of redundancy in dependence on the analysis; the transmitting device packetising media data and redundancy data in dependence on the determined proportion to generate a stream of packets; and the transmitting device transmitting the generated stream at a rate commensurate with the determined transmission bitrate. |
| US10805189B2 |
Systems and method for shared visualization library
Visualizations are automatically generated based at least on an identifier that identifies a report. One or more data sets and style configurations are retrieved from a shared visualization library via a backend API based on the received identifier and passed to a router component. The router component includes a switch that renders a score component, which generates a score visualization, if the retrieved data sets include score data. If the data sets include time series data, or the score visualization also includes a time series graph, the router component renders a time series component that passes the data sets and the style configurations to a parser that parses the data sets and the style configurations and outputs one or more highcharts options objects. A highcharts component generates the time series visualizations and/or adds the time series graph to the score visualization based on the highcharts options objects. |
| US10805187B2 |
Logging of traffic in a computer network
A method, system and computer program product for logging communication packets from a communication signal in a communication network. The communication network includes one or more perimeters. A split signal is formed of said communication signal, the communication signal including information, and the split signal being identical in information content to the communication signal. The communication packets of the split signal are captured using a network interface controller into a transitory memory. The network interface controller operates in real promiscuous mode. A virtual network interface controller may be operated from an isolated user space container, the isolated user space container having access to said transitory memory as an isolated memory range. The communication packets may be captured into the isolated memory range and the data of the communication packets may be written from the isolated memory range to the non-transitory memory. |
| US10805183B2 |
Method and apparatus for sampling rate conversion of a stream of samples
Disclosed herein is a method and apparatus for converting a stream of samples at a first sampling rate to a stream of samples at a second sampling rate. An exemplary method includes measuring the first sampling rate; determining a first upsampling factor from a basis including: the measured first sampling rate, the target value of the second sampling rate, and a resynchronisation error factor, the first upsampling factor being constrained to be an integer power of a predetermined integer value; and deriving, from a reference set of filter coefficients and from a ratio of the first upsampling factor to a reference upsampling factor, a first set of filter coefficients for use in a first interpolation filter, the reference set of filter coefficients being for a reference upsampling factor that is an integer power of the predetermined integer value. |
| US10805182B2 |
Provisioner disaster-recovery framework for platform-as-a-service offering
A system and method is disclosed for recovering from any form of disaster-based deletion or loss of resource for a provisioner in a PaaS offering deployed on a cloud. Major architectural changes in the typical provisioner framework are provided along with algorithms to recover from any kind of disaster. Gap-points in existing recovery processes for a provisioner are solved with the algorithms described herein. In addition, disaster recovery for an entire tenant in a provisioner framework may be provided in accordance with some embodiments. In other words, a solution is described in which a user/customer is able to recover a previous state with zero-data loss and zero-re-configuration cost in any scenario of resource deletion. |
| US10805181B2 |
Service operation chaining
For a multi-tenant environment, some embodiments of the invention provide a novel method for forwarding tenant traffic through a set of service machines to perform a set of service operations on the tenant traffic. In some embodiments, the method performs a classification operation on a data message flow of a tenant, in order to identify a set of service operations to perform on the data message flow. For some data message flows, the classification operation selects the identified set of service operations from several candidate sets of service operations that are viable service operation sets for similar data message flows of the tenant. In some embodiments, the classification operation is based on a set of attributes associated with the data message flow (e.g., five tuple identifier, i.e., protocol and source and destination ports and IP addresses). |
| US10805179B2 |
Service level agreement-based multi-hardware accelerated inference
Various systems and methods for implementing a service-level agreement (SLA) apparatus receive a request from a requester via a network interface of the gateway, the request comprising an inference model identifier that identifies a handler of the request, and a response time indicator. The response time indicator relates to a time within which the request is to be handled indicates an undefined time within which the request is to be handled. The apparatus determines a network location of a handler that is a platform or an inference model to handle the request consistent with the response time indicator, and routes the request to the handler at the network location. |
| US10805176B2 |
SW framework support method for open IPMI and DCMI development
A method for generating firmware by allowing a developer to freely select functions to be included in firmware installed on a main board of a server, and by building a firmware image is provided. The method for generating firmware includes: listing functions that are allowed to be included in firmware installed on a main board of a server; receiving selection of at least one of the listed functions from a user; and building a firmware image including the functions selected by the user.Accordingly, since a firmware image is built by a developer freely selecting functions to be included in firmware installed on a main board of a server, firmware optimized for requirements of the developer can be generated. |
| US10805171B1 |
Understanding network entity relationships using emulation based continuous learning
A system may assist with checking policy impact in a software-defined infrastructure environment. It may perform continuous learning of impact using emulations under varying conditions and may take a statistical and machine learning based analysis approach on the data obtained from emulations. The system's data analysis may enable it to discover and quantify the impact of policies on software-defined infrastructure objects in the same or different layers. |
| US10805169B2 |
Topology determining method, message response method, controller, and switch
Embodiments of this application disclose a topology determining method used by an OFC to determine a complete topology structure of a hybrid SDN-IP network. The method includes: receiving, by an OFC, a first message forwarded by a first OFS; determining information about a link from the first TS to the first OFS based on the first message; sending a second message to the first OFS, and instructing the first OFS to forward the second message on the first port; sending a third message to the first OFS; receiving a first response message, where the first response message carries the MIB information of the first TS; and obtaining the information about the link from the first OFS to the first TS and information about a link from a second TS to the first TS based on the MIB information of the first TS. |
| US10805166B2 |
Infrastructure-agnostic network-level visibility and policy enforcement for containers
An enforcement mechanism on an operating system instance enforces a segmentation policy on a container. A configuration generation module executing in a host namespace of the operating system instance receives management instructions from a segmentation server for enforcing the segmentation policy on a container. The configuration generation module executes in the host namespace to configure a traffic control and monitoring module in a container namespace associated with the container. The traffic control and monitoring module in the container namespace controls and monitors communications to and from the container in accordance with its configuration. By executing a configuration generation module in the host namespace to configure traffic control and monitoring module in the container namespace, the enforcement mechanism beneficially enables robust and lightweight enforcement in a manner that is agnostic to different containerization protocols. |
| US10805165B2 |
System and method for managing and configuring attributes of internet of things (IOT) devices
A system and method are described for managing attributes in an IoT system. For example, one embodiment of a machine-readable medium comprises program code stored thereon which, when executed by a machine, causes the machine to perform the operations of: specifying a plurality of attributes for a corresponding plurality of items of data managed in an Internet of Things (IoT) device and/or an IoT service; associating one or more ancillary attributes with one or more of the plurality of attributes, the ancillary attributes to specify attribute configurations and/or interdependencies between one or more of the plurality of attributes; evaluating the one or more ancillary attributes to ensure compliance with predefined constraints associated with the plurality of items of data; generating an indication of compliance if the one or more ancillary attributes are in compliance with the predefined constraints; and generating an indication of non-compliance if the one or more ancillary attributes are not in compliance with the predefined constraints. |
| US10805159B2 |
Server-based application software execution system
An application software execution system according to the present invention includes a plurality of machines and one server connected to the machines. The server includes a processor for executing application software, and a storage unit for storing the application software. The server obtains configuration information of each of the machines, and executes the application software in accordance with the obtained configuration information of each of the machines. |
| US10805157B2 |
Over the air programming via a broadband access gateway
A system and method supporting over-the-air programming of access device such as, for example, a mobile multimedia handset and a wireless personal digital assistant (PDA) via a broadband access gateway, is disclosed. The broadband access gateway may receive identifying information from the access device via a personal area network and/or a wireless local area network, and may transfer the identifying information to a wide area network or a third party content provider, via a broadband network. The broadband access gateway may enable the registration of the access device with the wide area network, and may receive firmware/software updates and/or provisioning parameters via the broadband network. The gateway may then transfer the firmware/software update and/or provisioning parameters to the access device via the personal area network and/or wireless local area network. |
| US10805151B2 |
Method, apparatus, and storage medium for diagnosing failure based on a service monitoring indicator of a server by clustering servers with similar degrees of abnormal fluctuation
A method, an apparatus and a storage medium for diagnosing failure based on a service monitoring indicator are provided. Service monitoring indicator of a server is analyzed to obtain a degree of abnormal fluctuation in the service monitoring indicator. Servers with similar degrees of abnormal fluctuation are clustered according to the degree of abnormal fluctuation of the service monitoring indicator, to obtain clustered results that include the servers and the service monitoring indicator. A location where the service fails is determined according to the clustered results. |
| US10805147B2 |
Fail recovery method and internet of things system and charging system using the same
A fail recovery method and an Internet of Things (IoT) system and a charging system using the same are provided. The fail recovery method includes following steps: providing a plurality of gateway devices, in which at least one of the gateway devices preset to provide a wireless network service to at least one IoT device and at least another one of the gateway devices preset to provide the wireless network service to at least one user device; mutual confirming an operation state of other one of gateway devices by the gateway devices; and when the one of the gateway devices is determined as failed, using the another one of the gateway devices to replace the failed gateway device, so as to simultaneously provide the wireless network service to the IoT device and the user device by the another one of the gateway devices. |
| US10805145B2 |
BFD over VxLAN on vPC uplinks
Disclosed are systems, methods, and computer-readable storage media for synchronizing the secondary vPC node to the primary vPC node in a BFD protocol over a VxLAN channel with a remote node. In some embodiments of the present technology a primary vPC node can receive a packet from the remote node. The primary vPC node can then determine the packet includes either a MAC address corresponding to the primary vPC node or a secondary vPC node, and at least one inner packet identifier. Additionally, the primary networking switch can identify an access control list (ACL) entry from a set of ACL entries based on the at least one inner packet identifier. Subsequently, based on the ACL entry, the primary vPC node can generate a copy of the packet. After which, the primary vPC node can transmit the packet to the secondary vPC node. |
| US10805142B2 |
Method and apparatus for bidirectional communication between measuring devices and a data collector
To optimally receive smart meter control messages transmitted by a concentrator, in a meter having a transceiver for bidirectional data interchange, despite its minimal resources, a current modulation reference frequency which is subject to drift is shifted by the instantaneous frequency difference between the current transmitter-side reference frequency and the current transceiver-side reference frequency in the concentrator. Therefore, the current reference frequencies correspond in the downlink without having to intervene in the meter. This frequency difference in the concentrator is obtained by comparing the current receiver-side demodulation reference frequency with the current transmitter-side reference frequency, and the current transceiver-side reference frequency, on the other hand, from messages from the transmitter of the concentrator and from the transceiver of the meter which are received using the receiver of the concentrator. A frequency-measuring comparator only needs to be connected upstream and downstream of the demodulator in the concentrator for this purpose. |
| US10805140B2 |
Method for transmitting and receiving sounding reference signal between terminal and base station in wireless communication system, and apparatus for supporting same
Disclosed are a method for transmitting and receiving a signal between a terminal and a base station in a wireless communication system, and an apparatus for supporting the same. In particular, disclosed are: a method for transmitting and receiving a signal, including the uplink data, between a terminal and a base station when a sounding reference signal is configured within a time interval in which uplink data is scheduled; and an apparatus for supporting the same. |
| US10805136B2 |
Multiplexing paging signals with synchronization signals in new radio
Certain aspects of the present disclosure relate to methods and apparatus for multiplexing new radio (NR) synchronization signals and paging signals. A Base Station (BS) decides whether or not to multiplex paging and synchronization signals in a set of time resources, a set of frequency resources or a combination thereof, the deciding based on at least one of a capability of the BS, a capability of at least one User Equipment (UE) served by the BS, an operating frequency band or a combination of tone spacings of the paging signals and the synchronization signals. |
| US10805135B2 |
Methods and apparatuses for processing an OFDM radar signal
Methods for processing an OFDM radar signal are provided. A plurality of Nc×NDS receive samples corresponding to a number of NDS consecutive OFDM symbols is received, each OFDM symbol comprising a plurality of Nc subcarriers modulated with a respective modulation symbol. Each of the plurality of Nc×NDS receive samples is divided by its respective modulation symbol to generate a number of NDS processed OFDM symbols. The number of NDS processed OFDM symbols is decimated to generate at least one decimated OFDM symbol. A first type discrete Fourier transform (e.g. IFFT) of the at least one decimated OFDM symbol is performed to generate at least one first transformed vector. |
| US10805134B2 |
Method for determining reserved tones and transmitter for performing PAPR reduction using tone reservation
A method of determining reserved tones to be used for reduction of a peak to average power ratio (PAPR) of a signal includes: randomly selecting carrier indices for the reserved tones and generating a kernel signal based on the randomly selected carrier indices; calculating a comparison reference average value of the kernel signal, comparing the calculated comparison reference average value with a prestored comparison reference average value, and preliminarily determining carrier indices of the reserved tones based on the comparison; randomly re-arranging an order of the preliminarily determined carrier indices of the reserved tones; and calculating the comparison reference average value while changing each of the re-arranged indices of the reserved tones, and finally determining carrier indices for which the calculated comparison reference average value becomes the smallest value as carrier indices of the reserved tones. |
| US10805133B2 |
Method and apparatus for determining peak power, peak-to-average power ratio
The invention relates to the field of signal processing, and particularly to method and apparatus for determining a peak power, a peak-to-average power ratio. The method for determining the peak power comprises: obtaining a sampling power at a current sampling time; comparing the sampling power at the current sampling time with an estimated peak power at the current sampling time; and when the sampling power at the current sampling time is greater than the estimated peak power at the current sampling time, determining the sampling power at the current sampling time as an actual peak power at the current sampling time. With the present invention, detection efficiency of the peak power is improved, and the peak power can be determined in real time at each sampling time. |
| US10805126B2 |
Data generation circuit and transmission device
According to one embodiment, a data generation circuit includes a storing circuit, and first and second selection circuits. The storing circuit is configured to store different data items and output the data items in different phases in response to clock signals. The first selection circuit is configured to select first data items one by one from the data items output from the storing circuit and output a first series of selected data items. The second selection circuit is configured to select second data items one by one, whose phase are different from the selected first data items, from the data items output from the storing circuit and output a second series of selected data items. |
| US10805120B2 |
Adaptive frequency correlation estimation for channel estimation
A method is disclosed where a user equipment (“UE”) determines a value of a first parameter and determines a value of a second parameter to select a regularization method for correlation estimate values based on the first parameter value and the second parameter value. |
| US10805117B2 |
Channel estimation in OFDM communication systems
Embodiments of the present disclosure include an OFDM receiver circuit, which includes an FFT circuit configured to calculate an FFT of a plurality of sample values received by the receiver circuit, and a smoothing circuit configured to identify equalizer coefficients for the sample values by truncating portions of an impulse response of the FFT. |
| US10805113B2 |
Application transmission control protocol tunneling over the public internet
Statically configured secure tunnels forward application-level Transmission Control Protocol (“TCP”) application data between servers using a User Datagram Protocol (“UDP”) channel. Applications operating on a server cluster can communicate with other applications on another server in the cluster over the public Internet using secure TCP connection forwarding through a single UDP datagram-oriented communication channel. |
| US10805112B2 |
System and method of establishing communications with multiple information handling systems
In one or more embodiments, one or more systems, methods, and/or processes may receive, via a network, multiple subscription requests from respective multiple baseboard management controllers (BMCs) of respective multiple information handling systems (IHSs); may receive, via the network, authentication information from a first information handling system (IHS), different from each of the multiple IHSs; may determine that the first IHS is authenticated to access the multiple BMCs; may receive, via the network, multiple publication requests from the first IHS to access, via the network, the multiple BMCs respectively; may receive, via the network, multiple queries from the multiple BMCs respectively associated with the multiple subscription requests; may determine that the multiple publication requests are associated with the multiple subscription requests and are associated with the multiple queries associated with the multiple subscription requests; and may establish network communications with the first IHS and the multiple BMCs. |
| US10805110B2 |
Traffic delivery using anycast and end user-based mapping in an overlay network
An overlay network is enhanced to provide traffic delivery using anycast and end user mapping. An anycast IP address is associated with sets of forwarding machines positioned in the overlay network. These locations correspond with IP addresses for zero rated billing traffic. In response to receipt at a forwarding machine of a packet, the machine issues an end user mapping request to the mapping mechanism. The mapping request has an IP address associated with the client from which the end user request originates. The mapping mechanism resolves the request and provides a response to the request. The response is an IP address associated with a set of server machines distinct from the forwarding machine. The forwarding machine encapsulates the packet and proxies the connection to the identified server. The server receives the connection, decapsulates the request, and processes the packet. The server machine responds to the requesting client directly. |
| US10805105B2 |
Method for operating a service system
A method for operating one or more service systems performed in a memory of an analyzing entity (AE) includes a) receiving, by an input interface of the AE, one or more control requests for controlling one or more resources of at least one of the one or more service systems; b) assessing, by the AE, an impact on the one or more service systems of the one or more control requests by checking an effect on already performed control requests for resources of the one or more service systems when the one or more control requests would be performed on one or more of the resources of the at least one of one or more service systems; and c) checking, by the AE, if the assessed impact violates one or more adverse situation rules (ASR). |
| US10805093B2 |
Cryptographic device comprising a physical unclonable function
Some embodiments are directed to an electronic cryptographic device including a physically unclonable function and an enrollment unit configured to generate a first PUF data during the enrollment phase, the first PUF data derived from a first noisy bit string of the PUF, the first PUF data uniquely identifying the physically unclonable function, the first PUF data including a first helper data. The first PUF data is transmitted to an electronic server during an enrollment phase. The device includes a use-phase unit configured to generate a second PUF data derived from a second noisy bit string during a use phase. The first helper data is received from the server in response to transmitting the second PUF data. An error corrector is configured to apply the first helper data to the second noisy bit string. |
| US10805089B1 |
Retrieving public data for blockchain networks using highly available trusted execution environments
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for enhancing blockchain network security. Implementations include receiving a request for data from the data source, transmitting the request to a relay system that is external to the blockchain network and that includes a multi-node cluster including a plurality of relay system nodes, receiving a result provided from a relay system node, the result being digitally signed using a private key of the relay system node, verifying that the relay system node is registered, verifying an integrity of the result based on a public key of the relay system node and a digital signature of the result in response to verifying that the relay system node is registered, and transmitting the result to a client in response to verifying the integrity of the result. |
| US10805088B2 |
Cross-blockchain authentication method, apparatus, and electronic device
Implementations of the present specification provide for cross-blockchain authentication. A public key of a database engine comprising a trusted node of a second blockchain is determined by a subscribing client included in a system for cross-chain interaction. The public key is used as an authentication data source. The system comprises the subscribing client (corresponding to a first blockchain), a publishing client (corresponding to the second blockchain), and a cross-chain interaction end separately connected to the subscribing client and publishing client. Data that is to be authenticated in the second blockchain is determined using the cross-chain interaction end. The data is published by the publishing client. The data to be authenticated is signed by the database engine using a private key of the database engine. The data authentication performed on the data uses the authentication data source and a signature of the data to be authenticated. |
| US10805085B1 |
PKI-based user authentication for web services using blockchain
Methods, systems, storage media for authentication are described. On the methods includes receiving, at a smart contract on a distributed ledger, a signed authentication challenge. The method includes verifying the identity of the user who signed authentication challenge. The method includes raising an event that indicates that the user has been authenticated; wherein a server listens for events from the smart contract, and associates a session between the browser and the server with the user based on the event. |
| US10805084B1 |
Decentralized system for secure access of digital content
Disclosed are examples of decentralized systems and related apparatus, devices, computer program products, and methods for secure access of digital content. In some implementations, a first request from a client to access encrypted digital content includes a call on a digital contract. The call passes an ephemeral key set encrypted with a public key of a consumer. A transaction identifying the first request in association with the encrypted ephemeral key set is recorded in the digital contract. The transaction is identified by a transaction identifier (ID), which is sent to the client. A second request from the client includes: an authorization token including the transaction ID, and a signature of the consumer. Authorization of the consumer is verified based on the authorization token. A transaction identifying one or more keys is recorded in the digital contract. The digital content can be re-encrypted and sent to the client. |
| US10805081B1 |
Processing batches of point evaluations in a supersingular isogeny-based cryptosystem
In a general aspect, a supersingular isogeny-based cryptography process is performed. In some aspects, a cryptographic element is generated by executing a supersingular isogeny-based cryptography protocol. A generator of a first isogeny kernel is computed. A pre-determined tree topology is traversed. The tree topology includes nodes coupled by edges. A first set of edges represent scalar multiplications, and a second set of edges represent point evaluations. A plurality of isogeny kernels corresponding to respective nodes in the tree topology are computed by executing batches of operations. At least one of the batches includes a first point evaluation represented in the tree topology having a first domain and a first range, and a second point evaluation represented in the tree topology having a second domain and a second range. The first domain, the first range, the second domain and the second range are non-isomorphic elliptic curves. |
| US10805077B2 |
Partially encrypted conversations via keys on member change
Examples of the present disclosure describe systems and methods for partially encrypting conversations using different cryptographic keys. Messages communicated during a conversation session may be encrypted using a cryptographic key. Other conversation participants may then decrypt the messages using the cryptographic key. During the conversation, an event may occur that causes a new cryptographic key to be generated. The conversation participants may then use the new cryptographic key when communicating. As such, previously-encrypted messages may be inaccessible to new members that do not have the old cryptographic key, while newly-encrypted messages may be inaccessible to former members that do not have the new cryptographic key. An isolated collection may store the messages and related cryptographic keys. Relationships may exist within the isolated collection, such that messages may be related to one another and messages may also be related to the cryptographic keys used to encrypt them. |
| US10805074B2 |
Fibre-optic communication based on encoded frequency-shifted light
According to an example aspect, there is provided an apparatus comprising a fibre interface coupled, via a first waveguide, with at least one encoder, a controller configured to cause the at least one encoder to encode light received in the apparatus via the fibre interface with information, and to cause a frequency shift in the light, and wherein the apparatus is configured to cause the light to propagate back to the fibre interface. |
| US10805073B2 |
Generating master and wrapper keys for connected devices in a key generation scheme
Provided are a computer program product, system, and method for generating master and wrapper keys for connected devices in a key generation scheme. For each of the devices, a wrapped master key comprising a master key for the device and a wrapper key is stored. The wrapper keys for a plurality of the devices are generated by another of the devices. For each of a plurality of the devices, the master key for the device is used to generate the wrapper key for a target device comprising another of the devices. For each of the devices, the wrapper key for the device is used to decrypt the stored wrapped master key. At least one of the devices uses the master key for the device to encrypt and decrypt data at the device. |
| US10805072B2 |
System and method for autonomous dynamic person management
A system and method for persona management in online environments provides an identity by proxy with trusted parties having portions of the private cryptographic key of the consumer so that the private cryptographic key of the consumer may be generated. The system and method implements the persona management in online environments in one embodiment using an immutable ledger with decentralized transaction consensus and a process to share portions of the private cryptographic key with trusted third parties. |
| US10805068B1 |
Systems and methods for feature-based rating via blockchain
The present embodiments relate to systems and methods for using a blockchain to record information related to the lifecycle of a vehicle associated with a Vehicle Identification Number (VIN). For example, the VIN lifecycle process may be used to develop safety-feature based insurance models. The systems and methods may include calculating a safety rating for a safety feature based upon data accessed at a blockchain. The safety rating may be used to generate a product associated with a new vehicle type, such as an insurance product covering the new vehicle type. The systems and methods described herein may allow for using a blockchain which gives the option for private information, and permissioned participants in the blockchain. In particular, the systems and methods may allow for a distributed consensus amongst businesses, consumers, and authorities, as to the validity of information and transactions stored on the blockchain. |
| US10805067B1 |
Doubly linked blockchain
An example method includes accessing first and second blocks of a first blockchain. The second block includes a first backward link including a hash of the first block and second block content. A first prime block is generated that includes the first block and a first forward link. The first forward link includes a hash of the second block of the first blockchain. The first prime block is published on a doubly linked blockchain. A third block of the first blockchain is accessed. The third block includes a second backward link including a hash of the second block and a third block content. A second prime block is generated that includes the second block, a first prime backward comprising a hash of the first prime block, and a second forward link comprising a hash of the third block of the first blockchain. |
| US10805060B2 |
User equipment, PDSCH A/N transmitting method thereof, transmission/reception point, and PDSCH A/N receiving method thereof
The present invention relates to a system that includes a transmission/reception point and a user equipment having different configurations in inter-band and performs a TDD (Time Division Duplex) method. |
| US10805059B2 |
Radio terminal and base station
A radio terminal according to one embodiment comprises a controller configured to perform radio communication in a time division duplex system, with a base station. The controller is configured to receive a downlink radio signal from the base station; and transmit to the base station, response information indicating whether reception of the downlink radio signal is successful, wherein the response information is transmitted by using an uplink radio resource different from an uplink control channel resource even if the uplink radio resource is not allocated for data transmission from the base station. |
| US10805053B2 |
Methods and apparatuses for receiving and sending control channel
Embodiments of the present invention disclose methods and apparatuses for receiving and sending a control channel, and are applicable to the field of communications technologies. In the embodiments of the present invention, a base station carries scheduling information of a user equipment of an R11 system in both the PDCCH region and the E-PDCCH region of a downlink subframe. In this way, the user equipment needs to detect the control channel within the PDCCH region and the E-PDCCH region, so that resources of the two regions are available to the user equipment of the R11 system. Moreover, the user equipment detects only the control channel of the first type in the PDCCH region, and detects control channels of the other type in the E-PDCCH region. The method in the embodiments of the present invention does not increase the number of control channel detections. |
| US10805051B2 |
WiFi channel aggregation
A single media access control (MAC) layer processor provides data to one or more baseband signal processors, which generate a plurality of baseband signals corresponding to the data provided by the MAC layer processor. The plurality of baseband signals includes at least a first baseband signal and a second baseband signal. The first baseband signal has a first frequency bandwidth and the second baseband signal has a second frequency bandwidth that is different than the first frequency bandwidth. The one or more baseband signal processors provide the plurality of baseband signals to a plurality of radio frequency (RF) radios for simultaneous wireless transmission via a plurality of RF segments. |
| US10805049B2 |
Method and apparatus for allocating acknowledgement resources
A method includes receiving initial acknowledgement resource information at a user device from a base station. The initial acknowledgement resource information is associated with a subset of acknowledgement resources. The method includes determining in dependence on the initial acknowledgement resource information which of the subset of acknowledgement resources is to be used. The user device transmits an acknowledgement on the determined resource. |
| US10805044B2 |
Optimizing delay-sensitive network-based communications with latency guidance
Devices, computer-readable media, and methods for selecting a type of packet loss protection for a network-based communication based upon a latency estimate are disclosed. For example, a processing system including at least one processor may obtain a latency estimate for a network-based communication, determine whether the latency estimate exceeds a latency threshold for selecting a type of packet loss protection, and select, the type of packet loss protection for the network-based communication from among a first type of packet loss protection and a second type of packet loss protection based upon the determining. When the latency estimate is determined to not exceed the latency threshold, the first type of packet loss protection is selected. When the latency estimate is determined to exceed the latency threshold, the second type of packet loss protection is selected. |
| US10805043B2 |
Data transmission apparatus and data transmission method, reception device and reception method, program, and data transmission system
The present disclosure relates to a data transmission apparatus and a data transmission method, a reception. device and a reception. method, a program, and a data transmission system capable of surely switching transmission systems.A transmission unit capable of transmitting data by switching the plurality of transmission systems transmits a switching command for instructing to switch the transmission system. Then, as a measure against an error generated when the switching command is generated, an error correction code for correcting the error generated in the switching command is transmitted or it is confirmed whether the switching command has been successfully received or reception of the switching command has failed on the basis of the result of error detection relative to the transmitted switching command. The present technology is applied to, for example, a bus IF. |
| US10805039B2 |
Rate matching behavior for bundled CORESETs
A method and apparatus for determining rate matching behavior for a plurality of control resource sets (CORESETs) is provided. A base station (BS) bundles a plurality of CORESETs into a global resource set. The BS configures the global resource set for a User Equipment (UE). The BS determines resources assigned to a downlink data channel overlap at least a portion of the global resource set and determines whether data on the downlink data channel is to be rate matched around the global resource set or is to use resources in the global resource set. The BS transmits the data on the downlink data channel based on the determination of the rate matching. |
| US10805038B2 |
Puncturing signaling channel for a wireless communication system
A signaling channel that punctures traffic channels is used to send signaling, e.g., acknowledgments (ACKs). To send signaling, resources for the signaling channel are determined, e.g., based on a frequency hopping pattern. Signaling is spread with a spreading code (e.g., a Walsh code) to generate spread signaling, which is mapped to the resources for the signaling channel. Each resource may be partitioned into multiple clusters. A signaling message may be mapped to different clusters to achieve diversity. Traffic data may also be mapped to other resources for a traffic channel assigned for use. Traffic data mapped to the other resources for the signaling channel is punctured. The mapped signaling and traffic data are further processed (e.g., for OFDM or SC-FDMA) and transmitted. |
| US10805032B2 |
Data transmission method, terminal device, and network side device
Embodiments of this application provide a data transmission method, a terminal device, and a network side device. Encoding, by a terminal device, a first identifier by using a first code word which is selected from at least one code word by the terminal device; sending, by the terminal device, the encoded first identifier to a network side device; receiving, by the terminal device, a second identifier sent by the network side device; decoding, by the terminal device, the second identifier by using the first code word; when the decoded second identifier is the same as the first identifier, encoding, by the terminal device, subsequent data by using the first code word; and sending, by the terminal device, the encoded subsequent data to the network side device. |
| US10805028B2 |
Receiving device, transmitting device, and data processing method
The present technology relates to a receiving device, a transmitting device, and a data processing method which are capable of providing a broadcast service using a wide bandwidth more flexibly. A receiving device processes a stream in which delivery configuration information indicating that the stream of the broadcast service is delivered across a predetermined frequency band is included in transmission information which is transmitted through an upper layer higher than a physical layer, the stream having a delivery configuration corresponding to the delivery configuration information, so that a broadcast service using a wider bandwidth can be provided. The present technology can be applied to a FW proxy device connected to a network such as, a home LAN, a head end of a cable operator, a base station of a mobile network, or the like. |
| US10805022B2 |
Method of using time domain subspace signals and spatial domain subspace signals for location approximation through orthogonal frequency-division multiplexing
A method for location approximation through time-domain subspace signals and spatial domain subspace signals is provided with an orthogonal frequency-division multiplexing (OFDM)-based wireless device that includes a wireless terminal, a multiple-input and multiple-output (MIMO) antenna, a spatial subspace processor, and a temporal subspace processor. An uplink signal is transmitted from the wireless terminal towards a plurality of targets positioned within an operational range of the MIMO antenna. A plurality of reflected signals generated from the plurality of targets and is received through the MIMO antenna. The plurality of reflected signals is processed at the spatial subspace processor to determine a direction of arrival (DOA) for each of plurality of reflected signals. Each of the plurality of reflected signals is processed by the temporal subspace processor to determine a time delay. The time delay and the DOA are utilized to derive a location approximation for the plurality of targets. |
| US10805021B2 |
Transmission performance monitoring method for monitoring transmission performance based on analog optical link, and monitoring apparatus performing the method
A transmission performance monitoring method for monitoring a transmission performance based on an analog optical link and an apparatus performing the method. The transmission performance monitoring method and apparatus centrally monitor an RF signal transmission performance in an analog optical link-based mobile haul or indoor distributed antenna system. |
| US10805016B2 |
Information transfer using discrete-frequency signals and instantaneous frequency measurement
A method of receiving information is provided. The method is performed at a system for information transfer. The method includes receiving a first signal pulse and determining a first frequency band and a first pulse duration associated with the first signal pulse. The method includes, in accordance with a determination that the first frequency band is one of a predefined set of frequency bands, and that the first pulse duration is one of a predefined set of pulse durations, determining, from a predefined set of symbols, a first symbol associated with the first frequency band and the first pulse duration. Each frequency band in the predefined set of frequency bands is associated with a respective set of two or more symbols, and each symbol of a respective set of two or more symbols is associated with a distinct respective pulse duration in the first predefined set of pulse durations. |
| US10805011B2 |
Bell state measurement
According to an example aspect of the present invention, there is provided an apparatus comprising a first and a second polarization beam splitter-rotator (140, 142), together arranged to split two incoming polarization encoded qubits into four first optical modes, the apparatus being configured to align polarizations of the four first optical modes, an interferometer stage (150) configured to obtain, from the four first optical modes, four second optical modes, and four detectors (160) arranged to receive at least one of the four second optical modes. |
| US10805005B2 |
Frequency spectrum system security
A system may include a receiver configured to receive a communications signal from a transmitter and processing circuitry configured to: determine at least one frequency characteristic of the communications signal and compare the at least one frequency characteristic to at least one verified frequency characteristic stored by a memory associated with the processing circuitry to determine whether the transmitter is a verified transmitter. In some examples, the transmitter, receiver and communications signal are an optical transmitter, and optical receiver, and an optical signal, respectively. |
| US10805003B2 |
Optical signal monitor, optical wavelength multiplexing transmitter, and method for monitoring optical signal
An optical signal monitor, including: a storage that holds a threshold value set for each of determination areas having a bandwidth set in accordance with an average grid of dummy light; a measurement section that sequentially measures an optical intensity of an inputted wavelength-multiplexed optical signal with respect to each of measurement areas obtained by dividing the determination area into areas with a bandwidth sufficiently smaller than a grid width of a monitoring-target optical signal composing the wavelength-multiplexed optical signal, and output measured values; and a section that determines that dummy light corresponding to the determination area needs introducing if each of measured values in the determination area is smaller than a threshold value, and, determines that dummy light corresponding to the determination area does not need introducing if at least one of the measured values in the determination area is equal to or larger than the threshold value. |
| US10805001B2 |
State transfer among spaceborne and airborne devices
Systems, methods, and software described herein provide enhancements for deploying applications in spaceborne and airborne devices. In one example, a satellite device includes one or more sensor systems, a communication interface, and a virtualized execution system. The virtualized execution system is configured to receive state information via the communication interface from at least a peer device related to execution of one or more software payloads by the peer device, and execute one or more virtual nodes based at least on the state information to employ the one or more sensor systems and establish imaging data. |
| US10804999B2 |
Robust relay retransmissions with dual-coding
A signal forwarding device receives a dual-encoded first set of data that is encoded according to first and second sets of encoding parameters. The signal forwarding device decodes the dual-encoded first set of data, using decoding parameters that correspond to the second set of encoding parameters, to generate a single-encoded first set of data that is encoded according to the first set of encoding parameters. The signal forwarding device transmits the single-encoded first set of data to the destination device, which decodes the single-encoded first set of data using decoding parameters that correspond to the first set of encoding parameters. If the decoding is unsuccessful, the destination device requests retransmission. The signal forwarding device decodes a stored copy of the single encoded first set of data, using decoding parameters that correspond to the first set of encoding parameters, and retransmits the first set of data to the destination device. |
| US10804995B2 |
Radio frequency chain allocation method and radio node device
A method for radio frequency chain allocation. The method is utilized in a massive multiple-input multiple-output (MIMO) system. Specifically, a hybrid beamforming (HB) system in which the overall beamformer consists of a low-dimensional digital beamformer followed by an analog beamformer utilized the method to allocate RF chains to data streams. The total number of RF chains is not necessarily equal to the number of data streams to users. |
| US10804993B2 |
Method and apparatus for downlink and uplink CSI acquisition
Methods and apparatuses for CSI reporting mechanisms are provided. A user equipment (UE) includes a transceiver configured to receive configuration information for channel state information (CSI) calculation and reporting. The configuration information includes settings comprising at least one CSI reporting setting, at least one reference signal (RS) setting, and a measurement setting. The UE also includes a processor operably connected to the transceiver. The processor is configured to decode the configuration information and calculate CSI according to the settings, The transceiver is further configured to transmit the calculated CSI on an uplink (UL) channel. |
| US10804990B2 |
Base station and user equipment
Some techniques for implementing estimation of channel states with high accuracy and efficient feedback of the channel states in 3D MIMO are disclosed. One aspect of the present invention relates to user equipment for implementing 3D MIMO (3-Dimensional Multiple-Input Multiple-Output) communication, comprising: a channel state information generation unit configured to measure channel states of antenna ports of 3D MIMO antennas in a base station with reference signals transmitted from the antenna ports and generate channel state information based on the measured channel states; and a channel state information feedback unit configured to use different channel state information feedback means for antenna ports in respective dimensions of the antennas to feed the generated channel state information back to the base station. |
| US10804988B2 |
Spatial interference cancellation for simultaneous wireless and information power transfer
A discrete-time delay (TD) technique in a baseband receiver array is disclosed for canceling wide modulated bandwidth spatial interference and reducing the Analog-to-Digital Conversion (ADC) dynamic range requirements. In particular, the discrete-time delay (TD) technique first aligns the interference using non-uniform sampled phases followed by uniform cancellation using a cancellation matrix, such as, for example, a Truncated Hadamard Transform implemented with antipodal binary coefficients. |
| US10804984B1 |
Adaptive hybrid precoder selection in 2D antenna configuration
Apparatus, methods, and computer-readable media for adaptive hybrid precoder selection in 2D antenna configurations are disclosed herein. An example method of wireless communication at a UE includes estimating a channel based on CSI-RS received on each port of a plurality of CSI-RS ports from a base station. The example method includes determining, based on the channel estimation, whether to perform disjoint PMI processing or joint PMI processing when determining a first component of a PMI. The example, method includes determining the first component of the PMI based on the determined disjoint PMI processing or joint PMI processing. |
| US10804981B1 |
Dynamic determination of antenna array mode
Systems and methods are provided for dynamically determining antenna array mode assignment for transmission of downlink power to one or more wireless communication devices (WCD). The system comprises an access point that is configured to transmit wireless downlink signals to a WCD using a first communication protocol and a second communication protocol. A processor collects data over a predetermined time period, which may include sector load data and WCD location data. Then, the processor analyzes the data collected and based on such analysis, determines the antenna array mode assignment. In some aspects, the processor also determines whether there is MU-MIMO grouping between two or more WCDs. |
| US10804980B1 |
Secure end-to-end transport through intermediary nodes
A communication network encrypts a first portion of a transaction associated with point-to-point communications using a point-to-point encryption key. A second portion of the transaction associated with end-to-end communications is encrypted using an end-to-end encryption key. |
| US10804979B2 |
Method and device for acquiring and feeding back transmission beam information
Disclosed in the present invention are a method and device for acquiring and feeding back transmission beam information, comprising: a base station transmits, to a terminal, reference signals and information related to reference signal set division by using downlink transmission beams, wherein the base station transmits a reference signal for each downlink transmission beam, the reference signal of each beam is issued after being formed by using a beam forming weight corresponding to the beam, and the reference signals transmitted using the downlink transmission beams from the same beam group are divided into a reference signal set; the terminal selects Q reference signals from the received reference signals according to the reception quality and according to the information related to reference signal set division, selects a downlink transmission beam combination, and reports to the base station. |
| US10804977B2 |
Electronic device and communication method
The present disclosure relates to an electronic device and communication method. The electronic device used in a first terminal device side of a wireless communication system including: a memory for storing computer instructions; and a processing circuit configured to perform the computer instructions stored thereon for: measuring a first reference signal subject to a first precoding from a base station, wherein a first precoding matrix for the first precoding is determined by the base station based on respective channel states fed back from a plurality of candidate terminal devices, wherein the first terminal device is included in the plurality of candidate terminal devices; determining an interference of other terminal devices in the plurality of candidate terminal devices to the first terminal device based on a result of the measuring and information about the first precoding; and feeding back information indicating the interference to the base station. |
| US10804972B2 |
Personal on-the-move satellite communications terminal
A satellite communications apparatus including an antenna assembly having: a directional antenna arranged to receive signals from and transmit signals to a satellite, an electronic motor arranged to adjust at least one of a position and orientation of the directional antenna; and a sensor arranged to detect the position and orientation of the directional antenna. An RF interface, in communication with the antenna, is arranged to receive the received signals from the directional antenna. A controller, in communication with the RF interface, is arranged to: i) measure a gain associated with the received signals during a first time interval, ii) receive the detected position and orientation of the directional antenna during the first time interval, and iii) send a control signal to the electronic motor to adjust the position and orientation of the directional antenna to limit a decrease in the measured gain to less than a threshold. |
| US10804968B2 |
Passive electrical coupling device and methods for use therewith
Aspects of the subject disclosure may include, for example, a coupling device includes a circuit that receives a signal. At least one passive electrical circuit element generates an electromagnetic field in response to the signal. A portion of the electromagnetic field is guided by a surface of a transmission medium to propagate as a guided electromagnetic wave longitudinally along the transmission medium. Other embodiments are disclosed. |
| US10804967B2 |
Electricity meter comprising a powerline communication interface and at least one radio-frequency interface
A system that includes a powerline communication network with a reactive routing protocol and at least one gateway comprising a powerline communication interface and one radio-frequency communication interface. A smart electricity meter also includes a powerline communication interface and at least one radio-frequency communication interface: broadcasts an announcement request message on each of its communication interfaces; after reception of one or more announcement messages, selects a relay agent having the lowest route cost for joining a centralised management device; and making a registration request, using the selected relay agent as a proxy. After registration, the routing of messages coming from or going to said smart electricity meter takes place at the data link layer of the OSI model. |
| US10804965B2 |
Circuit panel network and methods thereof
Aspects of the subject disclosure may include, for example, receiving wirelessly a first transmission of data from a network interface device, wherein the network interface device includes a receiver and a transmitter. The network interface device receives, via the receiver, electromagnetic waves that propagate on a surface of a dielectric transmission medium. The network interface device converts, via the receiver, the electromagnetic waves to an electrical signal, and transmits, via the transmitter, a first transmission of the data based on the electrical signal. A determination is made that the data is to be directed towards a recipient device connected to at least one electrical circuit and, based on the determination, a second transmission of the data is initiated as a power line communication transmission of a utility power line via the at least one electrical circuit. Other embodiments are disclosed. |
| US10804963B2 |
Wave guide with fluid passages
A wave guide assembly for a control and diagnostic system for a machine, the wave guide assembly includes a housing defining an exterior surface and an internal cavity extending between distal ends. A wave guide is defined within the internal cavity. At least one open conduit is defined within the internal cavity providing a space for routing conductors through the housing. A fluid passage is defined within the internal cavity separate from the wave guide. A control and diagnostic system for a machine and a gas turbine engine are also disclosed. |
| US10804962B2 |
Method and apparatus for communications using electromagnetic waves
Aspects of the subject disclosure may include, a device having a coupler that facilitates inducing an electromagnetic wave that propagates along a transmission medium, a transmitter that facilitates generating a signal that enables the coupler to induce the electromagnetic wave that propagates along the transmission medium, a power supply that facilitates inductively generating energy that is supplied to the transmitter, and an insulator coupled to a supporting structure that facilitates electrically insulating the transmission medium from the supporting structure. Other embodiments are disclosed. |
| US10804957B1 |
Preamble detection during acquisition
A preamble detection system and method includes converting the phase domain input samples corresponding to the preamble into frequency domain input samples. An I/Q-formatted dot product is generated from a dot product process between the frequency domain input samples and a reference pattern indicative of an expected preamble. The I/Q-formatted dot product is averaged with at least one previously generated I/Q-formatted dot product to generate an I/Q-formatted averaged dot product. The I/Q-formatted averaged dot product is converted into a polar-formatted averaged dot product, wherein the polar-formatted averaged dot product includes a magnitude of the polar-formatted averaged dot product and an angle of the polar-formatted averaged dot product. A preamble-found signal is then generated in response to the magnitude of the polar-formatted averaged dot product exceeding a preamble magnitude threshold. |
| US10804956B2 |
Bidirectional data link
A bidirectional data link includes a forward channel transmitter circuit and a forward channel receiver circuit. The forward channel transmitter circuit includes a forward channel driver circuit, and a back channel receiver circuit. The back channel receiver circuit is coupled to the forward channel driver circuit. The back channel receiver circuit includes a summation circuit and an active filter circuit. The summation circuit is coupled to the forward channel driver circuit. The active filter circuit is coupled to the summation circuit. The forward channel receiver circuit includes a forward channel receiver, and a back channel driver circuit. The back channel driver circuit is coupled to the forward channel receiver. |
| US10804953B2 |
Method of using integrated transmitter and receiver front end module
A method includes (a) switching a receiver path network of a front end module to a first matching mode in a receive mode. The method further includes (b) switching a transmitter path network of the front end module to a first resonance mode in the receive mode. The method further includes (c) switching the transmitter path network to a second matching mode in a transmit mode. The method further includes (d) switching the receiver path network to a second resonance mode in the transmit mode. |
| US10804952B2 |
Enhanced cosite transmitter-receiver isolation
Systems and methods for improving isolation between a cosite transmitter-receiver system. The transmitter may send a first plurality of transmit signals from multiple transmit ports. The first plurality of transmit signals may be related to one another by a first set of complex weights. The receiver may detect channel-impaired versions of the first plurality of transmit signals at one or more receive ports. The receiver may analyze channel-impaired versions of the first plurality of transmit signals to estimate channel state information. The transmitter may use the channel state information to determine a second set of complex weights which will reduce the power received at one or more ports of the receiver when applied to a second plurality of transmit signals. The second set of complex weights may vary with frequency. |
| US10804950B2 |
Acoustic wave device, multiplexer, and communication apparatus
A SAW device includes a piezoelectric substrate, a support substrate which is located on a lower surface of the piezoelectric substrate and has a smaller thermal expansion coefficient than that of the piezoelectric substrate, an IDT electrode located on the piezoelectric substrate, a cover forming a space above the IDT electrode, and a plurality of first strip conductors which extend alongside each other on the cover and at least a part of which overlaps the space when viewed on a plane. |
| US10804946B2 |
Low power wake-up receiver
A low-power wake-up receiver. The receiver includes a transformer/filter resonating at a pre-selected frequency to realize passive RF voltage gain. A pseudo-balun envelope detector is coupled to an output of the transformer filter. A comparator or other quantizer is coupled to an output of the active pseudo-balun envelope detector (ED) for comparing the ED output to a comparison threshold voltage. The pseudo-balun envelop detector can be an active detector. The pseudo-balun detector can also be a passive detector. |
| US10804941B2 |
Microwave switched multiplexer and a mobile telecommunications device including such a multiplexer
A microwave switched multiplexer having a bandpass At between frequencies f1 and f2, Δf=f1−f2, the multiplexer comprising n signal channels, where n>1, each signal channel having a signal bandpass at a center frequency within M, the center frequencies of the signal channels being equally spaced apart by Δf/n; each signal channel comprising (a) a switch having first, second and third ports, the switch being adapted to be switched between a transmit position in Which the first port is connected to the second port, a receive position in which the first port is connected to the third port and an off position in which the first port is not connected to either second or third ports; (b) a common line extending from an antenna end to the first port, the common; line ι comprising an input resonator and a center resonator connected together in cascade, the center resonator being coupled between the resonator and the first port. |
| US10804940B2 |
Multi-channel radio frequency module with frequency division of data reception and transmission
The multi-channel radio frequency module with frequency division of data reception and transmission contains at least two radiating elements; at least two received signal filters and at least two transmitted signal filters, each of which is tuned to pass the received and transmitted signal accordingly in a certain frequency band; at least two radio frequency receivers, each of which is connected to the received signal filter; and at least two radio frequency transmitters, each of which is connected to the transmitted signal filter. Radiating elements having two input ports; one of which is connected to the received signal filter, and the other to the transmitted signal filter, the passbands of these filters being non-overlapping. Application of the invention allows the miniaturization of the microwave PtP communication station while simultaneously providing efficient electronic beam scanning with small signal loss for beam switching and high isolation between receivers and transmitters. |
| US10804937B2 |
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 16-symbol mapping, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping. |
| US10804935B2 |
Techniques for reducing latency in the detection of uncorrectable codewords
Devices, systems, and methods that reduce the latency of detecting that a codeword is uncorrectable are disclosed and described. Such devices, systems, and methods allow the determination that a codeword is uncorrectable prior to determining error locations in the codeword, thus eliminating the need for such an error location search. |
| US10804933B2 |
QC LDPC code rate matching method and device therefor
A quasi-cyclic low density parity check (QC LDPC) code rate matching method is disclosed. According to the rate matching method in the present disclosure, the minimum lifting value can be selected from among lifting values by which a codeword longer than a target code block can be generated. A coding gain through retransmission can be acquired by generating the codeword that is longer than the target code block. In addition, by selecting a lifting value of a proper magnitude, rate matching for information bit sequences of various lengths can be performed. |
| US10804931B2 |
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 3/15 and 1024-symbol mapping, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping. |
| US10804926B2 |
Charge leakage compensation in analog-to-digital converter
Methods and systems for performing analog-to-digital conversion is provided. In one example, an analog-to-digital converter (ADC) circuit comprises a leakage compensation circuit and a quantizer. The leakage compensation circuit is configured to: receive an input signal, the input signal being susceptible to a drift due to a charge leakage; receive a reference signal; and generate a leakage-compensated signal pair to compensate for the charge leakage, wherein the leakage-compensated signal pair comprises one of: (a) a leakage-compensated version of the input signal and the reference signal, (b) the input signal and a leakage-compensated version of the reference signal, or (c) a leakage-compensated version of the input signal and a leakage-compensated version of the reference signal. The quantizer is configured to perform a leakage-compensated quantization of the input signal based on the leakage-compensated signal pair to generate a digital output representing the input signal. |
| US10804924B2 |
Systems for reducing pattern-dependent inter-symbol interference and related methods
System for reducing pattern-dependent inter-symbol interference (ISI) are described. These systems may be implemented using complementary metal-oxide-semiconductor (CMOS) transistors. These systems are designed to clamp the voltage propagating along the datapath to a value that is a fraction of the supply voltage. Furthermore, these systems are designed to reduce the time constant of the datapath. One such system comprises a source including a digital-to-analog converter (DAC) and a destination comprising an analog-to-digital converter (ADC). A circuit disposed along the data path from the DAC to the ADC is configured to receive a supply voltage, receive an input signal from the DAC, and produce an output signal based on the input signal by clamping the output signal to a voltage that is a fraction of the supply voltage. |
| US10804916B2 |
Analog-to-digital converter circuit and method for analog-to-digital conversion
In one embodiment an analog-to-digital converter circuit has an input for receiving a first analog signal level and a second analog signal level, a ramp generator adapted to provide a ramp signal, a comparison unit coupled to the input and the ramp generator, a control unit coupled to the comparison unit the control unit having a counter, the control unit being prepared to enable the counter as a function of a comparison of the ramp signal with the first analog signal level and the second analog signal level, and an output for providing an output digital value as a function of a relationship between the first analog signal level and the second analog signal level. Therein the ramp signal has at least one linearly rising and at least one linearly falling portion and an adjustable shift at a reversal point between the rising and the falling portion of the ramp signal, the shift depending on the number of rising and falling portions of the ramp signal. |
| US10804913B1 |
Clock and data recovery devices with fractional-N PLL
The present invention relates to data communication and electrical circuits. More specifically, embodiments of the present invention provide a clock and data recovery (CDR) architecture implementation for high data rate wireline communication links. In an embodiment, a CDR device includes a phase detector, a loop filter, and a fractional-N PLL. The fractional-N PLL generates output clock signal based on output of the loop filter. There are other embodiments as well. |
| US10804912B2 |
Non-integer frequency divider
A non-integer divider for dividing the frequency of a signal is disclosed. A non-integer divider includes a first divider that divides the frequency of a first signal. A mixer is coupled to receive the first signal, and a second signal having a frequency equivalent to that output by the first divider. The mixer outputs a third signal having a frequency based on respective frequencies of the first and second signal. A second divider receives and frequency divides the third signal to produce a fourth signal. A ratio of the frequency of the first signal to the fourth signal is a non-integer value. |
| US10804906B2 |
Adaptive clocking scheme
Adaptive clocking schemes for synchronized on-chip functional blocks are provided. The clocking schemes enable synchronous clocking which can be adapted according to changes in signal path propagation delay due temperature, process, and voltage variations, for example. In embodiments, the clocking schemes allow for the capacity utilization of a logic path to be increased. |
| US10804903B1 |
Asynchronous circuit stacking for simplified power management
A circuit stacking multiple asynchronous circuit components, specifically Multi-Threshold NULL Convention Logic (MTNCL) circuit components, with an overall power supply equal to the multiples of the original VDD. |
| US10804901B1 |
Signal transfer circuit and semiconductor device including the same
A signal transfer circuit for receiving a first signal to transfer the received first signal as a second signal by using an operating power source having a second voltage level, the signal transfer circuit may include: a first setting circuit; and a second setting circuit, the first signal may swing between a first voltage level and a ground level, and the second signal may swing between a third voltage level and the ground level, the first setting circuit may be configured to set the third voltage level to be same as the second voltage level, when the first voltage level is higher than the second voltage level, and the second setting circuit may be configured to set the third voltage level to be same as the first voltage level, by detecting when the first voltage level is lower than or equal to the second voltage level. |
| US10804898B2 |
Wood veneer product comprising conductive tracking
A wood veneer product (1) comprises one or more layers of wood veneer (2). A backing layer (4), for example a cellulose-based backing layer, has a first outer surface bonded to the one or more layers of wod veneer (2). Electrically conductive tracking (8) is arranged on or against a second outer surface of the backing layer (4) opposite to the first outer surface. |
| US10804897B2 |
Touch-sensitive keypad control device
A touch-sensitive keypad control device for use with a controlled device is provided. The touch-sensitive keypad control device includes: a housing, a touch control device disposed in the housing, and a keypad device uncovered from the housing and disposed above the touch control device. The touch control device generates a first command for controlling the controlled device in response to a gesture of a user relative to the keypad device, and the keypad device generates a second command for controlling the controlled device in response to a level change of the keypad device relative to the housing in response to a pressing operation of a user. |
| US10804894B1 |
Semiconductor device
According to one embodiment, a semiconductor device includes an output reset circuit. The output reset circuit including: a first circuit configured to monitor a power-supply voltage and generate a reset signal; a logic circuit configured to control a logic level of an output signal in accordance with the reset signal; a second circuit configured to generate a current in accordance with the power-supply voltage and the reset signal; a third circuit configured to generate a control signal in accordance with the current and the reset signal; and a fourth circuit configured to control the output signal in accordance with the control signal. |
| US10804889B2 |
Double compression avoidance
The disclosure relates to a skew control circuit for controlling the skew between at least three clock signals, the clock signals being forwarded to different clock domains associated with the respective clock signals. The skew control circuit comprises multiple programmable delay elements arranged within a signal flow before the respective clock domain, a skew detector arrangement operable for detecting skews between at least two pairs of the clock signals, and a control circuit operable for adjusting delays caused by the programmable delay elements. The control circuit is operable for carrying out a de-skewing operation. The de-skewing operation comprises determining an order of occurrence of edges of the signals, selecting one of the programmable delay elements based on the determined order, and adjusting the delay caused by the selected programmable delay element. |
| US10804886B2 |
High voltage pre-pulsing
Some embodiments of the invention include a pre-pulse switching system. The pre-pulsing switching system may include: a power source configured to provide a voltage greater than 100 V; a pre-pulse switch coupled with the power source and configured to provide a pre-pulse having a pulse width of Tpp; and a main switch coupled with the power source and configured to provide a main pulse such that an output pulse comprises a single pulse with negligible ringing. The pre-pulse may be provided to a load by closing the pre-pulse switch while the main switch is open. The main pulse may be provided to the load by closing the main switch after a delay Tdelay after the pre-pulse switch has been opened. |
| US10804880B2 |
Device structures with acoustic wave transducers and connection posts
A device structure comprises an acoustic wave transducer comprising a component. The component comprises a piezo-electric material. Component electrodes are disposed on the component and connection posts extend away from the component. Each of the connection posts is electrically connected to one of the component electrodes. The component has a center and a length greater than a width and, for at least one pair of the connection posts, a distance between the connection posts and the center is less than one quarter of the length. |
| US10804877B2 |
Film bulk acoustic wave resonator (FBAR) having stress-relief
An acoustic resonator structure comprises: a substrate comprising a cavity having a plurality of sides; a first electrode disposed over the cavity; a first connection portion that connects to the first electrode over only one side of the plurality of sides of the cavity; a piezoelectric layer disposed over at least a portion of the first electrode; a second electrode disposed over the piezoelectric layer; and a second connection portion that connects to the second electrode over only the one side of the plurality of sides. The second connection portion does not overlap the first connection portion, and a contacting overlap of the first electrode, the piezoelectric layer and the second electrode provides an active area of the acoustic resonator. |
| US10804872B1 |
Liquid cooled high power impedance tuner
High power impedance tuners suffer from intense heating of the center conductor of the tuner airline (slabline), due to dissipated RF and DC power and, in addition of high electric field between the metallic tuning probe (slug) and the center conductor, also from associated thermal expansion causing bending of the center conductor and electrical short. If the thermal expansion cannot be accommodated by structural means, the center conductor is cooled using re-circulating low loss dielectric liquid (Mineral Oil), which fills the slabline and dissipates the heat. The cooling dielectric liquid is guided through an external refrigerator and recycled back into the slabline. |
| US10804870B2 |
Magnetoresistance effect device and high frequency device
Provided is a magnetoresistance effect device that functions as a high frequency device such as a high frequency filter or the like. The magnetoresistance effect device includes a magnetoresistance effect element having a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer sandwiched between the first ferromagnetic layer and the second ferromagnetic layer, a first signal line configured to generate a high frequency magnetic field as a high frequency current flows, a direct current application terminal to which a power supply is able to be connected to cause a direct current to flow to the magnetoresistance effect element in a lamination direction, and an independent magnetic body configured to receive a high frequency magnetic field generated in the first signal line to oscillate magnetization and apply a magnetic field generated through the magnetization to the magnetoresistance effect element. |
| US10804869B2 |
Apparatus and method for adjusting an acoustic signal
A mobile communication apparatus, an accessory device, and a method for adjusting one physical property of an acoustic signal, wherein the apparatus includes a ringtone generator adapted to generate the acoustic signal, an ultrasound receiver apt to receive an ultrasonic signal, and a processor configured for detecting at least a physical parameter and/or a content of the ultrasonic signal, determining, on the basis of the at least one physical parameter and/or content of the ultrasonic signal, attenuation information that can quantify the attenuation suffered by the ultrasonic signal and/or the acoustic signal, determining, on the basis of the attenuation information, the physical property of the acoustic signal to be generated, and generating the acoustic signal having the determined property, so that the probability to hear the acoustic signal increases. |
| US10804868B2 |
Method of operating Digital-to-Analog processing chains, corresponding device, apparatus and computer program product
A signal processing chain, such as an audio chain, produces an analog output signal from a digital input signal. The signal processing chain is operated by generating a first flag signal for the analog output signal and one or more second flag signals for the digital input signal. Each flag signal assumes a first level or a second level and is set to the first level when a signal from which the flag is generated has a value within an amplitude window. An amount the first flag signal for the analog output signal and the second flag signal for the digital input signal match each other may be calculated for issuing an alert flag which indicates an impaired operation of the signal processing chain. |
| US10804867B2 |
Quadrature amplifier having envelope control
Quadrature amplifier having envelope control. In some embodiments, an amplifier system can include a quadrature amplifier having first and second amplifiers configured to amplify first and second signals in quadrature relative to each other, with each of the first and second amplifiers including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the quadrature amplifier and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers. |
| US10804866B2 |
Doherty amplifier having envelope control
Doherty amplifier having envelope control. In some embodiments, an amplifier system can include a Doherty amplifier having a carrier amplifier and a peaking amplifier, with each of the carrier amplifier and the peaking amplifier including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the Doherty amplifier and configured to provide a bias signal to the output transistor of the cascode stage of the peaking amplifier. |
| US10804864B2 |
Digital wireless transmitter with merged cell switching and linearization techniques
A vector distribution method for operation of a power amplifier of a wireless transmitter including receiving, by a first amplifier circuit, a first input vector and a second input vector. The first input vector includes data derived from an input signal of the wireless transmitter and the second input vector includes other data derived from the input signal of the wireless transmitter. The method includes, in response to receiving the input signal, instructing the first amplifier circuit to output an output signal at a high voltage. |
| US10804863B2 |
System and method for amplifying and combining radiofrequency power
System includes first and second amplifying circuits that are configured to receive input signals having a fundamental frequency. The system also includes first and second transmission lines that are configured to receive voltage and current waveforms from the first and second amplifying circuits, respectively. The system also includes a capacitively-compensated transmission line resonator (CC-TLR) that is configured to be electrically connected to a load having a load impedance. The CC-TLR is configured to receive and combine RF power from the first and second transmission lines. The CC-TLR has a compensation capacitance that causes the CC-TLR to present an open circuit at the fundamental frequency and present a short circuit at harmonic frequencies. Optionally, a characteristic impedance (Z0) of the first and second transmission lines and a load impedance (ZL) are unequal, and the first and second transmission lines cause a load impedance transformation. |
| US10804862B2 |
High frequency signal amplifier including balun
High frequency signal amplifier including balun is disclosed. The amplifier comprises an input terminal (Vin) through which the high frequency signal is input; a balun which is connected to the input terminal and outputs a first differential signal and a second differential signal based on the high frequency signal; a transistor (M) which is connected to the balun and outputs an amplified high frequency signal based on the first differential signal and the second differential signal; an output terminal which is connected to the transistor (M) and through which the amplified high frequency signal is acquired and the amplified high frequency signal is output. Therefore, performance of the amplifier can be enhanced. |
| US10804859B2 |
Transimpedance amplifiers with feedforward current
Transimpedance amplifiers with feedforward current are provided herein. In certain embodiments, an amplifier system includes a transimpedance amplifier that amplifies an input current received at an input to generate an output voltage at an output. The amplifier system further includes a controllable current source that is coupled to the output of the transimpedance amplifier, and operable to provide a feedforward current that changes in relation to the input current of the transimpedance amplifier. By providing a feedforward current in this manner, gain and speed performance of the transimpedance amplifier is enhanced. |
| US10804858B2 |
Power amplifier bias network implementation for improving linearity for wideband modulated signals
An apparatus comprises an amplifier circuit and a bias circuit. The bias circuit is generally configured to dynamically adjust a bias voltage reference at a bias node connected to one or more input transistors of the amplifier circuit to maintain a low baseband impedance. |
| US10804853B2 |
Microwave transmitter with improved information throughput
An RF amplifier module comprises a package having a package base, at least one RF amplifier chip attached to the package base, and an RF power combiner chip attached to the package base. The RF amplifier chip comprises a substrate and at least one transistor disposed on an epilayer overlying the substrate. The substrate comprises a first layer of synthetic diamond characterized by an average value of thermal conductivity.An RF amplifier module comprises a package having a package base, at least one RF amplifier chip attached to the package base, and an RF power combiner chip attached to the package base. The RF amplifier chip comprises a substrate and at least one transistor disposed on an epilayer overlying the substrate. A first layer of synthetic diamond is at least partially disposed on top of the electronic device. |
| US10804852B2 |
High-voltage output amplifier
To provide a high-voltage output amplifier having a wide bandwidth which can efficiently reduce power consumption and allows employment of relatively low withstand voltage Nch MOS FETs without imbalanced voltage distribution between a Nch MOS FET Q101 and a Nch MOS FET Q102 and imbalanced distribution between a Nch MOS FET Q201 and a Nch MOS FET Q202. A high-voltage amplifier of a positive-side output stage circuit comprises a Nch MOS FET Q101 and a Nch MOS FET Q102, while a high-voltage amplifier of a negative-side output stage circuit comprises a Nch MOS FET Q201 and a Nch MOS FET Q 202. The source of the Nch MOS FET Q101 is connected to the drain of the Nch MOS FET Q102, the source of the Nch MOS FET Q201 is connected to the drain of the Nch MOS FET Q202. Current controls at the source of the Nch MOS FET Q102 and the source of the Nch MOS FET Q202 are conducted respectively. The current control at the source of the Nch MOS FET Q202 is conducted by a negative-side photo coupler. The gate of the Nch MOS FET Q101 and the gate of the Nch MOS FET Q201 are connected via a condenser C151. |
| US10804851B2 |
Systems and methods for a current sense amplifier comprising a sample and hold circuit
Described herein are systems and methods that reduce settling time in amplifier circuits, such as voltage sense amplifiers (VSA) or current sense amplifiers (CSA) circuits, that comprise a feedback path. When the feedback path is interrupted via a switch, a CSA circuit switches to open loop. A sample-and-hold circuit holds the output voltage of the amplifier, such that when a load is connected to the CSA circuit, the open loop settling time, which is shorter than the closed loop settling time, is allowed to pass before the CSA output voltage is measured, thereby, advantageously preventing any potential disturbance present at the CSA output from being fed back to the CSA input. |
| US10804850B2 |
Gas sensor using mm wave cavity
Systems and methods for forming a compact gas sensor include using a lithographically fabricated high Q resonator coupled to at least one of a Gunn diode and an IMPATT diode. The resonator may include a plurality of cavities filled with a sample gas. A detector coupled to the resonator may measure the amplitude of the emitted mm wave radiation. |
| US10804849B2 |
Self-biased amplifier for use with a low-power crystal oscillator
A self-biased amplifier includes a capacitor, a bias generation circuit and a common source amplifier. The capacitor is used to receive an input voltage and output an alternating component of the input voltage. The bias generation circuit is coupled to the capacitor, and used to generate a first bias voltage according to the alternating component. The common source amplifier is coupled to the bias generation circuit, and used to generate an amplified voltage according to the first bias voltage. |
| US10804846B2 |
Coupled-inductor based resonator and formed voltage controlled oscillator thereof
Various embodiments of the invention relate to a Multi-Band Voltage Controlled Oscillator (VCO). The multi-band VCO features a coupled-inductor based resonator. The resonator comprises a primary path and a secondary path inductively coupled to the primary path. The primary path comprises multiple LC tuning stages coupled in series with each stage having an adjustable capacitor and a primary inductor inductively coupled to the secondary path. The secondary path comprises multiple secondary inductors inductively coupled to respective primary inductors in the primary path. Furthermore, the secondary path comprises a plurality of controllable switches which are controlled to switch ON or OFF simultaneously to engage/disengage the inductive coupling between the primary path and the secondary path. Incorporating multiple LC tuning stages lowers voltage swing across each tuning stages, thus minimizing phase noise caused by nonlinearity in the resonator. |
| US10804845B2 |
Apparatus for communication across a capacitively coupled channel
For communication across a capacitively coupled channel, an example circuit includes a first plate substantially parallel to a substrate, forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier. |
| US10804841B2 |
Solar thermal energy collector
A solar thermal energy collection module formed by a sandwich of metal plates. The metal plates collect solar radiant energy and convert that to thermal energy in a heat transfer fluid that flows through conduits and manifolds formed between the plates. The collector module may be directly integrated into the exterior of building structures in an array. The collector module also may be glazed or integrated with photovoltaic solar panels. |
| US10804840B2 |
Electrical connection device for a photovoltaic system
The present invention provides an electrical connection box for a panel of exterior cladding of a building equipped with at least one photovoltaic module including an electrical pole at one of its longitudinal extremities and an electrical pole of inverse polarity at the other extremity, the connection box including a first shell and a second shell which are interlockable, the first shell including a base including an aperture topped by a sealing chamber, a lateral wall surrounding the base and extending perpendicularly to it, the lateral wall including a removable hatch used as a wire passage, an electrical terminal attached perpendicularly to the base, the second shell including a base, a lateral wall surrounding the base and extending perpendicularly to it, the lateral wall including a wire passage, an electrical terminal of inverse polarity to that of the electrical terminal of the first shell, the electrical terminal being on a perpendicular axis to the base, attached to the base and positioned in such a way that it is plumb with the electrical terminal of the first shell when the first and the second shell are interlocked.The invention further provides a panel of exterior cladding of a building equipped with connection boxes according to the present invention, to the related roof, to the related connection kit and to the related electrical device. |
| US10804839B1 |
Solar panel deployment method
The present invention typically features integrative configurability for transportation/storage, and disintegrative configurability for operation. Two half-cases are coupled to obtain a case. A case is uncoupled to obtain two half-cases. Each half-case houses a solar panel (pivotably connected to the half-case) and a U-bar (pivotably connected to the solar panel). The solar panel is pivoted away from the half-case's interior to the angle-of-inclination desired for collecting solar energy. The U-bar is pivoted away from the solar panel's back to securely fit into one of plural parallel slots provided across the half-case's interior, the U-bar thereby holding the solar panel in place at the desired angle-of-inclination. The half-cases are laid flat individually to collect solar energy. A half-case is “compacted” by pivoting the U-bar proximate the solar panel's back and pivoting the solar panel proximate the half-case's interior. Two complementary half-cases, each compacted, are (re)attached to form a portable case. |
| US10804838B2 |
Method for harvesting solar energy
A photovoltaic system includes a photovoltaic cell including a sun tracker, a top surface configured to generate electrical energy from the incident sunlight, and a bottom surface configured to thermally dispel heat generated by the photovoltaic cell; at least one mirror including a reflective surface; a plurality of actuators securing the at least one mirror the photovoltaic cell; at least one actuator pump connected to the plurality of actuators and configured to extend or retract the plurality of actuators and adjust the distance of the at least one mirror from the top surface; a heat exchanger thermally coupled to the bottom surface of the photovoltaic cell; and a fluid pump connected to the heat exchanger and configured to circulate the fluid through the heat exchanger. |
| US10804836B2 |
Parallel use of soft starters
A system for controlling an AC motor is provided. The system comprises an electrical connection path for connecting an electrical input of the AC motor to a first phase of alternating current from an electric power supply. The system also comprises two or more motor controllers, each motor controller is located on the electrical connection path between the electric power supply and the AC motor and is operable to regulate current of the first phase passing through it. Each motor controller is connected in parallel, relative to the other motor controllers, to the electrical connection path. At least one processor is configured to control the motor controllers to repeatedly change which of the motor controllers current of the first phase passes through, such that at any given time current of the first phase only passes through one of the motor controllers. A corresponding method is also provided. |
| US10804835B2 |
Inverter device, air conditioner, and ground connection method of inverter device
A controller controls a first inverter drive circuit and a second inverter drive circuit. The first inverter drive circuit drives a load having a load current larger than the second inverter drive circuit. The first inverter drive circuit includes a control ground terminal and a drive ground terminal which are isolated from each other. The ground terminal of the second inverter drive circuit is connected to the ground of the controller. The control ground terminal of the first inverter drive circuit is connected to the ground of the controller. The drive ground terminal of the first inverter drive circuit is connected to the negative side of the first inverter circuit. |
| US10804831B2 |
Control apparatus for alternating-current rotary electric machine
In a magnetic flux variation estimator of a control apparatus, a command voltage corrector corrects d- and q-axis command voltages to reduce a deviation between each of the d- and q-axis command voltages and a corresponding actual voltage to be applied to a rotary electric machine, thus outputting a corrected d-axis command voltage and a corrected q-axis command voltage. A standard voltage calculator calculates, based on an electrical angular velocity of the rotary electric machine and a current flowing in the rotary electric machine, a d-axis standard voltage and a q-axis standard voltage to be applied to the rotary electric machine while the rotary electric machine is in a predetermined standard state. An estimator estimates a magnetic flux variation as a function of the corrected d-axis command voltage, the corrected q-axis command voltage, and the q-axis standard voltage. |
| US10804825B2 |
Automatic advance angle control system and method for brushless linear direct current motor
Provided are an automatic advance angle control system and method for a brushless linear direct current (BLDC) motor. The automatic advance angle control system for the BLDC motor includes a current controller configured to generate an anti-windup output for compensating for accumulated errors of an output voltage provided to the BLDC motor; a voltage headroom calculator configured to generate a voltage headroom from a counter-electromotive force and the output voltage provided to the BLDC motor; and an advance angle controller configured to generate an advance angle for controlling a phase of a phase current of the BLDC motor by performing proportional integration on a difference between the anti-windup output and the voltage headroom when the anti-windup output is generated and configured to ignore the generation of the advance angle when the anti-windup output is not generated. |
| US10804824B2 |
Method and circuit arrangement for determining the position of a rotor in an electric motor
A circuit, comprising a plurality of phase windings in an electric motor, an inverter configured to excite the phase windings by a sequence of voltage pulses including a plurality of successive voltage pulses that a current can be set in each of the phase windings, wherein the voltage pulses are selected in such a manner that a positive and a negative current are produced in all the phase windings during the voltage pulses, a current sensor for measuring a peak value for the current being set during a duration of each voltage pulse in each phase winding, and an evaluation circuit connected to the current sensor, wherein the evaluation circuit is configured to determine the voltage pulse in the voltage pulse sequence during a duration of which peak current value having a greatest magnitude was measured. |
| US10804823B2 |
Motor and washing machine having the same
Provided is a washing machine including: a stator including a coil; a rotor including a plurality of variable magnets each having a magnetic force variable, and rotatable with respect to the stator; a controller configured to control an energizing of the coil to increase or decrease a magnetic force of the variable magnet; and a plurality of position sensors each having a output voltage changed according to a magnetic flux of the variable magnet. |
| US10804815B1 |
DC/AC inverter system supplied by integrated power networks to increase output power with robust auto stop control
A vehicle operates an internal combustion engine according to an automatic start-stop function to reduce fuel consumption. A first DC bus is adapted to connect to a plurality of DC loads. A primary battery is coupled between the first DC bus and a ground. A first alternator is driven by the internal combustion engine to supply electrical power to the first DC bus. A second DC bus is connected to a positive terminal of an auxiliary battery. A negative terminal of the auxiliary battery is connected to the first DC bus. A second alternator is driven by the internal combustion engine to supply electrical power to the second bus at a voltage corresponding to a sum of voltages of the primary and auxiliary batteries. An inverter receives electrical power from the second DC bus to generate an AC output adapted to connect to accessory AC loads. |
| US10804812B1 |
Three phase AC/DC power converter with interleaved LLC converters
An AC/DC power converter includes an input port configured to receive an AC power signal, a first transformer coupled to the input port, the first transformer comprising first and second primary windings and at least a first secondary winding, and a second transformer coupled to the input port, the second transformer comprising third and fourth primary windings and at least a second secondary winding. The first primary winding of the first transformer is coupled in series with the third primary winding of the second transformer, the second primary winding of the first transformer is coupled in series with the fourth primary winding of the second transformer, and the first secondary winding and the second secondary winding are coupled in parallel. |
| US10804811B2 |
Control device for direct power converter for reduction of harmonic distortion
A duty calculating unit receives a phase, an amplitude, a command value of a voltage across a capacitor, and a command value of a DC voltage, and calculates an original discharge duty and an original rectification duty. A duty correcting unit corrects the original discharge duty and the original rectification duty to obtain a discharge duty and a rectification duty. The duty calculating unit and the duty correcting unit can collectively be regarded as a duty generating unit that generates the discharge duty and the rectification duty. |
| US10804807B2 |
Low RMS current zero voltage switching assisting circuit with low power loss and EMI
An apparatus for zero voltage switching includes a ZVS assist circuit connected between a switching node and a negative connection of a converter. The switching node is located between first and second switches of a switching leg of the converter. The converter is fed by a constant current source and feeds a constant current load. The ZVS assist circuit includes a ZVS inductance, a first ZVS switch that allows current through the ZVS inductance to change a voltage of the switching node to a condition for zero voltage switching of the first switch of the switching leg, and a second ZVS switch that allows current through the ZVS inductance to change the voltage of the switching node to a condition for zero voltage switching of the second switch of the switching leg. Current through the first ZVS switch is opposite current through the second ZVS switch. |
| US10804806B1 |
Method and system of a switching power converter
A switching power converter. Example methods include: switching a primary switch of the converter at a switching frequency, the converter having a feedback circuit acting as a low pass filter with a cutoff frequency, and each cycle of the switching frequency including a discharge mode and a charge mode that ends at a peak current through a primary winding of a transformer; generating, during the switching, a jitter signal having a shape and a jitter frequency; and ending a plurality of consecutive charge modes at a plurality of respective peak current values of current through the primary winding, the plurality of peak current values define an average value, and where peak current values higher than the average value define an envelope in the shape of the jitter signal, and peak current values lower than the average value define an envelope in the shape of the jitter signal that is inverted. |
| US10804805B1 |
Quasi-resonant auto-tuning controller
A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period. |
| US10804804B1 |
Power supply including a nonlinear transmission line that receives a single input pulse and outputs a plurality of pulses
Technologies pertaining to a power supply that includes a nonlinear transmission line are described herein. In an embodiment, a DC power supply comprises a pulsing circuit that receives a DC input and outputs a first plurality of pulses having a first frequency to a nonlinear transmission line. The nonlinear transmission line receives the first plurality of pulses and outputs a second plurality of pulses having a second frequency that is greater than the first frequency. The second plurality of pulses is then received at an amplifier/rectifier circuit that amplifies the second pulses to increase a voltage amplitude of the pulses, and rectifies the pulses to provide a substantially constant DC output. |
| US10804803B1 |
Combined buck-boost converter using a single inductor
A DC-DC converter that provides both buck and boost voltages using a single inductor is disclosed. The DC-DC converter includes an H-bridge circuit having an inductor having first and second terminals, and a number of switches. The switches include a first switch coupled between the second inductor terminal and a boost voltage node, a second switch coupled between the second inductor terminal and a buck voltage node, and a third switch coupled between the first inductor terminal and an input voltage node. A control circuit is coupled to activate the switches in accordance with a number of different phases such that a buck voltage (e.g., less than the input voltage) is provided on the buck voltage node, while a boost voltage (e.g., greater than the input voltage) is provided on the boost voltage node. |
| US10804801B2 |
Hysteretic current mode buck-boost control architecture having sequential switching states
A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal. |
| US10804800B2 |
Power supplying apparatus, power supplying control apparatus, and power supplying control method
To provide a power supplying control apparatus, a power supplying apparatus, and a power supplying control method which control power supply appropriately. A power supplying apparatus according to the present embodiment is equipped with a plurality of ports corresponding to a USB (Universal Serial Bus) PD (Power Delivery) standard, a plurality of electric power supplying circuits which are provided corresponding to the ports and supply power to power receiving devices coupled to the ports, and a controller which holds a table of power profiles to which power receiving capabilities for each power receiving device are set, and controls the electric power supplying circuits, based on the table in such a manner that total supply power supplied from the electric power supplying circuits does not exceed a prescribed value. |
| US10804799B2 |
Floating charge pump
A system may include first and second node, switch, driver, capacitor, and second driver. The first node may be at first voltage. The second node may be at second voltage. The switch may be coupled to the second node and output of the second driver and configured to receive input at third voltage and voltage at fourth voltage and to provide the input to the second node when the fourth voltage is greater than the third voltage. The driver may be coupled to the first and second nodes and configured to receive driver input and to generate intermediate voltage based on the driver input. The capacitor may be coupled to the driver to shift the intermediate voltage. The second driver may be coupled to the second node and the driver and configured to receive second driver input and the shifted intermediate voltage to generate the voltage at the fourth voltage. |
| US10804798B1 |
Switched-capacitor converter with multi-tapped autotransformer
A power supply system comprises: a switched-capacitor converter, a multi-tapped autotransformer, and an output stage. The multi-tapped autotransformer includes multiple primary windings. The switched-capacitor converter includes multiple circuit paths coupled to the primary windings. For example, a first circuit path includes a first capacitor; a second circuit path includes a second capacitor. The power supply further includes a controller that controllably switches an input voltage to the first circuit path and the second circuit path, conveying energy to the primary windings of the multi-tapped autotransformer. The output stage of the power supply is coupled to receive energy from a combination of the first primary winding and the second primary winding of the multi-tapped autotransformer. Via the received energy, the output stage produces an output voltage that powers a load. |
| US10804797B1 |
High-speed linear charge pump circuits for clock data recovery
The present invention is directed to electrical circuits. According to an embodiment, the present invention provides a charge pump circuit with a bias section and a switch section. The switch section includes a first switch coupled to an early signal and a second switch coupled to a late signal. The charge pump additionally includes a low-pass filter. The switch section includes a first resistor and a second resistor. The first resistor is directly coupled to the first switch and the low-pass filter. The second resistor is directly coupled to the second switch and the first resistor. There are other embodiments as well. |
| US10804795B2 |
Method for synchronizing power charge-pump with system clock
The proposed Power Management Integrated Circuit (PMIC) features the option to synchronize the charge-pump of a PMIC with the system clock, and then to swap and self-oscillate and skip pulses, when the digital controls of the PMIC send a first order to the charge-pump. The clock control circuitry of the PMIC also features the option for the charge-pump to then swap and use the system clock again, when the digital controls of the PMIC send a second order to the charge-pump. The designed transition of the clock from clock sync-mode to self-oscillate, and from self-oscillate back to clock sync-mode, does not present any phase discontinuity. |
| US10804792B2 |
Control device of rotary electric machine
A control device of a rotary electric machine capable of preventing occurrence of electrical resonance when a conversion operation abnormality of a DC voltage converter occurs is provided. In a case that the DC voltage converter stops a conversion operation and the conversion operation abnormality that input/output voltages become equal occurs, when a vehicle speed proportional to an electric motor rotation number exceeds a torque limit start vehicle speed, i.e., when the electric motor rotation number exceeds a torque limit start rotation number, a torque limit control for limiting an output torque of the electric motor is executed. The torque limit start vehicle speed is set to a vehicle speed corresponding to a lower limit frequency of a predetermined frequency range where there is a high likelihood of an electrical resonance occurring in the DC voltage converter when the conversion operation abnormality occurs. |
| US10804791B2 |
Driver circuit, circuit arrangement comprising a driver circuit, and inverter comprising a circuit arrangement
The disclosure discloses a driver circuit that is intended for a power semiconductor switch having a unidirectional flow direction and having a control connection, a reference potential connection and a controlled connection. The driver circuit includes a driver module having a control output, a reference potential input and an overvoltage monitoring input. In this case, the control output is connected to a first connection that is provided for connection to the control connection, the reference potential input is connected to a second connection that is provided for connection to the reference potential connection, and the overvoltage monitoring input is connected, via a first diode, to a third connection that is provided for connection to the controlled connection. The overvoltage monitoring input is also connected to the reference potential input via a capacitance. A connection path from the second connection to the third connection via the capacitance and the first diode is switchable in the driver circuit by means of an actively controllable switching element. Furthermore, the disclosure also discloses a circuit arrangement comprising such a driver circuit and a power semiconductor switch with a unidirectional flow direction as well as a bidirectional circuit arrangement comprising two subcircuit arrangements that are each formed by such a circuit arrangement. Such a bidirectional circuit arrangement is used in an inverter having a BSNPC bridge circuit. |
| US10804790B2 |
Determining a target value for a signal indicating a current or a voltage through primary-side switch based on another signal indicating a current or a voltage through an auxiliary winding on a primary side of transformer
In some examples, a controller is configured to control a primary-side switch in a power converter circuit, and the controller includes a first node configured to receive a first signal indicating a current or a voltage through a primary side of a transformer of the power converter circuit. The controller also includes a second node configured to receive a second signal indicating a current or a voltage through a primary-side switch of the power converter circuit. The controller further includes processing circuitry configured to determine a target value for the second signal based on the first signal and generate the control signal for the primary-side switch based on the target value for the second signal. |
| US10804780B2 |
Hollow single-phase induction motor
A hollow low-current single-phase induction motor capable of starting under its own power may have a stator and a rotor. The stator may comprise a case and a winding. The case may have a base, an annular outer circumferential wall, an annular inner circumferential wall, a plurality of first extensions formed at the outer circumferential wall, and a plurality of second extensions formed at the inner circumferential wall so as to respectively face the first extensions. The rotor may have a flange, a plurality of coil supports formed along the outside circumference of the flange, and a plurality of annular rotor coils which are attached to the respective coil supports. The coil supports may be inserted between the first extensions and the second extensions such that at least one thereamong is misaligned in the circumferential direction relative to the first extensions and the second extensions. |
| US10804779B2 |
Multi-rotor permanent magnet synchronous motor
The present invention provides a multi-rotor permanent magnet synchronous motor, wherein the motor (100) includes a motor shaft (3) and the main mechanism (1) and the auxiliary mechanism (4) sleeved on the motor shaft (3) in turn which work in parallel; the auxiliary mechanism (4) includes a one-way bearing body (41) sleeved on the motor shaft (3) and auxiliary rotor components (40) sleeved on the one-way bearing body (41). The multi-rotor permanent magnet synchronous motor in the present invention does not need a gear box to drive, and the energy consumption is low. Besides, through the coordinative work of the main structure and the auxiliary mechanism, different torques can be output, so as to output different speeds. |
| US10804777B2 |
Stator manufacturing method and device therefor
The present invention pertains to a stator manufacturing method and a device therefor. All of segments are twisted in order to obtain a stator, the linear sections of the segments being inserted into slots in a stator core. The segments on the inner peripheral side are subsequently twisted after the segments on the outer peripheral side are untwisted. In order to achieve this, e.g., a fourth spindle that is positioned on the outermost peripheral side and is one of the first through fourth spindles for twisting the segments is disconnected from a fourth motor and brought to a non-rotatable state. The following is then performed in sequence: the third spindle is disconnected from a third motor and twisted, and the second spindle is disconnected from the second motor and twisted. |
| US10804774B1 |
Method of obtaining power from brushed DC motors
This disclosure describes a DC motor system that is capable of extracting electrical power to do useful work while the DC motor is in operation. The present invention relates to a DC motor configured to have a plurality of brushes which enables two of the plurality of brushes to serve as input power brushes and at least one of the plurality of brushes to serve as power extraction brush to extract electrical power from the DC motor. The extraction of electrical power is achieved by using a power extraction circuit which switches the extracted power between two different energy storage devices. The energy storage device includes and not limited to capacitors and batteries. |
| US10804768B2 |
Wind turbine having releasable vanes
A wind turbine is disclosed. The wind turbine includes a shaft rotatable about an axis, a plurality of hubs fixedly attached to the shaft, and a plurality of vanes. The vanes are releasably engaged with each of the plurality of hubs. The vanes disengage from the hubs once the shaft rotates about the axis at a cut-out speed of the wind turbine. In another embodiment, the vanes are releasably engaged with the shaft. |
| US10804767B2 |
Flywheel kinetic accumulator
A flywheel kinetic accumulator provides an accumulator assembly, in which a flywheel that is mounted on roll bearings rotates about a rotation axis; the flywheel is axially supported by two sets of magnetic elements (16, 16′) facing each other, arranged in two parallel planes, along two circular paths having the same diameter; one set is connected to the accumulator assembly, and the other to the flywheel; the magnetic elements (16, 16′) of the two sets are arranged in rotation, such that when a magnetic element (16) of the one set is aligned with a respective magnetic element (16′) of the other set along an axis that is parallel to the rotation axis, all other magnetic elements (16, 16′) are offset with respect to one another in order to reduce/eliminate the magnetic forces acting in the direction opposite to the rotation direction (V). |
| US10804766B1 |
Hybrid/electric vehicle transmission
A vehicle transmission includes a housing, an electric machine stator, a support plate, and a plurality of fasteners. The housing has an internal rear wall and a side wall that define a cavity. The electric machine stator is disposed within the cavity. The support plate is disposed within the cavity. The support plate engages the internal side wall such that a press-fit engagement is formed between the support plate and the internal side wall. The electric machine is disposed between the support plate and the internal rear wall. The plurality of fasteners extends through the support plate, through the stator, and engages the rear internal wall to secure the stator to the housing. |
| US10804763B2 |
Coreless coil and method for manufacturing coreless coil
The present invention is a coreless coil characterized in that a plurality of α-winding coils are formed by a first coil layer and a second coil layer that has a same shape and a same width as the first coil, each coil layer having a center opening, being laminated together. Each outer peripheral portion in a connection direction of the plurality of α-winding coils has a connection stepped portion that is point-symmetric in relation to a center axis line of a Z-axis (the Z-axis being an axis that, in relation to an X-axis that is a center of both connected end portions of the α-winding coil and passes through a lamination boundary line of the first coil layer and the second coil layer, is a center of both unconnected end portions of the α-winding coil and passes through the lamination boundary surface such as to be orthogonal to the X-axis) of the respective center opening. The plurality of α-winding coils are connected in an annular shape in a state in which the connection stepped portions overlap each other and are attached to each other. An object of the present invention is to improve the bonding force of the plurality of α-winding coils. |
| US10804753B2 |
Permanent magnet type rotating electric machine and manufacturing method of the same
A rotor core (21) in a permanent magnet type rotating electric machine (1) is formed by laminating a plurality of plate materials (21A), (21B), (21C), and (21D) and includes one or a plurality of center bridges (26) formed between adjacent magnet slots (23) to couple an outer peripheral edge (24) and a core portion (25) together in one magnetic pole. Non-magnetic portions (30) are formed at a part or all of the one or the plurality of respective center bridges (26). Insulation films (32) are disposed on surfaces of parts other than regions where the non-magnetic portions (30) are formed on the plurality of respective plate materials (21A), (21B), (21C), and (21D) forming the rotor core (21). |
| US10804751B2 |
Controlling inductive power transfer systems
An inductive power transfer system comprises a primary unit operable to generate an electromagnetic field and at least one secondary device, separable from the primary unit, and adapted to couple with the field when the secondary device is in proximity to the primary unit so that power can be received inductively by the secondary device from the primary unit without direct electrical conductive contacts therebetween. The system detects if there is a substantial difference between, on the one hand, a power drawn from the primary unit and, on the other hand, a power required by the secondary device or, if there is more than one secondary device, a combined power required by the secondary devices. Following such detection, the system restricts or stops the inductive power supply from the primary unit. Such a system can detect the presence of unwanted parasitic loads in the vicinity of the primary unit reliably. |
| US10804744B2 |
Resonant power transfer systems having efficiency optimization based on receiver impedance
The present disclosure provides systems and methods for controlling wireless power transfer systems. A wireless power transfer system includes a transmitter driven by a power source and a transmit controller, wherein the transmitter is configured to control delivery of wireless power, and a receiver inductively coupled to the transmitter, the receiver configured to receive the wireless power from the transmitter and deliver the received wireless power to a load. The receiver includes receiver electronics configured to determine a Thevenin equivalent impedance of the wireless power transfer system, determine a Thevenin equivalent source voltage of the wireless power transfer system, and control, based on the determined Thevenin equivalent impedance and the determined Thevenin equivalent source voltage, an ideal source voltage of the receiver to vary the amount of the wireless power transferred from the transmitter to the receiver. |
| US10804742B2 |
Voltage regulation in wireless power receivers
A wireless power receiver includes one or more tunable capacitors in parallel with an inductor. The wireless power receiver adapted to receive an induced voltage input at the inductor due to a magnetic field generated by a wireless power transmitter. The rectifier has an output with a rectified voltage and a rectified current. A controller has a first input for receiving a signal representative of the rectified voltage and a first output for supplying an adjustment signal to the tunable capacitor. The controller includes a processor coupled to the first input and is configured to operate on the signal representative of rectified voltage to produce a desired capacitance value for capacitor and provide the adjustment signal determined so as to adjust a capacitance value of capacitor to the desired capacitance value. |
| US10804739B2 |
Wireless power stations
A power station includes a connection box with at least one receptacle and a wireless power transmitting assembly operatively connected to the connection box. The wireless power transmitting assembly is adapted to transfers wireless power. A power cord may be connected to the connection box to supply power to the connection box and the wireless power transmitting assembly. |
| US10804737B2 |
Mobility pattern and connected lighting based system for smart grid resource planning and energy management
The described embodiments relate to systems, methods, and apparatuses for controlling energy resources available to micro-grids of a city based on mobility patterns of people moving within the micro-grids. The mobility patterns can be identified using a network of sensors within each micro-grid for collecting data related to the movement of people within the micro-grids. The mobility patterns can be used to estimate energy demand for each micro-grid and prioritize the energy demands to determine the energy resources that would be suitable for supplying power to each micro-grid. This allows for micro-grids to dynamically and efficiently change their power sources according to predictions about the movement of people within the micro-grids. |
| US10804736B2 |
Methods and systems for post-disaster resilient restoration of power distribution system
Systems and methods for configuring micro-grids to restore some power in a power distribution grid (PDG) in response to a power disruption over the PDG. A computing system configured to receive current condition information from devices in the PDG. Form a minimum spanning forest (MSF) to identify a set of micro-grids, each spanning tree in a forest is a self-sustained islanded micro-grid network. Assign a ranking to each inter-bus link within each micro-grid according to constraints, to identify some inter-bus links above a high-ranking threshold to be switched off during a restoration period. Identify switches that restore power to some critical loads of a subset of critical loads with different forest configurations, based on buses that are switched on, to determine a subset of micro-grids less susceptible for link failures during the restoration period. Upon receiving a power disruption, activate the switches to restore some power to the PDG. |
| US10804730B2 |
Charging systems for devices related to dialysis treatments
In one aspect of the invention, a method of charging a medical device includes receiving radiofrequency signals from a remote machine remote from the medical device via a receiver of the medical device. The method includes converting the radiofrequency signals into electrical energy via a generator of the medical device. The method includes storing the electrical energy in an energy cell of the medical device. The method also includes powering a power consumption component of the medical device by transmitting the energy from the energy cell to the power consumption component. |
| US10804728B2 |
Device for adjusting path of power and method for operating the same
An electronic device includes a battery, a power regulator electrically connected with the battery and including an input terminal and an output terminal, a connector electrically connected with the input terminal, a wireless power transmitting circuit electrically connected with the output terminal, a switch electrically connected between the connector and the wireless power transmitting circuit, and a controller configured to identify an approaching external electronic device or a wireless charging-related request, identify whether power is provided from an external power supply via the connector in response to the identification, in response to identifying that power is not provided from the external power supply, supply power from the battery via the power regulator to the wireless power transmitting circuit, and in response to identifying that power is provided from the external power supply, supply the power provided from the external power supply to the wireless power transmitting circuit via the switch. |
| US10804726B2 |
Wheel coils and center-tapped longitudinal coils for wireless power transfer
In one embodiment, a wireless power transfer coil structure comprises a wheel core comprising an annulus portion and at least two spoke portions arranged substantially symmetrically with respect to a geometric center of the annulus portion, the wheel core formed from a magnetic material, and a coil located on an outer surface of the annulus portion of the wheel core. In one embodiment, the wireless power transfer coil structure further comprises at least one solenoidal coil wound around the at least two spoke portions of the wheel core. In one embodiment, the at least one solenoidal coil is wound around one of the at least two spoke portions of the wheel core in a first direction and wound around another of the at least two spoke portions of the wheel core in the first direction. In one embodiment, the at least one solenoidal coil is wound around one of the at least two spoke portions of the wheel core in a first direction and wound around another of the at least two spoke portions of the wheel core in a second direction different from the first direction. |
| US10804725B2 |
Control device, power receiving device, electronic apparatus, and power transmission system
A control device includes a control portion that controls a power supply portion that supplies power to a load based on received power received by a power receiving portion from a power transmitting device. In the case where the power receiving portion, after receiving a signal having a first frequency and a first duty from the power transmitting device, receives a signal having a second frequency that is different from the first frequency or a signal having a second duty that is different from the first duty, the control portion specifies an issued command based on a length of a reception period of the signal having the second frequency or the signal having the second duty. |
| US10804722B2 |
Battery control device
An object of the present invention is to provide a control device and a control method for a storage battery, which calculates an appropriate maximum allowable input/output power that suppresses deterioration of the storage battery while suppressing deterioration of power performance of a vehicle when a current is continuously charged or discharged.When it is detected that charging or discharging is continuously performed over a predetermined duration time with respect to the maximum allowable charge power and the maximum allowable discharge power which can be input and output during the calculated predetermined duration time, the value of the maximum allowable charge power or the maximum allowable discharge power communicated to a vehicle controller on the basis of the state of charge or discharge is reduced based on the time during which charging or discharging is actually continued. |
| US10804717B1 |
Resettable battery disconnect device
A resettable battery input control apparatus includes disconnect circuitry that allows for a battery or other power source to be disconnected from a load in an electronic device. A processor, such as a power management integrated circuit, may assess operating data indicative of operation of the electronic device. If the processor determines a fault condition, the disconnect circuitry is activated. In the event that the processor itself fails, the disconnect circuitry will fail safe and disconnect the battery from the load. Once disconnected, the battery remains disconnected until external power is applied. In one implementation the disconnect circuitry may comprise a field-effect transistor acting as a low-side switch that operates to disconnect the negative terminal of the battery from the load. |
| US10804716B2 |
Method and system for charging a battery
A method of charging a cell of a battery includes the steps of: applying a test current to an input terminal of the battery; measuring a voltage output, wherein the voltage output is comprised of a voltage of the cell and a voltage drop, induced by the test current, across an internal impedance of the battery; and applying a charging current to the input terminal of the battery if the measured voltage output is higher than a predetermined voltage, wherein the charging current is greater than the test current. |
| US10804713B2 |
Charge-discharge device and control method of the same
A charge-discharge device and a control method of the charge-discharge device are provided. The control method of the charge-discharge device comprising: receiving an input voltage signal via a configuration channel of a USB port; sampling the input voltage signal in a predetermined period to generate a plurality of sampling values; selectively connecting the configuration channel to a pull-down circuit or a pull-up circuit according to the sampling values, receiving a first charging voltage via a power channel of the USB port when the configuration channel is connected to the pull-down circuit, and outputting a second charging voltage via the power channel when the configuration channel is connected to the pull-up circuit. |
| US10804711B2 |
Battery pack configured to discharge to inhibit failure
A battery pack and a method of inhibiting failure of a battery pack. The battery pack may generally include a housing; a battery cell supported in the housing and electrically connectable to an electrical device, power being transferrable between the battery cell and the electrical device; a resistor supported in the housing and operable to receive current from the battery cell; and an electronic processor configured to detect a failure condition of the battery pack, and, in response to detecting the failure condition of the battery pack, cause the battery cell to discharge through the resistor. |
| US10804708B2 |
Wireless power transmission apparatus
A wireless power transmission apparatus includes: a transmitter that wirelessly transmits electric power; and a receiver that can receive, in a resonant relation with the transmitter, a transmission signal including the electric power transmitted from the transmitter, wherein the receiver includes a frequency variable unit that can change a reception resonant frequency; a detecting unit that detects reception power; and a control unit that controls the frequency variable unit to perform frequency adjustment such that the reception power detected by the detecting unit is maximized. |
| US10804704B2 |
Microgrid control system and method for the same
A microgrid control system includes a power transmission system configured to supply power to a microgrid, the microgrid configured to receive power from the power transmission system and to supply power to at least one or more distributed generators or into at least one or more loads, a DC converter configured to convert power that is supplied to the microgrid, and a converter control unit configured to measure a first power frequency variation of the microgrid and a second power frequency variation of the power transmission system and to control active power that is transmitted to the microgrid by the DC converter. |
| US10804703B2 |
Waveform separator apparatus and method for detecting leakage current in high voltage direct current power systems
A waveform separator system for determining DC leakage current flowing through an insulating structure in a high voltage direct current power system, wherein the DC leakage current is a composite DC current comprising one or more high magnitude momentary spikes, and having a DC component and an AC component includes: (1) a waveform separator configured to receive the composite DC current flowing through the insulating structure and to separate the composite DC current into corresponding direct current (DC) and alternating current (AC) components wherein the AC component has a first rate of change, and wherein the DC component has a second rate of change, and wherein the first rate of change is greater than the second rate of change; (2) at least one comparator configured to receive the AC component and produce at least one corresponding digital signal; and (3) a processor configured to: (a) receive the at least one corresponding digital signal and the DC component, (b) analyze the at least one corresponding digital signal and the DC component, and; (c) determine a resultant leakage current flowing through the insulating structure. |
| US10804702B2 |
Self-organizing demand-response system
Energy loads, sources or batteries exchange mathematical models with each other to form clusters of devices that together provide a service (self-reliance, frequency control, etc.) to a grid operator. Models are exchanged before or after forming clusters; a particular model is used to control its own device and is also used by another load/source to influence its control policy. Heuristics and an optimization technique (using models) are used to form a cluster of devices. Exchanging models obviates the need for a central entity to directly control loads/sources, and the need to exchange real-time data between loads/sources, providing resilience against communication failure. A service manager (demand-response aggregator) sends a service or technical constraints to loads/sources to form clusters on their own. Negotiation between manager and clusters occurs to form consensus on a response. Each device in a cluster is controlled by its own control policy which may depend upon the model of another device in the cluster. If communication is lost the clusters continue to implement the service. |
| US10804697B2 |
Power converter
A plurality of DC/DC converters in a power converter each converts an output voltage of a corresponding one of DC power sources into a voltage of a different value according to a switching operation and outputs the voltage as converted to a common DC bus. A controller controls the plurality of DC/DC converters to perform the switching operation in different phases. The controller resets the phases in accordance with an operating state of the plurality of DC power sources and the plurality of DC/DC converters. |
| US10804696B2 |
Power distribution system and method
A DC power distribution system has power sources, a DC power distribution bus with DC bus sections. The system has power switching assemblies to couple one of the DC bus sections to another and a system controller. An inverter is connected to one of the power switching assemblies to supply a consumer. The first and second terminals are electrically coupled to first and second bus sections. First and second semiconductor devices between the terminals control current flow and there is a current connection from each terminal to a power switching assembly controller for providing an indication of current. A control signal line is connected between the power switching assembly controller and each semiconductor device provides a signal to the semiconductor devices to control the current flow and an inverter coupler couples each current connection to the inverter. The inverter coupler has a feed from each current connection to the inverter. |
| US10804693B2 |
Electrical wiring device with protective features
The present invention is directed to an electrical wiring device that includes an automatic test circuit configured to commence an automatic test at a predetermined time such that a test current propagates on a test conductor. The sensor assembly provides a sensor test output responsive to the test current only if both the differential transformer and the grounded neutral transformer are operative. A fault detector circuit is configured to generate a test detection signal in response to the sensor test output only if the fault detector circuit is operable and the at least one power supply is substantially charged. A device integrity evaluation circuit includes a timer that effects a tripped state when a time measurement exceeds a threshold, the test detection signal resetting the time measurement when properly wired before the time measurement exceeds the predetermined threshold but does not reset the time measurement when miswired. |
| US10804692B2 |
Hybrid diamond solid-state circuit protector
A solid-state circuit protector includes a first power semiconductor device having an ON resistance that increases with increasing temperature and a second power semiconductor device connected in parallel with the first power semiconductor device having an ON resistance that decreases with increasing temperature. During times when abnormally high currents are flowing through the solid-state circuit protector, the second power semiconductor is switched ON so that some or all of the current is diverted through it, thus protecting the first power semiconductor device from being damaged due to overheating. The first power semiconductor device is either switched OFF, allowing it to cool in anticipation of a lighter load, or is configured to remain ON so that it shares the burden of carrying the high current with the parallel-connected second power semiconductor device yet operates cooler and at a lower ON resistance since it is not required to pass the full current. |
| US10804686B2 |
Busbar assy support for PCB
The invention relates to a device for receiving and supporting busbars as electrical connection elements for a circuit board. The device is arranged in a gap between the circuit board and a housing wall, in contact with the circuit board and with the housing wall, and comprises a housing which receives at least one busbar and which, on a first end, is designed with a supporting element for holding the device on the housing wall. Here, the housing wall is designed with a screw base of a screw connection, and the supporting element is designed in the form of an eyelet such a manner that the supporting element encloses the screw base at least partially, and the circuit board is connected on a front side of the screw base to the housing wall. |
| US10804682B2 |
Spark plug
A spark plug including a ground electrode including a base material, a tip having a discharge surface, and a melt portion interposed over an entire area between the tip and the base material and joining the tip to the base material; and a center electrode with a spark gap formed between the center electrode and the discharge surface. The tip has, in an inner area surrounded by an outer peripheral portion of the tip, a thin portion in which a distance between the discharge surface and the melt portion is shorter than a distance between the discharge surface and the melt portion in the outer peripheral portion. The thin portion extends from a part of the outer peripheral portion to a part other than the part of the outer peripheral portion. |
| US10804681B2 |
Method for manufacturing a spark plug that makes welded portions uniform
A method for manufacturing a spark plug so as to make welded portions uniform. A method, for manufacturing a spark plug having a ground electrode to which a tip is welded, includes: a preparation step of preparing the ground electrode in which a plating layer is formed so as to at least exclude a first portion to which the tip is to be welded; an application step of applying a laser beam or electron beam to the first portion of the ground electrode after the preparation step; and a joining step of joining the tip to the first portion of the ground electrode by resistance welding after the application step. |
| US10804680B2 |
Very dense wavelength beam combined laser system
Apparatus, systems and methods to spectrally beam combine a group of diode lasers in an external cavity arrangement. A dichroic beam combiner or volume Bragg grating beam combiner is placed in an external cavity to force each of the diode lasers or groups of diode lasers to oscillate at a wavelength determined by the passband of the beam combiner. In embodiments the combination of a large number of laser diodes in a sufficiently narrow bandwidth to produce a high brightness laser source that has many applications including as to pump a Raman laser or Raman amplifier. |
| US10804679B2 |
Wavelength beam combining laser systems utilizing etalons
In various embodiments, wavelength beam combining laser systems incorporate etalons to establish external lasing cavities and/or to combine multiple input beams into a single output beam. |
| US10804678B2 |
Devices with quantum dots
An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer. |
| US10804674B2 |
Saturable-absorber-based laser system
Provided are a saturable absorber including at least one material selected from a group of MXenes, and a Q-switching and mode-locked pulsed laser system using the same. |
| US10804672B2 |
Monolithic mode-locked laser
A monolithic laser cavity (100, 200, 300, 400) for generating an output series of pulses (37) based on an input pump signal 36. This is achieved by a novel cavity design that utilizes a transparent, low-loss, and near zero-dispersion spacer (38) to form an optical resonator without the use of wave-guiding effects. The pulse forming material (32), optical elements (10-16, 30, 31, 33), and the laser gain medium (34) are in direct contact with the spacer and/or each other without any free-space sections between them. Therefore, the light inside the laser cavity never travels through free space. |
| US10804671B1 |
Terahertz magnon generator comprising plurality of single terahertz magnon lasers
An apparatus for generation of tunable terahertz radiation is provided. The apparatus comprises: a plurality of terahertz magnon laser generators, whereas at least one such terahertz magnon laser generator comprises a multilayer column, and a terahertz transparent medium separating at least two such terahertz magnon laser generators. At least one such multilayer column further comprises: a substrate, a bottom electrode coupled with the substrate, a bottom layer coupled with the bottom electrode, a tunnel junction coupled with the bottom layer, a top layer coupled with the tunnel junction, a pinning layer coupled with the spin injector, and a top electrode coupled with the pinning layer. |
| US10804669B2 |
Assembly method for a connector
The present invention relates to an assembly method for a connector, in particular for a high-voltage connector, having an electrical conductor and an electric contact, which assembly method comprises the following steps: providing a screw having a first drive and a second drive which is formed opposite the first drive; establishing a connection with play between the electrical conductor and the electric contact by means of the screw by the screw being inserted respectively into a passage hole in the electrical conductor and in the electric contact and being turned in a first direction by way of its first drive; tightening the connection between the electrical conductor and the electric contact by the screw being turned in a second direction, which is opposite the first direction, by way of its second drive. The present invention further relates to a connector and also to a screw. |
| US10804666B2 |
Tool device for generating a curved terminal
A tool device is disclosed for generating a curved terminal from an insulation stripped end of an electrical wire. The tool device includes a first member having a first and a second end the first member having a longitudinal axis. A second member is disposed adjacent to the first member, the second member having a first and a second extremity. The second member defines a further longitudinal axis which is disposed substantially parallel to and spaced from the longitudinal axis of the first member. The arrangement is such that a space is defined between the first member and the second member for the reception therein of the insulation stripped end of the electrical wire. The curved terminal is generated during relative movement of the axes around the insulation stripped end of the electrical wire. |
| US10804664B2 |
Crimp tool having adjustable cam
The invention is related to a crimp tool having an adjustable cam for accomplishing precision machining of a connector with a cable. The adjustable cam is provided at one of the handles of the crimp tool and is configured to prevent a moving handle of the crimp tool from moving beyond the adjustable cam so as to allow a user to adjust the pivot range of the moving handle, which controls the extent of the movement of a machining block in a machining portion of the crimp tool. |
| US10804658B2 |
Rechargeable USB electrical outlet with integrated lighting
An electrical outlet device and system for providing light and power during the night or during a power failure. The device and system includes rechargeable energy storage devices that can be utilized to provide power to the outlet(s) and the light sources. The device and system can have two sections, a main and a removable section both having their own energy storage devices and light sources. The light sources can be controlled by a control circuit that can utilize one or more switches or sensors to control the activation or deactivation of the light sources and also the transfer of energy from the energy storage devices to the light sources or outlets of the main section. The main section can also have USB and electrical outlets or plugs to allow the device and system to be plugged into an AC or DC power source, and can transfer that energy to the USB and electrical outlets or plugs. |
| US10804657B2 |
Communication adapter for a transmitter of a field device
The present disclosure relates to an adapter for a 2-wire field device, especially a 2-wire field device of process and/or automation technology, comprising a communication unit for, especially wireless, especially bi directional, communication with an external unit, and an energy storage unit for supply of at least the communication unit with electrical energy. According to the present disclosure, the adapter includes a first connection element for, especially electrical, contacting of the adapter with a second, first connection element complementary, connection element of the field device, wherein the at least two connection elements are embodied for supply of at least the adapter with electrical energy and for exchanging information. Furthermore, the present disclosure relates to a transmitter with an adapter of the present disclosure as well as a 2-wire field device having an adapter of the present disclosure or a transmitter of the present disclosure. |
| US10804649B2 |
Non-conductive member between incompatible power terminals
Examples disclosed herein relate to a non-conductive member including a surface defining a first hole to mate to a first pin of a terminal and a second hole to mate to a second pin of the terminal and a third pin of the terminal; and a protrusion extending from the surface. |
| US10804646B2 |
Domestic appliance having at least one plug for an electrical connection
A household appliance includes a plug for electrical contacting. The plug includes a body for mechanically retaining an electrically conductive contact. A protective hood extends at least largely over the body and has a burning point which is higher than a burning point of a material of the body of the plug. |
| US10804640B2 |
Electrical connector equipped with dual shells
The electrical connector includes an insulative housing enclosed within a metallic shell unit and retaining a plurality of contacts therein. The housing includes a base and a tongue extending forwardly from the base. Each contact has a contacting section exposed upon the tongue and a leg located outside the housing. The shell unit includes an inner shell attached to the housing, and an outer shell secured to the inner shell and forming a pair of rear mounting legs. The housing forms a rear fixing block holding the pair of mounting legs in position for alignment with corresponding holes in the printed circuit board to which the legs of the contacts are soldered. |
| US10804638B1 |
Safety shield assembly for power receptacle and related power receptacle
A safety shield assembly for a power receptacle and a power receptacle incorporating the same. The assembly includes a frame, and a sliding block and a resilient member disposed in the frame. The frame has multiple openings corresponding to multiple socket holes of the power receptacle, a position limiting member, and a balancing support member. The sliding block has a sliding block base, two protection ramps disposed in the base and spaced apart, and two metal reinforcement members joined to and formed integrally with the two protection ramps to cover their inclined surfaces. When a power plug is inserted into the socket holes, two prongs of the plug push against the reinforcement members on the protection ramps and the sliding block slides away. When an object is inserted into only one socket hole, the balancing support member and position limiting member cooperate to prevent the sliding block from sliding. |
| US10804634B2 |
Electronic contact
A contact device having at least one connection contact, a contact clamping apparatus, and a contact reception apparatus, wherein the contact reception apparatus is designed as a substantially rectangular contact plate into which a contact recess is introduced, a side plate having connection contacts is arranged on at least one side of the contact plate, and the contact clamping apparatus is designed as a clamping element that is arranged on at least one further side of the contact plate. |
| US10804629B2 |
Beveling staggered card edges
The present invention provides a method, structure, and system of beveling staggered card edges. In some embodiments, the method, computer program product, and system include receiving a card with a plug end and two or more metal contact leads running up to the plug end, removing material from the plug end such that one or more engagement points for one or more of the leads are set back from the plug end resulting in staggered steps, where an engagement point is where a metal contact lead will enter a receptacle, and removing material from an edge formed for each engagement point of the card such that beveled edges are created at the one or more engagement points for each lead. |
| US10804627B2 |
Connector system with thermal management
A connector system includes a cage with an intermediate section. The cage support a connector and the resulting connector system includes an upper port and a lower port. A heat sink is provided in the intermediate section that is configured to cool a module inserted into the lower port. Apertures can allow air to flow through the connector system so as to allow for improved cooling by more directly cooling the inserted module. The heat sink can be urged into the lower port by a biasing element. |
| US10804621B2 |
Printed wiring board
According to one embodiment, a printed wiring board includes a wiring board, a connector part, a connection pad provided between the wiring board and the connector part and connected with the connector part with a solder material and a guide groove provided in the wiring board to be continuous to the connection pad, to guide a portion of the solder material from the connection pad. |
| US10804617B2 |
Electronic devices having shared antenna structures and split return paths
Antenna structures at a given end of an electronic device may include antenna structures that are shared between multiple antennas. The device may include an antenna with an inverted-F antenna resonating element formed from portions of a peripheral conductive electronic device housing structure and may have an antenna ground that is separated from the antenna resonating element by a gap. A short circuit path may bridge the gap. The short circuit path may be a split return path coupled between a first point on the inverted-F antenna resonating element arm and second and third points on the antenna ground. The electronic device may include an additional antenna that includes the antenna ground and metal traces that form an antenna resonating element arm. The antenna resonating element arm of the additional antenna may be parasitically coupled to the inverted-F antenna resonating element and a portion of the split return path. |
| US10804616B2 |
Circuit architecture for distributed multiplexed control and element signals for phased array antenna
The phased array antenna system is described. The phased array antenna system formed on one or more layers of a printed circuit board (PCB). The phased array antenna system be may include a beam forming network to convert between one or more element signals and a beam signal. The phased array antenna system may include one or more control circuits, where each control circuit may receive the element signals for corresponding antenna element. Each of the control circuits may further may establish a control signal path and an element signal path between the antenna elements and the beamforming network, where the signal path may carry multiplexed element and control signals. The control circuits may include a signal adjustment circuit that may adjust the corresponding element signal (e.g., in phase or amplitude) based on the control signal. |
| US10804614B2 |
Space frame antenna
A lightweight and portable space frame antenna includes a first plurality of reflector panels and a second plurality of reflector panels each being sized and configured such that each one of said first plurality of reflector panels can be nested inside a corresponding one of said second plurality of reflector panels, thereby defining a nested pairing; a plurality of helical cam latching devices for joining together each of the first and second pluralities of reflector panels; a reflector hub consisting of two pieces, wherein the first and second pluralities of reflector panels are mounted on the reflector hub to form a parabolic reflector; a foldable positioner for supporting the parabolic reflector; a telescoping actuator that is structured and disposed for providing elevation adjustment and may be selectively disconnected from the parabolic reflector; and an elevation-azimuth bar that is structured and disposed for providing azimuth adjustment through a bearing-free azimuth rotation. |
| US10804613B2 |
5G MIMO antenna structure
A 5G MIMO antenna structure includes a PCB and more than one first antenna assembly arranged on the PCB at intervals. Each first antenna assembly includes a feed branch, a first radiator and two second radiators, wherein the first radiator and the two second radiators are coupled to the feed branch, the first radiator is of an inverted U-structure and has two tail ends connected to grounding points of the PCB, the feed branch is located in the first radiator and corresponds to a feed point of the PCB in position, and the two second radiators are arranged in the first radiator, connected to the first radiator, and respectively located on two sides of the feed branch. The 5G MIMO antenna structure has a good radiation effect, a good isolation effect and a smaller size, and can meet the usage requirements of a 5G system below 6 GHz. |
| US10804611B2 |
Dielectric resonator antenna and method of making the same
A dielectric resonator antenna (DRA) operable at a defined frequency includes: at least one volume of a dielectric material configured and structured to be responsive to a signal feed when electromagnetically coupled to the at least one volume of a dielectric material, the signal feed when present and electrically excited being productive of a main E-field component having a defined direction, Ē, in the DRA as observed in a plan view of the DRA; wherein the at least one volume of a dielectric material includes a non-gaseous dielectric material having a defined dielectric constant, the non-gaseous dielectric material having an inner region having a dielectric medium having a dielectric constant that is less than the dielectric constant of the non-gaseous dielectric material, at the defined frequency; wherein the inner region has a cross sectional overall height Hr as observed in an elevation view of the DRA, and a cross sectional overall width Wr in a direction parallel to the direction Ē as observed in the plan view of the DRA; and wherein Hr is greater than Wr/2. |
| US10804609B1 |
Circular polarization antenna array
Apparatuses, methods, and systems for an antenna element are disclosed. For an embodiment, the antenna element includes a feed line layer, a first substrate adjacent to the feed line layer, a ground layer adjacent to the first substrate, a second substrate adjacent to the ground layer, and a third layer adjacent to the second substrate. The feed line layer includes a conductive fork-shape that includes a conductive handle adapted to be electrically connected to a center conductor of a coaxial line, a conductive cross-section that crosses an end portion of the conductive handle, and a plurality of conductive fingers. For an embodiment, a rectangular slot is formed in the ground layer, wherein a length of the rectangular slot is perpendicular to the conductive handle. For an embodiment, the third layer includes four parasitic elements, wherein each parasitic element is electrically connected to the ground layer through a shorting via. |
| US10804607B2 |
Multiband antenna structure and wireless communication device using same
An antenna structure includes a housing, a radiator, a first feed portion, and a first ground portion. The housing includes a coupling portion and a coupling section. The first feed portion, the first ground portion, and the radiator are all positioned in the housing. When a first feed point supplies current, the current flows through the first feed portion and the radiator, and is coupled to one of the coupling portion and the coupling section through the radiator. The current is further coupled to the other one of the coupling portion and the coupling section through the one of the coupling portion and the coupling section. The radiator, the coupling portion, and the coupling section activate three different operating modes. Each mode operating generates radiation signals in one of three different radiation frequency bands. |
| US10804606B2 |
Broadband low-beam-coupling dual-beam phased array
Broadband slot-coupled stacked patch antenna elements are capable of continuous broadband operation between 1.71 GHz and 2.69 GHz. The broadband slot-coupled stacked patch antenna element includes a mid-band radiating patch, a high-band radiating patch, and a low-band resonator with coupling slots capable of resonating at low, mid, and high band frequencies. Additionally, a low-profile probe-fed patch element is provided for pattern enhancement of antenna arrays at high-band frequencies. This low-profile patch element features fan-shaped probes that have three degrees of tune-ability, namely a length, a width, and a spreading angle. Further aspects include 3-column and 4-column offset arrays of the broadband patch radiators and an interleaved array of the low-profile high-band patch radiators and the broadband radiating elements. A new type of azimuth beam forming network (ABFN) is also introduced for the beam forming of the 3-column and 4-column dual-beam arrays. |
| US10804605B2 |
Calibration using quaternionic scattering models
The system and method of calibrating a receiver array using a quaternionic scattering model. The calibration method is model based, quick, and suitable for sparse sampling of the array. The calibration scheme can be cheaply and rapidly deployed, either from operational test data or from rapid ground calibration experiments. The model allows for closed loop calibration repair during actual geolocation or line of bearing collects. |
| US10804604B2 |
Calibration in a phased array system
A system comprises a plurality of antenna elements, a transmitter circuit, and first and second receiver circuits. The transmitter is operable to: transmit, via a first antenna element, a series of signals having a calibration component and each of the signals being generated with a different configuration of the transmitter circuit; and select a configuration for a future transmission based on a signal metric. The first receiver circuit is operable to: receive the signal via a second antenna element; and detect the calibration component in the signal to generate a first calibration signal. The second receiver circuit is operable to: receive the signal via a third antenna element; detect the calibration component in the signal to generate a second calibration signal; combine the first and second calibration signals to generate a combined calibration signal; and generate the signal metric based on the combined calibration signal. |
| US10804600B2 |
Antenna and radiator configurations producing magnetic walls
Methods and systems for producing magnetic walls for use in a switchable or activated non-reciprocal antenna array are presently disclosed. The non-reciprocal antenna array includes a plurality of omni-directional antennas linearly aligned with a phase center of each omni-directional antenna antennas on a line. Each antenna of the plurality of omni-directional antennas has an antenna rotation respective to the line. The array also includes an antenna spacing between the antennas equaling 360 degrees divided by a quantity of antennas in a full operational wavelength. Additionally, the array includes a set of antenna feeds corresponding to one feed for each antenna. The set of antenna feeds is configured to selectively enable or disable the plurality of antennas. When the plurality of omni-directional antennas are enabled, the array has a composite radiation pattern in having a maximum in one direction perpendicular to the line and a minimum in an opposite direction. |
| US10804599B2 |
BTE hearing instrument comprising a loop antenna
There is provided a hearing instrument comprising a BTE part to be worn behind the ear of a user (76), the BTE-part comprising: a first side, a second side substantially parallel to the first side, and a third side connecting the first side and the second side, wherein the first and second side are substantially parallel to the user's skin when the BTE part is worn behind the ear. |
| US10804597B2 |
Antenna system and communication terminal
The present disclosure provides an antenna system, including a circuit board and three antenna arrays. The circuit board includes a circuit chip and a first PCB, a first FPC, a second PCB, a second FPC, and a third PCB that are sequentially stacked and electrically connected to each other. The first FPC includes a first extension portion, the second FPC includes a second extension portion and a third extension portion on two adjacent sides, the first extension portion and the second extension portion are located on a same side of the circuit board, and every two of the first extension portion, the second extension portion, and the third extension portion are perpendicular to each other. The present invention further provides a communication terminal using the antenna system. The antenna system and the communication terminal of the present disclosure have a wide frequency band, high coverage efficiency, and a stable signal. |
| US10804593B2 |
Mobile device
A mobile device includes a body, an antenna structure, and a floating radiation element. The body includes a frame and a housing. The frame is positioned on a first plane. The housing includes a parallel region and a cutting retraction region. The parallel region is positioned on a second plane which is parallel to the first plane. The floating radiation element is adjacent to the antenna structure, and is configured to enhance the radiation efficiency of the antenna structure. The antenna structure has a first vertical projection on the housing, and the first vertical projection is inside the parallel region. The floating radiation element has a second vertical projection on the housing, and the second vertical projection is inside the cutting retraction region. The frame is at least partially made of a nonconductive material. The housing is at least partially made of a conductive material. |
| US10804592B2 |
Antenna and window glass
To provide high sensitivity to high frequency band signals, it is provided an antenna to be arranged on a window glass of a vehicle, the antenna comprising: a planar conductor to be arranged on the window glass; a slot formed as a rectangular region obtained by removing a conductor from the planar conductor; a power feeding unit arranged on a first side of the slot; and an element extending from a core-side terminal of the power feeding unit to a second side of the slot opposite to the first side, the slot being disposed at a position offset from a center of the planar conductor in a direction toward the first side. |
| US10804590B2 |
Antenna and window glass
To provide excellent reception performance on a narrow area of an automotive window glass, it is provided an antenna to be arranged on a window glass of a vehicle, the antenna comprising: a core-side power feeding unit; an earth-side power feeding unit; a first element extending from the core-side power feeding unit; and a second element extending at an angle of approximately 90 degrees with respect to the first element from the core-side power feeding unit, the first element having a length of 3αλ/4+δ and the second element having a length of αλ/4−δ, or the first element having a length of 3αλ/4−δ and the second element having a length of αλ/4+δ, where λ refers to a wavelength of a reception frequency, α refers to a wavelength shortening rate of glass, and δ refers to an offset length for each of the first element and the second elements. |
| US10804587B2 |
Electrically controllable radio-frequency circuit element having an electrochromic material
We disclose an electrically controllable RF-circuit element that includes an electrochromic material. In an example embodiment, the electrically controllable RF-circuit element is configured to operate as a phase shifter whose phase-shifting characteristics can be changed using a dc-bias voltage applied to a multilayered structure containing a layer of the electrochromic material. |
| US10804586B2 |
System and method for launching scattering electromagnetic waves
In accordance with one or more embodiments, a system includes a transceiver configured to generate an electromagnetic signal conveying first data. A coupler is configured to generate, responsive to the electromagnetic signal, an electromagnetic wave along a surface of a transmission medium, wherein the electromagnetic wave is within a non-optical frequency band, wherein the electromagnetic wave propagates via a cylindrical scattering wave mode along the surface of the transmission medium without requiring an electrical return path. |
| US10804582B2 |
Filter
A filter which stops the propagation of an electromagnetic wave of a predetermined frequency band in a signal line or a power supply line is provided. This filter is a conductor connected to the signal line or the power supply line. This conductor is configured to include a linear portion. The first portion of the linear portion with an end portion connected to the signal line or the power supply line has the first width, and the second portion different from the first portion of the linear portion has the second width different from the first width. |
| US10804581B2 |
Radio frequency filter apparatus and radio frequency module
A radio frequency filter apparatus includes: radio frequency filters each having a first ring-type pattern extended from a respective first port and a second ring-type pattern extended from a respective second port; a cover ground layer disposed on or below the radio frequency filters and disposed to cover at least a portion of each of the radio frequency filters; and a surrounding ground layer disposed to surround at least a portion of each of the radio frequency filters along outer boundaries of the radio frequency filters, wherein the surrounding ground layer is spaced apart from radio frequency filters such that a shortest distance between the radio frequency filters and the surrounding ground layer is 8/5 or more times a shortest distance between the radio frequency filters and the cover ground layer. |
| US10804576B2 |
Electrolyte for lithium-sulfur battery and lithium-sulfur battery comprising same
The present invention relates to an electrolyte solution for a lithium-sulfur battery and a lithium-sulfur battery including the same.The electrolyte solution for a lithium-sulfur battery according to the present invention exhibits excellent stability, and may improve a swelling phenomenon by suppressing gas generation during lithium-sulfur battery operation. |
| US10804574B2 |
Battery charger with battery state detection
A battery charger and method is disclosed for detecting when a battery has a low state of health while simultaneously charging or maintaining the battery. A battery charger includes a processor; a non-transitory memory device; a power management device to receive an input power and to output a charging current; a pair of electrical conductors to electrically couple with a battery, and a display electrically coupled to the processor. The display being configured to indicate a bad battery indicator when the battery has a low state of health and whether the battery is good to start. |
| US10804572B2 |
Lithium secondary battery including lithium-ion conductive nonaqueous electrolyte
A lithium secondary battery includes a wound electrode group and a lithium-ion conductive nonaqueous electrolyte. The wound electrode group includes a positive electrode, a negative electrode, and a separator between the positive electrode and the negative electrode. The negative electrode includes a negative electrode current collector. The negative electrode current collector includes: a layer having a first surface facing outward of the winding of the electrode group and a second surface facing inward of the winding of the electrode group; first protrusions protruding from the first surface; and second protrusions protruding from the second surface. Lithium metal is deposited on the first surface and the second surface by charging. A first average height of the first protrusions is higher than a second average height of the second protrusions. |
| US10804570B2 |
All solid type three-dimensional battery and method of manufacturing the same
An all solid type three-dimensional (“3D”) battery may include a cathode collector, a cathode structure in contact with the cathode collector, an electrolyte structure in contact with the cathode structure, an anode structure in contact with the electrolyte structure, the anode structure not being in contact with the cathode structure and the cathode collector, and an anode collector in contact with the anode structure, where the electrolyte structure is in contact with the cathode collector around the cathode structure. An entirety of a surface of the cathode structure which is used for a battery operation may be in contact with the cathode collector and the electrolyte structure. |
| US10804567B2 |
Electrolyte system for lithium metal secondary battery and lithium metal secondary battery including the same
Disclosed is an electrolyte for a lithium metal secondary battery and a lithium metal secondary battery including the same. An electrolyte system is intended to maintain the energy density of a secondary battery based on a lithium metal negative electrode and to extend the life of a battery. Particularly, an electrolyte for a lithium metal battery which forms a stable SEI film capable of inhibiting formation and extension of lithium dendrite so that the negative electrode of a lithium metal battery having a high possibility of battery ignition may be stabilized and an internal short-circuit may be prevented, and a lithium metal secondary battery including the same is provided. |
| US10804566B2 |
Lithium battery containing cathode material and electrolyte additives for high voltage application
A lithium secondary cell having an operating voltage ≥4.35 sV, comprising a cathode comprising a doped L1CoO2 active material, an anode comprising graphite, and an electrolyte comprising a carbonate-based solvent, a lithium salt and both a succinonitrile (SN) and a lithium bis(oxalato)borate (LiBOB) additive wherein during the discharge at 45° C. from a state of charge (SOC) of 100% at 4.5V to a SOC of 0 at 3V at a C/10 rate the difference of the SOC at 4.42V and 4.35V is at least 7% but less than 14%, and wherein the active material is doped by at least 0.5 mole % of either one or more of Mn, Mg and Ti. |
| US10804565B2 |
Batteries with polymer electrolyte composites based on tetrahedral arylborate nodes
Solid electrolytes have a favorable combination of properties such as high conductivity, high transference number, optimum processability, and low brittleness. A composite electrolyte includes some amount of a class of network polymer electrolytes with high transference number and high room temperature conductivity, and an additional polymeric component to contribute mechanical integrity and/or processability. The solid electrolytes can include a network polymer having linked nodes composed of a tetrahedral arylborate composition and a linear polymer combined with the network polymer as a composite. The solid electrolytes can be used in thin films and in solid-state batteries. |
| US10804562B2 |
Method and system for determining concentration of electrolyte components for lithium-ion cells
A computer-implemented method for determining a concentration of a component of an electrolyte in a lithium-ion or for a lithium-ion cell is provided. The method includes providing, to a spectrometer, instructions to capture a spectrum of a sample solution of the electrolyte and generate a signal. The method includes analyzing the signal to determine one or more spectral features of the spectrum. The method includes preparing a database of spectra corresponding to solutions having predetermined concentrations of the component of the electrolyte wherein the database includes a plurality for spectral features for each solution. The method further includes determining a machine learning (ML) model using the database of spectra. The method includes determining the concentration of the component of the electrolyte in the sample solution using the machine learning model. |
| US10804554B2 |
Fuel cell system and control method for fuel cell system
A control method for a fuel cell system with a gas supplying device configured to supply fuel gas and oxidant gas to a fuel cell, includes a power generating operation step of performing a power generating operation for causing the fuel cell to generate power by controlling the fuel gas and the oxidant gas to be supplied to the fuel cell on the basis of a load required of the fuel cell. Further, the control method includes an autonomous operation step of performing an autonomous operation of the fuel cell when the load drops to or below a predetermined value. In the autonomous operation, power supply from the fuel cell system to the load is stopped and the fuel gas is passed to an anode of the fuel cell. |
| US10804553B2 |
Fuel cell system
A fuel cell system according to one embodiment performs refresh control of an electrode catalyst of a fuel cell, by reducing a stack voltage as a voltage of the fuel cell to a refresh voltage at which the electrode catalyst is activated. The system includes the fuel cell that generates electric power by an electrochemical reaction using fuel gas and oxidation gas, a stack voltage sensor that sensors the stack voltage, and a controller that controls power of the fuel cell. When a high load demand that makes the stack voltage lower than a given voltage is made on the fuel cell, the controller causes the fuel cell to deliver power commensurate with the high load demand, and performs refresh control when the stack voltage becomes lower than the given voltage through the above control. |
| US10804550B2 |
Humidifier for fuel cell
A humidifier for a fuel cell includes: a bundle of hollow fiber membranes disposed therein, such that an intake gas flows inside the bundle of hollow fiber membranes; a housing configured to accommodate the bundle of hollow fiber membranes, such that an exhaust gas, which has a higher humidity than the intake gas, flows inside the housing; and a guide member disposed in the housing to restrict a movement of the bundle of hollow fiber membranes inside the housing. Coolant flows through the guide member to cool the exhaust gas to promote condensation of the exhaust gas. |
| US10804549B2 |
Power generation system and method for operating power generation system
Provided are: a power generation system that can generate electric power efficiently with a fuel cell; and a method for operating said power generation system. This power generation system comprises: a fuel cell including a plurality of unit fuel cell modules; a gas turbine; various lines for circulating fuel gas, air, discharged fuel gas, and discharged air between the fuel cell and the gas turbine; and a control device. The control device determines the number of said unit fuel cell modules to be operated on the basis of the required power generation amount, and operates the determined number of said unit fuel cell modules. |
| US10804546B2 |
Ion exchange filter assembly with integrated degas function
An ion exchange filter assembly includes an ion exchange filter cartridge and a housing. The ion exchange filter cartridge includes an ion exchange filter for filtering a coolant. The housing includes a first section receiving the ion exchange filter cartridge and a second section for degassing the coolant. The first section is in fluid communication with the second section. |
| US10804542B2 |
Gas diffusion electrode base, laminate and fuel cell
A gas diffusion electrode substrate has an electrically conductive porous substrate and a microporous layer-1 on one side of the electrically conductive porous substrate. The microporous layer-1 includes a dense portion A and a dense portion B. The dense portion A is a region containing a fluorine resin and a carbonaceous powder having a primary particle size of 20 nm to 39 nm. The dense portion A has a thickness of 30% to 100% with respect to the thickness of the microporous layer-1 as 100% and a width of 10 μm to 200 μm. The dense portion B is a region containing a fluorine resin and a carbonaceous powder having a primary particle size of 40 nm to 70 nm. |
| US10804537B2 |
Protected particles of anode active materials, lithium secondary batteries containing same and method of manufacturing
Provided is an anode active material layer for a lithium battery, comprising multiple particulates of an anode active material, wherein a particulate is composed of one or a plurality of particles of a high-capacity anode active material being embraced or encapsulated by a thin layer of a high-elasticity polymer having a recoverable tensile strain no less than 5% when measured without an additive or reinforcement, a lithium ion conductivity no less than 10−6 S/cm at room temperature, and a thickness from 0.5 nm (or a molecular monolayer) to 10 μm (preferably less than 100 nm), and wherein the high-elasticity polymer contains a polyrotaxane network having a rotaxane structure or a polyrotaxane structure at a crosslink point of the polyrotaxane network. |
| US10804536B2 |
Substituted lambda manganese dioxides in an alkaline electrochemical cell
Substituted λ-MnO2 compounds are provided, where a portion of the Mn is replaced by at least one alternative element. Electrochemical cells incorporating substituted λ-MnO2 into the cathode, as well as methods of preparing the substituted λ-MnO2, are also provided. |
| US10804532B2 |
Negative-electrode active material, method of manufacturing the same, and nonaqueous secondary battery
A negative-electrode active material is provided. The negative-electrode active material includes a particle including a core and a coat layer provided on at least a part of a surface of the core. The core includes a first nickel silicide-based material and a silicon oxide-based material, and the coat layer includes a second nickel silicate-based material. |
| US10804530B2 |
Composite anode material including surface-stabilized active material particles and methods of making same
Composite anode materials and methods of making same, the anode materials including capsules including graphene, reduced graphene oxide, graphene oxide, or a combination thereof, and particles of an active material disposed inside of the capsules. The particles may each include a core and a buffer layer surrounding the core. The core may include crystalline silicon, and the buffer layer may include a silicon oxide, a lithium silicate, carbon, or a combination thereof. |
| US10804529B2 |
Electrode material, method for manufacturing electrode material, electrode, and lithium ion battery
An electrode material including a carbonaceous-coated electrode active material having primary particles of an electrode active material and secondary particles that are aggregates of the primary particles, and a carbonaceous film that coats the primary particles of the electrode active material and the secondary particles that are the aggregates of the primary particles, in which a proportion of a volume of micropores having a micropore diameter of 50 nm or less in a volume of micropores having a micropore diameter of 300 nm or less, which is obtained using a nitrogen adsorption method, is 40% or more. |
| US10804525B2 |
Silicon nanostructure active materials for lithium ion batteries and processes, compositions, components, and devices related thereto
The present invention relates to nanostructured materials for use in rechargeable energy storage devices such as lithium batteries, particularly rechargeable secondary lithium batteries, or lithium-ion batteries (LIBs). The present invention includes materials, components, and devices, including nanostructured materials for use as battery active materials, and lithium ion battery (LIB) electrodes comprising such nanostructured materials, as well as manufacturing methods related thereto. Exemplary nanostructured materials include silicon-based nanostructures such as silicon nanowires and coated silicon nanowires, nanostructures disposed on substrates comprising active materials or current collectors such as silicon nanowires disposed on graphite particles or copper electrode plates, and LIB anode composites comprising high-capacity active material nanostructures formed on a porous copper and/or graphite powder substrate. |
| US10804521B2 |
Battery terminal
A battery terminal includes: a main body unit; a penetration member that is arranged in a manner extending from an end side of the main body unit to the other end side of the main body unit across slits along a tightening direction Y, includes an abutting portion formed in the end side, and has a threaded hole and a taper forming end portion provided with first tapered surfaces formed in the other end side; a fastening member threadedly engaged with the threaded hole; and a pressing force converting member that converts fastening force in an axial direction X generated between the fastening member and the penetration member with rotation of the fastening member around the axial direction X into pressing force in the tightening direction Y pressing the main body unit between the abutting portion and the pressing force converting member along the tightening direction Y. |
| US10804519B2 |
Separator and electrochemical device including the same
Disclosed are a separator and an electrochemical device including the same. The separator includes: a porous polymer substrate having a plurality of pores; a separator base including a porous coating layer formed on at least one surface of the porous polymer substrate, and including a plurality of inorganic particles and a binder polymer disposed partially or totally on the surface of the inorganic particles to connect and fix the inorganic particles with each other; and an adhesive porous layer formed on at least one surface of the separator base and including an adhesive resin which shows adhesive property through heating at a temperature lower than the melting point of the porous polymer substrate, wherein the adhesive porous layer is provided with a porous structure formed by phase separation caused by the evaporation rate of a solvent and that of a non-solvent, when applying and drying a coating composition including the adhesive resin, the solvent and the non-solvent on at least one surface of the separator base. |
| US10804518B2 |
Anion conducting membrane
Provided is a material capable of further extending the life of a cell including a zinc species as a negative electrode active material. The present invention relates to an anion conducting membrane formed using an anion conducting membrane-forming material, the anion conducting membrane-forming material including a conjugated diene based polymer and/or a (meth)acrylic based polymer, and a compound containing at least one element selected from Groups I to XVII of the periodic table, the anion conducting membrane having a cross-section in which a ratio of a combined area of particles of the compound containing at least one element selected from Groups I to XVII of the periodic table to a combined area of the components of the anion conducting membrane-forming material other than the compound (particles of the compound/components of the anion conducting membrane-forming material other than the compound) is 70/30 to 30/70. |
| US10804511B2 |
Battery array frame including frame rail insert
A battery array frame may include a frame body extending along a longitudinal axis and including a top frame rail, a bottom frame rail, and frame arms that connect between the top frame rail and the bottom frame rail. An insert extends inside the frame body for increasing the stiffness of the frame body. |
| US10804510B2 |
Battery pack including a fixing member
Disclosed is a battery pack, which may effectively prevent a bending phenomenon caused by a load while ensuring excellent assembling and compatibility and light weight, and a vehicle including the battery pack. The battery pack includes: a plurality of battery modules including at least one secondary battery accommodated in a module case and a side surface coupling unit provided at an outer side portion of the module case, the plurality of battery modules being arranged in a lateral direction so that side surfaces thereof face each other with intervals therebetween; and a fixing member having an interposing portion interposed between side surfaces of two adjacent battery modules and coupled to the side surface coupling units of the two adjacent battery modules so that two or more battery modules are coupled and fixed. |
| US10804509B2 |
Battery-fixing device and electronic device
The present disclosure provides a battery-fixing device and an electronic device, and the battery-fixing device is arranged in the electronic device and includes: a casing battery chamber, and a container fixedly arranged in the casing battery chamber and matched with the casing battery chamber to wrap and fix the battery. The container includes a containing chamber formed by a surround of a film and configured to contain a battery, and fixing films arranged on the containing chamber and connected to the containing chamber to fix the top of the containing chamber. Therefore, the battery-fixing device of the present disclosure uses the four-side wrapping PET film to fix the battery, thus the fixation thereof is more stable, the battery is easy to be detached, and not easy to be deformed or damaged, and it is safe and reliable. |
| US10804507B2 |
Pouch case for secondary battery and pouch-type secondary battery comprising the same
The present disclosure relates to a pouch case for a secondary battery, and a secondary battery comprising the same, and in particular, to a pouch case for a secondary battery fabricated by laminating an inner resin layer, a middle resin layer and an outer resin layer, wherein the inner resin layer comprises a polyolefin-based resin and a thermosetting moisture absorber, and a secondary battery comprising the same. |
| US10804499B2 |
Light emitting element, display element, and method for producing light emitting element
[Object] To provide a light emitting element that enables efficient light extraction and offers low power consumption.[Solution] A light emitting element including: a lower electrode disposed on a support layer; first members disposed on the support layer so as to surround the lower electrode to form a recess structure, the first members each having a void inside; an organic layer disposed on the lower electrode and the first members and along the recess structure, the organic layer containing an organic luminescent material; an upper electrode disposed on the organic layer and along the recess structure; and a second member disposed above the upper electrode such that the recess structure is embedded in the second member, the second member having a higher refractive index than the first members. |
| US10804497B2 |
Organic optoelectronic component with a coupling-out layer
An organic optoelectronic component includes an organic functional layer stack between a first electrode and a second electrode including a light-emitting layer formed to emit a radiation during operation of the component, and a coupling-out layer arranged above the first electrode and/or the second electrode which is in a beam path of the radiation of the light-emitting layer, wherein the coupling-out layer includes a structured layer and a planarization layer arranged thereabove and the structured layer has a structured surface structured at least in places, the planarization layer planarizes the structured surface of the structured layer, and a difference in the refractive indices of the structured layer and the planarization layer is smaller than 0.3 at least in places. |
| US10804493B2 |
Method for manufacturing light-emitting device
An object of one embodiment of the present invention is to provide a more convenient highly reliable light-emitting device which can be used for a variety of applications. Another object of one embodiment of the present invention is to manufacture, without complicating the process, a highly reliable light-emitting device having a shape suitable for its intended purpose. In a manufacturing process of a light-emitting device, a light-emitting panel is manufactured which is at least partly curved by processing the shape to be molded after the manufacture of an electrode layer and/or an element layer, and a protective film covering a surface of the light-emitting panel which is at least partly curved is formed, so that a light-emitting device using the light-emitting panel has a more useful function and higher reliability. |
| US10804490B2 |
Display device
A display device includes a flexible substrate having a display area for displaying an image, and a pad area adjacent the display area, a circuit film coupled to the flexible substrate at the pad area, and a passivation layer on at least a part of the circuit film and at part of the pad area. |
| US10804485B2 |
Display apparatus
A display apparatus includes a display member including a display area, and a peripheral area adjacent the display area, a cover member on the display member, a first decoration member between the display member and the cover member, and including a bezel area overlapping the peripheral area, and a transmission area adjacent the bezel area, and overlapping the display area, and a second decoration member between the first decoration member and the cover member, and including a base member defining at least one recess portion overlapping the bezel area, and a filling member in the at least one recess portion, and including a refractive index that is lower than a refractive index of the base member. |
| US10804484B2 |
Lighting panel and method of fabricating the same, lighting module, lighting device, and lighting system
A lighting panel and method of fabricating the same, lighting module, lighting panel, and lighting system are provided. The lighting panel includes a material layer on a substrate; an auxiliary electrode embedded in the material layer; a first electrode on the material layer and electrically connected to the auxiliary electrode; an organic light-emitting layer and a second electrode in an emission portion where the first electrode is provided; and an encapsulation member in the emission portion of the substrate. |
| US10804481B2 |
Organic electroluminescent device emitting blue light
The present invention relates to a an organic electroluminescent device comprising a light-emitting layer B comprising a host material HB, a first thermally activated delayed fluorescence (TADF) material EB, and a second TADF material SB, wherein SB transfers energy to EB and EB emits TADF with an emission maximum between 420 and 500 nm. |
| US10804477B2 |
Flexible display device and method for manufacturing the same
A flexible display device, which has a bending area and a non-bending area, includes a display panel, and a window member disposed on the display panel and including a first glass substrate, a second glass substrate disposed opposite to the second glass substrate, and a bonding layer disposed between the first glass substrate and the second glass substrate. The bonding layer includes a first bonding part overlapping the bending area and a second bonding part overlapping the non-bending area and having a modulus greater than a modulus of the first bonding part. |
| US10804475B2 |
Organic electroluminescent materials and devices
A compound having a ligand LA of Formula I, is described. In the structure of Formula I, A is five-membered or six-membered carbocyclic or heterocyclic ring; B is a five-membered carbocyclic or heterocyclic ring; each of Z0 to Z6 is selected from nitrogen and carbon; each R1 to R4 is independently selected from a variety of substituents; any two adjacent substituents are optionally joined or fused into a ring; ligand LA is coordinated to Pt; and the ligand LA is optionally linked with one or more other ligands. Formulations and devices, such as OLEDs, that include the first compound are also provided. |
| US10804474B2 |
Organic electroluminescence device and electronic apparatus provided with the same
An organic electroluminescence device including a cathode, an anode, and an emitting layer disposed between the cathode and the anode, wherein the emitting layer includes a compound represented by the following formula (1) and one or more compounds selected from the group consisting of compounds represented by formulas (11), (21), (31), (41), (51), (61), (71) and (81). In the formula (1), at least one of R1 to R8 is a deuterium atom. |
| US10804473B2 |
Electron transport materials for electronic applications
There is provided a compound having Formula I In Formula I: E1-E4 are CH, CD, or N, where one and only one of E1-E4 is N; Ar1 is an N-heterocycle or a deuterated N-heterocycle; Ar2 is aryl, heteroaryl, diarylamino, or deuterated analogs thereof; R1 and R2 are the same or different and are D, alkyl, silyl, aryl, heteroaryl, deuterated alkyl, deuterated silyl, deuterated aryl, or deuterated heteroaryl; and a and al are the same or different and are integers from 0-3. |
| US10804471B2 |
Triarylamine derivative, light-emitting substance, light-emitting element, light-emitting device, and electronic device
A triarylamine derivative represented by a general formula (G1) given below is provided. Note that in the formula, Ar represents either a substituted or unsubstituted phenyl group or a substituted or unsubstituted biphenyl group; α represents a substituted or unsubstituted naphthyl group; β represents either hydrogen or a substituted or unsubstituted naphthyl group; n and m each independently represent 1 or 2; and R1 to R8 each independently represent any of hydrogen, an alkyl group having 1 to 6 carbon atoms, or a phenyl group. |
| US10804470B2 |
Organic compound
An organic compound, applications thereof, an organic mixture, and an organic electronic device. The structure of the organic compound is represented by formula (1), and definitions of substituent groups in the formula (1) are the same as those in the specifications. |
| US10804465B2 |
Resistive random access memory and manufacturing method thereof
A resistive random access memory and a manufacture method thereof are provided. The resistive random access memory includes: a first electrode, a second electrode, a resistive layer between the first electrode and the second electrode, and at least one thermal enhanced layer; the thermal enhanced layer is adjacent to the resistive layer, and a thermal conductivity of the thermal enhanced layer is less than a thermal conductivity of the first electrode and a thermal conductivity of the second electrode. |
| US10804461B1 |
Manufacturing method of memory device
A method for manufacturing a memory device is provided, the method includes the following steps: firstly, providing a dielectric layer, then simultaneously forming a contact window and an alignment mark trench in the dielectric layer, wherein the contact window exposes a lower metal line, then forming a conductive layer on the surface of the dielectric layer, in the contact window and in the alignment mark trench, performing a planarization step on the conductive layer, and leaving a residue in the alignment mark trench. Subsequently, a nitrogen plasma step (N2 plasma) is performed on the dielectric layer, a cleaning step is performed to remove the residue in the alignment mark trench, and a patterned magnetic tunneling junction, MTJ) film is laminated on the contact window. |
| US10804457B2 |
Magnetoresistive element and magnetic memory
A magnetoresistive element includes a reference layer having a fixed magnetization direction and including a ferromagnetic material containing Fe or Co, a recording layer having a variable magnetization direction and including a ferromagnetic material, and one non-magnetic layer that is formed between the reference layer and the recording layer and that contains oxygen. One of the reference layer and the recording layer contains Fe. The three layers are arranged so that a magnetization direction of the one of the reference layer and the recording layer becomes perpendicular to a layer surface by an interfacial perpendicular magnetic anisotropy at an interface between the one of the reference layer and the recording layer and the one non-magnetic layer resulting from the one of the reference layer and the recording layer having a predetermined thickness. The one of the reference layer and the recording layer has a bcc structure. |
| US10804453B2 |
Peltier-element
A Peltier element for a thermoelectric heat exchanger may include n-doped n-type semiconductors, p-doped p-type semiconductors, and a plate structure for electrically contacting the semiconductors. The plate structure may include first plate sections and second plate sections, which may be alternately arranged along an extension of the Peltier element. The first plate sections may form a first side of the Peltier element, and the second plate sections may form a second side of the Peltier element, the second side being spaced from the first side. The plate structure may further include a plurality of legs. Each leg may interconnect adjacent first and second plate sections and may extend inclined relative to the adjacent first and second plate sections. An n-type semiconductor and a p-type semiconductor may be alternately integrated in the legs along the plate structure. |
| US10804452B2 |
Interconnects for light emitting diode chips
Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies. |
| US10804446B2 |
LED light bulb with spectral distribution of natural light
An LED light bulb, comprising: a lamp housing, a bulb base, connected with the lamp housing; a stem with a stand extending to the center of the lamp housing, disposed in the lamp housing; a single flexible LED filament, disposed in the lamp housing, a spectral distribution of the light bulb is between wavelength range of about 400 nm to 800 nm, and three peak wavelengths P1, P2, P3 are appeared in the wavelength ranges corresponding to light emitted by the light bulb, the wavelength of the peak P1 is between 430 nm and 480 nm, the wavelength of the peak P2 is between 580 nm and 620 nm, and the wavelength of the peak P3 is between 680 nm and 750 nm, wherein a light intensity of the peak P1 is less than that of the peak P2, and the light intensity of the peak P2 is less than that of the peak P3. |
| US10804444B2 |
Light-emitting device and manufacturing method thereof
A light-emitting device including at least one light-emitting unit, a wavelength conversion adhesive layer, and a reflective protecting element is provided. The light-emitting unit has an upper surface and a lower surface opposite to each other. The light-emitting unit includes two electrode pads, and the two electrode pads are located on the lower surface. The wavelength conversion adhesive layer is disposed on the upper surface. The wavelength conversion adhesive layer includes a low-concentration fluorescent layer and a high-concentration fluorescent layer. The high-concentration fluorescent layer is located between the low-concentration fluorescent layer and the light-emitting unit. The width of the high-concentration fluorescent layer is WH. The width of the low-concentration fluorescent layer is WL. The width of the light-emitting unit is WE. The light-emitting device further satisfies the following inequalities: WE |
| US10804441B2 |
Light-emitting device with yellow color filters
A light-emitting device is provided. The light-emitting device includes a substrate including a plurality of pixels, each pixel including a plurality of subpixels designed to emit light with different colors. The plurality of subpixels includes a first subpixel designed to emit red light, a second subpixel designed to emit green light, and a third subpixel designed to emit blue light. The first subpixel includes a first light source formed on the substrate, a red light-emitting layer covering the first light source, and a first yellow color filter covering the red light-emitting layer. The second subpixel includes a second light source formed on the substrate, a green light-emitting layer covering the second light source, and a second yellow color filter covering the green light-emitting layer. The third subpixel includes a third light source formed on the substrate. A method for fabricating the light-emitting device is also provided. |
| US10804435B2 |
Light-emitting device
A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer emitting an UV light, formed between the first semiconductor layer and the second semiconductor layer; a first transparent conductive layer formed on the second semiconductor layer, the first transparent conductive layer including metal oxide; and a second transparent conductive layer formed on the first transparent conductive layer, the second transparent conductive layer including graphene, wherein the first transparent conductive layer is continuously formed over a top surface of the second semiconductor layer, the first transparent conductive layer comprises a thickness smaller than 10 nm. |
| US10804432B2 |
Free-standing substrate comprising polycrystalline group 13 element nitride and light-emitting element using same
A free-standing substrate of a polycrystalline nitride of a group 13 element contains a plurality of monocrystalline particles having a particular crystal orientation in approximately a normal direction. The polycrystalline nitride of the group 13 element is composed of gallium nitride, aluminum nitride, indium nitride or a mixed crystal thereof. The free-standing substrate has a top surface and bottom surface. The free-standing substrate contains at least one of zinc and calcium. A root mean square roughness Rms at the top surface is 3.0 nm or less. |
| US10804426B2 |
Planar surface mount micro-LED for fluidic assembly
Planar surface mount (SM) micro light emitting diodes (μLEDs) are presented. The fabrication method provides a MOCVD LED structure with a stack including a first doped semiconductor in a first plane, a MQW layer overlying the first doped semiconductor in a second plane, and a second doped semiconductor overlying the MQW layer in a third plane. An electrical insulator is conformally deposited over the etched stack in a fourth plane, and etched to expose the second doped semiconductor, creating a first via. Etching exposes the first doped semiconductor, creating a second via. A first electrode is connected to the second doped semiconductor through the first via, and has a substrate interface surface in a fifth plane with an average planarity tolerance of less than 10 nanometers. A second electrode is connected to the first doped semiconductor through the second via, and has a substrate interface surface in the fifth plane. |
| US10804422B2 |
Multi-operation tool for photovoltaic cell processing
Multi-operation tools for photovoltaic cell processing are described. In an example, a multi-operation tool includes a conveyor system to move a photovoltaic (PV) cell continuously along a conveyor path through a laser scribing station and an adhesive printing station. Furthermore, the PV cell may be aligned to a laser head of the laser scribing station and a printer head of the adhesive printing station in a single alignment operation prior to being laser scribed and printed with an adhesive in a continuous process. |
| US10804419B2 |
Photovoltaic devices with encapsulating barrier film
Encapsulated device including a photovoltaic cell and a composite film overlaying at least a portion of the photovoltaic cell, the composite film further including a substrate, a base (co)polymer layer on a major surface of the substrate, an oxide layer on the base (co)polymer layer, and a protective (co)polymer layer derived from a silane precursor compound on the oxide layer. |
| US10804418B2 |
Photodetector and method for fabricating the same
A photodetector includes a substrate, at least one nanowire and a cladding layer. The at least one nanowire is disposed on the substrate and has a semiconductor core. The cladding layer is disposed on sidewalls of the semiconductor core and includes an epitaxial semiconductor film in contact with the sidewalls of the semiconductor core, a metal film disposed on the outside of the epitaxial semiconductor film and a high-k material layer disposed on the outside of metal film. |
| US10804417B2 |
Display devices utilizing quantum dots and inkjet printing techniques thereof
Ink compositions for forming quantum dot-containing films are provided. Also provided are methods for forming the quantum dot-containing films via inkjet printing and photonic devices that incorporate the quantum dot-containing films as light-emitting layers. The ink compositions include the quantum dots, di(meth)acrylate monomers or a combination of di(meth)acrylate and mono(meth)acrylate monomers, and a one or more multifunctional crosslinking agents. |
| US10804415B2 |
Solar cell emitter region fabrication with differentiated p-type and n-type architectures and incorporating dotted diffusion
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate. |
| US10804414B2 |
Semiconductor device with nanostructures and methods of forming the same
A method of forming a semiconductor device includes forming a photo sensing region in a semiconductor substrate, wherein the semiconductor substrate is of a first type dopant and the photo sensing region is of a second type dopant that has a different conductivity type than the first type dopant; forming a nanostructure layer in contact with an interface between the photo sensing region and the semiconductor substrate; and etching the nanostructure layer until exposing the photo sensing region to form a plurality of nanostructures. |
| US10804412B2 |
Perovskite solar cell having excellent stability and high efficiency
Various aspects of the present invention are directed to providing a perovskite solar cell, and has a technical feature in that excellent stability and high efficiency are simultaneously secured by using a solid solution having a specific composition as a light absorber. |
| US10804411B2 |
Semiconductor device and method of forming the same
A semiconductor device includes a capacitive device, a first conductive via, and a second conductive via. The capacitive device includes a first conductive plate, a first insulating plate, a second conductive plate, a second insulating plate, and a third conductive plate. The first conductive via is electrically coupled to the first conductive plate and the third conductive plate, and the first conductive via penetrated through a first film stack with a first thickness. The second conductive via is electrically coupled to the second conductive plate, and the second conductive via penetrated through a second film stack with a second thickness. The second thickness is substantially equal to the first thickness. |
| US10804410B2 |
Bottom channel isolation in nanosheet transistors
Provided is a nanosheet semiconductor device. In embodiments of the invention, the nanosheet semiconductor device includes a channel nanosheet formed over a substrate. The nanosheet semiconductor device includes a buffer layer formed between the substrate and the channel nanosheet. The buffer layer has a lower conductivity than the channel nanosheet. |
| US10804405B2 |
Method for making thin film transistor, thin film transistor, back plate and display device
The present disclosure provides a method for making a thin film transistor (TFT), a TFT, a back plate and a display device. The TFT includes: a gate electrode, a source, a drain, a dielectric layer and an active layer on the dielectric layer. The active layer includes at least one a-Si area and at least one p-Si area. This can reduce leakage current and reduce the technical complexity of the large-channel TFT. |
| US10804402B2 |
Metal rail conductors for non-planar semiconductor devices
The present disclosure describes various non-planar semiconductor devices, such as fin field-effect transistors (finFETs) to provide an example, having one or more metal rail conductors and various methods for fabricating these non-planar semiconductor devices. In some situations, the one or more metal rail conductors can be electrically connected to gate, source, and/or drain regions of these various non-planar semiconductor devices. In these situations, the one or more metal rail conductors can be utilized to electrically connect the gate, the source, and/or the drain regions of various non-planar semiconductor devices to other gate, source, and/or drain regions of various non-planar semiconductor devices and/or other semiconductor devices. However, in other situations, the one or more metal rail conductors can be isolated from the gate, the source, and/or the drain regions these various non-planar semiconductor devices. This isolation prevents electrical connection between the one or more metal rail conductors and the gate, the source, and/or the drain regions these various non-planar semiconductor devices. |
| US10804397B2 |
Semiconductor device with surrounding gate transistor (SGT)
An SGT production method includes a first step of forming a fin-shaped semiconductor layer and a first insulating film; a second step of forming a second insulating film, depositing a first polysilicon, planarizing the first polysilicon, forming a third insulating film, forming a second resist, and etching the third insulating film, the first polysilicon, the second insulating film, and the fin-shaped semiconductor layer to form a pillar-shaped semiconductor layer, a first dummy gate, and a first hard mask; and a third step of forming a fourth insulating film, depositing a second polysilicon, planarizing the second polysilicon, subjecting the second polysilicon to etch back to expose the first hard mask, depositing a sixth insulating film, etching the sixth insulating film to form a second hard mask on a side wall of the first hard mask, and etching the second polysilicon to form a second dummy gate. |
| US10804394B2 |
Fin structures on a fully depleted semiconductor layer including a channel region
A transistor includes at least one fin structure (e.g., three fin structures) and a gate. The fin structure is disposed above a semiconductor layer above an insulator layer of a semiconductor on insulator substrate. The gate is disposed over at least three sides of the fin structure and a portion of the semiconductor layer. A channel for the transistor is disposed in fin structure and the portion under the gate. |
| US10804391B2 |
Vertical field-effect transistor (VFET) devices and methods of forming the same
Vertical field-effect transistor (VFET) devices and methods of forming VFET devices are provided. The methods may include forming a channel region that protrudes from an upper surface of a substrate in a vertical direction, forming a gate insulator layer on a side of the channel region, after forming the gate insulator layer, forming a top source/drain on the channel region, and forming a gate electrode on the gate insulator layer. |
| US10804389B2 |
LDMOS transistor
A MOS transistor includes a substrate, a first region, a second region, a source region, a drain region, an active gate stack, and a dummy gate stack. The substrate has a first conductivity. The first region having the first conductivity is formed in the substrate. The second region having a second conductivity is formed in the substrate and is adjacent to the first region. The source region with the second conductivity is formed in the first region. The drain region with the second conductivity is formed in the second region. The active gate stack is disposed on the first region. The dummy gate stack is disposed on the second region, and the dummy gate stack is electrically coupled to a variable voltage. |
| US10804386B2 |
Gate stack design for GaN e-mode transistor performance
A gate stack structure is disclosed for inhibiting charge leakage in III-V transistor devices. The techniques are particularly well-suited for use in enhancement-mode MOSHEMTs, but can also be used in other transistor designs susceptible to charge spillover and unintended channel formation in the gate stack. In an example embodiment, the techniques are realized in a transistor having a III-N gate stack over a gallium nitride (GaN) channel layer. The gate stack is configured with a relatively thick barrier structure and wide bandgap III-N materials to prevent or otherwise reduce channel charge spillover resulting from tunneling or thermionic processes at high gate voltages. The barrier structure is configured to manage lattice mismatch conditions, so as to provide a robust high performance transistor design. In some cases, the gate stack is used in conjunction with an access region polarization layer to induce two-dimensional electron gas (2DEG) in the channel layer. |
| US10804385B2 |
Semiconductor devices with fluorinated region and methods for forming the same
A semiconductor device includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a source/drain pair, a fluorinated region, and a gate. The channel layer is disposed over the substrate. The barrier layer is disposed over the channel layer. The compound semiconductor layer is disposed over the barrier layer. The source/drain pair is disposed over the substrate, wherein the source and the drain are located on opposite sides of the compound semiconductor layer. The fluorinated region is disposed in the compound semiconductor layer. The gate is disposed on the compound semiconductor layer. |
| US10804383B2 |
Single electron transistors having source/drain electrode insulating supports and an island extending therebetween
Disclosed herein are single electron transistor (SET) devices, and related methods and devices. In some embodiments, a SET device may include: first and second source/drain (S/D) electrodes disposed on a side face of a first insulating support and on a side face of a second insulating support, respectively; an island disposed between the first and second S/D electrodes and extending into an area between the first and second insulating supports. In some embodiments, a SET device may include: first and second S/D electrodes disposed on a substrate; an island disposed in an area between the first and second S/D electrodes; first and second portions of dielectric disposed between the island and the first and second S/D electrodes, respectively; and a third portion of dielectric disposed between the substrate and the island. |
| US10804382B2 |
Integrated ferroelectric capacitor/field effect transistor structure
A replacement gate structure (i.e., functional gate structure) is formed and recessed to provide a capacitor cavity located above the recessed functional gate structure. A ferroelectric capacitor is formed in the capacitor cavity and includes a bottom electrode structure, a U-shaped ferroelectric material liner and a top electrode structure. The bottom electrode structure has a topmost surface that does not extend above the U-shaped ferroelectric material liner. A contact structure is formed above and in contact with the U-shaped ferroelectric material liner and the top electrode structure of the ferroelectric capacitor. |
| US10804381B2 |
Structure and method for FinFET device with buried sige oxide
A semiconductor device includes a substrate and a fin feature over the substrate. The fin feature includes a first portion having a first semiconductor material and a second portion having a second semiconductor material over the first portion. The second semiconductor material is different from the first semiconductor material. The semiconductor device further includes an isolation feature over the substrate and over sides of the fin feature; a semiconductor oxide feature including the first semiconductor material and disposed on sidewalls of the first portion; and a gate stack disposed on the fin feature and the isolation feature. The gate stack includes a gate dielectric layer extending into recesses that are into a top portion of the semiconductor oxide feature and below the second portion of the fin feature. |
| US10804380B2 |
Fin and shallow trench isolation replacement to prevent gate collapse
A semiconductor structure and a method for fabricating the same. The structure includes a substrate, active fin structures, and non-active fin structures. The structure further includes isolation regions in contact with the active fin structures, and isolation regions in contact with the non-active fin structures. A first gate structure is in contact with the active fin structures and the isolation regions that are in contact with the active fin structures. A second gate structure is in contact with the non-active fin structures. The method includes forming an isolation region between fin structures. A mask is formed over active fin structures and dummy fin structures are then removed to form a plurality of trenches between the isolation regions. A nitride-based layer is formed in contact with isolation regions corresponding to the dummy fin structures. The nitride-based layer forms a non-active fin structure within each trench of the trenches. |
| US10804379B2 |
FinFET device and method of manufacturing
A method for producing a finFET to prevent gate contact and trench silicide (TS) electrical shorts. Embodiments include forming a finFET over a substrate, the finFET comprising an epi S/D region formed at sides of a gate; forming an α-Si layer in a recess over the epi S/D; forming an oxide layer over the α-Si layer; forming a non-TS isolation opening over the substrate; forming a low dielectric constant layer in the non-TS isolation opening; removing the oxide layer and α-Si layer; forming an opening over the gate and an opening over the epi S/D region; and forming a gate contact in the opening over the gate and an epi S/D contact over the opening over the epi S/D region. |
| US10804376B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes preparing a first wafer including a first trench; forming a first semiconductor layer inside the first trench so that a first space remains in the first trench; obtaining a first level corresponding to a bottom of the first space and a second level estimated by a size or a shape of the first space; preparing a second wafer including a second trench having a shape and a size substantially same as a shape and a size of the first trench; forming a second semiconductor layer inside the second trench in the second so that a second space remains in the second trench; forming a third semiconductor layer to fill the second space in the second trench; and removing a surface portion of the second wafer to a depth corresponding to a level between the first level and the second level. |
| US10804374B2 |
Spacer structure with high plasma resistance for semiconductor devices
Semiconductor device structures comprising a spacer feature having multiple spacer layers are provided. In one example, a semiconductor device includes an active area on a substrate, the active area comprising a source/drain region, a gate structure over the active area, the source/drain region being proximate the gate structure, a spacer feature having a first portion along a sidewall of the gate structure and having a second portion along the source/drain region, wherein the first portion of the spacer feature comprises a bulk spacer layer along the sidewall of the gate structure, wherein the second portion of the spacer feature comprises the bulk spacer layer and a treated seal spacer layer, the treated seal spacer layer being disposed along the source/drain region and between the bulk spacer layer and the source/drain region, and a contact etching stop layer on the spacer feature. |
| US10804372B2 |
Gate-all-around field effect transistor and method for manufacturing same
This application discloses a gate-all-around field effect transistor and a method for manufacturing same. In some implementations the method may include: forming a first fin structure on a substrate, where each first fin structure includes one first laminated structure, where the first laminated structure sequentially includes a sacrificial layer, a support layer, and a channel layer from bottom to top; forming a dummy gate structure across the first fin structure, where the dummy gate structure includes a dummy gate dielectric layer, a dummy gate on the dummy gate dielectric layer, and a first spacer on a side surface of the dummy gate; removing parts of the first fin structure located on two sides of the dummy gate structure, to form a second fin structure; performing first etching on a side surface of the sacrificial layer in the second fin structure, to form a first space; forming a second spacer in the first space; performing second etching on a side surface of the channel layer in the second fin structure, to form a second space; and performing selective epitaxy on the side surface of the channel layer in the second fin structure, to form a source region and a drain region, where along a direction of a channel, compared with a side surface, distal to the sacrificial layer, of the second spacer, the side surface of the channel layer after the second etching is closer to the sacrificial layer. |
| US10804371B2 |
Structure and formation method of semiconductor device with gate stack
A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a first gate electrode over the semiconductor substrate. The semiconductor device also includes a first gate dielectric layer between the first gate electrode and the semiconductor substrate. The semiconductor device further includes a second gate electrode over the semiconductor substrate. The second gate electrode has an upper portion and a lower portion between the upper portion and the semiconductor substrate, and the upper portion is wider than the lower portion. In addition, the semiconductor device includes a second gate dielectric layer between the second gate electrode and the semiconductor substrate. |
| US10804366B2 |
Integrated gate driver
A method is presented for forming a semiconductor device. The method may include forming a first gate structure on a first portion of a semiconductor material located on a surface of an insulating substrate, the first gate structure including a first sacrificial layer and a second sacrificial layer and forming a second gate structure on a second portion of the semiconductor material located on the surface of the insulating substrate, the second gate structure including a third sacrificial layer. The method further includes etching the first and second dielectric sacrificial layers to create a first contact region within the first gate structure and etching the third dielectric sacrificial layer to create a second contact region within the second gate structure. The method further includes forming silicide in at least the first and second contact regions of the first and second gate structures, respectively. |
| US10804358B2 |
Compound semiconductor device and method with high concentration dopant layer in regrown compound semiconductor
A compound semiconductor device includes: a compound semiconductor area in which a compound semiconductor plug is embedded and formed; and an ohmic electrode provided on the compound semiconductor plug, wherein the compound semiconductor plug includes, in a side surface portion that is as an interface with the compound semiconductor area, a high concentration dopant layer containing a dopant whose concentration is higher than that of other portions. |
| US10804354B2 |
Radio frequency resistor element
A radio frequency resistor element comprises a resistive polysilicon trace, an isolation component and a semiconductor substrate. The resistive polysilicon trace is located above the isolation component. The isolation component is laterally at least partially surrounded by a modified semiconductor region located above the semiconductor substrate and having a higher charge carrier recombination rate than the semiconductor substrate. |
| US10804353B2 |
Display apparatus with voltage sensing
A display apparatus includes: a substrate having a display area, a peripheral area outside the display area, a pad area in the peripheral area, and a bending area between the display area and the pad area; a thin film transistor in the display area and an organic light-emitting device electrically connected to the thin film transistor; a first voltage line between a side of the display area and the pad area, in the peripheral area, the first voltage line supplying a first voltage to the organic light-emitting device; and a first sensing line in the peripheral area, the first sensing line measuring the first voltage of the first voltage line, wherein a first contact where an end of the first sensing line and the first voltage line are connected is between the bending area and the display area. |
| US10804352B2 |
Display substrate edge patterning and metallization
A display includes a display substrate having a patterned edge, the patterned edge including a plurality of notches. The display further includes a plurality of display signal lines supported by the display substrate on a first side of the display substrate, and a display control circuit disposed along a second side of the display substrate, the second side being opposite the first side. The display control circuit includes a plurality of contacts. Each display signal line of the plurality of display signal lines is disposed in a respective notch of the plurality of notches to traverse the patterned edge to establish an electrical connection between each display signal line of the plurality of display signal lines and a respective contact of the plurality of contacts. |
| US10804351B2 |
Organic light-emitting diode display panel and display device
An organic light-emitting diode (OLED) display panel and a display device are provided. An array substrate in the OLED display panel is provided with a first retaining wall surrounding a display region of the array substrate, and a second retaining wall surrounding the first retaining wall. Multiple outer electrode lines are exposed in a gap region between the first retaining wall and the second retaining wall on the array substrate. At least one of the multiple outer electrode lines is provided with at least one outer blocking portion at an edge region on at least one side of the outer electrode line, and the outer blocking portion breaks an edge line on the side of the outer electrode line in an extending direction of the outer electrode line and in contact with the outer electrode line. |
| US10804349B2 |
Display panel and display device
A display panel includes a bending area and a non-bending area connected to the bending area. The display panel includes an array substrate. The array substrate includes a plurality of first pixel regions arranged in a plurality of rows parallel to each other and disposed in the bending area, and a plurality of second pixel regions arranged in a plurality of rows parallel to each other and disposed in the non-bending area; a plurality of flexible connection regions is formed for connecting adjacent ones of the first pixel regions, and for connecting the first pixel regions and the second pixel regions, wherein each flexible connection region has a slot, and the slot is filled with an organic photoresist layer. |
| US10804347B2 |
Display panel
A display panel includes a display device, a light-guiding structure and an anti-reflection structure. The light-guiding structure is disposed between the pixels to guide light beams emitted from the pixels toward a display surface. The anti-reflection structure is over the pixels of the display device, wherein the anti-reflection structure includes a photo-sensitive alignment layer, a liquid crystal circular polarizer and a linear polarizer. The photo-sensitive alignment layer is over the optical absorbing layer, wherein the photo-sensitive alignment layer is sensitive to and curable by the light within the wavelength range. The liquid crystal circular polarizer is over the photo-sensitive alignment layer, wherein the liquid crystal circular polarizer includes a plurality of liquid crystal molecules aligned by the photo-sensitive alignment layer. The linear polarizer is over the liquid crystal circular polarizer. |
| US10804340B2 |
Display device with light transmission control layer
A display device including a substrate, a circuit portion including a thin film transistor on the substrate, a display element on the circuit portion, the display element including a pixel electrode electrically connected to the thin film transistor, an encapsulation layer covering the display element, a color filter layer on the encapsulation layer, the color filter layer including a black matrix and a color filter, and a light transmission control layer located farther from the display element than the color filter layer in a direction perpendicular to an upper surface of the substrate, the light transmission control layer having light transmittance that varies according to an electrical signal. The light transmission control layer overlaps the black matrix. A width of the light transmission control layer is greater than a width of the black matrix. |
| US10804339B2 |
Naked-eye three-dimensional display device
Disclosed is a naked-eye three-dimensional display device, which is from top to bottom sequentially provided with a first substrate, a light-emitting layer, a second substrate, a first indium tin oxide (ITO) electrode layer, a three-dimensional prism liquid crystal layer, a second ITO electrode layer and a third substrate. One side of the first substrate facing the light-emitting layer is provided with thin film transistors arranged in a matrix form. Since the first ITO electrode layer is disposed directly on the second substrate, a substrate and a transparent photoresist layer are not used. Thus, the weight of the device is reduced, and the display brightness and the alignment accuracy are improved. When liquid crystal prism electrode units of the first ITO electrode layer and display regions of pixel units are configured to overlap with each other, the influence of transmitted light on naked eye 3D display can be avoided and the 3D display effect is improved. |
| US10804337B2 |
Touch sensor in-cell type organic electroluminescent device
Disclosed is an in-cell type organic electroluminescent device. The in-cell type organic electroluminescent device according to an embodiment of the present disclosure includes at least one OLED-driving Thin-Film Transistor (OLED driving TFT) that is formed on a substrate and drives an organic light emitting device (OLED); the OLED connected to the at least one OLED driving TFT through a first contact hole; at least one touch-sensing thin-film transistor (though sensing TFT) that is simultaneously formed with the at least one OLED driving TFT on the substrate and senses touch; and an touch electrode that is connected to the at least one touch sensing TFT through a second contact hole and does not overlap with the OLED, wherein the at least one OLED driving TFT and the at least one touch sensing TFT share a gate line. |
| US10804329B2 |
Display device and method of driving the same
A display device may include a first pixel including a first transistor, and a first light emitting element on and electrically connected to the first transistor, a second pixel adjacent the first pixel, the second pixel including a second transistor, and a second light emitting element on and electrically connected to the second transistor, and a reflective member at a layer that is above the first pixel and the second pixel, the reflective member being configured to reflect a light emitted from the second light emitting element to the first transistor. |
| US10804328B2 |
Solid-state imaging device, method of manufacturing the same, and electronic apparatus
A solid state imaging device that includes a substrate having oppositely facing first and second surfaces and a photoelectric conversion unit layer having a light incident side facing away from the substrate. The substrate includes a first photoelectric conversion unit and a second photoelectric conversion and the photoelectric conversion layer includes a third photoelectric conversion unit. |
| US10804327B2 |
Organic photoelectric device and image sensor and electronic device
Disclosed are an organic photoelectric device including a first electrode and a second electrode facing each other and a photoelectric conversion layer disposed between the first electrode and the second electrode and selectively absorbing light in a green wavelength region, wherein the photoelectric conversion layer includes a first and second photoelectric conversion materials, a light-absorption full width at half maximum (FWHM) in a green wavelength region of the first photoelectric conversion material is narrower than the light-absorption FWHM in a green wavelength region of the second photoelectric conversion material, and the first and second photoelectric conversion materials satisfy Relationship Equation 1, and an image sensor and an electronic device including the same. Tm2(° C.)−Ts2(10)(° C.)≥Tm1(° C.)−Ts1(10)(° C.) [Relationship Equation 1] |
| US10804325B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes a substrate, a first signal line, a first conductive layer, a first storage layer and a first insulation layer. The first signal line extends in a first direction crossing the substrate. The first conductive layer extends in a second direction crossing the first direction and being parallel to the substrate, and has a first surface and a second surface that is away from the first signal line in a third direction crossing the first and second directions. The first storage layer is provided between the first signal line and the first conductive layer. The first insulation layer is provided between the second surface and the first storage layer. |
| US10804322B2 |
Cross-point array device and method of manufacturing the same
A cross-point array device includes a substrate, a first conductive line disposed over the substrate and extending in a first direction, a plurality of pillar structures disposed on the first conductive line, each of the pillar structure comprising a memory electrode, a resistive memory layer disposed along surfaces of the pillar structures, a threshold switching layer disposed on the resistive memory layer, and a second conductive line electrically connected to the threshold switching layer and extending a second direction that is not parallel to the first conductive line. |
| US10804321B2 |
Switch device and storage unit
A switch device according to an embodiment of the technology includes a first electrode, a second electrode that is disposed to face the first electrode, and a switch layer that is provided between the first electrode and the second electrode. The switch layer contains a chalcogen element. The switch layer includes a first region and a second region which have different composition ratios of one or more of chalcogen elements or different types of the one or more of chalcogen elements. The first region is provided close to the first electrode. The second region is provided closer to the second electrode than the first region. |
| US10804311B2 |
Semiconducting device, and appliance having the semiconducting device
A first conductive pattern and a third conductive pattern are joined to each other in a junction plane, and a second conductive pattern and a fourth conductive pattern are joined to each other in the junction plane, and an insulation layer is arranged at least in one of spaces between the first conductive pattern and the second conductive pattern and between the third conductive pattern and the fourth conductive pattern. |
| US10804309B2 |
Photodetector
A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode. |
| US10804307B2 |
Increased optical path for long wavelength light by grating structure
Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector. |
| US10804306B2 |
Solid-state imaging devices having flat microlenses
A solid-state imaging device having flat microlenses is provided. The solid-state imaging device includes a semiconductor substrate having a plurality of photoelectric conversion elements. The solid-state imaging device further includes a color filter layer disposed above the semiconductor substrate. The solid-state imaging device also includes a microlens having a flat top surface disposed on the color filter layer. The flat top surface of the microlens is directly above the photoelectric conversion element, and the area of the flat top surface of the microlens is equal to the area of the photoelectric conversion element. |
| US10804304B2 |
Image sensors
Image sensors are provided. An image sensor includes a semiconductor substrate including a pixel region and an optical black region. The image sensor includes a plurality of photoelectric conversion regions in the pixel region. The image sensor includes a wiring structure on a first surface of the semiconductor substrate. The image sensor includes a light shielding layer on a second surface of the semiconductor substrate in the optical black region. Moreover, the image sensor includes a light shielding wall structure that is in the semiconductor substrate between the pixel region and the optical black region and that is connected to the light shielding layer. |
| US10804303B2 |
Image sensors comprising an organic photo-detector, a photo-detector array and dual floating diffusion nodes and electronic devices including the same
An image sensor may include an organic photo-detector configured to selectively detect a near infrared wavelength spectrum of light and photoelectrically convert the detected near infrared wavelength spectrum of light, and a photo-detector array on the organic photo-detector, the photo-detector array including a photo-detector configured to detect a limited wavelength spectrum of visible light and photoelectrically convert the limited wavelength spectrum of visible light. The image sensor may discharge charges photoelectrically converted by the photo-detector to a first floating diffusion node, and the image sensor may discharge charges photoelectrically converted by the organic photo-detector to a second floating diffusion node. An area of the first floating diffusion node may be greater than an area of the second floating diffusion node. |
| US10804293B2 |
Nonvolatile memory device, vertical NAND flash memory device and SSD device including the same
A nonvolatile memory device includes a semiconductor substrate including a page buffer region, a memory cell array, bitlines, first vertical conduction paths, and second vertical conduction paths. The memory cell array is formed in a memory cell region above the semiconductor substrate and includes memory cells. The bitlines extend in a column direction above the memory cell array. Each of bitlines is cut into each of first bitline segments and each of second bitline segments. The first vertical conduction paths extend in a vertical direction and penetrate a column-directional central region of the memory cell region. The first vertical conduction paths connect the first bitline segments and the page buffer region. The second vertical conduction paths extend in the vertical direction and penetrate the column-directional central region. The second vertical conduction paths connect the second bitline segments and the page buffer region. |
| US10804287B2 |
Three-dimensional memory devices and fabricating methods thereof
A method for forming a 3D memory device is disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a plurality of channel holes penetrating the alternating dielectric stack; forming a channel structure in each channel hole; forming a channel column structure on the channel structure in each channel hole; trimming an upper portion of each channel column structure to form a channel plug; and forming a top selective gate cut between neighboring channel plugs. |
| US10804286B2 |
Semiconductor device and manufacturing method of semiconductor device
According to one embodiment, a semiconductor device includes: a stack body including an insulator, a first conductor and a second conductor stacked stepwise by interposing the insulator and electrically disconnected from each other; and a first contact plug which reaches the first conductor from a region above the stack body. The first conductor includes a first portion positioned below the insulator, a second portion positioned above the insulator, and a third portion that electrically connects the first portion of the first conductor and the second portion of the first conductor. The third portion of the first conductor is provided in an opening formed on the insulator. |
| US10804283B2 |
Openings layout of three-dimensional memory device
Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening. |
| US10804281B2 |
Anti-dishing structure for embedded memory
Some embodiments of the present application are directed towards an integrated circuit (IC). The integrated circuit includes a semiconductor substrate having a peripheral region and a memory cell region separated by an isolation structure. The isolation structure extends into a top surface of the semiconductor substrate and comprises dielectric material. A logic device is arranged on the peripheral region. A memory device is arranged on the memory region. The memory device includes a gate electrode and a memory hardmask over the gate electrode. An anti-dishing structure is disposed on the isolation structure. An upper surface of the anti-dishing structure and an upper surface of the memory hardmask have equal heights as measured from the top surface of the semiconductor substrate. |
| US10804280B2 |
Memory device with vertical string drivers
Embodiments of the present disclosure are directed towards a memory device with vertical string drivers, in accordance with some embodiments. In one embodiment, the memory device includes a plurality of wordlines formed in a stack of multiple tiers. The device further includes a semiconductor layer disposed on top of the plurality of wordlines. The device further includes a plurality of string drivers disposed in the semiconductor layer substantially perpendicular to the tier stack of the plurality of wordlines. The semiconductor layer provides respective gate connections for the plurality of string drivers. In some embodiments, the semiconductor layer may be fabricated of polysilicon. Other embodiments may be described and/or claimed. |
| US10804279B2 |
Source structure of three-dimensional memory device and method for forming the same
Embodiments of source structure of a three-dimensional (3D) memory device and method for forming the source structure of the 3D memory device are disclosed. In an example, a NAND memory device includes a substrate, an alternating conductor/dielectric stack, a NAND string, a source conductor layer, and a source contact. The alternating conductor/dielectric stack includes a plurality of conductor/dielectric pairs above the substrate. The NAND string extends vertically through the alternating conductor/dielectric stack. The source conductor layer is above the alternating conductor/dielectric stack and is in contact with an end of the NAND string. The source contact includes an end in contact with the source conductor layer. The NAND string is electrically connected to the source contact by the source conductor layer. In some embodiments, the source conductor layer includes one or more conduction regions each including one or more of a metal, a metal alloy, and a metal silicide. |
| US10804271B2 |
Semiconductor structure and device each having differential etch stop layer over gate spacer
Methods of forming a differential layer, such as a Contact Etch Stop Layer (CESL), in a semiconductor device are described herein, along with structures formed by the methods. In an embodiment, a structure includes an active area on a substrate, a gate structure over the active area, a gate spacer along a sidewall of the gate structure, and a differential etch stop layer. The differential etch stop layer has a first portion along a sidewall of the gate spacer and has a second portion over an upper surface of the source/drain region. A first thickness of the first portion is in a direction perpendicular to the sidewall of the gate spacer, and a second thickness of the second portion is in a direction perpendicular to the upper surface of the source/drain region. The second thickness is greater than the first thickness. |
| US10804269B2 |
Method of fabricating semiconductor device
A method of fabricating a semiconductor device includes pattering an upper portion of a substrate to form a first active pattern, the substrate including a semiconductor element having a first lattice constant, performing a selective epitaxial growth process on an upper portion of the first active pattern to form a first source/drain region, doping the first source/drain region with gallium, performing an annealing process on the first source/drain region doped with gallium, and forming a first contact pattern coupled to the first source/drain region. The first source/drain region includes a semiconductor element having a second lattice constant larger than the first lattice constant. |
| US10804264B2 |
Integrated circuit device
An integrated circuit device includes a substrate from which a plurality of fin-type active regions protrude, the plurality of fin-type active regions extending in parallel to one another in a first direction, and a plurality of gate structures and a plurality of fin-isolation insulating portions extending on the substrate in a second direction crossing the first direction and at a constant pitch in the first direction, wherein a pair of fin-isolation insulating portions from among the plurality of fin-isolation insulating portions are between a pair of gate structures from among the plurality of gate structures, and the plurality of fin-type active regions include a plurality of first fin-type regions and a plurality of second fin-type regions. |
| US10804263B2 |
Switching field plate power MOSFET
A power MOSFET IC device including a source-down enhancement mode transistor formed in a semiconductor substrate and a depletion mode transistor formed in a doped region of the semiconductor substrate. A gate terminal of the depletion mode transistor is formed over at least a portion of the doped region as a field plate that is switchably connectable to a source terminal of the source-down enhancement mode transistor. A control circuit may be provided to facilitate a connection between the gate terminal of the depletion mode transistor and the source terminal of the source-down enhancement mode transistor when the power MOSFET integrated circuit is in an OFF state. The control circuit may also be configured to facilitate connection of the gate terminal of the depletion mode transistor to a gate terminal of the source-down enhancement mode FET device or to an external driver that provides a reference voltage, when the power MOSFET is in an ON state. |
| US10804261B2 |
Indirect readout FET
A metal-insulator-metal (MIM) capacitor structure includes source and drain regions formed within a semiconductor substrate, a first conducting layer formed over the source and drain regions, and a dielectric layer formed over the first conducting layer. The MIM capacitor structure further includes a second conducting layer formed over the dielectric layer, and a sidewall dielectric formed adjacent the first conducting layer and the dielectric layer. An electric field is created indirectly through the sidewall dielectric to an adjacent field effect transistor (FET) channel in the semiconductor substrate. |
| US10804257B2 |
Integrated circuit and semiconductor device
In one embodiment, the standard cell includes first and second active regions defining an intermediate region between the first and second active regions; and first, second and third gate lines crossing the first and second active regions and crossing the intermediate region. The first gate line is divided into an upper first gate line and a lower first gate line by a first gap insulating layer in the intermediate region, the second gate line is undivided, and the third gate line is divided into an upper third gate line and a lower third gate line by a second gap insulating layer in the intermediate region. |
| US10804256B2 |
Semiconductor die assemblies having molded underfill structures and related technology
A semiconductor die assembly in accordance with an embodiment of the present technology includes first and second semiconductor dies and a package substrate carrying the first and second semiconductor dies. The second semiconductor die includes a first peripheral portion extending laterally outward beyond a first edge surface of the first semiconductor die. Similarly, the package substrate includes a second peripheral portion extending laterally outward beyond a second edge surface of the second semiconductor die. The semiconductor die assembly further includes a first volume of molded underfill material between the first and second semiconductor dies, a second volume of molded underfill material between the package substrate and the second semiconductor die, a first molded peripheral structure laterally adjacent to the first edge surface of the first semiconductor die, and a second molded peripheral structure laterally adjacent to the second edge surface of the second semiconductor die. |
| US10804254B2 |
Fan-out package with cavity substrate
Structures and methods of forming fan-out packages are provided. The packages described herein may include a cavity substrate, one or more semiconductor devices located in a cavity of the cavity substrate, and one or more redistribution structures. Embodiments include a cavity preformed in a cavity substrate. Various devices, such as integrated circuit dies, packages, or the like, may be placed in the cavity. Redistribution structures may also be formed. |
| US10804251B2 |
Light emitting diode (LED) devices, components and methods
Devices, components and methods containing one or more light emitter devices, such as light emitting diodes (LEDs) or LED chips, are disclosed. In one aspect, a light emitter device component can include a metallic substrate with a mirrored surface, one or more light emitter devices mounted directly or indirectly on the mirrored surface, and one or more electrical components mounted on the top surface and electrically coupled to the one or more light emitter devices, wherein the one or more electrical components can be spaced from the mirrored metal substrate by one or more non-metallic layers. Components disclosed herein can result in improved thermal management and light output. |
| US10804246B2 |
Microelectronics package with vertically stacked dies
The present disclosure relates to a microelectronics package with vertically stacked flip-chip dies, and a process for making the same. The disclosed microelectronics package includes a module board, a first thinned flip-chip die with a through-die via, a second flip-chip die with a package contact at the bottom, and a mold compound. Herein, a top portion of the through-die via is exposed at top of the first thinned flip-chip die. The first thinned flip-chip die and the mold compound reside over the module substrate. The mold compound surrounds the first thinned flip-chip die and extends above the first thinned flip-chip die to define an opening. The second flip-chip die, which has a smaller plane size than the first thinned flip-chip die, resides within the opening and is stacked with the first thinned flip-chip die by coupling the package contact to the exposed top portion of the through-die via. |
| US10804245B2 |
Semiconductor structure and manufacturing method thereof
A method of manufacturing a semiconductor structure includes providing a substrate including a redistribution layer (RDL) disposed over the substrate, disposing a first patterned mask over the RDL, disposing a first conductive material over the RDL exposed from the first patterned mask to form a first conductive pillar, removing the first patterned mask, disposing a second patterned mask over the RDL, disposing a second conductive material over the RDL exposed from the second patterned mask to form a second conductive pillar, removing the second patterned mask, disposing a first die over the first conductive pillar, and disposing a second die over the second conductive pillar. A height of the second conductive pillar is substantially greater than a height of the first conductive pillar. |
| US10804244B2 |
Semiconductor package structure and method of manufacturing the same
A semiconductor package structure includes a redistribution (RDL) layer, a first chip, at least one second chip, an encapsulant and a third chip. The redistribution layer has a first surface and a second surface opposite to each other. The first chip is over the first surface of the redistribution layer and electrically connected to the redistribution layer. The second chip is over the first surface of the redistribution layer. The second chip includes a plurality of through via structures. The encapsulant is over the first surface of the distribution layer, wherein the encapsulant surrounds the first chip and the second chip. The third chip is over the encapsulant and electrically connected to the first chip through the through via structures of the second chip and the redistribution layer. |
| US10804241B2 |
Non-porous copper to copper interconnect
A semiconductor structure which includes a first semiconductor substrate having a first plurality of copper connectors; a second semiconductor substrate having a second plurality of copper connectors; and a joining structure joining the first plurality of copper connectors to the second plurality of copper connectors, the joining structure including a copper intermetallic mesh having pores filled with silver. |
| US10804240B2 |
Method of mounting conductive ball
Provided is a method of mounting a conductive ball, and more particularly, a method of mounting a conductive ball, whereby defects during a process of mounting a conductive ball on a substrate by using a mounting hole formed in a mask may be prevented, and a conductive ball having a small size may also be effectively mounted on the substrate. According to the method of mounting a conductive ball, a process of mounting a conductive ball may be performed by preventing deformation of a mask, thus achieving a high quality of the process without omitting any conductive balls. |
| US10804236B2 |
Power electronic assemblies with high purity aluminum plated substrates
An assembly that includes a first substrate, a second substrate, and a stress mitigation layer disposed between the first and the second substrates. The stress mitigation layer is directly bonded onto the second substrate, and the second substrate is separated from the intermetallic compound layer by the stress mitigation layer. The stress mitigation layer has a high purity of at least 99% aluminum such that the stress mitigation layer reduces thermomechanical stresses on the first and second substrates. The assembly further includes an intermetallic compound layer disposed between the first substrate and the stress mitigation layer such that the stress mitigation layer is separated from the first substrate by the intermetallic compound layer. |
| US10804231B2 |
Passivation scheme for pad openings and trenches
An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer. |
| US10804230B2 |
Semiconductor package and method of manufacturing the same
The present disclosure provides a semiconductor package, including a first conductive feature configured as an I/O terminal of the semiconductor package, a first passivation layer, a capacitor, and a second passivation layer. The first conductive feature includes a redistribution portion and a via portion. The maximum width of the redistribution portion along a first direction is more than 10 times the maximum width of the via portion along the first direction. The first passivation layer is surrounding the via portion of the first conductive feature. The capacitor is substantially within the first passivation layer and electrically coupled to the first conductive feature. The second passivation layer is formed on the first passivation layer and surrounding the redistribution portion of the first conductive feature. A method of manufacturing the semiconductor package is also provided. |
| US10804224B2 |
Semiconductor structures with improved bonding and fabrication methods thereof
A method for fabricating a semiconductor structure includes providing a wafer and a carrier wafer. The wafer includes a first bonding surface and a plurality of radio-frequency (RF) devices and the carrier wafer includes a second bonding surface. The method further includes performing a surface treatment process on the second bonding surface to convert a surface portion of the carrier wafer into a barrier layer to suppress movement of induced electrical charges in the carrier wafer, and then bonding the wafer with the carrier wafer through the first bonding surface and the second bonding surface, respectively. |
| US10804222B2 |
Integrated circuit containing a decoy structure formed by an electrically insulated silicide sector
An integrated circuit includes a substrate, an interconnection part, and an isolating region located between the substrate and the interconnection part. A decoy structure is located within the isolating region and includes a silicided sector which is electrically isolated from the substrate. |
| US10804219B2 |
Semiconductor device
A semiconductor device includes a plurality of lower electrodes repeatedly arranged at a first pitch in a first direction and a second direction crossing the first direction at an acute angle on a substrate, and a support pattern in contact with sidewalls of the plurality of lower electrodes and supporting the plurality of lower electrodes. The support pattern includes a first support region having a plurality of openings penetrating the support pattern and a second support region disposed at a periphery of the first support region. The plurality of openings may continuously extend in a zigzag manner, respectively, throughout an entirety of the first support region. |
| US10804217B2 |
EMI shielding for flip chip package with exposed die backside
A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die. |
| US10804214B2 |
Group III-N material conductive shield for high frequency metal interconnects
Integrated circuit structures configured with low loss transmission lines are disclosed. The structures are implemented with group III-nitride (III-N) semiconductor materials, and are well-suited for use in radio frequency (RF) applications where high frequency signal loss is a concern. The III-N materials are effectively used as a conductive ground shield between a transmission line and the underlying substrate, so as to significantly suppress electromagnetic field penetration at the substrate. In an embodiment, a group III-N polarization layer is provided over a gallium nitride layer, and an n-type doped layer of indium gallium nitride (InzGa1-zN) is provided over or adjacent to the polarization layer, wherein z is in the range of 0.0 to 1.0. In addition to providing transmission line ground shielding in some locations, the III-N materials can also be used to form one or more active and/or passive components (e.g., power amplifier, RF switch, RF filter, RF diode, etc). |
| US10804209B2 |
Semiconductor packages including a supporting block supporting an upper chip stack
A semiconductor package includes a package substrate, a first chip stack, a second chip stack, and a supporting block. The first chip stack includes first semiconductor chips stacked on the package substrate to be offset in a first direction, and the second chip stack includes second semiconductor chips stacked on the first chip stack to be offset in a second direction. The supporting block includes a through via structure. The second chip stack is supported by the first chip stack and the supporting block. |
| US10804208B2 |
Interposer for an integrated system and corresponding design method
An interposer for an integrated system comprises a plurality of first connecting members and a plurality of second connecting members to be electrically connected to each other and a contact area realizing an electric short circuit of a group of the first connecting members which are electrically equivalent or homologous transporting a same signal, the contact area being electrically connected with at least one of the second connecting members thus realizing a scrambling between a number of the first connecting members and a number of the second connecting members. |
| US10804197B1 |
Memory die containing stress reducing backside contact via structures and method of making the same
A three-dimensional memory device includes a pair of alternating stacks of insulating layers and electrically conductive layers located over a semiconductor region, and laterally spaced from each other by a backside trench, memory stack structures extending through the pair of alternating, each memory stack structure containing a vertical semiconductor channel and a memory film, and a backside contact assembly located in the backside trench. The backside contact assembly includes an isolation dielectric spacer contacting the pair of alternating stacks, a conductive liner contacting inner sidewalls of the isolation dielectric spacer and a top surface of the semiconductor region, and composite non-metallic core containing at least one outer dielectric fill material portion that is laterally enclosed by a lower portion of the conductive liner and a dielectric core contacting an inner sidewall of the at least one outer dielectric fill material portion. |
| US10804195B2 |
High density embedded interconnects in substrate
A device that includes a die and a substrate coupled to the die. The substrate includes a dielectric layer and a plurality of embedded interconnects. Each embedded interconnect located through a first planar surface of the substrate such that a first portion of the embedded interconnect is located within the dielectric layer and a second portion of the embedded interconnect is external of the dielectric layer. In some implementations, the substrate includes a core layer. In some implementations, the dielectric layer and the plurality of embedded interconnects may be part of a build up layer of the substrate. |
| US10804190B2 |
Multi-chip module and method for manufacturing same
A multi-chip module includes a plurality of chip parts with each chip part having an electrode, a sealing resin for sealing the plurality of chip parts, and an external connection terminal secured to the sealing resin so as to be exposed from the outer surface of the sealing resin and electrically connected to the electrode of at least one of the chip parts. |
| US10804180B2 |
Semiconductor device and method for manufacturing the same
A device includes a non-insulator structure, a first ILD layer, a first thermal via, and a first electrical via. The first ILD is over the non-insulator structure. The first thermal via is through the first ILD layer and in contact with the non-insulator structure. The first electrical via is through the first ILD layer and in contact with the non-insulator structure. The first thermal via and the first electrical via have different materials and the same height. |
| US10804176B2 |
Low stress moisture resistant structure of semiconductor device
A low stress moisture resistant structure of semiconductor device comprises a low stress moisture resistant layer, wherein a semiconductor device is formed on a semiconductor wafer, the semiconductor device comprises at least one pad, the low stress moisture resistant layer is coated on the semiconductor device and the semiconductor wafer so that a pad top center surface of the pad is exposed. The low stress moisture resistant layer comprises a material comprising crosslinked fluoropolymer. A before-coated stress measured on the semiconductor wafer before the low stress moisture resistant layer is coated and an after-cured stress measured on the semiconductor wafer after the low stress moisture resistant layer is coated and cured define a stress difference, the stress difference is greater than or equal to −5×107 dyne/cm2 and less than or equal to 5×107 dyne/cm2. |
| US10804175B2 |
Semiconductor devices comprising getter layers and methods of making and using the same
Semiconductor devices comprising a getter material are described. The getter material can be located in or over the active region of the device and/or in or over a termination region of the device. The getter material can be a conductive or an insulating material. The getter material can be present as a continuous or discontinuous film. The device can be a SiC semiconductor device such as a SiC vertical MOSFET. Methods of making the devices are also described. Semiconductor devices and methods of making the same comprising source ohmic contacts formed using a self-aligned process are also described. The source ohmic contacts can comprise titanium silicide and/or titanium silicide carbide and can act as a getter material. |
| US10804173B2 |
Lid structure and semiconductor device package including the same
The present disclosure relates to a semiconductor device package, which includes a carrier, a lid, a first adhesive layer and a constraint structure. The carrier includes a surface and a first conductive pad on the surface of the carrier. The lid includes a first portion and a second portion separated from the first portion on the surface of the carrier. The first conductive pad is disposed between the first portion of the lid and the surface of the carrier. The first adhesive layer includes a first portion between the first portion of the lid and the first conductive pad. The constraint structure surrounds the first adhesive layer. |
| US10804168B2 |
Induced warpage of a thermal conductor
Particular embodiments described herein provide for a silicon layer, where the silicon layer includes a profile and a thermal conductor coupled to the silicon layer, where the thermal conductor includes one or more residual stresses. The thermal conductor is modified based on the one or more residual stress such that when pressure is applied to the thermal conductor, a profile of the thermal conductor at least approximately matches the profile of the silicon layer. In an example, the thermal conductor is modified by removing material from one or more areas of the thermal conductor and the thermal conductor is coupled to the silicon layer by one or more pressure inducing mechanisms. |
| US10804164B2 |
Method of manufacturing semiconductor device
To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a ground plane region of an n-type MISFET is formed by ion-implanting a p-type impurity and nitrogen (N) and a ground plane region of a p-type MISFET is formed by ion-implanting an n-type impurity and one of carbon (C) and fluorine (F). |
| US10804163B2 |
Method of metal gate formation and structures formed by the same
A method of forming a semiconductor structure includes: providing a substrate; forming a first pair of source/drain regions in the substrate; disposing an interlayer dielectric layer over the substrate, the interlayer dielectric layer having a first trench between the first pair of source/drain regions; depositing a dielectric layer in the first trench; depositing a barrier layer over the dielectric layer; removing the barrier layer from the first trench to expose the dielectric layer; depositing a work function layer over the dielectric layer in the first trench; and depositing a conductive layer over the work function layer in the first trench. |
| US10804162B2 |
Dual channel gate all around transistor device and fabrication methods thereof
A method that includes forming first semiconductor layers and second semiconductor layers disposed over a substrate, wherein the first and second semiconductor layers have different material compositions, are alternatingly disposed, and extend over first and second regions of the substrate; patterning the first and the second semiconductor layers to form a first fin in the first region and a second fin in the second region; removing the first semiconductor layers from the first and second fins such that a first portion of the patterned second semiconductor layers becomes first suspended nanostructures in the first fin and that a second portion of the patterned second semiconductor layers becomes second suspended nanostructures in the second fin; forming third semiconductor layers on the second suspended nanostructures in the second fin; and performing an anneal process to drive materials contained in the third semiconductor layers into corresponding second suspended nanostructures in the second fin. |
| US10804158B2 |
Methods of fabricating semiconductor devices including differing barrier layer structures
A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process. |
| US10804156B2 |
Techniques for forming dual epitaxial source/drain semiconductor device
A method of forming a three-dimensional transistor device. The method may include providing a transistor structure, where the transistor structure includes a fin assembly, a gate assembly, the gate assembly disposed over the fin assembly and comprising a plurality of gates, a liner layer, disposed over the plurality of gates, and an isolation layer, disposed subjacent the liner layer. The method may also include directing first angled ions at the transistor device, wherein a first altered liner layer is created in the liner layer, wherein, in the presence of a liner-removal etchant, the liner layer exhibits a first etch rate, the first altered liner layer exhibits a second etch rate, greater than the first etch rate. |
| US10804153B2 |
Semiconductor device and method to minimize stress on stack via
A semiconductor device has a semiconductor die. A first insulating layer is disposed over the semiconductor die. A first via is formed in the first insulating layer over a contact pad of the semiconductor die. A first conductive layer is disposed over the first insulating layer and in the first via. A second insulating layer is disposed over a portion of the first insulating layer and first conductive layer. An island of the second insulating layer is formed over the first conductive layer and within the first via. The first conductive layer adjacent to the island is devoid of the second insulating layer. A second conductive layer is disposed over the first conductive layer, second insulating layer, and island. The second conductive layer has a corrugated structure. A width of the island is greater than a width of the first via. |
| US10804152B2 |
Method of manufacturing semiconductor device
According to one embodiment, a method of manufacturing a semiconductor device includes: bonding a first surface of a device substrate on which a device is formed on a first surface to a support substrate via an adhesive; after bonding the device substrate to the support substrate, grinding and thinning a second surface side opposite to the first surface of the device substrate based on an in-plane processing rate at the time of forming a semiconductor substrate by RIE; after thinning the device substrate, forming a hole penetrating the device substrate by RIE; and burying metal in the hole to forma through electrode. |
| US10804151B2 |
Systems and methods for producing flat surfaces in interconnect structures
In interconnect fabrication (e.g. a damascene process), a barrier layer (possibly conductive) is formed over a substrate with holes, a conductor is formed over the barrier layer, and the conductor and the barrier layer are polished to expose the substrate around the holes and provide interconnect features in the holes. To prevent erosion/dishing of the conductor over the holes, the conductor is covered by another, “first” layer before polishing; then the first layer, the conductor, and the barrier layer are polished to expose the substrate. The first layer may or may not be conductive. The first layer protects the conductor to reduce or eliminate the conductor erosion/dishing over the holes. |
| US10804150B2 |
Semiconductor structure
Semiconductor structures are provided. A semiconductor structure includes a substrate having a device region, a seal ring region surrounding the device region, and a dielectric layer disposed thereon. A first seal ring structure is located within the dielectric layer on the seal ring region, and includes a plurality of first connection layers overlappingly disposed and separated by the dielectric layer. At least one first connection layer is formed by a plurality of discrete sub-connection layers. The first seal ring structure further includes a plurality of first conductive plugs between vertically adjacent first connection layers. A top of each first conductive plug is connected to an upper first connection layer. A bottom of each first conductive plug between at least two vertically adjacent first connection layers extends into the dielectric layer between horizontally adjacent sub-connection layers of a lower first connection layer. |
| US10804147B2 |
Semiconductor device with reduced via resistance
A semiconductor interconnect structure that has a first portion included in an upper interconnect level and a second portion included in a lower interconnect level. The semiconductor interconnect structure has a segment of dielectric capping material that is in contact with the bottom of the first portion, which separates, in part, the upper interconnect level from a lower interconnect level. The second portion is in electrical contact with the first portion. |
| US10804143B2 |
Semiconductor structure and method for manufacturing the same
A semiconductor structure includes an integrated circuit, a first dielectric layer, an etching stop layer, a barrier layer, a conductive layer, and a second dielectric layer. The first dielectric layer is over the integrated circuit. The etching stop layer is over the first dielectric layer. The barrier layer has an upper portion extending along a top surface of the etching stop layer and a lower portion extending downwardly from the upper portion along a sidewall of the etching stop layer and a sidewall of the first dielectric layer. The conductive layer is over the barrier layer and having a void region extending through the conductive layer, the barrier layer and the etching stop layer. The second dielectric layer is over the conductive layer and the void region. |
| US10804139B2 |
Semiconductor system
This application is directed to a system including a plurality of devices that are stacked one on top of another. Each device includes a substrate having two opposing surfaces. A first row of contacts is coupled on a first surface and includes a first contact and a second contact that are adjacent to each other. A second row of contacts is coupled on a respective second surface and includes a third contact. Each contact in the second row of contacts is physically aligned with an opposite contact in the first row. The third contact is disposed opposite and physically aligned with the first contact in the first row, and electrically coupled to the second contact in the first row. Operational circuitry is electrically coupled to at least the first contact on the first row, and at least two of the plurality of devices have distinct operational circuitry. |
| US10804138B2 |
Method for fabricating a semiconductor device
A method for fabricating a semiconductor device includes the steps of: providing a first dielectric layer having a metal layer therein; forming a second dielectric layer on the first dielectric layer and the metal layer; forming a metal oxide layer on the second dielectric layer; performing a first etching process by using a chlorine-based etchant to remove part of the metal oxide layer to forma via opening and expose the second dielectric layer; forming a block layer on sidewalls of the metal oxide layer and a top surface of the second dielectric layer; and performing a second etching process by using a fluorine-based etchant to remove part of the block layer and part of the second dielectric layer for exposing a top surface of the metal layer. |
| US10804131B2 |
Carrier plate removing method
There is provided a carrier plate removing method of removing a carrier plate from a workpiece disposed on a front surface of the carrier plate with a provisional bond layer interposed between the carrier plate and the workpiece. The carrier plate removing method includes a first holding step of holding the carrier plate and exposing the workpiece, a stepped portion forming step of forming a stepped portion in which an back surface side projects outward of a front surface side at an outer peripheral edge of the carrier plate, a second holding step of holding the workpiece and exposing the carrier plate, and a carrier plate removing step of removing the carrier plate from the workpiece by applying a force to the stepped portion and moving the carrier plate in a direction of being separated from the workpiece by a removing unit. |
| US10804126B2 |
Method for manufacturing circuit board and stacking structure applied thereto
A method for manufacturing a circuit board includes forming recess structures on a transferring layer; forming a dielectric layer on the transferring layer to form a stacking structure, in which the dielectric layer is at least embedded with the recess structures; bonding the stacking structure a base board by pressing, such that the dielectric layer is in contact with the base board; patterning the dielectric layer, including performing an exposure process on the stacking structure through the transferring layer; and after the exposure process is finished, removing the transferring layer. |
| US10804121B2 |
Substrate treatment apparatus, substrate treatment method, and method for manufacturing substrate
According to an embodiment, a substrate treatment apparatus includes, a substrate support unit supporting a substrate, a rotary unit rotating the substrate, a treatment liquid supply unit supplying treatment liquid to a surface of the substrate, and a controller performing liquid discharge treatment to change liquid discharge velocity at which the treatment liquid is discharged from the substrate, at preset predetermined timing, during substrate treatment in which the treatment liquid is supplied while the substrate is rotated, with the treatment continued. |
| US10804117B2 |
Method to enable interposer to interposer connection
A method of aligning semiconductor dies having metallic bumps in a mold chase for further processing. A plurality of semiconductor dies are placed in the mold chase at approximately desired locations for further processing. A plurality of magnets in a retainer are associated with the mold chase, the plurality of magnets being associated with respective ones of the plurality of semiconductor dies. The magnetic field of the magnets is applied to align and hold the plurality of dies at the desired location. The plurality of magnets may be adjustably mounted in the retainer so that they can be adjusted to more precisely align the semiconductor dies at the desired locations. |
| US10804114B2 |
Methods for making a multilevel leadframe by etching a conductive sheet from two opposite sides
A method for forming a multilevel leadframe for an integrated circuit is provided. A conductive sheet is etched from one side to form a thinner region within a frame region for leads lines and bond pads. The conductive sheet is etched to form a plurality of bond pads in a first level of the thinner region arranged in at least a first row and a second row. Each bond pad has a pad width and is separated from an adjacent bond pad by a bond pad clearance distance. The conductive sheet is etched from an opposite side to form a plurality of lead lines in a second level of the thinner region having a line width and is separated from an adjacent lead line by at least a lead line clearance distance. Each bond pad of the second plurality of bond pads is connected to one of the plurality of lead lines on the second level that is routed between adjacent bond pads in the first row, so that the lead lines are routed on a different level from the bond pads. |
| US10804112B2 |
Method for forming a planarization structure
A planarization structure is formed with a planar upper face enclosing a relief projecting from a planar substrate. The process used deposits a layer of a first material over the reliefs and then forms a layer of a second material with a planar upper face. This second material may be etched selectively with respect to the first material. The second layer is processed so that the protuberances of the first material are uncovered. A planarizing is then performed on the first material as far as the layer of the second material by selective chemical-mechanical polishing with respect to the second material. |
| US10804111B2 |
Method for roughening surface using wet treatment
A method for roughening a surface of a substrate, including: applying a composition containing inorganic particles and organic resin to the surface of the substrate and drying and curing the composition to form an organic resin layer; and etching the substrate by a solution containing hydrogen fluoride, hydrogen peroxide, or an acid, to roughen the surface. Preferably, the solution contains hydrogen fluoride and ammonium fluoride or hydrogen peroxide and ammonia, the resin layer contains a ratio of the particles to the resin of 5 to 50 parts by mass to 100 parts by mass, and the composition is a mixture of silica sol wherein silica is dispersed as the inorganic particles in organic solvent or titanium oxide sol wherein titanium oxide is dispersed, with a solution of the organic resin. |
| US10804110B2 |
Substrate processing apparatus, method of manufacturing semiconductor device and non-transistory computer-readable recording medium
Described herein is a technique capable of heating a substrate uniformly by electromagnetic waves. According to one aspect of the technique, there is provided a substrate processing apparatus including: a process chamber where a substrate is processed; a heating device configured to heat the substrate by electromagnetic waves; a gas supply mechanism including a hydrogen-containing gas supply system configured to supply a hydrogen-containing gas into the process chamber; a plasma generator configured to excite the hydrogen-containing gas by plasma; and a controller configured to control the heating device, the gas supply mechanism and the plasma generator to modify the substrate by performing: (a) adding hydrogen atom to a surface of the substrate by supplying the hydrogen-containing gas excited by the plasma generator onto the substrate; and (b) intermittently supplying the electromagnetic waves to heat the substrate after performing (a). |
| US10804108B2 |
Method for fabricating contacts in a phase-change material (PCM) RF switch having a heating element
In fabricating a radio frequency (RF) switch, a phase-change material (PCM) and a heating element, underlying an active segment of the PCM and extending outward and transverse to the PCM, are provided. Lower portions of PCM contacts for connection to passive segments of the PCM are formed, wherein the passive segments extend outward and are transverse to the heating element. Upper portions of the PCM contacts are formed from a lower interconnect metal. Heating element contacts are formed cross-wise to the PCM contacts. The heating element contacts can comprise a top interconnect metal directly connecting with terminal segments of the heating element. The heating element contacts can comprise a top interconnect metal and intermediate metal segments for connecting with the terminal segments of the heating element. |
| US10804107B2 |
Well and punch through stopper formation using conformal doping
A method for doping fins includes, for a first dopant layer formed in a first region and a second region to a height continuously below a top portion of a plurality of fins such that an entirety of the first dopant layer is formed below the top portion of the plurality of fins, and a dielectric layer formed over the top portion of the plurality of fins, removing the dielectric layer and the first dopant layer in the first region to expose a first fin in the first region, forming a second dopant layer over the first fin, and annealing to drive dopants into the fins from the first dopant layer in the second region and from the second dopant layer in the first region. |
| US10804106B2 |
High temperature ultra-fast annealed soft mask for semiconductor devices
Techniques for providing a high temperature soft mask for semiconductor devices are described. In an embodiment, spin coating semiconductor device components with organic planarization material having a defined aromatic content aromatic content to provide an organic planarization layer. The method can further comprise ultra-fast annealing the organic planarization layer and forming an implanted or doped region in the semiconductor device. Three-dimensional FinFET components of a device can be spin coated with organic planarization material having high aromatic content, with the device cured at a first temperature. The organic planarization layer can be ultra-fast annealed at a second temperature that is greater than the first temperature. Aspects can include patterning the device, and forming an implanted or doped region in a semiconductor device. |
| US10804105B2 |
Semiconductor device and manufacture thereof
A semiconductor device and its manufacturing method, relating to semiconductor techniques. The semiconductor device manufacturing method comprises: forming a patterned first hard mask layer on a substrate to define a position for buried layers; conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer and a second buried layer both having a first conductive type and separated from each other at two sides of the first hard mask layer in the substrate; conducting a second ion implantation to form a separation region with a second conductive type opposite to the first conductive type in the substrate between the first and the second buried layers; removing the first hard mask layer; and forming a semiconductor layer on the substrate. This inventive concept reduces an area budget of a substrate and simplifies the manufacturing process. |
| US10804102B2 |
Flexible device on which pattern of 2-dimensional material is formed and manufacturing method thereof
The present disclosure provides a method for manufacturing a flexible device having a pattern of a two-dimensional material formed thereon includes: a step of forming a two-dimensional material layer on a substrate; a step of forming a pattern of the two-dimensional material; a step of coating a flexible substrate solution on the patterned two-dimensional material layer and curing the same; and a step of removing the substrate. |
| US10804100B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
There is provided a method of forming a film with improved step coverage on a substrate by performing, a predetermined number of times, forming a first layer by supplying a halogen-free precursor having a first chemical bond cut by thermal energy at a first temperature and a second chemical bond cut by thermal energy at a second temperature lower than the first temperature and having a ratio of the number of first chemical bonds to the number of second chemical bonds in one molecule thereof, the ratio being equal to or more than 3, to the substrate at a temperature equal to or higher than the second temperature and lower than the first temperature. |
| US10804099B2 |
Selective inhibition in atomic layer deposition of silicon-containing films
Methods of selectively inhibiting deposition of silicon-containing films deposited by atomic layer deposition are provided. Selective inhibition involves exposure of an adsorbed layer of a silicon-containing precursor to a hydrogen-containing inhibitor, and in some instances, prior to exposure of the adsorbed layer to a second reactant. Exposure to a hydrogen-containing inhibitor may be performed with a plasma, and methods are suitable for selective inhibition in thermal or plasma enhanced atomic layer deposition of silicon-containing films. |
| US10804095B2 |
Composition for forming silica layer, silica layer, and electronic device
A composition for forming a silica layer includes a silicon-containing polymer and a solvent, the composition having a SiO2 conversion rate of greater than about 0 and less than or equal to about 15. The SiO2 conversion rate is represented by: SiO2 conversion rate=(a ratio of an area of Si—O to an area of Si—H measured after coating the composition in a thickness of 6700 Å on a bare wafer, and allowing the coated wafer to stand for 24 hours under conditions of a temperature of 85° C. and a relative humidity of 85%)−(a ratio of an area of Si—O to an area of Si—H measured after coating the composition in a thickness of 6700 Å on a bare wafer, and allowing the coated wafer to stand for 2 hours under conditions of a temperature of 85° C. and a relative humidity of 85%). |
| US10804091B2 |
Single particle analysis using optical detection
Methods and systems of identifying two or more elements in a single individual particle are described. In some examples, an optical emission from each of an ionized first element and an ionized second element can simultaneously be detected to identify at least a first element in a particle from a plurality of particles using the optical emission from the ionized first element, and to identify at least a second element in the particle from the plurality of particles using the optical emission from the second ionized element. The identified first element and the identified second element can be used to identify a source of the particle from a plurality of particles. |
| US10804086B2 |
Apparatus and method for processing of mass spectrometry data
There is provided a mass spectrometry data processor allowing for easy selection of a compositional formula for a sample component to be analyzed (analyte) even in general mass spectrometry applications. The mass spectrometry data processor is used to perform a qualitative analysis of the sample component based both on a first mass spectrum obtained by ionizing the sample component by a soft ionization method and on a second mass spectrum generated by cleavage of the sample component. The data processor includes: a molecular ion peak detector for detecting one molecular ion peak from the first mass spectrum; a fragment ion peak detector for detecting plural fragment ion peaks from the second mass spectrum; a composition estimator for obtaining estimated compositional formulas for the sample component from the molecular ion peak and obtaining estimated compositional formulas for fragments constituting the sample component from the fragment ion peaks; an assignment validity decision device for making decisions as to whether the estimated compositional formulas for the fragments can be assigned to the estimated compositional formulas for the sample component; and a degree of coincidence computing section for computing degrees of coincidence of the estimated compositional formulas for the fragments with the estimated compositional formulas for the analyte based on results of the decisions made by the assignment validity decision device. |
| US10804085B2 |
Photomultiplier and methods of making it
Disclosed herein is a photomultiplier comprising: an electron ejector; a detector; a substrate; and a first electrode in the substrate; a second electrode in the substrate; a third electrode in the substrate; wherein each of the first, second and third electrodes comprises a flat or curved surface at an angle to a normal direction of the substrate; wherein each of the first, second and third electrodes comprises a first end and a second end, the first end being closer to the electron ejector than the second end; wherein the first, second and third electrodes are spatially arranged such that the second ends of the first, second and third electrode are on a same plane, or such that a plane the second ends of the first and third electrodes are on crosses the second electrode. |
| US10804083B2 |
Cathode assembly, physical vapor deposition system, and method for physical vapor deposition
A cathode assembly for a physical vapor deposition (PVD) system includes a target holder and a thickness detector. The target holder is for holding a target, in which the target has a first major surface and a second major surface. The first major surface and the second major surface are respectively proximal and distal to the target holder. The thickness detector is disposed on the target holder. At least one portion of the first major surface is exposed to the thickness detector for allowing the thickness detector to detect the thickness of the target through the first major surface. |
| US10804081B2 |
Edge ring dimensioned to extend lifetime of elastomer seal in a plasma processing chamber
An edge ring configured to surround an outer periphery of a substrate support in a plasma processing chamber wherein plasma is generated and used to process a substrate is disclosed, the substrate support comprising a base plate, a top plate, an elastomer seal assembly between the base plate and the top plate, and an elastomer seal configured to surround the elastomer seal assembly. The edge ring includes an upper inner surface having an edge step directed towards an interior portion of the edge ring and arranged to extend from an outer periphery of a top surface of the top plate to an outer periphery of an upper surface of the base plate, a lower inner surface, an outer surface, a lower surface extending from the lower inner surface to the outer surface, and a top surface extending from the outer surface to the upper inner surface. |
| US10804079B2 |
Active showerhead
An active showerhead used for a plasma reactor is described. The active showerhead includes a plurality of substrate layers. The substrate layers include at least one actuator and transfer component. The actuator and transfer component is coupled to a gas line via a gas channel. The active showerhead further includes an electrode layer located below the substrate layers. The electrode layer and the actuator and transfer component both share an opening. The actuator and transfer component allows passage of one or more process gases received from the gas line and the gas channel into the opening without the need for a conventional gas box. |
| US10804074B2 |
Image processing system and method of processing images
The disclosure relates to systems and method for processing images. The method includes selecting a predetermined reference structure, the predetermined reference structure having a known feature size/shape. The method also includes obtaining a reference image of the predetermined reference structure, and capturing a calibration image of the predetermined reference structure using an observation device. The calibration image includes a plurality of features. Additionally, the method includes identifying at least one portion of the plurality of features of the calibration image that include a feature size/shape substantially similar to the known feature size and shape of the predetermined reference structure. Finally, the method includes combining the identified portion of the plurality of features of the calibration image to form a stacked feature image, and determining a point spread function (PSF) of the observation device by comparing the obtained reference image with the stacked feature image. |
| US10804072B2 |
Plasma processing apparatus
A plasma processing apparatus includes a processing chamber, a first electrode and a second electrode disposed to face each other, a high frequency power supply unit for applying a high frequency power to either the first electrode or the second electrode, a processing gas supply unit for supplying a processing gas to a processing space, and a main dielectric member provided at a substrate mounting portion on a main surface of the first electrode. A focus ring is attached to the first electrode to cover a peripheral portion of the main surface of the first electrode and a peripheral dielectric member is provided in a peripheral portion on the main surface of the first electrode so that an electrostatic capacitance per unit area applied between the first electrode and the focus ring is smaller than that applied between the first electrode and the substrate by the main dielectric member. |
| US10804070B2 |
Deflection scanning device with multi-phase winding and deflection scanning system
The present invention relates to a deflection scanning device with a multi-phase winding and a deflection scanning system. The deflection scanning device is of an axisymmetric structure, and comprises a ferromagnetic frame and a deflection scanning winding, wherein the inner side of the ferromagnetic frame is longitudinally provided with 2aw wire slots equally distributed along the circumference; and the deflection scanning winding comprises a w-phase winding, wherein the axis of the each phase winding is symmetrically distributed. The deflection scanning system comprises a deflection scanning device, a drive power supply unit and, a central, control unit. The deflection scanning device of the present invention can improve the uniformity of the magnetic induction intensity in the charged particle beam channel, and then reduce the defocusing effect and improve the scanning accuracy. |
| US10804068B2 |
Electostatic filter and method for controlling ion beam properties using electrostatic filter
An apparatus is provided. The apparatus may include a main chamber; an entrance tunnel having a propagation axis extending into the main chamber along a first direction; an exit tunnel, connected to the main chamber and defining an exit direction. The entrance tunnel and the exit tunnel may define a beam bend of at least 30 degrees therebetween. The apparatus may include an electrode assembly, disposed in the main chamber, and defining a beam path between the entrance tunnel and the exit aperture, wherein the electrode assembly comprises a lower electrode, disposed on a first side of the beam path, and a plurality of electrodes, disposed on a second side of the beam path, the plurality of electrodes comprising at least five electrodes. |