最新美国发明专利第2019-12-17期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US10510822B2	Display device A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.
US10510821B2	Display device A display device includes: a substrate; and a plurality of pad terminals on the substrate, wherein each of the plurality of pad terminals includes a lower conductive layer and an upper conductive layer disposed on the lower conductive layer, an elastic layer disposed between the lower conductive layer and the upper conductive layer, and at least a portion of the lower conductive layer being electrically connected to at least a portion of the upper conductive layer in a region in which the elastic layer is not arranged.
US10510820B2	Display device and electronic apparatus To make it possible to improve display quality more.Provided is a display device including: a pixel unit in which a plurality of pixel circuits (PIX_A, PIX_B, PIX_C) each of which includes a light emitting element and a driving circuit configured to drive the light emitting element are arranged in a matrix form. In a diffusion layer in which transistors included in the driving circuits of the pixel circuits (PIX_A, PIX_B, PIX_C) are formed, an electricity supply region (223) that is an active area for supplying an electric potential to a well is provided between mutually adjacent ones of the pixel circuits (PIX_A, PIX_B, PIX_C).
US10510819B2	Electronic device and method of making thereof There is provided a method of forming a light source, the method comprising providing a backplane comprising a backplane substrate and a semiconductor particle formed separately from the backplane substrate and then fixed upon the backplane substrate at a predetermined position. The semiconductor particle can be planarized to remove a portion of the semiconductor particle and to expose at a cross-section of the semiconductor particle a planar surface. Moreover, the backplane may comprise a controllable gated electronic component on or directly beneath the planar surface. The controllable gated electronic component may be configured to control an LED emitter. The method further comprises providing the LED emitter comprising one or more LEDs electrically connected to the backplane such that at least one of the LEDs is electrically connected to the controllable gated electronic component.
US10510815B2	Active matrix organic light emitting diode back plate for display device and method for manufacturing the same The present disclosure provides an AMOLED back plate and a method for manufacturing the same. The manufacturing method includes: forming source and drain electrodes and a first via hole on a substrate having a light shielding layer and a buffer layer formed thereon, by a patterning process; depositing an active layer film and a gate insulating layer film sequentially, and forming an active layer, a gate insulating layer and a second via hole by a patterning process, wherein the active layer connected with the light shielding layer by the first via hole; forming a gate electrode and a transparent anode sequentially, wherein the transparent anode is arranged in a light emitting area and connected with one of the source and drain electrodes through the second via hole.
US10510812B2	Display-integrated infrared emitter and sensor structures In one embodiment, an electronic display includes a first plurality of hexagon-shaped pixels and a second plurality of hexagon-shaped pixels that are coplanar with the first plurality of hexagon-shaped pixels. The first plurality of hexagon-shaped pixels each include an infrared (IR) emitter subpixel that is operable to emit IR light. The second plurality of hexagon-shaped pixels each include an IR detector subpixel that is operable to detect IR light. Each IR emitter subpixel and each IR detector subpixel includes an anode layer and a cathode layer. Each particular IR emitter subpixel includes an IR emissive layer located between the anode layer and the cathode layer of the particular IR emitter subpixel. Each particular IR detector subpixel includes an IR detector layer located between the anode layer and the cathode layer of the particular IR detector subpixel.
US10510808B2	Organic light-emitting structure and display device An organic light-emitting structure is described. The organic light-emitting structure includes a first light-emitting unit, a second light-emitting unit, a third light-emitting unit, and a fourth light-emitting unit. Each of the first light-emitting unit, the second light-emitting unit, the third light-emitting unit, and the fourth light-emitting unit comprises a first electrode, a second electrode, and an organic laminated body placed between the first electrode and the second electrode. One of the first electrode and the second electrode is a translucent electrode. At least one light-emitting unit is a fluorescent light-emitting unit. The color gamut range of the organic light-emitting structure is increased, the color saturation of the light-emitting device is improved, and quantity of colors is increased, so that the development trend of color reproducibility for the display devices can be satisfied.
US10510806B2	Light-emitting element, light-emitting device, electronic device, and lighting device A highly reliable light-emitting element which can keep favorable characteristics throughout long-time driving is provided. In addition, a light-emitting element with high color purity and high emission efficiency is provided. Furthermore, a light-emitting device having a long lifetime in which the light-emitting element is used is provided. Moreover, an electronic device and a lighting device each of which has a long lifetime are provided. In the light-emitting element including an EL layer between a pair of electrodes, the EL layer has a stacked-layer structure of a first light-emitting layer, a second light-emitting layer, and a third light-emitting layer. The light-emitting layer includes an electron-transport material, a hole-transport material, and a light-emitting material. Furthermore, light emitted from the first light-emitting layer and light emitted from the third light-emitting layer have the same color and each have a longer wavelength than light emitted from the second light-emitting layer.
US10510805B2	Methods of forming metal on inhomogeneous surfaces and structures incorporating metal on inhomogeneous surfaces The disclosed technology relates to integrate circuits, including memory devices. A method of forming an integrated circuit comprises providing a surface comprising a first region and a second region, wherein the first region is formed of a different material than the second region. The method additionally comprises forming a seeding material in contact with and across the first and second regions. The method further comprises forming a metal comprising tungsten on the seeding material.
US10510802B2	Semiconductor device and method of manufacturing the same A semiconductor device includes a first conductive wiring, at least one first dielectric layer, at least one second dielectric layer and a second conductive wiring. The at least one first dielectric layer is over the first conductive wiring. The at least one second dielectric layer is over the at least one first dielectric layer. The second conductive wiring is over the at least one second dielectric layer. The dielectric constant of the at least one second dielectric layer is higher than the dielectric constant of the at least one first dielectric layer.
US10510799B2	Absorption enhancement structure for image sensor The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate and an image sensing element disposed within the substrate. The substrate has sidewalls defining a plurality of protrusions over the image sensing element. A first one of the plurality of protrusions including a first sidewall having a first segment. A line that extends along the first segment intersects a second sidewall of the first one of the plurality of protrusions that opposes the first sidewall.
US10510793B2	Uniform-size bonding patterns A semiconductor device, and a method of fabrication, is introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and a first plurality of bonding pads and a second plurality of bonding pads are formed in the recesses. In an embodiment, the first plurality of bonding pads have a first width and a first pitch, and the second plurality of bonding pads have the first width and are grouped into clusters. The first plurality of bonding pads and the second plurality of bonding pads in the first substrate are aligned to a third plurality of bonding pads in a second substrate and are bonded using a direct bonding method.
US10510788B2	Semiconductor image sensor A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of pixel sensors arranged in an array, an isolation grid disposed in the substrate and separating the plurality of pixel sensors from each other, and a reflective grid disposed over the isolation grid on the back side of the substrate. A depth of the reflective grid is less than a depth of the isolation grid.
US10510776B2	Semiconductor device with common active area and method for manufacturing the same A semiconductor device includes a substrate, a pair of transistor devices and an isolation region. The pair of transistor devices are disposed over the substrate. Each of the pair of the transistor devices includes a channel, a gate electrode over the channel, and a source/drain region alongside the gate electrode. The isolation region is disposed between the source/drain regions of the pair of the transistor devices. The isolation region has a first doping type opposite to a second doping type of the source/drain regions.
US10510773B2	Apparatuses having a ferroelectric field-effect transistor memory array and related method An apparatus comprises field-effect transistor (FET) structures stacked horizontally and vertically in a three-dimensional memory array architecture, gates extending vertically and spaced horizontally between the plurality of FET structures, and a ferroelectric material separating the FET structures and the gates. Individual ferroelectric FETs (FeFETs) are formed at intersections of the FET structures, the gates, and the ferroelectric material. Another apparatus comprises a plurality of bit lines and word lines. Each bit line has at least two sides that are coupled with a ferroelectric material such that each bit line is shared by neighboring gates to form a plurality of FeFETs. A method of operating a memory array comprises applying a combination of voltages to a plurality of word lines and digit lines for a desired operation for a plurality of FeFET memory cells, at least one digit line having the plurality of FeFET memory cells accessible by neighboring gates.
US10510772B2	Semiconductor device and method of manufacturing the same In an embodiment, the semiconductor device may include interlayer insulating layers, conductive patterns, a channel layer, cell blocking insulating layers, dummy blocking insulating layers, and a data storage layer. The interlayer insulating layers and conductive patterns may be alternately stacked. The channel layer may pass through the interlayer insulating layers and the conductive patterns. The cell blocking insulating layers may be respectively arranged between the channel layer and the conductive patterns. The dummy blocking insulating layers may be respectively arranged between the channel layer and the interlayer insulating layers, and may protrude further toward a side wall of the channel layer than the cell blocking insulating layers. The data storage layer may surround the side wall of the channel layer, and may be formed on a concavo-convex structure defined by the cell blocking insulating layers and the dummy blocking insulating layers.
US10510766B2	Flash memory structure with reduced dimension of gate structure and methods of forming thereof A method for forming a semiconductor memory device structure includes forming a select gate structure and a dielectric layer, forming a charge trapping layer along a sidewall of a lower portion of the select gate structure and a sidewall of the dielectric layer, and forming a memory gate structure over the charge trapping layer. The select gate structure and the memory gate structure contact opposing sidewalls of the charge trapping layer. The dielectric layer is interposed between the charge trapping layer and the select gate structure.
US10510763B2	Embedded nonvolatile memory and forming method thereof A nonvolatile memory embedded in an advanced logic circuit and a method forming the same are provided. In the nonvolatile memory, the word lines and erase gates have top surfaces lower than the top surfaces of the control gate. In addition, the word lines and the erase gates are surrounded by dielectric material before a self-aligned silicidation process is performed. Therefore, no metal silicide can be formed on the word lines and the erase gate to produce problems of short circuit and current leakage in a later chemical mechanical polishing process.
US10510761B2	Static random access memory device with halo regions having different impurity concentrations In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.
US10510756B1	Semiconductor device and method In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.
US10510753B2	Integrated circuit and manufacturing method thereof An integrated circuit includes first and second semiconductor fins, first and second epitaxy structures, and first and second dielectric fin sidewall structures. The first and second epitaxy structures are respectively on the first and second semiconductor fins. The first epitaxy structure and the second epitaxy structure are merged together. The first and second dielectric fin sidewall structures are respectively on opposite first and second sidewalls of the first epitaxy structure. The first sidewall of the first epitaxy structure faces the second epitaxy structure. The first dielectric fin sidewall structure is shorter than the second dielectric fin sidewall structure.
US10510750B2	High voltage integration for HKMG technology The present disclosure relates to an integrated circuit (IC) and a method of formation. In some embodiments, a first transistor gate stack is disposed in a low voltage region defined on a substrate. The first transistor gate stack comprises a first gate electrode and a first gate dielectric separating the first gate electrode from the substrate. A third transistor gate stack is disposed in a high voltage region defined on the substrate. The third transistor gate stack comprises a third gate electrode and a third gate dielectric separating the third gate electrode from the substrate. The third gate dielectric comprises an oxide component and a first interlayer dielectric layer.
US10510749B1	Resistor within single diffusion break, and related method A resistor for an integrated circuit (IC), an IC and a related method are disclosed. The resistor may include a metal alloy resistor body positioned within a single diffusion break (SDB). The SDB provides an isolation region in a semiconductor fin between a pair of fin-type field effect transistors (finFETs). The resistor in the SDB allows for the resistor to be built at front-end-of-line (FEOL) layers, which saves on space and expense, and allows for precise dimensions for the resistor.
US10510746B2	Semiconductor device including electrostatic discharge protection patterns A semiconductor device can include a front-end-of-line region at least a portion of which is disposed on a substrate, where the front-end-of-line region can include an electrostatic discharge protection circuit and an integrated circuit electrically connected to the electrostatic discharge protection circuit. A back-end-of-line region can be on the front-end-of-line region and an electrostatic discharge protection pattern can be on a scribe region of the substrate. The electrostatic discharge protection pattern can include a lower pattern extending horizontally and a side cross-sectional surface defined by a height and a width of the lower pattern, where the side cross-sectional surface can be exposed through a side surface of the back-end-of-line region. A via can be electrically connected to the lower pattern and extend perpendicularly to the substrate and an upper pattern can be electrically connected to the via.
US10510745B2	Array substrate and display device An array substrate and a display device are provided. The array substrate includes a display region and a peripheral region surrounding the display region. Gate lines and data lines crossing the gate lines are arranged at the display region. A static charge shielding unit is arranged at the peripheral region. The array substrate further includes a static charge releasing line connected to the static charge shielding unit, and the static charge shielding unit is configured to release static charges at the peripheral region through the static charge releasing line.
US10510744B2	Vertical nanowire transistor for input/output structure An electrostatic discharge (ESD) protection circuit includes an input terminal, a transistor, and an output terminal. The input terminal is configured to receive an input signal. The transistor includes a first source/drain region, a second source/drain region, and a drift region that has a resistance in series between the first and second source/drain regions and that is configured to attenuate an ESD voltage in the input signal. The output terminal is connected to the second source/drain region.
US10510743B2	Step fin field-effect-transistor (FinFET) with slim top of fin and thick bottom of fin for electro-static-discharge (ESD) or electrical over-stress (EOS) protection An Electro-Static-Discharge (ESD) protection device has a Fin Field-Effect Transistor (FinFET) with a silicon fin with a step separating a top fin and a bottom fin. The gate wraps around the top fin but not the bottom fin. Normal gate-controlled channel conduction occurs in the top fin between a source and a drain in the top fin. Underneath the conducting channel is a buried conducting region in the bottom fin that conducts after a breakdown voltage is reached during ESD. A ledge, abrupt slope change in the sidewalls of the fin, or a doping increase occurs at the step between the top fin and bottom fin. The bottom fin is 2-3 times wider than the top fin, causing the resistance of the buried conducting region to be 2-3 times less than the resistance of the conducting channel, steering breakdown current away from the channel, reducing failures during breakdown.
US10510742B1	Integrated circuit structure An IC structure includes a substrate, a deep n-well (DNW), a first device, a second device, a first electrical path and a second electrical path. The DNW is in the substrate. The first device is formed inside the DNW and connected to a first lower reference voltage and a first higher reference voltage. The second device is formed in the substrate and outside the DNW, and connected to a second lower reference voltage and a second higher reference voltage. The first electrical path is electrically connected between the first device and the second device. The second electrical path is electrically connected between the first lower reference voltage and the second lower reference voltage. A second metal layer that includes the second electrical path is located in an area outside of an area above a first metal layer in which the first electrical path is located.
US10510741B2	Transient voltage suppression diodes with reduced harmonics, and methods of making and using A semiconductor device includes a semiconductor die. A transient voltage suppression (TVS) structure is formed in the semiconductor die. A capacitor is formed over the semiconductor die. In one embodiment, the capacitor is formed by depositing a first conductive layer over the semiconductor die, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the semiconductor die. In another embodiment, the capacitor is formed by forming a trench in the semiconductor die, depositing an insulating material in the trench, and depositing a conductive material in the trench.
US10510737B2	Semiconductor package A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.
US10510736B2	Light emitting structure A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.
US10510735B2	Packages and methods of forming packages Various packages and methods of forming packages are discussed. According to an embodiment, a package includes a processor die at least laterally encapsulated by an encapsulant, a memory die at least laterally encapsulated by the encapsulant, and a redistribution structure on the encapsulant. The processor die is communicatively coupled to the memory die through the redistribution structure. According to further embodiments, the memory die can include memory that is a cache of the processor die, and the memory die can comprise dynamic random access memory (DRAM).
US10510727B2	Semiconductor device with discrete blocks A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
US10510725B2	Semiconductor device A semiconductor device includes a base member having a first surface and a second surface on a side opposite to the first surface, the base member including at least one interconnect extending in a first direction along the first surface; two or more stacked bodies arranged in the first direction on the first surface, each of the two or more stacked bodies including semiconductor chips stacked in a second direction perpendicular to the first surface; and logic chips electrically connected respectively to the stacked bodies. Each of semiconductor chips includes first and second semiconductor layers. The first and second semiconductor layers each have an element surface and a back surface. An active element is provided on the element surface. The first semiconductor layer and the second semiconductor layer are bonded such that the element surface of the second semiconductor layer faces the element surface of the first semiconductor layer.
US10510724B2	Semiconductor device package A semiconductor device package includes a buffer layer having an upper surface perpendicular to a first direction, a plurality of semiconductor chips stacked on the buffer layer one by one in the first direction, and a chip sealing material surrounding sidewalls of the semiconductor chips. The semiconductor chips include an upper semiconductor chip at a farthest position from the buffer layer and a remaining plurality of intermediate semiconductor chips. Each of the intermediate semiconductor chips includes through silicon vias (TSVs) passing through each of the intermediate semiconductor chips. The upper semiconductor chip includes a trench formed in at least a portion of a periphery of the upper semiconductor chip and covered by the chip sealing material. Accordingly, the semiconductor device package provides increased device reliability.
US10510722B2	Semiconductor device and method for manufacturing the same A semiconductor device includes a first electronic component, a second electronic component and a plurality of interconnection structures. The first electronic component has a first surface. The second electronic component is over the first electronic component, and the second electronic component has a second surface facing the first surface of the first electronic component. The interconnection structures are between and electrically connected to the first electronic component and the second electronic component, wherein each of the interconnection structures has a length along a first direction substantially parallel to the first surface and the second surface, a width along a second direction substantially parallel to the first surface and the second surface and substantially perpendicular to the first direction, and the length is larger than the width of at least one of the interconnection structures.
US10510721B2	Molded chip combination Various molded chip combinations and methods of manufacturing the same are disclosed. In one aspect, a molded chip combination is provided that includes a first semiconductor chip that has a first PHY region, a second semiconductor chip that has a second PHY region, an interconnect chip interconnecting the first PHY region to the second PHY region, and a molding joining together the first semiconductor chip, the second semiconductor chip and the interconnect chip.
US10510717B2	Chip on package structure and method A system and method for packaging semiconductor device is provided. An embodiment comprises forming vias over a carrier wafer and attaching a first die over the carrier wafer and between a first two of the vias. A second die is attached over the carrier wafer and between a second two of the vias. The first die and the second die are encapsulated to form a first package, and at least one third die is connected to the first die or the second die. A second package is connected to the first package over the at least one third die.
US10510714B2	Packaged semiconductor devices and packaging methods Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a first molding material disposed around the integrated circuit die, and a through-via disposed within the first molding material. A first side of a redistribution layer (RDL) is coupled to the integrated circuit die, the through-via, and the first molding material. A second molding material is over a second side of the RDL, the second side of the RDL being opposite the first side of the RDL. The packaged semiconductor device includes an antenna over the second molding material.
US10510712B2	Methods for controlling warpage in packaging A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
US10510707B2	Thermally conductive molding compound structure for heat dissipation in semiconductor packages A method of forming a semiconductor package includes attaching a thermal conductivity layer to a chip. The chip has a first surface and a second surface. The thermal conductivity layer is attached to the first surface of the chip. The thermal conductivity layer provides a path through which heat generated from the chip is dissipated to the ambient. A substrate is attached to the second surface of the chip after attaching the thermal conductivity layer to the chip. A molding compound is formed to encapsulate the chip and the thermal conductivity layer.
US10510701B2	Semiconductor die connection system and method A system and method for connecting semiconductor dies is provided. An embodiment comprises connecting a first semiconductor die with a first width to a second semiconductor die with a larger second width and that is still connected to a semiconductor wafer. The first semiconductor die is encapsulated after it is connected, and the encapsulant and first semiconductor die are thinned to expose a through substrate via within the first semiconductor die. The second semiconductor die is singulated from the semiconductor wafer, and the combined first semiconductor die and second semiconductor die are then connected to another substrate.
US10510699B2	Bond structures and the methods of forming the same A method includes forming a first conductive feature and a second conductive feature, forming a metal pad over and electrically connected to the first conductive feature, and forming a passivation layer covering edge portions of the metal pad, with a center portion of a top surface of the metal pad exposed through an opening in the metal pad. A first dielectric layer is formed to cover the metal pad and the passivation layer. A bond pad is formed over the first dielectric layer, and the bond pad is electrically coupled to the second conductive feature. A second dielectric layer is deposited to encircle the bond pad. A planarization is performed to level a top surface of the second dielectric layer with the bond pad. At a time after the planarization is performed, an entirety of the top surface of the metal pad is in contact with dielectric materials.
US10510697B2	Semiconductor package system and method A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
US10510694B2	Radio frequency communication systems A packaged radio frequency (RF) module is disclosed. The module can include a substrate, a first die electrically and mechanically attached to the substrate, a second die electrically and mechanically attached to the substrate, an encapsulating material, and a lid attached to the substrate. The first die comprises a silicon-based die, such as an RF switch die, and the second die comprises a compound semiconductor die, such as an RF amplifier. The encapsulating material can protect electrical connections between the first die and the substrate. The substrate and the lid at least partially define an air cavity within which the first and the second die are mounted. An active surface of the second die is exposed to the air cavity.
US10510689B2	Solder ball protection in packages An integrated circuit structure includes a substrate, a metal pad over the substrate, a passivation layer having a portion over the metal pad, and a polymer layer over the passivation layer. A Post-Passivation Interconnect (PPI) has a portion over the polymer layer, wherein the PPI is electrically coupled to the metal pad. The integrated circuit structure further includes a first solder region over and electrically coupled to a portion of the PPI, a second solder region neighboring the first solder region, a first coating material on a surface of the first solder region, and a second coating material on a surface of the second solder region. The first coating material and the second coating material encircle the first solder region and the second solder region, respectively. The first coating material is spaced apart from the second coating material.
US10510688B2	Via rail solution for high power electromigration The present disclosure relates to an integrated circuit having a via rail that prevents reliability concerns such as electro-migration. In some embodiments, the integrated circuit has a first plurality of conductive contacts arranged over a semiconductor substrate. A first metal interconnect wire is arranged over the first plurality of conductive contacts, and a second metal interconnect wire is arranged over the first metal interconnect wire. A via rail is arranged over the first metal interconnect wire and electrically couples the first metal interconnect wire and the second metal interconnect wire. The via rail has a length that continuously extends over two or more of the plurality of conductive contacts. The length of via rail provides for an increased cross-sectional area both between the first metal interconnect wire and the second metal interconnect wire and along a length of the via rail, thereby mitigating electro-migration within the integrated circuit.
US10510684B2	Three dimensional integrated circuit (3DIC) with support structures Some embodiments of the present disclosure relate to an integrated circuit. The integrated circuit has a first semiconductor die and a second semiconductor die. The first semiconductor die is bonded to the second semiconductor die by one or more bonding structures. A first plurality of support structures are disposed between the first semiconductor die and the second semiconductor die. The first plurality of support structures are spaced apart from the one or more bonding structures. The first plurality of support structures are configured to hold together the first semiconductor die and the second semiconductor die.
US10510683B2	Packaging structures for metallic bonding based opto-electronic device and manufacturing methods thereof The present disclosure proposes a packaging structure for a metallic bonding based opto-electronic device and a manufacturing method thereof. According to the embodiments, the packaging structure for an opto-electronic device may comprise an opto-electronic chip and a packaging base. The opto-electronic chip comprises: a substrate having a first substrate surface and a second substrate surface opposite to each other; an opto-electronic device formed on the substrate; and electrodes for the opto-electronic device which are formed on the first substrate surface. The packaging base has a first base surface and a second base surface opposite to each other, and comprises conductive channels extending from the first base surface to the second base surface. The opto-electronic chip is stacked on the packaging base in such a manner that the first substrate surface faces the packaging base, and the electrodes formed on the first substrate surface of the opto-electronic chip are bonded with corresponding conductive channels in the packaging base.
US10510680B2	Semiconductor device having electromagnetic wave attenuation layer A semiconductor device including a semiconductor element and a first member is provided. The first member includes a first magnetic planar region separated from the semiconductor element in a first direction, and a first nonmagnetic planar region provided between the first magnetic planar region and the semiconductor element in the first direction. At least a portion of the first magnetic planar region includes Fe100-x1-x2αx1Nx2, where α includes at least one selected from the group consisting of Zr, Hf, Ta, Nb, Ti, Si, and Al, x1 is not less than 0.5 atomic percent and not more than 10 atomic percent, and x2 is not less than 0.5 atomic percent and not more than 8 atomic percent.
US10510679B2	Semiconductor device with shield for electromagnetic interference A semiconductor device includes a first die embedded in a molding material, where contact pads of the first die are proximate a first side of the molding material. The semiconductor device further includes a redistribution structure over the first side of the molding material, a first metal coating along sidewalls of the first die and between the first die and the molding material, and a second metal coating along sidewalls of the molding material and on a second side of the molding material opposing the first side.
US10510678B2	Eliminate sawing-induced peeling through forming trenches A package includes a device die, a molding material encircling the device die, wherein a top surface of the molding material is substantially level with a top surface of the device die, and a bottom dielectric layer over the device die and the molding material. A plurality of redistribution lines (RDLs) extends into the bottom dielectric layer and electrically coupling to the device die. A top polymer layer is over the bottom dielectric layer, with a trench ring penetrating through the top polymer layer. The trench ring is adjacent to edges of the package. The package further includes Under-Bump Metallurgies (UBMs) extending into the top polymer layer.
US10510677B2	Die A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.
US10510675B2	Substrate structure with spatial arrangement configured for coupling of surface plasmons to incident light Embodiments of the disclosure provide a substrate structure for an integrated circuit (IC) structure, including: a first dielectric layer positioned above a semiconductor substrate; a first plurality of trenches extending at least partially into the first dielectric layer from an upper surface of the first dielectric layer; and a first metal formed within the first plurality of trenches, wherein a spatial arrangement of the first plurality of trenches causes coupling of surface plasmons in the first metal to at least one wavelength of an incident light.
US10510674B2	Fan-out package having a main die and a dummy die, and method of forming A method of forming a package and a package are provided. The method includes placing a main die and a dummy die side by side on a carrier substrate. The method also includes forming a molding material along sidewalls of the main die and the dummy die. The method also includes forming a redistribution layer comprising a plurality of vias and conductive lines over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die. The method also includes removing the carrier substrate.
US10510672B2	Semiconductor packages and methods of manufacturing same A semiconductor package and a method manufacturing the same are disclosed. At least one semiconductor chip is mounted on a package substrate. An insulative mold layer is formed at sides of the semiconductor chip having at least one recess in a region in which conductive connection members are formed, the recess defining one or more protrusions within the mold layer. An interposer is positioned on the protrusions with the conductive connection members connecting and providing electrical connections between conductive pads on the upper surface of the package and conductive pads on the lower surface of the package substrate. The protrusions may position the interposer in the vertical direction by defining the vertical spacing between the lower surface of the interposer and the upper surface of the package substrate. The protrusions may also position the interposer in one or more horizontal directions and/or prevent substantial movement during connecting of the interposer to the package substrate. An under-fill resin layer may be injected into remaining space between the interposer and the package substrate.
US10510664B2	Contact structure and formation thereof A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure. The annealed cobalt plug is formed by annealing a cobalt plug at a first temperature for a first duration, while exposing the cobalt plug to a first gas. The repaired lattice structure of the annealed cobalt plug is more regular or homogenized as compared to a cobalt plug that is not so annealed, such that the annealed cobalt plug has a relatively increased conductivity or reduced resistivity.
US10510658B2	Semiconductor devices Semiconductor devices are provided. The semiconductor devices may include a substrate, a first insulating film on the substrate, a lower metal layer in the first insulating film, and a second insulating film on the first insulating film. The lower metal layer may be in the second insulating film, the second insulating film may include a lower surface facing the substrate and an upper surface that is opposite the lower surface, and the upper surface of the second insulating film may be upwardly convex. The semiconductor devices may further include a barrier dielectric film including a recess on the second insulating film, and a via metal layer that is in the recess of the barrier dielectric film and electrically connected with the lower metal layer. The first insulating film and the second insulating film may be sequentially stacked on the substrate in a vertical direction, and a longest vertical distance between an upper surface of the lower metal layer and the substrate may be less than a longest vertical distance between the upper surface of the second insulating film and the substrate.
US10510657B2	Semiconductor device with interconnecting structure and method for manufacturing the same A semiconductor device includes a substrate, a dielectric layer, a via, a line, and a capping layer. The substrate includes at least one conductive layer, in which a top surface of the at least one conductive layer has a first portion and a second portion. The dielectric layer is disposed on the substrate and the first portion of the top surface of the at least one conductive layer. The via is disposed in the dielectric layer on the second portion of the top surface of the at least one conductive layer. The line is disposed on the via and a portion of the dielectric layer. The capping layer is disposed on a top surface of the line and peripherally encloses a side surface of the line, in which the capping layer has an etch selectivity with respect to the line.
US10510651B2	Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macro A hard macro includes a periphery defining a hard macro area and having a top and a bottom and a hard macro thickness from the top to the bottom, the hard macro including a plurality of vias extending through the hard macro thickness from the top to the bottom. Also an integrated circuit having a top layer, a bottom layer and at least one middle layer, the top layer including a top layer conductive trace, the middle layer including a hard macro and the bottom layer including a bottom layer conductive trace, wherein the top layer conductive trace is connected to the bottom layer conductive trace by a via extending through the hard macro.
US10510650B2	Method of manufacturing semiconductor device packaging structure having through interposer vias and through substrate vias A semiconductor device and method of manufacture are presented in which a first semiconductor device and second semiconductor device are bonded to a first wafer and then singulated to form a first package and a second package. The first package and second package are then encapsulated with through interposer vias, and a redistribution structure is formed over the encapsulant. A separate package is bonded to the through interposer vias.
US10510645B2	Planarizing RDLs in RDL-first processes through CMP process A method includes forming a buffer dielectric layer over a carrier, and forming a first dielectric layer and a first redistribution line over the buffer dielectric layer. The first redistribution line is in the first dielectric layer. The method further includes performing a planarization on the first dielectric layer to level a top surface of the first dielectric layer, forming a metal post over and electrically coupling to the first redistribution line, and encapsulating the metal post in an encapsulating material. The encapsulating material contacts a top surface of the planarized top surface of the first dielectric layer.
US10510643B2	Semiconductor package with lead frame and recessed solder terminals A semiconductor device (100) comprising a leadframe (120) having an assembly pad (121) in a first horizontal plane (180), the pad's first surface (121a) with a semiconductor chip (110) attached; further a plurality of leads (122) in a parallel second horizontal plane (190) offset from the first plane in the direction of the attached chip, the leads having a third surface (122a) with bonding wires, and an opposite fourth surface (122b); a package (140) encapsulating leadframe, chip, and wires, the package having a fifth surface (140a) parallel to the first and second planes; a plurality of recess holes (150) in the package, each hole stretching from the fifth surface to the fourth surface of respective leads; and solder (160) filling the recess holes, the solder attached to the fourth lead surface and extending to the fifth package surface.
US10510641B2	Semiconductor device having backside interconnect structure on through substrate via and method of forming the same A semiconductor device includes a through-substrate via extending from a frontside to a backside of a semiconductor substrate. The through-substrate via includes a concave or a convex portion adjacent to the backside of the semiconductor substrate. An isolation film is formed on the backside of the semiconductor substrate. A conductive layer includes a first portion formed on the concave or convex portion of the through substrate via and a second portion formed on the isolation film. A passivation layer partially covers the conductive layer.
US10510636B2	Electronic module An electronic module comprises a substrate 11, 21, an other-side electronic component 18, 23 provided on the other side of the substrate 11, 21, a one-side electronic component 13, 28 provided on one side of the substrate 11, 21 and a connecting terminal 115, 125 having an other-side extending part 119a, 129a extending to circumferential outside of the substrate 11, 21 on the other side of the substrate 11, 21, a one-side extending part 119b, 129b extending to circumferential outside of the substrate 11, 21 on one side of the substrate 11, 21, and a connecting part 118, 128 connecting the other-side extending part 119a, 129a with the one-side extending part 119b, 129b at the circumferential outside of the substrate 11, 21.
US10510635B2	Integrated circuit packages and methods for forming the same A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing step, a second sawing step is performed to saw the wafer into a plurality of dies.
US10510634B2	Package structure and method In an embodiment, a device includes: a substrate having a first side and a second side opposite the first side; an interconnect structure adjacent the first side of the substrate; and an integrated circuit device attached to the interconnect structure; a through via extending from the first side of the substrate to the second side of the substrate, the through via being electrically connected to the integrated circuit device; an under bump metallurgy (UBM) adjacent the second side of the substrate and contacting the through via; a conductive bump on the UBM, the conductive bump and the UBM being a continuous conductive material, the conductive bump laterally offset from the through via; and an underfill surrounding the UBM and the conductive bump.
US10510632B2	Method of packaging thin die and semiconductor device including thin die A semiconductor device has a carrier and a semiconductor die disposed over the carrier. A dummy die is disposed over the carrier as well. A first encapsulant is deposited over the semiconductor die and dummy die. The dummy die and a first portion of the first encapsulant is backgrinded while a second portion of the first encapsulant remains covering the semiconductor die. Backgrinding the dummy die fully removes the dummy die while the second portion of the first encapsulant remains covering the semiconductor die. A second encapsulant is optionally deposited over the dummy die prior to disposing the dummy die over the carrier. A conductive pillar is optionally formed over the dummy die prior to depositing the second encapsulant. The carrier is removed to expose an active surface of the semiconductor die. A build-up interconnect structure is formed over the active surface after removing the carrier.
US10510631B2	Fan out package structure and method of manufacturing the same A package structure and a method of manufacturing the same are provided. The package structure includes a die, a redistribution layer (RDL) structure, a through integrated fan-out via (TIV) and a first connector. The RDL structure is connected to the die and includes a plurality of RDLs. The TIV is aside the die and penetrates through the RDL structure. The first connector is in electrical contact with the TIV and electrically connected to the die. The TIV is in electrical contact with the RDLs of the RDL structure.
US10510628B2	Contact pads for electrical module assembly with multidimensional transducer arrays For multidimensional transducer array interconnection, circuit boards with electronics are stacked to form a surface for connection with the array. The surface of the circuit boards for connecting with the transducer array is metalized and diced. Rather than relying on small exposed traces, larger contact pads are formed by metalizing the surface and then dicing the surface. This forms an array of contact pads for connecting with the z-axis or other connectors for elements of the multidimensional transducer array.
US10510626B2	Method for use in manufacturing a semiconductor device die In one embodiment, a wafer includes a number of die areas each including a semiconductor device and dedicated to become a separate die. The die areas are disposed on a first face of the wafer and wherein adjacent die areas are distanced from one another. A first trench and a second trench are formed on the first face between adjacent die areas. The first trench and the second trench are spaced apart from one another by a ridge. A third trench is disposed above the ridge on a second face of the wafer.
US10510621B2	Methods for threshold voltage tuning and structures formed thereby Generally, the present disclosure provides example embodiments relating to tuning threshold voltages in transistor devices and the transistor devices formed thereby. Various examples implementing various mechanisms for tuning threshold voltages are described. In an example method, a gate dielectric layer is deposited over an active area in a device region of a substrate. A dipole layer is deposited over the gate dielectric layer in the device region. A dipole dopant species is diffused from the dipole layer into the gate dielectric layer in the device region.
US10510616B2	Post contact air gap formation A method of making a semiconductor device with an air gap for a terminal of a semiconductor device includes forming a sacrificial sidewall spacer and removing the spacer after the formation of contact structures for the semiconductor device. The air gap is located in portions of the wafer where the sacrificial air gap was removed. Since the contacts are formed prior to the removal of the sacrificial spacers, air gaps can advantageously be formed without electrically conductive contact material undesirably being deposited in locations of the desired air gap.
US10510612B2	Low-K gate spacer and formation thereof Gate structures and gate spacers, along with methods of forming such, are described. In an embodiment, a structure includes an active area on a substrate, a gate structure on the active area and over the substrate, and a low-k gate spacer on the active area and along a sidewall of the gate structure. The gate structure includes a conformal gate dielectric on the active area and includes a gate electrode over the conformal gate dielectric. The conformal gate dielectric extends vertically along a first sidewall of the low-k gate spacer. In some embodiments, the low-k gate spacer can be formed using a selective deposition process after a dummy gate structure has been removed in a replacement gate process.
US10510611B2	Method for direct forming stressor, semiconductor device having stressor, and method for forming the same A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor is a grading strained stressor including multiple graded portions formed at graded depths. The first stressor is configured to create one of a graded compressive stress or a graded tensile stress.
US10510610B2	Structure and method of forming fin device having improved fin liner A method for forming a semiconductor device. The method may include providing a transistor structure, where the transistor structure includes a fin array, the fin array including a plurality of semiconductor fins, disposed on a substrate. A liner may be disposed on the plurality of semiconductor fins. The method may include directing first angled ions to the fin array, wherein the liner is removed in an upper portion of the plurality of semiconductor fins, and wherein the liner remains in a lower portion of the at least one of the plurality of semiconductor fins, and wherein the upper portion comprises an active fin region to form a transistor device.
US10510608B2	Semiconductor structure and manufacturing method thereof A semiconductor structure includes a first fin, a second fin, a first gate, a second gate, at least one spacer, and an insulating structure. The first gate is present on the first fin. The second gate is present on the second fin. The spacer is present on at least one side wall of at least one of the first gate and the second gate. The insulating structure is present between the first fin and the second fin, in which the spacer is substantially absent between the insulating structure and said at least one of the first gate and the second gate.
US10510604B2	Semiconductor device and method A semiconductor device and method of manufacture are provided. In an embodiment a first semiconductor device and a second semiconductor device are formed within a semiconductor wafer and a scribe region between the first semiconductor device and the second semiconductor device is patterned. A singulation process is then utilized within the scribe region to singulate the first semiconductor device from the second semiconductor device. The first semiconductor device and the second semiconductor device are then bonded to a second semiconductor substrate and thinned in order to remove extension regions from the first semiconductor device and the second semiconductor device.
US10510603B2	Conductive vias in semiconductor packages and methods of forming same An embodiment method includes bonding a first die to a first side of an interposer, the interposer comprising a substrate; after bonding the first die to the first side of the interposer, depositing a first insulating layer on a second side of the interposer opposite the first side; patterning an opening through the substrate and the first insulating layer; and depositing a second insulating layer over the first insulating layer and along sidewalls and a lateral surface of the opening. The second insulating layer comprises silicon. The method further includes removing lateral portions of the second insulating layer to define a sidewall spacer on sidewalls of the opening and forming a through via in the opening, wherein the through via is electrically connected to the first die.
US10510600B1	Shared contact structure and methods for forming the same A butted contact structure is provided. In one embodiment, a structure includes a first transistor on a substrate, the first transistor comprising a first source or drain region, a first gate, and a first gate spacer being disposed between the first gate and the first source or drain region. The structure includes a second transistor on the substrate, the second transistor comprising a second source or drain region, a second gate, and a second gate spacer being disposed between the second gate and the second source or drain region. The structure includes a butted contact disposed above and extending from the first source or drain region to at least one of the first or second gate, a portion of the first gate spacer extending a distance into the butted contact to separate a first bottom surface of the butted contact from a second bottom surface of the butted contact.
US10510595B2	Integrated fan-out packages and methods of forming the same A method of forming a semiconductor device includes attaching a metal foil to a carrier, the metal foil being pre-made prior to attaching the metal foil; forming a conductive pillar on a first side of the metal foil distal the carrier; attaching a semiconductor die to the first side of the metal foil; forming a molding material around the semiconductor die and the conductive pillar; and forming a redistribution structure over the molding material.
US10510590B2	Low resistivity films containing molybdenum Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.
US10510589B2	Cyclic conformal deposition/anneal/etch for Si gapfill Methods for seam and void-free gapfilling, such as gapfilling high aspect ratio trenches with amorphous silicon, are provided. A method generally includes depositing amorphous silicon over a semiconductor device having one or more features thereon, annealing the deposited amorphous silicon to heal one or more seams in the deposited amorphous silicon between the one or more features, and etching the annealed amorphous silicon to remove one or more voids in the annealed amorphous silicon between the one or more features. The deposition, anneal, and etch processes are generally repeated any suitable number of times to achieve amorphous silicon gapfill without any seam or void between the one or more features.
US10510587B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes forming a structure protruding from a substrate, forming a dielectric layer covering the structure, forming a dummy layer covering the dielectric layer, and performing a planarization process to completely remove the dummy layer. A material of the dummy layer has a slower removal rate to the planarization process than a material of the dielectric layer.
US10510584B2	Via patterning using multiple photo multiple etch A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.
US10510583B2	Method of manufacturing silicon germanium-on-insulator The disclosed method is suitable for producing a SiGe-on-insulator structure. According to some embodiments of the method, a layer comprising SiGe is deposited on silicon-on-insulator substrate comprising an ultra-thin silicon top layer. In some embodiments, the layer comprising SiGe is deposited by epitaxial deposition. In some embodiments, the SiGe epitaxial layer is high quality since it is produced by engineering the strain relaxation at the Si/buried oxide interface. In some embodiments, the method accomplishes elastic strain relaxation of SiGe grown on a few monolayer thick Si layer that is weakly bonded to the underline oxide.
US10510580B2	Dummy fin structures and methods of forming same An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.
US10510574B2	Prober Abbe error that needs to be considered in high accuracy positioning of a device to be maintained, is suppressed. A prober includes: a plurality of measurement sections arranged between a conveyance area and a maintenance area, each of the measurement sections having a device to be maintained which is used for inspection of a semiconductor element formed on a wafer, and a draw-out mechanism configured to draw out the device to be maintained to a side of the maintenance area; a conveyance unit configured to convey an object to be conveyed to a destination measurement section; and a loading part configured to load the object to be conveyed from the side of the maintenance area to the measurement section. The object to be conveyed is loadable into the measurement section from a conveyance area side and the maintenance area side.
US10510573B2	Loading apparatus and operating method thereof A loading apparatus for processing a wafer cassette containing a plurality of wafers and an operating method thereof are provided. The operating method includes the following steps. The wafer cassette is loaded on a stage of the loading apparatus. The stage is configured to carry the wafer cassette and movably coupled to a main body of the loading apparatus to move within and out of a space of the main body. The stage is vertically moved among a standby position, a lifting position and an intermediate position; horizontally moved from the intermediate position to a door engaging position inside the space; positioned at the door engaging position, and a cassette door of the wafer cassette is opened. The stage is horizontally moved from the door engaging position to the intermediate position, and horizontally moved between the lifting position and an unloading position outside the space after opening the cassette door.
US10510569B2	Pattern forming apparatus and manufacturing method for semiconductor device A pattern forming apparatus according to an embodiment includes: a pre-alignment unit that performs pre-alignment for a substrate; a transfer unit that transfers the substrate into the pre-alignment unit; a placing table on which the substrate transferred into the pre-alignment unit is placed; a position detecting unit provided at a position included in the placing table and overlapping with an edge of the substrate, and adapted to detect a position of the edge of the substrate; and a control unit that calculates a positional displacement amount of the substrate from the position of the edge of the substrate detected by the position detecting unit, and controls the placing table on the basis of the positional displacement amount of the substrate to correct the position of the substrate.
US10510568B2	Corrosion inhibitor injection apparatus An inhibitor solution injector system for an IC decapsulation apparatus has a source reservoir of inhibitor solution, a fluid injection apparatus connected to the source reservoir by a fluid passage, an injection coupling having a first input passage for inhibitor solution, and a through passage for etchant solution, the input passage intersecting with the through passage, and control circuitry controlling the controlled fluid injection apparatus. The fluid injection apparatus is controlled to draw inhibitor solution from the source reservoir, and to inject inhibitor solution through the input passage into the through passage of the injection coupling.
US10510557B2	Electronic part mounting substrate and method for producing same An electronic part mounting substrate includes: a metal plate 10 (for mounting thereon electronic parts) of aluminum or an aluminum alloy having a substantially rectangular planar shape, one major surface of the metal plate 10 being surface-processed so as to have a surface roughness of not less than 0.2 micrometers; a plating film 20 of nickel or a nickel alloy formed on the one major surface of the metal plate 10; an electronic part 14 bonded to the plating film 20 by a silver bonding layer 12 (containing a sintered body of silver); a ceramic substrate 16 having a substantially rectangular planar shape, one major surface of the ceramic substrate 16 being bonded to the other major surface of the metal plate 10; and a radiating metal plate (metal base plate) 18 bonded to the other major surface of the ceramic substrate 16.
US10510553B1	Dry ashing by secondary excitation An ashing process and device forms radicals of an ashing gas through a secondary reaction. A plasma is generated from a first gas, which is diffused through a first gas distribution plate (GDP). The plasma is diffused through a second GDP and a second gas is supplied below the second GDP. The first gas reacts with the second gas to energize the second gas. The energized second gas is used in ashing a resist layer from a substrate.
US10510552B2	Hard mask removal method A method of removing a hard mask is provided. Gate stacks are patterned on a substrate, where the gate stacks include a polysilicon layer and the hard mask deposited over the polysilicon layer. A dielectric layer is deposited on the substrate and on the patterned gate stacks. A first portion of the dielectric layer is planarized by chemical mechanical polishing (CMP) to remove a topography of the dielectric layer. The hard mask and a second portion of the dielectric layer are removed by the CMP.
US10510547B2	Metal and metal-derived films Embodiments described herein relate to methods and materials for fabricating semiconductor device structures. In one example, a metal film stack includes a plurality of metal containing films and a plurality of metal derived films arranged in an alternating manner. In another example, a metal film stack includes a plurality of metal containing films which are modified into metal derived films. In certain embodiments, the metal film stacks are used in oxide/metal/oxide/metal (OMOM) structures for memory devices.
US10510546B2	Schemes for selective deposition for patterning applications Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface are described. The methods include depositing a second metal on a first metal without protecting the dielectric, protecting the metal with a cross-linked self-assembled monolayer and depositing a second dielectric on the first dielectric while the metal is protected.
US10510545B2	Hydrogenation and nitridization processes for modifying effective oxide thickness of a film Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar structure formed via conventional methods. A plasma hydrogenation process followed by a plasma nitridization process, or a single-step plasma hydrogenation and nitridization process, is performed on a metal nitride layer in a film stack, thereby, according to some embodiments, removing oxygen atoms disposed within layers of the film stack and, in some embodiments, adding nitrogen atoms to the layers of the film stack. As a result, an effective oxide thickness of the metal gate structure is reduced with little or no accompanying flatband voltage shift.
US10510544B2	Non-volatile memory semiconductor device and manufacturing method thereof A method of manufacturing a non-volatile memory semiconductor device includes forming a plurality of memory cells on a non-volatile memory cell area of a semiconductor substrate, and forming a conductive layer over the plurality of memory cells. A first planarization layer of a planarization material having a viscosity of less than about 1.2 centipoise is formed over the plurality of memory cells. A planarization operation is performed on the first planarization layer and the conductive layer, thereby removing an upper region of the first planarization layer and an upper region of the conductive layer. Portions of a lower region of the conductive layer are completely removed between the memory cells.
US10510543B2	Semiconductor device and method of manufacturing thereof A semiconductor device includes an n−-type drift layer of an formed on an n+-type SiC substrate; a p-type layer provided on a surface opposite that facing the n+-type SiC substrate; and an n-type buffer layer provided, as a recombination promoting layer, between the n−-type drift layer and the n+-type SiC substrate, the n-type buffer layer having an impurity concentration higher than that of the n−-type drift layer. In the buffer layer, as a recombination site, a defect energy-level is introduced at a high concentration of 1×1012/cm3 or higher. The buffer layer promotes internal electron-hole recombination and without applying high energy to BPDs at an interface of the buffer layer and the SiC substrate, may reduce the amount of recombination near the interface even at a current density equivalent to that of a conventional structure and thereby, prevents characteristics degradation at the time of operation.
US10510540B2	Mask scheme for cut pattern flow with enlarged EPE window Methods of forming semiconductor devices comprising etching a hardmask and spin-on-carbon layer through an opening in a photoresist to expose a gapfill material. The photoresist, spin-on-carbon layer and gapfill material are removed. A new spin-on-carbon layer, hardmask and photoresist are formed with an opening over a spacer mandrel. The hardmask, spin-on-carbon layer are etched through the opening and the layers and spacer mandrel are removed. An etch stop layer and oxide layer are removed and a height of the spacer mandrel and gapfill material are reduced exposing portions of the substrate. The exposed portions of the substrate are fin etched and the layers removed.
US10510535B2	Optoelectronic device comprising three-dimensional semiconductor elements, and method for manufacturing said device The invention relates to a method for manufacturing an optoelectronic device (50) including wire-like, conical, or frustoconical semiconductor elements (20) predominantly comprising a III-V compound. Each semiconductor element extends along an axis and includes a portion (54), the side surfaces (55) of which are covered with a shell (56) including at least one active region (31), wherein the portions are created by continuous growth in a reactor, and wherein the temperature in the reactor varies in an uninterrupted manner from a first temperature value that favors growth of first crystallographic planes perpendicular to said axis, to a second temperature value that is strictly lower than the first temperature value and favors growth of second crystallographic planes parallel to said axis.
US10510533B2	Nanowire fabrication method and structure thereof A method of providing an out-of-plane semiconductor structure and a structure fabricated thereby is disclosed. The method comprises acts of: providing a substrate defining a major surface; providing a template layer having a predetermined template thickness on the major surface of the substrate; forming a recess in the template layer having a recess pattern and a recess depth smaller than the template thickness; and epitaxilally growing a semiconductor structure from the recess. A planar shape of the recess pattern formed in the template layer substantially dictates an extending direction of the semiconductor structure.
US10510531B2	Method of fabrication of a semiconductor element comprising a highly resistive substrate A method of fabrication of a semiconductor element includes a step of rapid heat treatment in which a substrate comprising a base having a resistivity greater than 1000 Ohm·cm is exposed to a peak temperature sufficient to deteriorate the resistivity of the base. The step of rapid heat treatment is followed by a curing heat treatment in which the substrate is exposed to a curing temperature between 800° C. and 1250° C. and then cooled at a cooldown rate less than 5° C./second when the curing temperature is between 1250° C. and 1150° C., less than 20° C./second when the curing temperature is between 1150° C. and 1100° C., and less than 50° C./second when the curing temperature is between 1100° C. and 800° C.
US10510528B2	Substrate processing method A substrate processing method includes a replacement step of replacing a rinse liquid adhered to the front surface of a substrate with a low surface tension liquid whose surface tension is lower than that of the rinse liquid, where the replacement step includes a low surface tension liquid supply step of supplying the low surface tension liquid to the front surface while supplying a heating fluid to the rear surface on a side opposite to the front surface and a post-heating step of supplying the heating fluid to the rear surface on the side opposite to the front surface of the substrate, in a state in which the supply of the low surface tension liquid to the front surface is stopped, before the start of a spin dry step after the completion of the low surface tension liquid supply step.
US10510526B2	Nano-gas light sources based on graphene for displays A gas light source is disclosed where gas is contained within a graphene cylinder or graphene capsule. Electrodes extending into the graphene cylinder or capsule are stimulated by an electric voltage to emit light. Eight graphene cylinder light sources can be arranged into a seven-segment alpha-numeric display having a decimal point. Different gases produce different colors of light. Three gas light sources having different gases can be arranged into an RGB pixel. An array of RGB pixels can be formed into a display.
US10510522B2	Mass spectrometry using plasma ion source To correct spectral interference due to a divalent ion of an interfering element on a measurement ion of an analysis element measured by a mass spectrometer using a plasma ion source by accounting for a mass-bias effect of the mass spectrometer, measurement values of ionic strength of divalent ions of two isotopes having different, odd mass numbers among isotopes of the interfering element are used. In measuring to obtain a measurement value where a correction method of the present invention is applied, it is suitable to set a mass resolution of the mass spectrometer to be higher than a time of normal analysis.
US10510521B2	Interactive analysis of mass spectrometry data This invention relates to graphical user-interactive analysis of data, including in particular, mass spectrographic data analysis, as well as methods and software for generating and using such. One aspect provides user-customizable reports, including methods and apparatuses for generating customizable pivot tables and graphs specific to mass spectrographic data.
US10510514B2	Gas supply mechanism and semiconductor manufacturing apparatus According to an aspect, a gas supply mechanism for supplying a gas to a semiconductor manufacturing apparatus is provided. The gas supply mechanism includes a pipe connecting a gas source and the semiconductor manufacturing apparatus to each other, and a valve which is provided on the pipe. The valve includes a plate rotatable about an axis, the axis extending in a plate thickness direction, and a housing provided along the plate without contacting the plate to accommodate the plate, the housing providing a gas supply path along with the pipe. A through hole is formed in the plate, the through hole penetrating the plate at a position on a circle which extends around the axis and intersects the gas supply path.
US10510512B2	Methods and systems for controlling plasma performance Embodiments of method and system for controlling plasma performance are described. In an embodiment a method may include supplying power at a first set of power parameters to a plasma chamber. Additionally, the method may include forming plasma within the plasma chamber using the first set of power parameters. The method may also include measuring power coupling to the plasma at the first set of power parameters. Also, the method may include supplying power at a second set of power parameters to the plasma chamber. The method may additionally include measuring power coupling to the plasma at the second set of power parameters to the plasma. The method may also include adjusting the first set of power parameters based, at least in part, on the measuring of the power coupling at the second set of power parameters.
US10510507B2	Fuse unit A fuse unit includes a fusible link, a holding mechanism, and a locking mechanism. The fusible link is connected to a battery terminal and includes a fusible element that melts when an overcurrent flows through the fusible link. The holding mechanism includes a base portion disposed between a post standing surface of a battery housing and the battery terminal in a state where the battery terminal is fastened to a battery post provided on the post standing surface, and a holding portion that is formed next to the base portion and that holds the fusible link above the post standing surface. The locking mechanism locks the holding mechanism onto the post standing surface. With this configuration, the fuse unit can suppress a load acting on the battery post.
US10510506B1	Narrow profile circuit breaker with arc interruption A circuit breaker design allows for the circuit breaker to have an overall width (i.e., measured along the circuit breaker's exposed outwardly-facing surface of its housing) that is narrower than achievable with known typical configurations, while at the same time still providing robust arc interruption capabilities. This is achieved in large part by providing a specific orientation of a moveable contact arm assembly and/or by providing a specific configuration of a current path within the housing.
US10510505B2	Fuse unit and method of manufacturing fuse unit The present invention provides a fuse unit, which reduces the number of components of a bus bar and eliminates alignment of tuning fork terminals, and a method of manufacturing the fuse unit. Disclosed is a method of manufacturing a fuse unit, which includes a bus bar including a battery terminal, a fuse connection terminal, and an external connection terminal and is manufactured by integrating the bus bar and a resin covering body by insert molding. In this manufacturing method, the fuse connection terminal is constituted of an input side tuning fork terminal connected to the battery terminal and an output side tuning fork terminal connected to the external connection terminal, the input side tuning fork terminal and the output side tuning fork terminal are connected by a joining portion so as to face each other, the bus bar including the fuse connection terminal is integrated with the resin covering body by insert molding. After the insert molding, the joining portion is cut and removed through a cutting window of the resin covering body, which exposes the joining portion to the outside, and the input side tuning fork terminal and the output side tuning fork terminal are separated.
US10510504B2	Force amplified low pressure depth activated switch Systems (100) and methods (2400) for operating a submersible switch positioned below a body of water's surface. The methods comprise: deflecting a semi-rigid top wall of the submersible switch's cap towards a center of the switch when hydrostatic pressure is applied thereto; directly applying a pushing force by the submersible switch's cap onto an actuator of an internal switch disposed in a body of the submersible switch; and causing an operational state change of the submersible switch in response to the pushing force being applied directly to the actuator of the internal switch.
US10510502B2	Thermal protector A thermal protector includes, in a fixed manner, a first terminal and a second terminal that are respectively connected to external circuits, at lower left/right ends of the longitudinal directions of a base, and a right end at which a movable plate and a bimetal are superimposed is fixed to the right end of the upper surface of the base and is connected to the second terminal. A fixed contact is fixed to an internal end of the first terminal that is exposed in the left end of the base. A movable contact is fixed at a position facing the fixed contact on the lower surface of the left end of the movable plate. A partition wall that encloses the movable contact and the fixed contact from three directions is provided and bent plate planes are formed on both sides of the movable plate in the vicinity of the movable contact. The bent plate planes adjust the flow direction of hot air in cooperation with the partition wall so as to prevent a malfunction of a breaking arc flying to surrounding conductive members.
US10510501B2	Rotary knob controller According to the present disclosure, a controller includes a base and a continuous sealing layer connected to the base forming an environmentally sealed compartment between the base and a lower surface of the continuous sealing layer. A circuit board is positioned within the compartment, and a rotary knob encoder is positioned on an upper surface of the continuous sealing layer. Movement of the rotary knob encoder is detectable by the circuit board through the continuous sealing layer.
US10510500B2	Including one or more lenses in individual keys of a keyboard to focus light In some examples, a computing device may include a first housing coupled to a second housing. The first housing may include a first set of components including a display device. The second housing may include a second set of components including a keyboard and a light source that emits light. An individual key of the keyboard may include one or more lenses. The one or more lenses may focus the light towards an area below an individual keycap of the individual key. For example, the one or more lenses may be integrated into a scissor mechanism of the individual key. The keycap may include an opaque material into which is embedded a character or a symbol made of a transparent or translucent material through which the light is visible.
US10510498B2	Travel switch with high-safety lever structure A travel switch with a high-safety lever structure comprises a travel adjustment device, a transmission device, a lever-structure electric-connection switch assembly, an insulation assembly and a rivet fixing assembly; the switch assembly comprises a dual-energy-storage-reed structure and a stationary contact piece; the dual-energy-storage-reed structure comprises a stationary reed and a moving reed; the moving reed and the stationary reed are spaced apart at one end, and the moving reed is connected to the stationary reed at another end; the moving reed has energy storage reeds and a moving contact; the stationary reed has energy storage reed positioning hooks; the energy storage reed hooks the energy storage reed positioning hook in a matched mode; the stationary contact piece has a stationary contact; a moving contact limiting block is on the stationary reed; the moving contact connects the stationary contact, and the moving contact corresponds to the moving contact limiting block.
US10510496B2	Multilayer ceramic capacitor and method for making multilayer ceramic capacitor A multilayer ceramic capacitor includes a multilayer body that includes ceramic layers and inner conductor layers arranged in a stacking direction and that includes a first surface in which the inner conductor layers are exposed, and an outer electrode on the first surface of the multilayer body. The inner conductor layers contain Ni. The outer electrode includes a base layer that directly covers at least a portion of the first surface and is connected to the inner conductor layers. The base layer contains a metal and glass and includes a Ni diffusion portion connected to the inner conductor layers, the Ni diffusion portion containing Ni. A ratio of a diffusion depth of the Ni diffusion portion to a thickness of the base layer is smaller on two of the inner conductor layers that are located outermost than on other inner conductor layers.
US10510490B1	Multilayer ceramic electronic component A multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and first and second internal electrodes stacked to be alternately exposed to one side surface and the other side surface with the dielectric layer disposed therebetween; and first and second external electrodes disposed on an external surface of the ceramic body to be connected to the first and second internal electrodes, respectively, in which the ceramic body includes an area of overlap in a thickness direction of the first and second internal electrodes, margin region, and/or cover region, and the margin region in the width direction and/or the cover region includes a phosphoric acid-based second phase.
US10510489B2	Mounting structure and multilayer capacitor built-in substrate A mounting structure includes a circuit board including one principal surface on which a multilayer capacitor is mounted. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer. A multilayer capacitor built-in substrate includes a circuit board, a multilayer capacitor on one principal surface of the circuit board, and a resin layer on the one principal surface of the circuit board and embedding the multilayer capacitor. The circuit board includes a first insulating layer, and a second insulating layer having a Young's modulus smaller than that of the first insulating layer. The second insulating layer is closer to the one principal surface than the first insulating layer.
US10510488B2	Multilayer ceramic capacitor A multilayer ceramic capacitor includes a laminated body including ceramic layers, first internal electrode layers, and second internal electrode layers alternately laminated. First and second external electrodes provided on the laminated body include first diffusion portions defined by interdiffusion of the first internal electrode layers and the first external electrode at interfaces between the first internal electrode layers and the ceramic layers, and second diffusion portions defined by interdiffusion of the second internal electrode layers and the second external electrode at interfaces between the second internal electrode layers and the ceramic layers.
US10510487B2	Multi-layer ceramic electronic component and method of producing the same A method of producing a multi-layer ceramic electronic component includes: preparing a multi-layer sheet including laminated ceramic sheets, and internal electrodes disposed between the ceramic sheets; cutting the multi-layer sheet to produce a multi-layer chip having a side surface from which the internal electrodes are exposed; removing a superficial layer of the side surface of the multi-layer chip; and providing a side margin to the side surface of the multi-layer chip, the superficial layer being removed from the side surface.
US10510485B2	Heat transfer in magnetic assemblies A magnetic assembly includes a winding and a housing disposed about the winding. The housing includes an interior surface contoured to conform to the winding to facilitate heat transfer between the winding and the housing. A method of manufacturing a magnetic assembly includes forming a contoured interior surface on a housing and assembling a winding into the housing such that the interior surface of the housing conforms to the winding to facilitate heat transfer between the winding and the housing.
US10510484B2	Forming an electrical coil device by cutting a strip conductor winding into at least two partial coils A method for producing an electrical coil device may include winding a strip conductor into a coil winding and subsequently dividing the coil winding into at least two partial coils by at least one cut through the coil winding, wherein the strip conductor remains connected as a doubly contiguous loop by existing remaining connections in the end regions of the strip conductor. An electric coil device is also disclosed, which includes at least two partial coils from a higher-level doubly contiguous strip conductor. The at least two partial coils may be produced by subsequent cutting of a coil winding wound by a single strip conductor.
US10510483B2	Production method for R-T-B sintered magnet A step of, while a powder of an RLM alloy (where RL is Nd and/or Pr; M is one or more elements selected from among Cu, Fe, Ga, Co, Ni and Al) and a powder of an RH compound (where RH is Dy and/or Tb; and the RH compound is one, or two or more, selected from among an RH fluoride, an RH oxide, and an RH oxyfluoride) are present on the surface of a sintered R-T-B based magnet, performing a heat treatment at a sintering temperature of the sintered R-T-B based magnet or lower is included. The RLM alloy contains RL in an amount of 65 at % or more, and the melting point of the RLM alloy is equal to or less than the temperature of the heat treatment. The heat treatment is performed while the RLM alloy powder and the RH compound powder are present on the surface of the sintered R-T-B based magnet at a mass ratio of RLM alloy:RH compound=9.6:0.4 to 5:5.
US10510479B2	Electronic component and manufacturing method thereof An electronic component includes a coil, or a coiled conductor, and a molded body including a sealant containing resin and magnetic powder, and encapsulating the coil. The coil is coated with a cured product of a thermosetting composition, and the coated body is embedded in the molded body. A method of manufacturing the electronic component includes forming a coil by winding a conductor, applying a thermosetting composition on the coil, heat treating the coil on which the composition is applied to obtain a coated body, embedding the coated body into a sealant containing resin and magnetic powder, and applying pressure to the sealant to form a molded body.
US10510478B2	Stacked coil for wireless charging structure on InFO package A structure includes a first encapsulating layer, and a first coil in the first encapsulating layer. A top surface of the first encapsulating layer is coplanar with a top surface of the first coil, and a bottom surface of the first encapsulating layer is coplanar with a bottom surface of the first coil. A second encapsulating layer is over the first encapsulating layer. A conductive via is in the second encapsulating layer, and the first conductive via is electrically coupled to the first coil. A third encapsulating layer is over the second encapsulating layer. A second coil is in the third encapsulating layer. A top surface of the third encapsulating layer is coplanar with a top surface of the second coil, and a bottom surface of the third encapsulating layer is coplanar with a bottom surface of the second coil.
US10510473B2	Switchgear For the purpose of obtaining a switchgear that can perform a reliable operation, the switchgear includes: opening and closing coils that drive a movable element, opening and closing capacitors that supply energy to the coils, opening and closing control sections that perform control of charging the capacitors and of energizing the coils, an opening coil that drives the movable element to the open side, an opening capacitor frat supplies energy to the coil, a second opening control section that performs control of charging the opening capacitor and of energizing the opening coil, and an interlock circuit that energizes the second opening control section; and a signal showing that the second opening control section is in operation is supplied to an interlock circuit.
US10510472B2	Coil actuator for LV or MV applications The present application relates to a coil actuator for low and medium voltage applications, which comprises a electromagnet operatively associated with a movable plunger, a power & control unit electrically connected with the electromagnet and first and second input terminals (T1, T2) operatively connected with the power & control unit, wherein an input voltage (VIN) is applied between said first and second input terminals during the operation of the coil actuator. The coil actuator further comprise a third input terminal (T3) operatively connected with the power & control unit, the third input, terminal being adapted to be in a first operating connection (A), which correspondences to normal control conditions (NDC) for the operation of the electromagnet, or in a second operating condition (B), which corresponds to overriding control conditions (ODC) for the operation of said electromagnet. The power & control unit is adapted to control the operation of the electromagnet according to the normal control conditions or the overriding control conditions depending on the operating condition (A, B) of the third input terminal.
US10510470B2	Diffusion barriers for metallic superconducting wires In various embodiments, superconducting wires incorporate diffusion barriers composed of Ta alloys that resist internal diffusion and provide superior mechanical strength to the wires.
US10510468B2	LAN cable A LAN cable includes a sheath; an electrical wire accommodated in the sheath and including a conductor and an insulating body covering the conductor; and an intermediate layer having a mass reduction rate at 500.degree. C. of less than or equal to 10% by mass and a mass reduction rate at 600.degree. C. of less than or equal to 50% by mass, and located between the sheath and the electrical wire. The insulating body includes polyethylene having a dielectric constant of smaller than or equal to 2.5. The sheath includes a polyolefin-based polymer and a flame retardant, and a content of the flame retardant in the sheath is greater than or equal to 150 parts by mass with respect to 100 parts by mass of the polyolefin-based polymer.
US10510467B2	Shielded cable Shielded cables (200) are described. More specifically, shielded cables (200) that include a plurality of separate individual conductor sets (210) are described. The individual conductor sets (210) include two or more insulated conductors, first and second conductive shielding films, and an insulating jacket surrounding the plurality of conductor sets. A variety of potential cable shapes and configurations are also described.
US10510462B2	Silver-coated resin particles, method for manufacturing same, and electroconductive paste using same A silver-coated resin particle including a heat-resistant resin core particle and a silver coating layer formed on the surface of the resin core particle. The average grain diameter of the resin core particle is 0.1 to 10 μm, the amount of silver contained in the silver coating layer is 60 to 90 parts by mass, relative to 100 parts by mass of the silver-coated resin particle, and the exothermic peak temperature of the silver-coated resin particle by differential thermal analysis is 265° C. or higher.
US10510459B2	Insulated winding wire articles having conformal coatings Insulated winding wire articles and associated formation methods are described. An insulated winding wire article may include a conductor and optional base insulation formed around the conductor. The conductor may be formed into a predefined shape having at least one bend, such as a U-shaped bend. A coating comprising parylene may be formed around the conductor and any base insulation.
US10510454B2	Main pump shaft seal water injection system of a nuclear power station A main pump shaft seal water injection system of a nuclear power plant includes a jet pump, a high pressure cooler, a hydrocyclone, valves and a main connection pipeline outside of a main pump, and an auxiliary pump and an internal flow path inside the main pump. Inner and outer flow paths of the main pump are connected with a shaft seal water injection hole and a high temperature water drainage hole. The main connection pipeline is connected between an upper filling water pipeline and a shaft seal water injection hole. A bypass pipeline connected with the jet pump, the high pressure cooler and the hydrocyclone, the main connection pipeline is provided with a normally open main pipeline isolating valve. The bypass pipeline allows low temperature upper filling water in the RCV system to enter the shaft seal water injection hole of the main flange directly.
US10510453B2	Electricity generation facility comprising a device for producing steam of reduced height, application to PWR and BWR reactors The invention relates to an electrical energy generation facility comprising: —a steam generation device (1) that is suitable for producing saturated steam (VI) from a heat source and is arranged in a chamber (10); —a set of one or more separators (13) that is/are connected downstream to the steam generation device (1) and is/are suitable for removing most of the water from the steam (VI) generated by the device (1), said set being arranged in the chamber (10); —a set of one or more dryers (14) which is connected upstream to the set of separators (13) and is suitable for collecting the water droplets suspended in the steam (V2) that is discharged from the set of separators so as to generate dry steam (V3); —a steam turbine (2) comprising at least one body (20) for expanding dry steam (V3), the steam turbine being suitable for producing electricity from the dry steam (V3); —a set of exchangers (23, 7) suitable for operating as steam superheaters or for reheating supply water; the set of one or more dryers (14) is arranged outside the chamber (10) of the steam generation device (1), the inlet (14a) of the set of dryers is connected upstream to the set of separators (13), a first outlet (14b) is connected downstream to the inlet of the body (20) of the turbine, and a second outlet (14c) is connected downstream, as a heat source, to the set of exchangers (23, 7).
US10510451B2	Base plate mounted core components for reliable rod assembly and rapid field disassembly A mounting assembly that has no threaded connections. A rod with pins or machined features radially extending from a distal end is configured to rotate until the pins align with grooves in a hole through a base plate. The rod is inserted through the hole until the pins are through an opposite surface of the base plate, compressing spring components on the rod. Then the rod is rotated until the pins are aligned with slots that partially extend through the second side of the base plate and the pins become seated in the slots. To remove the rod a tool that engages an articulated feature on the distal end of the rod is installed. The tool rotates the rod until the pins are disengaged from the slots, aligned with the through grooves and passed through the base plate.
US10510450B2	Heat pipe molten salt fast reactor with stagnant liquid core A molten salt reactor includes a containment vessel, a reactor core, a neutron reflector spaced from the containment vessel, and liquid fuel enclosed within the core. The liquid fuel is comprised of a nuclear fission material dissolved in a molten salt. A heat exchanger is positioned external to the containment vessel. A plurality of heat transfer pipes are provided for transferring heat from the core to the heat exchanger. Each pipe has a first and a second end. The first end of each pipe is positioned within the reactor core for absorbing heat from the fuel. The heat exchanger receives the second end of each heat transfer pipe. At least two or more reactor shut down systems are provided. At least one shut down system may be a passive system and at least one or both shut down systems may be an active or a manually operated system.
US10510442B2	Cabinet for dispensing items A cabinet that can control the distribution of products that can optionally include medications. The cabinet can have a user interface that receives information about a user and the user's identity can then be authenticated. The cabinet can accept a user's request to dispense a product and, if the user is approved, the cabinet can dispense a quantity of product to the approved user.
US10510438B2	System and method for building intuitive clinical trial applications The present invention allows clinical trial organizers to operate a platform for creating trial specific custom mobile applications at a price point that would not be possible if the application were created by programmers on a trial-by-trial basis. The invention shortens build time by creating a hierarchy of questions that changes the next question posed to the user based upon their answer to a previous question thereby reducing the number of questions the user must answer while providing the application creation platform with the detailed information relevant to a specific clinical trial. The platform uses a simulation builder that provides a test version of the application to the user mobile device during the application creation process thereby allowing the user to see the layout of the application as they progress through the building process. While building the application, the user can create a simulated version of the application in real time deliver the same to the mobile device of the user. The system creates a handshaking process that allows the user to create annotations and/or edits in the simulated application that are communicated back to the building platform. Changes made in the simulated application will affect the landing page the user sees when returning to the building platform. The system will collect usability data from a clinical trial application on a plurality of trial subject and trial organizer mobile devices. The system can measure variables such as time on page, misentries, and missed selections of icons to determine common trouble spots for users. That data may be used to redesign the interface or process flow of the application to optimize usability.
US10510437B2	Method for creating and using registry of clinical trial participants A method of screening participants for a clinical trial by obtaining identifying information chosen from a biometric sample, personal information, physical attributes, and combinations thereof from a prospective participant, generating a unique identifier code, populating a database with the unique identifier code and participant information and storing the database on computer readable media, screening the participant for a clinical trial based on the unique identifier code and participant information and searching for a match with another participant, searching for protocol violations, and determining eligibility of the participant for the clinical trial and preventing the protocol violations. A system for screening participants for a clinical trial.
US10510436B2	Using serial dilutions of reference samples to construct a reference table for sigmoidal fitting in real-time PCR copy number analysis The present invention discloses a method of real-time quantification of a target nucleic acid in a sample by constructing a reference table of copy number vs. designated parameter from reference samples which sharing the same nucleic acid sequences with the target nucleic acid. The method includes (a) constructing a reference table of copy number vs. designated parameter from reference samples; (b) amplifying the target nucleic acid; (c) monitoring and detecting the amplification of the target nucleic acid in real-time; (d) analyzing the detected signals to get the designated parameter of the target nucleic acid; and (e) looking up and interpolating to the reference table to get the copy number of the target nucleic acid.
US10510435B2	Error correction of multiplex imaging analysis by sequential hybridization Disclosed herein are methods and systems for detecting and/or quantifying cellular targets such as nucleic acids in cells, tissues, organs or organisms. Through sequential barcoding, it is possible to perform high-throughput profiling of a large number of targets, such as transcripts and/or DNA loci. In some embodiments, error correction is implemented through use of barcodes that can tolerate mistakes and missing data during sequential hybridization of probes to selected targets.
US10510434B2	Device and method of selecting pathway of target compound Provided are a method and a device for selecting a pathway for a target compound by combining biochemical and chemical processes together, wherein an input of at least one pathway for synthesis of a target compound or degradation into a target compound is received, hybrid arrangements of one or more reaction steps included in the at least one pathway are predicted, a pathway feasibility score is computed, and at least one hybrid arrangement is selected based on the pathway feasibility score.
US10510433B2	Electromagnetic radiation shielding tile having electromagnetic shielding fabric and metal portions In some examples, an electromagnetic (EM) shielding file is described. The EM radiation shielding tile may include one or more of an EM radiation shielding fabric layer, a mu metal layer, and/or a microwave absorbing layer. In some cases, the EM radiation shielding tile may be configured to bond to clothing, electronic devices, or other objects to deflect and/or absorb electromagnetic field radiation.
US10510432B1	Memory module test adapter Approaches, techniques, and mechanisms are disclosed for a test adapter designed to improve testability of non-volatile dual in-line memory modules (NVDIMM) on automatic test equipment (ATE) testers or in-system boards, which have inadequate power supplies. An NVDIMM includes both volatile memories and non-volatile memories. A test adapter is designed to supply increased power to an NVDIMM. A test adapter is implemented using an interposer or a printed circuit board (PCB) that may be inserted into a socket on an ATE tester or on an end-user system-level board. The interposer or PCB includes a power socket for attaching a power cable to supply the external power supply to the NVDIMM. A power on/off sequence is controlled by an ATE tester to simulate or test a system power on/off sequence. An external input power is always on, but both serial and backup power signals are only on during tests of an NVDIMM.
US10510425B2	Semiconductor storage device A word-line controller applies a voltage to a selected word-line. A bit-line controller applies voltages to bit-lines. A detector detects data of memory-cells. A write sequence of writing data in selected memory-cells connected to the selected word-line has at least one write-loop including a write operation of applying a plurality of write voltages with the word-line controller and the bit-line controller, and a verify operation of verifying with the detection circuit whether a threshold voltage of each of the selected memory-cells has reached a plurality of reference voltages for corresponding write data. The word-line controller and the bit-line controller select a write voltage corresponding to a threshold voltage of each of the selected memory-cells from among the write voltages with respect to each of the write-loops, and apply the selected write voltage to the selected memory-cell in a subsequent write operation.
US10510423B2	Mitigating disturbances of memory cells Methods, systems, and devices for techniques to mitigate disturbances of unselected memory cells in a memory array during an access operation are described. A shunt line may be formed between a plate of a selected memory cell and a digit line of the selected memory cell to couple the plate to the digit line during the access operation. A switching component may be positioned on the shunt line. The switching component may selectively couple the plate to the digit line based on instructions received from a memory controller. By coupling the plate to the digit line during the access operation, voltages resulting on the plate by changes in the voltage level of the digit line may be reduced in magnitude or may be altered in type.
US10510422B2	Memory devices with read level calibration Several embodiments of memory devices and systems with read level calibration are disclosed herein. In one embodiment, a memory device includes a controller operably coupled to a main memory having at least one memory region and calibration circuitry. The calibration circuitry is operably coupled to the at least one memory region and is configured to determine a read level offset value corresponding to a read level signal of the at least one memory region. In some embodiments, the calibration circuitry is configured to obtain the read level offset value internal to the main memory. The calibration circuitry is further configured to output the read level offset value to the controller.
US10510415B1	Memory device using comb-like routing structure for reduced metal line loading A memory device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a first substrate and one or more peripheral devices on the first substrate. The second semiconductor structure includes a first set of conductive lines electrically coupled with a first set of a plurality of vertical structures and a second set of conductive lines electrically coupled with a second set of the plurality of vertical structures different from the first set of the plurality of vertical structures. The first set of conductive lines are vertically distanced from one end of the plurality of vertical structures and the second set of conductive lines are vertically distanced from an opposite end of the plurality of vertical structures.
US10510413B1	Multi-pass programming with modified pass voltages to tighten threshold voltage distributions Apparatuses and techniques are described for programming memory cells with a narrow threshold voltage (Vth) distribution in a memory device. In a first program pass of a multi-pass program operation, pass voltages of the word lines adjacent to a selected word line are adjusted to increase electron injection in a portion of a charge-trapping layer between the selected word line and an adjacent source side unselected word line. In a second, final program pass of the multi-pass program operation, the pass voltages are adjusted to reduce electron injection in the portion of the charge-trapping layer between the selected word line and the adjacent source side unselected word line.
US10510410B2	Method for programming resistive memory cell with AC perturbation AC signal and nonvolatile memory device thereof In the disclosure, a non-volatile memory device includes a resistive memory cell and a write and read circuit. The write and read circuit is coupled to the resistive memory cell and configured to combine a perturbation AC signal with a first writing signal, so as to generate a second writing signal. Then, the write and read circuit applies the second writing signal to the resistive memory cell to program the resistive memory cell. The combination of the oscillation signal and the first writing signal (constant DC signal) and AC signal would penetrate the shielding effect of the insulating layer and free the stuck charges.
US10510409B2	Semiconductor memory device According to one embodiment, a semiconductor memory device, includes a resistance change type memory cell; a first charge section into which a charge based on a current flowing in the memory cell is charged; a second charge section coupled to the first charge section via a switch element; a sense amplifier configured to determine data stored in the memory cell based on the charge charged into the second charge section; and a control circuit configured to control the first charge section, the second charge section, and the sense amplifier.
US10510406B1	Soft-verify write assist circuit of resistive memory and operating method thereof An operating method of the soft-verify write assist circuit of the resistive memory provides a voltage level applying step, a write operating step and a write voltage controlling step. The voltage level applying step is for applying a plurality of voltage levels to the reference voltage, the word line and the switching signal, respectively. The write operating step is for driving the memory cell to perform in a set process or a reset process via the first three-terminal switching element, the second three-terminal switching element and the soft-verify controlling unit during a write operation. The write voltage controlling step is for controlling the write voltage to be increased in the ramping cycle and decreased in the soft-verify cycle.
US10510399B2	Low power SRAM bitcell using resonant drive circuitry An SRAM cell comprises a first inverter having an output lead coupled to the input lead of a second inverter via a first resistor. The output lead of the second inverter is coupled to the first inverter input lead via a second resistor. A first write bit line is coupled to the first inverter input lead via a first switch, and a second write bit line is coupled to the second inverter input lead via a second switch. Because of the resistors, the circuitry driving write bit lines does not have to overpower the inverters when writing data to the cell. The cell is part of an array comprising several columns of SRAM cells, each column coupled to a pair of write bit lines. A resonating oscillator drives the write bit lines with a sine wave. This reduces the power consumed by the SRAM array.
US10510397B2	Integrated circuit devices configured to control discharge of a control gate voltage Integrated circuit devices include a first node, a second node, a transistor connected between the first node and the second node, a current path between a control gate of the transistor and the second node, and a controller configured to concurrently discharge a voltage level of the first node and a voltage level of the second node, monitor a representation of a voltage difference between the voltage level of the first node and a voltage level of the control gate of the transistor while discharging the voltage level of the first node and discharging the voltage level of the second node, activate the current path if the voltage difference is deemed to be greater than a first value, and deactivate the current path if the voltage difference is deemed to be less than a second value.
US10510389B2	Word line decoder circuit A word line decoder circuit located in a memory storage apparatus is provided. The memory storage apparatus includes a memory cell array. The word line decoder circuit includes a word line decoder and a power supply circuit. The word line decoder is coupled to a plurality of word lines of the memory storage apparatus. The power supply circuit is coupled to the word line decoder. The power supply circuit is configured to provide a first power to the word line decoder in a read mode, and provide a second power to the word line decoder in a standby mode. A voltage value of the first power is greater than or less than that of the second power.
US10510386B1	Dynamic bit-line clamping circuit for computing-in-memory applications and clamping method thereof A dynamic bit-line clamping circuit for computing-in-memory applications is configured to clamp a bit line via at least one reference signal and includes a clamping node, a first clamping unit, a second clamping unit, a first feedback controlling unit and a second feedback controlling unit. The first clamping unit is electrically connected between the bit line and the clamping node. The second clamping unit is electrically connected between the clamping node and a power source voltage and includes a switch. The second feedback controlling unit is electrically connected to the clamping node and the switch. The second feedback controlling unit generates a switching signal according to the at least one reference signal and a voltage level of the clamping node. The switch is switched by the switching signal so as to clamp the voltage level of the clamping node according to the at least one reference signal.
US10510380B2	Power switch control for dual power supply An electronic device includes an internal supply rail; a plurality of first main header switches for coupling the internal supply rail to a first power supply; a plurality of second main header switches for coupling the internal supply rail to a second power supply; an auxiliary circuit including a first auxiliary header switch for coupling the internal supply rail to the first power supply and a second auxiliary header switch for coupling the internal supply rail to the second power supply; a feedback circuit, the feedback circuit tracking a status of the first and second main header switches; and a control circuit, the control circuit controlling the first main header switches, second main header switches and first and second auxiliary header switches responsive to the switch control signal and an output of the feedback circuit.
US10510378B1	Slit full disk shroud Provided herein is an apparatus including a hard drive base. A number of disks are rotatably connected to the hard drive base, and there are a number of disk gaps between the disks. A shroud extends in a circumferential span around the disks, wherein the shroud extends less than the circumference of the disks. The shroud is positioned between the disk gaps and an upwardly sloping gas channel. A number of arcuate gas channels are in the shroud, wherein each arcuate gas channel is horizontally aligned with a corresponding disk gap. The arcuate gas channels connect the disk gaps to the upwardly sloping gas channel.
US10510376B2	Method, system and computer program product for editing movies in distributed scalable media environment A movie editor converts a received movie into a proxy format, and creates a texture strip representing the frames of the movie. An editor can use the texture strip to edit the movie, rather than editing the movie directly. Deep tags and/or special effects can be defined for the texture strip using a graphical interface. The graphical interface enables movies to be combined into a playback product according to a control structure graphically presented in the graphical interface.
US10510373B1	Multiple-actuator drive with separate, radially-defined, zones having reduced skew and/or different track properties First tracks are read via a first head that is moved via a first actuator over a first, radially-defined, zone of a disk surface. Second tracks are read via a second head that is moved via a second actuator over a second zone of the disk surface that is separate from the first zone. The first and second heads are optimized to read data within first and second skew angle ranges associated with the first and second zones. The first and second skew angle ranges are each less than a total skew angle range of the disk surface.
US10510370B2	Magnetic tape including characterized magnetic layer and magnetic tape device A magnetic tape is provided in which the total thickness of a non-magnetic layer and a magnetic layer is equal to or smaller than 0.60 μm. The magnetic layer includes a timing-based servo pattern and also includes fatty acid ester. The full width at half maximum of spacing distribution measured by optical interferometry regarding the surface of the magnetic layer before performing vacuum heating with respect to the magnetic tape is greater than 0 nm and less than or equal to 7.0 nm, while the same value measured after performing the vacuum heating is also greater than 0 nm and less than or equal to 7.0 nm. Further, the difference between a spacing measured after performing the vacuum heating and a spacing measured before performing the vacuum heating is greater than 0 nm and equal to or smaller than 8.0 nm.
US10510368B2	Magnetic tape including characterized magnetic layer and magnetic tape device A magnetic tape is provided in which the total thickness is less than or equal to 5.30 μm. The magnetic layer includes a timing-based servo pattern and also a fatty acid ester; and the magnetic layer surface Ra is less than or equal to 1.8 nm. The full width at half maximum of spacing distribution measured by optical interferometry regarding the surface of the magnetic layer before performing vacuum heating with respect to the magnetic tape is greater than 0 nm and less than or equal to 7.0 nm, while the same value measured after performing the vacuum heating is greater than 0 nm and less than or equal to 7.0 nm, also. The difference between a spacing measured after performing the vacuum heating and a spacing measured before performing the vacuum heating is greater than 0 nm and less than or equal to 8.0 nm.
US10510365B2	NFT with mechanically robust materials A recording head includes a near-field transducer proximate a media-facing surface. The near-field transducer comprises an aperture portion surrounded by walls of plasmonic material, the walls oriented normal to the media-facing surface. A notch protrudes within the aperture. The notch comprises at least one of Rh and Ir. A write pole is proximate the near-field transducer. The write pole has a back surface facing away from the media-facing surface and an aperture-facing surface proximate the aperture.
US10510364B2	Devices including a near field transducer (NFT) with nanoparticles Devices that include a near field transducer (NFT) including a crystalline plasmonic material having crystal grains and grain boundaries; and nanoparticles disposed in the crystal grains, on the grain boundaries, or some combination thereof, wherein the nanoparticles are oxides of, lanthanum (La), barium (Ba), strontium (Sr), erbium (Er), hafnium (Hf), germanium (Ge), or combinations thereof; nitrides of zirconium (Zr), niobium (Nb), or combinations thereof; or carbides of silicon (Si), aluminum (Al), boron (B), zirconium (Zr), tungsten (W), titanium (Ti), niobium (Nb), or combinations thereof.
US10510362B2	Directional capture of audio based on voice-activity detection The technology described in this document can be embodied in a computer-implemented method that includes receiving information representing audio captured by a microphone array, wherein the information includes multiple datasets each representing audio signals captured in accordance with a sensitivity pattern along a corresponding direction with respect to the microphone array. The method also includes computing, using one or more processing devices for each of the multiple datasets, one or more quantities indicative of human voice activity captured from the corresponding direction, and generating, based at least on the one or more quantities computed for a plurality of the multiple datasets, a directional audio signal representing audio captured from a particular direction.
US10510361B2	Audio processing apparatus that outputs, among sounds surrounding user, sound to be provided to user An audio processing apparatus is provided that includes an acquirer that acquires a surrounding audio signal indicating a sound surrounding a user. The audio processing apparatus also includes an audio extractor that extracts, from the acquired surrounding audio signal, a providing audio signal indicating a sound to be provided to the user. The audio processing apparatus further includes an output that outputs a first audio signal, indicating a main sound, and the providing audio signal.
US10510360B2	Enhancing audio signals using sub-band deep neural networks Systems and methods for enhancing reverberated audio signals are disclosed. In one embodiment, a method is disclosed comprising receiving an audio signal; partitioning a frequency domain representation of the audio signal into a plurality of sub-band vectors; inputting each sub-band vector into a corresponding deep neural network; calculating, using the corresponding deep neural networks, a plurality of output vectors for each sub-band; concatenating the plurality of output vectors to generate a clean audio feature matrix; and converting the clean audio feature matrix into a time-domain audio signal.
US10510359B1	Command processing device and method A command processing device and method are provided. The command processing device includes a receiving device and a processing device. The receiving device receives an audio signal from an electronic device, wherein the audio data includes data signals and clock signals, and the data signals correspond to a first sound channel and the clock signals correspond to a second sound channel. The processing device is coupled to the receiving device. The processing device obtains the data signals from the first sound channel, and obtains the clock signals from the second sound channel. The processing device obtains one or more commands according to the data signals and clock signals, and performs operations corresponding to the commands.
US10510357B2	Resampling of an audio signal by interpolation for low-delay encoding/decoding A method is provided for resampling an audio-frequency signal in an audio-frequency signal encoding or decoding operation. The resampling is carried out by a method of interpolation of an order greater than one. The method is such that the interpolated samples are obtained by calculating a weighted average of possible interpolation values calculated over a plurality of intervals covering the time location of the sample to be interpolated. A resampling device is provided, which implements the method, and also an encoder and decoder including at least one resampling device.
US10510351B2	Method and system for lossless value-location encoding A method of encoding samples in a digital signal is provided that includes receiving a frame of N samples of the digital signal, determining L possible distinct data values in the N samples, determining a reference data value in the L possible distinct data values and a coding order of L−1 remaining possible distinct data values, wherein each of the L−1 remaining possible distinct data values is mapped to a position in the coding order, decomposing the N samples into L−1 coding vectors based on the coding order, wherein each coding vector identifies the locations of one of the L−1 remaining possible distinct data values in the N samples, and encoding the L−1 coding vectors.
US10510347B2	Language storage method and language dialog system A language storage method according to one aspect of the present invention includes vectorization steps for vectorizing language accumulated in a dialog log database using a word vector created in advance for each word; determination step for determining whether to employ the language that has been vectorized as response data; and a storage step for accumulating the language that has been determined to be employed as the response data in a response database, in which a dimension reduction step for reducing the number of dimensions of the vector of the language vectorized in the vectorization step is included between the vectorization step and the determination step, and in the determination step, it is determined which one of an employed group and an unemployed group the vector of the language whose number of dimensions has been reduced in the dimension reduction step belongs to.
US10510346B2	Systems, methods, and computer-readable storage device for generating notes for a meeting based on participant actions and machine learning Systems, methods, and computer-readable storage devices are disclosed for generating smart notes for a meeting based on participant actions and machine learning. One method including: receiving meeting data from a plurality of participant devices participating in an online meeting; continuously generating text data based on the received audio data from each participant device of the plurality of participant devices; iteratively performing the following steps until receiving meeting data for the meeting has ended, the steps including: receiving an indication that a predefined action has occurred on the first participating device; generating a participant segment of the meeting data for at least the first participant device from a first predetermined time before when the predefined action occurred to when the predefined action occurred; determining whether the receiving meeting data of the meeting has ended; and generating a summary of the meeting.
US10510345B2	Hearing aid device with speech control functionality A hearing aid device for processing signals comprising audio in order to assist a hearing impaired user and being configured to be arranged at, behind and/or in an ear of the user is disclosed. The hearing aid device comprises at least one input transducer, an output transducer, an antenna, a wireless interface, and a signal processing unit. The at least one input transducer is adapted for receiving signals comprising audio. The output transducer is adapted for providing signals comprising audio to the user. The antenna is adapted for wirelessly communicating with a respective external device. The wireless interface is adapted for receiving and/or sending data via the antenna. The signal processing unit is adapted for processing signals comprising audio in order to assist a hearing impaired user. Furthermore the signal processing unit is adapted for extracting speech signals from the signals comprising audio and for generating control signals based on the speech signals. At least one of the control signals generated by the signal processing unit is adapted for controlling the respective external device. The wireless interface is adapted for sending the at least one of the control signals to the respective external device via the antenna in order to control the respective external device.
US10510342B2	Voice recognition server and control method thereof Provided herein is a voice recognition server and a control method thereof, the method including determining an index value for each of a plurality of training texts; setting a group for each of the plurality of training texts based on the index values of the plurality of training texts, and matching a function corresponding to each group and storing the matched results; in response to receiving a user's uttered voice from a user terminal apparatus, determining an index value from the received uttered voice; and searching a group corresponding to the index value determined from the received uttered voice, and performing the function corresponding to the uttered voice, thereby providing a voice recognition result of a variety of user's uttered voices suitable to the user's intentions.
US10510338B2	Voice recognition grammar selection based on context The subject matter of this specification can be embodied in, among other things, a method that includes receiving geographical information derived from a non-verbal user action associated with a first computing device. The non-verbal user action implies an interest of a user in a geographic location. The method also includes identifying a grammar associated with the geographic location using the derived geographical information and outputting a grammar indicator for use in selecting the identified grammar for voice recognition processing of vocal input from the user.
US10510334B1	Passive equalization for headphones A headphone apparatus and method of designing the apparatus, the apparatus having selectable EQ mode circuitry configured for listening to different types of audio signals. The EQ mode circuits comprise only passive circuit elements, and each is configured for listening to audio signals having a different characteristic sound profile. The EQ circuits can be switched in and out of the audio signal path to the headphone earpieces, using a switch selector. The selector is configured to operate the plurality of switches such that only a select one of them can be closed at a time.
US10510322B2	Input display device, input display method, and computer-readable medium An input display device includes: a processor to execute a program; and a memory to store the program which, when executed by the processor, results in performance of steps including: receiving an input of a track by a receiving unit; generating a track image showing the track; acquiring a character string; and displaying the character string acquired in the acquiring to be superimposed on the track image. When the character string is acquired in the acquiring before the track image is generated, the displaying the character string is stood by.
US10510320B2	Display apparatus A display apparatus includes a plurality of displays arranged adjacently, an image divider configured to divide an original input image into a plurality of sub-images for displaying the original input image split between the plurality of displays, wherein one or more of the plurality of sub-images corresponds to one or more still images and one or more of the plurality of sub-images corresponds to one or more moving images, and at least one controller configured to cause the one or more still images and the one or more moving images to be displayed with a first luminance value based on luminance values corresponding to the plurality of sub-images of each display of the plurality of displays. Accordingly, it is possible to improve image quality in the display apparatus including the plurality of displays.
US10510318B2	Vehicle mirror system A vehicle mirror system that includes: an electronic rear-view mirror that is switchable between a display mode in which the electronic rear-view mirror displays, by means of a display component, vehicle rear-view ages captured by an image capturing component provided at a rear portion of the vehicle, and a reflecting mode in which the electronic rear-view mirror shows, by optical reflection, what is behind the vehicle; and a control component that causes switching of the electronic rear-view mirror to either the display mode or the reflecting mode in a case in which a determination criterion relating to a field of view in a rear direction of the vehicle has been met.
US10510313B2	Driving circuit outputting a chamfered wave scanning signal, driving method and display apparatus A driving circuit, a driving method and a display apparatus are provided. The driving circuit comprises: a gate driving module; a timing control module; and a chamfered wave generating circuit, an input terminal thereof being connected with the timing control module, an output terminal thereof being connected with an input terminal of the gate driving module, and being configured to discharge a power supply voltage provided by a power supply of the display apparatus under an effect of a timing control signal output by the gate driving module, so that the gate driving module outputs a chamfered wave scanning signal. The display quality of the display apparatus can be improved.
US10510309B2	Display device A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a plurality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10 zA/μm at room temperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100 zA/μm per micrometer in the channel width.
US10510308B2	Display device with each column of sub-pixel units being driven by two data lines and driving method for display device An array substrate, a display device and a driving method thereof are disclosed. The array substrate includes gate lines, data lines intersecting with the gate lines, and sub-pixel units. Each sub-pixel unit includes a first sub-pixel and a second sub-pixel arranged with a same sequence; each row of sub-pixel units along a gate line direction are driven by two gate lines, and different rows of sub-pixel units are driven by different gate lines; each column of sub-pixel units along a data line direction are driven by two data lines; the first sub-pixel and the second sub-pixel in each sub-pixel unit are driven by different gate lines and different data lines, for the sub-pixels in each column, the sub-pixels in odd-numbered rows are driven by same one data line, and the sub-pixels in even-numbered rows are driven by same the other data line.
US10510305B2	Backlight compensation for a computing device with two or more display devices In some implementations, a computing device may include a first display device and a second display device. An embedded controller may determine a first perceived brightness of the first display based on a first current and a first amount of ambient light associated with the first display device, determine a second perceived brightness of the second display device based on a second current and a second amount of ambient light associated with the second display device, and determine a ratio of the first perceived brightness to the second perceived brightness. The embedded controller may modify, based at least in part on the ratio, the second current to create a second modified amount of current associated with the second display device that modifies the second perceived brightness of the second display device to create a modified second perceived brightness of the second display device.
US10510302B2	Electroluminescent display device A display device includes a driving thin film transistor (TFT) having a two-gate overlap structure and a power line having a width extension structure that together allow for improved storage capacitance when compared to a display device without such structures.
US10510300B2	Organic light emitting display An organic light emitting display is capable of reducing variation in power transmitted to pixels to reduce or prevent non-uniformity of brightness from being generated. The organic light emitting display includes a pixel including a red sub pixel, a green sub pixel, and a blue sub pixel and first pixel power source lines for supplying a first pixel power from a first pixel power source to the red sub pixel, the green sub pixel, and the blue sub pixel, wherein the first pixel power source lines coupled to at least two different color sub pixels of the red, green and blue sub pixels have different widths. The first pixel power source lines have widths that may correspond to a voltage drop of the first pixel power source or may correspond to deterioration of the respective sub pixels to which they are coupled.
US10510297B2	Pixel circuit, driving method thereof, display panel and display device The present disclosure relates to a pixel circuit including a charging circuit, a driving circuit, a compensating circuit, an adjusting circuit and a light emitting device. In a charging stage, a first node and a second node may be charged through the charging circuit. In a compensating stage, a threshold voltage compensation is applied to the third node through the compensating circuit. In an adjusting stage, a potential of the third node is adjusted by the adjusting circuit. In a light emitting stage, the driving circuit drives the light emitting device to emit light through the first power signal under control of the third node. Meanwhile, a threshold voltage compensation is applied to the third node which controls the driving circuit during the compensating stage.
US10510295B2	Apparatus and method for controlling EL drive voltage of display panel An apparatus for controlling an EL drive voltage for a display panel is disclosed, which includes a current sensing circuit configured to detect an EL drive current signal outputted to the display panel, and convert the EL drive current signal into a first voltage signal, a signal generation circuit configured to generate a pulse signal based on the first voltage signal, a current protection circuit configured to generate a first control signal based on the first voltage signal and a reference voltage, and a signal coupling circuit configured to output, based on the first control signal, the pulse signal or a low level signal as a second control signal to control the EL drive voltage. According to the embodiments of the present disclosure, the EL drive voltage of the display panel can be dynamically controlled, and be reset to normal when it is overhigh.
US10510289B2	Optimization method and device for brightness compensation An optimization method and device for brightness compensation, including: setting a compensation reference sampling area; providing a brightness obtaining apparatus, and photographing, by the brightness obtaining apparatus, the compensation reference sampling area to obtain a sampling frame; measuring brightness uniformity of all photographing units in the sampling frame, selecting one of the photographing units having good brightness uniformity as a sampling and photographing unit, and using brightness of the sampling and photographing unit as a compensation reference value to obtain a compensation reference curve; photographing a to-be-compensated panel to obtain a brightness compensation reference frame; applying brightness of all photographing units in the brightness compensation reference frame to the compensation reference curve, and calculating a plurality of pieces of brightness compensation data of the first pixel units corresponding to the photographing units; and performing brightness compensation for the first pixel units according to the pieces of brightness compensation data.
US10510284B2	Display driver, electro-optic apparatus, electronic device, and control method for display driver A display driver includes a drive circuit that receives input of a first reference voltage to an nth reference voltage (where n is an integer of two or more), and outputs a drive voltage that is based on a grayscale voltage obtained by voltage division of an ith reference voltage and an (i+1)th reference voltage (where i is an integer of n−1 or less), and a control circuit that utilizes frame rate control on first display data corresponding to a grayscale voltage obtained by voltage division of the first reference voltage and a second reference voltage to generate second display data, and supplies the second display data to the drive circuit.
US10510283B2	Grayscale signal compensation units, grayscale signal compensation methods, source drivers, and display apparatuses The present disclosure discloses a grayscale signal compensation unit, a grayscale signal compensation method, a source driver, and a display apparatus. The grayscale signal compensation unit comprises: a compensation coefficient determination sub-unit configured to determine a compensation coefficient according to a position of a pixel to be driven; an inquiry sub-unit configured to inquire a reference compensation value corresponding to the initial grayscale signal according to a pre-stored grayscale compensation correspondence table for a row of pixels farthest from the source driving circuit, wherein the grayscale compensation correspondence table contains different grayscale signals and corresponding reference compensation values thereof; a calculation sub-unit configured to calculate an actual compensation value corresponding to the pixel to be driven according to the compensation coefficient and the inquired reference compensation value; and a compensation sub-unit configured to compensate for the initial grayscale signal according to the actual compensation value.
US10510282B2	Drive method and drive device of liquid crystal display A drive method is provided for driving a liquid crystal display and includes receiving an image to be displayed, which includes multiple image pixels; setting different weights for primary color components of each of multiple image pixels of the image; implementing color washout compensation to the image according to the weights set for the primary color components of each of the multiple image pixels by varying brightness levels of the primary color components of each of the image pixels of the image; and driving the liquid crystal display to display the image so compensated.
US10510279B2	Shift register units, gate scanning circuits, driving methods and display apparatuses The present disclosure provides a shift register unit, a gate scanning circuit, a driving method, and a display apparatus. The shift register unit comprises a reset circuit configured to transmit a signal from a signal control terminal to a first node and a shift register unit signal output terminal under the control of a reset control signal input terminal; a first pull-down control circuit configured to transmit the signal from the signal control terminal to the first node and the shift register unit signal output terminal under the control of a second node; and a second pull-down control circuit configured to transmit the signal from the signal control terminal to the first node and the shift register unit signal output terminal under the control of a third node control signal input terminal coupled to a third node, so as to cooperate with the reset circuit and the first pull-down control circuit to jointly reset the shift register unit in a phase in which output of the shift register unit should not occur, thereby effectively preventing output of the shift register unit from occurring in the phase in which output of the shift register unit should not occur.
US10510275B2	Display device and display device accessory A display device includes: a housing that has a space formed therein, the space opening at two end faces that are opposed to each other; two lenses that are placed in the space; and a display part that has a display panel and is placed on the side of one of the two end faces. The display part can be switched between a first state in which the display panel is exposed to the exterior of the housing and a second state in which the display panel faces toward the interior of the housing.
US10510274B2	Modular display system and methods Disclosed are embodiments of display modules, assemblies of display modules, and systems of display modules. Display modules have a plurality of light emitting elements arranged in a predetermined pattern and providing a highly uniform visual effect. Alignment and complementary alignment features enable the alignment of adjacent display modules and the creation of large displays from a plurality of aligned display modules. Features to grip and retain a support frame are provided. Modules and systems have features that permit installation and removal from the front side of the display. A system of modular support frames works cooperatively with the display modules, adapting to different mounting environments, and thereby providing large modular displays with desirable properties.
US10510271B2	Label for decorating a bottle, bottle and method of manufacture of such a label The self-adhesive label is produced in relief in order to visually and/or tactilely simulate a decorative molding of a material of a container or a decorative seal or stamp applied to the container.The self-adhesive label comprises, successively: a layer of adhesive, a flexible plastic sheet, an undercoat varnish on the flexible plastic sheet, and an overcoat varnish on the undercoat varnish. The undercoat varnish and the overcoat varnish are configured to repel each other, so that the overcoat varnish is retracted into the shape of a drop.
US10510270B2	Label with adhesive and silicone-free release coating A label having a silicone-free (water-based) release coating and compatible adhesive patch is provided. The label includes a thermally coated substrate having a silicone-free substrate overlaid thereon of a first surface. A second surface includes a microsphere adhesive layer.
US10510266B1	Language communication and acquisition device Systems and methods for augmentative and alternative communication that provide language communication facilitation and language acquisition enablement. In one embodiment, an AAC apparatus includes a user i/o device, an auditory output device and a microprocessor, wherein the microprocessor presents PICS buttons that are mapped to corresponding words to a user via the i/o device and accepts input via selection of the PICS buttons. In response to selection of a PICS button, the corresponding word is displayed to the user in a speech text box and produces a sound of the word via the auditory output device. The microprocessor further identifies and displays a subsequent set PICS buttons in dependence on the selected PICS button. The subsequent set PICS buttons may also be identified in dependence on word order, grammar rules, statistical and context analyses, and the like to increase navigation speed and to enable the user to learn language skills.
US10510263B2	Dynamically configurable audience response system A dynamically configurable audience response system includes multiple handsets communicatively coupled to a wireless aggregation point. Each handset includes at least one dynamically configurable operating parameter, such as a handset ID that identifies that handset, one or more parameters defining a communication channel that the handset can use to communicate with the wireless aggregation point, and/or one or more parameters defining various keys that the handset can use to establish a communication link with the wireless aggregation point. In some embodiments, the operating parameters associated with the handsets may be defined dynamically via the wireless aggregation point and without any user interaction with the handset. Additionally, or alternatively, in some embodiments, in order to define, or redefine, the operating parameters associated with the handsets, the dynamically configurable audience response system may include a handset configuration station, via which the operating parameters of the handsets may be defined.
US10510257B2	Object tracking method and object tracking device An object tracking device tracks objects in a time series using an object detection sensor for detecting objects around a host vehicle. When a plurality of objects are detected, the object tracking device sorts the objects into groups in accordance with a degree of influence of the positions of the objects on the movement of the host vehicle. The object tracking device tracks each of the groups as a single object in a time series.
US10510251B2	Parking space light Techniques for parking space light are provided. A parking space light can identify, via one or more instruments of the parking space light, a set of parking spaces in a defined region of a parking structure in which the parking space light is installed, monitor, via the one or more instruments, the set of parking spaces, and determine respective occupied statuses of parking spaces of the set of parking spaces, wherein the respective occupied statuses indicate whether the parking spaces are occupied or unoccupied.
US10510250B2	Vehicle presence detection system A vehicle presence detection system for determining whether a parking space is vacant or occupied and utilizing this information to guide vehicles to available parking spaces. generally includes a LIDAR device, a cloud-based processing unit, a database, and a guidance light. The LIDAR device generally includes a light emitter, a light sensor, a CPU, a memory unit, and a communications device. The LIDAR device determines the distance between itself and a parking spot or a vehicle parked in that parking spot using an algorithm that accounts for variances in the ambient conditions. This status information can be communicated to a cloud-based processing unit, which can store this information in a database and/or use this information to send parking status indications to an autonomous vehicle dynamic sign, mobile device, or guidance light.
US10510239B1	Systems and methods for managing alert notifications from a secured area Systems and methods for managing alert notifications from a secured area are provided. Such systems and methods can include a surveillance device monitoring the secured area and transmitting data captured from the secured area to an artificial intelligence module, the artificial intelligence module using the data to identify a scenario associated with the secured area and a notification priority of the scenario, and when the notification priority is at or above a preconfigured level, the artificial intelligence module transmitting an alert notification to a cloud server indicative of the scenario.
US10510237B2	Safety service system and method thereof Disclosed are a safety service system and a method thereof. The safety service system comprises: a collection unit for collecting position information and image information related to a protected person who is registered by a protector; and a service providing unit for providing the position information and the image information to one or both of the protector and a security company upon detection of a signal that the protected person is in danger.
US10510235B2	Time-reversal indoor detection system and method A time-reversal indoor detection system and method are provided. The system includes an anchor node device, an access point (AP) device, and a first electronic device. The first wireless communication circuit of the anchor node device is configured to send a probe signal, a third wireless communication circuit of the access point device is configured to receive the probe signal, a processor is configured to obtain a current CSI from the probe signal, and to compare the current CSI to a preset CSI, and when a first CSI included in the preset CSI is matched to the current CSI, a second wireless communication circuit of the anchor node device is configured to activate at least one function of a first electronic device through a second communication protocol.
US10510233B2	Reducing and eliminating the effects of bright lights in a field-of-view of a camera The present disclosure describes how to reduce or eliminate negative effects caused by bright lights in a change detection system. As a result, false alarms caused by lighting changes may be significantly reduced or eliminated.
US10510232B2	Parcel theft deterrence for A/V recording and communication devices Parcel theft deterrence for audio/video (A/V) recording and communication devices, such as video doorbells and security cameras. When an A/V recording and communication device captures image data that includes a parcel, a parcel boundary may be created for monitoring the parcel within. In various embodiments, when the parcel is removed from the parcel boundary, a user alert may be generated to notify a user of a client device associated with the A/V recording and communication device that the parcel has been removed.
US10510228B2	Security system with kill switch functionality A merchandise display security system for displaying and protecting an article of merchandise is provided. In one example, the system includes a sensor configured to be coupled to an article of merchandise and to communicate with the article of merchandise. The system also includes a tower configured to receive a signal from the sensor in response to a security event. The tower is further configured to generate a kill switch signal for determining whether to activate a kill switch on the article of merchandise.
US10510223B2	Durable signaling, customizable illumination device A signaling/illumination device includes a first and a second potentiometer, configured to enable modulation of at least one Chip on Board LED. The first potentiometer controls the light intensity of the at least one of the Chip on Board LED. The second potentiometer controls the pulse width modulation/strobing of the at least one Chip on Board LED. The device includes a polycarbonate/poly-resin housing with substantially cylindrical exterior profile for attachment to the first and the second potentiometers and a circuit and a power source embedded within the housing for powering the first and the second potentiometers. At least one electrical connection from the circuit and the power source is embedded in the housing and exposed for connection to an external charging source.
US10510216B2	Electronic gaming system for playing a bingo-type game An electronic gaming system includes a plurality of electronic gaming machines including a display, a wager acceptor to receive value, and a controller, and a server in communication with the gaming machines. The server is configured to determine the machines participating in a session of a bingo-type game with a progressive prize; collect a portion of a wager received at each of the machines, wherein the size of the wager may vary; determine a number of virtual bingo cards for each of the machines in accordance with the size of the wager received; issue the virtual bingo cards to each of the machines in accordance with the determination; generate one or more sets of indicia; determine a progressive win event based on the virtual bingo cards and the one or more sets of indicia; and award the progressive prize to the machine associated with the win event.
US10510210B2	Skills-based, parimutuel sports wagering on mobile devices An improved wagering system, that enables a player with a mobile device to place a wager of any one of many available wager types and on any one of a plurality of upcoming order-of-finish contests (UOOFCs), includes a networked server that has a database containing data relevant to prior order-of-finish contests (POOFCs) and with instructions that cause the server to cooperate with the mobile device to: (a) register and establish a player account, (b) provide handicapping factors from which the player may select a handicapping factor for use in predicting the outcome of an UOOFC, (c) identify which of the provided handicapping factors was the most-accurate in predicting the outcome of the POOFCs, (d) apply the selected handicapping factor to predict an outcome for the UOOFC, and (e) identify a wagering strategy that includes a recommended type of wager and the contestant on which to place the recommended type of wager.
US10510208B2	Systems and methods of reading gaming chips and other stacked items In one embodiment, a method includes obtaining a first plurality of identifiers associated with a first plurality of gaming chips present in a chip tray, the first plurality of gaming chips having a stacked configuration, determining whether each of the first plurality of identifiers associated with the first plurality of gaming chips is valid, determining a value of the first plurality of gaming chips present in the chip tray, utilizing the first plurality of identifiers, identifying an outcome of a game involving the first plurality of gaming chips, calculating a payout associated with the outcome, identifying a second plurality of identifiers associated with a second plurality of gaming chips present in the chip tray, determining a value of the second plurality of gaming chips present in the chip tray, and confirming that the value of the second plurality of gaming chips corresponds to the payout associated with the outcome.
US10510195B2	System and method for monitoring stress cycles A system for monitoring stress cycles includes memory storing a base value and an inflection value of a stress cycle and one or more processors coupled to the memory. The one or more processors are configured to receive a series of stress values from a stress sensor. For each stress value in the series of stress values, the one or more processors are configured to perform operations including performing a first comparison between the stress value and a previous stress value in the series of stress values, detecting an inflection in the series of stress values based on the first comparison, updating the base value and the inflection value in response to detecting the inflection, performing a second comparison between the stress value and the base value, determining whether the stress cycle is complete based on the second comparison, and recording the stress cycle in response to determining that the stress cycle is complete.
US10510190B2	Mixed reality interactions Embodiments that relate to interacting with a physical object in a mixed reality environment via a head-mounted display are disclosed. In one embodiment a mixed reality interaction program identifies an object based on an image from captured by the display. An interaction context for the object is determined based on an aspect of the mixed reality environment. A profile for the physical object is queried to determine interaction modes for the object. A selected interaction mode is programmatically selected based on the interaction context. A user input directed at the object is received via the display and interpreted to correspond to a virtual action based on the selected interaction mode. The virtual action is executed with respect to a virtual object associated with the physical object to modify an appearance of the virtual object. The modified virtual object is then displayed via the display.
US10510186B2	Digital media environment for intuitive modifications of digital graphics Techniques for intuitive modifications of digital graphics in a digital media environment are described. For example, a digital graphics creation system accesses vector artwork including a vector object, such as a Bezier curve. The digital graphics creation system receives user inputs, including a user input defining handles on the vector object and a user input interacting with the handles indicating a desired change to the vector object. The digital graphics creation system modifies the vector artwork, including the vector object, by accounting for topology of the vector object and maintaining connections between connected segments of the vector object. The digital graphics creation system outputs the modified vector artwork, including the vector object, such as in a user interface.
US10510184B2	Method and device for determining illumination of 3D virtual scene A method includes: dividing the 3D virtual scene by using a plurality of grids; acquiring location information about a plurality of first points at which a plurality of rays originating from a light source are incident on one or more objects located within the 3D virtual scene and location information about a plurality of first grids including the plurality of first points; acquiring location information about a plurality of second points at which the plurality of rays reflected from the plurality of first points are incident on the one or more objects and location information about a plurality of second grids including the plurality of second points; and determining illumination of each of the plurality of grids based on the location information about the plurality of first grids and the location information about the plurality of second grids.
US10510176B2	Efficient image transmission A mobile telephone receives, constructs and displays an image from a server over a mobile telephone network. The server determines the parameters for data transfer from the server to the mobile telephone, the capabilities of the mobile telephone, transfer task requirements, and apportions the processing between the server and the mobile telephone for each of a plurality of elements in each image, thereby to meet the task requirement, which can include being within a predetermined time for task completion, or being the fastest means for task completion. Parameters for data transfer from server to telephone include server transmission bandwidth, phone reception bandwidth, data channel bandwidth, transmission protocol, and channel accessibility. Phone capabilities include the data processing speed, the available memory, display size, and the data processing software available; Task requirements include the maximum transmission time and the minimum display resolution of the image.
US10510175B2	Method and portable electronic device for changing graphics processing resolution according to scenario The present disclosure provides example methods for changing graphics processing resolution according to a scenario. In one example, a first display scenario is determined as a scenario in which energy can be saved. Based on the determination, a graphics processing resolution of a graphics processor can be reduced. At least one target graphics frame in the first display scenario can be rendered by the graphics processor according to the reduced graphics processing resolution to obtain at least one target image frame. The at least one target image frame can be adapted according to screen display resolution, and the at least one adapted target image frame can be displayed. The present disclosure further provides a portable electronic device and a system for changing graphics processing resolution according to a scenario.
US10510174B2	Creating a mixed-reality video based upon tracked skeletal features Technologies related to generating mixed reality video are described herein. Video frames capture a human, and positions of skeletal features of the human are estimated based solely upon the video frames. A mixed reality video is generated, wherein the mixed reality video includes the video combined with an animation, wherein the animation is based upon movement of the human in the video as represented by the estimated positions of the skeletal features of the human.
US10510173B2	Image processing method and device Various embodiments provide an image processing method. The method may include: acquiring an input image (310); extracting a light source parameter from the input image (330); adjusting color of a material image according to the light source parameter, obtaining an adapted material image matching the input image using a binarization processing according to the material image whose color has been adjusted (350); obtaining a flare effect image through calculation using the adapted material image according to the light source parameter (370); and blending the input image with the flare effect image (390). An image processing apparatus is also provided. The above method and image processing apparatus can adapt a simulated flare effect to a light source in an image, and can improve the sense of realism.
US10510170B2	Electronic device and method for generating image file in electronic device An electronic device is provided. The electronic device includes a memory to store a plurality of images which are discontinuously captured and a processor to select at least some of the plurality of images, generate an image combination file in a format for sequentially playing the selected images by combining the selected images, and store the image combination file in the memory. The device can further provide a display to add, delete and arrange images of the image combination files.
US10510166B2	Reducing the number of spectral channels in multi-energy CT imaging A method for the reconstruction of image data based upon a plurality of multi-energy projection measurement data sets of a field of examination of an object under examination is described. In an embodiment of the method, a plurality of projection measurement data sets, produced via multi-energy CT imaging using differing X-ray energy spectra of the field of examination of the object under examination, are captured. In addition, a reduced number of image data sets are produced based upon the plurality of projection measurement data sets by applying a basic material decomposition and an image mix. An image data reconstruction facility is also described. Furthermore a computed tomography system is described.
US10510164B2	Real time on-chip texture decompression using shader processors A processing unit, method, and medium for decompressing or generating textures within a graphics processing unit (GPU). The textures are compressed with a variable-rate compression scheme such as JPEG. The compressed textures are retrieved from system memory and transferred to local cache memory on the GPU without first being decompressed. A table is utilized by the cache to locate individual blocks within the compressed texture. A decompressing shader processor receives compressed blocks and then performs on-the-fly decompression of the blocks. The decompressed blocks are then processed as usual by a texture consuming shader processor of the GPU.
US10510160B2	Multiscale weighted matching and sensor fusion for dynamic vision sensor tracking A Dynamic Vision Sensor (DVS) pose-estimation system includes a DVS, a transformation estimator, an inertial measurement unit (IMU) and a camera-pose estimator based on sensor fusion. The DVS detects DVS events and shapes frames based on a number of accumulated DVS events. The transformation estimator estimates a 3D transformation of the DVS camera based on an estimated depth and matches confidence-level values within a camera-projection model such that at least one of a plurality of DVS events detected during a first frame corresponds to a DVS event detected during a second subsequent frame. The IMU detects inertial movements of the DVS with respect to world coordinates between the first and second frames. The camera-pose estimator combines information from a change in a pose of the camera-projection model between the first frame and the second frame based on the estimated transformation and the detected inertial movements of the DVS.
US10510158B1	Collaborative airborne object tracking systems and methods Systems and methods related to identifying locations and/or ranges to objects using airborne imaging devices are disclosed. An object tracking system may include a plurality of aerial vehicles having associated imaging devices and a control station. Information related to positions and orientations of aerial vehicles and associated imaging devices may be received. In addition, imaging data may be received and processed to identify optical rays associated with objects within the imaging data. Further, a three-dimensional mapping of the identified optical rays may be generated, and locations or ranges of the objects relative to the aerial vehicles may be determined based on any intersections of optical rays within the three-dimensional mapping.
US10510157B2	Method and apparatus for real-time face-tracking and face-pose-selection on embedded vision systems Embodiments described herein provide various examples of a real-time face-detection, face-tracking, and face-pose-selection subsystem within an embedded video system. In one aspect, a process for performing real-time face-pose-estimation and best-pose selection for a detected person captured in a video is disclosed. This process includes the steps of: receiving a video image among a sequence of video frames of a video; performing a face detection operation on the video image to detect a set of faces in the video image; detecting a new person appears in the video based on the set of detected faces; tracking the new person through subsequent video images in the video by detecting a sequence of face images of the new person in the subsequent video images; and for each of the subsequent video images which contains a detected face of the new person being tracked: estimating a pose associated with the detected face and updating a best pose for the new person based on the estimated pose. Upon detecting that the new person has disappeared from the video, the process then transmits a detected face of the new person corresponding to the current best pose to a server, wherein transmitting the detected face having the best pose among the sequence of detected face images reduces network bandwidth and improves storage efficiency.
US10510156B2	Method and apparatus for estimating depth of unfocused plenoptic data Methods and apparatus for estimating a depth of unfocused plenoptic data are suggested. The method includes: determining a level of homogeneity of micro-lens images of unfocused plenoptic data; determining pixels of the micro-lens images of the unfocused plenoptic unfocused plenoptic data which either have disparities equal to zero or belong to homogeneous areas as a function of the calculated level of homogeneity of the micro-lens images of the unfocused plenoptic data; and estimating the depth of the unfocused plenoptic data by a disparity estimation without considering the determined pixels. With the disclosure, by pre-processing the raw data, it can prevent any disparity estimation method to spend time on estimating disparities for: (i) pixels that are in focus, (ii) pixels that belong to homogenous areas of the scene.
US10510155B1	Method and processing system for updating a first image generated by a first camera based on a second image generated by a second camera A method and system for processing camera images is presented. The system receives a first depth map generated based on information sensed by a first type of depth-sensing camera, and receives a second depth map generated based on information sensed by a second type of depth-sensing camera. The first depth map includes a first set of pixels that indicate a first set of respective depth values. The second depth map includes a second set of pixels that indicate a second set of respective depth values. The system identifies a third set of pixels of the first depth map that correspond to the second set of pixels of the second depth map, identifies one or more empty pixels from the third set of pixels, and updates the first depth map by assigning to each empty pixel a respective depth value based on the second depth map.
US10510153B1	Camera-level image processing Devices, systems and methods are disclosed for performing image processing at a camera-level. For example, a camera service may run on top of a camera hardware abstraction layer (HAL) and may be configured to perform image processing such as applying a blurring algorithm, applying a color filter and/or other video effects. An application may pass metadata to the camera service via an application programming interface (API) and the camera service may use the metadata to determine parameters for the image processing. The camera service may apply the blurring algorithm for a first period of time before transitioning to unblurred image data over a second period of time.
US10510152B2	Systems, methods, and devices for image matching and object recognition in images using textures A computer-implemented method for determining whether a first image contains at least a portion of a second image includes: determining a first set of feature points associated with the first image; removing from said first set of feature points at least some feature points in the first set that correspond to one or more textures in the first image; and then attempting to match feature points in said first set of feature points with feature points in a second set of feature points associated with said second image to determine whether said first image contains at least a portion of said second image.
US10510151B2	Method and system for obtaining pair-wise epipolar constraints and solving for panorama pose on a mobile device Aspects of the disclosure generally relate to determining the location and orientation of panoramic images by a computing apparatus. One or more computing devices may receive alignment data between a first panoramic image and second panoramic image and original location data for the first panoramic image and the second panoramic image. The one or more computing devices may determine relative orientations between the pair of panoramic images based on the alignment data and calculate a heading from the first panoramic image to the second panoramic image based on the original location data. The location data and alignment data may be optimized by the one or more computing devices based on the relative orientations between the pair of panoramic images and the original location data. The one or more computing devices may replace the original location data and relative orientations with the optimized relative orientations and optimized location data.
US10510140B2	Method for tone adapting an image to a target peak luminance LT of a target display device An image processing method is described. The method includes obtaining low dynamic range expansion exponents ELDR(p), obtaining target expansion exponents ET(p) as a weighted sum of the high dynamic range expansion exponents EHDR(p) and of the low dynamic range expansion exponents ELDR(p), applying obtained target expansion exponent ET(p) to low dynamic range luminance values YLDR of a low dynamic range version of the image, resulting in target luminance values YT, and building a tone-adapted version of said image based on said target luminance values YT.
US10510136B2	Image blurring method, electronic device and computer device Embodiments of the present disclosure provide an image blurring method, an electronic device, and a computer device. The method includes obtaining an image to be processed and physical distance information corresponding to each pixel in the image; detecting a first area comprising a part of a photographed object in the image, obtaining physical distance information corresponding to a second area comprising the photographed object and obtaining physical distance information corresponding to a third area other than the second area in the image according to the physical distance information corresponding to each pixel and the first area; obtaining a blur parameter corresponding to the third area according to the physical distance information corresponding to the second area and the physical distance information corresponding to the third area; and performing a blurring processing on the third area according to the blur parameter.
US10510135B2	Image processing apparatus, method of controlling the same, and storage medium The present image processing apparatus mutually converts raster-order image data and block-order image data by dividing image data into a plurality of areas in units of bands, and performing reading-out and writing of the image data to one line memory in the units of bands of the division. The apparatus calculates, in the units of bands, an address increased amount, which is used for calculating an address to next write to or read out from, from an address that is a current processing target, calculates an address of a write destination when writing image data to the line memory and an address of a readout destination when reading-out image data from the line memory by adding the calculated address increased amount to an address value of a current processing target address.
US10510123B1	Accident risk model determination using autonomous vehicle operating data Methods and systems for evaluating the effectiveness of autonomous operation features of autonomous vehicles using an accident risk model are provided. According to certain aspects, an accident risk model may be determined using effectiveness information regarding autonomous operation features associated with a vehicle. The effectiveness information may indicate a likelihood of an accident for the vehicle and may include test data or actual loss data. Determining the likelihood of an accident may include determining risk factors for the features related to the ability of the features to make control decisions that successfully avoid accidents. The accident risk model may further include information regarding effectiveness of the features relative to location or operating conditions, as well as types and severity of accidents. The accident risk model may further be used to determine or adjust aspects of an insurance policy associated with an autonomous vehicle.
US10510122B2	Data-driven concepts for processing claims Systems, methods, apparatus, and computer program products are provided for processing claims. In various embodiments, claims can be processed in accordance with a data-driven approach that limits changes to existing claims processing rules by using an inclusions table, an exclusions table, and/or a decision table as part of firing or executing claims processing rules to accommodate for such changes.
US10510121B2	System and method for performing dwelling maintenance analytics on insured property A computer device and method for processing maintenance related data for performing maintenance analytics on insured property. Informatic data is received from one or more sensor devices relating to a property covered by an insurance policy. Analysis is performed on the received informatic data to determine one or more conditions associated with the property. Predefined business rules are applied using the determined one or more conditions associated with the property to determine a maintenance profile for the property indicating one or more of maintenance history and repair or maintenance requirements for the property.
US10510119B1	Determining status of building modifications using informatics sensor data A computer device and method for processing data to detect modifications to insured property. Received is specification data regarding modifications to be made to insured property in connection with an insurance claim. Also received is data from one or more sensor devices associated with the insured property indicative of a status regarding modifications made to the insured property. Analysis is performed on the received specification and data to determine whether one or more predefined conditions for the insurance claim is satisfied regarding the modifications to be made to the insured property.
US10510118B2	Computing architecture for managed-account transactions An improved computing architecture for managed-account transactions is presented. In accordance with embodiments, responsive to receiving data indicating elective options for a dividend to be paid by an issuer of an asset included in various investment allocations prescribed by different investment managers, a computing system may generate a ballot comprising the elective options and may communicate the ballot to computing devices associated with the investment managers. Responsive to receiving, from the computing devices, data indicating elections made by the investment managers, via the ballot, indicating how the dividend should be paid for assets invested in accordance with investment strategies generated based on the prescribed allocations, the computing system may store, for each unit of the asset held by a client having funds allocated amongst the strategies, data indicating how the dividend should be paid for the unit.
US10510115B2	Computerized exchange controlled network system and related method A system for a computerized, Exchange-controlled network (“ECN”) is disclosed which is operated by an organization forming an Exchange. The ECN has at least one host server disposed at a first location which communicates with at least two front-end virtual servers disposed at second and third locations, wherein the servers are attendant to Exchange-authorized communities of interest (“COI”) each made up of at least one member, and thus authenticated to cryptographically validate and process digital information passed along the ECN without the use of intermediaries. A plurality of devices in the form of dongles are each configured to operate in conjunction with their respective COI member's server, and enable the Exchange to exercise controls over virtually all aspects of digital data access and digital order processing without the use of intermediaries.
US10510112B2	Computer implemented continuous dual auction system A computer implemented continuous dual auction system consisting of a computer, server, and a process for creating a real-time, or substantially real-time, online marketplace for the sale of goods and services. The process includes the input of information from a seller about a certain good or service for sale, including but not limited to a price desired and a price the seller is willing to accept. The process also includes the input of information from a buyer about a certain good or service desired, including but not limited to a price a buyer is willing to pay for such a good or service. The process also can include the input of credit card information for validation and guaranty purposes in allowing the buyer and seller to post a bid or offer, respectively, into the continuous dual auction system's real-time, or substantially real-time, online marketplace.
US10510106B2	Systems and methods for using a social networking system to add products to shopping carts of third-party merchants Embodiments of the present invention relate generally to marketing products through a social networking system. More specifically, one or more embodiments of the present invention relate to allowing social networking users to purchase products through the social networking system and to add products to shopping carts associated with third-party merchants.
US10510103B2	On-line shopping assistant for in-store shopping Embodiments of the present invention provide a method, system and computer program product for an on-line shopping assistant for in-store shopping. In an embodiment of the invention, a method for managing an on-line shopping assistant for in-store shopping is provided. The method includes locating an in-store shopper in a portion of a store by locating a mobile device registered in a database in association with the in-store shopper. The method also includes receiving a request for data through the mobile device pertaining to at least one item in the store and filtering the requested data based upon the location of the in-store shopper in the portion of the store. Finally, the method includes presenting the filtered data in a display of the mobile device.
US10510098B2	Promotion of web services through an IVR Targeted audio advertisements may be inserted into IVR sessions. The audio advertisements may be targeted based on session data that includes information describing an ongoing IVR session of a user of a mobile device and demographic information of the user. The audio advertisements may include prompts to solicit information from the user during the ongoing IVR session. The targeted audio advertisements may be played, to the user, during the ongoing IVR session.
US10510097B2	Activating display and performing additional function in mobile terminal with one-time user input A mobile terminal includes a touch screen display, a camera, a power button and an activation button for turning on the touch screen display. The mobile terminal has a first function and a second function to perform in response to user input and provides user settings for configuring at least one of the first and second functions such that the at least one of the first and second functions is performed along with turning on the touch screen display when pressing of the activation button is detected while the touch screen display is turned off. The mobile terminal is configured to perform the first and second functions depending upon length of pressing of the activation button in addition to turning on the touch screen display.
US10510096B2	Visitor detection unit and identification system A visitor detection unit includes a digital processor, an RF transceiver, a sensor and digital memory. Preferably, the digital memory includes code segments executable on the digital processor for transmitting a beacon signal via a transmitter portion of the RF transceiver, monitoring via the sensor for a visitor event monitoring via a receiver portion of the RF transceiver for a beacon response event, and selectively transmitting metadata via the transmitter portion of the RF transceiver that is related at least one of the visitor event and the beacon response event. In this example embodiment, an enclosure is provided for the digital processor, the RF transceiver and the digital memory such that the visitor detection unit can be mounted on a surface proximate to a physical area to be monitored.
US10510093B2	Systems and methods for providing advertising services to devices with dynamic ad creative deep linking Methods and systems are described for providing advertising services to devices with dynamic ad creative deep linking. In one embodiment, an advertising system includes a storage medium to store one or more software programs of an ad server and processing logic of the ad server that is coupled to the storage medium. A dynamic ad creative deep linking unit is configured to receive an ad campaign including at least one video ad from the ad server and to generate a customized deep link for a targeted software application or targeted content of the at least video ad based on installed applications of a device, application usage history of the installed applications, and metadata associated with at least one of the installed applications.
US10510090B2	Dynamically generating a reduced item price A system may receive information representing a first item and an item price of the first item from a first user device operated by a buyer. The first item may be available for sale by a merchant of a brick-and-mortar store. A plurality of sellers may be identified, the plurality of sellers may list a second item as being available for sale at the calculated reduced item price in an item listing for the second item. Moreover, the second item may be similar to the first item. A reduced item price may be calculated based on the item price of the first item received from the user device, the reduced item price representing a price lower than the item price of the first item. The item listing for the second item available for sale may be presented to the first user device operated by the buyer.
US10510085B2	Time and location aware customer relationship management A method, system and computer program product for time and location aware customer relationship management (CRM) is provided. A method for time and location aware CRM includes obtaining a location for a mobile computing device, forwarding the location to a CRM application, and responding to an identification of a contact in the CRM application that is proximate to the obtained location, by retrieving a related data record for the contact from the CRM application and by displaying the related record in the mobile computing device in a user interface for the CRM application. Further, a current time for the mobile computing device can be obtained and forwarded to the CRM application. Responsive to identifying a meeting in the CRM application that is scheduled proximate to the obtained time, a related data record for the meeting can be retrieved from the CRM application and displayed in the mobile computing device.
US10510083B1	Inactive blank checks The present disclosure generally relates to a system and method of verifying a banknote. A computing system receives a first request to pre-approve a banknote. The first request includes one or more visual characteristics of the banknote. The computing system receives, from a second user, a second request to deposit a circulating banknote. The second request includes a representation of the circulating banknote. The computing system identifies that an account from which the representation of the circulating banknote originated is the first user account. The computing system compares the representation of the circulating banknote to the one or more visual characteristics of the banknote stored in the first user account. The computing system determines that the representation of the circulating banknote is equivalent to the pre-activated banknote by identifying the one or more visual characteristics of the pre-activated banknote in the representation of the circulating banknote.
US10510081B2	Cargo air waybill audit The present invention provides apparatuses and methods for analyzing patterns and generating rules related to actions taken in auditing cargo air waybills. Various embodiments of the invention may receive one or more user actions applied to an air waybill and analyze the user's actions to determine if a pattern of behavior is consistent in the user's actions. When one or more patterns are determined, one or more rules may be generated based on the patterns and the actions. If a generated rule is approved by a user, the generated rule may be applied to any future air waybill sent to an accounting system for auditing. The integration of pattern analysis and rule generation may ease some or all of the burden of manually auditing thousands of air waybills daily and reduce the temporal costs of internal audit staff and the financial costs of employing an outside company to audit cargo air waybills.
US10510076B2	Method and system for unification of wearable activity data and transaction data A method for pairing wearable computing device activity data with additional data includes: storing a plurality of activity profiles, wherein each activity profile includes data related to activity of a wearable computing device including at least a device identifier and one or more activity data entries; storing a plurality of transaction data entries, wherein each transaction data entry includes data related to an electronic transaction including at least a primary account number and additional transaction data; receiving pairing data, wherein the pairing data includes at least a specific device identifier and a specific primary account number; identifying a specific activity profile where the included device identifier corresponds to the specific device identifier; identifying one or more transaction data entries where the included primary account number corresponds to the specific primary account number; and updating the identified specific activity profile to include at least the specific primary account number.
US10510075B2	Systems and methods for secure mobile payments Systems and methods are provided that enable purchase and adjustment transactions using a visual indicium displayed on a mobile device. In some embodiments, these indicia are in the form of bar codes, include alias information, and do not include an account number associated with a payment account. A mobile device receives first user input, displays the indicium to a merchant device. The merchant device scans the indicium and sends a transaction request including the alias information to a payment network. The payment network determines an appropriate financial institution for processing the transaction, and sends the transaction request to the appropriate financial institution. Based on the result, the payment network sends an approval to the merchant device. Additionally, a mobile processor system sends new alias information to the mobile device for use in a next transaction.
US10510072B2	Systems and methods for administering mobile applications using pre-loaded tokens The disclosed embodiments include computerized methods and systems that enable users to delegate a functionality of a mobile application through pre-loaded tokens. In one aspect, the disclosed embodiments may temporarily delegate or “loan” financial products loaded into a mobile wallet of a user to other eligible users. For example, the disclosed embodiments may receive, from a first user, a request to delegate a financial product to a second user to complete purchase transactions. In response to the received request, the disclosed embodiments may identify one or more temporal or financial conditions on the delegation, and may generate a corresponding mobile wallet token for transmission to a second user device. The second user device may, for example, process the mobile wallet token and establish the delegated financial provide in the second user's mobile wallet in accordance with the at least one of the temporal or financial conditions.
US10510066B2	ATM replacement using two mobile devices A system, method, and program product for exchanging physical, virtual or fiat currency between two individuals at the same geographic location using account information stored on a server database. The payer activates payer mobile device using biometric identification, then inputs the amount to transfer along with a payee security code, then payer presses “send.” The payee activates payee mobile device using a biometric identification, then payee inputs the amount to receive along with a payer security code then payee presses “send”. Both the payer and the payee mobile devices simultaneously receive from the server an alphanumeric transaction code along with the amount. Transaction code and amount are displayed on the respective mobile screens. When payee verifies that both mobile devices display the same transaction code and dollar amount, then the payee presses “I Agree” key on payee mobile device. Then the funds are exchanged at the server database. Payer and payee may also exchange corresponding cash.
US10510062B2	Systems and methods for mobile device purchase flows This disclosure describes systems, methods, and computer-readable media related to mobile device purchase flows. In some embodiments, a mobile device may obtain a uniform resource identifier (URI). The mobile device may launch a browser based at least in part on the URI. The mobile device may submit a first set of data to a server based at least in part on the URI and receive a re-direct URI. The mobile device may launch an application in response to receiving the re-direct URI from the server, wherein the application submits a second set of data to the server. The mobile device may facilitate completion of a transaction by the application based at least in part on matching the first set of data and the second set of data at the server.
US10510059B2	Printer device A printer device includes: a receiver configured to receive pieces of information from a host device; a storage configured to store output information among the pieces of information received by the receiver; a printer configured to print information on a sheet based on printing information; a display communication device configured to transmit display information to a display device; an output destination selection module configured to select an output destination of the output information stored in the storage based on instruction information among the pieces of information received by the receiver from the host device; a display information generation module configured to generate, when the output destination selected by the output destination selection module is the display device, the display information based on the output information stored in the storage; a display communication device configured to output the display information generated by the display information generation module to the display device; and a printing controller configured to output, when the output destination selected by the output destination selection module is the printer, the printing information that is based on the output information stored in the storage, to the printer, wherein the display communication device configured to output the display information generated by the display information generation module to the display device.
US10510058B1	System and method for processing orders Aspects of the disclosure relate generally to a printing system that emits audio signals in response to the receipt of user requests received by the system, wherein a characteristic of the audio signals is based on the number of requests that awaiting user acknowledgment.
US10510057B2	Token-based gift cards A method for transferring funds includes: 1) receiving, from a first user, a request to transfer a stored value to a second user; 2) identifying, based on a first user token and from a user database, a first entry containing information of a payment account of the first user; 3) causing a payment server to transfer funds corresponding to the stored value from the payment account of the first user to a stored-value account that is associated with a stored-value token; 4) associating the stored-value token with a second entry identifying a second user; 5) receiving a payment request initiated by the second user; 6) identifying the second entry based on a second user token included in the payment request; 7) updating funds in the stored-value account based on the payment request; and 8) transmitting at least a portion of the stored value to a merchant based on the update.
US10510054B1	Augmented reality enhancements for financial activities A system implemented on an augmented reality electronic device includes scanning an item using the augmented reality device. Financial information is obtained from the scanned item. The financial information and an indication of user authentication are sent to a server computer. A confirmation is displayed on the augmented reality device that a financial transaction using the financial information has been completed.
US10510051B2	Real-time (intra-meeting) processing using artificial intelligence Artificial intelligence is introduced into an electronic meeting context to perform various tasks before, during, and/or after electronic meetings. The tasks may include a wide variety of tasks, such as agenda creation, participant selection, real-time meeting management, meeting content supplementation, and post-meeting processing. The artificial intelligence may analyze a wide variety of data such as data pertaining to other electronic meetings, data pertaining to organizations and users, and other general information pertaining to any topic. Capability is also provided to create, manage, and enforce meeting rules templates that specify requirements and constraints for various aspects of electronic meetings.
US10510048B2	Activity stream based interaction An activity stream based interaction model and systems implementing such a model are disclosed. In various embodiments, a text-based tag is recognized in a received communication stream, such as an activity stream. An action indicated by text included in the tag is determined and performed in response to receiving the tag. In some embodiments, a tag to be inserted into the communication stream may be determined automatically by a machine or a process running on a machine, for example a workflow engine.
US10510045B2	System and method for online information, employment, social and other compatibility search, matching and ranking A computer server system and method are disclosed for personalization and customizable filtering of network search results and search result rankings, such as for Internet searching. A representative server system comprises: a network interface to receive a query from a respondent or co-respondent; at least one data storage device storing a plurality of return queries; and one or more processors adapted to access the data storage device and using the query, to select the return queries for transmission; to search the data storage device for corresponding pluralities of responses to the return queries from other co-respondents or respondents; to pair-wise score the responses and generate pair-wise alignment scores for respondent and co-respondent combinations; to sort and rank the combinations according to the alignment scores; and to output a listing of the sorted and ranked respondents or co-respondents to form the personalized network search results and search result rankings.
US10510042B2	Systems and methods for determining inventory using time-slotted tag communications Systems and methods for determining an inventory. The methods comprise: placing an RFID tag in a first operational mode in which at least one communication operation or device of the RFID tag is disabled or bypassed; performing first operations by the RFID tag to determine when it is time to begin communications in accordance with the time slotted communications scheme; transitioning an operational mode of the RFID tag from the first operational mode to a second operational mode in which the communication operation(s) or device of the RFID tag is enabled or no longer bypassed, in response to a determination that it is time for the RFID tag to begin communications; and transitioning the operational mode of the RFID tag back into the first operational mode when the RFID tag's communications with a remote tag reader for inventory determination purposes are complete or a time slot has expired.
US10510034B2	Investigator interface and override functionality within compliance determination and enforcement platform A compliance determination and enforcement platform is described. A plurality of factors are stored in association with each of a plurality of accounts. A factor entering module enters factors from each user account into a compliance score model. The compliance score model determines a compliance score for each one of the accounts based on the respective factors associated with the respective account. A comparator compares the compliance score for each account with a compliance reference score to determine a subset of the accounts that fail compliance and a subset of the accounts that meet compliance. A flagging unit flags the user accounts that fail compliance to indicate non-compliant accounts. A corrective action system allows for determining, for each one of the accounts that is flagged as non-compliant, whether the account is bad or good, entering the determination into a feedback system and closing the account.
US10510033B2	Processor and data storage enabling efficient data reporting Even with modern high-speed processors and bandwidth, many systems implement intensive data reporting components that tax resources. Even very small improvements in reporting efficiencies can result in significant cost and resource savings, as well as improvements in the performance of such resources. Recording facts (e.g., events) with a standardized time and time interval based upon a universal reference, such as Coordinated Universal Time (UTC), and reporting based upon local time and local intervals improves data processing throughput with limited report granularity. For example, since forty-eight intervals comprise most of the world's time zones, reports simply designating facts as occurring within one of the forty-eight intervals and one of the thirty-minute intervals greatly improves operability and throughput.
US10510028B2	Method and apparatus for utilizing task value units for imaging interpretation and other tasks A method, apparatus and computer program product are provided in order to utilize task value units for imaging interpretation and other tasks, such as in the assignment of imaging interpretation and other tasks to a plurality of users. In the context of a method, the method associates, for each of a plurality of different types of imaging interpretation tasks and for each of a plurality of other tasks, a first task value unit therewith. The method also associates, for at least some of the plurality of different types of imaging interpretation or other tasks, a second task value unit, different than the first task value unit, therewith. Further, the method assigns imaging interpretation and other tasks to a plurality of users based at least partially upon the first and second task value units associated with the respective imaging interpretation tasks and the other tasks.
US10510027B2	Cloud-based global alarm annunciation system for industrial systems A cloud-based global alarm annunciation broker assist in locating and contacting suitable technical support personnel in response to detected alarm events at a plant facility. The system comprises a cloud-based framework that dynamically matches on-site alarm events to domain experts capable of addressing the alarm events. The framework uses an agent-based architecture to gather industrial data from data sources within the industrial environment, including time-series alarm data. The data is received at a cloud platform, where broker services perform a global search for suitable technical support resources in response to alarm events identified by the collected data. The brokering system can automatically generate service tickets and send notifications to both end users and system managers/supervisors, and can notify application-level experts about events and anomalies that emerge from the on-premise processes being monitored by the cloud-based broker system.
US10510026B1	Electronic calendaring system and method determining redundant meeting invitees based on a meeting composition score This disclosure describes, according to some implementations, a method for scoring electronic meeting requests for attendee redundancy. In an example method, the method includes retrieving, using one or more processors, user IDs of meeting attendees; retrieving, using the one or more processors, one or more characteristics associated with the user IDs; retrieving, using the one or more processors, a rule having one or more parameters for scoring meeting composition; comparing, using the one or more processors, the one or more characteristics associated with the user IDs based on the one or more parameters of the rule; and generating, using the one or more processors, a meeting score based on the comparison.
US10510020B2	Semantics data processing Techniques for deriving additional features from input data are described herein. Input data from a plurality of source files are received. One or more features corresponding to the input data, which includes information about semantic types, is identified. The input data is then processed to generate additional features for the input data. New data corresponding to the additional features are then generated and access to the new data is subsequently provided.
US10510016B2	Methods and systems using a composition of autonomous self-learning software components for performing complex real time data-processing tasks A composition of autonomous self-learning skill software components interact with one another to solve a real time complex task. Each software component includes a knowledge base and an inference algorithm that uses the knowledge base to solve a given data-processing task involving input data. Each software component may also include a machine learning algorithm for training the knowledge base with new data in real-time as the new data is received.
US10510015B2	Constructing and programming quantum hardware for quantum annealing processes Methods, systems, and apparatus, including computer programs encoded on computer storage media, for constructing and programming quantum hardware for quantum annealing processes.
US10510012B2	Real time interactive prediction Providing predictive data predicting data values for a historical dataset. The method facilitates improving the accuracy of the predictive data by identifying for a user, and allowing the user to select ancillary datasets that can be evaluated, using a predictive evaluation, together with a historical dataset to improve the accuracy of the predictive data. A user interface is provided to a user. The user interface identifies one or more ancillary datasets. The ancillary datasets are identified to the user based on the ancillary datasets meeting a threshold condition to a historical dataset. The ancillary datasets are selectable by the user in the user interface. User input is received at the user interface selecting one or more of the ancillary datasets. A predictive dataset is displayed to the user. The predictive dataset is determined by predictive evaluation of the historical dataset and the one or more selected ancillary datasets.
US10510008B2	Group based information displays Group-based information displays correspond to the collection of display objects representative of either contacts associated with a user or applications or executable components executable, or otherwise accessible, via the mobile communication device. The group-based information displays can be logically organized according to subject matter organizational criteria. The subject matter organizational criteria can include, for example, organization or other affiliates criteria, event-based, or activity based criteria, topic-based criteria and the like. Through the group-based information displays, mobile communication device users can initiate one or more actions corresponding to the selection of display objects corresponding to applications or executable components. Additionally, as applicable, the user can limit, or otherwise apply, the initiated actions to contacts identified, or otherwise associated, with the specific group-based information display.
US10510005B2	Prediction function creation device, prediction function creation method, and computer-readable storage medium The prediction function creation device according to the present invention for creating a prediction function to derive an objective variable by using a set of samples that include explanatory variables and an objective variable, the device includes: a clustering unit that clusters the respective samples by giving labels, and assigns weights to each label in accordance with patterns of missing values for the explanatory variables in labeled samples; a child model creation unit that makes portions of the training data partial training data on the basis of the weights, and determines an explanatory variable that constitutes the prediction function on the basis of patterns of missing values for the explanatory variables in the samples; and a mixture model creation unit that creates the prediction function with respect to each pattern of missing values by using the explanatory variable and the determined partial training data.
US10510003B1	Stochastic gradient boosting for deep neural networks Aspects described herein may allow for the application of stochastic gradient boosting techniques to the training of deep neural networks by disallowing gradient back propagation from examples that are correctly classified by the neural network model while still keeping correctly classified examples in the gradient averaging. Removing the gradient contribution from correctly classified examples may regularize the deep neural network and prevent the model from overfitting. Further aspects described herein may provide for scheduled boosting during the training of the deep neural network model conditioned on a mini-batch accuracy and/or a number of training iterations. The model training process may start un-boosted, using maximum likelihood objectives or another first loss function. Once a threshold mini-batch accuracy and/or number of iterations are reached, the model training process may begin using boosting by disallowing gradient back propagation from correctly classified examples while continue to average over all mini-batch examples.
US10510002B1	Stochastic gradient boosting for deep neural networks Aspects described herein may allow for the application of stochastic gradient boosting techniques to the training of deep neural networks by disallowing gradient back propagation from examples that are correctly classified by the neural network model while still keeping correctly classified examples in the gradient averaging. Removing the gradient contribution from correctly classified examples may regularize the deep neural network and prevent the model from overfitting. Further aspects described herein may provide for scheduled boosting during the training of the deep neural network model conditioned on a mini-batch accuracy and/or a number of training iterations. The model training process may start un-boosted, using maximum likelihood objectives or another first loss function. Once a threshold mini-batch accuracy and/or number of iterations are reached, the model training process may begin using boosting by disallowing gradient back propagation from correctly classified examples while continue to average over all mini-batch examples.
US10510000B1	Intelligent control with hierarchical stacked neural networks A system and method of detecting an aberrant message is provided. An ordered set of words within the message is detected. The set of words found within the message is linked to a corresponding set of expected words, the set of expected words having semantic attributes. A set of grammatical structures represented in the message is detected, based on the ordered set of words and the semantic attributes of the corresponding set of expected words. A cognitive noise vector comprising a quantitative measure of a deviation between grammatical structures represented in the message and an expected measure of grammatical structures for a message of the type is then determined. The cognitive noise vector may be processed by higher levels of the neural network and/or an external processor.
US10509997B1	Neural network learning for the prevention of false positive authorizations Disclosed herein are systems and methods that identify and improve upon false positive scores. Some embodiments may include artificial neural network learning methods that utilize data input from users as well as enterprise machines. Information, such as transaction timing, prior transaction data, and demographics, may be taken as inputs to the neural network processing. The processing may be done on one or more neural network computers or nodes.
US10509995B2	Methods and devices for programming a state machine engine A state machine engine having a program buffer. The program buffer is configured to receive configuration data via a bus interface for configuring a state machine lattice. The state machine engine also includes a repair map buffer configured to provide repair map data to an external device via the bus interface. The state machine lattice includes multiple programmable elements. Each programmable element includes multiple memory cells configured to analyze data and to output a result of the analysis.
US10509993B2	Method for providing identification and access with respect to a radio-frequency tag A method for providing identification and access with respect to a passive radio-frequency tag in a tag population, the passive tag being configured for receiving ACK commands including an identification parameter, the method including receiving an initiating command for identifying and accessing a tag, the initiating command including a slot number having a first value if a value in a slot counter of the tag is equal to the first value, then transitioning to an Open or a Secured state, otherwise transitioning to an Arbitrate state in a case where the tag has transitioned to the Arbitrate state, receiving a command for repeating a tag access request, referred to as repetition command, the command including a slot number having a second value, different from the first value, the second value being equal to the value in the slot counter of the tag, transitioning to the Open or Secured state, receiving an ACK command, ignoring the ACK command.
US10509992B2	Electronic card comprising a fingerprint sensor and a tactile mark The invention relates to an electronic card comprising a card body (1) comprising an upper surface (11) and a lower surface (12); a fingerprint sensor (2) flush with the upper surface of said card body; a tactile mark (3) placed on the upper surface of the card body near the fingerprint sensor, said tactile mark having an excess thickness from the upper surface of the card to guide, when said mark is touched, a correct positioning of a finger on said fingerprint sensor, the thickness of the tactile mark being such that the card has a thickness compatible with standard ISO 781 ID1, the thickness of the tactile mark preferably being between 30 and 60 μm, typically 50 μm.
US10509991B1	Detection of images in relation to targets based on colorspace transformation techniques and utilizing infrared light Techniques to improve detection and security of images, including formation and detection of matrix-based images. Some techniques include logic to process image data, generate one or more colorspaces associated with that data, and perform colorspace conversions based on the generated colorspace. The logic may be further configured to generate an image based on the colorspace conversions, including but not limited to a matrix bar code. The logic may be further configured to apply one or both of an ultraviolet layer and an infrared layer to the image, e.g. matrix barcode, generated from the colorspace conversion(s). Other embodiments are described and claimed.
US10509990B2	Radio-frequency identification-based shelf level inventory counting A radio frequency identification tag at a plurality of detection locations is detected and an expected location of the radio frequency identification tag is determined. A confidence level for each of the detection locations that detected the radio frequency identification tag is determined based on a relative location of the corresponding detection location as compared to the expected location. The determined confidence levels of the detection locations is analyzed to select at least one of the detection locations and an action based on the at least one selected detection location is performed.
US10509987B1	Learning method and learning device for object detector based on reconfigurable network for optimizing customers' requirements such as key performance index using target object estimating network and target object merging network, and testing method and testing device using the same A method for learning parameters of an object detector based on a CNN adaptable to customer's requirements such as KPI by using a target object estimating network and a target object merging network is provided. The CNN can be redesigned when scales of objects change as a focal length or a resolution changes depending on the KPI. The method includes steps of: a learning device instructing convolutional layers to generate a k-th feature map by applying convolution operations to a k-th manipulated image which corresponds to the (k−1)-th target region on an image; and instructing the target object merging network to merge a first to an n-th object detection information, outputted from an FC layer, and backpropagating losses generated by referring to merged object detection information and its corresponding GT. The method can be useful for multi-camera, SVM (surround view monitor), and the like, as accuracy of 2D bounding boxes improves.
US10509985B2	Method and apparatus for security inspection Disclosed in the present disclosure are a method and an apparatus for security inspection. The method comprises: acquiring identity related information of a person being inspected, the identity related information comprising a certificate photo; acquiring a real-time facial image of the person being inspected; by comparing the real-time facial image and the certificate photo, acquiring a facial comparison similarity; dynamically determining the threshold of the facial comparison similarity; and performing a human-certificate verification on the person being inspected according to the facial comparison similarity and the threshold. The method for security inspection of the present disclosure enables the fast and accurate facial comparison of the person being inspected during security inspection.
US10509981B2	Method and apparatus for infrared thermal image contour extraction The present disclosure provides a method and apparatus for infrared thermal image contour extraction. The method includes: obtaining an infrared thermal image; and determining histograms based on grayscale image of the infrared thermal image, determining segmentation thresholds of the infrared image based on the histograms, and extracting a contour based on the segmentation thresholds. The apparatus includes an image acquisition circuit, configured to capture an infrared thermal image; and a processing circuit, configured to determine histograms based on greyscale images of the infrared thermal image, to determine segmentation thresholds of the infrared thermal image based on the histograms, and to extract a contour based on segmentation thresholds.
US10509978B2	Multi-angle product imaging device A system for acquiring multi-angle images of a product includes a workstation having a working surface for placing a product, a camera supporting member having a vertical axis, and an image capturing device movably attached to the camera supporting member so that it may move along the vertical axis of the camera supporting member. The system captures and analyzes a digital image of a product to detect the vertical center of the product, and adjusts the position of the image capturing device along the vertical axis so that the vertical center of the product is proximate to the vertical center of the image. The system may also have a turntable and additionally rotate the turntable at multiple capturing angles and capture one or more additional digital images of the product at various capturing angles and store the one or more additional images in a product database.
US10509976B2	Heterogeneous fluid sample characterization The disclosure relates to methods and device for detecting properties of heterogeneous samples, including detecting properties of particles or fluid droplets in industrial processes. A probe may be inserted into a first of multiple heterogeneous fluid samples. A portion of the first sample may be drawn into the probe and past a two-dimensional array detector. The portion of the first sample may be illuminated as it is drawn past the array detector and an image of the portion of the first sample may be acquired. The probe may be inserted into a second of multiple heterogeneous fluid samples. A portion of the second sample may be drawn into the probe and past a two-dimensional array detector. The portion of the second sample may be illuminated as it is drawn past the array detector and an image of the portion of the second sample may be acquired.
US10509974B2	Stain and trash detection systems and methods Example stain and trash detection systems and methods are described. In one implementation, a method receives a clean image of a vehicle interior and a second image of the vehicle interior after a passenger has occupied the vehicle. The method quantizes the clean image and the second image to reduce noise and identifies differences between the clean image and the second image. Additionally, the method identifies at least one contour in the identified differences and classifies an area defined by the contour as one of a stain, dirt, trash, or another item.
US10509973B2	Onboard environment recognition device An onboard environment recognition device is obtained with which it is possible to improve recognition performance within the headlight illumination range and outside the headlight illumination range of a vehicle with an onboard camera. This onboard environment recognition device has: an imaging unit 100 for imaging, using a camera installed in the vehicle, at a wider-angle range than the headlight illumination range; an in-illumination/out-of-illumination exposure adjustment unit for setting appropriate exposure conditions separately within the headlight illumination range and outside the headlight illumination range; and a recognition unit 500 for recognizing images on the basis of the acquired images. Therefore, it is possible to maintain high recognition performance in the boundary regions of the headlight illumination range, and outside the range, and the present invention can also be used for wide-angle sensing at night.
US10509972B2	Vehicular vision system A vehicular vision system includes a processor for processing image data captured by first, second and third cameras disposed at the left side, right side and rear portion, respectively, of the vehicle. The field of view of the first camera overlaps with the field of view of the rear backup camera, and the field of view of the second camera overlaps with the field of view of the rear backup camera. At least in part responsive to processing captured image data, the control outputs a composite image for display at a display disposed in an interior cabin of the vehicle, and determines that a camera is misaligned due to a shift in at least one of yaw, pitch and roll alignment of one of the cameras disposed at the vehicle and, responsive to the determination of misalignment of that camera, at least partially compensates for the misalignment of that camera.
US10509969B2	Dynamic person queue analytics In one embodiment, a device identifies, from image data captured by one or more cameras of a physical location, a focal point of interest and people located within the physical location. The device forms a set of nodes whereby a given node represents one or more of the identified people located within the physical location. The device represents a person queue as an ordered list of nodes from the set of nodes and adds a particular one of the set of nodes to the list based on the particular node being within a predefined distance to the focal point of interest. The device adds one or more nodes to the list based on the added node being within an angle and distance range trailing a forward direction associated with at least one node in the list. The device provides an indication of the person queue to an interface.
US10509963B2	Discovering authoritative images of people entities Systems, methods, and computer storage media for discovering authoritative images of people entities are provided. Selections of person entities are received. Authoritative URLs and authoritative images for the person entities are identified. Once the authoritative images are identified, features are extracted. Queries for the person entities are identified by mining search engine logs. The queries and features can be utilized to construct candidate queries to identify and retrieve candidate image URLs. Candidate features are extracted for each candidate image associated with the candidate image URLs. Training data may be utilized to train a classifier that can be run on each candidate image. Each candidate image can then be tagged with an entity ID tag. Images with the entity ID tag can be ranked higher in search engine results page than images without the entity ID tag.
US10509961B2	Blindman navigation method and blindman navigation apparatus The present disclosure relates to navigation field and discloses a blindman navigation method and a blindman navigation apparatus. The blindman navigation method includes: obtaining image information of surroundings where a user is located; determining a distance between the user and a traffic signal light according to the image information; judging a distance between the user and a crossing according to the distance between the user and the traffic signal light, and determining the user is in a state where he/she has arrived at the crossing when the distance between the user and the crossing is less than a distance threshold that is preset.
US10509960B2	Method and apparatus for recognition and matching of objects depicted in images A method includes identifying one or more objects in one or more images of real-world scenes associated with a user, adding the identified one or more objects to a list of real-world objects associated with the user, assigning each object in the list of real-world objects to an object class based on object recognition, and providing a notification to the user that a content item has been associated with an object class assigned to one of the objects on the list of real-world objects associated with the user. A computer readable storage medium stores one or more computer programs, and an apparatus includes a processor-based device.
US10509956B1	Artificial intelligence image and text processing The present invention provides a method using a trained and activated artificial intelligence entity for detecting in photo images, moving or still, the identity of target people who are present or former members of the U.S. armed services, or are related thereto, from sources available through the Internet or other wide area computer network.
US10509954B2	Method and system of image segmentation refinement for image processing A system, article, and method of image segmentation refinement for image processing.
US10509952B2	Fast, embedded, hybrid video face recognition system An exemplary embodiment relates to the field of Automatic Face Recognition (AFR) systems. More specifically one exemplary embodiment relates at least to a method and a system capable of recognizing the face of a person using a device equipped with a camera of any kind and an associated computer, such as an embedded computer. The system is alternatively suitable to be implemented as an embedded system with minimal processing hardware capabilities, consuming very low power.
US10509945B2	Method for quantitative measurement of a biomarker by in situ immunofluorescence and uses thereof The invention relates to a method for quantitative measurement of a biomarker by in situ immunofluorescence and uses thereof. In particular, the invention relates to a method which is a useful tool for use in the field of diagnosis, prevention and/or treatment of disease or disorders, in particular in the field of cancer management and therapy.
US10509937B2	Curved-surface organic light emitting diode display device with fingerprint identification A curved-surface OLED display device with fingerprint identification includes a substrate, a thin film transistor layer, a pixel electrode layer, an OLED display material layer, a common electrode layer, an encapsulation layer, a curved touch detection and fingerprint detection layer and a curved protective layer. The thin film transistor layer includes plural thin film transistors, plural scan lines, and plural data lines. The pixel electrode layer includes plural pixel electrodes. The curved touch detection and fingerprint detection layer includes plural sense electrodes and plural traces for performing the touch detection operation and fingerprint identification operation. A partial area of the curved touch detection and fingerprint detection layer and the curved protective layer exhibits a curved-surface shape.
US10509935B1	Tuning process for a handheld scanner Methods and systems for auto-tuning a handheld scanning device that can account for changes in the orientation between the handheld scanning device and a presented symbol can include capturing a first image containing a presented symbol, recording an orientation parameter and parameters associated with capturing the first image containing the presented symbol, capturing a subsequent image containing the presented symbol, recording an orientation parameter of the presented symbol contained in the subsequent image, comparing the orientation parameter of the symbol contained in the subsequent images to the orientation parameter of the presented symbol contained in the subsequent image, determining if the orientation parameter of the presented symbol contained in the subsequent images is substantially similar to the orientation parameter of the symbol contained in the first image, and recording parameters associated with capturing the subsequent images containing the presented symbol.
US10509931B1	Methods, systems, and apparatuses for scanning and decoding direct part marking indicia Various embodiments described herein relate to a scanning system for scanning and decoding direct part markings (DPM) type indicia. The scanning system includes an arrangement of an illumination module, a beam splitter module, and a telecentric lens assembly. The telecentric lens assembly is adapted to direct an in-line illumination received from the illumination module as collimated light to illuminate the DPM indicia. Upon illumination, a first portion of light reflected from embossments of the DPM indicia that are incident on the telecentric lens assembly at a defined angle is decoupled from an optical path between the telecentric lens assembly and the target. An imager is exposed to a second portion of reflected light, excluding the decoupled reflected light that is reflected from a substrate on the DPM indicia, in order to capture an image of the DPM indicia for decoding.
US10509927B2	Wearable RFID system Apparatus and methods are provided for automatically interrogating a tagged object using radio frequency identification (RFID) when the object is moved. In one embodiment, a worker is outfitted with a wearable RFID system including an RF antenna, an RFID reader, and a holder to hold the antenna and reader during operation. The system is worn by the worker while the worker moves objects from one place to another. When the worker moves an object with an attached RFID tag, the antenna automatically begins scanning for signals from the object's RFID tag. When a RF signal is received by the antenna, the RFID reader collects the signal and transmits it to a host system which processes the signal to obtain information related to the object to which the RFID tag is attached.
US10509920B2	Data processing systems for processing data subject access requests In particular embodiments, a data subject request processing system may be configured to utilize one or more local storage nodes in order to process a data subject access request on behalf of a data subject. In particular embodiments, the one or more local storage nodes may be local to the data subject making the request (e.g., in the same country as the data subject, in the same jurisdiction, in the same geographic area, etc.). The system may, for example, be configured to: (1) receive a data subject access request from a data subject (e.g., via a web form); (2) identify a suitable local storage node based at least in part on the request and/or the data subject; (3) route the data subject access request to the identified local storage node; and (4) process the data subject access request at the identified local storage node.
US10509918B1	One-time obfuscation for polynomial-size ordered binary decision diagrams (POBDDs) Described is a system for protecting sensitive information that is hardcoded in polynomial-size ordered binary decision diagram (POBDD) form. A software executable represented as a POBDD having sensitive information embedded therein is obfuscated into an obfuscated POBDD. An input query on the obfuscated POBDD is evaluated, and the sensitive information is revealed only if the input query is a correct input. Thus, an adversary is prevented from extracting the sensitive information embedded in the POBDD.
US10509916B2	Access control lists for high-performance naming service A naming service for a hierarchical namespace. The naming service includes a database system with a first table having first records. Each of the first records is for a hierarchical node and includes a node identifier and an ACL identifier to a set of access control rules applicable to the node. The database system includes a second table including second records, each record in the second records has one of the ACL identifiers from the first table correlated with a definition access control rules in the set of access control rules. The naming service includes an access control rule identifier generator configured to detect a set of access control rules for each node in the namespace and generate an a ACL identifier for each set of access control rules that can be stored in records in the first table and stored in records in the second table.
US10509909B2	Non-disruptive DDoS testing DDoS testing service features testing and verifying the integrity of a DDoS mitigation strategy of an organization while maintaining operation of the targeted organization's IT infrastructure. This facilitates ongoing and recurring operation and integrity of the DDoS mitigation strategy, at regular intervals and without causing service disruption to the IT infrastructure. Testing can include an array of DDoS attack vectors allowing the risk assessment of the organization to be fully visible for the production environment concerning successful DDoS attack being launched against the organization.
US10509908B2	System and methods for secure firmware validation An electronic device, such as a dynamic transaction card having an EMV chip, that acts as a TPM having a memory, an applet, and a cryptographic coprocessor performs secure firmware and/or software updates, and performs firmware and/or software validation for firmware and/or software that is stored on the electronic device. Validation may compare a calculated checksum with a checksum stored in EMV chip memory. If a checksum calculated for firmware and/or a software application matches a checksum stored in EMV chip memory of the transaction card, the transaction card may operate normally. If a checksum calculated for firmware and/or a software application does not match a checksum stored in EMV chip memory of the transaction card, the transaction card may freeze all capabilities, erase the memory of the transaction card, display data indicative of a fraudulent or inactive transaction card, and/or the like.
US10509907B2	Methods and systems for secure and reliable identity-based computing The embodiments herein provide a secure computing resource set identification, evaluation, and management arrangement, employing in various embodiments some or all of the following highly reliable identity related means to establish, register, publish and securely employ user computing arrangement resources in satisfaction of user set target contextual purposes. Systems and methods may include, as applicable, software and hardware implementations for Identity Firewalls; Awareness Managers; Contextual Purpose Firewall Frameworks for situationally germane resource usage related security, provisioning, isolation, constraining, and operational management; liveness biometric, and assiduous environmental, evaluation and authentication techniques; Repute systems and methods assertion and fact ecosphere; standardized and interoperable contextual purpose related expression systems and methods; purpose related computing arrangement resource and related information management systems and methods, including situational contextual identity management systems and methods; and/or the like.
US10509902B2	Electronic device and method of controlling same Provided are an electronic device and a method of controlling same. The method of controlling the electronic device: displays a UI including a security index showing that the electronic device is in a state operating in a secure mode; compares the security index to a reference security index and determines whether the security index has been falsified; and when the security index is a falsified security index, shows that the security index is a security index that has been falsified.
US10509901B2	Method of managing a secure element The invention is a method for managing a secure element that comprises an operating system and a software application including an executable part which is tied to the operating system through a plurality of links. The method comprises the following steps: on receipt of an un-map command, recording in a memory area of the secure element a description of said links using an intermediate language, replacing the operating system by a new operating system by keeping said memory area unchanged, on receipt of a re-map command by the secure element, restoring a new set of links between the executable part and the new operating system by using the description.
US10509897B2	Wearable device and method of operating the same A wearable device includes a display; a sensor configured to obtain a biometric information of a user; a memory configured to store at least one instruction; and at least one processor configured to execute the at least one instruction to: based on an event related to executing an application, identify execution of biometric authentication associated with the application; based on the identification, display a message indicating information corresponding to the biometric authentication to be performed in the wearable device; obtain, by the sensor, the biometric information of the user wearing the wearable device; identify authority using the obtained biometric information and registered biometric information stored in the memory; and display, by the display, a screen associated with the executed application based on the identified authority.
US10509887B2	Must-join pin sign-off method The present disclosure describes a method for detecting unacceptable connection patterns. The method includes, using a processor to perform at least one of: performing an automated place-and-route (APR) process on a circuit layout that includes a first standard cell without a marker layer to generate a circuit graphic database system (GDS) file from the circuit layout, generating a standard-cell GDS file that includes a second standard cell with at least one marker layer applied to the second standard cell, and merging the circuit GDS file with the standard-cell GDS file to generate a merged GDS file that includes the first standard cell with at least one marker layer based on the second standard cell. The method further includes determining whether a connection pattern of the first standard cell in the merged GDS file is an unacceptable connection pattern.
US10509883B2	Method for layout generation with constrained hypergraph partitioning A layout-generation method for an IC is provided. The layout-generation method includes accessing data of a schematic design of the IC; generating a hypergraph from the schematic design; transforming a plurality of constraints into a plurality of weighted edges in the hypergraph; continuing partitioning the hypergraph by the weighted edges until a plurality of multilevel groups are obtained to generate a layout; and verifying the layout to fabricate the IC.
US10509879B2	Optimum stage number calculation method, information processing apparatus, and recording medium An optimum stage number calculation method executed by a processor, the optimum stage number calculation method includes extracting information on a signal path between a transmission cell and a reception cell that transmits and receives a signal according to a clock from net information indicating a connection relationship between a plurality of cells arranged and wired in a field programmable gate array, estimating a cell total delay amount indicating a total delay amount of cells allowed to be included in one period of the clock in the signal path from input information including at least clock period information indicating a length of one period of the clock, calculating the number of stages of logic cells included in the signal path from the cell total delay amount, and outputting number-of-stages information indicating the calculated number of stages of the logic cells.
US10509878B1	Systems and methods for routing track assignment Systems, methods, media, and other such embodiments are described for routing track assignment in a circuit design. One embodiment involves accessing routing data for a circuit design, and a first wire of a plurality of wires in the routing data. A second wire is identified that is related to the first wire as a parent wire along a shared routing direction. A misalignment value is calculated for the first wire and the second wire, and a new routing placement is selected for the first wire based at least in part on the misalignment value. In some embodiments, all wires in various routings of a circuit design are checked for possible misalignment in order to improve slew performance via reduction of unnecessary vias.
US10509877B1	Systems and methods for reducing latency when transferring I/O between an emulator and target device Systems, methods, and products having pipelined inputs to and outputs from an emulator are disclosed. Using a pipeline may allow the round trip cable delay (RTCD) to be spread across two or more clock cycles. In an embodiment, an emulation system may store input data received from a target device during a first clock cycle at a target timing domain interfacing component (TTD), and transmit the stored input data during a second clock cycle after the first clock cycle. In another embodiment, the emulation system may delay transmitting the input data received at the TTD during the first clock cycle such that that the input data reaches the emulator at a predetermined time during the second clock cycle. As the RTCD is spread across multiple clock cycles, the emulation system may implement faster clocks.
US10509876B2	Simulation using parallel processors A method for design simulation includes partitioning a verification task of a design (100) into a first plurality of atomic Processing Elements (PEs—108) having execution dependencies (112), each execution dependency specifying that a respective first PE is to be executed before a respective second PE. The method further includes computing an order for executing the PEs on a multiprocessor device (32), which includes a second plurality of processors (44) operating in parallel and schedules the PEs for execution by the processors according to a built-in scheduling policy. The order induces concurrent execution of the PEs by different ones of the processors without violating the execution dependencies, irrespective of the scheduling policy. The PEs are executed on the processors in accordance with the computed order and the scheduling policy, to produce a simulation result. A performance of the design is verified responsively to the simulation result.
US10509873B2	System and method for automated model calibration, sensitivity analysis, and optimization A computer-implemented interface apparatus and method are directed to automated calibration, sensitivity analysis, and optimization of computer models. User interfaces may be provided for automatically managing interchangeable input parameters, interchangeable output objective functions, and interchangeable optimization methods. A user may use the computer-implemented interface apparatus and method to select any number of input and output parameters and calibration or search thoroughness levels for automated calibration, sensitivity analysis, and optimization of a computer model. The functionality of selecting the input and output parameters and calibration or search thoroughness levels may allow the user to adjust or control computer run times for automated calibration, sensitivity analysis, and optimization of the computer model.
US10509867B2	Structure design support device, structure design support method, program, and recording medium A structure design support device includes: an evaluation point information acquisition unit which acquires evaluation point information representing a position in a first state and a position in a second state, of an evaluation point provided in a structure which is configured of a plurality of parts, and a part to which the evaluation point belongs, among the plurality of parts; and an evaluation value calculation unit which calculates an evaluation value representing the magnitude of a change between the first state and the second state, of a positional relationship between a first evaluation point belonging to a first part and a second evaluation point belonging to a second part different from the first part to which the first evaluation point belongs, by using the evaluation point information acquired in the evaluation point information acquisition unit.
US10509865B2	Dress form for three-dimensional drawing inside virtual reality environment Systems and methods are described for producing a representation of a display of a three-dimensional virtual reality environment and defining a dress form object within the virtual reality environment. The virtual reality environment is configured to receive interactive commands from at least one input device coupled to a computing device and associated with a user. Fabric movement simulations are generated by animating the dress form object according to configured animation data and displayed in the virtual reality environment. The display being may be generated in response to receiving a movement pattern indicating movement of the dress form object.
US10509864B2	Language model translation and training method and apparatus A language model training method and an apparatus using the language model training method are disclosed. The language model training method includes assigning a context vector to a target translation vector, obtaining feature vectors based on the target translation vector and the context vector, generating a representative vector representing the target translation vector using an attention mechanism for the feature vectors, and training a language model based on the target translation vector, the context vector, and the representative vector.
US10509862B2	Dynamic phrase expansion of language input The present disclosure generally relates to dynamic phrase expansion for language input. In one example process, a user input comprising text of a first symbolic system is received. The process determines, based on the text, a plurality of sets of one or more candidate words of a second symbolic system. The process determines, based on at least a portion of the plurality of sets of one or more candidate words, a plurality of expanded candidate phrases. Each expanded candidate phrase comprises at least one word of a respective set of one or more candidate words of the plurality of sets of one or more candidate words and one or more predicted words based on the at least one word of the respective set of one or more candidate words. One or more expanded candidate phrases of the plurality of expanded candidate phrases are displayed for user selection.
US10509859B2	Topological data analysis utilizing spreadsheets A method comprises receiving data points from a spreadsheet, mapping the data points to a reference space, generating a cover of the reference space, clustering the data points mapped to the reference space to determine each node of a graph, each node including at least one data point, generating a visualization depicting the nodes, the visualization including an edge between every two nodes that share at least one data point, generating a translation data structure indicating location of the data points in the spreadsheet as well as membership of each node, detecting a selection of at least one node, determining the location of data points in the spreadsheet corresponding to data points that are members of the selected node(s) using the translation data structure, and providing a first command to a spreadsheet application to provide a first visual identification of the first set of data points in the spreadsheet.
US10509856B2	Simplifying complex input strings Simplification of complex input strings is utilized for user convenience, such that the user may input a complex input string in lieu of performing an external calculation and inputting the result thereof. The simplification identifying at least one operator in the complex input string indicative of a mathematical operation, identifying a first sub-string and a second sub-string in the input string, comparing the first sub-string to an expectation identification associated with the input field to determine a significance of the first sub-string, comparing the first sub-string to a range expectation associated with said significance to determine if the first sub-string meets the range expectation, and calculating a simplified input string by performing the mathematical operation on the first sub-string and the second sub-string.
US10509855B2	Dynamic facet tree generation Embodiments of the present invention include dynamically updating a facet tree based on words found in one or more documents, the facet tree being a tree data structure that defines hierarchical relationships between a plurality of words. The method may further include calculating a degree of similarity between a first word and a second word based on similarity of usage of the first word and the second word in the one or more documents, and updating the facet tree based on the degree of similarity. The method may further include, for each of one or more candidate words in the one or more documents, calculating a degree of correlation between a co-occurrence of two or more existing facet tree entries in a document and an occurrence of the candidate word in the document, and updating the facet tree on the basis of the one or more degrees of correlation.
US10509852B2	Utilizing classification and text analytics for annotating documents to allow quick scanning Classification, text analytics, and natural language processing are used to evaluate passages, extract text, identify concepts, and provide visual cues and notations to assist readers in scanning and evaluating large amounts of information in a document.
US10509846B2	Accelerator for processing data An accelerator for increasing the processing speed of a processor. The accelerator operates in two distinct modes. In a first mode for dense layer processing, row data sets and column data sets are sent to a multiplier for multiplication. In a second mode for sparse layer processing compressed row data sets are received by a row multiplexer and compressed column data sets are received by a column multiplexer. Each multiplexer is configured to compare the indexes of data sets with one another to determine matching indexes. When indexes match, the matching data sets are selected and sent to the multiplier for multiplication. When indexes do not match, data sets are stored in memory devices for subsequent cycles.
US10509844B1	Network graph parser An approach for processing node data from code repository websites to generate patterns is disclosed. Node data can be parsed from a projects webpage or received from a code repository server hosting the repository website. Visualizations can be generated in a browser from the node data. The visualizations can be displayed within the browser and further be used to receive filter instructions. Refined node data can then be exported for further analysis.
US10509843B2	Systems and methods for managing tabs in web applications A computer implemented method includes receiving, at the browser application, a first request for web resources based on user selection of a first hyperlink outside of the web application; determining if the first hyperlink is associated with a record accessible by the web application from the database system; determining, when the first hyperlink is associated with the record for the web application, if a web application interface for the web application is active in at least one navigation tab of the browser application; and presenting, when the first hyperlink is associated with the record for the web application and the web application interface for the web application is active in the at least one navigation tab, the record within a console tab of the web application interface in the at least one navigation tab.
US10509842B2	Method and device for refreshing news list Provided is a method and device for refreshing a news list, wherein the method includes: receiving a refreshing signal; reading a refreshing start time according to the received refreshing signal; reading at least one preset time threshold, the preset time threshold is used for defining, in combination with the refreshing start time, a time interval for refreshing a news list; acquiring a recommended news list according to the refreshing start time and the preset time threshold, the recommended news list including: at least one piece of news to be recommended, the publication time of the news to be recommended falls within the time interval; allocating a recommending time for each piece of news to be recommended in the recommended news list; and refreshing the news to be recommended in the recommended news list according to the recommending time, so as to generate a new recommended news list.
US10509841B2	Inferred user identity in content distribution Embodiments of the present invention provide a method, system and computer program product for inferred user identity in content distribution. In an embodiment of the invention, a method for inferred user identity in content distribution includes retrieving a set of data of a particular classification from a data store of a computing device of an unidentified user requesting access to content in a content distribution system. The method further includes comparing the set of data of the particular classification to known patterns of data of the particular classification corresponding to different known users. The method yet further includes inferring an identity of the unidentified user based upon at least a partial matching of the compared set of data of the particular classification and known patterns of data of the particular classification. Finally, the method includes managing user interactions of the unidentified user based upon the inferred identity.
US10509835B2	Retrieval method, retrieval apparatus, and non-transitory recording medium storing retrieval program recorded therein A retrieval method includes: transforming, by a computer, a scale of a feature space according to feature information of each of items which become retrieval targets based on history information of an item selected in the past by a user; calculating a distance between the items in the feature space based on the feature space transformed for each of the items; and outputting an item located at a near distance to a specific item among the items based on the distance between the items.
US10509831B2	Systems and methods for time and space algorithm usage A system and method for determining suggested content and suggested content headlines for a web page. The system and method receive a request for suggested content for a web page, determine that suggested content is appropriate for the web page based on tags for the web page and tags for a suggested content headline associated with the suggested content, apply a rule to the tags of the suggested content headline, the rule based on one or more of time and location metadata, and transmit the suggested content headline for display with the web page if the rule has been satisfied.
US10509824B1	Automatic content recognition search optimization A processing device and a method are disclosed in which instructions are executed to determine, from a fingerprint of television content being consumed by a user, what program the user is watching so that program information may be sent for use by a smart device streaming the content to the user. The fingerprint may be compared with a database of fingerprints to find a match. The database may include fingerprints of favorite programs or of previously watched programs. The search may be narrowed according to the user's favorite programs or according to a subset of programs most likely to be watched, e.g., from a chronological history of programs the user usually watches and/or those that viewers in general usually watch in chronological order. When narrowed searches fail to find a fingerprint match, larger subsets up to and including the entire database may be searched for a match.
US10509823B2	Information provision system, viewing terminal, information provision method, and information provision programme The information providing system includes the communication unit, the content database, the search unit and the map information generation unit. The communication unit acquires place information indicating a place. The content database stores place information indicating a place and specifying information specifying an expression part where an expression related to the place appears in content in association with each other. The search unit acquires the specifying information stored in association with the place information indicating a place within a specified range from the place indicated by the place information acquired by the communication unit from the content database. The map information generation unit outputs the specifying information acquired by the search unit.
US10509812B2	Reducing translation volume and ensuring consistent text strings in software development Methods, systems, and computer-readable storage media for providing a list of similar texts to a user developing a software program include actions of receiving an original source text (OST) from the user, the OST including a text string, providing an OST with quality correction (OST-QC), the OST-QC including one or more corrections to the OST, determining that a source text repository includes entries associated with one or more source texts that are sufficiently similar, and in response, providing a list of similar texts, the list of similar texts including one or more OST-QCs of respective entries in the source text repository, and transmitting the list of similar texts for display to the user, a similar text of the list of similar texts being automatically inserted into the software program in response to user selection of the similar text from the list of similar texts.
US10509811B2	System and method for improved analysis of travel-indicating unstructured electronic documents A system and method for refund analysis of travel-indicating unstructured electronic documents. The method includes determining, based on data of a first electronic document, a mileage value-added tax (VAT) refund amount, wherein the first electronic document indicates at least one travel transaction; analyzing at least one second electronic document to determine at least one transaction parameter of each second electronic document, wherein each second electronic document includes at least partially unstructured data; creating a template for each of the at least one second electronic document, wherein each template is a structured dataset including the at least one transaction parameter determined for the respective electronic document; determining, based on the created at least one template, a fuel VAT refund amount; and determining, based on the mileage VAT refund amount and the fuel VAT refund amount, an entitled VAT refund amount.
US10509809B1	Constructing ground truth when classifying data The present disclosure relates to evaluating whether two data records reflect the same entity using a classifier in the absence of ground truth. Without ground truth, it is difficult to determine the precision or recall of a classifier. The present disclosure generates output data comprising a list of unique signatures generated from a set of records that are compared with each other. The output data may also comprise corresponding record pairs limited to a predetermined sample size for each unique feature signature.
US10509806B2	Recommendation engine for aggregated platform data Techniques are described for receiving data generated by multiple platforms of different types, and determining recommendations for end-user(s) of the multiple platforms based on an analysis of the received data. An end-user may interact with multiple individual platforms of different types. The individual platforms may generate data describing, and/or resulting from, such interactions. The data may be received, ingested, stored, analyzed, and/or otherwise processed by a super-platform. The data may be aggregated and the data and/or aggregate data may be analyzed by a recommendation engine executing on the super-platform to determine one or more recommendations for a particular end-user based on an analysis of the data and/or aggregate data associated with that end-user. Such recommendation(s) may be provided to the end-user through an end-user interface and/or search engine provided by the super-platform, or through a third-party entity.
US10509793B2	Information provision apparatus that provides information related to item used by user, and management client A group former derives location information of a subject being a user or a terminal device, and forms a group including a plurality of subjects, based on time-series data of location information related to a plurality of subjects. A point calculator calculates a feature action amount indicating a matching degree to a predetermined action pattern, based on which power of influence of a subject in a group is determined to be high, based on time-series data of the location information, for each of the plurality of subjects included in the group, and calculates a point of each subject based on the feature action amount. An aggregation processor calculates an item point corresponding to each item, by aggregating points. A transceiver outputs an item point.
US10509791B2	Statistical feature engineering of user attributes A method trains a model for providing content items to users of a social networking system. The system generates profile vectors based on user profile information such as demographic data and personal data. The system logs actions performed by users on the social networking system and generates behavior vectors based on the logged actions. The profile vectors and behavior vectors are each associated with a user attribute, e.g., the age or gender of a user. The system generates a difference vector based on a profile vector and a behavior vector. The difference vector is then used as a feature to train the model using machine learning techniques. The trained model may select content items that a target user is most likely to be interested in and interact with.
US10509787B2	Installation for managing a database An installation for managing a database, the database having a database filter to provide the data sought in response to a query defining the filter and at least one data hierarchy of at least three hierarchical levels. The installation includes an interrogator to provide at least one query defining a filter to select data sought by using the database filter. The installation includes a representation of a hierarchy table that includes, for each hierarchised datum, the data on which it is dependent, regardless of the number of hierarchical levels separating them, the data being contained in a separate record of the table which also contains the hierarchised datum. During an interrogation on the basis of a query pertaining to hierarchised data, the database filter provides a response to the query formulated on the basis of the hierarchy table without resorting to external interrogation tools.
US10509782B2	Machine learning based enrichment of database objects A method for enriching an object in a database may include determining, by a trained machine learning model, that a first object at the database is same and/or similar to a second object at the database. The first object and the second object may be part of a schema of the database. The second object may be subordinate to the first object. In response to the determination that the first object is same and/or similar to the second object, one or more attributes associated with the second object may be added to the first object. Related systems and articles of manufacture including computer program products are also provided.
US10509774B2	Secure containerized user specific isolated data storage Secure containerized user specific isolated data storage is disclosed. For example, a first isolated guest is instantiated, including a first account specific database with a write-protected schema, a write-protected first lower storage layer and a first upper storage layer. A first account is authenticated with the first isolated guest. A first change to the first account specific database is saved in the first upper storage layer based on executing a first database command from the first account. A second isolated guest is instantiated, including a second account specific database with the write-protected schema, a write-protected second lower storage layer and a second upper storage layer. The second account is authenticated with the second isolated guest. A second change to the second account specific database is saved in the second upper storage layer based on executing the second database command from the second account.
US10509766B2	Storing and retrieving restricted datasets to and from a cloud network with non-restricted datasets Provided are techniques for storing and retrieving restricted datasets to and from a cloud network with non-restricted datasets. A request to dump datasets from one or more storage devices to the cloud storage is received, wherein the datasets include restricted datasets and non-restricted datasets, and wherein the restricted datasets are in a format that is not supported by the cloud storage. The restricted datasets are identified. The restricted datasets are converted to a format that is supported by the cloud storage to generate converted datasets. The converted datasets and the non-restricted datasets are dumped to one container in the cloud storage.
US10509765B2	Neural processing unit that selectively writes back to neural memory either activation function output or accumulator value A neural network unit includes a programmable indicator, a first memory that holds first operands, a second memory that holds second operands, neural processing units (NPU), and activation units. Each NPU has an accumulator and an arithmetic unit that performs a series of multiply operations on pairs of the first and second operands received from the first and second memories to generate a series of products, and a series of addition operations on the series of products to accumulate an accumulated value in the accumulator. The activation units perform activation functions on the accumulated values in the accumulators to generate results. When the indicator specifies the first action, the neural network unit writes to the first memory the results generated by the activation units. When the indicator specifies the second action, the neural network unit writes to the first memory the accumulated values in the accumulators.
US10509764B1	Flexible remote direct memory access Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.
US10509762B2	Data rate-adaptive data transfer between modems and host platforms Systems, methods, and computer-readable media for transferring data between a host platform and modem circuitry are provided. At low data rates, data may be stored by on-chip memory, and data may be transferred from the on-chip memory to the host platform over an interconnect (IX) when a first aggregation period expires. At medium data rates, data may be stored in both the on-chip memory and in in-package or off-chip memory, and the data may be transferred from the on-chip memory and off-chip memory to the host platform over the IX when a second aggregation period expires. At high data rates, the on-chip memory may serve as an elastic buffer, and the data may be streamed directly through the on-chip memory to the host platform over the IX. Other embodiments are described and/or claimed.
US10509760B2	Buffer controller, memory device, and integrated circuit device A buffer controller includes a pointer generator, a code converter, a synchronizer, a code restorer, and a comparator. The pointer generator operates according to a first clock signal, and generates a first pointer by encoding a first address of a buffer with a first code. The code converter generates a first transmission pointer by converting the first pointer with a second code or a third code according to an amount of data stored in or read from the first address. The synchronizer synchronizes the first transmission pointer with a second clock signal. The code restorer generates a first comparison pointer by restoring the first transmission pointer, synchronized with the second clock signal, with the first code. The comparator compares the first comparison pointer with a second pointer. The second pointer defines a second address of the buffer with the first code.
US10509756B2	Circuit device, electronic device, and cable harness A circuit device includes first and second physical layer circuits, a bus switch circuit that switches connection between a first bus and a second bus that comply with a USB standard, on in a first period and off in a second period, and a processing circuit that performs, in the second period, processing for transferring packets on a transfer route that includes the first bus, the first and second physical layer circuits, and the second bus. When a host chirp K/J is detected on the first bus by the first physical layer circuit, the second physical layer circuit outputs a host chirp K/J to the second bus in the state where connection between the first bus and the second bus is switched off by the bus switch circuit.
US10509755B2	Automatic switching apparatus and automatic switching method An automatic switching apparatus and an automatic switching method are disclosed. The automatic switching apparatus includes a universal serial bus Type-C input connector, a plurality of main links, at least one video output connector and at least one USB output connector. The automatic switching method includes the steps of: (a) detecting a use state of the plurality of main links; and (b) automatically switching the specification of the at least one USB output connector.
US10509751B2	Information processing apparatus that converts an address and requester ID on a local host to an address and requester ID on a system host In cases where local devices (6, 6a) support a master transfer function, a portion of the memory space, of each of local devices (6, 6a), to be controlled from system host (2) is mapped onto a memory space on system host (2) side and a plurality of local devices (6, 6a) are reconfigured as one virtual local device. This provides information processing apparatus (4) which, in cases of connection with the plurality of local devices (6, 6a), resolves resource shortage on system host (2) side by appropriately mapping necessary registers of local devices (6, 6a) onto a memory space for system host (2).
US10509750B2	System and method for controlling multi-function pins in management controller stack Systems and methods for controlling multi-function general purpose input/output (GPIO) pins in a management controller stack, such as a baseboard management controller (BMC) stack. The system includes a management controller, which includes multiple pins. The management controller provides multiple functionalities, and each of the functionalities is related to at least one of the pins. In operation, the management controller provides a graphic user interface, which shows the functionalities, allowing the user to input an instruction to select one of the functionalities. Upon receiving the selected functionality, for each of the pins related to the selected functionality, the management controller sets a value of a corresponding register to indicate a functional status of the pin, such that the pins may provide the selected functionality based on the value of the corresponding registers.
US10509747B2	Memory access operation suspend/resume A memory controller manages memory access operations through a flash memory interface of a memory array of a solid-state storage device connected to a host. The memory controller executes a first memory access operation in the memory array. The first memory access operation has a first priority. The memory controller detects a suspending memory access operation available for execution in the memory array and having a higher priority than the first priority. The detection operation distinguishes between suspending memory access operations and non-suspending memory access operations. The memory controller suspends execution of the first memory access operation in the memory array and executes one or more memory access operations having higher priorities than the first priority and being available for execution in the memory array. The memory controller resumes the execution of the first memory access operation in the memory array.
US10509746B2	Information processing apparatus, storage medium and information processing method An information processing apparatus includes a processor; and a management controller coupled to the processor and configured to prohibit interruption from a slot to the processor when an input/output (IO) device is mounted in the slot by exchange or expansion; performs setting of the IO device while the interruption from the slot to the processor is prohibited; and permit the interruption from the slot to the processor when the setting of the IO device is completed.
US10509745B2	Configurable input / output connector in a camera A method and system for configuring a USB3 input/output port in a camera are disclosed. The method comprises responsive to an indication that a peripheral device is a non-USB3 device, remapping pins of the USB3 input/output port to a first predefined port configuration associated with an I2C protocol by remapping a RX1− pin to communicate a first I2C signal and remapping a RX1+ pin to communicate a second I2C signal, and responsive to successful authentication between the camera and the peripheral device via the I2C protocol, enabling communication with the peripheral device and remapping the pins of the USB3 input/output port to a second predefined port configuration compatible with operation of the authenticated peripheral device by remapping a TX2+ pin to communicate a first general purpose input/output signal and remapping a TX2− pin to communicate a second general purpose input/output signal.
US10509743B2	Transferring data between memory system and buffer of a master device A master device has a buffer for storing data transferred from, or to be transferred to, a memory system. Control circuitry issues from time to time a group of one or more transactions to request transfer of a block of data between the memory system and the buffer. Hardware or software mechanism can be provided to detect at least one memory load parameter indicating how heavily loaded the memory system is, and a group size of the block of data transferred per group can be varied based on the memory load parameter. By adapting the size of the block of data transferred per group based on memory system load, a better balance between energy efficiency and quality of service can be achieved.
US10509739B1	Optimized read IO for mix read/write scenario by chunking write IOs In one embodiment, a storage system receives a number of input/output (IO) request transactions at the storage system having multiple storage devices. For each of the plurality of IO request transactions, the system determines a number of child IO requests required to complete the IO request transaction. The system tags the IO request transaction and/or the associated child IO requests with a tag identifier. For each of the child requests that is a write IO request, the system determines an optimal write IO request size, segments the write IO request into a number of sub-IO write requests, each having an optimal request size, and interleaves sub-IO write requests with read IO requests for servicing to avoid impact in performance to read IO requests for a mixed IO workload.
US10509737B2	Data processing system for a graphical interface and graphical interface comprising such a data processing system A data processing system for a graphical interface includes at least one graphics processing unit (GPU) and at least one central processing unit (CPU) which communicates with the graphics processing unit, said processing unit and said central processing unit each including a group of data processing cores (C1, . . . , C6, C′1, . . . C′6). The data processing cores of the graphics processing unit are each connected to a data processing core of the central processing unit via a single dedicated bus (B1, . . . , B6) in such a way as to carry out a data transfer in parallel between said graphics processing unit and said central processing unit.
US10509736B2	Controlling access by IO devices to pages in a memory in a computing device An input-output (IO) memory management unit (IOMMU) uses a reverse map table (RMT) to ensure that address translations acquired from a nested page table are correct and that IO devices are permitted to access pages in a memory when performing memory accesses in a computing device. A translation lookaside buffer (TLB) flushing mechanism is used to invalidate address translation information in TLBs that are affected by changes in the RMT. A modified Address Translation Caching (ATC) mechanism may be used, in which only partial address translation information is provided to IO devices so that the RMT is checked when performing memory accesses for the IO devices using the cached address translation information.
US10509733B2	Kernel same-page merging for encrypted memory Systems and methods for performing data deduplication one storage blocks while the data is encrypted. An example method may comprise: selecting a first storage block and a second storage block from a plurality of encrypted storage blocks, wherein the first storage block and the second storage block are encrypted using different cryptographic input; causing the first storage block and the second storage block to be decrypted and further encrypted using a common cryptographic input; determining that a cipher text of the first storage block and a cipher text of the second storage block are the same; and updating a reference to the first storage block to reference the second storage block in response to the determining that the cipher text of the first storage block and the cipher text of the second storage block are the same.
US10509731B1	Methods and apparatus for memory tier page cache coloring hints Methods and apparatus for providing for a cache replacement policy for page caches for storage having a first memory tier having regions and virtual memory having mmaps of ones of the regions in the first memory tier. In an embodiment, the cache replacement policy includes setting a color hint to a first one of the cached pages, wherein the color hint includes a value indicating hotness of the first one of the cached pages.
US10509728B2	Techniques to perform memory indirection for memory architectures Various embodiments are generally directed to an apparatus, method and other techniques to receive a request from a core, the request associated with a memory operation to read or write data, and the request comprising a first address and an offset, the first address to identify a memory location of a memory. Embodiments include performing a first iteration of a memory indirection operation comprising reading the memory at the memory location to determine a second address based on the first address, and determining a memory resource based on the second address and the offset, the memory resource to perform the memory operation for the computing resource or perform a second iteration of the memory indirection operation.
US10509727B1	Method and apparatus for performing task-level cache management in electronic device A method and an apparatus for performing task-level cache management in an electronic device are provided. The method may be applied to a processing circuit of the electronic device, and may include: before a task of a plurality of tasks runs on a processor core, performing at least one checking operation on the task to generate at least one checking result, wherein the at least one checking result indicates whether the task is a risky task with risk of evicting cached data of an urgent task from a cache, and the cache is dedicated to a set of processor cores including the processor core; and according to the at least one checking result, determining whether to temporarily limit cache access permission of the processor core during a time period in which the task runs on the processor core, for preventing cache eviction of the cache due to the task.
US10509726B2	Instructions and logic for load-indices-and-prefetch-scatters operations A processor includes an execution unit to execute instructions to load indices from an array of indices, optionally perform scatters, and prefetch (to a specified cache) contents of target locations for future scatters from arbitrary locations in memory. The execution unit includes logic to load, for each target location of a scatter or prefetch operation, an index value to be used in computing the address in memory for the operation. The index value may be retrieved from an array of indices identified for the instruction. The execution unit includes logic to compute the addresses based on the sum of a base address specified for the instruction, the index value retrieved for the location, and a prefetch offset (for prefetch operations), with optional scaling. The execution unit includes logic to retrieve data elements from contiguous locations in a source vector register specified for the instruction to be scattered to the memory.
US10509722B2	Memory device with dynamic cache management A memory system includes a memory array having a plurality of memory cells; and a controller coupled to the memory array, the controller configured to: select a garbage collection (GC) source block storing valid data, calculate a valid data measure for the GC source block for representing an amount of the valid data within the GC source block, and designate a storage mode for an available memory block based on the valid data measure, wherein the storage mode is for controlling a number of bits stored per each of the memory cells for subsequent or upcoming data writes.
US10509721B2	Performance counters for computer memory In some examples, performance counters for computer memory may include ascertaining a request associated with a memory address range of computer memory. The memory address range may be assigned to a specified performance tier of a plurality of specified performance tiers. A performance value associated with a performance attribute of the memory address range may be ascertained, and based on the ascertained performance value, a weight value may be determined. Based on the ascertained request and the determined weight value, a count value associated with a counter associated with the memory address range may be incremented. Based on an analysis of the count value associated with the counter, a determination may be made as to whether the memory address range is to be assigned to a different specified performance tier of the plurality of specified performance tiers. Based on a determination that the memory address range is to be assigned to the different specified performance tier, the memory address range may be assigned to the specified different performance tier.
US10509718B2	System and method for automatically generating software testing scripts from test cases A system and computer-implemented method for generating software testing scripts from test cases is provided. The system comprises a test case importing module configured to receive test cases and a Natural Language Processing (NLP) module configured to scan and mine text of the received test cases. Furthermore, the system comprises a user interface object identifier to identify one or more User Interface (UI) elements, functional flow models and test steps and corresponding test data. The system also comprises a user interface object mapper to map the one or more identified UI elements from the test cases with one or more user interface elements corresponding to one or more wireframes. In addition, the system comprises a test script generator to receive the mapped one or more UI elements, the identified functional flow models and the identified test steps and corresponding test data for generating test scripts.
US10509716B2	Automated recovery of flighted features based on service requests Methods and systems for managing a flighted software feature. One embodiment provides a system for disabling a flighted software feature enabled for selected users in a computing environment. The system includes a memory storing instructions and an electronic processor coupled to the memory. The electronic processor configured to execute the instructions to determine a set of related service requests submitted by a plurality of users in the computing environment, and, for each of the plurality of users, query a server servicing the user for a list of flighted software features enabled for the user during a predetermined time period. The electronic processor is also configured to determine, based on the list of flighted software features enabled for each of the plurality of users during the predetermined time period, a common flighted software feature, and automatically disable the common flighted software feature for at least one of the plurality of users.
US10509713B2	Observation by a debug host with memory model and timing offset calculation between instruction and data traces of software execution carried on in a debug target having a main memory and a cache arrangement A method, performed in a debug host, for observing software execution on a computer having one or more processor cores, a cache attached to the one or more processor cores via respective execution pipelines forming a cache arrangement, and a memory, comprises obtaining an instruction trace of the cache arrangement and a data trace for data being loaded from the memory into the cache. The instruction trace is synchronized with the data trace to generate a synchronized data trace and/or a synchronized instruction trace. A state of a memory model, representing a memory readable by the one or more processor cores via a respective instruction is updated using the synchronized data trace and the synchronized instruction trace.
US10509707B1	Selective data mirroring Described are techniques for mirroring data that may include issuing, by an application on a host, a write operation that writes first data to a primary storage entity having data stored in accordance with a first format and first structure; intercepting, on the host, the write operation; and performing, on the host, first processing to process the write operation. The first processing may include: sending the write operation to a data storage system including the primary storage entity; determining whether the primary storage entity is mirrored as a second storage entity having data stored in a second format and second structure different from the first format and first structure; and responsive to determining the primary storage entity is mirrored as the second storage entity, issuing one or more second write operations to mirror the first data on the second storage entity in accordance with the second format and second structure.
US10509703B1	External backup and instant recovery system for a computer Improved apparatus and system for the backup and recovery of a computer system with minimized key strokes and steps for a user. The improved apparatus and system includes an external hard drive, power controls, keyboard controller, and flash drive, all of which are referred to as the present invention DittoDrive™, to allow a user to copy the contents of a computer hard drive to a second hard drive and then allow the user to operate the computer from either the first hard drive or the second hard drive.
US10509702B2	Creating and verifying successful creation of a dataset image of a dataset stored across a plurality of storage systems An application may store data to a dataset comprising a plurality of volumes stored on a plurality of storage systems. The application may request a dataset image of the dataset, the dataset image comprising a volume image of each volume of the dataset. A dataset image manager operates with a plurality of volume image managers in parallel to produce the dataset image, each volume image manager executing on a storage system. The plurality of volume image managers respond by performing requested operations and sending responses to the dataset image manager in parallel. Each volume image manager on a storage system may manage and produce a volume image for each volume of the dataset stored to the storage system. If a volume image for any volume of the dataset fails, or a timeout period expires, a cleanup procedure is performed to delete any successful volume images.
US10509699B2	Zone aware request scheduling and data placement A method begins with receiving an encoded data slice that has associated therewith a slice name that is representative of a dispersed storage network (DSN) logical address. The method continues with accessing a DSN address to memory device mapping based on the DSN logical address to identify a memory device of the storage unit. The method continues with retrieving a logical zone to physical address space mapping of the identified memory device. The method continues with determining information regarding the encoded data slice and a logical zone of the memory device from the logical zone to physical address space mapping based on the encoded data slice information. The method continues with generating a physical address within the identified logical zone for storing the encoded data slice. The method continues with storing the encoded data slice within the identified memory device at the physical address.
US10509692B2	Loosely-coupled lock-step chaining A system and method enables loosely-coupled lock-step computing including sensors that detect or measure a physical property and server groups. Each server group is serially linked to another server group and includes server instances operating in virtual synchrony. Virtual synchrony middleware receives outputs from multiple server instances and renders a single reply based on the outputs from the multiple server instances. The virtual synchrony middleware replicates and orders incoming requests to the server groups to ensure each of the server instances of that server group receives the same incoming requests in the same order.
US10509689B2	Method for processing application and terminal The present disclosure provides a terminal and a method for processing an application. The method includes: monitoring a temperature change state of a CPU; searching for an APP with a first CPU occupancy rate exceeding a corresponding normal numerical range if it is monitored that a second CPU occupancy rate is also in an increase state upon monitoring that temperature of the CPU is in an increase state; determining the APP as an APP that causes a temperature increase of the CPU; and stopping using the APP that causes the temperature increase of the CPU. According to the method, the influence on the terminal from an APP that causes the temperature increase of the CPU is reduced and the condition that the CPU of the terminal is overheated is avoided.
US10509687B2	Process migration in data center networks There is provided a method and system for process migration in a data center network. The method includes selecting processes to be migrated from a number of overloaded servers within a data center network based on an overload status of each overloaded server. Additionally, the method includes selecting, for each selected process, one of a number of underloaded servers to which to migrate the selected process based on an underload status of each underloaded server, and based on a parameter of a network component by which the selected process is to be migrated. The method also includes migrating each selected process to the selected underloaded server such that a migration finishes within a specified budget.
US10509685B2	Methods, systems, and computer readable mediums for workload clustering Methods, systems, and computer readable mediums for optimizing a system configuration are disclosed. In some examples, a method includes determining whether a system configuration for executing a workload using a distributed computer system is optimizable and in response to determining that the system configuration is optimizable, modifying the system configuration such that at least one storage resource for storing workload data is located at a server node that is executing the workload in the distributed computer system.
US10509684B2	Blockchain integration for scalable distributed computations An apparatus is configured to initiate distributed computations across a plurality of data processing clusters associated with respective data zones, to utilize local processing results of at least a subset of the distributed computations from respective ones of the data processing clusters to generate global processing results, and to update at least one distributed ledger maintained by one or more of the plurality of data processing clusters to incorporate one or more blocks each characterizing at least a portion of the distributed computations. Each of at least a subset of the data processing clusters is configured to process data from a data source of the corresponding data zone using one or more local computations of that data processing cluster to generate at least a portion of the local processing results. At least one of the data processing clusters is configured to apply one or more global computations to one or more of the local processing results to generate at least a portion of the global processing results.
US10509681B2	Electronic apparatus for effective resource management and method thereof A resource management method of an electronic apparatus according to an example embodiment includes storing resource information including at least one resource category for assorting hardware resources and software resources by type and an attribute category indicating attribute information of resources included in the at least one resource category in a memory of the electronic apparatus, and in response to an application requesting a specific resource, allocating the specific resource to the application based on the resource information.
US10509676B1	Techniques for optimizing entropy computations Techniques for data processing may include: computing an entropy value for the chunk; determining, in accordance with the entropy value for the data chunk, whether the data chunk is compressible; and responsive to determining the data chunk is compressible based on the entropy value for the chunk, compressing the data chunk. The entropy value may be determined using counters for data items where the counters denote current frequencies of different allowable data items in the data chunk; and performing second processing using the counters to determine an entropy value for the data chunk, wherein said second processing includes selecting a precomputed binary logarithmic value from a table for each of the counters. The table may include integer representations of binary logarithmic values. The second processing may include loading multiple data items of the chunk into a register, extracting each data item from the register and incrementing a corresponding counter.
US10509668B2	Methods and systems for provisioning a virtual resource in a mixed-use server A method for provisioning a virtualized resource includes directing, by a provisioning machine, a server-executed hypervisor to provision a virtual machine. The provisioning machine directs generation of an organizational unit within a first organizational unit within a multi-tenant directory service separated from a second organizational unit in the multi-tenant directory service by a firewall. The provisioning machine associates the virtual machine with the first organizational unit. The provisioning machine establishes a firewall policy on the virtual machine restricting communications to the virtual machine and excluding a user associated with the second organizational unit. The provisioning machine receives a request to provision a virtualized resource for at least one user. The server establishes a connection between a client machine of the at least one user and the at least one virtual machine providing the at least one virtual resource.
US10509665B2	Fast-booting application image Execution of an executable portion of an application source executing in a first computer instance is monitored at least up to a point relative to a variation point. The execution is halted at the point. An application image of the first computer instance usable to instantiate a second computer instance is copied based at least in part on the variation point such that the second computer instance continues execution of the executable portion of the application source from the variation point, and the application image is caused to be stored.
US10509661B2	Method for controlling startup of application and terminal device A method for controlling application includes following operations. Startup of a target application of a terminal device is accelerated in response a control instruction of starting the target application. Accelerating the startup of the target application is stopped when a duration of accelerating the startup of the target application reaches a preset value, based on that a time length required for successfully starting the target application is greater than or equal to a preset time length, or accelerating the startup of the target application is stopped when a refresh rate of frames of a main thread of the target application reaches or exceeds a preset refresh rate, based on that the time length required for successfully starting the target application is less than the preset time length. A related terminal device is also provided.
US10509660B2	Systems and methods for assessing configuration profiles for a user configurable device Systems and methods for assessing configuration profiles for a user configurable device. The configuration profile may include sets configuration parameters and an associated configuration parameter values that may be analyzed to determine a set of current states for the user configurable device. The set of current states may be used to identify a candidate state that is related to a candidate configuration profile. The candidate configuration profile may include at least one set of a candidate configuration parameter and an associated candidate configuration parameter value. One or more prompts may be rendered via the customer device to set at least one of the configuration parameters and associated configuration parameter values based on the corresponding candidate configuration parameter values. A response is received via the user interface to the prompt, and an indication of such response may be transmitted to update the identification of the subsequent candidate configuration profiles.
US10509655B1	Processor circuit and operation method thereof A processor circuit and an operation method thereof are provided. The processor circuit includes a re-order buffer (ROB) and an alias queue (AQ) module. The ROB records next sequential instruction pointer (Nsip) values of a plurality of load instructions and a plurality of store instructions. Each of a plurality of entries of the AQ module includes a first field and a plurality of second fields. When a first load instruction and a first store instruction cause a first memory violation and the ROB retires the first load instruction, the AQ module stores the Nsip value of the first load instruction into the first field of one of the entries and stores the Nsip value of the first store instruction into one of the second fields of one of the entries.
US10509652B2	In-lane vector shuffle instructions In-lane vector shuffle operations are described. In one embodiment a shuffle instruction specifies a field of per-lane control bits, a source operand and a destination operand, these operands having corresponding lanes, each lane divided into corresponding portions of multiple data elements. Sets of data elements are selected from corresponding portions of every lane of the source operand according to per-lane control bits. Elements of these sets are copied to specified fields in corresponding portions of every lane of the destination operand. Another embodiment of the shuffle instruction also specifies a second source operand, all operands having corresponding lanes divided into multiple data elements. A set selected according to per-lane control bits contains data elements from every lane portion of a first source operand and data elements from every corresponding lane portion of the second source operand. Set elements are copied to specified fields in every lane of the destination operand.
US10509649B2	Value stream graphs across heterogeneous software development platforms Systems and methods to autonomously generate emergent software delivery value stream graphs from work units (e.g., tasks) that are created and managed through different specialized software tools by the many teams of an entity (e.g., company, other organization) involved in large software delivery activities. The emergent software delivery value stream graphs may be produced by autonomously monitoring and integrating the activity from individual software development tools. Additionally or alternatively, emergent software delivery value stream graphs may be produced by altering a previously captured event stream based on a description of changes to a development stage stream and team information. The generated value streams may be analyzed and/or visualized to report on various aspects of the software development for an organization.
US10509646B2	Software update rollbacks using file system volume snapshots The embodiments set forth a technique for restoring a computing device to an operable state when a software update renders the computing device inoperable. According to some embodiments, a snapshot of a file system volume is automatically generated prior to executing the software update. When an issue is detected with the software update—e.g., the computing device freezes, the computing device cannot boot into an operable mode, etc.—the computing device can (1) automatically enter into a restoration mode, and (2) restore the file system volume to its previous state in accordance with the snapshot. In this manner, the issues caused by the software update are entirely mitigated, and the computing device can transition back into an operable state.
US10509635B2	Processor that includes a special store instruction used in regions of a computer program where memory aliasing may occur Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. The processor defines a special store instruction that is different from a regular store instruction. The special store instruction is used in regions of the computer program where memory aliasing may occur. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing may occur.
US10509634B2	Data flow analysis for dynamic application, skipping views According to some embodiments of the present invention there is provided a method for identifying control dependencies between a source code and selected paths though the source code comprising: receiving an source code having a plurality of application functionalities, calculating a control graph dataset mapping a plurality of code segments of the source code into a plurality of source code execution paths, defining at least one control dependency from at least one source code execution path to the source code, receiving a subgroup defining a plurality of selected application functionalities from the plurality of application functionalities, identifying at least one of the plurality of source code execution paths that covers suitable code segments of the plurality of code segments which are required for performing application functionalities from the subset, and identifying at least one control dependency to eliminate within the one identified source code execution path.
US10509633B2	Base editor component in a web application builder framework Disclosed are examples of systems, apparatus, methods and computer program products for providing a base editor component for editing web application builder components in a web application builder framework. A database system maintains a database associated with a number of web application builder components, each with one or more attributes, for constructing web application components based on user input. Based on a user request to add to or modify one or more attributes of a web application builder component, the system retrieves a metadata model associated with the web application builder component that contains nodes corresponding to the component's attributes. The system modifies the metadata model by adding or editing one or more nodes based on the user request, then stores the modified metadata model in one or more server databases.
US10509627B2	User interface sound emanation activity classification Methods, computer program products, and systems are presented. The method computer program products, and systems can include, for instance: obtaining an audio input, the audio input representing sound emanating from a key press based user interface; generating a context pattern based on the audio input; performing classification of the context pattern to classify the context pattern as belonging to a signature pattern classification, wherein the signature pattern classification specifies a user activity; and providing an output based on the performing classification.
US10509626B2	Handling of loss of pairing between networked devices Systems and methods disclosed herein include (i) receiving a voice command via a networked microphone device configured to receive voice commands for a media playback system, wherein the media playback system comprises a primary media playback device configured to perform a function and/or provide a first feedback in response to voice commands received via the networked microphone device, (ii) determining that the primary media playback device is not available to perform a function and/or provide the first feedback in response to the voice command, and (iii) in response to determining that the primary media playback device is not available to perform a function and/or provide the first feedback in response to the voice command, instructing a fallback device to perform a function and/or provide a second feedback in response to the voice command.
US10509624B2	Single-bit volume control Audio content in a single-bit audio stream can be reproduced at a transducer by mapping the single-bit audio stream to symbols in a multi-bit audio stream. Volume control may be implemented, in part, in the digital domain and, in part, in the analog domain. In the digital domain, when converting the single-bit audio stream to a plurality of symbols, the plurality of symbols is selected based, at least in part, on audio content of the single-bit audio stream and a desired volume level. In the analog domain, when converting an analog current signal output from a current-steering DAC processing the plurality of symbols to an analog voltage signal, an analog gain value may be selected based, at least in part, on the desired volume level.
US10509623B2	Audio signal processor An apparatus in which a user can easily check that an appropriate audio file is assigned to an immediate output switch. A system includes a PC connected to a communication line, and an audio interface apparatus connected to the PC and having an immediate output switch that outputs, in response to a user operation and to the PC, a reproduction start instruction signal of an audio file which is assigned in advance. The PC judges whether or not the assignment is normal when an audio file is assigned by a user operation, and displays a judgment result in association with a virtual switch displayed on a display corresponding to the immediate output switch.
US10509622B2	Audio content production, audio sequencing, and audio blending system and method Some embodiments include a production content server system with a computing device processing operations include causing a content reader server to couple to a content source with content using a wired or wireless link, and downloading at least one content file associated with content retrieved from the content source, where content file includes audio and/or a video. The operations include transcoding at least a portion of the at least one content file with a dynamic range compression to a specified dynamic range, equalization and duration, and processing at least one content audio file from the at least one content file. The operations further include storing the at least one content audio file to a production content database. Some embodiments include processing a production break audio file including blending the at least one production break audio file with at least one other content file.
US10509620B2	Display control apparatus, display apparatus, display system, and computer-readable storage medium A display control apparatus including a first icon storage section storing a first icon; a second icon storage section storing a second icon; a first correspondence information storage section storing a combination of mobile terminal identification information and application identification information, in association with the second icon; a mobile terminal identification information receiving section receiving mobile terminal identification information from a mobile terminal; an application identification information receiving section receiving application identification information from the mobile terminal; and a display control section displaying the second icon in a display section if the combination of mobile terminal identification information received by the mobile terminal identification information receiving section and application identification information received by the application identification information receiving section is stored in the first correspondence information storage section, and displaying the first icon in the display section if not stored in the first correspondence information storage section.
US10509618B2	Organic light emitting diode display device and method for operating the same An OLED display device includes a communication unit to connect with a terminal, a display unit including a pixel including an OLED, and a controller to receive mirroring image data, which corresponds to a screen displayed on the terminal, through the communication unit, to control the display unit to display a mirroring image on an area of the display unit based on the received mirroring image data, and to control the display unit not to display the displayed mirroring image on the area based on an average picture level (APL) of the displayed mirroring image.
US10509616B2	Method for operating electronic device, and electronic device A method for operating a first electronic device is provided. The method includes displaying a first graphic element and a first screen part related to a second electronic device on a first display of the first electronic device and detecting movement of the first graphic element in relation to the first screen part. The method also includes displaying a second screen part related to the second electronic device in response to the movement where a second graphic element corresponding to the first graphic element is inserted in the second screen part.
US10509615B2	Method and system for managing access of functions in a multi-functional printer A method and device are provided for managing access of functions in a Multi-Functional Printer (MFP) by an access manager. The access manager receives information regarding occurrence of at least one error in at least one functional unit of the MFP, and identifies one or more functions operably dependent on at least one functional unit one or more functions operably independent of at least one functional unit, based on a pre-defined master error list. The, access manager divides a display screen of MFP into a plurality of display portions, where a first display portion of a plurality of display portions displays one or more functions operably independent of at least the one functional unit and a second display portion of the plurality of display portions displays information associated with at least one error that has occurred in at least one functional unit of the MFP.
US10509614B2	Video display apparatus-apparatus communication A technique capable of realizing more suitable image output and the like for an own apparatus is provided with respect to communication among apparatuses in a system including a video display apparatus. A video display apparatus provided with an apparatus-apparatus communication interface (for example, an HDMI) holds own apparatus information. In a case where a video output apparatus is connected to a video input unit of the video display apparatus via a first apparatus-apparatus communication interface and a video output unit of the video display apparatus is connected to an external video display apparatus via a second apparatus-apparatus communication interface, external apparatus information is obtained from the external video display apparatus via the second apparatus-apparatus communication interface, and apparatus information (EDID) is provided to the video output apparatus via the first apparatus-apparatus communication interface.
US10509613B2	Control device for vehicle A control device for a vehicle equipped in the vehicle, the control device that includes a first display located in a center fascia of the vehicle, a second display located at a lower side of the first display, a guide configured to guide the second display to be moved in a direction from front to rear sides of the vehicle, and a controller configured to control at least one of the first and second displays such that information output on the at least one of the first and second displays differs according to a position of the second display is disclosed.
US10509608B2	Print target data transfer system and image forming apparatus A print target data transfer system includes first and second image forming apparatuses and a user terminal. The first image forming apparatus accepts print target data, stores it, and sends notification information containing meta-information on the print target data to a user terminal as a notification destination. The user terminal displays the meta-information contained in the received notification information, accepts a user's selection of an arbitrary one from pieces of print target data indicated by the meta-information, and sends to the first image forming apparatus a request to transfer the selected piece of print target data to the second image forming apparatus. The first image forming apparatus transfers the piece of print target data to the second image forming apparatus according to the request. The second image forming apparatus receives the transferred piece of print target data and executes processing for printing the piece of print target data.
US10509602B2	Data storage device and operating method thereof A data storage device includes a nonvolatile memory device including a main map table, the main map table including a plurality of map segments; and a controller comprising a sub map table including only some of the plurality of map segments of the main map table, the controller is suitable for updating access frequencies for the respective map segments of the main map table; and for determining whether to erase a map segment of the sub map table based on the updated access frequencies for the respective map segments.
US10509601B2	Data storage system with multi-tier control plane A data storage system includes multiple data storage units and a zonal control plane. The zonal control plane assigns volumes to respective ones of the data storage units. The data storage units include multiple head nodes and data storage sleds. At least one of the head nodes implements a local control plane for the data storage unit. Also, the head nodes of each data storage unit are configured to service read and write requests directed to one or more volumes serviced by the data storage unit independent of the zonal control plane.
US10509599B2	Stack management in memory systems A memory system having a stack memory, a set of media. and a controller. The controller divides the stack memory into a plurality of stacks, measures usages of the stacks in a period of time of operating on the set of media, and adjusts partitioning of the stack memory into the plurality of stacks according to the measured usages.
US10509587B2	System and method for high priority backup A coordination point for assigning clients to remote backup storages includes a persistent storage and a processor. The persistent storage stores gateway pool cache capacities of the remote backup storages. The processor obtains a data storage request for data from a client of the clients; obtains an indirect cache estimate for servicing the data storage request; selects a remote backup storage of the remote backup storages based on the obtained indirect cache estimate using the gateway pool cache capacities; and assign the selected remote backup storage to service the data storage request. The selected remote backup storage has a higher client load at a time selection than a second client load of a second remote backup storage of the remote backup storages.
US10509583B1	Memory management method and storage controller A memory management method is provided. The method includes performing a read retry operation to a target block stripe, and identifying a read retry recording table of the target block stripe; selecting a target read retry index value from one or more first read retry index values according to the one or more first read retry index values in the read retry recording table; using a target read retry option corresponding to the read retry index value to perform a read operation to the target block stripe; in response to determining that the read operation is successful, determining that the read retry operation is completed, and updating the read retry recording table according to the target read retry index value; and determining whether to perform a wear leveling operation to the target block stripe according to the latest read retry recording table.
US10509582B2	System and method for data storage, transfer, synchronization, and security A system for storing and transmitting data in a highly compact format comprising reference codes to data chunklets contained in a library, wherein the data are retrieved after transmission or storage by re-constructing the data from the chunklets in the library using the reference codes. One version of the system contains proprietary libraries which act as a form of data security. Another version of the system contains a standardized version of the library encoded onto the firmware of a broad range of computing devices, allowing optimized storage and transmission of data between two such devices equipped with the system.
US10509576B2	Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enabling autonomous hardware-based deep power down of devices are described. In one embodiment, a system includes a device, a static memory, and a power control unit coupled with the device and the static memory. The system further includes a deep power down logic of the power control unit to monitor a status of the device, and to transfer the device to a deep power down state when the device is idle. In the system, the device consumes less power when in the deep power down state than in the idle state.
US10509565B2	Apparatuses, methods, and computer-readable non-transitory recording mediums for erasure in data processing Upon receiving an erase command and a first logical address, a controller in a first mode sets, as an erasure waiting area, an erasure unit area assigned with a first physical address associated with the first logical address in a first table. The controller in the first mode replaces, in the first table, the first physical address with a physical address assigned to an erasure completion area. The controller in a second mode sets the erasure waiting area as the erasure completion area. Upon receiving a release command to release the second mode at some point in time of data erasure from the erasure waiting area, the controller changes the operation mode to a third mode. The controller operating in the third mode erases un-erased data from the erasure waiting area and changes the operation mode from the third mode to the first mode.
US10509562B2	Wearable electronic device having a touch screen An electronic device includes a touch sensor that, by operating in a predetermined operation direction, inputs a predetermined instruction to the electronic device, and a frame-like member that is provided so as to surround the touch sensor. A predetermined first processing is carried out on a first region of the frame-like member corresponding to the predetermined operation direction, and second processing, which is different from the first processing, is carried out on a second region, which is a region of the frame-like member other than the first region.
US10509556B2	Display device A display device has an image shooting unit, a display unit, an operation portion, and a processing unit. The processing unit recognizes a particular segment included in a shot image. The processing unit makes the display unit display an added image indicating the particular segment in a form superimposed on the shot image. The processing unit changes the display as to the added image according to operations on the operation portion.
US10509555B2	Machine data analysis in an information technology environment Data values for various items are visualized in real-time or near real-time using radial-based techniques to produce data visualizations bearing some resemblance to, for example, pie charts, radial charts, etc. The data values are shown using indicators that encircle, or at least partially encircle, a central point. One or more characteristics of the indicator reflect the value that corresponds to the indicator. The characteristics may include, for instance, the color of the indicator and/or the distance of the indicator (or more specifically, a given point on the indicator) from the central point. The characteristics of the indicators change over time, in accordance with changes in the current values of the data items. A variety of indicators may be used, including, without limitation, points, icons, pie “wedges,” filled or partially-filled sectors of an ellipse or semi-circle, arcs or lines that span between the sides of such sectors, and so forth.
US10509554B2	Method for outputting target content and terminal therefor A method for outputting a target content and a terminal may include acquiring the target content and displaying a target content logo; determining corresponding output modes based on the target content, and displaying a preset area corresponding to each of the output modes. When it is detected that the target content logo is dragged to at least one of the preset areas, the method may include outputting the target content in the output mode corresponding to the preset area. Output modes may be displayed that support the target content selected by a user. The method can enable the user to rapidly select or switch the output mode, and facilitate user operations.
US10509551B2	Icon management method, apparatus, and terminal An icon management method, apparatus, and terminal, which relate to the field of electronic devices are provided. The method includes displaying a home screen, where the home screen includes at least one target icon with at least two non-overlapping function regions. The function regions correspond to different functions, and the functions are icon adjustment functions. The method also includes receiving a first user instruction, determining a target icon selected by the first user instruction and a target function selected by the first user instruction. The target function is a function corresponding to a function region of the target icon that is selected by the first user instruction. The method also includes executing the target function on the target icon selected by the first user instruction. The method may be implemented on a terminal.
US10509549B2	Interface scanning for disabled users Systems and processes for scanning a user interface are disclosed. One process can include scanning multiple elements within a user interface by highlighting the elements. The process can further include receiving a selection while one of the elements is highlighted and performing an action on the element that was highlighted when the selection was received. The action can include scanning the contents of the selected element or performing an action associated with the selected element. The process can be used to navigate an array of application icons, a menu of options, a standard desktop or laptop operating system interface, or the like. The process can also be used to perform gestures on a touch-sensitive device or mouse and track pad gestures (e.g., flick, tap, or freehand gestures).
US10509545B2	Browsing control system and browsing device A browsing control system includes a booklet that is acquired by binding a number of sheets, a specification unit that specifies a page number of a page opened in the booklet, and a controller that controls page turning of an electronic document depending on a difference between a page number specified by the specification unit before the page of the booklet is turned and a page number specified by the specification unit after the page thereof is turned.
US10509544B2	Schedule management apparatus A display control apparatus includes the following. A first display controller controls a display to display a schedule in which predetermined date information or time span information is corresponded with each of a plurality of schedule frames in a schedule template in which the plurality of schedule frames are provided in a predetermined format. A second display controller controls the display to display a predetermined operation button so that the first display controller displays a plurality of schedules in an aligned state. When the first display controller displays the plurality of schedules in the aligned state according to operation of the predetermined operation button, a portion of each schedule is displayed.
US10509541B2	System and method for generating geographical maps for initiating discovery of a computer network Generating a geographical map usable for initiating discovery of network subnets within a computer network can include receiving a hierarchy of geo-location identifiers corresponding to levels of geographical abstraction and network subnets having associated geo-location identifiers included in the hierarchy. Geo-location identifiers of the network subnets can be mapped to corresponding first levels according to the hierarchy. A graphical user interface can be generated to include a geographical map and user interface elements such that a selection of a geo-location identifier can be received using a user interface element. A set of network subnets associated with the selected geo-location identifier and at least one agent software instance usable for performing discovery against the set of network subnets can be determined to initiate discovery of the set.
US10509540B2	Method and device for displaying a message A method and a device for displaying a message are provided. The method includes: determining one or more screened messages; receiving a first instruction for triggering a display page to present one or more new messages, and determining one or more to-be-presented messages according to the first instruction; determining a first message of one or more to-be-presented messages as a target message, and deciding whether the target message is a screened message; and sliding the target message out of the display page if it is decided that the target message is a screened message. Accordingly, it can effectively screen contents a user is not interested in and save time for the user.
US10509538B2	Information processing apparatus having a photographing-enabled state An example information processing apparatus for selectively executing application programs includes a camera operable in a photographing-enabled state of the information processing apparatus; a touchscreen; and processing circuitry in communication with the camera and the touchscreen. The processing circuitry is configured to control the information processing apparatus to provide a selection screen allowing for input of a first selection for activating the photographing-enabled state of the information processing apparatus and of a second selection for proceeding to display of a main menu of the information processing apparatus. The main menu comprises scrollable touch images for launching respective application programs, and the processing circuitry controls the information processing apparatus to return to the display of the main menu after executing of a launched application program is terminated.
US10509533B2	Systems and methods of generating augmented reality (AR) objects Methods, systems, computer-readable media, and apparatuses for generating an Augmented Reality (AR) object are presented. The method may include capturing an image of one or more target objects, wherein the one or more target objects are positioned on a pre-defined background. The method may also include segmenting the image into one or more areas corresponding to the one or more target objects and one or more areas corresponding to the pre-defined background. The method may additionally include converting the one or more areas corresponding to the one or more target objects to a digital image. The method may further include generating one or more AR objects corresponding to the one or more target objects, based at least in part on the digital image.
US10509532B2	Progress bar with graphical effects to indicate download progress and connection state The disclosure provides method, apparatus and terminal for page refreshing. The method includes: outputting a preset animation interface within a displayed page when a page refreshing operation is performed, which is a longitudinal bar with a length substantially equal to a width of the displayed page and comprises a preset logo, moving cursors having a plurality of cursor seeds emitted from the preset logo and that move toward the refresh progress bar starting from the preset logo along the length of the longitudinal bar and a refresh progress bar, wherein the refresh progress bar and the preset logo are positioned apart from each other, and a length of the refresh progress bar increases towards the preset logo as the moving cursors arrive at the refresh progress bar; and reducing transparency of the moving cursor to a predetermined value when the length of the refresh progress bar no longer increases.
US10509531B2	Grouping and summarization of messages based on topics A computer-executed technique for grouping and summarizing messages in a graphical user interface (GUI) of a communication application includes received messages and determining a plurality of communication topics therein. The messages are clustered into groups based on the communication topics such that messages in each group relate to the same topic. The messages are displayed in the GUI in the determined groups. A user can select a group to ungroup and view the messages. The communication topics upon which the clustering is based may be specific to each user in the communication session.
US10509528B2	Mechanism for partial page refresh using URL addressable hierarchical page structure An apparatus, method, and system using techniques to partially refresh a display page. A navigation URL generated by an application in response to a user interaction is received, the navigation URL indicating a place within a page hierarchy at which a partial refresh of a page with which the navigation URL is associated is to be performed and the navigation URL including one or more URL portions usable to retrieve page content data to be used to partially refresh the page. The navigation URL is processed to determine the place within the page hierarchy at which the partial refresh is to be performed. The navigation URL is used to retrieve the page content data.
US10509527B2	Systems and methods for configuring event-based automation in cloud-based collaboration platforms Scalable architectures, systems, and services are provided herein for generating jobs by applying user-specified rules to events in an action log framework (ALF) stream is disclosed. More specifically, collaboration environments can include features or mechanisms that allow end-users or collaborators to perform a variety of actions such as, for example, file uploads and previews, or collaboration operations such as, for example, task assignment and comments. These actions can be captured or logged by an action log framework and, as described herein, automatically translated into one or more jobs by applying customizable user-specified rules.
US10509526B2	Three-dimensional touch control structure and display device Disclosed are a three-dimensional (3D) touch control structure and a display device. The three-dimensional (3D) touch control structure includes: a plurality of magnetic field generating components arranged into an array, and a plurality of electromagnetic inducting components in one-to-one correspondence and arranged in different layers to the magnetic field generating components; wherein a distance exists between the magnetic field generating components and the corresponding electromagnetic inducting components, and the magnetic field generating components are configured for generating magnetic fields and the electromagnetic inducting components are configured for changing in induced potential during touch control.
US10509524B2	Touch sensor film and touch panel A touch sensor film preventing moire occurring in accordance with deformation of a support is manufactured by performing roll transportation of an elongated transparent support 1 having a thickness smaller than 80 μm using a plurality of pass rollers 4, 5, and 6; performing annealing treatment with respect to the support 1 at a temperature which is equal to or lower than a temperature obtained by adding 35° C. to a dynamic glass transition temperature of the support 1; and forming a mesh pattern formed of thin metal wires 8a on a surface of the support 1 subjected to the annealing treatment.
US10509522B2	Capacitive touch switch To provide a capacitive touch switch capable of improving ununiformity of design and improving appearance relating to design or decorativeness. A capacitive touch switch 1 includes a glass substrate 2, a sensor portion formed at a side of an opposite surface opposite to a touch surface of the glass substrate. The sensor portion includes a center portion A of a wire attached portion 4 to a flexible printed circuit, and a connection portion C connected to the wire network B. In the connection portion C, an opening rate in a capacitive touch switch panel is increased by setting an electrode pattern width to be thinner from the wire attached portion A toward the wire network B.
US10509521B2	Input device and display device An input device includes a first substrate, a light-emitting element, and a third electrode unit. The first substrate has first and second surfaces. The light-emitting element unit includes: a first conductive electrode unit including first conductive layers; a second conductive electrode unit including second conductive layers each having a size overlapping with the first conductive layer in planar view; and luminescent layers conducted with at least a part of the first electrode unit, each provided between the first and second electrode units and conducted with the first conductive layer and the second conductive layer overlapping with the first conductive layer in planar view. The third electrode unit is insulated from the first conductive layers and detects a change in an electric field between the first conductive layers and the third electrode unit depending on coordinates of a proximity object at a position overlapping with the first surface in planar view.
US10509520B2	Touch panel A touch panel includes a first gate drive circuit, a first touch circuit, a second gate drive circuit, and a second touch circuit. The first touch circuit is connected to the first gate drive circuit and includes a first capacitor. The second touch circuit is connected to the second gate drive circuit and includes a second capacitor. The first capacitor and the second capacitor are connected in parallel.
US10509519B2	Electrostatic discharge circuit, display panel with electrostatic discharge circuit and electrostatic discharge method Embodiments of the present invention disclose a display panel comprising a circuit board, a driving chip and a touch panel. The display panel further comprises an electrostatic discharge circuit disposed between the circuit board and the touch panel. The electrostatic discharge circuit defines an electrostatic discharge path electrically connecting the circuit board with the touch panel, and a second path through the driving chip is provided between the circuit board and the touch panel, wherein the overall impedance of the electrostatic discharge path is smaller than the overall impedance of the second path. Also a display device including the display panel is disclosed.
US10509515B2	Touch input detection with shared receivers A touch input to a propagating medium is identified based on one or more of the following: (1) a determination that a third propagating signal (from a second transmitter to a first receiver) was interfered with while a first propagating signal (from a first transmitter to the first receiver) was not interfered with or (2) a determination that the second propagating signal (from a first transmitter to a second receiver) was interfered with while the fourth propagating signal (from the second transmitter to the second receiver) was not interfered with. In response to the touch input to the propagating medium being identified, a system which includes the first transmitter, the second transmitter, the first receiver, and the second receiver updates.
US10509513B2	Systems and methods for user input device tracking in a spatial operating environment Systems and methods for tracking using a tracking camera. For each frame of image data generated by the tracking camera, each blob of the frame is determined. For each determined blob, a 2D image coordinate of a centroid of the blob is determined in a coordinate space of the frame. A tracking system processor generates a first tag identifier from the determined 2D image coordinates. The tracking system processor uses the first tag identifier to access stored first tag information that is stored in association with the first tag identifier. The tracking system processor determines an absolute 3-space position and orientation of the tracking camera by performing a motion tracking process using the determined 2D image coordinates and the accessed first tag information.
US10509511B2	Mobile terminal performing a different operation based on a type of a tap applied to a display and control method thereof A mobile terminal including a display; a touch sensor overlapped with the display and configured to detect a touch input; and a controller configured to detect a first tap input applied on the touch sensor in state of a deactivated display and the touch sensor being periodically driven with a second period; determine a region of the display that corresponds to the first tap input; detect a second tap input applied on the touch sensor in state of the deactivated display within a predefined time period from the first tap input; determine if the second tap input is applied within the region; if the second tap input is applied within the region and within the predefined time period from the first tap input, activate the display and periodically drive the touch sensor with a first period shorter than the second period; and if the second tap input is applied to a spot outside the region, maintain the deactivation of the display and periodically drive the touch sensor with the second period.
US10509500B2	Touch display apparatus A touch display apparatus including a first substrate, a first sub-pixel, a spacer, a second substrate, and a touch-sensing electrode is provided. The first sub-pixel is disposed on the first substrate. The spacer is disposed on the first substrate. The touch-sensing electrode is disposed on the second substrate and has a first opening. The spacer is located inside the first opening in an orthogonal projection direction. A distance D is defined between an outline of an orthogonal projection of the spacer on the first substrate and an outline of an orthogonal projection of the first opening on the first substrate, and D≥5 μm.
US10509489B2	Systems and related methods for facilitating pen input in a virtual reality environment A system and a related method for facilitating pen input in a virtual reality environment are provided. The system includes an external camera, a pad, a stylus pen, and a VR HMD. The pad includes a transparent touch part, a pad tracking part, a touch part frame, and a plurality of light sources disposed on an outside surface of the pad tracking part. The touch part frame is coupled with an outer border area of the transparent touch part and coupled to a portion of the pad tracking part. The stylus pen includes a stylus grip, a stylus tip detachably mounted to the stylus grip, a stylus tracking part coupled to the stylus grip, and a plurality of light sources disposed on an outside surface of the stylus tracking part. The plurality of light sources is configured to emit light that can be detected by the external camera.
US10509482B1	Keyboard device A keyboard device includes a base plate with a base plate with a connecting bracket, a wing-type connecting element and a keycap. A first connecting shaft of the wing-type connecting element is inserted into the connecting bracket, so that the wing-type connecting element is connected with the base plate. While the keycap is depressed, the first connecting shaft is inserted into a first receiving space of the connecting shaft and used as a swinging fulcrum. Since the vertical movement of the wing-type connecting element is restricted by the first receiving space, the swinging range of the wing-type connecting element is reduced. Consequently, the keyboard device of the present invention is capable of improving the depressing stability of the keycap.
US10509481B2	Key inputting apparatus A key inputting apparatus includes: a substrate provided with a switch; a key having a depression surface and a back surface on an opposite side to the depression surface, and a contacting section projecting from the back surface in a first direction from the depression surface toward the back surface; a panel having an opening in which the key is arranged; a first plate arranged between the substrate and the key in the opening of the panel; a second plate supported by the first plate between the key and the first plate; and a third plate arranged between the first plate and the substrate. The first to third plates are formed with first to third through portions, respectively, through each of which the contacting section is passable. The second plate is formed with a leaf spring section urging the key in a second direction opposite to the first direction.
US10509474B2	Systems and methods for shape input and output for a haptically-enabled deformable surface One illustrative computing device disclosed herein includes a first sensor configured to detect a position associated with a deformable surface and transmit a sensor signal associated with the position; and a processor in communication with the sensor, the processor configured to: receive the sensor signal; determine a haptic effect based at least in part on the sensor signal; and transmit a haptic signal associated with the haptic effect. The illustrative computing device also includes a haptic output device in communication with the processor, the haptic output device configured to receive the haptic signal and output the haptic effect.
US10509472B2	Methods and apparatuses for endstop diminishment solutions in haptically-enabled controller devices A haptically-enabled controller device comprising a controller body, a user input element, a haptic actuator, and a transmission component is presented. The user input element has a range of motion that extends from a first position to an end stop position. The haptic actuator is configured to output a force or torque. The transmission component comprises an arm connected to the haptic actuator and to the user input element. The arm is configured to transfer the force or torque from the haptic actuator to the user input element with a first multiplication factor when the user input element is at the first position, and to transfer the force or torque from the haptic actuator to the user input element with a second multiplication factor when the user input element is at the end stop position. The second multiplication factor is higher than the first multiplication factor.
US10509471B2	Device and method for haptic feedback for automotive vehicle A control device for an automotive vehicle has a touch surface with a plate bearing a contact sensor that detects contact of a finger of a user, a haptic feedback module that vibrates the touch surface, which includes actuators positioned below the touch surface and linked to the plate of the touch surface, and a driver unit configured to drive the haptic feedback module to generate haptic feedback in response to a press on the touch surface. The haptic feedback is composed of a vibratory signal produced by control signals including one or more succession of pulses sent to the actuators, wherein each of the plurality of control signals generates one individual haptic pattern, a repetition of at least two identical individual haptic patterns, generated successively, and a period with no haptic feedback between two successive individual haptic patterns. A method of control of such a device is also disclosed.
US10509469B2	Devices for controlling computers based on motions and positions of hands Disclosed herein is a data input device and method of operating the same. In one embodiment, a data input device comprises a plurality of inertial sensor units, one or more touch input devices, a microcontroller configured to collect sensor data from the inertial sensors and the one or more touch input devices and process the sensor data to generate processed sensor data, and a wireless transceiver configured to transmit the processed sensor data to a host computer. In another embodiment, a method comprises receiving sensor data from a handheld device; calculating hand movement characteristics in three dimensional space based on the sensor data; calculating the position and orientation of the components of the handheld device; identifying positions and movements of one or more fingers of a user manipulating the handheld device; identifying a gesture from the positions and movements of one or more fingers of a user manipulating the handheld device; identifying a recognized gesture corresponding to the identified gesture; and dispatching an event notifying the gesture to an application.
US10509466B1	Headwear with computer and optical element for use therewith and systems utilizing same An apparatus for mounting on a head including a frame, A face-wearable near-ocular optics and a micro-display for displaying data in front of the eyes is provided. A computing device is coupled to the micro-display. At least one sensor is coupled to the computing device for receiving biometric human information.
US10509464B2	Tracking torso leaning to generate inputs for computer systems A system including a plurality sensor modules, each having an inertial measurement unit and attached to a portion of a user (e.g., upper arm, hand, and/or head) to measure the current orientation of the corresponding portion of the user. A computing device coupled to the sensor modules is configured to identify a type of the current pose of the user, compute a front facing direction of the torso of the user from the sensor measurements, select a torso leaning model based on the pose type, project onto a vertical plane the lengthwise directions of the arms of the user as tracked by the sensor modules attached to the upper arms of the user, and calculate a torso leaning angle from the projected lengthwise directions of the arms.
US10509462B2	Method and system for identifying feature of object A method and system for identifying a feature of an object based on an AR device is provided. The AR device is capable of superimposing a virtual reality scene on a real reality scene. The method includes: an identification obtaining step of obtaining identification information corresponding to an object to be inspected; a tag selecting step of checking the object and using the AR device to select at least one tag based on a visual feature of the object; and a tag associating step of using the AR device to associate the at least one selected tag with the identification information of the object.
US10509460B2	Transparent display apparatus and method thereof A transparent display apparatus is provided. The transparent display apparatus includes a transparent display which displays information, a sensor which senses background information in a first direction, and a controller configured to modify a display state of the displayed information on the transparent display based on the sensed background information.
US10509458B2	Information device with improved operating modes An information processing device suppresses the entering of a state unintended by a user in a standby mode. The information processing device, which has a standby mode and a normal operation mode, has a mode control portion changing the mode to the standby mode of bringing the state into a first low power consumption state and configured to be switched to a first operating state in which background processing is executed in response to a stop of a display of a display portion, and a power setting processing portion configured to set a first upper limit power consumption in the first operating state and a second upper limit power consumption in a second operating state in the normal operation mode, and set the first upper limit power consumption so as to be lower than the second upper limit power consumption when the mode control portion changes the mode to the standby mode.
US10509456B2	Server rack power management A method for power management by a rack management controller (RMC) of a server rack includes collecting power consumption data from a first baseboard management controller (BMC) of a first server in the server rack and sending the power consumption data to a management server. The RMC receives power requirements from the management server and determines a power setting based on the power consumption data and the power requirements. The RMC requests the first BMC to limit power consumption of the first server according to the power setting.
US10509436B2	Display panel and display device A display panel is provided. The display panel includes a display area including four sides and four corners, and all of the corners are not right angles; and a border area surrounding the display area, wherein four fold lines respectively parallel to the four sides are arranged in the border area, the four fold lines enclose a fold frame, the fold frame divides the border area into a first border area and a second border area, the second border area includes four borders and a turning portion connecting every two of the four borders, and the turning portions makes the four borders be independently folded along the fold frame. The display panel of the disclosure adopts a special display area design and a special border area wiring method to ensure the reliability of the thin film encapsulation and achieve the ultra-narrow border or even borderless border of the flexible display.
US10509434B1	Oscillator profiling for time synchronization The amount of drift in an oscillator, as a function of temperature, can be profiled by adjusting the temperature and monitoring the corresponding change in frequency of the oscillator. Temperature sensors on a computing device can provide the temperature readings for the profiling, as well as readings during operation. A system clock on the computing device can be synchronized with a reliable external clock at a regular interval, such as every fifteen minutes. Between those synchronizations, the temperature values provided by the temperature sensors can be determined and the corresponding oscillator drift determined according to the oscillator profile. The drift value can be used to adjust the output of the system clock to account for variations that may become present between the synchronization times. Effects of factors such as voltage and humidity can also be profiled to provide a more accurate timing signal.
US10509430B2	Reference circuits The embodiments of the present disclosure disclose a reference circuit, comprising a current control sub-circuit, a voltage control sub-circuit and a voltage adjustment sub-circuit, wherein the current control sub-circuit outputs current to a first terminal and a second terminal of the voltage control sub-circuit and a first terminal of the voltage adjustment sub-circuit at a ratio of 1:1:n respectively, and the first terminal and the second terminal of the voltage control sub-circuit may cause a voltage at a second terminal of the voltage adjustment sub-circuit to be equal to a voltage at a third terminal of the voltage adjustment sub-circuit upon receiving equal current output by the current control sub-circuit, and the voltage adjustment sub-circuit may adjust a voltage output at an output terminal of the reference circuit to be independent of a temperature when the voltage at the second terminal is equal to the voltage at the third terminal.
US10509424B2	Switch device Disclosed is a switch device that includes or is formed by a switchgear. Two sensors of the switchgear monitor two measured values and a switch of the switchgear is switched depending on these measured values. The adjustable thresholds for the measured values are displayed on a digital display integrated in the switchgear or arranged on an external input device. Both thresholds are adjusted digitally via the input device. The input device can be a commercially available smartphone with an app or a laptop.
US10509419B2	Computer controlled furniture and method A re-configurable item of furniture is provided, and includes at least a first reconfigurable portion having in turn a plurality of deformable cells, each having electrically operated valves to control a gas inflow to the respective cells from a gas inflow source, and a gas outflow from the respective cells, to thereby modify the pressure within respective cells. The gas inflow source includes a high-pressure reservoir cell among the plurality of deformable cells. The item of furniture also includes a control unit arranged to transmit control signals to a plurality of the electrically operated valves, including a valve of the high-pressure reservoir cell, to modify the pressure within a plurality of the cells in a coordinated manner selected to generate a new configuration of support for a user of the furniture.
US10509408B2	Drive planning device, travel assistance apparatus, and drive planning method A drive planning processor plans a driving operation plan for a subject vehicle traveling on a route. The drive planning processor determines an action for each of a plurality of events which the subject vehicle encounters in a time-series manner when traveling on a first route and plans a series of driving operation plan for a scene which the subject vehicle encounters using content of each action determined for each of the plurality of events.
US10509403B2	Movable smart fire extinguishing device A fire extinguishing device is configured to, in response to a location signal from a fire detector: move to a first reference location; detect a fire and generate a thermal image, and calculate a target direction based on a line of sight and the thermal image; rotate such that the line of sight is aligned with the target direction, and detect the fire and generate a first reference image; move in the target direction to a second reference location, and detect the fire and generate a second reference image; calculate a distance to fire and a height of the fire; move to a location within a predetermined range from the fire, move a tube to a spraying position based on the height of the fire, and discharge an extinguishing agent.
US10509398B2	Manufacturing management apparatus using inspection information and trace information, and manufacturing system A manufacturing management apparatus includes an operation information acquisition unit, a trace information acquisition unit, a storage unit, a manufacturing device determination unit, and a transfer destination indication unit. The storage unit stores inspection information on each article in association with the trace information. The manufacturing device determination unit creates combinations of the manufacturing devices that can perform manufacturing processes in consideration of operation information and trace information, determines a quality index from the inspection information for each of the created combinations, and determines, based on the quality index determined for each of the combinations, a combination of the manufacturing devices to be used. A transfer destination indication unit indicates a transfer destination of a part to a transfer device based on the determined combination of the manufacturing devices.
US10509391B2	Machine tool collision avoidance method and system using the same A machine tool collision avoidance method includes: loading multiple processing codes; simulating multiple path traces corresponding to the processing codes; estimating multiple execution periods for running the path traces; selecting the shortest execution period from the execution periods; determines whether the distance between the trace point points on any two of the path traces is less than a safety distance within the shortest execution period; if the distance between a first trace point on a first path trace and a second trace point on a second path trace is less than the safety distance, estimating a first time point at which a first turret runs to the first trace point and a second time point at which the second turret runs to the second trace point; generating a collision warning if the difference between the first time point and the second time point is lower than a tolerance value.
US10509390B2	Safety and reliability guarantees for laser fabrication Sensor data generated by a sensor of a computer numerically controlled machine can be compared with a forecast. The forecast can include expected sensor data for the sensor, over a course of an execution plan for making a cut with a movable laser cutting head. The sensor data can be generated during execution of the execution plan. During execution of the execution plan, the sensor data can be monitored and a deviation of from the forecast can be detected. It can be determined, based on the detecting, that an anomalous condition of the computer numerically controlled machine has occurred. Based on the determining, an action can be performed.
US10509388B2	Reshaping of deformed components for assembly There is described a method and system for reshaping a component for assembly that may have been deformed pre-assembly and post-fabrication. As-fabricated measurements are used to determine a baseline for the component and as-mounted measurements are used to determine a deformation parameter as a function of the baseline. The component may be reshaped using correction displacements applied to a positioning device of an assembly tool to which the component is mounted for assembly.
US10509387B2	Control device for machine tool performing oscillation cutting A control device includes a command block timing detection unit for detecting arbitrary timing between adjacent command blocks, based on a machining program, which includes a plurality of command blocks, of a machine tool. A feed axis control unit includes a learning controller, and a determination unit that determines whether or not a current time is in the arbitrary timing between the adjacent command blocks, and stops oscillation of at least one feed axis based on the determination.
US10509378B2	Systems and methods for soil modeling and automatic irrigation control Systems and methods for automatic irrigation for a micro-climate areas and subterranean soil modeling are provided herein. Some methods include receiving collection of micro-climate data having weather data from a weather station that is proximate a target area, canopy imaging for the target area, depth-specific soil data for the target area, plant health data that includes stomatal conductance and evapotranspiration for plants in the target area, and selectively adjusting operation of an irrigation system so as to increase or decrease water applied to the target area based on analysis of the micro-climate data.
US10509377B2	System for monitoring and controlling indoor air quality An air quality monitoring and management system adapted to be mounted between an existing thermostat and a wall in which the thermostat was previously mounted, or directly at the HVAC system. The air quality monitoring and management system contains various wires for connecting to both a thermostat and HVAC system, thereby effectively intercepting the signal between the thermostat and HVAC system. The air quality monitoring and management system includes air quality measuring sensors, a housing for mounting between the wall and thermostat, and a controller that supplies electrical signals to the HVAC system through use of the aforementioned wires to supplement the control of the HVAC fan in conjunction with the thermostat to help increase air flow in the affected area. The air quality monitoring and management system may include an air quality management controller mounted to an HVAC air handling unit, and wirelessly connected to sensors.
US10509376B2	Method for controlling a process A method for controlling a process, comprising treatment of a process medium, and which includes a system input, in particular, an inlet, and a system output, in particular, an outlet for the process includes such a dead time profile that a change in at least one parameter of the first type of the process medium at the system input causes a change in at least one parameter of the second type of the process medium at the system output only after an elapse of a dead time, comprises: determining, in particular, digital values for the parameter of the first type and using these values as input values of a control system; determining the set values for an output variable influencing the parameter of the second type of the process medium at the system output, using the determined values of the parameter of a first type and a first proportionality factor recorded in the control system; applying the determined set values for adjusting the output variable using the control system; determining, in particular, digital values for the parameters of the second type; determining the deviation values, which are representative of a deviation of the parameter of the second type from the parameter of the first type, from the determined values of the parameter of the first type and the determined values of the parameter of the second type; and use of at least one of the deviation values and at least one of the set values to determine a second proportionality factor.
US10509375B2	Control device with constant cycle for a plurality of networks In a control device which outputs control instructions at a constant cycle to each of a plurality of networks for executing a predetermined process according to the control instructions, a time (a required time) from when the control instruction is output to each of the plurality of networks until the predetermined process is executed is acquired for each of the plurality of networks. Among the plurality of required times, a difference (a shift time) between a short required time (required time of mounting head) and a long required time (required time of moving device) is calculated. When the shift time has elapsed after outputting the control instruction to the network of the moving device, the control instruction is output to the network of the mounting head.
US10509373B2	Cyber synchronous machine (cybersync machine) This invention discloses a controller and method for a cyber synchronous machine (CSM, in short, cybersync machine), namely, a power electronic converter that is seamlessly equipped with computational algorithms (i.e., the controller) to represent the intrinsic and fundamental principles of physical synchronous machines. The CSM can be operated in the grid-connected mode or the islanded mode to take part in the regulation of the frequency and the voltage. The controller also includes auxiliary blocks to achieve self-synchronization without measuring or estimating the grid frequency and the regulation of real power and reactive power to the given reference values without static errors. The control signal for the power electronic converter can be the output voltage generated by the engendering block or the sum of the output voltage and the virtual current. A unique feature of the disclosed CSM is that, if the system it is connected to is passive, then the whole system is passive and, hence, is guaranteed to be stable.
US10509371B2	Information notification method, information notification device, and non-transitory recording medium A smartphone includes a receiver, a log acquirer, a determiner, an information notifier, and a display. The receiver is in wireless communication with a time display device. The log acquirer acquires log data from the time display device by the receiver. The determiner determines the usage status of the time display device on the basis of the log data acquired by the log acquirer. The information notifier provides, via the display, notification of information corresponding to the usage status determined by the determiner.
US10509366B2	Protective shroud for a dive watch A protective shroud for a dive watch having a transparent lenticular element configured to enlarge an image appearing on a dial of the dive watch. The shroud can include a rib that distances the lenticular element from the dial, and a flange that extends around the lenticular element and includes two slots for fixing a strap of the dive watch. The shroud can be made of a single piece of elastic material.
US10509357B2	Image forming apparatus At the time of an end of an image forming job (YES of S1), a controller causes a blade and a developing roller to be separated from a photosensitive drum (S2). At that time, the controller controls separation timing of the belt and the developing roller so that the developing roller is separated from the photosensitive drum before a surface position of the photosensitive drum contacted to the developing roller at a contact position at the time of a start of separation of the blade from the photosensitive drum reaches a developing position with the separation of the blade. According to this, even when a liquid accumulation reaches the developing position depending on the separation of the blade, the developing roller has already been separated from the photosensitive drum before the liquid accumulation reaches the developing position and therefore, the liquid accumulation is not collected by the developing roller. When the liquid accumulation is not collected by the developing roller, color mixture due to the liquid accumulation does not occur.
US10509356B2	Image forming apparatus An image forming apparatus includes an image forming portion, a fixing portion, a reversing portion, a re-feeding path, a detecting portion, a first feeding path, a second feeding path, an air flow generating portion, and a flow path forming portion. The flow path forming portion forms a flow path along which air flow is passed through between a recording material passing through the second feeding path and a constituent portion constituting the second feeding path on a side toward the detecting portion and guides the recording material passing through the second feeding path, when the recording material passes through the second feeding path.
US10509355B2	Image forming apparatus An image forming apparatus includes a photosensitive member; a charging member configured to electrically charge the photosensitive member; a developing device configured to form a toner image by supplying toner to the photosensitive member; a transfer member configured to transfer the toner image from the photosensitive member onto a toner image receiving member; a cleaning member provided in contact with the photosensitive member and configured to remove the toner remaining on a surface of the photosensitive member after transfer; and a controller configured to carry out a process for notifying information on a lifetime of the charging member, on the basis of use amount information on a use amount of the charging member and contact pressure information on contact pressure applied by the cleaning member to the photosensitive member.
US10509352B2	Image forming system, image forming apparatus, and recording medium configured to image belongings of a user and assist the user When an image forming apparatus such as an MFP runs out of supplies, such as paper or toner, the user will need to load paper in the paper tray or replace the toner cartridge. However, the user occasionally has difficulty in opening the paper tray or the front cover because his/her hands are carrying the additional supplies. For example, the user may have to put the belonging down to open up the paper tray or the front cover. The image forming apparatus reacts to the user's desire in a mechanical manner by opening the paper tray or the front cover.
US10509349B2	Fixing device and image forming apparatus A fixing device includes a first fixing section, a second fixing section, the first fixing section and the second fixing section forming a fixing nip therebetween, a nip width adjusting section capable of adjusting a nip width of the fixing nip, a rotation speed detecting section that detects a rotation speed of the second fixing section, and a hardware processor that controls the nip width adjusting section to make the nip width equal to a predetermined reference nip width.
US10509336B2	Optical assembly having a thermally conductive component An optical assembly includes: an optical element, which is transmissive or reflective to radiation at a used wavelength and has an optically used region; and a thermally conductive component, which is arranged outside the optically used region of the optical element. The thermally conductive component can include a material having a thermal conductivity of more than 500 W m−1 K−1. Additionally or alternatively, the product of the thickness of the thermally conductive component in millimeters and the thermal conductivity of the material of the thermally conductive component is at least 1 W mm m−1 K−1.
US10509334B2	Methods and apparatus for removing contamination from lithographic tool Embodiments described herein provide a method for cleaning contamination from sensors in a lithography tool without requiring recalibrating the lithography tool. More particularly, embodiments described herein teach cleaning the sensors using hydrogen radicals for a short period while the performance drifting is still above the drift tolerance. After a cleaning process described herein, the lithography tool can resume production without recalibration.
US10509327B1	Variable neutral density filter for multi-beam interference lithography exposure A system comprises a variable neutral density (ND) filter that has a first surface and a second surface that is opposite the first surface. The second surface is closer to an exposure region of a photosensitive film layer than the first surface. The photosensitive film layer is disposed on a surface of a substrate layer, and the variable ND filter has an attenuation profile that modulates transmittance of light passing through the variable ND filter to the exposure region. The system also includes one or more laser generators, each generating a coherent beam of light. The plurality of laser generators are arranged such that at least two of the generated coherent beams of light intersect with each other and form an intermediate interference exposure pattern that is modulated by the variable ND filter to form a target interference exposure pattern at the exposure region of the photosensitive film layer.
US10509325B2	Position measurement of optical elements in a lithographic apparatus A lithographic apparatus includes a projection system which includes a plurality of optical elements configured to project a beam of radiation onto a radiation sensitive substrate. The lithographic apparatus also includes a metrology frame structure which includes a part of one or more optical element measurement systems to measure the position and/or orientation of at least one of the optical elements. The plurality of optical elements, a patterning device stage, and a substrate stage are arranged such that, in a two dimensional view on the projection system, a rectangle is defined such that it envelops the plurality of optical elements, the patterning device stage, and the substrate stage. The rectangle is as small as possible. The metrology frame structure is positioned within the rectangle.
US10509321B2	Temperature controlling apparatus and method for forming coating layer A temperature controlling apparatus includes a platen, a fluid source, a chiller, a first conduit and a second conduit. The fluid source supplies a fluid. The chiller is coupled to the fluid source to cool the fluid in the fluid source to a cooling temperature. The first conduit includes a first inlet in communication with the fluid source, a first outlet and a first heater that heats the fluid from the cooling temperature to a first heating temperature. The fluid heated by the first heater is dispensed on the platen through the first outlet. The second conduit includes a second inlet in communication with the fluid source, a second outlet and a second heater that heats the fluid from the cooling temperature to a second heating temperature different from the first heating temperature. The fluid heated by the second heater is dispensed on the platen through the second outlet.
US10509318B2	Chemically amplified positive-type photosensitive resin composition, method for manufacturing substrate with template, and method for manufacturing plated article A chemically amplified positive-type photosensitive resin composition capable of suppressing the occurrence of “footing” in which the width of the bottom (the side proximate to the surface of a support) becomes narrower than that of the top (the side proximate to the surface of a resist layer) in a nonresist section and the occurrence of development residue, when a resist pattern serving as a template for a plated article is formed on a metal surface of a substrate using the composition; a method for manufacturing a substrate with a template using the composition; and a method for manufacturing a plated article using the substrate with the template. A mercapto compound having a specific structure is contained in the composition including an acid generator that generates an acid when irradiated with an active ray or radiation and a resin whose solubility in alkali increases under the action of acid.
US10509316B2	Polysulfonamide redistribution compositions and methods of their use The invention relates to polysulfonamide compositions for use as redistribution layers as used in the manufacture of semiconductors and semiconductor packages. More specifically it relates to photoimageable polysulfonamide composition for redistribution applications. The invention also relates to the use of the compositions in semiconductor manufacture.
US10509313B2	Imprint resist with fluorinated photoinitiator and substrate pretreatment for reducing fill time in nanoimprint lithography A nanoimprint lithography method includes disposing a pretreatment composition including a polymerizable component on a substrate to form a pretreatment coating. Discrete imprint resist portions are disposed on the pretreatment coating, with each discrete portion of the imprint resist covering a target area of the substrate. The imprint resist is a polymerizable composition and includes a fluorinated photoinitiator. A composite polymerizable coating is formed on the substrate as each discrete portion of the imprint resist spreads beyond its target area. The composite polymerizable coating includes a mixture of the pretreatment composition and the imprint resist. The composite polymerizable coating is contacted with a template, and is polymerized to yield a composite polymeric layer on the substrate. The interfacial surface energy between the pretreatment composition and air exceeds the interfacial surface energy between the imprint resist and air or between at least a component of the imprint resist and air.
US10509312B2	Approach for ultra thin-film transfer and handling A method for forming a pellicle apparatus involves forming a device substrate by depositing one or more pellicle layers defined over a base device layer, where a release layer is formed thereover. An adhesive layer is formed over a transparent carrier substrate. The adhesive layer is bonded to the release layer, defining a composite substrate comprised of the device and carrier substrates. The base device layer is removed from the composite structure and a pellicle frame is attached to an outermost one of the pellicle layers. A pellicle region is isolated from a remainder of the composite structure, and an ablation of the release layer is performed through the transparent carrier substrate, defining the pellicle apparatus comprising a pellicle film attached to the pellicle frame. The pellicle apparatus is then from a remaining portion of the composite substrate.
US10509311B1	Apparatus and method for generating an electromagnetic radiation A method for generating an electromagnetic radiation includes the following operations. A target material is introduced in a chamber. A light beam is irradiated on the target material in the chamber to generate plasma and an electromagnetic radiation. The electromagnetic radiation is collected with an optical device. A gas mixture is introduced in the chamber. The gas mixture includes a first buffer gas reactive to the target material, and a second buffer gas to slow down debris of the target material and/or plasma by-product, so as to increase an reaction efficiency of the target material and the first buffer gas, and to reduce deposition of the debris of the target material and/or the plasma by-product on the optical device.
US10509310B2	Patterning devices for use within a lithographic apparatus, methods of making and using such patterning devices A patterning device carries a pattern of features to be transferred onto a substrate using a lithographic apparatus. The patterning device is free of light absorber material, at least in an area. The pattern of features in the area may include a dense array of lines, trenches, dots or holes. Individual lines, holes, etc. are defined in at least one direction by pairs of edges between regions of different phase in the patterning device. A distance between the pair of edges in the at least one direction is at least 15% smaller than a size of the individual feature to be formed on the substrate once adjusted by a magnification factor, if any, of the lithographic apparatus. The patterning device may be adapted for use in EUV lithography. The patterning device may be adapted for use in a negative tone resist and development process.
US10509306B1	Monolithic LCD projector A monolithic liquid crystal display (LCD) projector includes a light emitting diode (LED) light source, a condenser, a collimating lens, an LCD light valve, a field lens and a projection lens. The LCD light valve is disposed between the collimating lens and the field lens. The condenser is disposed between the LED light source and the collimating lens. The projection lens is disposed behind the field lens. A first reflector is disposed between the field lens and the projection lens. The first reflector conducts mirror reflection along a long axis thereof. The present disclosure has the characteristics of small volume, novel shape, good color uniformity of the image, good radiating performance and long service life.
US10509304B2	LED projection light has features An AC or DC powered LED or-and laser projection light may have more than one function, which may include conventional all-purpose light device has built-in or add projection functions using existing light device's its-own light housing with project-kits or project-assembly has built-in light sources to project a light beam, image, or digital-data from display-unit. The said project light is a desk top light, floor light, garden light, emergency light, night light, motion sensor light, power fail light, seasonal light, Christmas light and/or ornament, licensee products, cartoon character related products, blue tooth light, moving and or multi-function light; with rechargeable or non-rechargeable energy storage kits having preferred circuit, switch, sensor, timer, IC electric parts, and accessories. The said LED and display-unit is within non-leakage light-beam assembly and project-lens is install on (1) opening of LED light highest housing-body or (2) above the inner non-leakage light-beam assembly which formed by desired combination of tube, tray, holder, housing-parts has wall to surround the LED and display-unit.
US10509301B2	Systems, methods, and devices for usability testing According to principles of the embodiments as disclosed herein, a device for monitoring the use of a handheld device is provided which allows for increased accuracy and ease of monitoring the use of handheld devices during usability testing. The device includes a handheld device mount configured to be releasably coupleable to a handheld device. The handheld device mount includes a cavity and a base and opposing first and second sides and first and second sidewalls extending from the base at the sides of the base. The mast has a first and second end. The first end of the mast is coupled to and extends from a third side of the cavity. A camera mount is located at the second end of the mast and configured to receive a camera.
US10509296B2	Compact liquid crystal beam steering devices including multiple polarization gratings Systems, methods, and apparatus are disclosed for attenuating an incident polarized light beam using a plurality of Liquid Crystal Polarization Gratings (“LCPGs”) and one or more switchable liquid crystal layers. When four LCPGs are used, a spacing between first and second LCPGs can be equal to a spacing between third and fourth LCPGs. Pi and FCL cells can also be used in place of more traditional LC switches. Switching of the LC switch can be imparted via an AC bias.
US10509294B2	Dual sided electrophoretic display An image display medium includes a first and second layer of encapsulated dispersion fluid containing charged particles and a front and rear light-transmissive electrode. The first layer is positioned between the front light-transmissive electrode and the second layer and the second layer is position between the first layer and the rear light-transmissive electrode. The charged particles within the first layer have a color similar to and a charge opposite of the charged particles within the second layer. Alternatively, the charged particles within the first layer may have a color and a charge similar to the charged particles within the second layer and the display medium includes a common conductor positioned between the first and second layer that is configured to drive the charged particles in the first and second layer.
US10509292B1	Manufacturing methods for a transparent conductive oxide on a flexible substrate An electrochromic device is provided. The device includes a substrate and an electrochromic stack on the substrate. The stack includes a first set of bus bars, a first transparent conductive layer, at least one electrochromic layer, a second transparent conductive layer, and a second set of bus bars, wherein at least one of the first transparent conductive layer or the second transparent conductive layer includes resistivity that varies by horizontal location according to a resistivity profile. In some embodiments the resistivity profile has a vertical component that may or may not be in addition to the horizontal component. Various embodiments of these materials can be tuned as to profiles of vertical resistance and horizontal sheet resistance.
US10509290B2	Electrochromic apparatus and method for manufacturing electrochromic apparatus An electrochromic apparatus includes a first substrate, a first electrode layer, an electrochromic layer, an electrolyte layer, a second substrate, a second electrode layer, a first extraction electrode layer, a second extraction electrode layer, and a partition wall. The first extraction electrode layer contacts the first electrode layer and is isolated from the second electrode layer and the electrochromic layer. The second extraction electrode layer contacts the second electrode layer and is isolated from the first electrode layer and the electrolyte layer. The partition wall is electrically insulative and sandwiched between the first extraction electrode layer and the electrolyte layer and between the second extraction electrode layer and the electrolyte layer.
US10509281B2	Display panel and display device A display panel and a display device are disclosed, the display panel includes an opposed substrate and an array substrate opposite to each other, and a flexible printed circuit. The opposed substrate includes a conductive layer, which is configured for electrostatic prevention, the flexible printed circuit includes a first conductive structure connected to the conductive layer, and the conductive layer is grounded through the first conductive structure.
US10509279B2	Thin film transistor, TFT substrate, and display panel having source eletrodes and gate electrodes comprising U-shape structures A thin film transistor, a TFT substrate, and a display panel are provided. The TFT includes a gate, a source, and a drain. The source is a first bending structure. The drain is a second bending structure. The gate is a third bending structure. The first bending structure of the source and the second bending structure of the drain are arranged opposite. The third bending structure of the gate is arranged between the first bending structure of the source and the second bending structure of the drain. The present disclosure facilitates fabrication of a narrow bezel of a display panel.
US10509274B2	Blue phase liquid crystal display panel and liquid crystal display device A blue phase liquid crystal display panel and a liquid crystal display device are disclosed, including a first and a second substrates disposed at an interval and parallel. Blue phase liquid crystal is disposed between the first and second substrates. The first substrate includes a first base. The second substrate includes a second base. The blue phase liquid crystal display panel includes a transmissive display region having multiple first base platforms, multiple first electrodes, each of which is disposed on each of the first base platform, and second electrodes disposed on the first base and the second base. A reflective display region has fourth electrodes only disposed on the second base. The first substrate is provided with a reflective layer corresponding to the reflective display region. When light passes through the transmissive display region and the reflective display region, phase delays of the light in the two regions are identical.
US10509266B2	Photo alignment bench, photoalignment device and control method thereof A photo alignment bench, a photo alignment device and a control method thereof. Specifically, the photo alignment bench may include: a platform for supporting a substrate to be aligned; a plurality of photosensitive resistors arranged on a side of the platform for supporting the substrate to be aligned; and a signal transmitter and a signal receiver. The signal transmitter and the signal receiver are electrically connected with two ends of each photosensitive resistor respectively, wherein the signal transmitter is adapted for transmitting an initial electric signal to the photosensitive resistors, and the signal receiver is adapted for receiving an electric signal output from the photosensitive resistors.

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