Document Document Title
US10212274B2 Systems and methodologies for controlling an electronic device within a vehicle
A system and method for controlling an electronic device, the method including identifying, by processing circuitry of a controller, at least one electronic device located within a vehicle, the processing circuitry including a first register configured to store at least a factors vector characterizing the vehicle and a user of the at least one electronic device, determining, by the processing circuitry of the controller, an operating status of the vehicle, updating, by the processing circuitry of the controller, one or more values of the factors vector based on the operating status of the vehicle, identifying, by the processing circuitry of the controller, one or more functions of the at least one electronic device based on the factors vector, and controlling the identified one or more functions of the at least one electronic device.
US10212271B1 Device management system
Systems and methods of device management are disclosed. Aspects relate to systems and methods that may be implemented to control usage of one or more devices. In one embodiment, a device management system includes a memory, an interface, at least one processor coupled to the memory and the interface, and a control component executable by the at least one processor and configured to determine, at a predetermined time, whether a connection exists between a managed device and the device management system via the interface, generate, in response to determining that the connection did not exist at the predetermined time, a notification indicating that the connection does not exist, and transmit, in response to determining that the connection did not exist at the predetermined time, a request to the managed device to restrict at least one function of the managed device.
US10212270B2 Inferring social protocols guiding the use of portable devices
A notification including one or more policies of use of one or more devices in an environment is received. The one or more policies are generated based on a pattern of use detected based on interaction data obtained by one or more sensors in the environment. Operation of one or more functionalities in the one or more devices is adjusted based on the one or more policies.
US10212269B2 Multifactor drive mode determination
A system and method of determining whether a device user is driving provide an improved ability to switch between a normal mode and a driving mode with fewer false positives and false negatives. Bluetooth connectivity and motion sensor readings are fused to make the drive mode determination and to set the timing of nay switch. In an embodiment, Bluetooth devices correlated with driving are used to modify the confidence level and the decision threshold associated with sensor input. When a node having a driving correlation higher than a particular threshold is connected to a device, a lower threshold is applied to the motion sensor input for entering drive mode and a higher threshold is applied for exiting drive mode. Similarly, when a user device is not connected to any highly correlated node, default thresholds may be used for entering and exiting the drive mode.
US10212268B1 Proximity-enhanced reconfiguration of telephone ring list
Proximity of a user/device to a designated location or other user/device can be determined and used to trigger automatic reconfiguration of a telephone ring list associated with the user/device. Accordingly, there is no need for manual reconfiguration to accommodate changes in the user's location or schedule. Specific phone numbers may be added or removed from a user's ring list based on proximity information, and the ring list may be reconfigured as the user and a second user enter or leave a common location. The user and the second user's desired phones will automatically ring for incoming calls based on the ring list and/or an identification of the incoming call.
US10212266B2 Phone fraud deterrence system for use with toll free and other fee generating numbers
An automated method for determining the validity of an incoming phone call including receiving an incoming phone call, activating a controller in response to receipt of the incoming phone call, wherein the controller generates a multi-digit code in response to the receipt of the incoming call, outputs an audible version of the multi-digit code to a caller for the incoming call, requests the caller to input the multi-digit code, compares the multi-digit code with a caller input, determines the call is invalid in response to a mismatch between the multi-digit code and the caller input, and terminates the phone call.
US10212262B2 Modular location tag for a real time location system network
An example disclosed method includes generating, by a microcontroller of a controller, a data packet; and causing the transmission of the data packet on blink data pulses from two or more individual transmit modules, wherein each individual transmit module is in comprises an antenna and a pulse generator configured to transmit the data packet and is in data communications with the controller, wherein the controller causes substantially simultaneous transmission of the blink data pulses from the respective transmit modules to encourage reliable receipt of the blink data pulses at one or more of a plurality of receivers.
US10212260B2 SerDes architecture with a hidden backchannel protocol
An illustrative multi-lane communication method implements a hidden backchannel to communicate equalization information and/or other link-related data without impinging on the user bandwidth allocated by the relevant articles of IEEE Std 802.3. One embodiment is implemented by a transceiver: (a) receiving signals from different receive channels; (b) converting each receive channel signal into a lane of a multi-lane receive data stream via demodulation and error measurement; (c) deriving outgoing backchannel information based at least in part on the error measurement; (d) detecting alignment markers in each lane of the multi-lane receive data stream; (e) extracting incoming backchannel information from a backchannel field following each alignment marker in at least one lane of the multi-lane receive data stream; and (f) modifying the multi-lane receive data stream to obtain a modified multi-lane receive data stream by replacing backchannel fields with PCS (Physical Coding Sublayer) alignment markers, thereby creating sets of grouped PCS alignment markers in said at least one lane.
US10212254B1 Method and apparatus for enabling mobile cluster computing
A mechanism that enables multiple Mobile Devices to operate in clusters is provided. Using the mobile cluster mechanism framework provided in this invention, Mobile Devices can execute compute intensive tasks in the field by sharing the task between various devices. The invention also contemplates various options of implementing the cluster mechanism on Mobile Devices. The invention further contemplates solutions for the roaming of Mobile Devices.
US10212250B2 Hardware ID based user profile identification and sharing
A server device may receive, via a local wireless connection with a user device, a hardware identifier associated with the user device; transmit the hardware identifier to a profile server; receive, from the profile server, a user profile associated with the user of the user device; generate a message based on the user profile; and provide the message to the user device.
US10212244B2 Information push method, server, user terminal and system
An information push method includes: an information push server determining recommendation information that currently needs to be pushed to a target user; the information push server obtaining setup information of the target user, where the setup information includes personalized graphic information preset by the target user; the information push server generating, according to the setup information of the target user, a personalized two-dimensional code that bears the recommendation information, where an image of the personalized two-dimensional code carries the personalized graphic information preset by the target user; and the information push server pushing the personalized two-dimensional code to the target user. By using the present disclosure, a click-through rate and conversion rate that a two-dimensional code pushed on the Internet has from a user can be improved.
US10212243B2 Future event detection and notification
One or more methods and/or techniques for providing a personalized future event notification to a user are provided herein. A content item (e.g., a news article, a social network post, etc.) may be evaluated utilizing a future event detection model to identify a future event (e.g., a festival). The future event detection model may have been trained to identify future events based upon part of speech analysis and entity recognition analysis of text within content items. In an example, the future event detection model may be used to identify locational features, temporal features, and/or entities from the content item. A user having a user interest in the future event above an interest threshold may be identified based upon user identifying information (e.g., a social network profile) being indicative of user interest in the future event. A personalized future event notification of the future event may be provided to the user.
US10212241B2 Network service comparative user interaction adjuster
A system and method for analyzing network service usage is provided. In example embodiments, model users of the network service are identified using a number of target events and in-scope events. Users of the network service generate interaction data by interacting with the network service. The interaction data of the identified model users can be compared to the interaction data of the non-model users without exposing the interaction data.
US10212238B2 Selecting a content providing server in a content delivery network
Aspects of the present disclosure involve systems, methods, computer program products, and the like, for managing the distribution of content from a content distribution network (CDN). In general, the system receives a request for content from the CDN from a user of the network and determines a server within the CDN to provide the content to the user. In addition, the system of the present disclosure may determine a preferred server or group of servers from which the content is provided to the user. This preference may be based on information received from a Border Gateway Protocol feed or Interior Gateway Protocol feed and one or more business determinations, such as the cost of providing the content through the CDN and particular egress port associated with the CDN.
US10212237B2 System and method for managing media and signaling in a communication platform
Systems and methods for communicating media between a client and a media server. Responsive to a communication initiation received by a signaling controller from a client system, the signaling controller invites a media server by providing an invitation to the media server. The media server is bridged with the client system by controlling a media proxy service to establish a media proxy between the client system and the media server by using client media parameters of the first communication initiation and media server media parameters provided by the media server responsive to the invitation. Media is communicated between the external client system and the media server by using the established media proxy.
US10212228B2 Implementing synchronization of state information betweeen instances of an application as well as between different applications in an efficient, scalable manner
A method, system and computer program product for implementing synchronization of state information in an efficient, scalable manner. A shared state server receives a request from a client device to access a scope containing state information. The scope is distributed over a partition(s) via the use of a “data grid” thereby increasing scalability. The shared state server relays the request to a data grid server responsible for maintaining the data grid comprised of an in-memory cache and partitions outside of the in-memory cache. The request includes a key associated with a value corresponding to the requested state information. The data grid server obtains the value associated with the key from its data grid and sends it to the shared state server to be relayed to the requesting client device. In this manner, the state information is stored in a scalable manner thereby improving the efficiency in synchronizing state information.
US10212226B2 Node cluster synchronization
Systems and methods associated with computing cluster synchronization are disclosed. One example method includes periodically requesting timing values from a set of notes in a computing cluster. The method also includes receiving timing values from members of the set of nodes. The method also includes providing a synchronization value to members of the set of nodes. The synchronization value may be generated based on the timing values. Additionally, the synchronization value may be used to order events across the members.
US10212225B2 Synchronization of components in heterogeneous systems
A process for automatic version synchronization of dependent components running on heterogeneous systems. In response to receiving a communication using a predetermined protocol through a network at a host, it is determined whether required client code is not present on the client. In response to a determination required client code is not present on the client, a required version of the client component is requested at the host. One or more loadable modules are located at the host bound with a host component that represents the client component. An object comprising the one or more loadable modules is sent to the client, wherein the client receives, loads and runs the object as a new component to communicate with the host component at a latest level.
US10212220B2 Self-adaptive control system for dynamic capacity management of latency-sensitive application servers
A self-adaptive control system based on proportional-integral (PI) control theory for dynamic capacity management of latency-sensitive application servers (e.g., application servers associated with a social networking application) are disclosed. A centralized controller of the system can adapt to changes in request rates, changes in application and/or system behaviors, underlying hardware upgrades, etc., by scaling the capacity of a cluster up or down so that just the right amount of capacity is maintained at any time. The centralized controller uses information relating to a current state of the cluster and historical information relating to past state of the cluster to predict a future state of the cluster and use that prediction to determine whether to scale up or scale down the current capacity to reduce latency and maximize energy savings. A load balancing system can then distribute traffic among the servers in the cluster using any load balancing methods.
US10212219B2 Resource allocation diagnosis on distributed computer systems
Disclosed are aspects of resource allocation diagnosis for distributed computer systems. In one example, a current snapshot of a distributed computing system is created. A current resource allocation of the distributed computing system is computed using the current snapshot of the distributed computing system. A modified snapshot is generated using the current snapshot. The modified snapshot includes a user modification. A hypothetical resource allocation is computed using the modified snapshot. A user interface includes the current resource allocation and the hypothetical resource allocation.
US10212218B2 Elastically scalable document-oriented storage services
A server set may provide a document service to various clients in view of considerations such as availability, fault tolerance, flexibility, and performance. Presented herein are document service architectures that involve partitioning the document set into at least two document ranges, and assigning the respective document ranges to an agent that is deployed to at least one assigned server. A request to apply an operation to a selected document may be fulfilled by identifying the document range of the document; identifying a selected server of the server set that hosts the agent to which the range is assigned; and forwarding the request to the selected server. In some variations, servers may retain detailed information about neighboring servers (e.g., according to logical and/or physical proximity) and scant information about distant servers, thereby avoiding both the extensive information exchange of highly informed network architectures and the inefficiency of uninformed routing algorithms.
US10212214B2 Network gateway implementing an instance manager function
A communication network comprises an access network, a subsystem and a gateway computer that bridges the access network and the subsystem. A plurality of client applications of a single user may connect to services provided by the subsystem. The gateway registers the user in the subsystem and associates all communication of the plurality of instances with a unique identifier that identifies the combination of the user and the gateway thus reducing the number of user registrations in the subsystem.
US10212211B2 File sharing via link generation
Users specify that a file set comprising their files, folders, or other content owned by the users should be made accessible via a link, such as a uniform resource locator (URL). The system which stores and provides access to the files accordingly creates a link that specifies the file set to be made accessible. The users may distribute the link to recipients with whom the file set is to be shared, and the distribution may be performed in any manner that the users choose.
US10212203B2 Stream-based data deduplication with cache synchronization
Stream-based data deduplication is provided in a multi-tenant shared infrastructure but without requiring “paired” endpoints having synchronized data dictionaries. Data objects processed by the dedupe functionality are treated as objects that can be fetched as needed. As such, a decoding peer does not need to maintain a symmetric library for the origin. Rather, if the peer does not have the chunks in cache that it needs, it follows a conventional content delivery network procedure to retrieve them. In this way, if dictionaries between pairs of sending and receiving peers are out-of-sync, relevant sections are then re-synchronized on-demand. The approach does not require that libraries maintained at a particular pair of sender and receiving peers are the same. Rather, the technique enables a peer, in effect, to “backfill” its dictionary on-the-fly. On-the-wire compression techniques are provided to reduce the amount of data transmitted between the peers.
US10212201B2 Facilitating user communication about a common topic
Among other things, we describe identifying, in first data available to a first user and not available to a second user, and in second data available to the second user not available to the first user, data pertaining to a common topic, and enabling the first user and the second user to communicate about the common topic based on the identification.
US10212200B1 Handling audio path failure and poor quality of service for voice calls in a contact center
Various embodiments of the invention provide methods, systems, and computer program products for handling an audio path failure and/or non-conformant QoS for a call between a contact center agent and remote party. Specifically, an audio path is established to a first telephony device being used by the agent and a call is bridged onto the audio path so that audio can be streamed back-and-forth between the first telephony device and a second telephony device being used by the party. Accordingly, various embodiments of the invention involve monitoring the audio path to detect an audio path failure and/or non-conformant QoS for the audio and bridging the call onto a second audio path when a failure or non-conformant QoS is detected so that the call is not disconnected from the second telephony device and a third device (e.g., IVR) can stream audio over the second audio path to the second telephony device.
US10212189B2 Authentication of client devices using modified images
Systems and methods for detecting phishing attacks and identifying attackers are described. In embodiments, a server system may modify a template image based on user information and provide the modified image to a user system with a login page. The server system may obtain authentication credentials with an image rendered by the user system. The server system may authenticate the user system based on the authentication credentials and information included in the rendered image. Other embodiments may be described and/or claimed.
US10212187B2 Detection of spoof attacks on internet of things (IOT) location broadcasting beacons
Spoof attacks on location based beacons are detected. A stream of beacons (e.g., IBEACONS) comprising at least a unique source identifier is generated. The stream of beacons is broadcast over a wireless communication channel to mobile devices within range. A list of broadcasted beacons is stored in a table along with a time and location of broadcast. Subsequent to broadcasting, a stream of beacons is detected. The detected beacon stream comprises a unique source identifier along with a time and a location of broadcast. The unique source identifier, the time and the location of at least one beacon of the detected beacon stream can be compared to the unique source identifier, the time and the location of at least one beacon of the broadcast beacon stream. Responsive to a match between the unique source identifiers and a mismatch of at least one of the time and locations, it is determined that the broadcast beacon stream has been spoofed by the detected beacon stream. Once a spoof has been detected, various remediation actions can be taken, such as sending alerts to admin, cautioning end users, and other security mode procedures.
US10212185B1 Defending side channel attacks in additive manufacturing systems
A novel methodology for providing security to maintain the confidentiality of additive manufacturing systems during the cyber-physical manufacturing process is featured. This solution is incorporated within the computer aided manufacturing tools such as slicing algorithms and the tool-path generation, which are in the cyber-domain. This effectively mitigates the cross domain physical-to-cyber domain attacks which can breach the confidentiality of the manufacturing system to leak valuable intellectual properties.
US10212182B2 Device profiling for isolation networks
In one embodiment, a server instructs one or more networking devices in a local area network (LAN) to form virtual network overlay in the LAN that redirects traffic associated with a particular node in the LAN to the server. The server receives the redirected traffic associated with the particular node. The server determines a node profile for the particular node based in part on an analysis of the redirected traffic. The server configures the particular node based on the determined node profile for the particular node.
US10212181B2 Network security database sorting tool
A method comprises creating a word vector from a message, wherein the word vector comprises an entry for each word of a plurality of words, and wherein each word of the plurality of words is assigned a weight. The method further comprises calculating a value for the word vector based on each entry of the word vector and the weights assigned to the plurality of words, and identifying that the message belongs to a first group by comparing the value for the word vector to a threshold. The word vector comprises an entry for each word of a plurality of words, and wherein each word of the plurality of words is assigned a weight.
US10212180B2 Systems and methods for detecting and preventing spoofing
Techniques for ascertaining legitimacy of communications received during a digital interaction with a client device. The techniques include: receiving a communication; identifying from the communication a first secured token; processing the first secured token by: obtaining, from the first secured token, information indicating a state of the digital interaction; and using the information indicating the state to determine whether the communication is from the client device; and when it is determined that the communication is from the client device, causing at least one action responsive to the communication to be performed; updating the information indicating the state of the digital interaction to obtain updated information indicating the state of the digital interaction; and providing a second secured token to the client device for use in a subsequent communication during the digital interaction, the second secured token comprising the updated information indicating the state of the digital interaction.
US10212179B2 Method and system for checking security of URL for mobile terminal
A method for checking security of a URL for a mobile terminal includes: receiving a URL security check request sent by a mobile terminal, where the URL security check request includes a URL; determining, through querying, whether there is security information corresponding to the URL; downloading, if there is no security information corresponding to the URL and the URL is a mobile application program download URL, a mobile application program corresponding to the URL; checking security of the mobile application program; and correspondingly storing the security information obtained through checking and the URL.
US10212178B2 Packet analysis based IoT management
Data packets transmitted to and from an IoT device are obtained and at least one of the data packets are analyzed using deep packet inspection to identify transaction data from payload of the at least one of the data packets. An event log is generated for the IoT device from the transaction data, the event log, at least in part, used to generate a historical record for the IoT device. The IoT device into a device profile based on the historical record for the IoT device. The event log is updated in real-time to indicate current operation of the IoT device. Abnormal device behavior of the IoT device is determined using the event log and the device profile. The device profile is updated to indicate the abnormal device behavior of the IoT device.
US10212177B2 System and method for managing terminal
The present invention is to provide a system and a method for managing a terminal to improve the security. The system for managing a terminal 1 connects to a WEB content containing information on an application running on the terminal; calculates reliability of the WEB content; references data on an application in the WEB content if the calculated reliability exceeds a threshold; and performs control of the application for the terminal based on a result of the reference.
US10212175B2 Attracting and analyzing spam postings
One or more processors generate a website mimicking a virtual message board. One or more processors receive a request message directed to the website. One or more processors analyze the request message for evidence that the request message originates from a source of spam. In response to a determination that the request message likely does originate from a spam source, one or more processors provide data about the spam source to an anti-spam system.
US10212171B2 Dynamic control of playlists
A server performs a method of controlling the manipulation of a playlist that includes a queue of media items to be played. In the method, a first electronic device is authorized to control the manipulation of the playlist. First geographic information that indicates a geographic location of the first electronic device and second geographic information that indicates a geographic location of a second electronic device are accessed. Based on the first geographic information and the second geographic information, the server determines whether the first and second electronic devices are located within a defined geographic proximity. In response to a determination that the first and second electronic devices are located within the defined geographic proximity, the second electronic device is authorized to manipulate the playlist.
US10212170B1 User authentication using client-side browse history
Techniques for authenticating a user may be described. In particular, a network-based document may be provided to a computing system of a user. The network-based document may include code and an identifier of another network-based document. The code may be configured to, upon execution, determine whether the other network-based document was accessed prior to providing the network-based document to the computing system. The other network-based document may be accessible to the user based on an identifier of the user. An indication that the other network-based document was accessed may be determined. For example, the indication may be received from the computing system based on an execution of the code at the computing system. The user may be authenticated based on the indication.
US10212169B2 Enforcing data security in a cleanroom data processing environment
Techniques for enforcing data security in a cleanroom data processing environment are described herein. In one or more embodiments, a virtual private cloud environment stores a first set of data provided by a first user account and a second set of data provided by a second user account, where the first user account is associated with a first set of one or more security credentials and the second user account is associated with a second set of security credentials and where the first user account is prevented from accessing at least the second set of data and the second user account is prevented from accessing at least the first set of data. In response to receiving, from the first user account or the second user account, a request to destroy the virtual private cloud environment, at least the first set of data and the second set of data are deleted.
US10212168B2 Electronic device and control method thereof
An electronic device and a control method thereof are provided. The control method for the electronic device includes: acquiring a call instruction; calling a target application to acquire collection data; acquiring a security label, in a case that the target application operates in a first operating mode; storing the acquired collection data based on the security label, as a collection data with the security label, wherein the collection data with the security label is in an accessible state when a first access authority is met.
US10212167B2 Method and system to enable controlled safe internet browsing
Various embodiments provide an approach to controlled access of websites based on website content, and profile for the person consuming the data. In operation, machine learning techniques are used to classify the websites based on community and social media inputs, crowdsourced data, as well as access rules implemented by parents or system administrators. Feedback from users/admins of the system, including the instances of allowed or denied access to websites, in conjunction with other relevant parameters, is used for iterative machine learning techniques.
US10212166B2 File downloading method, apparatus, and system
The present invention discloses a file downloading method, a server, a download access node, and a distributed storage system, which pertains to the field of communications technologies, and is designed to resolve a problem in the prior art that load on the server increases, and an authentication speed and a response speed for downloading a file are reduced. The file downloading method includes: acquiring, by a server, download permission that is set, and generating an access control list parameter of the download permission; and releasing, by the server, a download link that includes the access control list parameter, so that a terminal acquires the download link and generates a download request that includes the access control list parameter.
US10212165B1 Secured vital sign data group streams
A method and system for securely transmitting a plurality of data streams between a client device and a server that are in communication via standard Internet protocols are disclosed. The method comprises authenticating the client device by the server to create a Session ID and authorizing the client device to access the plurality of data streams by the server using at least one ACL Group, wherein a WebSocket connection is created between the client device and the server once the client device is both authenticated and authorized. The system comprises a client device and a server in communication with the client device via standard Internet protocols, wherein the server authenticates the client device to create a session, authorizes the client device to access the plurality of data streams using at least one ACL Group, wherein a WebSocket connection is created once the client device is both authenticated and authorized.
US10212156B2 Utilizing a trusted platform module (TPM) of a host device
Techniques for utilizing a trusted platform module of a host device are described. According to various embodiments, a client device that does not include a trusted platform module (TPM) may leverage a TPM of a host device to provide trust services to the client device.
US10212155B2 Table-connected tokenization
A tokenization system tokenizes sensitive data to prevent unauthorized entities from accessing the sensitive data. The tokenization system accesses sensitive data, and retrieves an initialization vector (IV) from an IV table using a first portion of the sensitive data. A second portion of the sensitive data is modified using the accessed initialization vector. A token table is selected from a set of token tables using a third portion of the sensitive data. The modified second portion of data is used to query the selected token table, and a token associated with the value of the modified second portion of data is accessed. The second portion of the sensitive data is replaced with the accessed token to form tokenized data.
US10212154B2 Method and system for authenticating a user
Method for authenticating a user, comprising the steps of a) providing a central server (101), in communication with at least two authentication service providers (110,120,130) and at least one user service provider (150); b) associating each authentication service provider with at least one respective available level of authentication; c) receiving a request from the user service provider to authenticate a particular user accessing the user service provider via an electronic device (170,180); d) identifying a minimum level of authentication; e) the central server identifying a selected one (110) of said authentication service providers; f) either providing user credential data directly to the selected authentication service provider, without said user credential data being supplied to the central server, or determining that the selected authentication service provider has an active authentication session for the particular user; and g) causing the selected authentication service provider to authenticate the particular user and to provide an authentication response. The invention also relates to a system.
US10212151B2 Method for operating a designated service, service unlocking method, and terminal
Disclosed are method for operating a designated service, a service unlocking method and terminal. The method comprises: receiving an operation request for operating the designated service from a user, the operation request containing identification information of the designated service; sending a state inquiry request to a locking server, wherein, the state inquiry request contains identification information of the designated service, and is used to inquiry current state of the designated service; sending a request for operating the designated service to an operating server related to the designated service when the terminal receives from the locking server a prompt information that indicates permitting to continue to execute the designated service, and receiving a result of operation from the operating server; and conducting no operation to the designated service when the terminal receives from the locking server a prompt information that indicates not permitting to continue to execute the designated service.
US10212150B2 Intelligent task assignment and authorization systems and methods
The present disclosure relates to computer-implemented methods and systems for intelligent task management. An example method may include identifying one or more authorized entities. The method may further include broadcasting at least one task associated with a user to one or more devices associated with the one or more authorized entities. The method may further include receiving from the one or more authorized entities, via the one or more devices, an indication of acceptance of the at least one task. The method may further include selecting at least one trusted entity among the one or more authorized entities. The method may further include issuing at least one digital certificate to the at least one trusted entity to perform the at least one task.
US10212145B2 Methods and systems for creating and exchanging a device specific blockchain for device authentication
Mobile devices and other devices used in transactions or interactions with other computer systems can be identified by an abstract composite of information unique to the device. For example, the device can record and store when a user first started the device (a date and time of first use), how the device is configured (including any hardware/software identifications, versions, install dates, time when configurations or installations occurred, etc.), etc. All of the information can be collected for a specified period of time (e.g., 30 minutes, 1 hour, etc.), periodically, or continually. This process yields a large collection of data, which can be condensed (a record before condensing the data may be approximately 10 to 50 MB). The data may then be encapsulated in a blockchain. At least a portion of the blockchain may then be exchanged to identify the device.
US10212143B2 Authorizing an untrusted client device for access on a content management system
A method, system, and manufacture for authorizing an untrusted client device for access on a content management system. The content management system receives a request from an untrusted client device to access content on the content management system. The content management system sends an authentication key to the untrusted client device. The content management system then receives the authentication key from a trusted client device. Based on the matching authentication key, the content management system transmits data to the untrusted client device in accordance with any additional instructions that the trusted client device may have sent.
US10212141B2 Autonomous key update mechanism with blacklisting of compromised nodes for mesh networks
Various embodiments described herein relate to network key manager which is configured to manage keys in nodes in the network, wherein the network key manager including a memory configured to store an update data structure; a processor configured to: determine which nodes are blacklisted; generate the update data structure of volatile private keys for each node that is not blacklisted, wherein the volatile private key is based upon secret information associated with the node and an index, wherein the volatile private key is used for the indexth key update; determine a neighbor node of the network key manager; remove the volatile private key for the neighbor node from the update data structure; encrypt the resulting update data structure and a new network key with the private key for the neighbor node to produce an encrypted message; and send the encrypted message to the neighbor node.
US10212140B2 Key management
According to an example embodiment of the present invention there is provided an apparatus comprising a receiver configured to receive a pair of cryptographic keys comprising a public key and a secret key, the public key being cryptographically signed, a memory configured to store the secret key, and a transmitter configured to send the cryptographically signed public key to a correspondent node and participate in establishment of a cryptographic network protocol session based at least in part on the pair of cryptographic keys.
US10212139B2 Systems and methods for data encryption and decryption
An example method includes, responsive to determining a device is connected to a second computing device, accessing a virtual storage area, the virtual storage area corresponds to storage space on the second computing device; responsive to detecting a first request by a user of the second computer device to read first data stored in the virtual storage area, transmitting the first data to the device; decrypting the first data to produce first decrypted data; transmitting the first decrypted data from the device to the second computing device; detecting a second request by a user of the second computer device to write second data to virtual storage area; responsive to detecting the second request, transmitting the second data to the device; encrypting the second data to produce second encrypted data; transmitting the second encrypted data from the device to the second computing device.
US10212125B2 Methods, systems, and computer readable media for testing network equipment devices using connection-oriented protocols
The subject matter described herein relates to methods, systems, and computer readable media for testing network equipment devices using connection-oriented protocols. In some examples, a method for testing a network equipment device under test (DUT) includes executing, by a network equipment test device, a test script to test the network equipment DUT using a connection-oriented protocol. The method includes inserting, during a connection establishment process of the connection-oriented protocol for a network flow to the network equipment DUT, a flow-identifying sequence number into a sequence number field of a first message of the network flow. The flow-identifying sequence number is a number uniquely identifying the network flow from other network flows. The method includes receiving a second message from the network equipment DUT and determining that the second message belongs to the network flow by extracting the flow-identifying sequence number from the second message.
US10212124B2 Facilitating content accessibility via different communication formats
Methods and systems for facilitating content accessibility via different communication formats are provided. According to one embodiment, information indicative of one or more communication formats via which a client device is capable of communication is stored on a client device by (i) sending the client device a web page having embedded therein test content associated with a first protocol stack and/or a second protocol stack; and (ii) based on a response to the test content received from the client device, determining communication capabilities of the client device. A result of the determination is stored within a browser cookie, which is sent to the client device. A content request is received from the client device that includes the browser cookie. The client device is redirected to a server device appropriate for the communication capabilities of the client based at least in part on the browser cookie.
US10212122B2 Fan network management
A method performed by a physical computing system includes, with a first virtual entity manager of a first host machine, detecting an Address Resolution Protocol (ARP) request from a first virtual entity supported by the first virtual entity manager to a second virtual entity having a first logical address within a fan network. The method further includes, with the first virtual entity manager, translating the first logical address to a second logical address and transmitting the ARP request to a second host machine using a physical address resolved from the second logical address, the second host machine supporting the second virtual entity. The method further includes receiving a response to the ARP request, the response including a virtualized physical address of the second virtual entity. The method further includes with the first virtual entity manager, forwarding a data packet from the first virtual entity to the virtualized physical address.
US10212121B2 Intelligent scheduling for employee activation
Techniques for intelligent scheduling of content sharing by company employees via an online social networking service are described. According to various embodiments, a request is received from a member of an online social networking service to share a content item among members in the member's connection network on the online social networking service. Member behavior log data associated with the members in the connection network of the member is then accessed. Thereafter, an optimum sharing time for sharing the content item among the members in the member's connection network is calculated. The content item is then caused to be shared at the optimum sharing time with the members in the member's connection network.
US10212120B2 Distributed message queue stream verification
A stream verification system for a distributed message queue system with metric collectors on each producer and consumer. A producer time stamp allows correlation of sent and received messages. Verification reports are organized by a message topic. A cumulative checksum allows detection of missing or corrupted messages. Verification messages are used to determine if a zero message report means no messages were sent, or rather that the messages weren't received.
US10212116B2 Intelligently condensing transcript thread history into a single common reduced instance
A computer implemented method and system for condensing a communications thread which includes monitoring, using a computer, a communications thread. Multiple instances of a repeated portion of content of the communications thread are identified. One instance of the repeated portion of content of the communications thread is retained. One or more additional instances of the repeated portion of content is removed and stored. A reference link in the communications thread is associated to the repeated portion of content. The communications thread is condensed, wherein the condensed communications thread includes the one instance of the repeated portion of content, and the reference link.
US10212115B2 Systems and methods to communicate a selected message
A system may detect multiple accesses of an engagement interface from a user. The multiple accesses may include a first group of accesses performed by a first device and a second group of accesses performed by a second device. Both the first device and the second device may correspond to the user. A message may be selected from a set of messages. Moreover, the message may correspond to the engagement interface. The system may identify the first group of accesses as having a greater amount of user interaction with the engagement interface than the second group of accesses. The system may then determine that the selected message has the greatest likelihood of being read on the first device. The selected message may be communicated to the first device based on the determination.
US10212111B2 System and interface that facilitate selecting videos to share in a messaging application
Systems and methods are provided that facilitate selecting videos to share in a messaging session such as group video chat. In one or more aspects, a system is provided that includes an interface component configured to generate a graphical user interface that facilitates selecting by a user of the device, one or more videos provided by a remote streaming media provider, for sharing with one or more other users in association with a messaging session between the user and the one or more other users, the interface comprising a plurality of input categories including at least one video selection category corresponding to information identifying a set of videos associated with a shared attribute. The system further includes a presentation component configured to display the graphical user interface via a display screen of the device in response to a request.
US10212110B2 Cloud system and method of displaying, by cloud system, content
Provided is a system for providing a cloud service for display, the system including: an image forming apparatus configured to generate scan data including scanning a document and assign a display device to which the scan data is to be transmitted through a chat room; a cloud configured to receive the scan data from the image forming apparatus and transmit the scan data to the display device; and the display device, wherein the display device is configured to display the scan data received from the cloud.
US10212108B2 Method and system for expanding function of message in communication session
A system includes a memory configured to store computer-readable instructions; and one or more processors configured to execute the computer-readable instructions such that the one or more processors are configured to, receive a message from a first electronic device connected to a communication session for an instant messaging service, determine hidden attribute information for playing content corresponding to a keyword using the keyword further included in the message, if the message includes a desired character, add the determined hidden attribute information to the message, and transmit the message to which the hidden attribute information is added, to a second electronic device connected to the communication session through the communication session.
US10212105B2 Collective address book system
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a collective address book system. One of the methods includes: receiving a request from a user to contact a person of interest; determining that contact information for the person of interest is not available in the user's contact information to which the system has access; determining that the collective address book system has access to contact information for the person of interest; generating proxy contact data for the person of interest; and providing the proxy contact data to the first user.
US10212103B2 Smart automatic composition of short messaging responses
An electronic communication device and method for communication including automatically selecting, composing, and/or presenting a number of proposed responses to a message is disclosed. The device can present the incoming message content to the user together with an alert to the user that one or more proposed responses are available for review and selection. The device can calculate a confidence metric for each proposed response. The user alert and/or presentation of the messages can be made to vary in intensity in accordance with the confidence metric of the one or more proposed responses. The presentation of the proposed responses can be alternated and/or combined with a method for the device to receive user input to the content of the proposed response. The user can edit a proposed response rather than composing a complete response.
US10212096B2 Received path delay mechanism
A method, reception device and host device are provided for aligning data streams at a multi-source receiver. Portions of data for a plurality of data streams are received at a reception device, the plurality of data streams carrying respective content, wherein the content of each data stream is misaligned with at least one other data stream with respect to time. The portions of data are forwarded to a host device to be stored in respective delay buffers. Indexing information is maintained for each of the delay buffers. The portions of data are forwarded to the host device along with the indexing information.
US10212094B2 Audio data processing
An apparatus and method are provided. A first buffer is configured to store a first packet stream, the first buffer comprising a first read pointer pointing to a first position in the first packet stream. A second buffer is configured to store a second packet stream. The second packet stream corresponds to the first packet stream and the second buffer comprises a second read pointer. A controller is configured to determine a second position in the second packet stream that corresponds to the first position in the first packet stream and adjust the second read pointer to point to the second position.
US10212090B2 Policy control method and related apparatus and system
This application discloses a policy control method, including: after a gateway is connected to a network, receiving a first gateway access identifier; selecting a PCRF entity for the gateway accordingly, and establishing a first session for the gateway to implement policy control on the gateway; when a mobile terminal or a fixed-line device is connected to the network through the gateway to perform service data flow access, receiving a second gateway access identifier; if the second gateway access identifier and the first gateway access identifier are the same, selecting, for a service data flow of the mobile terminal or the fixed-line device, a same PCRF entity, and establishing a second session to implement policy control on the service data flow of the mobile terminal or the fixed-line device. The foregoing manner is used to prevent incorrect policy control from causing an exception.
US10212089B1 Encapsulating traffic entropy into virtual WAN overlay for better load balancing
Disclosed embodiments describe systems and methods for tunneling packets. A tunnel between a first intermediary device and a second intermediary device is established that encapsulates payload packets of transport layer connections between a client and a server. The first intermediary device identifies, from a first packet of a transport layer connection between the client and the server, packet header information. The first intermediary device populates a destination port and a source port of a header of a second packet to be transmitted via the tunnel. The destination port is populated with a predetermined destination port, and the source port includes a first hash of a tuple of the packet header information of the first packet. The second packet includes the first packet as a payload, and is load balanced across paths to the second intermediary device based on a second hash of the header of the second packet.
US10212088B2 Tactical traffic engineering based on segment routing policies
In one embodiment, a method includes monitoring traffic in a Segment Routing (SR) network through a collection of a Segment Routing Demand Matrix (SRDM) at a Traffic Engineering (TE) system operating at a network device, receiving topology information for the SR network at the TE system, modeling the SR network based on the topology information and the SRDM at the TE system, identifying a violation of a constraint in the SR network at the TE system, and running an optimization algorithm for SR optimization of constraints in the SR network at the TE system, wherein the optimization comprises limiting a number of Segment Identifiers (SIDs) used in a SR policy implemented to resolve the constraint violation. An apparatus is also disclosed herein.
US10212087B2 Mesh network assessment and transmission
Systems, apparatuses, and methods relating to mesh network communications are described. In one embodiment a method may include receiving at least one information packet at a node, identifying one or more output communication links, assessing at least one characteristic of at least one of the one or more identified output communication links, and transmitting one or more information packets from a node via at least one of one or more identified output communication links based at least in part on at least one characteristic.
US10212086B2 Methods and apparatus for target transmission duration in multiple user uplink
The disclosure provides methods and apparatuses for multiple user uplink. One aspect of the disclosure provides a method for wireless communication. The method comprises receiving a first wireless message from an access point indicating an uplink transmission opportunity and a target transmission duration for each of a plurality of user terminals including a first user terminal. The method also comprises changing a planned transmission duration of a second wireless message from the first user terminal to fit the target transmission duration. The method also comprises transmitting the second wireless message from the first user terminal over the target transmission duration.
US10212083B2 Openflow data channel and control channel separation
A control channel for routing management messages to or from an OpenFlow controller is separated from a reserved port within a data channel for routing unknown data packets to or from the OpenFlow controller. The port may be reserved by setting a reserved port flag. A packet routing table may include a table miss entry that indicates the unknown packets should be routed via the reserved port. By utilizing the reserved port to route unknown packets, the unknown packets do not traverse into the control channel, and the separation of the OpenFlow control channel from the OpenFlow data channel is enhanced.
US10212081B2 Systems and methods for implementing a time-stamped controller area network (CAN) bus message
Systems, methods, and apparatuses are provided herein for time-stamping a Controller Area Network (“CAN”) bus message. Control circuitry (e.g., of a network bridge) may receive a CAN message, and may, in response to receiving the CAN message, generate a time stamp. The control circuitry may add an entry to a lookup table stored in memory, wherein the entry correlates a CAN message Identifier (“ID”) corresponding to the CAN message with the time stamp. The control circuitry may encapsulate the CAN message and the time stamp, and may transmit the CAN message according to the time stamp.
US10212078B2 Enabling network services in multi-tenant IAAS environment
Methods, systems, and computer program products for enabling network services in a multi-tenant IaaS environment are provided. A service portal is deployed in the IaaS environment. In one embodiment, tenant packet associated with a first tenant of the IaaS environment is received by the service portal. The tenant packet is analyzed to identify one or more services to which to transmit the tenant packet. The tenant packet is distributed to the identified services for processing. A processed tenant packet is received from one or more of the identified services. The processed tenant packet is transmitted to a destination.
US10212076B1 Routing methods, systems, and computer program products for mapping a node-scope specific identifier
One or more techniques are provided to: receive network path information for use in transmitting first data along a network path, and being received based on a node-scope specific identifier in a node-specific identifier space of a first node, where the node-scope specific identifier in the node-specific identifier space of the first node identifies, for the first node, a particular node in the network path; determine a node-scope specific identifier in a node-specific identifier space of a second node that identifies, for the second node, the particular node in the network path; map the node-scope specific identifier in the node-specific identifier space of the first node, to the node-scope specific identifier in the node-specific identifier space of the second node; and transmit the first data from the current node along the network path including the particular node.
US10212075B1 Convergence optimization of local switching for flexible cross-connect in ethernet virtual private network (EVPN) environments
In one embodiment, a device in a network assigns two multi-protocol label switching (MPLS) labels to a single flexible cross-connection maintained by the device for a plurality of endpoint. The device establishes an Ethernet virtual private network (EVPN) backup path to a peer router for the flexible cross-connection in part by exchanging the MPLS labels with the peer router. The device detects a communication failure that resulted from attempting to send a packet between a first one of the endpoints and a second one of the endpoints using local switching on the device and via the flexible cross-connection. The device sends the packet towards the second endpoint using the EVPN backup path to the peer router, after detecting the communication failure and without first using Border Gateway Protocol (BGP) signaling to signal the communication failure to the peer router.
US10212074B2 Level of hierarchy in MST for traffic localization and load balancing
In one embodiment, a multiple spanning tree (MST) region is defined in a network, where the MST region includes a plurality of network nodes interconnected by links. A MST cluster is defined within the MST region, where the MST cluster includes a plurality of network nodes selected from the plurality of network nodes of the MST region. A network node of the MST cluster generates one or more MST bridge protocol data units (BPDUs) that present the MST cluster as a single logical entity to network nodes of the MST region that are not included in the MST cluster, yet enables per-multiple spanning tree instance (per-MSTI) load balancing of traffic across inter-cluster links that connect network nodes included in the MST cluster and network nodes of the MST region that are not included in the MST cluster.
US10212068B2 Multicast routing via non-minimal paths
A method of routing traffic for multi-cast routing through a node of a network that utilizes loop-free alternative paths is presented. The method includes receiving a join in the node from a second node in the network on a shortest path between the node and the second node; retrieving loop-free alternative paths to the second node; and adding an entry to a multi-cast routing table at the node that is based on a group that includes the shortest path to the second node and the loop-free alternative paths to the second node as cost equivalent paths.
US10212064B2 Assessing performance of networked computing environments
Systems and methods are described for accurately determining which of a set of networked computing environments most closely approximates a target computing environment. The determination is based on executing a reference workload in the target computing environment and calculating a coefficient of equivalency for each of the networked computing environments, which relates the performance of one or more computing resources in the target computing environment to the corresponding resources in the networked computing environments. The coefficient of equivalency may further be used to determine which of a set of networked computing environments will provide a target level of performance when executing the workload. The target computing environment may be assessed in terms of time, cost, percentage of capacity utilized, or other criteria.
US10212060B2 Methods for monitoring quantities of computer devices, associated computer program and device
A method for monitoring a quantity of a computer device, including measuring values adopted by the quantity over time, determining a measured value, or extremum value, meeting at least one transmission criterion, in which the extremum value is a local extremum, and transmitting the extremum value.
US10212059B2 System and methods for recording and recreating interactive user-sessions involving an on-line server
An auditing system and method is configured to capture and report an interactive client journey between a web browser and a website. Instantiation of control code at an end-user computing device brings about the capture of server and request headers from the perspective of the locally-executing web browser. The control code causes the sending of an uplink journey report to a cloud-based processing server that uses the report to interpret the server and request headers to imply real-time interactions between the end-user. Capture may be based on AJAX requests related to end-user interaction; and data calls made to the e-commerce server during the web session. Client-side capture provides installation of control code that can be delivered directly from a content distribution network. The processing server correlates the server and request headers with predefined flagged events.
US10212054B2 Transparently tracking provenance information in distributed data systems
Systems for enabling an application to track provenance include an instrumented application binary on a client device. Overwritten library call instructions provide library calls to one or more instrumented libraries that invoke a provenance layer to track data operations. The provenance layer is configured to catch and log data events performed by the instrumented application.
US10212052B2 Method for providing contents in a mobile communication system and apparatus thereof
A method for providing contents in a mobile communication system, the method comprising searching subscriber information of client information of the mobile terminal connected with a wireless internet, performing an authentication of the subscriber information, transmitting an inquiry message as to whether to be affiliated with a wireless internet to the mobile terminal in the case that a subscriber has a due right but didn't register to a wireless internet in the authenticating result, and automatically affiliating with a wireless internet in the case that a terminal of the subscriber receives an agreement message of an affiliation with a wireless internet. The automatically affiliating with a wireless internet comprising generating a predetermined provisional data for affiliating except for the subscriber information and apparatus information of the subscriber terminal of data requested in case of being affiliated with the wireless internet.
US10212051B2 Stitching an application model to an infrastructure template
A method of stitching an application model to an infrastructure template, comprising identifying patterns in the application model, identifying patterns in the infrastructure topology, and matching the patterns in the application model and infrastructure topology using policies associated with the application model. A system for stitching an application model to an infrastructure topology, comprising a stitching engine, and a number of infrastructure topology sources, in which the stitching engine, identifies patterns in the application model, identifies patterns in the infrastructure topology, and matches the patterns in the application model and infrastructure topology using policies associated with the application model.
US10212047B2 Modular interface framework for network devices
Techniques for providing interface modules for controlling network devices are provided. For example, a method may include receiving, at a computing device, a communication including a unique identifier for a network device connected to a network. The method may further include using the unique identifier to determine an interface module for the network device and transmitting the interface module, wherein when the interface module is received, the interface module displays one or more interface elements usable to control the network device connected to the network.
US10212046B2 Avatar representation of users within proximity using approved avatars
Systems, methods, and apparatuses are directed to facilitating avatar representation of users within proximity using approved avatars. In one embodiment, logic may be configured to determine communication devices that are within a proximity threshold. The determined communication devices may include first and second communication devices that are associated with first and second users, respectively. The first user may be associated with a first avatar and the second user may be associated with a second avatar. The logic may also be configured to determine a request initiated at the first communication device for avatar information associated with one or more users of the determined communication devices. The logic may further be configured to provide the second avatar to the first user via the first communication device based on determining that the second avatar is included in an approved avatar set.
US10212044B2 Sparse coding of hidden states for explanatory purposes
In one embodiment, a device in a network maintains a machine learning-based recursive model that models a time series of observations regarding a monitored entity in the network. The device applies sparse dictionary learning to the recursive model, to find a decomposition of a particular state vector of the recursive model. The decomposition of the particular state vector comprises a plurality of basis vectors. The device determines a mapping between at least one of the plurality of basis vectors for the particular state vector and one or more human-readable interpretations of the basis vectors. The device provides a label for the particular state vector to a user interface. The label is based on the mapping between the at least one of the plurality of basis vectors for the particular state vector and the one or more human-readable interpretations of the basis vectors.
US10212043B1 Proactive link load balancing to maintain quality of link
Disclosed embodiments describe systems and methods for predicting health of a link. A device in communication with a link can identify profile information of a stream of network traffic traversing the link. The device can determine a first prediction of health of the link by applying one or more rules to the plurality of parameters of the profile information. The device can determine a second prediction of health of the link by applying a classifier to one or more timed sequences of the plurality of parameters of the profile information. The device can establishes a respective weight for each of the first prediction of health and the second prediction of heath. The device can select, using the respective weight, between the first prediction of health and the second prediction of health to provide a predictor of the health of the link.
US10212039B1 Detecting network device configuration errors using authentication requests from wireless endpoints
A management server communicates with an authentication server that authenticates endpoints, which are configured to connect wirelessly with access points (APs) controlled by respective ones of a plurality of controllers. Weights for the APs and the controllers are stored. Event logs detailing requests for authentication of the endpoints are received. For each request, roaming conditions for the endpoint that triggered the request are determined. Also, a respective weight of one or more of the AP connected with the endpoint and of the controller that controls the AP is increased by a respective amount depending on whether the roaming conditions are caused by the AP and the controller being improperly configured or properly configured. Identities of ones of the APs and the controllers having weights that exceed one or more weight thresholds each indicative of an improperly configured AP or controller are stored.
US10212034B1 Automated network change management
A method for providing network configuration changes in a service provider environment includes, by a server computer of the service provider environment, selecting a plurality of scripts associated with a corresponding plurality of operations that enable configuration changes to one or more network devices within the service provider environment. A network change procedure is generated based on the selected plurality of scripts. Metadata is read for at least one script of the plurality of scripts in the network change procedure. State information is determined for the at least one script using the metadata. Based on the state information, automatic execution of at least one operation is performed to generate an operation result. A determination is made whether to perform a rollback of the automatic execution based on the operation result.
US10212033B2 Network setting change method and system thereof, and terminals which are used with said system
The present invention is provided to implement an automated setting change of network setting items on an ad hoc network which does not have a specific base station. A method of changing network setting for changing setting of a network where a plurality of terminals are connected, the method including the steps of: a request source terminal transmitting a request for setting change to a selected representative terminal; the selected representative terminal, upon receiving the request for setting change, transmitting a request for permission to at least a majority of representative terminals; the selected representative terminal transmitting a success notification to the request source terminal upon receiving a notification of permission from the majority of representative terminals in response to the request for permission; the request source terminal transmitting, to the plurality of terminals, an execution instruction including at least a content of setting change, upon receiving the success notification; and the terminal which has received the execution instruction changing the setting according to the content of setting change.
US10212031B2 Intelligent configuration discovery techniques
At a configuration discovery service, a unique service-side identifier is generated for a configuration item based on analysis of a data set obtained from a first data source. A determination is made that a second data set, which does not contain the service-side identifier and is obtained from a different data source, also includes information pertaining to the same configuration item. A coalesced configuration record for the configuration item is prepared. The coalesced configuration record is stored at a repository and used to respond to a programmatic query.
US10212029B2 Service provisioning in cloud computing systems
Techniques for provisioning cloud services in cloud computing systems are disclosed herein. In one embodiment, a method can include providing a user portal configured to communicate with a deployment application configured by a user for provisioning cloud services in the cloud computing system. The method can also include receiving a notification from the user-configured deployment application that a provisioning process is initiated for a cloud service in the cloud computing system. In response to receiving the notification, the method can include assigning a distinct provisioning identifier to the initiated provisioning process associated with the notification and causing an output field associated with the distinct provisioning identifier to be displayed on the user portal. Subsequently, messages of status updates can be forwarded to the status display according to the assigned distinct provisioning identifier.
US10212028B1 Controlling TDD configuration based on uplink latency
Disclosed is a method and system for controlling air interface communication in a wireless communication system that supports multiple TDD configurations. In a disclosed example, a base station's cell is initially configured to operate with a particular TDD configuration. The base station then detects a trigger to reduce uplink latency in the cell, such as by detecting a threshold number of devices being served with latency-sensitive communication such as voice-over-packet communication. And the base station responsively reconfigures the cell to operate with a different TDD configuration having lower uplink latency, where uplink latency of each TDD configuration is based average wait to uplink subframe of the TDD configuration.
US10212024B2 Techniques for multi-stage analysis of measurement data with event stream processing
Various embodiments are generally directed to systems for multi-stage measurement data analysis (MMDA), such as for evaluation and/or validation of data received from a measurement device, for instance. Some embodiments are particularly directed to a MMDA system that utilizes event stream processing (ESP) to provide near real-time validation of measurement data, at least in part, by detecting losses in the measurement data. In many embodiments, the MMDA system may detect technical losses (e.g., due to equipment malfunction) and/or non-technical losses (e.g., due to compromised equipment). For example, the MMDA system may receive measurement data generated by an electrical meter and determine the electrical meter is malfunctioning by detecting a technical loss in the measurement data. In many embodiments, the MMDA system may utilize both direct and indirect measurement data transmitted via separate communication paths to provide near real-time validation of measurement data.
US10212022B2 Enhanced network virtualization using metadata in encapsulation header
In a network virtualization system, metadata is passed in an encapsulation header from one network virtualization edge to another network virtualization edge or to a service connected to a network virtualization edge. The metadata may carry packet processing instructions, diagnostic information, hop-specific information, or a packet identifier. Using the metadata information in the packet header, the datacenter network may provide services such as remote segmentation offload, small packet coalescing, transparent packet compression, and end-to-end packet tracing.
US10212020B2 Apparatus and method for superposition transmissions
Apparatuses, systems, and methods are described concerning a new type of superposition multiplexing transmission constellation (super-constellation): the Gray-mapped Non-uniform-capable Constellation (GNC). Apparatuses, systems, and methods for generating GNC super-constellations are described, as well as apparatuses, systems, and methods for receiving, demapping, and decoding transmissions using GNC super-constellations. Apparatuses, systems, and methods for selecting a type of superposition multiplexing transmission constellation based on various conditions are also described.
US10212019B1 Sub-carrier adaptation in multi-carrier communication systems
A communication device determines an estimate of a communication channel, and determines, based on the estimate of the communication channel, a plurality of pairs of modulation schemes and encoding schemes to be used for a packet, including: i) determining, for a first set of adjacent orthogonal frequency division multiplexing (OFDM) subcarriers, a first pair of a modulation scheme and an encoding scheme; and ii) determining, for a second set of adjacent OFDM subcarriers, a second pair of a modulation scheme and an encoding scheme, the second pair being different than the first pair. The communication device generates the packet for transmission, wherein i) all data modulated on the first set of adjacent OFDM subcarriers is modulated and encoded using the first pair, and ii) all data modulated on the second set of adjacent OFDM subcarriers is modulated and encoded using the second pair.
US10212017B2 Preambles in OFDMA system
The present invention provides a preamble that is inserted into an OFDMA frame and has a common sequence for all the base stations participating in a transmission. The subscriber station performs fine synchronization using the common sequence on the common preamble, and the resulting peaks will provide the locations of candidate base stations. The base station specific search is then performed in the vicinities of those peaks by using base station specific pseudo-noise sequences. With this two stage cell search, the searching window is drastically reduced. The preamble is matched to known values by a respective receiver to decode the signals and permit multiple signals to be transferred from the transmitter to the receiver. The preamble may comprise two parts, Preamble-1 and Preamble-2, which may be used in different systems, including multioutput, multi-input (MIMO) systems.
US10212003B2 Multi-mode ethernet transceiver
According to one embodiment, an Ethernet communication device is configured to be connected to one or more twisted-pair links, each twisted-pair link having a particular capacity. The Ethernet communication device includes a physical interface transceiver. The physical interface transceiver sets a data transmission rate of the Ethernet communication device based on a total capacity of the twisted-pair links connected to the Ethernet communication device. The physical interface transceiver transmits data over the twisted-pair links connected to the Ethernet communication device at the data transmission rate.
US10211996B2 Method and device for receiving a multimedia broadcast multicast service in a mobile communication system
The present disclosure relates to a method and device for receiving a multimedia broadcast multicast service (MBMS) in a mobile communication system. The method for receiving the MBMS of a terminal in the mobile communication system according to an embodiment of the present disclosure is characterized in that it includes: determining whether service area ID (SAI) information on a serving cell is broadcast during the MBMS; receiving the SAI information on the serving cell when it is determined that the SAI information is broadcast; determining, by using the received SAI information of the serving cell, whether an SAI of the MBMS matches the SAI of the serving cell; and changing the cell reselection priority of the frequency of the serving cell to the highest priority if it is determined that the SAI of the MBMS matches the SAI of the serving cell.
US10211992B1 Secure certificate pinning in user provisioned networks
Embodiments are directed to a system and method of exchanging certificate pinning information between a server and client over an unprotected network by: obtaining a server certificate fingerprint to validate the server to the client during network communication; upon receipt of a request from the client, wrapping the server certificate fingerprint in an envelope that is encrypted using a hash of a password defined by the user and transmitted for storage on the server; and transmitting the envelope as part of a payload over the network to the client to enable the client to decrypt the envelope using the password and obtain the server certificate fingerprint for pinning to data elements transmitted to the server.
US10211988B2 Personal digital identity card device for fingerprint bound asymmetric crypto to access merchant cloud services
A personal digital ID device provides a digital identifier to a service for a predetermined duration in response to user interaction. The user interaction may include a button press. The personal digital ID device may be in the form of a bracelet, a key fob, or other form factor. The service may be provided by a mobile device, in the cloud, or elsewhere.
US10211987B2 Transport mechanism for carrying in-band metadata for network path proof of transit
A system and methods are provided herein for verifying proof of transit of traffic through a plurality of network nodes in a network. In one embodiment, a method is provided in which information is obtained about a packet at a network node in a network. The information includes in-band metadata. Verification information is read from the in-band metadata. The verification information for use in verifying a path of the packet in the network. Updated verification information is generated from the verification information read from the packet. The updated verification information is written to the in-band metadata of the packet, and the packet is forwarded from the network node in the network.
US10211986B2 Program collation system, node, collation method, and computer-readable medium
A collation system includes first through third nodes N1-N3. N1 includes: an evaluation formula generation unit generating an evaluation formula evaluating a distance with authentication data; an encryption unit encrypting coefficients of the evaluation formula by a public key and transmitting the encrypted coefficients to N3; and an evaluation value generation unit acquiring the encrypted coefficients from N3 when authentication target data to be collated with the authentication data is received, generating an evaluation value collating the authentication target data with the authentication data based on the authentication target data and the encrypted coefficients, and transmitting the evaluation value to N2. N2 includes: a key generation unit generating a public/secret key pair and transmitting the public key to N1; and a collation unit decrypting the evaluation value using the secret key, thereby collating the authentication target data with the authentication data. N3 includes a storage unit holding the encrypted coefficients.
US10211979B2 Systems and methods securing an autonomous device
A system and method for cryptographically securing a device includes initializing a cryptographic processing circuit which includes provisioning a cryptographic key store associated with the cryptographic processing circuit with cryptographic key material; and establishing a first cryptographically secured connection between a main central processing unit of the autonomous device and the cryptographic processing circuit of the device; and implementing a cryptographic validation of resident firmware of the main central processing unit by validating a cryptographic digital signature ascribed to the resident firmware against an up-to-date cryptographic digital signature used for installing and/or updating the resident firmware of the main central processing circuit.
US10211977B1 Secure management of information using a security module
A security module securely manages keys. The security module is usable to implement a cryptography service that includes a request processing component. The request processing component responds to requests by causing the security module to perform cryptographic operations that the request processing component cannot perform due to a lack of access to appropriate keys. The security module may be a member of a group of security modules that securely manage keys. Techniques for passing secret information from one security module to the other prevent unauthorized access to secret information.
US10211970B2 Millimeter wave CMOS engines for waveguide fabrics
The present disclosure is directed to systems and methods for communicating between rack mounted devices disposed in the same or different racks separated by distances of less than a meter to a few tens of meters. The system includes a CMOS first mm-wave engine that includes mm-wave transceiver circuitry, mm-wave MODEM circuitry, power distribution and control circuitry, and a mm-wave waveguide connector. The CMOS first mm-wave engine communicably couples to a CMOS second mm-wave engine that also includes mm-wave transceiver circuitry, mm-wave MODEM circuitry, power distribution and control circuitry, and a mm-wave waveguide connector. In some implementations, at least a portion of the mm-wave transceiver circuitry may be fabricated using III-V semiconductor manufacturing methods. The use of mm-wave communication techniques beneficially improves data integrity and increases achievable datarates, and reduces power costs.
US10211969B1 Secure system for the synchronized collection and distribution of transactional messages among untrusted geographically distributed users
A method and arrangement for the coordinated, distributed, and linearly ordered collection and publication of event streams (i.e. time series data) includes features that harden it against internal errors, network partitions, data loss/corruption, and adversaries who wish to tamper with or interrupt its operation. Two modes of operation are described, one in which events are processed in aggregate (batching), and another in which updates occur continuously across the system.
US10211967B2 Method for transmitting and receiving signal on basis of dynamic change in wireless resource in wireless communication system to which carrier aggregation scheme is applied, and device therefore
A method for transmitting and receiving a signal by a terminal in a wireless communication system is disclosed in the present invention. More particularly, the method comprises the steps of: receiving an indicator for changing the usage of a specific subframe corresponding to a sub-component carrier from a network; determining whether near-end crosstalk between the sub-component carrier and another component carrier occurs if the usage of the subframe is changed according to the indicator; and transmitting and receiving a signal to and from the network through the sub-component carrier according to the changed usage if it is determined that the near-end crosstalk does not occur.
US10211965B2 Full duplex wireless transmission with channel phase-based encryption
An apparatus includes a first transceiver, at least two antennas coupled to the first transceiver to exchange one or more keys and phase data with a second transceiver via a plurality of rounds of phase data exchange, each round including: a first pilot signal sent from a first of the antennas of the first transceiver to the second transceiver, a second pilot signal received from the second transceiver, the second pilot signal modulated using a measured first phase of the first pilot signal, a third pilot signal received from the second transceiver; a fourth pilot signal sent from a second of the antennas of the first transceiver to the second transceiver, the fourth pilot signal modulated using a measured second phase of the third pilot signal, and wherein between the plurality of rounds of phase exchange, the first transceiver perturbs a radio frequency (RF) environment surrounding the at least two antennas.
US10211954B2 System and method for OFDMA tone allocation in next generation Wi-Fi networks
An orthogonal frequency division multiple access (OFDMA) frame tone allocation includes a 256 tone payload consisting of 228 data and pilot tones and 28 null tones. The 28 null tones consist of guard tones and at least one direct current (DC) tone. In one example, the 256 tone payload consists of 224 data tones, 4 common pilot tones, and 28 null tones. In another example, the 256 tone payload consists of 222 data tones, 6 common pilot tones, and 28 null tones. In yet another example, the 256 tone payload may consist of 220 data tones, 8 common pilot tones, and 28 null tones. The OFDMA frame may be a downlink OFDMA frame or an uplink OFDMA frame.
US10211953B2 Antenna diversity schemes
Certain aspects of the present disclosure relate to methods and apparatus for implementing one or more antenna diversity schemes using communications systems operating according to 5G technologies. For example, techniques and apparatus may be provided for employing Alamouti encoding in a time domain for one or more portions of a plurality of modulated symbols associated with a first signal to be transmitted by a first antenna or a second signal to be transmitted by a second antenna to create a first plurality of encoded symbols or a second plurality of encoded symbols with tone-wise Alamouti in the frequency domain.
US10211951B2 Decoding method and apparatus
Embodiments of the present invention provide a decoding method and apparatus. The method includes: receiving K user signals by using N subcarriers, where one user signal is carried on at least two subcarriers of the N subcarriers, one subcarrier carries at least two user signals of the K user signals, and 2≤N
US10211943B2 Method and apparatus for managing a frequency spectrum in a wavelength division multiplexing network
A wavelength division multiplexing, WDM, network comprising an apparatus adapted to manage a frequency spectrum in the wavelength division multiplexing, WDM, network, the apparatus comprising an adjustment unit adapted to adjust a frequency offset between carriers for each individual carrier depending on performance characteristics of the individual carriers.
US10211941B2 Configuration of synchronisation network
Configuring a node (410, A-I, L-O) of a synchronization network, involves determining information about synchronization sources of a plurality of synchronization trails for passing synchronization information from the synchronization source (A, L, O, PRC) to the node to provide a synchronization reference. After determining automatically (210, 230, 330, 335, 340) synchonization transmission characteristics of trails (EF, FG, GH, HM, MN, OF, FI, IH) which use packet-based communication, the trails are compared automatically (240, 370), using their source information and their synchronization transmission characteristics, for selecting which of these trails to use for providing the synchronization reference for the node (N). Compared to selections made based on source alone, using the synchronization transmission characteristics of the packet based parts can enable a better choice of trail, and can enable comparison with synchronous type trails, and so enable hybrid synchronization networks to be configured and maintained.
US10211939B2 Apparatus and a method for determining a point in time
Forwarding points in time of a clock over a clock boundary is performed by launching the points in time into a buffer, such as a FIFO, in the first clock domain. The oldest point in time is fed into a FIFO or delay line in the other clock domain, which FIFO or delay line comprises a plurality of received points in time, which are shifted through the FIFO or delay line over time. An estimate of a point in time in the second clock domain is derived from a plurality of the points in time in the delay line/FIFO, such as from a mean value thereof. This point in time may be compensated for a known delay in order for this determined point in time to be identical to or close to an actual point in time of the first clock in the first clock domain.
US10211936B2 Configurable, highly-integrated satellite receiver
A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.
US10211934B2 Communication control apparatus, communication control method and radio communication apparatus
Provided is a communication control apparatus including: an information acquisition unit that acquires channel arrangement information for a first frequency channel on which an interference signal is transmitted and a second frequency channel on which a desired signal to be interfered from the interference signal is transmitted, the first frequency channel and the second frequency channel being a combination of frequency channels that can be partially overlapped with each other; and an interference control unit that determines overlapping on a frequency axis between the first frequency channel and the second frequency channel on the basis of the channel arrangement information, and calculates a protection ratio for protecting the second frequency channel from interference according to the determined overlapping.
US10211932B2 Cooperative intrusion detection
A network node in a distributed network employs a surface immunoglobulin system configured to monitor other nodes in the distributed network and generate an alert upon detecting a suspicious activity; and a free-antibody system configured to push a free-antibody program to a requesting node petitioning to access the distributed network. The free-antibody program is configured to communicatively couple to the surface immunoglobulin system while monitoring behavior of the requesting node. The free-antibody program reports detected malware and/or suspicious activity to the surface immunoglobulin system, which can enact countermeasures against the requesting node.
US10211931B1 Method of interference cancellation and transceiving device
A method of interference cancellation includes the following steps: performing a take-energy operation on a to-be-sent signal at multiple times to generate multiple to-be-sent signal powers; performing a first high-pass operation on the to-be-sent signal powers to generate a to-be-sent high-pass result; performing a second high-pass operation on a received signal to generate a received high-pass result; adjusting multiple filter coefficients according to the to-be-sent high-pass result and the received high-pass result; and generating a recover signal according to the filter coefficients.
US10211929B2 Intra-body communication device and method for eliminating inter-frame interference by randomizing transmissions time slot assignments
[Object] To provide a device capable of implementing an extended association procedure that enables compatibility with the existing association procedures. [Solution] Provided is a device including: a determination unit configured to determine whether transmission timing of a first frame received from a communication terminal is a first timing in an intra-body communication system; and a timing decision unit configured to decide timing to transmit a second frame to the communication terminal on the basis of a determination result by the determination unit.
US10211920B1 Latency based chromatic dispersion estimation methods
Optical communication systems include optical time domain reflectometers that are coupled to link fibers to determine link fiber lengths. After length measurement, chromatic dispersion associated with the measured length is estimated. In some examples, the estimated chromatic dispersion is compensated. A single OTDR can be used to assess a pair of link fibers coupling first and second network nodes by injecting a probe pulse at a common end of the link fibers or by routing the probe pulses from a remote end of one link fiber into a remote end of a second fiber.
US10211915B2 Feedback method and apparatus for transmitting and receiving multicarrier signal in wireless mobile communication system
This disclosure relates to a 5G or pre-5G communication system to be provided for supporting higher data transfer rate following a 4G communication system such as LTE. To accomplish the objective mentioned above, a method for transmitting and receiving a signal at a terminal in the mobile communication system according to one embodiment of the present application comprises the steps of: receiving, from a base station, a reference signal generated on the basis of a first filter; determining channel information on the basis of the received reference signal; transmitting the determined channel information to the base station; receiving, from the base station, information related to a second filter determined on the basis of the channel information; and receiving, from the base station, a data signal on the basis of the second filter. According to an embodiment of the present application, it is possible to maximize the signal-to-interference-plus-noise ratio (SINR) while minimizing spectral interference in the event of multiuser connection, by using a prototype filter application method and system structure.
US10211910B2 Interference cancellation repeater
According to an aspect of the inventive concept, there is provided an interference cancellation repeater for repeating a long term evolution (LTE) signal between a terminal and a base station, the interference cancellation repeater includes: an interference canceller configured to generate a restored LTE signal by canceling a feedback signal included in an input LTE signal; a sync signal detector configured to detect a first sync level which is a level with respect to a sync signal of the input LTE signal and a second sync level which is a level with respect to a sync signal of the restored LTE signal; and a gain controller configured to control a signal amplifier according to isolation calculated based on a difference between the first sync level and the second sync level.
US10211909B2 Link adaptation with RF intermediary element
A method and apparatus for link adaptation in a satellite communication system, wherein a satellite is configured to receive reverse-link (RL) communications from a user terminal (UT) via a service link and retransmit the RL communications to a satellite access network (SAN) via a feeder link. The SAN may select a reference location for the UT within a footprint of the satellite, and determine a set of operating parameters for the RL communications to achieve a target power efficiency of the satellite based on the reference location. The SAN may dynamically adjust one or more of the operating parameters, while maintaining the target power efficiency of the satellite, based at least in part on channel conditions in at least one of the service link, the feeder link, or a combination thereof. Among other advantages, the method disclosed herein may optimize RL communications based on the capabilities of the satellite.
US10211908B2 Multi-antenna relay device
Provided is a multi-antenna relay device. The multi-antenna relay device having first to n-th (n is a natural number of 2 or more) channel formed between receiving antennas and transmitting antennas corresponding to each other, comprising: first to n-th channel interference cancellation units, respectively, included in a corresponding channel among the first to n-th channels and canceling first to n-th channel interference signals corresponding to signals radiated through the first to n-th channels from signal input into the corresponding channel in real time.
US10211904B2 Power control and beamforming with a plurality of power amplifiers
A communication entity includes an antenna array with different antennas for transmitting and receiving. A combined transmission signal is generated by superposition of the transmission signals from the different antennas. Power amplifiers are each connected to one antenna. A control unit controls an input signal of each power amplifier and generates a directional combined transmission signal by controlling the phase and amplitude of each antenna. The control unit determines a total output power for the directional combined transmission signal, and determines a saturation state in which at least one power amplifier of the connected antenna is operating in a saturation state at maximum power. When the saturation state is detected, the control unit controls an input signal of at least one non-saturated power amplifier so the power emitted by at least one corresponding antenna connected to the at least one non-saturated power amplifier is increased.
US10211902B1 True time delay beam former and method of operation
An antenna system includes a plurality of true time delay (TTD) modules, each having a plurality of switching elements configured to selectively define alternative RF signal transmission paths between a signal input and a signal output of the TTD module. A controller is programmed to control the plurality of TTD modules to steer a beam according to a make-before-break switching technique by closing a first pair of switching elements within at least a subset of the plurality of TTD modules to activate a first RF signal transmission path; closing a second pair of switching elements of the subset of the plurality of TTD modules to activate a second RF signal transmission path in parallel with the first RF transmission path; and opening the first pair of switching elements of the subset of TTD modules after closing the second pair of switching elements.
US10211899B1 Systems and methods for detecting interference at an access node
Systems and methods are described for detecting interference at an access node. A rate at which packets are unsuccessful received at a wireless device may be monitored, wherein the wireless device is in communication with a cell of an access node. The access node may retransmit one or more unsuccessfully received packets to the wireless device. A retransmission metric for retransmission attempts to the wireless device from the access node may be monitored. And it may be determined that communication between the cell of the access node and the wireless device is experiencing interference from a neighboring cell when the monitored rate and monitored retransmission metric meet the interference criteria.
US10211897B2 Method for selecting antennas in full-duplex MIMO system
The present invention relates to a method for selecting transmitting and receiving antennas in a full-duplex MIMO system based on channel information. An embodiment of the present invention provides a method for selecting antennas in a full-duplex MIMO wireless communication system for communication between a first node and a second node. The method may include: calculating the number of transmitting antennas and the number of receiving antennas at a node i having an Ni number of antennas such that Nc has a maximum value, where Nc represents the number of all possible antenna set candidates, N is a natural number of 2 or higher with Ni being the sum of transmitting antennas and receiving antennas at said node i, and i is 1 or 2; and determining transmitting antennas and receiving antennas at node i in consideration of the transmission rate.
US10211892B2 Spread-OFDM receiver
In a wireless communication system, a receiver comprises an Orthogonal Frequency Division Multiplexing (OFDM) demodulator configured to demodulate a spread-OFDM signal transmitted from a user equipment (UE) to produce demodulated data symbols corresponding to OFDM subcarriers assigned to the UE. A discrete Fourier transform (DFT)-based despreader is configured to despread the demodulated data symbols to produce estimates of original data symbols, wherein the despreader employs a DFT despreading code corresponding to a DFT spreading code employed by the UE to shape the spread-OFDM signal into a plurality of uniformly spaced pulse waveforms modulated with the original data symbols. A frequency-domain equalizer may be provided to equalize and/or spatial deumultiplex the demodulated data symbols before despreading.
US10211889B2 RF architecture utilizing a MIMO chipset for near field proximity sensing and communication
A re-configurable RF architecture includes both a 2×2 MIMO mode and a 1×2 MIMO mode The 2×2 MIMO mode includes a first RF chain coupled with a first dual band antenna and configured to both transmit (Tx) and receive (Rx) using two different RF protocols. The 2×2 MIMO mode also includes a second RF chain coupled with a second dual band antenna and configured to both Tx and Rx using a single RF protocol. The first RF chain may be coupled with a third antenna configured for near field proximity sensing. The RF architecture is reversibly switchable from the 2×2 MIMO mode to the 1×2 MIMO mode when near field proximity detection is required. In the 1×2 MIMO mode the Tx/Rx capabilities of the second chain using the second dual band antenna are retained and the first chain is configured for Rx only capability using the third antenna.
US10211884B2 Receiver and method for processing a signal coming from a transmission channel
A method is for processing a channel analog signal coming from a transmission channel. The method may include converting the channel analog signal into a channel digital signal, and detecting a state of the transmission channel based on the channel digital signal to detect whether the transmission channel is, over an interval of time, one or more of linear and time invariant and linear and cyclostationary.
US10211878B2 Unified communications apparatus
A communications apparatus includes: a communications IC including a first RF pin, a second RF pin, and a third RF pin; a first front-end module connected between the first RF pin and a first RF terminal to provide a first signal path for wireless Tx and Rx, a second signal path for a first wireless LAN Rx, and a third signal path for a first wireless LAN Tx; a second front-end module connected between the third RF pin and a second RF terminal to provide a fourth signal path for a second wireless LAN Tx and a fifth signal path for a second wireless LAN Rx; and a duplexer configured to provide a first wireless LAN Tx signal to the first front-end module through the second RF pin, and provide a second wireless LAN Tx signal to the second front-end module through the second RF pin.
US10211877B2 Multi-carrier dynamic antenna diversity
An antenna diversity circuit having a plurality of processing chains including first and second processing chains configured to communicate with a first antenna, and process signals for first and second carriers, respectively, and third and fourth processing chains configured to communicate with a second antenna, and process signals for the first and second carriers, respectively; and a dynamic antenna diversity controller configured to activate one or more of the plurality of processing chains based on a predetermined set of criteria.
US10211870B2 Wearable article with multi-frequency wireless communication
A wearable article, system, and methods may include a structure configured to enclose a human body part. A first antenna, positioned with respect to the structure, is tuned to communicate, while the wearable article is being worn, according to a first wireless communication modality with a first external antenna. A second antenna, positioned with respect to the structure, is tuned to communicate according to a second wireless communication modality with a second external antenna different than the first external antenna, the second communication modality being different than the first communication modality. A transceiver, coupled to at least one of the first antenna and the second antenna, is configured to communicate via one of the first and second antennas based, at least in part, on the one of the first and second antennas coming into wireless communication contact with a corresponding one of the first and second external antennas.
US10211869B2 Card tray having a bolt joining floatingly a front door and a rear tray portion
A card tray for an electronic device having a housing includes: a front door having an outer face and being adapted to be received in a slot opening of the housing; a rear tray portion configured to support an electronic card; and a bolt joining a rear end of the door and a front end of the tray portion together floatingly.
US10211866B2 Dual receive processing in wireless communications
A technique, as well as select implementations thereof, pertaining to dual receive processing in wireless communications is described. The technique may involve receiving, by a plurality of receive processing modules, an incoming signal from an antenna to provide a plurality of processing results. The technique may also involve generating, by a determination mechanism, a determination output based on the plurality of processing results. The determination output may include either one or more decoding metrics based on a respective processing result from one of the plurality of receive processing modules or a weighted combination of more than one respective processing result from more than one receive processing module of the plurality of receive processing modules. The technique may further involve decoding, by a decoder, the determination output to provide a decoded signal.
US10211864B2 Radio-frequency module and communication device
A radio-frequency module includes a multilayer substrate, an input switch, an output switch, and filters. A switch IC is disposed on a main surface of the multilayer substrate. The input switch is disposed in the switch IC and includes a first input terminal and first output terminals. The output switch is disposed in the switch IC and includes second input terminals and a second output terminal. The filters are disposed outside the switch IC and are connected to the first output terminals and the second input terminals. In a plan view of the multilayer substrate, the first input terminal and the first output terminals are disposed close to a first side of an exterior of the switch IC, and the second input terminals and the second output terminal are disposed close to a second side different from the first side of the exterior of the switch IC.
US10211862B2 Methods for reducing radiated emissions from power amplifiers
Apparatus and methods for orienting power amplifiers are disclosed herein. In certain implementations, a method of determining the physical orientation of power amplifiers laid out on a printed circuit board (PCB) is provided. The method includes determining an amount of emissions radiated by a first power amplifier die that is positioned in a first orientation on the PCB. The method further includes determining an amount of emissions radiated by a second power amplifier die that is positioned in a second orientation on the PCB. The method further includes determining a third orientation of the second power amplifier die different than the second orientation, such that when the second power amplifier die is in the third orientation, the amount of emissions radiated by the first power amplifier die and the amount of emissions radiated by the second power amplifier die are distributed in different directions.
US10211860B2 Apparatus and methods for front-end systems with reactive loopback
Apparatus and methods for front-end systems with reactive loopback are provided. In certain configurations, a front-end system includes a transmit port that receives a transmit signal, an antenna port, a receive port, and an antenna switch connected along a transmit path between the transmit port and the antenna port. The front-end system further includes a loopback circuit including a reactive loopback impedance and a back switch electrically connected in series in a loopback path between the transmit port and the receive port. The loopback circuit provides a portion of the transmit signal to the receive port when the back switch is activated. Using reactive loopback impedance in the loopback circuit reduces an insertion loss of the transmit path relative to a configuration using resistive loopback impedance.
US10211858B2 Wireless communication device
A wireless communication device is provided. The wireless communication device includes a housing, a circuit board, a radio frequency module and an antenna. The housing has a frame and a back cover to define a receiving space. The circuit board is disposed in the receiving space, and defines a clearance area from the housing in the receiving space. The circuit board includes a ground terminal, a first feeding point, and a second feeding point. The antenna includes at least one metal conductor coupled to the first feeding point and the second feeding point, respectively, to provide a low frequency resonant path, a first middle frequency resonant path, a second middle frequency resonant path and a high frequency resonant path.
US10211857B2 Front-end architecture that supports uplink carrier aggregation and simultaneous MIMO using switch combining
Described herein are front-end architectures that use switch-combining in a MIMO module to provide uplink carrier aggregation and simultaneous MIMO operations in a plurality of band combinations. The front-end architectures include a combination of low-band, mid-band, high-band, MIMO, and uplink carrier aggregation modules to provide the described functionality. To provide certain band combinations, one or more of the modules can implement switchplexing to provide the targeted functionality.
US10211853B2 Method of transmitting and receiving audio signals and apparatus thereof
Example embodiments disclosed herein relate to a method of transmitting an audio signal and also a method of receiving an audio signal. The method of transmitting the audio signal includes: receiving the audio signal including a plurality of frames having a left and right subframes containing audio data of a first number of bits; encoding the left and right subframes into a parity code of a second number of bits; generating serial data by combining the parity code and the audio data; and transmitting the serial data over an audio transmission media having a bandwidth of a third number of bits, a sum of the first number of bits and the second number of bits being below the third number of bits. The method of receiving the audio signal includes: receiving a serial signal combining a parity code; decoding the serial signal by calculating a syndrome based on the parity code; detecting an error by comparing the syndrome with the audio data; and generating a corrected audio signal by correcting the detected error.
US10211851B2 Method and system for compressing data from smart meter
The present invention relates to a method and a system for compressing data from a smart meter. The method comprises: LZ-encoding electricity load data collected by the smart meter whenever the smart meter collects the electricity load data; storing the LZ-encoded electricity load data in a temporary database through a smart grid communication channel; reading the electricity load data from the temporary database every preset second duration, wherein the read electricity load data is electricity load data stored in the temporary database within the second duration before a corresponding reading time point; and LZ-decoding the read electricity load data, SAX-compressing the LZ-decoded electricity load data, and storing the SAX-compressed electricity load data in a data center. The present invention has high compression rate, reduces the transmission burden for communication lines and storage burden for the data center, and improves the efficiency of smart electricity data analysis and mining.
US10211848B1 Delta sigma modulator systems and methods
Systems and methods according to one or more embodiments are provided for improving noise performance in a delta sigma modulator comprising an adder, quantizer and nth order filter. The adder is operable to receive an input signal and a feedback signal, and output a modified input signal. The quantizer is operable to receive the modified input signal and output a quantized output signal, the quantized output signal having a corresponding quantization error. The nth order filter is operable to receive a quantization error value and generate the feedback signal, the nth order filter comprising a first memory element having a first error value, a second memory element having a second error value, and a gravity component operable to converge the first error value and the second error value when the input signal is approximately zero.
US10211845B2 Semiconductor device and method therein
Degradation of a reception performance by an image signal is reduced. A semiconductor device includes: an oscillation circuit configured to generate a local signal; a mixer configured to multiply a reception signal by the local signal; an analog filter configured to filter a signal output from the mixer; an AD converter configured to digitalize a signal that has passed through the analog filter to generate a first signal; a digital filter configured to filter a signal that has passed through the AD converter to generate a second signal; a power comparator configured to detect the power difference between the first signal and the second signal; a register configured to store a theoretical power difference; and a determination unit configured to determine a frequency of the local signal based on the power difference from the theoretical power difference.
US10211844B1 Minimum search length analog to digital converter
The disclosure relates converting an analog input signal to a digital output signal in a number of successive approximation cycles. A sampled analog input signal is received, and a decision node is loaded from a decision tree stored in memory, where each decision node in the decision tree stores an optimal threshold value and an address to one or more next decision nodes. The optimal threshold value, a first output flag and a second output flag associated with a currently loaded decision node is read from the decision tree in the memory, and the sampled first analog input signal is compared with the optimal threshold value and, based on a result of the comparison, a next decision node is loaded from the decision tree stored in memory according to the address associated with the currently loaded decision node or the digital output signal is output.
US10211836B2 Configurable computing array based on three-dimensional printed memory
The present invention discloses a configurable computing array based on three-dimensional printed memory (3D-P). It comprises an array of configurable computing elements, an array of configurable logic elements and a plurality of configurable interconnects. Each configurable computing element can selectively realize a basic function in a math library. It comprises a plurality of 3D-P arrays storing the look-up tables (LUT) for the basic functions in the math library.
US10211833B2 Techniques for power control of circuit blocks
An integrated circuit includes a circuit block, a storage circuit that stores a static power gating control signal, a logic gate circuit that receives a dynamic power gating control signal and the static power gating control signal from the storage circuit, and a transistor coupled between the circuit block and a supply node at a supply voltage. A conductive state of the transistor is determined by an output signal of the logic gate circuit. The transistor is turned off to provide power gating to the circuit block in response to a change in the output signal of the logic gate circuit that is caused by the static power gating control signal or by the dynamic power gating control signal.
US10211832B1 Input buffer circuit
An example apparatus according to an embodiment of the disclosure includes first and second voltage terminals, and first, second, and third circuit nodes. A potential of the first circuit node is changed based on an input signal. A flip-flop circuit includes first and second inverters cross-coupled to each other. The first inverter is coupled between the first voltage terminal and the second circuit node. A first transistor is coupled between the second and third circuit nodes, and the first transistor has a control electrode coupled to the first circuit node. A first current control circuit is coupled between the third circuit node and the second voltage terminal, and an amount of current flowing through the first current control circuit being controlled based on a first code signal.
US10211829B2 Semiconductor switch and communication module
A semiconductor switch includes a first switching element connected between a first terminal and a second terminal, a second switching element connected between the second terminal and a third terminal, a first resonant circuit having a zero impedance when resonating at a first frequency, a second resonant circuit having a zero impedance when resonating at N times the first frequency, wherein N is an integer greater than 1, and a transmission line having a first point connected to the second terminal, a second point connected to the first resonant circuit, and a third point connected to the second resonant circuit. A length of the transmission line between the first and second points corresponds to one-quarter of a wavelength corresponding to the first frequency, and a length of the transmission line between the first and third points corresponds to one-half of the wavelength corresponding to the first frequency divided by N.
US10211828B2 Driving device for insulated gate semiconductor element, and driving system for the same element
A driving device includes: a driving circuit operating with a single power supply in accordance with a driving signal; a first parallel circuit formed of a first capacitor and a first zener diode connected together in parallel, and having a first end connected to an output terminal of the driving circuit; a series circuit connected between a second end of the first parallel circuit and a ground of the driving circuit, and formed of a diode and a second parallel circuit (of a second capacitor and a second zener diode) connected to each other in series; and a resistor is connected between the second end of the first parallel circuit and the ground of the driving circuit. A voltage across the resistor is used as an output voltage for driving the insulated gate semiconductor element. A voltage across the first capacitor is superimposed negative-wise on the output voltage.
US10211827B2 Resonant gate driver
A gate driver of a power device includes a power supply and a resonant circuit. The power supply may have a positive potential and a negative potential. The resonant circuit may include an inductor and be configured to recirculate charge during turn-off by inducing a first field based on a positive charge from a gate caused by the positive potential, and in response to reversal of a voltage across the inductor, collapsing the first field to draw charge from the gate.
US10211821B2 Clock signal transmission circuit and driving method thereof, gate driving circuit, and display device
Embodiments of the present disclosure provide a clock signal transmission circuit, a driving method thereof, a gate driving circuit, and a display device. The clock signal transmission circuit includes an input circuit, a pull-up circuit, a reset circuit, a pull-down control circuit, a pull-down circuit, and a pull-up holding circuit. According to an embodiment of the present disclosure, the clock signal source can be disconnected from each shift register unit in the gate driving circuit before a screen is displayed, preventing malfunctions of the gate driving circuit caused by an undesired high voltage on the clock signal line.
US10211818B2 Interpolator
An interpolator includes a first delay circuit, a second delay circuit, and a tunable delay circuit. The first delay circuit delays a first input signal for a fixed delay time, so as generate a first output signal. The second delay circuit delays a second input signal for the fixed delay time, so as to generate a second output signal. The tunable delay circuit delays the first input signal for a tunable delay time, so as to generate an output interpolation signal. The tunable delay time is determined according to the first output signal, the second output signal, and the output interpolation signal.
US10211817B2 Low voltage differential signalling device
A LVDS device, comprising: a first pair of switches, operable to drive current from a first output to a second output through a differential signalling circuit; a second pair of switches, operable to drive current from the second output to the first output through the differential signalling circuit; a voltage limiter, connected in series with the first and second pair of switches, operable to receive a control voltage and, responsive to the control voltage, to limit a voltage at each of the first and second output to less than a clamping voltage when current is driven through the differential signalling circuit.
US10211815B2 Systems and methods for supplying different voltage levels with shared current
An integrated circuit includes a first portion of a stacked ring oscillator coupled between a first supply voltage node and a common node, wherein the first supply voltage node provides a local supply voltage for the first portion and the common node provides a local ground for the first portion. The integrated circuit includes a second portion of the stacked ring oscillator coupled between the common node and a second supply voltage node wherein the common node provides a local supply voltage for the second portion and the second supply voltage node provides a local ground for the second portion. The integrated circuit also includes a voltage divider having a first resistive element coupled between the first supply node and the common node and a second resistive element coupled between the common node and the second supply node.
US10211814B2 Method for equalising distorted signals and an associated equalisation filter
The equalization filter implements an equalization of at least one signal distorted by a measurement setup. The filter coefficients of the equalization filter can be determined by minimizing a cost function K in which only sequences of filter coefficients which exert significant influence on the equalization are taken into consideration.
US10211811B2 Tunable filter
The disclosure relates to a tunable filter. The tunable filter includes: a filter input; a filter output; at least one feedback loop coupled between the filter output and the filter input, where the at least one feedback loop includes at least one tunable feedback capacitance which is configured to tune a cut-off frequency of the tunable filter; and an active element, coupled between the filter input and the filter output and configured to drive the at least one tunable feedback capacitance, the active element having a transfer function with a primary pole and at least one secondary pole, where the active element includes a first stabilization element that is coupled to a first internal node of the active element.
US10211804B2 Method of manufacturing integrated circuit configured with two or more single crystal acoustic resonator devices
A method of fabricating a configurable single crystal acoustic resonator (SCAR) device integrated circuit. The method includes providing a bulk substrate structure having first and second recessed regions with a support member disposed in between. A thickness of single crystal piezo material is formed overlying the bulk substrate with an exposed backside region configured with the first recessed region and a contact region configured with the second recessed region. A first electrode with a first terminal is formed overlying an upper portion of the piezo material, while a second electrode with a second terminal is formed overlying a lower portion of the piezo material. An acoustic reflector structure and a dielectric layer are formed overlying the resulting bulk structure. The resulting device includes a plurality of single crystal acoustic resonator devices, numbered from (R1) to (RN), where N is an integer greater than 1.
US10211799B2 High-frequency filter
A high-frequency filter (10) includes a first input-output terminal (P1), a second input-output terminal (P2), a variable frequency filter (20), and a fixed frequency filter (30). The variable frequency filter (20) and the fixed frequency filter (30) are connected in series and coupled between the first input-output terminal (P1) and the second input-output terminal (P2). The variable frequency filter (20) is a filter capable of varying a passband and an attenuation band. The fixed frequency filter (30) is a filter having a fixed passband and a fixed attenuation band. The passband of the fixed frequency filter (30) is set so as to be at least partially overlapped with multiple passbands realized by the fixed frequency filter (30).
US10211798B2 Driving the common-mode of a Josephson parametric converter using a short-circuited coplanar stripline
Techniques relate to an on-chip Josephson parametric converter. A Josephson ring modulator includes four nodes. A lossless on-chip flux line is capacitively coupled to two adjacent nodes of the four nodes of the Josephson ring modulator. The lossless on-chip flux line has an input port configured to receive a pump drive signal that couples differentially to the two adjacent nodes of the of the Josephson ring modulator. The pump drive signal thereby excites a common mode of the on-chip Josephson parametric converter.
US10211797B2 Bidirectional amplifier
A bidirectional amplifier includes first and second ports, with a first summing node connected to the first port and a second summing node connected to the second port. First and second gain stages are connected between the first and second summing nodes, respectively, and a first node. First and second feedback stages are also connected between the first and second summing nodes, respectively, and the first node. The amplifier operates in a first mode in which an amplified version of a signal applied to the first port is provided at the second port, or a second mode in which an amplified version of a signal applied to the second port is provided at the first port. The first and second gain stages are preferably first and second common emitter cascode arrangements, and the first and second feedback stages are preferably first and second emitter followers.
US10211794B1 Silicon shielding for baseband termination and RF performance enhancement
An RF amplifier device includes a semiconductor die and an integrated passive device (IPD) on a ground flange. The IPD includes a semiconductor substrate and a metal-insulator-metal (MIM) capacitor coupled to the semiconductor substrate. The MIM capacitor includes a first electrode, a second electrode, and a dielectric between the first electrode and the second electrode. A first RF capacitor is over the semiconductor substrate and a second RF capacitor is over the semiconductor substrate. A metal layer is patterned to form a portion of an elevated metal shielding structure, a first plate of the first RF capacitor and a first plate of the second RF capacitor. The elevated metal shielding structure is over the MIM capacitor. The IPD is electrically coupled to the semiconductor die.
US10211793B1 Method and a device for detecting oscillation and signal coupling device
A method for detecting oscillation in a signal coupling device includes at least one oscillation detection step. The oscillation detection step includes the steps of determining an undamped signal level of a signal on a signal path of the signal coupling device in a first step, reducing a gain of the signal path in a second step, and determining a damped signal level of the signal on the signal path and a deviation between the undamped signal level and the damped signal level at least once in a third step. An oscillation is detected if at least one deviation determined in the third step of the at least one oscillation detection step is higher than or equal to a predetermined oscillation threshold value. A device for detecting oscillation in a signal coupling device and a signal coupling device are also provided.
US10211792B2 Sensor amplifier arrangement and method of amplifying a sensor signal
A sensor amplifier arrangement includes an amplifier having a signal input to receive a sensor signal and a signal output, and a feedback path that couples the signal output to the signal input, wherein the feedback path includes an anti-parallel circuit of diodes, and a voltage divider including a first and a second divider resistor and a voltage divider tap between the first and the second divider resistor, wherein the voltage divider couples the signal output to a reference potential terminal, and the voltage divider tap is coupled to the anti-parallel circuit of diodes and the anti-parallel circuit of diodes is coupled to the signal input.
US10211790B2 Peaking amplifier frequency tuning
A circuit including: input and output nodes and first and second feedback nodes; a first input amplifier having an input connected to the input node and an output connected to the first feedback node; a second input amplifier having an input connected to the input node and an output connected to the second feedback node; a capacitor connecting the first feedback node and the second feedback node; an amplifier having an input connected to the first feedback node and an output connected to the output node; a base feedback amplifier with an input connected to the output node and an output connected to the first feedback node; a tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and a tuning circuit for varying a transconductance of the tunable feedback circuit and operational frequency of the peaking amplifier circuit.
US10211788B2 Resistor linearization during current and voltage conversion
A converter circuit is provided that includes an amplifier circuit and further includes: a summing current resistor that exhibits nonlinear resistance coupled between a voltage node and a summing current node of the amplifier; a compensation resistor circuit includes resistors that exhibit nonlinear resistance; the compensation resistor circuit produces a compensation current at the summing current node that compensates for nonlinear current flow in the summing current resistor.
US10211787B2 Phase shift and attenuation circuits for use with multiple-path amplifiers
Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.
US10211786B2 Mixed-signal power amplifier and transmission systems and methods
The disclosed technology includes device, systems, techniques, and methods for amplifying a complex modulated signal with a mixed-signal power amplifier. A mixed-signal power amplifier may include an input network for splitting an input signal to multiple signals with corresponding phase and amplitude offsets, a main power amplification path including at least an analog power amplifier for amplifying a first signal, one or more auxiliary power amplification paths including at least one digitally controlled analog power amplifier in each path for amplifying a second signal, and an output network for combining the two amplified signals. The main power amplification path and the auxiliary power amplification paths can operate together to achieve load modulation to enhance the overall power amplifier efficiency at power back-off mode and the overall power amplifier linearity. The disclosed technology further includes transmission systems incorporating the mixed-signal power amplifier.
US10211785B2 Doherty amplifiers with passive phase compensation circuits
An embodiment of a Doherty amplifier includes first and second amplifier paths with first and second amplifiers, respectively, a power divider, a series delay element, and a short-circuited stub. The power divider is configured to receive a radio frequency (RF) signal and to divide the RF signal into first and second input signals that are produced at first and second power divider outputs. The series delay element is coupled between the first power divider output and the first amplifier. The short-circuited stub is coupled between the first power divider output and the first amplifier or between the second power divider output and the second amplifier. The first amplifier path is characterized by a first frequency-dependent insertion phase, the second amplifier path is characterized by a second frequency-dependent insertion phase, and a slope of the first or second frequency-dependent insertion phase is altered by the short-circuited stub.
US10211782B1 Low-power wide-swing sense amplifier with dynamic output stage biasing
A rail-to-rail sense amplifier includes a PMOS differential pair and an NMOS differential pair that are arranged in parallel with regard to a biasing network for driving a class AB output stage. The sense amplifier includes a first current differential amplifier and a second current differential amplifier for increasing the output swing while reducing power consumption.
US10211780B2 Alternating anti-parallel diode mixer structure
An apparatus includes a first circuit and a second circuit. The first circuit may have a first diode and a second diode connected as anti-parallel diodes and physically adjacent to each other in a substrate. The second circuit may have a third diode and a fourth diode connected as anti-parallel diodes and physically adjacent to each other in the substrate. The first circuit and the second circuit may be configured to mix two input signals to generate an output signal. A polarity of every other physically neighboring diode may be reversed.
US10211779B2 Boosting varactor capacitance ratio
A voltage controlled oscillator comprises a negative resistance, a first inductor, a fixed capacitor, and a frequency control component. The frequency control component comprises at least one varactor and at least a second inductor connected in series with the at least one varactor. A magnitude of an inductance of the second inductor is selected such that the frequency control component has an effective capacitance range larger than a capacitance range of the at least one varactor.
US10211777B2 Photovoltaic power generator output estimation method and device, and power system monitoring device using same
The output of a photovoltaic power generator is estimated by estimating a solar radiation amount at a point different from solar radiation measurement points and determining an estimation error amount from solar radiation values measured at limited points. A photovoltaic power generator output estimation method estimates an output of a photovoltaic power generator based on a measured solar radiation value. The method includes a first estimation method of estimating a solar radiation amount at a photovoltaic power generator installation point from solar radiation meter installation point information, a value measured by a solar radiation meter, and photovoltaic power generator installation point information; a second estimation method of estimating the solar radiation amount at the photovoltaic power generator installation point in a manner different from that of the first estimation method; an output estimation method of estimating the output of the photovoltaic power generator from an estimated solar radiation amount and a rated capacity of the photovoltaic power generator; and an error estimation method of determining an estimation error of a photovoltaic power generator output from a difference between the first and second estimation methods.
US10211775B1 Rail-less roof mounting system
A roof mounting system for the attachment of an article to a roof, the system comprising a plurality of PV modules each having at least one corner and a frame member, a flashing member having a top surface; an upstanding sleeve attached to the top surface of the flashing member; an elevated water seal having a borehole formed therethrough, the elevated water seal further comprising at least one screw for providing a waterproof seal between the article and the roof structure; and whereby the plurality of PV modules are interlocked in a way to provide a corner-to-corner coupling arrangement supported above the roof through the frame members of the plurality of PV modules.
US10211774B2 Mounting apparatus for solar panels
The present invention provides a mounting assembly for attaching solar panels to a rooftop. The assembly allows for convenient installment and adjustment of the panels.
US10211770B2 Motor drive control device and control method thereof
There is provided a motor drive control device comprising: a temperature detection unit to detect a temperature of a motor; a rotational frequency detection unit to detect a rotational frequency of the motor based on an output of a rotational position sensor provided in the motor; a supply voltage detection unit to detect a supply voltage; a load calculation unit to calculate a magnitude of a load of the motor based on a detection result of the supply voltage detection unit; an advance angle instruction unit to set an advance angle instruction value based on a detection result of the temperature detection unit, a detection result of the rotational frequency detection unit and a calculation result of the load calculation unit; and a motor drive unit to supply a driving electric power to the motor based on a speed instruction value relevant to a rotational speed of the motor and the advance angle instruction value set by the advance angle instruction unit.
US10211766B2 Multi-turn angle controlling method based on an absolute position encoder and device
The present disclosure relates to a multi-turn angle controlling method based on an absolute position encoder, including: obtaining a target angle according to a starting position and a target position, and obtaining number of times N that the target angle passes a predetermined position, determining whether an absolute value of the target angle being greater than 360 degrees, conducting a first operation mode upon determining that the absolute value of the target angle being greater than 360 degrees, incrementing M by one when the operation angle passes the predetermined position until M equals to N, M is a positive integer and an initial value of M is zero, and conducting a second operation mode when M equals to N, N is a positive integer greater than 1.
US10211763B2 Method for automatically identifying speed operation range in a mechanical system driven by PMSM or induction motors under friction and load condition
As speed operation range identification system for motion systems driven by permanent magnet synchronous motors (PMSMs) or induction motors leverages both characteristics of the motor as well as dynamic characteristics of the motion system—including the friction and load—to identify suitable maximum speeds for operation of the motion system in the normal speed and field weakening regions. The identification system can model both motor characteristics as well as real-time dynamics of the controlled mechanical system that may vary during operation. The system can apply an optimization algorithm to this model to determine suitable maximum speeds for operation in the normal speed and/or field weakening regions. The determined maximum speeds can be used to perform substantially real-time adjustments to motion profile limits or current reference values generated by the motor controller in order to ensure that the speed of the system remains below the determined maximum.
US10211753B2 Power conversion device and air-conditioning apparatus
Provided is a power conversion device including: a step-up converter unit, including a reactor to which a DC voltage is to be input, a switching element connected to the reactor in parallel, and a backflow prevention element connected to the reactor in series; a smoothing capacitor configured to smooth an output voltage from the step-up converter unit; an inverter unit configured to convert the output voltage smoothed in the smoothing capacitor into an AC voltage; a dew condensation state detection unit configured to detect a state of dew condensation, which occurs due to a cooler configured to cool the step-up converter unit and the inverter unit; and a control unit configured to control an operation of the step-up converter unit, wherein the control unit includes: a determination unit configured to determine the state of dew condensation detected by the dew condensation state detection unit; and a step-up control unit configured to control a step-up operation of the step-up converter unit based on a result of determination made by the determination unit.
US10211747B2 System and method for operating a DC to DC power converter
A direct current (DC) to DC power converter includes a first bus converter for converting a first DC bus voltage into a first high frequency AC voltage and a second bus converter for converting a second high frequency alternating current (AC) voltage into a second DC bus voltage. The DC to DC converter also includes a resonant circuit for coupling the first bus converter and the second bus converter and a controller for providing switching signals to the first bus converter and the second bus converter to operate the power converter in a soft switching mode. The controller includes a switching frequency controller for determining a switching frequency signal for the power converter based on a reference output current and a phase shift controller for determining a phase shift signal for the power converter. When the reference output current is lower than the a first load current value the switching frequency signal is maintained at a first switching frequency and the phase shift is determined according to the reference output current. Further, when the reference output current is above a second load current value the switching frequency signal is maintained at a second switching frequency and the phase shift is determined according to the reference output current. When the reference output current is between the first load current value and the second load current value, the switching frequency signal is adjusted according to a value of the reference output current and the phase shift is determined based on the switching frequency, the reference output current and perturbations in the output current.
US10211746B1 Integrated transformer
Disclosed is an integrated transformer used in a resonant converter. The integrated transformer includes a primary side circuit, a secondary side circuit and an integrated core. A first voltage received by the primary side circuit is converted to a second voltage due to the electromagnetic induction, and the second voltage is outputted by the secondary side circuit. The primary side circuit is configured on the integrated core. The integrated core includes many iron rings, and the iron rings have a common side. The common side of the iron rings is a center column of the integrated core, and the other sides of the iron rings are rim columns of the integrated core. The coils of the primary side circuit are configured respectively to the rim columns of the integrated core, and the coils of the primary side circuit are connected in serial.
US10211743B2 Method and apparatus for a control circuit with multiple operating modes
A method for controlling a power converter switch includes operating the power converter switch in first, second, and third duty cycle control modes in response to a feedback signal representative of an output of the power converter. The first duty cycle control mode includes modulating a peak switch current of the power converter switch in response to the feedback signal, and switching the power converter switch at a substantially fixed first switching frequency value. The second duty cycle control mode includes modulating the switching frequency in response to the feedback signal, and maintaining the peak switch current substantially at a peak switch current threshold value. The third duty cycle control mode includes modulating the peak switch current of the power converter switch in response to the feedback signal, and switching the power converter switch at a substantially fixed second switching frequency value.
US10211740B2 Systems and methods for high precision and/or low loss regulation of output currents of power conversion systems
Systems and methods are provided for signal processing. An example error amplifier for processing a reference signal and an input signal associated with a current of a power conversion system includes a first operational amplifier, a second operational amplifier, a first transistor, a second transistor, a current mirror component, a switch, a first resistor and a second resistor. The first operational amplifier includes a first input terminal, a second input terminal and a first output terminal, the first input terminal being configured to receive a reference signal. The first transistor includes a first transistor terminal, a second transistor terminal and a third transistor terminal, the first transistor terminal being configured to receive a first amplified signal from the first output terminal, the third transistor terminal being coupled to the second input terminal.
US10211739B2 Methods and apparatus for an integrated circuit
Various embodiments of the present technology may comprise methods and apparatus for an integrated circuit (IC). The methods and apparatus may comprise an integrated circuit comprising a sensor circuit and a driver circuit coupled to the sensor circuit. The driver circuit may include an amplifier configured to generate a bias voltage, a signal converter circuit coupled to the amplifier, and a control circuit coupled to the amplifier. The control circuit may comprise a switch responsive to a control signal and a transistor coupled to the switch.
US10211738B2 DC-DC conversion circuit system and forming method thereof
The present application relates to the field of circuit design, and discloses a DC-DC conversion circuit system and a forming method thereof. The system may include a primary switch circuit, a charge/discharge circuit, and a secondary switch circuit. The primary switch circuit includes a voltage supply end configured to receive a first direct current voltage and an output end. The charge/discharge circuit includes an input end connected to the output end of the primary switch circuit, and a first output end configured to output a second direct current voltage. The secondary switch circuit includes a voltage supply end configured to receive the first direct current voltage, and an output end connected to the output end of the primary switch circuit. The primary switch circuit is configured to control the charge/discharge circuit to charge or discharge. When a charging current or a discharging current of the charge/discharge circuit is greater than a corresponding threshold, the secondary switch circuit is configured to shunt the charging current or the discharging current. The present application can effectively suppress a ripple of an output voltage, and improve stability of the DC-DC conversion circuit system.
US10211735B1 Voltage converter for fast load transient response
A voltage converter for fast load transient response adapted for a boost type voltage converter determines whether a transient state occurs, that is, whether a load is converted from a heavy load to a light load, according to a transient detection circuit. When the transient state occurs, an inductive current quickly drops to a corresponding current value to accelerate the rate of an output voltage returning to a stable voltage value, and to shorten a time of load transient response, so as to avoid affecting the performance of a load, especially a sensitive load.
US10211731B2 Semiconductor device and display device
A semiconductor device includes: a first switching power supply part including a switching element, an inductor connected to the switching element, and a pulse width modulation (PWM) driving signal generating part configured to generate a PWM driving signal having a duty controlled based on a feedback of an output voltage, wherein the switching power supply part is configured to switching-drive the switching element based on the PWM driving signal to generate the output voltage from an input voltage and supply the output voltage to a load; and an abnormality detecting part having a duty calculation part configured to calculate the duty of the PWM driving signal and a comparing part configured to compare the calculated duty and a predetermined first threshold value to output a first detection signal to indicate abnormality when the duty is lower than the first threshold value.
US10211718B2 Power supply which starts or stops boosting based on an unbalanced state of the AC source
According to one embodiment, when an effective value of an input current flowing into a booster circuit rises to a value greater than or equal to a second set value, boosting of the booster circuit is started and, after the start, when the effective value lowers to a value lower than a first set value lower than the second set value, boosting of the booster circuit is stopped. Then, if the three-phase AC source is in an unbalanced state, the first set value is set to a value lower than usual.
US10211717B2 Power supply device and image forming apparatus
A power supply device includes a switching unit configured to switch to a first path in which a current smoothed by a smoothing unit is supplied to a boost converter and to a second path in which the smoothed current is supplied to a load without passing through the boost converter. The switching unit includes a first switching element to be turned on and a second switching element to be turned off when the first path is formed.
US10211714B2 Vibration motor
A vibration motor is disclosed. The vibration motor includes a housing, a substrate engaging with the housing, a vibration unit received in the housing, an elastic member suspending the vibration unit, and a coil assembly interacting with the vibration unit. The vibration unit includes a pit corresponding to the elastic member for providing an extra space for a tool to fix the elastic member to the housing.
US10211706B2 Rotating electrical machine
A frame of an electric motor opens in one end. A heat sink, to which a control substrate is connected, closes an opening of the frame. The frame includes a cylinder portion to which a stator is fixed, and a bottom portion that extends inward in the radial direction from the cylinder portion. A rotor is rotatably mounted in the frame to face the stator in the radial direction. A circumferential groove is formed in the bottom portion to face a stator coil in an axis of rotation direction. The circumferential groove is filled with a heat transfer gel. A coil end portion of the stator coil is inserted into the heat transfer gel.
US10211702B2 Electric motor/generator with integrated differential
An electrical machine comprising: at least one stator, at least one module, the at least one module comprising at least one electromagnetic coil and at least one switch, the at least one module being attached to the at least one stator; at least one rotor with a plurality of magnets attached to the at least one rotor, an integrated electrical differential coupled to at least one of the rotors, the at least one integrated electrical differential permitting the at least one rotor to output at least two rotational outputs to corresponding shafts, wherein the at least two rotational outputs are able to move the shafts at different rotational velocities to one another. The electrical machine is configured to fit into a housing, and that can be retrofitted into a conventional vehicle by replacing the mechanical differential.
US10211696B2 Motor
A motor may include first housing installed with a stator and a rotor, and a second housing configured to form a refrigerant passage by being distanced from the first housing. When the second housing is coupled to the first housing, a first pipe is configured to introduce refrigerant into the refrigerant passage by communicating with the refrigerant passage, and a second pipe is configured to discharge the introduced refrigerant. A plurality of passage lugs are configured to be positioned at the refrigerant passage to flow the refrigerant in a zigzag manner.
US10211695B2 Stator component group for an electric motor
A stator module for an electric motor has a stator laminated core with a number of inwardly directed stator teeth and a rotating-field winding with a plurality of phases arranged on the stator teeth. The rotating-field winding has at least one coil per phase, which coil is electrically connected to a first phase end and a second phase end. A laying ring is placed onto the stator laminated core at the end face and surrounds the stator teeth as coil body in order to guide the rotating-field winding. An annular cover is placed onto the laying ring at the end face, on which cover each of the phase ends is contacted with one of the phase ends of another phase, in such a way that the entire rotating-field winding does not protrude radially externally beyond an outer periphery of the stator laminated core.
US10211693B2 Mounting of permanent magnets on a rotor of an electric machine
A rotor for an electric machine has a surface with projections. Each projection protrudes from the rotor in an essentially axial direction and is configured to define a groove between the projection and the surface. The groove of one projection of two adjacent projections and the groove of the other one projection of the two adjacent projections is open towards a region between the adjacent two projections. A cover engages in the grooves of the adjacent two projections, and a sealing compound is applied in the form of a fillet seam between the cover and the adjacent two projections. Received in an intermediate space between the cover and the surface is a permanent magnet, and a pouring compound is received in a remaining hollow space defined between the permanent magnet and the cover and/or the permanent magnet and the surface.
US10211691B2 Permanent magnet rotor for an electric machine
A permanent magnet having end surfaces and an envelope curve shaped as a biconvex lens having first and second convex portions, magnetization running in an arcuate manner along the first convex portion between a north pole and a south poles. The permanent magnet runs along the second convex portion in an arcuate manner, and at least one of the magnet's end surfaces within the envelope curve has a connection surface adapted for connecting with a connection device by fusing or by positive engagement. The rotor is preferably pressed onto the shaft of the rotor after the connection device is formed around a connection surface of the permanent magnets by injection molding.
US10211687B2 Permanent magnet motor with axial ventilation holes, refrigeration compressor and air conditioning unit
A stator and a rotor are mounted inside a case of a permanent magnet motor, and separate the inner cavity of the case into a first inner cavity and a second inner cavity. An air gap is formed between an inner circle surface of the stator and an outer circle surface of the rotor. Axial ventilation holes in communication with the first inner cavity and with the second inner cavity are disposed in teeth of a stator core. The rotor comprises a rotor core and rotor pressing rings disposed in an axial direction at both sides of the rotor core. A partition is disposed between the rotor core and at least one of the rotor pressing rings. An outer edge of the partition extends into the air gap, thus enhancing the air blocking effect and realizing a higher cooling efficiency.
US10211686B2 Techniques for reducing messaging requirements in wireless power delivery environments
Techniques are described for retention of known data within a wireless power transmission system, or within a cloud-based processing system. In order to perform scheduling procedures for determining which device to power, it is necessary to collect data regarding a device, e.g., the battery type, power usage, device model, present charge level and amount of power delivered per power cycle. A wireless power receiver client typically needs to collect or infer the information from the device and then provide the information directly to the charger via a messaging protocol. In existing wireless power transmission systems, information is re-transmitted to the wireless power transmission system every time the receiver engages or reengages the system.
US10211670B2 UPS with integrated bypass switch
According to one aspect, embodiments of the invention provide a UPS comprising a delta transformer having a primary winding and a secondary winding, the primary winding coupled between an input and an output and the secondary winding having a first end and a second end, a delta inverter coupled between a DC bus and the secondary winding, a short circuit control circuit selectively coupled between the first end and the second end of the secondary winding, a main inverter coupled between the DC bus and the output, and a controller configured to control, in a bypass mode of operation, the short circuit control circuit to couple the first end of the secondary winding to the second end such that the secondary winding is short circuited and unconditioned output AC power, derived from the input AC power via the primary winding, is provided to the output.
US10211669B1 Automatic transfer switch bypass device
A bypass device is used to bypass one or more automatic transfer switches mounted in an automatic transfer switch cabinet. The bypass device is physically coupled to one or more input power sources and to each respective output connection of a plurality of automatic transfer switches in the automatic transfer switch cabinet. The bypass device selectively feeds electrical power to one or more loads associated with a limited selection of automatic transfer switches to be bypassed. The bypass device comprises a selector device configured to route power from an input power source to respective output connections of the limited selection of automatic transfer switches to be bypassed. A plurality of output breakers are coupled to separate power outlets of each of the plurality of automatic transfer switches to isolate the respective automatic transfer switches.
US10211667B2 Uninterrupted power supply systems and methods
Provided in some embodiments is an uninterruptable electrical power supply system. The system includes an electrical power distribution network (having a consumer side network coupled to one or more electrical loads that consume electrical power and a utility side network that supplies electrical power to the consumer side network), a primary power source (coupled to the utility side network, and that supplies electrical power to the utility side network for supply to the consumer side network), a secondary power source coupled to the utility side network, and a terminal between the consumer side network and the utility side network. The secondary power source supplies backup power to the utility side network (in response to a power shortage on the utility side network) and sinks surplus power from the utility side network (in response to a power surplus on the utility side network).
US10211665B2 Energy management method of multi-type battery energy storage power station considering charge and discharge rates
The present invention provides an energy management method of a multi-type battery energy storage power station considering charge and discharge rates, that includes: reading related data of the battery energy storage power station; calculating charge or discharge rate characteristic values of battery energy storage machine sets; calculating initial power command values of the battery energy storage machine sets; judging whether the initial power command values of the battery energy storage machine sets exceed the maximum allowable charge or discharge power of the machine sets in real time, if more than, online correcting and re-calculating the initial power command values of the battery energy storage machine sets; otherwise, setting the initial power command values of the energy storage machine sets as the power command values thereof; and summarizing the power command values of the battery energy storage machine sets, and outputting the same. With the reasonable control of the charge and discharge rates of the energy storage machines sets as target, the energy management method of the present invention is used for carrying out power coordinated control and energy management in the energy storage power station, and considering the service lives of energy storage batteries in the control strategy to achieve the functions of avoiding abuse of the energy storage batteries as much as possible, delaying battery aging and the like.
US10211660B2 LED lighting device with adaptive profiles for controlling power consumption
A lighting device system includes light emitters where a battery powers the light emitters. A battery supplies the power for powering the light emitters and a driver is arranged to selectively power the light emitters to adjust an operating parameter of the at least one light emitter based on the charge status of the battery. The driver may be in communication with a GNSS receiver that provides geospatial information used to adjust the at least one parameter. The driver may power the light emitters according to a non-adaptive light level profile and an adaptive light level profile where the light emitters consume less energy when operated under the adaptive light level profile than when operated under the non-adaptive light level profile. A processing device operatively coupled to memory determines, based on a state of charge of the battery, which profile to run.
US10211657B2 Smart contactor for battery disconnection unit
A switching device comprises a first and second connector, a first and second input, an output, a switch connected between the first connector and the second connector, a current sensor configured to measure a current flowing through the switch, and a controller connected to the current sensor, the switch, the first input, the second input, and the output. The controller is configured to: operate the switch based on a first control signal at the first input; connect the second control signal at the second input to the output; operate the switch to open in response to the current flowing through the switch exceeding a predetermined current limit; and disconnect the second control signal from the output in response to the current flowing through the switch exceeding the predetermined current limit.
US10211648B2 Method and circuit arrangement for actively balancing cells of an electric energy store
The invention relates to an arrangement (10) for balancing the battery cells (11) of a battery string, in particular the battery cells (11) of a battery module which has a plurality of serially connected battery cells (11). The arrangement (10) has an inductor (9) for storing electric energy and switching devices (17) on the supply side for connecting the poles of a first battery cell (11) to the inductor (9) via a first connection point (13) and a second connection point (14). The arrangement can be actuated by a controller such that electric energy can be transmitted from at least one first battery cell (11) to the inductor (9) and from the inductor (9) to at least one second battery cell (11). According to the invention, the arrangement (10) has a third connection point (15) and a fourth connection point (16) in order to balance the charge and two switching devices (17) on the transfer side, wherein the inductor (9) is connected to the third connection point (15) and the fourth connection point (16) via the two switching devices (17) on the transfer side.
US10211647B2 Adaptive power management for self-sustaining energy harvesting system
Systems (100) and methods (500, 600) for adaptively managing power for an Energy Harvesting System (“EHS”). The methods involve: measuring a light intensity level available in a surrounding environment; wirelessly communicating a first wireless signal from the EHS (100) to a remote device (700) for causing the light intensity level to be increased by remotely turning on a light source (106, 108) or opening a cover preventing light emitted from the light source from reaching the EHC, when the light intensity level is below a pre-specified level; using an Energy Harvesting Circuit (“EHC”) to recharge a rechargeable battery (310) when the light intensity level rises above the pre-specified level; and wirelessly communicating a second wireless signal from the EHS to the remote device for causing the light source be turned off or the cover to be closed, when the capacity or state-of-charge of the rechargeable battery reaches a pre-specified value.
US10211645B2 Non-contact power supply device
A non-contact power supply device, which supplies electric power to a power reception coil from a power transmission coil in a non-contact manner, includes a power transmission coil, a power transmission circuit switchably coupling a voltage source to the power transmission coil, the power transmission circuit configured to resonate at a fundamental frequency, and a serial LC resonant circuit in parallel with the power transmission coil, and configured to resonate at a frequency of a harmonic wave of the fundamental frequency. The non-contact power supply device suppresses a harmonic wave noise by providing a resonant circuit that resonates at a specific harmonic wave.
US10211642B2 Electric-power converting device, solar power conditioner system, electricity storage system, uninterruptible power source system, wind power generation system, and motor drive system
An electric-power converting device having an inverter circuit of a 4-parallel configuration is realized by a combination of four first to third power semiconductor module devices. In each of module device groups, a single unit of the first power semiconductor module device and a single unit of the second power semiconductor module device are mixedly disposed so as to be alternately disposed. Furthermore, the first to third power semiconductor module devices have circuit element groups which have a common point that each circuit element group includes at least one of first and second transistors and first and second diodes.
US10211639B2 Padmount transformer with energy storage apparatus
The present disclosure is directed to a padmount transformer. The padmount transformer includes an electrical distribution transformer housed in a cabinet that can be mounted on a ground level platform or pad. High/medium voltage connectors of the electrical distribution transformer can connect to high/medium voltage terminals of a power supply network. Low voltage connectors of the electrical distribution transformer are configured to connect to low voltage terminals of one or more loads coupled to respective renewable energy sources. The high/medium voltage connectors and the low voltage connectors are housed in the cabinet. An energy storage apparatus is housed in the cabinet and is connected with the low voltage connectors for supplying power to the loads. Power can be supplied to the energy storage apparatus by the renewable energy sources. An inverter is operable for commanding the power supply direction at the energy storage apparatus and a control unit is configured to control the inverter.
US10211637B2 Fast generation adjustment algorithm for energy management system
A method is proposed for real-time economic dispatch in power system operation, especially in systems that include renewable power sources that may cause heavy deviations from a generation schedule due to their uncertain outputs. According to the method an optimal generation schedule is obtained based on forecasted load data. This schedule has to be adjusted if the actual load and renewable energy source outputs unexpectedly deviate from the forecasted value. An algorithm employed in the method is capable of dictating generation adjustments which minimize total generation costs. The algorithm is a modification of the base point and participation factor method. It differs from existing methods in that a precise model of transmission losses is adopted in the algorithm to achieve higher accuracy in optimization. The proposed method also has significant advantage in execution speed so that it is suitable for real-time operation.
US10211635B2 Power control system and control method of power control system
To establish a system capable of efficient operation control between a plurality of distributed power sources without undermining the versatility of the distributed power sources, a power control system controls a power generation device and other distributed power sources, the power generation device generating power while a current sensor detects forward power flow. The power control system includes: a power control device including an output unit configured to output power supplied from the other distributed power sources, in a state where the power generation device and the other distributed power sources are paralleled off from a grid; and a dummy output system configured to supply a dummy current detectable by the current sensor as a current in the same direction as the forward power flow, using an output from the output unit, wherein the dummy output system includes step-down unit located between the output unit and the current sensor.
US10211630B1 Data center with large medium voltage domain
A method of providing power to computer systems in a computer data includes receiving high-voltage power from one or more electric utility distribution systems; transforming the high-voltage power to medium-voltage power; and distributing the medium voltage power through a common medium voltage domain that serves a plurality of medium voltage-to-low voltage converters that are located in rows of computer racks in the computer data center.
US10211629B2 Circuits and devices related to overcurrent protection
Circuits and devices related to overcurrent protection. In some embodiments, a voltage converter can include a voltage converting circuit configured to receive an input voltage and generate an output voltage. The voltage converter can further include an overcurrent protection circuit coupled to the voltage converting circuit and having a detection unit configured to detect an overcurrent condition associated with the voltage converting circuit and generate an overcurrent signal indicative of the overcurrent condition. The overcurrent protection circuit can further include a consumption unit in communication with the detection unit and configured to selectively consume and thereby reduce a current in a path associated with the voltage converting circuit upon receipt of the overcurrent signal.
US10211627B2 Power-network note, variable transformer and method of operating the node
A network node for a substation or a local network station has a control transformer with a primary side and a secondary side, an input line connected to the primary side, and an output line connected to the secondary side. A protective switch is provided in the input line or in the output line, and a sensor detects an electrical parameter in the input line or in the output line and generate a measurement signal. A controller coupled to the control transformer, to the protective switch, and to the sensor, serves to operate the control transformer in dependence on the measurement signal such that the control transformer has a predetermined transmission ratio and open the protective switch in dependence on the measurement signal as soon as the control transformer has the predetermined transmission ratio.
US10211626B2 System and method providing reliable over current protection for power converter
System controller and method for protecting a power converter. The system controller includes a first controller terminal configured to output a drive signal to a switch to affect a first current flowing through a primary winding of a power converter. The power converter further includes a secondary winding coupled to the primary winding, and the drive signal is associated with one or more switching periods. Additionally, the system controller includes a second controller terminal configured to receive a sensing voltage from a sensing resistor. The sensing voltage represents a magnitude of the first current flowing through the primary winding of the power converter. The system controller is configured to process information associated with the sensing voltage and a reference voltage, and determine whether an average output current of the power converter is larger than a current threshold.
US10211625B2 Mitigation of arc flash hazard in photovoltaic power plants
Arc flash mitigation devices are employed to protect personnel during maintenance of photovoltaic inverters. During normal operation, an alternating current (AC) output of a photovoltaic inverter is coupled to a low voltage winding of a step up transformer through a bus-bar (e.g., an electrically conductive interconnect), which has higher current rating than a fuse. During maintenance, the bus-bar is replaced with the fuse. The fuse may be employed in conjunction with a switch. The switch may be a disconnect switch that places the bus-bar in parallel with the fuse during normal operation, and decouples the bus-bar from the fuse during maintenance. The switch may also be a transfer switch that places either the bus-bar or the fuse in series with the AC output of the photovoltaic inverter and the low voltage winding of the step up transformer.
US10211624B2 Drive protection method for direct current motor
A drive protection method used in a drive circuit of a DC motor having a maximum tolerance value is disclosed to include the steps of providing a drive current for driving the DC motor and a control signal a for controlling the output level of the drive current, providing a maximum signal level corresponding to the maximum tolerance value of said DC motor, comparing the level of the feedback signal of the DC motor and the maximum signal level, and computing the feedback signal to obtain an operation signal when the level of the feedback signal exceeds the maximum signal level and then stopping the output of the control signal when the level of the operation signal reaches a turn-off level.
US10211623B2 Power supply control
A power supply control device comprises a controller and power connection circuitry. The power connection circuitry comprises a switchable power connection path between a source side and a load side. The power connection path is switchable to operate in a first operation state or an on-state in which state impedance between the source side and the load side is very low to permit flow of operation current through the power connection path, or a second operation state or an off-state in which state impedance between the source side and the load side is very high to impede flow of operation current through the power connection path. The controller is to operate to transmit at least one type of enquiry signals to the load side and to determine with reference to at least one type of received responsive signals whether a load on the load side is eligible for power supply connection. The controller is to switch the power connection path to the on-state or to maintain the power connection path to the on-state if the responsive signals indicate eligibility for power supply connection.
US10211613B2 Protective tube attaching method
A protective tube attaching method, the protective tube protecting an electric wire of a wire harness, includes inserting the electric wire through a small diameter protective tube and a large diameter protective tube which covers and is shorter than the small diameter protective tube so as to be movable relatively thereto; positioning one end portion of the large diameter protective tube at one reference portion of the wire harness; moving the small diameter protective tube relatively to the large diameter protective tube positioned at the one reference portion, to thereby position the other end portion of the small diameter protective tube at the other reference portion of the wire harness; and fixing the other end portion of the large diameter protective tube in a state that the other end portion of the large diameter protective tube overlaps with an outer circumferential surface of the small diameter protective tube.
US10211612B2 Protective textile sleeve with hot melt fixation, end fray prevention layer and methods of construction and application thereof
A protective textile sleeve having enhanced end fray resistance and being adapted to be bonded to an elongate member extending therethrough, and method of construction thereof, are provided. The sleeve has a wall with a cavity bounded by an innermost surface extending between opposite open ends. A first material, including a hot melt adhesive material, facilitating bonding the wall to an outer surface of an elongate member extending therethrough, is bonded to the wall immediately adjacent the opposite ends, and a second material, facilitating prevention of end fray of the wall ends, including an elastomeric material is bonded to the wall immediately adjacent the opposite ends.
US10211610B2 Systems for backfeeding photovoltaic arrays through main breaker boxes
A circuit breaker system is provided that receives combined power inputs from a utility and from an alternative energy source for backfeeding to the utility through a standard breaker box without overloading the bus bars of the breaker box.
US10211609B2 Transportation device of withdrawable circuit breaker
The present invention relates to a transportation device of a withdrawable circuit breaker, and more particularly, to a transportation device of a withdrawable circuit breaker capable of simultaneously moving right and left handles of a girder assembly for restricting movement of the transportation device or releasing a restricted state. The transportation device of a circuit breaker includes: a truck assembly on which a body of the circuit breaker is loadable; a body plate of a girder assembly installed on a front surface of the truck assembly; a pair of sliding plates slidably installed in the body plate; and a rotation plate having both sides to which leg portions of the sliding plates are rotatably coupled, respectively, wherein the rotation plate is inserted into a lead screw penetratingly-formed at a central part of the girder assembly.
US10211608B2 Mechanical coupling devices for motorized levering-in assemblies, related electrical apparatus and methods
Levering-in systems, particularly suitable for electrical apparatus such as switchgears, have a motor that can drive a drive shaft during a powered operation and include a mechanical coupling assembly that can physically disconnect or decouple the drive shaft from a drivetrain coupled to the motor to allow manual levering-in with a reduced user crank force and/or to inhibit damage to components of the motorized drive system.
US10211607B2 Device for remotely racking a circuit breaker into and out of a circuit breaker cradle
Disclosed is a device for remotely racking a circuit breaker into and out of a circuit breaker cradle received within a circuit breaker module. The device comprises an actuator configured to rotate a breaker shaft in a first direction and an opposite second direction to rack the circuit breaker into and out of the circuit breaker cradle without the need for an operator to attend in the vicinity of the circuit breaker module.
US10211601B2 High-power laser systems with modular diode sources
In various embodiments, a modular laser system features an enclosure having interfaces for accepting input laser beam modules, optical elements for combining beams from the modules into a combined output beam, and a heat-exchange manifold for interfacing with and cooling the modules during operation.
US10211599B2 Laser module and system
Laser modules and systems are provided that are smaller, lighter, and less complex and while more reliably generating collimated laser beams having limited divergence.
US10211598B2 Side-view light emitting laser element
A side-view light emitting laser element includes a support substrate, a first electrode layer, a second electrode layer, and a light emitting multilayer unit sandwiched between the first electrode layer and the second electrode layer. The first electrode layer is disposed on the support substrate. The second electrode layer is disposed on the first electrode layer. The light emitting multilayer unit includes a first semiconductor layer, a second semiconductor layer and an activating layer sandwiched between the first semiconductor layer and the second semiconductor layer. A first refractive index of the first electrode layer and a second refractive index of the second electrode layer are between 1 and 0, respectively.
US10211593B1 Optical amplifier with multi-wavelength pumping
In one embodiment, an optical amplifier includes a first pump laser diode and a second pump laser diode. The first pump laser diode is configured to produce pump light that includes a first amount of optical power at a first wavelength, and the second pump laser diode is configured to produce pump light that includes a second amount of optical power at a second wavelength different from the first wavelength. The optical amplifier also includes an optical gain fiber configured to receive the pump light from the first and second pump laser diodes and provide optical gain for an optical signal propagating through the optical gain fiber. The optical amplifier further includes a controller configured to adjust the first amount of optical power produced by the first pump laser diode and the second amount of optical power produced by the second pump laser diode.
US10211591B2 Tandem pumped fiber amplifier
In an example, a tandem pumped fiber amplifier may include a seed laser, one or more diode pumps, and a plural core fiber including a first core and a second core, the second core surrounding the first core. The plural core fiber may include a first section to operate as an oscillator and a second different section to operate as a power amplifier. The one or more diode pumps may be optically coupled to the first section of the plural core fiber, and the seed laser may be optically coupled to the first core.
US10211589B2 Laser apparatus and extreme ultraviolet light generation apparatus
Kinematic mounts have three points having zero degree of freedom, one degree of freedom, and two degrees of freedom, respectively. As viewed from a direction perpendicular to a plane containing the three points, an extension of an entrance optical axis of a laser beam to an amplifying apparatus or an extension of an exit optical axis from the amplifying apparatus is oriented to the point with the zero degree of freedom. A translational direction of the point with the one degree of freedom is oriented to the point with the zero degree of freedom. One of the extension of the entrance optical axis and the extension of the exist optical axis passes on a side closer to the point with the two degrees of freedom with respect to a side of the point with the one degree of freedom.
US10211582B1 Bus bar clamp
An electrical power distribution system includes a first bus bar and a clamp mounted to the first bus bar. The clamp includes a fixed base and a movable plate that define a track therebetween along a broad face of the first bus bar. The track receives a second bus bar therein such that the broad face of the first bus bar engages a corresponding broad face of the second bus bar. The clamp includes a lever connected to both the movable plate and the first bus bar. Pivoting movement of the lever in a locking direction forces linear movement of the movable plate relative to the first bus bar towards the fixed base such that respective inner sides of the movable plate and the fixed base sandwich the second bus bar therebetween to secure the second bus bar in engagement with the first bus bar.
US10211581B2 Busway stab assemblies and related systems and methods
A plug-in device for use with a busway system comprising a busway housing defining a longitudinal axis includes a stab base housing having first and second opposite sides, one or more stab conductors extending out of and away from the stab base housing at each of the first and second sides of the stab base housing, and a ground conductor at an upper portion of the stab base housing. The stab base housing is configured to be received through an opening at a bottom portion of the busway housing and positioned in a first position and then rotated from the first position to a second position. The ground conductor is configured to contact a top wall of the busway housing in each of the first and second positions.
US10211580B2 Electrical connector having widened power terminals
An electrical connector includes: an insulative housing; two rows of terminals arranged in the insulative housing, each terminal having a contacting portion, a tail portion, and an intermediate portion between the contacting portion and the tail portion, each row of terminals including two outermost ground terminals, two power terminals, and plural signal terminals, each ground terminal being spaced from a neighboring power terminal by one or more signal terminals, a width of the contacting portion of the ground terminal being greater than a largest width of the signal terminal, a width of the contacting portion of the power terminal being greater than the largest width of the signal terminal; and a shielding shell enclosing the insulative housing; wherein the width of the contacting portion of the power terminal is equal to or greater than 0.4 mm.
US10211576B2 Connector with self-powered mating detection
A connector with self-powered mating detection is disclosed. An example disclosed connector pair includes a first connector. The example connector pair also includes a piezoelectric sensor attached to the first connector. The example piezoelectric sensor generates a voltage when the first connector and a second connector are mated. The example piezoelectric sensor generates a voltage when the first connector and a second connector are unmated. The example connector pair also includes a memory circuit electrically coupled to the piezoelectric sensor to record a connection event in response to detecting voltage generated by the piezoelectric sensor(s). Additionally, the example connector pair includes an RFID circuit electrically coupled to the memory circuit. The example RFID circuit transmits the connection events.
US10211574B2 Electrical connector and method of making the same
An electrical connector includes: an insulative housing having a base portion and a mating tongue extending forwardly from the base portion, the mating tongue defining two opposite mating faces and a step portion at a root thereof to the base portion; two rows of terminals retained in the insulative housing and including contacting portions disposed on the mating surface and in front of the step portion; a pair of discrete metal plates located between the two rows of terminals, each metal plate comprising a first plate portion disposed in the mating tongue, a second plate portion disposed in the base portion, each first plate portion defining a locking edge at outer side thereof and exposed to corresponding side face of the mating tongue; and each metal plate defines an extending portion bent upwardly, the extending portion covers the matting surface of the step portion.
US10211564B2 Connector-mounting structure and terminal stage
A connector-mounting structure includes a case and a connector mounted on the case. The connector has a connector housing, a terminal, a waterproof elastic member, and a connector holding plate fixed to an inner surface of the case. An outer size of the connector housing is larger than a hole size of a through-hole of the case. The waterproof elastic member has a sealing portion. A size of a recess of the connector holding plate is larger than an outer size of a flange portion of the connector housing. A hole size of a housing insertion hole of the connector holding plate is larger than an outer circumferential size of a main body of the connector housing. An outer circumferential size of the insertion portion is smaller than the hole size of the through-hole.
US10211563B2 Electrical connector having conductive contacts not being corroded
An electrical connector includes an insulative housing and a number of conductive contacts affixed to the insulative housing. The insulative housing includes a base portion and a tongue portion extending forwardly from the base portion. The tongue portion has a stepped portion abutting with the base portion, a horizontal portion located at a front end of the stepped portion, and a boundary line located between the stepped portion and the horizontal portion. The stepped portion is thicker than the horizontal portion. The horizontal portion has two opposite mating surfaces. Each conductive contact has a contacting portion exposed to the mating surface, a connecting portion affixed to the stepped portion and the base portion, and a soldering portion extending outwardly from the base portion. The contacting portion abutting with the boundary line is covered by insulative materials.
US10211562B2 Electrical connector assembly
An electrical connector assembly includes a cover, an electrical connector, and a connecting member connecting the cover and with the electrical connector. A method of assembling an electrical connector assembly includes providing a cover, providing a connecting member, providing an electrical connector, connecting the electrical connector with the connecting member to form an intermediate assembly, and connecting the intermediate assembly with the cover. Connecting the intermediate assembly with the cover may include disposing a first flange of the connecting member in a recess or groove of the cover and disposing a second flange of the connecting member at least partially between opposing axial faces of the cover and the electrical connector.
US10211560B1 Network jack node identification system
A network jack assembly network connection identification system comprising an identifier receiving cavity extending inward from a surface of a plug body section of the jack and an identifier element designed for insertion into the identifier receiving cavity. The identifier receiving cavity is accessible through any of a sidewall, a top wall, a bottom wall, or a front wall of the plug body section. The cavity may include a lens enabling viewing of the identifier element. The identifier can be a partially or completely colored surface of the identifier element, a shaped feature of the identifier element, etc. The identifier can be a sheet of material, a pin, or any other suitable insertable component. In one variant, the identifier can be formed during installation by reshaping material designated therefore, such as a wax. Alternatively, the identification solution can be applied to a wall plate.
US10211558B1 Low insertion force tab receptacle
A receptacle terminal for receipt of a mating terminal therein. The receptacle terminal has a contact portion including a bottom wall and resilient contact arms which extend from the bottom wall. The resilient contact arms have resilient contact sections and mating terminal engagement members. The mating terminal engagement members have a projection receiving opening. A spring arm extends from the bottom wall toward the mating terminal engagement members. The spring arm has a projection which extends from the spring arm to create a raised area on an inner surface of the spring arm to engage the mating terminal. Prior to the receipt of the mating terminal, the projection of the spring arm is positioned in the projection receiving opening of the mating terminal engagement members, allowing the portions of the spring arm to be positioned proximate the mating terminal engagement members.
US10211551B2 Electronic circuit module
An electronic circuit module includes: a substrate on which a wiring pattern having an electrode portion is formed; a cable having an external insulator and a conductor portion, at least a distal end side of the external insulator being removed to expose a conductor, an exposed portion of the conductor being defined as the conductor portion; and an electronic component having terminals at least on two opposed faces of the electronic component. At least one of the terminals of the electronic component is directly connected to the conductor portion, and is configured to be electrically connected to the electrode portion through the conductor portion.
US10211544B2 Combined antenna and electronic device
Embodiments of this application provide a combine antenna and an electronic device. The combined antenna includes a first antenna of an electromagnetic induction type and a second antenna of an electromagnetic radiation type. The first antenna includes a substrate having an electrical conductivity with a body portion of the second antenna connected to the substrate of the first antenna, the substrate serving as a reference ground portion of the second antenna.
US10211543B2 Antenna system for broadband satellite communication in the GHz frequency range, comprising dielectrically filled horn antennas
The present disclosure relates to an antenna system for wireless communication of data. In one implementation, the system includes at least four horn antennas. Each horn antenna may have a three-layered cavity, and each layer may be filled with dielectric. The system may further include two microstrip line networks. The microstrip networks may be between two adjacent layered portions and configured to communicate with the horn antennas.
US10211541B2 Antenna device
According to one embodiment, an antenna device includes first and second split ring resonators and a power supply line. The first split ring resonator includes a conductor enclosing a first opening and having a first void separating a part of the conductor. The second split ring resonator is opposed to the first split ring resonator, including a conductor which encloses a second opening and has a second void separating a part of the conductor. The power supply line feeds power to the first or second split ring resonator. The first split ring resonator is not electrically connected to the second split ring resonator. The first void does not overlap with the second void in an opposing direction of the first split ring resonator and the second split ring resonator.
US10211537B2 Apparatus and methods for wireless coupling
An apparatus (180) comprising: a first conductive layer (30) defining a first slot (46) having an open end and a closed end, the first slot (46) being configured to receive an inductive coupler (64) therein; and a capacitive member configured to tune the first conductive layer (30) to resonate in an operational frequency band.
US10211534B2 Sildenafil solutions and methods of making and using same
A pharmaceutical composition comprising a liquid carrier comprising water and at least 35% of ethanol and sildenafil citrate dissolved in said liquid carrier at a concentration of at least 7 mg/ml.
US10211532B2 Liquid-crystal reconfigurable multi-beam phased array
A phased array antenna comprising a two dimensional array of lens enhanced radiator units, each radiator unit comprising: a radiator for generating a radio frequency (RF) signal; and a two dimensional phase variable lens group defining an aperture in a transmission path of the RF signal, the lens group comprising a two dimensional array of individually controllable lens elements enabling a varying transmission phase to be applied to the RF signal across the aperture of the lens group. Also, a unit cell of a lens element in a metamaterial sheet, the unit cell comprising a stack of cell layers, each cell layer comprising a volume of nematic liquid crystal with a controllable dielectric value enabling each cell layer to function as tunable resonator.
US10211531B2 Compact steerable transmit antenna system
A transmit antenna system configured to steer an electromagnetic beam includes an antenna and an electronic steering module. The antenna includes a first electric antenna element oriented parallel to a first plane, a second electric antenna element oriented orthogonally to the first electric antenna element and parallel to the first plane, and a first magnetic antenna element oriented orthogonally to the first electric antenna element and the second electric antenna element. The electronic steering module is in electrical communication with each of the first electric antenna element, the second electric antenna element, and the first magnetic antenna element. The electronic steering module includes at least one amplifier configured to control the amplitude of a current to each of the first electric antenna element, the second electric antenna element, and the first magnetic antenna element.
US10211528B2 Fully programmable digital-to-impulse radiating array
A fully-programmable digital-to-impulse radiator with a programmable delay is discussed herein. The impulse radiator may be part of an array of impulse radiators. Each individual element of the array may be equipped with an integrated programmable delay that can shift the timing of a digital trigger. The digital trigger may be fed to an amplifier, switch, and impulse matching circuitry, whereas the data signal path may be provided from a separate path. An antenna coupled to the impulse matching circuitry may then radiate ultra-short impulses. The radiating array may provide the ability to control delay at each individual element, perform near-ideal spatial combing, and/or beam steering.
US10211523B2 Low-Frequency Antenna
A low frequency antenna for radiating/receiving an electromagnetic wave is provided. One exemplary antenna comprises a feed port; an antenna conductor connected to the feed port; and an encapsulation at least partially surrounding the antenna conductor. The low frequency antenna comprises different functional materials used in fabrication of the wave-matching encapsulation enclosing the antenna conductor in order to match the wavelength of the compressed wave to the physical size of the resonant antenna, to match the wave impedance within encapsulation and impedance of the outer medium, to enhance the directivity gain by using non-uniform distribution of the material parameters and minimize the intrinsic impedance mismatch between the region of the encapsulation which is forming the compressed wave and the outer medium.
US10211521B1 Millimeter wave sensor system
Systems and methods are described that relate to measuring relative positions of, or distance between, a helmet-mountable device and a head-mountable device. The helmet-mountable device includes a radio frequency (RF) source of a millimeter wave signal comprising millimeter wave radiation. The head-mountable device includes a plurality of rectenna devices. Each rectenna device of the plurality of rectenna devices converts millimeter wave radiation emitted by the RF source into a direct current (DC) electrical signal. The head-mountable device includes a memory and at least one processor. The at least one processor executes instructions stored in the memory so as to carry out operations, which include receiving, from each rectenna device of the plurality of rectenna devices, a respective DC electrical signal. The operations also include storing, in the memory, information indicative of the respective DC electrical signals.
US10211517B2 Mobile device
A mobile device includes a system ground plane and an antenna system. The antenna system includes a dielectric substrate, an antenna ground plane, a radiation element, and at least one feeding element. The antenna ground plane is coupled to the system ground plane. The feeding element is coupled to a signal source. The feeding element is positioned between the radiation element and the antenna ground plane. The feeding element and the radiation element are completely separate from each other. The radiation element is excited by the feeding element by coupling.
US10211515B2 Antenna device for portable terminal
An antenna device of a portable terminal including conductive components is provided. The antenna device includes a first radiator connected to a power feeding unit of the portable terminal and a second radiator connected to each of the power feeding unit and a ground part of the portable terminal. At least one of the conductive components is connected to at least one the first radiator and the second radiator. The conductive components may be used as a radiator of the antenna device such that the antenna device may be easily installed within an inner space of a miniaturized and lightened portable terminal and the inner space of the portable terminal may be efficiently used.
US10211514B2 Antenna using conductor and electronic device therefor
An electronic device includes a first region corresponding to a first part of the electronic device, and a second region corresponding to a second part of the electronic device. The second region has a lower temperature than that of the first region. An antenna is located over at least the first region and optionally the second region of the electronic device. A conductor is arranged over at least the first region of the electronic device to transmit heat from the first region to the second region. The conductor operates in conjunction with the antenna and is adjacent to at least a part of the antenna to prevent the conductor from interfering with the antenna.
US10211513B2 Information communication device and antenna
To provide an information communication device including an antenna that can singly transmit and receive both of vertically polarized waves and horizontally polarized waves with a sufficient strength. The information communication device includes a casing and the antenna disposed within the casing. The antenna includes a plate-shaped planar portion having a feeding point. The planar portion includes a conductive portion extending in a direction of obliquely intersecting a bottom surface of the casing, and a ground portion connected to one end of the conductive portion.
US10211507B2 Communication device for mounting to infrastructure
A communication device for mounting to an infrastructure, the communication device being configured for communication with a remote communication device via a directive antenna main lobe, the communication device comprising a sensor module configured to measure a movement of the communication device relative to a reference orientation.
US10211501B2 High-frequency filter with dielectric substrates for transmitting TM modes in transverse direction
A high-frequency filter consists of a housing, which includes resonators, each of which has at least one dielectric. The n resonators are arranged along a central axis. The n resonators are isolated from one another by at least n−1 isolation devices. The n−1 isolation devices have coupling openings, through which a coupling is established at a right angle to or with one component predominantly at a right angle to the H field. A first signal line terminal is inserted into the first resonator chamber through a first opening in the housing and is in contact with the respective dielectric there. In addition or alternatively, a second signal line terminal is inserted into the nth resonator chamber through a second opening in the housing and is in contact with the respective dielectric there.
US10211500B2 Tunable low-pass filter using dual mode
Disclosed is a tunable low-pass filter using a dual mode including a cylindrical cavity configured to trigger a resonant mode, a plurality of irises formed on a lateral face of the cylindrical cavity, and a dummy iris formed on the lateral face of the cylindrical cavity, wherein the resonant mode includes a plurality of modes having a plurality of resonant frequencies, and differences in resonance frequency between the plurality of modes are determined based on angles between the plurality of irises based on an axis of the cylindrical cavity.
US10211499B2 Four-mode defected ground structure resonator
The present invention discloses a four-mode defected ground structure resonator, comprising a metal dielectric substrate and a defected ground unit which is etched in one surface of the metal dielectric substrate; the shape of the defected ground unit is axially symmetric about a first central axis of the defected ground unit, and also the shape of the defected ground unit is axially symmetric about a second central axis of the defected ground unit; the first defected ground unit is provided with H-shape or quasi H-shape, the second defected ground unit is provided with L-shape, quasi L-shape, U-shape or quasi U-shape. The four-mode defected ground structure resonator of the present invention is provided with four types of resonant modes, and the four types of resonant modes are provided with good tunability.
US10211498B1 Reconfigurable resonators for chipless RFID applications
The reconfigurable resonators for chipless RFID applications provide spiral resonators for a multiple resonator passive RFID transponder tag. Each spiral resonator includes a U-shaped frame of conductive material and has a plurality (K−1) of parallel adjusting or shorting elements disposed between the legs of the U-shaped frame. Each resonator has one leg coupled to a transmission line adapted for connection between a receiving antenna and a transmitting antenna (in some embodiments, a single antenna may be used for both receiving and transmitting), and one of the adjusting or shorting elements may be selectively connected to the opposing leg of the frame to configure the resonator to resonate at one of (K−1) different resonant frequencies (K frequencies if none of the elements are connected) by a short metal jumper strip to change the length of the spiral resonator.
US10211497B1 3D RF-substrate patterning
A microstrip transmission line comprising a dielectric substrate including a series of periodic sinusoidal undulation portions defining spaced apart peaks and troughs, where a distance between the peaks and troughs defines a period of the microstrip line, and where each peak defines a maximum height of the substrate and each trough defines a minimum height of the substrate. The transmission line further includes a conductive strip formed to a surface of the substrate so that the conductive strip follows the undulation portions. The conductive strip includes a modulation portion in a width direction of the conductive strip perpendicular to a signal propagation direction along the strip, where the modulation portion includes a minimum width portion provided at each peak and a maximum width portion provided at each trough so that a variation of a ratio between the width of the conductive strip and the height of the substrate is maximized.
US10211491B2 Management of gas pressure and electrode state of charge in alkaline batteries
An inventive, new system that measures gas composition and pressure in the headspace of an aqueous electrolyte battery is described. The system includes a microcontroller that can use the composition and pressure information to connect a third electrode to either the anode(s) or the cathode(s) in order to balance the state of charge between the two. Results have shown that such a system can control the gas pressure inside a sealed flooded aqueous electrolyte battery to remain below 20 kPa (3 psi) and greatly extend the useable life of the battery.
US10211484B2 Acetic acid 2-[(methoxycarbonyl)oxy] methyl ester as electrolyte component
An electrolyte composition containing (i) at least one aprotic organic solvent; (ii) at least one conducting salt; (iii) acetic acid 2-[(methoxycarbonyl)oxy] methyl ester; and (vi) optionally one or more additives.
US10211481B2 Stabilized solid garnet electrolyte and methods thereof
An air stable solid garnet composition, comprising:a bulk composition and a surface protonated composition on at least a portion of the bulk composition as defined herein, and the protonated surface composition is present on at least a portion of the exterior surface of the bulk composition at a thickness of from 0.1 to 10,000 nm. Also disclosed is a composite electrolyte structure, and methods of making and using the composition and the composite electrolyte structure.
US10211478B2 Fuel cell stack column including stress-relief components
A fuel cell column includes termination plates, fuel cell stacks disposed between the termination plates, and fuel manifolds disposed between the fuel cell stacks. The fuel cell stacks include fuel cells, interconnects disposed between the fuel cells, and end plates disposed on opposing ends of the fuel cell stacks. At least one of the termination plates and/or the fuel manifold may include first and second separate pieces separated by an expansion zone. The fuel cell stack may also include one or more buffer layers and/or seals configured to reduce CTE differences of components of the fuel cell stack.
US10211473B2 Reduction of pressure variation with stamped embossment at bead neighbors
A fuel cell flow field plate providing a uniform gas flow pressure includes a first metal plate and a second metal plate. The first metal plate defines a first opening for providing a first reactant gas to a fuel cell with a first metal bead that surrounds the first opening. The first metal bead is an embossment in the second metal plate that defines a first channel. The first metal plate also defines a first pressure distributing structure that decreases pressure variation is a seal formed with the first metal bead. A second metal plate aligns with the first metal plate.
US10211472B2 Multi-fluid nozzles
A fuel cell nozzle includes a fuel circuit receiver configured to receive a fuel circuit and an air circuit. At least a portion of the air circuit is integrally formed with the fuel circuit receiver. The nozzle can further include a base portion that is configured to interface with a fuel cell. The fuel circuit receiver and the air circuit can extend from the base portion.
US10211471B2 Apparatus for controlling purging in a hydrogen storage system and method for the same
A method of controlling purging in a hydrogen storage system includes determining the internal hydrogen purity of a hydrogen tank and adjusting a hydrogen purging cycle of the hydrogen tank depending on the determined internal hydrogen purity. An apparatus for controlling purging in a hydrogen storage system is also provided.
US10211469B1 Heat rejection system for electrochemical climate control system
A climate control system includes an electrochemical device in fluid communication with at least one fluid conduit that also includes a first heat exchanger, an expansion device, and a pump, but may be free of any condensers. A working fluid is circulated in the fluid conduit that has a composition that undergoes a reversible hydrogenation and dehydrogenation reaction when it passes through the electrochemical device when a potential is applied thereto. The climate control system includes a heat rejection system in the form of a recirculation loop having a second heat exchanger configured to cool a portion of the working fluid exiting the electrochemical device and a recirculation pump that circulates the portion of the working fluid exiting the electrochemical device through the second heat exchanger and back to an inlet of the electrochemical device. Methods for rejecting heat from an electrochemical climate control system are also provided.
US10211468B2 Device and method for manufacturing membrane-electrode assembly of fuel cell
A manufacturing device of a membrane-electrode assembly for fuel cell includes a membrane unwinder unwinding and supplying a polymer electrolyte membrane of a roll shape; a film unwinder unwinding and supplying a release film of a roll shape respectively coated with an anode catalyst electrode layer and a cathode catalyst electrode layer with a predetermined interval in an upper and lower sides of the polymer electrolyte membrane; upper and lower bonding rolls respectively disposed at the upper and lower sides of a progressing path of the polymer electrolyte membrane and the release film and pressed to an upper surface and a lower surface of the polymer electrolyte membrane; and a protection film unwinder unwinding and supplying a protection film between adhered surfaces of the release film and the upper and lower bonding rolls.
US10211466B2 Interface seal for a fuel cartridge
A resilient sealing member (27) has a first face (40) and a second face (41) and an aperture (42) extending between the first face and the second face. At least two, preferably three or more, circumferential ridges (43, 44, 45) surround the aperture on the first face. Channels (46, 47) may be disposed between each adjacent pair of circumferential ridges and a flat seal may be provided on the first face, peripheral to the circumferential ridges. The flat seal may occupy a different plane than the plane occupied by apexes of the circumferential ridges. The resilient sealing member may be incorporated into interface seal assembly comprising a rigid frame (26) onto which it is molded. The rigid frame may comprise a printed circuit board (25). The interface seal assembly allows for an easily interchangeable seal on a refillable fuel cartridge (1) for a fuel cell apparatus.
US10211465B2 Powdered metal component
A powder metallurgical component has a chromium content of at least 80% by weight and pores and/or oxide inclusions which are present in the component. The number per unit area of a sum of pores and oxide inclusions at a cut surface through the component in at least one region is at least 10,000 per mm2.
US10211463B2 Carbon material, fuel cell, and method for producing carbon material
A carbon material according to an embodiment contains: 2% by mass or more and 15% by mass or less of nitrogen and 0.3% by mass or more and 2.5% by mass or less of sulfur, and 40% by mass or more of the nitrogen is a graphitic nitrogen.
US10211458B2 Method for preparing electrode active material slurry, and electrode active material slurry prepared by method
The present invention relates to a method for preparing electrode active material slurry, and an electrode active material slurry prepared by the method, the method comprising the steps of: (S1) mixing a conductive agent and a first dispersion medium to thus prepare a conductive agent dispersion, and mixing an electrode active material and a second dispersion medium to thus prepare an electrode active material dispersion; and (S2) dispersing the conductive agent dispersion while adding the same to the electrode active material dispersion.
US10211453B2 Storage structure of an electrical energy storage cell
A storage structure of an electrical metal-air energy storage cell is provided having an active storage material. The storage structure has a core region and at least one shell region, wherein the material in the core region has a higher porosity than the material of the shell region.
US10211450B2 Systems and methods for a battery
A nickel iron battery comprising a housing, an electrolyte solution contained within the housing, an anode comprising iron configured to be retained within the housing and the electrolyte solution, an cathode comprising nickel configured to be retained within the housing and the electrolyte solution, and a separator configured to be retained within the hosing and the electrolyte solution, wherein the separator is interposed between the cathode and the anode.
US10211447B2 Battery including gas discharging member and electrolyte injection member
Disclosed herein is a battery including a cell having an electrode laminate and a liquid electrolyte mounted in an internal space of a battery case, a gas discharging member communicating with the internal space of the battery case for discharging gas generated in the cell out of the cell, and a liquid electrolyte injection member communicating with the internal space of the battery case for injecting a liquid electrolyte into internal space of the battery case.
US10211445B2 Lead-acid battery
A lead-acid battery includes an electrode plate assembly, a battery case, a positive electrode strap, a negative electrode strap, a positive electrode post, a negative electrode post, a cover, and an electrolyte solution. A negative electrode bushing provided in the cover and the negative electrode post together constitute a negative electrode terminal. A maximum value of a gap between an outer circumferential surface of the negative electrode post and an inner circumferential surface of the negative electrode bushing in the negative electrode terminal is 0.5 mm or more and 2.5 mm or less. A rib is provided in a lower part of the negative electrode bushing, and a minimum value of a protrusion height of the rib is 1.5 mm or more and 4.0 mm or less. A distance between a surface of the electrolyte solution and a lowermost portion of the negative electrode bushing is 15 mm or less.
US10211439B2 Cylindrical battery
In a cylindrical battery including a gap formed between a peripheral side surface 32b of a dish-shaped portion in an anode terminal plate 32 and a curved end portion 11a of a cathode can 11, and a washer 50 having a cylindrical boss portion 50a and an annular flange portion 50c provided around an upper end surface of the cylindrical boss portion 50athe washer 50 being mounted to an opening portion of a cathode can 11 such that the cylindrical boss portion 50a is fitted into the gap 201, a vent structure configured to release gas released to the gap 201 from a first vent hole 32c in the anode terminal plate 32 to an exterior of the cylindrical battery (1) from an arc-shaped second vent hole (50d) formed in the flange portion(50c) or an annular gap (301, 302) formed between the upper end surface of the cylindrical boss portion (50a) and the terminal plate(32).
US10211437B2 Electronic device and battery locking mechanism
A battery locking mechanism applied in an electronic device is provided. The electronic device includes a casing. The casing defines a receiving portion to receive the battery and the battery locking mechanism. The battery locking mechanism includes a first latching element, a second latching element, a first elastic member and a second elastic member. The first elastic member connects the first latching element to the casing and the second elastic member connects the second latching element to the cover. When the first latching element is latched with the second latching element in a relaxed state, the battery is locked. The second latching element can be moved away from the first latching element by a fingertip until the second latching element loses contact with the first latching element, thus unlocking the battery compartment. An electronic device using the locking mechanism is also provided.
US10211431B2 Electric battery assembly
There is disclosed an electric battery assembly comprising: a plurality of electric batteries arranged in an array, an interconnection for connecting batteries in the array to provide a common power output; a plurality of shock absorbent housings, wherein each electric battery is provided within a shock-absorbent housing. The shock absorbent housing may have the form of a blister, which may be flexible and which may be filled with a shock-mitigating material.
US10211429B2 Enhancing light extraction of organic light emitting diodes via nanoscale texturing of electrode surfaces
An organic light emitting device is described, having an OLED including an anode, a cathode, and at least one organic layer between the anode and cathode. At least a portion of an electrode surface includes a plurality of scattering structures positioned in a partially disordered pattern resembling nodes of a two dimensional lattice. The scattering structures are positioned around the nodes of the two dimensional lattice with the average distance between the position of each scattering structure and a respective node of the lattice is from 0 to 0.5 of the distance between adjacent lattice nodes. A method of manufacturing an organic light emitting device and a method of enhancing the light-extraction efficiency of an organic light emitting device are also described.
US10211423B2 Organic light-emitting display apparatus and method of manufacturing the same
A an organic light-emitting display apparatus, including a first substrate, a display unit having a plurality of organic light-emitting devices that is formed on the first substrate, a second substrate disposed on the display unit, and a filler included between the first substrate and the second substrate. The organic light-emitting device includes a first electrode formed on the first substrate, an intermediate layer that is disposed on the first electrode and includes an organic emission layer, and a porous second electrode disposed on the intermediate layer.
US10211422B2 Transparent display panel and transparent display device including the same
A transparent display device includes: a display panel displaying an image with light and including: a pixel area at which light is generated, a transmission area at which light transmits through the display panel, and a gate line area including a gate line; at the pixel area, a display element generating the light, and a driving circuit driving the display element; and an insulating layer pattern at the pixel and gate line areas. The driving circuit includes a semiconductor layer, gate, source and drain electrodes, and a gate insulating layer on the gate line and electrode, the display element includes pixel and common electrodes, and a light emitting layer, the insulating layer pattern at the pixel area is between the gate insulating layer and the common electrode, and the insulating layer pattern at the gate line area defines a groove at the transmission area.
US10211421B2 Flexible film structure, method of manufacturing the same, and flexible display device including the same
A flexible film structure, a method of manufacturing the flexible film structure, and a flexible display device, the flexible film structure including a base film; and at least one functional hard coating layer on the base film, wherein the functional hard coating layer includes a siloxane polymer having an epoxy group.
US10211418B2 Light emitting device and fabricating method thereof
A light emitting device includes a plurality of unit light emitting regions on a substrate. At least one of the unit light emitting regions includes at least one pair of first and second electrodes that are spaced apart, at least one first bar-type LED in a first layer on the substrate, and at least one second bar-type LED in a second layer on the substrate. At least one of the first bar-type LED or the second bar-type LED is electrically connected between the first electrode and the second electrode.
US10211417B2 Organic light emitting device having an optical distance of a micro cavity and method of fabricating the same
An organic light emitting device can include a first electrode and a second electrode, and a red emission layer, a green emission layer and a blue emission layer which are positioned between the first electrode and the second electrode. Each of the red emission layer, the green emission layer and the blue emission layer can be disposed in an entirety of a red sub-pixel area, a green sub-pixel area and a blue sub-pixel area. A distance between the first electrode and the second electrode in at least one of the red sub-pixel area, the green sub-pixel area and the blue sub-pixel area can be a first-order optical distance equal to λ/2n, where λ is a wavelength of light emitted from each of the sub-pixel areas, and n is an average refractive index of a plurality of organic material layers disposed between the first electrode and the second electrode.
US10211414B2 Phosphorescent tetradentate metal complexes having modified emission spectra
Multidentate metal complexes useful as phosphorescent emitters in display and lighting applications having the following structures:
US10211411B2 Thermally activated delayed fluorescent material based on 9,10-dihydro-9,9-dimethylacridine analogues for prolonging device longevity
Thermally activated delayed fluorescent compounds and uses thereof are described. The thermally activated delayed fluorescent compounds are an analogs of 9,10-dihydro-9,9-dimethylacridine compounds.
US10211410B2 Organic compound and electronic device using same
An organic compound is disclosed. The organic compound includes a cis-stilbene segment, a bridge atom segment having a bridge atom with four bonds, and the bridge atom is connected to the cis-stilbene segment with two of the four bonds to form a 7-membered ring structure, and a quinoxaline segment connected to the cis-stilbene segment.
US10211402B2 Dibromo-diiodo-dipolycyclic compound and electron acceptor molecules derived therefrom
The present specification provides a di-polycyclic compound, and a polymer chain consisting of alternating electron donor compounds and electron acceptor compounds, which include the di-polycyclic compound.
US10211397B1 Threshold voltage tuning for a volatile selection device
A first architecture for a volatile resistive-switching device with a selector layer (e.g., a highly resistive layer such as a resistive switching medium) non-planar surfaces is detailed. For example, the selector layer can have a first surface that intersects a second surface at an angle (e.g., oblique angle). The angle can be adjusted to control current-voltage response for the volatile resistive-switching device. A second architecture for volatile resistive-switching device with a first terminal having a high particle diffusivity and a second terminal having a low particle diffusivity. The second architecture can provide diode-like current-voltage responses at a sizes (e.g., sub-20 nanometers) in which conventional diodes do not scale.
US10211396B2 Semiconductor device having magnetic tunnel junction structure and method of fabricating the same
A semiconductor device and a method of forming the semiconductor device are disclosed. The semiconductor device includes a lower electrode and a magnetic tunnel junction structure disposed on the lower electrode. The magnetic tunnel junction structure includes a seed pattern disposed on the lower electrode. The seed pattern includes an amorphous seed layer and an oxidized seed layer disposed on a surface of the amorphous seed layer. The seed pattern may prevent the lattice structure of the lower electrode from adversely affecting the lattice structure of a pinned magnetic layer of the magnetic tunnel junction structure.
US10211394B1 Magnetic memory
A magnetic memory according to an embodiment includes: a first and second terminals; a conductive layer, which is nonmagnetic, the conductive layer including a first to third regions, the second region being disposed between the first region and the third region, the first region being electrically connected to the first terminal, and the third region being electrically connected to the second terminal; a magnetoresistive element disposed to correspond to the second region of the conductive layer, the magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer and electrically connected to the second region, a nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, and a third terminal electrically connected to the first magnetic layer; and a third magnetic layer, the conductive layer being disposed between the third and second magnetic layers.
US10211393B2 Spin accumulation torque MRAM
An MRAM memory cell is proposed that is based on spin accumulation torque. One embodiment includes a magnetic tunnel junction, a spin accumulation layer connected to the magnetic tunnel junction and a polarization layer connected to the spin accumulation layer. The polarization layer and the spin accumulation layer use spin accumulation to provide a spin accumulation torque on the free magnetic layer of the magnetic tunnel junction to change direction of magnetization of the free magnetic layer.
US10211390B2 Friction drive actuator
Provided is a friction drive actuator that is resistant to contamination of, for example, extraneous matter. An ultrasonic actuator according to an aspect of the present invention drives a columnar insertion section and includes a columnar vibrating body (40), whose distal end is pressed against a side surface of the insertion section, and a piezoelectric element (44), an upper electrode (44a), and a lower electrode (44b) that are provided at one side surface of the vibrating body.
US10211389B2 Composite substrate
In the composite substrate 10, the piezoelectric substrate 12 and the support substrate 14 are bonded by direct bonding using an ion beam. One surface of the piezoelectric substrate 12 is a negatively-polarized surface 12a and another surface of the piezoelectric substrate 12 is a positively-polarized surface 12b. An etching rate at which the negatively-polarized surface 12a is etched with a strong acid may be higher than an etching rate at which the positively-polarized surface 12b is etched with the strong acid. The positively-polarized surface 12b of the piezoelectric substrate 12 is directly bonded to the support substrate 14. The negatively-polarized surface 12a of the piezoelectric substrate 12 may be etched with the strong acid.
US10211388B2 Piezoelectric device and method of manufacturing the same
A piezoelectric device and a method of manufacturing a piezoelectric device are provided. The piezoelectric device includes first and second electrodes disposed on a first surface of a piezoelectric layer; third and fourth electrodes disposed on a second surface of the piezoelectric layer, a first conductor electrically connecting the first and fourth electrodes, and a second conductor electrically connecting the second and third electrodes, in a cross-link with the first conductor.
US10211387B2 Method for controlling ultrasonic motor and surveying instrument for the same
Provided is a method for controlling an ultrasonic motor to reduce noise sounding during low-speed rotation in a surveying instrument adopting the ultrasonic motor for a rotary shaft, and a surveying instrument for the same. In a method for controlling an ultrasonic motor according to an aspect of the present invention, in a low-speed rotation range of an ultrasonic motor, a ratio of an acceleration period as a time of application of the drive signal in a control cycle is controlled, and a time to start the acceleration period is randomly shifted for each control cycle. In a method for controlling an ultrasonic motor according to another aspect, a time to start the acceleration period is regularly shifted for each control cycle. In a method for controlling an ultrasonic motor according to still another aspect, second-half acceleration control and first-half acceleration control are alternately repeated.
US10211386B2 Architecture for coupling quantum bits using localized resonators
A technique relates a superconducting microwave cavity. An array of posts has different heights in the cavity, and the array supports a localized microwave mode. The array of posts includes lower resonant frequency posts and higher resonant frequency posts. The higher resonant frequency posts are arranged around the lower resonant frequency posts. A first plate is opposite a second plate in the cavity. One end of the lower resonant frequency posts is positioned on the second plate so as to be electrically connected to the second plate. Another end of the lower resonant frequency posts in the array is open so as not to form an electrical connection to the first plate. Qubits are connected to the lower resonant frequency posts in the array of posts, such that each of the qubits is physically connected to one or two of the lower resonant frequency posts in the array of posts.
US10211385B2 Thermoelectric device
The present invention provides thermoelectric device comprising a first electrode, a second electrode, a first electrolyte composition capable of transporting cations, a second electrolyte composition capable of transporting anions and a connector comprising mobile cations and mobile anions, wherein the first electrolyte composition is connected to said first electrode by being in ionic contact and the second electrolyte composition is connected to said second electrode by being in ionic contact and said connector is in ionic contact with said first and said second electrolyte composition, such that an applied temperature difference over said electrolyte compositions or an applied voltage over said electrodes facilitate transport of ions to and/or from said electrodes via said electrolyte compositions. There is also provided a method for generating electric current and a method for generating a temperature difference.
US10211384B2 Light emitting diode apparatus and manufacturing method thereof
An LED apparatus is provided. The LED apparatus includes a plurality of substrate layers, each substrate layer corresponding to one of a plurality of sub-pixels of a pixel; a heat sink plate provided on a first side of each substrate layer, the heat sink plate including a patterned area provided between adjacent substrate layers of the plurality of substrates layers; a fluorescence provided on the heat sink plate overlapping at least a portion of one of the plurality of substrate layers; and a plurality of light emitting diodes, each light emitting diode formed on a second side opposite to the first side of each substrate layer.
US10211382B2 LED chip integrated with hybrid sensor and method of fabricating the same
The present invention relates to a light emitting diode (LED) chip, in which a hybrid sensor is formed in a nitride-based LED structure. A chip structure embedded with such a hybrid sensor functions as an LED light emitting sensor which can monitor environmental pollution while functioning as a lighting element at the same time and has an effect of being used as a variety of environment pollution sensors according to the type of an electrode material.
US10211381B2 Light-emitting device
A light-emitting device includes: a semiconductor laser element; a supporting member located above the semiconductor laser element, the supporting member having a through-hole that allows light emitted from the semiconductor laser element to pass therethrough; a fluorescent member located in the through-hole, the fluorescent member containing a fluorescent material that is excitable by light emitted from the semiconductor laser element so as to emit light having a wavelength different from a wavelength of the light emitted from the semiconductor laser element; and a light-transmissive heat dissipating member including: a base portion, and a projecting portion projecting from the base portion into the through-hole. An upper surface of the projecting portion of the heat dissipating member is bonded to a lower surface of the fluorescent member. An upper surface of the base portion of the heat dissipating member is bonded to a lower surface of the supporting member.
US10211378B2 Light emitting device and method for manufacturing same
A light emitting device has: a base; a light emitting element disposed on the base; a light-transmissive member having a pair of opposing portions, the light-transmissive member being disposed on the base such that the light emitting element is interposed between and spaced apart from the pair of opposing portions; a sealing member that contains a phosphor and covers the light emitting element, at least a portion of upper surfaces of the pair of opposing portions, and inner lateral surfaces thereof.
US10211371B2 Semiconductor modification process for conductive and modified electrical regions and related structures
There is herein described a process for providing improved device performance and fabrication techniques for semiconductors. More particularly, the present invention relates to a process for forming features, such as pixels, on GaN semiconductors using a p-GaN modification and annealing process. The process also relates to a plasma and thermal anneal process which results in a p-GaN modified layer where the annealing simultaneously enables the formation of conductive p-GaN and modified p-GaN regions that behave in an n-like manner and block vertical current flow. The process also extends to Resonant-Cavity Light Emitting Diodes (RCLEDs), pixels with a variety of sizes and electrically insulating planar layer for electrical tracks and bond pads.
US10211370B2 Infrared LED
An infrared LED having a monolithic and stacked structure, having an n-doped base substrate, which includes GaAs, a lower cladding layer, an active layer for generating infrared radiation, an upper cladding layer, a current distribution layer and an upper contact layer. The layers being preferably disposed in the specified order. A first tunnel diode is disposed between the upper cladding layer and the current distribution layer, and the current distribution layer predominantly including an n-doped, Ga-containing layer having a Ga content>1%.
US10211369B2 Ultraviolet light-emitting devices incorporating two-dimensional hole gases
In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.
US10211365B2 Method for producing optoelectronic devices comprising light-emitting diodes
A method for producing optoelectronic devices, including the following successive steps: providing a substrate having a first face; on the first face, forming sets of light-emitting diodes including wire-like, conical or frustoconical semiconductor elements; covering all of the first face with a layer encapsulating the light-emitting diodes; forming a conductive element that is insulated from the substrate and extends through the substrate from the second face to at least the first face; reducing the thickness of the substrate; and cutting the resulting structure in order to separate each set of light-emitting diodes.
US10211364B2 Display with surface mount emissive elements and active matrix drive
A surface mount emissive element is provided with a top surface and a bottom surface. A first electrical contact is formed exclusively on the top surface, and a second electrical contact is formed exclusively on the top surface. A post extends from the bottom surface. An emissive display is also provided made from surface mount emissive elements and an emissions substrate. The emissions substrate has a top surface with a first plurality of wells formed in the emissions substrate top surface. Each well has a bottom surface, sidewalls, a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface. The emissions substrate also includes a matrix of column and row conductive traces forming a first plurality of column/row intersections, where each column/row intersection is associated with a corresponding well. A first plurality of emissive elements populates the wells.
US10211359B2 Nano avalanche photodiode architecture for photon detection
An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.
US10211348B2 Semiconductor device and a manufacturing method thereof
In a semiconductor device including a split gate type MONOS memory, and a trench capacitor element having an upper electrode partially embedded in trenches formed in the main surface of a semiconductor substrate, merged therein, the flatness of the top surface of the upper electrode embedded in the trench is improved. The polysilicon film formed over the semiconductor substrate to form a control gate electrode forming a memory cell of the MONOS memory is embedded in the trenches formed in the main surface of the semiconductor substrate in a capacitor element formation region, thereby to form the upper electrode including the polysilicon film in the trenches.
US10211345B2 Semiconductor device
A transistor including an oxide semiconductor layer can have stable electrical characteristics. In addition, a highly reliable semiconductor device including the transistor is provided. A semiconductor device includes a multi-layer film including an oxide layer and an oxide semiconductor layer, a gate insulating film in contact with the multi-layer film, and a gate electrode overlapping with the multi-layer film with the gate insulating film provided therebetween. In the semiconductor device, the oxide semiconductor layer contains indium, the oxide semiconductor layer is in contact with the oxide layer, and the oxide layer contains indium and has a larger energy gap than the oxide semiconductor layer.
US10211342B2 Thin film transistor and fabrication method thereof, array substrate, and display panel
A thin film transistor and a fabrication method thereof, an array substrate, and a display panel are provided. The fabrication method of the thin film transistor includes: forming an active layer on a base substrate, the active layer including a channel region; forming an amorphous carbon layer on a region of the active layer other than the channel region; and forming a source electrode and a drain electrode on the amorphous carbon layer, the source electrode and the drain electrode being respectively electrically connected with the active layer through the amorphous carbon layer.
US10211341B2 Tensile strained high percentage silicon germanium alloy FinFETS
A thermal mixing process is employed to convert a portion of a silicon germanium alloy fin having a first germanium content and an overlying non-doped epitaxial silicon source material into a silicon germanium alloy source structure having a second germanium content that is less than the first germanium content, to convert another portion of the silicon germanium alloy fin and an overlying non-doped epitaxial silicon drain material into a silicon germanium alloy drain structure having the second germanium content, and to provide a tensile strained silicon germanium alloy fin portion having the first germanium content. A dopant is then introduced into the silicon germanium alloy source structure and into the silicon germanium alloy drain structure.
US10211339B2 Vertical transistor having a semiconductor pillar penetrating a silicide formed on the substrate surface
A semiconductor device includes a semiconductor substrate including a first source/drain region formed in an upper portion of the semiconductor substrate, a metal silicide layer that covers a top surface of the first source/drain region, and a semiconductor pillar that penetrates the metal silicide layer and is connected to the semiconductor substrate. The semiconductor pillar includes a second source/drain region formed in an upper portion of the semiconductor pillar, a gate electrode on the metal silicide layer, with the gate electrode surrounding the semiconductor pillar in a plan view. A contact is connected to the metal silicide layer.
US10211338B2 Integrated circuits having tunnel transistors and methods for fabricating the same
Integrated circuits including tunnel transistors and methods for fabricating such integrated circuits are provided. An exemplary method for fabricating an integrated device includes forming a lower source/drain region in and/or over a semiconductor substrate. The method forms a channel region overlying the lower source/drain region. The method also forms an upper source/drain region overlying the channel region. The method includes forming a gate structure beside the channel region.
US10211337B2 Semiconductor device
To provide a high-withstand-voltage lateral semiconductor device in which ON-resistance or drain current density is uniform at an end portion and a center portion of the device in a gate width direction. A lateral N-type MOS transistor 11 formed on an SOI substrate includes a trench isolation structure 10b filled with an insulating film at an end portion of the transistor. An anode region 6 of a diode 12 is provided adjacent to a P-type body region 1 of the transistor through the trench isolation structure 10b and a cathode region 15 of the diode 12 is also provided adjacent to an N-type drain-drift region 4 of the transistor through the trench isolation structure 10b so as to cause electric field to be applied to the trench isolation structure 10b to be zero when a voltage is applied across the transistor.
US10211336B2 LDMOS transistor structures and integrated circuits including LDMOS transistor structures
LDMOS transistor structures and integrated circuits including LDMOS transistor structures are provided. An exemplary integrated circuit including an LDMOS transistor structure includes a substrate including a first region and a second region. The substrate includes a bulk layer and, in the second region, an insulator layer overlying the bulk layer and a semiconductor layer overlying the insulator layer. The integrated circuit further includes a gate structure overlying the semiconductor layer. A channel region is formed in the semiconductor layer under the gate structure. The integrated circuit also includes a well contact region on the bulk layer in the first region, a source region overlying the substrate, and a drain region overlying the substrate. A drift region is located between the drain region and the gate structure.
US10211335B2 LDMOS transistor with segmented gate dielectric layer
A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments with thick field oxide between each segment in order to reduce gate capacitance and thereby improve a resistance times gate charge figure of merit.
US10211332B2 Semiconductor device and manufacturing method of the same
A semiconductor device including a field-effect transistor having source and drain source regions, first and second gate electrodes and a protective diode connected to the transistor. The first gate electrode is formed over a first gate insulating film in a lower part of a trench. The second gate electrode is formed over a second gate insulating film in an upper part of the trench. The first gate electrode includes a first polysilicon film, and the second gate electrode includes a second polysilicon film, wherein an impurity concentration of the first polysilicon film is lower than an impurity concentration of the second polysilicon film.
US10211331B2 Semiconductor device
A semiconductor device includes a first conductivity type first semiconductor region, a second conductivity type second semiconductor region, a second conductivity type third semiconductor region, a first conductivity type fourth semiconductor region, a gate insulating portion, a gate electrode, and first and second electrodes. The first semiconductor region includes first and second portions. The second semiconductor region includes third and fourth portions. The gate electrode is on the gate insulating portion and over the first semiconductor region and a portion of the third semiconductor region. The first electrode is on, and electrically connected to, the fourth semiconductor region. The second electrode is over the first portion, the third portion, and the gate electrode, and spaced from the first electrode.
US10211327B2 Semiconductor devices with raised doped crystalline structures
Semiconductor devices including an elevated or raised doped crystalline structure extending from a device layer are described. In embodiments, III-N transistors include raised crystalline n+ doped source/drain structures on either side of a gate stack. In embodiments, an amorphous material is employed to limit growth of polycrystalline source/drain material, allowing a high quality source/drain doped crystal to grow from an undamaged region and laterally expand to form a low resistance interface with a two-degree electron gas (2DEG) formed within the device layer. In some embodiments, regions of damaged GaN that may spawn competitive polycrystalline overgrowths are covered with the amorphous material prior to commencing raised source/drain growth.
US10211326B2 Vertical power component
A vertical power component includes a doped silicon substrate of a first conductivity type. A local well of a second conductivity type extends from an upper surface of the substrate. A passivation structure coats a peripheral region of the upper surface side of the substrate surrounding the well. This passivation structure includes, on top of and in contact with the peripheral substrate region, a first region made of a first passivation material and a second region made of a second passivation material. The second region generates, in a surface region of the substrate in contact with said second region, a local increase of the concentration of majority carriers in the substrate.
US10211325B2 Semiconductor device including undulated profile of net doping in a drift zone
A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. A profile of net doping of the drift zone along at least 50% of a vertical extension of the drift zone between the first and second sides is undulated and includes doping peak values between 1×1013 cm−3 and 5×1014 cm−3. A device blocking voltage Vbr is defined by a breakdown voltage of the pn junction between the drift zone and a semiconductor region of opposite conductivity type that is electrically coupled to the first side of the semiconductor body.
US10211324B2 Vertical p-type, n-type, p-type (PNP) junction integrated circuit (IC) structure
Various particular embodiments include an integrated circuit (IC) structure having: a stack region; and a silicon substrate underlying and contacting the stack region, the silicon substrate including: a silicon region including a doped subcollector region; a set of isolation regions overlying the silicon region; a base region between the set of isolation regions and below the stack region, the base region including an intrinsic base contacting the stack region, an extrinsic base contacting the intrinsic base and the stack region, and an amorphized extrinsic base contact region contacting the extrinsic base; a collector region between the set of isolation regions; an undercut collector-base region between the set of isolation regions and below the base region; and a collector contact region contacting the collector region under the intrinsic base and the collector-base region via the doped subcollector region.
US10211319B2 Stress retention in fins of fin field-effect transistors
Embodiments of the present invention provide a structure and method of minimizing stress relaxation during fin formation. Embodiments may involve forming a looped spacer on an upper surface of a substrate and adjacent to at least a sidewall of a mandrel. The mandrel may be removed, leaving the looped spacer on the substrate. An exposed portion of the substrate may be removed to form a looped fin below the looped spacer. The spacer may be removed, leaving a looped fin. A looped fin formation may reduce stress relaxation compared to conventional fin formation methods. Embodiments may include forming a gate over a looped portion of a looped fin. Securing a looped portion in position with a gate may decrease stress relaxation in the fin. Thus, a looped fin with a looped portion of the looped fin under a gate may have substantially reduced stress relaxation compared to a conventional fin.
US10211316B2 Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process
A vertical fin field-effect-transistor and a method for fabricating the same. The vertical fin field-effect-transistor includes at least a substrate, a first source/drain layer, and a plurality of fins each disposed on and in contact with the first source/drain layer. Silicide regions are disposed within a portion of the first source/drain layer. A gate structure is in contact with the plurality of fins, and a second source/drain layer is disposed on the gate structure. The method includes forming silicide in a portion of a first source/drain layer. A first spacer layer is formed in contact with at least the silicide, the first source/drain layer and the plurality of fins. A gate structure is formed in contact with the plurality of fins and the first spacer layer. A second spacer layer is formed in contact with the gate structure and the plurality of fins.
US10211314B1 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of first forming a gate structure on a substrate, forming a contact etch stop layer (CESL) on the gate structure, forming an interlayer dielectric (ILD) layer around the gate structure, performing a curing process so that an oxygen concentration of the CESL is different from the oxygen concentration of the ILD layer, and then performing a replacement metal gate process (RMG) process to transform the gate structure into a metal gate.
US10211312B2 Ferroelectric memory device and fabrication method thereof
The disclosed technology generally relates to semiconductor devices, and more particularly to a non-volatile ferroelectric memory device and to methods of fabricating the same. In one aspect, a non-volatile memory device includes a high dielectric constant layer (high-k) layer or a metal layer on a semiconductor substrate. The non-volatile memory device additionally includes a two-dimensional (2D) semiconductor channel layer interposed between the high-k layer or metal layer and a ferroelectric layer. The non-volatile memory device additionally includes a metal gate layer on the ferroelectric layer, and further includes a source region and a drain region each electrically coupled to the 2D semiconductor channel layer.
US10211310B2 Remote plasma based deposition of SiOC class of films
Provided are methods and systems for providing oxygen doped silicon carbide. A layer of oxygen doped silicon carbide can be provided under process conditions that employ silicon-containing precursors that have one or more silicon-hydrogen bonds and/or silicon-silicon bonds. The silicon-containing precursors also have one or more silicon-oxygen bonds and/or silicon-carbon bonds. One or more radical species in a substantially low energy state can react with the silicon-containing precursors to form the oxygen doped silicon carbide. The one or more radical species can be formed in a remote plasma source.
US10211304B2 Semiconductor device having gate trench in JFET region
The subject matter disclosed herein relates to metal-oxide-semiconductor (MOS) devices, such as silicon carbide (SiC) power devices (e.g., MOSFETs, IGBTs, etc.). A semiconductor device includes a well region extending a first depth into a surface of an epitaxial semiconductor layer positioned above a drift region. The device includes a junction field-effect transistor (JFET) region positioned adjacent to the well region in the epitaxial semiconductor layer. The device also includes a trench extending a second depth into the JFET region, wherein the trench comprises a bottom and a sidewall that extends down to the bottom at an angle relative to the surface of the epitaxial semiconductor layer.
US10211299B2 Semiconductor device and semiconductor device manufacturing method
Provided is a semiconductor device including a semiconductor substrate; a gate trench portion formed in a front surface of the semiconductor substrate; a dummy trench portion formed in the front surface of the semiconductor substrate; and a first front-surface-side electrode that includes metal and is formed above the front surface of the semiconductor substrate. The gate trench portion includes a gate trench formed in the front surface of the semiconductor substrate; a gate conducting portion formed inside the gate trench; and a gate insulating portion that is formed above the gate conducting portion inside the gate trench and provides insulation between the gate conducting portion and the first front-surface-side electrode. The dummy trench portion includes a dummy trench formed in the front surface of the semiconductor substrate; and a dummy conducting portion that is formed inside the dummy trench and contacts the first front-surface-side electrode.
US10211297B2 Semiconductor heterostructures and methods for forming same
A heterostructure includes a substrate; an intermediate layer disposed on the substrate; and a group III-V layer having a first primary surface disposed on the intermediate layer and a dopant concentration that varies in a manner including a plurality of ramps with at least one of increasing dopant concentration and decreasing dopant concentration, along the growth direction from the first primary surface throughout the layer's thickness before terminating in a second primary surface.
US10211294B2 III-nitride semiconductor structures comprising low atomic mass species
III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.
US10211291B2 Integrated circuit comprising components, for example NMOS transistors, having active regions with relaxed compressive stresses
An integrated circuit includes a substrate and at least one component unfavorably sensitive to compressive stress which is arranged at least partially within an active region of the substrate limited by an insulating region. To address compressive stress in the active region, the circuit further includes at least one electrically inactive trench located at least in the insulating region and containing an internal area configured to reduce compressive stress in the active region. The internal area is filled with polysilicon. The polysilicon filled trench may further extend through the insulating region and into the substrate.
US10211290B2 Electrostatic discharge protection
A bipolar junction transistor is configured to provide electrostatic discharge (ESD) protection for an integrated circuit. The bipolar junction transistor includes a substrate configured to function as a gate for the bipolar junction transistor. At least one drain finger extends in a first direction on a first surface of the substrate and is configured to function as a collector for the bipolar junction transistor. At least one source finger extends in the first direction on the first surface of the substrate and is configured to function as an emitter for the bipolar junction transistor. The at least one source finger includes a pickup region that is configured to set a substrate potential.
US10211289B2 Semiconductor device, related manufacturing method, and related electronic device
A semiconductor device may include a semiconductor substrate. The semiconductor device may further include a gate electrode that overlaps the semiconductor substrate. The semiconductor device may further include a channel region that overlaps at least one of the gate electrode and the semiconductor substrate. The semiconductor device may further include a stress adjustment element that contacts the channel region and is positioned between the channel region and a surface of the semiconductor substrate in a direction perpendicular to the surface of the semiconductor substrate. A maximum width of the channel region in a direction parallel to the surface of the semiconductor substrate is greater than a maximum width of the stress adjustment element in the direction parallel to the surface of the semiconductor substrate in a cross-sectional view of the semiconductor device.
US10211285B2 Semiconductor device, and method for manufacturing semiconductor device
[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same.[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.
US10211283B2 Operation of double-base bipolar transistors with additional timing phases at switching transitions
Methods and systems for operating a double-base bidirectional power bipolar transistor. Two timing phases are used to transition into turn-off: one where each base is shorted to its nearest emitter/collector region, and a second one where negative drive is applied to the emitter-side base to reduce the minority carrier population in the bulk substrate. A diode prevents reverse turn-on while negative base drive is being applied.
US10211282B2 Capacitor structures, decoupling structures and semiconductor devices including the same
Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.
US10211278B2 Device and method for a thin film resistor using a via retardation layer
A device and method for fabricating an integrated circuit (IC) chip is disclosed. The method includes depositing a first thin film resistor material on a first inter-level dielectric (ILD) layer; depositing an etch retardant layer overlying the first thin film resistor material; and patterning and etching the etch retardant layer and the first thin film resistor material to form a first resistor. The method continues with depositing a second ILD layer overlying the first resistor; and patterning and etching the second ILD layer using a first etch chemistry to form vias through the second ILD layer and the etch retardant layer to the first resistor. The etch retardant layer is selective to a first etch chemistry and the thickness of the etch retardant layer is such that the via etching process removes substantially all exposed portions of the etch retardant layer and substantially prevents consumption of the underlying first thin film resistor material.
US10211277B2 Display device
A display device includes a substrate including a display area and a peripheral area and being flexible around a bending axis in the peripheral area, a data line and a driving voltage line in the display area, an inorganic insulating layer defines an opening corresponding to the flexible area, a first and second conductive layers in the peripheral area and being spaced apart from each other around the opening, an organic insulating layer covering the first and second conductive layers, and a connection conductive layer connecting the first and second conductive layers via contact holes of the organic insulating layer, and the first and second conductive layers includes a same material as that of one of the data line and the driving voltage line, and the connection conductive layer includes a same material as that of the other of the data line and the driving voltage line.
US10211275B2 Organic light emitting diode display panel with pads and organic light emitting diode display device having the same
An organic light emitting diode display panel includes data lines arranged in a first direction; gate lines arranged in a second direction to cross the data lines; a driving voltage line arranged in the first direction; a reference voltage line arranged in the first direction; data pads respectively at ends of corresponding ones of the data lines; a driving voltage pad at an end of the driving voltage line; and a reference voltage pad at an end of the reference voltage line. A first distance is defined between the driving voltage pad and an adjacent data pad, a second distance is defined between adjacent ones of the data pads, and a third distance is defined between the reference voltage pad and an adjacent data pad. At least two of the first distance, the second distance, and the third distance are different from each other.
US10211273B2 Display apparatus
Provided is a display apparatus, including a substrate; a plurality of pixels that are on the substrate and include at least one display device; a separation area that is on the substrate and between two adjacent pixels from among the plurality of pixels; and a penetrating portion that is in the separation area and penetrates the substrate.
US10211271B2 Organic light emitting display device
Disclosed is an organic light emitting display device for reducing or preventing anodes from being partially detached or torn in high resolution models. The organic light emitting display device includes a substrate including first and second subpixels disposed adjacent to each other in a first axis direction, a first anode electrode provided in the first subpixel and connected to a first TFT of the first subpixel through a first contact hole, and a second anode electrode provided in the second subpixel and connected to a second TFT of the second subpixel through a second contact hole. The first and second contact holes are disposed in a diagonal direction, the first anode electrode protrudes from the first contact hole in a direction toward the second subpixel, and the second anode electrode protrudes from the second contact hole in a direction toward the first subpixel. Accordingly, partial detachment of anode electrodes is reduced, or in some cases, prevented.
US10211269B2 Display device with non-planar reflective lower electrode
A display device includes a plurality of emitting elements corresponding to a plurality of pixels. The emitting element includes a lower electrode, an upper electrode having a light-transmitting property, and a light-emitting layer between the lower electrode and the upper electrode. The lower electrode includes a flat portion and an inclined portion that is inclined obliquely upward and outward from the central area of the flat portion. Both of the flat portion and the inclined portion include a reflective surface respectively. The reflective surface of the flat portion has a light reflectance lower than that of the reflective surface of the inclined portion.
US10211267B2 Touch sensible organic light emitting device
Embodiments of the present invention generally relate to a touch sensible organic light emitting device. The organic light emitting device according to an exemplary embodiment of the present invention comprises: a substrate; a thin film transistor disposed on the substrate; an organic light emitting element connected to the thin film transistor and receiving a data voltage; a plurality of encapsulation thin films disposed on the organic light emitting element, and encapsulating the thin film transistor and the organic light emitting element; a planarization layer disposed on the encapsulation thin film; and a touch sensor disposed on the planarization layer.
US10211266B2 Organic light-emitting diodes touch display panel and electronic device using same
An OLED touch display panel capable of detecting and reacting to touches on the display includes a signal sending element emitting ultrasonic signals, a driving layer configured to provide display driving signals, a light-emitting element configured to receive the display driving signals and emit light, and a signal receiving element configured for receiving reflected ultrasonic signals. The light-emitting element includes a plurality of light-emitting units and a plurality of black matrixes. Every two adjacent light-emitting units are separated from each other by one of the black matrixes. The signal receiving element includes a plurality of thin film transistor units arranged in a matrix. Each thin film transistor unit is formed on one of the black matrixes.
US10211258B2 Manufacturing methods of JFET-type compact three-dimensional memory
Manufacturing methods of JFET-type compact three-dimensional memory (3D-MC) are disclosed. In a memory level stacked above the substrate, an x-line extends from a memory array to an above-substrate decoding stage. A JFET-type transistor is formed on the x-line as a decoding device for the above-substrate decoding stage, where the overlap portion of the x-line with the control-line (c-line) is semi-conductive.
US10211257B2 High density resistive random access memory (RRAM)
A memory cell includes a substrate layer, with a plurality of silicided semiconductor fins stacked on the substrate layer and spaced apart from one another. A first metal liner layer is stacked on the plurality of silicided semiconductor fins and on the substrate layer. A plurality of first contact pillars are stacked on the first metal liner layer adjacent a different respective one of the plurality of silicided semiconductor fins. A configurable resistance structure covers portions of the first metal liner layer that are stacked on the substrate layer and portions of the first metal liner layer that are stacked on each of the plurality of silicided semiconductor fins. A metal fill layer is stacked on the configurable resistance structure. A plurality of second contact pillars is stacked on the metal fill layer adjacent a space between a different pair of adjacent silicided semiconductor fins of the plurality thereof.
US10211252B2 Multispectral imaging device and imaging system
The present disclosure provides a multispectral imaging device and imaging system. The multispectral imaging device comprises: a substrate; a plurality of semiconductor layers, stacked on the substrate and arranged in a direction perpendicular to the substrate, different semiconductor layers converting visible light photons and NIR light photons to electrons, respectively; and a filtering layer, arranged on one side of the plurality of semiconductor layers away from the substrate, comprising a plurality of filtering sections arranged as a matrix, to separate the incident light to multiple wavebands on a plane parallel to the substrate. The multispectral imaging device and imaging system separate the incident light by waveband in a direction perpendicular to the substrate and a direction parallel to the substrate, then multispectral images can be acquired at the same time.
US10211251B1 CMOS image sensor including superlattice to enhance infrared light absorption
A CMOS image sensor may include a semiconductor substrate having a first conductivity type, and a plurality of laterally adjacent infrared (IR) photodiode structures on the substrate. Each IR photodiode structure may include a superlattice on the semiconductor substrate including a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Further, the superlattice may have the first conductivity type. The CMOS image sensor may further include a semiconductor layer on the superlattice, a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well within the retrograde well having the first conductivity type.
US10211250B2 Solid-state image sensor electronic device
The present disclosure relates to a solid-state image sensor and an electronic device enabling prevention of entrance of incident light from adjacent pixels and suppression of color mixture, decrease in resolution, and decrease in sensitivity. In a solid-state image sensor according to one aspect of the present disclosure, each pixel includes: these different photoelectric conversion parts configured to perform photoelectric conversion of light of a first wavelength of light of a second wavelength and a third wavelength respectively. An electrode wiring provided at a boundary of adjacent pixels, horizontally connects an electrode of at least one of the photoelectric conversion parts in one of the adjacent pixels with an electrode of the corresponding one of the photoelectric conversion parts in another of the adjacent pixels and vertically connects with an electrode of at least one of the photoelectric conversion parts of each of the pixels.
US10211247B2 Solid-state imaging device, manufacturing method thereof, and electronic apparatus
A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.
US10211244B2 Image sensor device with reflective structure and method for forming the same
An image sensor device is provided. The image sensor device includes a semiconductor substrate having a front surface, a back surface opposite to the front surface, at least one light-sensing region close to the front surface, and a first trench surrounding the light-sensing region. The first trench has an inner wall and a bottom surface. The image sensor device includes an insulating layer covering the back surface, the inner wall, and the bottom surface. A thickness of a first upper portion of the insulating layer in the first trench increases in a direction away from the front surface, and the insulating layer has a second trench partially in the first trench. The image sensor device includes a reflective structure filled in the second trench. The reflective structure has a light reflectivity ranging from about 70% to about 100%.
US10211242B2 Image sensor
An image sensor is provided. The image sensor includes a visible light receiving portion and an infrared receiving portion. The visible light receiving portion is configured to receive a visible light. The infrared receiving portion is configured to receive infrared. The visible light receiving portion comprises an infrared cutoff filter, plural primary color filters, and plural secondary color filters. The primary color filters and the secondary color filters are disposed on the infrared cutoff filter. The infrared receiving portion comprises plural first infrared pass filters and plural second infrared pass filters disposed on the first infrared pass filters. Each of the primary color filters occupies a first area. The secondary color filters and the second infrared pass filters occupy a second area substantially equal to the first area.
US10211240B2 Method for manufacturing semiconductor device
An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.
US10211239B2 Separation method, display device, display module, and electronic device
To increase the yield of the separation process. To produce display devices formed through the separation process with higher mass productivity. A first layer is formed using a material including a resin or a resin precursor over a substrate. Then, first heat treatment is performed on the first layer, whereby a first resin layer including a residue of an oxydiphthalic acid is formed. Then, a layer to be separated is formed over the first resin layer. Then, the layer to be separated and the substrate are separated from each other. The first heat treatment is performed in an atmosphere containing oxygen.
US10211237B2 Transparent substrate and process for producing it
To provide a transparent substrate with excellent appearance and with high visibility when observed from a predetermined direction, and a process for producing it. A transparent substrate comprising a substrate having a curved surface on at least a part of its front surface, and an antiglare layer formed on the center region and the edge region of the curved surface, wherein the absolute value of the difference between the 60° specular glossiness at the center region and the 60° specular glossiness at the edge region is higher than 20%.
US10211228B2 Display apparatus and method of manufacturing the same
A display apparatus includes a substrate partitioned into a central area and a peripheral area disposed adjacent to the central area. The central area includes a display area; a first insulating layer corresponding to the peripheral area of the substrate; at least one slit corresponding to a region of the first insulating layer; and a cladding layer, which covers the at least one slit, on the first insulating layer.
US10211227B2 Display substrate and method of manufacturing the same
A display substrate includes: a base substrate; a switching device disposed on the base substrate, the switching device including a gate electrode, a source electrode, and a drain electrode overlapping at least a part of the gate electrode; a wavelength converting layer disposed on the switching device, the wavelength converting layer including a quantum dot; a bridge electrode disposed on the wavelength converting layer, the bridge electrode electrically connected to the drain electrode through a first contact hole formed through the wavelength converting layer; a planarizing layer disposed on the wavelength converting layer; and a pixel electrode disposed on the planarizing layer, the pixel electrode electrically connected to the bridge electrode through a second contact hole formed through the planarizing layer.
US10211226B2 Display panel having color blocks overlapping and filling openings in light shielding layer
In a display panel, a light shielding layer includes first and second openings adjacent to a first edge of a first substrate. First and second color blocks adjacent to each other are disposed on the light shielding layer along a first direction. The first color block is injected into the first opening and overlaps partial of the light shielding layer. The second color block is injected into the second opening and overlaps partial of the light shielding layer. The first color block has a first overlap portion adjacent to the first edge on the light shielding layer, the second color block has a second overlap portion adjacent to the first edge on the light shielding layer, and the area of the first overlap portion and the area of the second overlap portion are different. A display medium layer is sandwiched between the first substrate and a second substrate.
US10211223B2 Vertical ferroelectric memory device and a method for manufacturing thereof
The disclosed technology generally relates to semiconductor devices, and more particularly to a ferroelectric memory device and a method of manufacturing and using the same. In one aspect, a vertical ferroelectric memory device includes a stack of horizontal layers formed on a semiconductor substrate, where the stack of layers includes a plurality gate electrode layers alternating with a plurality of insulating layers. A vertical structure extends vertically through the stack of horizontal layers, where the vertical structure has a vertical channel structure and a sidewall having formed thereon a vertical transition metal oxide (TMO) ferroelectric layer. A memory cell is formed at each of overlapping regions between the gate electrode layers and the vertical channel structure.
US10211219B2 Nonvolatile semiconductor memory device and manufacturing method thereof
A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
US10211217B2 Method of manufacturing a semiconductor device and a semiconductor device
A non-volatile memory (NVM) cell includes a semiconductor wire including a select gate portion and a control gate portion. The NVM cell includes a select transistor formed with the select gate portion and a control transistor formed with the control gate portion. The select transistor includes a gate dielectric layer disposed around the select gate portion and a select gate electrode disposed on the gate dielectric layer. The control transistor includes a stacked dielectric layer disposed around the control gate portion, a gate dielectric layer disposed on the stacked dielectric layer and a control gate electrode disposed on the gate dielectric layer. The stacked dielectric layer includes a first silicon oxide layer disposed on the control gate portion, a charge trapping layer disposed on the first silicon oxide, and a second silicon oxide layer disposed on the charge trapping layer.
US10211215B1 Three-dimensional memory device containing word lines having vertical protrusion regions and methods of making the same
An alternating stack of insulating layers and spacer material layers is formed over a substrate. Each of the first insulating layers and the first sacrificial material layers includes a respective horizontally-extending portion and a respective non-horizontally-extending portion. Memory stack structures are formed through the horizontally-extending portions of the alternating stack. Regions of the non-horizontally-extending portions of the sacrificial material layers are masked with patterned etch mask portions. Unmasked first regions of the non-horizontally-extending portions of the first sacrificial material layers are selectively recessed, and the sacrificial material layers with electrically conductive layers. Each electrically conductive layer can include a vertical plate region and a protrusion region that protrudes above the vertical plate region and having a narrower lateral dimension that the vertical plate region. Metal contact structures can be formed on the protrusion regions without contacting the vertical plate regions.
US10211209B2 Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle
Methods of operating semiconductor memory devices with floating body transistors, using a silicon controlled rectifier principle are provided, as are semiconductor memory devices for performing such operations. A method of maintaining the data state of a semiconductor dynamic random access memory cell is provided, wherein the memory cell comprises a substrate being made of a material having a first conductivity type selected from p-type conductivity type and n-type conductivity type; a first region having a second conductivity type selected from the p-type and n-type conductivity types, the second conductivity type being different from the first conductivity type; a second region having the second conductivity type, the second region being spaced apart from the first region; a buried layer in the substrate below the first and second regions, spaced apart from the first and second regions and having the second conductivity type; a body region formed between the first and second regions and the buried layer, the body region having the first conductivity type; and a gate positioned between the first and second regions and adjacent the body region. The memory cell is configured to store a first data state which corresponds to a first charge in the body region in a first configuration, and a second data state which corresponds to a second charge in the body region in a second configuration. The method includes: providing the memory cell storing one of the first and second data states; and applying a positive voltage to a substrate terminal connected to the substrate beneath the buried layer, wherein when the body region is in the first state, the body region turns on a silicon controlled rectifier device of the cell and current flows through the device to maintain configuration of the memory cell in the first memory state, and wherein when the memory cell is in the second state, the body region does not turn on the silicon controlled rectifier device, current does not flow, and a blocking operation results, causing the body to maintain the second memory state.
US10211206B1 Two-port vertical SRAM circuit structure and method for producing the same
Methods of connecting a read driver transistor to a PD and PU inverter of a two-port vertical SRAM via a shared GAA or a vertical cross-couple contact between a GAA of the read driver transistor and the bottom source/drain region of the PD and PU inverter and the resulting devices are provided. Embodiments include forming a first PD transistor, a first PU transistor, a second PU transistor, and a second PD transistor over a substrate; forming a first PG transistor and a second PG transistor over the substrate; forming a read transistor and a read driver transistor laterally separated in the first direction over the substrate, the read transistor and the read driver transistor adjacent to the second PG transistor and the first PD transistor, respectively; and connecting the read driver transistor, the first PD transistor, and the first PU transistor.
US10211198B2 High voltage electrostatic discharge (ESD) protection
Methods, circuits, devices, and systems for high voltage electrostatic discharge (ESD) protection are provided. An example ESD protection device includes: a base well of a first dopant type on a substrate, a first well of the first dopant type in the base well, a second well of a second dopant type in the base well, a first highly doped region of the first dopant type and a second highly doped region of the second dopant type in the first well, a third highly doped region of the second dopant type in the second well, and a fourth highly doped region of the first dopant type in the third highly doped region. The first highly doped region and the second highly doped region are coupled to a first voltage terminal, and the third highly doped region and the fourth highly doped region are coupled to a second voltage terminal.
US10211197B2 Fabrication of radio-frequency devices with amplifier voltage limiting features
Fabrication of a wireless device involves providing a packaging substrate configured to receive a plurality of components, mounting a radio-frequency module on the packaging substrate, the radio-frequency module including a power amplifier including a bipolar transistor having collector, emitter, base and sub-collector regions, the radio-frequency module further including a conductive via positioned within 35 μm of the sub-collector region in order to clamp a peak voltage of the bipolar transistor at a voltage limit level, and electrically connecting the radio-frequency module to the packaging substrate using a plurality of connectors.
US10211194B2 Semiconductor device and method of manufacturing the same
A semiconductor device includes a base substrate and a semiconductor chip on the base substrate, the semiconductor chip including a first layer structure and a second layer structure opposite to the first layer structure, at least one of the first and second layer structures including a semiconductor device portion, and a bonding structure between the first layer structure and the second layer structure, the bonding structure including a silver-tin (Ag—Sn) compound and a nickel-tin (Ni—Sn) compound.
US10211190B2 Semiconductor packages having reduced stress
A semiconductor package comprises a lower package, a metal layer on the lower package, a ground member on the metal layer, coupled thereto, and an upper package on the lower package. The upper package comprises a ground pattern on a first insulation pattern. The first insulation pattern is on a bottom surface of the upper package and has a hole through which the ground pattern is exposed. The ground member extends inside the hole and is coupled to the ground pattern.
US10211189B2 LED module
An LED module includes: a substrate having a main surface and a back surface which face in opposite directions from each other in a thickness direction; a first LED chip including a first electrode pad bonded to a surface facing the same direction as the main surface; a first wire having one end bonded to the first electrode pad; and a wiring pattern having a main surface electrode formed in the main surface, wherein the main surface electrode includes a first die pad portion which supports the first LED chip, and when viewed from the thickness direction, the first die pad portion includes a main pad portion to which the first LED chip is bonded and an auxiliary pad portion which protrudes from the main pad portion in a direction toward a position of the first electrode pad from the center position in the first LED chip.
US10211181B2 Devices and methods related to singulated radio-frequency devices
Devices and methods for processing singulated radio-frequency (RF) units. In some embodiments, a device for processing singulated RF packages can include a plate having a plurality of apertures. Each aperture can be dimensioned to receive and position a singulated RF package to thereby facilitate processing of the singulated RF packages positioned in their respective apertures. In some embodiments, such a device can be utilized to batch process high volume of RF packages as if the RF packages are still in a panel format.
US10211178B2 Semiconductor device including built-in crack-arresting film structure
A wafer-to-wafer semiconductor device includes a first wafer substrate having a first bonding layer formed on a first bulk substrate layer. A second wafer substrate includes a second bonding layer formed on a second bulk substrate layer. The second bonding layer is bonded to the first bonding layer to define a bonding interface. At least one of the first wafer substrate and the second wafer substrate includes a crack-arresting film layer configured to increase a bonding energy of the bonding interface.
US10211175B2 Stress-resilient chip structure and dicing process
A substrate includes a plurality of semiconductor chips arranged in a grid pattern and laterally spaced from one another by channel regions. The substrate includes a vertical stack of a semiconductor layer and at least one dielectric material layer embedding metal interconnect structures. The at least one dielectric material layer are removed along the channel regions and around vertices of the grid pattern so that each semiconductor chip includes corner surfaces that are not parallel to lines of the grid pattern. The corner surfaces can include straight surfaces or convex surfaces. The semiconductor chips are diced and subsequently bonded to a packaging substrate employing an underfill material. The corner surfaces reduce mechanical stress applied to the metal interconnect layer during the bonding process and subsequent thermal cycling processes.
US10211172B2 Wafer-based electronic component packaging
A surface mount device includes at least one semiconductor device including an exposed top metal, an encapsulation layer partially encapsulating the at least one semiconductor device, and at least one end-termination cap on the surface mount device resulting in an electrical connection from a first side of the surface mount device to a second side of the surface mount device. In implementations, one process for fabricating the surface mount device includes dicing a finished device wafer in a scribe-line region, applying tape to a first side of the finished device wafer, backgrinding a second side of the finished device wafer, encapsulating the second side of the finished device wafer with an encapsulation layer, singulating the finished device wafer, and forming at least one wrap-around connection from a first side of the surface mount device to a second side of the surface mount device.
US10211165B2 Method of manufacturing semiconductor device and semiconductor device
A method of manufacturing a semiconductor device includes stacking a first substrate comprising a first surface having a semiconductor element and an opposing second surface and a second substrate comprising a third surface having a semiconductor element and an opposing fourth surface, forming a first contact hole extending from the second surface to the first surface of the first substrate and forming a first groove inwardly of a first region of the second surface of the first substrate by etching inwardly of the first substrate from the second surface thereof, forming a first patterned mask on the first substrate, so that the first groove is covered by the material of the first patterned mask, forming a first metal electrode in the first contact hole through an opening in the first mask as a mask, and removing the first mask and subsequently cutting through the first substrate in the first groove.
US10211163B2 Semiconductor package and method of fabricating the same
A semiconductor package including a marking film and a method of fabricating the same are provided wherein a marking film including a thermoreactive layer may be applied to a molding layer to protect a semiconductor chip under the molding layer and to efficiently perform a marking process. The thickness of the molding layer may thereby be reduced so the entire thickness of the semiconductor package may be reduced. Also, it is possible to prevent warpage of the semiconductor package through the marking film, provide the surface of the semiconductor package with gloss and freely adjust the color of the surface of the semiconductor package.
US10211150B2 Memory structure
A memory structure is provided. The memory structure comprises M array regions and N contact regions. M is an integer ≥2. N is an integer ≥M. Each array region is coupled to at least one contact region. Each contact region comprises a stair structure and a plurality of contacts. The stair structure comprises alternately stacked conductive layers and insulating layers. Each contact is connected to one conductive layer of the stair structure. Two array regions which are adjacent to each other are spatially separated by two contact regions, which are coupled to the two array regions, respectively.
US10211146B2 Air gap over transistor gate and related method
A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.
US10211143B2 Semiconductor device having polyimide layer
Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass transition temperature; and the later applied dielectric layers are laminated at temperatures lower than the glass transition temperatures of the earlier applied dielectric layers. In one embodiment, the glass transition temperatures of earlier applied dielectric films in a build-up interconnect are increased through a thermosetting process to exceed the temperature for laminating the later applied dielectric films. In one embodiment, a polyimide material is formed with embedded catalysts to promote cross-linking after a film of the polyimide material is laminated (e.g., through photo-chemical or thermal degradation of the encapsulant of the catalysts). In one embodiment, the solder resist opening walls have a wettable layer generated through laser assisted seeding so that there is no gap between the solder resist opening walls and no underfill in the solder resist opening.
US10211137B2 Semiconductor device package
A method for manufacturing a semiconductor device package includes providing a substrate having a first surface and a second surface opposite to the first surface; disposing a passive component layer on the first surface of the substrate; after disposing the passive component layer, forming at least one via in the substrate, wherein the via penetrates the substrate and the passive component layer; and disposing a conductive layer on the passive component layer and filling the via with the conductive layer.
US10211136B2 Fan-out semiconductor package
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.
US10211135B2 Semiconductor device
A semiconductor device includes a semiconductor element, a circuit board, metal wires, and an expanding member. The circuit board has an upper surface and a lower surface opposite the upper surface. The metal wires are formed on at least one of the upper surface and the lower surface. At least two connection terminals are formed in a terminal formation surface of the semiconductor element which is disposed so as to face the upper surface of the circuit board. The expanding member is fixed to the terminal formation surface of the semiconductor element, has a larger coefficient of linear thermal expansion than the semiconductor element, and has a size larger than the interval between adjacent two of the at least two connection terminals.
US10211134B2 Semiconductor package
A semiconductor package includes a die pad, a semiconductor die mounted on the die pad, rows of terminal leads disposed around the die pad; a surface mount device (SMD) mounted and bonded with a bond wire in the semiconductor package; and a molding compound encapsulating the semiconductor die and the SMD, the bond wire, and at least partially encapsulating the die pad and the terminal leads. The SMD may be mounted in the semiconductor package by using a non-conductive paste or a conductive paste. The die pad, the tie bars and the terminal leads are coplanar.
US10211133B2 Package with interconnections having different melting temperatures
A package comprising at least one electronic chip, a first heat removal body on which the at least one electronic chip is mounted by a first interconnection, a second heat removal body mounted on or above the at least one electronic chip by a second interconnection, and an encapsulant encapsulating at least part of the at least one electronic chip, part of the first heat removal body and part of the second heat removal body, wherein the first interconnection is configured to have another melting temperature than the second interconnection.
US10211131B1 Systems and methods for improved adhesion between a leadframe and molding compound in a semiconductor device
An integrated circuit device having improved delamination properties is provided. The integrated circuit may include a leadframe having a die support area supporting an integrated circuit die, and a plurality of leadframe leads. Surfaces of the leadframe leads are roughened by a roughening process to form roughened surfaces having an average roughness Ra. A thin plating layer is formed over the roughened leadframe lead surfaces, with a plating layer thickness of less than 40 times the roughness Ra of the leadframe lead surfaces, such that the thin plating layer is received into the roughened leadframe lead surface contours and thereby itself has a contoured outer surface. A molding material applied to the structure may directly contact and adhere to the contoured surface of the thin plating layer. The adhesion between the molding material and the contoured plating layer may reduce or eliminate delamination of the molding material from the leadframe.
US10211130B2 Semiconductor device
A semiconductor device includes a plurality of leads, a semiconductor element electrically connected to the leads and supported by one of the leads, and a sealing resin covering the semiconductor element and a part of each lead. The sealing resin includes a first edge, a second edge perpendicular to the first edge, and a center line parallel to the first edge. The reverse surfaces of the respective leads include parts exposed from the sealing resin, and the exposed parts include an outer reverse-surface mount portion and an inner reverse-surface mount portion that are disposed along the second edge of the sealing resin. The inner reverse-surface mount portion is closer to the center line of the sealing resin than is the outer reverse-surface mount portion. The outer reverse-surface mount portion is greater in area than the inner reverse-surface mount portion.
US10211125B2 Configurable mounting hole structure for flush mount integration with vapor chamber forming plates
Various embodiments of the disclosure are directed to vapor chambers with a structure that permits configurable mounting holes. Such vapor chambers may have a top plate with apertures and a bottom plate with apertures. Spacers are inserted into the apertures and disposed between the top plate and the bottom plate. Each spacer may have their own aperture that extends throughout the spacer which acts as the mounting hole in the assembled vapor chamber. The various dimensions of the spacers can be configured and selected in order to accommodate varying dimensions of the apertures in the top plate and the bottom plate. These spacers can be used to provide mounting holes of a desired size and provide additional structure support to the vapor chamber. The spacers also lie flush with the top and bottom plates which increases the surface area of the vapor chamber and improves the mounting of the vapor chamber to other structures.
US10211117B2 Crimping power module
A crimping power module includes a shell (10), a cover (12), and an electric insulation substrate (13) crimped to a heat dissipation device. The cover and the substrate are respectively mounted to a first surface (111) and a second surface (112) of the shell. The second surface defines an annular slot (113) in a position facing sides of the substrate. The slot is embedded with a first elastic member (15) elastically abutted against the substrate. The elastic member is higher than the second surface, allowing the shell to adjust a pressure flexibly applied on the heat dissipation device by the substrate. An elastic buffer is provided through defining the slot embedded with the elastic member, to prevent the substrate from fracturing, and adjust the pressure to ensure tight crimping between the substrate and the heat dissipation device, which decreases thermal resistance, and increases heat dissipation efficiency.
US10211116B2 Semiconductor device
A semiconductor device according to the present invention includes a mounting section provided with a chip mounting region for mounting a semiconductor chip, a frame provided in the mounting section so as to surround the chip mounting region, a cap disposed in contact with the frame so as to cover a space surrounded by the chip mounting region and the frame and a joint that joins the frame and the cap outside a contact surface between the frame and the cap.
US10211112B1 Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas
A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas.
US10211111B1 Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas
A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and corner short test areas.
US10211103B1 Advanced structure for self-aligned contact and method for producing the same
Methods of forming a SAC cap with SiN U-shaped and oxide T-shaped structures and the resulting devices are provided. Embodiments include forming a substrate with a trench and a plurality of gate structures; forming a nitride liner over portions of the substrate and along sidewalls of each gate structure; forming an ILD between each gate structure and in the trench; recessing each gate structure between the ILD; forming a U-shaped nitride liner over each recessed gate structure; forming an a-Si layer over the nitride liner and the U-shaped nitride liner; removing portions of the nitride liner, the U-shaped nitride liner and the a-Si layer; forming a W layer over portions of the substrate adjacent to and between the a-Si layer; forming an oxide liner over the nitride liner, the U-shaped nitride liner and along sidewalls of the W layer; and forming an oxide layer over portions of the oxide liner.
US10211100B2 Methods of forming an air gap adjacent a gate of a transistor and a gate contact above the active region of the transistor
One method includes performing an etching process to define a gate cavity that exposes an upper surface and at least a portion of the sidewalls of a gate structure and forming a replacement spacer structure adjacent the exposed sidewalls of the gate structure, wherein the replacement spacer structure exposes a portion of the upper surface of the gate structure and includes at least one air space. In this example, the method also includes forming a conformal etch stop layer and a replacement gate cap structure in the gate cavity, selectively removing a portion of the replacement gate cap structure and a portion of the conformal etch stop layer so as to thereby expose the upper surface of the gate structure, and forming a conductive gate contact structure (CB) in the conductive gate contact opening, wherein the entire conductive gate contact structure (CB) is positioned vertically above the active region.
US10211099B2 Chamber conditioning for remote plasma process
The methods, systems and apparatus described herein relate to chamber conditioning for remote plasma processes, in particular remote nitrogen-based plasma processes. Certain implementations of the disclosure relate to remote plasma inhibition processes for feature fill that include chamber conditioning. Embodiments of the disclosure relate to exposing remote plasma processing chambers to fluorine species prior to nitrogen-based remote plasma processing of substrates such as semiconductor wafers. Within-wafer uniformity and wafer-to-wafer uniformity is improved.
US10211098B2 Decoupled via fill
Techniques are disclosed for providing a decoupled via fill. Given a via trench, a first barrier layer is conformally deposited onto the bottom and sidewalls of the trench. A first metal fill is blanket deposited into the trench. The non-selective deposition is subsequently recessed so that only a portion of the trench is filled with the first metal. The previously deposited first barrier layer is removed along with the first metal, thereby re-exposing the upper sidewalls of the trench. A second barrier layer is conformally deposited onto the top of the first metal and the now re-exposed trench sidewalls. A second metal fill is blanket deposited into the remaining trench. Planarization and/or etching can be carried out as needed for subsequent processing. Thus, a methodology for filling high aspect ratio vias using a dual metal process is provided. Note, however, the first and second fill metals may be the same.
US10211094B2 Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts
An electrical device including a first semiconductor device having a silicon and germanium containing source and drain region, and a second semiconductor device having a silicon containing source and drain region. A first device contact to at least one of said silicon and germanium containing source and drain region of the first semiconductor device including a metal liner of an aluminum titanium and silicon alloy and a first tungsten fill. A second device contact is in contact with at least one of the silicon containing source and drain region of the second semiconductor device including a material stack of a titanium oxide layer and a titanium layer. The second device contact may further include a second tungsten fill.
US10211093B2 Interconnect structure formed with a high aspect ratio single damascene copper line on a non-damascene via
An interconnect structure and a method to form an interconnect structure utilizes a high-aspect ratio single-damascene line and a non-damascene via. The interconnect includes a first single-damascene interconnect line disposed in a first interlayer dielectric layer, and a non-damascene via on the first single-damascene interconnect line that may be formed from cobalt, titanium and/or tungsten. A first SiCN layer may be formed on one or more sidewalls of the non-damascene via. A second single-damascene layer may be formed on the non-damascene via in which the second single-damascene layer may be disposed in a second interlayer dielectric layer. A second SiCN layer may be formed on at least part of an upper surface of the first single-damascene layer, and a third SiCN layer may be formed on at least part of an upper surface of the second single-damascene layer.
US10211089B2 Semiconductor device and method of fabricating the same
A semiconductor device and a fabricating method thereof are provided. The method includes sequentially forming an interlayer insulating layer and a hard mask layer on a substrate with first and second regions, performing a first patterning process on the hard mask layer to form first openings in the first and second regions, performing a second patterning process on the hard mask layer to form second openings in the first and second regions, and performing a third patterning process on the hard mask layer to selectively form at least one third opening in only the second region. The third patterning process includes forming a first photoresist pattern with openings on the hard mask layer, and the opening of the first photoresist pattern on the first region is overlapped with the second opening on the first region, when viewed in a plan view.
US10211088B2 Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnects
Self-aligned isotropic etch processes for via and plug patterning for back end of line (BEOL) interconnects, and the resulting structures, are described. In an example, a method of fabricating an interconnect structure for an integrated circuit includes removing a sacrificial or permanent placeholder material of a subset of a plurality of holes or trenches through openings in a patterning layer. The method also includes removing the patterning layer and filling the subset of the plurality of holes or trenches with a permanent material.
US10211082B2 Fabrication method of electronic package
An electronic package is provided, including: a circuit structure having opposite first and second surfaces, wherein first and second circuit layers are formed on the first and second surfaces of the circuit structure, respectively, the first circuit layer having a minimum trace width less than that of the second circuit layer; a separation layer formed on the first surface of the circuit structure; a metal layer formed on the separation layer and electrically connected to the first circuit layer; an electronic element disposed on the first surface of the circuit structure and electrically connected to the metal layer; and an encapsulant formed on the circuit structure to encapsulate the electronic element. By disposing the electronic element having high I/O function on the circuit structure, the invention eliminates the need of a packaging substrate having a core layer and thus reduces the thickness of the electronic package.
US10211073B2 Semicondutor chip
A semiconductor chip has a first transistor that amplifies a first signal and outputs a second signal, a second transistor that amplifies the second signal and outputs a third signal, and a semiconductor substrate having a main surface parallel to a plane defined by first and second directions and which has the first and second transistors formed thereon. The main surface has thereon a first bump connected to a collector or drain of the first transistor, a second bump connected to an emitter or source of the first transistor, a third bump connected to a collector or drain of the second transistor, and a fourth bump connected to an emitter or source of the second transistor. The first bump is circular, the second through fourth bumps are rectangular or oval, and the area of each of the second through fourth bumps is larger than that of the first bump.
US10211071B2 IC packaging method and a packaged IC device
Embodiments of a method for packaging Integrated Circuit (IC) dies and an IC device are described. In an embodiment, a method for packaging IC dies involves creating openings on a substrate, where side surfaces of the openings on the substrate are covered by metal layers, placing the IC dies into the openings on the substrate, applying a second metal layer to the substrate, where the IC dies are electrically connected to at least a portion of the second metal layer, and cutting the substrate into IC devices.
US10211070B2 Semiconductor device and method for manufacturing the same
A semiconductor device including a substrate, an insulating, layer on the substrate and including a trench, at least one via structure penetrating the substrate and protruding above a bottom surface of the trench, and a conductive structure surrounding the at least one via structure in the trench may be provided.
US10211066B2 Silicon epitaxial wafer and method of producing same
A silicon single crystal is pulled up such that nitrogen concentration of the crystal is 1×1011 to 2×1013 atoms/cm3, the crystal cooling rate is about 4.2° C./min at a temperature of a silicon melting point to 1350° C. and is about 3.1° C./min at a temperature of 1200° C. to 1000° C., and oxygen concentration of a wafer is 9.5×1017 to 13.5×1017 atoms/cm3. After a heat treatment is performed on the wafer sliced from the silicon single crystal in a treatment condition of 875° C. for about 30 min, growth of an epitaxial layer is caused. Thus, an epitaxial wafer in which the number of epitaxial defects is not increased while maintaining predetermined oxygen concentration and slips do not occur is produced.
US10211065B2 Methods for high precision plasma etching of substrates
This disclosure relates to a plasma processing system and methods for high precision etching of microelectronic substrates. The system may include a combination of microwave and radio frequency (RF) power sources that may generate plasma conditions to remove monolayer(s). The system may generation a first plasma to form a thin adsorption layer on the surface of the microelectronic substrate. The adsorbed layer may be removed when the system transition to a second plasma. The differences between the first and second plasma may be include the ion energy proximate to the substrate. For example, the first plasma may have an ion energy of less than 20 eV and the second plasma may have an ion energy greater than 20 eV.
US10211063B2 Substrate processing apparatus and substrate processing method
A phosphoric acid aqueous solution in a production tank circulates a circulation system. The circulation system is configured to be switchable between a first state in which the phosphoric acid aqueous solution is circulated through a bypass pipe and a second state in which the phosphoric acid aqueous solution is circulated through a filter. When a silicon containing liquid is supplied to the production tank, the circulation system is switched to the first state. When silicon particles are uniformly dispersed in the phosphoric acid aqueous solution, the circulation system is switched to the second state. Alternatively, a filtration member is provided in the production tank. The silicon containing liquid is stored in the filtration member. The filtration member is dipped in the phosphoric acid aqueous solution stored in the production tank. The silicon containing liquid is permeated through the filtration member, and is mixed with the phosphoric acid aqueous solution.
US10211058B2 ESD protection device
An electrostatic discharge protection device includes a buried layer having a plurality of heavily doped regions of a first conductivity type and a laterally diffused region between adjacent heavily doped regions, a semiconductor region over the buried layer, and a first well of the first conductivity type extending from a surface of the semiconductor region to a heavily doped region. The device includes a first transistor in the semiconductor region having an emitter coupled to the first terminal, and a second transistor in the semiconductor region having an emitter coupled to the second terminal. The first well forms a collector of the first transistor and a collector of the second transistor.
US10211057B2 Transistor component with reduced short-circuit current
A transistor component includes in a semiconductor body a source zone and a drift zone of a first conduction type, and a body zone of a second conduction type complementary to the first conduction type, the body zone arranged between the drift zone and the source zone. The transistor component further includes a source electrode in contact with the source zone and the body zone, a gate electrode adjacent the body zone and dielectrically insulated from the body zone by a gate dielectric layer, and a diode structure connected between the drift zone and the source electrode. The diode structure includes a first emitter zone adjoining the drift zone in the semiconductor body, and a second emitter zone of the first conduction type adjoining the first emitter zone. The second emitter zone is connected to the source electrode and has an emitter efficiency γ of less than 0.7.
US10211054B1 Tone inversion integration for phase change memory
Embodiments of the invention are directed to methods and resulting structures for forming a storage element using phase change memory (PCM). In a non-limiting embodiment of the invention, a PCM layer is formed over a surface of a bottom electrode. A top electrode is formed over the PCM layer using a tone inversion process that includes a sacrificial layer. A PCM pillar is then formed by patterning the PCM layer to expose a surface of the bottom electrode. The tone inversion process enables a sub-50 nm PCM pillar diameter.
US10211053B2 Methods of forming staircase-shaped connection structures of three-dimensional semiconductor devices
Provided is a staircase-shaped connection structure of a three-dimensional semiconductor device. The device includes an electrode structure on a substrate, the electrode structure including an upper staircase region, a lower staircase region, and a buffer region therebetween. The electrode structure includes horizontal electrodes sequentially stacked on the substrate, the horizontal electrodes include a plurality of pad regions constituting a staircase structure of each of the upper and lower staircase regions, and the buffer region has a width that is larger than that of each of the pad regions.
US10211052B1 Systems and methods for fabrication of a redistribution layer to avoid etching of the layer
Systems and methods for fabrication of a redistribution layer are described. There is no deposition of a seed layer, made from copper, on top of a substrate. The lack of the seed layer avoids a need for etching the seed layer. When the seed layer is not etched, the redistribution layer, also made from copper, is not etched.
US10211050B2 Method for photo-lithographic processing in semiconductor device manufacturing
There is provided a semiconductor device manufacturing method, including: a film forming process in which, by supplying a solution for modifying a surface layer of a resist to a target object having a resist pattern and allowing the solution to infiltrate into the resist, a film having elasticity and having no compatibility with the resist is formed in the surface layer of the resist; and a heating process in which the target object having the film formed thereon is heated.
US10211047B2 Multilayer dielectric structures with graded composition for nano-scale semiconductor devices
Multilayer dielectric structures are provided with graded composition. For example, a multilayer dielectric structure includes a stack of dielectric films, wherein the dielectric films include at least a first SiCNO (silicon carbon nitride oxide) film and a second SiCNO film. The first SiCNO film has a first composition profile of C, N, and O atoms. The second SiCNO film has a second composition profile of C, N, and O atoms, which is different from the first composition profile of C, N, and O atoms. The composition profiles of C, N and/or O atoms of the constituent dielectric films of the multilayer dielectric structure are customized to enhance or otherwise optimize one or more electrical and/or physical properties of the multilayer dielectric structure.
US10211045B1 Microwave annealing of flowable oxides with trap layers
An insulator is formed by flowable chemical vapor deposition (FCVD) process. The insulator is cured by exposing the insulator to ultraviolet light while flowing ozone over the insulator to produce a cured insulator. The curing process forms nitrogen, hydrogen, nitrogen monohydride, or hydroxyl-rich atomic clusters in the insulator. Following the curing process, these methods select wavelengths of microwave radiation (that will be subsequently used during annealing) so that such wavelengths excite the nitrogen, hydrogen, nitrogen monohydride, or hydroxyl-rich atomic clusters. Then, these methods anneal the cured insulator by exposing the cured insulator to microwave radiation in an inert (e.g., non-oxidizing) ambient atmosphere, at a temperature below 500° C., so as to increase the density of the cured insulator.
US10211042B2 Double-ended high intensity discharge lamp and manufacturing method thereof
A double-ended high intensity discharge lamp includes a luminous tube and reflective layer covering at a reflective portion provided on at least a portion of aid luminous tube for reflecting light emitted from an illuminator supported in the luminous tube towards the reflective portion to project towards another opposing side of the luminous tube.
US10211039B2 Multi-reflecting mass spectrometer with high throughput
Method and embodiments are provided for tandem mass spectrometer designed for extremely large charge throughput up to 1E+10 ion/sec. In one operation mode, the initial ion flow with wide m/z range is time separated in a trap array. The array ejects ions with a narrower momentarily m/z range. Ion flow is collected and confined in a wide bore ion channel at a limited time spread. The ion flow with narrow m/z range is then analyzed in a multi-reflecting TOF at frequent and time-encoded operation of the orthogonal accelerator, thus forming multiple non overlapping spectral segments. In another mode, time separated ions are subjected to fragmentation for comprehensive, all-mass MS-MS analysis. The momentarily ion flow at MR-TOF entrance is characterized by lower spectral population which allows efficient decoding of overlapping spectra. Those modes are combined with conventional spectrometer operation to improve the dynamic range. To provide practical solution, there are proposed multiple novel components comprising trap arrays, wide bore confining channels, resistive multipole, so as long life TOF detector.
US10211038B2 Method for supplying gas for plasma based analytical instrument
To achieve an effective gas filtering in a plasma spectrometric apparatus using a gas of a comparatively high consumption flow rate, and to improve the analytical ability, there is provided a plasma spectrometric apparatus containing a sample introducer for producing and delivering an injector gas containing an analyte sample, a plasma generator for generating plasma into which the injector gas is introduced, and an analyzer disposed subsequent to the plasma generator for analyzing the analyte sample. The plasma spectrometric apparatus contains a first gas line for supplying gas to the sample introducer, a second gas line for supplying gas to the plasma generator, and a filter located in the first gas line for removing impurities contained in the gas.
US10211036B2 Jet flow generation device, and jet flow generation system
A jet flow generation device includes: a discharge electrode; a reference electrode that is disposed away from the discharge electrode; a power supply circuit that generates an output voltage to control a potential difference between the discharge electrode and the reference electrode; a controller that switches the output voltage of the power supply circuit between a first voltage that does not induce corona discharge between the discharge electrode and the reference electrode and a second voltage that induces corona discharge between the discharge electrode and the reference electrode; and a case housing at least the reference electrode has an injection port that injects an ion wind of ions generated by the corona discharge.
US10211035B2 Multi-block sputtering target and associated methods and articles
A sputtering target that includes at least two consolidated blocks, each block including an alloy including molybdenum in an amount greater than about 30 percent by weight and at least one additional alloying ingredient; and a joint between the at least two consolidated blocks, the joint being free of any microstructure due to an added bonding agent (e.g., powder, foil or otherwise), and being essentially free of any visible joint line the target that is greater than about 200 μm width (e.g., less than about 50 μm width). A process for making the target includes hot isostatically pressing, below a temperature of 1080° C., consolidated perform blocks that may be surface prepared (e.g., roughened to a predetermined roughness value) prior to pressing.
US10211031B2 Plasma processing apparatus and plasma processing method
Disclosed is a plasma processing method for generating plasma between an upper electrode connected with a VF power supply and a susceptor disposed to face the upper electrode to perform a plasma processing on a wafer by the plasma. The plasma processing method includes: providing an auxiliary circuit configured to reduce a difference between a reflection minimum frequency of a first route where a high frequency current generated from the VF power supply flows before ignition of the plasma and a reflection minimum frequency of a second route where the high frequency current generated from the VF power supply flows after the ignition of the plasma; igniting the plasma; and maintaining the plasma.
US10211027B2 Method for measuring resolution of charged particle beam and charged particle beam drawing apparatus
In one embodiment, a method for measuring a resolution of a charged particle beam includes changing a focus position of the charged particle beam in a height direction, and scanning a dot mark formed on a substrate with the charged particle beam for each focus position, detecting a reflected charged particle reflected from the dot mark for each focus position, calculating a scattered charged particle distribution from a detection result of the reflected charged particle for each height corresponding to the focus position, performing a convolution operation on an approximate expression of a beam waveform of the charged particle beam and a mark shape of the dot mark, the approximate expression including an aperture angle and a resolution of the charged particle beam as parameters, and calculating the aperture angle and the resolution by fitting the scattered charged particle distribution by height and a calculation result of the convolution operation.
US10211022B2 Ion beam apparatus and ion beam irradiation method
A gas field ionization source in which an ion beam current is stable for a long time is achieved in an ion beam apparatus equipped with a field ionization source that supplies gas to a chamber, ionizes the gas, and applies the ion beam to a sample. The ion beam apparatus includes an emitter electrode having a needle-like extremity; a chamber inside which the emitter electrode is installed; a gas supply unit that supplies the gas to the chamber; a cooling unit that is connected to the chamber and cools the emitter electrode; a discharge type exhaust unit that exhausts gas inside the chamber; and a trap type exhaust unit that exhausts gas inside the chamber. The exhaust conductance of the discharge type exhaust unit is larger than the total exhaust conductance of the trap type exhaust unit.
US10211020B2 Self-powered wireless fuse switch
A self-powered wireless fuse switch is disclosed that is a plug-in replacement for a fuse found in the electrical system of vehicles. The self-powered wireless fuse adds remote-controlled switching capabilities for short and long-range control of power to subsystems of a vehicle electrical system. The wireless fuse switch includes a wireless control module having an internal power supply and an internal transceiver that receives commands from a remote control unit. A separate fuse module includes an outer housing and fuse blades that extend from the outer housing and interface with a fuse socket of the vehicle to selectively allow or interrupt power from the vehicle to the subsystem of the vehicle electrical system. The fuse module includes a fusible link, a relay controller and a relay in the outer housing. The fuse module receives power from and communicates with the wireless control module.
US10211018B2 Pivot supporting structure and circuit breaker
A pivot supporting structure for a circuit breaker and a circuit breaker. The pivot supporting structure includes: a supporting body having a supporting hole for receiving and pivotally supporting a pivot pin connected to an actuating mechanism of the circuit breaker, wherein at least one strain gauge are mounted to the supporting body for sensing the force acting on the pivot supporting structure by the actuating mechanism. This pivot supporting structure can accurately sense the characteristic force applied, such that the contact force and mechanical characteristics of the circuit breaker can be on-line monitored.
US10211017B2 High voltage relay systems and methods
Various high voltage systems may benefit from a suitable relay system. For example, a relay box may be provided with a shock and vibration resistant arrangement including a sealed coil box within the sealed relay box. For example, an apparatus can include a coil box containing coils, inside pole pieces, and permanent magnets, wherein the coils, inside pole pieces, and permanent magnets can be configured to actuate an armature assembly external to the coil box. The apparatus can also include outside pole pieces configured to move a relay armature of the armature assembly responsive to energizing of the coils. Moving the relay armature can include overcoming a latching of at least one of the permanent magnets.
US10211015B2 Dimmer switch system with secondary switch
A dimmer switch system electrically connected between a power source and a load includes a primary housing including a primary switch actuatable by a user, a processor structured to change a state of the dimmer switch based on actuation of either the primary switch or the secondary switch, and a secondary switch isolation circuit. The dimmer switch system also includes a secondary housing including a secondary switch actuatable by the user and being electrically connected to the power source. The secondary switch isolation circuit is electrically connected between the secondary switch and the processor, the secondary switch isolation circuit including an optocoupler and being structured to isolate the processor from the power source and to provide a signal to the processor based on a state of the secondary switch.
US10211007B2 Electrical pushbutton switch
A switch includes a pushbutton comprising an actuating portion, a first fixed contact element and a first movable contact element facing the first fixed contact element for establishing a first switching way. The first movable contact element may include a movable portion of a first elastically deformable conductive blade. The actuating portion may include a first cam which cooperates with a cam follower portion of the first blade to deform or relax the first blade for longitudinally moving the first movable contact element to come into contact, or out of contact, with the portion of the first fixed contact element, depending on the vertical position of the actuation member. A second fixed contact element and second movable contact may be similarly constructed to provide a second switching way.
US10211006B2 Illuminated keyswitch
An illuminated keyswitch includes a base, a keycap, a lift mechanism, and a light source. The keycap includes a cap body and a light guiding rod. The lift mechanism is connected to between the light guiding rod and the base, such that the keycap can vertically move relative to the base through the lift mechanism. The light source is disposed between the light guiding rod and the base and emits light toward the light guiding rod. The light enters the light guiding rod through an end portion of the light guiding rod and then emits out the light guiding rod from another end portion of the light guiding rod and a side surface adjacent to the another end portion toward the cap body. Thereby, the whole cap body can receives relatively uniform back light.
US10211005B2 Cost reduced synchronized-switching contactor
A simple, economically efficient, synchronized switching system for control of a three phase motor contactor utilizes only Voltage monitoring to determine zero crossings and knowledge of the sinusoidal power waveforms and operational delay period of the contactor, to synchronize operation of the contacts at low power. The phases can be serially utilized for zero crossing detection upon Close or Open commands, so as to spread the wear over each set of contacts. Expensive metal at the contact surfaces can therefore be used more efficiently. For arc energy reduction upon contact opening, knowledge of Line-Load Voltage on at least one phase can be used to derive an empirical determination of the voltage angle at opening which yields the lowest arc energy.
US10210999B2 Dye-sensitized solar cell including a semiconducting nanocomposite
A semiconducting nanocomposite and a dye-sensitized solar cell including the same, wherein the semiconducting nanocomposite comprises nanocomposite particles selected from the group consisting of TiO2/ZnO/CdS, TiO2/ZnO/CdSe, TiO2/ZnO/PbS, TiO2/ZnO/PbSe, TiO2/ZnS/CdSe, TiO2/ZnS/PbS, TiO2/ZnS/PbSe, WO3/ZnO/CdSe, Nb2O5/ZnO/CdSe, and combinations thereof. Various embodiments of each component of the dye-sensitized solar cell, including electrodes, conductive layers, dyes, and electrolytes are also provided.
US10210997B2 Solid electrolytic capacitor and manufacturing method thereof
Provided is a solid electrolytic capacitor having a lower leakage current than a conventional solid electrolytic capacitor. The solid electrolytic capacitor includes: an anode foil having a surface on which an oxide film is formed; a cathode foil; and a separator disposed between the anode foil and the cathode foil, wherein a solid electrolyte made of a conductive high-molecular weight compound in a fine particle form and a water-soluble high-molecular weight compound solution which is formed of a water-soluble high-molecular weight compound in a liquid form, water and alcohol having a nitro group are introduced into a gap formed between the anode foil and the cathode foil in a state where the water-soluble high-molecular weight compound solution surrounds the solid electrolyte.
US10210996B2 Electrical storage module
An electrical storage module 10 includes: an electrical storage element group 11 in which a plurality of electrical storage elements 12 are stacked on one another, each electrical storage element having lead terminals 13 that protrude from a side edge of the electrical storage element; and fuses 45 that are electrically connected to the lead terminals 13. Detection terminals 50 for detecting a state of the electrical storage elements 12 are directly connected to the fuses 45.
US10210987B2 Composite magnetic material, coil component using same, and composite magnetic material manufacturing method
A composite magnetic material includes first particles made of soft magnetic metal and second particles provided between first particles. Each of the second particles includes a first solid phase and a second solid phase. The composite magnetic material exhibits high magnetic characteristics.
US10210986B2 Integrated magnetic core inductor with vertical laminations
An inductor includes a magnetic core lying in a core plane. The magnetic core includes a vertical laminated structure with respect to the core plane of alternating ferromagnetic vertical layers and insulator vertical layers. An easy axis of magnetization can be permanently or semi-permanently fixed in the ferromagnetic vertical layers along an axis orthogonal to the core plane. Methods of manufacturing same are also disclosed.
US10210984B2 Electronic apparatus
An electronic apparatus includes a base including a surrounding wall defining first and second receiving spaces and having first and second end surfaces, and an electronic module including a terminal unit, and first and second electronic units respectively received in the first and second receiving spaces. The terminal unit includes two first terminals connected to the first electronic unit, two second terminals connected to the second electronic unit, and two connecting terminals, each of which has first and second sections respectively extending from the first and second end surfaces and connected to the first and second electronic units, and an interconnecting section embedded within the base and interconnecting the first and second sections.
US10210982B1 Common-mode choke for paralleled power semiconductor with integrated current sensor
A power module includes power switching devices that are electrically coupled in parallel to increase current capacity. The paralleled power switching devices are triggered by a common gate signal. Each of the power switching devices include a gate terminal, a current-sense terminal, and a Kelvin source/emitter terminal. The power module includes a plurality of magnetically coupled windings coupling the gate terminal, the current-sense terminal and the Kelvin source/emitter terminal of each of the switching devices to a gate driver circuit.
US10210981B2 Integrated inductor structure
An 8-shaped integrated inductor includes a first terminal; a second terminal; a third terminal; a bridging structure that includes a first metal segment and a second metal segment, the first metal segment and the second metal segment being disposed in different layers of a semiconductor structure and partially overlapping; a first sensing unit employing the first terminal and the third terminal as its two terminals and including the first metal segment; and a second sensing unit employing the second terminal and the third terminal as its two terminals and including the second metal segment and a third metal segment. The third metal segment is disposed at a metal layer different from the second metal segment and conductively connecting other metal segments of the second sensing unit without crossing the metal segments of the first sensing unit.
US10210980B2 Dynamically suspended headliner
A vehicle headliner assembly includes a roof structure having an electromagnet disposed thereon. The vehicle headliner assembly further includes a headliner having at least one permanent magnet disposed thereon. The headliner is secured to the roof structure such that the permanent magnet is adjacent and opposite the electromagnet of the roof structure. The vehicle headliner assembly further includes a controller configured to energize the electromagnet to generate an electromagnetic field to attract or repel the permanent magnet of the headliner relative to the electromagnet.
US10210979B2 Driver circuit for electromagnetic dispenser
A circuit for driving an inductive load may include an input, an output, a first switch, and at least one capacitor. The first switch may cause the capacitor to be charged by the supply voltage via the inductive load. A device may discontinue the charging of the capacitor when the voltage has reached a predetermined level greater than that of the supply voltage. A first and a second diode may prevent the capacitor from discharging via the first switch and blocking inductive load current from entering the power supply, respectively. A second switch and the capacitor may be connected to the third switch to cause discharging of the capacitor via the third switch into the inductive load. Closing of the first switch may cause a current sufficient for actuating a mechanical valve to be induced in the inductive load.
US10210978B2 Haptic actuator incorporating conductive coil and moving element with magnets
A haptic actuator having a base structure, a beam rotatably attached to the base structure by an axial member, a first coil portion, and a second coil portion is presented. The beam has a first end that includes a first magnet with magnetic poles having a first polarity, and a second end that includes a second magnet with magnetic poles having a second, opposite polarity. The first coil portion and the second coil portion are configured to generate magnetic field lines. The magnetic poles of the first magnet and the magnetic poles of the second magnet are aligned to be parallel with a central axis of the first coil portion or the second coil portion when the beam is in an equilibrium position. The beam is configured to rotate via the axial member in response to electrical current being passed through the first coil portion or the second coil portion.
US10210977B2 Valve operation booster
A power converter module is connected to an electrical power supply and is configured to generate a first voltage and a second voltage for controlling operation of a valve, where the valve includes a solenoid for affecting opening and closing of the valve. The first voltage is a boost voltage for accelerating opening of the valve. The second voltage is a holding voltage for maintaining the valve in an open state. A boost control module is configured to control supply of the first voltage to the solenoid of the valve in accordance with a first state of an opening boost control signal when a valve control signal directs opening of the valve, and is configured to control supply of the second voltage to the solenoid of the valve in accordance with a second state of the opening boost control signal when the valve control signal directs opening of the valve.
US10210970B2 Metallic-magnetic-domain-wall-based nonvolatile tunable resistor for memory and sensor applications
Control of electrical conductivity is provided via electrically conductive magnetic domain walls between magnetic domains. The magnetic domains are identical except for their magnetic configuration. Altering a configuration of the magnetic domains (e.g., by thermal treatment, application of a magnetic field, etc.) can alter the electrical resistance of a device. Such devices can be used as non-volatile information storage devices or as sensors.
US10210968B1 Communication cables incorporating separators with longitudinally spaced projections
A cable may include a plurality of twisted pairs of individually insulated conductors, a separator positioned between the twisted pairs, and a jacket formed around the twisted pairs and the separator. The separator may include a longitudinally extending spine positioned between the plurality of twisted pairs, and one or more respective projections extending from the spine at each of a plurality of longitudinally spaced locations. Each projection at a given spaced location may extend between a respective set of adjacent twisted pairs. Additionally, a respective longitudinal gap of at least approximately five centimeters may be present between each adjacent pair of longitudinally spaced locations.
US10210967B2 Power cable
The present invention relates to a power cable. More particularly, the present invention relates to a power cable which is, when compared to the existing power cables, lightweight and includes a watertight layer which improves a corrosion resistance and is effectively suppressed from being peeled since the interlayer adhesiveness thereof is maintained regardless of an externally physical impact and a temperature change.
US10210955B1 Methods for diagnosing zika virus
A computer implemented method of diagnosing whether a human subject is infected with Zika virus, includes: determining a correlation between a fundus test image of an eye of the human subject for presence of gross macular pigment mottling with a known set of Zika virus infected fundus images and with a known set of healthy fundus images, wherein a high correlation/low correlation between the fundus test image and the known set of Zika virus infected fundus images indicates that there is a high probability/low probability that the human subject is infected with Zika virus, wherein a high correlation/low correlation between the fundus test image and the known set of healthy fundus images indicates that there is a low probability/high probability that the human subject is infected with Zika virus.
US10210954B2 Wirelessly tracking articles and containers thereof
A system and method for monitoring the inventory of a medical storage container such as a tray that has a required inventory of medical articles. An enclosure is used to isolate, scan, and take an inventory of the tray or other container of medical articles. The tray and each of the medical articles in the tray has an RFID tag. The enclosure having a size smaller than the size needed for a resonant frequency at the RFID frequency of operation of the tags. A probe is used to create a robust electromagnetic field standing wave of constructive interference in the enclosure and a program compares the scanned present inventory of the tray to the required inventory database and indicates any differences. Expired and recalled articles and substitutes for recalled articles are identified.
US10210952B2 System and method for performing automated contact and information delivery
A system and method for performing automated contact and information delivery includes one or more doctor office interface devices, and one or more medical facility interface devices that communicate with a site owner system over a network. The system and method permit a doctor office to designate one or more medical professionals to receive messages about a patient at a medical facility, based on the circumstances of the case. The system and method provide a connect on call module for facilitating direct communication between the facility employee and the identified medical professional utilizing both textual and audio/visual mechanisms without revealing the confidential contact information of the medical professional to the facility employee.
US10210951B2 Crowdsourcing intraoral information
Techniques are described for detecting the presence or absence of certain molecules, analytes, or substances present in the oral cavity or characteristics of the saliva in the oral cavity. In particular, aspects of the invention disclose a systems, methods, apparatuses, and computer-readable media for detecting bio-markers.
US10210950B2 Home automation (HA) system including failed sandboxed bridge reloading and related methods
A home automation (HA) system may include addressable HA devices, and a processor and a memory associated therewith. The processor implements a message queue for generating generic messages for respective ones of the plurality of addressable HA devices and implements sandboxed bridges each configured to convert a generic message from the message queue into a specific message for a given one of the addressable HA devices. Upon a failure of one of the sandboxed bridges, the processor reloads the failed sandboxed bridge while maintaining operational the other sandboxed bridges.
US10210947B2 Multi-port memory, semiconductor device, and memory macro-cell capable of performing test in a distributed state
A multi-port memory includes a memory cell, first and second word lines, first and second bit lines, first and second address terminals, and an address control circuit. The address control circuit controls the first and second word lines independently of each other on the basis of address signals that are respectively supplied to the first and second address terminals in a normal operation mode, and activates both of the first and second word lines that are coupled to the same memory cell on the basis of the address signal that is supplied to one of the first and second address terminals in a disturb test mode.
US10210946B2 Electronic switch exhibiting low off-state leakage current
According to some aspects, a low-leakage switch is provided. In some embodiments, the low-leakage switch includes a plurality of pass transistors in series that selectively couple two ports of the low-leakage switch and a node biasing circuit coupled to a node between the plurality of pass transistors. In these embodiments, the node biasing circuit may adjust a voltage at the node to change the gate-to-source voltage of the pass transistors and, thereby, reduce the leakage current through the pass transistors when the low-leakage switch is turned off. The node biasing circuit may also include circuitry to reduce the leakage current introduced by the node biasing circuit into the node when the low-leakage switch is turned on.
US10210944B2 Inverter and method for driving the inverter, gate on array unit and gate on array circuit
An inverter and a method for driving the inverter, a gate driver on array (GOA) unit, a GOA circuit and a display device relate to a technical field of display, and are proposed to supply stable inverter output signal. The inverter comprises a control module and an output module. The control module is configured to control a voltage at a control node under the control of a first clock signal at a first clock signal terminal, a second clock signal at a second clock signal terminal, an input signal at an input terminal and voltages at a first level terminal and a second level terminal. The output module is configured to set a voltage at the output terminal to the voltage at the first level terminal or the voltage at the second level terminal under the control of the control node and the input signal at the input terminal.
US10210940B2 Memory read apparatus and methods
Apparatus and methods are disclosed, including a method that raises an electrical potential of a plurality of access lines to a raised electrical potential, where each access line is associated with a respective charge storage device of a string of charge storage devices. The electrical potential of a selected one of the access lines is lowered, and a data state of the charge storage device associated with the selected access line is sensed while the electrical potential of the selected access line is being lowered. Additional apparatus and methods are described.
US10210939B1 Solid state storage device and data management method
A data management method for a solid state storage device is provided. The solid state storage device includes a memory cell array. The memory cell array is divided into first-portion logical blocks and second-portion logical blocks. The data management method includes the following steps. Firstly, a write data of plural pages from a host are stored into a first logical block of the first-portion logical blocks. Then, a specified operation is performed on the write data of the plural pages, so that a parity data is acquired. Then, the parity data is stored into a second logical block of the second-portion logical blocks.
US10210935B2 Associative row decoder
A multiple instruction, multiple data memory device includes a memory array with several sections, one or more multiplexers between the sections and a decoder. Each section has memory cells arranged in rows and columns. The cells in a row are connected by a read enabled word line and by a write enabled word line. The decoder includes a decoder memory array which generally simultaneously activates a plurality of read enabled word lines in several sections, a plurality of write enabled word lines in several sections and one or more multiplexers. The decoder memory array includes several bit lines oriented perpendicularly to and connected to the rows of the memory array. A method of activating in-memory computation using several bit lines of a decoder memory array, connected to rows of the memory array to simultaneously activate several read enabled word lines, several write enabled word lines and one or more multiplexers.
US10210927B2 Semiconductor apparatus comprising a plurality of current sink units
A semiconductor memory apparatus includes a column address decoding unit configured to decode a column address and generate a column select signal; a row address decoding unit configured to decode a row address and generate a word line select signal; a driving driver unit configured to provide different voltages to a plurality of resistive memory elements in response to the column select signal; a sink current control unit configured to generate a plurality of sink voltages with different voltage levels in response to the word line select signal; and a plurality of current sink units configured to flow current from the plurality of respective resistive memory elements to a ground terminal in response to the plurality of sink voltages.
US10210926B1 Tracking of optimum read voltage thresholds in nand flash devices
A method for biasing read voltage for flash memory in a storage system, performed by the storage system, is provided. The method includes tracking bit flips in a first direction and bit flips in a second direction in data reads of the flash memory in the storage system, based on error correction of the data reads. The method includes comparing or forming a ratio of the bit flips in the first direction to the bit flips in the second direction or the bit flips in one of the first direction or the second direction to a total number of bit flips. The method includes adjusting read voltage level for the flash memory in the storage system, based on the comparing or the forming the ratio.
US10210922B2 Apparatus and methods for refreshing memory cells of a semiconductor device
Apparatuses and methods for refreshing memory cells of a semiconductor device are described. An example apparatus includes: a memory cell array including a plurality of memory groups each having a plurality of memory cells, the memory groups being selected by mutually different addresses; a first control circuit periodically executing a refresh operation on the memory groups in response to a first refresh command; and a second control circuit setting a cycle of executing the refresh operation by the first control circuit. The second control circuit sets the cycle to a first cycle until executing the refresh operation to all the memory groups after receiving the first refresh command, and the second control circuit sets the cycle to a second cycle that is longer than the first cycle after executing the refresh operation to all the memory groups.
US10210914B2 Programmable logic accelerator in system on chip
A programmable logic array (PLA) is disclosed employing programming logic tile (PLT), System On Chip (SOC) interface bus, Input Output (IO) blocks and Logic Processing Blocks (LPB). SOC processors using SOC interface bus program PLT successively using different configuration memory bank values to realize a logic not limited by the PLT resource counts. Configuration memory blocks comprising of multiple configuration memory banks and configuration programming control logic remove logic processing penalty due to configuration delays. PLT comprises of Programmable Logic Cells (PLC), Programmable Logic Interface (PLY), Embedded Array Blocks (EAB) and configuration memory block. PLA comprises of PLT, IO blocks, SOC interface bus and LPB. PLA accelerates user functionality in as SOC. IO blocks are used to stream data from other SOC components. LPB use PLT to accelerate user specific functionality.
US10210911B2 Apparatuses and methods for performing logical operations using sensing circuitry in a memory device
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry includes a sense amplifier coupled to a pair of complementary sense lines, and a compute component coupled to the sense amplifier. The compute component includes a dynamic latch. The sensing circuitry is configured to perform a logical operation and initially store the result in the sense amplifier.
US10210910B2 Recording medium case, recording medium unit and electronic device
HDD case (100) accommodates HDD device (60) having a disk medium and forms HDD unit (50). HDD unit (50) is removably disposed in an accommodating section of an electronic device. HDD device (60) has a substantially rectangular shape. Besides, HDD case (100) has a pair of side sections (120) located parallel to slot-in/pull-out directions in which HDD unit (50) is slotted into the accommodating section and is pulled out from the accommodating section. Further, protruding section (121) is formed on side sections (120) such that a part of side sections (120) is protruded on the outer side of HDD case (100). In a state where HDD case (100) is accommodated in the accommodating section of the electronic device, protruding section (121) makes contact with the side surface of the accommodating section.
US10210909B2 Computer implemented method for use in a play back apparatus
A computer-implemented method is provided that includes determining whether a display apparatus that displays video played back by a playback apparatus supports an optional feature for playback of the video by using a first technique. The method also includes determining whether the display apparatus supports the optional feature for playback of the video by using a second technique that differs from the first technique in case that it is indeterminate whether the display apparatus supports the optional feature by using the first technique.
US10210906B2 Content playback and recording based on scene change detection and metadata
Methods, systems, and computer readable media described herein may facilitate the characterization of content segments based on a type of content, thus providing a user with the flexibility to: record only the scene types of interest to the user; playback only the scene types of interest to the user; search a media library, wherein the results of the search will include a list of only the content having scene types of interest to the user; browse available user selected scenes from clients; reposition content to user interested scene type during playback; and/or generate a detailed listing of the content based on the scene types. Scene change detection and scene type metadata may be used to identify scene boundaries within a piece of content and to characterize a scene based on a scene type.
US10210902B2 Method and apparatus for creating a custom track
A method and system for creating and editing video and/or audio tracks is described. The method includes providing at least one artist, venue, and track available for selection and providing at least one clip associated with the at least one artist, venue, and track. The method also includes allowing a user to create a custom track from the at least one clip. The system includes a plurality of video cameras for recording a live performance at a plurality of positions. The system also includes at least one server for storing a plurality of video clips created from the plurality of video cameras and an application stored on the at least one server for allowing a user to access the plurality of video clips via the Internet.
US10210901B2 Intelligent multimedia playback re-positioning
Methods, systems and computer readable media may facilitate the repositioning of content based upon scene boundaries. In embodiments, content may be automatically repositioned at a scene boundary, so that the content presentation starts from a more meaningful and sensible point after a re-position (e.g., time-shift, trickplay, seek, etc.). Also provided herein is an approach to provide an option for the user to start playback of content from an absolute time based repositioned point or a scene based repositioned point. Scene change detection may be used to detect scene changes within a piece of multimedia content as the content is being received, played, or recorded by a device. Scene changes within a piece of content may be identified using scene meta-data created on a per content basis, wherein the meta-data includes the starting frame offset of each scene along with the duration of the scene.
US10210899B1 Skip track flaw scan methods and systems
A method for scanning for flaws on a magnetic recording medium is disclosed. The magnetic recording medium has a first set of nonconsecutive data tracks and a second set of nonconsecutive data tracks. The method includes writing a test pattern to only the first set of nonconsecutive data tracks of the magnetic recording medium, reading of the test pattern written to the first set of nonconsecutive data tracks, and identifying flaws within the first set of nonconsecutive data tracks and the second set of nonconsecutive data tracks based on the reading the test pattern.
US10210895B2 Anti-corrosion insulation layer for magnetic recording medium
A magnetic recording medium that includes a substrate, an insulation layer applied onto a surface of the substrate, and a magnetic layer applied onto the insulation layer. The insulation layer is made from a redox-corrosion-inhibiting material. In one embodiment, the insulation layer inhibits redox corrosion by inhibiting electron transfer through the insulation layer (e.g., inhibits electron transfer between the substrate and the magnetic layer).
US10210894B1 Magnetic recording medium including multiple magnetic layers with multiple regions having aligned easy magnetization axes and magnetic recording and reproducing device
According to one embodiment, a magnetic recording medium includes a first layer and a second layer. The first layer includes a first magnetic region, a second magnetic region, and a nonmagnetic region provided between the first and second magnetic regions. A direction from the second magnetic region toward the first magnetic region is along a first direction. The second layer includes third, fourth, and fifth magnetic regions. At least a portion of the fifth magnetic region is provided between the third and fourth magnetic regions. The third magnetic region overlaps the first magnetic region in a second direction crossing the first direction. The fourth magnetic region overlaps the second magnetic region in the second direction. The fifth magnetic region overlaps the nonmagnetic region in the second direction. An easy magnetization axis of each of the first to fifth magnetic regions is aligned with the second direction.
US10210890B2 Wired circuit board and producing method thereof
A method for producing a wired circuit board includes a first step of preparing a metal supporting layer; a second step of forming an insulating layer having a first opening and terminal forming portions on the metal supporting layer; a third step of forming a conductor layer having terminal portions and an electrically conductive portion on the insulating layer; a fourth step of, by partially removing the metal supporting layer, forming a metal supporting frame portion, a metal supporting connecting portion, and a reinforcement metal supporting portion; and a fifth step of forming a metal plating layer at surfaces of the terminal portions by electrolytic plating via the metal supporting connecting portion.
US10210885B1 Message and user profile indications in speech-based systems
A speech-based system utilizes a speech interface device located in the home of a user. The system may interact with different users based on different user profiles. The system may include messaging services that generate and/or provide messages to the user through the speech interface device. The speech interface device may have indicators that are capable of being illuminated in different colors. To notify a user regarding the currently active user profile, each user profile is associated with a different color and the color of the active profile is displayed on the speech interface device when the user is interacting with the system. To notify the user regarding awaiting messages, different types of messages are associated with different colors and the colors of the message types of waiting messages are displayed on the speech interface whenever the user is not interacting with the system.
US10210883B2 Signal processing apparatus for enhancing a voice component within a multi-channel audio signal
A signal processing apparatus for enhancing a voice component within a multi-channel audio signal comprising a left channel audio signal, a center channel audio signal, and a right channel audio signal, the signal processing apparatus comprising a filter and a combiner; wherein the filter is configured to determine an overall magnitude of the multi-channel audio signal over frequency based on the multi-channel audio signal, to obtain a gain function based on a ratio between a magnitude of the center channel audio signal and the overall magnitude of the multi-channel audio signal, and to weight the left channel audio signal, the center channel audio signal, and the right channel audio signal by the gain function; and wherein the combiner is configured to combine individually the left channel audio signal, the center channel audio signal, and the right channel audio signal with the weighted right channel audio signal.
US10210878B2 Method and system for matching music files with electroencephalogram
Disclosed are a method and a system for matching an electroencephalogram and music files which compares the scaling index α of an electroencephalogram with the long-range correlation index β, and matches music file with the electroencephalogram if the scaling index and the long-range correlation index close to equal so as to find a music file matched with a measured electroencephalogram automatically. The method and system in accordance with the present invention may automatically find music files matching with human brain statements in real time by measuring an electroencephalogram, and then guide people relieve stress and relax effectively.
US10210877B2 Speech audio encoding device, speech audio decoding device, speech audio encoding method, and speech audio decoding method
A speech/audio decoding apparatus is provided that includes a receiver that receives encoded data including a limited-band mode flag, and a memory that stores information on a position of a maximum amplitude spectrum frequency of a previous frame in a divided band. The speech/audio decoding apparatus also includes a processor that identifies whether a decoding band is encoded using a limited-band mode based on the decoded limited-band mode flag. Additionally, the processor decodes the spectrum in a limited band within each of the divided bands in a current frame using the stored information. Furthermore, the limited-band mode is set at an encoder side, when a difference between a first frequency with a first maximum amplitude in a spectrum of the divided band in a preceding frame and a second frequency with a second maximum amplitude in a spectrum of the divided band in the current frame is below a threshold.
US10210875B2 Audio watermarking via phase modification
An audio watermarking system conveys information using an audio channel by modulating an audio signal to produce a modulated signal by embedding additional information into the audio signal. Modulating the audio signal includes segmenting the audio signal into overlapping time segments using a non-rectangular analysis window function produce a windowed audio signal, processing the windowed audio signal for a time segment to produce frequency coefficients representing the windowed time segment and having phase values and magnitude values, selecting one or more of the frequency coefficients, modifying phase values of the selected frequency coefficients using the additional information to map the phase values onto a known phase constellation, and processing the frequency coefficients including the modified phase values to produce the modulated signal.
US10210874B2 Multi channel coding
A method includes generating a windowed time-domain mid channel by applying two first asymmetric windows to a first frame of a time-domain mid channel and applying two second asymmetric windows to a second frame of the time-domain mid channel. The method includes transforming the windowed time-domain mid channel to a transform domain to generate sets of transform-domain mid channel data including first transform-domain mid channel data corresponding to a first mid channel window of the first frame and second transform-domain mid channel data corresponding to a second mid channel window of the first frame. The method includes performing an up-mix operation using the sets of transform-domain mid channel data, stereo parameters from the bit stream, and an interpolated parameter determined using an unevenly weighted interpolation between a first stereo parameter value associated with the first frame and a second stereo parameter value associated with the second frame.
US10210872B2 Enhancement of spatial audio signals by modulated decorrelation
Some methods involve receiving an input audio signal that includes N input audio channels, the input audio signal representing a first soundfield format having a first soundfield format resolution, N being an integer ≥2. A first decorrelation process may be applied to two or more of the input audio channels to produce a first set of decorrelated channels, the first decorrelation process maintaining an inter-channel correlation of the set of input audio channels. A first modulation process may be applied to the first set of decorrelated channels to produce a first set of decorrelated and modulated output channels. The first set of decorrelated and modulated output channels may be combined with two or more undecorrelated output channels to produce an output audio signal that includes O output audio channels representing a second and relatively higher-resolution soundfield format than the first soundfield format, O being an integer ≥3.
US10210865B2 Method and apparatus for inputting information
The present disclosure provides a method and apparatus for inputting information. A specific implementation mode of the method comprises: receiving user-inputted voice information, the voice information being associated with content to be inputted in an input area of an application; considering emojis associated with the voice information as a candidate result, the emojis comprising: emojis historically inputted in the input area of the application by multiple users inputting voice information semantically associated with the voice information, with a frequency higher than a frequency threshold; inputting an emoji selected by the user from the candidate result, in the input area of the application. The present disclosure implements the following: when the user performs voice input, it is feasible to accurately understand the intention of the user's voice input, intelligently recommend a matched emoji according to content and emotion of the speech, assist the user in performing quick input of the emoji.
US10210862B1 Lattice decoding and result confirmation using recurrent neural networks
Neural networks may be used in certain automatic speech recognition systems. To improve performance at these neural networks, the present system converts the lattice into a matrix form, thus maintaining certain information included in the lattice that might otherwise be lost while also placing the lattice in a form that may be manipulated by other components to perform operations such as checking ASR results. The matrix representation of the lattice may be transformed into a vector representation by calculations performed at a recurrent neural network (RNN). By representing the lattice as a vector representation the system may perform additional operations, such as ASR results confirmation.
US10210856B1 Noise control system for a ducted rotor assembly
A noise control system for a ducted rotor assembly, the ducted rotor assembly including a hub, a duct, and two or more blades coupled to the hub and supported by the duct. The noise control system including a microphone configured to receive a sound input generated by the ducted rotor assembly, the microphone configured for association with the hub; a speaker unit configured to generate a cancellation noise, the speaker configured for association with the hub; and a controller operably connected to the microphone and the speaker unit, the controller configured to selectively adjust harmonics of the cancellation noise to reduce an acoustic signature of the ducted rotor assembly. In another aspect, there is provided a rotorcraft with a ducted rotor assembly in a tail portion including a noise control system. In a third aspect, there is a method of reducing an acoustic signature of a ducted rotor assembly.
US10210851B2 Drum hoop for holding a drumhead
This disclosure is directed to a drum hoop comprising a rim and tension bolt attachment moieties. The tension bold attachment moieties are attached to the rim and configured so that when the drum hoop receives a drumhead, the drumhead fits in the drum hoop snugly and there is little, or no, excess space between the drum hoop and drumhead.
US10210850B2 Flame-treated drumstick
A wooden drumstick that is treated by direct heating by exposure to a flame to improve hardness characteristics by altering the state of fibers in an outer layer of the drum stick relative to inner fibers below the outer layer. A method of manufacturing a treated drumstick includes selecting a wooden starting material, forming a drumstick profile from the wooden starting material, and exposing the drumstick profile directly to a flame.
US10210848B1 Pick and applicator for use with a stringed instrument
The present invention provides a device for contacting a set of strings of a stringed instrument. The device has a body with a pick on a first end and an applicator on a second end.
US10210846B1 Acoustic plate for a stringed instrument having a soundboard
An acoustic plate for a soundboard of a musical instrument, such as a guitar or other stringed instrument, comprises a front surface, a rear surface, and at least one peripheral edge. A plurality of dimples project away from the rear surface. Each dimple includes a dimple volume accessible from the front surface of the acoustic plate. Preferably each dimple is formed into a cone-shape, and may be of varying heights. An adhesive layer adheres the front surface of the acoustic plate to the inside surface of the soundboard. Such an adhesive layer is preferably comprised of an epoxy resin type of adhesive. As such, with the front surface of the acoustic plate adhered to the inside surface of the soundboard with the adhesive layer, the dimple volume of each dimple defines a sound modification chamber for modifying the sounds produced by the musical instrument.
US10210845B2 Method and apparatus for compensating for variable refresh rate display range limitations
Briefly, methods and apparatus provide image content to, and display image content on, displays with a variable refresh rate that reduce frame delays and avoid display image flickering problems. In one example, the methods and apparatus are operative to vary a display's refresh rate by varying a current frame's vertical blanking period by re-providing the current frame for display prior to providing a new frame for display. In this fashion, the displaying of a new frame may be advanced by assuring that a new frame can be provided for display as soon as it has been rendered and available for display. In addition, by re-providing the current frame for display prior to providing a new frame for display, new frames may be provided for display at rates within a safe rate range such that display image flickering issues are avoided or reduced.
US10210840B2 Shift register unit, its driving method, gate driver circuit and display device
The present disclosure provides a shift register unit, its driving method, a gate driver circuit and a display device. The shift register unit includes a control module, a first output module and a second output module. The first output module is connected to a first signal end, a first node and an output end. The second output module is connected to the output end, a second node and a first clock signal end. The control module is connected to the first node, the second node, the first signal end, a second signal end, a second clock signal end, a third clock signal end, an input signal end and a resetting signal end, and configured to control potentials at the first node and the second node.
US10210833B2 Display device
A display device includes a primary display area which comprises a first display area and a second display area which is unique from the first display area, a control unit configured to display an image in the primary display area, an image signal generating unit configured to generate display data based on externally input image data for a single image. The image signal generating unit comprises a memory which stores display-position information indicating a display location of a first image displayed in the primary display area. The display data comprises first and second display data to be displayed in the first display area and the second display area, respectively. The first display data is generated based on the externally input single image data and the display-position information. The control unit is configured to cause a first image to be displayed in the first display area based on the first display data.
US10210831B2 Drive method of liquid crystal display device and liquid crystal display device
The present provides a drive method of a liquid crystal display device and a liquid crystal display device. By burning sets of OTP data corresponding to the use durations which are different in a drive chip, and each set of OTP data comprises a gamma datum and a Vcom datum, and the liquid crystal display device selects the OTP data corresponding to the use duration according to the present use duration, and uses the gamma datum and the Vcom datum in the set of OTP data to drive a display panel to perform image display for avoiding that the gamma value deviates from the target gamma value, and the Vcom deviates from the best Vcom to ensure that the liquid crystal display device always uses the target gamma value and the best Vcom for driving, and always guarantee the display result and quality of the panel.
US10210829B2 Display apparatus and method of operation
A display apparatus includes a display panel including a first pixel, a common voltage generator and a timing controller. The common voltage generator generates a reference common voltage, and provides the reference common voltage to the first pixel. The timing controller determines a dithering scheme for the first pixel based on first common voltage information, and generates first output pixel data by applying a dithering function to first input pixel data based on the dithering scheme for the first pixel. The first common voltage information indicates whether the reference common voltage is substantially equal to an optimal common voltage of the first pixel. A first data voltage provided to the first pixel is generated based on the first output pixel data. A polarity of the first data voltage is reversed with respect to the reference common voltage for each predetermined duration. A phase of the first data voltage is symmetric or asymmetric with respect to the reference common voltage depending on the dithering scheme for the first pixel.
US10210828B2 Temperature sensing circuit and driving circuit
The present invention provides a temperature sensing circuit, which comprises a switching circuit, a charging circuit, and a judging circuit. The switching circuit receives a supply voltage for generating a switching signal. The charging circuit is coupled to the switching circuit and receives the supply voltage. The switching signal controls the charging circuit for generating a voltage signal according to the supply voltage. The judging circuit is coupled to the charging circuit for generating a judging signal according to the level of the voltage signal. The levels of the switching signal and the voltage signal are related to a temperature state; and the judging signal represents the temperature state. The temperature sensing circuit can be applied to the driving circuit of a display panel for detecting the temperature state. Hence, the level of the driving signal of the driving circuit can be adjusted for improving the image quality.
US10210826B2 Sub-pixel rendering method for delta RGBW panel and delta RGBW panel with sub-pixel rendering function
A sub-pixel rendering method for a Delta RGBW panel and a Delta RGBW panel with sub-pixel rendering function are provided. The sub-pixel rendering method for a Delta RGBW panel is disclosed. The method comprises: utilizing a controller to classify all sub-pixels of the Delta RGBW panel into a first type of sub-pixels, a second type of sub-pixels, and a third type of sub-pixels; rendering the first type of sub-pixels by a left pixel, a current pixel, and a right pixel; rendering the second type of sub-pixels by a current pixel and a right pixel; and rendering the third type of sub-pixels by a left pixel and a current pixel.
US10210823B2 Light deflector and display apparatus
A light deflector includes a first light deflecting member disposed on a transparent substrate and has a refractive index that varies depending on a magnitude of an electric field applied thereto. The light deflector may adjust the refractive index by applying electric fields differently according to regions of the first light deflecting member or time divisions. The light deflector may have a smaller size than a light deflector including an optical device, and may easily adjust the refractive index.