最新美国发明专利第2019-01-01期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US10171220B2	Terminal, base station, and communication method Provided is a terminal configured to communicate with a base station with an FDD cell and a TDD cell. The terminal includes a reception unit configured to perform reception on a PDCCH transmitted in a DCI format. When a TDD cell is configured as a primary cell for the terminal, a first uplink reference UL-DL configuration used for determination of the interval between the reception of the PDCCH indicating a PUSCH transmission and the PUSCH transmission is configured for the TDD cell, and a second uplink reference UL-DL configuration used for determination of whether to use a DAI included in the DCI format of the PDCCH indicating the PUSCH transmission is configured in the FDD cell.
US10171215B1	Segregating UEs among carriers to help facilitate operation in lean-carrier mode Disclosed are methods and systems for segregating user equipment devices (UEs) among carriers to help facilitate operation in lean-carrier mode in which a base station (BS) engages in a reduced extent of reference signaling on a particular carrier. In practice, the BS may operate in the lean-carrier mode when bearer data is not being communicated on the particular carrier. Given this arrangement, the BS may identify one or more UEs, of a plurality of UEs served by the BS, based on each UE communicating bearer data less frequently than a threshold frequency of bearer data communication. And the BS may serve just the identified UEs on the particular carrier, thereby increasing a probability of the BS operating in the lean-carrier mode.
US10171214B2	Channel state information framework design for 5G multiple input multiple output transmissions A user equipment can be configured to decompose a multiple input multiple output (MIMO) channel into multiple domains, measure the channel state information reference signal (CSI-RS) for each domain, and select a feedback format for transmission to network node based on the measurements. The network node can use the feedback to determine transmission parameters to be transmitted to the user equipment.
US10171207B2	Methods and apparatus for control bit detection Methods and apparatus for control bit detection. In an exemplary embodiment, a method includes receiving an LLR sequence (l) that includes P control bits and calculating a sum of LLR squares parameter (L) associated with the LLR sequence. The method also includes generating a value (Vp) for each of the 2P combination of the control bits. Each Vp value is based on a parameter sequence and the LLR sequence. The method also includes determining a smallest value of Vp, and outputting a determination that a control bit combination was received if the smallest value of Vp is less than a threshold value (THD) multiplied by the parameter L.
US10171206B2	Methods and apparatuses for reframing and retransmission of datagram segments A source device for sending datagrams contained in an aggregated packet structure comprising transport containers each containing one or more datagram segments of the datagram, the source device comprising a feedback processor configured to receive feedback that a transmission of a transport container has failed or a detector unit that detects that a transmission of a transport container will fail; a disassembler unit that disassembles the failed transport container the transmission of which has failed or will fail; a creating unit that creates at least one new transport container from less than all of the failed transport containers without splitting datagrams; and a sending unit that sends sequence information indicating a conversion between a sequence of the transport containers of the failed datagram and a sequence of the transport containers of the new datagram, where the source device is configured to reformat and retransmit datagrams whose transmission has failed.
US10171202B2	Diversity repetition in mixed-rate wireless communication networks A method of wirelessly communicating a packet can include generating, at a wireless device, a packet including a plurality of symbols. The method further includes segmenting an input bit vector into a plurality of symbol vectors according to one of a sequential or distributed segmentation procedure. The method further includes splitting each of the plurality of symbol vectors into two or more split vectors according to one of a sequential or round-robin split procedure. The method further includes mapping each of the split vectors into the plurality of symbols according to one of a block-level repetition or a symbol-level repetition. The method further includes transmitting the packet.
US10171200B2	Optical communication using super-nyquist signals An optical transmitter multiplexes multiple optical channels for transmission over an optical communication medium. The spectrum of modulated signal in each optical channel is lowpass filtered in the electrical (digital) domain at half the channel baud rate such that super Nyquist signal multiplexing can be achieved in the optical domain without having to perform optical filtering. An optical coupler may be used to multiplex the multiple optical channels.
US10171193B2	Fractional multiplexing of serial attached small computer system interface links Methods, devices, and systems relating to Serial Attached SCSI (SAS) storage interconnect technology are provided. An SAS serial connection is established between an SAS initiator and an SAS expander over a physical link for communications between the SAS initiator and a plurality of target devices. The plurality of target devices is in communication with the SAS expander. SAS packets associated with each of the plurality of target devices are dynamically multiplexed and transmitted over the single SAS serial connection. Each SAS packet comprises one or more information bits indicating the target device with which the SAS packet is associated. The dynamically multiplexed SAS packets transmitted over the SAS connection may comprise SAS packets associated with at least two target devices having different maximum physical link rates. A result may be improved bandwidth utilization of the physical link when legacy SAS target devices with slower physical link rates are utilized.
US10171192B2	Method of providing an emergency alert service via a mobile broadcasting and apparatus therefor A device providing an emergency alert service via a mobile broadcasting according to one embodiment of the present invention includes an RS frame encoder configured to generate an RS frame, which is a 2nd dimensional data frame, in a manner of performing an RS (Reed-Solomon)-CRC (Cyclic Redundancy Check) encoding on an ensemble comprising a mobile data for a mobile broadcasting service and a service signaling channel containing an access information on the mobile broadcasting service, an RS frame divider configured to divide the generated RS frame into a plurality of RS frame portions, a signaling encoder configured to generate a signaling data comprising a TPC (Transmission Parameter Channel) for signaling a transmission parameter of the mobile broadcasting and a FIC (Fast Information Channel) containing a connection information between the ensemble and the broadcasting service, a data group formatter configured to generate a data group containing a part of the signaling data and the RS frame portion, and a broadcasting signal generating unit configured to generate a mobile broadcasting signal containing the data group.
US10171186B2	Method and device for detecting notch band A method for detecting a notch band is applied to a multicarrier communication system that operates in a wideband. The method includes: receiving a received signal, and generating a plurality of frequency-domain signals according to the received signal; performing a magnitude operation on the frequency-domain signals to obtain a plurality of magnitude values; determining a plurality of ratios of a first magnitude set among the magnitude values to a second magnitude set among the magnitude value to determine whether the received signal contains a notch band.
US10171181B2	High-bandwidth underwater data communication system An apparatus is described which uses directly modulated InGaN Light-Emitting Diodes (LEDs) or InGaN lasers as the transmitters for an underwater data-communication device. The receiver uses automatic gain control to facilitate performance of the apparatus over a wide-range of distances and water turbidities.
US10171180B2	Fiber optic communications and power network A fiber optic-based communications network includes: a power insertion device, connected to multiple fiber links from a data source, configured to provide power insertion to a hybrid fiber/power cable connected to at least one fiber link of the multiple fiber links; the hybrid fiber/power cable, connecting the power insertion device to a connection interface device, configured to transmit data and power from the power insertion device to the connection interface device; and the connection interface device, configured to provide an interface for connection to an end device via a power over Ethernet (PoE)-compatible connection and to provide optical to electrical media conversion for data transmitted from the power insertion device to an end device via the hybrid fiber/power cable and the PoE-compatible connection.
US10171171B2	Method and system for selectable parallel optical fiber and wavelength division multiplexed operation Methods and systems for selectable parallel optical fiber and WDM operation may include an optoelectronic transceiver integrated in a silicon photonics die. The optoelectronic transceiver may, in a first communication mode, communicate continuous wave (CW) optical signals from an optical source module to a first subset of optical couplers on the die for processing signals in optical modulators in accordance with a first communications protocol, and in a second communication mode, communicate the CW optical signals to a second subset of optical couplers for processing signals in the optical modulators in accordance with a second communications protocol. Processed signals may be transmitted out of the die utilizing a third subset of the optical couplers. First or second protocol optical signals may be received from the fiber interface coupled to a fourth subset or a fifth subset, respectively, of the optical couplers.
US10171170B2	Multi-channel parallel optical transceiver module The present disclosure provides a multi-channel parallel optical transceiver module. The disclosed optical transceiver module/device may include a shell body and a circuit board located in the shell body, and an optical emitter base soldered to a first end of the circuit board. A notch located on the base, for engaging the first end of the circuit board, and the optical emitter base engaged with the first end of the circuit board may be soldered to two sides of the circuit board. The optical emitters may be disposed in parallel on the base, and separated from each other by a block. A lens and a laser may be disposed at a first side of each of the optical emitters that is adjacent to the circuit board, and an optical monitor may be disposed on a second end of the circuit board adjacent to the laser.
US10171168B2	Optoelectronic transceiver with power management Embodiments herein relate to optoelectronic transceivers with power management. An optoelectronic device may include a photodetector, a loss of signal (LOS) detector coupled with the photodetector, and a re-timer coupled with the LOS detector, wherein a component of the re-timer is to be disabled in response to a detection by the LOS detector that an optical signal has not been received for a predetermined time period. In some embodiments, the LOS detector is coupled with a driver disable input of the re-timer and a driver component of the re-timer is to be disabled. In some embodiments, a clock data recovery circuit, a transmit module re-timer and modulator, and/or a laser may be disabled. In various embodiments, components may be re-enabled in response to detection that an optical signal is being received and/or an electrical signal is received for optical transmission. Other embodiments may be described and/or claimed.
US10171165B2	Visible light signal generating method, signal generating apparatus, and program A visible light signal generating method is a method for generating a visible light signal transmitted in response to a change in a luminance of a light source of a transmitter, and includes: generating a header (SHR), where the header is data in which first and second luminance values, which are different luminance values, alternately appear along a time axis; generating a PHY payload A and a PHY payload B by determining a time length according to a first mode, where the time length is a time length during which each of the first and second luminance values continues in the data in which the first and second luminance values alternately appear along the time axis, and the first mode matches a transmission target signal; and generating the visible light signal by joining the header (SHR), the PHY payload A and the PHY payload B.
US10171161B1	Machine learning for link parameter identification in an optical communications system Technology for link parameter identification in an optical communications network is described. A first trained artificial neural network (ANN) may be applied to first input values representative of nonlinear noise in a signal received at a receiver from a transmitter over a link in the optical communications system, thereby generating first output values. A second trained ANN may be applied to second input values comprising the first output values and one or more known parameters of the link, thereby generating second output values. One or more link parameter estimates may be identified based on the second output values. In some examples, the first trained ANN has an architecture specialized for two-dimensional image recognition and therefore suitable for the image-like properties of the first input values. For example, the first trained ANN may comprise a deep residual learning network (ResNet) or a Convolution Neural Network (CNN).
US10171159B1	Donor selection for relay access nodes using reference signal boosting A method for donor selection in a relay access node includes identifying a plurality of candidate donor access nodes and obtaining one or more characteristics associated with each of the plurality of candidate donor access nodes. The method further includes determining a primary donor access node based on a comparison of the one or more characteristics between each of the plurality of candidate donor access nodes, and receiving a reference signal transmitted by the primary donor access node at a transmission power higher than a transmission power of downlink information transmitted by the primary donor access node. One or more quality characteristics of the primary donor access node are evaluated, and based on the one or more quality characteristics meeting a predetermined threshold, a connection to the primary donor access node is requested. Devices and systems relate to donor selection.
US10171156B2	Apparatus and method for transmitting uplink information in a broadcasting system An apparatus and a method for transmitting uplink information in a broadcasting system are provided. A repeater of a mobile broadcasting system includes a plurality of transmitting stations each transmitting a broadcast signal for at least one broadcast service, a plurality of terminals receiving the broadcast signal for the at least one broadcast service through at least one transmitting station among the transmitting stations, and the repeater, the repeated being coupled between the plurality of transmitting stations and the plurality of terminals. The repeater includes a receiving unit configured to receive uplink information from the terminals, a control unit configured to classify the received uplink information by broadcast service and to create uplink information per broadcast service, and a transmitting unit configured to transmit the created uplink information to at least one corresponding transmitting station.
US10171148B2	Wireless communication device According to one embodiment, a wireless communication device includes a transmitter configured to multiplex and transmit a plurality of first frames; a receiver configured to receive a plurality of second frames that represent acknowledgement responses to the plurality of first frames and are multiplexed and transmitted; and controlling circuitry. The first information necessary for transmission of the plurality of second frames is set in the plurality of first frames. The controlling circuitry is configured to separate the plurality of second frames based on the first information.
US10171146B2	MIMO rank reduction to improve downlink throughput Systems and methods for Multiple-Input and Multiple-Output (MIMO) rank reduction to improve downlink throughput are disclosed. A method of operation of a radio access node includes determining that an imbalance between parallel channels of a spatial multiplexing downlink transmission to a wireless device is greater than an imbalance threshold and/or that a Negative Acknowledgement (NACK) rate over time for the parallel channels of a spatial multiplexing downlink transmission reported by the wireless device is greater than a NACK rate threshold. The method also includes, in response to determining that the imbalance between the parallel channels is greater than the imbalance threshold and/or that the NACK rate is greater than the NACK rate threshold, performing a fast rank reduction for a next downlink transmission whereby a rank is reduced from a rank indicator reported by the wireless device to some lower rank. Reducing the rank may improve downlink throughput.
US10171145B2	Codebook configuration method and user equipment The present invention provides a codebook configuration method and user equipment. The UE receives a reference signal that is of an antenna whose quantity of antenna ports is X and that is sent by a base station and configuration information of a codebook subset restriction for the quantity X of antenna ports, where the configuration information of the codebook subset restriction for the quantity X of antenna ports includes first configuration information and second configuration information; determines, according to the configuration information of the codebook subset restriction for the quantity X of antenna ports, a precoding matrix on which channel measurement and feedback need to be performed; and obtains, by means of measurement according to the reference signal, the precoding matrix on which channel measurement and feedback need to be performed and that is of antenna ports.
US10171143B2	Microwave radio transmitter and receiver for polarization misalignment compensation This disclosure provides a microwave radio transmitter for radio transmission to a microwave radio receiver. The microwave radio transmitter comprises an antenna arrangement and a baseband processing module connected to the antenna arrangement. The antenna arrangement comprises an antenna having a polarization. The baseband processing module is configured to receive a polarization misalignment indication from the microwave radio receiver. The polarization misalignment indication is indicative of a misalignment between the polarization of the antenna and a corresponding polarization of a receive antenna comprised in the microwave radio receiver. The baseband processing module is configured to compensate for polarization misalignment between the antenna and the receive antenna by adjusting the radio transmission based on the polarization misalignment indication.
US10171142B2	Data transmission method, apparatus, and device Embodiments of the present invention provide a data transmission method, apparatus, and device, so as to improve efficiency in utilizing a time-frequency resource. The method includes: determining, by a transmit end device, a signature matrix S according to a quantity L of layers of a data stream and a quantity R of receive antennas used by a receive end device; determining, by the transmit end device, a precoding matrix P according to a channel matrix H and the signature matrix S, and performing precoding processing on the L-layer data stream according to the precoding matrix P; and sending, by the transmit end device to the receive end device, the L-layer data stream on which the precoding processing has been performed and information used to indicate the signature matrix S.
US10171141B2	Hybrid beam-forming antenna array using selection matrix for antenna phase calibration A hybrid beam-forming antenna array used in a MU-MIMO communication system, comprising a single digital beam-former connected to M number of passive beam-former sub-arrays and M number of passive beam-former sub-arrays. Each of the passive beam-former sub-arrays comprising a RF transceiver feeding a single RF chain, a 2N-inputs-2N-outputs selection matrix having all its inputs connected to the single RF chain output, and 2N number of antennas each connected to and fed by one of the outputs of the selection matrix. The digital beam-former thereof is feeding each of the RF transceivers of the passive beam-former sub-arrays. The selection matrix thereof has no power-consuming element or external control, and configured to be fed with an RF signal at one or more of its inputs and produce 2N number of separate RF signal beams with progressive phase distribution at its outputs. In addition, the hybrid beam-forming antenna array has no antenna calibration network.
US10171134B2	Electric device and operation method If RF intensity is strong, an excessive voltage may be generated in an NFC IC to destroy the IC. Thus, an inexpensive arrangement for preventing the NFC IC from being destroyed is required. According to an embodiment of this invention, an electric device for performing short distance wireless communication with a mobile terminal by induced power from the mobile terminal has the following arrangement. That is, the arrangement includes an antenna configured to generate the induced power by an RF signal from the mobile terminal, an element configured to drop a peak voltage generated by the induced power, a circuit driven by the dropped voltage and configured to perform the short distance wireless communication, and a light emission element driven by the dropped voltage and configured to emit light.
US10171133B1	Transponder arrangement A transponder arrangement includes a substrate, an RF transponder, and first, second, and third antenna elements. The substrate has a first surface and an opposing second surface. The RF transponder is disposed on the first surface of the substrate and has a first connection pad and a second connection pad. The first antenna element is disposed on the first surface of the substrate and is connected to the first connection pad. The second antenna element is disposed on the first surface of the substrate and is connected to the second connection pad. The third antenna element is disposed on the second surface of the substrate and is inductively coupled to the first and second antenna elements.
US10171131B2	Electronic tuning system A system is provided that can automatically adjust a tuned circuit to resonate at the frequency of an applied excitation signal. The error in the resonant frequency of the tuned circuit is determined in real time from signals derived from within the network. The system permits the use of a time varying excitation frequency in a high Q circuit, including modulation conveying information. The tuning information may be stored in a memory and used to set the tuning instantaneously in order to maintain resonance when the excitation frequency changes abruptly, for example when frequency shift keying is used.
US10171126B2	Apparatus for uplink multi-antenna communication based on a hybrid coupler and a tunable phase shifter Embodiments of front-end module (FEM) circuitry and a communication device are generally described herein. In some embodiments, the FEM circuitry may be configured to provide uplink (UL) multiple-input multiple-output (MIMO) signals and/or UL carrier aggregation (CA) signals for transmission by the communication device. The FEM circuitry may comprise a hybrid coupler to generate a first antenna transmit signal and a second antenna transmit signal. The FEM circuitry may further comprise one or more tunable phase shifters. In some embodiments, the phase shifters may phase-shift a first radio frequency (RF) signal and a second RF signal according to a 90 degree phase difference to generate the hybrid coupler input signals. Accordingly, the antenna transmit signals may be transmitted according to the UL-MIMO configuration.
US10171125B2	Tunable antenna systems An electronic device has wireless communications circuitry including an adjustable antenna system coupled to a radio-frequency transceiver. The adjustable antenna system may include one or more adjustable electrical components that are controlled by storage and processing circuitry in the electronic device. The adjustable electrical components may include switches and components that can be adjusted between numerous different states. The adjustable electrical components may be coupled between antenna system components such as transmission line elements, matching network elements, antenna elements and antenna feeds. By adjusting the adjustable electrical components, the storage and processing circuitry can tune the adjustable antenna system to ensure that the adjustable antenna system covers communications bands of interest.
US10171124B2	Low noise amplifier arbiter for license assisted access systems Methods and devices useful in concurrently receiving and supporting Wireless Fidelity (Wi-Fi) and Long Term Evolution Licensed Assisted Access (LTE-LAA) wireless data signals are provided. By way of example, an electronic device includes a front end module having an arbiter device that controls one or more gain stages to selectively amplify the Wi-Fi and LTE-LAA signals.
US10171123B2	Triple-gate PHEMT for multi-mode multi-band switch applications A switch element includes a source having a plurality of source fingers and a drain having a plurality of drain fingers interleaved with the source fingers. An active mesa region is defined between at least one of the plurality of source fingers and an adjacent at least one of the plurality of drain fingers. A plurality of gates are disposed between the at least one of the plurality of source fingers and the adjacent at least one of the plurality of drain fingers. At least one of gates extends into the active mesa region from outside of the active mesa region and terminates within the active mesa region.
US10171121B1	Ruggedized protective case with integrated easel kickstand for mobile device In a first aspect, embodiments of the inventive concepts disclosed herein are directed to a ruggedized protective case for a tablet, smartphone, or other like mobile communications or computing device. The case may include a rigid inner housing shielding the reverse face of the mobile device and a flexible, rubberized outer housing including reinforced impact-absorbing corners. The case may include a kickstand/easel hingedly attached to the rear inner housing, positionable by a user for holding the mobile device at any desired angle to a substantially horizontal surface.
US10171120B2	Apparatus and method for suppressing intermodulation distortion component in reception signal, and communication apparatus An apparatus for suppressing an intermodulation distortion component in a reception signal executes acquisition to acquire a plurality of transmission signals transmitted at frequencies different from each other, executes reception to receive a reception signal including an intermodulation distortion component caused by the plurality of transmission signals, executes generation to generate a replica of the intermodulation distortion component according to the plurality of transmission signals, executes normalization to normalize the reception signal so that the reception signal has certain amplitude, executes calculation to calculate a correlation value between the normalized reception signal and the replica, executes adjustment to adjust delay in the replica relative to the reception signal according to the correlation value, and executes combination to combine the replica for which the delay is adjusted with the reception signal.
US10171114B2	Radio frequency switch apparatus having improved noise suppression characteristics A radio frequency switch apparatus includes switching circuits connected between respective signal terminals and an antenna terminal. Each of the switching circuits includes a series switching circuit and a shunt switching circuit configured to switch a signal band on and off. An inductor circuit includes an inductor device connected between at least one shunt switching circuit of the switching circuits and a ground. The inductor device suppresses noise and passes the signal band by being resonant with a capacitance present upon the shunt switching circuit being turned off.
US10171108B1	Parallel CRC calculation for multiple packets without requiring a shifter Systems and methods are provided herein for removing the need to account for varying lengths of data packets that are transmitted during a single clock cycle, and to require only one CRC calculation block for handling parallel processing of a stream of data packets received during a clock cycle. Moreover, systems and methods are provided herein for eliminating a need for a shifter, such as a barrel shifter, to process the data packets of a single clock cycle in parallel.
US10171106B2	Systems and methods for multi-stage data serialization in a memory system An integrated circuit includes first and second double data rate (DDR) shift registers. A multiplexor outputs a serialized data burst by selecting between a first output stream of the first DDR shift register and a second output stream of the second DDR shift register based upon a received selector signal. The selector signal is derived from clock doubling circuitry that provides a frequency that is twice a frequency of a first clock driving the first DDR shift register.
US10171105B2	Carry-less population count Technical solutions are described for determining a population count of an input bit-string. In an example, a population count circuit receives a single n-bit input data word including of bits A[n−1:0]. The population count circuit isolates a pair of 4-bit nibbles. The population count circuit includes a carryless counter circuit that determines a pair of counts of 1s, one for each 4-bit nibble. The population circuit further includes an adder circuit that determines the population count by summing the pair of counts of 1s from the carryless counter circuit, where the adder circuit determines the most significant bit (MSB) of the sum based on the MSBs of the counts of 1s only, without depending on carry propagation.
US10171104B1	Encoding variable length integers for graph compression A graph compression system includes a memory unit to store graph data, and an electronic hardware controller in signal communication with the memory unit. The electronic hardware controller determines a distribution of a set of vertices in a graph, and encodes each vertex included in the set of vertices as a variable length integer (VLI) that includes a variable number of bytes. The variable number of bytes of each vertex is based on the determined distribution. Accordingly, the memory unit stores each vertex having been encoded according to the distribution of the set of vertices in the graph.
US10171102B1	Oversampled continuous-time pipeline ADC with voltage-mode summation A linear continuous-time (CT) delaying summation block is one of the key building blocks for CT multi-stage analog-to-digital converters (ADCs) such as CT pipeline ADCs and CT multi-stage delta-sigma (MASH) ADCs. The CT summation block is typically used on a stage of a CT multi-stage ADC to subtract a digital-to-analog converter (DAC) output signal from an analog input signal of the stage. Rather than using a current-mode summation, the CT delaying summation block can be implemented with voltage-mode summation.
US10171101B1	Modulators This application relates to modulators for providing time-encoded signals and in particular PWM signals. A modulator (200) has a first controlled oscillator (201P) configured to receive a first oscillator driving signal and output a first oscillation signal (S1). An accumulator (204) is configured to provide an accumulator value (VAL) based on a number of pulses of the first oscillation signal and a hysteretic comparator (205) alternates between first and second output states based on a hysteretic comparison of the accumulator value with a defined reference (REF). The first oscillator driving signal is based on a combination of an input signal and a feedback signal derived from an output of the hysteretic comparator. A second controlled oscillator (201N) may be configured to receive a second oscillator driving signal and output a second oscillation signal (S2) and the accumulator may provide the accumulator value based on a difference in the number of pulses of the first oscillation signal and the second oscillation signal.
US10171100B2	Circuit and method for generating reference signals for hybrid analog-to-digital convertors An embodiment circuit includes a first reference source configured to provide a first reference signal to an analog-to-digital convertor (ADC). The circuit also includes a filter coupled to an output of the first reference source and configured to filter the first reference signal to produce a filtered first reference signal. The circuit further includes a second reference source coupled to an output of the filter. The second reference source is configured to provide a second reference signal to the ADC, and the second reference signal is generated based on the filtered first reference signal.
US10171097B1	Correcting device of successive approximation analog-to-digital conversion Disclosed is a correcting device of successive approximation analog-to-digital conversion. The correcting device includes a successive approximation register analog-to-digital converter (SAR ADC) and a digital circuit. The SAR ADC is configured to generate a digital output. The digital circuit is configured to determine whether the digital output conforms to a metastable output, and correct the digital output when the digital output conforms to the metastable output. The metastable output is related with a metastable binary comparison-results sequence including successive K comparison results such as 110000 or 001111. The K comparison results include a first comparison result, a second comparison result and successive M comparison results in turn. The first comparison result and the second comparison result are the same; the M comparison results are the same; each of the first comparison result and the second comparison result is different from any of the M comparison results.
US10171095B2	Atomic oscillator, electronic apparatus, moving object, and manufacturing method of atomic oscillator An atomic oscillator includes a gas cell, a semiconductor laser, and a frequency modulation signal generation section (such as a frequency transform circuit) which generates a frequency modulation signal for causing the semiconductor laser to generate frequency-modulated light including a resonance light pair (first-order sideband light pair) that causes an electromagnetically induced transparency phenomenon in metal atoms. When a modulation index of the frequency modulation signal, by which a first-order differential value of oscillation frequency deviation of the atomic oscillator becomes 0, is regarded as a first modulation index, the modulation index is within a range between a second modulation index, which is smaller than the first modulation index, with which the oscillation frequency deviation is 0 and a third modulation index, which is greater than the first modulation index, with which the oscillation frequency deviation is 0.
US10171084B2	Sparse coding with Memristor networks Sparse representation of information performs powerful feature extraction on high-dimensional data and is of interest for applications in signal processing, machine vision, object recognition, and neurobiology. Sparse coding is a mechanism by which biological neural systems can efficiently process complex sensory data while consuming very little power. Sparse coding algorithms in a bio-inspired approach can be implemented in a crossbar array of memristors (resistive memory devices). This network enables efficient implementation of pattern matching and lateral neuron inhibition, allowing input data to be sparsely encoded using neuron activities and stored dictionary elements. The reconstructed input can be obtained by performing a backward pass through the same crossbar matrix using the neuron activity vector as input. Different dictionary sets can be trained and stored in the same system, depending on the nature of the input signals. Using the sparse coding algorithm, natural image processing is performed based on a learned dictionary.
US10171070B2	Signal transmission circuit and power conversion device A first circuit outputs transmission signals that change between “H” and “L” in a period of an oscillation signal in addition to a transition time of an input signal when it changes to “H” or “L”. Control protection elements invalidate induced voltage signals obtained from transformers for first and second mask periods in response to transmission signals. Buffer circuits and Schmitt circuits generate a first signal and a second signal, each indicating “H” for a relatively long period, on the basis of “H” of the induced voltage signals. A control circuit invalidates the first signal and the second signal when both the first signal and the second signal indicate “H”.
US10171069B1	Switch controller for adaptive reverse conduction control in switch devices The application discloses the control of switches, such as metal-oxide semiconductor field effect transistors (MOSFETs) devices, during surge events. The switch controllers and methods for operation thereof discuss methods for providing driving signals to the switch for adjusting the mode of operation based on the voltage and/or current thresholds as sensed by the system and/or by the switch controller.
US10171067B2	Waveform shaping filter, integrated circuit, radiation detection device, method for adjusting time constant of waveform shaping filter, and method for adjusting gain of waveform shaping filter A waveform shaping filter according to an embodiment includes at least one filter stage and a control circuit. The filter stage includes a differentiation signal generation circuit, a proportional signal generation circuit, and an adder circuit. The differentiation signal generation circuit generates a differentiation signal obtained by amplifying a differentiation component of an input signal. The proportional signal generation circuit generates a proportional signal obtained by amplifying the input signal. The adder circuit outputs an output signal obtained by adding the proportional signal and the differentiation signal. The control circuit compares the output signal and a first detection level, detects at least one of an overshoot and an undershoot of the output signal, and controls a time constant of the filter stage, based on a detection result.
US10171065B2	PVT stable voltage regulator An apparatus includes a voltage regulation module configured to provide an output voltage signal (Vout) and an auto-calibration module configured to provide a calibration current signal (Isink) corresponding to a voltage difference between a target voltage signal (Vtarget) and the output voltage signal (Vout). The voltage regulation module may adjust the output voltage in response to changes in the calibration current signal. In one embodiment, the voltage regulation module comprises an output voltage resistor pair of resistance R1 and R2, respectively, and the output voltage signal conforms to the equation Vout=Isink·R1+Vref·(1+R1/R2).
US10171061B2	Elastic wave device An elastic wave device includes a low acoustic velocity film, a piezoelectric film, and an IDT electrode, which are laminated on a high acoustic velocity material. In the IDT electrode, first electrode fingers, or second electrode fingers, or each of the first electrode fingers and the second electrode fingers, includes a wide width portion with a dimension in a width direction larger than a dimension at a center in a length direction and being provided closer to at least one of a side of a proximal end and a side of a distal end than a central region, at least one of a first busbar and a second busbar includes cavities arranged in a busbar length direction, and at least one of the first busbar and the second busbar includes an inner busbar portion which is positioned closer to a side of the first electrode fingers or a side of the second electrode fingers than the cavities are and which extends in the length direction of the first busbar and the second busbar, a central busbar portion that includes the cavities, and an outer busbar portion.
US10171057B1	Automatic gain control loop In conventional optical receivers the dynamic range is obtained by using variable gain amplifiers (VGA) with a fixed trans-impedance amplifier (TIA) gain. To overcome the SNR problems inherent in conventional receivers an improved optical receiver comprises an automatic gain control loop for generating at least one gain control signal for controlling gain of both the VGA and the TIA. Ideally, both the resistance and the gain of the TIA are controlled by a gain control signal.
US10171054B1	Audio adjustment based on dynamic and static rules An approach is provided that compares inputs received at a system to a set of rules. The rules include both static rules as well as dynamic rules. The approach retrieves audio adjustments based on the comparison of inputs to the rules. The approach then automatically adjusts an output of an audio system based on the retrieved audio adjustment.
US10171051B2	Amplification circuit, optical module, and amplification method An amplification circuit coupled to another circuit by alternating current (AC) coupling includes: an amplifier that amplifies and outputs a signal input from the other circuit or amplifies an input signal and outputs the amplified input signal to the other circuit; a feedback circuit that positively feeds back the signal output from the amplifier to an input of the amplifier; and a low pass filter that attenuates a high frequency component of the signal positively fed back to the input of the amplifier by the feedback circuit, and in which a higher cut-off frequency is set such that a lower cut-off frequency in a combination of the amplification circuit and a high pass filter formed by the AC coupling is lower than a lower cut-off frequency in the high pass filter.
US10171050B2	Circuits for providing Class-E power amplifiers In some embodiments, circuits for providing Class-E power amplifiers are provided, the circuits comprising: a first switch having a first side and a second side; a first Class-E load network coupled to the first side of the first switch; a second Class-E load network; and a second switch having a first side and a second side, the first side of the second switch being coupled the second side of the first switch and the second Class-E load network. In some embodiments, the circuits further comprise: a third switch having a first side and a second side; a third Class-E load network coupled to the first side of the third switch; a fourth Class-E load network; and a fourth switch having a first side and a second side, the first side of the fourth switch being coupled the second side of the third switch and the fourth Class-E load network.
US10171047B2	Power amplifier with stabilising network A power amplifier circuit comprising a transistor for receiving a signal to be amplified at an input and for outputting an amplified signal at an output; a modulated power supply connected to the transistor output; and a resistive element connected at the transistor output such that a low impedance is maintained at the transistor output across a range of operational frequencies.
US10171044B2	Power amplification circuit A power amplification circuit includes: a first amplifier that is input with a first signal and outputs a second signal; a bias circuit that supplies a bias current or voltage to the first amplifier; and a control voltage generating circuit that generates a control voltage in accordance with the first signal. The bias circuit includes a first transistor that outputs the bias current or voltage, a second transistor provided between the emitter or source of the first transistor and ground, and a third transistor that is supplied with the control voltage and that supplies a first current or voltage to the second transistor. The value of the first current or voltage when the signal level is a first level is larger than the value of the first current or voltage when the signal level is a second level. The first level is higher than the second level.
US10171042B2	Degenerated transimpedance amplifier with wire-bonded photodiode for reducing group delay distortion An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.
US10171041B2	Predistortion device The disclosure relates to a predistortion device for a non-linear PA device, comprising: an input terminal for receiving an input signal; a predistortion filter, connected between the input terminal and the non-linear PA device; a first delay element, coupled to the input terminal, and configured to delay the input signal by a time delay D to provide a delayed input signal; and an adaptive filter unit, comprising an adaptive filter having adjustable filter weights, and configured to filter the delayed input signal, and an adjusting unit, wherein the adjusting unit is configured to process an adaptive algorithm, based on the delayed input signal, to adjust the filter weights of the adaptive filter, and to provide both the adaptive filter and the predistortion filter with the same adjusted filter weights.
US10171040B1	Trans-impedance amplifier The present disclosure provides a trans-impedance amplifier, comprising: an equivalent secondary amplifier module, having an input end and an output end, wherein the input end is coupled to an optical diode and used for accessing an input voltage signal, and the output end is used for outputting a secondarily amplified first voltage signal; an inverting amplifier unit, coupled to the output end of the equivalent secondary amplifier module and used for accessing the first voltage signal and outputting an inverting amplified voltage signal, the inverting amplifier unit comprising a third N-type transistor and a fourth N-type transistor coupled to the third N-type transistor; and a feedback resistor, coupled to the input end of the equivalent secondary amplifier module and an output end of the inverting amplifier unit. The feedback resistor of the trans-impedance amplifier can be not restricted by original conditions, may increase resistance, reduce input noise and improve sensitivity.
US10171036B2	Power amplification circuit Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
US10171035B2	Power factor correction circuit and multiplier The present invention disclosure provides a multiplier and a power factor correction circuit which the multiplier is applied. The multiplier comprises a Gilbert multiplier circuit comprising a first differential input stage, a second differential input stage and an output stage; a first differential voltage conversion circuit; a second differential voltage conversion circuit; and a bias current generating circuit; Wherein said output stage comprises: a current mirror unit comprising two current input terminals and a current output terminal; and a feedback control unit configured to ensure that the current output terminal does not output current when the voltage difference received by the multiplier is zero. The present invention is advantageous in improving the linearity of the multiplier and the accuracy of the output current of the multiplier output current.
US10171032B2	Apparatuses and methods for temperature independent oscillators Apparatuses and methods for temperature independent oscillator circuits are disclosed herein. An example apparatus may include a pulse generator circuit configured to provide a periodic pulse based on the charging and discharging of a capacitor and further based on a reference voltage. The pulse generator circuit may include a capacitor coupled between a first reference voltage and a first node, wherein the capacitor is configured to be charged and discharged through the node in response to the periodic pulse, a resistor and a diode coupled in series between a second node and a second reference voltage, and a comparator coupled to the first and second nodes and configured to provide the periodic pulse based on voltages on the first and second nodes, wherein a period of the periodic pulse is based at least on the resistor and the a current.
US10171029B2	Soiling measurement device for photovoltaic arrays employing microscopic imaging A device comprising a transparent window, an imaging unit, and a computing element coupled to said imaging unit, wherein said device is configured to allow soiling particles to accumulate on a surface of said transparent window, said imaging unit is configured to capture an image of said surface, and said computing element is configured to perform analysis of said image to determine a soiling level of said transparent window. Additionally, a method of performing said analysis.
US10171026B2	Structural attachment sealing system In various representative aspects, the present invention relates generally to a system and apparatus for sealing a structural attachment to a flat or shingle roof. More specifically, the invention relates to providing the system for sealing structural attachments for solar panel mounts for rail guides. The invention utilizes an adhesive sealant to create a permanent watertight seal at any surface penetration. The system may be used for any structural attachment, fastener, mount, or other penetration that requires sealing. Typical building applications include roof penetrations and wall penetrations for cases such as roof vents, structural attachment, conduit or pipe penetrations, or electrical mounts to name a few.
US10171025B2	Apparatus and method for solar panel module mounting inserts A photovoltaic module generates electrical power when installed on a roof. A photovoltaic module preferably has an upper transparent protective layer, and a photovoltaic layer positioned beneath the upper transparent protective layer, the photovoltaic layer comprising a plurality of electrically interconnected photovoltaic cells disposed in an array. A rigid substrate layer is preferably positioned beneath the photovoltaic layer. A plurality of inserts is configured to be fixedly attached to (i) a bottom surface of the rigid substrate and (ii) a surface of a roof. The plurality of inserts is preferably disposed in an array, each foam insert having a substantially triangular-shaped cross section when viewed from a side orthogonal to a line of a roof downward slope.
US10171021B2	Methods for determining a voltage command Methods may involve determining a minimum voltage for a voltage command. A maximum voltage for the voltage command may be determined. A first representation of a first performance curve corresponding to the minimum voltage may be determined. A second representation of a second performance curve corresponding to the maximum voltage may be determined. An operating point to be achieved through the voltage command may be obtained. An evaluation may be made of whether the operating point lies between the first and second representations. When the operating point lies between the first and second representations, an interpolation may be conducted between the first and second representations to determine a magnitude of the voltage command.
US10171019B1	Controller for power converter A controller includes a torque command value calculation module configured to calculate a torque command based on a speed command of the motor, an output voltage controlling module configured to control an output voltage of the power converter based on the torque command calculated by the torque command value calculation module, a voltage command value correcting module configured to correct a voltage command to the power converter based on a measured output voltage from the power converter, a flux estimation module configured to estimate stator flux and rotor flux of the motor in a subsequent control period based on the voltage command by the voltage command value correcting module and a measured current of the stator and a motor speed estimation module configured to estimate a speed of the motor in a subsequent control period based on the flux estimated by the flux estimation module.
US10171016B2	Motor driving circuit A motor driving circuit includes a first output switch, a second output switch, a first adjusting module, and a second adjusting module. A rising slew rate of the first output current along the first direction is adjusted according to the first adjusting parameter of the first adjusting module. A falling slew rate of the first output current along the first direction is adjusted according to the second adjusting parameter of the second adjusting module.
US10171015B2	Digital motor control unit Control of a plurality of electronically commutated motors is effected using a control unit and a power unit. The power unit enables the provision of commutation signals to each controlled motor. The control unit comprises a DSP and a FPGA. An input memory of the FPGA is mapped to the DSP. In use, the DSP determines motor repositioning signals, on the basis of a received motor position demand signal describing demanded motor positions and the encoded motor position data, and loads the motor repositioning signals into the input memory of the FPGA. The FPGA is operable to generate motor driving current signals for driving the motors into the demanded motor positions, on the basis of the motor repositioning signals and motor phase current samples collected by the power unit, and to output the motor driving current signals to the power unit.
US10171013B2	Servomotor control device A servomotor control device that performs static friction correction for a servomotor, including: a position control loop for feedback controlling a position of a servomotor; a speed control loop for feedback controlling speed of the servomotor; a position command creation part that creates a position command value for the servomotor; a stop determination part that determines whether or not the servomotor is stopped; a static-friction correction amount calculation part that calculates a static-friction correction amount of the servomotor; and a static-friction correction amount modification part that performs a predetermined modification on the calculated static-friction correction amount, in a case of the servomotor stopping, and then starting to operate in the same direction as prior to stopping. The static-friction correction amount modification part performs a predetermined modification based on the command acceleration of the servomotor obtained from the position command value created by the position command creation part.
US10171009B2	Apparatus and method for lifting objects A device and a method for moving an object in a vertical direction are disclosed. The device includes a plurality of piezo-actuators expanding in directions upon activation and in doing so generating pressure forces on an active side, and a hydraulic transmission device that converts the pressure forces of the piezo-actuators into a vertical pressure force for moving the object opposite the direction of gravity and transmits the pressure force with a transmission ratio. The object is lifted after the vertical pressure force has exceeded an oppositely acting spring force of a spring system.
US10171008B2	Vibration wave motor and driving apparatus using the vibration wave motor A vibration wave motor includes a vibrating plate having a rectangular surface; a piezoelectric device bonded to the vibrating plate, and configured to vibrate at high frequency; and a projection provided on the vibrating plate or the piezoelectric device. In the vibration wave motor, a natural vibration mode, which has a resonant frequency equal to or adjacent to a resonant frequency of torsional vibration in a natural vibration mode under a state in which the vibrating plate, the piezoelectric device, and the projection are integrated, is a natural vibration mode of bending vibration in a direction parallel to or orthogonal to a torsion center axis of the torsional vibration in the natural vibration mode. The projection is provided at a position closer to an antinode than to a node, which are in the direction orthogonal to the torsion center axis of the torsional vibration in the natural vibration mode.
US10171003B1	Controlling a switching resonant converter A method and a controller for controlling a converter are provided. In the method and controller, a capacitance is charged simultaneously using a first current and a second current that is different than the first current or discharged simultaneously using the first current and the second current. Sourcing and sinking transistors source or sink the first current for charging or discharging the capacitance. An operational transconductance amplifier determines a level of the second current based on a level of current flowing through the resonant tank. The operational transconductance amplifier sources or sinks the second current for charging or discharging the capacitance. Further, logic is provided to output a switching signal for operating the converter based on a voltage across the capacitance.
US10171002B2	Switching power supply and image forming apparatus A switching power supply includes: a main power supply; a rectifying-and-smoothing circuit configured to rectify and smooth an AC voltage; a transformer connected to the rectifying-and-smoothing circuit; a first switching element connected to a primary coil of the transformer; a switch controller configured to perform switching-control the first switching element to oscillate the primary side of the transformer, thereby inducing a voltage to a secondary side of the transformer; and a second switching element connected in series with the smoothing capacitor of the rectifying-and-smoothing circuit and configured to switch between on-and-off states of energization by a control signal that is to be output from the switch controller, wherein the switch controller is configured to limit an on-time period of the second switching element by the control signal during an output stop mode in which the oscillation of the transformer is to be stopped.
US10171000B2	Reduction of audible noise in a power converter A power converter controller includes a drive circuit to generate a drive signal to control switching of a power switch. The drive circuit generates the drive signal in response to a current sense signal, a current limit signal, a frequency skip signal, and a hold signal. A current limit generator generates the current limit signal in response to a load. A frequency detection circuit generates the frequency skip signal in response to the drive signal to indicate when an intended frequency of the drive signal is within a frequency window. The current limit signal remains fixed for at least a switching cycle when the intended frequency is within the frequency window. A first latch generates the hold signal to control the current limit generator to hold the current limit signal. The first latch generates the hold signal in response to the frequency skip signal and a feedback signal.
US10170994B1	Voltage regulators for an integrated circuit chip The described embodiments include an apparatus that controls voltages for an integrated circuit chip having a set of circuits. The apparatus includes a switching voltage regulator separate from the integrated circuit chip and two or more low dropout (LDO) regulators fabricated on the integrated circuit chip. During operation, the switching voltage regulator provides an output voltage that is received as an input voltage by each of the two or more LDO regulators, and each of the two or more LDO regulators provides a local output voltage, each local output voltage received as a local input voltage by a different subset of circuits in the set of circuits.
US10170991B2	Control circuit and control method for a voltage converter A switching control circuit for controlling a multi-channel switching circuit can include: a logic control circuit that receives an external operation signal, and generates an enable signal, a trigger signal, and an order signal; a reference voltage regulation circuit that receives the enable signal, the trigger signal, the order signal, and a plurality of input voltage signals, and generates an adjustable reference voltage signal, where the reference voltage regulation circuit is also configured to select one of the plurality of input voltage signals based on the order signal; a feedback control circuit that receives the reference voltage signal, the plurality of input voltage signals, and the output voltage signal, and generates a feedback control signal; and a channel selection circuit that receives the order signal and the feedback control signal, and generates switching control signals to control switching operations of the multi-channel switching circuit.
US10170989B2	Methods for fabricating an integrated circuit with a voltage regulator Methods for fabricating an integrated circuit with a voltage regulator are provided. In some implementations, a method includes forming a primary regulator on a semiconductor substrate, including fabricating a switch, fabricating an amplifier for controlling the switch, and fabricating a voltage generator for biasing the amplifier to operate the primary regulator in a bypass mode or in a regulating mode. The method further includes forming an input terminal and an output terminal of the primary regulator on the semiconductor substrate, forming a secondary regulator on the substrate, forming an input terminal and an output terminal of the secondary regulator on the semiconductor substrate, and forming an electrical connection between the output terminal of the primary regulator and the input terminal of the secondary regulator.
US10170985B1	Apparatus for current estimation of DC/DC converter and DC/DC converter assembly An apparatus for current estimation of a DC/DC converter includes a current sensing unit, a signal sampling unit, and a current estimator. The current sensing unit is for sensing a current passing through a switch of the DC/DC converter and converting the current into a voltage signal. The signal sampling unit, coupled to the current sensing unit, is for sampling the voltage signal so as to output a sampled signal. The current estimator, coupled to the signal sampling unit, is for determining a signal indicating estimated magnitude of an inductor current of the DC/DC converter, based on the sampled signal, a scale factor of the current sensing unit, a duty ratio of a driving signal for controlling the switch, an input voltage and an output voltage of the DC/DC converter. An apparatus for current estimation that can further control an averaged current of a DC/DC converter.
US10170983B2	Driving device A driving device comprises a first transistor (B13), a second transistor (B14), and a resistance element. The first transistor (B13) has one terminal receiving a pulsed current and a control terminal connected to the one terminal. The second transistor (B14) has one terminal connected to at least one load, the other terminal connected to a reference potential together with the other terminal of the first transistor (B13), and a control terminal connected to the control terminal of the first transistor (B13). The resistance element is connected between the control terminal of the first transistor (B13) and the other terminal of the first transistor (B13).
US10170982B2	Continuous comparator with improved calibration An auto-calibrated current sensing comparator is provided. A secondary dynamic comparator shares the same inputs and acts to adjust a calibration control of the current sensing comparator. The calibration control may be in the form of adjusting the offset of the current sensing comparator or adjusting a propagation delay that is added to its output.
US10170979B2	Point of load regulator synchronization and phase offset An electronic system includes a multiple POL regulators that supply a regulated voltage to a component within the electronic system. A phase spreading scheme may be implemented so that the POL regulators operate under various phases to reduce voltage noise, high input capacitance, and high radiated emissions. One phase spreading scheme includes a single POL regulator controlling phase spreading so that the other POL regulators operate under different phases. Another phase spreading scheme includes an upstream POL regulator determining a phase offset that may be passed to a downstream POL regulator so that the downstream POL regulator may operate under a different phase relative to the upstream POL regulator.
US10170974B1	Variable frequency and burst mode operation of primary resonant flyback converters A primary resonant flyback converter may include a primary winding, a resonant capacitor in series with the primary winding, a secondary winding magnetically coupled to the primary winding, and an output electrically coupled to the secondary winding. A main switch may be operated to energize the primary winding when closed and transfer energy stored in the primary winding to the secondary winding when open. An auxiliary switch may be configured to switch complimentarily to the main switch, thereby allowing a resonant current to circulate through the primary winding and capacitor. Switch timing may be controlled to produce a desired output voltage. The switching frequency may be varied as a function of output load, input voltage and/or voltage ripple on a DC bus of the converter. Switching may also be temporarily disabled responsive to a decrease in output load and re-enabled responsive to an increase in output load.
US10170972B2	Halbach array and magnetic suspension damper using same A Halbach magnetic array is disclosed, including a plurality of first and second magnetic units alternately arranged in a width direction, wherein: each first magnetic unit includes first magnetic groups and first magnetic columns alternately arranged in a length direction, each first magnetic group includes four first magnetic bars arranged in a 22 matrix; each second magnetic unit includes second magnetic groups and second magnetic columns alternately arranged in the length direction, each second magnetic group includes four second magnetic bars arranged in a 22 matrix; each first magnetic column is magnetized in a height direction, and each second magnetic column is magnetized in a direction opposite to the height direction. A magnetic suspension vibration damper is also disclosed.
US10170970B2	Stepper motor A stepper motor includes: a rotor including a rotor core and a permanent magnet, the rotor core including a plurality of teeth; and a stator arranged around the rotor while being spaced apart from the rotor and including a plurality of magnetic pole teeth, the magnetic pole teeth including a plurality of teeth and projecting toward the rotor. A winding is wound around every other magnetic pole tooth. A phase of the teeth of the magnetic pole teeth with no winding therearound is shifted from a phase of the teeth of the other magnetic pole teeth.
US10170969B2	Power generation device A power generation device of the present invention includes: a first magnet member; a second magnet member having its N-pole reversely disposed to an N-pole of the first magnet member; a center yoke capable of horizontally shifting and disposed between the first magnet member and the second magnet member; a coil disposed at the outer circumference of the center yoke; and a drive member horizontally shifting while holding the first magnet member and the second magnet member. The drive member and the center yoke horizontally shift in a first direction. After the horizontal shift of the center yoke in the first direction stops, the drive member further horizontally shifts in the first direction, and the center yoke horizontally shifts in a second direction opposite to the first direction.
US10170968B2	Vibration motor A vibration motor is disclosed. The vibration motor includes a housing having a receiving space; a vibration unit accommodated in the receiving space, the vibration unit including a main weight, a main pole plate, and a main magnet carried by the main pole plate, the main weight comprising a first weight, and a second weight opposed to and apart from the first weight; and a plurality of elastic members suspending the vibration unit in the receiving space. The main magnet is sandwiched between the first and second weights, and two ends of the main pole plate are respectively connected to the first weight and the second weight.
US10170966B2	Vibration motor A vibration motor includes a housing forming an accommodation space, the housing including a first side wall extending along a vibration direction of the vibration motor and a second side wall connecting with the first side wall and extending along a direction vertical to vibration direction; a vibration system accommodated in the accommodation space, the vibration system having an end surface arranged opposite to the second side wall; an elastic part suspending the vibration system in the accommodation space elastically, the elastic part including a fixation portion connected with the end surface of the vibration system, and an elastic portion extending from two ends of the fixation portion for providing restoring force to the vibration system. The elastic portion includes a hindering portion for baffling the vibration system from vibration in the vibration direction.
US10170962B2	Laminated iron core and manufacturing method of laminated iron core A laminated iron core includes laminated iron core pieces, in which coupling parts are formed so as to communicate in a lamination direction of the laminated iron core pieces, and the coupling parts are filled with resins. The laminated iron core satisfies the following formula: (T×S)/η>{(4×E×δ×w×t3)/L3}×n, where T is a strength (N/mm2) of the resin; S is a cross-sectional area (mm2) of the coupling part or the resin; E is a Young's modulus (N/mm2) of the strip material; δ is a distortion amount (mm) of the iron core piece; w is a width (mm) of the iron core piece in a radial direction; t is a plate thickness (mm) of the iron core piece; n is the number of laminated iron core pieces; L is a distance (mm) between the coupling parts adjacent in the circumferential direction; and η is a safety factor.
US10170961B2	Blower motor of HVAC system for vehicle A blower motor of a heating, ventilating and air conditioning (HVAC) system for a vehicle includes: a base including an introduction path to introduce air into the base and a substrate having a plurality of elements attached to the substrate, and a heat sink formed to have a plate shape in surface contact with one surface of the substrate and having a contact surface contacting the air introduced through the introduction path and configured to guide the introduced air to heat generation parts formed on the contact surface.
US10170957B2	Controlling device integrated rotating electric machine A controlling device integrated rotating electric machine including a rotating electric machine's main body having a rotor winding and a stator winding, a power converter circuit connected to the rotor winding and the stator winding and having a control board and a power module and a smoothing condenser, a heat sink having a container portion swelling out towards a front side and attached to a rear side of the rotating electric machine's main body, a case, containing the control board and the power module, formed of a power supply wiring and a grounding wiring connected to a battery placed outside, and fixed to a rear side of the heat sink, and a sealing resin body sealing the control board and the power module contained in the case, wherein the smoothing condenser is joined with the power supply wiring and the grounding wiring, and is contained in the container portion.
US10170952B2	Rotary electric machine and manufacturing method for coil of rotary electric machine Coils that constitute an armature winding are produced by winding a conductor wire that has a rectangular cross section, the coils each include: four rectilinear portions that are inserted into a pair of slots; and three coil end portions that link the four rectilinear portions consecutively by each connecting together end portions of two selected rectilinear portions, the coils being mounted into the armature core so as to be arranged at a pitch of one slot in a circumferential direction, the coil end portions include: a bulging portion that protrudes axially outward in a convex shape; and oblique portions that link the two connected rectilinear portions and the bulging portion, the bulging portion has a crank portion that displaces radial positions of the two connected rectilinear portions by a set amount, and a cross-sectional area of the bulging portion is smaller than a cross-sectional area of the oblique portions.
US10170951B2	Electrical machine The present invention relates to an electrical machine having a stator. The stator comprises a plurality of slots for receiving a stator winding. One respective conductor section of the stator winding is inserted into each slot. The conductor sections of at least one pair of poles are short-circuited to one another on a first side of the stator. The conductor sections on a second side of the stator, opposite from the first side, are each connected to a terminal of a power supply unit. The power supply unit consists of two annular electrical conductors, between which at least one power-electronics component is arranged.
US10170947B2	Laminated core A laminated core 10 including a plurality of laminated iron core pieces, each of the iron core pieces being connected in a laminating direction by filling resin in a plurality of resin holes penetrating the laminated core 10 in the laminating direction, and a method for manufacturing the laminated core 10, by making a junction area of an iron core piece (A) 13 and resin larger than a junction area of an iron core piece (U) 14 and resin, the iron core piece (A) 13 being provided on an end in an axial direction, the iron core pieces (U) 14 being arranged at positions other than the end in the axial direction, or by providing locking portions at tip portions of resin, acquired joint strength of the iron core piece (A) 13.
US10170946B2	Motor having non-circular stator An apparatus includes a motor having a rotor; and a stator, where the rotor is located at least partially in a rotor receiving area of the stator, where the stator includes at least one coil winding and teeth, where the at least one coil winding is located on at least some of the teeth, where the teeth include a first set of the teeth and a second set of the teeth, where the teeth of the first set of teeth are longer in a radial direction from the rotor receiving area than the teeth of the second set of teeth.
US10170945B2	Yagi antenna shaped wireless power transmission apparatus The present invention relates to a Yagi antenna and a wireless power transmission apparatus comprising the same, and the Yagi antenna includes a wireless power transmitting coil and first and second slabs made of a metamaterial having a CHDR structure in which cube-shaped resonators are arranged at a predetermined interval. The first slab is positioned at a rear side of the power transmitting coil and serves as a reflector that reflects an electromagnetic wave generated at the power transmitting coil, and the second slab is positioned between the power transmitting coil and a power receiving coil and serves as a super lens that focuses the electromagnetic wave generated at the power transmitting coil. The wireless power transmission apparatus improves efficiency of wireless power transmitted to the power receiving coil by using the Yagi antenna.
US10170942B2	Power receiving device and wireless power transmission system A power receiving device includes a power receiving antenna that receives AC power from a power transmitting antenna, a rectifier circuit that converts the AC power into DC power, a detection circuit that detects the DC power, a load driven by the DC power, a battery that charges the DC power, a switching circuit that provides i) connection and disconnection between the rectifier circuit and the load and ii) connection and disconnection between the load and the battery, and a control circuit that controls the power receiving device. The control circuit controls the switching circuit to disconnect the rectifier circuit from the load and connect the load to the battery if the DC power is less than or equal to a power threshold value, and drive the load by the DC power charged in the battery.
US10170941B2	Non-contact type power transfer apparatus A non-contact type power transfer apparatus includes a power converter configured to convert input power into transmission power; a power transmitter configured to transmit the transmission power in a non-contact manner; and a controller configured to provide a power conversion control signal to control a power conversion operation of the power converter according to a state of the transmission power, and to output an input power control signal to control a power level of the input power according to the power conversion control signal.
US10170939B2	Foreign object detector, power transmitting device and power receiving device for wireless power transmission, and wireless power transmission system A foreign object detector detects a metallic foreign object between a first resonator and a second resonator which is composed of a parallel resonant circuit including a coil and a capacitor. The foreign object detector includes the first resonator; an oscillator circuit capable of oscillating at a first frequency (f1) which is lower than a resonant frequency (fr) of the second resonator and at a second frequency (f2) which is higher than the resonant frequency (fr); and a measurement circuit to measure changes in input impedance of the first resonator. The measurement circuit detects a metallic foreign object between the first resonator and the second resonator based on: changes in input impedance of the first resonator as measured by the measurement circuit while the oscillator circuit is oscillating at the first frequency f1; and changes in input impedance of the first resonator as measured by the measurement circuit while the oscillator circuit is oscillating at the second frequency f2.
US10170933B2	Non-contact type power supplying apparatus and non-contact type power supplying method A non-contact type power supplying apparatus may be capable of detecting another power receiving apparatus even during the charging. The non-contact type power supplying apparatus may include: a first output unit outputting a detection signal detecting a power receiving apparatus; and a second output unit outputting a wake-up signal waking-up a communications circuit of the detected power receiving apparatus when the power receiving apparatus is detected, thereby making it possible to supply power to the detected power receiving apparatus using a non-contact type method.
US10170930B2	Electrical power restoration system for a circuit assembly and method An electrical power restoration system for a circuit assembly having a circuit breaker, an electrical load and a circuit conditioner (e.g., a UPS) includes a circuit controller that is positioned along the circuit assembly between the circuit breaker and the electrical load. The circuit controller is electrically connected to the circuit conditioner, and controls activation and/or deactivation of the circuit conditioner. The circuit conditioner is positioned along the circuit assembly between the circuit controller and the electrical load and provides alternative AC power to the electrical load as determined by the circuit controller. The electrical power restoration assembly includes a first hot conductor and a second hot conductor. The first hot conductor conducts AC power from the circuit breaker to the circuit controller. The second hot conductor conducts AC power or alternative AC power from the circuit controller to the electrical load as determined by the circuit controller.
US10170928B2	Power transfer system, power supply system and charging combination A charging combination includes a power output device which is configured to output electric energy constantly or adjustably and a power input device which is configured to receive electric energy from the power output device. The power output device includes a power supply module for storing electric energy or obtaining electric energy from an external power grid as an energy source, a first USB connector for being connected with the power supply module and at least configured to transfer electric energy, and a first control module having a first controller which is at least configured to control an output voltage of the first USB connector when supplying electric energy. The power input device comprises a second USB connector at least configured to be electrically coupled to the first USB connector for transferring electric energy, and a second control module comprising a second controller at least configured to communicate with the first controller and to control the second USB connector. The first USB connector provides an output voltage which is greater than or equal to 5V.
US10170923B2	Adaptive buck converter with monitor circuit and charging cable using the same An adaptive buck converter of a charging cable includes: a power receiving interface for receiving a DC voltage and a cable current from a cable; a terminal communication interface for transmitting a charging voltage and a charging current to a connection terminal of the charging cable and for receiving a communication signal generated by a mobile device from the connection terminal; a power converting circuit for receiving the DC voltage and the cable current from the power receiving interface and for generating the charging voltage and the charging current; a monitor circuit arranged to operably detect the DC voltage or the cable current; and a data processing circuit configured for controlling the power converting circuit according to the communication signal. The data processing circuit further communicates with the mobile device through the terminal communication interface and the connection terminal in response to a detection result of the monitor circuit.
US10170920B2	System and method for energy management within a group of devices Each charging member in a group identifies a docking connection. Each charging member, responsive to identifying the docking connection, transmits information to other charging members in the group and receives information transmitted from another charging member in the group. Each charging member generates a list using the information transmitted to the group and received from the group. Each charging member also includes a ranking component for filtering, sorting, and ranking entries in the list according to a predefined selection filter and/or ranking filter. Each entry in the list is associated with a charging member with a docking connection and in the group. Each charging member determines based on a predefined indication filter that an entry in the list that is associated with the charging member is ranked at a predefined position in the list and provides an indication.
US10170919B2	Battery protecting apparatus A battery protecting apparatus includes: a charging/discharging control chip including a charging control FET and a discharging control FET connected to a secondary battery; a protecting chip configured to control, based on a voltage between both ends of the secondary battery, the FETs to prevent overcharging, over discharging, and an overcurrent; and a lead frame having a connection surface for a plurality of external terminals and another surface in conduction with the connection surface. Said another surface is electrically connected, via a conductive material, to terminals of the FETs formed on a front surface of the charging/discharging control chip. A back surface of the protecting chip faces a back surface of the charging/discharging control chip via an insulative member. Terminals of the protecting chip are electrically connected to said another surface through bonding wires. The charging/discharging control chip and the protecting chip are covered by a resin.
US10170916B2	Energy storage device, power management device, mobile terminal and method for operating the same An energy storage device including at least one battery pack; a communication module configured to transmit power-on information or energy storage amount information to a power management device and to receive a charge command or discharge command from the power management device; a connector configured to receive alternating current (AC) power, supplied to an internal power network through a photovoltaic module, from the internal power network based on the charge command or to output AC power to the internal power network based on the discharge command; and a power converter configured to, when the charge command is received from the power management device, convert the AC power from the internal power network into direct current (DC) power based on the charge command, or, when the discharge command is received from the power management device, convert DC power stored in the at least one battery pack into AC power based on the discharge command.
US10170913B2	Static synchronous compensator device and related method of phase balancing a three-phase power system A static synchronous compensator device connected between a source and a load of a three-phase power system, comprising: a main feedback line configured to provide a main feedback signal from lines between the source and the load; a mixer configured to mix the main feedback signal with a balance function to generate a balanced signal; a signal controller configured to convert the balanced signal to a controlled signal; a gain circuit configured to multiply the controlled signal by −1 and to perform proportional gain and integral gain (P & I) processing on the controlled signal to generate an intermediate correction signal; and a pulse width modulator configured to apply a pulse width modulation pattern to modulate the voltage source inverter to generate an AC waveform that is applied to the lines between the source and the load.
US10170903B2	High voltage DC circuit breaker A high-voltage DC circuit breaker for breaking a current that flows in a DC line, including: a main switch, installed on the DC line, for breaking a current of the DC line by opening when a fault occurs on one side or a remaining side of the DC line; a nonlinear resistor connected in parallel with the main switch; an LC circuit that is connected in parallel with the main switch and includes a capacitor and a reactor, which are connected in series in order to generate LC resonance; a first bidirectional switching element, connected to the LC circuit in series, for switching a bidirectional current flow; and a second bidirectional switching element, connected in parallel with the LC circuit, for switching a current flow to induce LC resonance in both directions.
US10170900B2	Electrical connection box An electrical connection box includes a bus bar, a case to which the bus bar is fixed, a terminal that is connected to the bus bar, a fixing member that fixes a connection portion at which the terminal and the bus bar are connected to each other, and a base member that holds the fixing member. The fixing member and the base member are disposed at a position at which the fixing member and the base member overlap the connection portion of the bus bar, and when the connection portion at which the terminal and the bus bar are connected to each other is fixed, the base member moves in a direction in which the base member comes into contact with the bus bar.
US10170897B2	Wire harness equipped with protector A protector-equipped wire harness includes: an electrical wire; a protector that includes a pair of side walls that protrude from a bottom, a slide supporting portion that is formed so as to extend in a first direction X, and a receiver that is provided on a bottom side of the slide supporting portion, and in which the electrical wire can be disposed in a groove that is defined by the bottom and the pair of side walls; and an attachment member that includes a band that can be wound around the electrical wire, and a band lock portion that includes a slidable portion that is supported by the slide supporting portion so as to be slidable in the first direction, the band lock portion keeping the band in a state of being wound around the electrical wire.
US10170894B2	Multipoint ignition device and multipoint ignition engine A multipoint ignition device for igniting an air-fuel mixture in a combustion chamber of an engine includes: an insulating member formed in an annular shape such that an inner periphery thereof faces the combustion chamber; and a plurality of electrodes held on the insulating member so as to form a plurality of ignition gaps in a circumferential direction inside the combustion chamber, wherein the insulating member includes a plurality of divided insulating members formed in divided form, and the divided insulating member close to an intake valve of the engine has a higher thermal conductivity than the divided insulating member close to an exhaust valve of the engine.
US10170893B1	Vacuum fixture An example method includes stacking a plurality of laser diode bars proximate an alignment plate. Each respective laser diode bar has a front edge through which the respective laser diode bar emits light. The alignment plate has a first side that provides a common plane for aligning the front edges of the laser diode bars and a second side opposite the first side. The alignment plate has a plurality of microholes extending between the first and second sides. The method also includes applying suction to the plurality of laser diode bars through the plurality of microholes. The suction draws the front edges of the laser diode bars against the first side of the alignment plate such that the front edges of the laser diode bars are aligned in the common plane. Conductive plates used to clamp the plurality of laser diodes therebetween may be aligned in a similar fashion.
US10170890B2	Method of fabricating semiconductor optical device and surface-emitting semiconductor laser A surface-emitting semiconductor laser has a semiconductor structure that includes a first side, a second side opposite to the first side, and a side surface that extends from the second side to the first side; a first electrode provided on the first side of the semiconductor structure; and a second electrode provided on the first side of the semiconductor structure. The semiconductor structure also includes a substrate, a first stacked semiconductor layer disposed on the substrate, an active layer disposed on the first stacked semiconductor layer, and a second stacked semiconductor layer disposed on the active layer. The first stacked semiconductor layer includes a first distributed Bragg reflector, and the second stacked semiconductor layer includes a second distributed Bragg reflector. The semiconductor structure side surface has at least an upper surface that is free of chipping.
US10170888B2	Dual-use laser source comprising a cascaded array of hybrid distributed feedback lasers The disclosed embodiments provide a laser source comprising a silicon waveguide formed in a silicon layer, and a cascaded array of hybrid distributed feedback (DFB) lasers formed by locating sections of III-V gain material over the silicon waveguide. Each DFB laser in the cascaded array comprises a section of III-V gain material located over the silicon waveguide, wherein the section of III-V gain material includes an active region that generates light, and a Bragg grating located between the III-V gain material and the silicon waveguide. This Bragg grating has a resonance frequency within a gain bandwidth of the section of III-V material and is transparent to frequencies that differ from the resonance frequency. Moreover, each DFB laser has a hybrid mode that resides partially in the III-V gain material and partially in silicon.
US10170887B2	Surface emitting laser element and atomic oscillator A surface emitting laser element includes a lower Bragg reflection mirror; an upper Bragg reflection mirror; and a resonator region formed between the lower Bragg reflection mirror and the upper Bragg reflection mirror, and including an active layer. A wavelength adjustment region is formed in the lower Bragg reflection mirror or the upper Bragg reflection mirror, and includes a second phase adjustment layer, a wavelength adjustment layer and a first phase adjustment layer, arranged in this order from a side where the resonator region is formed. An optical thickness of the wavelength adjustment region is approximately (2N+1)×λ/4, and the wavelength adjustment layer is formed at a position where an optical distance from an end of the wavelength adjustment region on the side of the resonator region is approximately M×λ/2, where λ is a wavelength of emitted light, M and N are positive integers, and M is N or less.
US10170884B2	Single pulse laser apparatus Disclosed herein is a single pulse laser apparatus which includes a first mirror and a second mirror disposed at both ends of the single pulse laser apparatus and having reflectivities of a predetermined level or more; a gain medium rotated at a predetermined angle and configured to oscillate a laser beam in a manual mode-locking state; a linear polarizer configured to output a beam having a specific polarized component of the oscillated laser beam; an etalon configured to adjust a pulse width of the oscillated laser beam; and an electro-optic modulator configured to perform Q-switching and single pulse switching.
US10170882B2	Direct-attach connector A contact ribbon configured to connect a cable to a substrate includes a plurality of signal contacts, a ground plane, and at least one ground contact extending from the ground plane. The plurality of signal contacts are connected by a support member, and the support member is removable after the plurality of signal contacts are connected to the cable.
US10170879B2	Power distribution unit having a releasable lock A power distribution unit (PDU) having a connector to connect to an input power supply and a plurality of power outlet sockets for receiving plugs having a number of pins. Each power outlet socket has a mechanical locking mechanism movable between a locked position and an unlocked position when a plug is inserted into the power outlet socket to lock and unlock a plug pin in the power outlet socket. Absent actuation the locked position is adopted. Each power outlet socket includes an externally, manually actuatable, first release element, and an internally, electrically actuatable, second release element. A power sensor detects whether or not power is being drawn and, for power outlet sockets which currently host a plug and are not drawing power, the second release element is actuated by the PDU so as to unlock the mechanical locking mechanism, thereby freeing up the associated plugs for removal.
US10170878B1	Junction box with an integrated connection circuit Improvements to an electrical junction box is disclosed. The junction box is configured with integrated connections in the back of the junction box. Switches and outlets have tabs in specific locations that align with the desired integrated connections to provide the desired function. All of the outlets and switches align parallel with the back and front of the junction box. The junction box is configurable to accept a single switch, dimmer switch, 3-way or outlet to many more than one function. In addition, the function of a junction box can be easily changed as long as the wiring has been connected to the new junction box. Installation and changes can be made in seconds instead of minutes. The depth of the internal distribution receptacle is adjustable within the adjustable electrical box to accommodate the thickness of the outlet or switch.
US10170877B2	Connecting device, assembly thereof and assembly method therefor A connecting device including a substantially elongated inserting member extending in a longitudinal direction and comprising a transverse direction transverse thereto, said inserting member comprising an outer surface with at least two electrically conductive parts with insulating material arranged there between; and wherein the inserting member is configured to mechanically and electrically connect the at least two electrically conductive parts with wire ends of a connection cable within the space enclosed by the outer surface. The invention is further related to an assembly of a connection cable and a connecting device, as well as a method for connecting a connecting device to a connection cable.
US10170875B2	Cable connector grouping apparatus The embodiments relate to an apparatus allowing for the insertion and removal of multiple like and/or unlike connectors simultaneously without requiring permanent connector modification. The apparatus includes at least a first housing and a second housing. The first housing receives a first connector and the second housing receives a second connector. The first housing has a first variable aperture and the second housing has a second variable aperture. The first aperture is adjusted by a first retainer to hold the first connector in the first housing. The second aperture is adjusted by a second retainer to hold the second connector in the second housing. The first housing has a first exterior wall sized to receive and secure a second exterior wall of the second housing to form an assembly of the connectors.
US10170872B1	Electrical device An electrical receptacle including a body having a first cavity and a second cavity, a plurality of first electrical connections in the first cavity and a plurality of second electrical connections in the second cavity, at least one electrical plug sensing device in the first cavity, and wherein electrical continuity to the plurality of first electrical connections from the plurality of second electrical connections only occurs when the at least one electrical plug sensing device senses a presence of an electrical plug in the first cavity.
US10170870B2	Flippable electrical connector A receptacle connector includes an insulating housing including a base and a mating tongue extending from the base and the mating tongue defining a thicken step portion at a root near to the base, two rows of contacts with contacting section exposing to opposite surfaces of the mating tongue in front of the step portion and tail sections extending out of the base, and a pair of separate metallic collars respectively disposed upon the opposite surface of the step portion. Two opposite ends of each metallic collar are embedded in the step portion of the insulating housing via an inserting mold process.
US10170869B2	Very high speed, high density electrical interconnection system with impedance control in mating region A modular electrical connector with separately shielded signal conductor pairs. In some embodiments, the connector is assembled from modules, each containing a pair of signal conductors with surrounding partially or fully conductive material. In some embodiments, the modules have projecting portions, of conductive and/or dielectric material, that are shaped and positioned to reduce changes in impedance along the signal paths as a function of separation of conductive elements, when the connectors are separated by less than the functional mating range.
US10170868B1	Connector A connector includes: a housing, which includes a hole portion extending forward from an insertion slot into which an object is to be inserted; a plurality of terminals, which are arranged in the hole portion; a conductive shell, which is configured to at least partially cover the housing; a grounding spring pieces, which are electrically connected to the conductive shell, and is formed at a position apart from a terminal group toward a right side or a left side so that the grounding spring pieces are brought into contact with a grounding pad of the object; and a partition wall, which extends between the terminal group and the grounding spring pieces along a front-and-rear direction, and is configured to partition the terminal group and the grounding spring pieces.
US10170866B2	Shielded electric connector An electrical connector system having rubber molded single pin high power conductors, for both the male and female electrical connectors positioned on the ends of high power electric connection cables. Configuration of both the male and female connectors enhances shielding at the connection point of conductors at distal ends of the electric when mating in an electric connection. The shielded connections limit electronic noise from RF or EMF which may be transmitted to equipment proximate to a shielded connection.
US10170856B2	Optical transceiver An optical transceiver includes a case, a support, a driving member, a fastening member and a restoring member. The support is disposed on outer surface of the case. The driving member is on the support. The driving member is movable in press direction. The fastening member includes a pivot shaft, a fastening portion and a pressed portion. The pivot shaft is between the fastening portion and the pressed portion. The pivot shaft is pivoted to the support. The pressed portion has a pressed point, and the press direction is not parallel to a virtual line passing through the pressed point and the pivot shaft. When the driving member is moved to press the pressed point, the fastening member is pivoted to in fastened position or released position. The restoring member and the pressed portion are located on the side of the pivot shaft away from the second fastening portion.
US10170850B2	Adjusting an opening of a card edge connector using a set of electroactive polymers An apparatus can dynamically adjust, in a card edge connector including first and second positions, an opening configured to receive a printed-circuit card. The apparatus may also include a set of contacts configured to connect with a set of edges of the printed-circuit card in the second position. The apparatus may also include a set of electroactive polymers configured to adjust the set of contacts between the first position and the second position by changing thickness in response to voltages applied to electrodes positioned adjacent to opposing faces of the set of electroactive polymers. The set of electroactive polymers can also include an electroactive polymer configured to control a single contact of the set of contacts.
US10170847B2	Coaxial connector grounding inserts A coaxial cable connector with a grounding insert that is between a fastener and and a post to provide electrical continuity therebetween.
US10170844B2	Method for dish reflector illumination via sub-reflector assembly with dielectric radiator portion A method for illuminating a dish reflector of a reflector antenna, including providing a waveguide coupled to a vertex of a dish reflector at a proximal end, a sub-reflector supported by a dielectric block coupled to a distal end of the waveguide, the dielectric block provided with a dielectric radiator portion proximate the distal end of the waveguide. An RF signal passing through the waveguide and the dielectric block to reflect from the sub-reflector through the dielectric block and at least partially through the dielectric radiator portion to the dish reflector illuminates the dish reflector with a maximum signal intensity and/or signal intensity angular range that is spaced outward from the vertex area of the dish reflector.
US10170842B2	Multiple-feed antenna system having multi-position subreflector assembly Methods and systems for a multiple-feed antenna are described. The multiple-feed antenna includes a primary reflector that directs signals along a primary RF signal path and a subreflector assembly that rotates between a first position and a second position. When the subreflector assembly is in a first position, a first subreflector element of the subreflector assembly redirects signals traveling along the primary RF signal path to a first RF signal path. When the subreflector assembly is in a second position, the second subreflector element redirects signals traveling along the primary RF signal path to a second RF signal path. The antenna system includes a first feed that intersects the first RF signal path, a second feed that intersects the second RF signal path, and an actuator that moves the subreflector assembly.
US10170839B2	Circularly polarized planar aperture antenna with high gain and wide bandwidth for millimeter-wave application An antenna (e.g., circularly polarized (CP) planar aperture antenna) is presented herein. An antenna can include an opening cavity and a patch section within a perimeter of the opening cavity. The patch section can have crossed patch in a windmill shape. The opening cavity can have a windmill shape. The patch section can be fed differentially via grounded co-planar waveguide (GCPW). The antenna can be formed in a single layer substrate and can be 180° rotationally symmetric about its center. A height of the opening cavity can be quarter-wavelength at operating frequency and a diameter of the opening cavity can be larger than one wavelength at operating frequency.
US10170837B2	Segmented antenna An antenna comprising a main arm comprising conductive material, wherein the main arm is connected to a signal feed, and a first coupling arm comprising conductive material, wherein the first coupling arm is electrically coupled to a ground, and wherein the first coupling arm is electrically coupled to the main arm across a first span of nonconductive material. Also disclosed is a mobile node (MN) comprising a signal feed, a ground, and an antenna comprising a main arm comprising conductive material, wherein the main arm is connected to the signal feed, and a first coupling arm comprising conductive material, wherein the first coupling arm is connected to the ground, and wherein the first coupling arm is electrically coupled to the main arm across a first span of nonconductive material.
US10170834B2	Phased array transmission methods and apparatus A phased array transmitter includes a plurality of vector modulators, an in-phase/quadrature (I/Q) signal generator, and a multiphase generator. The output phases of the plurality of vector modulators, and hence the direction of transmission of the phased array transmitter, are set and controlled by adjusting both the magnitude ratios of I/Q signal pairs generated by the I/Q signal generator and applied to I and Q inputs of the plurality of vector modulators and phases of a plurality of local oscillator (LO) signal phases generated by the multiphase generator and applied to LO inputs of the plurality of vector modulators. Setting and controlling the output phases of the vector modulators by varying both the magnitude ratios of the I/Q signal pairs and the phases of the LO signal phases allows the output phases of the plurality of vector modulators to be more precisely set and controlled than if the output phases were to be set and controlled only through the LO paths or only through the I/Q signal paths of the plurality of vector modulators.
US10170833B1	Electronically controlled polarization and beam steering A transmitter or receiver can include a phased array antenna system in which multiple characteristics of a transmitted or received beam can be controlled electronically. For example, in embodiments that include a transmitter, dual outputs of N signal modifiers can be connected to orthogonal inputs of N dual-orthogonally polarized antenna elements. Each signal modifier can modify the amplitude and phase of a communications signal in two parallel signal paths to produce two signal components each of which is an amplitude-modified/phase-shifted version of the communication signal. Multiple characteristics of the combined beam can be simultaneously controlled by setting the amplitude and/or phase-shift parameter values in the dual signal paths in the signal modifiers to combined values that individually affect each of the multiple characteristics of the combined beam.
US10170830B2	Display device, projector, and communication device A projector includes a wireless communication unit which wirelessly receives image data from a transmitting device, and a display unit which displays an image based on the image data received by the wireless communication unit. The wireless communication unit includes a first communication unit which has a first array antenna, and a second communication unit which has a second array antenna. The first communication unit transmits and receives wireless radio waves of a first frequency in a millimeter wave band via the first array antenna, and the second communication unit transmits and receives wireless radio waves of a second frequency in a millimeter wave band that is different from the first frequency via the second array antenna. A plane including the second array antenna is tilted at an angle of 10 degrees or more and 30 degrees or less to a plane including the first array antenna.
US10170829B2	Self-complementary multilayer array antenna An antenna array including a radiating structure formed from an array of radiating elements forming self-complementary patterns, the radiating surface separated from a ground plane by a dielectric layer, the antenna comprises an array of metallized vias passing through the dielectric layer between the radiating surface and the ground plane, each via being positioned facing a given point, referred to as the particular point, of a radiating element. The particular points may be located between two consecutive electrical supply points of a radiating element.
US10170827B2	Housing structure having conductive adhesive antenna and conductive adhesive antenna thereof The present invention discloses a housing structure having a conductive adhesive antenna and the conductive adhesive antenna thereof, wherein the housing structure having the conductive adhesive antenna comprises a housing and an electrically conductive adhesive. The housing has two units which can be integrated with each other to form a bonding portion. The electrically conductive adhesive is bonded on the bonding portion and has at least one electrical connection end for electrically connecting with a wireless module, thereby the electrically conductive adhesive is also formed as an antenna structure. With the implementation of the present invention, the conductive adhesive antenna can replace a prior antenna.
US10170819B2	RFID antenna structure A RFID antenna structure is disclosed. The RFID antenna structure includes: a metal back cover; a circuit board located below the metal back cover, the circuit board including a base plate and a ground plate overlaid on the base plate; a RFID chip mounted on the base plate; match circuits connected electrically with the RFID chip and located on the base plate; and an antenna coil connected electrically with the match circuits and located between the circuit board and the metal back cover. The metal back cover includes a top cover and a middle cover separated from the top cover by a slit, the antenna coil is located at least partly inside an area of the top cover, and the antenna coil is connected inductively with the top cover and/or the middle cover.
US10170817B2	Superconducting airbridge crossover using superconducting sacrificial material A technique relates to a superconducting airbridge on a structure. A first ground plane, resonator, and second ground plane are formed on a substrate. A first lift-off pattern is formed of a first lift-off resist and a first photoresist. The first photoresist is deposited on the first lift-off resist. A superconducting sacrificial layer is deposited while using the first lift-off pattern. The first lift-off pattern is removed. A cross-over lift-off pattern is formed of a second lift-off resist and a second photoresist. The second photoresist is deposited on the second lift-off resist. A cross-over superconducting material is deposited to be formed as the superconducting airbridge while using the cross-over lift-off pattern. The cross-over lift-off pattern is removed. The superconducting airbridge is formed to connect the first and second ground planes by removing the superconducting sacrificial layer underneath the cross-over superconducting material. The superconducting airbridge crosses over the resonator.
US10170813B2	Ion conducting hybrid membranes A method includes dispensing ion-conducting particles on a substrate comprising an adhesive to which the ion-conducting particles adhere; overcoating the ion conducting particles with a polymer; removing the substrate and the adhesive from the ion conducting particles; and removing a polymer overburden on the ion conducting particles to form a device that includes: (i) the polymer or a derivative thereof, and (ii) ion-conducting particles. At least a portion of the ion-conducting particles extend through the polymer or its derivative.
US10170810B2	Thermally conductive base member and method of assembling the thermally conductive base member A thermally conductive base member and a method of assembly are provided. The thermally conductive base member includes first and second metal base members, and a top plate. The first metal base member has a first bottom plate, first and second female coupling portions, and first and second rib portions. The second metal base member has a second bottom plate, a first male coupling portion, and first and second rib portions. The first male coupling portion is disposed in and coupled to the first female coupling portion. The top plate is coupled to a top surface of the first female coupling portion, a top surface of the second female coupling portion, and the first and second rib portions of the first metal base member such that a first flow channel is defined between the first and second rib portions of the first metal base member and the top plate.
US10170801B2	Secondary battery of novel structure A secondary battery pack includes a battery cell having an electrode assembly in a battery case with an electrolyte. An electrically insulative mounting member is mounted to a top of the battery cell. A protection circuit module (PCM) including a protection circuit board (PCB) is loaded on the electrically insulative mounting member. The PCB has a protection circuit, and a connection member (A) and a connection member (B) coupled to a bottom of the PCB. The connection member (A) and the connection member (B) are coupled to the electrode terminals of the battery cell. The PCB has a through hole, through which the connection member (B) is exposed, and an insulative cap coupled to an upper end of the battery cell to surround the electrically insulative mounting member where the connection members and the protection circuit board are loaded on the insulative cap.
US10170794B2	Electrolyte additive for lithium battery, electrolyte for lithium battery, and lithium battery including the electrolyte additive In an aspect, an electrolyte additive and an electrolyte for a lithium battery and a lithium battery including the electrolyte additive is provided. The electrolyte additive includes a sulfone compound wherein the sulfonyl group is directly bonded to a halide group and an electron withdrawing group.
US10170793B2	Electrolytic solution, secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus A secondary battery includes: a cathode; an anode; and an electrolytic solution including a cyano compound, the cyano compound including a compound represented by R1-O—C(═O)—O—R2 (R1, R2, or both include a cyano-group-containing group), a compound represented by R3-C(═O)—O—R4 (R4 includes the cyano-group-containing group), or both.
US10170790B2	Sodium ion solid-state conductors with sodium oxoferrate structure A solid-state conductor with sodium oxoferrate structure is disclosed. The conductor may be used in battery applications where it is preferable to avoid the use of a liquid electrolyte. The conductor may be produced from an initial NaFeO2 chemical composition. So as to add defects and allow for sodium ion mobility, Fe(IV), Si, Sn, Ti, Zr, V, P, or S can be added. For example, (1−x)(NaFeO2)+x(XO2) can be melted with the corresponding oxide XO2, where X is Fe(IV), Si, Sn, Ti, Zr, V, P, or S, and x is between 0.1 and 0.5. These dopants generally preserve the crystallographic structure while decreasing the ion mobility barrier.
US10170789B2	Method of producing a shape-conformable alkali metal battery having a conductive and deformable quasi-solid polymer electrode Provided is method of preparing an alkali metal cell, the method comprising: (a) combining a quantity of an active material, a quantity of an electrolyte, and a conductive additive to form a deformable and conductive electrode material, wherein the conductive additive, containing conductive filaments, forms a 3D network of electron-conducting pathways and the electrolyte contains an alkali salt and an ion-conducting polymer dissolved or dispersed in a solvent; (b) forming the electrode material into a quasi-solid polymer electrode, wherein the forming includes deforming the electrode material into an electrode shape without interrupting the 3D network of electron-conducting pathways such that the electrode maintains an electrical conductivity no less than 10−6 S/cm; (c) forming a second electrode; and (d) forming an alkali metal cell by combining the quasi-solid electrode and the second electrode. The second electrode may also be a quasi-solid polymer electrode.
US10170786B1	Modular planar interconnect device for a solid oxide fuel cell and the solid oxide fuel cell containing the same A modular planar interconnect device for a solid oxide fuel cell includes a planar interconnect body, a pair of upper shielding plates, and a pair of lower shielding plates. The planar interconnect body includes a right lateral surface and a left lateral surface. The right lateral surface includes a right lateral slot to fluidly communicate with an introducing slot of the planar interconnect body. The left lateral surface includes a left lateral slot to fluidly communicate with an exit slot of the planar interconnect body.
US10170784B2	Regenerative fuel cell system The reservoirs 2 and 2′ preliminarily contain liquid water, which is utilized as the water to be supplied to the polymer membrane. A vapor pressure of the water is set to a predetermined value in the reservoir by controlling the temperature of the reservoirs 2 and 2′ individually. Pressure gauges 6 and 6′ may be used for setting a vapor pressure of the water. The water which is gasified based on the set vapor pressure in the respective reservoir is supplied to the stack 10 along with oxygen from the reservoir 2, and with hydrogen from the reservoir 2′. This configuration makes it possible to adjust the amount of water contained in the polymer membrane and maintain the moisturization of the polymer membrane without external water supply.
US10170783B2	Manufacture of a fuel cell with liquid electrolyte migration prevention A stack (10) of fuel cells (11) is manufactured with barriers (32) to prevent migration of a liquid electrolyte (such as phosphoric acid) out of the cells (11). The barrier (32) is secured within a step (34) formed within a land region (28) of a separator plate assembly (18) and extends from an edge (30) of the separator plate assembly (18) all or a portion of a distance between the edge (30) and a flow channel (24) defined within the separator plate assembly (18). The barrier (32) also extends away from the edge (30) a distance of between 0.051 and about 2.0 millimeters (about 2 and about 80 mils. The barrier (32) includes a hydrophobic, polymeric film (36), a pressure sensitive adhesive (38) as an assembly aid, and a fluoroelastomer bonding agent (40).
US10170779B2	Humidifier for fuel cell A humidifier for a fuel cell includes a membrane module which accommodates therein a humidifying membrane, a first cap unit coupled to one side of the membrane module and supplies supply air to the membrane module, a second cap unit coupled to another side of the membrane module and discharges humidified air introduced from the membrane module, and a bypass tube provided in the second cap unit and bypasses condensate water introduced into the second cap unit to the membrane module.
US10170778B2	Thermal management system of fuel cell vehicle A thermal management system of a fuel cell vehicle includes a cold start loop which heats a coolant that flows through a fuel cell during a cold start of the fuel cell, and a cooling loop which moves a coolant that cools the fuel cell.
US10170777B2	Cooling water direct injection type fuel cell A cooling water direct injection type fuel cell is provided. The fuel cell includes an air-side separator that has an air channel through which air flows, and a cooling water inlet aperture that is formed on an introduction portion of the air channel. A hydrogen-side separator is joined with the air-side separator and has a protrusion that is inserted into the cooling water inlet aperture. The protrusion has a diameter less than a diameter of the cooling water inlet aperture to form a gap between an outer circumferential surface of the protrusion and an inner circumferential surface of the cooling water inlet aperture. Cooling water drawn into space between the junction surfaces of the air-side separator and the hydrogen-side separator is discharged through the gap between the protrusion and the cooling water inlet aperture, is mixed with introduced air, and then is drawn into the air channel.
US10170775B2	Method for producing a solder glass green seal A method for producing a glass solder green seal, wherein a paste comprising a glass solder powder is applied to the surface of a screen, which on the bottom side and in the screen mesh comprises regions having a coating impermeable to the paste, and the paste is pushed through the screen onto a substrate and subsequently dried, wherein printing is carried out onto an intermediate carrier serving as the substrate, from which the dried glass solder green seal can be completely detached.
US10170760B2	Lithium ion secondary battery The present invention relates to a secondary battery, specifically, a secondary battery having excellent stability and improved output characteristic and low temperature characteristic by including a cathode active material in which at least one of metals forming the cathode active material has a concentration gradient in an entire region from a central portion up to a surface portion; and a conductive material mixture in which carbon nanotube is mixed with carbon black at an appropriate ratio, the carbon black being a spherical nanoparticle.
US10170755B2	Lithium sulfur cell and preparation method An electrochemical cell in one embodiment includes a first negative electrode including a form of lithium, a positive electrode, and a first separator positioned between the first negative electrode and the positive electrode, wherein the positive electrode includes a plurality of coated small grains of Li2S.
US10170753B2	Nano-silicon composite negative electrode material used for lithium ion battery, process for preparing the same and lithium ion battery The present invention relates to a nano-silicon composite negative electrode material, including graphite matrix and nano-silicon material homogeneously deposited inside the graphite matrix, wherein the nano-silicon composite negative electrode material is prepared by using silicon source to chemical-vapor deposit nano-silicon particles inside hollowed graphite. The nano-silicon composite negative electrode material of the present invention has features of high specific capacity (higher than 1000 mAh/g), high initial charge-discharge efficiency (higher than 93%) and high conductivity. The preparation process of the present invention is easy to operate and control, and has low production cost and is suitable for industrial production.
US10170751B2	Composite active material for lithium secondary batteries and method for producing same The purpose of the present invention is to provide: a composite active material for lithium secondary batteries, which is capable of providing a lithium secondary battery that has large charge and discharge capacity, high-rate charge and discharge characteristics and good cycle characteristics at the same time; and a method for producing the composite active material for lithium secondary batteries. A method of producing a composite active material for lithium secondary batteries of the present invention comprises: a mixing step wherein graphite having a specific surface area of 30 m2/g or more and a battery active material that is capable of combining with lithium ions are mixed with each other, thereby obtaining a mixture; and a spheroidizing step wherein the mixture is subjected to a spheroidization treatment, thereby producing a generally spherical composite active material for lithium secondary batteries, said composite active material containing graphite and the battery active material that is capable of combining with lithium ions.
US10170746B2	Battery electrode, battery, and method for manufacturing a battery electrode A battery electrode in accordance with various embodiments may include: a substrate including a surface configured to face an ion-carrying electrolyte; and a first diffusivity changing region at a first portion of the surface, wherein the first diffusivity changing region is configured to change diffusion of ions carried by the electrolyte into the substrate, and wherein a second portion of the surface is free from the first diffusivity changing region.
US10170743B2	Separator and nonaqueous electrolyte battery, and battery pack, electronic apparatus, electric vehicle, electric power storage device, and electric power system A separator has: a substrate including a porous film; and a surface layer which is provided on at least one surface of the substrate, which includes a vinylidene fluoride-tetrafluoroethylene-hexafluoropropylene copolymer, and which has a plurality of minute pores.
US10170742B2	Battery pack having electric insulating pack case Disclosed herein is a battery pack including an electrically insulative pack case. The battery pack includes a plate-shaped battery cell having an anode terminal and a cathode terminal formed at one side thereof including a sealed surplus portion, the battery cell being formed to have a planar quadrangular structure, a protection circuit module (PCM) electrically connected to the electrode terminals of the battery cell to control operation of the battery pack, the PCM being loaded on the sealed surplus portion of the battery cell, and a pack case applied to the sealed surplus portion of the battery cell, the PCM, and opposite sides of the battery cell in a thermally molten state and solidified, the pack case being configured to have a structure to cover the sealed surplus portion of the battery cell, the PCM, and the opposite sides of the battery cell in a state in which the top and bottom of the battery cell are open.
US10170741B2	Expandable battery module A battery module comprising sub-module components, or bricks, that facilitate efficient assembly utilizing common hand tools and provide integrated cooling features for increased battery configurability and performance.
US10170740B2	Battery and battery pack with a bolt as an electrode terminal A battery includes: an insulating plate; a connecting terminal plate; a terminal bolt that passes through the connecting terminal plate, the bolt head being between the insulating plate and the connecting terminal plate, and having a regular N-sided polygon shape, the N being an even number; and a nut. The insulating plate includes a first rotation stopping wall near an end of the insulating plate; the first rotation stopping wall includes a first a first abutting location that abuts the bolt head being rotated in a tightening direction of the nut, and a second abutting location that abuts the bolt head being rotated in a loosening direction of the nut; and a distance from the first abutting location to the first end is greater than a distance from the second abutting location to the first end.
US10170738B2	Battery pack for mobile devices A battery pack is provided for a mobile communication device, comprising a casing defining a cavity that conforms, at least partially, to the outer shape of the mobile communication device and one or more rechargeable power cells housed within the thickness of the casing. An internal interface engages a corresponding interface on the mobile communication device to provide power from the one or more rechargeable cells to the mobile communication device. An external interface is electrically coupled to the internal interface in order to transmit signals from the mobile communication device to an external device and may further serve to recharge the one or more rechargeable power cells. The battery pack may also serve as an extendible platform by providing additional integrated communication interfaces and/or processors that can be utilized by the mobile communication device to extend its communication and/or processing capabilities.
US10170735B2	Battery pack A battery pack includes a plurality of batteries arranged in columns and rows, a first holder configured to accommodate upper parts of the batteries, a lateral surface of the first holder including first pins, and a second holder configured to accommodate lower parts of the batteries, a lateral surface of the second holder including consecutively arranged concave surfaces and convex surfaces, and the first pins of the first holder protruding toward the second holder and being combinable with the concave surfaces of the lateral surface of the second holder.
US10170728B2	Display device A display device includes a substrate, an encapsulation portion on the substrate, a seal portion between the substrate and the encapsulation portion, and at least one dummy seal portion around the seal portion. The substrate and the encapsulation portion at least partially overlap each other in a first direction perpendicular to a surface of the substrate. The dummy seal portion is, when viewed in the first direction, arranged in an area between an edge of the seal portion and a boundary line of an overlapping area of the substrate and the encapsulation portion.
US10170726B2	Display device and manufacturing method thereof A display device in which reliability of a display element is improved is provided. Alternatively, a display device in which reliability of a transistor is improved is provided. Alternatively, a display device in which an increase in an area of a periphery region is suppressed is provided. A display device includes a display region including a display element between a first flexible substrate and a second flexible substrate in which the display region is surrounded by a first continuous sealant, the first sealant is surrounded by a second continuous sealant, and the second sealant is provided between the first substrate and the second substrate and on at least one of a side surface of the first substrate and a side surface of the second substrate.
US10170724B2	Light emitting apparatus and method of fabricating the same Although an ink jet method known as a method of selectively forming a film of a high molecular species organic compound, can coat to divide an organic compound for emitting three kinds (R, G, B) of light in one step, film forming accuracy is poor, it is difficult to control the method and therefore, uniformity is not achieved and the constitution is liable to disperse. In contrast thereto, according to the invention, a film comprising a high molecular species material is formed over an entire face of a lower electrode connected to a thin film transistor by a coating method and thereafter, the film comprising the high molecular species material is etched by etching by plasma to thereby enable to selectively form a high molecular species material layer. Further, the organic compound layer is constituted by a material for carrying out luminescence of white color or luminescence of single color and combined with a color changing layer or a coloring layer to thereby realize full color formation.
US10170703B2	Condensed cyclic compound and organic light-emitting device including the same A condensed cyclic compound and an organic light-emitting device including the same, the condensed cyclic compound being represented by the following Formula 1:
US10170696B1	MnN and Heusler layers in magnetic tunnel junctions Materials are disclosed that are used as seed layers in the formation of MRAM elements. In particular, a MnN layer oriented in the (001) direction is grown over a substrate. A magnetic layer overlying and in contact with the MnN layer forms part of a magnetic tunnel junction, in which the magnetic layer includes a Heusler compound that includes Mn. The magnetic tunnel junction includes the magnetic layer, a tunnel barrier overlying the magnetic layer, and a first (magnetic) electrode overlying the tunnel barrier. A second electrode is in contact with the MnN layer.
US10170693B2	Magnetoresistive device and method of forming the same According to embodiments of the present invention, a magnetoresistive device is provided. The magnetoresistive device includes a free magnetic layer structure having a variable magnetization orientation, a fixed magnetic layer structure having a fixed magnetization orientation, and a tilting magnetic layer structure configured to provide an interlayer exchange biasing field to tilt, at equilibrium, the fixed magnetization orientation or the variable magnetization orientation relative to the other to be along a tilting axis that is at least substantially non-parallel to at least one of a first easy axis of the fixed magnetization orientation or a second easy axis of the variable magnetization orientation. According to further embodiments of the present invention, a method of forming a magnetoresistive device is also provided.
US10170687B2	Spin torque majority gate device The disclosed technology relates generally to magnetic devices, and more particularly to spin torque majority gate devices such as spin torque magnetic devices (STMG), and to methods of fabricating the same. In one aspect, a majority gate device includes a plurality of input zones and an output zone. A magnetic tunneling junction (MTJ) is formed in each of the input zones and the output zone, where the MTJ includes a non-magnetic layer interposed between a free layer stack and a hard layer. The free layer stack in turn includes a bulk perpendicular magnetic anisotropy (PMA) layer on a seed layer, a magnetic layer formed on and in contact with the bulk PMA layer, and a non-magnetic layer formed on the magnetic layer. Each of the bulk PMA layer and the seed layer is configured as a common layer for each of the input zones and the output zone.
US10170686B2	Electric energy harvester using ultrasonic wave There is provided an electric energy generator system comprising: an ultrasonic-wave emission device configured to generate an ultrasonic-wave and emit the ultrasonic-wave; and an electric energy generator device configured to generate an electric energy upon a receipt of the emitted ultrasonic-wave.
US10170683B2	Piezoelectric vibration module A piezoelectric vibration module includes external electrodes arranged in a stack direction on the outside surface of a piezoelectric device so that the state in which the piezoelectric device is coupled to the terminals of an FPCB can be reliably maintained even in a piezoelectric device bending phenomenon dependent on the repetition of contraction and/or expansion of the piezoelectric device. A portion in which the external electrodes of the piezoelectric device come in contact with the FPCB may be placed in a portion having small displacement.
US10170681B1	Laser annealing of qubits with structured illumination A qubit may be formed by forming a Josephson junction between two capacitive plates. The Josephson junction may be annealed with a thermal source. The thermal source may be a laser that generates a Gaussian beam. An axicon lens may be exposed to the Gaussian beam. Annealing the Josephson junction may alter the resistance of the Josephson junction.
US10170676B2	Light emitting device package and lighting apparatus having same An embodiment relates to a light emitting device package and a lighting apparatus having the same. According to the embodiment, a light emitting device package includes a first lead frame; a second lead frame spaced apart from the first lead frame; a body coupled to the first lead frame and the second lead frame and includes a first cavity which exposes a portion of the upper surface of the first lead frame, a second cavity which exposes a portion of the upper surface of the second lead frame, and a spacer which is disposed between the first lead frame and the second frame; at least one light emitting device disposed in the first cavity; and a protection device disposed in the second cavity. The second cavity is disposed on a first inside surface of the first cavity and the first inside surface is connected to an upper surface of the spacer, and an area of a bottom surface of the first cavity is equal to or less than 40% of entire area of the body.
US10170675B2	P—N separation metal fill for flip chip LEDs A light emitting diode (LED) structure has semiconductor layers, including a p-type layer, an active layer, and an n-type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface through which light is emitted. Portions of the p-type layer and active layer are etched away to expose the n-type layer. The surface of the LED is patterned with a photoresist, and copper is plated over the exposed surfaces to form p and n electrodes electrically contacting their respective semiconductor layers. There is a gap between the n and p electrodes. To provide mechanical support of the semiconductor layers between the gap, a dielectric layer is formed in the gap followed by filling the gap with a metal. The metal is patterned to form stud bumps that substantially cover the bottom surface of the LED die, but do not short the electrodes. The substantially uniform coverage supports the semiconductor layer during subsequent process steps.
US10170667B2	Semiconductor optical device A semiconductor optical device has a multilayer structure 30 including a first compound semiconductor layer 31, an active layer 33, and a second compound semiconductor layer 32. A second electrode 42 is formed on the second compound semiconductor layer 32 through a contact layer 34. The contact layer 34 has a thickness of four or less atomic layers. When an interface between the contact layer 34 and the second compound semiconductor layer 32 is an xy-plane, a lattice constant along an x-axis of crystals constituting an interface layer 32A which is a part of the second compound semiconductor layer in contact with the contact layer 34 is x2, a lattice constant along a z-axis is z2, a length along an x-axis in one unit of crystals constituting the contact layer 34 is xc′, and a length along the z-axis is zc′, (zc′/xc′)>(z2/x2) is satisfied.
US10170661B2	Integrated photodetector waveguide structure with alignment tolerance An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.
US10170660B2	Digital alloy germanium heterojunction solar cell A photovoltaic device includes a digital alloy buffer layer including a plurality of alternating layers of semiconductor material. An absorption layer epitaxially is grown on the digital alloy buffer layer, an intrinsic layer is formed on the absorption layer and a doped layer is formed on the intrinsic layer. A conductive contact is formed on the doped layer.
US10170656B2	Inverted metamorphic multijunction solar cell with a single metamorphic layer The present disclosure provides a multijunction solar cell that includes: a first sequence of layers of semiconductor material forming a first set of one or more solar subcells; a graded interlayer adjacent to said first sequence of layers; a second sequence of layers of semiconductor material forming a second set of one or more solar subcells; and a high band gap contact layer adjacent said second sequence of layers, wherein the high band gap contact layer is composed of p++ type InGaAlAs or InGaAs.
US10170655B2	Energy harvesting device with prefabricated thin film energy absorption sheets and roll-to-sheet and roll-to-roll fabrication thereof An energy harvesting device includes prefabricated thin film energy absorption sheets that are each tuned to absorb electromagnetic energy of a corresponding wavelength. The energy harvesting device can include a prefabricated thin film converter sheet to convert the electromagnetic energy into electrical power. The energy harvesting device can include a prefabricated thin film battery sheet to store the electrical power. Each thin film energy absorption sheet can be fabricated using a roll-to-roll process. The energy harvesting device can be fabricated using a roll-to-sheet process from rolls of the thin film energy absorption sheets.
US10170654B2	Solar powered device with scalable size and power capacity A window transmissivity control assembly having a power source with scalable size and power capacity is provided. The assembly includes an insulated glazing unit including a variably transmissive glazing, a photovoltaic module attached to the insulated glazing unit and electrically coupled to the variably transmissive glazing, and a control module having a control circuit for controlling transmissivity of the glazing and a battery for providing power to the glazing. The photovoltaic assembly is attached to an exterior face portion of the insulated glazing unit, and a control module is attached to an interior face portion of the insulated glazing unit. Each module may extend from a first end of the insulated glazing unit to an opposing second end of the insulated glazing unit, wherein the length of the module being substantially the same as the distance between the first and second ends of the insulated glazing unit.
US10170646B2	Solar cell module A solar cell module includes a plurality of solar cells each including a semiconductor substrate, an emitter region forming a p-n junction along with the semiconductor substrate, a first electrode connected to the emitter region, and a second electrode connected to a back surface of the semiconductor substrate; and a plurality of wiring members connected to the first electrode or the second electrode and configured to electrically connect the plurality of solar cells in series, wherein a number of wiring members connected to the first electrode or the second electrode of each solar cell is 6 to 30, and the wiring members have a circular cross-section.
US10170645B2	Organic vehicle for electroconductive paste An organic vehicle used in the manufacture of electroconductive silver paste. The organic vehicle comprises an organic binder, a surfactant, and an organic solvent. The preferred embodiment of the invention utilizes at least one of PVP, PMMA, or PVB as the organic binder, allowing for high compatibility with the metallic particles and resulting in an electroconductive paste with low viscosity for fine line printability. Another aspect of the invention relates to an electroconductive paste composition. The preferred embodiment utilizes metallic particles, glass frit, and an organic vehicle comprising a binder, namely at least one of PVP, PMMA, or PVB, a surfactant, and an organic solvent.
US10170644B2	Processes for uniform metal semiconductor alloy formation for front side contact metallization and photovoltaic device formed therefrom A photovoltaic device is provided that includes a semiconductor substrate including a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one lying on top of the other, wherein an upper exposed surface of the semiconductor substrate represents a front side surface of the semiconductor substrate. A plurality of patterned antireflective coatings is located on the front side surface to provide a grid pattern including a busbar region and finger regions. The busbar region includes at least a real line interposed between at least two dummy lines. A material stack including at least one metal layer located on the semiconductor substrate in the busbar region and the finger regions.
US10170643B2	Method for manufacturing barrier film with enhanced moisture resistance and barrier film manufactured by the same A barrier film and a method of manufacturing the barrier film are provided. The method includes performing high-pressure thermal treatment under certain conditions on an oxide thin film deposited by sputtering deposition or atomic layer deposition (ALD) to manufacture a barrier film with improved moisture resistance. According to the method, moisture resistance of the barrier film can be improved at a low process temperature by using both thermal energy and pressure energy. The barrier film provided herein can be useful as a barrier film for solar cells.
US10170642B2	Solar cells with improved lifetime, passivation and/or efficiency A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over the dielectric region and forming a dopant region on a surface of the silicon substrate. In an embodiment, the method can include heating the silicon substrate at a temperature above 900 degrees Celsius to getter impurities to the emitter region and drive dopants from the dopant region to a portion of the silicon substrate.
US10170641B2	Vertical pin diode A vertical positive-intrinsic-negative (pin) diode includes a semiconductor substrate in which a P-type region, an intrinsic region, and an N-type region are sequentially disposed in a vertical direction to be formed therein, a first electrode formed on one surface of the semiconductor substrate to be in electrical contact with the P-type region, and a second electrode formed on the other surface of the semiconductor substrate to be in electrical contact with the N-type region, wherein the P-type region and the N-type region are respectively disposed in an upper portion and a lower portion of the semiconductor substrate to be opposite to each other.
US10170640B2	FinFET transistor gate and epitaxy formation Embodiments are directed to a method of forming a semiconductor device and resulting structures that reduce shallow trench isolation (STI) undercutting, floating gates, and gate voids without degrading epitaxy quality. The method includes forming a first and second semiconductor fin on a substrate. A buffer layer is formed on a surface of the substrate between the first and second semiconductor fins and a semiconducting layer is formed on the buffer layer. The buffer layer is selectively removed and replaced with a dielectric layer. A first gate is formed over a first channel region of the first semiconductor fin and a second gate is formed over a second channel region of the first semiconductor fin. Source and drain epitaxy regions are selectively formed on surfaces of the first gate.
US10170639B2	3D memory Three-dimensional memory cells and methods of making and using the memory cells are discussed generally herein. In one or more embodiments, a three-dimensional vertical memory can include a memory stack. Such a memory stack can include memory cells and a dielectric between adjacent memory cells, each memory cell including a control gate and a charge storage structure. The memory cell can further include a barrier material between the charge storage structure and the control gate, the charge storage structure and the barrier material having a substantially equal dimension.
US10170635B2	Semiconductor device, display device, display apparatus, and system A semiconductor device includes a base; a gate electrode to which a gate voltage is applied; a source electrode and a drain electrode through which an electric current is generated according to the gate voltage being applied to the gate electrode; a semiconductor layer made of an oxide semiconductor; and a gate insulating layer inserted between the gate electrode and the semiconductor layer. The semiconductor layer includes a channel-forming region and a non-channel-forming region; the channel-forming region is in contact with the source electrode and the drain electrode, and the non-channel-forming region is in contact with the source electrode and the drain electrode.
US10170631B2	Manufacturing methods of oxide thin film transistors The manufacturing method of oxide thin film transistors (TFTs) includes: providing a substrate and forming an oxide semiconductor active layer on the substrate; depositing an insulation dielectric layer on the active layer; and applying an annealing process to components formed after the insulation dielectric layer is deposited. After depositing the gate insulation layer on the oxide semiconductor active layer, the annealing process is applied to the formed component, which eliminates the difference of the component performance caused by the insulation dielectric layer formed by different film formation processes such that the reproducibility of the film formation processes may be enhanced.
US10170629B2	Field-effect transistor and the manufacturing method A field-effect transistor and a manufacturing method thereof are provided. The method includes depositing a first insulating layer on a substrate; forming a source electrode and a drain electrode on the first insulating layer; forming a carbon quantum dots active layer covering the source electrode and the drain electrode; and forming a second insulating layer and a gate electrode on the carbon quantum dots active layer sequentially. According to the above method, the present disclosure making the field-effect transistor active layer with carbon quantum dots as materials, which enriches the material of the field-effect transistor, reduces the environmental pollution in current technology by using metal dots film, and reduces the dependence on metal elements.
US10170622B2	Semiconductor device including MOS transistor having silicided source/drain region and method of fabricating the same A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces.
US10170614B2	Method of forming a semiconductor device A method of forming a semiconductor device includes forming a first well and a second well in a substrate, wherein the first well is doped with dopants of a first conductivity type and the second well is doped with dopants of a second conductivity type. A third well is formed within the first well, and a gate structure is formed above the substrate, the gate structure partially overlying at least the first and second wells. A first epi region is formed on the third well, wherein the first epi region is doped with second dopants of the second conductivity type, and a drain region is formed that is electrically coupled to the second well.
US10170606B2	Insulated gate bipolar transistor and diode A semiconductor device includes a semiconductor layer having a first principal surface on one side thereof and a second principal surface on the other side thereof, a channel region of a first conductivity type formed at a surface layer portion of the first principal surface of the semiconductor layer, an emitter region of a second conductivity type formed at a surface layer portion of the channel region in the semiconductor layer, a drift region of the second conductivity type formed in a region of the second principal surface side with respect to the channel region in the semiconductor layer so as to be electrically connected to the channel region, a collector region of the first conductivity type formed at a surface layer portion of the second principal surface of the semiconductor layer so as to be electrically connected to the drift region, a cathode region of the second conductivity type formed at a surface layer portion of the second principal surface of the semiconductor layer so as to be electrically connected to the drift region and including a continuously laid around line-shaped pattern, and a gate electrode formed at the first principal surface side of the semiconductor layer so as to face the channel region across an insulating film.
US10170604B2	Method for making a semiconductor device including a resonant tunneling diode with electron mean free path control layers A method for making a semiconductor device may include forming at least one a double-barrier resonant tunneling diode (DBRTD) by forming a first doped semiconductor layer, and a forming first barrier layer on the first doped semiconductor layer and including a superlattice. The method may further include forming a first intrinsic semiconductor layer on the first barrier layer, forming a second barrier layer on the first intrinsic semiconductor layer and also comprising the superlattice, forming a second intrinsic semiconductor layer on the second barrier layer, and forming a third barrier layer on the second intrinsic semiconductor layer and also comprising the superlattice. The method may further include forming a third intrinsic semiconductor layer on the third barrier layer, forming a fourth barrier layer on the third intrinsic semiconductor layer, and forming a second doped semiconductor layer on the fourth barrier layer.
US10170601B2	Structure and formation method of semiconductor device with bipolar junction transistor A semiconductor device structure is provided. The semiconductor device structure includes a collector element formed in or over a semiconductor substrate. The semiconductor device structure also includes a semiconductor element over the collector element, and the semiconductor element has a top surface, a bottom surface, and a side surface. The semiconductor device structure further includes an emitter element over the top surface of the semiconductor element. In addition, the semiconductor device structure includes a base element over the collector element and in direct contact with the side surface of the semiconductor element.
US10170600B2	Method for manufacturing semiconductor device A manufacturing method of a semiconductor device including a step of forming a silicon layer over a formation substrate, a step of forming a resin layer over the silicon layer, a step of forming a transistor over the resin layer, a step of forming a conductive layer over the silicon layer and the resin layer, and a step of separating the formation substrate and the transistor. The resin layer has an opening over the silicon layer. The conductive layer is in contact with the silicon layer through the opening in the resin layer. In the step of separating the formation substrate and the transistor, the silicon layer is irradiated with light, so that silicon contained in the silicon layer reacts with a metal contained in the conductive layer, and a metal silicide layer is formed.
US10170598B2	Semiconductor device and method for manufacturing the same An object is to provide a semiconductor device including an oxynitride semiconductor whose carrier density is controlled. By introducing controlled nitrogen into an oxide semiconductor layer, a transistor in which an oxynitride semiconductor having desired carrier density and on characteristics is used for a channel can be manufactured. Further, with the use of the oxynitride semiconductor, even when a low resistance layer or the like is not provided between an oxynitride semiconductor layer and a source electrode and between the oxynitride semiconductor layer and a drain electrode, favorable contact characteristics can be exhibited.
US10170596B2	Fabrication of an isolated dummy fin between active vertical fins with tight fin pitch A method of forming an arrangement of active and inactive fins on a substrate, including forming at least three vertical fins on the substrate, forming a protective liner on at least three of the at least three vertical fins, removing at least a portion of the protective liner on the one of the at least three of the at least three of vertical fins, and converting the one of the at least three of the at least three vertical fins to an inactive vertical fin.
US10170593B2	Threshold voltage modulation through channel length adjustment A method of forming an arrangement of long and short fins on a substrate, including forming a plurality of finFET devices having long fins on the substrate, where the long fins have a fin length in the range of about 180 nm to about 350 nm, and forming a plurality of finFET devices having short fins on the substrate, where the short fins have a fin length in the range of about 60 nm to about 140 nm, wherein at least one of the plurality of finFET devices having a long fin is adjacent to at least one of the plurality of finFET devices having a short fin.
US10170590B2	Vertical field effect transistors with uniform threshold voltage Provided is a method for forming a semiconductor structure. In one or more embodiments of the invention, the method includes forming a semiconductor fin on a substrate and decreasing a width of the semiconductor fin. The method further includes forming a spacer layer on a surface of the substrate and forming a high dielectric constant layer on exposed surfaces of the semiconductor fin and the spacer layer. The method also includes forming a work function metal layer on the high dielectric constant layer. The method also includes removing portions of the work function metal layer and the high dielectric constant layer to expose portions of the spacer layer. A thickness of the remaining work function metal layer on sidewalls of the semiconductor fin is uniform.
US10170589B2	Vertical power MOSFET and methods for forming the same A device includes a semiconductor region in a semiconductor chip, a gate dielectric layer over the semiconductor region, and a gate electrode over the gate dielectric. A drain region is disposed at a top surface of the semiconductor region and adjacent to the gate electrode. A gate spacer is on a sidewall of the gate electrode. A dielectric layer is disposed over the gate electrode and the gate spacer. A conductive field plate is over the dielectric layer, wherein the conductive field plate has a portion on a drain side of the gate electrode. A conductive via is disposed in the semiconductor region. A source electrode is underlying the semiconductor region, wherein the source electrode is electrically shorted to the conductive field plate through the conductive via.
US10170575B2	Vertical transistors with buried metal silicide bottom contact A method of fabricating the vertical field effect transistor includes forming a dielectric layer on a metal semiconductor alloy layer that is present on a substrate of a semiconductor material. The dielectric layer is bonded to a supporting substrate. The substrate of the semiconductor material is cleaved, wherein a remaining portion of the semiconductor material provides a semiconductor surface layer in direct contact with the metal semiconductor alloy layer. A vertical fin type field effect transistor (FinFET) is formed atop the stack of the semiconductor surface layer, the metal semiconductor alloy layer, the dielectric layer and the supporting substrate, wherein the semiconductor surface layer provides at least one of a source region or a drain region of the FinFET and the metal semiconductor alloy provides a contact to the source region or the drain region of the FinFET.
US10170572B2	Self-aligned dual trench device A power MOSFET or a power rectifier may be fabricated according to the invention to include a gate trench and a field plate trench. Both trenches can be formed with a two-step etching process as described in detail in the specification. The devices that embody this invention can be fabricated with higher packaging density and better and more tightly distributed device parameters such as the VF, RDSS, and BV.
US10170567B2	High voltage laterally diffused MOSFET with buried field shield and method to fabricate same A structure includes a laterally diffused (LD) MOSFET with an n-type drift region disposed on a surface of a substrate and a p-type body region contained in the drift region. The structure further includes an n-type source region contained in the p-type body region; an n-type drain region contained in the n-type drift region; a gate electrode disposed on a gate dielectric overlying a portion of the p-type body region and the n-type drift region and an electrically conductive field shield member disposed within the n-type drift region at least partially beneath the p-type body region and generally parallel to the gate electrode. The electrically conductive buried field shield member is contained within and surrounded by a layer of buried field shield oxide and is common to both a first LD MOSFET and a second LD MOSFET that are connected in parallel. Methods to fabricate the structure are also disclosed.
US10170565B2	Imaging device, method for driving imaging device, and electronic device An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a first capacitor. Variation in the threshold voltage of amplifier transistors can be compensated. Furthermore, the imaging device can have a difference detecting function for holding differential data between imaging data for an initial frame and imaging data for a current frame and outputting a signal corresponding to the differential data.
US10170561B1	Diamond semiconductor device In one embodiment, a diamond semiconductor device includes a first diamond semiconductor layer of a first conductivity type which has a main surface, a second diamond semiconductor layer of an i-type or a second conductivity type which is provided on the main surface of the first diamond semiconductor layer, and has a first side surface with a plane orientation of a {111} plane, a third diamond semiconductor layer of the first conductivity type which is provided on the first side surface, and a fourth diamond semiconductor layer of the second conductivity type which is provided on the main surface of the first diamond semiconductor layer and on a side surface of the second diamond semiconductor layer at a side opposite to a side of the third diamond semiconductor layer.
US10170558B2	Localized and self-aligned punch through stopper doping for finFET A method for doping punch through stoppers (PTSs) includes forming fins in a monocrystalline substrate, forming a dielectric layer at a base portion between the fins and forming spacers on sidewalls of the fins down to a top portion of the dielectric layer. The dielectric layer is recessed to form gaps between the top portion of the dielectric layer and the spacer to expose the fins in the gaps. The fins are doped through the gaps to form PTSs in the fins.
US10170557B2	Thyristor with improved plasma spreading There is provided a thyristor having emitter shorts, wherein in an orthogonal projection onto a plane parallel to a first main side, a contact area covered by an electrical contact of a first electrode layer with a first emitter layer and the emitter shorts includes areas in the shape of lanes, in which an area coverage of the emitter shorts is less than the area coverage of emitter shorts in the remaining area of the contact area, wherein the area coverage of the emitter shorts in a specific area is the area covered by the emitter shorts in that specific area relative to the specific area. The thyristor of the invention exhibits a fast turn-on process even without complicated amplifying gate structure.
US10170554B2	Semiconductor device and manufacturing method thereof A semiconductor device includes: a gate structure on a substrate; a raised source/drain region adjacent to the gate structure; a channel region under the gate structure; and a protection layer between the substrate and the raised source/drain region. The protection layer is interposed between the substrate and the raised source/drain region. An atom stacking arrangement of the protection layer is different from the substrate and the raised source/drain region.
US10170549B2	Strained stacked nanosheet FETs and/or quantum well stacked nanosheet Exemplary embodiments provide for fabricating a nanosheet stack structure having one or more sub-stacks. Aspects of the exemplary embodiments include: growing an epitaxial crystalline initial stack of one or more sub-stacks, each of the sub-stacks having at least three layers, a sacrificial layer A, and at least two different non-sacrificial layers B and C having different material properties, wherein the non-sacrificial layers B and C layers are kept below a thermodynamic or kinetic critical thickness corresponding to metastability during all processing, and wherein the sacrificial layer An is placed only at a top or a bottom of each of the sub-stacks, and each of the sub-stacks is connected to an adjacent sub-stack at the top or the bottom using one of the sacrificial layers A; proceeding with fabrication flow of nanosheet devices, such that pillar structures are formed at each end of the epitaxial crystalline stack that to hold the nanosheets in place after selective etch of the sacrificial layers; and selectively removing sacrificial layers A to all non-sacrificial layers B and C, while the remaining layers in the stack are held in place by the pillar structures so that after removal of the sacrificial layers An, each of the sub-stacks contains the non-sacrificial layers B and C.
US10170542B2	Semiconductor device A semiconductor device including a substrate of a first conductivity type, a metal-oxide-semiconductor-field-effect transistor (MOSFET), junction gate field-effect transistors (JFETs), an isolation structure, and a buried layer of a second conductivity type is provided. The MOSFET is located on the substrate and has a first epitaxial layer of the second conductivity type. The JFET is located on the substrate and has a second epitaxial layer of the second conductivity type. The isolation structure is located between the MOSFET and the JFET to separate the first epitaxial layer from the second epitaxial layer. The buried layer is located between the MOSFET and the substrate. The buried layer extends from below the MOSFET to below the isolation structure and below the JFET, so as to electrically connect the MOSFET to the first JFET.
US10170533B2	Display device, method for driving the same, and electronic apparatus A display device including a pixel array unit having a matrix of pixels each configured such that an anode electrode of an organic electroluminescent element is connected to a source electrode of a drive transistor, a gate electrode of the drive transistor is connected to a source or drain electrode of a writing transistor, and a storage capacitor is connected between the gate and source electrodes of the drive transistor, scanning lines and power supply lines for individual pixel rows, and signal lines for individual pixel columns. A video signal reference potential is supplied to the signal lines for a period during which a scanning signal is supplied to the scanning lines during driving of pixels in a preceding row. During threshold correction for the drive transistor in a current pixel, the video signal reference potential and a potential of the cathode electrode of the organic electroluminescent element are equal.
US10170522B2	High pixel density array architecture What is disclosed is a pixel array architecture for displays being based on a matrix of subpixels arranged in a rectilinear matrix oriented at an angle relative to a horizontal direction of the display, exhibiting a reduced pixel pitch for the subpixels.
US10170520B1	Negative-capacitance steep-switch field effect transistor with integrated bi-stable resistive system Fabricating a negative capacitance steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin, a source/drain, a gate, a cap disposed upon the gate, a trench contact disposed upon the source/drain, and an inter-layer dielectric. A source/drain recess is formed in the inter-layer dielectric extending to the trench contact, and a gate recess is formed in the inter-layer dielectric extending to the gate. A ferroelectric material is deposited within the gate recess, and a source/drain contact is formed within the source/drain recess. A gate contact is formed within the gate recess, and a contact recess is formed in a portion of the source/drain contact. A bi-stable resistive system (BRS) material is formed in the contact recess, and a metallization layer contact is formed upon the BRS material. A portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forms a reversible switch.
US10170519B2	Magnetoresistive element and memory device According to one embodiment, a magnetoresistive element includes a first metal layer having a body-centered cubic structure, a second metal layer having a hexagonal close-packed structure on the first metal layer, a metal nitride layer on the second metal layer, a first magnetic layer on the metal nitride layer, an insulating layer on the first magnetic layer, and a second magnetic layer on the insulating layer.
US10170518B2	Self-assembled pattern process for fabricating magnetic junctions usable in spin transfer torque applications Magnetic junctions usable in a magnetic device and a method for providing the magnetic junctions are described. A patterned seed layer is provided. The patterned seed layer includes magnetic seed islands interspersed with an insulating matrix. At least a portion of the magnetoresistive stack is provided after the patterned seed layer. The magnetoresistive stack includes at least one magnetic segregating layer. The magnetic segregating layer(s) include at least one magnetic material and at least one insulator. The method anneals the at least the portion of the magnetoresistive stack such that the at least one magnetic segregating layer segregates. The constituents of the magnetic segregating layer segregate such that portions of magnetic material(s) align with the magnetic seed islands(s) and such that portions of the insulator(s) align with the insulating matrix.
US10170516B2	Image sensing device and method for fabricating the same An image sensing device is provided. The image sensing device includes a substrate having a pixel array with a plurality of pixels. A light guide structure is disposed over the substrate, forming a plurality of light pipes and a plurality of reflecting portions surrounding the light pipes. The light pipes are aligned with the pixels of the pixel array. The invention also provides a method for fabricating the image sensing device.
US10170515B2	Implantation process for semiconductor device A semiconductor device includes a substrate and a device. The substrate has a first surface and a second surface opposite to each other. The substrate includes a first well region, and the first well region includes a first shallow implantation region adjacent to the first surface and a first deep implantation region adjacent to the second surface, in which a dopant concentration of the first deep implantation region at the second surface is substantially equal to 0. The device is disposed on the first surface of the substrate and adjoins the first shallow implantation region.
US10170514B2	Image sensor An image sensor comprises an array of pixels comprising: a pinned photodiode; a first sense node A; a second sense node B; a transfer gate TX connected between the pinned photodiode and the first sense node A; a first reset transistor M3 connected between a voltage reference line Vrst and the second sense node B; a second reset transistor M4 connected between the first sense node A and the second sense node B; and a buffer amplifier M1 having an input connected to the first sense node A. The control logic is arranged to operate the pixels in a low conversion gain mode and in a high conversion gain mode. In each of the conversion gain modes the control logic is arranged to operate one of a first reset control line RS1 and a second reset control line RS2 to continuously switch on one of the first reset transistor M3 and the second reset transistor M4 during a readout period of an operational cycle of the pixels.
US10170511B1	Solid-state imaging devices having a microlens layer with dummy structures A solid-state imaging device has a sensing region, a pad region and a peripheral region between the sensing region and the pad region. The solid-state imaging device includes a plurality of photoelectric conversion elements formed in a semiconductor substrate and disposed in the sensing region, and a bond pad disposed on the semiconductor substrate and in the pad region. The solid-state imaging device further includes a microlens layer disposed above the semiconductor substrate. The microlens layer includes a microlens array in the sensing region and a first dummy structure in the pad region. The first dummy structure includes a plurality of first microlens elements disposed to surround an area of the bond pad. Moreover, the solid-state imaging device includes a passivation film conformally formed on a top surface of the microlens layer.
US10170510B2	Color separation element array, image sensor including the same, and electronic device A color separation element array, an image sensor including the color separation element array, and an electronic device including the color separation element array are provided. The color separation element array includes a plurality of color separation elements configured to separate an incident light into a color light according to wavelength bands in a transparent layer, the plurality of color separation elements including a first element and a second element having different refractive indices, and the first element and second element being arranged in a horizontal direction.
US10170505B2	Display apparatus A display apparatus capable of reducing a defect rate during manufacturing and utilizing thereof, the display apparatus includes a substrate comprising a display area and a peripheral area outside the display area; a display unit over an upper surface of the substrate to correspond to the display area; and a protective film including a protective film base and an adhesive layer, the protective film being attached to the lower surface of the substrate by the adhesive layer, wherein the protective film base includes a first protective film base corresponding at least to the display area, and a second protective film base having physical properties that are different from physical properties of the first protective film base and corresponding to at least a part of the peripheral area.
US10170504B2	Manufacturing method of TFT array substrate, TFT array substrate and display device Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The TFT array substrate comprises a thin film transistor and a pixel electrode formed on a base substrate, the pixel electrode is electrically connected with a drain electrode of the thin film transistor. The array substrate further comprises an light-shielding pattern provided above the thin film transistor.
US10170501B2	Display panel A display panel is provided. The display panel includes a substrate including a non-display region containing a thin film transistor, which includes a semiconductor layer; a first insulating layer; a first metal layer; a second insulating layer; a first and second via hole series disposed adjacent to the respective opposite sides of the first metal layer. The first via hole series includes a plurality of first via holes, and the second via hole series includes a plurality of second via holes. A second metal layer includes a first portion and a second portion. The minimum distance between an edge of the first portion and an edge of the first metal layer is a first distance, and the minimum distance between an edge of the second portion and another edge of the first metal layer is a second distance, and the second distance is greater than the first distance.
US10170499B2	FinFET device with abrupt junctions A plurality of semiconductor fins is formed on a surface of an insulator layer. Gate structures are then formed that are orientated perpendicular and straddle each semiconductor fin. A dielectric spacer is then formed on vertical sidewalls of each gate structure. Next, an etch is performed that removes exposed portions of each semiconductor fin and a portion of the insulator layer not protected by the dielectric spacers and the gate structures. The etch provides semiconductor fin portions that have exposed vertical sidewalls. A doped semiconductor material is then formed from each exposed vertical sidewall of each semiconductor fin portion, followed by an anneal which causes diffusion of dopants from the doped semiconductor material into each semiconductor fin portion and the formation of source/drain regions. The source/drain regions are present along the sidewalls of each semiconductor fin portion and are located beneath the dielectric spacers.
US10170496B2	Semiconductor device and manufacturing method thereof A semiconductor device in accordance with an embodiment may include a cell structure, a source coupling structure, and a source discharge transistor. The cell structure may include alternately stacked first conductive patterns and first interlayer insulating layers enclosing a channel layer. The source coupling structure separated from the cell structure may include alternately stacked second conductive patterns and second interlayer insulating layers. The source discharge transistor may be coupled to the source coupling structure.
US10170492B2	Memory device and method for fabricating the same A memory device includes a semiconductor substrate, a first conductive layer, a plurality of second conductive layers, a plurality insulating layers, at least one contact plug and at least one dummy plug. The first conductive layer is disposed on the semiconductor substrate. The insulating layers are disposed on the first conductive layer. The second conductive layers are alternatively stacked with the insulating layers and insulated from the first conductive layer. The contact plug passes through the insulating layers and the second conductive layers, insulates from the second conductive layers and electrically contacts to the first conductive layer. The dummy plug, corresponds to the at least one contact plug, passes through the insulating layers and the second conductive layers, and insulates from the second conductive layers and the first conductive layer.
US10170485B2	Three-dimensional stacked junctionless channels for dense SRAM A structure comprises a first channel region forming an n-channel device; a second channel region forming a p-channel device, the p-channel device being stacked with the n-channel device in a vertical orientation; a gate positioned around the stacked n-channel device and p-channel device; and at least one source region and at least one drain region extending from each of the n-channel device and the p-channel device. Each of the at least one source region and the at least one drain region within the stacked n-channel device and p-channel device are independently contacted.
US10170483B2	Semiconductor device, static random access memory cell and manufacturing method of semiconductor device A semiconductor device includes a substrate, a first semiconductor fin, a second semiconductor fin, an n-type epitaxy structure, a p-type epitaxy structure, and a plurality of dielectric fin sidewall structures. The first semiconductor fin is disposed on the substrate. The second semiconductor fin is disposed on the substrate and adjacent to the first semiconductor fin. The n-type epitaxy structure is disposed on the first semiconductor fin. The p-type epitaxy structure is disposed on the second semiconductor fin and separated from the n-type epitaxy structure. The dielectric fin sidewall structures are disposed on opposite sides of at least one of the n-type epitaxy structure and the p-type epitaxy structure.
US10170478B2	Spacer for dual epi CMOS devices Aspects of the disclosure include a method for making a semiconductor, including patterning a first transistor having one or more gate stacks on a first source-drain area and second transistor comprising one or more gate stacks on a second source-drain area, forming dielectric spacers on gate stack side walls, depositing a first nitride liner on the first and second transistors. The method also includes masking the second transistor and etching to remove the first nitride material and the spacer from the first source-drain area and growing a first epitaxial layer on the first source-drain area by an epitaxial growth process. The method also includes depositing a second nitride liner on the first and second transistors. The method also includes masking the first transistor. The method also includes etching to remove the second nitride material from the second source-drain area and growing a second epitaxial layer on the second source-drain area by an epitaxial growth process.
US10170476B2	Structure and method of latchup robustness with placement of through wafer via within CMOS circuitry A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
US10170473B1	Forming long channel FinFET with short channel vertical FinFET and related integrated circuit A method of forming an integrated circuit includes forming a FinFET by: forming a semiconductor fin on a semiconductor substrate; forming a first source/drain region in the semiconductor substrate under a first end of the semiconductor fin and a second source/drain region in the semiconductor substrate under a second, opposing end of the semiconductor fin, the second source/drain region separated from the first source/drain region by a portion of the semiconductor substrate having an opposite doping from that of the first and second source/drain region; and forming a surrounding gate extending about the semiconductor fin above the semiconductor substrate. A second vertical FinFET may be formed simultaneously. The method allows the FinFET to have a long channel extending laterally through its fin compared to the short channel of the vertical FinFET, thus creating short channel and long channel devices together without impacting vertical FinFET height.
US10170472B2	Semiconductor device and method of fabricating the same A semiconductor device includes a substrate first through fourth active fins on the substrate, extending in a first direction, and spaced apart from one another in a second direction that intersects the first direction, a first gate electrode extending in the second direction and on the first active fin to overlap with the first active fin but not with the second through fourth active fins, a second gate electrode extending in the second direction and on the second and third active fins to overlap with the second active fin but not with the first and fourth active fins, a first contact on the first gate electrode and connected to a first wordline, and a second contact on the second gate electrode and connected to a second wordline. The first through third active fins are between the first and second contacts. Related devices are also discussed.
US10170471B2	Bulk fin formation with vertical fin sidewall profile A semiconductor device, having a heterogeneous silicon stack, wherein the heterogeneous silicon stack comprises at least a base layer, a doped silicon layer, and an undoped silicon layer. The semiconductor device further includes a plurality of silicon fins atop a doped silicon oxide fin layer and an undoped silicon oxide fin layer, wherein the plurality of silicon fins have a uniform width along the height of the plurality of silicon fins, and wherein the plurality of silicon fins have a plurality of hard mask caps.
US10170465B2	Co-fabrication of vertical diodes and fin field effect transistors on the same substrate A method of forming a vertical finFET and vertical diode device on the same substrate, including forming a channel layer stack on a heavily doped layer; forming fin trenches in the channel layer stack; oxidizing at least a portion of the channel layer stack inside the fin trenches to form a dummy layer liner; forming a vertical fin in the fin trenches with the dummy layer liner; forming diode trenches in the channel layer stack; oxidizing at least a portion of the channel layer stack inside the diode trenches to form a dummy layer liner; forming a first semiconductor segment in a lower portion of the diode trenches with the dummy layer liner; and forming a second semiconductor segment in an upper portion of the diode trenches with the first semiconductor segment, where the second semiconductor segment is formed on the first semiconductor segment to form a p-n junction.
US10170462B2	Display device An organic light emitting display device comprising a display panel including an active area where an image is displayed and a pad area corresponding to a non-display area, the display device includes a first substrate and a second substrate, which face each other, an organic light emitting diode arranged on the first substrate in the active area, a signal pad arranged on the first substrate in the pad area, a connection electrode connected with one side of the signal pad, and a flexible circuit film connected with the connection electrode, wherein the signal pad includes a plurality of lines arranged by interposing an insulating film therebetween, and the plurality of lines are electrically connected with each other.
US10170460B2	Voltage balanced stacked clamp Embodiments of the present invention provide systems and methods for balancing voltages during voltage division. More specifically, circuit performance is enhanced (i) balancing out the voltage drops across two field effect transistors (FETs); (ii) powering inverters through a voltage divider containing two voltage input pins during normal operation of the circuit; and (iii) powering inverters through a FET during electrostatic discharge.
US10170457B2	COWOS structures and method of forming the same Chip on wafer on substrate structures and methods of forming are provided. The method includes attaching a first die and a second die to an interposer. The method also includes attaching a first substrate to a first surface of the first die and a first surface of the second die. The first substrate includes silicon. The first surface of the first side is opposite to the surface of the first die that is attached to the interposer, and the first surface of the second die is opposite to the surface of the second die that is attached to the interposer. The method includes bonding the interposer to a second substrate.
US10170455B2	Light emitting device with buffer pads A light emitting device includes a carrier, a plurality of light emitting diode chips and a plurality of buffer pads. Each light emitting diode chip includes a first type semiconductor layer, an active layer, a second type semiconductor layer, a via hole and a plurality of bonding pads. The via hole sequentially penetrates through the first type semiconductor layer, the active layer and a portion of the second type semiconductor layer. The first type semiconductor layer, the active layer, the second type semiconductor layer and the via hole define a epitaxial structure. The buffer pads are disposed between the carrier and the second type semiconductor layer, wherein the buffer pads is with Young's modulus of 2˜10 GPa, the second bonding pad is disposed within the via hole to contact the second type semiconductor layer, and the epitaxial structure is electrically bonded to the receiving substrate through the bonding pads.
US10170454B2	Method and apparatus for direct transfer of semiconductor device die from a mapped wafer A system for performing a direct transfer of a plurality of semiconductor die from a first substrate to a second substrate based on map data of the location of the semiconductor die. A first conveyance mechanism conveys the first substrate. A second conveyance mechanism conveys the second substrate. A transfer mechanism is disposed adjacent to the first conveyance mechanism to effectuate the direct transfer. A controller causes one or more processors to perform operations including: determining positions of the plurality of semiconductor die based at least in part on map data, conveying at least one of the first substrate or the second substrate such that the first substrate, the second substrate, and the transfer mechanism are in a direct transfer position, and activating the transfer mechanism to perform the direct transfer of the plurality of semiconductor die.
US10170450B2	Method for bonding and interconnecting integrated circuit devices A method for bonding and interconnecting two or more IC devices arranged on substrates such as silicon wafers is disclosed. In one aspect, the wafers are bonded by a direct bonding technique to form a wafer assembly, and the multiple IC devices are provided with metal contact structures. At least the upper substrate is provided prior to bonding with a cavity in its bonding surface. A TSV (Through Semiconductor Via) is produced through the bonded wafer assembly and an aggregate opening is formed including the TSV opening and the cavity. After the formation of an isolation liner on at least part of the sidewalls of the aggregate opening (that is, at least on the part where the liner isolates the aggregate opening from semiconductor material), a TSV interconnection plug is produced in the aggregate opening.
US10170449B2	Deformable closed-loop multi-layered microelectronic device A deformable closed-loop multi-layered microelectronic device is provided. A top layer, a bottom layer and a middle layer of the microelectronic device each have at least a first section and a second section pivotable with respect to each other. A pivot is provided to a terminal end of the first section of the middle layer, for allowing the first section to rotate about the pivot. The pivot is vertically sandwiched between and connected to a terminal end of the first section of the top layer and a terminal end of the first section of the bottom layer. The first sections of the bottom layer and the top layer are pivotable in a substantially synchronized manner to deform the bottom layer and the top layer in a substantially synchronized manner.
US10170447B2	Advanced chip to wafer stacking A method and structure for forming a 3D chip stack using a vacuum chuck. The method may include: forming a first bonding layer on a first wafer and first chips, where the first chips are on a first substrate; forming a second bonding layer on a second wafer and second chips, where the second chips are on a second substrate; separating the second chips from the second wafer, wherein a portion of the second bonding layer remains on the second chips; moving the separated second chips to a cleaning chamber using a vacuum chuck; cleaning the separated second chips in the cleaning chamber; and bonding the second bonding layer on the separated second chips to the first bonding layer on the first chips.
US10170446B2	Structures and methods to enable a full intermetallic interconnect A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.
US10170443B1	Debonding chips from wafer A debonding device includes a first member provided with a recess for receiving a carrier body, the carrier body including a first plate, a second plate, and plural semiconductor chips. The semiconductor chips are sandwiched between the first plate and the second plate, the first plate of the carrier body received in the recess being opposed to a bottom of the recess. A second member is configured to change a relative position with respect to the first member, wherein the second member holds the second plate of the carrier body received in the recess using a vacuum suction, and the first member is provided with an inlet to introduce gas into a gap between the first plate and the second plate of the carrier body received in the recess.
US10170442B2	Mount structure including two members that are bonded to each other with a bonding material layer having a first interface layer and a second interface layer A mount structure includes two members that are bonded to each other with a bonding material layer having a first interface layer and a second interface layer at the interfaces with the two members. The bonding material layer contains a first intermetallic compound and a stress relaxation material. The first intermetallic compound has a spherical, a columnar, or an oval spherical shape, and the same crystalline structure as the first interface layer and the second interface layer, and partly closes the space between the first interface layer and the second interface layer. The stress relaxation material contains tin as a main component, and fills around the first intermetallic compound.
US10170438B2	Static discharge system A semiconductor circuit includes a three-terminal high voltage semiconductor device, a charge distribution structure and a static discharge system. The charge distribution structure has a plurality of conductors with a floating potential. The charge distribution structure is capacitively coupled to a first terminal of the semiconductor device. The static discharge system removes charge that accumulates on at least a subset of the conductors. The static discharge system removes the charge that accumulates on the subset of conductors when the semiconductor device is in a first state while allowing charge to accumulate on the subset of conductors when the semiconductor device is in a second state.
US10170436B1	Flash memory device having flame resistant The invention provides a flash memory device having flame resistant, which comprises a first shell, a first circuit board, and a first transmission interface. The first circuit board comprises a controller and a plurality of flash memory elements, is disposed within the first shell, and is covered by a fire protection material. The first transmission interface is disposed outside the first shell. A circuit connection line is connected between the first circuit board and the first transmission interface. By the flash memory elements being accommodated within the fire resistant shell, the fire resistant shell will be for isolating high temperature to avoid the flash memory elements to be burned when the flash memory device exists in a fire scene.
US10170435B2	Guard ring structure and method for forming the same A method for forming a seal ring structure provides a semiconductor substrate having a first doping region formed over a top portion thereof. The method forms a plurality of patterned photoresist layers over the semiconductor substrate, encircling the semiconductor substrate, wherein each of the patterned photoresist layers has a plurality of parallel strip portions extending along a first direction and a plurality of bridge portions formed between the parallel strip portions, and then performs an etching process to a first doping region of the substrate. The method then removes the first doping region not covered by the patterned photoresist layers and forms a plurality of patterned first doping regions. The method then removes the patterned photoresist layers and forms an isolation region between and adjacent to the patterned first doping regions. Finally, the method forms a plurality of interconnect elements over the semiconductor substrate.
US10170434B2	Warpage control in package-on-package structures A package includes a bottom substrate and a bottom die over and bonded to the bottom substrate. A metal-particle-containing compound material is overlying a top surface of the bottom die, wherein the metal-particle-containing compound material comprises metal particles. A molding material molds at least a lower part of the bottom die therein, wherein the molding material is overlying the bottom substrate.
US10170430B2	Integrated fan-out package and method of fabricating the same An integrated fan-out package including a die attach film, an integrated circuit component, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit component is disposed on the die attach film and includes a plurality of conductive terminals. The die attach film includes an uplifted edge which raises toward sidewalls of the integrated circuit component. The insulating encapsulation encapsulates the uplifted edge and the integrated circuit component. The redistribution circuit structure is disposed on the integrated circuit component and the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals of the integrated circuit component. A method of fabricating the integrated fan-out package are also provided.
US10170425B2	Microstructure of metal interconnect layer A metal interconnect layer, a method of forming the metal interconnect layer, a method of forming a device that includes the metal interconnect layer are described. The method of forming the metal interconnect layer includes forming an opening in a dielectric layer, forming a metal layer in the opening and over a top surface of the dielectric layer. The method also includes disposing a metal passivation layer on an overburden portion of the metal layer formed over the top surface of the dielectric layer. The metal passivation layer includes a metal selected from a group of: cobalt (Co), ruthenium (Ru), tantalum (Ta), titanium (Ti), nickel (Ni), tungsten (W), any alloy thereof, nitrides of Co, Ru, Ti, Ni, or W, and any combination thereof. The method also includes performing an anneal at a temperature exceeding 100 degrees centigrade and below 300 degrees centigrade.
US10170418B2	Backside device contact A method for fabricating a backside device contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer, includes forming a trench in the device layer. A trench is formed in the device layer. A sacrificial plug is formed in the trench. The handle wafer is removed to reveal the buried insulator layer. The buried insulator layer is partially removed to expose the sacrificial plug at a bottom of the trench. The sacrificial plug is removed. Backside processing of the buried insulator layer is performed. The trench is filled with a conductor to form a contact plug. A final substrate is connected to the buried insulator layer such that the contact plug contacts metallization of the final substrate.
US10170416B2	Selective blocking boundary placement for circuit locations requiring electromigration short-length A method is presented for forming a semiconductor structure. The method includes depositing an insulating layer over a semiconductor substrate, etching the insulating layer to form trenches for receiving copper (Cu), selectively recessing the Cu at one or more of the trenches corresponding to circuit locations requiring electromigration (EM) short-length, and forming self-aligned conducting caps over the one or more trenches where the Cu has been selectively recessed. The conducting caps can be tantalum nitride (TaN) caps. The method further includes forming a via extending into each of the trenches for receiving Cu. Additionally, the via for trenches including recessed Cu extends to the self-aligned conducting cap, whereas the via for trenches including non-recessed Cu extends to a top surface of the Cu.
US10170415B2	Semiconductor device, semiconductor integrated circuit, and load driving device On a transistor layer having arranged thereon multiple transistors each including a drain, a source, and a gate, metal interconnection layers serving as input side interconnection layers connected to the drains of the respective transistors and metal interconnection layers serving as output side interconnection layers connected to the sources of the respective transistors are arranged in parallel. Also provided are a plurality of through holes connecting the metal interconnection layers serving as input side interconnection layers to the drains of the respective transistors and connecting the metal interconnection layers serving as output side interconnection layers to the sources of the respective transistors. Resistance values of the plurality of through holes are changed along an arranging direction of the input side interconnection layers and the output side interconnection layers. Accordingly, current densities of the transistors arranged to be distributed in a two-dimensional manner can be uniform.
US10170411B2	Airgap protection layer for via alignment A method for via alignment includes forming first airgaps between interconnect structures and depositing a pinch off layer to close off openings to the first airgaps. A protection layer is formed in divots in the pinch off layer. The protection layer and the pinch off layer are planarized to form a surface where the protection layer remains in the divots. An interlevel dielectric layer (ILD) is deposited on the surface. The ILD and the pinch off layer are etched using the protection layer as an etch stop to align a via and expose the interconnect structure through the via.
US10170410B2	Semiconductor package with core substrate having a through hole A semiconductor package includes a frame having a through hole, an electronic component disposed in the through hole, a metal layer disposed on either one or both of an inner surface of the frame and an upper surface of the electronic component, a redistribution portion disposed below the frame and the electronic component, and a conductive layer connected to the metal layer.
US10170405B2	Wiring substrate and semiconductor package A wiring substrate includes an insulating layer and a wiring layer buried in the insulating layer at a first surface of the insulating layer. The wiring layer includes a first portion and a second portion. The first portion is narrower and thinner than the second portion. The first portion includes a first surface exposed at the first surface of the insulating layer. The second portion includes a first surface exposed at the first surface of the insulating layer and a second surface partly exposed in an opening formed in the insulating layer. The opening is open at a second surface of the insulating layer opposite to the first surface thereof.
US10170402B2	Semiconductor device A semiconductor device includes a wiring substrate having an upper surface, a plurality of terminals formed on the upper surface, and a lower surface opposite to the upper surface, a first semiconductor chip having a first main surface, a plurality of first electrodes formed on the first main surface, and a first rear surface opposite to the first main surface, and mounted over the upper surface of the wiring substrate such that the first rear surface of the first semiconductor chip faces the upper surface of the wiring substrate, and a plurality of wires electrically connected with the plurality of terminals, respectively.
US10170400B2	Multi-finger transistor and semiconductor device A multi-finger transistor includes a circuit suppressing a variation in voltage current distribution. The circuit connects gate fingers (21) to each other, or source fingers (31) to each other in a region which is located outside an active region (11) and on a side where a drain pad (42) is disposed. The multi-finger transistor is configured to be linearly symmetric with respect to a direction of propagation of a signal from a gate pad (22) at the position of the gate pad (22).
US10170386B2	Electronic component package and method of manufacturing the same An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity of the frame, a first metal layer disposed on an inner wall of the cavity of the frame, an encapsulant encapsulating the electronic component, and a redistribution layer disposed below the frame and the electronic component.
US10170385B2	Semiconductor device and method of forming stacked vias within interconnect structure for FO-WLCSP A semiconductor device has a semiconductor die mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed. A first insulating layer is formed over the encapsulant and semiconductor die. First vias are formed through the first insulating layer to expose contact pads of the semiconductor die. A first conductive layer is formed over the first insulating layer and into the first vias to electrically connect to the contact pads of the semiconductor die. A second insulating layer is formed over the first insulating layer and first conductive layer. Second vias are formed through the second insulating layer by laser direct ablation and aligned or offset with the first vias to expose the first conductive layer. A second conductive layer is formed over the second insulating layer and into the second vias. Conductive vias can be formed through the encapsulant.
US10170384B2	Methods and apparatus providing a graded package for a semiconductor Methods and apparatus providing a graded package for a semiconductor are disclosed. An example apparatus includes a die; and a graded package encapsulating the die, the graded package including a material that is spatially varied from a first location of the graded package to a second location of the graded package.
US10170378B2	Gate all-around semiconductor device and manufacturing method thereof Semiconductor device includes first and second nanowire structures disposed on semiconductor substrate extending in first direction on substrate. First nanowire structure includes plurality of first nanowires including first nanowire material extending along first direction and arranged in second direction, second direction substantially perpendicular to first direction. Second nanowire structure includes plurality of second nanowires including second nanowire material extending along first direction arranged in second direction. Second nanowire material is not same as first nanowire material. Each nanowire is spaced-apart from immediately adjacent nanowire. First and second gate structures wrap around first and second nanowires at first region of respective first and second nanowire structures. First and second gate structures include gate electrodes. Viewed in cross section taken along third direction substantially perpendicular to first and second directions, height of first nanowires along second direction is not equal to distance of spacing along second direction between immediately adjacent second nanowires.
US10170374B2	Semiconductor device and method for manufacturing the same A semiconductor device includes at least one n-channel, at least one p-channel, at least one first high-k dielectric sheath, at least one second high-k dielectric sheath, a first metal gate electrode and a second metal gate electrode. The first high-k dielectric sheath surrounds the n-channel. The second high-k dielectric sheath surrounds the p-channel. The first high-k dielectric sheath and the second high-k dielectric sheath comprise different high-k dielectric materials. The first metal gate electrode surrounds the first high-k dielectric sheath. The second metal gate electrode surrounds the second high-k dielectric sheath.
US10170373B2	Methods for making robust replacement metal gates and multi-threshold devices in a soft mask integration scheme A method of fabricating advanced multi-threshold field effect transistors using a replacement metal gate process. A first method includes thinning layers composed of multilayer film stacks and incorporating a portion of the remaining thinned film in some transistors. A second method includes patterning dopant materials for a high-k dielectric by using thinning layers composed of multilayer thin film stacks, or in other embodiments, by a single thinning layer.
US10170372B2	FINFET CMOS with Si NFET and SiGe PFET A method for forming a complementary metal oxide semiconductor (CMOS) device includes growing a SiGe layer on a Si semiconductor layer, and etching fins through the SiGe layer and the Si semiconductor layer down to a buried dielectric layer. Spacers are formed on sidewalls of the fins, and a dielectric material is formed on top of the buried dielectric layer between the fins. The SiGe layer is replaced with a dielectric cap for an n-type device to form a Si fin. The Si semiconductor layer is converted to a SiGe fin for a p-type device by oxidizing the SiGe layer to condense Ge. The dielectric material is recessed to below the spacers, and the dielectric cap and the spacers are removed to expose the Si fin and the SiGe fin.
US10170368B2	Fabricating fin-based split-gate high-drain-voltage transistor by work function tuning A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.
US10170365B2	Wrap around silicide for FinFETs A method includes forming a gate stack on a middle portion of s semiconductor fin, and forming a first gate spacer on a sidewall of the gate stack. After the first gate spacer is formed, a template dielectric region is formed to cover the semiconductor fin. The method further includes recessing the template dielectric region. After the recessing, a second gate spacer is formed on the sidewall of the gate stack. The end portion of the semiconductor fin is etched to form a recess in the template dielectric region. A source/drain region is epitaxially grown in the recess.
US10170364B2	Stress memorization technique for strain coupling enhancement in bulk finFET device A method for forming strained fins includes etching trenches in a bulk substrate to form fins, filling the trenches with a dielectric fill and recessing the dielectric fill into the trenches to form shallow trench isolation regions. The fins are etched above the shallow trench isolation regions to form a staircase fin structure with narrow top portions of the fins. Gate structures are formed over the top portions of the fins. Raised source ad drain regions are epitaxially grown on opposite sides of the gate structure. A pre-morphization implant is performed to generate defects in the substrate to couple strain into the top portions of the fins.
US10170363B2	Semiconductor device and method of manufacturing the semiconductor device An interconnection structure of the semiconductor integrated circuit device may be provided. The interconnection structure may include a first conductive pattern, a second conductive pattern, a dielectric layer and a contact part. The first conductive pattern may have a first width and a first length. The second conductive pattern may be formed over the first conductive pattern. The second conductive pattern may have a second width and a second length. The dielectric layer may be interposed between the first conductive pattern and the second conductive pattern. The contact part may be configured to simultaneously make contact with the first conductive pattern and the second conductive pattern.
US10170361B2	Thin film interconnects with large grains The present disclosure relates to integrated circuits and to methods of manufacturing interconnects of integrated circuits. For example, an integrated circuit includes a surface of the integrated circuit and an interconnect formed on the surface and comprising a metal. An average grain size of the metal of the interconnect is greater than or equal to at least half of a line width of the interconnect. In another example, a method for manufacturing an interconnect of an integrated circuit includes depositing a layer of a metal onto a surface of the integrated circuit, annealing the metal, patterning a first hard mask for placement over the metal and forming a line of the interconnect and a first via of the interconnect by performing a timed etch of the metal using the first hard mask.
US10170357B2	SOI wafer manufacturing process and SOI wafer Provided is an SOI wafer manufacturing method that allows production of an SOI wafer having a high gettering ability and a small resistance variance in a thickness direction of an active layer, at high productivity. The SOI wafer manufacturing method includes a first step of implanting light element ions to a surface of at least one of a first substrate and a second substrate to form, on the at least one of the first substrate and the second substrate, a modified layer in which the light element ions are present in solid solution, a second step of forming an oxide film on a surface of at least one of the first substrate and the second substrate, a third step of bonding the first substrate and the second substrate according to a normal-temperature vacuum bonding method, and a fourth step of obtaining an active layer by thinning the first substrate.
US10170356B2	SOI substrate and manufacturing method thereof This invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; irradiating the first semiconductor substrate via a ion beam for forming a doping layer to a pre-determined depth from a top surface of the first insulating layer; providing a second substrate; growing a second insulating layer on a top surface of the second semiconductor substrate for forming a second wafer; bonding the first wafer with the second wafer; annealing the first wafer and second wafer at a deuterium atmosphere; separating a part of the first wafer from the second wafer; and forming a deuterium doped layer on the second wafer.
US10170350B2	Correlation between conductivity and pH measurements for KOH texturing solutions and additives The variability of an etchant concentration in an immersion processes for treatment of semiconductor devices can be significantly lowered by continuously measuring the conductivity of an etchant solution and comparing against predetermined thresholds. The etchant concentration can be maintained by a feed and bleed process based on conductivity measurements of the etchant solution and the conductivity measurements being correlated with premeasured pH values of an etchant solution.
US10170349B2	Substrate treating apparatus A substrate treating apparatus includes a plurality of solution treating units for performing solution treatment of substrates, and a plurality of individual gas supply devices provided to correspond individually to the solution treating units, each for supplying gas at a variable rate only to one of the solution treating units. The solution treating units perform the solution treatment by supplying treating solutions to the substrates. The individual gas supply devices supply gas only to the solution treating units corresponding thereto. The individual gas supply devices supply the gas at adjustable rates to the solution treating units. The rate of gas supply to the solution treating units can therefore be varied for each solution treating unit.
US10170348B2	Production system for printing electronic devices A printing production line system for an electronic device includes a transport chamber with a robot transport line in which a self-traveling robot transports a base material in a sheet-fed manner in a free state, a plurality of processing chambers for forming an electronic device on the base material by printing on at least one side of the transport chamber, and base material transfer areas that performs loading of the base material to the processing chambers from the self-traveling robot and unloading of the base material to the self-traveling robot from the processing chambers. The transport chamber and the base material transfer area communicate with each other through respective openings, and a one-way air flow in each of the openings is formed by making an adjustment such that air pressure in the transport chamber is higher than air pressure in the base material transfer areas.
US10170342B2	Flow controlled liner having spatially distributed gas passages Embodiments of the present disclosure provide a liner assembly including a plurality of individually separated gas passages. The liner assembly enables tenability of flow parameters, such as velocity, density, direction and spatial location, across a substrate being processed. The processing gas across the substrate being processed may be specially tailored for individual processes with a liner assembly according to embodiment of the present disclosure.
US10170340B2	Semiconductor structure A semiconductor structure includes a substrate; a chip disposed over the substrate; and a molding disposed over the substrate and surrounding the chip at a molding temperature. The warpage of the substrate is convex or about zero at the molding temperature or 10° C. more or less than the molding temperature.
US10170336B1	Methods for anisotropic control of selective silicon removal Embodiments of the present technology may include a method of etching. The method may include flowing a gas through a plasma to form plasma effluents. The method may also include reacting plasma effluents with a first layer defining a first feature. The first feature may include a first sidewall, a second sidewall, and a bottom. The first sidewall, the second sidewall, and the bottom may include the first layer. The first layer may be characterized by a first thickness on the sidewall. The method may further include forming a second layer from the reaction of the plasma effluents with the first layer. The first layer may be replaced by the second layer. The second layer may be characterized by a second thickness. The second thickness may be greater than or equal to the first thickness. The method may also include removing the second layer to expose a third layer.
US10170327B2	Fin density control of multigate devices through sidewall image transfer processes Methods and structures for fabricating fins for multigate devices are disclosed. In accordance with one method, a plurality of sidewalls are formed in or on a plurality of mandrels over a semiconductor substrate such that each of the mandrels includes a first sidewall composed of a first material and a second sidewall composed of a second material that is different from the first material. The first sidewall of a first mandrel of the plurality of mandrels is selectively removed. In addition, a pattern composed of remaining sidewalls of the plurality of sidewalls is transferred onto an underlying layer to form a hard mask in the underlying layer. Further, the fins are formed by employing the hard mask and etching semiconducting material in the substrate.
US10170325B2	Hardmask composition and method of forming pattern by using the hardmask composition A hardmask composition may include a solvent and a 2-dimensional carbon nanostructure containing about 0.01 atom % to about 40 atom % of oxygen or a 2-dimensional carbon nanostructure precursor thereof. A content of oxygen in the 2-dimensional carbon nanostructure precursor may be lower than about 0.01 atom % or greater than about 40 atom %. The hardmask composition may be used to form a fine pattern.
US10170319B2	Forming a contact for a tall fin transistor A method of making a semiconductor device includes forming a recessed fin in a substrate, the recessed fin being substantially flush with a surface of the substrate; performing an epitaxial growth process over the recessed fin to form a source/drain over the recessed fin; and disposing a conductive metal around the source/drain.
US10170317B1	Self-protective layer formed on high-k dielectric layer Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.
US10170315B2	Semiconductor device having local buried oxide There is set forth herein a semiconductor device fabricated on a bulk wafer having a local buried oxide region underneath a channel region of a MOSFET. In one embodiment the local buried oxide region can be self-aligned to a gate, and a source/drain region can be formed in a bulk substrate. A local buried oxide region can be formed in a semiconductor device by implantation of oxygen into a bulk region of the semiconductor device followed by annealing.
US10170313B2	Systems and methods for a tunable electromagnetic field apparatus to improve doping uniformity Systems and methods for improving doping and/or deposition uniformity using a tunable electromagnetic field generation device are provided. In an exemplary embodiment, the system includes a chamber configured to contain a semiconductor wafer, a plasma generator, and a gas inlet, and an exhaust gas outlet. The gas inlet permits a controlled flow of a gas into the chamber through a wall of the chamber and the exhaust gas outlet permits exhausting of gas from the chamber. The system further includes a wafer support structure configured to support the semiconductor wafer during a doping or deposition process and an electromagnetic structure positioned within the chamber and at least partially surrounding an upper surface of the wafer support structure.
US10170304B1	Self-aligned nanotube structures The present disclosure generally relates to semiconductor structures and, more particularly, to self-aligned nanotube structures and methods of manufacture. The structure includes at least one nanotube structure supported by a plurality of spacers and an insulator material between the spacers and contacting the at least one nanotube structure.
US10170302B2	Superlattice lateral bipolar junction transistor A bipolar junction transistor includes an intrinsic base formed on a substrate. The intrinsic base includes a superlattice stack including a plurality of alternating layers of semiconductor material. A collector and emitter are formed adjacent to the intrinsic base on opposite sides of the base. An extrinsic base structure is formed on the intrinsic base.
US10170295B2	Flux residue cleaning system and method A flux residue cleaning system includes first and second immersion chambers, first and second spray chambers, and a drying chamber. The first immersion chamber softens an outer region of a flux residue formed around microbumps interposed between a wafer and a die when the wafer is immersed in a first chemical. The first spray chamber removes the outer region of the flux residue when the wafer is impinged upon by a first chemical spray in order to expose an inner region of the flux residue. The second immersion chamber softens the inner region of the flux residue when the wafer is immersed in a second chemical. The second spray chamber removes the inner region of the flux residue when the wafer is impinged upon by a second chemical spray in order to clean the wafer to a predetermined standard. The drying chamber dries the wafer.
US10170291B1	Apparatus for on-line monitoring particle contamination in special gases An apparatus for on-line monitoring particle contamination in special gas includes a single particle inductively coupled plasma mass spectrometry (sp-ICPMS) and a gas exchange device (GED). The gas exchange device is coupled to the sp-ICPMS. The gas exchange device includes a corrosion resistant outer tube and a polytetrafluoroethylene (PTFE) inner tube. A gap is formed between the corrosion resistant outer tube and the PTFE inner tube. The length of the PTFE inner tube is 1 meter or more. The argon gas flows in the gap, and the special gas flow in the PTFE inner tube.
US10170286B2	In-situ cleaning using hydrogen peroxide as co-gas to primary dopant or purge gas for minimizing carbon deposits in an ion source An ion source assembly and method is provided for improving ion implantation performance. The ion source assembly has an ion source chamber and a source gas supply provides a molecular carbon source gas such as toluene to the ion source chamber. A source gas flow controller controls a flow of the molecular carbon source gas to the ion source chamber. An excitation source excites the molecular carbon source gas, forming carbon ions and atomic carbon. An extraction electrode extracts the carbon ions from the ion source chamber, forming an ion beam. A hydrogen peroxide co-gas supply provides a predetermined concentration of hydrogen peroxide co-gas to the ion source chamber, and a hydrogen peroxide co-gas flow controller controls a flow of the hydrogen peroxide gas to the ion source chamber. The hydrogen peroxide co-gas decomposes within the ion source chamber and reacts with the atomic carbon from the molecular carbon source gas in the ion source chamber, forming hydrocarbons within the ion source chamber. An inert gas is further introduced and ionized to counteract oxidation of a cathode due to the decomposition of the hydrogen peroxide. A vacuum pump system removes the hydrocarbons from the ion source chamber, wherein deposition of atomic carbon within the ion source chamber is reduced and a lifetime of the ion source chamber is increased.
US10170285B2	Method of operating semiconductor manufacturing apparatus and semiconductor devices Some embodiments of the present disclosure provide a semiconductor manufacturing apparatus. The semiconductor manufacturing apparatus includes a chamber, a support and a liner. The chamber is configured for plasma processes and includes a chamber wall. The support is configured to hold a wafer in the chamber. The liner is configured to surround the support and includes a top side and a bottom side. The top side is detachably hung on the chamber wall. The bottom side includes gas passages for plasma particles to pass through the liner.
US10170283B2	Focus ring for plasma processing apparatus There is provided a focus ring formed without an adhesive that can suppress abnormal electric discharge and obtain uniform plasma environment in a circumferential direction in a plasma processing apparatus. The focus ring includes a plurality of arc-shaped members and a plurality of connecting members connecting the plurality of the arc-shaped members to form a ring shape without an adhesive, and is formed such that a thickness between an upper surface of the connecting member and a bottom surface of a concave fitting portion of the connecting member is greater than a thickness between an upper surface of the arc-shaped member and a bottom surface of a second depression of the arc-shaped member.
US10170281B2	System and method for plasma treatment using directional dielectric barrier discharge energy system A system including a directional dielectric barrier discharge (DBD) energy system, including a first electrode assembly configured to generate energy, including a first housing having a first fluid disposed in a first chamber, a first magnet, wherein the first magnet is configured to help guide or contain the energy generated by the first electrode assembly, and a first dielectric barrier.
US10170279B2	Multiple coil inductively coupled plasma source with offset frequencies and double-walled shielding A plasma reactor has an overhead multiple coil antennas including a parallel spiral coil antenna and symmetric and radial RF feeds and cylindrical RF shielding around the symmetric and radial RF feeds. The radial RF feeds are symmetrically fed to the plasma source.
US10170276B2	Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity The present disclosure provides one embodiment of an IC method. First pattern densities (PDs) of a plurality of templates of an IC design layout are received. Then a high PD outlier template and a low PD outlier template from the plurality of templates are identified. The high PD outlier template is split into multiple subsets of template and each subset of template carries a portion of PD of the high PD outlier template. A PD uniformity (PDU) optimization is performed to the low PD outlier template and multiple individual exposure processes are applied by using respective subset of templates.
US10170275B2	Cryogenic specimen processing in a charged particle microscope Surface modification of a cryogenic specimen can be obtained using a charged particle microscope. A specimen is situated in a vacuum chamber on a specimen holder and maintained at a cryogenic temperature. The vacuum chamber is evacuated and a charged-particle beam is directed to a portion of the specimen so as to modify a surface thereof. A thin film monitor is situated in the vacuum chamber and has at least a detection surface maintained at a cryogenic temperature. A precipitation rate of frozen condensate in the vacuum chamber is measured using the thin film monitor, and based on the measured precipitation rate, the surface modification is initiated when the precipitation rate is less than a first pre-defined threshold, or interrupted if the precipitation rate rises above a second pre-defined threshold.
US10170274B2	TEM phase contrast imaging with image plane phase grating Transmission microscopy imaging systems include a mask and/or other modulator situated to encode image beams, e.g., by deflecting the image beam with respect to the mask and/or sensor. The beam is modulated/masked either before or after transmission through a sample to induce a spatially and/or temporally encoded signal by modifying any of the beam/image components including the phase/coherence, intensity, or position of the beam at the sensor. For example, a mask can be placed/translated through the beam so that several masked beams are received by a sensor during a single sensor integration time. Images associated with multiple mask displacements are then used to reconstruct a video sequence using a compressive sensing method. Another example of masked modulation involves a mechanism for phase-retrieval, whereby the beam is modulated by a set of different masks in the image plane and each masked image is recorded in the diffraction plane.
US10170273B2	Charged particle beam device, and method of manufacturing component for charged particle beam device The purpose of the present invention is to provide a charged particle beam device that exhibits high performance due to the use of vanadium glass coatings, and to provide a method of manufacturing a component for a charged particle beam device. Specifically provided is a charged particle beam device using a vacuum component characterized by comprising a metal container, the interior space of which is evacuated to form a high vacuum, and coating layers formed on the surface on the interior space-side of the metal container, wherein the coating layers are vanadium-containing glass, which is to say an amorphous substance. Coating vanadium glass onto walls of a space where it is desirable to form a high vacuum, for example walls in the vicinity of an electron source, reduces gas discharge in the vicinity of the electron source, and the getter effect of the coating layer induces localized evacuation and enables the formation of an extremely high vacuum, even in spaces having a complex structure, without providing a large high-vacuum pump.
US10170272B2	System and method for use in electron microscopy An electron beam shaping unit for use in electron beam column and a method for designing thereof is presented. The electron beam shaping unit is configured for affecting electron beams of high density or strong electron-electron repulsion. These 5 beams can always be modeled with multi electron wave function. The electron beam shaping unit comprises a mask unit configured for affecting propagation of electrons therethrough to thereby form a propagating electron beam having, at far field, radial shape as determined by multi-electron non-linear function being an eigen function determined by a multi-electron Hartree-Fock Hamiltonian.
US10170267B2	Current fuse Provided is a current fuse that can improve the rating while also preventing explosive scattering of metal in association with arc discharge and enabling reliable cutting off of a circuit. The current fuse (1) includes an insulating substrate (2), a main fuse element (3) disposed on the insulating substrate (2), and a sub-fuse element (4) disposed on the insulating substrate (2) and having a higher melting point than the main fuse element (3). The main fuse element (3) and the sub-fuse element (4) are connected in parallel.
US10170265B2	Leakage current protection device A leakage current protection device includes an electrical and mechanical assembly which includes: a circuit board; moving contact plates; an auxiliary switch; a reset shaft, having a hook in its lower portion, a bottom end of the reset shaft being set against one end of a reset spring, another end of the reset spring being set against the base; a disconnect mechanism, having a hook at its upper portion to engage with the hook of the reset shaft in a vertical direction; a trip coil and a trip plunger disposed on a side of the disconnect mechanism, where the disconnect mechanism is driven by the trip plunger to move horizontally. The disconnect mechanism further includes a pushing end that controls the auxiliary switch and lifting levers that control the moving contact plates.
US10170262B2	Micro-electro-mechanical system (MEMS) and related actuator bumps, methods of manufacture and design structures Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are provided. The method of forming a MEMS structure includes forming fixed actuator electrodes and a contact point on a substrate. The method further includes forming a MEMS beam over the fixed actuator electrodes and the contact point. The method further includes forming an array of actuator electrodes in alignment with portions of the fixed actuator electrodes, which are sized and dimensioned to prevent the MEMS beam from collapsing on the fixed actuator electrodes after repeating cycling. The array of actuator electrodes are formed in direct contact with at least one of an underside of the MEMS beam and a surface of the fixed actuator electrodes.
US10170260B2	Electromagnetic relay An electromagnetic relay includes a base, an electromagnet block having a spool with a through hole opening at a flange portion thereof and mounted on an upper surface of the base, a movable iron piece, a movable contact piece rotatable integrally with the movable iron piece, a movable contact fixed to a free end of the movable contact piece, and a fixed contact fixed to a fixed contact terminal and contactable with and separable from the movable contact along with rotation of the movable contact piece. Insulating ribs project from an inward facing surface of a spacer integrally formed with the movable iron piece and an outward facing surface of the flange portion respectively such that the insulating ribs intercept a straight line connecting a magnetic pole portion projecting through the through hole and the fixed contact or the fixed contact terminal with a shortest distance.
US10170259B2	System for controlling operation of a contactor using a high side sense circuit and a low side sense circuit A system for controlling operation of a contactor is provided. The system stops outputting a control signal to open the contactor, and then measures a low side sense signal from a low side sense circuit electrically coupled to a low side end of a contactor coil, or a high side sense signal from a high side sense circuit that is electrically coupled to a high side end of the contactor coil, to determine whether the contactor has a closed operational position, and if not, the system stops outputting another control signal to open the contactor.
US10170258B2	Method for controlling a change of operating state of an electromechanical component and corresponding device A method is for controlling a change of an electromechanical component between a first operating state and a second operating state. The method may include changing from the first operating state to the second operating state by generating a first current flowing through the electromechanical component, prior to the generation of the first current, charging a capacitor, and simultaneously with the generation of the first current, partial discharging the capacitor through the electromechanical component to cause an additional current to flow in the electromechanical component, the additional current being added to the first current. The method may include changing from the second operating state to the first operating state by generating a second current flowing in a direction opposite to the first current in the electromechanical component, and prior to the flowing of the second current, discharging the capacitor.
US10170256B2	Circuit breaker equipped with an extensible exhaust cover The invention relates to a medium-, high-, or very high-voltage circuit breaker, comprising at least one arc-control chamber and an outer casing in which the arc-control chamber is arranged. The circuit breaker includes a discharge cap (40) forming a portion of the outer wall external of the arc-control chamber (12), the discharge cap being situated inside the outer casing and internally defining a gas-flow chamber (31). In the invention, the discharge cap (40) includes at least one portion (40′) that is movable under the effect of the gas pressure in the gas-flow chamber (31), in such a manner that its volume is extensible.
US10170253B2	Key scissor-type connecting element with an elastic contact part A key structure includes a base plate, a triggering element, a keycap and a scissors-type connecting element. The base plate includes an open-type hook and a bulge. The scissors-type connecting element includes a first frame and a second frame. The first frame includes a first base post and an elastic contact part. Due to the structure of the open-type hook, the first frame can be easily assembled with the base plate. Moreover, it is not necessary to retain the gap between the first base posit and the open-type hook. While the first frame is swung, the elastic contact part is pushed by the corresponding bulge. Consequently, the first base post is not detached from the base plate.
US10170251B2	Carbon nanosheets A combined hydrothermal and activation process that uses hemp bast fiber as the precursor to achieve graphene-like carbon nanosheets, a carbon nanosheet including carbonized crystalline cellulose, a carbon nanosheet formed by carbonizing crystalline cellulose, a capacitative structure includes interconnected carbon nanosheets of carbonized crystalline cellulose, a method of forming a nanosheet including carbonizing crystalline cellulose to create carbonized crystalline cellulose. The interconnected two-dimensional carbon nanosheets also contain very high levels of mesoporosity.
US10170248B2	Structure and methods of forming the structure Capacitors, apparatus including a capacitor, and methods for forming a capacitor are provided. One such capacitor may include a first conductor a second conductor above the first conductor, and a dielectric between the first conductor and the second conductor. The dielectric does not cover a portion of the first conductor; and the second conductor does not cover the portion of the first conductor not covered by the dielectric.
US10170242B2	Composite electronic component, method of manufacturing the same, board for mounting thereof, and packaging unit thereof A composite electronic component composed of a composite body including a capacitor and an electrostatic discharge (ESD) protection device coupled to each other. The capacitor includes a ceramic body in which a plurality of dielectric layers and internal electrodes are stacked with a respective dielectric layer therebetween. The ESD protection device includes first and second electrodes disposed on the ceramic body, a discharging part disposed between the first and second electrodes, and a protective layer disposed on the first and second electrodes and the discharging part. An input terminal disposed on a first end surface of the composite body and is connected to internal electrodes and the first and second electrodes. A ground terminal formed on a second end surface of the composite body and is connected to internal electrodes and the first and second electrodes.
US10170237B2	Plate-shaped leakage structure as an insert in a magnetic core In various aspects, a plate-shaped leakage structure as an insert in a magnetic core of an inductive component, a magnetic core having a plate-shaped leakage structure, and an inductive component. In illustrative embodiments, a plate-shaped leakage structure is provided as an insert in a magnetic core, which is passed through, along the thickness direction thereof, by at least one spacer having a very low magnetic permeability (as opposed to the rest of the material of the leakage structure). In a magnetic core according to an aspect, core legs are arranged above opposite bearing surfaces of the plate-shaped leakage structure, the plate-shaped leakage structure providing a leakage path between the core legs.
US10170233B2	Coil component A coil component includes a core formed by a magnetic material, a coil embedded in the core, a part of a terminal portion of the coil protruded from a side surface of the core, and a tabular terminal, a part thereof protruded from the side surface of the core and partly connected with the protruded part of the terminal portion of the coil. The protruded part of the terminal portion of the coil and the protruded part of the tabular terminal are respectively bent toward the bottom surface side of the core along the side surface of the core, and the protruded and bent part of the terminal portion of the coil is arranged between the protruded and bent part of the tabular terminal and the core.
US10170232B2	Toroid inductor with reduced electromagnetic field leakage A toroid inductor includes a plurality of first turns configured in a first ring shape and a plurality of second turns configured in a second ring shape. The plurality of first turns includes a plurality of first upper interconnects, a plurality of first lower interconnects, and a plurality of first vias coupled to the plurality of first upper interconnects and to the plurality of first lower interconnects. The plurality of second turns is at least partially intertwined with the plurality of first turns. The plurality of second turns includes a plurality of second upper interconnects, a plurality of second lower interconnects, and a plurality of second vias coupled to the plurality of second upper interconnects and to the plurality of second lower interconnects.
US10170230B2	Power supply apparatus A power supply apparatus capable of appropriately supplying electrical power to a power transmission coil even if a foreign object is heated during power supply. The power supply apparatus (100) is provided with a power supply coil (103a) opposing a power-receiving unit (153) provided to a vehicle and supplying power to the power-receiving unit (153), and a casing (103b) accommodating the power supply coil (103a). In the casing (103b), a first cover (202) is formed on a surface of the casing (103b) opposing the power-receiving unit (153), and a second cover (203) opposing the first cover (202) is arranged between the first cover (202) and the power supply coil (103a).
US10170229B2	Chip electronic component and board having the same There is provided a chip electronic component including: an insulating substrate; a first coil part disposed on one surface of the insulating substrate; a second coil part disposed on the other surface of the insulating substrate opposing one surface of the insulating substrate; a via connecting the first and second internal coil parts to each other while penetrating through the insulating substrate; first and second via pads disposed on one surface and the other surface of the insulating substrate, respectively, so as to cover the via; and a first dummy pattern disposed in a region of one surface of the insulating substrate adjacent to the first via pad and a second dummy pattern disposed in a region of the other surface of the insulating substrate adjacent to the second via pad.
US10170225B2	Permanent magnet and rotating machine including the same A permanent magnet having a periodic structure with the concentrations of Fe and T (T is one or more transition metal elements with Co or Ni as necessity) changing alternately, wherein, the concentrations change with a period of 3.3 nm or less and the concentration difference of Fe in the concentration change is 5 at % or more. The permanent magnet has a high saturation magnetization Is and coercivity HcJ and can be prepared even without rare earth element(s) R.
US10170222B2	Fitting with a collar for a power transmission system The present disclosure provides a fitting for a power transmission system. The fitting may include a first end configured to couple to an end of an insulator, a second end configured to couple to a power line, a collar located between the first end and the second end, and a neck located between the collar and the first end. An outer diameter of the collar may be greater than an outer diameter of the neck. A power transmission system with a fitting and corona ring assembly is also provided.
US10170218B2	Ignition suppression circuiting technology A cable system is provided which is configured with both electric wires and a fluid conduit running through the axial passage of a surround sheath of the cable. The system allows for communication of electricity over the wires for electrical circuits and concurrent communication of a fire ignition suppressant fluid or gas through the fluid conduit, to all points in an electric circuit using the cable. Suppressant chambers may be located in junction boxes in such circuits to locally extinguish electrical fires.
US10170208B2	Electromagnetic coil bobbin used in reactor as well as inner bobbin and outter shell The invention discloses an electromagnetic coil bobbin used in reactor as well as an inner bobbin and an outer shell thereon, wherein more than one cut-off grooves are provided on the inner bobbin and the outer shell and uniformly distributed on corresponding inner bobbin or outer shell such that the inner bobbin and the outer shell of which the material of the main body is metal have excellent high-temperature resistance and avoid generation of induced eddy current, and such that the electromagnetic coil can generate a more uniform magnetic field while operating, thus achieving technical effects of reducing or avoiding eccentric wear, reducing or avoiding partial excessive wear, etc., and realizing the objectives of improving and raising movement performance of CRDM.
US10170205B2	Multi-dimensional surgical safety countermeasure system A multi-dimensional surgical safety countermeasure system and method for using automated checklists to provide information to surgical staff in a surgical procedure. The system and method involve using checklists and receiving commands through the prompts of the checklists to update the information displayed on the display to guide the performance of a medical procedure.
US10170203B1	Method and software for a web-based platform of comprehensive personal health records that enforces individualized patient hierarchies of user permissions and detects gaps in patient care The invention is a method for an unbound, interoperable, web-based software platform, comprising comprehensive personal health records (PHRs) of patients, enforcing individualized patient hierarchies of user permissions when creating, managing, accessing, updating, exchanging, and consolidating information, offering unique capabilities for detecting gaps in care, coordinating care, and prompting provider compliance with practice guidelines and government regulations.The Platform comprises four encrypted, firewall protected layers that together support Platform capabilities. First, the Platform is distinguished from conventional EHRs and tethered PHRs by individualized patient hierarchies of user permissions in the application layer, controlling disclosures of data to authorized users. Second, the Platform is distinguished by scanning of data and application layers for gaps in patient care and alerting relevant users. Third, the Platform is distinguished by tagging data with individualized patient hierarchies of user permissions, filtering data disclosures to authorized users and impeding data handoffs to unauthorized users.
US10170200B2	Memory device and method for testing a memory device According to one embodiment, a memory device is provided including a plurality of data word memories, a test controller configured to, for each data word memory, read a data word stored in the data word memory, check the read data word to detect an error of the memory device, determine a complementary data word of the data word, store the complementary data word in the data word memory, read the complementary data word from the data word memory and check the read complementary data word to detect an error of the memory device.
US10170198B2	Data storage and method of operating the same A data storage may include at least one nonvolatile memory device and a controller operatively connected to the at least one nonvolatile memory device. The controller is configured to receive binary data from a host through a side-band interface. The controller is configured to execute the binary data according to a request from the host to execute a test operation. A test operation with respect to the data storage may be executed through a side-band interface.
US10170197B2	Semiconductor device and operating method thereof A semiconductor device includes: first to Nth non-volatile memory areas, each including a plurality of cells positioned at cross points between row lines and column lines; a storage circuit including a plurality of unit latches suitable for storing data transferred from the first to Nth non-volatile memory areas; and an operation control circuit suitable for controlling setup information of first to Nth operation modes to be programmed in the first to Nth non-volatile memory areas, respectively, during a rupture mode, and controlling a data transferred from the first non-volatile memory area to be written in the unit latches and controlling a data transferred from one of the second to Nth non-volatile memory areas to be over-written in the unit latches in response to an operation mode change request, during a boot-up mode.
US10170193B2	Apparatus and methods of operating memory for negative gate to body conditions Methods of operating a memory, and apparatus so configured, include applying a first voltage level to a first voltage node connected to a first end of a string of series-connected memory cells, applying a second voltage level to a second voltage node connected to a second end of the string, applying a third voltage level less than the first and second voltage levels to a control gate of a first memory cell of the string while applying the first and second voltage levels to the first and second voltage nodes, and applying a fourth voltage level less than the third voltage level to a control gate of a second memory cell of the string while applying the third voltage level to the control gate of the first memory cell, wherein the first memory cell is closer to the first voltage node than the second memory cell.
US10170192B2	Nonvolatile memory device A nonvolatile memory device including a memory cell array having a plurality of planes; a plurality of page buffers arranged corresponding to each of the plurality of planes; and a control logic circuit configured to transmit a bit line setup signal to each of the plurality of page buffers. Each of the plurality of page buffers includes a precharge circuit configured to precharge a sensing node and a bit line in response to the bit line setup signal, and a shutoff circuit configured to perform a bit line shutoff operation in response to a bit line shutoff signal. The control logic circuit is configured to control a transition time when a level of the bit line setup signal is changed according to a gradient of the bit line shutoff signal which is changed from a first level to a second level.
US10170189B2	Apparatus and methods including source gates Apparatus and methods are disclosed, such as an apparatus that includes a string of charge storage devices associated with a pillar (e.g., of semiconductor material), a source gate device, and a source select device coupled between the source gate device and the string. Additional apparatus and methods are described.
US10170184B1	Resistive memory apparatus and setting method for resistive memory cell thereof A resistive memory apparatus and a setting method for a resistive memory cell thereof are provided. The setting method includes: performing a first setting operation on the resistive memory cell, and performing a first verifying operation on the resistive memory cell after the first setting operation is finished; determining whether to perform a first resetting operation on the resistive memory cell according to a verifying result of the first verifying operation, and performing a second verifying operation on the resistive memory cell after the first resetting operation is determined to be performed and is finished; and determining whether to perform a second resetting operation on the resistive memory cell according to a verifying result of the second verifying operation, and performing a third verifying operation on the resistive memory cell after the second resetting operation is determined to be performed and is finished.
US10170183B1	Method of storing and retrieving data for a resistive random access memory (RRAM) array with multi-memory cells per bit Some embodiments include methods of storing and retrieving data for an RRAM array. The array is subdivided into a plurality of memory bits, with each memory bit having at least two memory cells. A memory bit is programmed by simultaneously changing resistive states of all memory cells within the memory bit. The memory bit is read by determining summed current through all memory cells within the memory bit. Some embodiments include RRAM having a plurality of memory cells. Each of the memory cells is uniquely addressed through a bitline/wordline combination. Memory bits contain multiple memory cells coupled together, with the coupled memory cells within each memory bit being in the same resistive state as one another.
US10170181B2	Variable resistance memory device including bidirectional switch, memory system including the same, and operating method thereof A memory device includes: a cell array connected to a plurality of word lines and bit lines, the cell array including a plurality of memory cells each including a variable resistance element and a bidirectional selection element; a selection circuit that selects a selected word line and a selected bit line; and control logic that controls the selection circuit such that in a stand-by state, wherein the word lines and the bit lines which are connected to memory cells of a first area of the cell array are maintained in a discharge state, and the word lines and bit lines which are connected to memory cells of a second area of the cell array are maintained in a precharge state.
US10170179B2	Data storage device and operating method for data storage device A data storage device with optimized write operations is provided. A data storage device uses a flash memory having K dies. Each die has N planes. Each plane has multiple blocks. Each block has multiple pages. Within one block, each word line is shared by M pages. K, N and M are integers larger than 1. The controller of the data storage device writes first L pages of data that a host issues in order into L pages of a first die. L is M*N. The L pages of the first die are provided by N planes of the first die with each plane of the first die using one block to provide M pages sharing the same word line. The first L pages of data are written to the N planes of the first die in an interleaved way.
US10170178B2	Secure off-chip MRAM Techniques for improving the security of nonvolatile memory such as magnetic random access memory (MRAM) are provided. In one aspect, a method of operating a nonvolatile memory chip is provided. The method includes: overwriting data stored on the nonvolatile memory chip automatically upon the nonvolatile memory chip being powered on. For example, all bits in the nonvolatile memory chip can be written to either i) a predetermined data state (e.g., a logic 1 or a logic 0) or ii) a random data state. A system is also provided that includes: a nonvolatile memory chip; and a writing circuit configured to overwrite data stored on the nonvolatile memory chip automatically upon the nonvolatile memory chip being powered on.
US10170175B2	Semiconductor device comprising memory devices each comprising sense amplifier and memory cell A memory device with low power consumption is provided. The memory device includes a sense amplifier, bit lines, memory cells, and first transistors. The bit lines are provided over a layer comprising the sense amplifier. The memory cells are provided over a layer comprising the bit lines. The memory cell includes a second transistor and a capacitor. The sense amplifier and the bit lines are electrically connected to each other through the first transistors. The sense amplifier may include at least one layer of a conductor.
US10170170B2	Memory control component with dynamic command/address signaling rate In a multirank memory system in which the clock distribution trees of each rank are permitted to drift over a wide range (e.g., low power memory systems), the fine-interleaving of commands between ranks is facilitated through the use of techniques that cause each addressed rank to properly sample commands intended for that rank, notwithstanding the drift. The ability to perform such “microthreading” provides for substantially enhanced memory capacity without sacrificing the performance of single rank systems. This disclosure provides methods, memory controllers, memory devices and system designs adapted to these ends.
US10170169B2	Apparatuses and methods involving accessing distributed sub-blocks of memory cells Apparatuses and methods involving accessing distributed sub-blocks of memory cells are described. In one such method, distributed sub-blocks of memory cells in a memory array are enabled to be accessed at the same time. Additional embodiments are described.
US10170161B2	Semiconductor memory device and test method therefor A test method for a semiconductor memory device having a plurality of memory cells arranged in a matrix form, the test method including writing first data into a plurality of memory cells, while a plurality of word lines disposed in the columns of the memory cells are deselected, driving the low-potential side bit line of a bit line pair in the selected column, which is among a plurality of bit line pairs disposed in the columns of the memory cells, to a negative voltage level in accordance with second data complementary to the first data, and reading the data written into the memory cells.
US10170156B2	Systems, devices and methods for video storage Systems, devices and methods are provided for video storage. For example, video data is acquired for generating buffer zone data, the buffer zone data beginning with an I frame or an R frame of the video. At least part of the buffer zone data is stored to a storage fragment in a storage area. In response to the storage fragment being newly opened and a first frame of the at least part of the buffer zone data being an R Frame, an I Frame with reference relation to the first frame is inserted to the storage fragment, the R Frame corresponding to a picture frame referring to the I Frame.
US10170153B2	Auto-adjusting instructional video playback based on cognitive user activity detection analysis An approach is provided for auto-adjusting instructional video playback based on cognitive user activity detection analysis. The approach includes, for instance, providing for playback an instructional video, including a series a steps to accomplish one or more tasks, and monitoring, during playback of the instructional video, progress of a user through the series of steps. The monitoring includes, at least in part, video monitoring the user, and using an activity detection analysis to detect, based on the monitoring, actions by the user as the user progresses through the series of steps. Playback of the instructional video is automatically adjusted based on the activity detection analysis to match the progress of the user through the series of steps.
US10170142B1	System and method for compensating for radial incoherence associated with reading servo sectors A system for compensating RI while reading servo data from a rotating storage medium is provided and includes an equalizer, a Viterbi detector, and a servo control module. The equalizer receives a digital signal including a bit sequence of the servo data read from the rotating storage medium and equalizes the digital signal via filters. Some of the filters are to phase rotate the digital signal to generate phase rotated signals. The Viterbi detector operates based on a Viterbi state machine, which includes main branches having sub-branches, where: each of the main branches is to receive the phase rotated signals respectively at corresponding ones of the sub-branches; and the Viterbi detector is to determine branch metrics for each of the sub-branches, determine a minimum branch metric for each of the main branches, and process the minimum branch metric using an add-compare-select process to determine a most likely received bit sequence.
US10170140B2	Waveguide having mode converter for heat-assisted magnetic recording device A write head comprises a waveguide core configured to receive light emitted in a crosstrack direction from a light source at a fundamental transverse electric (TE00) mode. The waveguide core comprises a first turn that receives the light in the crosstrack direction redirects the light to an opposite crosstrack direction and a second turn that redirects the light to a direction normal to a media-facing surface of the write head. The waveguide core comprises a straight section that couples the first and second turns and a branched portion extending from the straight section. The branched portion is configured to convert the light to a higher-order (TE10) mode. A near-field transducer at the media-facing surface is configured to receive the light at the TE10 mode from the waveguide and directs surface plasmons to a recording medium in response thereto.
US10170138B2	Tape apparatus having an array of write transducers each having at least three layers of coils A magnetic recording tape writing apparatus includes an array of write transducers extending along a common tape bearing surface. Each of the write transducers has a lower pole having a lower pole tip, a lower coil layer above the lower pole, an intermediate coil layer above the lower coil layer, and an upper coil layer above the intermediate coil layer. An upper pole is positioned above the upper coil layer, the upper pole having an upper pole tip. In one embodiment, a nonmagnetic write gap is positioned between the pole tips, a plane of deposition of the write gap extending between the intermediate coil layer and the lower coil layer. In another embodiment, a nonmagnetic write gap is positioned between the pole tips, a plane of deposition of the write gap extending between the intermediate coil layer and the upper coil layer.
US10170134B2	Method and system of acoustic dereverberation factoring the actual non-ideal acoustic environment A system, article, and method of acoustic dereverberation factoring the actual non-ideal acoustic environment.
US10170128B2	Method and apparatus for processing temporal envelope of audio signal, and encoder A method and an apparatus for processing a temporal envelope of an audio signal, and an encoder are disclosed. When multiple temporal envelopes are solved, continuity of signal energy can be well maintained, and in addition, complexity of calculating a temporal envelope is reduced. The method includes: obtaining a high-band signal of the current frame audio signal according to the received current frame audio signal; dividing the high-band signal of the current frame signal into M subframes according to a predetermined temporal envelope quantity M, where M is an integer that is greater than or equal to 2; calculating a temporal envelope of each of the subframes; performing windowing on the first subframe of the M subframes and the last subframe of the M subframes by using an asymmetric window function; and performing windowing on a subframe except the first subframe and the last subframe of the M subframes.
US10170121B2	Speech recognition system and method for operating a speech recognition system with a mobile unit and an external server A voice recognition system having a mobile unit and an external server. The mobile unit includes a memory unit that stores voice model data having at least one expression set with expressions, a voice recognition unit, and a data interface that can set up a data-oriented connection to a data interface of the external server. The external server includes a database with event data having associated time data and expressions. The external server can, by comparing the time data associated with the event data with a current time, produce updated data that includes at least expressions associated with the event data of the database. The update data can be transmitted to the mobile unit. The update data can also be taken as a basis for adding the transmitted expressions to the expression set. Also disclosed is a method for operating a voice recognition system.
US10170120B2	Call management system and its speech recognition control method A speech recognition server has a speech recognition engine, and a mode control table to hold a speech recognition mode for each call. The speech recognition engine has a mode management unit to designate a speech recognition mode for a decoder, and an output analysis unit to analyze recognition result data speech-to-text converted by speech recognition. The output analysis unit designates the speech recognition mode for the mode management unit in accordance with result of analysis of the recognition result data speech-to-text converted by the speech recognition. The mode management unit designates the speech recognition mode for the decoder in accordance with the designation with the output analysis unit. Upon speech recognition of call data, it is possible to suppress hardware resource consumption while improve users' satisfaction.
US10170119B2	Identifying speaker roles in a streaming environment A streams controller monitors multiple data streams with speech of a conversation with multiple speakers and uses text analytics and diaritization to identify speakers by their role in the conversation. Diaritization is applied to the audio of a data stream to associate a speaker with an SSRC from the data stream and a speaker identification (ID). The streams controller then runs text analytics on a text version of the speaker's speech to determine a speaker role for the speaker. The speaker role can be used to efficiently monitor conversations in a data stream to provide additional services. For example, speaker role can be used to analyze calls in a call center and provide services such as a transcript of conversations or enhanced customer support.
US10170115B2	Linear scoring for low power wake on voice Key phrase detection techniques for applications such as wake on voice are discussed include performing a vectorized operation on a multiple element acoustic score vector for a current time instance including a single state rejection model score and scores for a multiple state key phrase model and a multiple element state score vector for a previous time instance including a previous state score for the single state rejection model and previous state scores for the multiple state key phrase model to generate a multiple element score summation vector and a second vectorized operation on the multiple element score summation vector to determine a multiple element state score vector for the current time instance. The multiple element state score vector for the current time instance may then be evaluated to determine whether received audio input includes a key phrase corresponding to the multiple state key phrase model.
US10170107B1	Extendable label recognition of linguistic input An approach to extending the recognizable labels of a label recognizer makes use of an encoding of linguistic inputs and label attributes into comparable vectors. The encodings may be determined with artificial neural networks (ANNs) that are jointly trained, and a comparison between the encoding of a sentence input and the encoding of an intent attribute vector may use a fixed function, which does not have to be trained. The encoding of label attributes can generalize permitting adding of a new label via corresponding attributes, thereby avoiding the need to immediately retrain a label recognizer with example inputs.
US10170106B2	Parameter collection and automatic dialog generation in dialog systems Natural speech dialog system and methods are disclosed. In one example, a method includes identifying a dialog system intent associated with the speech input based on at least one predetermined intent keyword, the dialog system intent having required intent parameters, determining whether data for all required intent parameters of the dialog system are available, based on the determination, selectively initiating a parameter collection dialog associated with the dialog system intent, the parameter collection dialog being operable to collect data for the required parameters not otherwise available to the dialog system intent, and based on the dialog system intent and one or more required parameters, generating an action instruction.
US10170103B2	Discriminative training of a feature-space transform A method, a system, and a computer program product are provided for discriminatively training a feature-space transform. The method includes performing feature-space discriminative training (f-DT) on an initialized feature-space transform, using manually transcribed data, to obtain a pre-stage trained feature-space transform. The method further includes performing f-DT on the pre-stage trained feature-space transform as a newly initialized feature-space transform, using automatically transcribed data, to obtain a main-stage trained feature-space transform. The method additionally includes performing f-DT on the main-stage trained feature-space transform as a newly initialized feature-space transform, using manually transcribed data, to obtain a post-stage trained feature-space transform.
US10170101B2	Sensor based text-to-speech emotional conveyance A computer-implemented method includes determining, by a first device, a current emotional state of a user of the first device. The current emotional state is based, at least in part, on real-time information corresponding to the user and relates to a textual message from the user. The computer-implemented method further includes determining, by the first device, a set of phonetic data associated with a plurality of vocal samples corresponding to the user. The computer-implemented method further includes dynamically converting, by the first device, the textual message into an audio message. The audio message is converted from the textual message into the audio message based, at least in part, on the current emotional state and a portion of the set of phonetic data that corresponds to the current emotional state. A corresponding computer system and computer program product are also disclosed.
US10170098B1	Sound effect generation device for vehicles A vehicle sound effect generation apparatus includes a running state detecting unit that detects a running state of a vehicle; a lateral input amount setting unit that sets, based on the running state detected by the running state detecting unit, a lateral input amount in which a physical amount relating to at least one of a movement of the vehicle in a width direction and a movement of the vehicle in a turning direction is a parameter; an adjustment wave sound selector that selects one or more half-order adjustment wave sounds having a half-order frequency component, based on the lateral input amount; and a sound effect generation unit that synthesizes a fundamental wave sound having a fundamental frequency component with the one or more half-order adjustment wave sounds selected.
US10170091B1	Electronic wind instrument, method of controlling the electronic wind instrument, and computer readable recording medium with a program for controlling the electronic wind instrument An electronic wind instrument is provided, which is capable of representing a wide range of performances using a tonguing operation. The electronic wind instrument has at least one sensor, a sound source for generating a tone, and a controller. The controller controls a tonguing performance detecting process for detecting a tonguing performance played by the player based on the output value from the one sensor, and a tone muting process for muting the tone output from the speaker in accordance with the lip position of the player determined in the lip position determining process, while the tonguing performance is being detected in the tonguing performance detecting process.
US10170087B2	Apparatus for sounding a string of stringed instrument The inventive device relates to musical instruments. Use of this invention in a stringed instrument ensures a simpler apparatus allowing for sounding a string of the stringed instrument in the same way as a musician does. The apparatus for sounding a string of stringed instrument comprises: a first servo motor designed for securing a mediator to an output shaft thereof and for rotating the mediator in opposing directions for ensuring an interaction of the mediator with the string; a guide disposed substantially orthogonally to the string plane of the stringed instrument and designed for moving, along one side thereof, the first servo motor from or to the string; a second servo motor mounted at the reverse side of the guide; a transmission mechanism which first end being coupled with an output shaft of the second servo motor and which second end being connected to the first servo motor.
US10170086B2	Support device for pivotal member of keyboard instrument and method of manufacturing the same A support device for a pivotal member of a keyboard instrument, in which opposite ends of a pivotal pin fixed to a pivotal member can be each properly positioned in the center of a pin hole, to thereby enable the pivotal member to perform efficient and stable pivotal motion. The support device that pivotally supports the pivotal member pivotally moved by key depression includes a flange body including two support walls opposed to each other with a predetermined spacing therebetween, and two pin holes which are formed in the respective support walls and in which opposite ends of the pivotal pin are inserted, respectively, and two bearings fixed in the pin holes in an inserted state and having opposite ends of the pivotal pin inserted therein, for pivotally supporting the pivotal. Each bearing is formed by a braid formed in a hollow cylindrical shape.
US10170081B2	Image correction device and video content reproduction device An image correction device generates a corrected image for a viewer with low vision, by adding excessive emphasis which reduces image quality as perceived by a viewer having normal eyesight, to at least one of luminance gradation, luminance contour, and color tone of a pre-correction image. The image correction device includes: a controller which specifies, in a low vision mode which is an image correction mode for the viewer with low vision, a parameter that represents an amount of correction greater than an upper limit of an amount of correction which does not reduce the image quality as perceived by the viewer having normal eyesight when the pre-correction image is corrected; and an image processor which generates the corrected image by correcting the at least one of the luminance gradation, the luminance contour, and the color tone of the pre-correction image with the amount of correction represented by the parameter.
US10170079B2	Display apparatus and display panel driving method thereof A method of driving a display panel including a plurality of pixels including a red (R), green (G), blue (B), and white (W) sub-pixels is provided. The method includes receiving image data, converting RGB data included in the image data into RGBW data, and driving the display panel based on the converted RGBW data. The converting includes converting the RGB data into YCbCr data and determining a W value of the RGBW data based on a Y value of the converted YCbCr data.
US10170078B2	Method of processing optical coherence tomographic image and apparatus for performing the method Provided are a method and an apparatus for processing an optical coherence tomographic image. The method of processing an optical coherence tomographic image includes obtaining an optical coherence tomographic image by irradiating light to an object; generating a color space map based on the obtained optical coherence tomographic image; normalizing data of the obtained optical coherence tomographic image; realigning the normalized data of the optical coherence tomographic image; performing a tone mapping on the realigned data of the optical coherence tomographic image; and generating a color image by mapping the data of the optical coherence tomographic image on which the tone mapping is performed, by using the generated color space map.
US10170069B2	Shift register, driving method thereof and gate driving device having stable output A shift register includes an input circuit, a first reset circuit, an output circuit, a second reset circuit and a first pull-down control circuit. The input circuit may control a voltage of the first node according to a reset signal from a reset signal terminal. The first reset circuit may reset the voltage of the first node according to the reset signal from the reset signal terminal. The output circuit may control an output signal of a signal output terminal according to the voltage of the first node. The second reset circuit may reset the voltage of the first node and the output signal according to a voltage of a second node. The first pull-down control circuit may control the voltage of the second node according to the voltage of the first node based on a first auxiliary voltage signal and a second auxiliary voltage signal, wherein a phase of the first auxiliary voltage signal is opposite to a phase of the second auxiliary voltage signal, and each duty cycles is 50%.
US10170068B2	Gate driving circuit, array substrate, display panel and driving method The embodiments of the present disclosure provide a gate driving circuit, an array substrate, a display panel and a driving method. The gate driving circuit comprises: at least a Gate driver on Array (GOA) unit GOAn and a GOA unit GOAn+m, an output terminal of GOAn being connected to an input terminal of GOAn+m, an output terminal of GOAn+m is connected to a reset terminal of GOAn; and an electrical leakage compensation module having two input terminals connected to output terminals of GOAn and GOAn+m, respectively, a control terminal connected to a signal line, and an output terminal connected to a Pull-Up (PU) node of GOAn+m, and configured to compensate for a voltage at the PU node of GOAn+m in response to receipt of the electrical leakage compensation signal VLHB. According to the embodiments of the present disclosure, an electrical leakage compensation module is added between two cascaded GOA units for compensating for a voltage decrease due to electrical leakage by charging the GOA unit at the next stage.
US10170067B2	GOA electric circuit based on LTPS semiconductor thin-film transistors A GOA electric circuit introduces a resistor and a timing signal, which are used to replace a second capacitor in the existing skills. One terminal of the resistor is connected to a constant high voltage level and the other terminal thereof is connected to a gate electrode of a ninth thin-film transistor. A source electrode of the ninth thin-film transistor is electrically connected to the timing signal. In the stage maintaining the output terminal at low voltage level, the voltage level of the second node can be changed between high and low voltage levels as the timing signal is changed, and the voltage level of the second node is pulled down in a specific frequency. This effectively prevents the second node from being at high voltage level for a long time and avoids the problem of threshold voltage shifting, and therefore improves the stability of GOA electric circuit.
US10170066B2	Driving method and driving module for gate scanning line and TFT-LCD display panel The present disclosure discloses a driving method and a driving system for gate scanning line and a TFT-LCD display panel, the method includes: driving the gate scanning lines line by line through the CKV waveform of variable frequency of gate driver; from the first gate scanning line to the middle line of the gate scanning line, the opening time is gradually increased; from the middle line of the gate scanning line to the N-th line of the scanning line, the opening time is gradually decreased. the scanning method using unequal time of each line of gate scanning line of each line of the present disclosure, the charging time of the middle line is the longest, the charging time is gradually decreased from the middle line to both sides, increasing the charging time of the TFT-LCD of the middle region in the display panel and optimizing the overall quality performance.
US10170062B2	Display panel, display and a method of raising a pure color image brightness of four primary colors The present invention provides a method of raising a pure color image brightness of four primary colors, employed to raise a display brightness of a four primary colors display panel as showing a pure color image, and the method comprises: deactivating a W pixel of the display panel and changing gamma values of a R pixel, a G pixel, a B pixel from a first predetermined values to a second predetermined value; and activating the W pixel, and adjusting a gray scale image of the entire display panel to be a first predetermined value. The present invention further provides a display panel and a display. The display panel, the display and the method of the present invention can raise the display brightness of the display panel as showing the pure color image.
US10170060B2	Interlaced liquid crystal display panel and backlight used in a head mounted display A liquid crystal display (LCD) device is driven in interlaced scan to accommodate for liquid crystal (LC) setting times without sacrificing brightness. The LCD device includes an LCD panel including a first group of (e.g., even) pixel lines and a second group (e.g., odd) pixel lines, a backlight disposed behind the LCD panel to emit light toward the even and odd pixel lines, a shift grating disposed between the LCD and the backlight, the shift grating configured to block the light from the backlight from reaching either the first group of pixel lines or the second group of pixel lines, and a controller. The controller drives the LCD panel using an interlaced scan, coordinates the activation of the backlight (e.g., a strobed backlight), and changes the state of the shift grating to block the light from the backlight from reaching either the first group of pixel lines or the second group of pixel lines.
US10170058B2	Display device with temperature-based control and method for driving the same A display device and a method for driving the same are provided. The display device includes a light emitter comprising a plurality of light emitting elements connected in parallel to each other, and a driving circuit configured to change an operating state of a part of the plurality of light emitting elements based on temperature detection of switching elements respectively connected to the plurality of light emitting elements.
US10170056B2	Method of controlling mirror display and electronic device for the same A method of controlling a mirror display and an electronic device are provided. The method includes identifying whether external power is input to the electronic device; and providing operation power to the mirror display by selectively providing one of the external power and battery power to the mirror display as the operating power according to whether the external power is input to the mirror display.
US10170054B2	Organic light emitting display and method for driving the same An organic light emitting display that defines a plurality of pixels arranged in a matrix form as a plurality of pixel row groups, each of which includes the same number of pixel rows and individually drives the respective pixel row groups. The organic light emitting display includes a display unit including the plurality of pixels, a plurality of data lines, and a plurality of scan lines: a scan driving unit configured to apply scan signals to the plurality of pixels; a data driving unit configured to apply data voltages that are provided to the plurality of pixels to a first output line; and a data distribution unit configured to selectively connect at least two data lines that are continuously arranged to the first output line according to demultiplexing signals. The demultiplexing signals that correspond to the pixel rows included in the respective pixel row groups have different pulse widths.
US10170052B2	Display device A display device may include a plurality of pixels and a driving circuit. The plurality of pixels may respectively include a plurality of pixel circuits each having at least one transistor, and a plurality of display structures connected to the plurality of pixel circuits. The driving circuit may drive the plurality of pixels. The plurality of display structures may define a display region of the display device, and the driving circuit may be disposed at a center portion of the display region.
US10170051B2	Driving method for OLED display panel The invention provides driving methods for OLED display panel. One method uses an improved driving circuit: disposing a sensing line (S(a)) corresponding to two columns of pixels (P), the a-th sensing line (S(a)) synchronously detecting threshold voltages of the light-emitting sub-pixels of odd-numbered rows in (2a−1)-th column pixels (P) and of even-numbered rows in 2a-th column pixels (P); or, the a-th sensing line (S(a)) synchronously detecting threshold voltages of the light-emitting sub-pixels of even-numbered rows in (2a−1)-th column pixels (P) and of odd-numbered rows in 2a-th column pixels (P); to perform detection on half of the sub-pixels in OLED display panel, to reduce the number of sensing lines by half to save cost. Another method improves the driving signal timing sequence to reduce the number of detection times of the sensing lines by half with obtaining the threshold voltages of all the sub-pixels of the OLED display panel.
US10170048B2	Pixel and organic light-emitting diode (OLED) display having the same A pixel and an organic light-emitting diode (OLED) display having the same are disclosed. In one aspect, a pixel includes an OLED including an anode and a cathode and configured to emit light corresponding to data signals applied during first and second frame periods. Each of the first and second frame periods includes a first discharge period and a light-emitting period subsequent to the first discharge period. The pixel also includes a pixel circuit configured to control light emission of the OLED, apply a first voltage to the anode during the light-emitting period, apply a second voltage to the cathode, the second voltage having a voltage level less than that of the first voltage, and apply a third voltage to the anode so as to discharge the anode during the first discharge period. The second voltage has different voltage levels during the first and second frame periods.
US10170046B2	OLED display device and method for correcting image sticking of OLED display device The embodiments of the present invention provide an OLED display device and a method for correcting image sticking of an OLED display device. The OLED display device comprises an OLED pixel array; a pixel detecting circuit for detecting aging degrees of respective OLED pixels in the OLED pixel array; wherein respective OLED pixel are aged by displaying an aging image on the OLED pixel array, such that the aging degrees of respective OLED pixels are the same; the brightness of each pixel in the aging image is inversely proportional to the aging degree of the pixel. According to the OLED display device and the method provided by the embodiments of the present invention, various approaches can be applied for detecting the aging degrees of respective OLED pixels in the OLED pixel array, such that the image sticking of the OLED display device can be corrected by adjusting the aging degrees of respective OLED pixels.
US10170043B2	Display driving circuit, array substrate, circuit driving method, and display device The application provides a display driving circuit, an array substrate, a circuit driving method, and a display device. The array substrate comprises a plurality of rows of scan lines, a plurality of columns of data lines, and a plurality of pixel units being defined by intersecting of the plurality of rows of scan lines and the plurality of columns of data lines; each column of data lines being connected to a reset module; each column of data lines being further connected to a current control module configured to form a first current flowing from a data line connected thereto to a reference voltage line, wherein the pixel unit includes a first transistor and a second transistor, the first transistor and the second transistor have device parameters that are the same or in a predetermined proportion, and a second electrode of the second transistor is connected to the output terminal.
US10170040B2	Display device A display device includes a switching element having a first input/output terminal electrically connected to a first signal line, a first wiring electrically connected to a second input/output terminal of the switching element, a transistor having a gate electrode connected to the first wiring, a second wiring electrically connected to a source or drain of the transistor, a pixel electrode connected to the second wiring, a first insulating layer which is arranged between the first wiring and the second wiring and is arranged between the first wiring and the pixel electrode, a second insulating layer between the first insulating layer and pixel electrode, and a conducting layer between the first insulating layer and the second insulating layer, the conducting layer including a region overlapping the pixel electrode. The conducting layer includes a dividing groove dividing the conducting layer into a plurality of regions at a region overlapping the pixel electrode.
US10170033B2	Display device A display device includes a data generator configured to generate a clock-embedded data packet, and a controller configured to control operation of the data generator. The data packet comprises a header, a first symbol comprising address information therein, and a second symbol not comprising address information, and the header comprises address information of the first symbol.
US10170027B2	Display device An exemplary embodiments provides a display device including; a plurality of unit areas, each unit areas including a first pixel, a second pixel, and a third pixel, wherein the first pixel, the second pixel, and the third pixel are configured to produce different colors, wherein each of the plurality of unit areas respectively includes a square shaped guideline inscribed therein, wherein the first pixel is disposed on a first side of the square shaped guideline, the first pixel extending in a first direction, and wherein the second pixel is disposed in a center region of the square shaped guideline, the second pixel extending in a second direction, the second direction crossing the first direction.
US10170022B2	Photoluminescent retroreflector Common approaches to retroreflectors rely on absorptive materials that waste light energy that could be utilized for visibility. Disclosed photoluminescent retroreflectors filter reflected light, like traditional colored retroreflectors, but down-convert photons of the wrong color into a glow visible from more directions. The glow enables visibility for more observers or observers whose light source is far from their line of sight. The color of the glow can be adjusted by choice of luminescent material as a design feature or safety purpose. Certain embodiments utilize photoluminescent additives within a retroreflector while other embodiments utilize a photoluminescent coating on top of a pre-made retroreflector. An exemplary photoluminescent material for these optical devices is CuInZnS2 quantum dots.
US10170021B2	Elliptical corrugated signage A corrugated display sign with a main body having an inner surface and an outer surface, with the body including a first portion and a second portion. The sign further includes at least one or more formers, and in some embodiments two or more formers, secured to the first portion of the inner surface of the main body, with the formers each including a tab section that secures the former to the main body, a front body portion with a wing portion, and a back body portion with a wing potion. Further, the second portion of the main body is folded around the first portion and the formers, so as to create an elongated elliptical shape for the sign. The display sign is capable of being erected from a knockdown configuration to an erected configuration by folding the former body portions and the wing, and folding the second portion of the main body around the first portion and the formers.
US10170019B2	Feedback from a welding torch of a welding system A welding system includes a welding torch. The welding torch includes a sensor configured to detect a motion associated with the welding torch, a temperature associated with the welding torch, or some combination thereof. A display of the welding torch is activated, a determination is made that the welding torch has been involved in a high impact event, live welding using the welding torch is disabled, a software selection is made, or some combination thereof, based on the motion, the temperature, or some combination thereof.
US10170017B2	Analyzing or emulating a keyboard performance using audiovisual dynamic point referencing The systems and methods taught herein are generally directed to a dynamic point referencing of an audiovisual performance for an accurate and precise selection and controlled cycling of portions of the performance. The dynamic point referencing can be used by a learning artist, for example, in analyzing or performing a portion of the work through an accurate and precise digital audio/video instructional method having the controlled cycling feature. Such systems and methods will be appreciated, for example, by musicians, dancers, and other enthusiasts of the performing arts.
US10170013B1	Assessment instances in computerized assessments Computerized assessments rely upon databases containing constantly changing assessment information including an identifier, questions, choices, and scoring criteria. A particular instance of an assessment, including captured questions and corresponding scoring criteria is stored. The captured questions are administered to assessment takers. The answers are linked to scoring criteria using the identifier, so that assessment results may be generated. The assessment instance includes a first data entity including a selection of questions and an instance identifier; and a second data entity including the instance identifier and scoring criteria. An API captures the assessment instance responsive to a request by an external program, then communicates the first data entity to the external program. The external program then communicates back assessment answers with the identifier. The API associates the responses with the second data entity using the identifier and creates scoring results. The scoring results are then be stored and/or communicated externally.
US10170012B2	Communication system and method A communication system and method are provided to assist a user in conveying and/or exchanging a communication. The present communication system and method provide a low tech platform that enables a user to utilize an icon exchange communication system and method while allowing the integration of core vocabulary instructional concepts and techniques. The present communication system and method allows for seamless presentation of core vocabulary while also providing access to fringe vocabulary words.
US10170010B1	Display of traffic overlaid on aeronautical chart A system may include a display, an avionics server, and an automatic dependent surveillance-broadcast (ADS-B) receiver implemented in an aircraft. The avionics server may include a processor configured to host applications. The ADS-B receiver may be configured to receive ADS-B In data associated with traffic information from other aircraft in a vicinity of the aircraft. Execution of the applications may be configured to cause the processor to: generate geo-referenced aeronautical chart graphics data; output the geo-referenced aeronautical chart graphics data to the display; receive the ADS-B In data from the ADS-B receiver; generate geo-referenced traffic graphics data based on the received ADS-B In data; and output the geo-referenced traffic graphics data to the display. The display may be configured to receive the geo-referenced aeronautical chart graphics data and the geo-referenced traffic graphics data and display an image of a selected aeronautical chart overlaid with the traffic information.
US10170008B2	System and method for optimizing an aircraft trajectory Systems and methods of the present invention are provided to generate a plurality of flight trajectories that do not conflict with other aircraft in a local area. Interventions by an air traffic control system help prevent collisions between aircraft, but these interventions can also cause an aircraft to substantially deviate from the pilot's intended flight trajectory, which burns fuels, wastes time, etc. Systems and methods of the present invention can assign a standard avoidance interval to other aircraft in the area such that a pilot's aircraft does not receive an intervention by an air traffic control system. Systems and methods of the present invention also generate a plurality of conflict-free flight trajectories such that a pilot or an automated system may select the most desirable flight trajectory for fuel efficiency, speed, and other operational considerations, etc.
US10170001B2	Blind zone indicator module for exterior rearview mirror assembly A blind zone indicator module for a vehicular exterior rearview mirror assembly includes a hollow housing that includes a front end for attaching the indicator module at the rear of a mirror reflective element configured for use by an exterior rearview mirror assembly, a rear end opposite the front end, and an intermediate portion between the front end and the rear end. The hollow housing comprises an inner surface that is white and is diffusely reflective of light incident thereat. A diffuser element is attached at the front end of the hollow housing and closes the front end of the housing. Potting material is disposed at and over a circuit board to seal the circuit board in the module. Light emitted by a light emitting diode, when activated, reflects off the white inner surface of the hollow housing and passes through the diffuser element to exit the indicator module.
US10169996B2	Method and apparatus for estimation of waiting time to park An approach is provided for estimation of waiting time to park. The approach involves processing parking data from a parking area to determine a probability that all parking spots in the parking area are occupied. The parking data is collected from one or more parking sensors. The approach also involves building a remaining parking duration model for a plurality of cars parked in said all parking spots based on the parking data. The approach further involves calculating an estimated conditional waiting time to park in the parking area based on the remaining parking duration model. The approach further involves calculating an estimated unconditional waiting time to park in the parking area based on the blocking probability and the conditional waiting time to park.
US10169991B2	Proximity awareness system for motor vehicles Various embodiments provide enhanced warnings of potential future adverse events (e.g., automobile crashes) by tracking the location and motion of multiple vehicles, and providing alerts or warnings to the drivers of such vehicles in the event that a risk of an adverse event is identified.
US10169986B2	Integration of personalized traffic information Integration of personalized traffic information is provided. Contextual information for a client device is collected. Based, at least in part, on the contextual information, traffic information is received. The traffic information is received from one or more broadcast stations to which the traffic information has been mapped based, at least in part, on classification of the traffic information. A communications device is caused to communicate the traffic information.
US10169983B2	Method of noise suppression for voice based interactive devices An apparatus including a security system protecting a secured area, a processor of the security system providing a voice connection between a control panel of the security system located within the secured area and a remotely located central monitoring station, the processor automatically providing notification of activation of the provided voice connection, an audio device providing audio entertainment within the secured area, a wireless interface providing a communication channel between the security system and audio entertainment system and a processor of the audio device receiving the automatic notification of activation of the voice connection from the processor of the security system through the wireless interface and automatically reducing a volume of the audio entertainment provided by the audio device within the secured area.
US10169981B2	Portable alarm system A portable alarm system is disclosed. The portable alarm system includes a portable base station, which has an outer housing that encloses a power supply and a secondary protective housing. The secondary protective housing encloses at least a controller and a cellular modem that are electrically connected to each other. An energy storage device, such as a super capacitor, is configured to maintain a store of energy and is electrically connected to the controller and the cellular modem to provide an alternative power source thereto.
US10169980B1	Portable security bin A security bin and a security bin controller are described that measure fullness or height of secure contents in a security bin; listen to radio beacons over a short-range radio to determine a bin distance from a first radio, such as by measuring received radio power; determine one of three bin security states: home, caution or warning; and then broadcast a status message, warning message or alarm message over long-range radio, dependent on both the fullness of the bin and the security state. Embodiments include shredder bins, adapted to receive secure or confidential documents. Status messages may be used to initiate a search for a lost bin or to schedule bin service. Embodiments include measuring rate-of-fill. Alarm messages may be responsive to both bin location and fill volume. Embodiments and use of a controller include waste bins, including industrial or medical waste.
US10169976B2	Vehicle occupant detection system Various implementations of an occupant detection system may be used in a vehicle to detect the presence of a living occupant (human or otherwise) and generate a warning. The warning may be communicated to another person(s) or to other vehicle systems to alert people in the vicinity of the vehicle. The system prevents injury and death to people and pets that may be accidentally within a parked car and unable to egress. The system may be integrated into a new vehicle or housed in a separate device that can be plugged into a power outlet within the vehicle.
US10169974B2	Home security system A home security system and method is provided. The method comprises detecting a motion in a monitored room, starting data collection through at least a first sensing device and a second sensing device, transmitting said collected data to a computing device comprising a data analysis unit, detecting a potentially dangerous situation through the data analysis unit by analyzing said collected data, transmitting a relevant snippet of data of said first sensing device to a first randomly selected service center server, evaluating said snippet of data through a first service center operator as being related to “definitely a dangerous situation”, “definitely no dangerous situation” or “unclear”, if “unclear” was chosen, transmitting the snippet of data to a second randomly selected service center server, and transmitting the snippet of data along with the evaluation of the first operator from the second randomly selected service center server to the computing device.
US10169968B1	Multi-layer stack with embedded tamper-detect protection Tamper-respondent assemblies and methods of fabrication are provided which include a multi-layer stack having multiple discrete component layers stacked and electrically connected together via a plurality of electrical contacts in between the component layers. Further, the tamper-respondent assembly includes a tamper-respondent electronic circuit structure embedded within the multi-layer stack. The tamper-respondent electronic circuit structure includes at least one tamper-respondent sensor embedded, at least in part, within at least one component layer of the multiple discrete component layers of the multi-layer stack. The tamper-respondent electronic circuit structure defines a secure volume within the multi-layer stack. For instance, the tamper-respondent electronic circuit structure may be fully embedded within the multi-layer stack, with monitor circuitry of the tamper-respondent electronic circuit structure residing within the secure volume within the multi-layer stack.
US10169966B1	Networking communication method for multi-slave cable anti-theft monitoring system A networking communication protocol for a multi-slave cable anti-theft monitoring system, the system including a central office, a master and slaves, wherein the central office and the master are connected based on a GPRS, and the master and multiple slaves are connected based on power carrier communication. Communication in the system is mainly initiated by the master, the master realizes site registration and data reporting at the central office through GPRS communication to aggregate global information of the system. Data interaction between the master and the slaves is achieved through the power carrier communication to complete local data collection and a cable on-off test of the slaves. The master is provided with a periodic collection timer to realize periodic data collection of all slaves on a monitored line.
US10169963B2	Wearable device that warms and/or cools to notify a user A wearable device that warms or cools to notify a user wearing the device is provided. The wearable device includes: a plurality of individual heating and/or cooling spots, a plurality of dots pulsating in heating/cooling sections, and/or a plurality of dots moving around in heating/cooling sections. A system is also provided comprising a wearable device, a scheduling device, and a communication between the wearable device and the scheduling device.
US10169957B2	Multiple player gaming station interaction systems and methods Systems and methods for transferring objects from a first player to a second player within a gaming system are described herein. The method includes receiving, via a first touchscreen of the first gaming machine, a selection of an object by the first player. The method further includes receiving, via the first touchscreen, gesture information relating to the object. The method includes analyzing, by a controller of the gaming system, the gesture information. The method further includes determining, by the controller, that the object is to be transferred from the first player to the second player based at least in part on the gesture information. The method includes transferring, by the controller, the object from the first gaming machine to the second gaming machine.
US10169956B2	Gaming device and methods of allowing a player to play a gaming device having selectable awards A gaming machine for providing a slot game to a player is described herein. The gaming machine includes a display device and a controller for displaying a game to a player. The controller is configured to randomly determine an outcome of the game and display the outcome on the display device, determine a first award as a function of the outcome, and determine a second award as a function of the first award. The first award includes a first number of free games and a first award multiplier. The second award includes a second number of free games and a second award multiplier. The controller allows the player to select one of the first award and the second award and responsively provides the selected one of the first award and the second award to the player.
US10169955B2	Game world server driven triggering for gambling hybrid gaming system A gambling hybrid game that provides game world engine driven triggering of gambling events is disclosed. The gambling hybrid game includes an entertainment system engine that provides an entertainment game to a user, a real world engine that provides gambling games to users, and a game world engine that monitors the entertainment game and provides gambling games when appropriate. The entertainment system engine provides an entertainment games that provides values for a set of entertainment game variables. The game world engine receive the values of set of entertainment game variables and determined whether a gambling event in a gambling game is triggered based upon the values one or more entertainment game variables in the set.
US10169953B2	Fungible object award interleaved wagering system A fungible object award interleaved wagering system includes a plurality of interactive controllers operatively connected to an application controller by a network, each interactive controller configured to: communicate, to an application controller, application telemetry; and receive, from the application controller, an object based on the application telemetry. The system also includes a wager controller operatively connected to the application controller, the wager controller constructed to: receive a wager request; generate a wager outcome based on the wager request; communicate, to an object controller, the wager outcome. The system also includes the application controller operatively connected to the plurality of interactive controllers and the wager controller, the application controller constructed to: receive; communicate, to the wager controller, the wager request based on the received application telemetry; receive an object, wherein the object is generated by the object controller based on the wager outcome; communicate, to each interactive controller, the object.
US10169952B2	Processing credit-related events in a wagering game system Embodiments include a method for presenting a credit balance affected by a plurality of wagering games. The method can include detecting wager amounts and win amounts associated with a plurality of wagering games conducted via a wagering game machine. The method can include presenting, on a display device of the wagering game machine, graphical identifiers indicating an order in which the wager amounts will decrease a credit balance and the win amounts will increase the credit balance. The method can include according to the order, increasing the credit balance on the display device by each of the win amounts and decreasing the credit balance on the display device by each of the wager amounts.
US10169948B2	Prioritizing storage operation requests utilizing data attributes Storage operation requests from any device of a computing environment can be numerous and frequent. In particular, if there is a high frequency initiation of storage operation requests to store, retrieve, or modify data, then targeted storage systems have to easily and quickly decide in which order to satisfy the storage operation requests, such as when two requests occur to retrieve identical data. Storage operation requests can be prioritized at the end device instead of any intermediary device or enabling a complex ordering algorithm. Moreover, the storage on a cloud model consists of similar storage services which serve consumers of different needs. Some applications/users can afford longer service time than other applications/users. Differentiation in required service time allows price differentiation. The solution will serve premium customers faster than it serves customers who paid less.
US10169946B1	User alerts based on image capturing by a bill storage device A device monitors activity associated with a user of a currency bill storage device based on currency bill data received from the currency bill storage device over a period of time. The currency bill storage device includes image sensor(s) configured to capture images of currency bills. The currency bill data is based on the images. The device tracks a balance in the currency bill storage device based on the currency bill data and identifies, based on the activity, an upcoming transaction in which the user is expected to utilize a particular quantity of currency bills in the currency bill storage device. The device determines whether the balance is sufficient relative to the particular quantity of currency bills and performs one or more actions to cause an alert to be provided to the user based on determining whether the balance is sufficient relative to the particular quantity of currency bills.
US10169944B2	Device for optimising the filling of bags for containing banknotes A device for filling and closing disposable bags for containing banknotes, comprises a container for the temporary housing of one or more banknotes, having side walls and a bottom with an opening for the exit of said one or more banknotes from the container, a pushing piston for pushing said one or more banknotes towards the bottom of the container, a bag made of flexible material intended to be filled with the banknotes temporarily housed in the container, which is anchored, at the edges of its mouth, to fixing pins placed in proximity of the opening in the bottom of the container, a plate which is vertically movable through controlled lowering means and placed below the container, the plate having a central slot, which is open at the top towards the container and extending vertically through the body of the plate for the insertion of a bottom portion of the bag anchored to the fixing pins, and first sealing elements placed between the container and the plate.
US10169942B2	Door lock sensor and alarm A door lock mechanism is disclosed that includes door lock and alarm features. The mechanism includes a controller and a sensor useful to detect motions that are representative of attempted access through a door to which the door lock mechanism is attached. The controller can set an alarm condition if a measured motion, such as a measured acceleration, meet and/or exceeds a threshold. If an appropriate access control credential is provided through a user device then the alarm condition may not be set by the controller. The door lock mechanism can be coupled to a remote station via a communications link if needed, such as a radio frequency link. The remote station can additionally be in communication with the door lock mechanism via a network. The remote station can be used to send and receive messages regarding door lock mechanism status, configuration, etc.
US10169940B1	Electric lock and control method thereof A control method includes the electric lock entering an administrator setting mode after receiving an administrator password; the electric lock generating an authentication code in the administrator setting mode; the electric lock wirelessly receiving a first input from a portable device; the electric lock comparing the first input with the authentication code; the electric lock pairing with the portable device and receiving unique identification information of the portable device when the electric lock determines that the first input matches the authentication code; the electric lock storing the unique identification information of the portable device; and the electric lock performing an unlocking operation when the electric lock receiving a second input and sensing the portable device having the unique identification information within a predetermined distance.
US10169939B2	Identity recognition Embodiments of the present invention provide methods, computer program products, and systems to automatically verify a person's claimed identity using wireless token passing. Embodiments of the present invention can be used to receive identification data comprising a universally unique identifier (UUID) and a first security token and process the received identification data by matching the UUID to an associated website and verifying the first security token against a second security token. Embodiments of the present invention can be used to notify a first user of the processed identification data by displaying an indication that verification of the identification data was successful or unsuccessful.
US10169938B2	Low power credential detection device for access control system An access control device including a credential reader circuit configured to enter a standby mode, awaken from a standby mode, and receive data from a nearby credential. The access control device further includes a credential detection circuit having a memory configured to store program instructions, an antenna, and a processor electrically coupled to the antenna and to the credential reader circuit, wherein the processor is configured to execute the stored program instructions to: transmit an interrogation signal, receive a reflected interrogation signal with the antenna, transmit an activation signal to the credential reader circuit in response to the received reflected interrogation signal wherein the reflected interrogation signal includes I and Q values, receive a false detection signal from the credential reader circuit, and adjust at least one of the I and Q threshold values of the reflected interrogation signal.
US10169937B1	Systems and methods for multifactor physical authentication Systems and methods for multifactor physical authentication are disclosed. In one embodiment, a method for accessing an entitlement at a facility using multifactor physical authentication may include (1) receiving, at a first electronic interface at a facility, an individual identifier from an individual; (2) at least one computer processor presenting a challenge to the individual; (3) the at least one computer processor receiving, at a second interface, a response to the challenge; (4) the at least one computer processor authenticating the individual based on the individual identifier and the response; (5) the at least one computer processor retrieving at least one authorized entitlement associated with the individual identifier; and (6) the at least one computer processor activating the entitlement at the facility associated with the authorized entitlement.
US10169936B2	Combined motion detection and access control system and method A combined motion detection and access control method and system, the system including a processor for receiving an indication of motion detection within a premises and for ascertaining an area within which the motion was detected; at least one transmitter operable, responsive to receiving, from the processor, an indication of the area, for broadcasting, within the area, an encoded identification of the area; a transceiver associated with an individual and operable for receiving the encoded area identification and, responsive thereto, for broadcasting an encoded identification of the individual and the encoded area identification; and at least one receiver operable for receiving the encoded identification of the individual and the encoded area identification and for communicating the encoded identification of the individual and the encoded area identification to the processor which is operable, thereto, for ascertaining whether the individual is allowed access to the area encoded in the encoded area identification.
US10169935B2	Electronic door access control system A method for retrofitting a door comprising a key reader with a door control unit. The door control unit, key reader and the latch release mechanism may also be powered by a key comprising a power supply, the key also supplying a coded sequence to the door control unit.
US10169934B2	Building access and layout mapping for an autonomous vehicle based transportation system Enhanced features of a vehicle-based transportation system are presented here. In accordance with one methodology, the transportation system receives a ride request that identifies a passenger, a pickup location, and a destination location. The transportation system determines that the passenger requires user-specific security clearance to access a secured area at or near the destination location, and coordinates with a security system to grant the user-specific security clearance to the passenger. The transportation system can also determine a vehicle drop-off location based on the passenger destination, and coordinate with a navigation system to obtain navigation instructions to guide the passenger from the vehicle drop-off location to the passenger destination.
US10169929B2	Systems of using vehicle system data to improve the operation of off-road vehicles A system for operating a fleet of off-road vehicles may include a network. A plurality of sensors operatively associated with the fleet of off-road vehicles and connected to the network sense information related to the operation of a plurality of off-road vehicle systems. A processing system operatively connected to the network collects sensor data from the off-road vehicles; combines sensor data from the vehicle systems in accordance with a user-defined event; determines whether the collected and combined sensor data are inside or outside defined limits of the user-defined event; produces an alarm signal for a user when the collected and combined sensor data are outside the defined limits of the user-defined event; and recommends modification of the operation of vehicles for which an alarm signal has been produced. A display system operatively associated with the processing system displays at least information relating to the recommended modification.
US10169928B2	Apparatus for providing data to a hardware-in-the-loop simulator Apparatus for providing real-time data to a hardware-in-the-loop simulator for an automotive vehicle. The apparatus includes a test vehicle having at least one sensor which generates an output signal representative of a condition of the vehicle. A wireless transmitter such as a cellular phone on the motor vehicle receives the sensor output signal as an input signal and transmits that output signal to a computer network. A simulator data server receives the data from the computer network and provides that data to the hardware-in-the-loop simulator.
US10169927B2	Methods and systems for monitoring vehicle systems using mobile devices Methods and systems are provided for presenting information pertaining to the health of one or more mechanical components of a vehicle. One exemplary method involves a client device initiating an ad hoc wireless connection with a monitoring system onboard the vehicle, requesting status information for the vehicle from the monitoring system via the ad hoc wireless connection, and receiving the status information for the vehicle from the monitoring system via the ad hoc wireless connection. The monitoring system generates the status information based at least in part on measurement data obtained from one or more sensor systems during operation of the vehicle and provides the status information in response the request. The client device processes the status information present the one or more graphical representations of the current condition of the one or more mechanical components of the vehicle on the client device.
US10169923B2	Wearable display system that displays a workout guide There is provided a display control device including an action information acquisition unit that acquires, at an action position of one actor, action information regarding a past action of another actor, an object generation unit that generates a virtual object for virtually indicating a position of the other actor during an action of the one actor based on the acquired action information, and a display control unit that causes a display unit displaying a surrounding scene to superimpose and display the generated virtual object during the action of the one actor.
US10169921B2	Systems and methods for augmented reality aware contents Methods and systems for rendering augmented reality aware standard digital content are disclosed. The method includes detecting a context sensitive trigger initiated in response to activation of a trigger condition related to a standard digital content; determining augmented reality content information associated with the context sensitive trigger using augmented reality awareness data; retrieving based on the augmented reality content information, at least one of augmented reality trigger information, augmented reality digital content or mixed content experience configuration; activating at least one reality source based on the context sensitive trigger to capture reality data in response to retrieving; identifying at least one augmented reality trigger in the at least one reality source; and selectively rendering one of the at least one portion of the standard digital content, the augmented reality digital content and the reality data relative to the at least one portion of the standard digital content.
US10169916B2	Image processing device and image processing method There is provided an image processing device including: a setting unit configured to set a filter intensity based on a degree of how exactly an imaging device that produces a captured image containing a marker related to display of a virtual object faces the marker, the degree being detected based on the captured image; and an image processing unit configured to combine the virtual object corresponding to the marker with the captured image by using a filter having the set filter intensity.
US10169914B2	Method and system for indoor positioning and device for creating indoor maps thereof An indoor positioning method, indoor positioning system and indoor maps creating device thereof are provided. The method includes converting a panorama image corresponding to an indoor environment into a plurality of perspective images, and extracting a plurality of reference feature points and descriptors of the reference feature points from the perspective images; taking a shooting position of the panorama image as an origin, and recoding a plurality of 3D reference coordinate values corresponding to a central position of each perspective images; calculating 3D coordinate values of the reference feature points base on the 3D reference coordinate values, and storing the 3D coordinate values and the descriptors of the reference feature points as an indoor map corresponding to the indoor environment. The method also includes determining a 3D target coordinate value of a portable electronic device with respect to the origin of the indoor maps in the indoor environment.
US10169910B2	Efficient rendering of heterogeneous polydisperse granular media The disclosure provides an approach for rendering heterogeneous polydisperse granular media. In one aspect, a rendering application renders such granular media using a combination of explicit path tracing and accelerated path construction using proxy path tracing, shell tracing, and volumetric path tracing. In proxy path tracing in particular, the rendering application instantiates proxy geometry in the form of a bounding sphere and determines internal scattering in the grain using a precomputed grain scattering distribution function that relates incident and outgoing radiance functions on the bounding sphere. In shell tracing, the rendering application uses shells to aggregate many grain interactions into a single step. The rendering application derives a continuous liquid/volume equivalent to the granular material based on the material's optical properties and selects a precomputed shell transport function (STF) to use from a database by interpolating nearby database entries using radiative transfer equation (RTE) parameters at the shell's center.
US10169904B2	Systems and methods for presenting intermediaries A system that incorporates teachings of the present disclosure may include, for example, an intermediary engine having a controller, and a storage medium for storing instructions to be executed by the controller. The instructions, when executed by the controller, can cause the controller to receive a measure of a mood of an individual, invoke an intermediary according to the measure of the mood of the individual, and present the intermediary to an entity requesting to interact with the individual. The measure of the mood can be synthesized from collected information associated with a behavior of the individual, and can have a plurality of dimensions. The mood can also indicate an availability of the individual and a receptiveness of the individual to accept a request to interact with an entity. Other embodiments are disclosed.
US10169903B2	Animation techniques for mobile devices Systems, methods, and computer readable media to improve the animation capabilities of a computer system are described. Animation targets may be represented as a combination of a current animation pose and an incremental morph. The incremental morph may be represented as a series of non-zero weights, where each weight alters one of a predetermined number of target poses. Each target pose may be represented as a weighted difference with respect to a reference pose. Target poses may be stored in memory in a unique and beneficial manner. The disclosed manner permits the efficient retrieval of pose vertex data at run-time and may be especially efficient in systems that do not use, or have very little, cache memory.
US10169900B2	Picture processing method and apparatus A digital photo processing method, information processing apparatus, and non-transitory computer-readable medium. New digital photos are arranged in chronological order based on capture times of the new digital photos. A determination is made as to whether a subset of the new digital photos are related to each other based on one or a combination of the capture times of the new digital photos and locations at which the new digital photos were captured. One of a plurality of processing templates is selected based on one or a combination of at least one of the capture times of the subset of the new digital photos and at least one of the locations at which the subset of the new digital photos were captured. The subset of the new digital photos is processed according to the selected one of the plurality of processing templates to generate a single image.
US10169898B2	Method for generating screenshot image on television terminal and associated television This application provides a TV screenshot method and an associated television (TV). The method includes: upon receiving a screenshot request, acquiring a layer range of On Screen Display (OSD) sub-layers corresponding to windows of every application displayed on an OSD layer; and generating the screenshot image by taking a snap shot of the OSD sub-layers in the layer range. This application can prevent unwanted system notification information image from being captured when a snap shot is taken.
US10169896B2	Rebuilding images based on historical image data A sub-image of data of a first full image may be selected. The sub-image of data may at least partially obscure an object within the first full image. A request to replace the sub-image of data may be transmitted over a network. The request may include transmitting the full image and transmitting metadata associated with the first full image to one or more of a server computing device. The server computing device may analyze a history of images and select one or more images of the history of images that match one or more attributes of the metadata. The server computing device may replace the sub-image of data using the one or more images to generate at least a second full image that includes the object, wherein the object is not obscured. The second full image may be received over the network.
US10169895B2	Surrounding risk displaying apparatus A surrounding risk displaying apparatus includes an environment recognizer, a surrounding risk recognizer, and a display. The environment recognizer is capable of recognizing an environment around a vehicle. The surrounding risk recognizer is capable of extracting risk objects each having a risk potential not less than a predetermined risk potential, estimating a distribution of the risk potential around each of the risk objects, and calculating a risk approaching determination value that increases depending on relative approaching of the risk objects. The display is capable of displaying images in a superimposed fashion on the corresponding risk objects. The images each indicate the distribution of the risk potential around corresponding one of the risk objects. The display is capable of displaying, when the risk approaching determination value is not less than a predetermined threshold, a passage risk display indicating that passing through, by the vehicle, a clearance between the risk objects involves a risk.
US10169893B2	Optimizing photo album layouts Implementations generally relate to optimizing a photo album layout. In some implementations, a method includes receiving a plurality of images and determining a target arrangement. The method also includes arranging the plurality of images in an N-dimensional arrangement based on a predetermined distance function. The method also includes arranging the plurality of images in the target arrangement based on the N-dimensional arrangement.
US10169891B2	Producing three-dimensional representation based on images of a person An example method of generating three-dimensional visual objects representing a person based on two-dimensional images of at least a part of the person's body may include receiving a first polygonal mesh representing a human body part, wherein the first polygonal mesh is compliant with a target application topology. The example method may further include receiving a second polygonal mesh representing the human body part, wherein the second polygonal mesh is derived from a plurality of images of a person. The example method may further include modifying at least one of the first polygonal mesh or the second polygonal mesh to optimize a value of a metric reflecting a difference between the first polygonal mesh and the second polygonal mesh.
US10169888B2	Background correction for computed tomography scan data A background correction method for CT scan data is provided. A background collection may be performed to collect a first background data set and background data before a CT scan. The CT scan may then be performed to collect one or more CT scan data sets, and status information for collecting each of the CT scan data sets. A second background collection may additionally be performed to collect a second background data set after the CT scan, and status information for collecting the second background data set may also be recorded. The first background data set, the second background data set and corresponding status information may then be used to obtain a background data set for collecting each of the CT scan data sets. The corresponding background data set may be removed from each of the CT scan data set to obtain a background-corrected CT scan data set.
US10169887B2	Accelerated blits of multisampled textures on GPUs Systems, computer readable media, and methods for hardware accelerated blits of multisampled textures on graphics processing units (GPUs) are disclosed. For multisampled surfaces, texture-to-buffer blits cannot be trivially implemented because most GPUs do not support writing multisampled surfaces with a linear memory layout. Moreover, GPUs often have a maximum limit for row stride (i.e., the number of bytes from one row of pixels in memory to the next) and/or texture size. When the destination buffer for the blit of a multisampled texture is too large to be aliased by an equivalent non-multisampled texture view, the stride of the view has no spatial relationship with the destination buffer. Thus, to access the source texture correctly, a ‘remapping’ may be performed to determine the linear sample index of a fragment within the view, and the destination buffer stride may be used to compute the texture coordinates used to sample the source texture.
US10169886B2	Method of mapping source colors of an image into a target color gamut of a target color device in two mapping steps Method comprising: first mapping, in a reference color space, said source colors from a source color gamut into a reference color gamut, resulting in intermediate colors, second mapping said intermediate colors from said reference color gamut into said target color gamut, resulting in target colors forming at least one mapped image, wherein said first mapping is defined through information representing said second mapping.
US10169881B2	Analysis device, system and program A general purpose device, system, and program perform colorimetric analysis by automatically comparing the color of an object to be analyzed with reference information. The device includes an imaging unit that takes images of the object to be analyzed; a memory unit that stores reference information of color information of the object in accordance with properties of the object; a conversion unit that makes the color space of the image data and the color space of the reference information the same by converting the color spaces when the color space of the image data of the object and the color space of the reference information are different; a determination unit that determines the properties of the object by comparing the color information of the image data and the color information of the reference information in a common color space; and a display unit that displays the determination results.
US10169876B2	Systems, processes, methods and machines for transforming image data into sizing and volume measurements for tissue Automated islet measurement systems (AIMS) in combination with tissue volume analysis (TVA) software effectively gauges volumetric and size-based data to generate heretofore unavailable information regarding, for example, populations of islet cells, stem cells and related desiderata.
US10169874B2	Surface-based object identification A target object may be identified by estimating a distribution of a plurality of orientations of a periphery of a target object, and identifying the target object based on the distribution.
US10169863B2	Methods and systems for automatically determining a clinical image or portion thereof for display to a diagnosing physician Methods and systems for automatically determining a clinical image or portion thereof for display to a diagnosing physician. One system includes an electronic processor and an interface for communicating with at least one data source. The electronic processor is configured to receive training information from the at least one data source and determine a subset of images included in each of the plurality of image studies displayed to one or more diagnosing physicians. The electronic processor is also configured to perform machine learning to develop a model based on the training information and the subset of images included in each of the plurality of image studies and receive the image study. The electronic processor is also configured to process the image study using the model to determine a subset of the plurality of images and flag the subset of the plurality of images for manual review by the diagnosing physician.
US10169862B2	Methods and systems for laser speckle imaging of tissue using a color image sensor Methods and systems for imaging tissue of a subject are disclosed, and involve illuminating the tissue with a coherent light having a coherent wavelength, acquiring image data of the tissue using a color image sensor, and processing the image data using laser speckle contrast analysis while correcting for differences in sensitivity of color pixels at the coherent wavelength to generate a perfusion image of the tissue. The perfusion image is then displayed to the user. Also disclosed are methods and systems for correcting for ambient light and for acquiring white light images along with laser speckle images.
US10169861B2	Image processing apparatus, non-transitory computer readable medium, and image processing method An image processing apparatus includes a number-of-target-cells estimating unit for estimating, on the basis of a feature of a target sample, the number of target cells included in the target sample, and a detection parameter setting unit for setting, on the basis of the estimated number of target cells, a detection parameter regarding a process of detecting target cells in a captured image of the target sample.
US10169860B2	Grayscale thermographic imaging Through the measurement and interpretation of the pixels of grayscale digital thermographic images of abnormalities of the skin and its subcutaneous tissue, early intervention and treatment of abnormalities of the skin and its subcutaneous tissue are possible, thereby assisting clinicians in making significant impacts on prevention and treatment.
US10169854B2	Liquid crystal display device having measuring mark for measuring seal line, apparatus and method of measuring seal line The present invention disposes a plurality of measuring marks on a dummy region having a seal line to detect a position and a width of the seal line during a fabrication process of a liquid crystal display device and then process can be terminated without further processes in case of bad quality of the seal line, thereby process delay and cost may be minimized.
US10169851B2	Methods for color enhanced detection of bone density from CT images and methods for opportunistic screening using same Embodiments describe an accurate and rapid method for assessing spinal bone density on chest or abdominal CT images using post-processed colored images. Post-processing of CT images for the purposes of displaying the spine is followed by color enhancement of routine unenhanced or contrast enhanced CT images to improve diagnostic accuracy, inter-observer agreement, reader confidence and/or time of interpretation as it relates to assessing bone density of the spine. CT images are post-processed (without changes to the standard-of-care CT imaging protocol and without additional cost or radiation for the patient) to straighten the spine for improved visualization of multiple segments. The color-enhanced images can be displayable simultaneously with the grayscale images. Methods and systems are provided for performing opportunistic bone density screening.
US10169850B1	Filtering of real-time visual data transmitted to a remote recipient A remote visual experience application which transmits real-time video remotely includes a filter which obscures one or more previously identified regions in space when the regions come within the camera's field of vision. The application may be a shared visual experience application, in which the camera is mounted to a wearable appliance of a local user. The application may include a function for mapping regions of a space in which the application will be used, and defining different levels of remote access for different regions of the space. A space map may be generated before or during transmission of video to a remote user. Exemplary embodiments include a virtual vendor house call application or a game. The application may further include an audio filter for filtering an audio signal.
US10169844B2	Lens distortion correction using a neurosynaptic circuit One or more embodiments provide a neurosynaptic circuit that includes multiple neurosynaptic core circuits that: perform image distortion correction by converting a source image to a destination image by: taking as input a sequence of image frames of a video with one or more channels per frame, and converting dimensions and pixel distortion coefficients of each frame as one or more corresponding neuronal firing events. Each distorted pixel is mapped to zero or more undistorted pixels by processing each neuronal firing event corresponding to each pixel of each image frame. Corresponding pixel intensity values of each distorted pixel are processed to output undistorted pixels for each image frame as neuronal firing events for a spike representation of the destination image.
US10169836B2	Ensuring fairness in the operation of thermal grids Methods, systems, and computer program products for ensuring fairness in the operation of thermal grids are provided herein. A computer-implemented method includes generating one or more models derived from information pertaining to a heating and cooling network, wherein the heating and cooling network comprises multiple consumers; categorizing each of the multiple consumers into one of two groups based on (i) one or more objectives of the heating and cooling network, (ii) the one or more generated models, and (iii) one or more constraints; generating a signal to be sent to each of the consumers categorized within a first of the two groups, wherein the signal comprises a temperature set-point adjustment proposal; and outputting the signals to the consumers categorized within the first of the two groups.
US10169835B2	Attribute energy consumption through power sensing and user localizations An approach is provided for attributing energy usage to individual occupants in an area, such as a building or office space. The approach receives current locations of occupants from sensors deployed in the area being monitored. Identifiers corresponding to various occupants are determined, such as by tracking the occupants' mobile telephone location, biometrics such as facial recognition, or other device-enabled means of identifying people. Energy consumption values corresponding to energy consuming devices are received and device locations are identified. The approach further attributes the amount of energy consumed by each of the occupants, with the energy attribution being based on the occupants' current locations and the device locations.
US10169831B2	Establishing social network service relationships This present disclosure discloses techniques for establishing social network service (SNS) relationship. According to the techniques, online payment information of the first user and/or the second user are obtained from the database of the online transaction platform. Using this online payment information, it is determined whether the first user and the second user know each other. If they do, a message to establish an SNS relationship establishment is sent to the first user. The message contains personal information of the second user and allows the first user to decide whether to establish the relationship. The techniques therefore improve security and success rates in establishing SNS relationships.
US10169825B2	System and method for processing vehicle requests A method and system for processing requests for vehicular data, including receiving a vehicle request for a vehicle parameter from a client system (e.g., third party application); verifying client access to the vehicle parameter; determining one or more parameter values for the requested vehicle parameter; and transmitting the one or more parameter values to the client system.
US10169822B2	Insurance rate optimization through driver behavior monitoring Disclosed are a method and/or a system of insurance rate optimization through driver behavior which includes a computer server of the driver monitoring environment to determine if a newly insured driver operating a private vehicle is adhering to a set of parameters set by an entity i.e. a driving school, an insurance provider and/or a family member of the newly insured driver. The system assigns a credit to the newly insured driver when it adheres to the set of parameters. The newly insured driver is monitored by the entity. A metadata is generated which includes a behavioral trait of the newly insured driver and an insurance rate is set through the insurance provider based on an adherence to the set of parameters set by the entity.
US10169814B2	High speed processing of financial information using FPGA devices A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to synthesize quote events associated with a plurality of financial instruments from a financial market data feed.
US10169810B2	Product information inconsistency detection A computerized method of detecting product description inconsistencies, comprising receiving from a seller a product description comprising one or more attributes of a product offered for sale on an online marketplace arena, extracting automatically the one or more attributes by analyzing the product description using one or more language analysis tool, analyzing automatically the one or more attributes compared to a plurality of attributes of one or more other products of a same class as the product to detect one or more inconsistencies of the product description with respect to the one or more attributes and outputting the at least one inconsistency.
US10169808B2	Rule based closure of purchase orders One or more computers may close a purchase order by use of rules. Certain embodiments use values of attributes of a line in a purchase order (PO) to identify a rule among multiple rules. The PO line's attributes which are used to identify the rule are internal to a buyer. When the rule which is identified is disabled, the line is retained unchanged in the purchase order. When the identified rule is not disabled, a user-specified logic which is identified in the rule is used to determine a new value of a numeric term, the numeric term having a preexisting value previously agreed upon by the buyer and the seller, e.g. in units of quantity or units of money. Subsequently, an indication of the line being changed in the purchase order is transmitted to the seller. User may specify different logics in different sets of rules, for different business units.
US10169801B2	System and method for supplementing an image gallery with status indicators In various example embodiments, a system and method to provide status indictors on an image galley is disclosed. At least one item to be displayed in an image gallery on a client device is identified. Once identified, status information for the item is obtained. Subsequently, gallery rendering and display instructions are generated and transmitted to the client device. The rendering and display instructions include the status information and enables generation of status indicators from the status information for display over the image gallery at the client device. The rendering and display instructions may also include instructions for displaying the image gallery. The status information at the client device may be updated as status information changes.
US10169799B2	Dynamically adjusted results for search interface Several systems, apparatuses, and methods are described. A data transmission that includes data indicating a first search query for an item of a publication system is received from a client machine. A first plurality of search results is determined from listed items based, at least in part, on the first search query, and the first plurality of search results are each associated with a price. A range of prices associated with a first subset of the search results is determined based on a price distribution range including a median price associated with the first search results, or a utility cost function using a plurality of price quantiles and a plurality of price values included in different price quantiles. The determined first search results and the range of prices associated with the first subset of the first search results are transmitted to the client machine for display.
US10169798B2	Automatic selection of featured product groups within a product search engine A method of computing a featured set of product groups for a query on an inventory of products. Each of the products can have one or more attribute-value pairs. Each of the one or more attribute-value pairs can have an attribute. The method can include determining a result group of the products matching the query. The method also can include determining relevance scores for the product groups. The method further can include determining a featured attribute and the featured set of the product groups for the featured attribute. The method also can include, after receiving the query from a user, transmitting for display at least one page of a website, where the at least one page has an option to view each of the product groups of the featured set of the product groups that has been selected. Other embodiments of related systems and methods are also disclosed.
US10169797B2	Identification of entities based on deviations in value Methods, systems, and apparatus, including computer programs encoded on a computer readable storage medium, for identifying entities based on value. In one aspect, the method may include actions for receiving a query that specifies a location. Additional actions may include identifying candidate entities that are identified as responsive to the query and that are associated with the location, selecting a subset of the candidate entities, and determining a representative value of an attribute that is associated with each candidate entity of the subset of the candidate entities. Other actions may include in response to determining that the current value of the attribute that is associated with the particular candidate entity of the subset deviates more than a threshold amount from the representative value, adjusting a ranking score for the particular candidate entity, and ranking the particular candidate based at least on the ranking score for the particular candidate entity.
US10169792B2	Network commerce system with lead processing A network commerce system comprises a product sale listing searchable by a consumer and comprising one or more products provided by a third-party vendor in a pay-per-lead format. A lead module is operable to obtain a consumer lead for a third-party vendor and determine whether the obtained consumer lead meets one or more quality standards, the consumer lead comprising a lead for sale of an item, the item provided by the third-party vendor.
US10169791B2	System for utilizing redemption information A system to determine offers and/or to determine the acceptability of offers based on received information relating to product redemption at a third party. According to one embodiment, the system includes arrangement for a customer to redeem a product from a third party, reception of information relating to a redemption of the product by the customer, reception of an offer to purchase a product for an offer price, determination to accept the offer based on the received information relating to the redemption, determination of an assigned third party at which the offer product may be redeemed based on the received information, and transmission of an acceptance of the offer and an indication of the assigned third party.
US10169787B2	Method, medium, and system for session based shopping The present disclosure involves systems and methods of communicating between devices in a shopping session. In one aspect, a method includes receiving a session identifier associated with a shopping session of a user, the session identifier being generated based on a hash created from a shopping location and at least one other value associated with the shopping session. The method further includes notifying an electronic shopping system associated with the shopping location about a selected product from the shopping session based on the session identifier. The receiving and the notifying are each performed by a computing system.
US10169784B1	Systems and methods for loan origination and servicing based on a recurring deposit of funds Customers of a financial institution may apply for a line of credit for use with, e.g., a web-based bill pay service. The credit line may be determined using an average value of the customer's previously direct-deposited paychecks and an analysis of the customer's spending behavior using the web-based bill pay service. In some implementations, the financial institution may aggregate data points associated with the customer to make a determination of an amount, an interest rate, and a term of the line of credit. The line of credit may be used to pay bills from a financial services institution and unrelated third-party billers with which the customer has a payment history, as well as provide for cash for use by the customer.
US10169774B2	Network based indoor positioning and geofencing system and method A network based indoor positioning and geofencing system and method is described. Beacons are disposed within a physical premises and each beacon transmits a signal containing identifying information. A networked indoor positioning module receives measured reference points that include a measured beacon identifier and a measured signal strength. The networked indoor positioning module uses the measured reference points to generate calculated signal strength values for at least one detected beacon. At least one geofence is associated with the physical premises and the geofence includes some of the calculated signal strength values. A wireless device receives a beacon identifier and a beacon signal strength, when the wireless device is in or near a geofence associated the physical premises. The networked indoor positioning module determines that the wireless device is within at least one geofence by comparing the received beacon identifier and the received beacon signal strength with the calculated signal strength values corresponding to the detected beacon.
US10169773B2	Digital downloading jukebox with revenue-enhancing features Certain exemplary embodiments described herein relate to digital downloading jukebox systems of the type that typically include a central server and remote jukebox devices that communicate with the central server for royalty accounting and/or content updates. More particularly, certain exemplary embodiments relate to jukebox systems that have revenue-enhancing features such as for example, music recommendation engines and bartender loyalty programs. Such innovative techniques help to both increase per jukebox revenue as well as keep jukebox patrons engaged with the jukebox.
US10169768B2	System and method for exchanging information bi-directionally A communications system and method by which information is transmitted and received bi-directionally between digital signage and individuals viewing scenes displayed on digital signage. The digital signage transmits and receives information via an RFID reader and the individual transmits and receives information via an RFID tag. The system and method are useful in providing subscribers to a product/service information database with individually customized information about products and services based on the personal profiles of the individual subscribers.
US10169766B2	Server apparatus, terminal apparatus, user's degree of interest calculation method, user's degree of interest calculation program, terminal program, recording medium having program recorded therein, and an information providing system A server apparatus according to the invention obtains, from a terminal apparatus, scroll operation information conducted on a display area of the terminal apparatus, and obtains content identification information for identifying the content displayed at the display area, and calculates the user's degree of interest in the content identified by the obtained content identification information.
US10169764B2	Secure end-to-end permitting system for device operations A permitting system for controlling devices in a system includes a permit issuing agent that receives a command to be sent to a device. Based upon at least one attribute of the command, the permit issuing agent identifies one or more business logic modules that is pertinent to the command. Each business logic module has a respectively different set of business rules associated with it. Each identified business logic module determines whether the command complies with the business rules associated with that module. If the command is determined to comply with the business rules of all of the identified business logic modules, the agent issues a permit for the command, and the permit is sent to the device for execution of the command.
US10169758B2	Deposit for non-account holders Systems and methods for depositing monetary funds into an account are described. A first request from a first individual to deposit monetary funds into an account associated with an entity may be received. The first individual is not an account owner of the account. Monetary funds from the first individual may be received for deposit in the account. The monetary funds may include cash, checks, credit card transfers, and/or debit card transfers. The receipt of the first request may be receipt of a paper ticket with an access code authorizing deposit of monetary funds into the account. One or more restrictions may be reviewed to authorize the deposit of monetary funds in the account.
US10169756B1	System and method for a mobile wallet A computer-implemented system and method includes receiving a first geographic location of a mobile device when a mobile wallet transaction is initiated, receiving a second geographic location of the mobile device after the mobile wallet transaction is initiated, comparing the first and second geographic locations to ensure a match, permitting the mobile device to process the mobile wallet transaction upon determining that the first and second geographic locations of the mobile device are within a predefined distance of each other, and transferring funds to a merchant after verifying that the second geographic location of the mobile device is within a predetermined distance of a location of the merchant.
US10169749B2	Systems and methods for tracking and adjustment of electronic transaction processing results A computer implemented system and method are disclosed involving technological advancements in the processing of electronic transaction processing results. The system may comprise a computer apparatus implementing a checking account system, a savings account system, a merchant account and investment account on a funds management system, and one or more computer systems and mobile devices including a communication interface, processor, memory storing computer-executable instructions, and savings modules. Reward amounts may be calculated based on various techniques.
US10169739B1	Systems and methods for reducing recidivism among former inmates The present invention provides systems and methods for facilitating the integration of former inmates into society upon release from inmate facilities. A representative embodiment of the present invention allows participating inmates to utilize one or more pre-defined services during their period of incarceration. Utilization of these pre-defined services increases the participant's likelihood of rehabilitation, thus reducing recidivism. Examples of pre-defined services include identification, education, employment, financial, housing, and social connection services. A release package based upon information collected during use of these services also provides a personal dossier that facilitates criminal investigations, parole evaluations, probation determinations, and the like.
US10169735B2	Customized packaging for unmanned autonomous vehicle item delivery Various embodiments enable delivering an item using an unmanned autonomous vehicle (UAV) in response to receiving an electronic order for an item. Order parameters may be determined based on the electronic order identifying the item and details regarding delivery of the item. UAV components may be selected for operating the UAV based on UAV parameters meeting the order parameters. UAV-compliant packaging parameters may be determined for transporting the item carried by the UAV. Selected UAV-compliant packaging may enable the UAV to meet at least some of the order parameters and the UAV parameters. Assembly of the UAV may be coordinated to include the selected UAV components and selected UAV-compliant packaging with the item therein. The selected UAV-compliant packaging may meet the determined UAV-compliant packaging parameters. The assembled UAV and packaging may be dispatched for delivering the item.
US10169734B2	Dynamic layout for organizational charts Techniques are described for dynamically adjusting the layout of an organizational chart being presented inside a browser window. Adjusting the layout of the organization chart has certain advantages such as ensuring that the organizational chart can be displayed in the browser window with minimal scrolling. The direct reports of a manager can be presented as a matrix in the organizational chart when the manager is selected. In one example, the layout of the matrix can be a vertical vector or a two dimensional vector depending on the number of direct reports the manager has. In another example, the layout of the matrix can change depending on the space available within the browser window to display the matrix. In other examples, the organizational chart can also be scaled based on the screen resolution or screen size of the client device that is presenting the organizational chart.
US10169732B2	Goal and performance management performable at unlimited times and places A mobile application enables employees to manage their goals and track their performance at any time, and from any place. A mobile device such as a tablet computer or a smart phone can download goal information over the Internet from a remote server. The mobile device can provide user interfaces through which its user can work on the goal. The mobile device can upload the result of the work performed on the mobile device to the remote server. The mobile application also enables an employee to augment his or her goal and performance data using data from third-party systems. The data from the third party systems can be incorporated into the goal and performance data as evidence of the employee progressing toward his goals. For example, such data from a third-party system might include tweets from a Twitter feed, or stock prices from a NASDAQ ticker feed.
US10169728B1	Opportunistic job processing of input data divided into partitions of different sizes A global-level manager access a work order from a client and parameters associated with the work order. A service level agreement to meet the work order parameters is determined. The service level agreement includes a price. An indication is received from the client that the service level agreement is accepted. The one or more input files are partitioned into multiple shards, and the work order into multiple jobs. The jobs are distributed among a plurality of clusters to be processed using underutilized computing resources in the clusters. The job outputs are combined to form the work order output. The jobs are monitored to insure that the deadline for completion of the work order will be met.
US10169725B2	Change-request analysis A method and associated systems for analyzing a change request of a project that involves an IT system, where IT system contains IT artifacts that have predefined relationships. One or more processors obtain a change request; use information contained in the change request to select an applicable decomposition agent; use information in the selected decomposition agent to decompose the change request into a set of component sub-change requests; correlate at least one of the sub-change requests with one of the IT artifacts; and display the sub-change requests. In alternate implementations, selecting the applicable decomposition agent may require additional user input.
US10169723B2	Distributed policy distribution for compliance functionality A multi-component auditing environment uses a set of log-enabled components that are capable of being triggered during an information flow in a data processing system. A “master” compliance component receives data from each log-enabled component in the set of log-enabled components, the data indicating a set of logging properties that are associated with or provided by that log-enabled component. The master compliance component determines, for a given compliance policy, which of a set of one or more events are required from one or more of the individual log-enabled components in the set of log-enabled components. As a result of the determining step, the master compliance component then configures one of more of the individual log-enabled components, e.g. by generating one or more configuration events that are then sent to the one or more individual components. This configuration may take place remotely, i.e., over a network connection. As a result of the information flow, audit or other logs are then collected from the log-enabled components. The master compliance component evaluates the collected logs to determine compliance with the compliance policy. As necessary, the master compliance component re-configures one or more log-enabled components in the set of log-enabled components to address any compliance issues arising from the evaluation. Thus, once a given compliance policy is specified, typically the individual log-enabled components in the multiple-component environment are not responsible for their own configuration, as that task is undertaken by the master compliance component.
US10169719B2	User configurable message anomaly scoring to identify unusual activity in information technology systems Embodiments include method, systems and computer program products for identifying unusual activity in an IT system based on user configurable message anomaly scoring. Aspects include receiving a message stream for the IT system and selecting a plurality of messages from the message stream that correspond to an interval. Aspects also include determining a message anomaly score for each of the plurality of the messages, wherein the message anomaly score for each of the plurality of the messages is determined to be one of a default message anomaly score and a custom message anomaly score and calculating an interval anomaly score for the interval by adding the message anomaly score for each of the plurality of the messages. Aspects further include identifying a priority level of the interval by comparing the interval anomaly score to one or more thresholds.
US10169716B2	Interactive learning A system and method are provided for shared machine learning. The method includes providing a model to a plurality of agents included in a machine learning system. The model specifies attributes and attribute value data types for an event in which the agents act. The method further includes receiving agent-provided inputs during an instance of the event. The agent-provided inputs include estimated attribute values that are consistent with the attribute value data types. The method also includes determining expertise weights for at least some agents in response to at least one ground-truth which is learned from the estimated attribute values. The method additionally includes determining an estimate value for one or more of the attributes using respective adaptive mixtures of the estimated attribute values.
US10169715B2	Feature processing tradeoff management At a machine learning service, a set of candidate variables that can be used to train a model is identified, including at least one processed variable produced by a feature processing transformation. A cost estimate indicative of an effect of implementing the feature processing transformation on a performance metric associated with a prediction goal of the model is determined. Based at least in part on the cost estimate, a feature processing proposal that excludes the feature processing transformation is implemented.
US10169714B2	Modular array of vertically integrated superconducting qubit devices for scalable quantum computing A technique relates to an assembly for a quantum computing device. A quantum bus plane includes a first set of recesses. A readout plane includes a second set of recesses. A block is positioned to hold the readout plane opposite the quantum bus plane, such that the first set of recesses opposes the second set of recesses. A plurality of qubit chips are included where each has a first end positioned in the first set of recesses and has a second end positioned in the second set of recesses.
US10169713B2	Real-time analysis of predictive audience feedback during content creation Providing predictive feedback during content creation in real-time. A server computer receives from a user-computing device an electronic document during creation of the electronic document in real-time. An intended audience specification is also received by the server computer for the received electronic document. The server computer calculates a similarity score for a plurality of viewer profiles. The server computer determines which viewer profiles have similarity score equal to or exceeding the similarity score threshold and then stores the determined viewer profiles. An individual interest level and an individual emotional response is calculated for the determined viewer profiles for a portion of the received electronic document. The server computer then transmits to the user-computing device the individual interest level and the individual emotional response of the determined viewer profiles.
US10169712B2	Distributed, predictive, dichotomous decision engine for an electronic personal assistant A system, method and user interface are described for providing a personal assistant functionality using a predictive, adaptive, dichotomous (two choices) decision engine that proactively prompts the user for decisions on matters deemed relevant by the decision engine based on past user decisions and activities.
US10169706B2	Corpus quality analysis A mechanism is provided in a data processing system for corpus quality analysis. The mechanism applies at least one filter to a candidate corpus to determine a degree to which the candidate corpus supplements existing corpora for performing a natural language processing (NLP) operation. Responsive to a determination to add the candidate corpus to the existing corpora based on a result of applying the at least one filter, the mechanism adds the candidate corpus to the existing corpora to form modified corpora. The mechanism performs the NLP operation using the modified corpora.
US10169702B2	Method for searching relevant images via active learning, electronic device using the same The present disclosure provides a method, an electronic device, and a user interface for searching a plurality of relevant via active searching. At first, a query image having a first subject and a second subject may be obtained from stored images. Next, a query concept based on content information of the query image may be learned by sampling first sample images from the stored images according to content information of the query image for relevance feedback. Then, the query concept is refined based on context information of the first selected images among the first sample images. Based on the refined query concept, relevant images among the stored images may be searched according to the query concept and grouped into a collection album.
US10169698B1	RF transponder on adhesive transfer tape The disclosed transponder arrangement includes adhesive transfer tape and an RF transponder. The adhesive transfer tape includes an adhesive layer disposed directly on a release liner, and the release liner is separable from the adhesive layer. An antenna is adhered directly to the adhesive layer, and an RF transponder is disposed on the adhesive layer and coupled to the antenna.
US10169697B1	Radio frequency tag having integrated and supplemental antenna elements A disclosed RF tag includes a substrate and an integrated circuit (IC) package disposed on the substrate. The IC package has an integrated antenna element coupled to circuitry of the IC package. The RF tag also includes an external antenna element of round wire having at least one half turn disposed against two or more surfaces of the IC package. The external antenna element is inductively coupled to the integrated antenna element, and the IC package laterally supports the at least one half turn of the external antenna element.
US10169690B2	Communication device that communicates with external device, control method for the same, and storage medium A communication device capable of certainly preventing an external device incompatible with an IPv6 address from acquiring the IPv6 address. A display unit is controlled so as to display a QR image including an IPv4 address of the communication device when the IPv4 address is valid in the communication device. When the IPv4 address is invalid and the IPv6 address is valid in the communication device, the display unit is controlled so as not to display a QR image including the IPv6 address of the communication device.
US10169686B2	Systems and methods for image classification by correlating contextual cues with images A sample set of images is received. Each image in the sample set may be associated with one or more social cues. Correlation of each image in the sample set with an image class is scored based on the one or more social cues associated with the image. Based on the scoring, a training set of images to train a classifier is determined from the sample set. In an embodiment, an extent to which an evaluation set of images correlates with the image class is determined. The determination may comprise ranking a top scoring subset of the evaluation set of images.
US10169684B1	Methods and systems for recognizing objects based on one or more stored training images The present invention discloses methods and systems for recognizing an object in an input image based on stored training images. An object recognition system the input image, computes a signature of the input image, compares the signature with one or more stored signatures and retrieves one or more matching images from the set of training images. The matching images are then displayed to the user for further action.
US10169679B1	Learning method and learning device for adjusting parameters of CNN by using loss augmentation and testing method and testing device using the same A learning method for adjusting parameters of a CNN using loss augmentation is provided. The method includes steps of: a learning device acquiring (a) a feature map from a training image; (b) (i) proposal ROIs corresponding to an object using an RPN, and a first pooled feature map by pooling areas, on the feature map, corresponding to the proposal ROIs, and (ii) a GT ROI, on the training image, corresponding to the object, and a second pooled feature map by pooling an area, on the feature map, corresponding to the GT ROI; and (c) (i) information on pixel data of a first bounding box when the first and second pooled feature maps are inputted into an FC layer, (ii) comparative data between the information on the pixel data of the first bounding box and a GT bounding box, and backpropagating information on the comparative data to adjust the parameters.
US10169674B2	Vehicle type recognition method and fast vehicle checking system using the same method A vehicle type recognition method based on a laser scanner is provided, the method comprising steps of: detecting that a vehicle to be checked has entered into a recognition area; causing a laser scanner to move relative to the vehicle to be checked; scanning the vehicle to be checked using the laser scanner on a basis of columns, and storing and splicing data of each column obtained by scanning to form a three-dimensional image of the vehicle to be checked, wherein a lateral width value is specified for each single column of data; specifying a height difference threshold; and determining a height difference between the height at the lowest position of the vehicle to be checked in data of column N and the height at the lowest position of the vehicle to be checked in data of specified number of columns preceding and/or succeeding to the column N.
US10169673B2	Region-of-interest detection apparatus, region-of-interest detection method, and recording medium A region-of-interest detection apparatus for improving detection accuracy of a region of interest in a case where a region of interest overlaps a background region, or in a case where feature amounts of a region of interest and a background region are similar to each other calculates feature amounts of regions where partial regions and a background region set in an input image overlap each other, and based on the calculated feature amounts and a feature amount of each position in the input image, calculates a foreground level of the position in the input image. Then, the region-of-interest detection apparatus detects a region of interest from the input image based on the calculated foreground level and a saliency of the position.
US10169672B2	Method of host-directed illumination and system for conducting host-directed illumination A method of host-directed illumination for verifying the validity of biometric data of a user is provided that includes capturing biometric data from a user with an authentication device during authentication and directing illumination of the biometric data from a host authentication system during the capturing operation. Moreover, the method includes comparing illumination characteristics of the captured biometric data against illumination characteristics expected to result from the directing operation, and determining that the user is a live user when the illumination characteristics of the captured biometric data match the illumination characteristics expected to result from the directing operation.
US10169670B2	Stroke extraction in free space An approach for stroke extraction in free space utilizing a paired ring device is provided. The approach receives one or more images transmitted from the paired ring device, wherein the one or more images are transcribed sequentially from data related to one or more movements recorded by the paired ring device, and wherein the one or more images include one or more of a plurality of vector points, a plurality of coordinates, and a plurality of dots interconnected by a plurality of lines. The approach inputs the one or more images into a character training model. The approach maps the one or more images into one or more characters. The approach transcribes the one or more characters into a digital document.
US10169669B2	Driving assistance apparatus and driving assistance method A driving assistance apparatus includes a sign recognizing unit, a notification executing unit, and a lane change determining unit. The sign recognizing unit recognizes a traffic sign from an image captured by an on-board imaging apparatus. The notification executing unit notifies a driver of information indicated by the traffic sign recognized by the sign recognizing unit. The lane change determining unit determines whether or not an own vehicle is making a lane change. If the lane change determining unit determines that the own vehicle is making a lane change while traveling on a road in which different traffic signs are provided among traffic lanes, the notification executing unit notifies the driver of destination lane information that is information for a traffic lane to which the own vehicle is moving.
US10169667B2	External environment recognizing device for vehicle and vehicle behavior control device A position of a moving object is reliably detected with high accuracy using only an image around a vehicle. A rear camera mounted on a vehicle obtains an original image around the vehicle, a movement region detector detects a moving object from the original image, and a difference calculator detects the moving object from a bird's-eye view image of the vehicle generated by a bird's-eye view image processor. A moving object position identifying part identifies a position of the moving object based on a distance from the vehicle to the moving object detected by the movement region detector or the difference calculator, a lateral direction position of the moving object, and an actual width of the moving object detected by the movement region detector when a detected object determination part determines that the moving objects detected by the movement region detector and the difference calculator are the same moving object.
US10169666B2	Image-assisted remote control vehicle systems and methods Systems and methods for an image-assisted remote control vehicle are provided. An image-assisted remote control system may include a motion controlled device such as an image-assisted remote control vehicle and a remote control device. The motion controlled device may include one or more imaging modules, such as a thermal imaging module and/or a non-thermal imaging module. An infrared image of a part of a track may be captured using the infrared imaging module. A boundary of the track may be detected using the infrared image. The operation of the vehicle may be modified based on the boundary. Modifying the operation of the vehicle in this way may provide a remote controlled vehicle with the ease of use of a slot car track set, the flexibility of remote control cars and the ability for a user to design their own track.
US10169658B2	Computerized video file analysis tool and method A system for dynamically creating and presenting video content information to a user of a computer having an associated screen involves: i) loading contents of a video file into a video player; ii) displaying frames of the video file; iii) receiving a user's input indicating selection of an object displayed in at least one frame; iv) performing an object identification analysis of frames to locate each instance where a specific frame contains the object; v) for each specific frame that contains the object, performing a z-axis analysis of the object to determine prominence of the object within each specific frame; vi) storing metadata indicating results of the object identification analysis and, for frames where the object was present, the z-axis analysis; and vii) automatically generating and displaying a graphical timeline display graphically reflecting frames containing the object and object prominence within those frames based upon the metadata.
US10169657B2	Method of extracting logo mask from video stream having logo In a method of extracting a logo mask from a video stream having a logo, a video stream including a plurality of frames is received. A plurality of online-weighted-average frames is sequentially generated using the video stream. A logo-boundary-score map is generated using a current frame among the plurality of frames and a current online-weighted-average frame among the plurality of online-weighted-average frames. The logo-boundary-score map includes a plurality of logo-boundary-score entries, each of which corresponds to one of a plurality of pixels of the video stream and includes a probability that a corresponding one of the plurality of pixels is a logo-boundary pixel. The logo mask includes a plurality of entries, each of which corresponds to one of the plurality of pixels and represents whether a corresponding one of the plurality of pixels is a logo pixel or a non-logo pixel.

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