最新美国发明专利第2019-01-01期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US10171810B2	Transform coefficient coding using level-mode and run-mode Video transform coefficient encoding and decoding methods are provided. A two-dimensional array of quantized transform coefficients are obtained for a block of a video frame. The two-dimensional array of quantized transform coefficients are converted to a one-dimensional array of integer samples using a scan pattern, wherein each sample is represented with a level that is an absolute value of the sample and a sign bit if the level is greater than zero. The one-dimensional array of samples is converted to a bit-stream by processing the one-dimensional array of samples in sequential order. A switch is adaptively made between multiple coding modes, where each coding mode is characterized by how consecutive coefficients are jointly coded as a single event. For each mode, a switch may be adaptively made between various variable length code (VLC) tables.
US10171808B2	In-loop adaptive wiener filter for video coding and decoding A video encoder may use an adaptive Wiener filter inside the core video encoding loop to improve coding efficiency. In one embodiment, the Wiener filter may be on the input to a motion estimation unit and, in another embodiment, it may be on the output of a motion compensation unit. The taps for the Wiener filter may be determined based on characteristics of at least a region of pixel intensities within a picture. Thus, the filtering may be adaptive in that it varies based on the type of video being processed.
US10171805B2	Video encoding device and program, video decoding device and program, and video distribution system The present invention relates to a video distribution system including a video encoding device which generates video data encoded per a unit of frame and a video decoding device which decodes the video data supplied from the video encoding device. The video encoding device includes a predicted image generator which generates a predicted image of a non-key frame, by using a key frame, an updated original image generator which compares each parameter representing a predicted image of the non-key frame with respective parameter values for each parameter representing an original image of the non-key frame, and according to this comparison result, generates an updated original image by selecting parameter values of either the predicted image or the original image for each parameter, and an error correction code generator which generates an error correction code for correcting an error of the updated original image to the non-key frame.
US10171804B1	Video frame encoding scheme selection Disclosed is a method, a system and a computer readable medium for encoding a video stream. The method includes determining a first time period based on a first estimated processing time algorithm, determining a second time period based on a second estimated processing time algorithm, comparing an encoding time period of the video frame to the first time period and the second period, and changing an encoding scheme for encoding a subsequent video frame if two times the encoding time of the video frame is one of less than the first time period and greater than the second time period.
US10171803B2	Image capturing apparatus, calibration method, and non-transitory computer-readable medium for calculating parameter for a point image restoration process An image capturing apparatus according to an aspect of the present invention includes an image capturing unit, a display unit that displays an imaged picture imaged by the image capturing unit and a guide linearly shaped along a sagittal direction or a tangential direction in the imaged picture, the guide assisting imaging of a calibration image used for calibration in a point image restoration process, and a parameter calculation unit that calculates a parameter for the point image restoration process on the basis of the calibration image imaged by the image capturing unit with assistance from the guide.
US10171800B2	Input/output device, input/output program, and input/output method that provide visual recognition of object to add a sense of distance An I/O device, an I/O program, and an I/O method that can add a sense of distance from the position of visually recognizing eyes to a stereoscopic image that is a virtual image, through an object that is a real image and provide visual recognition as if the stereoscopic image were associated with the object are provided. An I/O device of the present invention includes a display device that can generate a stereoscopic image, a depth level sensor that measures a distance to an object, and an event generating unit that generates an event according to a mode of the object at least either in a stereoscopic region of the stereoscopic image generated by the display device or in a depth level detection region of the depth level sensor.
US10171797B2	Systems and methods to confirm that an autostereoscopic display is accurately aimed A autostereoscopic display system includes an autostereoscopic display configured to project images representing a left-eye view and a right-eye view of an image, an emitter configured to emit a tracer beam having a directional relationship to that of the projected images, a sensor configured to detect reflections of the tracer beam, and a processing circuit. The processing circuit is configured to control an emission of the tracer beam, receive feedback data from the sensor, use the feedback data to determine an impact site on the viewer corresponding to the tracer beam and adjust a direction of the tracer beam based on the impact site.
US10171796B2	Moving body system A moving body system includes an imaging device attachable to a moving body, a visual line direction changing mechanism configured to change a visual line direction of the imaging device and a control unit configured to change the visual line direction of the imaging device in accordance with changing of a movement direction of the moving body.
US10171795B2	System and method for generating disparity map by matching stereo images A system for generating a disparity map includes: an image obtainer obtaining a left image and a right image; a matching cost calculator calculating a matching cost for each of a plurality of pixels of the left image and the right image; an accumulation and summation calculator calculating an accumulation value of one of the pixels based on the calculated matching cost, and calculating a relaxation accumulation value, which is an average of values obtained by multiplying each of relation coefficients between a disparity value of the one pixel and disparity values of surrounding pixels of the one pixel with the accumulation value of the one pixel; a disparity value deliver deriving a disparity value for each of the pixels based on the calculated relaxation accumulation value; and a disparity map generator generating the disparity map based on the derived disparity value.
US10171794B2	Method for selecting cameras and image distribution system capable of appropriately selecting cameras In a method, M (M is a natural number smaller than N) cameras capturing images to be displayed are selected from N (N is a natural number equal to or larger than 2) cameras capturing images of a same scene. The method includes obtaining positions and image capture angles of the N cameras and selecting M cameras from the N cameras on the basis of the obtained positions and image capture angles of the N cameras.
US10171793B2	Image capturing device and method thereof An image capturing device is provided comprising an image sensor for capturing a first image of a scene, a light source for illuminating the scene with a first flash of coded light, and a network interface for communicating with a communications network and/or a further image capturing device. The device is operative to encode information into the first flash, enabling retrieval of the first image from a first data storage, capture the first image, and store the first image in the first data storage. Optionally, the device may be operative to detect a second flash of coded light emitted by the further image capturing device, decode information enabling retrieval of a second image captured by the further image capturing device from a second data storage, retrieve the second image, and create a 3D model from the first image and the second image.
US10171788B2	Playback method according to function of playback device A method to be performed by a playback device includes determining whether the playback device has a function for converting first graphics in a second luminance range narrower than a first luminance range to second graphics in the first luminance range, when the playback device has the function, converting the first graphics to the second graphics, and displaying a video in the first luminance range with the second graphics being superimposed on the video, and when the playback device does not have the function, displaying the video with third graphics different from the second graphics being superimposed on the video.
US10171786B2	Lens shading modulation This disclosure pertains to systems, methods, and computer readable media for performing lens shading correction (LSC) operations that modulate gains based on scene lux level and lens focus distance. These gains compensate for both color lens shading (i.e., the deviation between R, G, and B channels) and vignetting (i.e., the drop off in pixel intensity around the edges of an image). As scene illuminance increases, the sensor captures more signal from the actual scene, and the lens shading effects begin to appear. To deal with the situation, the lens shading gains are configured to adaptively ‘scale down’ when scene lux approaches zero and ‘scale up’ when scene lux changes from near zero to become larger. The lens shading gain may also be modulated based on the focus distance. For optical systems without zoom, the inventors have discovered that the amount of lens shading fall off changes as focus distance changes.
US10171779B2	Optimizing drive schemes for multiple projector systems Light projection systems and methods may comprise combining light from two or more projectors. Each projector may be controlled so that the combined light output of the projectors matches a target for the projected light. In some embodiments optimization is performed to generate image data and control signals for each of the projectors. Embodiments may be applied in image projecting applications, lighting applications, and 3D stereoscopic imaging.
US10171774B2	Camera control device, camera control method, and camera control system A camera control device includes: an entering prediction value calculator configured to calculate an entering prediction value representing a possibility of entering of the user terminal in a monitoring range of the camera; an entering prediction time calculator configured to calculate entering prediction time that is prediction time necessary for the entering of the user terminal in the monitoring range of the camera; a preparation time calculator configured to calculate preparation time necessary for running the application on the camera; and a determination unit configured to determine whether preparation for running of an application on the camera is started.
US10171771B2	Camera system for video conference endpoints A camera system for a video conference endpoint includes a fixed wide lens camera providing a view of a space, a first fixed camera providing a view of a first portion of the space, a second fixed camera providing a view of a second portion of the space, a third fixed camera providing a view of a third portion of the space, and a processor operatively coupled to each of the cameras. Each of the cameras is configured to produce a video signal and the processor is configured to receive the video signals and select a relevant video signal from the video signals. The processor is also configured to process the relevant video signal by digitally panning, tilting, and zooming of the relevant video signal to generate a video stream from the processed video signal.
US10171769B2	Sound source selection for aural interest A viewer-selectable audio display region is associated with certain pixels of a video feed visible to the viewer of the video. Directional microphones provide audio signals for specific audio sources within a three-dimensional (3-D) video recording space. The recorded video signal is augmented with the audio signals and identified sound sources. The sound sources are mapped to pixels on the display. When the viewer selects the pixels, one or more audio recordings are: (i) played; (ii) amplified; (iii) mixed; and/or (iv) otherwise processed.
US10171768B2	Curve profile control for a flexible display Facilities are provided herein for automatically determining and applying curve profiles to flexible displays. An example process includes obtaining content to be presented on a flexible display, automatically determining a curve profile to apply to the flexible display in association with presentation of the content on the flexible display, the automatically determining being based at least in part on an analysis of the content to be presented, and applying the curve profile to the flexible display in association with the presentation of the content on the flexible display.
US10171766B2	Imaging device with reduced delay in display An imaging device includes an image sensor that performs imaging operations at intervals of a predetermined sensor cycle, an image data generator that generates image data based on output data from the image sensor, and a display that displays an image represented by the image data within a second display scanning period whose length is shorter than a first display scanning period corresponding to a display cycle that is N times the sensor cycle (N being an integer larger than or equal to “2”) by a margin period.
US10171765B1	Bit line boost for fast settling with current source of adjustable size A photodiode is adapted to accumulate image charges. A transfer transistor transfers the image charges to the floating diffusion. A source follower transistor is coupled to receive the voltage of the floating diffusion and provide an amplified signal. A row select transistor enables the amplified signal and outputs the amplified signal to a bitline. A first current source generator is coupled between the bitline and a ground. The first current source generator sinks current through a first cascode transistor, a first bias transistor and a second bias transistor. The first cascode transistor is biased by a cascode control voltage. The first bias transistor and the second bias transistor are biased by a bias control voltage.
US10171761B2	Solid-state imaging device and electronic device The present technology relates to a solid-state imaging device and an electronic device that enable a reduction in the voltage of an AD conversion circuit. A solid-state imaging device includes: a plurality of pixels; a vertical signal line configured to output a pixel signal of the pixel; and a clipping circuit configured to limit a voltage of the vertical signal line to a predetermined voltage. The clipping circuit includes a transistor configured to generate the predetermined voltage in accordance with a voltage of a gate, and a sample holding circuit configured to hold a reset level of the pixel that is output to the vertical signal line, and input the reset level to the gate of the transistor. The present technology can be applied to a CMOS image sensor, for example.
US10171759B2	Imaging device, method for controlling imaging device, imaging system, and method for controlling imaging system A first projection controller of an imaging device controls a first infrared projector, capable of projecting infrared light with multiple wavelengths, to selectively project the infrared light with the multiple wavelengths. An imaging unit of the imaging device images an object in a state where the first infrared projector projects the infrared light. A synchronous signal transmitter transmits outward a synchronous signal for synchronizing a timing of projecting infrared light from a second infrared projector controlled by a second projection controller included in another imaging device other than the imaging device, with a timing of projecting the infrared light from the first infrared projector controlled by the first projection controller.
US10171757B2	Image capturing device, image capturing method, coded infrared cut filter, and coded particular color cut filter Disclosed is an image capturing device that can easily perform image processing of visible light region and that of near infrared region, while utilizing a general image capturing device structure. The image capturing device comprises: a color filter that divides an incident light into a plurality of color lights; a photo sensor that converts the plurality of color lights as divided by the color filter to data representing image signals; a coded infrared cut filter that is placed before the color filter in the light proceeding direction or between the color filter and the photo sensor and that has infrared cut parts for cutting off near infrared lights and infrared passage parts for allowing near infrared lights to pass therethrough; and an image processing means that acquires a plurality of pieces of color information and a piece of near infrared information for each of a plurality of pixels on the basis of a plurality of image signals related to the lights having passed through the infrared cut parts and an image signal related to the light having passed through the infrared passage part for each of the pixel and adjacent pixels.
US10171756B2	Image-based localization of ultraviolet corona Systems and methods for identifying a fault in an electrical distribution system may include capturing an image of a corona event associated with a component of the electrical distribution system and processing the image of the corona event to identify the center and boundary of the corona event. An overlay for display with the image of the corona event may be generated, where the overlay identifying at least a center of the corona event and may be displayed to a user via a user interface device. In some cases, an unmanned aerial vehicle may comprise one or more image sensors capable of capturing the image of the corona event and communicate the images to a remote device for processing and display to the user. The image captured by the image sensors may include an ultraviolet image, a visible spectrum image, an infrared image, or a combination of image types.
US10171755B2	Systems and methods for detecting light sources A method for detecting light sources. The method includes capturing an image including a sub-infrared light emitter, applying a filter to a pixel of the captured image to isolate a signal strength of a range of frequencies, and comparing the signal strength of the filtered pixel to an expected signal strength of a background spectra for the range of frequencies. As a result of a difference between the signal strength of the filtered pixel and the expected signal strength exceeding a predetermined threshold, the method includes identifying the pixel as corresponding to a light emitter. As a result of the difference between the signal strength of the filtered pixel and the expected signal strength not a predetermined threshold, the method includes identifying the pixel as not corresponding to a light emitter.
US10171754B2	Overlay non-video content on a mobile device Methods, systems, and devices are described for presenting non-video content through a mobile device that uses a video camera to track a video on another screen. In one embodiment, a system includes a video display, such as a TV, that displays video content. A mobile device with an integrated video camera captures video data from the TV and allows a user to select an area in the video in order to hear/feel/smell what is at that location in the video.
US10171746B2	Drone with a front-view camera with segmentation of the sky image for auto-exposure control The drone comprises a camera (14), an inertial unit (46) measuring the drone angles, and an extractor module (52) delivering image data of a mobile capture area of reduced size dynamically displaced in a direction opposite to that of the variations of angle measured by the inertial unit. The module analyses the image data elements of the useful area to assign to each one a weighting coefficient representative of a probability of belonging to the sky, and defines dynamically a boundary of segmentation (F) of the useful area between sky and ground as a function of these weighting coefficients. Two distinct groups of regions of interest ROIs are defined, for the sky area and for the ground area, respectively, and the dynamic exposure control means are controlled as a function of the image data of the ROIs of one of these groups, in particular by excluding the ROIs of the sky area.
US10171744B2	Image processing apparatus, image capture apparatus, and control method for adding an effect of a virtual light source to a subject With respect to a subject included in an image, the illuminating condition by an ambient light source in an environment where the image was captured is estimated, and based on the estimation result, the effect of a virtual light source that was non-existent at the time of image capture is computed. More specifically, the effect of the virtual light source is computed using an illumination direction of the virtual light source and the reflective characteristics of the subject illuminated by the virtual light source, which have been determined based on the estimation result, and an image derived from addition of the effect of the virtual light source is output.
US10171735B2	Panoramic vision system A panoramic vision system includes a processor configured to convert received images into images in a spherical coordinate; a memory coupled to the processor and configured to store the images in the spherical coordinate; and a spherical display coupled to the processor, wherein the spherical display has a sphere center, the spherical display comprises a plurality of light-emitting-diode pixels being arranged according to the spherical coordinate, there is a same radial distance between each light-emitting-diode pixel of the plurality of light-emitting-diode pixels and the sphere center, in the plurality of light-emitting-diode pixels, there is a same azimuth spacing between adjacent two of the plurality of light-emitting-diode pixels at a zenith angle, and there is a same zenith spacing between adjacent two of the plurality of light-emitting-diode pixels at an azimuth angle.
US10171733B2	Image processing apparatus and method, and program and recording medium In a camera which electronically realizes panning, tilting, and zooming, on the basis of the luminance detected in each frame period (n−1), a condition of exposure for two frame periods thereafter (n+1), and digital gain for three frame periods thereafter (n+2) are set. When an instruction for changing the extracted region is received in a certain frame period (n−1), the region extracted from the image is changed three frame periods thereafter. It is possible to achieve a stable exposure control by which the luminance of the image varies little even when the region extracted from the image is switched.
US10171730B2	Information processing apparatus, method of controlling information processing apparatus, and storage medium An apparatus comprises an unit configured to obtain captured images captured at a plurality of positions/orientations; an unit configured to generate a guidance instruction for causing a captured image corresponding to a position/orientation substantially the same as a captured image of a stipulated state to be obtained; an unit configured to output the guidance instruction; an unit configured to determine whether or not one captured image obtained after output of the guidance instruction was captured at a position/orientation substantially the same as the captured image of the stipulated state; and an unit configured to, if the one captured image is determined to be captured at the position/orientation, generate or update a three-dimensional map from three-dimensional coordinates of a feature included in a captured image based on the plurality of captured images including the one captured image.
US10171728B2	Image processing device, photographing control method, and program An information processing system that acquires first image data captured by a first camera unit disposed on a first side of a housing; acquires second image data captured by a second camera unit disposed on a second side of the housing, which is opposite to the first side of the housing; and modifies the second image data based on the first image data.
US10171727B1	Resetting single-control apparatus According to one embodiment, an image-taking apparatus wherein a first actuation of a control element locks image-taking parameters and a subsequent actuation of this control element causes a picture to be taken. In one embodiment, the apparatus is a cellular telephone equipped with a camera wherein a first press on the volume up button locks focus and exposure. The photographer can then recompose the picture according to the ‘half-press’ technique and take a picture with a subsequent press on the volume up button. The locked focus and exposure may be unlocked after a predetermined timeout period during which no picture was taken. Other embodiments are described.
US10171726B2	Image shooting apparatus for setting image shooting condition easily and method thereof A shooting apparatus includes a touch panel on a display and performs self-timer shooting. The shooting apparatus includes a CPU configured to detect a dragging manipulation status from a touch start point on a fixed or an arbitrary point on the touch panel to an end of the touch, update one condition selected out of a self-timer time and a continuous shooting number as a first shooting condition, perform a control of updating and displaying the updated first shooting condition on at least one position selected out of a point on the display corresponding to the touch start point, the fixed point on the display, and a point on the display along with the dragging manipulation status whenever the first shooting condition is updated, and set the updated first shooting condition as a shooting condition for performing a shooting.
US10171715B2	Camera module with integrated chip-on-board image sensing chip A camera module includes a circuit board, a camera device and an image processing chip. An image sensation chip of the camera device is directly integrated with the circuit board by means of chip-on-board (COB) manufacturing process to minify the total volume of the camera module, whereby the camera module can be disposed in a narrow space.
US10171714B2	Systems and methods involving edge camera assemblies in handheld devices Systems and methods are disclosed for capturing and displaying real-time images of the environment in front of a user. In one implementation, a casing for a mobile device having an upward facing display surface and an opposing lower surface is provided. The casing may include a housing and image sensor having at least one optical axis configured to be oriented at a fixed obtuse angle with respect to the lower surface when the mobile device is retained by the housing. The image sensor may be oriented such that when the housing is held by a walking user at an acute angle with respect to a plane on which the user walks, the at least one optical axis generally faces in a walking direction of the user. The casing may further include circuitry for conveying from the at least one image sensor, image data for real-time display on the display surface.
US10171712B2	Thermal extraction architectures for camera and lighting devices Thermal extraction architectures for heat-generating electronic devices such as digital cameras or lights are disclosed.
US10171711B1	De-emphasized image signal transmission A transmitter circuit coupled to output image data from an image sensor includes a plurality of transmitters. The transmitters may include a plurality of drivers coupled to receive a data signal, and output a differential signal in response to receiving the data signal. A de-emphasis circuit is coupled between a first output of a first driver in the plurality of drivers, and a second output of a second driver in the plurality of drivers. The de-emphasis circuit is coupled to receive a de-emphasis control signal, and in response to receiving the de-emphasis control signal, the de-emphasis circuit reduces a magnitude of the differential signal.
US10171709B2	Vehicle vision system utilizing multiple cameras and ethernet links A vehicular vision system includes a plurality of cameras disposed at the vehicle and having respective fields of view exterior of the vehicle and being operable to capture frames of image data. Image data captured by each of the cameras is provided to an ECU via an ETHERNET link from the respective camera to the ECU. At least one control signal for controlling operation of each camera is provided from the ECU to the respective camera via the respective ETHERNET link. Image data captured by at least one of the cameras is processed at the ECU to detect an object present exterior of the equipped vehicle, wherein the object is a vehicle that is approaching the equipped vehicle and that is traveling in a traffic lane adjacent to a traffic lane in which the equipped vehicle is traveling.
US10171706B2	Configuring an imaging system Examples of a method and a system for configuring an imaging system are described. These examples involve obtaining a random sample of area coverage representations and grouping these by an estimated color, such as a colorimetric value. In each group a selected area coverage representation is determined with respect to one or more imaging attributes. A color gamut based on the random sample and the selected area coverage representations are used to generate a color mapping from an input color space to an area coverage representation space for use by the imaging system.
US10171705B2	Management apparatus, image forming apparatus management system for managing usage of the image forming apparatus A management apparatus connected to an image forming apparatus for managing usage of the image forming apparatus is disclosed. The management apparatus includes a user data storage part for storing user identification data and use restriction data corresponding to the user identification data, and a use restriction data acquiring part for acquiring the use restriction data corresponding to the user identification data.
US10171704B1	Methods and systems for thickening an interior region of a fill object Methods and systems for thickening an interior region of a fill object are described. The method includes receiving a print job including an input image, and converting into a digital bitmap image comprised of an array of pixels, each pixel being assigned with a pixel value and an object tag information. Based on this, each pixel is defined as one of a boundary pixel of the input image, an edge pixel of the fill object in the input image, and an interior pixel of the fill object. Thereafter, the fattening of the edge pixels of the fill object, is followed by the fattening of the interior pixels of the fill object, for applying thickening to the interior region. After this, an output image is generated.
US10171702B2	Image reading apparatus An image reading apparatus includes: a contact glass provided at an upper surface of a main body of the apparatus to set a manuscript thereon, an image sensor being positioned below the contact glass and having a reading surface on contact glass side for reading an image from the manuscript on the contact glass, a carriage supporting the image sensor accommodated in a sensor container formed to have a recess open to the contact glass side, a rail member slidably supporting the carriage, and a biasing member biasing the image sensor to the contact glass side via a biased portion adjacent to the reading surface of the image sensor. An upper end of the biasing member is positioned below the contact glass and above the lower surface of the image sensor.
US10171698B2	Image forming apparatus including short-distance wireless communication unit, method of controlling the same, and storage medium An image forming apparatus equipped with a plurality of service applications for providing respective services, in a state enabling a selected one of the service applications to be automatically started from a terminal apparatus. An image forming apparatus capable of performing printing includes a NFC unit. An NFC controller generates data to be read out by an external apparatus, according to selection of one of a plurality of applications. The NFC controller writes the generated data into the NFC unit.
US10171694B2	Conveyance device and image forming device A conveyance device that conveys paper through a conveyance path along a surface thereof includes: a conveyance guide that has a guide surface to be a wall surface on one side of the conveyance path, an opening being formed in the guide surface; a paper detection unit at least including a detection member, which is arranged in a space that communicates with the conveyance path through the opening, and configured to detect, with the detection member, a leading end of the paper that reaches the opening; and a movable body that brings the detection member into a retracted state, in which a main part thereof is covered from the space, after the leading end of the paper is detected.
US10171693B2	Bezel with bars for protecting a calibration label An apparatus can include a frame having a first side and a second side spaced apart from and substantially parallel to the first side by a third side that interconnects and extends longitudinally between the first side and the second side. The third side can define a portion of a media path. A surface of the third side includes a calibration area in the media path, the calibration area extending from an input edge to an exit edge in a media path direction that is substantially transverse to the longitudinal dimension of the third side. A plurality of bars can protrude outwardly from the surface of the third side in the calibration area. Each of the bars extends in the media path direction and has a leading edge and a trailing edge, the leading edge.
US10171692B2	Multifunction peripheral A multifunction peripheral comprises an operating panel, and a home screen for performing selection of an operation mode, etc. on the operating panel is displayed if a home button is operated. If selecting a simple copy button in the home screen, for example, a copy screen is displayed on the operating panel. Furthermore, if selecting a simple facsimile button in the home screen, a fax screen is displayed on the operating panel. Furthermore, if selecting a simple scan button in the home screen, a scan screen is displayed on the operating panel. Layout of the home screen and layout of each of the copy screen, the facsimile screen and the scan screen are similar to each other.
US10171690B2	Print-image generation with screen for aligning images and eliminating overlap by user operation A print-image generation device comprising: a display; and a processor that controls the display to display a print-image generation screen and a plurality of part images in the print-image generation screen, and performs alignment of at least one of the plurality of part images to generate a print image composed of the plurality of part images, wherein the processor, when the alignment is performed in a state in which two or more part images are selected from among the plurality of part images in the print-image generation screen, performs first alignment of the two or more part images on the basis of a mutual positional relationship between the two or more part images, determines whether or not there exists an area in which the two or more part images overlap each other as the result of the alignment, and when it is determined that there exists an area in which the two or more part images at least partially overlap each other, notifies a user that the overlapped area exists, and when the user is notified that the overlapped area exists, moves at least one of the part images that at least partially overlap each other in the overlapped area so as to eliminate the overlapped area, or changes a size of at least one of the part images that at least partially overlap each other in the overlapped area to a size that eliminates the overlapped area, on the basis of operation by the user.
US10171685B2	Service providing system, information processing method, and non-transitory recording medium A service providing system is for providing a service that is in cooperation with a printing service that is provided by an external printing system. The service providing system includes a job obtaining unit configured, when receiving from the printing system a notification representing that a print job is created by the printing service, to obtain the print job from the printing system; a job managing unit configured to store, in a job storage unit, the print job obtained by the job obtaining unit; and a job transmitting unit configured to transmit the print job stored in the job storage unit in response to a print job request from an image forming apparatus that is coupled to the service providing system via a network.
US10171681B2	Service design center for device assisted services A network service plan provisioning system processes multiple service plan components, where the components are allowed to have respective traffic classification filters that, due to an overlap in classification, can each match the same network traffic event. A user can include multiple such components in the same service plan by creating a prioritization. The provisioning system processes and deploys the components to one or more network devices via an instruction set such that all such components are active for the service plan but the prioritization determines which component is activated when multiple component filters match a network traffic event.
US10171680B1	Call processing system for modifying inmate communication limits A system for customizing time limits for inmate communications in a correctional facility is disclosed. The system includes a profile subsystem that stores an inmate profile of the inmate and a communication processing subsystem comprising one or more processors configured to receive data of an inmate communication of an inmate, identify a type of communication device of the inmate and a call recipient of the inmate communication based on the data of the inmate communication, retrieve the inmate profile of the inmate form the profile subsystem, identify a plurality of behaviors of the inmate based on the inmate profile, determine a time limit based on at least one of the type of communication device, the call recipient of the inmate communication, and the plurality of behaviors of the inmate, and assign the time limit to the inmate communication of the inmate.
US10171673B2	System and method for performing certain actions based upon a dialed telephone number Systems and methods of placing a telephone call for a user include monitoring the telephone number that the user has requested to reach. Depending upon the telephone number requested by the user, the system might take an alternate action, rather than simply placing a call to the requested telephone number. In some instances, the system might take an action in addition to placing a call to the requested telephone number.
US10171672B2	System and method for dynamic call diversion A system includes a contact center to provide an interaction between a customer and an agent workstation of the contact center. A contact center network connects a call from a mobile device to an interactive voice response application. A mobile engagement platform collect authentication information from the mobile device to authenticate a customer using the mobile device. A short message service platform sends a link to connect the mobile device to a mobile application. The mobile engagement server authenticates the customer of the mobile device for the mobile application based on the collected authentication information.
US10171671B1	Customer service call routing and/or scheduling system and method A method of routing a communication of a customer to an appropriate service representative includes, in accordance with an embodiment of the present disclosure, identifying, within a database stored to a server, a customer account associated with the customer. The method also includes analyzing a data fingerprint saved to the customer account, where the data fingerprint comprises data indicative of a plurality of life events associated with the customer. The method also includes determining, via a switch, the appropriate service representative based on the analyzing of the data fingerprint.
US10171664B2	Customer care mobile application A system and method is provided for providing contact center services via a mobile application on a mobile device. Status of a service request that is transmitted to a contact center is monitored. When a change in the status is detected, a notification is automatically transmitted to the mobile application. An interaction request is received from the mobile application in response to the notification. The interaction request identifies the service request. A party handling the service request is identified in response to receipt of the interaction request. The identified party is invited for engaging in interaction with the mobile device.
US10171643B2	Directing audio output based on gestures Device and method for directing audio input and output between a plurality of electronic devices. Event records are stored in memory and each event record records a specific combination of states relating to a first device or a second device and are associated with an action. Each action specifies a direction of audio input and output. States of the first and second devices are monitored. Changes to states are detected. Based on specific combination of states, one of the event records associated with the specific combination of states is identified. The action associated with the identified event record is performed and audio input and output between the electronic devices is directed in accordance with the associated action.
US10171635B2	Ensuring properly ordered events in a distributed computing environment A first event occurs at a first computer at a first time, as measured by a local clock. A second event is initiated at a second computer by sending a message that includes the first time. The second event occurs at a second time, as measured by a local clock. Because of clock error, the first time is later than the second time. Based on the first time being later than the second time, an alternate second time, that is based on the first time, is used as the time of the second event. When a third system determines the order of the two events, the first time is obtained from the first computer, and the alternate second time is obtained from the second computer, and the order of the events is determined based on a comparison of the two times.
US10171630B2	Executing remote commands A communication system and method for the utilization of messaging protocols to provide computing devices executable code. An administrative component can include executable code or instructions within the publication of content. Computing devices registered to receive this content can receive and execute the code (or instructions) and utilize the same messaging protocol to publish a result of the processing to be delivered to the admin device.
US10171624B2	Management of pre-loaded content A method and system are disclosed for acquiring and transforming existing content (e.g., Hyper Text Markup Language HTML content) for display and execution on multiple platforms and architectures. In one embodiment, capture templates are created to harvest content from disparate content sources on multiple platforms. Data is extracted from the content from the disparate content sources using the created capture templates that drives extracting process. A standardized data stream is generated from the extracted data. The standardized data stream is provided for display on one or more different type of platforms.
US10171623B1	Identifying application preemptive requests A method for optimizing the number of pre-emptive service requests in an application based on identifying a plurality of pre-emptive execution eligible service requests. The method includes identifying one or more locations, associated with one or more service requests, respectively, in an application. Analyzing the one or more service requests based on the one or more locations. Determining if the one or more service requests are eligible for pre-emptive execution based on the analyzing, and responsive to determining the one or more service requests are eligible, outputting, by the one or more processors, one or more identities of the one or more service requests, respectively, for pre-emptive execution.
US10171622B2	Dynamic content reordering for delivery to mobile devices Systems, methods, and computer program products to perform an operation comprising receiving, by a Mobile Backend as a Service (MBaaS) server from an application executing on a mobile device, a request to access content, identifying a set of objects as responsive to the request, determining a respective priority for each object in the set of objects, wherein the priority of each object is based at least in part on a context of the mobile device, and transmitting at least one object in the set of objects according to the determined priorities of each object.
US10171619B2	Identifying a cloud service using machine learning and online data Analyzing network traffic includes identifying, by a computer related to an enterprise, an endpoint outside of the enterprise of a network connection between a resource of the enterprise and the endpoint; and autonomically determining, by the computer related to the enterprise, when the endpoint is associated with a cloud service provider. An indication that the endpoint is associated with the cloud service provider can then be stored by the computer related to the enterprise.
US10171607B2	Apparatus and methods for managing quality of experience during the delivery of content Apparatus and methods for managing the quality of experience of delivery of content to end-point or user devices. In one embodiment, metrics data pertaining to network conditions being experience by consumer devices attached to a managed network are monitored by a network entity. The monitored metrics are analyzed to determine if a consumer device is experiencing poor network conditions, such as network congestion. Consumer devices that are identified as experiencing poor network conditions are reported to a content delivery network (CDN) entity responsible for providing IP-based content. The CDN entity adjusts content delivery files used by the consumer devices to request particular IP-based content to guide the consumer device to select a version of the content suitable for delivery over consumer device's existing network condition. The adjustment may include for instance removing formats deemed unsupportable for delivery over the existing network condition or identify a default format for the consumer device to use.
US10171603B2	User segmentation to provide motivation to perform a resource saving tip A computer-implemented method includes steps for identifying a plurality of similar users that are similar to a target user, and providing a notification to the target user, the notification comprising a suggested action for the target user. In certain aspects, a method of the subject technology can further include steps for providing comparison information to the target user, wherein the comparison information includes participation information regarding participation for the plurality of similar users, with respect to the suggested action.
US10171598B2	Method and system for location sharing Method and server system for location sharing are disclosed. The method includes: determining a motion state of a first user in accordance with respective information items related to a current location and a previous location of a first device associated with the first user; in accordance with a determination that the motion state of the first user is a stationary state, determining a user direction of the first user based an orientation of the first device associated with the current location; in accordance with a determination that the motion state of the first user is a moving state, determining the user direction of the first user based on a motion direction from the previous location to the current location of the first device; and sending the determined user direction of the first user to one or more second devices associated with one or more second users for location sharing.
US10171597B2	Autonomic discovery and integration of complementary internet services A method can include discovering a plurality of services that are complementary to an offered service and selecting a service from the plurality of services as a candidate for integration with the offered service. The method further can include automatically generating a new service, using a processor, by integrating the candidate service with the offered service. The new service can be included in a service catalog.
US10171589B2	Reducing interference from management and support applications to functional applications Techniques for reducing interference in a network from management and control traffic to functional applications are provided. In one aspect, a method for regulating information flow between monitoring agents and a management server in a network includes the steps of: inserting an interface in the network to access stream based communications in the network; exporting control and data ports to each of the monitoring agents; receiving requests from one or more of the monitoring agents to establish sessions; and limiting a number of the sessions to open. A system for limiting interference in a network is also provided.
US10171586B2	Physical environment profiling through Internet of Things integration platform A method of profiling a physical environment via Internet of Things (IoT) devices connected via an IoT integration platform is disclosed. The physical environment includes users, locations, and devices as well as associations between users, locations, and devices. The method includes: receiving data streams from network-capable devices connected to the IoT integration platform; detecting presence of an entity in a physical environment surrounding or interacting with one or more of the network-capable devices from a subset of the data streams; storing an entity profile on a node graph representing the physical environment, wherein each entity profile is associated at least one of the network-capable device from which the presence is detected; and requesting a semantic label of the entity profile from a user of a first user account via one or more user interfaces.
US10171585B2	Method, system, and computer program product for distributed storage of data in a heterogeneous cloud Provided are a method, a system, and a computer program product in which a computational device stores a first part of data in a first cloud storage maintained by a first entity. A second part of the data is stored in a second cloud storage maintained by a second entity.
US10171584B2	Systems, methods, and devices for providing process code to remote devices A data processing device, such as a monitoring agent, runs process code to process input data captured from a data source of a production environment, such as managed network devices. The process code can be created on or modified at a terminal of a development environment remote from the data processing device. The input data can be routed to the development environment to test the process code with actual data. The development environment can also provide test data to the process code to test edge cases and other situations. The output of the process code running in the development environment can be routed to the data processing device for output to downstream systems as if generated by the data processing device. Once the process code is operating satisfactorily at the development environment, the process code can be transmitted to the data processing device for execution in the production environment.
US10171578B1	Tapered coax launch structure for a near field communication system A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver. Each module has a housing that surrounds and encloses the substrate. The housing has a port region on a surface of the housing. Each module has a tapered near field communication (NFC) field confiner located between the substrate and the port region on the housing configured to guide electromagnetic energy produced by the RF transmitter to the port region so that it can be emanated to a port region of an adjacent module.
US10171577B2	Local area networking system A local area networking method includes a receiving by a system server unique identifiers associated with the first mobile device and other devices of a local area network. The system server correlates a listing of user identifiers and user profiles with the unique identifiers received from the first mobile device. The system server then communicates the listing of user identifiers and user profiles correlated with the unique identifiers to the first mobile device. A user of the first mobile device is thereby permitted to view the user identifiers and user profiles relating to the other devices registered with the system server, including the other devices in the local area network. The system server may further receive a geographical location of the local area network from the first mobile device, and associate one of a data file and an executable file from the first mobile device with the geographical location.
US10171576B2	Method, apparatus, and system for interaction between terminals The present disclosure provides a method for interaction between terminals, implemented by a first terminal. The method includes: acquiring to-be-sent data; sending the to-be-sent data to a second terminal; displaying a display interface; monitoring whether first operation information from the second terminal is received, the first operation information including a processing operation received by the second terminal after the second terminal outputs the to-be-sent data and performed by a user of the second terminal on the to-be-sent data; and updating the display interface according to the first operation information once the first operation information sent by the second terminal is received. The present disclosure further provides an apparatus and a system for interaction between terminals. According to the present disclosure, data can be exchanged between terminals in real time, thereby improving interactivity between users of the terminals.
US10171573B2	Swapping non-virtualizing and self-virtualizing devices A computer in a cloud computing environment includes a virtualization instance (VI) providing cloud services to a consumer device. The computer includes non-virtualizing and self-virtualizing type devices. The VI uses a first virtual device that is a virtual form of one of the non-virtualizing and self-virtualizing type devices to meet Quality of Service (QoS) objectives. A method for managing the resources of the cloud comprises receiving QoS metrics, determining that the VI cannot meet the QoS objectives using the first virtual device, determining that a second virtual device comprising a virtual form of the non-virtualizing and self-virtualizing type device alternative to that of first virtual device is available and can meet the QoS objectives, and configuring the VI to use the second virtual device in place of the first virtual device. A computer programming product and a system can embody the method.
US10171572B2	Server pool management Managing a system comprising a pool of servers including a number of active servers. Utilization of the system capacity is monitored, in which the utilization results from a workload of the number of active servers. Upon detecting a critical utilization of the system capacity during the monitoring of the utilization of the system capacity, a duration of the detected critical utilization of the system capacity is predicted from a monitoring history of the utilization of the system capacity. Further, the number of active servers is increased, if the predicted duration exceeds a defined threshold. Tuning measures may also be deployed to handle surges in capacity utilization.
US10171570B2	Information processing apparatus An information processing apparatus includes data unit output controller configured to output, to a plurality of data unit processors, copied data units obtained by respectively copying a plurality of data units for a number that is set in advance, configured to respectively allocate output destinations of a plurality of identical copied data units to different data unit processors, configured to, for each combination of at least two data unit processors that is set in advance, obtain a number of the copied data unit groups in which the identical copied data units are respectively allocated to the data unit processors made into a combination, and configured to respectively allocate the output destinations of the plurality of copied data units to the data unit processors, so that the degree of variation of the number of copied data unit groups obtained for each combination of the data unit processors becomes smaller.
US10171564B2	Systems and methods for cloud-based agricultural data processing and management A cloud-based system for integration of agricultural data with geolocation-based agricultural operations is provided. The system receives agricultural-related data associated with a given geographic area and transforms the received data into an analysis-ready format. The system processes the received data through one or more algorithms to determine at least one operation to be performed within the given geographic area. The system generates a set of instructions for execution of the at least one operation within the given geographic area as a function of geolocation, where the instructions are coded for direct use by a controller of a specified type of agricultural equipment. The system transmits the instructions over a wireless communication channel to the controller, where the instructions cause the controller to direct operation of the agricultural equipment to perform the at least one operation within the given geographic area as a function of geolocation in an automated manner.
US10171563B2	Systems and methods for an intelligent distributed working memory Systems and methods for intelligent memory sharing and contextual retrieval across multiple devices and multiple applications are provided. The systems and methods do not just show a user what he or she has stored across his or her different devices but intelligently suggests relevant topics and/or information based on what is contained in a shared working memory compiled from the temporary memories on all of the user devices.
US10171562B2	Social media driven information interface One or more techniques and/or systems are provided for populating an information interface based upon social media data. For example, users may post, share, and/or discuss various information through social media sources. Accordingly, social media data may be obtained from such social media sources. The social media data may be grouped into sets of social media data based upon temporal information. Within the sets of social media data, social media entries may be clustered into topic clusters (e.g., a royal wedding topic cluster, a plane crash topic cluster, etc.). Event summaries may be generated for respective topic clusters. The event summaries may be used to populate timeslots of an information interface, such as a calendar or timeline, to create annotated timeslots. In this way, the information interface may provide users with an interactive view of events over a time period, such as a year-in-review, based upon social media data.
US10171560B2	Modular framework to integrate service management systems and cloud orchestrators in a hybrid cloud environment A system, method and program product are provided for integrating a plurality of cloud orchestrators and service management (SM) platforms to provide a hybrid cloud environment. A system is disclosed that includes: interface system that includes a first gateway for providing communications with SM platforms that adhere to an SM protocol and a second gateway for providing communications with the plurality of cloud orchestrators, wherein the SM protocol defines a set of management processes for handling service requests; a service request processing system that processes service requests from SM platforms using selected cloud orchestrators, wherein the service request processing system includes a set of management modules in which each management module processes activities associated with of a different one of the management processes; a rules and conditions engine that includes logic to select a cloud orchestrator to be used to service an inputted service request; and a set of data conversion modules, wherein each data conversion module includes logic that converts data associated with an SM platform to a data format required by a one of the cloud orchestrators.
US10171557B2	Method and device for processing media streams between a plurality of media terminals and a processing unit all connected to one another over a communication network The media stream processing device between a plurality of media terminals (UA, UB, UC, UD) and a processing unit (UV) over a communication network. The processing unit (UV) is capable of sending a media stream transmission pause/resume command signal in the format of a RTP/RTCP real-time communication protocol or equivalent intended for at least one media terminal in response to a chosen event.
US10171552B2	Systems and methods for integrating external resources from third-party services Various embodiments concern communication platforms that can integrate electronic resources distributed amongst various sources by tagging metadata associated with each of the electronic resources, thereby making the electronic resources readily searchable from a messaging interface using a single search architecture. The messaging interface can be used by users to communicate with one another. In some embodiments, the communication platform performs a search based on characters as they are entered into the text field of the messaging interface. This search across various heterogeneous sources enables the communication platform to identify a reference to an electronic resource the sender of a message wishes to insert within the message. Recipients of the message may be able to access the electronic resource directly from the messaging interface. The communication platform can also perform natural language processing techniques such as speech act detection on messages and/or other textual resources to facilitate intelligent communication streamlining.
US10171546B2	Content reproduction apparatus, control information providing server, and content reproduction system Provided is a content reproduction apparatus including a reproduction control unit that controls reproduction of a link-type content including a plurality of scenarios that each include content data and control information regarding reproduction of the content data, and a control information acquisition unit that acquires the control information. The reproduction control unit controls the reproduction of the link-type content by reproducing the content data in accordance with the control information including event information used to transition from a current scenario to another scenario.
US10171541B2	Methods, devices, and computer programs for improving coding of media presentation description data The invention relates to improving coding of media presentation description data. Requesting streamed timed media data associated with a media item, organized into temporal media segments, the streamed timed media data belonging to partitioned timed media data comprising timed samples, the streamed timed media data being transmitted as media segment files each comprising independently processed components resulting from processing the timed samples, including receiving a manifest comprising metadata for describing the processed components, the metadata comprising parameters used for describing a part of one of the processed components, wherein one of the parameters is a dynamic parameter which value can vary over time, the parameter being associated with an element referring to a metadata resource, external to the manifest and comprising a value defining the parameter; and requesting the streamed timed media data based on metadata of the manifest and of the value defining the parameter.
US10171533B1	System and method for identifying devices in a room on a network A system and method for controlling and selecting sources in a room on a network. The system allows a remote viewer to create a virtual presence within the room by providing the available displays, corresponding to the sources, to the remote viewer. The system includes a standardizing technique for improving the communication and overall switching of data for streaming on a network. The system can include a recording server for performing dual recording of the video files in each of a local database and a remote database. A graphical user interface (GUI) display is provided to guide a local user through a medical procedure in the standardized system.
US10171530B2	Devices and methods for transmitting adaptively adjusted documents Devices and methods for obtaining media stream with adaptive resolutions. The device includes a receiver in communication with a processor, and a transmitter. The receiver is configured to receive a plurality of media signals. The processor is programmed to communicate with a terminal device in the home network, obtain a corresponding display resolution of the terminal device, and select a media signal according to the corresponding display resolution of the terminal device and a video resolution of the media signal. The transmitter is configured to transmit media stream corresponding to the selected media signal to the terminal device.
US10171528B2	Streaming of segmented content Methods and systems for enabling streaming of segmented content from a content delivery network to an adaptive streaming client on the basis of a manifest file are described wherein the said manifest file may comprise one or more segment identifiers. The method may comprise: selecting at least one segment identifier from said manifest file, said identifier identifying a segment that has not been requested by said client; and, sending pre-announce information to said content delivery network for announcing in advance that said segment may be requested by said client, said pre-announce information comprising said at least one segment identifier, said pre-announce information being further arranged for triggering said content delivery network to ensure availability of said segment upon receiving said request.
US10171527B2	Goal-based connection management between parties A monitoring computer system receives a message, from a first party, which identifies a goal of the first party. The monitoring computer system receives an identity of a second party that has been selected by the first party to assist the first party in achieving the identified goal of the first party. An electronic communication connection is created for electronic communications between the first party and the second party, wherein the electronic communications are related to accomplishing the identified goal of the first party. The electronic communications between the first party and the second party are monitored by executing message analytics to determine a status of the identified goal of the first party. In response to receiving a goal abandonment message, identifying an abandonment of the identified goal by the first party, the monitoring computer system disconnects the electronic communication connection between the first party and the second party.
US10171521B2	Seamlessly conferencing a previously-connected telephone call An already-connected telephone call is conferenced in a seamless manner that is transparent to the call participants, after which one or more additional participants may join the conference. The existing call is preferably moved to a conference bridge responsive to an existing call participant either logging on to a network-accessible user interface (such as a web page or portal-type page) or entering some special key or key combination using the participant's phone (which may be a software application that provides phone-like services). The participant requesting the move may be authenticated, and the authorization of the participant to request the move may be verified, before moving the call.
US10171520B2	Seamlessly conferencing a previously-connected telephone call An already-connected telephone call is conferenced in a seamless manner that is transparent to the call participants, after which one or more additional participants may join the conference. The existing call is preferably moved to a conference bridge responsive to an existing call participant either logging on to a network-accessible user interface (such as a web page or portal-type page) or entering some special key or key combination using the participant's phone (which may be a software application that provides phone-like services). The participant requesting the move may be authenticated, and the authorization of the participant to request the move may be verified, before moving the call.
US10171516B2	Notifying response sender of malformed session initiation protocol (SIP) response messages A method, computer program product, and computer system for notifying a response sender of a malformed SIP response message. The method includes, producing a special ACK message after receiving a malformed response message from a SIP server. The special ACK message contains a correction of the determined malformation, and is sent to the SIP server for correction by the SIP server.
US10171515B2	Notifying response sender of malformed session initiation protocol (SIP) response messages A method, computer program product, and computer system for notifying a response sender of a malformed SIP response message. The method includes, producing a special ACK message after receiving a malformed response message from a SIP server. The special ACK message contains a correction of the determined malformation, and is sent to the SIP server for correction by the SIP server.
US10171514B2	Method and system for routing media calls over real time packet switched connection A method for routing media calls over a real time packet switch connection includes providing a session controller for connecting to a network. The method further includes providing a signaling switch for connecting to the session controller. The method further includes controlling call routing in the network with the session controller where the call routing control includes identifiers for elements in at least two layers of a seven layer model. The call routing control includes a preference for a codec for the call. The call routing is carried out taking into consideration a mean opinion score qualifier from previous calls having a same source and destination.
US10171512B2	Network node Measures, including methods, systems and computer-readable storage mediums, for use in operating a network node in a network. Signalling information for an in-progress communication session dialog is processed according to a stateless operating mode. The processing according to the stateless operating mode includes storing communication session dialog state data associated with the communication session dialog. An operating mode change trigger is detected. In response to the detection, the stored communication session dialog state data associated with the communication session dialog is retrieved. Signalling information for the in-progress communication session dialog is processed according to a state-full operating mode. The processing according to the state-full operating mode is carried out at least in part on the basis of the retrieved communication session dialog state data associated with the communication session dialog.
US10171506B2	Network security management via social media network Systems and methods for managing users' local security policies based on social media network information are provided. According to one embodiment, a network security appliance of a private network receives authentication request from a client machine and provides a social login interface of a social media network to the client machine. After a user of the client machine is authenticated by the social media network through a personal social media network account of the user, the network security appliance receives an authentication and a user profile of the user from the social media network. The network security appliance extracts social relationship information from the user profile and determines a local network security policy for the user based on the social relationship information.
US10171503B1	Methods for scaling infrastructure in a mobile application environment and devices thereof A method, non-transitory computer readable medium and device that assists with scaling infrastructure in a mobile application environment obtaining a number of mobile application installations of a mobile application on a plurality of mobile devices. A number of mobile application installations corresponds with a number of backend enterprise web applications online on one or more web applications servers is determined where the backend enterprise web applications are associated with the mobile application. The number of backend enterprise web applications online on the one or more web application servers is modified when the determining indicates the number of mobile application installations does not correspond with the number of backend enterprise web applications.
US10171502B2	Managed applications Embodiments relate to a system that includes a computing device and a managed application executable by the computing device. The managed application initiates an execution of a target application. The managed application obtains a request from the target application to perform an action. The managed application determines whether the action is permitted by a compliance rule.
US10171499B2	Zone-based security architecture for intra-vehicular wireless communication Systems and methods provide secure and wireless intra-vehicular communication. An intra-vehicular communication system has a secured network segment including a plurality of secure zones on a vehicle, the secure zones each having a plurality of node devices. The system also has a single point of security proximate each secure zone on the vehicle providing communication security for a corresponding secure zone, and a public network segment on the vehicle configured to wirelessly transport data traffic between the secure zones.
US10171496B2	Beacon spoofing prevention In one embodiment, a beacon signal is received from a beacon device. Either a mobile device or a server identifies a beacon authentication value from the beacon signal. Either the mobile device or the server calculates a local verification value from a security algorithm. A comparison of the authentication value to the local verification value is performed, and a location service is provided based on the comparison.
US10171495B1	Detection of modified requests Suspicious connection requests can be detected by analyzing connection parameters at multiple levels of a network framework. For Internet-based requests, unexpected combinations and/or ordering of Layer 6 (TLS) and Layer 7 (HTTP) parameters, for example, can be indicative of suspicious activity with respect to the connection. The connection parameters for a request can be compared against a set of determined signatures and/or analyzed using a trained probability model to determine a probability that the connection is improper. A probability value can be calculated and compared against at least one probability threshold to determine whether the connection is suspicious enough to cause a specified action to occur. The signatures can be updated through an offline or dynamic online process, and the thresholds can vary among the various embodiments.
US10171493B2	Method and system to dynamically obfuscate a web services interface The present application relates to the handling of what are generally referred to as denial of service (DoS) attacks. More specifically, the present application relates to a method and system for protecting one or more on-line Web service application servers from DoS and/or distributed DoS (DDoS) attacks.
US10171492B2	Denial-of-service (DoS) mitigation based on health of protected network device Systems and methods for improving the performance of DDoS mitigation by monitoring the health of a protected network resource are provided. According to one embodiment, health of a network device protected by DoS mitigation device can be evaluated and packet/traffic received on the DoS mitigation device can be selectively/conditionally forwarded to the protected network device or can be dropped based on the health of the protected network device. According to one embodiment, at-least a part of the traffic is blocked when the health of the protected network device is below a predetermined health threshold. In an exemplary implementation, a measure of volume of traffic originated by different computing devices and handled by the protected network device can be computed, and packet filtering or conditional forwarding can be enabled when the computed measure of volume of traffic exceeds a predetermined traffic volume threshold.
US10171486B2	Security and authentication daisy chain analysis and warning system An approach is disclosed that provides a security and authentication daisy chain analysis and warning system to a user. The approach monitors sets of user authentication data pertaining network sites used by the user. Each of the sets of user authentication data is used by the user to access one of the sites. The approach gathers outputs displayed by many network sites, including those network sites accessed by the user. The first set of network sites is a subset of the second set of network sites. An analytical analysis is performed based on the sets of user authentication data and the gathered outputs. Based on the analytical analysis, the user can be alerted regarding security vulnerabilities. The vulnerabilities can correspond to one of the gathered outputs displayed at one network site matching at least a portion of one of the sets of the user's authentication data.
US10171482B2	Pre-processing before precise pattern matching Pre-processing before precise pattern matching of a target pattern from a stream of patterns. Including acquiring occurrence numbers of target elements in the target pattern, initializing the buffer, the buffer indicating a section in the stream of patterns, determining whether occurrence numbers of the target elements in the buffer reach the occurrence numbers of the target elements in the target pattern, updating the buffer and then returning to the determining step, in response to determining that the occurrence numbers of the target elements in the buffer do not reach the occurrence numbers of the target elements in the target pattern, and outputting the elements in the buffer for subsequent processing, in response to determining that the occurrence numbers of the target elements in the buffer reach the occurrence numbers of the target elements in the target pattern.
US10171479B2	Fast multicast messaging encryption and authentication To prevent legitimate message recipients from forging new messages and to encrypt messages for a specific set of recipients (channel), a root key is encrypted and combined with a base session management key to render a combined root key, which in turn is encrypted with a public key of at least one recipient device to render a session management key. The public key of each of “N” intended recipient device encrypts the combined root key to render “N” session management keys. The session management keys are then combined with the combined root key to render a multicast root key, which is signed with a private key of a sending device. The signed multicast root key is combined with the session management keys to render an encrypted, signed multicast root key that is used to encrypt digital information prior to transmitting the digital information.
US10171473B2	Content filtering for personal productivity applications A set of context profiles containing profile content rules for filtering which content within a set of personal productivity applications (such as e-mail, chat, calendar, and contacts applications) is accessible by a user. Content rules support filtering content by, for example, content originator, and/or subject matter. The context profiles are centrally maintained for control of integrated, non-integrated, and/or independently administered personal productivity applications.
US10171470B2	Techniques for secure debugging and monitoring Techniques for secure debugging and monitoring are presented. An end user requests a secure token for logging information with a remote service. A secure monitoring and debugging token service provides the secure token. The remote service validates the secure token and configures itself for capturing information and reporting the captured information based on the secure token.
US10171469B2	Information processing system, access method, and terminal device An system comprises: a first storage that stores access destination information, characteristic information, and first identification information in a manner associated with one another; a transmitter that transmits a captured image of a medium; a first-acquiring-unit that extracts the characteristic information and acquires the access destination information and the first identification information associated with the characteristic information, access based on the access destination information being controlled by an authentication device comprising a second storage that stores second identification information allocated to each medium, third identification information corresponding to the first identification information, and collation information indicating an access source in a manner associated with one another; a second-acquiring-unit that acquires fourth identification information allocated to each medium from the captured image; and an access unit that transmits the first identification information, the fourth identification information, and the collation information when accessing an access destination indicated by the access destination information.
US10171467B2	Detection of authorization across systems Example embodiments of the present disclosure provide methods, devices, and computer programs for authorization detection. The first system receives, from the second system unauthorized by the first system, a request for operating a resource of the first system. The first system causes a detection of an authorization chain to be detected based on the first record that at least indicates one or more systems that are authorized by the first system. The authorization chain includes at least a third system that authorizes the second system and is authorized by the first system. If the authorization chain is detected, the first system authorizes the operation of the resource of the first system.
US10171457B2	Service provider initiated additional authentication in a federated system An indication is received that a user has initiated an access to a website hosted by a service provider. Access to the website requires an authorization of a user identification associated with the user and a password associated with the user. A token is requested. The token provides access to an application programming interface. The token is received. The token is stored by the service provider.
US10171456B2	Wireless authentication system and wireless authentication method for one time password of mobile communication terminal having near field communication function Provided is a one time password (OTP) authentication system and an OTP authentication method using a mobile communication terminal having a near field communication (NFC) function, wherein OTP authentication is capable of being carried out by using a mobile communication terminal having an NFC function and an OTP generator provided with a communication function corresponding to NFC.
US10171450B1	Global time based authentication of client devices A system for authenticating client devices for communication with one or more wireless communications networks, includes a client device configured to receive a client-side global time from a time tracking system and generate a response to an authentication challenge based on the authentication challenge, the client-side global time, a client device identifier associated with the client device, and optionally location data that corresponds to a location of the client device. The system further includes a security gateway configured to receive a gateway-side global time from the time tracking system, generate an expected response to the authentication challenge based on the authentication challenge, the gateway-side global time, the client device identifier, and optionally location data that corresponds to an expected location of the client device, receive the response to the authentication challenge, and authenticate the client device on a wireless communications network based on the response and the expected response.
US10171444B1	Securitization of temporal digital communications via authentication and validation for wireless user and access devices An access control system and associated devices are described that conceal and securitize data transmissions between one or more secure databases for various user devices to ensure proper entrance or access into secure locations by approved personnel only. Specific methods and devices for securing (primarily digital and normally two-way) communications using applications that combine securing communications for wireless/cellular phones with personnel access card readers for entry into secure locations are also described. These combined communication and access devices require using specific encryption techniques that cannot be corrupted and are essential to denying fraudulent or otherwise unauthorized personnel the ability to enter or access security protected devices or locations.
US10171438B2	Generating a password User input is received from a user for identifying a particular account from among multiple accounts. A set of questions specific for the particular account is selected. Further user input comprising one or more responses to each question of the set of questions is received. A password is generated based on the one or more received responses.
US10171437B2	Techniques for security artifacts management Techniques are provided to manage security artifacts. Specifically, a security management system is disclosed for implementing security artifact archives to manage security artifacts. A security artifact archive may include information for managing one or more security artifacts that can be referenced or included in the security artifact archive. The security management system can create, edit, read, send, and perform other management operations for security artifact archives. Objects can be bundled in an object-specific security artifact archive. Security artifact archives may be named, versioned, tagged and/or labeled for identification. Security artifact archives may be transmitted to a destination (e.g., a service provider or a client system) that provides access to an object whose access is dependent on security artifacts. The destination may can manage access to the object using a security artifact archive that includes relevant and current security artifacts for the object.
US10171435B1	Devices that utilize random tokens which direct dynamic random access The disclosure provides for one or more devices and associated system that securitize and conceal data transmitted to and/or data received from the devices that utilize one or more master keys comprising at least one device that conceals and reveals such that the data and/or associated data files utilize both master keys and one or more key selectors, wherein the master keys and key selectors produce a specific set of one or more keys that conceal the data and/or associated data files such that one or more key selectors coincide with at least one value that directly corresponds with created cipher data and/or cipher data files. The key selectors can also be concealed and revealed as required. Produced concealed data and concealed data files can only be concealed and revealed with one or more master keys and one or more key selectors.
US10171433B2	System and method for authenticating users A security application for a computing device, e.g., a mobile phone, allows generation of a secret according to a unique user input (e.g., user credentials). The secret is stored in a directory such that it is retrievable when the unique user input is received via a user interface of a device on which the security application executes or is coupled with. Responsive to receiving an identifier associated with the secret, the security application prompts, e.g., via a user interface of the mobile phone, entry of the unique user input; and, subsequently, verifies the unique user input. Following such verification, the security application provides the secret for use in encoding a communication with a remote computer-based station. Entry of the user credentials may be required prior to the security application generating the secret, and may be responsive to receipt of an invitation (e.g., from the remote computer-based station) to generate it.
US10171427B2	Portable encryption and authentication service module Portable, hand-held electronic devices and methods to allow a user to anonymously utilize a host device are presented. The host device includes a processor to communicate with an application having a target network address. The portable, hand-held electronic devices includes an onboard database that stores user credential information and a portable encryption and authentication service module (PPEASM) that allows to make a secure communication channel with the host device. The PPEASM configures the processor of the host device to instantiate a virtual machine and render an encrypted messaging interface for communicating between the virtual machine and the application in the host device. Then, PPEASM can also configure the processor to negotiate authentication of the user with the application by utilizing the user credential information and information received through the encrypted messaging interface.
US10171424B2	Privacy enhancing networks The presently disclosed privacy enhancing networks (PENs) comprises a network of gateways in communication with one or more controllers. By dynamically creating and tearing down unique data flow paths through a network of gateways for each individual data flow, the privacy enhancing network makes it more difficult for an adversary to glean information about communicating parties. Since each flow in a single data session may be routed through a different path, adversaries may find it more difficult to determine which data flows are associated with each data session. This in turn, makes it more difficult for adversaries to gather enough data traffic to break any encryption applied to the data flows. Furthermore, since each flow in a single data session can be directed along a different path, a privacy enhancing network may make it difficult for adversaries to even determine that the communicating parties are communicating at all.
US10171421B2	Intrusion prevention and detection in a wireless network The invention provides an intrusion detection and prevention system and computer program which, when operated or executed by a security element (7) situated between a receiver (3) and a media access control (MAC) element (5) of a device (1) of a wireless network, performs the steps of receiving wireless traffic from the receiver of the device, and detecting that MAC element the traffic is allowed according to one or more rules and passing the traffic to the MAC element of the device, or detecting that the traffic is not allowed according to the one or more rules and preventing the traffic from passing to the MAC element of the device.
US10171412B2	Email quota management system A computer receives an out of office status a user has indicated on an email application, the email application using a communications network and determines a quota status of the user based on a previous quota usage pattern and a current quota usage pattern, wherein the quota includes an amount of storage spaced allotted to the user. The computer receives a new email to be delivered to the user and assigns a quota status to the new email. In response to the assigned quota status, the computer determines when the new email should be delivered to the email application of the user. As soon as the sender enters the name(s) of the recipients, the quota usage monitoring engine retrieves the quota status information from the recipients mail box. The engine determines if the new email should be sent out from the senders outbox and dropped to recipients mail box.
US10171409B2	Systems and methods for path optimization in a message campaign A method is provided for path optimization for a message campaign. A graphical user interface representation of the message campaign is displayed. Sets of input instructions are received. Each set of input instructions corresponds to a path in the message campaign. The sets of input instructions are executed, causing different electronic messages to be sent according to corresponding paths to different destination targets. Responses are monitored. A winning path is then determined based on a correlation of a criterion with a goal for the message campaign and also the responses or results of executing the plurality of sets of input instructions. The winning path from among the plurality of paths is then upweighted. The message campaign then uses the upweighted winning path by causing a second plurality of electronic messages to be sent through the winning path to destination targets in the plurality of destination targets.
US10171404B2	Reply to most recent message A computer communication system that allows a user to conveniently display the most recent received messages associated with another user, and to directly initiate composition of a reply to a selected one of those displayed messages. When the user selects the disclosed “Reply to Most Recent” user interface element, a user name entry user interface object is generated that allows the user to specify the name of another user. A reply message user interface object is generated directly to the user interface, such that the reply message user interface object includes a message composition window that is automatically loaded with content from a most recent message from the specified user, and recipients for the reply message are loaded from that most recent message.
US10171400B2	Using organizational rank to facilitate electronic communication A system for electronic communications. Receiving a sender identifier and a recipient identifier. A first message is received from the sender identifier to send to the recipient identifier. Determining the relative ranking of the sender and the recipient. In response to determining that the recipient has a higher relative ranking than the sender, determining whether the first message contains an action item. In response to determining that the first message contains an action item, transmitting a second message to the sender. In response to receiving an indication from the sender to send the first message, sending the first message from the sender identifier to the recipient identifier.
US10171396B2	Intelligent prevention of spam emails at share sites A computer-implemented method for preventing spam emails from a share site includes providing a network-based computer system to enable users to set up share sites and to send emails from the share sites, detecting potential spam emails based on one or more spam detection rules, identifying false positive emails in the potential spam emails based on one or more false alarm reduction rules, removing false positive emails from the potential spam emails to produce a list of verified spam emails, identifying a sender of the list of verified spam emails as a spammer, and prohibiting the spammer from sending emails from one or more share sites owned spammer.
US10171395B2	Aircraft message management system Systems and methods for filtering aircraft messages are provided. In one embodiment, the method can include receiving a message including a plurality of data fields containing data associated with the message. The method can include accessing a set of configuration data. The set of configuration data can include a set of data identifying one or more potential message structures and one or more parameters. The parameters can include one or more conditions for processing the data fields. The method can include determining a message structure of the message based at least in part on the data fields and the first set of data identifying one or more potential message structures. The method can include processing the message based at least in part on the message structure and the parameters. The method can include generating a filtered message that is based at least in part on the processed message.
US10171394B2	Multimedia mail service A system may determine to provide content in a multimedia content message to a user. The user may be associated with a recipient account that is associated with content type preferences that identify a plurality of permitted content types. Each content type, of the plurality of permitted content types, may identify a type of content that is permitted to be included in the multimedia content message. The system may obtain the content type preferences to determine the plurality of permitted content types. The system may determine one or more selected content types of the plurality of permitted content types. The one or more selected content types may be content types of content to be obtained by the system and included in the multimedia content message. The system may obtain content of the one or more selected content types. The system may provide the multimedia content message including the content.
US10171386B1	Methods and systems for storing instant messaging messages Software for an instant messaging program displays a window in a graphical user interface (GUI). The window includes a first view listing a plurality of participants in an instant messaging conference, a second view allowing for entry and editing of an instant message, a first control for sending an instant message to all of the of participants, and a second control for sending a private instant message to less than all of the participants. The software receives an entry of an instant message in the first view. The software receives a selection of one or more but less than all participants through the second view. The software receives an input activating the second control. Then the software sends the instant message to the selected participants.
US10171381B2	Providing a guest with access to content of a social network Providing a guest with access to content of a social network includes identifying a guest associated with content posted by a user on a social network, sending, via electronic mail (email), a notification to the guest's email address to notify the guest of the content on the social network, receiving, via an identity provider, an identity assertion associated with the guest's email address, and providing, based on the identity assertion, access to the content posted by the user on the social network to allow the guest to view the content, in which the identity provider is identified by a domain of the guest's email address.
US10171380B2	Dynamic service level agreement (SLA) adjustment based upon application capabilities Embodiments of the invention provide a method, system and computer program product for the dynamic adjustment of a service level agreement (SLA) for a hosted computing environment based upon application capabilities. The method includes specifying in a user interface to the hosted computing environment one or more application components of an application to be hosted within the hosted computing environment. Thereafter, a resource utilization capability is determined for one of the components and a set of resource utilization options for an SLA for the application is filtered based upon the resource utilization capability of the component or components. One of the filtered set of options can be selected and the application is executed in the hosted computing environment. Finally, the utilization of resources accessible to the application is managed based upon the SLA during the execution of the application in the hosted computing environment.
US10171379B2	Dynamic service level agreement (SLA) adjustment based upon application capabilities Embodiments of the invention provide a method, system and computer program product for the dynamic adjustment of a service level agreement (SLA) for a hosted computing environment based upon application capabilities. The method includes specifying in a user interface to the hosted computing environment one or more application components of an application to be hosted within the hosted computing environment. Thereafter, a resource utilization capability is determined for one of the components and a set of resource utilization options for an SLA for the application is filtered based upon the resource utilization capability of the component or components. One of the filtered set of options can be selected and the application is executed in the hosted computing environment. Finally, the utilization of resources accessible to the application is managed based upon the SLA during the execution of the application in the hosted computing environment.
US10171377B2	Orchestrating computing resources between different computing environments An approach is provided for orchestrating computing resources between different computing environments. Data from first and second computing environments is monitored. The data specifies utilization of infrastructure, middleware, software testing tools, integrated development environments (IDEs), relationships among nodes, utilization of the nodes, and user behavior in the first and second computing environments. Based on the utilization of the infrastructure, middleware, tools, IDEs, node relationships and utilization, and user behavior, a pattern decision tree is updated. Based on the updated pattern decision tree and a user request that specifies requirements of the computing resources, an orchestration topology is generated that specifies a placement of the computing resources in the first and second computing environments. Based on the orchestration topology, computing resource(s) are automatically deployed in the first computing environment and other computing resource(s) are automatically deployed in the second computing environment.
US10171370B1	Distribution operating system Technology for a distribution operating system is provided. In one example, a method may include executing a distribution operating system on a host operating system on a local computing device and executing an application within the distribution operating system using networked computing resources managed by the distribution operating system.
US10171369B2	Systems and methods for buffer management A buffer node and method of buffering packet data units are provided. The buffer node comprises a receive interface configured to receive a complex queue configuration and to receive packet data units, a buffer configured to implement a queue graph configuration associated with the complex queue configuration to buffer incoming packets into queues, and a send interface configured to send the dequeued incoming packets to a destination node. The queue graph configuration comprises at least one classifier configured to determine a classification type for an incoming packet, at least two queues configured to store incoming packets, and at least one dequeuer configured to select a queue from the at least two queues to be dequeued and to apply a dequeueing function on that selected queue. The method comprises a buffer node receiving a complex queue configuration from a configuration entity, receiving a plurality of packet data units from at least one the packet source node, and sending each incoming packet to one of the at least two queues based on the queue graph configuration. The complex queue configuration is associated with a queue graph configuration for buffering packet data units.
US10171366B2	Communication device and control method of communication device In order to enable retransmission control without imposing heavy load on a transmitter/receiver device and a network, a communication device includes: a transmission data generation unit that outputs, as transmission data, communication data for which an increase in transmission delay is to be reduced; a retransmission confirmation data generation unit that outputs, after the transmission data is output, retransmission confirmation data a predetermined number of times at a first transmission interval; and a communication interface that assigns order information indicating a transmission order, to each of the transmission data and the retransmission confirmation data, and transmits, after the transmission data is transmitted, the retransmission confirmation data.
US10171365B2	Turbolink: method and apparatus for controlling input/output signaling speed Embodiments of the present invention may provide improved handling of communication characteristics, such as burstiness, latency-sensitive applications, bandwidth-sensitive applications, etc., to improve peak performance while not compromising other characteristics, such as thermal design power of the input/output chip packages. In an embodiment, in a control circuit that may be connected to and control a data transmitter, a method of transmitting data in a network may comprise receiving at least one feed-forward signal from the data transmitter, receiving at least one feedback signal from at least a first node of the network, comparing the at least one feed-forward signal with at least one threshold or condition, comparing the at least one feedback signal with at least one threshold or condition, and generating a signal indicating that a burst transmission should be started or stopped.
US10171364B2	Method and apparatus for optimizing transmissions in wireless networks Various communication systems may benefit from optimized transmissions. A method can include receiving data to be forwarded to a first wireless device. The method can also include determining the data as delay tolerant data. Moreover, the method can include defining a role of at least one second wireless device for forwarding the delay tolerant data. Also, the method can include transmitting the delay tolerant data to the second wireless device to be forwarded to the first wireless device.
US10171360B2	System detection and flow control A system detection method and apparatus. Throughput and response time of a system are acquired. Throughput reflects the number of requests processed by the system that are received from outside the system. The response time reflects time required to process requests from outside the system. A system performance characteristic parameter based on the throughput and response time is obtained and used to describe congestion of the system to determine bottlenecks in the system by at least obtaining system performance characteristic parameter based on the throughput and the response time and conducting noise filtering on the system performance characteristic parameter. A bottleneck is determined based on the noise filtered system performance characteristic parameter. The system detection method and apparatus allow detecting a bottleneck and flow control are provided in a simple and effective way to ensure that requests are processed in time.
US10171356B2	Packet edit processing method and related device A packet edit processing method and a device are provided. In an embodiment, the method includes: generating an input packet template based on N to-be-edited protocol header fields of an input packet, and a preset protocol field mapping relationship, where the input packet template includes N protocol descriptors, and the protocol field mapping relationship is a mapping relationship between a protocol field included in a protocol descriptor and a protocol field included in a protocol header field; performing edit processing on the input packet template to obtain an output packet template; and converting, based on the preset protocol field mapping relationship, M protocol descriptors into M protocol header fields of an output packet, and replacing the N protocol header fields in the input packet with the M protocol header fields to obtain the output packet.
US10171353B2	System and method for supporting dual-port virtual router in a high performance computing environment Systems and methods for supporting dual-port virtual router in a high performance computing environment. In accordance with an embodiment, a dual port router abstraction can provide a simple way for enabling subnet-to-subnet router functionality to be defined based on a switch hardware implementation. A virtual dual-port router can logically be connected outside a corresponding switch port. This virtual dual-port router can provide an InfiniBand specification compliant view to a standard management entity, such as a Subnet Manager. In accordance with an embodiment, a dual-ported router model implies that different subnets can be connected in a way where each subnet fully controls the forwarding of packets as well as address mappings in the ingress path to the subnet.
US10171350B2	Generating packets in a reverse direction of a service function chain Embodiments are directed to receiving an original packet at a service function; determining, for a reverse packet, a reverse service path identifier for a previous hop on a service function chain; determining, for the reverse packet, a service index for the reverse service path identifier; and transmitting the reverse packet to the previous hop on the service function chain.
US10171342B2	Recording medium and packet relay method for relaying a packet in a first sub-domain among a plurality of sub-domains in a service chain configured across the plurality of sub-domains A non-transitory storage medium having stored therein a packet relay program for relaying a packet in a first sub-domain among a plurality of sub-domains in a service chain configured across the plurality of sub-domains is provided. The packet relay program causes a computer in the first sub-domain to perform a process. The process includes specifying a transmission destination on a basis of relay information with which identification information indicating a combination of a plurality of service functions included in the service chain, an index indicating an order for applying the service function, and the transmission destination are associated, changing the index included in the packet into a predetermined value when the specified transmission destination is a second sub-domain among the plurality of sub-domains, and transmitting the packet including the identification information included in the packet and the index of the predetermined value to the specified transmission destination.
US10171341B2	Software defined storage stack problem diagnosis and optimization An aspect includes storage stack analysis. A processor determines a client configuration of a client storage stack that includes a plurality of layers with configurable parameters to control storage and retrieval of data between an uppermost layer and a lowest layer. The processor initiates creation of a replica of the client storage stack based on the client configuration. Input/output characteristics are collected of a workload executed on the client storage stack using the client configuration. A synthesized workload is applied to the replica of the client storage stack, where the synthesized workload is based on the input/output characteristics of the workload. The processor analyzes input/output performance through the layers of the replica of the client storage stack in response to applying the synthesized workload. One or more configuration issues are identified with the client configuration of the client storage stack based on a result of the analysis.
US10171326B2	Method and apparatus for estimating a maximum time interval error in a data transmission network A method for use in connection with a data transmission network includes receiving a plurality of time interval error data samples over a sampling period and comparing a duration of the sampling period to a time threshold for the sampling period. If the duration of the sampling period is less than or equal to the time threshold for the sampling period, the method includes processing the received plurality of data samples so as to calculate in real time a maximum time interval error. However, if the duration of the sampling period exceeds the time threshold for the sampling period, the method includes dividing the sampling period into a finite number of sub-intervals and processing the data samples in each sub-interval so as to produce a respective intermediate result for each sub-interval. Each of these intermediate results is stored directly after it is produced, and these stored intermediate results are processed so as to estimate the maximum time interval error.
US10171325B2	Minimum delay value calculating device, information transmitting device, minimum delay value calculating method, and program storage medium The purpose of the present invention is to appropriately detect propagation delay and the like (minimum delay value) in order to appropriately control a transmission rate of information. Upon input of a measured value of delay that is smaller than a value set as a minimum delay value, a minimum value setting unit (2) updates the set minimum delay value to the measured value of the delay. Delay refers to the time from transmission of information to arrival at the destination thereof, or the round trip time from transmission of information to receipt of reply information from the destination receiving the information by the originator. A timing determination unit (3) determines a review timing for reviewing the set minimum delay value on the basis of the measured value of the delay. A minimum value review unit (4) updates (reviews) the set minimum delay value at the determined review timing. The minimum delay value to be updated is a value calculated using the measured value of the measured delay or a preset initial value.
US10171320B2	Ensuring important messages are viewed by intended recipient based on time-to-live pattern A method, system and computer program product for ensuring that important messages are viewed by the intended recipient. A time-to-live pattern for a message identified as being important is determined for the target group, where the time-to-live pattern indicates a set of presentation criteria (e.g., impression analysis, such as the number of views of the message). The target group refers to the intended recipient(s) of the message identified as being important. The message is then monitored in the network environment with respect to the time-to-live pattern using the set of presentation criteria of the time-to-live pattern. An action (e.g., pinning the message for a period of time) may then be performed to increase the priority of the message for the target group if the time-to-live pattern has underachieved within a threshold period of time (i.e., has not met the requirements of the presentation criteria within the threshold period of time).
US10171319B2	Technologies for annotating process and user information for network flows Systems, methods, and computer-readable media for annotating process and user information for network flows. In some embodiments, a capturing agent, executing on a first device in a network, can monitor a network flow associated with the first device. The first device can be, for example, a virtual machine, a hypervisor, a server, or a network device. Next, the capturing agent can generate a control flow based on the network flow. The control flow may include metadata that describes the network flow. The capturing agent can then determine which process executing on the first device is associated with the network flow and label the control flow with this information. Finally, the capturing agent can transmit the labeled control flow to a second device, such as a collector, in the network.
US10171317B2	Management server for remote monitoring system The management server causes an output section to output a startup date and time, shutdown date and time, minimum, maximum, and average values, and an occurrence count and durations of a predetermined event, for each of the operation time periods from the startup to shutdown in a unit of the remote monitoring terminal device, and causes the output section to output the startup date and time, shutdown date and time, and a movement locus of the mobile work vehicle or vessel based on the location information, for each of the operation time periods from the startup to shutdown in the unit of the remote monitoring terminal device.
US10171314B2	Methods, apparatuses and computer program products to derive quality data from an eventually consistent system An apparatus for deriving quality data includes a processor and memory storing executable computer code causing the apparatus to at least perform operations including receiving a consistency check from a network device indicating a summary count obtained during a time period. The summary count specifies a number of data items of a service utilized/provided, within a given time period, to one or more communication devices of an entity. The consistency check also includes a raw count, obtained during a time window the expiration of which is subsequent to the time period, indicating a number of data items of the service utilized/provided, within the given time period, to the communication devices. The computer program code may further cause the apparatus to determine whether a deviation between the summary count relative to the raw count is less than or equal to a threshold. Corresponding methods and computer program products are also provided.
US10171312B2	Optimizing cloud service delivery within a cloud computing environment Embodiments of the invention provide systems, methods and computer program products for optimizing cloud service delivery within a cloud computing environment. A cloud service request (CSR) is received from a cloud customer in the cloud computing environment, the CSR comprising at least one parameter of one or more existing cloud services accessed by the cloud customer that are provided by one or more existing cloud service providers. At least one parameter of the CSR is monitored in a cloud service registry comprising a plurality of cloud services provided by a plurality of cloud service providers and one or more parameters corresponding to each cloud service of the plurality of cloud services. Based on the monitoring, a new cloud service provider is determined who may provide a better cloud service with respect to the at least one parameter in the CSR being monitored.
US10171309B1	Topology service A topology service may include a topology database and topology service interface used by clients to query the topology database. The topology database may describe a topology of resources of an infrastructure that may include racks of resources such as network, compute and storage resources. The topology database may be populated using discovery information returned as a result of issuing discovery requests to switches. The discovery information may identify connectivity between switches and other resources. The discovery information may be processed to determine assigned switch roles and additional derived information such as regarding instances of topological entities in the infrastructure. The derived information may identify instances of racks, rows and data centers in the infrastructure. The topology database may identify particular resources included in the different racks, rows, and data centers as well as connectivity between resources and communication capabilities of resource interfaces.
US10171307B2	Network modality reduction A tool for processing a multi-modal network to reduce modality. The tool determines a plurality of entities connected by a plurality of links within a multi-modal network. The tool assigns a weighted value to each of the plurality of links connecting the plurality of entities. The tool converts the multi-modal network into a modelled network based, at least in part, on the weighted value assigned to each of the plurality of links. The tool eliminates one or more of the plurality of entities not designated as an entity of interest from the modelled network. The tool converts the modelled network into a uni-modal network.
US10171304B2	Network policy configuration In some examples, a configurator device maps a configuration attribute received from a wireless device to a credential attribute, the credential attribute to be mapped to a network policy. The configurator device sends the credential attribute to the wireless device, the credential attribute useable by the wireless device to access an access point (AP), and useable by the AP to obtain the network policy to apply to a communication of the wireless device.
US10171302B2	Network configuration health check in virtualized computing environment An example method is provided for a host to perform network configuration health check in a virtualized computing environment. The method may include selecting a source NIC and one or more destination NICs, based on a first network configuration of the host, generating one or more unicast probe packets that are addressed from the source NIC to the respective one or more destination NICs, and sending the one or more unicast probe packets to the respective one or more destination NICs from the source NIC via a physical switch connected to the host. The method may also include in response to receiving the one or more unicast probe packets from the physical switch, determining that there is a match between the first network configuration and a second network configuration, but otherwise, determining that there is a mismatch between the first network configuration and second network configuration.
US10171300B2	Automatic redistribution of virtual machines as a growing neural gas A method and associated systems for automatic redistribution of virtual machines. A cloud-optimization module selects parameters, such as bandwidth requirements, that characterize an efficiency of a virtual network. It assigns weightings to these parameters based on relative importance of each parameter to the proper operation of the network, where the weightings may be determined as functions of captured network-performance statistics. The module translates the network's topology into a graph in which each node represents a network entity, such as a virtual machine or an application, and each edge represents a connection between two such entities. The module then uses a growing neural gas algorithm to revise the graph and the weightings, and translates the revised graph to a more optimal topology that has redistributed the network entities to operate more efficiently, as measured by the weighted parameters.
US10171297B2	Multivariable controller for coordinated control of computing devices and building infrastructure in data centers or other locations A method includes obtaining first information associated with control of multiple computing devices, where the first information relates to possible changes to processing tasks performed by the computing devices. The method also includes obtaining second information associated with building infrastructure operations performed by one or more building systems of one or more buildings that house the computing devices. The method further includes identifying one or more changes to one or more of the computing devices using the first and second information. In addition, the method includes outputting third information identifying the one or more changes.
US10171289B2	Event and alert analysis in a distributed processing system Methods, apparatuses, and computer program products for event and alert analysis are provided. Embodiments include a local event analyzer embedded in an alert analyzer receiving events from an event queue. Embodiments also include the local event analyzer creating, based on the received events and local event analysis rules specific to the alert analyzer, a temporary alert for the alert analyzer. Embodiments also include the alert analyzer analyzing the temporary alert based on alert analysis rules.
US10171283B2	Global production rules for distributed data Running a global production rule on data distributed over a plurality of machines may comprise receiving a local production rule that can run on each of the plurality of machines to jointly accomplish a global computation specified by the global production rule. The local production rule may be deployed to each of the plurality of machines, each of which stores a portion of the data and runs an instance of a rules engine that can run the local production rule. The plurality of machines are enabled to communicate intermediate data produced by the instance of the rules engine running the local production rule on said each of the machines. Coordinating between the plurality of machines is enabled to synchronize one or more local computations performed locally according to the local production rule on said each machine.
US10171280B2	Double-sideband COFDM signal receivers that demodulate unfolded frequency spectrum Prior-art receivers for double-sideband coded orthogonal frequency-division modulation (COFDM) signal, such as receivers for digital television (DTV) broadcasting, have folded the frequency spectrum in half by synchrodyne to baseband before discrete Fourier transform (DFT) and de-mapping quadrature amplitude-modulation (QAM) of COFDM signal subcarriers, thus to improve signal-to-noise ratio by 6 dB. Single-sideband or independent-sideband COFDM receivers that perform DFT and demapping of QAM of COFDM signal subcarriers in an unfolded frequency spectrum can improve signal-to-noise ratio by 8.5 dB by maximal-ratio combining bits of demapping results. Such improvement is achieved even when such a receiver is arranged for receiving a DSB-COFDM signal, in which double-sideband signal the frequency spectra of the lower and upper sidebands mirror each other. Reception range is increased by about a third over that of receivers which fold the frequency in half during synchrodyne to baseband. Such increase in reception range is particularly important for DTV receivers using indoor antennas.
US10171273B2	Decision feedback equalizer and interconnect circuit There is provided a decision feedback equalizer including a comparison circuit configured to compare a value indicated as 2n of a pulse amplitude modulated signal with a threshold value, wherein n is an integer of 2 or more, a latch circuit configured to retain data of a comparison result of the comparison circuit, a decoder configured to decode the retained data by the latch circuit, and a setting circuit configured to set the threshold value based on the retained data fed back from the latch circuit.
US10171271B2	Method and device for transmitting interference cancellation information for cancelling interference between cells Provided are a method and a device for transmitting interference cancellation information for cancelling interference between cells in a wireless communication system. The method for transmitting interference cancellation information may comprise the steps of: on the basis of feedback information received from a terminal belonging to a cell controlled by a predetermined base station, estimating a symbol error rate or a packet error rate on a cell boundary region; by comparing the symbol error rate or the packet error rate with a predetermined critical value, determining a probability indicator indicating the probability of cancelling interference between cells at the cell boundary region; and transmitting information on the probability indicator to an adjacent cell.
US10171265B2	Uplink channel information A method for sending data includes receiving, at a first station of a plurality of stations, a trigger frame from an access point of a wireless network. The method also includes determining a downlink channel estimation based on the trigger frame and sending the downlink channel estimation to the access point. The method further includes receiving uplink channel data from the access point in response to sending the downlink channel estimation. The method also includes sending data to the access point based on the uplink channel data.
US10171263B2	Capability aware routing Various systems and methods for bypassing one or more non-capable nodes. For example, one method involves a capable node determining that an adjacent node is non-capable, where capable nodes are configured to implement a data plane capability and non-capable nodes are not. The method then involves identifying a downstream node that is capable. The downstream node is on a shortest path. The method also involves generating information that identifies a tunnel to the downstream node.
US10171261B2	Remote talk down to panel, camera and speaker Methods and systems are described for storing video content collected by a home automation system. According to at least one embodiment, an apparatus for accessing video content collected by a home automation system includes a processor, a memory in electronic communication with the processor, and instructions stored in the memory which are executable by a processor to receive at a remote device live video content from a camera of the home automation system, and initiate real-time, two-way audio communication between the remote device and a user of the home automation system via the camera.
US10171253B2	Node directed multicast traffic management systems and methods for mesh networks Systems and related methods include node directed management of multicast traffic within a wireless mesh network. A wireless mesh network may include a plurality of mesh nodes and a central server in communication with at least one of the mesh nodes of the plurality of mesh nodes. The central server may be configured to generate one or more rules for at least one of the mesh nodes to instruct a change in a pre-routing parameter in a packet header based on received channel state information. The central server may include a rules-based engine configured to generate and convey one or more traffic shaping rules in response to sensing traffic conditions. The position of received multicast packets in a packet order may be modified.
US10171251B2	Tamper-protected hardware and method for using same One of the various aspects of the invention is related to suggesting various techniques for improving the tamper-resistibility of hardware. The tamper-resistant hardware may be advantageously used in a transaction system that provides the off-line transaction protocol. Amongst these techniques for improving the tamper-resistibility are trusted bootstrapping by means of secure software entity modules, a new use of hardware providing a Physical Unclonable Function, and the use of a configuration fingerprint of a FPGA used within the tamper-resistant hardware.
US10171245B2	Crypto integration platform Methods and systems described herein create a first addressed account and a second addressed account that each have a common identifier and are each associated with a customer. The system can receive an order for exchanging digital transactional items associated with the first addressed account, where the order is associated with the common identifier. A private key associated with the first addressed account can be used to electronically sign a first transaction to transfer the digital transactional items from the first addressed account to the second addressed account, and the same private key can be used to sign a second transaction. After verifying that the first transaction was signed with the same private key as the first transaction, the system authorizes placement of the order on a cryptographic exchange.
US10171238B2	Secure data transmission using quantum communication Methods and systems for transmitting data are described. A random data stream is generated. A data stream is generated comprising the random data stream and indicators as to which data of the random data stream is valid data to be communicated to a recipient. The random data stream and/or the data stream may be communicated using quantum entanglement.
US10171236B2	Method for operating a primary unit A method for operating a primary unit which exchanges pieces of information with a secondary unit, including receiving first pieces of information from the secondary unit, the first pieces of information formed as a function of at least one first measured value of a physical variable in the area of the secondary unit and as a function of a first random number; measuring the physical variable in the area of the primary unit to obtain a second measured value; ascertaining a first estimated value for the first random number as a function of the first pieces of information and the second measured value; measuring the physical variable in the area of the primary unit to obtain a third measured value; forming second pieces of information as a function of the first estimated value and the third measured value; transmitting the second pieces of information to the secondary unit.
US10171233B2	System and method for efficient support for short cryptoperiods in template mode System and method embodiments are provided herein for efficient representation and use of initialization vectors (IVs) for encrypted segments using template mode representation in Dynamic Adaptive Streaming over Hypertext Transfer Protocol (DASH). An embodiment method includes sending in a media presentation description (MPD), from a network server to a client, a template for generating a universal resource locator (URL) to obtain an IV that is used for encrypting a segment, in absence of an IV value in the MPD, receiving from the client a URL configured according to the template, and upon receiving the URL, returning an IV corresponding to the URL to the client. Another embodiment method includes receiving in a MPD, at a client from a network server, a template for generating a URL to obtain an IV that is used for encrypting a segment, upon detecting an absence of an IV value or IV base value in the MPD, configuring a URL for the IV using the template, sending the URL for the IV, and receiving an IV.
US10171229B2	Pseudo-random bit generator based on multim-modal maps The present invention is related with a computer-implemented method for generating a pseudo-random bit generator including the steps: a. Defining a multi-modal map by the equation: ƒβ=β(dr+1−x)(x−dr), x∈ℑr; b. Set the value of k∈+, and obtaining the values of βj, for j=from at least 1, to the final value k by the following equations: β1=4k; βj=(j)(β1); for 2≤j≤k; and taking the values of βj and split the space into 2j regions δ1j, to δ2jj which are determined by values κ1j to k(2j)−1j.
US10171226B2	Systems and methods for frequency division duplex communication A method of wireless communication using half duplex frequency division duplex (HD-FDD) comprises, at a wireless communications device, receiving downlink data during a plurality of downlink subframes and transmitting a hybrid automatic repeat request acknowledgement (HARQ-ACK) on an uplink. The HARQ-ACK relates to downlink data received during at least two of the plurality of downlink subframes and the HARQ-ACK is transmitted during one uplink subframe.
US10171222B2	Method for configuring CQI measurement subframe, base station, and user equipment A method, a base station, and user equipment are provided for configuring a CQI measurement subframe. The method includes: receiving an interference neighboring cell identifier of user equipment UE sent by the UE, obtaining almost blank subframe ABS configuration information according to the interference neighboring cell identifier of the UE, where the ABS configuration information is an ABS configuration of an interference neighboring cell corresponding to the interference neighboring cell identifier, configuring an ABS measurement subframe and a NonABS measurement subframe for the UE according to the ABS configuration information of the interference neighboring cell of the UE, and sending the ABS measurement subframe and the NonABS measurement subframe to the UE where the ABS measurement subframe is used by the UE to perform first CQI measurement and the NonABS measurement subframe is used by the UE to perform second CQI measurement.
US10171218B2	Method for estimating signal quality of transmission to a user equipment from a transmission point A method performed by a network node (110) for enabling transmissions to a user equipment, UE (121), from transmission points, TPs, in a coordination cell area (101-105, 07) in a radio communications network (100) is provided. The network node (110) configures two or more TPs in the coordination cell area (101-105, 107) not currently serving the UE (121) to transmit signals on interference measurement, IM, resources of two or more Channel State Information, CSI, processes of the UE (121) according to three or more different interference states. The network node (110) then receives, from the UE (121), CSI reports based on the transmitted signals on the IM resources of the two or more CSI processes of the UE (121). After receiving the CSI reports, the network node (110) estimates one signal quality value for each of the three or more different interference states of the transmitted signals and at least one further signal quality value corresponding to at least one interference state that is not part of the three or more different interference states of the transmitted signals based on the received CSI reports of the two or more CSI processes. A network node (110) for enabling transmissions to a UE (121) from TPs in a coordination cell area (101-105, 107), a computer program and a carrier are also provided.
US10171217B2	Enhanced SRS for massive MIMO channel estimation This invention provides SRS transmission methods to meet the Massive MIMO systems requirements. These methods are described in two separate categories. Firstly, enhancements to multiplex more channels in the same resources for a given SRS transmission and to provide Massive MIMO throughput performance improvements. Secondly, scheduling enhancements to provide adaptive UE-specific scheduling based on channel conditions for each UE. These methods can be combined in different ways in each BS to optimize the channel estimation system capacity for a given level of system performance.
US10171213B2	Communication device and method for performing radio communication A communication device is provided that includes a radio frequency circuit configured to receive and transmit radio frequency signals. The communication device further includes a processing circuit configured to process network information. The communication device further includes a memory circuit configured to transmit a first network information to the processing circuit. The communication device further includes a subscriber identity module configured to transmit a second network information to the processing circuit. The processing circuit is configured to select a first network based on the first network information and to register a communication device information at a second network based on the second network information.
US10171211B2	Wireless communication system and method, and wireless communication apparatus A wireless communication system is a wireless communication system that adopts backoff control. The wireless communication system is provided with: a first wireless communication apparatus; and a second wireless communication apparatus. The first wireless communication apparatus transmits a first signal to the second wireless communication apparatus with a first period, and the second wireless communication apparatus transmits a second signal to the first wireless communication apparatus with a delay of a fixed time, which is shorter than one period of the first period, from a time point at which the first wireless communication apparatus transmits the first signal.
US10171210B2	Method and device for spectrum comb signaling notification and for sounding reference signal transmission Disclosed are a spectrum comb signaling notification and sounding reference signal transmission method and device, wherein the spectrum comb signaling notification method includes: a network side configuring and notifying a receiving side of a two-layer comb spectrum signaling, including a first spectrum comb signaling and a second spectrum comb signaling, wherein the two-layer comb spectrum signaling indicates sub-carrier positions of transmitting the sounding reference signals to the receiving side.
US10171209B2	Method for communicating media data between two devices incorporating effectiveness of error correction strategies and associated computer program, communication quality module and device One embodiment relates to a method for communicating multimedia data between two devices over a network. The method comprises the devices repeatedly generating and exchanging the multimedia data and quality data representative of the quality of the communication between the two devices. At least the first device applies at least one current error correction strategy selected from a group of error correction strategies in order to increase the quality of the communication between the devices. The method also comprises an evaluation of an effectiveness of each current error correction strategy on the quality of the communication between the two devices is carried out as a function of newly received quality data.
US10171208B2	Dynamic error correction procedures Techniques described herein may be used to enable a base station to dynamically implement error correction procedures (e.g., Hybrid Automatic Repeat Request (HARQ), Forward Error Correction (FEC), etc.) based on one or more factors, such as a level of network activity, network congestion, etc. When network congestion is high, the network device may implement an error correction policy that is directed to using available network resources to prioritize error correction procedures for transmission failures with high service requirements. However, when network congestion is low, the network device may implement an error correction policy directed to optimizing error correction effectiveness by allocating unused network resources (e.g., bandwidth, physical channels, etc.) to correct transmission failures.
US10171204B2	Coded bit puncturing for polar codes Aspects of the disclosure provide a method for polar code puncturing. The method can include receiving a mother polar code including a sequence of coded bits, the sequence of coded bits having indices {0, . . . , N−1} and including at least a first block of coded bits having indices {0, . . . , i−1}, a second block of coded bits having indices {i, . . . , i+k−1}, a third block of coded bits having indices {i+k, . . . , i+k+k−1}, interleaving the second block of coded bits with the third block of coded bits to form a rearranged sequence of coded bits including the N coded bits, and extracting the last M coded bits from the rearranged sequence of coded bits to generate a punctured code having a length of M.
US10171201B2	Method and apparatus for transmitting data A data transmission method and apparatus initialize an index of a modulation and coding scheme (MCS) for transmitting data to a terminal, adjust the index of the MCS based on at least one of a hybrid automatic repeat request (HARM) feedback of the terminal and a channel quality of the terminal, and transmit the data to the terminal based on the adjusted index of the MCS.
US10171198B2	Channel set up method of optical receiver with wavelength tunable filter The present invention relates to A channel set up method of optical receiver with wavelength tunable filter such as an etalon filter in a TO type received wavelength-tunable optical receiver.According to the method of setting a channel in a wavelength-tunable optical receiver of the present invention, by circularly receiving communication channels within a predetermined temperature range, in which selectively receiving communication channel using two adjacent transmissive modes in the transmissive modes of a wavelength-tunable filter, it is possible to individually select and receive all communication channels with a predetermined temperature range. Further, it is possible to use all FP type etalon filters regardless of transmissive wavelength characteristics in at a specific temperature of a wavelength-tunable filter, so it is possible to reduce a manufacturing cost and power consumption of a product and increase thermal stability of a package.
US10171197B2	Method and apparatus for routing traffic using asymmetrical optical connections A method, computer-readable storage device and apparatus for routing traffic in a reconfigurable optical add-drop multiplexer layer of a dense wavelength division multiplexing network are disclosed. For example, the method determines the reconfigurable optical add-drop multiplexer layer has asymmetric traffic, and routes the asymmetric traffic in the reconfigurable optical add-drop multiplexer layer over a plurality of asymmetrical optical connections, wherein the plurality of asymmetrical optical connections is provided with only uni-directional equipment in the reconfigurable optical add-drop multiplexer layer.
US10171196B2	Terminal device, base station apparatus, and integrated circuit A terminal device acquires a parameter indispensable in canceling or suppressing an interference signal, cancels or suppresses interference with high precision, and reduces a degradation in reception performance due to the interference. There is provided a first terminal device that communicates with a base station apparatus, including: a higher layer processing unit that determines NAICS information indicating whether or not NAICS has to be used; a reception unit that receives downlink control information which is transmitted from the base station apparatus; and a control unit that changes interpretation of the downlink control information based on a configuration that is determined by the higher layer processing unit.
US10171195B2	NAICS signaling for advanced LTE features A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus may be a user equipment that receives a configuration with carrier aggregation. The apparatus may determine a first starting symbol for a PDSCH. In one aspect, the first starting symbol for the PDSCH may be determined based at least in part on a blind detection.
US10171194B2	Interference management and decentralized channel access schemes in hotspot-aided cellular networks A system and method are provided wherein one or more femtocell base stations are deployed within a range of a cellular base station and utilize substantially the same frequency band as the cellular base station. Each femtocell base station may be configured to employ one or more interference avoidance techniques such that coexistence between the cellular and the corresponding femtocell base station is enabled. The interference avoidance techniques employed may include use of randomized time or frequency hopping; randomly selecting a predetermined number, or identifying one or more unutilized, frequency subchannels for signal transmission; using two or more transmit, and two or more receive antennas; nulling one or more transmissions in a direction of a nearby cellular base station user; handing off at least one cellular user to one of the femtocell base stations and vice versa; and/or reducing the transmission power of at least one femtocell base station.
US10171187B2	System and method for testing high-speed ADC in DP-QPSK receiver A system and a method for testing a high-speed ADC in a DP-QPSK receiver are disclosed. The system includes a simulation module for outputting a data flow and performing signal recovery, an arbitrary waveform generator for receiving the data flow and outputting a high-speed analog signal and a clock signal, a high-speed ADC for converting the high-speed analog signal and the clock signal into a high-speed digital signal, a cache memory circuit for converting the high-speed digital signal into a low-speed digital signal, and a logic analyzer for sending the low-speed digital signal to the simulation module.
US10171185B2	Device and method of handling soft information A receiving device comprises a signal detection unit, a reliability unit coupled to the signal detection unit and a decoding unit coupled to the signal detection unit and the reliability unit. The signal detection unit is for receiving a plurality of compensated symbols on a plurality of subcarriers, to generate a plurality of soft information and a plurality demodulated symbols of the plurality of compensated symbols according to the plurality of compensated symbols. The reliability unit is for generating a plurality of weights of the plurality of soft information according to a plurality of reliability information of the plurality of subcarriers. The decoding unit is for decoding the plurality of demodulated symbols according to the plurality of soft information and the plurality of weights, to generate a plurality of decoded bits.
US10171184B2	Methodology of using the various capabilities of the smart box to perform testing of other functionality of the smart device An automatic system level testing (ASLT) system for testing smart devices is disclosed. The system comprises a system controller coupled to a smart device in an enclosure, wherein the system controller comprises a memory comprising test logic and a processor. The enclosure comprises a plurality of components, wherein the processor is configured to automatically control the smart device and the plurality of components in accordance with the test logic. The plurality of components comprises: (a) a robotic arm comprising a stylus affixed thereto; and (b) a platform comprising a device holder affixed thereto, wherein the smart device is inserted into the device holder; and (c) a wireless access point. The processor is further configured to: (a) control the smart device to activate wireless mode; (b) receive wireless signals from the wireless access point using the smart device; (c) retrieve wireless scan results from the smart device; and (d) analyze the wireless scan results.
US10171183B2	Method and system for interference mitigation in wireless communications assemblies A method in a wireless communications assembly having an antenna, a transceiver and a baseband processor, includes: at the transceiver: receiving, from the antenna, a modulated carrier signal having a carrier frequency and containing payload data; demodulating the carrier signal to extract a baseband signal having a baseband frequency and containing the payload data; generating from the baseband signal, at a converter, a digital baseband signal containing the payload data; at an encoder: receiving the digital baseband signal from the converter; generating an encoded digital baseband signal encoding the payload data for transmission at an operating frequency; the encoded digital baseband signal having at least a threshold proportion of signal level transitions that, when transmitted at the operating frequency, have transition frequencies outside a predefined restricted frequency band; and transmitting the encoded digital baseband signal to the baseband processor via an interface at the operating frequency.
US10171179B2	Optical module and optical line terminal device An optical module and an optical line terminal device are disclosed. According to an example, the optical line terminal device comprises a system board and an optical module. The system board comprises an optical module control circuit comprising a main control chip and a drive circuit. The optical module comprises a circuit board provided with an electrical interface, an optical assembly and a memory unit. The memory unit is configured to store an operation parameter of the optical assembly. The electrical interface has a first pin to be connected with a drive end of the optical assembly and a second pin to be connected with a data transmission pin of the memory unit. In this way, main control chip is allowed to read the operation parameter of the optical assembly through the first pin and configure the drive circuit accordingly, while the drive circuit is allowed to drive the optical assembly through the second pin.
US10171178B2	Laser communication system The present invention relates to a laser data transmission system and, more particularly, to a communication system using a plurality of laser beams populated with quantum entangled photons. At least one of the laser beams is moved to form an overlapping pattern with a second laser reference beam to form an interference pattern between the laser beams as they impinge upon a detector array to transmit encoded data and to remotely decode the encoded data simultaneously. The interference patterns are used to encode and simultaneously decode the interference shadows upon impingement of the laser beams on a detector array.
US10171175B2	Method and apparatus for despreading in optical domain An apparatus for despreading in an optical domain configured to split a received optical signal into a first optical signal and a second optical signal, perform phase deflection on the second optical signal, output a third optical signal, perform phase deflection on the first optical signal and the third optical signal, output a fourth optical signal and a fifth optical signal to a balanced receiver, and superimpose the fourth optical signal and the fifth optical signal to generate a first electrical signal. A multiplication operation in conventional code division multiple access (CDMA) despreading is transferred from an electrical domain to an optical domain such that a chip rate can be easily raised to 20 gigahertz (GHz) or even to 25 GHz, a maximum rate of 100 gigabits per second (Gbps) can be provided in a single wavelength, and a user requirement for high bandwidth can be met.
US10171174B1	Method and system for optical vector analysis An apparatus comprises a phase modulator having a first input port to receive a radiation and having a first output port to provide a first signal toward a device under test (DUT), wherein the phase modulator is configured to generate the first signal by performing phase modulation on the radiation received at the first input port; an intensity modulator having a second input port to receive the radiation and having a second output port to provide a second signal toward the DUT, wherein the intensity modulator is configured to generate the second signal by performing intensity modulation on the radiation received at the second input port; and a transfer function analyzer configured to determine a transfer function of the DUT based on the first signal and the second signal.
US10171173B2	Optical signal transmission apparatus and optical signal transmission method An optical signal transmission apparatus includes a modulation unit which modulates a transmission signal, a training signal sequence generation unit which generates a plurality of signal sequences having power concentrated in a plurality of different frequency bands, at least one of an amplitude and a phase of the plurality of signal sequences being modulated, as a training signal sequence, a signal multiplexing unit which appends the training signal sequence to the transmission signal, and an electro-optical conversion unit which converts a signal sequence obtained by appending the training signal sequence to the transmission signal into an optical signal and transmits the optical signal.
US10171172B2	Optical transmitter operable for pulse-amplitude modulation signal An optical transmitter that outputs an optical signal with a pulse amplitude modulation (PAM) configuration is disclosed. The optical transmitter includes a light-generating device and a driver. The light-generating device has non-linearity in a transfer characteristic between the electrical driving signal and the optical signal. The driver includes a PAM signal generator, a level controller, and an output driver. The PAM signal generator receives the input electrical signal and outputs a PAM signal. The level controller adjusts the electrical levels of the PAM signal based on the non-linear transfer characteristic of the light-generating device, where the electrical levels set the optical levels of the optical signal with preset ratios. The output driver generates the driving signal by superposing the electrical levels adjusted by the level controller with the PAM signal provided from the PAM signal generator.
US10171169B2	Software programmable flexible and dynamic optical transceivers A software programmable optical transceiver includes one or more Field Programmable Gate Arrays (FPGAs); and an electro-optical front end communicatively coupled to the one or more FPGAs, wherein the electro-optical front end comprises a transmitter and a receiver, wherein the transmitter is adapted to transmit a transmit signal from the one or more FPGAs and the receiver is adapted to receive a receive signal and provide to the one or more FPGAs, wherein one or more applications are utilized to dynamically configure the one or more FPGAs for digital functionality to operate the software programmable optical transceiver in an associated mode. The one or more applications are loaded as needed to configure the software programmable optical transceiver in the associated mode, without requiring pre-programmed hardware in the software programmable optical transceiver for operation in a plurality of operating modes.
US10171167B2	Multimedia network data processing system The present disclosure relates to a multimedia network data processing system, comprising: a head-end switch, which transmits multimedia network data of the data that is sent from a server to a terminal device to a head-end network processor, wherein the multimedia network data is multimedia network data based on the TCP/HTTP protocol; a head-end network processor, which encapsulates the multimedia network data to form a UDP packet and sends the UDP packet to a unidirectional broadcasting optical fiber network; and a data processing module, which receives the UDP packet from the unidirectional broadcasting optical fiber network and decapsulates the UDP packet to obtain the multimedia network data based on the TCP/HTTP protocol for the terminal device to play. A video-on-demand service based on the TCP/HTTP protocol can be realized on the basis of the existing network systems in which the unidirectional channel and the bidirectional channel are separated. And the programs transmitted by radios and TVs can be enriched while the requirements for bandwidth of uplink transmission and bandwidth of downlink transmission can be satisfied.
US10171164B2	2D barcode-based bi-directional wireless transmission system A 2D barcode-based bi-directional wireless transmission system includes a first apparatus and a second apparatus each including a display screen, a processing system and a camera. The first apparatus encodes a data to be sent into multiple 2D barcode images and sequentially displays these multiple 2D barcode images on the display screen thereof so that the second apparatus sequentially captures the multiple 2D barcode images from the first apparatus, and then decodes the captured multiple 2D barcode images into a received data, and then encodes a feedback information into a 2D barcode image and displays on the display screen thereof for allowing the first apparatus to capture and then to decode the captured 2D barcode image of the feedback information so as to obtain the feedback information.
US10171163B2	Signal quality measurement device and signal quality measurement method A signal quality measurement device includes: a setting processing unit that sets respective passbands of WSSs; and a calculating unit that calculates quality of an optical signal by acquiring a first power of an optical component in a first wavelength band, and a second power of an optical component in a second wavelength band adjacent to the first wavelength band. When the setting processing unit sets each of the passbands of the WWSs, the calculating unit detects a combined power of various ASEs of the optical amplifiers from the second power, and detects the power of the optical signal from the first power and the second power. When the setting processing unit sets the passband of one of the WSSs, the calculating unit detects, from the second power, the ASE of an optical amplifier existing between one of the wavelength selective switches and the receiver.
US10171162B2	Apparatus and method for measuring frequency response characteristics of optical transmitter and optical receiver An apparatus and method for measuring frequency response characteristics of an optical transmitter and an optical receiver where the apparatus includes: a generating unit configured to generate a driving signal for driving the modulator of the optical transmitter, which comprises at least two frequencies; and a calculating unit configured to respectively calculate the frequency response characteristics of the optical transmitter and the optical receiver according to output signal components in output signals of the optical receiver corresponding to at least two detection signal components of identical amplitudes and different frequencies in detection signals. The frequency response characteristics of the optical transmitter and the optical receiver may be obtained, the amplitude responses and phase responses in the frequency response characteristics may be respectively obtained, and the measurement results are accurate and reliable.
US10171160B2	Accessing LP transponders with CP terminals via wavefront multiplexing techniques A satellite communications system for communicating at a first frequency slot with first and second pairs of satellite transponders in linear polarization format. The system comprises a first terminal, a second terminal and a station. The first terminal receives at least one first input signal and concurrently radiates a first output signal at the first frequency slot to the first and second pairs of satellite transponders via a first beam and a second beam, respectively, in right-hand circularly polarized format. The second terminal receives at least one second input signal and concurrently radiates a second output signal at the first frequency slot to the first and second pairs of satellite transponders via a third beam and a fourth beam, respectively, in left-hand circularly polarized format. The station receives four satellite signals from the first and second pairs of transponders and recovers the at least one first input signal and the at least one second input signal using wavefront multiplexing technique.
US10171158B1	Analog surface wave repeater pair and methods for use therewith In accordance with one or more embodiments, an analog surface wave repeater pair includes a first launcher configured to transmit and receive first guided electromagnetic waves that propagate on an outer surface of a first segment of a transmission medium. A second launcher is configured to transmit and receive second guided electromagnetic waves that propagate on an outer surface of a second segment of the transmission medium. A first transceiver includes a first notch filter is configured to attenuate signals in a fourth generation (4G) wireless frequency band from the first microwave signal generated by the first launcher in response to receiving the first guided electromagnetic waves. A second transceiver includes a second notch filter configured to attenuate signals in the fourth 4G wireless frequency band from a second microwave signal generated by the second launcher in response to receiving the second guided electromagnetic waves.
US10171154B2	Method for reporting beam index for 3D MIMO transmission in wireless communication system, and device therefor Disclosed in the present application is a method by which a terminal reports a beam index to a base station in a wireless access system. The beam index reporting method comprises the steps of: receiving a plurality of reference signals from the base station; measuring a plurality of beams by using the plurality of reference signals; reporting an index of a first preferential beam among the plurality of beams to the base station; and reporting, to the base station, information on at least one second preferential beam determined on the basis of the first preferential beam, wherein the information on at least one second preferential beam is information on an index difference between the first preferential beam and the at least one second preferential beam.
US10171152B2	Communication method and apparatus using single radio frequency chain antenna A communication method of a wireless device to which a single radio frequency (RF) chain antenna is applied. The wireless device stores a plurality of beam sets for the single RF chain antenna and a plurality of quality values for the plurality of beam sets. The wireless device selects a first beam set having a first quality value that is a best quality value among the plurality of stored beam sets. The wireless device confirms a second quality value for the first beam set using received data when the data are received using the first beam set. The wireless device selects a second beam set different from the first beam set among the plurality of stored beam sets when the second quality value is poorer than the first quality value.
US10171151B1	Throughput optimization by guard interval selection from beamforming feedback This disclosure provides systems, methods and apparatus for wireless communication. In one aspect, a method of wireless communication includes utilizing a sounding procedure to obtain compressed beamforming (CBF) information. The sounding procedure may be a single-user or multi-user sounding procedure. The CBF information may contain various information regarding a particular channel that an access point may use for transmission. The information may include per-tone SNR information which may be processed to determine characteristics of the channel. Various techniques may be utilized to determine the further characteristics of the channel. The determined characteristics of the channel may then be used to determine an appropriate guard interval (GI) between symbols that are to be transmitted. Appropriate GI selection in wireless communications may facilitate higher throughput while decreasing overhead due to unnecessary idle time.
US10171150B1	Dynamic optimization of beamforming weights Dynamic beamforming in a telecommunications network in response to communication parameters is described. The communication parameters may be associated with at least one user device and/or at least one antenna. For example, the communication parameters may include CQI (channel quality indicator), SINR (signal-to-noise ratio), location data, channel load, sector load, band load, front-to-back ratio (F/B ratio), and/or upper side lobe suppression (USLS). The communication parameters may trigger generation of new beamforming weights and application of the new beamforming weights to the telecommunications network.
US10171140B2	MU-MIMO group selection An example communications device includes communications circuitry and control circuitry. The communications circuitry may wirelessly communicate with client devices. The control circuitry may determine signal-to-interference-plus-noise ratios (SINRs) for the client devices based on compressed client-side channel state information received from the client devices. The control circuitry may select, based on the SINRs and in consideration of multiple possible bandwidth settings, a set of multi-user-multiple-input-multiple-output (MU-MIMO) groups each with an assigned bandwidth setting.
US10171139B1	Inter-dwelling signal management using reconfigurable antennas A communication system utilizing reconfigurable antenna systems is described where beam steering and null forming techniques are incorporated to limit the region or volume available for communication with client devices. The communication system described restricts communication to defined or desired area and degrades signal strength coverage outside of a prescribed region. An algorithm is used to control the antenna system to monitor and control antenna system performance across the service area. This antenna system technique is applicable for use in communication systems such as a Local Area Network (LAN), cellular communication network, and Machine to Machine (M2M).
US10171138B2	Indicating optional parameter groups Various communication systems may benefit from improved network communications. For example, messages sent to a user equipment may benefit from having optional configurations of parameters. A method includes determining optional configurations for parameters that override or supplement a default configuration of the parameters. The optional configurations are grouped into optional parameter groups. The method also includes encoding at least one of the optional parameter groups in a message. In addition, the method includes transmitting the message from the network node to a user equipment.
US10171137B2	Method and device for transmitting data by using spatial modulation scheme in wireless access system The present invention provides methods for transmitting and receiving data and control signals by applying a spatial modulation scheme to a wireless access system, and devices for supporting same. The method whereby a transmitter transmits data signals by using a spatial modulation (SM) scheme in a wireless access system, according to one embodiment of the present invention, may comprise the steps of: selecting two or more transmission antennas for transmitting the data signals; deriving data bit strings for selecting the two or more transmission antennas; configuring the data signals by using the SM scheme on the basis of the data bit strings; and transmitting the configured data signals via the selected two or more transmission antennas.
US10171132B1	Current-mode receivers for induction-based communication and related methods A transceiver for use in induction-based communication protocols, such as radio-frequency identification (RFID) and near field communication (NFC), is described. The transceiver may be arranged such that the transmitter and the receiver share a common input/output (I/O) terminal. The transceiver may be configured to interrogate a transponder to which it is inductively coupled, and to wait for the transponder's response. Data transmitted back by the transponder may be detected by sensing an impedance modulation at the I/O terminal or at a node whose impedance varies with the I/O terminal. The impedance modulation may be sensed by allowing a current to be modulated by the impedance variation and by converting the current into a voltage. The corresponding voltage modulation may be sensed by a receiver.
US10171129B1	Pulse shaping interoperability protocol for ultra wideband systems Embodiments enable communicating Ultra Wideband (UWB) devices to collaborate by exchanging pulse shape information. The UWB devices use the pulse shape information to improve ranging accuracy. The improved ranging accuracy can be used in complex multipath environments where advanced estimation schemes are used to extract an arriving path for time-of-flight estimation. To determine the pulse shape information to be shared, some embodiments include determining location information of a UWB device and selecting the pulse shape information that satisfies regional aspects. The pulse shape information includes a time-zero index specific to a ranging signal that is used by UWB receivers to establish timestamps time-of-flight calculations. Some embodiments include measuring performance characteristics and selecting different pulse shape information based on the performance characteristics for improved accuracy.
US10171128B2	Data transmission method and apparatus A data transmission method includes the following steps: determining a transmission resource to be used and a complex-valued spreading sequence to be used; processing a data symbol to be sent by using the complex-valued spreading sequence to generate a symbol sequence; and sending the symbol sequence through the transmission resource.
US10171122B2	Hand strap for electronic apparatus A hand strap for an electronic apparatus is provided with a first gripper, which is attached to a rear surface of an electronic apparatus in a removable manner, and a second gripper. The first gripper has a main body and an accommodation portion. The second gripper includes a fixed portion and an extra-long portion, one end of which is a free end. The extra-long portion is accommodated inside the accommodation portion, and can adjust the entire length of the second gripper. A finger accommodation space in which a finger other than a thumb is disposed between the first gripper and the second gripper, is defined. By gripping the first gripper with the pad and the tip end of a finger other than a thumb, it is possible to perform operation with a thumb over a wide area of a touch panel while holding an electronic apparatus with one hand.
US10171116B2	Data transmission method and device A data transmission method and a data transmission device are provided. The method includes: establishing, by a transmitting end, N different first paths between the transmitting end and a receiving end in an established network; splitting, by the transmitting end, a fixed-length data frame into N first fragments; transmitting, by the transmitting end, the first fragments to the receiving end through the corresponding first paths respectively; splitting, by the transmitting end, the data frame into N-M second fragments in a case that a failure occurs in M of the first paths during transmission of the data frame; establishing, by the transmitting end, N-M different second paths between the transmitting end and the receiving end; transmitting, by the transmitting end, the second fragments to the receiving end through the corresponding second paths respectively.
US10171115B1	Outphasing calibration in a radio frequency (RF) transmitter device An outphasing calibration method in an outphasing calibration RF transmitter comprises detection of differences of a first plurality of signal characteristics of a first plurality of amplified RF signals across at least a transmitter antenna and a plurality of load impedances. The first plurality of amplified RF signals corresponds to a first plurality of constant-envelope signals. Accordingly, at least a generation of a second plurality of constant-envelope signals and at least one signal characteristic of each of a second plurality of constant-envelope RF signals on a plurality of transmission paths are controlled. At least one of a first calibration or a second calibration of a second plurality of signal characteristics of the second plurality of constant-envelope signals is executed based on the controlled generation of the second plurality of constant-envelope signals and the at least one controlled signal characteristic of each of the second plurality of constant-envelope RF signals.
US10171113B2	Multiplexer, transmission device, and reception device A multiplexer includes filters, a common terminal with which an inductance element is connected to a connection path of the common terminal and an antenna element and a capacitance element is connected in series to the connection path, and another inductance element. An input terminal of one of the filters is connected to the common terminal via the another inductance element, and is connected to a parallel resonator. In each of the filters other than the one filter, one of the input terminal and the output terminal, which is a terminal closer to the antenna element, is connected to the common terminal, and is connected to the series resonator.
US10171110B1	Sequential power transitioning of multiple data decoders Method and apparatus for managing data decoder circuits, such as LDPC (low density parity check) decoders in a solid state drive (SSD). In some embodiments, a non-volatile memory (NVM) is configured to store data in the form of code words. Each code word has a user data payload and associated code bits. A plurality of data decoder circuits are configured to use the code bits to detect and correct bit errors in the code words during a read operation. A power transition circuit is configured to successively transition each of the data decoder circuits in turn from a first power mode to a second power mode, such as from an active mode to an idle mode, at a different time and at a conclusion of a predetermined time interval. In this way, voltage spikes or other anomalous conditions on a voltage source pathway may be reduced.
US10171103B1	Hardware data compression architecture including shift register and method thereof A hardware compression architecture including a shift register including: a plurality of sequentially coupled stages and a window stage coupled at an output end of the shift register, the shift register configured to receive an uncompressed data stream at an input end and output the uncompressed data from the window stage; a plurality of comparators each coupled to receive a data value held in a corresponding stage of the shift register and a data value held in the window stage, each of the comparators being configured to output a comparison result indicating whether the received stage value and the window stage data value match; logic, coupled to the comparators to receive the comparison results, to selectively compute one or more indexes based on the comparisons; and an encoder coupled to receive the one or more indexes and output, based on the one or more indexes, a position of a matching data value and a length of a matching sequence of data values.
US10171099B2	Time-based delay line analog to digital converter A differential digital delay line analog-to-digital converter (ADC) includes differential digital delay lines, a circuit including a set of delay elements included in the differential digital delay lines, and another circuit including another set of delay elements included in the differential digital delay lines. The first circuit is configured to generate data representing an analog to digital conversion of an input. The second circuit is configured to calibrate a source to the differential digital delay lines.
US10171096B2	Pipelined SAR with TDC converter An analog-to-digital converter (ADC) is disclosed. The ADC has a successive approximation register (SAR) configured to receive an input signal and to generate a first digital signal having a plurality of most significant bits and a residue voltage. A voltage-to-time conversion element is configured to generate a time domain representation using the residue voltage. The voltage-to-time conversion element has an amplifier with a input coupled to an output of the SAR, a zero crossing detector coupled to an output of the amplifier, and a current source selectively coupled to the output of the SAR and the input of the amplifier by way of a switching element. A time-based signal processing element is configured to convert the time domain representation to a second digital signal having a plurality of least significant bits.
US10171094B2	High accuracy clock synchronization circuit A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a signal process on frequency control data based on a result of the phase comparison, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of frequency control data having undergone the signal process. The phase comparator includes a counter that performs a count operation by using the input signal, and performs the phase comparison by comparing a count value in the counter inn (where n is an integer of 2 or more) cycles of the reference signal with an expected value of the count value in integers.
US10171093B2	Slew rate locked loop A method of controlling and maintaining a constant slew rate at an output of a buffer is provided. The method includes the following steps: (a) receiving, (i) a first input signal and (ii) at least one of a control voltage using the buffer; (b) generating a threshold voltage using a first reference voltage generator; (c) comparing (i) the threshold voltage with an output of the buffer using at least one of a comparator; (d) determining a phase difference using a phase detector; (e) producing a DC voltage using a loop filter; (f) generating a reference voltage; (g) receiving the DC voltage and the reference voltage using an amplifier; (h) amplifying the difference between (a) said DC voltage, and (b) the reference voltage to obtain a control voltage using the amplifier; and (i) feeding the control voltage to the buffer.
US10171092B2	Time clock signal processing system and method thereof A time clock signal processing system and method thereof, applicable to an environment of USB synchronous mode audio clock reconstruction, is disclosed. The clock signal processing method employed by the clock signal processing system first uses a first-stage phase-locked loops (PLL) to raise the frequency of the inputted USB start-of-frame (SOF) field, provides clock synchronization and outputs the second-stage PLL; then, the second-stage PLL reduces the timing jitter of the output of the first-stage PLL to below 20 ps.
US10171088B1	Quantum circuit for shifting phase of target qubit based on control qubit The inventive concept relates to a quantum circuit that shifts the phase of a target qubit by π/2n−1 based on a control qubit. The quantum circuit may include a first auxiliary circuit, a rotation gate, and a second auxiliary circuit. The first auxiliary circuit converts the first qubit state into the second qubit state according to the entanglement of a control qubit, a target qubit, and an ancillary qubit having a \|0> state. The rotation gate shifts the phase for some basis states of the second qubit state by π/2n−1, and converts the second qubit state to the third qubit state. The second auxiliary circuit converts the third qubit state to the fourth qubit state such that the phase of the target qubit is shifted by π/2n−1.
US10171087B1	Large fan-in RQL gates Large fan-in logical gate circuits for use in reciprocal quantum logic (RQL) systems and related methods permit for improved efficiency and density of RQL logic. A majority 3-of-5 gate circuit, as described, can be extended to include more than five inputs, and can also be modified to create AND gates, OR gates, and OA gates. The gate circuits can accommodate inputs and provide outputs each in the form of single flux quantum (SFQ) pulses, either positive or negative, to indicate asserted and de-asserted logic states, respectively.
US10171085B2	Noise-immune reference (NREF) integrated in a programmable logic device A reference voltage block integrated in a programmable logic device (PLD) includes: an accumulator comprising an adder and a register and configured to receive a digital reference value and generate a carry out signal; a low-pass filter configured to receive the carry out signal from the accumulator and generate a filtered signal; and a variable analog gain amplifier configured to amplify the filtered signal using a gain selected from a predetermined set of gains and generate a reference voltage output signal. The PLD includes a programmable fabric and a signal wrapper that is configured to provide signals between the reference voltage block and the programmable fabric. The digital reference value and the predetermined set of gains of the reference voltage block are programmably using the programmable fabric and fed to the reference voltage block via the signal wrapper.
US10171081B1	On-chip supply noise voltage reduction or mitigation using local detection loops in a processor core Techniques facilitating on-chip supply noise voltage reduction and/or mitigation using local detection loops in a processor core are provided. In one example, a computer-implemented method can comprise detecting, by a processor core, a voltage droop at a first area of the processor core. The computer-implemented method can also comprise transmitting, by the processor core, voltage droop information to a local controller located in the first area and to a global controller located in the processor core. Further, the computer-implemented method can comprise applying, by the processor core, a first mitigation countermeasure at the first area of the processor core in response to a local instruction received from the local controller. The local instruction can comprise an indication of the first mitigation countermeasure.
US10171080B2	Voltage level shifter (VLS) circuits employing a pre-conditioning circuit for pre-conditioning an input signal to be voltage level shifted in response to a pre-charge phase Voltage level shifter (VLS) circuits employing a pre-conditioning circuit for pre-conditioning an input signal to be voltage level shifted in response to a pre-charge phase are disclosed. A VLS circuit is configured to voltage level shift an input signal in a lower voltage domain on an output node in a higher voltage domain. The VLS circuit includes a pre-charge circuit configured to pre-charge the output node in a pre-charge phase. The VLS circuit also includes a pull-up circuit and a pull-down circuit that are configured to pull-up and pull-down the pre-charge phase of the output node, respectively, in an evaluation phase based on a logic state of the input signal to generate the output signal. To mitigate or avoid contention between the pull-up and pull-down circuits in the evaluation phase, the input signal is pre-conditioned such that the pull-down circuit is deactivated in response to the pre-charge phase.
US10171077B2	Scalable qubit drive and readout A technique relates to qubit drive and readout. A first lossless microwave switch is connected to a quantum system. A second lossless microwave switch is connectable to the first lossless microwave switch. A quantum-limited amplifier is connectable to the second lossless microwave switch.
US10171076B2	Independent control of branch FETs for RF performance improvement A FET-based RF switch architecture and method that provides for independent control of FETs within component branches of a switching circuit. With independent control of branch FETs, every RF FET in an inactive branch that is in an “open” (capacitive) state can be shunted to RF ground and thus mitigate impedance mismatch effects. Providing a sufficiently low impedance to RF ground diminishes such negative effects and reduces the sensitivity of the switch circuit to non-matched impedances.
US10171073B2	Regulating transition slope using differential output A circuit includes a first driver, a second driver, and one or more monitor modules coupled to the first or second driver to measure slope times of the first or second driver. The circuit further includes a comparator coupled to the one or more monitor modules to compare the slope times of the first and second drivers. The circuit further includes one or more regulators coupled to the comparator and the first or second driver to regulate a slope of the first or second driver, based on output of the comparator, at most once per pulse cycle until the slope of the first or second driver reaches a target slope.
US10171068B1	Input interface circuit An input interface circuit is provided. When a pad voltage is higher than a default operating voltage, a clamping circuit maintains the voltage at a first node at the default operating voltage. A first inverter is coupled between the first node and a second node. A voltage of a third node is adjusted along with the pad voltage (input end of a high-voltage buffering circuit) and the voltage at the second node, and causes the voltage at the third node has a same voltage change trend as the pad voltage. A second inverter is coupled between the third node and a fourth node. A voltage recovery circuit has its input end coupled to the fourth node and its output end coupled to the third node, and selectively couples the third node to a power line or a ground line according to the voltage at the fourth node.
US10171066B2	Compact high voltage RF generator using a self-resonant inductor RF generators including active devices driving series resonant circuits are described. The series resonant circuits include a self-resonant dual inductor. The RF generators can be used to drive capacitive loads.
US10171062B2	Variable-frequency filter A variable-frequency filter includes a series-arm resonant circuit and a parallel-arm resonant circuit. Each of the series-arm resonant circuit and the parallel-arm resonant circuit includes a piezoelectric resonator, an inductor, and a variable capacitor. A pass band of the variable-frequency filter is formed by a resonant point of the series-arm resonant circuit and a sub-anti-resonant point of the parallel-arm resonant circuit. An attenuation pole at a higher frequency than a pass band is formed by an anti-resonant point of the series-arm resonant circuit and a resonant point of the parallel-arm resonant circuit.
US10171060B2	High pass filter A high pass filter includes a first LC series resonator including a first end connected to a signal path, and a second end connected to at least one ground terminal, a second LC series resonator including a third end electrically connected to the signal path, and a fourth end connected to the at least one ground terminal, and a third capacitor between a first portion extending from a first capacitor to a first inductor and a second portion extending from a second capacitor to a second inductor.
US10171055B2	Audio control system and related methods Some embodiments of the invention are directed to an audio production system which is more portable, less expensive, faster to set up, and simpler and easier to use than conventional audio production tools. An audio production system implemented in accordance with some embodiments of the invention may therefore be more accessible to the typical user, and easier and more enjoyable to use, than conventional audio production tools.
US10171053B2	Apparatus and methods for power amplifiers with an injection-locked oscillator driver stage Apparatus and methods for power amplifiers with an injection-locked oscillator driver stage are provided herein. In certain configurations, a multi-mode power amplifier includes a driver stage implemented using an injection-locked oscillator and an output stage having an adjustable supply voltage that changes based on a mode of the multi-mode power amplifier. By implementing the multi-mode power amplifier in this manner, the multi-mode power amplifier exhibits excellent efficiency, including when the voltage level of the adjustable supply voltage is relatively low.
US10171052B2	Operational amplifier and differential amplifying circuit thereof An operational amplifier and a differential amplifying circuit thereof. The differential amplifying circuit receives a differential input signal and outputs a differential output signal. The differential amplifying circuit includes an output port that has a first terminal and a second terminal, the differential output signal being outputted via the first and second terminals; a first transistor pair receiving the differential input signal via two first ends and coupling to the first and second terminals respectively via two second ends; a second transistor pair receiving the differential input signal via two first ends and coupling to the first and second terminals respectively via two second ends; and a third transistor pair receiving a control signal via two first ends and coupling to the first and second terminals respectively via two second ends. The control signal controls the third transistor pair to switch on or off and/or controls the current flowing therethrough.
US10171049B2	Class-D amplifier circuits Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.
US10171046B2	System and method for low distortion capacitive signal source amplifier According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage.
US10171045B2	Apparatus and methods for low noise amplifiers with mid-node impedance networks Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes an input, an output, a transconductance device, a cascode device, and a mid-node impedance network. The transconductance device generates an amplified signal by amplifying an input signal received at the input, and provides the amplified signal to the output via the cascode device. The mid-node impedance network is electrically connected between the transconductance device and the cascode device, and provides compensation for a parasitic capacitance of the gm device, thereby enhancing the LNA's performance.
US10171043B2	Amplification device incorporating limiting An amplification device (100) comprises an amplifier circuit (110) and a limiter (120). The amplifier circuit (110) comprises a signal input (111) for an input signal to be amplified and a first signal output (112) for a first output signal. The limiter (120) comprises a differential amplifier (125) comprising a first differential amplifier input (129) for a threshold control signal, a second differential amplifier input (113) for a feedback signal, and a differential amplifier output (124) for a threshold signal indicative of a difference between the threshold control signal and the feedback signal. The limiter (120) also comprises a first diode (121) having a first anode (122) coupled to the first signal output (112) and a first cathode (123) coupled to the differential amplifier output (124), and a feedback stage (128) coupled between the differential amplifier output (124) and the second differential amplifier input (113). The feedback stage (128) is arranged to generate the feedback signal dependent on the threshold signal.
US10171039B2	Devices and methods that facilitate power amplifier off state performance A peaking amplifier is disclosed. The peaking amplifier includes a driver stage, a final stage, and an interstage matching network. The driver stage has a load impedance and is configured to generate a driver output based on an input signal. The final stage has a final stage input impedance and is configured to generate a peaking output based on the driver output. The interstage matching network is coupled to the driver stage and the final stage. The interstage matching network is configured to transform the final stage input impedance to the load impedance for the driver stage when the peaking amplifier is ON and to provide a short to an input of the final stage when the peaking amplifier is in an OFF state.
US10171038B1	Envelope-tracking power supply modulator An envelope-tracking power supply modulator (ETSM) supplies power to a radio frequency power amplifier (RFPA) of a radio frequency (RF) circuit according to a baseband envelope signal. The ETSM includes a linear amplifier, a capacitor, a single inductor multiple output (SIMO) switch-mode converter, and a controller. The linear amplifier receives the baseband envelope signal, and has its output terminal coupled to a power input of the RFPA. One terminal of the capacitor is coupled to a reference voltage, and the other terminal is coupled to a power input of the linear amplifier. The SIMO switch-mode converter includes two output terminals. One of the output terminals is coupled to the capacitor and the power input of the linear amplifier, and the other of the output terminals is coupled to the output terminal of the linear amplifier and the power input of the RFPA. The controller controls the SUMO switch-mode converter.
US10171034B2	Phase-rotated harmonic-rejection mixer apparatus A harmonic-rejection mixer apparatus includes a mixing circuit and a combining circuit. The mixing circuit receives mixes an input signal and a first local oscillator (LO) signal to generate a first output signal, and mixes the same input signal and a second LO signal to generate a second output signal, wherein the first LO signal and the second LO signal have a same frequency but different phases. The combining circuit combines the first output signal and the second output signal, wherein harmonic rejection is at least achieved by combination of the first output signal and the second output signal.
US10171031B2	Oscillator phase noise using active device stacking An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.
US10171028B2	Method and apparatus for monitoring photovoltaic module A method and an apparatus for monitoring a photovoltaic module to reduce a commissioning workload and reduce commissioning complexity, the method includes obtaining communication addresses of all module voltage monitoring apparatuses, establishing a connection to a corresponding module voltage monitoring apparatus using the communication address, obtaining a relative voltage of a corresponding module relative to a voltage reference point from the module voltage monitoring apparatus to which the connection is established; obtaining, according to relative voltages obtained from all the module voltage monitoring apparatuses, a physical location that is of a module corresponding to each module voltage monitoring apparatus and that is in the photovoltaic string; establishing an information table according to the communication address of each module voltage monitoring apparatus and the physical location of the module corresponding to each module voltage monitoring apparatus, and performing module abnormality detection according to the information table.
US10171027B2	Photovoltaic module mount Mounting components of photovoltaic (PV) modules and PV module assemblies are described, including PV module couplings and PV module mounting chassis. In an example, a PV module includes a PV module coupling having a toe portion extending from a PV module frame, and a PV module mounting chassis includes a toe slot to receive the toe. The toe and toe slot construction allows for the PV module frame to be assembled to the PV module mounting chassis without using tools, and thus, permits a PV module assembly to be quickly constructed during installation of a PV module system. Furthermore, the toe and toe slot construction accommodates thermal expansion and other environmental loads seen after installation, while providing a grounding connection for the PV module assembly.
US10171024B2	Solar energy collector A solar collector may include a frame for supporting a plurality of photovoltaic (PV) panels. The frame may be adapted to removably attach to a base. The solar collector may include a first panel assembly, including at least one of the plurality of PV panels, pivotally attached to the frame about a first axis. The solar collector may also include a second panel assembly, including at least one of the plurality of PV panels, pivotally attached to the first panel assembly. The second panel assembly may collectively move with the first panel assembly about the first axis and to pivot relative to the frame, and to pivot about a second axis that is substantially parallel to and radially offset from the first axis, to move between a deployed position and a retracted position.
US10171023B2	Motor starter apparatus with start-up fault detection capability A motor starter apparatus includes at least one semiconductor switch configured to selectively couple a power source to a motor, at least one current sensor configured to generate a current sense signal indicative of a current provided via the at least one semiconductor switch, and a control circuit coupled to the at least one current sensor and configured to cause the at least one semiconductor switch to momentarily couple the power source to the motor and identify a fault based on a behavior of the current sense signal in response to the momentary coupling. The control circuit may be configured to identify the fault responsive to detecting that a rate of change of the current in response to the momentary coupling meets a predetermined criterion.
US10171020B2	Intelligent cooperative control system and method for multi-unit permanent magnet synchronous motor An intelligent cooperative control system and method thereof. A parallel structure for low-voltage multi-module permanent magnet synchronous motor cooperative control units is adopted to realize control of low-voltage high power, control of low-speed large torque and system redundancy control; a double-parallel PWM rectifier circuit structure is used, when the system is in unbalanced power supply network environments; a resonant pole-type three-phase soft-switching inverter circuit is used as an inverter unit to improve utilization of DC bus voltage and to greatly reduce device switch losses at high frequencies; a current control and speed estimation unit is used, so that rotor speed and phase angle information is accurately estimated with low cost and high reliability; a controlled object is the multi-module permanent magnet synchronous motor, so that the problems of difficulties in motor installation, transportation and maintenance of a high-power electric drive system and the like are solved.
US10171017B2	Image forming apparatus, motor control apparatus, and method of controlling a motor An image forming apparatus may include an engine portion used to perform an image forming job, a step motor configured to start the engine portion, a driver including a resistor that measures current that flows to a coil of the step motor and is configured to provide a predetermined constant current to the step motor, and a drive controller configured to measure a load level of the step motor based on a voltage value of the resistor and to control the driver to provide the constant current that corresponds to the measured load level.
US10171011B2	Electric tool An electric tool includes: a motor configured to be driven by PWM controlling a semiconductor switching element; a trigger configured to adjust startup and rotation of the motor; a changeover switch configured to switch a rotation direction of the motor between a forward rotation and a reverse rotation; a power transmission mechanism configured to rotate a tip tool by the motor, and a controller configured to control rotation of the motor. When the reverse rotation is set by the changeover switch, the controller PWM controls the semiconductor switching element at a high duty ratio after the trigger is pulled to drive the motor, and thereafter drives the motor at a state where the high duty ratio is changed to a low duty ratio.
US10171005B2	Inverter control device In a first section including a point of time when sums of periods while upper arm-side switches in a pair of current paths of a voltage source inverter conduct in one cycle of a carrier are equal to each other at zero, a first voltage command group corresponds to switching signals in which a period while the upper arm-side switches in all of the current paths are nonconductive in this one cycle is adjacently sandwiched by a pair of periods while all of the upper arm-side switches in the pair of current paths are nonconductive and other upper-arm side switch conducts.
US10170998B2	Method for generating injection current for fuel cell stack and apparatus for performing the same An apparatus for generating injection current for a fuel cell stack includes a switch configured to retain any one state of an on state and an off state; an inductor configured to output accumulated energy according to a state of the switch; and a converter configured to provide an output of the inductor to a load or convert the output into a predetermined voltage and provide the predetermined voltage to a load.
US10170995B2	Multiphase power converter A multiphase power converter and a corresponding method is presented. The multiphase power converter contains a first and a second constituent switched-mode power converter. The first constituent switched-mode power converter provides, both in a first mode of operation and in a second mode of operation, a first phase current to an output of the converter. The second constituent switched-mode power converter provides, in the second mode, a second phase current to the output of the converter. The converter switches, depending on an operation condition of the converter, between the first mode and the second mode. A first transconductance of the first constituent switched-mode power converter is adapted when switching between the first mode and the second mode. By adapting the first transconductance, unsteadiness of the output voltage of the converter occurring during the switching between both modes of operation is minimized.
US10170993B2	Control system for transitioning a DC-DC voltage converter from a buck operational mode to a safe operational mode A control system for a DC-DC voltage converter includes a microcontroller having first and second applications. The first application commands the microcontroller to generate a first signal that is received at a first pin on a high side integrated circuit to transition a first plurality of FET switches to an open operational state, and that is received at a first pin on the low side integrated circuit to transition a second plurality of FET switches to the open operational state. The second application commands the microcontroller to generate a second signal that is received at a second pin on the high side integrated circuit to transition the first plurality of FET switches to the open operational state, and that is received at a second pin on the low side integrated circuit to transition the second plurality of FET switches to the open operational state.
US10170992B1	Adaptive amplification active filter for divider-less high frequency DC-DC converters A circuit and a method for power conversion and for generating an output voltage in accordance with a reference voltage are presented. The power converter has a circuit for filtering the output voltage, an error amplifier circuit that compares the reference voltage and the filtered output voltage for generating an error voltage as a result of the comparison. There is a circuit for driving one or more switching devices in dependence on the error voltage. The error amplifier circuit has a first differential circuit and a first bias current generation circuit for generating a first bias current for the first differential circuit, a second differential circuit and a second bias current generation circuit for generating a second bias current for the second differential circuit, and a circuit for redistributing the first bias current to the second differential circuit or redistributing the second bias current to the first differential circuit.
US10170988B2	Power supply system An operation mode selection unit selects an operation mode of a power converter and generates a mode selection signal indicating the result of selection, in accordance with a load condition and a power supply condition. An operation mode switching control unit generates a mode control signal designating an operation mode of the power converter. When the operation mode currently selected by the mode control signal is different from an operation mode indicated by the mode selection signal, the operation mode switching control unit adjusts a power distribution ratio between a plurality of DC power supplies or an output voltage on an electric power line so as not to change abruptly, and then permits a transition of operation mode.
US10170986B2	Hybrid buck A system is disclosed which allows for a multiphase Buck switching converter, where some phases operate in peak-mode current control, and some phases operate in valley-mode current control, simultaneously with the peak-mode phases. The peak-mode phases of the switching converter operate at lower frequency, and with a higher value inductor than the valley mode phases. The peak-mode phases support discontinuous control mode (DCM) operation and continuous control mode (CCM) operation, and the valley-mode phases only support CCM operation. The peak-mode phases of the switching converter are always enabled, and the valley-mode phases are only enabled at high currents. The peak-mode and valley-mode currents are matched with a peak current servo, for better efficiency.
US10170984B2	Switched mode power converter with peak current control In accordance with an embodiment, a method, includes operating a power converter that comprises an electronic switch connected in series with an inductor in one of a first operation mode and a second operation mode. Operating the power converter in each of the first operation mode and the second operation mode includes driving the electronic switch in a plurality of successive drive cycles based on drive parameter. Each of the plurality of drive cycles includes an on-time in which the electronic switch is switched on and an off-time in which the electronic switch is switched off.
US10170981B1	Configurable bi-directional charge pump design A bi-directional charge pump cell includes a p-type substrate having a main surface. A first n-well is formed in the p-type substrate that includes n+ doped regions formed in the first n− well at the main surface. A first p-well is formed in the first n− well that includes p+ doped regions formed in the first p-well at the main surface. A second n-well is formed in the first p-well that includes n+ doped regions and PMOS transistors formed at the main surface. A second p-well is formed in the first n-well that includes p+ doped regions at the main surface. A third p-well is defined in the second p-well that includes p+ doped regions and NMOS transistors at the main surface.
US10170980B2	Method for synchronizing power charge-pump with system clock The proposed Power Management Integrated Circuit (PMIC) features the option to synchronize the charge-pump of a PMIC with the system clock, and then to swap and self-oscillate and skip pulses, when the digital controls of the PMIC send a first order to the charge-pump. The clock control circuitry of the PMIC also features the option for the charge-pump to then swap and use the system clock again, when the digital controls of the PMIC send a second order to the charge-pump. The designed transition of the clock from clock sync-mode to self-oscillate, and from self-oscillate back to clock sync-mode, does not present any phase discontinuity.
US10170978B1	Signal transmission circuit In a signal transmission circuit including a drive circuit and a control apparatus which are insulated from each other and between which a signal indicative of predetermined information is transmitted via a magnetic coupler, the drive circuit includes a temperature information transmission unit transmitting a first signal indicative of temperature information based on the number of pulses consecutively output with a predetermined period and each having a first waveform with a duty cycle of less than 100% with respect to the period and an abnormality information transmission unit transmitting a second signal indicative of abnormality information based on a pulse having a longer wavelength than the first waveform. The temperature information transmission unit transmits the first signal to the control apparatus and the abnormality information transmission unit transmits the second signal to the control apparatus, via the magnetic coupler common to two information transmission units.
US10170976B2	Phase compensation method for power factor correction circuit A method for phase compensating a power factor correction circuit is provided. Firstly, a present current value of an input current is sampled, and the sampled signal is filtered. Then, a present waveform of the input current corresponding to the present current value of the filtered sampled signal and a previous waveform of the input current corresponding to a previous current value of the filtered sampled signal are predicted, and a current error signal is generated according to a difference between the present waveform and the previous waveform. Then, the current error signal is adjusted, and an adjusted signal is generated. Then, a feedforward signal is added to the adjusted signal, and a phase compensation signal. Then, a current control signal is added to the phase compensation signal, and a pulse width modulation signal is generated to control a switching circuit.
US10170975B1	AC line detection and X capacitor discharge using a single terminal A controller for a switching power converter is provided with a single detection pin through which the controller monitors whether the switching power converter is connected to an AC mains. Should a voltage for the detection pin indicate that the switching power converter is disconnected from the AC mains, the controller asserts the detection pin voltage to trigger a bleeder circuit to discharge an X class capacitor.
US10170973B1	Synchronous rectifier circuit and switching power supply apparatus A synchronous rectifier circuit used in a switching power supply apparatus that performs synchronous rectification includes a transistor and a secondary control IC. The transistor performs switching operation in accordance with a gate voltage applied to a gate terminal. The secondary control IC includes a terminal and applies the gate voltage to the gate terminal of the transistor. The terminal is connected to a capacitor which stores electric charge to be supplied to the gate terminal of the transistor. The terminal is applied with a direct-current voltage obtained through synchronous rectification. The direct-current voltage is equal to or smaller than a withstand voltage of the gate of the transistor, and equal to or larger than a threshold voltage of the transistor. A maximum value of the gate voltage is the direct-current voltage.
US10170971B1	Dual pole dual bucking magnet linear actuator A linear actuator includes dual bucking magnets, dual pole pieces, and dual spacers. The linear actuator includes a coil-and-housing assembly disposed around a magnet assembly. The magnet assembly includes two bucking magnets sandwiched around a central magnet. The central magnet and the bucking magnets may be separated by spacers. A housing is disposed around the magnet assembly. Between the housing and the magnet assembly, a dual coil is wound in two opposing directions to generate additive forces on the magnet assembly.
US10170965B2	Linear vibration motor A vibration motor includes a housing having an accommodation space; a vibrator accommodated in the housing; an elastic part suspending the vibrator in the housing. The elastic part includes a fixation part connecting with the vibrator, a connecting part connecting with the housing, and a bending part connecting the fixation part with the connecting part. A number of pre-compressed springs arranged on two sides of the vibrator; one end of the spring being connected with the vibrator, and the other end being connected with the housing, a pre-compression direction of the spring being vertical to a vibration direction of the vibrator.
US10170963B2	Armature for electromechanical device which converts electrical energy and mechanical energy, and method for manufacturing same In each coil (10), between a first radial section formed by a winding-start section (10a) and a second radial section formed by a winding-end section (10b) of a winding (10A), the circumferential lengths of the winding lap sections formed by said winding change in a continuous or stepped manner. For a first coil, the sequences within two slots (22) of the winding constituting the first coil are reversed with respect to one another by a twisted section (10d) between a first coil end (12a) and a second coil end (12b) of the first coil. The first coil and next second coil form a lap winding in which the twisted sections of the first and second coils are three-dimensionally entwined. The lap winding of said twisted sections continues for the third and subsequent coils, and the first coil end and the second coil end of each coil are continuous without spaces at the end surfaces of a core (20).
US10170958B2	Belt pulley arrangement for a belt drive for driving auxiliary units of a motor vehicle, and a method for driving a motor vehicle auxiliary unit that is connected by means of a belt pulley arrangement A belt pulley arrangement for a belt drive for driving auxiliary units of a motor vehicle, comprising a belt pulley for introducing a torque that can be supplied by a traction mechanism, an output shaft for driving an auxiliary unit, particularly a coolant pump, an electric machine for transmitting torque between the belt pulley and the output shaft, the electric machine including a rotor connected to the belt pulley and a stator connected to the output shaft, and being able to be electrically connected to an electric energy source for the purpose of accelerating the output shaft and/or to an electric energy sink in order to decelerate the output shaft, a first rotational speed measurement device for detecting the time curve of the rotational speed of the belt pulley and/or a second rotational speed measurement device for detecting the time curve of the rotational speed of the output shaft, and a control device connected to the electric energy source and/or electric energy sink so as to control an output shaft rotational speed time curve by temporarily electrically connecting the energy source and/or energy sink in reaction to the rotational speed time curve that has been detected. The power flow between belt pulley and output shaft which can be influenced by the electric machine provides that the auxiliary unit that is connected via the output shaft does not have to be designed for the most unfavorable operating point. As a result, the auxiliary unit can have smaller dimensions which allows a reduction in the construction space for motor vehicle components and particularly in the construction space for motor vehicle auxiliary units which can be driven by the belt drive.
US10170955B2	Pull tight motor housing A motor includes a motor assembly, an end cap, a flexible insulating sleeve, and a flexible enclosure. The motor assembly includes a stator, a rotor, and wiring connected to the stator. The end-cap is coupled to the motor assembly to produce first sub-assembly. In addition, the end-cap includes an electrical fitting for feeding the wiring externally of the motor. The flexible insulating sleeve fits over at a least a portion the first sub-assembly to produce a second sub-assembly. The flexible enclosure includes a formed housing section and a connecting section. The formed housing section loosely fits over the second sub-assembly prior to tightening of the connecting section and, when the connecting section is tightened, the formed housing section tightly fits over the second sub-assembly compressing the flexible insulating sleeve to produce an insulating seal.
US10170954B2	Direct current motor The purpose of the present invention is to provide a direct current motor wherein the number of coil-connecting wires that cross the outer surface of a coil end part is reduced. In a direct current motor that is provided with an armature that has a plurality of armature slots and has an armature coil that is wound so as to span two armature slots that are separated by a fixed number of armature slots, a lowermost layer of a coil end part is provided with at least four armature coils that are wound through other armature slots so as not to coincide with the wound armature coil, and a layer above the four armature coils that are wound on the bottommost layer is provided with at least four armature coils that are wound in the same manner as the four armature coils.
US10170953B2	Planar composite structures and assemblies for axial flux motors and generators A planar composite structure (PCS) for use in an axial flux motor or generator may include a conductive layer disposed on a dielectric layer, with the conductive layer comprising conductive traces that form portions of at least two windings that, when energized, generate magnetic flux for at least two corresponding phases of the motor or generator. A PCS may additionally or alternatively include a first conductive layer comprising first conductive traces that form a first portion of a winding that, when energized, generates magnetic flux for a first phase of the motor or generator, and a second conductive layer, which is different than the at least one first conductive layer, comprising second conductive traces that form a second portion of the winding. The first portion of the winding may be connected in series with the second portion of the winding, and the first and second portions of the winding may be configured and arranged such that a same amount of current flows through each of the first and second portions of the winding.
US10170948B2	Process for the formation of a stack of superposed metallic laminations Each lamination of the lamination stack comprises at least one assembly of coupling elements, said assembly comprising one insertion clamp, one receiving clamp and at least one receiving window, said coupling elements maintaining the same relative positioning from one another, the insertion clamp and the receiving clamp being defined by respective portions of the lamination axially projecting to the same side of the latter, each insertion clamp of a lamination being fitted, by interference, in the interior of a receiving clamp of an adjacent lamination, and each receiving clamp of a lamination being housed in the receiving window of at least one lamination of the stack.
US10170944B2	Rechargeable impantable cardioverter defibrillator Rechargeable implantable cardioverter defibrillator including a hermetically sealed can and at least one lead, coupled with the hermetically sealed can, the hermetically sealed can including at least one high voltage capacitor, an electronic circuit, coupled with the high voltage capacitor and a rechargeable battery, coupled with the electronic circuit and the high voltage capacitor, an outer surface of the hermetically sealed can including an active section and a non-active section, the non-active section being electrically insulated from the active section, wherein a surface area of the active section acts as at least one of an electrode with the lead for forming an electric shock vector for applying a high voltage shock and a sensor for sensing electrical activity and wherein a surface area of the non-active section acts as at least one antenna for transmitting and receiving information wirelessly while also receiving electromagnetic energy to inductively charge the rechargeable battery.
US10170943B2	Wireless inductive power transfer A power transmitter (101) provides power transfer to a power receiver (105) using a wireless inductive power transfer signal. The power transmitter (101) comprises an inductor (103) generating the power transfer signal when a voltage drive signal is applied. A measurement unit (311) performs measurements of a current or voltage of the inductor (103). The measurements are performed with a time offset relative to a reference signal synchronized to the voltage drive signal. An adaptor (313) can vary the time offset to determine an optimum measurement timing offset resulting in a maximum demodulation depth which reflects a difference measure for measurements for different modulation loads of the power transfer signal. A demodulator (309) then demodulates load modulation of the inductive carrier signal from measurements with the time offset set to the optimum measurement timing offset. In some scenarios, both the timing and duration of measurements may be varied. The approach improves communication reliability.
US10170940B2	Wireless power transfer system A load-independent Class EF inverter may maintain ZVS operation, and produce a constant output current, rather than a constant output voltage, regardless of the load resistance. A constant output current allows the inverter to operate efficiently for a load range from zero resistance (short circuit) to a certain maximum load resistance, making the inverter more suitable as a coil driver for an IPT system. The resonant frequency of the resonant circuit may be tuned to a non-integer multiple of a switching frequency.
US10170938B2	Electric power receiving device and electric power transmission device An electric power receiving device has an electric power receiving unit that contactlessly receives electric power from an electric power transmission device, and the power receiving unit includes a first node, a second node, and a capacitor, a coil, a capacitor, a coil, and a capacitor, which are sequentially connected in series, between the first node and the second node.
US10170937B2	Devices, systems, and methods for adjusting output power using synchronous rectifier control In one aspect, an apparatus for wireless receiving power comprises a receive circuit configured to receive wireless power via a magnetic field sufficient to power or charge a load. The apparatus further comprises a tuning circuit comprising a variable reactive element, coupled to the receive circuit, and configured to detune the receive circuit away from a resonant frequency to adjust an output power level to a first output power level. The apparatus comprises a rectifier, comprising a switch, coupled to the receive circuit and configured to rectify an alternating current to a direct current for supplying power to the load. The apparatus comprises a drive circuit configured to actuate the switch when a current through the switch satisfies a first non-zero current value and adjust the first non-zero current value to a second non-zero value to adjust the first output power level to a second output power level.
US10170935B2	Inductive power supply with duty cycle control An inductive power supply that maintains resonance and adjusts duty cycle based on feedback from a secondary circuit. A controller, driver circuit and switching circuit cooperate to generate an AC signal at a selected operating frequency and duty cycle. The AC signal is applied to the tank circuit to create an inductive field for powering the secondary. The secondary communicates feedback about the received power back to the primary controller. The power transfer efficiency may be optimized by maintaining the operating frequency substantially at resonance, and the amount of power transferred may be controlled by adjusting the duty cycle.
US10170924B2	Modeling a change in battery degradation A battery controller and method for controlling a battery include generating a battery capacity prediction model that characterizes a battery capacity decay rate. Future battery capacity for a battery under control is predicted based on the battery capacity prediction model and a present value of the battery capacity. One or more operational parameters of the battery under control is controlled based on the predicted future battery capacity.
US10170921B2	Methods and systems for efficient battery charging and usage Battery charging methods and systems for devices that have rechargeable batteries provide an efficient way to know when to charge a device's battery, and when to switch between the device's battery and an external power source as the device's power source. The methods and systems receive signals associated with an external information service including instructions to conduct processing, access thresholds for a plurality of power rates, obtain information about when different power rates are in effect and, after determining a charge level associated with a battery, compare the threshold of the current power rate to the device's battery's charge level. Based on such a comparison, the methods and systems can determine whether the battery should be charged and whether the device's battery or an external power source should be used as the device's power source.
US10170918B2	Electronic device wireless charging system An electronic device. The electronic device may include a battery, and a charging system in electronic communication with the battery. The charging system may be configured to charge at least a partially-depleted battery to a threshold charge value, discontinue the charging in response to the battery being charged to the threshold charge value, and monitor the function of the electronic device to detect at least one of an anticipated event, and an unanticipated event of the electronic device. Additionally the charging system may be configured to recharge the battery in response to detecting one of: the anticipated event occurring a predetermined time subsequent to the recharging of the battery, or the unanticipated event occurring immediately before the recharging of the battery.
US10170917B1	Systems and methods for managing and controlling a wireless power network by establishing time intervals during which receivers communicate with a transmitter The embodiments described herein include a transmitter that transmits a power transmission signal (e.g., radio frequency (RF) signal waves) to create a three-dimensional pocket of energy. At least one receiver can be connected to or integrated into electronic devices and receive power from the pocket of energy. A wireless power network may include a plurality of wireless power transmitters each with an embedded wireless power transmitter manager, including a wireless power manager application. The wireless power network may include a plurality of client devices with wireless power receivers. Wireless power receivers may include a power receiver application configured to communicate with the wireless power manager application. The wireless power manager application may include a device database where information about the wireless power network may be stored.
US10170915B2	Energy management system, energy management method and computer program One aspect of the present invention relates to a computer program for causing a computer to operate as an energy management system for managing the operation state of electric power devices including a storage battery connected to a power grid. The program includes: a first step of acquiring static parameters used in controlling the electric power devices; and a second step of controlling the electric power devices based on the acquired static parameters. The static parameters acquired in the first step include at least five types of parameters, namely, a storage battery capacity, dischargeable power, chargeable power, discharge efficiency, and charge efficiency.
US10170914B2	Voltage source converter (VSC) control system with active damping A Voltage Source Converter control system for active damping of a resonance oscillation in the VSC includes a regular Phase-Locked Loop 2, and a slow PLL 3. The control system is arranged such that an imaginary part of the AD is obtainable from the slow PLL. The slow PLL is configured for having a closed-loop bandwidth which is less than a frequency, in a synchronous dq frame, of the resonance oscillation to be dampened.
US10170912B2	Dynamic hybrid control The present invention relates to a system and method for controlling a power plant in a marine vessel. The system comprises at least one switchboard further comprising, a plurality of power plant members including, power suppliers such as power generators and energy storage elements, at least one consumer, and a Dynamic Hybrid Control unit comprising a measurement means for monitoring predetermined power plant and vessel related parameters, and a computational means for computing and predicting power and energy requirements in the power plant for varying time spans into the future. The system utilizes said power and energy requirements for pre-planning and allocating of power and energy between said power plant members for minimizing transients, including voltage, frequency variations in the power plant and load variations on the power generators.
US10170911B1	Providing phase synchronization and harmonic harvesting Techniques are described for reducing or dampening harmonics in a power signal to be supplied to a power system. The techniques may also be used to synchronize the power signal to be supplied to the power system with the power that is currently present on the power system. The techniques operate to step down the signals to be processed, process the signals using low-current op amps, and then step the signals back up to be transmitted on a high current system. The values of the circuit components may be determined by using a solution for an accompanying transfer function.
US10170910B2	Energy baselining system including automated validation, estimation, and editing rules configuration engine An energy baselining system is provided that performs validation, estimation, and editing (VEE). The system includes a facility model processor, a post VEE readings data stores, a VEE configuration engine, and a global model module. The facility model processor is configured to employ one or more interval based energy consumption streams corresponding to a facility to develop and maintain weather-normalized baseline energy consumption data for the facility, where the weather-normalized baseline energy consumption data is derived from training data for the facility. The post VEE readings data stores is configured to provide a plurality of tagged energy consumption data sets that are each associated with a corresponding one of the one or more interval based energy consumption streams, each of the plurality of tagged energy consumption data sets comprising first groups of contiguous interval values tagged as having been validated and second groups of contiguous interval values tagged as having been edited. The VEE configuration engine is configured to read the post VEE readings data stores upon initiation of an event and, for the each of the plurality of tagged energy consumption data sets, is configured to create a plurality of anomalies having a plurality of different durations using only the first groups of contiguous interval values, and is configured to generate a plurality of estimates for the plurality of anomalies by employing a plurality of estimation techniques and, for each of the plurality of different durations, is configured to select one of the plurality of estimation techniques for subsequent employment when performing VEE of subsequent energy consumption data for the corresponding one of the one or more interval based energy consumption streams. The global model module is configured to receive the weather-normalized baseline energy consumption data and post VEE readings data, and is configured to generate and display comparisons of the weather-normalized baseline energy consumption data with the post VEE readings data.
US10170907B2	Dynamic ESD protection scheme The present disclosure relates to an electrostatic discharge (ESD) protection circuit including a dynamic field plate bias circuit, and associated methods. In some embodiments, the ESD protection circuit includes a bipolar junction transistor (BJT) based ESD protection circuit including a field plate configured to increase a breakdown voltage of the BJT based ESD protection circuit. The ESD protection circuit also includes a dynamic field plate bias circuit coupled to the field plate of the BJT based ESD protection circuit. The dynamic field plate bias circuit is configured to provide the field plate a field plate bias at transient opposite to a field plate bias at a normal operation. The transient bias reduces a trigger voltage of the BJT based ESD protection circuit and increases a shunt current of the BJT based ESD protection circuit during the ESD event. Thereby, ESD protection reliability is improved.
US10170905B2	Electronic switching and protection circuit with wakeup function An embodiment electronic circuit includes an electronic switch comprising a load path, and a control circuit configured to drive the electronic switch. The control circuit is configured to operate in one of a first operation mode and a second operation mode based at least on a level of a load current of the electronic switch. In the first operation mode the control circuit is configured to generate a first protection signal based on a current-time-characteristic of the load current and drive the electronic switch based on the first protection signal. The control circuit is configured to generate a status signal such that the status signal has a wakeup pulse when the operation mode changes from the second operation mode to the first operation mode and, after the wakeup pulse, a signal level representing a level of the load current.
US10170902B2	Extension and retraction device and method An extension and retraction device including a housing and a slip ring mounted within the housing. The slip ring includes a stator and rotor rotatably mounted therein. The rotor includes rotor leads and annular sections defined circumferentially around the rotor. Each rotor lead includes opposite ends with one end electrically connected to one of the annular sections. The stator includes a contact for each annular section in sliding electrical engagement with the annular section. Each contact includes a stator lead having one end electrically connected to the stator and another end extending out of an opening of the housing. A reel is mounted within the housing with the reel and rotor rotatable about a substantially common axis. A cord extending through another opening of the housing is retracted into the housing when the reel rotates in one direction, and the cord is extended from the housing when the cord is pulled and the reel rotates in the opposite direction.
US10170899B2	Method for connecting at least two electric cables and connection device, kit, electric machine and associated vehicle A connection device for connecting at least two electric cables to an electric machine in a vehicle includes a housing and at least two contact elements. At least two openings, each allowing the passage of one of the cables, are located in the housing wall in such a way that only one of the cables that are fed in a direction through the openings in the housing and that continue to run in a straight line in the direction inside the housing makes direct contact with precisely one of the contact elements and can be electrically connected to this contact. All the other cables can be connected to a respective element of the remaining contact elements using a respective conductor bar.
US10170891B2	AlGaInP-based semiconductor laser An aluminium gallium indium phosphide (AlGaInP)-based semiconductor laser device is provided. On a main surface of a semiconductor substrate formed of n-type GaAs (gallium arsenide), from the bottom layer, an n-type buffer layer, an n-type cladding layer formed of an AlGaInP-based semiconductor containing silicon (Si) as a dopant, an active layer, a p-type cladding layer formed of an AlGaInP-based semiconductor containing magnesium (Mg) or zinc (Zn) as a dopant, an etching stopper layer, and a p-type contact layer are formed. Here, when an Al composition ratio x of the AlGaInP-based semiconductor is taken as a composition ratio of Al and Ga defined as (AlxGa1-x)0.5In0.5P, a composition of the n-type cladding layer is expressed as (AlxnGa1-xn)0.5In0.5P (0.9
US10170885B2	Current control device and laser device A current control device supplies a current to a semiconductor laser in order to output laser light to the semiconductor laser, and includes a current commander and a supplier. The current commander outputs a command value corresponding to a current value by increasing the command value with a lapse of time until reaching a target command value corresponding to a current value for outputting the laser light with a predetermined strength. The supplier supplies a current with a size corresponding to the command value output by the current commander to the semiconductor laser.
US10170883B1	Method for direct compression of laser pulses with large temporal ratios The present architecture utilizes a Nonlinear Scattering Aperture Combiner that does not need to be optically multiplexed and then drives a Direct Compressor stage that produces a large temporal compression ratio to pump a Fast Compressor. This eliminates the need for a separate array of ATDMs, multiplexing optical elements, and, at the approximate 107 joule energy output required for ICF, reduces the number of mechanical elements and gas interfaces from the order of 103 to about 10. In addition, this provides a large reduction of the volume of the gas containment region. In order to accomplish this, a technique for transversely segmenting by color and/or polarization of the optical extraction beams of the Direct Compressor has been invented. In particular, it emphasizes the simplicity and uniqueness of design of the Direct Compressor. The Direct Compressor is unique in terms of high fluence, high temporal compression ratios, and high stage gain, leading to a very large reduction in laser costs. It may separately have many other applications than ICF.
US10170874B1	Cable assembly having a substrate with multiple passive filtering devices between two sections of the cable assembly A cable assembly includes multiple electrical cables and a filtering module. The electrical cables are arranged in a first cable section and a second cable section. Each electrical cable has a pair of signal conductors. The filtering module includes a substrate and multiple passive filtering devices mounted on the substrate. The filtering module is disposed between the first cable section and the second cable section along a length of the cable assembly and is mechanically connected to ends of the first and second cable sections. The passive filtering devices are electrically connected to the signal conductors of the electrical cables. The cable assembly is configured to be electrically connected between first and second connectors. The filtering module is configured to filter electrical signals conveyed along the electrical cables between the first and second connectors.
US10170873B2	Illuminated latch release for cable A cable connector is provided. The cable connector includes a housing with a proximal end and a distal end. The distal end is configured for insertion into a data port of a computer chassis. The proximal end is configured to receive at least one data cable. The cable connector includes a pull tab comprising an optically transparent material. The pull tab includes a body with a distal end connected to the housing and a proximal end extending past the proximal end of the housing. The pull tab includes a shank protruding from the body. The shank includes a polished surface aligned with a light output of the computer chassis when the distal end of the housing is inserted into the data port such that light from the light output enters the shank through the polished surface and is distributed through the transparent material to illuminate the pull tab.
US10170871B1	Contact element comprising a sensor An electrical contact element with an integrated sensor is provided. The contact element has a groove, at least a portion of which extends on a plug-in side of the contact element. An optical fiber is provided in the groove. The optical fiber is designed in such a way as to be suitable as a sensor for measuring the temperature or the air humidity.
US10170867B2	Electrical connector An electrical connector includes an insulation body having a base and a tongue located in a front end of the base, terminals arranged in upper and lower rows, and a middle grounding plate disposed in the base and extending to the tongue. Terminals in the upper and lower rows are arranged on upper and lower surfaces of the tongue, respectively. The middle grounding plate is located between the upper and lower rows of terminals, and having at least one first hole. An edge of each of two lateral sides of the middle grounding plate is inwardly depressed to form a first groove. The first hole is located between the two first grooves. The insulation body has a first insulation post and a second insulation post, the first insulation post protrudes into the first hole, and the second insulation post protrudes into the first grooves on the lateral sides.
US10170863B2	Electrical connector An electrical connector includes an insulative housing, a number of conductive terminals affixed to the insulative housing, a shielding shell enclosing the insulative housing; and a sealer. The insulative housing includes a base portion and a tongue portion extending forwardly from the base portion. Each conductive terminal includes a contacting portion exposed to the tongue portion. The shielding shell includes a number of locking grooves penetrating rearward and a number of tubers and each sandwiched between two locking grooves. The sealer seals a rear end of the shielding shell. The sealer includes a number of tubers corresponded with the locking grooves of the shielding shell and a number of locking grooves receiving the tubers of the shielding shell.
US10170859B2	Interface apparatus, interface unit, probe apparatus, and connection method In an interface apparatus, when a load is applied to a base member and a connector part is pushed onto an external connector, a spring contracts so that an interval between the base member and a holder is reduced. An inclined surface of a coupling member is separated from an inclined surface of the holder so that fixing of the holder by the coupling member is released and the coupling member can move freely inside a hollow section. As a result, the holder and the connector part can move freely in X-Y directions relative to the base member, and a terminal of a connector can be finely adjusted in the X-Y direction, thus being precisely aligned with the external connector.
US10170858B2	Lever-type connector A lever-type connector (10) includes a housing (20) and a lever (40) mounted on the housing (20) movably to an initial position, a first connection position and a second connection position. The lever (40) includes a deflecting portion (45) deflectable in a moving direction of the lever (40). The housing (20) includes a projecting portion (25) configured to start contacting the deflecting portion (45) halfway through a movement of the lever (40) from the initial to the first connection position and deflect the deflecting portion (45) until the second connection position is reached and a lever lock portion (24) configured to hold the lever (40) in a movable state between the first connection position and the second connection position. The lever (40) includes a receiving portion (46) configured to contact not the lever lock portion (24), but the projecting portion (25) when the second connection position is reached.
US10170857B2	Electrical connection device An electrical connection device comprises: a receptacle connector and a plug connector. The receptacle connector comprises a receptacle body, a front guide-positional limiting portion, a rear guide-positional limiting portion and a first latching member. The plug connector removably mates with the receptacle connector, and comprises a plug body and a second latching member, when the plug connector mates with the receptacle connector, the second latching member of the plug connector is latched to the first latching member of the receptacle connector and limited by the front guide-positional limiting portion, and the rear guide-positional limiting portion of the receptacle connector engages with a recessed portion of the plug connector, so that two side walls of the plug connector are respectively exposed to two side openings of the receptacle connector and generally flush with two side walls of the receptacle connector.
US10170855B2	Waterproof component having a cover with excessive displacement prevention wall A waterproof component includes a housing body, a mat seal, and a mat seal cover. The housing body includes an attachment-hole-insertion portion having a mat-seal-accommodating chamber, an abutting portion configured to abut a first peripheral surface of the attachment hole, a locking claw provided on an insertion tip side of the attachment hole insertion portion, the locking claw to he locked to a second peripheral surface of the attachment hole, and a cover locking portion provided on an insertion tip side of the attachment-hole-insertion portion. The mat seal has an electric wire press-fitting hole. The mat-seal-accommodating chamber accommodates the mat seal. The mat seal cover locks to the cover-locking portion, the mat seal cover interposes the mat seal between the mat seal cover and a bottom wall of the mat-seal-accommodating chamber. The mat seal cover includes an excessive-displacement-prevention wall, which prevents excessive elastic deformation of the locking claw.
US10170854B2	Holding frame for plug connector modules having a leaf-spring-type fastening means The disclosure relates to a holding frame, into which plug connector modules can be inserted, wherein the holding frame comprises or consists of two halves articulated to each other, a first half and a second half, wherein the holding frame has at least one locking element, wherein the locking element is formed from a flat component, which overlaps the two halves at least in some regions, wherein the locking element has at least one end locking hook and wherein one half of the holding frame has at least one cut-out, in which the locking hook of the locking element can engage, whereby the holding frame can be fixed in an open position. The halves are fixed in relation to each other at an open angular position. Such a holding frame can be conveniently fixed in an open position for fitting with suitable plug connector modules.
US10170852B2	Method for manufacturing plug-type contacts, plug-type contact and component assembly comprising at least one plug-type contact The invention relates to a press-in contact, a component assembly comprising at least one contact receptacle and a press-in contact, and a method for manufacturing a press-in contact, The method comprising producing a rough contour, in particular a punched contour, of a press-in contact, with a connecting body and two limbs which adjoin the latter and are arranged opposite each other, wherein the limbs have press-in regions and end regions which face away from the connecting body and have contact portions which face each other and are spaced apart from each other in a defined manner, and reshaping the limbs, comprising moving the end regions of the limbs toward each other by at least partial plastic deformation of at least one of the limbs, wherein the contact portions of the limbs touch in a defined manner at least in sections after being relieved of load.
US10170849B2	Connector and connector assembly with slidable latch A receptacle connector is provided with a slider and a first securing metal fitting. The slider can slide between a locking position where the slider locks a plug connector and a lock releasing position where the slider is separated from the plug connector to an outer side in a longitudinal direction such that locking of the plug connector is released. The first securing metal fitting has the hook, and the slider has the first engageable part that engages with the hook to retain the slider in a selected position.
US10170848B1	Terminal block lockout device A lockout device configured to lockout a terminal block. The lockout device includes a pair of sections rotatably coupled to one another in which each of the sections has an upper portion including a corresponding lockout opening and a lower portion for selective reception into the space of an opened terminal block. The sections are rotatable between an opened and closed position. In the opened position, the upper portions are misaligned and the lower portions are aligned to permit at least a portion of the lower portions to be inserted into an opening in an opened terminal block. In the closed position, the lockout openings of the upper portions are aligned to accommodate reception of a lock in the lockout openings to prevent movement away from the closed position and the lower portions are misaligned to prevent removal of the lower portions from the opening in the terminal block.
US10170845B2	Plug connector A plug connector includes an insulating body, two power terminals arranged on the insulating body, and a cable having at least two power wires. A mating portion is provided at a front end of the insulating body. The mating portion is recessed with a mating slot from front to back. The mating slot has a first width in a left-right direction. Each power terminal has at least one contacting portion protruding and extending into the mating slot. The two power terminals are conducted and are provided with a second soldering portion. The second soldering portion has a second width in the left-right direction, which is greater than one third of the first width. The at least two power wires are connected to the second soldering portion.
US10170843B2	Parabolic deployable antenna A deployable antenna is described. The antenna comprises a mesh attached to foldable ribs, a hub and a sub-reflector. The antenna can be stowed in a tight space for launching in space, and later deployed by extending out of its container. The antenna is designed to work in the Ka band or other bands and can increase data rates and function as a radio antenna.
US10170841B1	Dual mode slotted monopole antenna A dual mode antenna can be joined to an antenna feed. The antenna includes a slotted cylinder radiator that can be connected to the first conductor of the antenna feed and an electrically conductive ground plane that can be connected to the second conductor. The radiator axially extends perpendicularly from the ground plane and is electrically insulated therefrom. The first conductor can be joined to the radiator near one side of the slot. A reactive load is joined between the ground plane and the radiator near an opposite side of the slot. The reactive load impedes lower frequencies from the ground plane to the radiator. This allows the radiator to function as a monopole at lower frequencies and a slotted cylinder at higher frequencies.
US10170840B2	Apparatus and methods for sending or receiving electromagnetic signals Aspects of the subject disclosure may include, a generator that facilitates generation of an electromagnetic wave, a core, and a waveguide that facilitates guiding the electromagnetic wave towards the core to induce a second electromagnetic wave that propagates along the core. The core and/or the waveguide can be configured to reduce radiation loss of the second electromagnetic wave, propagation loss of the second electromagnetic wave, or a combination thereof. Other embodiments are disclosed.
US10170838B2	Antenna-in-package structures with broadside and end-fire radiations Package structures are provided having antenna-in-packages that are integrated with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter wave (mmWave) frequency range with radiation in broadside and end-fire directions.
US10170832B2	Transceiver for a phased array antenna A transceiver for a phased array antenna comprises a laser light source arranged to provide an optical spectrum comprising a plurality of spaced wavelengths. The transceiver further comprises a dispersion unit arranged to introduce a delay to a plurality of spectral components of the optical spectrum associated with the spaced wavelengths. The delay is dependent on the wavelength of the spectral components of the optical spectrum. The transceiver further comprises a first optical filter configured to select a plurality of spectral components received from the dispersion unit. The transceiver further comprises a first heterodyning device configured to generate a signal for transmission by the phased array antenna by heterodyning the selected spectral components associated with different ones of the spaced wavelengths of the laser light source. The transceiver is configured to receive signals from the phased array antenna. The transceiver further comprises a modulator configured to modulate spaced wavelengths from the said laser light source with the received signals. The spaced wavelengths are associated with the spectral components used to generate the signal for transmission. The transceiver further comprises a second heterodyning device configured to heterodyne spectral components associated with different ones of the spaced wavelengths of the laser light source.
US10170831B2	Systems, methods and devices for mechanically producing patterns of electromagnetic energy A system for generating, forming and receiving electromagnetic transmissions according to a dynamically selectable electromagnetic pattern, beam pattern or beam form can use a selectably altered backplane structure. A spatially dependent pattern of amplitudes and/or phases can be formed by selecting a state of the selectably altered backplane structure from a set of states. The altered backplane structure can include a movable mechanical structure that causes a set of patterns of spatially dependent amplitudes of electromagnetic energy depending on a position of the structure. A beam pattern from a set of beam patterns can be selected by selecting a state (e.g., the position) of the backplane structure that creates a set of spatially dependent amplitudes of electromagnetic energy.
US10170823B2	Embedded antenna device for GNSS applications An antenna assembly includes a GNSS stacked patch antenna located in a metal cavity and a matching parasitic element, the matching parasitic element includes a set of conductors not connected to the antenna. Each conductor has an external end and internal end, the external ends being conductively coupled to the housing of the cavity. The conductors of the matching parasitic elements can be radially arranged. External ends of conductors are additionally connected to each other by a ring-shaped conductor. Internal ends of conductors can be connected to capacitive elements, which can be discrete capacitors and/or segments of conductors.
US10170821B2	Self-configuring communication node arrangement The present invention relates to a communication node arrangement comprising at least two antenna units. Each antenna unit comprises at least one signal port and at least one antenna element, where each signal port is connected to at least one corresponding antenna element. Each antenna unit comprises at least one sensor unit arranged to sense its orientation relative a predetermined reference extension. The communication node arrangement comprises at least one control unit and is arranged to feed a respective test signal into each of at least two different signal ports. For each such test signal, the communication node arrangement is arranged to receive the test signal via at least one other signal port. The communication node arrangement being arranged to determine relative positions of said antenna units based on the received test signals, and to determine relative orientations of said antenna units based on data received from the sensor units.
US10170815B2	Filter and method of designing same A filter includes: a first resonator and a second resonator; a first strip-shaped conductor which is provided on a dielectric layer provided on a surface of a first wide wall of the first resonator; a first conductor pin which is electrically connected to a first end of the first strip-shaped conductor; a second strip-shaped conductor which is provided on a dielectric layer provided on a surface of a first wide wall of the second resonator; and a second conductor pin which is electrically connected to a first end of the second strip-shaped conductor.
US10170814B2	Four-mode defected ground structure filter Disclosed is a four-mode defected ground structure filter, including a four-mode defected ground structure resonator and two microstrip feed lines. The four-mode defected ground structure resonator comprises a metal dielectric substrate and a defected ground unit which is etched in one surface of the metal dielectric substrate; the microstrip feed lines are arranged at another surface of the metal dielectric substrate; shape of the defected ground unit is axially symmetric about a first central axis of the defected ground unit, and is axially symmetric about a second central axis of the defected ground unit; the first defected ground unit is provided with H-shape or quasi H-shape, the second defected ground unit is provided with L-shape, quasi L-shape, U-shape or quasi U-shape.
US10170811B2	Thermoelectric-based thermal management of electrical devices Disclosed embodiments include thermoelectric-based thermal management systems and methods configured to heat and/or cool an electrical device. Thermal management systems can include at least one electrical conductor in electrical and thermal communication with a temperature-sensitive region of the electrical device and at least one thermoelectric device in thermal communication with the at least one electrical conductor. Electric power can be directed to the thermoelectric device by the same electrical conductor or an external power supply, causing the thermoelectric device to provide controlled heating and/or cooling to the electrical device via the at least one electrical conductor.
US10170809B2	Energy storage enclosure An energy storage enclosure arrangement is provided for accommodating a storage unit comprising an energy storage cell stacked with a cooling plate in a longitudinal direction, the cooling plate being in thermal contact with the energy storage cell. The arrangement includes an energy storage enclosure comprising three wall members forming an U-shape and having an extension in a longitudinal direction, and means for compressing the enclosure arranged to apply a force on the enclosure and the storage unit in the longitudinal direction. The enclosure is resilient in the longitudinal direction, such that when a force is applied in the longitudinal direction the enclosure is compressed, and a contact pressure between the cooling plate and the energy storage cell is limited by the resilient enclosure.
US10170808B2	Battery pack A battery pack including a plate-shaped cooling plate; a plurality of battery modules, the plurality of battery modules being mounted on a top surface of the cooling plate; and at least one bracket on one lengthwise side of the cooling plate.
US10170807B2	Secondary battery cooling system A secondary battery cooling system includes a temperature sensor for detecting a temperature of a battery, an electrically operated cooling fan, and a control unit. The control unit determines whether or not cooling of the battery is necessary based on the battery temperature detected by the temperature sensor and a heat value of the battery estimated when an ignition switch is turned off, and, if the battery temperature is lower than a predetermined temperature and the estimated battery heat value exceeds a predetermined value in the determination, extends a length of time from the determination to a start of driving of the electrically operated cooling fan compared to when the heat value does not exceed the predetermined value, and cools the battery while the ignition switch of the vehicle is turned off. The battery can be thus cooled efficiently while charge and discharge is suspended.
US10170806B2	Battery cooling system A battery cooling system includes: a housing in which an inlet duct from which air is introduced and an outlet duct through which the air is discharged are mounted; a first battery mounted in the housing and disposed between the inlet duct and the outlet duct; and a low voltage battery disposed between the first battery and the inlet duct.
US10170805B2	Electricity storage module An electricity storage module that includes a power storage element group obtained by stacking a plurality of power storage elements each having a lead terminal that protrudes from a side edge; and holding members that are attached to the side edges at which the lead terminals are provided and that hold the power storage elements, the holding members being provided with a fuse mounting portion for mounting a fuse that is to be electrically connected to the lead terminal.
US10170803B2	Controller for lithium ion secondary battery that sets and modifies a lower limit state of charge, and vehicle A controller for a lithium ion secondary battery, includes an electronic control unit configured to: detect an SOC of a lithium ion secondary battery that is a controlled object; set an upper limit SOC and lower limit SOC of a range of use of the lithium ion secondary battery on the basis of the SOC of the lithium ion secondary battery; record a charge history and discharge history of the lithium ion secondary battery; determine whether the lithium ion secondary battery is in an excessive charging state or an excessive discharging state on the basis of the charge history and the discharge history; and raise the lower limit SOC when the lithium ion secondary battery is in the excessive charging state or lower the upper limit SOC when the lithium ion secondary battery is in the excessive discharging state.
US10170802B2	Battery pack having PCM case Disclosed herein is a battery pack configured to have a structure including a plate-shaped battery cell having electrode terminals formed at one side thereof including a sealed surplus part and a protection circuit module (PCM) mounted at the sealed surplus part, wherein each of the electrode terminals of the battery cell is made of a plate-shaped conductive member, the PCM includes a protection circuit board (PCB), a safety element electrically connected between one of the electrode terminals formed at one side of the battery cell and the PCB or loaded on the PCB, an external input and output terminal electrically connected to a protection circuit of the PCB, and an electrically insulative module case in which the PCB and the safety element are mounted in a state in which the external input and output terminal extends outside, the module case is configured to have a structure in which two outer surfaces of the module case are open outward to form a first open surface and a second open surface, the module case is provided at an interior thereof with a PCB receiving part, and the PCM is loaded on the sealed surplus part of the battery cell in a state in which the PCM is received in the module case such that the PCM is electrically connected to the electrode terminals of the battery cell.
US10170799B2	Multi-element liquid metal battery An electrochemical cell includes a negative electrode having at least two active metals, a positive electrode having a metal or alloy, and an electrolyte having a cation of each of the active metals. The electrolyte defines first and second interfaces with the positive electrode being in contact with the first interface and the negative electrode being in contact with the second interface. The electrolyte is configured to allow the cations of the active metals to be transferred from the negative electrode to the positive electrode during discharging and to be transferred from the positive electrode to the negative electrode during charging. The electrolyte exists as a liquid phase and the negative electrode and the positive electrode exist as liquid or partially liquid phases at operating temperatures of the electrochemical cell.
US10170797B2	Nonaqueous electrolyte secondary battery A lithium ion battery has a flat wound electrode assembly, a nonaqueous electrolyte, and a battery case. The nonaqueous electrolyte contains an electrically insulating inorganic aggregate and is formed of an impregnating electrolyte impregnated into the flat wound electrode assembly and a surplus electrolyte not impregnated into the flat wound electrode assembly. Letting the flat wound electrode assembly be divided into a planar region where the electrode surfaces are planar surfaces and a lower wound curved region which is positioned vertically downward from the planar region and where the electrode surfaces are curved, a boundary plane that includes the boundary between the planar region and the lower wound curved region, the inorganic aggregate amount MO included in a space which is below the boundary plane and the inorganic aggregate amount MI included in the impregnating electrolyte within the flat wound electrode assembly satisfy the relationship MO>MI.
US10170796B2	Lithium secondary battery of improved rate capability with cathode containing nickel manganese complex oxide for high-voltage applications Disclosed is a lithium secondary battery with improved rate characteristics. More particularly, disclosed is a lithium secondary battery including a cathode, an anode, a separator disposed between the cathode and the anode, and an electrolyte, wherein the electrolyte includes a mixed solvent of a cyclic carbonate-based material and a propionate-based material, the cathode includes a lithium manganese composite oxide represented by Formula 1 below as a cathode active material, and the anode includes a lithium metal oxide represented by Formula 2 below as an anode active material: LixMyMn2-yO4-zAz (1) wherein 0.9≤x≤1.2, 0
US10170795B2	Electrolyte for high efficiency cycling of sodium metal and rechargeable sodium-based batteries comprising the electrolyte Embodiments of a non-aqueous electrolyte for a rechargeable sodium (Na)-based battery comprise a sodium salt and a nonaqueous solvent, the electrolyte having a sodium salt concentration ≥2.5 M or a solvent-sodium salt mole ratio ≤4:1. Na-based rechargeable batteries including the electrolyte exhibit both high cycling stability and high coulombic efficiency (CE). Some embodiments of the disclosed batteries attain a CE≥80% within 10-30 charge-discharge cycles and maintain a CE≥80% for at least 100 charge-discharge cycles. In certain embodiments, the battery is an anode-free battery in the as-assembled initial state.
US10170781B2	Shutdown and storage method for fuel cell system at below freezing temperatures Improved methods are disclosed for shutting down and storing a fuel cell system, particularly for below freezing temperature conditions. The methods comprise stopping power production from the fuel cell stack, monitoring the amount of energy remaining in an energy supply, monitoring the stack temperature, and repeatedly performing a predetermined warming operation if the stack temperature falls to a normal threshold temperature and if the amount of energy remaining exceeds a certain minimum amount. In the improved methods, when the amount of remaining energy is less than or equal to the minimum amount, a final warming operation is performed that differs from the predetermined warming operation.
US10170776B2	Fuel cell module A fuel cell module includes combustion gas channel members connected to a combustor and extending upward along the fuel cell stack. The combustion gas channel members have combustion gas channels, and combustion gas ejection holes. A combustion gas produced in the combustor flows through the combustion gas channels upward, and the combustion gas ejection holes are connected to the combustion gas channels for releasing the combustion gas toward side surfaces of the fuel cell stack.
US10170774B2	Flow-guiding plate for a fuel cell A flow-guiding plate for a fuel cell, including a conductive sheet including a relief: defining alternating flow channels on first and second faces, two successive channels on the first face being separated by walls; defining first and second access holes at ends of each of the flow channels on the second face and of a first group of flow channels on the first face; defining a flow restriction in each flow channel of a second group of flow channels on the first face, the cross-section of the flow restrictions being smaller than the cross-section of the access holes to the flow channels of the first group, the first face including alternating flow channels of the first group and alternating flow channels of the second group.
US10170772B2	Fluid flow plate for a fuel cell A fluid flow plate for an electrochemical fuel cell assembly comprises a first plurality of fluid flow channels extending across an area of the flow plate to define a flow field of the fluid flow plate. An array of first fluid transfer points is disposed along an edge of the flow field for communicating fluid into to or out of the fluid flow channels. A gallery has a first peripheral edge portion bounded by the array of first fluid transfer points and at least two second peripheral edge portions each bounded by an array of second fluid transfer points disposed along fluid access edges of the fluid flow plate. The at least two second peripheral edge portions are disposed at oblique angles to the first peripheral edge portion such that the total length of the array of second fluid transfer points is at least as long as, and preferably longer than, the length of the array of first fluid transfer points. Disposing the at least two second peripheral edge portions at oblique angles to the first peripheral edge portion enables the lengths of the second peripheral edge portions of each gallery to be increased compared to the length of the first fluid transfer points (i.e. width of the active flow field area) which optimizes fluid distribution into the channels of the flow plate.
US10170770B2	N-doped porous carbon electrocatalyst and process for preparation thereof The present invention relates to an efficient, non-metal, N-doped porous carbon electrocatalyst for oxygen reduction reaction and a process for the preparation of using g-C3N4 as a nitrogen precursor, metal organic frameworks (MOF) as a carbon template having high specific surface area, large number of active sites and large pore volume.
US10170768B2	Grid assembly for a plate-shaped battery electrode of an electrochemical accumulator battery The invention relates to a grid arrangement for a plate-shaped battery electrode of an electrochemical accumulator having a frame and a grid arranged thereon, wherein the frame comprises at least one upper frame element having a connecting lug of the battery electrode disposed on its side facing away from the grid, and wherein the grid is at least formed by horizontal bars, which are bars extending substantially horizontally, and vertical bars, which are bars extending substantially vertically, wherein at least some of the vertical bars are arranged at different angles to one another in the shape of a fan. The invention further relates to an accumulator.
US10170767B2	Energy storage device Provided is an energy storage device which includes: an electrode assembly including a positive electrode and a negative electrode respectively including a non-coated region having a metal foil; current collectors each having a support portion which is made to overlap with the non-coated region; and opposedly facing supports each configured to clamp the non-coated region cooperatively with the support portion, wherein at least one of the non-coated region, the support portion and the opposedly facing support includes a conductive layer having non-oxidizing property or hardly-oxidizable property, the conductive layer covering at least one surface out of a surface of the non-coated region facing the support portion, a surface of the non-coated region facing the opposedly facing support, a surface of the support portion facing the non-coated region, and a surface of the opposedly facing support facing the non-coated region.
US10170766B2	Cathode for lithium-sulfur battery and manufacturing method therefor The present application relates to a cathode for a lithium-sulfur battery and a method of preparing the same. More specifically, the cathode for a lithium-sulfur battery according to an exemplary embodiment of the present application includes: a cathode active part including a sulfur-carbon composite; and a cathode coating layer including an amphiphilic polymer provided on at least one portion of a surface of the cathode active part and including a hydrophilic portion and a hydrophobic portion.
US10170764B2	Method for manufacturing ultra small particle, positive electrode active material of second battery using the method for manufacturing ultra small particle and method for manufacturing the same, and secondary battery using the positive electrode active material and method for manufacturing the same An object is to form a positive electrode active material having small and highly uniform particles by a simple process. A template is formed by forming holes in the template by a nanoimprinting method, and the template is filled with a gel-like LiFePO4 material, whereby small-sized LiFePO4 particles are formed and are used as the positive electrode active material of a secondary battery. The particle size can be reduced to less than 50 nm. Further, when the LiFePO4 particles are sintered, the template may be burned down. By making the particle size of the positive electrode active material smaller than the conventional one, a positive electrode that lithium is injected into and extracted from easily can be manufactured.
US10170763B2	Lithium metal oxide particles coated with a mixture of the elements of the core material and one or more metal oxides A lithium metal oxide powder for use as a cathode material in a rechargeable battery, consisting of a core material and a surface layer, the core having a layered crystal structure consisting of the elements Li, a metal M and oxygen, wherein the Li content is stoichiometrically controlled, wherein the metal M has the formula M=Co1-aM′a, with 0≤a≤0.05, wherein M′ is either one or more metals of the group consisting of Al, Ga and B; and the surface layer consisting of a mixture of the elements of the core material and inorganic N-based oxides, wherein N is either one or more metals of the group consisting of Mg, Ti, Fe, Cu, Ca, Ba, Y, Sn, Sb, Na, Zn, Zr and Si.
US10170762B2	Lithium metal oxides with multiple phases and stable high energy electrochemical cycling Electrochemically active material comprising a lithium metal oxide composition approximately represented by the formula Li1+bComNinMnpO(2), where −0.2≤b≤0.2, 0.2≤m≤0.45, 0.055≤n≤0.24, 0.385≤p≤0.72, and m+n+p is approximately 1 has been synthesized and assembled to batteries. The electrochemical performance of the batteries was evaluated. The lithium metal oxide composition in general comprises a first layered phase, a second layered phase and a spinel phase. A layered Li2MnO3 phase is at least partially activated upon charging to 4.5V. In some embodiments, the material further comprises a stabilization coating covering the lithium metal oxide composition.
US10170759B2	Metal oxides from acidic solutions Forming a metal oxide by treating an acidic solution containing a metal to yield a precursor in the form of a semi-liquid, semi-solid or solid, and treating the precursor to yield a product including the metal oxide. An organic or inorganic component may be combined with the precursor to yield a second semi-liquid, semi-solid or solid. The product may be treated to yield a new material. In some cases, the metal oxide has an empirical formula HxM2A1y-A2z, where M represents a transition metal or any combination of transition metals in Groups 3-12; A1 is a first oxyanion; A2 is a second oxyanion; 0≤x≤3; 0≤y≤3; 0≤z≤3; and y+z>0.
US10170758B2	Process for the preparation of lithium titanium spinel and its use A composite oxide with x wt.—parts Li2TiO3, preferably in its cubic modification of space group Fm-3m, y wt.—parts TiO2, z wt.—parts of Li2CO3 or LiOH, u wt.—parts of a carbon source and optionally v wt.—parts of a transition or main group metal compound and/or a sulphur containing compound, wherein x is between 2 and 3, y is between 3 and 4, z is between 0.001 and 1, u is between 0.05 and 1 and 0≤v<0.1 and the metal of the transition or main group metal compound is selected from Al, Mg, Ga, Fe, Co, Sc, Y, Mn, Ni, Cr, V or mixtures thereof. Also, a process for the preparation of a composition of non-doped and doped lithium titanate Li4Ti5O12, including secondary agglomerates of primary particles, using the composite oxide and its use as anode material in secondary lithium-ion batteries.
US10170754B2	Silicon monoxide composite negative electrode material used for lithium ion battery, the preparation method thereof and a lithium ion battery The present invention relates to a silicon monoxide composite negative electrode material, which comprises silicon monoxide substrate. Nano-Silicon material uniformly deposited on the silicon monoxide substrate and nanoscale conductive material coating layer on the surface of the silicon monoxide/Nano-Silicon. The preparation method of the silicon monoxide composite negative electrode material includes Nano-Silicon chemistry vapor deposition, nanoscale conductive material coating modification, screening and demagnetizing. The silicon monoxide composite negative electrode material has properties of high specific capacity (>1600 mAh/g), high charge-discharge efficiency of the first cycle (>80%) and high conductivity.
US10170750B2	Lithium-conducting sulfur compound cathode for lithium-sulfur batteries A lithium sulfur cell has a cathode including Li3PS4+n (0
US10170749B2	Alkali metal battery having an integral 3D graphene-carbon-metal hybrid foam-based electrode Provided is a lithium or sodium metal battery having an anode, a cathode, and a porous separator and/or an electrolyte, wherein the anode contains an integral 3D graphene-carbon hybrid foam composed of multiple pores, pore walls, and a lithium-attracting metal residing in the pores; wherein the metal is selected from Au, Ag, Mg, Zn, Ti, Na, K, Al, Fe, Mn, Co, Ni, Sn, V, Cr, or an alloy thereof and is in an amount of 0.1% to 50% of the total hybrid foam weight or volume, and the pore walls contain single-layer or few-layer graphene sheets chemically bonded by a carbon material having a carbon material-to-graphene weight ratio from 1/200 to 1/2, wherein graphene sheets contain a pristine graphene or non-pristine graphene selected from graphene oxide, reduced graphene oxide, graphene fluoride, graphene chloride, graphene bromide, graphene iodide, hydrogenated graphene, nitrogenated graphene, doped graphene, chemically functionalized graphene, or a combination thereof.
US10170745B2	Secondary battery A secondary battery includes an electrode assembly including first and second non-coating portions; a first current collector connected to the first non-coating portion, and a second current collector connected to the second non-coating portion; and a cap assembly including a first terminal connection member connected to a portion of the first current collector, and a second terminal connection member connected to portion of the second current collector, and a terminal connection member of the first and second terminal connection members includes a fuse.
US10170739B2	Pin mount for battery module A battery pack housing forms a container that receives battery modules. The battery pack housing includes container portion and a cover that closes an open end of the container portion. The container portion includes a base, sidewalls that surround the base, and parallel rails that protrude from the base inner surface. The rails have longitudinally-spaced slots that open facing the cover. In addition, an inner surface of the cover portion includes parallel rails having longitudinally spaced slots that open facing the base. The slots are configured to receive and retain pins provided on side surfaces of the battery module housing. The cooperation between the pins of the battery module housing and the slots of the container portion and cover portion permit modules to be easily and securely located within the battery pack housing, and to be quickly removed from the battery pack housing during maintenance.
US10170737B2	Battery holder, battery unit, and battery component including battery holder and battery unit A battery holder includes a first base, a first holding portion and a second holding portion. The first base is opposed to a first end of the battery unit in the state in which the battery unit is located at a first holding position. The first holding portion is movably arranged on the first base between a first position, where the first holding portion contacts a held portion of the battery unit to hold the battery unit at the first holding position, and a second position, where the first holding portion is separated from the held portion. The second holding portion is arranged on the first base at a downstream side of the first holding portion in a removal direction of the battery unit from the battery holder to hold the battery unit at a second holding position that is located at a downstream side of the first holding position.
US10170734B2	Top cover of power battery and power battery The present application provides a top cover of a power battery, including a top cover plate, a first electrode unit and a second electrode unit, the top cover plate is provided with a deformable plate connecting hole and an insulation piece accommodating portion, the first electrode unit includes a deformable plate, a conductive plate and a first insulation piece, the deformable plate seals the deformable plate connecting hole, the conductive plate is located underneath the deformable plate, the first insulation piece includes a top cover plate connecting portion and a conductive plate connecting portion, the top cover plate connecting portion extends into the insulation piece accommodating portion and is fixed thereof, the conductive plate is insulated and fixed with the top cover plate through the conductive plate connecting portion. The present application further provides a power battery, including the top cover of the power battery.
US10170733B2	Flexible structure with strain gauge, application to electrochemical lithium-ion batteries in a flexible packaging The present invention relates to a flexible structure (6) comprising a strain gauge (7) that is elongate along a longitudinal axis X1, and intended to measure the deformation of the flexible structure in a direction X parallel to the axis X1, the strain-gauge support (71) being bonded to the flexible structure only via the lateral ends (75, 76) thereof. One particularly targeted application is the bonding of strain tool gauges to the packaging of a flexible lithium battery, such as an Li-ion battery.
US10170729B2	Electrically conductive polymers An electrically conductive film suited to use as a transparent anode, a method of forming the film, and an electronic device comprising the film are disclosed. The device includes a conductive polymer electrode defining first and second surfaces and having an electrical conductivity gradient between the first and second surfaces. A second electrode is spaced from the second surface by at least one organic material layer, such as a light emitting layer.
US10170727B2	Display device An organic electroluminescent device with a touch sensor including: a first substrate; a second substrate arranged opposite to the first substrate; an organic EL element layer arranged above the first substrate; a first sealing film arranged toward the second substrate of the organic EL element layer, covering the organic EL element layer, and including a first inorganic layer; plural first detection electrodes extending in one direction, and arranged in parallel toward the second substrate of the first sealing film; a second sealing film arranged toward the second substrate of the first detection electrodes, and including a second inorganic layer; plural second detection electrodes extending in another direction different from the one direction, and arranged in parallel toward the second substrate of the second sealing film; and a touch sensor control unit controlling a potential to detect a touch with a display surface.
US10170720B2	Organic monolayer passivation and silicon heterojunction photovoltaic devices using the same A method for inorganic surface passivation in a photovoltaic device includes etching a native oxide over an inorganic substrate, the inorganic substrate having a surface; and forming an organic monolayer on the surface of the inorganic substrate to form a heterojunction, the organic monolayer having the following formula: ˜X—Y, wherein X is an oxygen or a sulfur; Y is an alkyl chain, an alkenyl chain, or an alkynyl chain; and X covalently bonds to the surface of the inorganic substrate by a covalent bond.
US10170717B2	Thin film transistor and manufacturing method thereof, display substrate, and display apparatus Provided is a thin film transistor and a manufacturing method thereof, a display substrate and a display apparatus. The thin film transistor includes a source electrode pattern and a drain electrode pattern arranged on a same layer and a heat dissipation layer arranged between the source electrode pattern and the drain electrode pattern.
US10170712B2	Articles having flexible substrates Provided in one example is an article. The article includes a substrate. The article includes a first layer disposed over at least a portion of the substrate, the first layer comprising a reflector. The article includes a second layer disposed over at least a portion of the first layer, the second layer comprising an electrode. The article includes a third layer disposed over at least a portion of the second layer, the third layer comprising a polymer and a light source. The article includes a fourth layer disposed over at least a portion of the third layer, the fourth layer comprising a diffusor. The article includes a fifth layer disposed over at least a portion of the fourth layer, the fifth layer comprising at least one of a photochromic material and a thermochromic material.
US10170709B2	Platinum complex having carbene fragment, OLED using the same, and nitrogen-containing heterocyclic bidentate chelate having carbene unit A platinum complex having at least one carbene fragment, and an OLED using the same are described. The platinum complex contains a platinum cation, a zero-valent nitrogen-containing heterocyclic bidentate chelate, and a dianionic nitrogen-containing heterocyclic bidentate chelate. The zero-valent nitrogen-containing heterocyclic bidentate chelate has at least one carbene unit coordinating to platinum. The dianionic nitrogen-containing heterocyclic bidentate chelate has at least one electron-withdrawing substituent, and forms two N—Pt bonds, or one N—Pt bond and one C—Pt bond, with the central platinum cation.
US10170707B2	Compound, material for organic electroluminescence element, organic electroluminescence element, and electronic device A compound represented by formula (1): wherein R1 to R6, R7 to R10, R11 to R14, R15 to R18, L1, L2, Ar1, and Ar2 are as defined in the description realizes an organic electroluminescence device with long lifetime.
US10170701B2	Controlled deposition of materials using a differential pressure regime Methods and devices for controlling pressures in microenvironments between a deposition apparatus and a substrate are provided. Each microenvironment is associated with an aperture of the deposition apparatus which can allow for control of the microenvironment.
US10170699B2	RRAM cell bottom electrode formation The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a reduced leakage current, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode layer over a lower metal interconnect layer. A dielectric data storage layer having a variable resistance is formed onto the bottom electrode layer in-situ with forming at least a part of the bottom electrode layer. A top electrode layer is formed over the dielectric data storage layer. By forming the dielectric data storage layer in-situ with forming at least a part of the bottom electrode layer, leakage current, leakage current distribution and device yield of the RRAM cell are improved.
US10170695B2	Magnetic tunnel junction device utilizing lattice strain A magnetic tunnel junction device includes a Heusler alloy layer that has not only a perpendicular magnetic anisotropy characteristic, but also a half-metallicity characteristic. For example, the magnetic tunnel junction device includes at least one Heusler alloy layer and a barrier layer. The barrier layer is in contact with the Heusler alloy layer and has an insulating property. A compressive strain is exerted on the Heusler alloy layer in a direction parallel to an interface between the Heusler alloy layer and the barrier layer.
US10170694B1	Magnetic memory A magnetic memory of an embodiment includes: a first conductive layer, which is nonmagnetic and includes at least a first element, the first conductive layer including a first to fifth regions; a first magnetoresistive element disposed corresponding to the third region and including a first magnetic layer, a second magnetic layer including at least a second element, a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, a second nonmagnetic layer disposed between the second magnetic layer and the first nonmagnetic layer and including at least a third element, and a third magnetic layer disposed between the second nonmagnetic layer and the first nonmagnetic layer; a second conductive layer disposed corresponding to the second region and including at least the first to third elements; and a third conductive layer disposed corresponding to the fourth region, and including at least the first to third elements.
US10170692B2	Semiconductor device with integrated magnetic tunnel junction The disclosed technology generally relates to semiconductor devices and more particularly to semiconductor devices having an integrated magnetic tunnel junction (MTJ), and relates to methods of fabricating the semiconductor devices. In one aspect, a semiconductor device includes a stack including successive layers of: a first metallization layer, a first dielectric layer, a second metallization layer, a second dielectric layer, and a third metallization layer. A magnetic tunnel junction (MTJ) device is formed in the first dielectric layer and in the second metallization layer and electrically connected to a first metallization layer and the third metallization layer.
US10170691B2	Electronic device and method for fabricating the same Provided is a method for fabricating an electronic device including a variable resistance element which includes a free layer formed over a substrate and having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, a tunnel barrier layer interposed between the free layer and the pinned layer, and a magnetic correction layer suitable for reducing the influence of a stray field generated by the pinned layer. The method may include: cooling the substrate; and forming the magnetic correction layer over the cooled substrate.
US10170690B2	Hybrid-fl with edge-modified coupling A magnetic memory device and a method to make the device is disclosed. The magnetic memory device comprises a free magnetic layer that includes a hard magnetic material layer, a soft magnetic material layer and a coupling layer that is between the hard magnetic material layer and the soft magnetic material layer. The coupling layer comprises a magnetic material that has oxidized edges. In one embodiment, the magnetic material of the coupling layer comprises a Heusler alloy or a silicon-based magnetic material. A predetermined amount of the coupling layer is oxidized to controllably reduce the switching current Jc0 of the free magnetic layer to be about half of the switching current if the coupling layer comprised substantially all magnetic material and no oxide.
US10170689B2	Semiconductor device The present invention provides a magnetoresistive effect element which performs writing by a novel method. In a state in which a current does not flow in a magnetization free layer MFR, the magnetization free layer MFR has a magnetic wall MW1 on the side of a magnetization fixed layer MFX1. A magnetic wall MW2 is moved to the magnetic wall MW1 side by causing current to flow from the formed side of the magnetic wall MW1. Thus, an electrical resistance RMTJ between a reference layer REF and the magnetization free layer MFR changes from a low state to a high state.
US10170685B2	Piezoelectric MEMS microphone A microphone including a casing having a front wall, a back wall, and a side wall joining the front wall to the back wall, a transducer mounted to the front wall, the transducer including a substrate and a transducing element, the transducing element having a transducer acoustic compliance dependent on the transducing element dimensions, a back cavity cooperatively defined between the back wall, the side wall, and the transducer, the back cavity having a back cavity acoustic compliance. The transducing element is dimensioned such that the transducing element length matches a predetermined resonant frequency and the transducing element width, thickness, and elasticity produces a transducer acoustic compliance within a given range of the back cavity acoustic compliance.
US10170684B2	Tuning fork type crystal blank, tuning fork type crystal element, and crystal device A tuning fork type crystal blank includes a base part, a pair of vibrating parts which extend from the base part parallel with each other, an auxiliary part including a support part located on one side of an alignment direction of the pair of vibrating parts relative to the base part and pair of vibrating parts and extending parallel with the pair of vibrating parts, and a holding part which is located on the opposite side to the pair of vibrating parts relative to the base part and connects the base part and the support part. When viewed in a planar view direction perpendicular to the alignment direction and to the direction in which the pair of vibrating parts extend, cut away part is formed in a side surface of the auxiliary part.
US10170679B2	Josephson junction with spacer Various embodiments are directed toward a circuit configured to act as a Josephson junction. The circuit includes: a junction stack on a substrate, the junction stack including a portion of a first superconductor electrode, with an interface layer on a top side of the first superconductor electrode and configured to act as a tunneling barrier for the junction stack. The circuit may also comprise a first portion of a second superconductor electrode on top of the interface layer. A spacer may separate the portion of the first superconductor electrode in the junction stack from a second portion of the second superconductor electrode outside the junction stack where the second superconductor electrode overlays the first superconductor electrode, the second portion of the second superconductor electrode contacting the substrate on at least one side of the spacer.
US10170677B2	Thermoelectric generator system A thermoelectric generator system according to the present disclosure includes first and second thermoelectric generator units, each including tubular thermoelectric generators. Each of the generators has a flow path defined by its inner peripheral surface, and generates electromotive force in an axial direction thereof based on a temperature difference between its inner and outer peripheral surfaces. Each unit further includes: a container housing the generators inside; and electrically conductive members providing electrical interconnection for the generators. The container has fluid inlet and outlet ports through which a fluid flows inside, and openings into which the generators are inserted. A buffer vessel is arranged between the first and second units, and has a first opening communicating with the flow paths of the generators in the first unit and a second opening communicating with the flow paths of the generators in the second unit.
US10170674B2	LED device Provided is an LED device presenting minimal risk of bottom-surface contamination even when foreign substances such as liquids adhere thereto. The LED device has an LED die, a submount substrate on the surface of which the LED die is mounted, a frame-shaped electrode disposed along the outer circumferential part of the bottom surface of the submount substrate, and an inner-side electrode surrounded by the frame-shaped electrode and connected to the electrode of the LED die. In the LED device, the frame-shaped electrode is disposed along the entire outer circumferential part of the bottom surface. In an LED device, the bottom surface is rectangular, and the frame-shaped electrode is disposed along three sides of the bottom surface.
US10170673B2	LED package structure and multilayer circuit board An LED package structure includes a multilayer circuit board, an LED chip, and a cover. The multilayer circuit board has a conductive layer, a first resin layer disposed on the conductive layer, and a first circuit layer disposed on the first resin layer. The first resin layer has a first opening, and a portion of the conductive layer is partially exposed from the first resin layer via the first opening such that a mounting region is exposed. The first circuit layer has a second opening, and the second opening exposes the mounting region. The LED chip is fixed on the mounting region by passing it through the first and second openings, and the LED chip is connected to the first circuit layer by wires. The cover is disposed on the first resin layer and covers the LED chip and the first circuit layer.
US10170672B2	Optical element and optoelectronic component An optical element has a first surface and a second surface opposite the first surface. The first surface is subdivided into at least one first segment and a second segment. The segments in each case adjoin a midpoint of the first surface. Each segment has a tooth structure having teeth extending along tooth extension directions. The tooth extension directions have bends at boundaries between the segments.
US10170671B2	Methods of filling a flowable material in a gap of an assembly module A method to fill the flowable material into the semiconductor assembly module gap regions is described. In an embodiment, multiple semiconductor units are formed on the substrate to create an array module; the array module is attached to a backplane having circuitry to form the semiconductor assembly module in which multiple gap regions are formed inside the semiconductor assembly module and edge gap regions are formed surround an edge of the assembly module; The flowable material is forced inside the gap regions by performing the high acting pressure environment and then cured to be a stable solid to form a robustness structure. A semiconductor convert module is formed by removing the substrate utilizing a substrate removal process. A semiconductor driving module is formed by utilizing a connecting layer on the semiconductor convert module. In one embodiment, a vertical light emitting diode semiconductor driving module is formed to light up the vertical LED array. In another one embodiment, multiple color emissive light emitting diodes semiconductor driving module is formed to display color images. In another embodiment, multiple patterns of semiconductor units having multiple functions semiconductor driving module is formed to provide multiple functions for desire application.
US10170670B2	Wavelength converting material for a light emitting device Embodiments of the invention include a wavelength-converting material defined by AE3−x1−y+zRE3−x2+y−z[Si9−wAlw(N1−yCy)[4](N16−z−wOz+w)[2]]:Eux1,Cex2, where AE=Ca, Sr, Ba; RE=Y, Lu, La, Sc; 0≤x1≤0.18; 0≤x2≤0.2; x1+x2>0; 0≤y≤1; 0≤z≤3; 0≤w≤3.
US10170659B2	Monolithically integrated thin-film electronic conversion unit for lateral multijunction thin-film solar cells An integrated thin-film lateral multi junction solar device and fabrication method are provided. The device includes, for instance, a substrate, and a plurality of stacks extending vertically from the substrate. Each stack may include layers, and be electrically isolated against another stack. Each stack may also include an energy storage device above the substrate, a solar cell above the energy storage device, a transparent medium above the solar cell, and a micro-optic layer of spectrally dispersive and concentrating optical devices above the transparent medium. Furthermore, the device may include a first power converter connected between the energy storage device and a power bus, and a second power converter connected between the solar cell and the power bus. Further, different solar cells of different stacks may have different absorption characteristics.
US10170658B2	Semiconductor package structures and method of manufacturing the same An optical device includes a substrate, a light emitter, a light detector, a conductive structure, and an opaque material. The light emitter, the light detector and the conductive structure are disposed on a surface of the substrate and are electrically connected to traces on the surface of the substrate. The light emitter includes an emitting area facing the substrate. The light detector includes a receiving area facing the substrate. The light emitter emits light within a range of wavelengths, and the substrate passes the light emitted by the light emitter. The opaque material is disposed on the substrate, and absorbs or attenuates the light within the range of wavelengths.
US10170653B2	Tunneling barrier infrared detector devices Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.
US10170652B2	Metamorphic solar cell having improved current generation A semiconductor device structure having increased photogenerated current density, and increased current output is disclosed. The device includes low bandgap absorber regions that increase the range of wavelengths at which photogeneration of charge carriers takes place, and for which useful current can be collected. The low bandgap absorber regions may be strain balanced by strain-compensation regions, and the low bandgap absorber regions and strain-compensation regions may be formed from the same ternary semiconductor family. The device may be a solar cell, subcell, or other optoelectronic device with a metamorphic or lattice-mismatched base layer, for which the low bandgap absorber region improves the effective bandgap combination of subcells and current balance within the multijunction cell, for higher efficiency conversion of the solar spectrum.
US10170650B2	Vertically stacked photovoltaic and thermal solar cell According to some embodiments, the present invention provides a novel photovoltaic solar cell system from photovoltaic modules that are vertically arrayed in a stack format using thin film semiconductors selected from among organic and inorganic thin film semiconductors. The stack cells may be cells that are produced in a planar manner, then vertically oriented in an angular form, also termed herein tilted, to maximize the light capturing aspects. The use of a stack configuration system as described herein allows for the use of a variety of electrode materials, such as transparent materials or semitransparent metals. Light concentration can be achieved by using fresnel lens, parabolic mirrors or derivatives of such structures. The light capturing can be controlled by being reflected back and forth in the photovoltaic system until significant quantities of the resonant light is absorbed. Light that passes to the very end and can be reflected back through the device by beveling or capping the end of the device with a different refractive index material, or alternatively using a reflective surface. The contacting between stacked cells can be done in series or parallel. According to some embodiments, the present invention uses a concentrator architecture where the light is channeled into the cells that contain thermal fluid channels (using a transparent fluid such as water) to absorb and hence reduce the thermal energy generation.
US10170649B2	Metal chalcogenide nanoparticles for preparing light absorption layer of solar cells and method of preparing the same Disclosed are metal chalcogenide nanoparticles forming a light absorption layer of solar cells including a first phase including copper (Cu)-tin (Sn) chalcogenide and a second phase including zinc (Zn) chalcogenide, and a method of preparing the same.
US10170638B1	Nanosheet substrate isolated source/drain epitaxy by dual bottom spacer Parasitic transistor formation under a semiconductor containing nanosheet device is eliminated by providing a dual bottom spacer structure on physically exposed surfaces of a semiconductor substrate after formation of a nanosheet stack of alternating nanosheets of a sacrificial semiconductor material nanosheet and a semiconductor channel material nanosheet on a portion of the semiconductor substrate. The presence of the dual bottom spacer structure prevents bottom up growth of the semiconductor material that provides the S/D regions.
US10170637B2	Perfectly symmetric gate-all-around FET on suspended nanowire A semiconductor device including a plurality of suspended nanowires and a gate structure that is present on a channel region portion of the plurality of suspended nanowires. The gate structure includes a uniform length extending from an upper surface of the gate structure to the base of the gate structure. A dielectric spacer having a graded composition is present in direct contact with the gate structure. The dielectric spacer having a uniform length extending from an upper surface of the gate structure to the base of the gate structure. Source and drain regions are present on source and drain region portions of the plurality of suspended nanowires.
US10170634B2	Wire-last gate-all-around nanowire FET A nanowire field effect transistor (FET) device includes a first source/drain region and a second source/drain region. Each of the first and second source/drain regions are formed on an upper surface of a bulk semiconductor substrate. A gate region is interposed between the first and second source/drain regions, and directly on the upper surface of the bulk semiconductor substrate. A plurality of nanowires are formed only in the gate region. The nanowires are suspended above the semiconductor substrate and define gate channels of the nanowire FET device. A gate structure includes a gate electrode formed in the gate region such that the gate electrode contacts an entire surface of each nanowire.
US10170633B2	Method for manufacturing semiconductor device A transistor having an oxide semiconductor film in a channel formation region and a manufacturing method thereof are disclosed. The transistor is formed by the steps of: forming a base insulating over a substrate; forming an oxide semiconductor film over the base insulating film; forming a conductive film over the oxide semiconductor film; processing the conductive film to form a source electrode and a drain electrode; processing the oxide semiconductor film; forming a gate insulating film over the source electrode, the drain electrode, and the oxide semiconductor film; and forming a gate electrode over the gate insulating film. The aforementioned manufacturing method allows the formation of a transistor in which a side surface of the oxide semiconductor film is not in direct contact with bottom surfaces of the source electrode and the drain electrode, which contributes to the extremely small leak current of the transistor.
US10170632B2	Semiconductor device including oxide semiconductor layer As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.
US10170626B2	Transistor panel having a good insulation property and a manufacturing method thereof A transistor panel includes a channel region including an oxide of a first metal, a source region and a drain region, each including the first metal, wherein the channel region is disposed between the source and drain regions, and wherein the channel region is connected to the source and drain regions, an insulation layer disposed on the channel region, an upper electrode disposed on the insulation layer, an interlayer insulation layer disposed on the upper electrode, the source region and the drain region, and a barrier layer including a first portion disposed between the interlayer insulation layer and each of the source and drain regions, wherein the first portion of the barrier layer contacts each of the source and drain regions. The upper electrode and the barrier layer each comprise a second metal.
US10170624B2	Non-planar transistor A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a first spacer structure and a source/drain region. The fin structure is disposed on the substrate, the gate structure is disposed on the fin structure. The fin structure includes an upper portion, a concave portion and a lower portion, and the concave portion is disposed between the upper portion and the lower portion. The first spacer structure is disposed on a sidewall of the gate structure. The first spacer structure includes a first spacer and a second spacer, wherein the first spacer is disposed between the second spacer, and a height of the first spacer is different from a height of the second spacer. The source/drain region is disposed in a semiconductor layer at two sides of the first spacer structure.
US10170621B2	Method of making a transistor having a source and a drain obtained by recrystallization of semiconductor Method of making a transistor, comprising the following steps: make a gate and a first spacer on a first channel region of a first crystalline semiconducting layer; make first crystalline semiconductor portions on the second source and drain regions; make the second regions amorphous and dope them; recrystallise the second regions and activate the dopants present in the second regions; remove the first portions; make a second spacer thicker than the first spacer; make second doped crystalline semiconductor portions on the second regions, said second portions and the second regions of the first layer together form the source and drain of the transistor.
US10170620B2	Substantially defect free relaxed heterogeneous semiconductor fins on bulk substrates A semiconductor structure is provided that includes a bulk semiconductor substrate of a first semiconductor material. The structure further includes a plurality of fin pedestal structures of a second semiconductor material located on the bulk semiconductor substrate of the first semiconductor material, wherein the second semiconductor material is different from the first semiconductor material. In accordance with the present application, each fin pedestal structure includes a pair of spaced apart semiconductor fins of the second semiconductor material.
US10170618B2	Vertical transistor with reduced gate-induced-drain-leakage current A method of forming a vertical transport fin field effect transistor, including, forming a bottom source/drain layer at the surface of the substrate, forming one or more channels on the bottom source/drain layer, where the channels extend away from the bottom source/drain layer, forming a gate structure on each of the one or more channels, and forming a top source/drain segment on the top surface of each of the one or more channels, wherein either each of the top source/drain segments or the bottom source/drain layer has a larger bandgap than the other of the bottom source/drain layer or each of the top source/drain segments.
US10170616B2	Methods of forming a vertical transistor device One illustrative method disclosed herein includes, among other things, defining a cavity in a plurality of layers of material positioned above a bottom source/drain (S/D) layer of semiconductor material, wherein a portion of the bottom source/drain (S/D) layer of semiconductor material is exposed at the bottom of the cavity, and performing at least one epi deposition process to form a vertically oriented channel semiconductor structure on the bottom source/drain (S/D) layer of semiconductor material and in the cavity and a top source/drain (S/D) layer of semiconductor material above the vertically oriented channel semiconductor structure. In this example, the method further includes removing at least one of the plurality of layers of material to thereby expose an outer perimeter surface of the vertically oriented channel semiconductor structure and forming a gate structure around the vertically oriented channel semiconductor structure.
US10170611B1	T-gate field effect transistor with non-linear channel layer and/or gate foot face Semiconductor devices, such as transistors, FETs and HEMTs having a non-linear gate foot region and non-linear channel width are disclosed as well as methods of making and using such devices and the operational benefits of the devices.
US10170610B1	Pseudomorphic high electron mobility transistor with low contact resistance In certain aspects, a pseudomorphic high electron mobility transistor (pHEMT) comprises a substrate layer, a bottom barrier layer on the substrate layer, a channel layer on the bottom barrier layer, an upper barrier on the channel layer, and a source and a drain on the upper barrier layer. The source and the drain each has a cap layer, an Ohmic contact layer on the cap layer, and a metal contact layer on the Ohmic contact layer. The Ohmic contact layer has a smaller bandgap than the cap layer. The pHEMT further comprises a gate metal stack on the upper barrier layer.
US10170609B2	Internal spacer formation from selective oxidation for Fin-first wire-last replacement gate-all-around nanowire FET A semiconductor device includes a first source/drain region a second source/drain region, and a gate region interposed between the first and second source/drain regions. At least one nanowire has a first end anchored to the first source/drain region and an opposing second end anchored to the second source/drain region such that the nanowire is suspended above the wafer in the gate region. At least one gate electrode is in the gate region. The gate electrode contacts an entire surface of the nanowire to define a gate-all-around configuration. At least one pair of oxidized spacers surrounds the at least one gate electrode to electrically isolate the at least one gate electrode from the first and second source/drain regions.
US10170607B2	Semiconductor device A semiconductor device has a semiconductor substrate including a first conductivity-type drift layer, a second conductivity-type base layer disposed in a surface layer portion of the drift layer, and a second conductivity-type collector layer and a first conductivity-type cathode layer disposed opposite to the base layer with respect to the drift layer. In the semiconductor substrate, an IGBT region and a diode region are alternately and repetitively arranged. The IGBT region and the diode region are divided by a boundary between the collector layer and the cathode layer. The collector layer is defined as a first collector layer. The semiconductor device includes a second collector layer having a second conductivity-type impurity concentration higher than that of the first collector layer, at a surface of the semiconductor substrate adjacent to the first collector layer and the cathode layer.
US10170602B2	Semiconductor device with multiple HBTs having different emitter ballast resistances The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (HBTs) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first HBT and a second HBT formed over the substrate. The first HBT includes a first collector, a first base over the first collector, a first emitter over the first base, and a first cap structure over the first emitter. The second HBT includes a second collector, a second base over the second collector, a second emitter over the second base, and a second cap structure over the second emitter. Herein, the first cap structure is different from the second cap structure, such that a first emitter ballast resistance from the first cap structure is at least 1.5 times greater than a second emitter ballast resistance from the second cap structure.
US10170599B2	Semiconductor device including insulating films with different thicknesses and method for manufacturing the semiconductor device In a semiconductor device including an oxide semiconductor, the amount of oxygen vacancies is reduced. Moreover, electrical characteristics of a semiconductor device including an oxide semiconductor are improved. The semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, an oxide semiconductor film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the oxide semiconductor film; and over the transistor, a first insulating film covering the gate insulating film, the oxide semiconductor film, and the pair of electrodes; and a second insulating film covering the first insulating film. An etching rate of the first insulating film is lower than or equal to 10 nm/min and lower than an etching rate of the second insulating film when etching is performed at 25° C. with 0.5 weight % of hydrofluoric acid.
US10170595B2	Fabrication of an isolated dummy fin between active vertical fins with tight fin pitch A method of forming an arrangement of active and inactive fins on a substrate, including forming at least three vertical fins on the substrate, forming a protective liner on at least three of the at least three vertical fins, removing at least a portion of the protective liner on the one of the at least three of the at least three of vertical fins, and converting the one of the at least three of the at least three vertical fins to an inactive vertical fin.
US10170594B2	Punch through stopper in bulk finFET device A method of forming a semiconductor device that includes forming a fin structure from a bulk semiconductor substrate and forming an isolation region contacting a lower portion of a sidewall of the fin structure, wherein an upper portion of the sidewall of the fin structure is exposed. A sacrificial spacer is formed on the upper portion of the sidewall of the fin structure. The isolation regions are recessed to provide an exposed section of the sidewall of the fin structure. A doped semiconductor material is formed on the exposed section of the lower portion of the sidewall of the fin structure. Dopant is diffused from the doped semiconductor material to a base portion of the fin structure.
US10170592B2	Integrated circuit structure with substrate isolation and un-doped channel The present disclosure provides a method of fabricating a nonplanar circuit device. The method includes receiving a substrate having a first semiconductor layer of a first semiconductor material and a second semiconductor layer of a second semiconductor material on the first semiconductor layer, wherein the second semiconductor material is different from the first semiconductor material in composition. The method further includes patterning the first and second semiconductor layers to form a fin structure in the first and second semiconductor layers. The method further includes performing a selective oxidization process to the first semiconductor layer such that a bottom portion of the first semiconductor layer is oxidized.
US10170591B2	Self-aligned finFET formation A method for fabricating a semiconductor device comprises forming a first hardmask, a planarizing layer, and a second hardmask on a substrate. Removing portions of the second hardmask and forming alternating blocks of a first material and a second material over the second hardmask. The blocks of the second material are removed to expose portions of the planarizing layer. Exposed portions of the planarizing layer and the first hardmask are removed to expose portions of the first hardmask. Portions of the first hardmask and portions of the substrate are removed to form a first fin and a second fin. Portions of the substrate are removed to further increase the height of the first fin and substantially remove the second fin. A gate stack is formed over a channel region of the first fin.
US10170588B1	Method of forming vertical transport fin field effect transistor with high-K dielectric feature uniformity A method of forming a vertical transport fin field effect transistor is provided. The method includes forming a doped layer on a substrate, and forming a multilayer fin on the doped layer, where the multilayer fin includes a lower trim layer portion, an upper trim layer portion, and a fin channel portion between the upper and lower trim layer portions. A portion of the lower trim layer portion is removed to form a lower trim layer post, and a portion of the upper trim layer portion is removed to form an upper trim layer post. An upper recess filler is formed adjacent to the upper trim layer post, and a lower recess filler is formed adjacent to the lower trim layer post. A portion of the fin channel portion is removed to form a fin channel post between the upper trim layer post and lower trim layer post.
US10170585B2	Semiconductor devices having equal thickness gate spacers A method is presented for forming equal thickness gate spacers for a CMOS (complementary metal oxide semiconductor) device, the method includes forming a PFET (p-type field effect transistor) device and an NFET (n-type field effect transistor) device each including gate masks formed over dummy gates, forming PFET epi growth regions between the dummy gates of the PFET device, forming NFET epi growth regions between the dummy gates of the NFET device, depositing a nitride liner and an oxide over the PFET and NFET epi growth regions, the nitride liner and oxide extending up to the gate masks, and removing the dummy gates and the gate masks to form HKMGs (high-k metal gates) between the PFET and NFET epi growth regions.
US10170584B2	Nanosheet field effect transistors with partial inside spacers A method of forming a nanosheet device, including forming a channel stack on a substrate, where the channel stack includes at least one nanosheet channel layer and at least one sacrificial release layer, forming a stack cover layer on at least a portion of the channel stack, forming a dummy gate on at least a portion of the stack cover layer, wherein at least a portion of the at least one nanosheet channel layer and at least one sacrificial release layer is exposed on opposite sides of the dummy gate, removing at least a portion of the at least one sacrificial release layer on each side of the dummy gate to form a sacrificial supporting rib, and forming an inner spacer layer on exposed portions of the at least one nanosheet channel layer and at least one sacrificial supporting rib.
US10170580B2	Structure of GaN-based transistor and method of fabricating the same A GaN-based transistor device comprises a substrate; a buffer layer disposed on the substrate; a channel layer disposed on the buffer layer; a barrier layer disposed on a part of the channel layer; a passivation layer disposed on the barrier layer; wherein the barrier layer and the passivation layer comprise a first side wall and a second side wall; a barrier metal layer disposed on the passivation layer has a first opening that exposes a part of the passivation layer, and the passivation layer has a second opening located in the first opening; a gate electrode disposed on the exposed part of the barrier layer, a source electrode disposed on the channel layer covers the first side wall and a part of the barrier metal layer, and a drain electrode disposed on the channel layer covers the second side wall and another part of the barrier metal layer.
US10170578B2	Through-substrate via power gating and delivery bipolar transistor Embodiments herein describe a through-substrate via formed in a semiconductor substrate that includes a transistor. In one embodiment, the through via includes a BJT which includes different doped semiconductor layers that form a collector, a base, and an emitter. The through via can also include metal contacts to the collector, base, and emitter which enable the through to be coupled to a metal routing layer or a solder bump.
US10170577B1	Vertical transport FETs having a gradient threshold voltage Vertical transport field effect transistors (FETs) having improved device performance are provided. Notably, vertical transport FETs having a gradient threshold voltage are provided. The gradient threshold voltage is provided by introducing a threshold voltage modifying dopant into a physically exposed portion of a metal gate layer composed of an n-type workfunction TiN. The threshold voltage modifying dopant changes the threshold voltage of the original metal gate layer.
US10170576B2	Stable work function for narrow-pitch devices A work function setting metal stack includes a configuration of layers including a high dielectric constant layer and a diffusion prevention layer formed on the high dielectric constant layer. An aluminum doped TiC layer has a thickness greater than 5 nm wherein the configuration of layers is employed between two regions as a diffusion barrier to prevent mass diffusion between the two regions.
US10170574B2	Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts An electrical device including a first semiconductor device having a silicon and germanium containing source and drain region, and a second semiconductor device having a silicon containing source and drain region. A first device contact to at least one of said silicon and germanium containing source and drain region of the first semiconductor device including a metal liner of an aluminum titanium and silicon alloy and a first tungsten fill. A second device contact is in contact with at least one of the silicon containing source and drain region of the second semiconductor device including a material stack of a titanium oxide layer and a titanium layer. The second device contact may further include a second tungsten fill.
US10170570B1	Semiconductor memory device According to one embodiment, a semiconductor memory device includes a plurality of electrodes, extending in a first direction and a second direction orthogonal to the first direction are stacked one over the other, and include opposed sides extending in the second direction, a plurality of protrusion portions extending from the first side of the electrodes and spaced from one another in the second direction, and an extraction portion extending from the second side of the electrode. First and second contact plugs extend in a third direction orthogonal to the first and second directions, one of each contacting one of the extraction portions, wherein the extraction portion extending from the uppermost of the electrodes is located closer to the center of the second side in the second direction, than the location of the extraction portion extending from the lowermost of the electrodes.
US10170569B2	Thin film transistor fabrication utlizing an interface layer on a metal electrode layer Embodiments of the disclosure generally provide methods of forming thin film transistor (TFT) device structure with good interface management between a metal electrode layer and a nearby insulating material so as to provide high electrical performance devices, or for other suitable display applications. In one embodiment, a thin film transistor structure includes a metal electrode layer disposed on a barrier layer formed above a gate insulating material layer, an interface layer disposed on the metal electrode layer, wherein the interface layer is an oxygen free dielectric material layer sized to be formed predominately on the metal electrode layer, and an insulating material layer disposed on the interface layer, wherein the insulating material layer is an oxygen containing dielectric layer.
US10170566B2	Semiconductor device having air gap and method for manufacturing the same, memory cell having the same and electronic device having the same A semiconductor device including a semiconductor substrate including a plurality of active regions and a device isolation region for isolating the plurality of active regions; and a buried bit line and a buried gate electrode which are formed in the semiconductor substrate. The device isolation region includes a first device isolation region extending in a first direction and a second device isolation region extending in a second direction crossing with the first direction and having a shield pillar formed therein.
US10170564B2	Manufacturing method of semiconductor device and semiconductor device Provided is a manufacturing method of a semiconductor device including a vertical MOSFET having a planar gate. The manufacturing method of a semiconductor device includes forming a n-type gallium nitride layer on a gallium nitride monocrystalline substrate, and forming an impurity-implanted region that contains impurities at a uniform concentration in a direction parallel to a main surface of the gallium nitride monocrystalline substrate, by ion-implanting the impurities into the n-type gallium nitride layer, where the impurities include at least one type selected from among magnesium, beryllium, calcium and zinc. Here, at least part of the impurity-implanted region serves as a channel forming region of the vertical MOSFET.
US10170562B2	Semiconductor device having a junction portion contacting a Schottky metal A semiconductor device according to the present invention includes a first conductive-type SiC semiconductor layer, and a Schottky metal, comprising molybdenum and having a thickness of 10 nm to 150 nm, that contacts the surface of the SiC semiconductor layer. The junction of the SiC semiconductor layer to the Schottky metal has a planar structure, or a structure with recesses and protrusions of equal to or less than 5 nm.
US10170560B2	Semiconductor devices with enhanced deterministic doping and related methods A method for making a semiconductor device may include forming a plurality of stacked groups of layers on a semiconductor substrate, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include implanting a dopant in the semiconductor substrate beneath the plurality of stacked groups of layers in at least one localized region, and performing an anneal of the plurality of stacked groups of layers and semiconductor substrate and with the plurality of stacked groups of layers vertically and horizontally constraining the dopant in the at least one localized region.
US10170556B2	Semiconductor device and method for manufacturing the same A semiconductor device manufacturing method includes preparing a semiconductor substrate of a first conductivity type, forming a semiconductor layer of the first conductivity type over a main surface of the semiconductor substrate, forming a plurality of first ditches in an upper surface portion of the semiconductor layer such that the first ditches are arranged in a first direction extending along an upper surface of the semiconductor substrate, forming a plurality of second ditches in bottom surface portions of each of the first ditches such that the second ditches are arranged in a second direction perpendicular to the first direction, and covering a side wall of each of the first ditches with a first insulating film and a side wall and a bottom surface of each of the second ditches with a second insulating film thicker than the first insulating film.
US10170550B2	Stressed nanowire stack for field effect transistor A disposable gate structure is formed over the alternating stack of first semiconductor material portions and second semiconductor material portions. The second semiconductor material portions are removed selective to the first semiconductor material portions to form suspended semiconductor nanowires. Isolated gate structures are formed in regions underlying the disposable gate structure by deposition and recessing of a first gate dielectric layer and a first gate conductor layer. After formation of a gate spacer, source regions, and drain regions, raised source and drain regions are formed on the source regions and the drain regions by selective deposition of a semiconductor material. The disposable gate structure is replaced with a replacement gate structure by deposition and patterning of a second gate dielectric layer and a second gate conductor layer. Distortion of the suspended semiconductor nanowires is prevented by the disposable gate structure and the isolated gate structures.
US10170546B2	Fully substrate-isolated FinFET transistor Channel-to-substrate leakage in a FinFET device is prevented by inserting an insulating layer between the semiconducting channel and the substrate during fabrication of the device. Similarly, source/drain-to-substrate leakage in a FinFET device is prevented by isolating the source/drain regions from the substrate by inserting an insulating layer between the source/drain regions and the substrate. Forming such an insulating layer isolates the conduction path from the substrate both physically and electrically, thus preventing current leakage. In an array of semiconducting fins made up of a multi-layer stack, the bottom material is removed thus yielding a fin array that is suspended above the silicon surface. A resulting gap underneath the remaining top fin material is then filled with oxide to better support the fins and to isolate the array of fins from the substrate.
US10170544B2	Integrated circuit products that include FinFET devices and a protection layer formed on an isolation region An integrated circuit product includes a FinFET device, a device isolation region that is positioned around a perimeter of the FinFET device, and an isolation protection layer that is positioned above the device isolation region. The FinFET device includes at least one fin, a gate structure, and a sidewall spacer, the device isolation region includes a first insulating material, and the isolation protection layer includes a material that is different from the first insulating material. A first portion of the isolation protection layer is positioned under a portion of the gate structure and under a portion of the sidewall spacer, wherein a second portion of the isolation protection layer is not positioned under the gate structure and is not positioned under the sidewall spacer, the first portion of the isolation protection layer having a thickness that is greater than a thickness of the second portion.
US10170541B2	Semiconductor device including a plurality of electrodes and supporters A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
US10170538B2	MIS capacitor In one embodiment of the present invention, there is provided an MIS capacitor, including: a lower electrode formed with a semiconductor substrate having electrical conductivity and through which an electrical signal passes at a lower surface thereof; an insulating layer formed on the lower electrode; an upper electrode formed on the insulating layer and through which the electrical signal passes at an upper surface thereof; and a first conductive layer formed on side surfaces of the lower electrode so that the electrical signal passing the lower surface and an upper surface of the lower electrode passes along the side surfaces of the lower electrode, wherein the first conductive layer has electro conductivity higher than the electro conductivity of the lower electrode.
US10170537B2	Capacitor structure compatible with nanowire CMOS A semiconductor device is provided that includes a pedestal of an insulating material present over at least one layer of a semiconductor material, and at least one fin structure in contact with the pedestal of the insulating material. Source and drain region structures are present on opposing sides of the at least one fin structure. At least one of the source and drain region structures includes at least two epitaxial material layers. A first epitaxial material layer is in contact with the at least one layer of semiconductor material. A second epitaxial material layer is in contact with the at least one fin structure. The first epitaxial material layer is separated from the at least one fin structure by the second epitaxial material layer. A gate structure present on the at least one fin structure.
US10170535B2	Active-matrix touchscreen An active-matrix touchscreen includes a substrate, a system controller, and a plurality of spatially separated independent touch elements disposed on the substrate. Each touch element includes a touch sensor and a touch controller circuit that provides one or more sensor-control signals to the touch sensor and receives a sense signal responsive to the sensor-control signals from the touch sensor. Each touch sensor operates independently of any other touch sensor.
US10170532B2	EL display panel, power supply line drive apparatus, and electronic device Disclosed herein is an electroluminescence display panel including a pixel circuit, a signal line, a scan line, a drive power supply line, a common power supply line, a power supply line drive circuit, a high-potential power supply line, and a low-potential power supply line.
US10170528B2	Display panel and manufacturing method thereof Provided is a novel display panel that is highly convenient or reliable. The display device has two display modes: a reflective display mode and a light-emitting display mode. In the light-emitting display mode, light display is performed by transmitting light from a light-emitting element overlapping with an opening in a pixel electrode of a reflective display element. A switching element of the reflective display element and a switching element electrically connected to the light-emitting element are formed over one substrate. They are each a transistor whose channel formation region is formed in a silicon-containing film, specifically a polysilicon film.
US10170527B2	Organic light emitting diode display An organic light emitting display device comprises a common voltage line formed over a peripheral region of a substrate; a passivation layer formed over a pixel region of the substrate and the peripheral region; pixel electrodes formed over the pixel region; and a pixel defining layer formed over the pixel region and the peripheral region. The pixel defining layer defines pixel openings overlapping the pixel electrodes, respectively. The device further comprises organic light emitting layers formed over the pixel region, and disposed in the pixel openings and over the pixel electrodes, respectively; and a common electrode formed over the pixel and peripheral regions. The common electrode is disposed over the pixel defining layer and the organic light emitting layers. The common electrode contacts the common voltage line. The passivation layer comprises a portion overlapping the common voltage line but not overlapping the pixel defining layer.
US10170526B1	Organic light emitting diode display panel and method for manufacturing same An organic light emitting diode (OLED) display panel and a method for manufacturing the OLED display panel are provided. The OLED display panel includes a thin film transistor layer, an anode layer, a pixel definition layer, a cathode layer, and a barrier layer. The barrier layer is disposed on the pixel definition layer between any two adjacent anodes. The barrier layer blocks an electrical charge released by one of the two adjacent anodes from entering into a region in the cathode layer corresponding to the other of the two adjacent anodes.
US10170525B2	Organic light emitting display device An organic light emitting display device includes a substrate, a gate insulation layer, a planarization layer, a boundary pattern, and a sub-pixel structure. The substrate includes a sub-pixel region and a transparent region. The gate insulation layer is disposed on the substrate. The planarization layer is disposed in the sub-pixel region on the gate insulation layer, and exposes the transparent region. The boundary pattern covers a boundary of the sub-pixel region and the transparent region. The sub-pixel structure is disposed on the planarization layer.
US10170524B2	Display device A display device includes a display panel, a member, a first fixing portion, a second fixing portion, and a roll-up portion. The display device has a function that enables selection between a first state in which an image is displayed with the display panel not folded and a second state in which an image is displayed with the display panel folded. The display panel is fixed to the first fixing portion and the second fixing portion. One end of the member is fixed to the first fixing portion. The other end of the member is connected to the roll-up portion. The roll-up portion has a function that enables rolling up of the member from the other end of the member. The display panel is folded by rolling up the member. The display panel is unfolded by pulling out the rolled-up member from the roll-up portion.
US10170523B2	Touch sensitive display and method for manufacturing the same The present invention relates to a touch sensitive display, which includes an upper substrate with a mask layer placed thereon, a touch sensing layer, a lower substrate, and an organic light-emitting assembly. The touch sensing layer is disposed below the upper substrate, and the lower substrate is disposed by facing with the upper substrate. The organic light-emitting assembly is disposed above the lower substrate with facing to the touch sensing layer. Furthermore, a method for manufacturing the touch sensitive display is provided.
US10170521B2	Organic light-emitting diode display device An organic light-emitting diode display device according to an embodiment includes a substrate on which red, green and blue sub-pixel regions are defined, first electrodes in the red, green and blue sub-pixel regions, respectively, and first, second and third light-emitting layers on the first electrodes in the red, green and blue sub-pixel regions, respectively. The organic light-emitting diode display device further includes a second electrode on the first, second and third light-emitting layers, and red, green and blue color filters disposed on the second electrode and corresponding to the red, green and blue sub-pixel regions, respectively, wherein a thickness of the first light-emitting layer is smaller than a thickness of the second light emitting layer.
US10170517B2	Method for forming image sensor device A method for forming an image sensor device on a substrate is disclosed. The method includes (a) recessing a portion of the substrate thereby forming a first shallow trench; (b) forming a spacer layer surrounding at least part of a sidewall of the first shallow trench; and (c) forming a first deep trench that extends below the first shallow trench by further recessing the substrate while using the spacer layer as a mask.
US10170513B2	Image sensor with vertical electrodes An image sensor arranged inside and on top of a semi-conductor substrate having a front surface and a rear surface, the sensor including a plurality of pixels, each including: a photosensitive area, a reading area, and a storage area extending between the photosensitive area and the reading area; a vertical insulated electrode including an opening of transfer between the photosensitive area and the storage area; and at least one insulation element among the following: a) a layer of an insulating material extending under the surface of the photosensitive area and of the storage area and having its front surface in contact with the rear surface of the electrode; and b) an insulating wall extending vertically in the opening, or under the opening.
US10170509B2	Optical filter array A device may include a filter array disposed on a substrate. The filter array may include a first mirror disposed on the substrate. The filter array may include a plurality of spacers disposed on the first mirror. A first spacer, of the plurality of spacers, may be associated with a first thickness. A second spacer, of the plurality of spacers, may be associated with a second thickness that is different from the first thickness. A first channel corresponding to the first spacer and a second channel corresponding to the second spacer may be associated with a separation width of less than approximately 10 micrometers (μm). The filter array may include a second mirror disposed on the plurality of spacers.
US10170508B2	Optical package structure An optical package structure is provided. The optical package structure includes a substrate, a frame layer, an optical unit, a bonding layer, a transparent plate and an encapsulation layer. The frame layer formed on the substrate surrounds a cavity where the optical unit is located. The bonding layer covers a portion of an upper edge of the frame layer and exposes the other portion of the upper edge of the frame layer. The transparent plate mounted on the bonding layer extends across the optical unit and extends beyond an outer edge of the bonding layer. The encapsulation layer covers a lateral edge of the transparent plate and the outer edge of the bonding layer.
US10170506B2	LTPS array substrate and method for producing the same An LTPS array substrate and a method for producing the same are proposed. The method includes: forming an insulating layer, a semiconductor layer, and a first positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a source and a drain of the TFT on the polycrystalline silicon layer; forming a pixel electrode on the insulating layer and part of the source; forming a plain passivation layer on a source-drain electrode layer; forming a transparent electrode layer on the plain passivation layer so that the transparent electrode layer is connected to the gate, the source, and the drain via the contact hole. The use of masks in types and numbers in the LTPS technology can be reduced. Thus, both of the processes and the production costs are reduced.
US10170500B2	Transistor, liquid crystal display device, and manufacturing method thereof Photolithography and etching steps for forming an island-shaped semiconductor layer are omitted, and a liquid crystal display device is manufactured with four photolithography steps: a step of forming a gate electrode (including a wiring formed using the same layer as the gate electrode), a step of forming source and drain electrodes (including a wiring formed using the same layer as the source and drain electrodes), a step of forming a contact hole (including the removal of an insulating layer and the like in a region other than the contact hole), and a step of forming a pixel electrode (including a wiring formed using the same layer as the pixel electrode). By the reduction in the number of photolithography steps, a liquid crystal display device can be provided at low cost and high productivity. Formation of a parasitic channel is prevented by an improvement in shape and potential of a wiring.
US10170495B2	Stacked memory device, optical proximity correction (OPC) verifying method, method of designing layout of stacked memory device, and method of manufacturing stacked memory device An optical proximity correction (OPC) verifying method including checking a first location of a first pattern in a layout of a stacked memory device, calculating a shift value of the first pattern according to the first location, obtaining a difference value between the first location and a second location of a second pattern formed through an OPC with respect to the first pattern, and determining whether the OPC is to be performed again, based on the shift value and the difference value.
US10170493B1	Assemblies having vertically-stacked conductive structures Some embodiments include a method in which an assembly is formed to have voids within a stack, and to have slits adjacent the voids. Peripheral boundaries of the voids have proximal regions near the slits and distal regions adjacent the proximal regions. A material is deposited within the voids under conditions which cause the material to form to a greater thickness along the distal regions than along the proximal regions. Some embodiments include an assembly having a stack of alternating first and second levels. The second levels include conductive material. Panel structures extend through the stack. The conductive material within the second levels has outer edges with proximal regions near the panel structures and distal regions adjacent the proximal regions. Interface material is along the outer edges of the conductive material and has a different composition along the proximal regions than along the distal regions.
US10170490B2	Memory device including pass transistors in memory tiers Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a semiconductor material, a pillar extending through the semiconductor material, a select gate located along a first portion of the pillar, memory cells located along a second portion of the pillar, and transistors coupled to the select gate through a portion of the semiconductor material. The transistors include sources and drains formed from portions of the semiconductor material. The transistors include gates that are electrically uncoupled to each other.
US10170488B1	Non-volatile memory of semiconductor device and method for manufacturing the same A semiconductor device includes a substrate and a floating gate memory cell. The floating gate memory cell includes an erase gate structure disposed on the substrate, a first floating gate structure, a second floating gate structure, a first word line, a common source, a second word line, a first spacer and a second spacer. The first floating gate structure and the second floating gate structure are recessed in the substrate at two opposite sides of the erase gate structure. The first word line and the second word line are respectively adjacent to the first floating gate structure and the second floating gate structure. The common source is disposed in the substrate under the erase gate structure. The first spacer and the second spacer are respectively disposed between the first floating gate structure and the first word line and between the second floating gate structure and the second word line.
US10170487B2	Device having an inter-layer via (ILV), and method of making same A three-dimensional integrated circuit includes a first transistor, a word line, a first via, a second transistor, and a second via. The first transistor is on a first level and the second transistor is on a second level. The second level is different from the first level. The word line and the first via are coupled to the first transistor. The second via is coupled between the first transistor and the second transistor.
US10170481B2	Semiconductor memory device and method of forming the same A semiconductor memory device and a method of forming the same, the semiconductor memory device includes a substrate, a plurality of bit lines, a gate, a spacer layer and a first spacer. The substrate has a memory cell region and a periphery region, the a plurality of bit lines are disposed on the substrate, within the memory cell region, and the gate is disposed on the substrate, within the periphery. The spacer layer covers the bit lines and a sidewall of the gate. The first spacer is disposed at two sides of the gate, covers on the spacer layer.
US10170480B2	Methods for manufacturing a fin-based semiconductor device including a metal gate diffusion break structure with a conformal dielectric layer The present disclosure provides a semiconductor structure comprising one or more fins formed on a substrate and extending along a first direction; one or more gates formed on the one or more fins and extending along a second direction substantially perpendicular to the first direction, the one or more gates including an first isolation gate and at least one functional gate; source/drain features formed on two sides of each of the one or more gates; an interlayer dielectric (ILD) layer formed on the source/drain features and forming a coplanar top surface with the first isolation gate. A first height of the first isolation gate is greater than a second height of each of the at least one functional gate.
US10170477B2	Forming MOSFET structures with work function modification A method of making a semiconductor device comprises forming a first channel region comprising a first channel region material and a second channel region comprising a second channel region material; disposing a gate dielectric on the first channel region and second channel region; depositing a work function modifying material on the gate dielectric; disposing a mask over the work function modifying material deposited on the gate dielectric disposed on the first channel region; removing the work function modifying material from the unmasked gate dielectric disposed on the second channel region; removing the mask from the work function modifying material deposited on the gate dielectric disposed on the first channel region; forming a first gate electrode on the work function modifying material deposited on the first channel region and forming a second gate electrode on the gate dielectric disposed on the second channel region.
US10170468B1	Semiconductor structure and method of manufacturing the same A semiconductor structure is provided. A semiconductor substrate has a first conductivity type. A first well is formed in the semiconductor substrate and has a second conductivity type. A first well includes a first region and a second region. The dopant concentration of the first region is higher than the dopant concentration of the second region. A second well has the first conductivity type and is formed in the first region. A first doped region is formed in the first region and has the second conductivity type different than the first conductivity type. The second doped region has the first conductivity type and is formed in the second well. A third doped region has the first conductivity type and is formed in the second region. A fourth doped region has the second conductivity type and is formed in the first region.
US10170467B2	Three dimensional memory device and method for fabricating the same A 3D semiconductor memory device includes a semiconductor substrate, a source line, a gate line and a plurality of memory cells connected in series. The semiconductor substrate has a protruding portion. The source line is disposed in the semiconductor substrate and partially extending below the protruding portion. The gate line is configured to surround and cover the protruding portion and electrically separated from the source line and the protruding portion. The memory cells are disposed on the semiconductor substrate and connected in series to the protruding portion at a top surface thereof.
US10170466B2	Device having an active channel region In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.
US10170461B2	ESD hard backend structures in nanometer dimension Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.
US10170456B2	Semiconductor packages including heat transferring blocks and methods of manufacturing the same A semiconductor package may be provided. The semiconductor package may include a first semiconductor chip and a second semiconductor chip disposed on an interconnection layer. The semiconductor package may include a heat transferring block disposed between the first and second semiconductor chips to be mounted on the interconnection layer. Related methods are also provided.
US10170453B2	Arrangement and method for generating mixed light The invention relates to an arrangement for generating mixed light, which comprises three semiconductor chips, emitting in the blue spectral range, of three devices. Arranged in the light paths of the individual semiconductor chips are different conversion elements which are configured to convert primary radiation into secondary radiation. The total radiation (S1, S2, S3) exiting the respective devices (10, 20, 30) has a corresponding chromaticity coordinate on the black body curve of the CIE color diagram 1931 or lies within a color quadrilateral of the CIE color diagram.
US10170451B2	Semiconductor device method of manufacture An integrated fan out package on package architecture is utilized along with a reference via in order to provide a reference voltage that extends through the InFO-POP architecture. If desired, the reference via may be exposed and then connected to a shield coating that can be used to shield the InFO-POP architecture. The reference via may be exposed by exposing either a top surface or a sidewall of the reference via using one or more singulation processes.
US10170448B2	Apparatus and method of power transmission sensing for stacked devices Apparatuses for supplying power supply voltage in a plurality of dies are described. An example apparatus includes: a circuit board; a regulator on the circuit board that regulates a first voltage; a semiconductor device on the circuit board that receives the first voltage through a power line in the circuit board. The semiconductor device includes: a substrate on the circuit board, stacked via conductive balls, that receives the first voltage from the power line via the conductive balls; a plurality of dies on the semiconductor device, stacked via bumps, each die including a first conductive via that receives the first voltage via the bumps; a plurality of pillars between adjacent dies and couple the first conductive vias of the adjacent dies; and a sense node switch circuit that selectively couples one first conductive via of one die among the plurality of dies to the regulator.
US10170441B1	Semiconductor structure and manufacturing method thereof A semiconductor structure comprises: a substrate, an alignment mark, pillars, and a seal wall. The alignment mark is adjacent to a surface of the substrate. The pillars protrudes from the substrate. The seal wall protrudes from the surface of the substrate and surrounding the alignment mark. The seal wall is between the pillars and the alignment mark. The pillars is configured into at least two different groups with different average heights. The seal wall around the alignment mark can prevent the alignment mark from the coverage of the flux. Further, the seal wall can be formed with pillars at the same time, and the increased cost is limited.
US10170437B1	Via disguise to protect the security product from delayering and graphic design system (GDS) hacking and method for producing the same A method of forming a stop layer to prevent dummy vias from connecting to a metal layer and the resulting device are provided. Embodiments include forming a first metal layer in a first dielectric layer; forming a second dielectric layer over a first Nblok layer formed over the first dielectric and first metal layers; forming a third dielectric layer over the second dielectric layer and a second Nblok layer formed over a portion of the second dielectric layer; forming a via and a plurality of vias through the third and second dielectric layers down to the second and first Nblok layers, respectively; removing portions of the second and first Nblok layers through the via and the plurality of vias down to the second dielectric layer and the first metal layer, respectively; removing portions of the third dielectric layer through each via; and filling each via with a second metal layer.
US10170433B2	Insulated circuit board, power module and power unit An insulated circuit board includes an insulated substrate, a first electrode, and a second electrode. A thin portion is formed in a corner portion, the corner portion being a region occupying, with regard to directions along outer edges from a vertex of at least one of the first and second electrodes in plan view, a portion of a length of the outer edges, and the thin portion has a thickness smaller than that of a region other than the thin portion. The thin portion in at least one of the first and second electrodes has a planar shape surrounded by first and second sides orthogonal to each other as portions of the outer edges from the vertex, and a curved portion away from the vertex of the first and second sides.
US10170429B2	Method for forming package structure including intermetallic compound Package structures and methods for forming the same are provided. A package structure includes a package component including a first bump. The package structure also includes an intermetallic compound (IMC) on the first bump. The package structure further includes an integrated circuit die including a second bump on the IMC. The integrated circuit die and the package component are bonded together through the first bump and the second bump. The IMC extends from the first bump to the second bump to provide good physical and electrical connections between the first bump and the second bump.
US10170426B2	Manufacturing method of wiring structure and wiring structure A trench is formed in an insulating film, carbon is formed on the insulating film to fill an inside of the trench, a catalytic material is formed on the carbon, heat treatment is performed on the carbon to turn the carbon into graphenes which are stacked in a plurality of layers, and the catalytic material and a part of the graphenes on the insulating film are removed to make the graphenes remain only in the trench.
US10170423B2	Metal cap integration by local alloying A middle-of-line interconnect structure including copper interconnects and integral copper alloy caps provides effective electromigration resistance. A metal cap layer is deposited on the top surfaces of the interconnects. A post-deposition anneal causes formation of the copper alloy caps from the interconnects and the metal cap layer. Selective removal of unalloyed metal cap layer material provides an interconnect structure free of metal residue on the dielectric material layer separating the interconnects.
US10170422B2	Power strap structure for high performance and low current density The present disclosure, in some embodiments, relates to a method of forming an integrated chip. The method is performed by forming gate structures and middle-end-of-the-line (MEOL) structures extending in a first direction over an active area of a substrate. The MEOL structures are interleaved between the gate structures along a second direction. The method further forms a power rail and a first metal wire extending in the second direction. The first metal wire is over the MEOL structures. A double patterning process is performed to form second and third metal wires extending in the first direction over the first metal wire and separated in the second direction. The second metal wire is cut according to a first cut region of a first cut mask to define a first metal strap connecting a first one of the MEOL structures to the power rail.
US10170414B2	Semiconductor device and a method for fabricating the same A semiconductor device includes a dummy fin structure disposed over a substrate, a dummy gate structure disposed over a part of the dummy fin structure, a first interlayer dielectric layer in which the dummy gate structure is embedded, a second interlayer dielectric layer disposed over the first interlayer dielectric layer, and a resistor wire formed of a conductive material and embedded in the second interlayer dielectric layer. The resistor wire overlaps the dummy gate structure in plan view.
US10170412B2	Substrate-less stackable package with wire-bond interconnect A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.
US10170409B2	Package on package architecture and method for making Embodiments of the present disclosure are directed to package assemblies and methods for fabricating package assemblies. In one embodiment, a package assembly includes a die at least partially embedded in a mold compound; and a through mold via (TMV). The TMV may have vertical sides or may include two different portions with varying shapes. In some instances, prefabricated via bars may be used during fabrication. Package assemblies of the present disclosure may include package-on-package (POP) interconnects having a pitch of less than 0.3 mm. Other embodiments may be described and/or claimed.
US10170408B2	Memory circuits and routing of conductive layers thereof A memory circuit memory circuit comprises at least one memory cell for storing a datum. The memory cell is coupled with a word line, a bit line, a bit line bar, a first voltage line, and a second voltage line. A first conductive layer comprising a first landing pad and a second landing pad is arranged at a first level. A second conductive layer is coupled to the first conductive layer and arranged at a second level different from the first level. The second conductive layer is routed to define the first voltage line and the second voltage line. A third conductive layer is coupled to the second conductive layer and arranged at a third level different from the first level and the second level. The third conductive layer is routed to define the word line.
US10170403B2	Ameliorated compound carrier board structure of flip-chip chip-scale package An ameliorated compound carrier board structure of Flip-Chip Chip-Scale Package has the insulating layer between the carrier board and the substrate in the prior art replaced by an anisotropic conductive film or materials with similar structure. The anisotropic conductive film has conductive particles therein to replace the conductive openings on the insulating layer in the prior art. When compressing the substrate onto the carrier board, the bottom surface of the second electrode pads are compressing the corresponding conductive particles on the second electrical contact pads, causing which to burst, therefore forming high-density compressed areas that conduct the second electrode pads and the second electrical contact pads; the conductive particles outside the high-density compressed area are not burst, forming an insulating film between the substrate and the carrier board; in other words, the anisotropic conductive film provides conduction in a Z direction. The structure can avoid the inaccuracies of distance and size of the conductive openings and the inaccuracy of the contact between the second electrode pads and the second electrical contact pads.
US10170401B2	Integrated power module An integrated power module comprising a power board including at least one power switching device, a driver board including at least one driver for driving a gate of the at least one power switching device, and an interconnection extending across the power board and the driver board mechanically connecting the power board and the driver board together. Included are a lead frame to which the power board and the driver board are mounted, and a package encapsulating the power board and the driver board mounted on the lead frame. Also disclosed is a method for manufacturing the integrated power module.
US10170399B2	Capped through-silicon-vias for 3D integrated circuits The present disclosure relates to a chip including a wafer, a back-end-of-line (BEOL) layer deposited on the wafer, a chip TSV in the wafer containing a conductive material, and a chip cap layer disposed between the chip TSV and the BEOL layer, and configured to reduce via extrusion of conductive material in the chip TSV during operation of the chip. The present disclosure further includes a 3D integrated circuit including a plurality of electrically connected chips, at least one of which is a chip as described above. The disclosure further relates to a 3D integrated circuit with an interposer, a TSV in the interposer containing a conductive material, and an interposer cap layer configured to reduce via extrusion of the conductive material located in the interposer TSV during operation of the circuit. The present disclosure further includes methods of forming such chips and 3D integrated circuits.
US10170398B2	Three-dimensional integrated circuit Disclosed is a three-dimensional integrated circuit divided into a plurality of groups and capable of repairing failed through-silicon vias (TSVs). In particular, the three-dimensional integrated circuit includes a plurality of through-silicon vias (TSVs) vertically penetrating the three-dimensional integrated circuit and included in each of the groups, and two or more redundant through-silicon vias (RTSVs), wherein, when the number of failed TSVs in one group exceeds a repairable number, the failed TSVs exceeding the repairable number are repaired using at least one RTSV included in another group adjacent to the group.
US10170395B2	Semiconductor device and a manufacturing method of the semiconductor device A semiconductor device including a semiconductor module 10A, a semiconductor module 10B that has a lower switching voltage threshold than the semiconductor module 10A, and busbars 331 and 32 that connect the semiconductor module 10A and the semiconductor module 10B in parallel to a common terminal. The semiconductor module 10B is connected at a connection point on the busbar 32 at which the inductance relative to the common terminal is higher than that of the semiconductor module 10A. The semiconductor module 10B with the low threshold voltage is turned ON faster than the semiconductor module 10A with the high threshold voltage for input of a common switching voltage, but can restrict the rising of the current due to the high inductance of the busbar 32, thereby enabling restriction of the current imbalance.
US10170392B2	Wafer level integration for embedded cooling Techniques for wafer level integration of embedded cooling structures for integrated circuit devices are provided. In one embodiment, a method includes forming channel structures on a first surface of a silicon first wafer, wherein the channel structures respectively include radial channels that extend from central fluid distribution areas, and wherein integrated circuits are formed on a second surface of the silicon first wafer that opposes the first surface. The method can further include bonding a manifold wafer to the first surface of the silicon wafer such that inlet openings formed through the manifold wafer respectively connect to the central fluid distribution areas, thereby enclosing the radial channels and forming a bonded structure.
US10170387B2	Temporary bonding scheme A method includes filling a trench formed in a first integrated circuit carrier with temporary bonding material to form a temporary bonding layer. At least one chip is bonded over the temporary bonding layer.
US10170370B2	Contact resistance control in epitaxial structures of finFET A method of forming a semiconductor device includes forming fin regions on a substrate, forming a patterned polysilicon structure over the fin regions, and etching back portions of the fin regions to form recessed fin regions. The method further includes forming a merged epitaxial region on the recessed fin regions and forming a capping layer on the merged epitaxial region using an etching gas and a deposition gas. The forming of the capping layer may include epitaxially growing a material of the capping layer faster along a first crystal direction of the capping layer than a second crystal direction of the capping layer by adjusting a ratio of a concentration of a first element in the etching gas to a concentration of a second element in the deposition gas, the first and second elements being different from each other, the first and second crystal directions being different from each other.
US10170369B1	Semiconductor device and fabrication method thereof A semiconductor device includes a substrate having a fin structure extending along a first direction. The fin structure protrudes from a top surface of a trench isolation region and has a first height. A plurality of gate lines including a first gate line and a second gate line extend along a second direction and striding across the fin structure. The first gate line has a discontinuity directly above a gate cut region. The second gate line is disposed in proximity to a dummy fin region, and does not overlap with the dummy fin region. The fin structure has a second height within the dummy fin region, and the second height is smaller than the first height.
US10170366B2	Semiconductor device having dummy gates and method of fabricating the same A semiconductor device is provided as follows. Active fins protrude from a substrate, extending in a first direction. A first device isolation layer is disposed at a first side of the active fins. A second device isolation layer is disposed at a second side of the active fins. A top surface of the second device isolation layer is higher than a top surface of the first device isolation layer and the second side is opposite to the first side. A normal gate extends across the active fins in a second direction crossing the first direction. A first dummy gate extends across the active fins and the first device isolation layer in the second direction. A second dummy gate extends across the second device isolation layer in the second direction.
US10170359B2	Diffusion barrier layer formation A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to a first pulse of a nitrogen-rich plasma to form a first TiN layer with a first nitrogen concentration making a lower portion of the TiN diffusion barrier, the first nitrogen concentration of the first TiN layer is increased by the first pulse of the nitrogen-rich plasma reducing a reactivity of the lower portion of the TiN diffusion barrier to prevent fluorine diffusion. The first TiN layer is exposed to second pulses of the titanium-containing precursor and the nitrogen-rich plasma to form a second TiN layer with a second nitrogen concentration above the first TiN layer making an upper portion of the TiN diffusion barrier, the first pulse of the nitrogen-rich plasma has a substantially longer duration than the second pulse of the nitrogen-rich plasma.
US10170358B2	Reducing contact resistance in vias for copper interconnects A method of forming an electrical transmission structure that includes forming an opening through an interlevel dielectric layer to expose at least one electrically conductive feature and forming a shield layer on the opening. A gouge is formed in the electrically conductive feature through the opening using a subtractive method during which the shield layer protects the interlevel dielectric layer from being damaged by the subtractive method. A contact is formed within the opening in electrical communication with the at least one electrically conductive feature.
US10170355B2	Semiconductor device and manufacturing method thereof In a method for manufacturing a semiconductor device, a first dielectric layer is formed over a substrate. A first set of recesses is formed in the first dielectric layer. A metal layer is formed in the first set of recesses. A set of metal wirings is formed from the metal layer in the first set of recesses. A second set of recesses is formed in the first dielectric layer. A second dielectric layer is formed over the set of metal wirings and in the second set of recesses. A third set of recesses is formed in the first dielectric layer and the second dielectric layer. A third dielectric layer is formed over the metal wirings and in the third set of recesses.
US10170354B2	Subtractive methods for creating dielectric isolation structures within open features A method for partially filling an open feature on a substrate includes receiving a substrate having a layer with at least one open feature formed therein, wherein the open feature penetrates into the layer from an upper surface and includes sidewalls extending to a bottom of the open feature. The open feature is overfilled with an organic coating that covers the upper surface of the layer and extends to the bottom of the open feature. The method further includes removing a portion of the organic coating to expose the upper surface of the layer and recessing the organic coating to a pre-determined depth from the upper surface to create an organic coating plug of pre-determined thickness at the bottom of the open feature, and converting the chemical composition of the organic coating plug to create an inorganic plug.
US10170353B2	Devices and methods for dynamically tunable biasing to backplates and wells Devices and methods of fabricating integrated circuit devices for dynamically applying bias to back plates and/or p-well regions are provided. One method includes, for instance: obtaining a wafer with a silicon substrate, at least one first oxide layer, at least one silicon layer, and at least one second oxide layer; forming at least one recess in the wafer; depositing at least one third oxide layer over the wafer and filling the at least one recess; depositing a silicon nitride layer over the wafer; and forming at least one opening having sidewalls and a bottom surface within the filled at least one recess. An intermediate semiconductor device is also disclosed.
US10170351B2	Transferring apparatus and method for manufacturing an integrated circuit device In one embodiment a transferring apparatus comprises a rail connected to a frame, a travelling part including a wheel that travels along the rail and a loading part for loading an object, and a particle collection receptacle provided at a side of the rail and configured to collect particles generated due to friction between the wheel and the rail when the wheel travels along the rail. A method of manufacturing an integrated circuit device using the transferring apparatus includes moving the travelling part to the object, picking up the object with the loading part thereby loading the object on the loading part, using the travelling part to move the object to a chamber, and forming a semiconductor device using the object.
US10170347B2	Substrate processing system A substrate processing system for performing a process with respect to a plurality of substrates includes an annular process chamber configured to accommodate the plurality of substrates and to perform a predetermined process on the plurality of substrates, a cassette mounting part configured to mount a cassette which accommodates the plurality of substrates, and a substrate transfer mechanism configured to transfer the plurality of substrates between the annular process chamber and the cassette mounting part. The plurality of substrates is concentrically disposed within the annular process chamber in a plane view.
US10170344B2	Washing device and washing method A washing device includes: a plurality of spindles which holds a substrate and rotates the substrate about a central axis of the substrate as a rotary axis; and a single tube nozzle which discharges a washing liquid toward an upper surface of the substrate, wherein the single tube nozzle discharges the washing liquid so that the washing liquid lands in front of the center of the substrate and the landed washing liquid flows on the upper surface of the substrate toward the center of the substrate. A liquid flow on the upper surface of the substrate after landing of the washing liquid discharged from the single tube nozzle passes through the center of the substrate.
US10170335B1	Chemical mechanical polishing method for cobalt A process for chemical mechanical polishing a substrate containing cobalt and TiN to at least improve cobalt: TiN removal rate selectivity. The process includes providing a substrate containing cobalt and TiN; providing a polishing composition, containing, as initial components: water; an oxidizing agent; alanine or salts thereof; and, colloidal silica abrasives with diameters of ≤25 nm; and, providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the cobalt is polished away such that there is an improvement in the cobalt: TiN removal rate selectivity.
US10170333B2	Guard ring structure of semiconductor arrangement Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.
US10170332B2	FinFET thermal protection methods and related structures A method and structure for protecting high-mobility materials from exposure to high temperature processes includes providing a substrate having at least one fin extending therefrom. The at least one fin includes a dummy channel and source/drain regions. A dummy gate stack is formed over the dummy channel. A first inter-layer dielectric (ILD) layer is formed on the substrate including the fin. The first ILD layer is planarized to expose the dummy gate stack. After planarizing the first ILD layer, the dummy gate stack and the dummy channel are removed to form a recess, and a high-mobility material channel region is formed in the recess. After forming the high-mobility material channel region, contact openings are formed within a second ILD layer overlying the source/drain regions, and a low Schottky barrier height (SBH) material is formed over the source/drain regions.
US10170329B2	Spacer formation for self-aligned multi-patterning technique Embodiments of systems and methods for spacer formation for SAMP techniques are described. In an embodiment a method includes providing a substrate with a spacer having a conformal coating. The method may also include performing a spacer freeze treatment process. Additionally, the method may include performing an etch and clean process on the substrate. Further, the method may include controlling the spacer treatment process and etch and clean process in order to achieve spacer formation objectives.
US10170323B2	Technique to deposit metal-containing sidewall passivation for high aspect ratio cylinder etch Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating (e.g., a metal-containing coating) on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. Metal-containing coatings have been shown to provide particularly good resistance to lateral etch during the etching operation. In some cases, a bilayer approach may be used to deposit the protective coating on sidewalls of partially etched features.
US10170322B1	Atomic layer deposition based process for contact barrier layer Interconnect structures and corresponding techniques for forming the interconnect structures are disclosed herein. An exemplary method includes forming a contact opening in a dielectric layer. The contact opening has sidewalls defined by the dielectric layer and a bottom defined by a conductive feature. An ALD-like nitrogen-containing plasma pre-treatment process is performed on the sidewalls (and, in some implementations, the bottom) of the contact opening. An ALD process is performed to form a titanium-and-nitrogen containing barrier layer over the sidewalls and the bottom of the contact opening. A cobalt-containing bulk layer is then formed over the titanium-and-nitrogen-containing barrier layer. A cycle of the ALD-like nitrogen-containing plasma pre-treatment process can include a nitrogen-containing plasma pulse phase and a purge phase. A cycle of the ALD process can include a titanium-containing pulse phase, a first purge phase, a nitrogen-containing plasma pulse phase, and a second purge phase.
US10170321B2	Aluminum content control of TiAIN films Described are methods of depositing a titanium aluminum nitride film on a substrate surface with a controlled amount of carbon. The methods include exposing a substrate surface to a titanium precursor, a nitrogen reactant and an aluminum precursor with purges of the unreacted titanium and aluminum precursors and unreacted nitrogen reactants between each exposure.
US10170320B2	Feature fill with multi-stage nucleation inhibition Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. The methods include performing multi-stage inhibition treatments including intervals between stages. One or more of plasma source power, substrate bias power, or treatment gas flow may be reduced or turned off during an interval. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.
US10170318B2	Self-aligned contact and manufacturing method thereof A semiconductor device and a method of forming the semiconductor device are disclosed. A method includes forming a gate stack over a semiconductor structure. The gate stack is recessed to form a first recess. A first dielectric layer is formed along a bottom and sidewalls of the first recess, the first dielectric layer having a first etch rate. A second dielectric layer is formed over the first dielectric layer, the second dielectric layer having a second etch rate, the first etch rate being higher than the second etch rate. A third dielectric layer is formed over the second dielectric layer. An etch rate of a portion of the third dielectric layer is altered. The first dielectric layer, the second dielectric layer, and the third dielectric layer are recessed to form a second recess. A capping layer is formed in the second recess.
US10170314B2	Pulsed laser anneal process for transistor with partial melt of a raised source-drain A non-planar transistor including partially melted raised semiconductor source/drains disposed on opposite ends of a semiconductor fin with the gate stack disposed there between. The raised semiconductor source/drains comprise a super-activated dopant region above a melt depth and an activated dopant region below the melt depth. The super-activated dopant region has a higher activated dopant concentration than the activated dopant region and/or has an activated dopant concentration that is constant throughout the melt region. A fin is formed on a substrate and a semiconductor material or a semiconductor material stack is deposited on regions of the fin disposed on opposite sides of a channel region to form raised source/drains. A pulsed laser anneal is performed to melt only a portion of the deposited semiconductor material above a melt depth.
US10170312B2	Semiconductor substrate and manufacturing method of the same Present disclosure provides a method for manufacturing a semiconductor wafer with an epitaxial layer at a front surface of the semiconductor wafer, including providing the semiconductor wafer with a first dopant concentration of a dopant having a first conductivity type, forming a polysilicon layer over the front surface, removing the polysilicon layer from the front surface, and depositing the epitaxial layer at the front surface with a second dopant concentration of the dopant having the first conductivity type under a predetermined temperature. A transition width of the dopant having the first conductivity type across the semiconductor wafer and the epitaxial layer is controlled by the predetermined temperature to be at least about 0.75 micrometer. A semiconductor device and a semiconductor wafer with an epitaxial layer at a front surface of the semiconductor wafer are also disclosed.

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