最新美国发明专利第2018-11-27期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US10142022B1	Adjustment of control parameters of section of optical fiber network Adjustment of one or more control parameters of a section of an optical fiber network involves taking measurements of optical signals in the section, deriving estimated data from the measurements and from knowledge of the section, where the estimated data is a function of optical nonlinearity and of amplified spontaneous emission, and applying one or more control algorithms using the estimated data to adjust the one or more control parameters.
US10142020B2	Reproduction method for reproducing contents In one embodiment, such a method may include receiving a visible light signal by a sensor of a terminal device from a transmitter which transmits the visible light signal by a light source changing in luminance. The terminal device may transmit a request signal for requesting content associated with the visible light signal, from the terminal device to a server, and receive a content from the server. The content may include time points and data to be reproduced at the time points. Thereafter the terminal device may reproduce data included in the content and corresponding to a time point of a clock included in the terminal device.
US10142017B1	Beacon demodulation with background subtraction Aspects of the disclosure provide for a method for determining a position of a beacon. A plurality of frames comprising pixel values is collected. Each frame is an image of a location. A static background of the location is determined by averaging the pixel values of the plurality of frames, pixel difference values are determined for each frame by subtracting the determined static background from the pixel values of each frame. Using the pixel difference values for each frame in the plurality of frames, a first subset of frames and a second subset of frames are identified. An average pixel difference is then determined by averaging the pixel difference values of the first subset of frames and an inverse of the pixel difference values of the second subset of frames. Using the average pixel difference, the position of a beacon at the location is determined.
US10142014B2	Multi-function device and terminal device A system and method for providing network information using a short-range wireless communication path between a communication device and a terminal device is described. In some examples, authentication information is required from the terminal device prior to communication of the network information. In some examples, the short-range wireless communication path is disconnected and reestablished in which one of the terminal device and the communication device changes operation modes of a short-range wireless interface.
US10142009B2	Interface module for a unit of an antenna distribution system, and antenna distribution system A distributed antenna system includes at least one master unit communicatively coupled to at least one base station and a plurality of remote units located remotely from the at least one master unit. The plurality of remote units are communicatively coupled to the master unit over at least one transport communication link. The system is configured to distribute uplink and downlink signals between a base station and mobile units. A digital unit generates digital samples indicative of spectrum included in at least one of the uplink and downlink signals. A network interface communicates with an external computer. The digital unit is configured to process the digital samples and communicate information indicative of the spectrum to the external computer via the network interface.
US10142006B1	Amplitude and phase calibration at a receiver chip in an antenna array A calibration system, in a receiver chip, receives a plurality of receive signals at a plurality of receive paths. A first receive path and a second receive path is selected for a first receive signal and a second receive signal, respectively. A first signal parameter of the second receive signal is adjusted relative to the first signal parameter of the first receive signal to maximize a first signal strength value of an added signal or minimize a second signal strength value of a subtracted signal. Based on the adjusted first signal parameter, an offset of the first signal parameter is calibrated. Further, based on a matching of the second signal parameter in the second receive path relative to the second signal parameter in the first receive path, value of the second signal parameter is calibrated.
US10142002B2	Method of handling multiuser CQI for MU-MIMO and related communication device A method of handling multiuser channel quality indicators (MU-CQIs) for a communication device comprises transmitting a highest MU-CQI periodically to a network; and transmitting at least one MU-CQI aperiodically to the network according to a request transmitted by the network.
US10141998B2	Utilization of antenna beam information There is provided a method for utilizing antenna beam information. The method is performed by a network node. The method comprises acquiring antenna beam information indicative of a direction of a wireless device (WD) specific beam of the network node. The method comprises classifying the acquired antenna beam information into a cell specific beam category based on an angular difference between the direction and a direction of main lobe of a cell specific beam of the network node. The method comprises performing at least one of a load balancing action of the wireless device and a radiation beam pattern change related to the cell specific beam category.
US10141994B2	Technique for reducing responding sector sweep time for millimeter-wave devices Certain aspects of the present disclosure provide techniques that may help reduce sector sweep time. In some cases, the techniques involve generating frames for transmission during a sector sweep procedure, each frame including an address field being determined based on at least one of a transmitter address of the apparatus or a receiver address of an intended recipient of the generated frames and having fewer bits than at least one of the transmitter address or the receiver address. In some cases, the techniques involve using different frame formats for initiator and responder frames transmitted during the sector sweep procedure.
US10141991B2	Adaptive codeword and codeblock selection in wireless communications A transmitter may initiate multiple-input multiple-output (MIMO) communications with a receiver in which a number of codewords used in MIMO transmissions may be selected to provide enhanced communications for a particular service that is associated with the MIMO transmission. In cases where a lower-latency service is identified, a MIMO transmission may be configured with one codeword transmitted over multiple spatial layers, which may provide lower processing latency at a receiver relative to processing of multiple codewords. In cases where a mobile broadband service is identified, a MIMO transmission configured with two (or more) codewords may be transmitted over multiple spatial layers, which may provide increased data throughput relative to a single codeword MIMO transmission. A codeblock size for a transmission also may be selected based at least in part on a service associated with the transmission.
US10141989B2	System and method for quantization of angles for beamforming feedback An embodiment method for beamforming feedback includes receiving a sounding packet for a beamforming transmission, performing planar rotation in accordance with the sounding packet to generate phi and psi angle values, quantizing the phi and psi angle values to a same bit resolution, and feeding back the quantized phi and psi angle values.
US10141983B2	Method for activating pSCell and SCell in mobile communication system supporting dual connectivity The present disclosure relates to communication methods and systems for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system utilizing technology for Internet of Things (IoT). The present disclosure is applicable to intelligent services utilizing 5G communication technology and IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A Secondary Cell (SCell) method and apparatus for activating an SCell are provided for use in a mobile communication system supporting dual connectivity. The method includes receiving a control message instructing activation of at least one SCell, determining whether the SCell is a primary SCell (pSCell) based on the control message, monitoring, when the SCell is the pSCell, a Physical Downlink Control Channel (PDCCH) of the pSCell, and reporting, after starting PDCCH monitoring, Channel Status Information (CSI) for the SCell.
US10141981B2	Methods and apparatus for determining nearfield localization using phase and RSSI delivery Methods and apparatus to determine nearfield localization using phase and received signal strength indication (RSSI) diversity are disclosed. An example method includes determining a first strength of an electric field and a second strength of a magnetic field, the electric field and the magnetic field associated with an electromagnetic signal sent from a transmitter; determining a difference between the first strength and the second strength; and determining a transmitter distance based on the difference between the first strength and the second strength.
US10141977B2	Special operations channel in vectored systems Methods and devices are provided wherein a signal sent on a special operation channel is modified by an identification of a line.
US10141975B2	Method and apparatus for communicating network management traffic over a network Aspects of the subject disclosure may include, for example, determining whether communications are encrypted, determining a communication type for the communications according to sensitivity criteria, encrypting the communications according to the communication type to generate encrypted communications, and transmitting to a second network device the encrypted communications. Other embodiments are disclosed.
US10141970B2	Transceiver circuit and methods for tuning a communication system and for communication between transceivers A transceiver circuit with a front-end and a back-end is provided. The front-end has terminals for coupling to a first and a second capacitor and tunable resistors coupled between the terminals and a reference terminal. The front-end is configured to receive receiver signals at the terminals utilizing a first setting for the resistors. The front-end is configured to generate a receiver data packet based on the receiver signals. The back-end is configured to check the receiver data packet for errors with respect to a defined tuning data packet. If an error is found, the back-end sets the resistors to a default setting. If no errors are found, the back-end sets the resistors to a second setting.
US10141962B2	Demodulator A demodulator includes: a demodulation section that outputs a demodulated signal demodulated from a modulated signal; an integration section 60a that integrates the demodulated signal; a zone detection section 60b that detects a replacement target zone in the demodulated signal based on an integrated signal output by the integration section; and a replacement section 60c that replaces a signal of the replacement target zone in the demodulated signal with a replacement target signal. A noise can be removed by integrating the demodulated signal by the integration section, and detecting a replacement target zone in the demodulated signal by the zone detection section based on the integrated signal.
US10141950B2	Low density parity check decoder A method and system for decoding low density parity check (“LDPC”) codes. A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes decoding circuitry configured to process blocks of an LDPC matrix. The decoding circuitry includes a control unit that controls processing by the decoding circuitry. The control unit is configured to cause the decoding circuitry to process blocks of a layer of the LDPC matrix out of order.
US10141946B1	Multi-path analog system with multi-mode high-pass filter A system may include an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a variable resistor coupled to the output and having a plurality of modes including a first mode in which the variable resistor has a first resistance and a second mode in which the variable resistor has a second resistance, and control circuitry configured to determine a difference between the input signal and the output signal and switch between modes of the plurality of modes when the difference is less than a predetermined threshold.
US10141942B1	Apparatuses and methods for providing frequency divided clocks Apparatuses and methods for providing frequency divided clocks are described. An example apparatus includes a first circuit configured to provide a first intermediate clock responsive, at least in part, to a first input clock, the first intermediate clock being lower in frequency than the first input clock and further includes a second circuit configured to provide a second intermediate clock and a third intermediate clock responsive, at least in part, to a second input clock, the second intermediate clock being complementary to the third intermediate clock and lower in frequency than the second input clock. The apparatus further includes a third circuit configured to select and provide as an output clock one of the second and third intermediate clocks responsive, at least in part, to the first and second intermediate clocks.
US10141938B2	Stacked columnar integrated circuits An example semiconductor device includes a first integrated circuit (IC) die including a first column of cascade-coupled resource blocks; a second IC die including a second column of cascade-coupled resource blocks, where an active side of the second IC die is mounted to an active side of the first IC die; and a plurality of electrical connections between the active side of the first IC and the active side of the second IC, the plurality of electrical connections including at least one electrical connection between the first column of cascade-coupled resource blocks and the second column of cascade-coupled resource blocks.
US10141932B1	Wiring with external terminal Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a pad included in a pad formation area that receives a power voltage; a sub-threshold current reduction circuit (SCRC) included in a peripheral circuit area including a via disposed on a first side of the peripheral circuit area, and a wiring that couples the pad to the via. The SCRC further includes: a voltage line coupled to the via; a logic gate circuit that propagates a signal; an SCRC voltage line coupled to the logic gate circuit; and a SCRC switch disposed in proximity to the via and couples the SCRC voltage line to the voltage line.
US10141931B2	Memory device, memory system including the same, and slew rate calibration method thereof A memory device includes a main driver and a pre-driver. The main driver provides an output signal to a host based on a plurality of driving signals. The pre-driver provides the main driver with the plurality of driving signals in order to calibrate a slew rate of the output signal based on an output resistance value of the main driver and a resistance value of an on-die termination circuit of the host. The pre-driver is configured to generate a first driving signal of the plurality of driving signals in response to an input signal regardless of a control signal, and to generate a second driving signal of the plurality of driving signals in response to the input signal and the control signal.
US10141929B2	Processing electromagnetic interference signal using machine learning In one embodiment, a method includes receiving, by an electrode of a device, a signal from a user's body. The received signal is based on an electromagnetic interference signal generated by an object that is external to the device. The method further includes determining, using machine learning applied to the received signal, one or more of the following: an identity of the object, an interaction between the user and the object, or a context surrounding the device.
US10141927B2	Optimized RF switching device architecture for impedance control applications A switch architecture having open reflective unselected ports. Signals can be selectively coupled between a common port and at least one selectable port through series connected switches. When one or more port is selected, the remaining ports are opened. In addition, associated “shuntable” switches from each of the selectable ports to ground are always open, regardless of the ON or OFF state of the series switches; thus, there is no normally active connection of the selectable ports to ground, but the presence of the shuntable switches provides electrostatic discharge protection for all ports. Embodiments of the invention allow configurability between a traditional architecture and an open reflective unselected port architecture, and include integrated circuit and field effect transistor embodiments.
US10141926B2	Ultra-low power cross-point electronic switch apparatus and method An electrical switch circuit adapted to switch digital, high-speed signals with low power includes a plurality of input buffers each coupled to an input transmission line of a plurality of input transmission lines, wherein each input buffer utilizes a digital inverter; a plurality of output buffers each coupled to an output transmission line of a plurality of output transmission lines, wherein each output buffer utilizes a digital inverter; and a plurality of switches each coupled to an associated input transmission line and an associated output transmission line, wherein each of the input transmission line, the output transmission line, and the plurality of switches are in a single line configuration. For the low power, each of the input buffers, the output buffers, the input transmission lines, and the output transmission lines can be unterminated.
US10141925B1	Circuits and methods for strengthening load transient response compensation A circuit for strengthening load transient response compensation is provided, including a comparator, a first MOSFET and a second MOSFET. The comparator compares a system voltage of an electronic device with a reference voltage. The first MOSFET is coupled to the comparator and a first power supply. The second MOSFET is coupled to the comparator and a second power supply of the electronic device. When an external device is connected to the electronic device such that the system voltage is lower than the reference voltage, the comparator outputs a low-level signal and the first MOSFET becomes conductive, so that the external device is powered by the first power supply.
US10141924B2	Semiconductor circuit, voltage detection circuit, and voltage determination circuit A semiconductor circuit including a PMOS transistor that includes a first source connected to a power supply, a first drain, and a first gate to which a fixed potential is supplied; an output circuit that outputs a first output signal, which is a reset signal or a power-on signal, and that outputs a second output signal according to a potential of the first drain; a constant current source connected to the first drain; and an NMOS transistor that includes a second source to which a fixed potential is supplied, a second drain connected to the first drain, and a second gate to which the second output signal from the output circuit is applied.
US10141916B2	High-speed flip-flop semiconductor device A semiconductor circuit includes a first logic gate that receives inputs of a first input signal, a clock signal and a feedback signal and performs a first logical operation to output a first output signal. A second logic gate that receives inputs of the first output signal of the first logic gate, the clock signal, and an inverted output signal of the first input signal and performs a second logical operation to output the feedback signal.
US10141915B2	Sequenced pulse-width adjustment in a resonant clocking circuit A clock driver control scheme for a resonant clock distribution network provides robust operation by controlling a pulse width of the output of clock driver circuits that drive the resonant clock distribution network so that changes are sequenced. The clock driver control circuit controls the clock driver circuits in the corresponding sector according to a selected operating mode via a plurality of control signals provided to corresponding clock driver circuits. The pulse widths differ for at least some of the sectors during operation of digital circuits within the integrated circuit having clock inputs coupled to the resonant clock distribution network. The different pulse widths may be a transient difference that is imposed in response to a mode or frequency change of the global clock that provides an input to the clock driver circuits.
US10141914B2	Oscillation circuit An oscillation circuit includes a delay circuit that includes a first inverter having an input terminal connected to a first node, a delay adjustment circuit including first and second current supply paths through which the first node is charged in response to an output signal of the delay circuit. During charging of the first node, a current with positive temperature characteristics is supplied to the first node through the first current supply path, and a current with negative temperature characteristics is supplied to the first node through the second current supply path.
US10141912B2	RF resonators and filters A filter package comprising an array of piezoelectric films sandwiched between an array of upper electrodes and lower electrodes: the individual piezoelectric films and the upper electrodes being separated by a passivation material; the lower electrode being coupled to an interposer with a first cavity between the lower electrodes and the interposer; the filter package further comprising a silicon wafer of known thickness attached over the upper electrodes with an array of upper cavities between the silicon wafer and a silicon cover; each upper cavity aligned with a piezoelectric film in the array of piezoelectric films, the upper cavities having side walls comprising the passivation material.
US10141905B2	Amplifier with adjustment of the automatic sound level A method is provided for producing a volume gain applied by an amplifier to at least one audio signal according to a desired volume gain selected by a user, which includes calculating a standardized total slow sound level from at least one audio signal, calculating maximum slow volume gain and minimum slow volume gain as the quotient of the product of the desired volume gain by maximum slow gain, respectively by minimum slow gain, divided by the standardized total slow sound level, determining a first minimum out of the desired volume gain and the maximum slow volume gain, determining a second minimum out of the desired volume gain multiplied by a maximum volume gain and the minimum slow volume gain, determining as a slow volume gain the maximum of the first and second previously determined minima, and calculating the volume gain according to the slow volume gain.
US10141903B2	Methods and systems for controlling audio output of an exterior vehicle audio system An audio system for a vehicle is described. The audio system includes an audio control computer device and an exterior audio assembly. The audio control computer device is in communication with a memory device. The audio control computer device is configured to store, in the memory device, at least one limited volume level and a corresponding speed range, receive a speed-related parameter indicative of an actual speed of the vehicle from a vehicle control system, determine if the actual speed of the vehicle is within the stored speed range based on the speed-related parameter, and permit operation of the exterior audio assembly at the at least one limited volume level when the actual speed of the vehicle is within the speed range.
US10141901B2	Flip-chip amplifier with termination circuit Disclosed are devices and methods for improving power added efficiency and linearity of radio-frequency power amplifiers implemented in flip-chip configurations. In some embodiments, a harmonic termination circuit can be provided so as to be separate from an output matching network configured to provide impedance matching at a fundamental frequency. The harmonic termination circuit can be configured to terminate at a phase corresponding to a harmonic frequency of the power amplifier output. Such a configuration of separate fundamental matching network and harmonic termination circuit allows each to be tuned separately to thereby improve performance parameters such as power added efficiency and linearity.
US10141899B2	Broadband radio frequency power amplifiers, and methods of manufacture thereof An embodiment of an amplifier has a bandwidth defined by low and upper cutoff frequencies. The amplifier includes an input impedance matching circuit and a transistor. The transistor has a gate, a first current conducting terminal coupled to an output of the amplifier, and a second current conducting terminal coupled to a reference node. The input impedance matching circuit has a filter input coupled to an input of the amplifier, a filter output coupled to the gate of the transistor, and a multiple pole filter coupled between the filter input and the filter output. A first pole of the filter is positioned at a first frequency within the bandwidth, and a second pole of the filter is positioned at a second frequency outside the bandwidth. The input impedance matching circuit is configured to filter the input RF signal to produce a filtered RF signal at the filter output.
US10141896B2	Curve fitting circuit, analog predistorter, and radio frequency signal transmitter A curve fitting circuit, an analog predistorter, and a radio frequency signal transmitter are disclosed. Each segmentation processing circuit in the curve fitting circuit generates a to-be-processed signal according to a intercepted part of a received signal, and generates q output signals according to the to-be-processed signal. Parts intercepted by different segmentation processing circuits are not exactly the same. Each first adder circuit in the curve fitting circuit receives one signal in the q output signals of each segmentation processing circuit, and obtains one output signal of the curve fitting circuit according to a sum of received n signals.
US10141895B2	Systems and methods for optimizing amplifier operations Methods and systems for optimizing amplifier operations are described. The described methods and systems particularly describe a feed-forward control circuit that may also be used as a feed-back control circuit in certain applications. The feed-forward control circuit provides a control signal that may be used to configure an amplifier in a variety of ways.
US10141891B2	Power amplifier with supply switching A power amplifier with supply switching is provided. The power amplifier detects a magnitude of an outgoing broadband communication signal and determines whether the magnitude exceeds a predetermined voltage threshold. The power amplifier applies a first gain to the outgoing broadband communication signal using a first voltage supply rail when it is determined that the magnitude exceeds the predetermined voltage threshold and a second gain using a second voltage supply rail that is smaller than the first voltage supply rail when it is determined that the magnitude does not exceed the predetermined voltage threshold. The power amplifier produces an output signal from the outgoing broadband communication signal with the applied first gain or the applied second gain, wherein a current of the outgoing broadband communication signal is switched between the first voltage supply rail and the second voltage supply rail in response to the magnitude being detected.
US10141889B2	Semiconductor integrated circuit, sensor reader, and sensor readout method In a sensor reader, an IC chip has a function for amplifying and outputting a sensor signal from each sensor element included in a sensor array, and includes a plurality of channel amplifiers connected each of the sensor elements. When an output switch is closed and the IC chip is in the outputting state, channel switches operate sequentially, and sensor amplification signals are output sequentially from the channel amplifiers. When the output switch is open and the IC chip is in the non-outputting state, a bias current of an operational amplifier of the channel amplifier is decreased, the IC chip is set to a low power consumption state, and gain of the operational amplifier is decreased.
US10141888B2	Double balanced mixer A FET based double balanced mixer (DBM) that exhibits good conversion gain and IIP3 values and provides improved linearity and wide bandwidth. In one embodiment, a first balun is configured to receive a local oscillator (LO) signal and generate two balanced LO signals that are coupled to two corresponding opposing nodes of a four-node FET ring. A second balun is configured to pass an RF signal on the unbalanced side. The FET ring includes at least four FETs connected as branches of a ring, with the source of each FET connected to the drain of a next FET in the ring. Each FET is preferably fabricated as, or configured as, a low threshold voltage device having its gate connected to its drain, which causes the FET to operate as a diode, but with the unique characteristic of having close to a zero turn-on voltage.
US10141885B2	Floating solar panel systems A floating solar system having a peripheral buoyant pontoon within which is suspended an array of individual photovoltaic panels each equipped with a float. A stabilizing skirt drops down into the water underneath the pontoon and creates a more placid “moon pool” within the pontoon to reduce turbulence from wave action and therefore enhance the efficiency of the array of photovoltaic panels. A plurality of the floating solar systems may be aggregated to form an island of units. The individual panels or rows or columns thereof may be flat (horizontal) or tilted so that they can be oriented more normally with regard to the sun's rays.
US10141884B2	Cooling fan filtering A method for cooling system components of information handling systems may include generating a first pulse width modulation (PWM) control signal for controlling at least one cooling fan configured to cool a system component, filtering the first PWM control signal, and applying the filtered first PWM control signal to the at least one cooling fan. The first PWM control signal may be used to control a component fan and then filtered to generate a filtered first PWM control signal used to control a system fan. The filtering of the control signal may include dampening the control signal such that the control signal is less responsive to temperature changes as the temperature nears a set temperature.
US10141883B2	Input stage for a motor controller, and motor controller, especially for an electric motor The invention relates to an input stage (1) for a motor controller (2), especially a motor controller for an electric motor, the input stage (1) being provided with an input (3) for inputting an input signal and an output (4) for connection to the motor controller (2). The input stage (1) is designed to generate a control signal from an input signal between a first voltage Uunten and a second voltage Uoben>Uunten and output said control signal as a parameter to the motor controller (2) via the output (4). In order to be able to simultaneously use the control input (13) for communicating, the input stage (1) comprises a first comparator (5) for comparing the input signal with a first threshold voltage Us1>Uoben as well as a data output unit (10). The data output unit (10) generates a communication signal on the basis of at least one portion of the input signal. When the input signal reaches or exceeds the first threshold voltage Us1, the first comparator (5) outputs an activation signal which activates output of the communication signal to the output (4) by the data output unit (10). The invention further relates to a motor controller, especially for an electric motor, comprising a corresponding input stage, and to an interface adapter for the input stage.
US10141882B2	Motor health monitoring and medical device incorporating same Apparatus are provided for motor control systems and related medical devices. In one embodiment, a control system includes a motor having a rotor, a modulation module coupled to the motor, and a control module coupled to the motor and the modulation module. The modulation module generates a modulated voltage that is applied to the motor, and the control module adjusts a duty cycle of the modulated voltage to achieve a commanded rotation of the rotor and detects a degradation condition based on the duty cycle.
US10141880B2	Driving circuit for voice coil motor having a first driver coupled to a first end of a coil and a second driver coupled to a second end of the coil With a driving current as IDRV, with a reference voltage as VREF, and with a gain as k, a current detection circuit generates a detection voltage VS represented by VS=VREF+k×IDRV. An error amplifier amplifies a difference between the detection voltage VS and a control voltage that indicates a position of the VCM so as to generate an error voltage VERR. A first driver switches the driving current IDRV between a source current and a sink current with respect to one end of the coil according to the error voltage VERR. A second driver switches the driving current IDRV between a sink current and a source current with respect to the other end of the coil according to the error voltage VERR. The driving circuit allows an external circuit to set the level of the reference voltage VREF.
US10141879B2	Motor control apparatus, sheet conveyance apparatus, document feeding apparatus, document reading apparatus, and image forming apparatus An apparatus, to control a motor from an instructed phase indicating a motor rotor target phase, includes a detector, a phase determiner, a converter, and a controller. The detector detects a motor winding driving current. The phase determiner determines a rotor rotation phase from the detected driving current. The converter converts a detected current value in a stationary coordinate system into a current value in a rotational coordinate system from the determined rotation phase. The controller includes a first mode for controlling the driving current to cause a determined phase deviation between the instructed and rotation phases to decreased, and a second mode for controlling the driving current from a current having a previously determined magnitude. On switching the mode from the second to the first mode, the first mode target value is set from a driving current value corresponding to a current component represented by the rotational coordinate system.
US10141877B2	Controller for permanent magnet synchronous motor, control method, and image forming apparatus A method for controlling a permanent magnet synchronous motor having a rotor using a permanent magnet, the rotor rotating by a rotating magnetic field caused by a current flowing through an armature is provided. The method includes: presuming, based on a target speed and an estimated speed that is an estimated value of a rotational speed of the rotor, whether or not a step-out occurs; correcting, when it is presumed that a step-out occurs, an estimated angle that is an estimated value of a position of magnetic poles of the rotor; and controlling, based on a post-correction estimated angle that is the estimated angle after the correction, a current flowing through the armature to cause the rotating magnetic field rotating at the target speed.
US10141876B2	Power generator system, power generator control device, and power-generation balance control method for power generator system A master generator is configured to use a duty upper limit value and a duty lower limit value to perform duty restriction processing on a PWM signal in continuous Y cycles out of generated X cycles, and transmit the PWM signal after the restriction processing to a slave generator. The slave generator is configured to receive the PWM signal after the restriction processing transmitted from the master generator as a received PWM signal, and determine that a reception abnormality exists when the received PWM signal is received as a signal representing a duty less than the duty lower limit value or a duty more than the duty upper limit value in continuous (X−Y+1) cycles.
US10141871B2	Method and system for controlling a control installation of an electric motor A control method which is deployed in a control installation of an electric motor, the control installation including a first converter controlled for the application of the first voltage pulse edges to an electric motor of a first pulse width modulation, obtained by comparing a first carrier signal, applied at a first chopping frequency, with a first modulating signal, a second converter controlled of a second pulse width modulation, obtained by comparing a second carrier signal, applied at a second chopping frequency, with a second modulating signal. The control method involves the determination of a notional optimum phase-shift angle on the basis of the first chopping frequency and the second chopping frequency.
US10141866B2	Multi-level inverter with first and second switch banks Various examples are directed to systems and methods for a multi-level inverter to convert direct current (DC) to alternating current (AC). The inverter may comprise first, second and third capacitors electrically coupled in series between a positive DC rail and a negative DC rail. A first pole switch bank of the inverter may comprise a plurality of first pole switches. A first pole may be electrically coupled to the first pole switch bank. A control circuit may comprise at least one processor that is programmed to alternately switch the first pole switch bank to a first state of the first pole switch bank in which the first pole is electrically coupled to the positive DC rail, a second state of the first pole switch bank in which the first pole is electrically coupled between the first capacitor and the second capacitor, a third state of the first pole switch bank in which the first pole is electrically coupled between the second capacitor and the third capacitor, a fourth state of the first pole switch bank in which the first pole is electrically coupled to the negative DC rail.
US10141863B2	Power conversion apparatus According to one embodiment, a controller determines the polarity of the input voltage detected by an input voltage detector. Then, when the polarity of the input voltage is positive, the first switch is subject to pulse driving, and when the polarity of the input voltage is negative, the second switch is subject to pulse driving, where the pulse driving is carried out at an on/off timing determined on the basis of the respective detection outputs of an input voltage detector, an input current detector, an output voltage detector, and an output current detector.
US10141861B2	Power conversion unit, power converter and method of manufacturing power converter To improve accessibility with respect to a power conversion unit in a power converter. The power converter includes a circuit connection part including a positive electrode conductor, a negative electrode conductor and an AC conductor, a power semiconductor module positioned in a particular direction with respect to the circuit connection part and connected to the positive electrode conductor, the negative electrode conductor and the AC conductor and a capacitor positioned in the particular direction with respect to the circuit connection part and connected to the positive electrode conductor and the negative electrode conductor. The positive electrode conductor is connected to a positive electrode conductor of another power conversion unit through a unit connection part positioned in an opposite direction of the particular direction with respect to the circuit connection part. The negative electrode conductor is connected to a negative electrode conductor of another power conversion unit through the unit connection part.
US10141860B2	Converter with DC link A converter with a DC link for converting an input voltage into an alternating voltage with a pre-determined amplitude and frequency for driving a single or multiple-phase load may include a number of modules which are stackable over one another. Each module may have a ceramic cooling body with a receiving surface on which electronic components of one phase are mounted, wherein the ceramic cooling body has channel(s) in the region of the receiving surface for carrying a coolant during the operation of the converter The converter may include a DC link capacitor and input-side and output-side power connections arranged on a first carrier having a arranged perpendicular to the receiving surface. The converter may also include a control unit for driving the electronic components of the phase, the control unit being arranged on a second carrier having a main plane arranged perpendicularly to the plane of the receiving surface.
US10141858B2	Power converter for electric locomotive A power converter for an electric locomotive includes an insulating transformer, an AC/DC converter, an inverter, a PWM controller, and a voltage controller. The insulating transformer is supplied with high-voltage AC power from an AC overhead wire to convert a high voltage to a low voltage and output low-voltage AC power. The AC/DC converter receives the low-voltage AC power and performs AC/DC conversion. The inverter receives an output from the AC/DC converter and performs DC/AC conversion for supply to a load. The PWM controller outputs a PWM control signal having a predetermined pattern, the pattern for removing specific harmonic components from an output of the inverter or attenuating the specific harmonic components to at most a predetermined level. The voltage controller controls a DC output voltage of the AC/DC converter to control an output voltage of the inverter.
US10141856B2	Integrated magnetic and composite substrate with incorporated components A magnetic device assembly is provided for maximizing the size of the magnetic components for a predetermined power converter module by co-locating and sharing input, output, and auxiliary terminals between the substrates for the power converter and the magnetic components. Wherein complete power module is the result of constructing the separate constituent parts which include an integrated magnetic substrate, magnetic elements mounted therein, a power converter substrate, associated incorporated components located top and bottom on the power converter substrate, a composite mechanical footprint as defined by the mechanical extents of the integrated magnetic substrate and power converter substrate, and a composite electrical pinout as defined by the input-output pins which are coincident to and co-located as those of the integrated magnetic and power converter substrates.
US10141846B2	Methods and apparatus for adaptive timing for zero voltage transition power converters A method of controlling a power converter, including executing a plurality of cycles, including: turning on a first switch during a first period, the first switch coupled to a power supply and a switch node; turning on a second switch during a second period, the second switch coupled to the switch node; turning on a third switch at a first time during the second period and turning the third switch off at a second time after the second period by a first open signal including a high discharge signal followed by a lower discharge signal, the third switch coupled to an auxiliary node and to a second inductor coupled to the auxiliary node; and turning on a fourth switch at a third time after the second time and turning the fourth switch off during the first period of a succeeding cycle, the fourth switch coupled to the auxiliary node.
US10141845B2	DC-DC converter and control circuit with low-power clocked comparator referenced to switching node for zero voltage switching Disclosed examples provide DC-DC converters and control circuits to provide high and low-side driver signals and to selectively adjust a delay time between a low-side switching device turning off and a high-side switching device turning on according to a comparator signal, including a clocked comparator circuit referenced to a switching node to sample the voltage across the high-side switching device in response to a first edge of the high-side driver signal, and to generate the comparator signal indicating a polarity of the sampled high-side switch voltage to facilitate zero voltage switching of the high-side switching device.
US10141843B2	Switching converter, control unit and method for operating a switching converter circuit device A switching converter, including an input interface for providing an input voltage, an output interface for providing at least one output voltage, a voltage conversion device for converting the provided input voltage into one of the at least one output voltage, and a clock generator for providing a working clock, the clock generator being configured in such a way that the clock generator provides a modulated basic clock as the working clock. A control unit including such a switching converter, and a method for operating such a switching converter, are also described.
US10141841B1	DC-DC converter with a dynamically adapting load-line Systems, apparatuses, and methods for efficiently generating a stable output for a transient load for one or more components are described. In various embodiments, a power converter includes two feedback loops to separate the stability and the equivalent output resistance, which allows the bandwidth to increase. The first loop includes a compensator receiving an output current of an amplifier. Additionally, a first converter and a first current mirror generate a target current based on the output current of the amplifier. Based on the target current, multiple step-down converters generate an output voltage, which is returned to the amplifier through a resistor. The second loop includes a second converter with a first order series RC filter to reduce the second loop's response time. A second current mirror receives current from the second converter and generates a dynamically adapting feedback current, which flows through the resistor in the first loop.
US10141837B2	Device and method for energy harvesting using a self-oscillating power-on-reset start-up circuit with auto-disabling function Device and method for energy harvesting using a self-oscillating power-on reset start-up circuit. The device for energy harvesting comprises a start-up circuit for generating self-oscillation and initial boosting of an input voltage from an energy source during a start-up phase; a main boost circuit for boosting the input voltage during a steady state phase; a clock generator circuit for generating clock signals which control voltage boosting of the main boost circuit during the steady state phase; and a switching circuit coupled to the start-up circuit, the main boost circuit and the clock generator circuit for switching powering of the clock generator circuit between the start-up circuit and the main boost circuit such that the clock generator circuit is powered by only one of the start-up circuit and the main boost circuit at any point in time.
US10141832B2	Systems and methods for reducing switch stress in switched mode power supplies In various embodiments described in the present disclosure, various methods and systems are introduced, that may reduce and/or eliminate the voltage spikes on the power switches by avoiding operation at zero-ripple duty ratios. In a first aspect, a method for reducing voltage spikes across switches in a multi-level converter is provided, the method comprising: receiving an error value associated with a difference between a measured output voltage and a reference output voltage; determining a target duty cycle value based at least on a control feedback loop adapted to minimize the error value; if the target duty cycle value is equal or approximately equal to one or more critical duty ratio values, controlling the operation of the multi-level converter to operate the multi-level converter with an averaging sequence, the averaging sequence adapted to, on average, result in, or sufficiently approximate, the one or more critical duty ratio values, but not operate at the one or more critical duty ratio values; and generating one or more pulse-width modulated signals to control the operation of the multi-level converter based on at least one of the target duty cycle and the averaging sequence.
US10141828B2	Maximum power point tracking method and system thereof A maximum power point tracking method includes: configuring a voltage tuning direction of a power converter by a process circuit such that the input voltage of the power converter changes in a positive or a negative trend; detecting the corresponding input voltage and input current of the power converter sequentially to obtain multiple powers; and when the powers decrease for N times continuously, change the voltage tuning direction of the power converter such that the change of the input voltage switches from positive trend to negative trend, or from negative trend to positive trend, in which N is an integer greater than or equal to 2.
US10141824B2	Vibration motor A vibration motor is disclosed. The vibration motor includes a housing, a substrate engaging with the housing, a vibration unit received in the housing, an elastic member suspending the vibration unit, and a coil assembly interacting with the vibration unit. The vibration unit further includes a slot for receiving a fixing part of the elastic member, and the slot includes a volume recessed toward a direction far away from the fixing part.
US10141823B2	Motor, gimbal, and mechanical arm having the same The present application relates to the field of motors, and provides a motor, a gimbal and a mechanical are having the same. The motor includes a support, a circuit board installed on the support and including a coil circuit, a rotating shaft, and a permanent magnet. The support is installed on the rotating shaft. The permanent magnet is disposed adjacent to the coil circuit, and there is a gap between the permanent magnet and the coil circuit. The permanent magnet is of an axially magnetized structure. In the present application, the circuit board is adopted as a carrier of the coil circuit to replace an icon core in the traditional technology, thereby eliminating defects such as cogging torque, hysteresis, and eddy-current losses that are generated by an existing motor from the root. More over, the axial size of the motor and the weight and volume of the motor are reduced.
US10141816B2	Method of achieving variable performance of an electric generator Disclosed is a method of operating a large electric generator, the generator having a rotor arranged along a centerline of the generator, a core arranged coaxially and surrounding the rotor; a plurality of stator windings arranged within the core; a stator frame arranged to fixedly support the core and rotationally support the rotor; a gas cooling system that circulates a cooling gas within the generator, the method steps including circulating a cooling liquid that cool the stator windings; sensing an output parameter of the generator; comparing via a control system the sensed output parameter of the generator to a predetermined scheme; and sending a control signal to an adjusting device in accordance with the control system comparison.
US10141806B2	Stator arrangement A stator arrangement for an electrical motor has several windings (28) which are arranged on a winding carrier (26) of plastic. A groove (32) extends in the peripheral direction and is open to the axial end-side and in which at least one electrical conductor (30) electrically connecting two of the windings (28) is arranged. The groove (32) is formed on at least one axial end-side (20) of the winding carrier (26). An electric motor including the stator arrangement as a pump assembly with such a stator arrangement are also provided.
US10141805B2	Planar stator with efficient use of space Designs and method of construction for planar stators useable inter alia for axial air-gap electric machines are provided. In some embodiments these designs make highly efficient use of the space occupied by the stator, substantially filling most of its volume with active conductors. Some embodiments comprise at least one flexible conductor member (e.g. a flat cable) periodically bent by about 180° to form both external and internal peripheries of a two-layer planar stator. In some embodiments disk-like or ring-like members are used to shape and/or to secure the flexible conductor. In some embodiments adhesive members and/or encapsulating and/or potting of conductive elements provide solidity and rigidity of the stator(s). In some embodiments a plurality of planar stators are interleaved with a plurality of planar rotors, producing an efficient system electrical motor and/or generator.
US10141800B2	Magnet-embedded rotor, method for manufacturing magnet-embedded rotor, and orientation and magnetization device A magnet-embedded rotor includes a cylindrical rotor core that rotates together with a rotating shaft; and permanent magnets embedded in the rotor core. The rotor core includes core members, and each core member includes a tubular portion into which the rotating shaft is inserted and projecting portions formed to project in a radial direction of the tubular portion from an outer periphery of the tubular portion and arranged apart from each other in a circumferential direction of the tubular portion. The rotor core is formed by assembling the core members such that the tubular portions are arranged on one straight line and the projecting portion of the core member and the projecting portion of the other core member are adjacent to each other in a circumferential direction of the rotor core. The permanent magnet is embedded in each projecting portion of each core member.
US10141792B2	Power harvesting circuit and method A circuit for use in a power harvesting system provides signals from at least first and second antennae to a summing node through respective diodes. The summing node is coupled to an output node through an output diode, and an output capacitor is provided at the output node. This implements combination of antenna signals within a rectification circuit.
US10141791B2	Systems and methods for controlling communications during wireless transmission of power using application programming interfaces An example system includes: a wireless power transmitter with (i) a processor running a power transmitter manager application; (ii) a wireless communication hardware having a transmitter application programming interface (API), the transmitter API operatively coupled with the power transmitter manager application and controlling the wireless communication hardware; and (iii) a transmitter antenna array that creates pockets of energy near a wireless power receiver, and the transmitter antenna array is partially responsive to instructions from the power transmitter manager application. The transmitter API calls the power transmitter manager application through a transmitter callback function, and the transmitter callback function sends a callback when a communication connection begins, a communication connection ends, a communication connection is attempted, or a message is received. The system also includes the wireless power receiver: running a power receiver application and including receiver wireless antenna array that receives and uses wireless power from the pockets of energy.
US10141783B2	Transmitting device, receiving device, and power transmission system A power transmission system according to an embodiment includes a transmitting device and a receiving device. The transmitting (receiving) device includes a transmitting (receiving) housing and a transmitting (receiving) coil. The transmitting (receiving) housing includes a first transmitting (receiving) surface and a second transmitting (receiving) surface. The transmitting (receiving) coil includes a first transmitting (receiving) part and a second transmitting (receiving) part. A first facing area and a second facing area at the reference position are set such that change of strength of magnetic coupling between the transmitting coil and the receiving coil of when the receiving device is moved in a direction perpendicular to the first transmitting surface becomes smaller than change of strength of magnetic coupling between the transmitting coil and the receiving coil of when the receiving device is moved in a direction perpendicular to the second transmitting surface.
US10141782B2	Wireless inductive power transfer A power transmitter transfers power to a power receiver using a wireless power signal. The power transmitter comprises an inductor driven by a power signal generator to provide the power signal. A calibration controller determines whether a power loss calibration has been performed for the power transmitter and power receiver pairing. The calibration adapts an expected relationship between a received power indication provided by the power receiver and a transmitted power indication for the power transmitter. A power limiter restricts the power provided to the inductor to not exceed a threshold unless a power loss calibration has been performed for the pairing. The expected relationship may be used to detect unaccounted for power losses, e.g. due to foreign objects being present. The calibrated expected relationship may provide improved accuracy allowing accurate detection at higher power levels. At lower power levels such accuracy is not needed, and no calibration needs to be performed.
US10141781B2	Contactless power transfer system, power receiving device, and power transmission device A contactless power transfer system includes a power transmission device and a power receiving device. A second electronic control unit of the power transmission device is configured to determine whether a series of manipulations including severing connection between the power transmission device and the power supply via the power supply cable, and then connecting the power transmission device with the power supply again via the power supply cable, are performed. The second electronic control unit is configured to send a predetermined signal to the power receiving device when the second electronic control unit determines that the series of manipulations are performed. A first electronic control unit of the power receiving device is configured to generate a command for start of power transmission to the power transmission device, irrespective of the time schedule, when the first electronic control unit receives the signal.
US10141779B2	Uninterruptible electric power system An uninterruptible electric power system comprises a main power supply unit, an uninterruptible power supply unit receiving AC commercial power from the main power supply unit, and a slave power supply unit. The uninterruptible power supply unit converts the AC commercial power to stable AC power. The slave power supply unit is connected to the uninterruptible power supply unit. The slave power supply unit comprises a slave static transfer switch, which comprises a first input terminal connected to the uninterruptible power supply unit to receive the stable AC power, a second input terminal receiving the AC commercial power, and an output terminal configured to connect, when the uninterruptible power supply unit is in normal operation, to the first input terminal to receive the stable AC power, and connect, when the uninterruptible power supply unit operates abnormally, to the second input terminal to receive the AC commercial power.
US10141777B2	Three-port convertor having integrated magnetic and zero-port current ripple The present invention provides a three-port converter with magnetic integration and current ripple cancellation. With magnetic integration technology, the number of magnetic rings is reduced, and the number of driving coupling transformers is also reduced, thereby greatly reducing the size and weight of the whole converter; and with a current ripple cancellation branch, the amount of current ripples flowing through the three ports is very low and close to zero. The three-port converter of the present invention reduces the influence of electromagnetic interference and simultaneously saves the filter cost so that the busbar current and battery current are smoother.
US10141776B2	Distribution of power commands in an energy storage system Systems and methods for controlling power distribution are provided. The method includes receiving a power command, wherein the power command requests a discharge from one or more BESS units, and wherein the one or more BESS units are housed in one or more temperature controlled rooms. For each of the one or more temperature controlled rooms, a lowest energy remaining of the one or more BESS units in the temperature controlled room is determined; a low threshold is determined based on the determined lowest energy remaining and a floor; a limit is determined based on the determined low threshold; and the limit is assigned to each of the one or more BESS units housed in the temperature controlled room. The method includes causing the power command to be at least partially satisfied by the one or more BESS units based on the assigned limits.
US10141772B2	Communication device A communication device includes a substrate, a magnetic sheet disposed above an upper surface of the substrate, a first coil disposed above an upper surface of the magnetic sheet, a second coil having a portion facing an edge surface of the substrate in a direction parallel with the upper surface of the substrate, and an electronic component disposed on the upper surface of the substrate. The electronic component is configured to generate noise. The magnetic sheet has a portion overlapping the second coil viewing from above. The electronic component is exposed from the magnetic sheet viewing from above. This communication device has a small size and prevents influence of noise generated by the electronic component.
US10141771B1	Near field transmitters with contact points for wireless power charging Disclosed is a system including RF circuitry configured to generate an RF signal; a plurality of unit cells configured to receive the RF signal and to cause an RF energy signal having a center frequency to be present within the unit cells; and receiver circuitry configured to charge an electronic device in response to an antenna of the electronic device receiving the RF energy signal when the antenna is tuned to the center frequency and positioned in a near-field distance from one or more of the unit cells.
US10141769B2	Wireless power transfer system Disclosed is a wireless power transfer system-charger for wireless power transmission. The wireless power transfer system-charger includes: a power converting unit to convert a DC signal into an AC signal; a control unit to control the power converting unit with a first or second operating frequency; and an induction-type antenna system and a resonance-type antenna system connected in parallel to each other, wherein power is transmitted through the induction-type antenna system or the resonance-type antenna system according to a control of the control unit.
US10141768B2	Systems and methods for maximizing wireless power transfer efficiency by instructing a user to change a receiver device's position An example method includes: receiving, by an antenna of a receiver, RF power transmission waves from a transmitter, the RF waves forming controlled constructive interference patterns and destructive interference patterns in proximity to the receiver. The method also includes: transmitting, by the receiver to the transmitter, information used to determine a power level and efficiency of power received by the receiver device. The information that is used to determine the power level and efficiency indicates to the transmitter that the receiver device is receiving power at less than a maximum available efficiency. The method further includes: instructing a user of the receiver to change the receiver's position based on a comparison of respective voltage level or power received in each respective position or orientation of the receiver until a level of efficiency that is no less than the maximum available efficiency is achieved for the efficiency of power received.
US10141754B2	Integration of battery management system and battery charger A battery module, including at least one battery unit, a transistor unit, and a battery management unit. The battery unit provides a power supply electrical current. The transistor unit is provided for serving as a switch for the battery unit and it a switch gate node, a first switch current node, and a second switch current node. The power supply electrical current passes through the first switch current node and the second switch current node when a predetermined transistor on-state voltage is applied to the switch gate node. The power supply electrical current is blocked front passing through the first switch current node and the second switch current node when a predetermined transistor off-state voltage is applied to the switch gate node. The battery management unit comprises a processor being connected to the switch gate node. The transistor unit further serves as an electrical current sensor.
US10141753B2	Storage battery system A storage battery system relating to the present invention includes N PCSes. Each of the N PCSes is connected to an individual storage battery module group. The storage battery module group is formed by connecting one or more storage battery modules in parallel. A maximum power storage capacity of the storage battery modules configuring at least one storage battery module group is different from a maximum power storage capacity of the storage battery modules configuring the other storage battery module groups. A controller determines charge/discharge amounts of the individual PCSes on the basis of a charge/discharge request from an EMS, the maximum power storage capacity of the storage battery module, the number of the storage battery modules and a storage battery capacity ratio.
US10141751B2	Control system for electric storage system A control system for an electric storage system, in which a plurality of pairs of storage batteries and converters are connected in parallel to a power system, includes: a unit that decides charge and discharge of total power by the pairs of storage batteries and converters; and a unit that distributes the charge and discharge power decided by the charge and discharge power decision unit to the pairs of storage batteries and converters. The power distribution decision unit compares the charge and discharge total power with a limit output when conversion efficiency of the converters is equal to or greater than standard efficiency, and decides a running number by which an output of all the pairs of running storage batteries and converters is equal to or greater than the limit output when the charge and discharge total power is equal to or greater than the limit output.
US10141744B2	Cable arrangement of an energy storage system Systems and methods for regulating a short circuit current associated with an energy storage system are provided. In one embodiment, an energy storage system can include an energy storage device and a switching power supply coupled to the energy storage device. The energy storage system can further include one or more cables configured to couple the energy storage device to the switching power supply, and a magnetic framework positioned proximate the one or more cables. The magnetic framework can include one or more magnetic structures and can span at least a portion of the length of the cables. The one or more cables are positioned in a physical arrangement that, in conjunction with the magnetic framework, facilitates a selected inductance between the cables.
US10141740B2	Auxiliary supply generation for power converters A power converter may be configured to power multiple output loads, including a main output load and at least one auxiliary output load. The power converter may include control circuitry that controls power delivery to output circuits coupled to the output loads. When the main output load is operating in a reduced power mode, the control circuitry may trigger the switching circuitry to increase the supply of power in order to increase the auxiliary voltages used to power the auxiliary loads if one or more of the auxiliary voltages drops below a threshold due to the main output load operating in the reduced power mode.
US10141738B2	DC powered local positioning system A local positioning system can be powered via local and remote direct current sources. The local positioning system may have a power module that selectively activates one, or both, local and remote direct current sources to power a location circuit positioned on a circuit board. The location circuit may attain a position of a user and subsequently transfer that attained position to a remote host via the remote direct current source.
US10141732B2	Apparatus for switching in a DC voltage grid An apparatus for switching in a DC voltage mains has a switching device for interrupting the flow of current in at least one line of the DC voltage grid. The switching device is connected into the line of the DC voltage grid by way of a first and a second connection. An attenuation member absorbs energy from the applied terminal voltage. The attenuation member has a first and a second node that are electrically connected via an attenuation element, an electrical connection from the first node to the first connection via a first controlled or uncontrolled switching element, and an electrical connection from the first node to the second connection via a second controlled or uncontrolled switching element.
US10141728B1	Vertical cable manager with slam-shut door A vertical cable manager includes a base frame and a door. The base frame has upper and lower support legs and upper and lower crossbars between the support legs. The door has retractable hinge pins at corners of the door. The crossbars have hinge rod receptacles to receive respective hinge pins and elastic latch members having a flexible arm and a catch portion. The catch portions secure the hinge pins in the hinge rod receptacles with the door closed and are deflectable through elastic deformation of the flexible arm to allow travel of the hinge pins through the hinge rod receptacles and past the catch portions when the door is moved from an open to a closed position.
US10141727B2	Wire harness with fixing member A wire harness with a fixing member that is provided can prevent a fixing member from becoming shifted a large amount in the axial direction of a pipe, and enables adjustment of the position of the fixing member. The wire harness includes: a pipe (P) into which electrical wires (W) are inserted; an exterior member that has a bellows portion and surrounds the outer side of at least a portion of the pipe (P) in the axial direction, the bellows portion having mountain portions and valley portions that are successively formed in an alternating manner in the axial direction; and a fixing member that has locking portions, is attached to the exterior member, and is to be fixed to a fixing portion (B). The locking portions are locked to the bellows portion.
US10141726B2	Multiple source grounding facilitation system A multiple source grounding facilitation system coordinates and facilitates electrical grounding of multiple sources. The system includes a frame and a primary grounding cable having a first end electrically coupled to the frame. A second end of the primary grounding cable is free for being grounded to earth. Each of a plurality of secondary grounding cables has a primary end electrically coupled to the frame such that each secondary grounding cable is electrically coupled to the primary grounding cable. Each secondary grounding cable has a distal end relative to the frame for coupling to a respective source wherein each source is grounded through the frame.
US10141725B2	Arc fault resistant electric equipment Conductive elements (104A-C) are positioned within a housing (100) of an electric device. The conductive elements (104A-C) are arranged such that in an event of an electric arc (106) occurring between the conductive elements (104A-C) an electromagnetic force is exerted upon plasma of the electric arc (106) such that the electric arc (106) is directed towards a wall (108) of the housing (100). Furthermore, a conductor configuration (102) includes conductors (104A, 104B, 104C) and sacrificial electrodes (118A-C) positioned within a housing (100) of an electric device, wherein the conductors (104A-C) are arranged such that in an event of an electric arc (106) occurring between the conductors (104A-C) an electromagnetic force is exerted upon plasma of the electric arc (105) such that the electric arc (106) is directed towards the sacrificial electrodes (118A-C).
US10141723B2	Loadcenters with improved backpan to back wall assembly fasteners allowing one direction assembly and related enclosures and methods Loadcenters with an enclosure having an interior compartment and a back wall that include at least one lance, typically a plurality of longitudinally spaced apart lances that project inwardly toward a front of the enclosure. Each lance comprises an aperture. The loadcenters also include a back pan assembly in the interior compartment. The back pan assembly has at least one latch, typically plurality of longitudinally spaced apart latches, each latch with a legs that extend through the aperture of the aligned lance to attach the back pan assembly to the backwall.
US10141720B2	Nitride semiconductor laser element A nitride semiconductor laser element includes an electron barrier layer between a p-side light guide layer and a p-type clad layer. The electron barrier layer has a bandgap energy larger than that of the p-type clad layer. The p-side light guide layer is made of AlxGa1−xN containing no Indium, where 0≤x<1. A film thickness dn of the n-side light guide layer and a film thickness dp of the p-side light guide layer satisfy relationships dp≥0.25 μm and dn≥dp.
US10141719B2	Resonant cavity strained group III-V photodetector and LED on silicon substrate and method to fabricate same A structure includes an optoelectronic device having a Group IV substrate (e.g., Si); a buffer layer (e.g. SiGe) disposed on the substrate and a first distributed Bragg reflector (DBR) disposed on the buffer layer. The first DBR contains alternating layers of doped Group IV materials (e.g., alternating layers of SiyGe(1−y), where 0.8
US10141710B2	Ring-resonator-based laser with multiple wavelengths An optical source includes semiconductor optical amplifiers, with a semiconductor other than silicon, which provide an optical gain medium. Moreover, a photonic chip in the optical source, which is optically coupled to the semiconductor optical amplifiers, includes ring resonators that selectively pass corresponding optical signals having carrier wavelengths provided by the semiconductor optical amplifiers, where a given ring resonator and a reflector on one of the semiconductor optical amplifier defines an optical cavity, and the ring resonators have different radii with associated resonance wavelengths corresponding to the carrier wavelengths. Furthermore, the photonic chip includes a shared ring resonator, optically coupled to the ring resonators, that selectively filters the optical signals, where the shared ring resonator has a different radius than the radii of the ring resonators with an associated resonance wavelength, and a free-spectral range of the shared ring resonator defines a spacing between the carrier wavelengths in the optical signal.
US10141708B2	Fiber laser apparatus and method of aligning laser light irradiation position A fiber laser apparatus that generates invisible laser light using an amplification optical fiber having a single-mode core and outputs the invisible laser light via an output optical fiber is provided. The fiber laser apparatus includes a visible laser light source that generates visible laser light, an introducing section that introduces the visible laser light generated by the visible laser light source into a core of one of the amplification optical fiber and the output optical fiber, and a drive unit that drives, in a case of performing alignment of an irradiation position of the invisible laser light with respect to a workpiece, the visible laser light source and emits the visible laser light via the core of the output optical fiber.
US10141706B2	Distributed laser power architecture for laser diode arrays Laser diode drivers include switching power supplies situated proximate one or more laser diode arrays so as to provide laser diode drive currents at frequencies of 200 kHz or more. The switching power supplies are generally buck/boost supplies that can provide well regulated outputs even when regulating remote power received from a power supply via a cables having inductances in the hundreds of nH. Multiple laser diode arrays can be driven with independently selectable powers. A drive current for a particular laser array can be controlled so as to reduce voltage drop at voltage control elements such as FETs, leading to increased efficiency, increased product life and decreased sense element failure.
US10141698B2	High speed communication jack A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.
US10141686B2	Grommet for a cable connector and a strain relief cable fitting having an insert A grommet for use in a cable fitting includes a body having a bore substantially therethrough and a resilient membrane located within the bore. The resilient membrane has a thinner membrane portion extending radially towards the bore to provide a controlled tear during cable insertion. The body has an exit opening which comprises resilient gripping teeth projecting axially from the body with an axially extending resilient foldable membrane located between at least two adjacent resilient teeth and foldable therebetween when they are radially compressed. Once force is applied by the axial movement of the fitting assembly onto a tapered surface of the grommet, the flexible gripping members radially collapse towards an inserted cable. The grommet may be assembled in a strain relief connector having a nut, a connector body and optionally an insert.
US10141681B2	Waterproof connector A waterproof connector comprises a housing, a waterproof member, and a lever. The waterproof member surrounds and contacts a sidewall of the housing over an entire circumference of the sidewall. The lever is movable between an unmated position and a mated position. In the mated position of the lever, the lever and the housing together cover the waterproof member over an entire circumference of the waterproof member.
US10141679B2	Electrical connector A waterproof attachment portion to an enclosure is formed to implement the reduction in height, reduction in size, and positive waterproof effects at the same time. An electrical connector includes: an electrically conductive contact; an insulating housing for holding the contact; a metal shell which includes an opening opened frontward to allow a mating connector to be inserted therein and accommodates the housing; and a sealing member which is provided on the outer peripheral surface of the metal shell and protruded frontward from the metal shell.
US10141678B1	Charging device A charging device has a casing, a connector, and a supporting frame. The casing has a seat and a cover detachably deposited on the seat. The connector is connected to the casing and is deposited in the casing between the seat and the cover. The supporting frame is connected to the casing and abuts against the connector to hold the connector between the casing and the supporting frame. When the connector of the charging device needs maintenance or replacement, the supporting frame is detached from the cover and the connector is separated from the cover by a pushing force from an outer side to an inner side of the cover to replace a new connector. After replacement with the new connector, the supporting frame is connected to the cover again to finish the maintenance operation. The charging device may be detached and maintained easily.
US10141673B2	Detection of a plug coupled to a connector housing Examples herein disclose a plug coupleable to a connector housing on a computing device. The examples disclose an electrical contact supported by the plug, the electrical contact interfaceable with a connector pin in the connector housing, wherein the computing device is to detect the interfaceability of the electrical contact with the connector pin, the detection of the interfaceability is to indicate an installation of the plug within the connector housing.
US10141672B2	Latching means for plug contacts A latching mechanism for plug contacts in insulating housings of plug connectors is provided. The latching mechanism which, in addition to the known arrangement of a latching arm and latching shoulder, provides a latching lug on the latching shoulder. As a result of the latching lug, the latching mechanism is prevented from becoming released under a mechanical load. The latching lug enables additional latching of the latching arm against the plug contact.
US10141670B1	Substrate connector including a spring pin assembly for electrostatic chucks A substrate connector to provide a connection to a substrate during substrate processing includes a spring pin assembly defining a first contact and including a first groove. A retention spring clip includes a body arranged in the first groove and projections extending from the body. A second contact includes a body defining a second groove. The second contact is arranged around the first contact of the spring pin assembly. The projections of the retention spring clip extend into the second groove in the second contact.
US10141666B2	Support of an electronic unit, electrical device comprising same and electric machine comprising the said electrical device A support of an electronic unit, configured to be integrated into a housing to support a first electronic unit and to allow electrical connection between the first electronic unit and a second electronic unit situated opposite, via at least one electrical connection element. The support includes: an open cavity for receiving the first electronic unit; a hollow column into which the at least one electrical connection element is inserted, the hollow column extending from the open cavity and being configured to communicate with the open cavity at a first end of the hollow column; and a channel including an end communicating with the bottom of the open cavity and another end communicating with a lateral wall of the hollow column.
US10141664B2	Distribution block and din rail release mechanism An electrical distribution block transfer electrical power from a primary conductor to one or more tap conductors. The distribution block includes a base, a conductor block, first and second sidewalls, and a lid. The conductor block and the first and second sidewalls are connected to the base and the lid is connected to the first and second sidewalls. The conductor block includes one or more apertures for receiving more primary conductors and one or more apertures for receiving tap conductors.
US10141655B2	Switch assembly with integrated tuning capability A multiport RF switch assembly with integrated impedance tuning capability is described that provides a single RFIC solution to switch between transmit and receive paths in a communication system. Dynamic tuning is integrated into each switch sub-assembly to provide the capability to impedance match antennas or other components connected to the multiport switch. The tuning function at the switch can be used to shape the antenna response to provide better filtering at the switch/RF front-end (RFFE) interface to allow for reduced filtering requirements in the RFFE. Memory is designed into the multiport switch assembly, allowing for a look-up table or other data to reside with the switch and tuning circuit. The resident memory will result in easier integration of the tunable switch assembly into communication systems.
US10141654B2	Tracking antenna system adaptable for use in discrete radio frequency spectrums A tracking antenna system for discrete radio frequency spectrums includes a reflector, a pedestal supporting the reflector, a radome assembly enclosing both, a first feed for gathering radio waves within a first of discrete RF spectrums that is removably disposed in front of the reflector at the focal point, a first RF module operably connected to the first feed for converting the first gathered radio waves to first electronic signals, a feed mount for removably supporting the first feed and configured to removably support a second feed for gathering radio waves within a second of discrete RF spectrums, and a module mount for removably supporting the first RF module and configured to removably support a second RF module for converting the second radio waves to second electronic signals. A method of using the tracking antenna system adaptable for discrete radio frequency spectrums is also disclosed.
US10141653B2	Millimeter wave spatial crossbar for a millimeter-wave connected data center A method and system comprises in a data center including a first server rack housing a first spatial crossbar, a second server rack housing a second spatial crossbar, performing by the first spatial crossbar: transmitting data to the second spatial crossbar via a first millimeter wave beam between the first spatial crossbar and the second spatial crossbar. The first millimeter wave beam may emanate from the first spatial crossbar at a first angle and be redirected toward the second spatial crossbar by a reflective surface in the data center. The first server rack may house a first server; and the data may be received from the first server via a wired or fiber link. The first server rack may house a top-of-rack switch, and the data may be received from the top-of-rack switch via a wired or fiber link.
US10141645B2	Multiband antenna An antenna comprising first and second radiating elements disposed in a collinear configuration on a dielectric substrate, wherein the first radiating element comprises a feed point. A first inter-element phasing section is conductively coupled to the first and second radiating elements, and has a meander line configuration adapted such that the first and second radiating elements radiate electro-magnetic radiation in-phase over a first range of frequencies. Third and fourth radiating elements are disposed in a collinear configuration on the substrate, and the third radiating element is electromagnetically coupled in parasitic relation to the first radiating element. A second inter-element phasing section is conductively coupled to the third and fourth radiating elements, and has a meander line configuration adapted such that the third and fourth radiating elements radiate electromagnetic radiation in-phase over a second range of frequencies which is different from the first range of frequencies.
US10141638B2	Conformal electro-textile antenna and electronic band gap ground plane for suppression of back radiation from GPS antennas mounted on aircraft An antenna system having reduced back radiation is disclosed. The antenna system includes an antenna and ground plane. The antenna includes electro-textiles and is configured to operate in at least the frequency range between 1.1-1.6 GHz. The ground plane includes electro-textiles and is configured to operate as a frequency selective surface with electronic band gap characteristics to suppress edge and curved surface diffraction effects. In this system, the antenna and ground plane are configured to be located on a curved surface and to radiate with a directional radiation pattern having attenuated back lobes.
US10141636B2	Volumetric scan automotive radar with end-fire antenna on partially laminated multi-layer PCB A vehicular radar system includes a first printed circuit board (PCB) having a first material. The vehicular radar system also includes a plurality of end-fire antennas positioned on the first PCB. The vehicular radar system also includes a second PCB stacked on or under the first PCB and having a second material that has a greater rigidity than the first material. The vehicular radar system also includes a radio frequency integrated circuit (RFIC) coupled to the plurality of end-fire antennas and configured to control the plurality of end-fire antennas.
US10141635B2	Systems, apparatus, and methods to optimize antenna performance Disclosed are a system, apparatus, and method for modifying a dipole antenna to comprise unequal arm lengths for matching the condition of two different dielectric materials such as air and human body. The modified dipole antenna is built in a cylindrical pipe shape dipole that has a hollow center to let wires pass through it and has little to no effect in antenna performance The antenna can be bent in different shape to fit in any wireless product of any shape or size. The antenna is designed to provide a stable radiation at one side and partial radiation at front side even with human body intervention. Further the antenna can be combined with another similar antenna via a power splitter/divider to form a full 360 degree radiation pattern even in presence of a human body in proximity.
US10141633B2	Multiband microline antenna A multiband antenna includes a plurality of radiation elements, operative within different frequency bands. The multiband microline antenna includes a base substrate that has a signal feeding trace and a partial ground plane, and two or more additional substrates that have multiple microline radiation elements electromagnetically coupled to the signal feeding trace. Each microline radiation element has a width not greater than 0.1 millimeter, and varies in length and resonant frequency. Various disclosed embodiments include a multiband microline folded monopole antenna, a multiband microline loop antenna, a multiband microline inverted-F antenna and a multiband microline π-shaped antenna.
US10141626B2	Electronic device printed circuit board patch antenna An electronic device may be provided with wireless circuitry that includes a radio-frequency transceiver circuit and an antenna. The antenna may be a patch antenna formed from a patch antenna resonating element and an antenna ground. The patch antenna resonating element may be formed from a metal patch on a printed circuit board. The antenna ground may be formed from a metal housing having a planar rear wall that lies in a plane parallel to the metal patch. The radio-frequency transceiver circuit may be coupled to the metal patch through traces on the printed circuit and may be coupled to rear wall of the housing through a screw and a screw boss in the housing. Buttons and other electrical components may be mounted on the printed circuit board and may be coupled to control circuitry on the printed circuit board through the metal patch.
US10141623B2	Multi-layer printed circuit board having first and second coaxial vias coupled to a core of a dielectric waveguide disposed in the circuit board Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide coupled at respective ends to coaxial vias. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core. The coaxial vias include a center conductor and an outer conductor (or shield) which extend through one or more layers of the PCB. One of the coaxial vias radiates electromagnetic signals into the dielectric waveguide at a first end of the core while the other coaxial via receives the radiated signals at a second end of the core.
US10141616B2	Battery assembly with temperature control device A battery module of the present invention is adaptable to be utilized in various configurations including and not limited to an overlapping battery cell packaging configuration and a vertical stack battery cell packaging configuration used in an automotive and non-automotive applications. The battery module has a plurality of battery heatsink assemblies with the cells disposed therebetween. A plurality of rods extend through the each heatsink assemblies to secure the heatsink assemblies and the cell with one another to form the battery module.
US10141611B2	Internal short detection and mitigation in batteries Devices, systems, and techniques for identifying a dendrite material within a battery. The method comprising receiving, by a battery management system, an output from sensing circuitry within the battery indicative of a first voltage level, detecting, by the battery management system, a change from the first voltage level to a second voltage level that is indicative of an internal short within a sensing sheet, determining by the battery management system, a resistance and a two-dimensional position of the internal short within the sensing sheet, and identifying, by the battery management system, a dendrite material based on the resistance of the internal short.
US10141610B2	Non-aqueous electrolyte secondary battery and positive electrode active material for use in same Provided is a non-aqueous electrolyte secondary battery combining high battery performance in normal use and endurance against overcharge. The non-aqueous electrolyte secondary battery comprises a positive electrode, a negative electrode, and a non-aqueous electrolyte. The positive electrode comprises a positive electrode active material 16. Positive electrode active material 16 is formed of a particulate lithium composite oxide 16c comprising at least lithium, nickel, cobalt, manganese and tungsten; and a nickel oxide layer 16s formed on the lithium composite oxide surface. With the non-lithium metals in lithium composite oxide 16c being 100% by mole, tungsten accounts for 0.05% by mole or greater, but 2% by mole or less. With lithium composite oxide 16c being 100 parts by mass, the nickel oxide content is 0.01 part by mass or greater, but 2 parts by mass or less.
US10141609B2	Electrode coil for a galvanic element, and method for producing same The invention relates to an electrode coil for a galvanic element, comprising a first electrode (4), a second electrode (6), a separator, and a reference electrode (8). The first electrode (4) and the second electrode (6) are insulated from each other by the separator, and the reference electrode (8) is arranged between the first electrode (4) and the second electrode (6) and is adhered to the first electrode (4) or to the second electrode (6). The invention further relates to a galvanic element comprising such an electrode coil and to a method for producing such an electrode coil.
US10141608B2	Electrolyte for lithium secondary battery and lithium secondary battery containing the same Provided are an electrolyte for a lithium secondary battery and a lithium secondary battery containing the same. The electrolyte for a secondary battery according to the present invention has excellent high-temperature stability, excellent low-temperature discharge capacity, and excellent life cycle characteristics.
US10141605B2	Electrolyte formulation for reduced gassing wide temperature range cycling A rechargeable battery cell having a specific combination of anode, cathode and electrolyte formulation is provided. The electrolyte formulation includes an additive system and a salt system. The additive system includes a first additive containing a sulfonyl group, an anti-gassing agent, and a second additive. The salt system includes a lithium salt and a co-salt. The disclosed electrolyte formulation has reduced gassing and improved performance over a wide temperature range.
US10141604B2	Polymer composition with electrophilic groups for stabilization of lithium sulfur batteries A polymer to be used as a binder for sulfur-based cathodes in lithium batteries that includes in its composition electrophilic groups capable of reaction with and entrapment of polysulfide species. Beneficial effects include reductions in capacity loss and ionic resistance gain.
US10141602B2	Lithium solid battery, lithium solid battery module, and producing method for lithium solid battery A problem of the present invention is to provide a lithium solid battery in which generation of short-circuits caused by dendrite is inhibited. The present invention solves the problem by providing a lithium solid battery comprising a solid electrolyte layer having a sulfide glass containing an ion conductor which has a Li element, a P element and a S element, and having an average pore radius calculated by mercury press-in method being 0.0057 μm or less.
US10141599B2	Non-aqueous electrolyte secondary battery A non-aqueous electrolyte secondary battery includes battery element formed by laminating and winding positive electrode and negative electrode via separator. Positive electrode includes a positive electrode current-collector-exposed portion, in which the positive electrode current collector is exposed over a length dimension of not less than one turn of the winding of battery element in the outermost circumference and an intermediate layer portion of the winding. The negative electrode in a part facing the positive electrode current collector exposed in the intermediate layer portion includes the negative electrode active material layer laminated on the negative electrode current collector. Negative electrode can be provided with a slit at an exposed side with respect to both exposed ends of the positive electrode current-collector-exposed portion.
US10141596B2	Stack array in solid oxide fuel cell power generation system A stack array in a solid oxide fuel cell power generation system is provided. The stack array comprises a supporting body and a stack group, wherein the supporting body is in a layered structure and comprises one layer or at least two layers of supporting units; and on each layer of the supporting units, a plurality of stacks are sequentially arranged to form the stack group, and each stack is horizontal, and fasteners are provided between the stacks to enable the stack groups and the supporting units to form a pressurized fastening structure. The stack array of the present disclosure simplifies the arrangement of pipelines in the related art, enables effective pressurized fastening on the stacks, so as to allow the whole stack array to be compact and steady, while facilitating the detach, repair and maintenance of the stacks, which is favorable for the integration of the system.
US10141595B2	Fuel cell stack A fuel cell stack includes a stacked body including a plurality of power generation cells stacked in a stacking direction. Insulation members and end plates are provided to sandwich the stacked body therebetween in the stacking direction. A coolant passage is provided between each of the insulation members and each of the end plates. The coolant passage includes a first coolant passage and a second coolant passage. A surface area of a region in which the first coolant passage is provided is larger than a surface area of a region in which the second coolant passage is provided. A flow rate of the coolant flowing through the first coolant passage is larger than a flow rate of the coolant flowing through the second coolant passage.
US10141594B2	Systems and methods for assembling redox flow battery reactor cells A reactor assembly for a redox flow battery system is disclosed. The reactor assembly may include a plurality of outer frames, a plurality of inner frames, and a rib and channel interlock system integrated in the plurality of outer frames and the plurality of inner frames. In certain embodiments, the rib and channel interlock system may be configured to create a plurality of seal systems enclosing an outer circumference of an electrolyte compartment when the plurality of outer frames and the plurality of inner frames are compressed together in a stack configuration.
US10141591B2	Fuel cell system and control method of the same A fuel cell system comprises a controller configured to: (i) calculate a torque target value of a compressor and an opening position target value of a pressure regulation valve from a flow rate target value of a cathode gas and a pressure target value of a cathode gas flow path, the flow rate target value of the cathode gas and the pressure target value being determined according to a required power output of a fuel cell stack; (ii) calculate a torque feedback value of the compressor from a difference between a flow rate measurement value and the flow rate target value of the cathode gas, and control the compressor using a torque command value obtained by adding the torque target value and the torque feedback value; and (iii) calculate an opening position feedback value of the pressure regulation valve from a difference between a pressure measurement value and the pressure target value of the cathode gas flow path, and control an opening position of the pressure regulation valve using an opening position command value obtained by adding the opening position target value of the pressure regulation valve and a delayed opening position feedback value that is obtained by delaying the opening position feedback value. This configuration suppresses the hunting of the flow rate and the pressure.
US10141590B2	Fuel cell system and method of controlling fuel cell system A fuel cell system includes a compressor, a relief valve that adjusts a pressure of a cathode gas, a pulsation operation unit that pulsates an anode gas pressure, a target flow rate setting unit that sets a target flow rate of the cathode gas, a first target pressure setting unit that sets a first target pressure of the cathode gas, a second target pressure setting unit that sets a second target pressure of the cathode gas for maintaining a pressure difference between an anode and a cathode within a predetermined allowable range, a target pressure setting unit that sets the higher one of the first and second target pressures as a target pressure, and a control unit that controls the compressor on the basis of the target flow rate and a limitative pressure obtained by limiting pulsation of the target pressure.
US10141589B2	Fuel cell system and a method for controlling a fuel cell system A fuel cell system comprises a fuel cell, a tank, a 1st pressure sensor that measures a fill-time pressure, a 2nd pressure sensor that measures a supply piping pressure, a temperature sensor that measures an internal temperature of the tank; and a controller that, when the fuel cell starts, derives an estimated pressure value of the supply piping pressure based on a 1st pressure value that shows the fill-time pressure, the internal temperature when the 1st pressure value was measured, and the internal temperature when the supply piping pressure was measured, and that detects as the supply piping pressure the lower value among the estimated pressure value and the 2nd pressure value that shows the measured supply piping pressure.
US10141587B2	Fuel cell system with cathode bypass valve and control method for fuel cell system A fuel cell system includes a supply unit configured to supply cathode gas to a fuel cell, a bypass valve configured to bypass the cathode gas to be supplied to the fuel cell by the supply unit, a detection unit configured to detect a state of the cathode gas to be supplied to the fuel cell without being bypassed by the bypass valve, a pressure adjusting unit configured to adjust a pressure of the cathode gas to be supplied to the fuel cell, a calculation unit configured to calculate a target flow rate and a target pressure of the cathode gas to be supplied to the fuel cell according to an operating state of the fuel cell, an operating state control unit configured to control an operation amount of at least one of the pressure adjusting unit and the supply unit on the basis of a flow rate and the pressure of the cathode gas detected by the detection unit and the target flow rate and the target pressure calculated by the calculation unit, a bypass valve control unit configured to open and close the bypass valve on the basis of the flow rate of the cathode gas detected by the detection unit and the target flow rate calculated by the calculation unit, and a pressure compensation unit configured to compensate for the pressure of the cathode gas to be supplied to the fuel cell by increasing the at least one operation amount controlled by the operating state control unit or by decreasing an opening speed of the bypass valve when the bypass valve is opened.
US10141586B2	Fuel cell module, combined power generation system including the same, and temperature control method of fuel cell power generation section A fuel cell includes a cell side insulation (2) separating an internal space of a pressure vessel (205) into an outer space (5) and an inner space (6), a plurality of cell stacks (101) disposed in the inner space, and a lower damper (11-i). In the cell side insulation, a plurality of lower flow passages (7) which connect a lower portion of the outer space to a lower portion of the inner space and a plurality of upper flow passages (8) which connect an upper portion of the outer space to an upper portion of the inner space are formed. The lower damper adjusts a flow rate of a gas that flows toward the inner space from the outer space via the plurality of lower flow passages and flows toward the outer space from the inner space via the plurality of upper flow passages.
US10141580B2	Battery A battery including a casing having an inner surface defining a chamber in which an electrolyte is disposed therein; a conductive surface located within the chamber adjacent the inner surface of the casing, the conductive surface being configured for electrical communication with an anode terminal of the battery; a permeable separator sheet located within the casing configured for electrically isolating the electrolyte from the conductive surface; a conductive rod having a first end configured for electrical communication with a cathode terminal of the battery, and, a second end of the conductive rod configured for electrical communication with the electrolyte; and an opening disposed in the casing; wherein the casing includes at least a first and second portion that are movably attached to each other, the first and second portions being movable relative to each other between at least a first attached position whereby the opening is substantially blocked from allowing ingress of a liquid into the casing via the opening, and, a second attached position whereby the opening is substantially unblocked so as to allow ingress of the liquid into contact with the electrolyte in the chamber via the opening to activate the battery by generating a potential difference between the conductive surface and the conductive rod.
US10141579B2	Metal oxide-carbon nanomaterial composite, method of preparing the same, catalyst, method of preparing the same, and catalyst layer for fuel cell electrodes Provided are a metal oxide-carbon nanomaterial composite, a method of preparing the metal oxide-carbon nanomaterial composite, a catalyst, a method of preparing the catalyst, and a catalyst layer that includes the catalyst and that is used for fuel cell electrodes. The metal oxide-carbon nanomaterial composite includes a metal oxide particle having a specific surface area of 5 square meters per gram (m2/g) or less, and a carbon nanomaterial formed on a surface of the metal oxide particle. The catalyst includes a metal oxide-carbon nanomaterial composite in which a carbon nanomaterial is formed on a metal oxide particle, and an active metal particle formed on a surface of the carbon nanomaterial.
US10141578B2	Method for producing fuel cell membrane electrode assembly A method for producing a fuel cell membrane electrode assembly includes: a step of bonding a polymer electrolyte membrane and a first catalyst layer-including substrate; a step of making a cut by way of a laser beam so that the first catalyst layer-including substrate bonded with the polymer electrolyte membrane becomes a predetermined shape; a step of peeling an unwanted portion of the first catalyst layer-including substrate from the polymer electrolyte membrane; and a step of forming a second catalyst layer on the other face of the polymer electrolyte membrane, and punching out the polymer electrolyte membrane and second catalyst layer so that the first catalyst layer-including substrate of the predetermined shape bonded on one face is surrounded, in which the laser beam has a wavelength that penetrates the polymer electrolyte membrane without penetrating the first catalyst layer-including substrate.
US10141576B2	Electrode structure for lithium secondary battery and lithium secondary battery having the electrode structure There is provided an electrode for a lithium secondary battery. The electrode include a current collector; nanoparticles distributed on a surface of the current collector, each of the nanoparticles including a transition metal or an oxide of the transition metal; and an active material layer disposed on a surface of the current collector having the nanoparticles distributed thereon. This electrode may be employed as a negative electrode for the lithium second battery, to improve a capacity of the lithium second battery.
US10141573B2	Lithium secondary battery negative electrode active material and method for manufacturing same The teachings herein are directed at a lithium secondary battery negative electrode active material consisting of a Sn Sb based sulfide that delivers a high electrode capacity density, excellent output characteristics, and excellent cycle life characteristics and also provide a method for manufacturing the lithium secondary battery negative electrode active material, said method being capable of easily manufacturing the high performance lithium secondary battery negative electrode active material at low cost without requiring a high-temperature processing step and special facilities as required in a glass melting method. The negative electrode active material preferably is prepared using a method that includes a step of obtaining a Sn Sb based sulfide precipitate by adding an alkali metal sulfide to a mixed solution of a tin halide and an antimony halide.
US10141571B2	Nickel-cobalt composite hydroxide and method and device for producing same, cathode active material for non-aqueous electrolyte secondary battery and method for producing same, and non-aqueous electrolyte secondary battery To improve cycling characteristics of a non-aqueous electrolyte secondary battery by obtaining a nickel-cobalt composite hydroxide having a sharp particle size distribution as a precursor, a slurry including a nickel-cobalt composite hydroxide obtained by continuously supplying an aqueous solution that includes at least nickel and cobalt, an ammonium ion donor aqueous solution and a caustic alkali aqueous solution to a reaction vessel and reacting, is continuously extracted and separated into a large particle size portion and s small particle size portion by classification, and the small particle size portion is continuously returned to the reaction vessel. As a result, a nickel-cobalt composite hydroxide is obtained that is expressed by the general formula: Ni1-x-yCoxMy(OH)2 (where, 0.05≤x≤0.50, 0≤y≤0.10, 0.05≤x+y≤0.50, and M is at least one kind of metal element selected from among Al, Mg, Mn, Ti, Fe, Cu, Zn and Ga, and that satisfies the relationships (D50−D10)/D50≤0.30, and (D90−D50)/D50≤0.30 among D10, D50 and D90 of this composite hydroxide.
US10141570B2	Positive electrode active material for lithium secondary cell The present invention relates to a positive electrode active material including a lithium metal composite oxide having a layer crystal structure, and provides a novel positive electrode active material for a lithium secondary cell, which can suppress the reaction with an electrolyte solution and can raise the charge-discharge cycle ability of the cell, and can make good the output characteristics of the cell. There is proposed a positive electrode active material for a lithium secondary cell, including an active particle having a surface portion where one or a combination of two or more (these are referred to as “surface element A”) of the group consisting of Al, Ti and Zr is present, on a surface of a particle including a lithium metal composite oxide having a layer crystal structure and represented by the general formula: Li1+xM1−xO2 (wherein M is one or a combination of two or more (these are referred to as “constituent element M”) of the group consisting of Mn, Co, Ni, transition elements of from the third group elements to the 11th group elements of the periodic table, and typical elements up to the third period of the periodic table), wherein the ratio (CA/CM) of a concentration CA of the surface element A to a concentration CM of the constituent element M is higher than 0 and lower than 0.8, as measured by XPS; the amount of surface lithium impurity is smaller than 0.40% by weight; and in an X-ray diffraction pattern measured by XRD, the ratio (003)/(104) of an integral intensity of the peak originated from the (003) plane to an integral intensity of the peak originated from the (104) plane is higher than 1.15.
US10141566B2	Lithium secondary battery including a coated cathode material and solid electrolyte, and method of preparing the same A lithium secondary battery wherein the cathode layer comprises a cathode active material particle having a coating layer that is on at least a portion of a surface of the cathode active material particle, and a solid electrolyte particle which is in contact with the coating layer, wherein an average particle diameter of the cathode active material secondary particle is in a range of about 3 micrometers to about 10 micrometers, wherein the coating layer is amorphous and contains at least one element selected from metal elements not including nickel, and semi-metal elements, and wherein a mole ratio of the at least one element of the coating layer and all of the metal elements, not including lithium, or semi-metal elements in the cathode active material particle is in a range of about 0.1 mole percent to about 10 mole percent.
US10141565B2	Non-aqueous electrolyte secondary battery comprising surface-coated positive electrode material Provided is a non-aqueous electrolyte secondary battery excellent in durability, the non-aqueous electrolyte secondary battery including a positive electrode active material, the surface of which is coated with a film formed of an inorganic solid electrolyte, wherein a change in volume of the positive electrode active material during charge and discharge is reduced to prevent deterioration of the film with which the surface of the positive electrode active material is coated. In a non-aqueous electrolyte secondary battery including a positive electrode active material, the surface of which is coated with a film formed of an inorganic solid electrolyte, the positive electrode active material is a lithium-containing composite oxide having a spinel structure, and contains at least one of Ti and Mg as an additional element.
US10141562B2	Anode and battery A battery capable of improving the cycle characteristics is provided. The battery includes a cathode, an anode, and an electrolytic solution. The anode includes an anode active material layer containing an anode active material having silicon as an element, and a coating layer that coats the anode active material layer, and contains an oxide of a 3d transition metal element at least one selected from the group consisting of iron, cobalt, and nickel.
US10141560B2	Energy storage device including a pressing member pressing a separator toward an electrode assembly Provided is an energy storage device which includes an electrode assembly in which electrode plates are stacked; and a current collector connected to an end portion of the electrode assembly, wherein the end portion of the electrode assembly includes: an electrode plate welded portion at which the stacked electrode plates are welded to each other in a stacking direction and not joined to the current collector; and a current collector joined portion which is joined to the current collector and is arranged adjacently to the electrode plate welded portion in a current collector extending direction that intersects with the stacking direction.
US10141558B2	Separator for lithium-ion battery and method for preparing the same A separator for a lithium-ion battery includes a substrate, a coating, and a middle layer formed between the substrate and the coating. The middle layer includes a part of the substrate and a part of the coating. The substrate contains a base polymer, a first polymer, and a first inorganic material. The coating contains a second polymer and a second inorganic material. The first polymer and the second polymer independently contain an acid radical in a side chain thereof. The first inorganic material is reactive with the first polymer via a first neutralization reaction, and the second inorganic material is reactive with the second polymer via a second neutralization reaction. A method for preparing a separator for a lithium-ion battery and a lithium-ion battery are also provided.
US10141557B2	Adhesive for lithium ion secondary batteries, separator for lithium ion secondary batteries, and lithium ion secondary battery An adhesive for a lithium ion secondary battery, for bonding members for constituting a lithium ion secondary battery, the adhesive including a particulate polymer, wherein the particulate polymer has a core-shell structure including a core portion and a shell portion that partially covers an outer surface of the core portion, the core portion is formed from a polymer having a swelling degree in an electrolytic solution of 5 times or more and 30 times or less, and the shell portion is formed from a polymer having a swelling degree in an electrolytic solution of more than 1 time and 4 times or less.
US10141551B2	Battery system A battery system includes a first battery pack, a second battery pack, a bidirectional power converter, and a current controller. The first battery pack includes at least one first battery cell. The second battery pack is connected to the first battery pack in parallel and includes at least one second battery cell. The bidirectional power converter is connected between the first battery pack and the second battery pack. The current controller sets a discharge current limit of the first battery pack based on a state of charge of the first battery pack and controls the bidirectional power converter to cause the first battery pack to output a discharge current that is less than or equal to the discharge current limit.
US10141548B2	Battery packaging material, battery, and method for producing same A method for producing a battery packaging material, the method including the steps of: providing a battery packaging material including a laminate in which at least a base material layer, a metal layer, and a sealant layer containing a polyolefin resin are laminated in this order; and confirming that the intensity ratio X=P/Q is in the range of 0.05 to 0.80 where P is a peak intensity P at 1650 cm−1 originating from C═O stretching vibration of the amide group of an amide-based lubricant, and Q is a peak intensity Q at 1460 cm−1 originating from bending vibration of the group —CH2— of the polyolefin resin, each of which is measured from an absorption spectrum obtained by splitting reflected light in irradiation of the surface of the sealant layer with an infrared ray, and P/Q is a ratio of the peak intensity P to the peak intensity Q.
US10141546B2	Inner case of battery module assembly for vehicle's battery pack Disclosed is an inner case of a battery module assembly in which four battery modules, each having a plurality of cylindrical secondary battery cells (hereinafter, also referred to as ‘cells’), are electrically connected in series. The inner case includes a side frame making contact with two facing sides among sides of the battery module assembly, an upper frame making contact with an upper surface of the battery module assembly, and an electrode post electrically connected to an electrode of the battery module assembly and located at a top of the upper frame. Therefore, it is possible to provide an inner case of a stable and economic battery module including a plurality of secondary battery cells.
US10141544B2	Electroluminescent display device and manufacturing method thereof A highly reliable display device or electronic device is provided. The display device includes a first electrode, a second electrode, a light-emitting layer between the first electrode and the second electrode, and a protective film over the second electrode. The protective film includes a first insulating film and a second insulating film over the first insulating film. The first insulating film includes one or more of aluminum oxide, hafnium oxide, and zirconium oxide, and the second insulating film includes one or more of aluminum oxide, hafnium oxide, and zirconium oxide. A composition of the first insulating film is different from a composition of the second insulating film. A water vapor transmission rate of the protective film is lower than 1×10−2 g/(m2·day).
US10141543B2	Method for manufacturing electronic device Provided is a method of manufacturing an electronic device. An electronic device having excellent moisture blocking property and durability may be provided by the method.
US10141539B2	Display device A display device includes: a resin layer on the circuit layer including a groove surrounding and separating a display area; light-emitting elements on an upper surface of the resin layer so as to emit light with luminances controlled by the currents; a sealing layer covering the light-emitting elements; a second substrate above the sealing layer; a sealing material provided between the sealing layer and the second substrate so as to surround the display area and the groove; and a filling layer surrounded by the sealing material between the sealing layer and the second substrate. The groove is formed along a line describing a shape that is inscribed in a rectangle and not in contact with corners of the rectangle as viewed in a direction vertical to the upper surface of the resin layer.
US10141535B2	Optoelectronic component and a method for producing an optoelectronic component An optoelectronic component may include a first electrode having one outer electrode segment formed at a lateral edge of the first electrode, and one inner electrode segment formed apart from the lateral edge of the first electrode, an electrically conductive current distribution structure formed above the first electrode and having one outer substructure extending over the outer electrode segment, and one inner substructure extending over the inner electrode segment and electrically insulated from the outer substructure, one current lead extending from the lateral edge of the first electrode toward the inner substructure, electrically coupled to the inner substructure, electrically insulated from the outer substructure and which structure corresponds to the current distribution structure, an insulation structure, which covers the current distribution structure and the current lead, an organic functional layer structure, and a second electrode above the organic functional layer structure.
US10141532B2	Curable encapsulants and use thereof The present invention relates to curable barrier encapsulants or sealants for electronic devices that have pressure sensitive adhesive properties. The encapsulants are especially suitable for organic electronic devices that require lower laminating temperature profiles. The encapsulant protects active organic/polymeric components within an organic electronic device from environmental elements, such as moisture and oxygen.
US10141530B2	Thin film transistor and manufacturing method thereof, array substrate, and display apparatus This invention provides a thin film transistor and a manufacturing method thereof, an array substrate, and a display apparatus. This thin film transistor comprises an organic semiconductor layer and a source drain electrode layer, and further comprises a metal oxide insulating layer, wherein the metal oxide insulating layer is provided between the organic semiconductor layer and the source drain electrode layer and has a work function higher than that of the source drain electrode layer. In the thin film transistor provided by this invention, the metal oxide insulating layer having a higher work function can generate an interface dipole barrier so as to reduce the difficulty for the carriers in the source drain electrode to enter the organic semiconductor layer and thereby it is possible to decrease the contact resistance between the source drain electrode layer and the semiconductor layer and improve electrical properties of the thin film transistor.
US10141529B1	Enhancing drive current and increasing device yield in N-type carbon nanotube field effect transistors Embodiments of the invention are directed to methods and resulting structures for enhancing drive current and increasing device yield in n-type carbon nanotube field effect transistors (CNT FETs) with scaled contacts using a wetting layer. In some embodiments of the invention, a nanotube is formed over a surface of a substrate. An insulating layer is formed over the nanotube such that end portions of the nanotube are exposed. A low work function metal is formed over the end portions of the nanotube and a wetting layer is formed between the low work function metal and the nanotube.
US10141527B2	Foldable substrate, method for forming the same and flexible display device A foldable substrate, a method for forming the same, and a flexible display device are provided. The foldable substrate includes a plurality of rigid supporting portions separated from each other, every two of which are not in contact with each other, and a flexible foldable portion connecting two adjacent rigid supporting portions of the plurality of rigid supporting portions.
US10141526B2	Peeling method using separating peeling layer and layer to be peeled A flexible device is provided. The hardness of a bonding layer of the flexible device is set to be higher than Shore D of 70, or preferably higher than or equal to Shore D of 80. The coefficient of expansion of a flexible substrate of the flexible device is set to be less than 58 ppm/° C., or preferably less than or equal to 30 ppm/° C.
US10141524B2	Phosphorescent organometallic iridium complex, light-emitting element, light-emitting device, electronic device, and lighting device A novel phosphorescent organometallic iridium complex is provided in which a coordination position of a ligand with respect to a metal can be controlled in synthesis. A novel phosphorescent organometallic iridium complex is provided which can keep high quantum efficiency and can emit phosphorescence in the blue to green wavelength region. A phosphorescent organometallic iridium complex which includes a structure represented by General Formula (G1) and whose ligand is a 4H-1,2,4-triazole compound which has an unsubstituted phenyl group at the 3-position, a substituted or unsubstituted phenyl group at the 4-position, and a phenyl group at the 5-position. In the phenyl group at the 5-position, an alkyl group is bonded to at least one of the ortho-positions, and the other of the ortho-positions, the meta-positions, and the para-position are substituted or unsubstituted.
US10141522B2	Compound, material for organic electroluminescence element, organic electroluminescence element, and electronic device A compound represented by formula (1): wherein R1 to R6, R7 to R10, R11 to R14, R15 to R18, L1, L2, Ar1, and Ar2 are as defined in the description realizes an organic electroluminescence device with long lifetime.
US10141518B2	Compounds for electronic devices The present invention relates to a compound of the formula (I), to the use of this compound in an electronic device, and to an electronic device comprising one or more compounds of the formula (I). The invention furthermore relates to the preparation of the compound of the formula (I) and to a formulation comprising one or more compounds of the formula (I).
US10141513B2	Polymeric light emitting substance and polymer light emitting device using the same A polymeric light emitting substance having a polystyrene reduced number-average molecular weight of from 103 to 108 wherein this light emitting substance has in the main chain or side chain a metal complex structure showing light emission from the triplet excited state, and the substance can form a light emitting layer by industrially simple application methods such as a spin coat method, inkjet method, printing method and the like.
US10141512B2	Conducting and semi-conducting alignment materials The invention relates to conducting and semi-conducting photoreactive compounds, represented by the general formula (I), to the use of these compounds for the preparation of oriented and/or orientation layers; and to their use in the construction of unstructured and structured optical, electro optical or optoelectronic elements and multi-layer systems.
US10141497B2	Thin film stack The present disclosure is drawn to a thin film stack including a substrate, a metal layer, and an adhesive layer. The adhesive layer comprises a blend of zinc oxide and tin oxide, and the adhesive layer is adhered between the substrate and the metal layer.
US10141495B1	Microsystems-based method and apparatus for passive detection and processing of radio-frequency signals A radio frequency (RF) receiver comprises a passive impedance transforming voltage amplifier and a resonant, latching micromechanical switch having a deflectable bridge, an RF actuation electrode receivingly connected to the amplifier, and a DC bias electrode positioned to latch the switch in a closed position by electrostatic attraction when energized by a suitable voltage. The bridge is configured with a mechanical mode of vibration that periodically urges the switch toward the closed position.
US10141490B2	Composite base and method of manufacturing light emitting device A method of manufacturing a light emitting device includes: providing a light emitting device set that includes a lead frame being plate-like and including pairs of supporting leads each of which pairs consists of a first supporting lead and a second supporting lead, packages respectively supported by the pairs of supporting leads, and light emitting elements respectively mounted on the packages; and removing the packages from the lead frame. The packages each include a resin molded body, the resin molded body includes a first recess open at the first and third outer surfaces, and a second recess open at the second and third outer surfaces. The first supporting lead and the second supporting lead respectively fit into the first recess and the second recess. In the removing step, the packages are each removed from the lead frame by the third outer surface being pushed.
US10141489B1	LED illumination apparatus A lens casing in an LED illumination apparatus hermetically housing LED elements is cooled. The LED illumination apparatus includes a tubular lens casing, an LED holding part mounting the LED elements thereon, and a base part to which the lens casing is coupled. The base part has a concave part for housing the LED holding part, and the lens casing is coupled to the base part, thereby hermetically sealing the internal space of the lens casing. The base part has support columns protruding into a space outside the LED illumination apparatus and supporting a fan device. The fan device makes taken-in air collide with the base part and exhausts the air through the window parts each formed by adjacent support columns and the side of the frame of the fan device and the side of the base part that face each other as upper and lower frames thereof.
US10141484B2	Light emitting device A light emitting device includes a light emitting element having a peak emission wavelength of 410 nm to 440 nm and a phosphor member. The phosphor member includes a first phosphor having a peak emission wavelength of 430 nm to 500 nm and containing an alkaline-earth phosphate, a second phosphor having a peak emission wavelength of 440 nm to 550 nm and containing at least one of an alkaline-earth aluminate and a silicate containing Ca, Mg, and Cl, a third phosphor having a peak emission wavelength of 500 nm to 600 nm and containing a rare-earth aluminate, a fourth phosphor having a peak emission wavelength of 610 nm to 650 nm and containing a silicon nitride containing Al and at least one of Sr and Ca, and a fifth phosphor having a peak emission wavelength of 650 nm to 670 nm and containing a fluorogermanate.
US10141482B2	Semiconductor light emitting device A semiconductor light emitting device includes a light emitting chip that includes a semiconductor layer at a first surface. A transparent film is provided on the semiconductor layer and forms an interface therewith. A phosphor resin layer, including a resin and a phosphor, is provided on the transparent film. A refractive index of the transparent film is greater than a refractive index of the semiconductor layer.
US10141475B1	Method for binding micro device to conductive pad A method for binding a micro device to a conductive pad of an array substrate is provided. The method includes: forming a liquid layer on the conductive pad of the array substrate; disposing the micro device over the conductive pad such that the micro device is in contact with the liquid layer and is gripped by a capillary force produced by the liquid layer between the micro device and the conductive pad, wherein the micro device comprises an electrode facing the conductive pad; and evaporating the liquid layer such that the electrode is bound to and is in electrical contact with the conductive pad.
US10141473B1	Photovoltaic devices and method of making Embodiments of a photovoltaic device are provided herein. The photovoltaic device can include a layer stack and an absorber layer disposed on the layer stack. The absorber layer can include a first region and a second region. Each of the first region of the absorber layer and the second region of the absorber layer can include a compound comprising cadmium, selenium, and tellurium. An atomic concentration of selenium can vary across the absorber layer. The first region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. The second region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. A ratio of an average atomic concentration of selenium in the first region of the absorber layer to an average atomic concentration of selenium in the second region of the absorber layer can be greater than 10.
US10141472B2	Photodiode structures Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.
US10141471B2	Proximity detector device with interconnect layers and related methods A proximity detector device may include a first interconnect layer including a first dielectric layer, and first electrically conductive traces carried thereby, an IC layer above the first interconnect layer and having an image sensor IC, and a light source IC laterally spaced from the image sensor IC. The proximity detector device may include a second interconnect layer above the IC layer and having a second dielectric layer, and second electrically conductive traces carried thereby. The second interconnect layer may have first and second openings therein respectively aligned with the image sensor IC and the light source IC. Each of the image sensor IC and the light source IC may be coupled to the first and second electrically conductive traces. The proximity detector device may include a lens assembly above the second interconnect layer and having first and second lenses respectively aligned with the first and second openings.
US10141468B2	Method and apparatus for a thermophotovoltaic cell The present device is a thermophotovoltaic (TPV) cell adapted to charge the battery of an electronic device efficiently and cost-effectively. This is accomplished by specifically layering N-Type and P-type semiconductors in several layers while also introducing extrinsic doping agents that add to the conductivity of the oxides used for generating energy using ambient thermal energy. As such, electrical energy can effectively be drawn from a single heat reservoir.
US10141467B2	Solar cell and method for manufacturing the same Discussed is a solar cell including a semiconductor substrate, a first conductive type region formed on a surface of the semiconductor substrate, a second conductive type region formed on the other surface of the semiconductor substrate, the second conductive type region being spaced from an edge of the semiconductor substrate and having a conductive type different from that of the first conductive type region, an isolation portion formed at a perimeter of the second conductive type region on the other surface of the semiconductor substrate, a first electrode connected to the first conductive type region, and a second electrode connected to the second conductive type region, wherein the second conductive type region has a boundary portion in a part adjacent to the isolation portion, and in which a doping concentration or a junction depth varies over a width of the boundary portion.
US10141456B2	Schottky diode and method for its manufacturing The invention disclosure describes a manufacturing method for realizing so-called JBS areas for a unipolar power diode on the basis of diamond. In this special method, an n-doped layer is applied to the typically p-doped drift region, e.g. by means of epitaxial layer growth. The applied n-doped layer is then removed again in defined areas. A photolithographic mask may be applied and the n-doped layer is removed by dry or wet chemical etching. Having structured the JBS areas, the Schottky metal is applied to the entire surface. The resulting JBS structure shields an electric field generated by an applied reverse voltage from the Schottky transition. The reverse voltage from which the Schottky transition is fully shielded can be adjusted by altering the distance between the JBS areas.
US10141449B2	Oxide thin film transistor, array substrate and display device The embodiments of the present invention provides an oxide TFT, an array substrate and a display device, an oxide channel layer of the oxide TFT comprises a front channel oxide layer and a back channel oxide layer, a conduction band bottom of the back channel oxide layer being higher than a conduction band bottom of the front channel oxide layer, and a band gap of the back channel oxide layer being larger than a band gap of the front channel oxide layer. In the oxide TFT, the array substrate and the display device provided in the present invention, it is possible to accumulate a large number of electrons through the potential difference formed between oxide channel layers of a multilayer structure so as to increase the carrier concentration in the oxide channel layers to achieve the purpose of improving TFT mobility without damaging TFT stability.
US10141446B2	Formation of bottom junction in vertical FET devices Formation of a bottom junction in vertical FET devices may include, for instance, providing an intermediate semiconductor structure comprising a semiconductor substrate, a fin disposed on the semiconductor substrate. The fin has a top surface, spaced-apart vertical sides. A mask is disposed over the top surface of the fin, and at least one is disposed over the vertical sides of the fin. Portions of the substrate are removed to define spaced-apart recesses each extending below a respective one of the spacers. Semiconductor material is grown, such as epitaxially grown, in the recesses.
US10141445B2	Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors A nano-sheet semiconductor structure and a method for fabricating the same. The nano-sheet structure includes a substrate and at least one alternating stack of semiconductor material layers and metal gate material layers. The nano-sheet semiconductor structure further comprises a source region and a drain region. A first plurality of epitaxially grown interconnects contacts the source region and the semiconductor layers in the alternating stack. A second plurality of epitaxially grown interconnects contacts the drain region and the semiconductor layers in the alternating stack. The method includes removing a portion of alternating semiconductor layers and metal gate material layers. A first plurality of interconnects is epitaxially grown between and in contact with the semiconductor layers and the source region. A second plurality of interconnects is epitaxially grown between and in contact with the semiconductor layers and the drain region.
US10141443B2	Semiconductor devices FinFET devices with optimized strained-sourece-drain recess profiles and methods of forming the same Semiconductor devices, FinFET devices with optimized strained-source-drain recess profiles and methods of forming the same are provided. One of the semiconductor devices includes a substrate, a gate stack over the substrate and a strained layer in a recess of the substrate and aside the gate stack. Besides, a ratio of a depth at the greatest width of the recess to a width of the gate stack ranges from about 0.5 to 0.7.
US10141442B2	Semiconductor device having tipless epitaxial source/drain regions A semiconductor device having tipless epitaxial source/drain regions and a method for its formation are described. In an embodiment, the semiconductor device comprises a gate stack on a substrate. The gate stack is comprised of a gate electrode above a gate dielectric layer and is above a channel region in the substrate. The semiconductor device also comprises a pair of source/drain regions in the substrate on either side of the channel region. The pair of source/drain regions is in direct contact with the gate dielectric layer and the lattice constant of the pair of source/drain regions is different than the lattice constant of the channel region. In one embodiment, the semiconductor device is formed by using a dielectric gate stack placeholder.
US10141437B2	Extreme high mobility CMOS logic A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.
US10141434B2	Complementary tunneling field effect transistor and manufacturing method therefor A complementary tunneling field effect transistor and a manufacturing method are disclosed, which includes: a first drain region and a first source region that are disposed on a substrate, where they include a first dopant; a first channel that is disposed on the first drain region and a second channel that is disposed on the first source region; a second source region that is disposed on the first channel and a second drain region that is disposed on the second channel, where they include a second dopant; a first epitaxial layer that is disposed on the first drain region and the second source region, and a second epitaxial layer that is disposed on the second drain region and the first source region; and a first gate stack layer that is disposed on the first epitaxial layer, and a second gate stack layer that is disposed on the second epitaxial layer.
US10141433B2	Method of manufacturing thin film transistor The present application discloses a method of manufacturing a thin film transistor, including following steps: forming a gate electrode on the top surface of the substrate; depositing a gate insulating layer, a semiconductor material and an etching stop layer sequentially on the gate electrode; patterning the etching stop layer by a first mask to form a stopper; depositing a second metal layer; using a second mask and a photoresist to form a source electrode region, a drain electrode region and a channel region on the surface of the second metal layer; etching the periphery region of the source electrode region, the drain electrode region and the channel region to expose the gate insulating layer; removing the photoresist and etching the second metal layer within the channel, and form a source electrode and a drain electrode by the remaining second metal layer; and irradiating the bottom of the substrate.
US10141432B2	Semiconductor structure A method for making a semiconductor device. A substrate having a fin structure is provided. A continuous dummy gate line is formed on the substrate. The dummy gate line strides across the fin structure. A source/drain structure is formed on the fin structure on both sides of the dummy gate line. An interlayer dielectric (ILD) is formed on the dummy gate line and around the dummy gate line. The ILD is polished to reveal a top surface of the dummy gate line. After polishing the ILD, the dummy gate line is segmented into separate dummy gates.
US10141431B1	Epitaxy source/drain regions of FinFETs and method forming same A method includes forming isolation regions extending into a semiconductor substrate, and recessing the isolation regions, so that portions of semiconductor strips between the isolation regions protrude higher than the isolation regions to form semiconductor fins. The method further includes recessing the semiconductor fins to form recesses, epitaxially growing a first semiconductor material from the recesses, etching the first semiconductor material, and epitaxially growing a second semiconductor material from the first semiconductor material that has been etched back.
US10141429B2	FinFET having isolation structure and method of forming the same A transistor includes a substrate having an upper surface, a fin structure protruding from the upper surface of the substrate, a first isolation structure over the upper surface of the substrate, and a second isolation structure. The fin structure extends along a first direction and comprising a lower portion and an upper portion. The first isolation structure surrounds the lower portion of the fin structure. The second isolation structure is at least partially embedded in the upper portion of the fin structure.
US10141428B2	Fin formation in fin field effect transistors A method of forming a semiconductor device that includes forming a silicon including fin structure and forming a germanium including layer on the silicon including fin structure. Germanium is then diffused from the germanium including layer into the silicon including fin structure to convert the silicon including fin structure to silicon germanium including fin structure.
US10141427B2	Methods of manufacturing semiconductor devices including gate pattern, multi-channel active pattern and diffusion layer A semiconductor device includes a gate pattern on a substrate, a multi-channel active pattern under the gate pattern to cross the gate pattern and having a first region not overlapping the gate pattern and a second region overlapping the gate pattern, a diffusion layer in the multi-channel active pattern along the outer periphery of the first region and including an impurity having a concentration, and a liner on the multi-channel active pattern, the liner extending on lateral surfaces of the first region and not extending on a top surface of the first region. Related fabrication methods are also described.
US10141420B1	Transistors with dielectric-isolated source and drain regions Semiconductor devices and method of forming the same include forming a sacrificial layer on source/drain regions of a semiconductor layer. A reactant layer is formed on the sacrificial layer. The reactant layer and sacrificial layer are annealed to convert the reactant layer to a dielectric layer. Source and drain regions are formed on the dielectric layer.
US10141418B1	Device with heteroepitaxial structure made using a growth mask A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
US10141414B1	Negative capacitance matching in gate electrode structures A gate electrode structure of a transistor element may be provided as a series connection of a negative capacitor portion and a floating electrode portion. When forming the negative capacitor portion, the value of the negative capacitance may be adjusted on the basis of two different mechanisms or manufacturing processes, thereby providing superior matching of the positive floating gate electrode portion and the negative capacitor portion. For example, the layer thickness of the ferroelectric material and the effective capacitive area of the dielectric material may be adjusted on the basis of independent manufacturing processes.
US10141412B2	Field effect transistor using transition metal dichalcogenide and a method for manufacturing the same A field effect transistor (FET) includes a gate dielectric layer, a two-dimensional (2D) channel layer formed on the gate dielectric layer and a gate electrode. The 2D channel layer includes a body region having a first side and a second side opposite to the first side, the body region being a channel of the FET. The 2D channel layer further includes first finger regions each protruding from the first side of the body region and second finger regions each protruding from the second side of the body region. A source electrode covers the first finger regions, and a drain electrode covers the second finger regions.
US10141407B2	Graphene device and method of manufacturing the same According to example embodiments, a graphene device includes a first electrode, a first insulation layer on the first electrode, an information storage layer on the first insulation layer, a second insulation layer on the information storage layer, a graphene layer on the second insulation layer, a third insulation layer on a first region of the graphene layer, a second electrode on the third insulation layer, and a third electrode on a second region of the graphene layer.
US10141405B2	Lateral bipolar junction transistor with abrupt junction and compound buried oxide A lateral bipolar junction transistor (LBJT) device that may include a dielectric stack including a pedestal of a base region passivating dielectric and a nucleation dielectric layer; and a base region composed of a germanium containing material or a type III-V semiconductor material in contact with the pedestal of the base region passivating dielectric. An emitter region and collector region may be present on opposing sides of the base region contacting a sidewall of the pedestal of the base region passivating dielectric and an upper surface of the nucleation dielectric layer.
US10141404B2	Power semiconductor device having fully depleted channel region A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, first and second cells electrically connected to the first load terminal structure and to a drift region, the drift region having a first conductivity type; a first mesa in the first cell and including: a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region; a second mesa in the second cell and including: a port region of the opposite conductivity type and electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined, in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure. The insulation structure houses a control electrode structure, and a guidance electrode arranged between the mesas.
US10141402B2	FinFET devices FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in finFET devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material. The method further includes forming a second set of trenches in the semiconductor material, alternating with the first set of trenches that are filled. The second set of trenches form semiconductor structures which have a dimension of fin structures. The method further includes filling the second set of trenches with insulator material. The method further includes recessing the insulator material within the first set of trenches and the second set of trenches to form the fin structures.
US10141401B2	Method for forming semiconductor device structure A method for forming a semiconductor device structure is provided. The method includes performing a first plasma etching process on a substrate to form a first trench in the substrate. The method includes removing a second portion of the substrate under the bottom surface to form a second trench under and connected to the first trench. The second trench surrounds a third portion of the substrate under the first portion. The third portion has a first sidewall. The first sidewall is inclined relative to the top surface at a second angle, and the first angle is greater than the second angle. The method includes forming an isolation structure in the first trench and the second trench. The method includes forming a gate insulating layer over the top surface and the first inclined surface. The method includes forming a gate over the gate insulating layer and the isolation structure.
US10141400B2	Semiconductor devices including field effect transistors with dummy gates on isolation A semiconductor device includes device isolation layer on a substrate to define an active region, a first gate electrode on the active region extending in a first direction parallel to a top surface of the substrate, a second gate electrode on the device isolation layer and spaced apart from the first gate electrode in the first direction, a gate spacer between the first gate electrode and the second gate electrode, and source/drain regions in the active region at opposite sides of the first gate electrode. The source/drain regions are spaced apart from each other in a second direction that is parallel to the top surface of the substrate and crossing the first direction, and, when viewed in a plan view, the first gate electrode is spaced apart from a boundary between the active region and the device isolation layer.
US10141399B2	Semiconductor device According to an embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a first insulating layer, and a first insulating region. The second semiconductor region is provided on the first semiconductor region. The first insulating layer is provided around at least a portion of the first semiconductor region and at least a portion of the second semiconductor region. The first insulating layer contacts the second semiconductor region. The first insulating region is provided around at least a portion of the first insulating layer.
US10141398B1	High voltage MOS structure and its manufacturing method A semiconductor structure includes a HV NMOS structure. The HV NMOS structure includes a source region, a drain region, a channel region, a gate dielectric, and a gate electrode. The source region and the drain region are separated from each other. The channel region is disposed between the source region and the drain region. The channel region has a channel direction from the source region toward the drain region. The gate dielectric is disposed on the channel region and on portions of the source region and the drain region. The gate electrode is disposed on the gate dielectric. The gate electrode includes a first portion of n-type doping and two second portions of p-type doping. The two second portions are disposed at two sides of the first portion. The two second portions have an extending direction perpendicular to the channel direction.
US10141397B2	Semiconductor device and method of manufacturing the same A super junction structure having a high aspect ratio is formed. An epitaxial layer is dividedly formed in layers using the trench fill process, and when each of the layers has been formed, trenches are formed in that layer. For example, when a first epitaxial layer has been formed, first trenches are formed in the epitaxial layer. Subsequently, when a second epitaxial layer has been formed, second trenches are formed in the epitaxial layer. Subsequently, when a third epitaxial layer has been formed, third trenches are formed in the third epitaxial layer.
US10141392B2	Microstructure modulation for 3D bonded semiconductor structure with an embedded capacitor A three-dimensional (3D) bonded semiconductor structure is provided in which a first bonding oxide layer of a first semiconductor structure is bonded to a second bonding oxide layer of a second semiconductor structure. Each of the first and second bonding oxide layers has a metallic capacitor plate structure embedded therein, wherein each metallic capacitor plate structure has a columnar grain microstructure. A high-k dielectric material is present between the first and second metallic capacitor plate structures. The presence of the columnar grain microstructure in the metallic capacitor plate structures can provide an embedded capacitor that has an improved quality factor, Q.
US10141390B2	Organic light-emitting display apparatus An organic light-emitting apparatus includes a substrate including an active area, a dead area, and a pad area, a display unit disposed in the active area and including thin-film transistors, pixel electrodes, and a portion of a common electrode, a first voltage supply unit disposed on the dead and pad areas and electrically contacting the common electrode, a second voltage supply unit overlapping the common electrode, and spaced apart and electrically insulated therefrom, and an insulating layer disposed between the common electrode and the second voltage supply unit, in which a portion of the common electrode that overlaps the first voltage supply unit is closer to the pad area than that of a portion of the common electrode that overlaps the second voltage supply unit, and an end portion of the insulating layer contacts an end portion of the first voltage supply unit adjacent to the active area.
US10141388B2	Display device with transistor sampling for improved performance A display device including a pixel array having a plurality of pixels arranged in a matrix form, each of the pixels including a sampling transistor configured to sample a data potential from a video signal line which is insulated from and intersects a control line in response to the change in potential of the control line, and a light-emitting element configured to emit light at the brightness commensurate with the magnitude of the post-sampling data potential.
US10141379B2	Organic light emitting diode display device with reduced reflectance An organic light emitting diode display device can include a display panel including a plurality of pixels, at least one pixel among the plurality of pixels including first to fourth sub-pixels defined at intersection regions between gate lines and data lines; and first to third color filter layers corresponding to the first sub-pixel, the third sub-pixel and the fourth sub-pixel, respectively; the second sub-pixel includes: an emission area, and first and second color filter patterns disposed in the second sub-pixel configured to absorb light incident from an outside of the organic light emitting diode display device, the first color filter pattern and a second color filter pattern are different colors; and the first color filter pattern or the second color filter pattern has a first gap between an edge of the first or second color filter pattern and an edge of the emission area.
US10141378B2	Light emitting device free of TFT and chiplet A light emitting device is disclosed, including a first electrode layer, a second electrode layer, and an organic light emitting layer sandwiched between the first and second electrode layers. The second electrode layer is patterned to form a plurality of electrode patterns arranged with different densities. The organic light emitting layer is subjected to a color separation process to form a plurality of monochromatic blocks that correspond to the electrode patterns, respectively. The electrode patterns are divided into a plurality of electrode pattern groups arranged in an alternate manner. The electrode pattern groups display a same image, and a same voltage is applied to the electrode pattern groups at a same time. Alternatively, the electrode pattern groups display different images, and a same or different voltages are applied to the electrode pattern groups at different times. As such, the light emitting device generates grayscale, full-color, three-dimensional or dynamic images.
US10141377B2	Electroluminescent display device An electroluminescent display device includes a substrate on which first and second pixel regions are defined, a passivation layer over the substrate, a first electrode in each of the first and second pixel regions on the passivation layer, a bank layer exposing the first electrode, a light emitting layer on the first electrode exposed by the bank layer, and a second electrode on the light emitting layer, wherein the bank layer includes first and second openings exposing the first electrodes corresponding to the first and second pixel regions, respectively, and a depth of the second opening is larger than a depth of the first opening.
US10141375B2	Display device having a solar cell layer Disclosed is a display device including a solar cell so as to use power produced by a solar energy, and a method for manufacturing the same, wherein the display device includes light-emitting areas provided on a lower substrate, and a solar cell layer provided on an upper substrate confronting the lower substrate, and provided to produce power by absorbing light, wherein the light-emitting areas include first to third light-emitting areas, and the solar cell layer includes first to third organic solar cell layers which are disposed to areas corresponding to the first to third light-emitting areas.
US10141373B2	Memory device and method of manufacturing the same A plurality of first conductive patterns is disposed on a substrate. Each of the plurality of first conductive patterns extends in a first direction. A first selection pattern is disposed on each of the plurality of first conductive patterns. A first barrier portion surrounds the first selection pattern. A first electrode and a first variable resistance pattern are disposed on the first selection pattern. A plurality of second conductive patterns is disposed on the first variable resistance pattern. Each of the plurality of second conductive patterns extends in a second direction crossing the first direction.
US10141370B2	Optoelectronic device and method for manufacturing same The invention relates to an optoelectronic device (45) including: light-emitting diodes (LED) including semiconductor elements (24); current-limiting components (50), wherein each component is connected in series to one of the semiconductor elements and has a resistance that increases with the strength of the current.
US10141369B2	Photo-detector A photo-detector includes a detection region for collecting minority carriers in a substrate, first and second field generating regions generating a majority carrier current to move the minority carriers towards the detection region, and a blocking region spaced apart from the detection region to block a leakage current. The photo-detector includes a ground region spaced apart from the detection region, and the blocking region is disposed between the detection region and the ground region.
US10141366B2	Stacked semiconductor chip RGBZ sensor An apparatus is described that includes a first semiconductor chip having a first pixel array. The first pixel array has visible light sensitive pixels. The apparatus includes a second semiconductor chip having a second pixel array. The first semiconductor chip is stacked on the second semiconductor chip such that the second pixel array resides beneath the first pixel array. The second pixel array has IR light sensitive pixels for time-of-flight based depth detection.
US10141365B2	Solid-state imaging device having improved light-collection, method of manufacturing the same, and electronic apparatus A solid-state imaging device includes: a pixel region in which a plurality of pixels composed of a photoelectric conversion section and a pixel transistor is arranged; an on-chip color filter; an on-chip microlens; and a multilayer interconnection layer in which a plurality of layers of interconnections is formed through an interlayer insulating film. The solid-state imaging device further includes a light-shielding film formed through an insulating layer in a pixel boundary of a light receiving surface in which the photoelectric conversion section is arranged.
US10141364B2	Imaging device including unit pixel cell An imaging device comprising a unit pixel cell comprising: a photoelectric converter that generates an electric signal through photoelectric conversion of incident light; and a signal detection circuit that detects the electric signal, the signal detection circuit comprising a first transistor that amplifies the electric signal, a second transistor that selectively transmits output of the first transistor to outside of the unit pixel cell, and a feedback circuit that forms a feedback loop through which the electric signal is negatively fed back, the feedback loop not passing through the first transistor.
US10141357B2	Photosensor substrate A photosensor substrate achieves TFT property stabilization and further improvement in sensor performance. The photosensor substrate includes a substrate 7, a photoelectric transducer 4, and a transistor 2. The transistor 2 includes a semiconductor layer 22, a drain electrode 23 and a source electrode 21 facing each other in a direction parallel to a plane of the substrate with the semiconductor layer 22 interposed therebetween, a gate insulating film 15 covering the semiconductor layer 22, the drain electrode 23, and the source electrode 21, and a gate electrode 24 facing the semiconductor layer 22 with the gate insulating film 15 interposed therebetween. The photoelectric transducer 4 includes a lower electrode 41 connected to the drain electrode 23 via a contact hole CH1 provided in the gate insulating film 15, a semiconductor film 42, and an upper electrode 43.
US10141352B2	Manufacturing method of array substrate, array substrate and display device A manufacturing method of an array substrate is provided. The method includes sequentially depositing a first electrode layer and a gate metal layer on a base substrate, the first electrode layer including at least two conductive layers, formation materials of the at least two conductive layers having different etching rates. The method also includes forming a photoresist layer on the gate metal layer, exposing and developing the photoresist layer using a halftone mask plate, performing a first etching process on the gate metal layer, etching the first electrode layer, and ashing the photoresist layer, performing a second etching process on the gate metal layer by using remaining photoresist layer as a mask, stripping the remaining photoresist layer, and sequentially forming a semiconductor layer, a source and drain electrode layer, a via-hole and a second electrode layer on the gate metal layer on which the second etching process has been performed.
US10141351B2	Array substrate, display device and manufacturing method for array substrate An array substrate is disclosed. The array substrate includes: a substrate adopting an organic material; an isolation layer adopting a metal material, and the isolation layer is formed on the substrate; and a buffering layer formed at a side of the isolation layer away from the substrate. In the array substrate of the present invention, in a high-temperature PECVD process, a pollution problem caused by the plasma directly bombarding the substrate made of an organic material can be avoid. A display device applying the array substrate and a manufacturing method for an array substrate are also disclosed.
US10141349B2	Thin-film transistor array, fabrication method therefor, image display device and display method A thin-film transistor array includes thin-film transistors each including an insulating substrate which is formed with a gate electrode, a gate wiring, a capacitor electrode and a capacitor wiring. A source electrode and a drain electrode having a gap therebetween and including a semiconductor pattern are formed, in a region overlapping with the gate electrode on the substrate via a gate insulator, with the semiconductor pattern being covered with a protective layer. Two such TFTs are independently formed for each pixel. In each pixel, two source electrodes are separately connected to two respective source wirings, and two drain electrodes are connected to an electrode of the pixel via individual drain-connecting electrodes. The array includes source-connecting electrodes each connecting between the source electrodes of the two TFTs formed for each pixel. The same drive waveform is applied to the two source wirings.
US10141347B2	Array substrate and display device Disclosed are an array substrate and a display device. The array substrate comprises a plurality of first data lines (1) parallel to a short side of the array substrate, a plurality of second data lines (2) parallel to a long side of the array substrate, a first integrated circuit (3) arranged in a short-side frame. The plurality of the second data lines (2) are configured for connecting the first integrated circuit (3) with the plurality of the first data lines (1), and the first integrated circuit (3) transmits data signal to the plurality of first data lines (1) through the plurality of second data lines (2). The first integrated circuit for transmitting signals to the data lines is arranged in the short-side frame, so that there is no more integrated circuit arranged in the long-side frame, thereby reducing the border-width of the long-side frame and increasing the visual effect for the viewer.
US10141346B2	Thin film transistor, manufacturing method thereof and liquid crystal display The present invention discloses a thin film transistor, a liquid crystal display and the manufacturing method of a thin film transistor. The thin film transistor includes a substrate, a gate electrode formed on the surface of the substrate; a gate insulting layer covered on the gate electrode; a semiconductor layer disposed on the surface of the gate insulating layer and corresponding to the gate electrode; an etching stop layer covered the semiconductor layer and having a first through hole and a second through hole; a passivation layer covered the etching stop layer having a third through hole and a fourth through hole; a source electrode disposed on the passivation layer and connected to the semiconductor layer via the first and the third through hole; and a drain electrode disposed on the passivation layer and connected to the semiconductor layer via the second and the fourth through hole.
US10141344B2	Semiconductor device and method of manufacturing the same A semiconductor device having favorable electric characteristics is provided. The semiconductor device includes a first transistor and second transistor. The first transistor includes a first conductor over a substrate; a first insulator thereover; a first oxide thereover; a second insulator over thereover; a second conductor including a side surface substantially aligned with a side surface of the second insulator and being over the second insulator; a third insulator including a side surface substantially aligned with a side surface of the second conductor and being over the second conductor; a fourth insulator in contact with a side surface of the second insulator, a side surface of the second conductor, and a side surface of the third insulator; and a fifth insulator in contact with the first oxide and the fourth insulator. The second transistor includes a third conductor; a fourth conductor at least part of which overlaps with the third conductor; and a second oxide between the third conductor and the fourth conductor. The third conductor and the fourth conductor are electrically connected to the first conductor.
US10141343B2	Oxide semiconductor, thin film transistor, and display device An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
US10141339B2	Embedded security circuit formed by directed self-assembly Embedded security circuits formed by directed self-assembly and methods for creating the same are provided herein. An example integrated circuit includes a set of one or more fin field effect transistor devices unrelated to one or more security devices of the integrated circuit; and an embedded security circuit structure comprising an array of fin field effect transistor devices related to the one or more security devices of the integrated circuit, wherein the array comprises a combination of (i) one or more fin field effect transistor devices with unbroken fin channels and (ii) one or more fin field effect transistor devices with broken fin channels, and wherein the combination forms a distinct code to be associated with the integrated circuit.
US10141336B2	Power gate switching system A semiconductor device includes: a virtual power line extended in a first direction; an n-well extended in the first direction, wherein the virtual power line and the n-well are disposed in a row; a first power gate switch cell disposed in the n-well; a second power gate switch cell disposed in the n-well, wherein the first and second power gate switch cells are first type cells; and a third power gate switch cell disposed in the n-well between the first and second power gate switch cells, wherein the third power gate switch cell is a second type cell different from the first type cells.
US10141334B2	Semiconductor chip including region having rectangular-shaped gate structures and first-metal structures Gate structures are positioned within a region in accordance with a gate horizontal grid that includes at least seven gate gridlines separated from each other by a gate pitch of less than or equal to about 193 nanometers. Each gate structure has a substantially rectangular shape with a width of less than or equal to about 45 nanometers and is positioned to extend lengthwise along a corresponding gate gridline. Each gate gridline has at least one gate structure positioned thereon. A first-metal layer is formed above top surfaces of the gate structures within the region and includes first-metal structures positioned in accordance with a first-metal vertical grid that includes at least eight first-metal gridlines. Each first-metal structure has a substantially rectangular shape and is positioned to extend along a corresponding first-metal gridline. At least six contact structures of substantially rectangular shape contact the at least six gate structures.
US10141333B1	Domain wall control in ferroelectric devices A ferroelectric device includes a first electrode and a second electrode that each comprise one or more electrically conductive layers. The ferroelectric device also includes a layer of ferroelectric material disposed between, and in electrical communication with, the first electrode and the second electrode. The first electrode and/or the second electrode include a recessed region and the layer of ferroelectric material includes a corresponding region of increased thickness that resists polarity changes. For example, a programming signal that is applied across the first and second electrodes may change a polarity of one or more other portions of the layer of ferroelectric material without changing a polarity of a portion of the layer of ferroelectric material that is proximate to the region of increased thickness. A corresponding method is also disclosed herein.
US10141327B2	Semiconductor memory device According to an embodiment, a semiconductor memory device comprises: an insulating layer disposed on a semiconductor substrate; a plurality of memory cell arrays being arranged three-dimensionally on the insulating layer and including a plurality of conductive layers stacked in a first direction that intersects a surface of the semiconductor substrate; and a block insulating layer covering a side surface of one of the plurality of conductive layers. A high permittivity layer is provided between the insulating layer and a lowermost layer of the plurality of conductive layers. A permittivity of the high permittivity layer is much higher than that of the insulating layer.
US10141325B2	Method of manufacturing semiconductor device A performance of a semiconductor device is improved. A film, which is made of silicon, is formed in a resistance element formation region on a semiconductor substrate, and an impurity, which is at least one type of elements selected from a group including a group 14 element and a group 18 element, is ion-implanted into the film, and a film portion which is formed of the film of a portion into which the impurity is ion-implanted is formed. Next, an insulating film with a charge storage portion therein is formed in a memory formation region on the semiconductor substrate, and a conductive film is formed on the insulating film.
US10141321B2	Method of forming flash memory with separate wordline and erase gates A method of forming a non-volatile memory cell includes forming spaced apart first and second regions in a substrate, defining a channel region there between. A floating gate is formed over a first portion of the channel region and over a portion of the first region, wherein the floating gate includes a sharp edge disposed over the first region. A tunnel oxide layer is formed around the sharp edge. An erase gate is formed over the first region, wherein the erase gate includes a notch facing the sharp edge, and wherein the notch is insulated from the sharp edge by the tunnel oxide layer. A word line gate is formed over a second portion of the channel region which is adjacent to the second region. The forming of the word line gate is performed after the forming of the tunnel oxide layer and the erase gate.
US10141319B2	Layout pattern for static random access memory A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a first pass gate device, a second pass gate device, a third pass gate device and a fourth pass gate device disposed on a substrate. A plurality of fin structures is disposed on the substrate, the fin structures including at least one first fin structure and at least one second fin structure. A step-shaped structure is disposed on the substrate, including a first part, a second part and a bridge part. A first extending contact feature crosses over the at least one first fin structure and the at least one second fin structure.
US10141318B2	Structure and method for FinFET SRAM A semiconductor device comprises four SRAM cells in four quadrants of a region of the semiconductor device, wherein the four SRAM cells include FinFET transistors comprising gate features engaging fin active lines, and the fin active lines of the four SRAM cells have reflection symmetry with respect to an imaginary line dividing the four quadrants along a first direction.
US10141314B2	Memories and methods to provide configuration information to controllers A memory system includes a memory controller and a memory module coupled to the memory controller. One such memory module may include a memory package of a first type and a signal presence detect unit configured to provide configuration data associated with a memory package of a second type to the memory controller. The configuration data may be used to configure the memory controller to interface with the memory package of a first type.
US10141311B2	Techniques for achieving multiple transistor fin dimensions on a single die Techniques are disclosed for achieving multiple fin dimensions on a single die or semiconductor substrate. In some cases, multiple fin dimensions are achieved by lithographically defining (e.g., hardmasking and patterning) areas to be trimmed using a trim etch process, leaving the remainder of the die unaffected. In some such cases, the trim etch is performed on only the channel regions of the fins, when such channel regions are re-exposed during a replacement gate process. The trim etch may narrow the width of the fins being trimmed (or just the channel region of such fins) by 2-6 nm, for example. Alternatively, or in addition, the trim may reduce the height of the fins. The techniques can include any number of patterning and trimming processes to enable a variety of fin dimensions and/or fin channel dimensions on a given die, which may be useful for integrated circuit and system-on-chip (SOC) applications.
US10141310B2	Short channel effect suppression A method of fabricating a semiconductor device includes forming a plurality of isolation features on a semiconductor substrate, thereby defining a first set of semiconductor features, performing an etching process on the first set of semiconductor features such that larger semiconductor features are etched deeper than smaller semiconductor features, after the etching process, forming anti-punch-through features on surfaces of the exposed features of the first set of semiconductor features, forming a semiconductor layer over the anti-punch-through features, and forming transistors on the semiconductor layer of each of the features of the first set of semiconductor features.
US10141308B2	Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices A method for fabricating a semiconductor device includes accessing source/drain regions (S/D) in an n-type field effect transistor (NFET) region and in a p-type field effect transistor (PFET) region. First alloy elements are implanted in the S/D regions in the NFET region, and second alloy elements are implanted in the PFET region with the NFET region blocked. The first and second alloy elements form respective amorphized layers on the S/D regions in respective NFET and PFET regions. The amorphized layers are recrystallized to form metastable recrystallized interfaces using an epitaxy process wherein the metastable recrystallized interfaces formed in respective NFET and PFET regions exceed solubility of the first and second alloy elements in respective materials of the S/D regions in the NFET and PFET regions. Contacts to the metastable recrystallized layers of the S/D regions in the NFET and PFET regions are concurrently formed.
US10141307B2	Semiconductor device and manufacturing method thereof A semiconductor device includes an isolation layer, first and second fin structures, a gate structure and a source/drain structure. The isolation layer is disposed over a substrate. The first and second fin structures are disposed over the substrate, and extend in a first direction in plan view. Upper portions of the first and second fin structures are exposed from the isolation layer. The gate structure is disposed over parts of the first and second fin structures, and extends in a second direction crossing the first direction. The source/drain structure is formed on the upper portions of the first and second fin structures, which are not covered by the first gate structure and exposed from the isolation layer, and wraps side surfaces and a top surface of each of the exposed first and second fin structures. A void is formed between the source/drain structure and the isolation layer.
US10141305B2	Semiconductor devices employing field effect transistors (FETs) with multiple channel structures without shallow trench isolation (STI) void-induced electrical shorts Semiconductor devices employing Field Effect Transistors (FETs) with multiple channel structures without shallow trench isolation (STI) void-induced electrical shorts are disclosed. In one aspect, a semiconductor device is provided that includes a substrate. The semiconductor device includes channel structures disposed over the substrate, the channel structures corresponding to a FET. An STI trench is formed between each corresponding pair of channel structures. Each STI trench includes a bottom region filled with a lower quality oxide, and a top region filled with a higher quality oxide. The lower quality oxide is susceptible to void formation in the bottom region during particular fabrication steps of the semiconductor device. However, the higher quality oxide is not susceptible to void formation. Thus, the higher quality oxide does not include voids with which a gate may electrically couple to other active components, thus preventing STI void-induced electrical shorts in the semiconductor device.
US10141303B1	RF amplifier package with biasing strip An RF semiconductor amplifier package includes a flange shaped body section, an electrically conductive die pad centrally located on the body section, and an electrically insulating window frame disposed on an upper surface of the body section. A first electrically conductive lead is disposed on the window frame adjacent to a first side of the die pad and extends away from the first side of the die pad towards a first edge side of the body section. A second electrically conductive lead is disposed on the window frame adjacent to a second side of the die pad and extends away from the second side of the die pad towards a second edge side of the body section. A first electrically conductive biasing strip is disposed on the window frame, continuously connected to the second lead, and extends along and a third side of the die pad.
US10141302B2	High current, low switching loss SiC power module A power module includes a housing with an interior chamber and multiple switch modules mounted within the interior chamber of the housing. The switch modules are interconnected and configured to facilitate switching power to a load. Each one of the switch modules includes at least one transistor and at least one diode. The at least one transistor and the at least one diode may be formed from a wide band-gap material system, such as silicon carbide (SiC), thereby allowing the power module to operate at high frequencies with lower switching losses when compared to conventional power modules.
US10141300B1	Low capacitance transient voltage suppressor A transient voltage suppressor (TVS) circuit includes a P-N junction diode and a silicon controlled rectifier (SCR) formed integrated in a lateral device structure of a semiconductor layer. The lateral device structure includes multiple fingers of semiconductor regions arranged laterally along a first direction on a major surface of the semiconductor layer, defining current conducting regions between the fingers. The current paths for the SCR and the P-N junction diode are formed in each current conducting region but the current path for the SCR is predominantly separated from the current path for the P-N junction diode in each current conducting region in a second direction orthogonal to the first direction on the major surface of the semiconductor layer. The TVS device of the present invention realizes low capacitance at the protected node. The TVS device is suitable for protecting data pins of an integrated circuit, especially when the data pins are used in high speed applications.
US10141289B2	Semiconductor packages having package-on-package structures A semiconductor package includes a lower package with a lower semiconductor chip on a lower package substrate, and an upper package with an upper semiconductor chip on an upper package substrate. The upper semiconductor chip has a plurality of chip pads and the upper package substrate has a plurality of substrate pads. The upper package is stacked on the lower package. The chip pads have a first pitch and the substrate pads have a second pitch greater than the first pitch. The upper package substrate has a plurality of connection lines that electrically connect the substrate pads to the chip pads.
US10141285B2	Externally induced charge patterning using rectifying devices A system and method form charge patterns on micro objects. The system and method employ a micro object including a rectifying device. The rectifying device exhibits an asymmetric current-voltage (I-V) response curve. Further, the system and method employ a device external to the micro object to induce the flow of charge through the rectifying device.
US10141284B2	Method of bonding semiconductor substrates The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.
US10141283B2	Sinterable bonding material and semiconductor device using the same An objective of the present invention is to provide a sinterable bonding material excellent in sinterability. The present invention relates to a sinterable bonding material comprising a silver filler and an organic base compound as a sintering promoter.
US10141280B2	Mechanisms for forming package structure Structures and formation methods of a package structure are provided. The package structure includes a semiconductor die and a substrate bonded to the semiconductor die through a first bonding structure and a second bonding structure therebetween. The first bonding structure and the second bonding structure are next to each other and the second bonding structure is wider than the first bonding structure. The first bonding structure has a first under bump metallurgy (UBM) structure and a first solder bump thereon, and the second bonding structure has a second UBM structure and a second solder bump thereon. The second UBM structure has a maximum width larger than that of the first UBM structure, and the second solder bump has a maximum width larger than that of the first solder bump.
US10141276B2	Semiconductor package structure and manufacturing method thereof A semiconductor package structure and a manufacturing method thereof are provided. The semiconductor package structure includes a redistribution structure, at least one package structure and a second encapsulant. The redistribution structure has a first surface and a second surface opposite to the first surface. The package structure is over the first surface and includes at least one die, a first encapsulant, a redistribution layer, and a plurality of second conductive terminals. The die has a plurality of first conductive terminals thereon. The first encapsulant encapsulates the die and exposes at least part of the first conductive terminals. The redistribution layer is over the first encapsulant and is electrically connected to the first conductive terminals. The second conductive terminals are electrically connected between the redistribution layer and the redistribution structure. The second encapsulant, encapsulates the package structure and exposes at least part of the second conductive terminals.
US10141274B2	Semiconductor chip with anti-reverse engineering function A structure and a method. The structure includes a semiconductor substrate; a stack of wiring levels from a first wiring level to a last wiring level, the first wiring level closest to the semiconductor substrate and the last wiring level furthest from the semiconductor substrate, the stack of wiring levels including an intermediate wiring level between the first wiring level and the last wiring level; active devices contained in the semiconductor substrate and the first wiring level, each wiring level of the stack of wiring levels comprising a dielectric layer containing electrically conductive wire; a trench extending from the intermediate wiring level, through the first wiring level into the semiconductor substrate; and a chemical agent filling the trench, portions of at least one wiring level of the stack of wiring levels not chemically inert to the chemical agent or a reaction product of the chemical agent.
US10141272B2	Semiconductor apparatus, stacked semiconductor apparatus and encapsulated stacked-semiconductor apparatus each having photo-curable resin layer A semiconductor apparatus including a semiconductor device, an on-semiconductor-device metal pad and a metal interconnect each electrically connected to the semiconductor device, a through electrode and a solder bump each electrically connected to the metal interconnect, a first insulating layer on which the semiconductor device is placed, a second insulating layer formed on the semiconductor device, a third insulating layer formed on the second insulating layer, wherein the metal interconnect is electrically connected to the semiconductor device via the on-semiconductor-device metal pad at an upper surface of the second insulating layer, and the metal interconnect penetrates the second insulating layer from its upper surface and is electrically connected to the through electrode at an lower surface of the second insulating layer. This semiconductor apparatus can be easily placed on a circuit board and stacked, and can reduce its warpage even with dense metal interconnects.
US10141269B2	Semiconductor device having conductive wire with increased attachment angle and method A semiconductor device includes a shielding wire formed across a semiconductor die and an auxiliary wire supporting the shielding wire, thereby reducing the size of a package while shielding the electromagnetic interference generated from the semiconductor die. In one embodiment, the semiconductor device includes a substrate having at least one circuit device mounted thereon, a semiconductor die spaced apart from the circuit device and mounted on the substrate, a shielding wire spaced apart from the semiconductor die and formed across the semiconductor die, and an auxiliary wire supporting the shielding wire under the shielding wire and formed to be perpendicular to the shielding wire. In another embodiment, a bump structure is used to support the shielding wire. In a further embodiment, an auxiliary wire includes a bump structure portion and wire portion and both the bump structure portion and the wire portion are used to support the shielding wire.
US10141268B2	Circuit package with internal and external shielding A module includes a circuit package, which includes first and second electronic components on a substrate, internal and external shields, and a molded compound. The first electronic component includes a first die substrate with first electronic circuitry that generates electromagnetic radiation. The second electronic component includes a second die substrate with second electronic circuitry. The internal shield is electrically connected to ground and substantially covers a surface of the second die substrate facing away from the substrate, the internal shield being configured to shield the second electronic circuitry from the electromagnetic radiation generated by the first electronic circuitry. The molded compound is disposed over the substrate and the first and second electronic components, and the external shield is disposed on at least one outer surface of the circuit package and electrically connected to ground. The external shield is configured to protect the circuit package from external electromagnetic radiation and environmental stress.
US10141265B2	Bent-bridge semiconductive apparatus A bent-bridge semiconductive apparatus includes a silicon bridge that is integral to a semiconductive device and the silicon bridge is deflected out of planarity. The silicon bridge may couple two semiconductive devices, all of which are from an integral processed die.
US10141261B2	Device comprising nanostructures and method of manufacturing thereof A method for manufacturing of a device including a first substrate including a plurality of sets of nanostructures arranged on the first substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method including the steps of: providing a substrate having a first face, the substrate having an insulating layer including an insulating material arranged on the first face of the substrate forming an interface between the insulating layer and the substrate; providing a plurality of stacks on the first substrate, wherein each stack includes a first conductive layer and a second conductive layer; heating the first substrate having the plurality of stacks arranged thereon in a reducing atmosphere to enable formation of nanostructures on the second conductive material; heating the first substrate having the plurality of stacks arranged thereon in an atmosphere such that nanostructures are formed on the second layer.
US10141259B1	Semiconductor devices having electrically and optically conductive vias, and associated systems and methods Semiconductor devices having one or more vias filled with a transparent and electrically conductive material are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die stacked over a second semiconductor die. The first semiconductor die can include at least one via that is axially aligned with a corresponding via of the second semiconductor die. The vias of the first and second semiconductor dies can be filled with a transparent and electrically conductive material that both electrically and optically couples the first and second semiconductor dies.
US10141255B2	Circuit boards and semiconductor packages including the same A circuit board and a semiconductor packages therewith are disclosed. The circuit board may include a top surface, on which at least one semiconductor chip is mounted, and a bottom surface, to which at least one outer terminal is coupled. The top surface may include an upper window region, on which an upper conductive pattern electrically connected to the semiconductor chip is provided, and the bottom surface may include a lower window region, on which a lower conductive pattern electrically connected to the upper conductive pattern is provided. Here, a ratio of an area of the lower conductive pattern to an area of the upper conductive pattern may be less than or equal to 1.5.
US10141254B1	Direct bonded copper power module with elevated common source inductance A direct bonded copper (DBC) power module with elevated common source inductance is adapted for use as a half bridge in an electric drive for an electric vehicle. Etching patterns on the DBC substrates provide indented notches for concentrating magnetic flux in the power loops. Etched gate traces form gate loops with coil windings disposed within or overlapping the notches in order to enhanced the common source inductance for each switching transistor (such as an IGBT). Switching loss is reduced and fuel economy is improved for the electric vehicle with minimal impact on packaging size and at no additional cost.
US10141252B2	Semiconductor packages A semiconductor package includes: a passivation layer having a first surface and a second surface opposite to the first surface, the passivation layer defining a through hole extending from the first surface to the second surface, the through hole being further defined by a first sidewall and a second sidewall of the passivation layer; a first conductive layer on the first surface of the passivation layer and the first sidewall; a second conductive layer on the second surface of the passivation layer and the second sidewall; and a third conductive layer between the first conductive layer and the second conductive layer.
US10141247B2	Power semiconductor device The invention relates to a power semiconductor device with a substrate and an electrically conductive DC voltage bus bar system and a capacitor connected to the bus bar system, wherein the power semiconductor device has, for securing the capacitor, a capacitor securing apparatus comprising a receptacle device for receiving the capacitor, in which at least part of the capacitor is arranged. Electrically conductive bus bar system terminal elements are electrically connected thereto and run in the direction of the substrate. An elastic first deformation element is materially bonded to the capacitor securing apparatus and is formed from an elastomer is arranged on the side of the capacitor securing apparatus facing the DC voltage bus bar system. The device is embodied in such a way that the capacitor securing apparatus, via the deformation element, presses the DC voltage bus bar system in the direction of the substrate and thereby presses the bus bar system terminal elements against electrically conductive contact areas of the substrate such that the bus bar system terminal elements are electrically conductively pressure-contacted with said contact areas of the substrate.
US10141241B2	Multi-chip self adjusting cooling solution An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.
US10141239B2	Thermal dissipation through seal rings in 3DIC structure A package includes a die, which includes a semiconductor substrate, a plurality of through-vias penetrating through the semiconductor substrate, a seal ring overlapping and connected to the plurality of through-vias, and a plurality of electrical connectors underlying the semiconductor substrate and connected to the seal ring. An interposer is underlying and bonded to the die. The interposer includes a substrate, and a plurality of metal lines over the substrate. The plurality of metal lines is electrically coupled to the plurality of electrical connectors. Each of the plurality metal lines has a first portion overlapped by the first die, and a second portion misaligned with the die. A thermal conductive block encircles the die, and is mounted on the plurality of metal lines of the interposer.
US10141237B2	Fingerprint recognition module and manufacturing method therefor This application provides a fingerprint recognition module and a manufacturing method therefor. The fingerprint recognition module includes a flexible printed circuit (FPC) board, a die, an adhesive layer, and a cover plate. The manufacturing method includes the following steps: (a) directly welding the die to the FPC board, and electrically connecting the die to the FPC board; (b) coating the adhesive layer on an upper surface of the die; (c) covering the adhesive layer with a cover plate, to adhere the cover plate to the adhesive layer; and (d) applying low pressure injection modeling encapsulation to an encapsulation space defined between the cover plate and the FPC board, so as to form an encapsulation layer in the encapsulation space and produce a waterproof effect.
US10141236B2	Flip chip ball grid array with low impedence and grounded lid A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4).
US10141234B2	Flipped vertical field-effect-transistor Various embodiments disclose a method for fabricating vertical transistors. In one embodiment, a structure is formed comprising at least a first substrate, an insulator layer on the substrate, a first doped layer on the insulator layer, at least one fin structure in contact with the doped layer, a dielectric layer surrounding a portion of the fin structure, a gate layer on the dielectric layer, a second doped layer in contact with the fin structure, a first contact area in contact with the second doped layer, and at least a first interconnect in contact with the first contact area. The structure is flipped bonded to a second substrate. The first substrate and the insulator layer are removed to expose the first doped layer. A second contact area is formed in contact with the first doped layer. At least a second interconnect is formed in contact with the second contact area.
US10141228B1	FinFET device having single diffusion break structure A semiconductor device includes: a fin-shaped structure on a substrate; a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion; a gate structure on the first portion; and a contact etch stop layer (CESL) adjacent to the gate structure and extending to cover the SDB structure.
US10141227B1	Method and system for achieving semiconductor-based circuits or systems having multiple components with one or more matched or similar characteristics or features Methods and systems for achieving semiconductor-based circuits or systems having multiple components with one or more matched or similar characteristics or features are disclosed herein. In one example embodiment, a system includes a processing device that includes first, second, and third circuitry. The first circuitry is configured to generate control signals that at least indirectly cause a pick and place head mechanism to attempt to pick up and place at least some of first and second dice. The second circuitry is configured to assess whether attempts to implement one or more of first and second dice should be skipped based upon wafer map information. Further, the third circuitry is configured to determine whether a second position of a first one of the second dice is sufficiently proximate to a first position so that it would be appropriate to implement the first one of the second dice.
US10141226B2	Self-aligned contacts A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.
US10141224B2	Manufacturing method of interconnection structure An interconnection structure and a manufacturing method thereof are provided. The method includes the following steps. First, a substrate having a first surface and a second surface opposite to each other is provided. Then, a conductive through via extended from the first surface to the second surface is formed in the substrate. Then, a portion of the substrate is removed from the first surface to expose a portion of the conductive through via. Then, a dielectric layer is formed on the substrate, and the dielectric layer covers the exposed conductive through via. Then, an opening is formed in the dielectric layer, wherein the opening exposes a portion of the conductive through via, and the top surface of the conductive through via protrudes from the bottom surface of the opening. Then, a conductive layer is formed in the opening.
US10141223B2	Method of improving micro-loading effect when recess etching tungsten layer A method of improving micro-loading effect when recess etching a tungsten layer. A substrate having trenches thereon is provided. A tungsten layer is deposited on the substrate and in the trenches. A planarization process is performed to form a planarization layer on the tungsten layer. A first etching process is performed to etch the planarization layer and the tungsten layer with an etch selectivity of planarization layer:tungsten layer=1:1 until the planarization layer is completely removed. A second etching process is performed to etch the remainder of the tungsten layer to recess the tungsten layer within the trenches.
US10141218B2	Room temperature metal direct bonding A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads formed by contact bonding of the first non-metallic region to the second non-metallic region. At least one of the first and second substrates may be elastically deformed.
US10141217B2	Dicing-tape integrated film for backside of semiconductor and method of manufacturing semiconductor device The present invention is to provide a dicing-tape integrated film for the backside of a semiconductor that is capable of suppressing the increase of the peel strength between the dicing tape and the film for the backside of a flip-chip semiconductor due to heating. The dicing-tape integrated film for the backside of a semiconductor has a dicing tape having a substrate and a pressure-sensitive adhesive layer formed on the substrate and a film for the backside of a flip-chip semiconductor formed on the pressure-sensitive adhesive layer of the dicing tape, in which the difference (γ2−γ1) of the surface free energy γ2 and the surface free energy γ1 is 10 mJ/m2 or more, where γ1 represents the surface free energy of the pressure-sensitive adhesive layer and γ2 represents the surface free energy of the film for the backside of a flip-chip semiconductor.
US10141216B2	Room temperature debondable and thermally curable compositions Embodiments in accordance with the present invention are directed to a method of fabricating a semiconductor device wherein a device wafer substrate is coated with a composition encompassing a surface energy modifier and a thermally stable polymer which is then bonded to a carrier wafer substrate coated with a composition encompassing a crosslinkable polymer composition. The polymer composition allows thinning of a device wafer before separating from the carrier wafer at room temperature.
US10141211B2	Substrate processing apparatus and substrate transfer method A substrate processing apparatus comprises a transferring device including a grasping section configured to grasp a substrate holder, and a transferring section configured to transfer the substrate holder grasped by the grasping section, and a processing bath for storing a substrate held by the substrate holder so that a surface of the substrate is vertically oriented, and processing the substrate. The grasping section is configured to grasp the substrate holder with a surface of the substrate oriented horizontally. The transferring section is configured to transfer the substrate holder above the processing bath, with the surface of the substrate oriented horizontally.
US10141210B2	Purge module and load port having the same A purge module which can provide a conventional load port without a gas purging function with the gas purging function, and a load port having the purge module are disclosed. The purge module comprises a jig, a gas control box and pipes. The jig is detachably attached to an upper side of a stage of a load port. The jig comprises a gas inlet for providing a wafer carrier with gas and a gas outlet for receiving gas from the wafer carrier. The gas control box is detachably attached to the load port to control gas flow. The pipes connect the jig and the gas control box.
US10141209B2	Processing gas generating apparatus, processing gas generating method, substrate processing method, and storage medium The present disclosure provides an apparatus for generating a processing gas by bubbling a raw material liquid with a carrier gas. The processing gas generated by the bubbling is taken out from a vapor-phase portion above a liquid-phase portion of the raw material liquid through a taking-out unit. A first temperature adjusting unit performs a temperature adjustment of the liquid-phase portion and a second temperature adjusting unit performs a temperature adjustment of the vapor-phase portion such that the temperature of the vapor-phase portion is higher than the temperature of the liquid-phase portion.
US10141208B2	Vacuum processing apparatus A vacuum processing apparatus includes a tilting unit configured to tilt, in a vacuum vessel, a substrate holder including a refrigerator, and a rotary joint provided in the tilting unit and including a coolant path configured to supply or exhaust a coolant gas to or from the refrigerator. The rotary joint includes a fixed portion fixed to the vacuum vessel, a pivotal portion provided so as to pivot with respect to the fixed portion and fixed to the substrate holder, and a grease supply passage.
US10141207B2	Operation method of plasma processing apparatus A vacuum processing apparatus includes a processing chamber inside a vacuum vessel, a plasma forming chamber above, a dielectric plate member having multiple through-holes for introducing particles of plasma to the processing chamber between the processing chamber and the plasma forming chamber above a sample stage upper surface in the processing chamber, heating lamp arranged around an outer periphery of the plate member to irradiate an electromagnetic wave to the wafer to heat, and a ring-shaped window member for transmitting the electromagnetic wave from the lamp. The apparatus performs, from the through-holes to the wafer, supplying particles of plasma formed in the plasma forming chamber to form a reaction product, extinguishing the plasma and heating the wafer to desorb the product, and supplying particles, formed in the plasma forming chamber, of the plasma of cleaning gas to the plasma forming chamber, the processing chamber, and the window member.
US10141204B2	Film, method for its production, and method for producing semiconductor element using the film To provide a film which is excellent in releasing property with respect to a resin sealed portion and excellent in low migration property and peeling property with respect to a semiconductor chip, a source electrode or a sealing glass and which is suitable as a mold release film for producing a semiconductor element having a part of the surface of a semiconductor chip, source electrode or sealing glass exposed. A film 1 which comprises a substrate 3 and an adhesive layer 5, wherein the storage elastic modulus at 180° C. of the substrate 3 is from 10 to 100 MPa, and the adhesive layer 5 is a reaction cured product of a composition for adhesive layer comprising a specific acrylic polymer and a polyfunctional isocyanate compound, wherein the number of moles MOH of hydroxy groups and the number of moles MCOOH of carboxy groups, derived from the acrylic polymer, and the number of moles MNCO of isocyanate groups derived from the polyfunctional isocyanate compound, satisfy a specific relation, and which is suitable as a mold release film for producing a semiconductor element.
US10141200B2	Methods of manufacturing semiconductor devices In a method of manufacturing a semiconductor memory device, a plurality of first conductive structures including a first conductive pattern and a hard mask are sequentially stacked on a substrate. A plurality of preliminary spacer structures including first spacers, sacrificial spacers and second spacers are sequentially stacked on sidewalls of the conductive structures. A plurality of pad structures are formed on the substrate between the preliminary spacer structures, and define openings exposing an upper portion of the sacrificial spacers. A first mask pattern is formed to cover surfaces of the pad structures, and expose the upper portion of the sacrificial spacers. The sacrificial spacers are removed to form first spacer structures having respective air spacers, and the first spacer structures include the first spacers, the air spacers and the second spacers sequentially stacked on the sidewalls of the conductive structures.
US10141199B2	Selecting a substrate to be soldered to a carrier A method for soldering an insulating substrate onto a substrate mounting portion of a carrier by a predefined solder is provided. The insulating substrate includes a dielectric insulation carrier, a top side, and a bottom side opposite to the top side. The method includes selecting the insulating substrate based on a criterion which indicates that the insulating substrate, if it has the solidus temperature of the solder, has a positive unevenness. The insulating substrate is soldered on the bottom side to the substrate mounting portion, such that, after the soldering, the solidified solder extends continuously from the bottom side of the insulating substrate as far as the substrate mounting portion. The top side of the insulating substrate is populated with at least one semiconductor chip.
US10141198B2	Electronic package and manufacturing method thereof An electronic package including a middle patterned conductive layer, a first redistribution circuitry disposed on a first surface of the middle patterned conductive layer and a second redistribution circuitry disposed on a second surface of the middle patterned conductive layer is provided. The middle patterned conductive layer has a plurality of middle conductive pads. The first redistribution circuitry includes a first patterned conductive layer having a plurality of first conductive elements. Each of the first conductive elements has a first conductive pad and a first conductive via that form a T-shaped section. The second redistribution circuitry includes a second patterned conductive layer having a plurality of second conductive elements. Each of the second conductive elements has a second conductive pad and a second conductive via that form an inversed T-shaped section.
US10141196B2	Power semiconductor device with thick top-metal-design and method for manufacturing such power semiconductor device The present application contemplates a method for manufacturing a power semiconductor device. The method comprises: providing a wafer of a first conductivity type, the wafer having a first main side and a second main side opposite to the first main side, and the wafer including an active cell area, which extends from the first main side to the second main side, in a central part of the wafer and a termination area surrounding the active cell area in an orthogonal projection onto a plane parallel to the first main side; forming a metallization layer on the first main side to electrically contact the wafer in the active cell area, wherein the surface of the metallization layer, which faces away from the wafer, defines a first plane parallel to the first main side; forming an isolation layer on the first main side in the termination area, wherein the surface of the isolation layer facing away from the wafer defines a second plane parallel to the first main side; after the step of forming the metallization layer and after the step of forming the isolation layer, mounting the wafer with its first main side to a flat surface of a chuck; and thereafter thinning the wafer from its second main side by grinding while pressing the second main side of the wafer onto a grinding wheel by applying a pressure between the chuck and the grinding wheel, wherein the first plane is further away from the wafer than a third plane, which is parallel to the second plane and arranged at a distance of 1 μm from the second plane in a direction towards the wafer.
US10141195B2	Substrate processing method There is provided a substrate processing method performed on a substrate having a recess formed in a surface thereof, a first silicon-containing film formed on a bottom surface of the recess, a second silicon-containing film formed on both sides of the recess, the method including: depositing a carbon-based deposit on the surface of the substrate; removing the first silicon-containing film by performing a COR (Chemical Oxide Removal) process in which a silicon-containing film is modified to a reaction product using a processing gas, on the substrate; and removing the deposited carbon-based deposit.
US10141194B1	Manufacturing method of semiconductor structure A manufacturing method of a semiconductor structure includes the following steps. A first polysilicon layer is formed on a substrate. A planarization process to the first polysilicon layer is performed. A first etching back process to the first polysilicon layer is performed after the planarization process. A second etching back process to the first polysilicon layer is performed after the first etching back process. A first wet clean process to the first polysilicon layer is performed after the first etching back process and before the second etching back process.
US10141193B2	Fabricating method of a semiconductor device with a high-K dielectric layer having a U-shape profile A semiconductor device including a substrate, a spacer and a high-k dielectric layer having a U-shape profile is provided. The spacer located on the substrate surrounds and defines a trench. The high-k dielectric layer having a U-shape profile is located in the trench, and the high-k dielectric layer having a U-shape profile exposes an upper portion of the sidewalls of the trench.
US10141191B2	Method of thermal processing structures formed on a substrate The present invention generally describes one ore more methods that are used to perform an annealing process on desired regions of a substrate. In one embodiment, an amount of energy is delivered to the surface of the substrate to preferentially melt certain desired regions of the substrate to remove unwanted damage created from prior processing steps (e.g., crystal damage from implant processes), more evenly distribute dopants in various regions of the substrate, and/or activate various regions of the substrate. The preferential melting processes will allow more uniform distribution of the dopants in the melted region, due to the increased diffusion rate and solubility of the dopant atoms in the molten region of the substrate. The creation of a melted region thus allows: 1) the dopant atoms to redistribute more uniformly, 2) defects created in prior processing steps to be removed, and 3) regions that have hyper-abrupt dopant concentrations to be formed.
US10141190B2	Manufacturing method of a semiconductor device In a manufacturing method of a semiconductor device according to an embodiment, an oxide film is formed on a semiconductor layer containing an impurity. A heat treatment is performed on the semiconductor layer to diffuse part of the impurity into the oxide film with hydrogen plasma treatment on the oxide film or with ultraviolet irradiation on the oxide film. After the heat treatment, the oxide film is removed.
US10141188B2	Resist having tuned interface hardmask layer for EUV exposure A method is disclosed to prepare a substrate for photolithography. The method includes forming an underlayer over a surface of the substrate; depositing an interface hardmask layer on the underlayer using one of a vapor phase deposition process or an atomic layer deposition process; and forming a layer of extreme UV (EUV) resist on the interface hardmask layer, where the interface hardmask layer is comprised of material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer. Also disclosed is a structure configured for photolithography. The structure includes a substrate; an underlayer over a surface of the substrate; an interface hardmask layer disposed on the underlayer; and a layer of EUV resist disposed on the interface hardmask layer. The interface hardmask layer contains material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer.
US10141186B2	Target image-capture device, extreme-ultraviolet-light generation device, and extreme-ultraviolet-light generation system A target image-capture device may be configured to capture an image of a target that is made into plasma when irradiated with laser light and generates extreme-ultraviolet-light. The target image-capture device may include a droplet detector configured to detect passage of a droplet output as the target, and output a detection signal, an illumination light source, an image capturing element, a shutter device, and a controller configured to output, to the image capturing element, an exposure signal allowing the image capturing element to perform image capturing, and output, to the shutter device, a shutter open/close signal allowing a shutter to perform an open and close operation upon input of the detection signal. The controller may output the shutter open/close signal to the shutter device to make the shutter closed during when the droplet is irradiated with the laser light so that the plasma is generated.
US10141185B2	Oxide semiconductor, coating liquid, method of forming oxide semiconductor film, semiconductor element, display element, image display device and image display system An oxide semiconductor includes an oxide having a layered structure expressed by an expression of a product of [(AO)(ZO)mi(BO)(ZO)ni]i from i=1 to L. In the product, an atom A is a positive monovalent element, an atom Z is a positive divalent element, an atom B is a positive trivalent element, L is a positive integer, and mi and ni are independent integers greater than or equal to zero. A sum from i=1 to L of (mi+ni) is not zero.
US10141179B2	Fast start RF induction lamp with metallic structure An induction RF fluorescent lamp having a bulbous vitreous portion of the induction RF fluorescent light bulb including a lamp envelope filled with a working gas mixture. The lamp includes a power coupler and an electronic ballast. A first metallic structure is attached to a cavity wall and extends outwardly radially therefrom and within the lamp envelope outside a re-entrant cavity including mercury. The first metallic structure is mounted within the lamp envelope and adapted to absorb power from the electric field and induce discharge during a turn-on phase of the induction RF fluorescent lamp in a manner sufficient to rapidly heat and vaporize the mercury and promote rapid luminous development during the turn-on phase of the induction RF fluorescent lamp.
US10141173B2	Systems for separating ions and neutrals and methods of operating the same A mass spectrometer system includes a sample injection device defining a sample injection aperture. The system also includes an ion trap defining an ion outlet aperture. The ion trap is coupled to the sample injection device. The system further includes a detector positioned downstream of the ion outlet aperture. The system also includes an ion source coupled to the ion trap. The ion source is configured to ionize a sample injected into the ion trap and generate a plurality of ionized molecules within the ion trap. The ion trap is configured to maintain the plurality of ionized molecules therein while a plurality of neutral molecules migrate out of the ion trap until a predetermined pressure is attained in the ion trap.
US10141170B2	Device for mass spectrometry A device for mass spectrometry comprises an ionization source, a mass analyzer fluidly coupled to the ionization source and an electronic data acquisition system for processing signals provided by the mass analyzer. The electronic data acquisition system comprises at least one analog-to-digital converter (10) producing digitized data from the signals obtained from the mass analyzer and a fast processing unit (47) receiving the digitized data from said analog-to-digital converter (10). The fast processing (47) unit is programmed to continuously, in real time inspect the digitized data for events of interest measured by the mass spectrometer; and the electronic data acquisition system is programmed to forward (23) the digitized data representing mass spectra relating to events of interest for further analysis and to reject the digitized data representing mass spectra not relating to events of interest. The device allows for maintaining efficiency at high speed by eliminating all processing times (idle time in acquisition) for data segments that do not contain information about events.
US10141169B2	Systems and methods for identifying compounds from MS/MS data without precursor ion information Systems and methods are provided for identifying a precursor ion without using any a priori precursor ion information. In one method, a sample is analyzed using a tandem mass spectrometer, producing at least one measured product ion spectrum from a precursor mass-to-charge ratio range. The at least one measured product ion spectrum are received. A subset of measured product ions is selected from the at least one measured product ion spectrum. A list of candidate compounds is created by searching a dictionary of potential compounds that includes one or more predicted product ions for each of the potential compounds using the subset of measured product ions. A candidate compound on the list is selected as the identified compound. In another method, the measured product ions are assumed to correspond to shortened forms of the peptide and a protein database is searched for shortened forms of the peptide.
US10141168B2	Method for characterising a sample by mass spectrometry imaging Disclosed is a method for characterizing a sample by mass spectrometry imaging (MSI) according to which a spatial arrangement of at least one ion in the sample is characterized from imaging data associated with the ion, in terms of morphology and/or texture.
US10141166B2	Method of real time in-situ chamber condition monitoring using sensors and RF communication Plural sensors on an interior surface of a reactor chamber are linked by respective RF communication channels to a hub inside the reactor chamber, which in turn is linked to a process controller outside of the chamber.
US10141165B2	Plasma processing apparatus and sample stage thereof There is disclosed a plasma processing apparatus for processing a wafer put on a sample stage disposed in a processing chamber within a vacuum vessel by the use of a plasma generated in the processing chamber after mounting the wafer on the sample stage. The apparatus has heaters in areas of the interior of the sample stage which are divided radially and circumferentially. At least those of the heaters which are arranged in the areas located in the radially outer position include circumferentially arranged heater portions that are connected in series. The amounts of heat generated by these circumferentially arranged heater portions are adjusted.
US10141163B2	Controlling ion energy within a plasma chamber Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.
US10141158B2	Wafer and DUT inspection apparatus and method using thereof A wafer and DUT inspection apparatus and a wafer and DUT inspection method using thereof are provided. The apparatus includes a vacuum chamber, a stage, an electron gun, a lens system, an optical mirror and a detector. In the vacuum chamber, the stage is disposed near a first end, and the electron gun is disposed near a second end opposite to the first end. The lens system disposed between the stage and the electron gun is a total reflective achromatic lens system including a first lens and a second lens. The second lens having a second aperture is disposed between the electron gun and the first lens having a first aperture aligned with the second aperture. The optical mirror is disposed between the lens system and the electron gun. The detector is horizontally aligned with the optical mirror and configured to detect cathodoluminescence reflected from the optical mirror.
US10141156B2	Measurement of overlay and edge placement errors with an electron beam column array Methods and systems for performing measurements of multiple die with an array of electron beam columns are presented herein. The wafer is scanned in a direction parallel to the die rows disposed on the wafer. The electron beam measurement columns are spatially separated in a column alignment direction. The wafer is scanned in a direction that is oriented at an oblique angle with respect to the column alignment direction such that each electron beam column measures the same row of die features on different die during the same wafer pass. The wafer is oriented with respect to the array of electron beam columns by rotating the wafer, rotating the electron beam columns, or both. In further aspects, each measurement beam is deflected to correct alignment errors between each column and the corresponding die row to be measured and to correct wafer positioning errors reported by the wafer positioning system.
US10141154B2	Array substrate, display panel and display apparatus having the same, and fabricating method thereof The present application discloses an array substrate comprising a first substrate, a first electrode on the first substrate, a passivation layer on a side of the first electrode distal to the first substrate, the passivation layer comprising a plurality of first vias, each of which corresponds to a different part of the first electrode, an electron emission source layer on a side of the first electrode distal to the first substrate comprising at least one electron emission source in each of the plurality of first vias, and a dielectric layer on a side of the first electrode distal to the first substrate comprising a plurality of dielectric blocks corresponding to the plurality of first vias, at least a portion of each of the plurality of dielectric blocks in each of the plurality of first vias. The at least one electron emission source comprises a first portion having a first end and a second portion having a second end. The first end is in contact with the first electrode, the first portion is within a corresponding one of the plurality of dielectric blocks. The second portion and the second end are outside the corresponding one of the plurality of dielectric blocks.
US10141149B2	Thin film fuse A thin film fuse is formed by two substantially planar conductors, separated from each other by a thin gap. The conductors and gap are over-coated with a thin, conductive material having a surface tension when melted, great enough to pull the conductive material out of the gap.
US10141148B2	Affixed object, fusible link, and affixing structure for fusible link A connection portion of a locking member is bent such that the connection portion is made apart from a second upper surface portion as the connection portion is made apart from a first arm portion, and is bent such that the connection portion is made apart from a side surface portion as the connection portion is made apart from a second arm portion. Even when a tolerance is generated in a direction substantially orthogonal to the side surface portion at the time of installing a base body in an installation surface portion of a battery, it is possible to absorb the tolerance by deforming the connection portion, and to lock a locked portion in a lower end edge.
US10141147B2	Touch safe panel board system A touch safe electrical panel (100) includes a bus (110) having a branch connector (130) with a vertical stab (132) and a touch safe connection assembly (150). The assembly includes a dielectric housing (152) for the stab. The housing (152) includes a slot (180) through which to receive the stab, and an opening (190), arranged away from the slot, through which to receive a terminal of a plug-on circuit breaker configured to engage the stab. A dielectric barrier (170A, 170B) is arranged in the housing between the slot and the opening. The barrier partially blocks a passage way between the opening and the slot to prevent direct user contact of the stab while enabling the terminal to pass through the partially blocked passage way and engage the stab.
US10141146B2	Force-distance controlled mechanical switch A switch comprises a first elastic element, an actuator-element mechanically coupled to a first side of the first elastic element, and a first switching conductor, mechanically coupled to a second side of the first elastic element. The switching conductor is configured for moving between a first conductor position and a second conductor position. The actuator-element is configured from moving between a first actuator-element position and a second actuator-element position separated by a predefined actuator-element lift, thereby moving the first side of the first elastic element. The first elastic element moreover is configured for converting a movement of the first side of the first elastic element by the predefined actuator-element lift into the movement of the second side of the first elastic element with a predefined elastic force.
US10141136B1	Light switch actuator The light switch actuator is a kit configured for use with a toggle switch and a wall plate. The light switch actuator attaches a plurality of cords to the toggle of the toggle switch such that the toggle switch can be actuated from a distance. The light switch actuator comprises a toggle attachment, a plurality of eyebolts, a plurality of cords, a plurality of tassels, the toggle switch and the wall plate. The toggle switch is installed in the selected location in the normal manner as required by the local electric code. The plurality of eyebolts attach the wall plate to the toggle switch. The toggle attachment attaches the plurality of cords to the toggle of the toggle switch. A tassel selected from the plurality of tassels is attached to the free end of a cord selected from the plurality of cords.
US10141135B1	Keyboard The present invention relates to a keyboard, including: a key, a switch circuit board, and a base plate, and the key includes a keycap and a balance bar. The keycap includes a first hook and a second hook, and the first hook is disposed on an inner surface of the keycap and is located on an outer side of the keycap. The second hook is disposed on the inner surface of the keycap and is located in a central area of the keycap. The balance bar is disposed below the keycap and is fastened in a first opening of the first hook and a second opening of the second hook. The first opening has a round shape, and the second opening has an elliptic shape.
US10141130B2	Locking mechanism An apparatus includes a cabinet with a door. A circuit interrupting device is installed in the cabinet. A plate on the door is operative to shift the circuit interrupting device between ON and OFF conditions upon movement of the plate between ON and OFF positions. A handle on the door is linked with the plate to move the plate between the ON and OFF positions upon movement of the handle between corresponding positions. Additionally, a latch is supported the door for movement into and out of a locked position in which the latch blocks movement of the plate to the ON position. A driving member is moveable against the latch to move the latch into the locking position against the bias of a spring. A key moves the driving member against the latch.
US10141129B2	Interlock apparatus of ring main unit An interlock apparatus of a ring main unit is provided. The interlock apparatus may be provided between a plurality of switches which are included in the ring main unit and are adjacent to each other, and when one switch is controlled to a closed state and is connected to a power supply source, the other switch adjacent to the one switch is prevented from being connected to the power supply source, thereby preventing the plurality of switches from being simultaneously connected to the power supply source.
US10141127B2	High-speed communications coupling for use in a circuit breaker assembly A secondary disconnect assembly for use with a circuit breaker moveable between a connected position and a disconnected position includes a first secondary disconnect apparatus and a second secondary disconnect apparatus. The first secondary disconnect apparatus includes a first coupling portion having at least one high speed communications connector. The second secondary disconnect apparatus includes a second coupling portion removably coupled to the first coupling portion. The second coupling portion includes at least one opening configured to receive the high speed communications connector when the circuit breaker is moved from the disconnected position to the connected position to enable high speed data transmission through the first coupling portion and the second coupling portion.
US10141119B2	Dye-sensitized solar cells including carbon nanotube yarns A dye-sensitized solar cell is provided. The dye-sensitized solar cell includes a working electrode which includes a plurality of twisted carbon nanotube yarns. The dye-sensitized solar cell also includes a hybrid sensitizer. The hybrid sensitizer includes a nanoporous titanium oxide layer coated on the plurality of twisted carbon nanotube yarns, a microporous titanium oxide layer coated onto the nanoporous titanium oxide layer, and dye particles and quantum dots disposed in the pores of the microporous titanium oxide layer. In addition, the dye-sensitized solar cell includes a conducting electrode which includes at least one carbon nanotube yarn disposed about the hybrid sensitizer. The dye-sensitized solar cell also includes a solid state electrolyte disposed about the hybrid sensitizer.
US10141115B2	Thin film capacitor including alternatively disposed dielectric layers having different thicknesses A thin film capacitor includes a body having first and second electrode layers and first and second dielectric layers alternately stacked on a substrate. A thickness of the first dielectric layer is 1.2 to 3 times that of the second dielectric layer. Therefore, leakage current characteristics of the dielectric layers may be improved, and capacitance of the thin film capacitor may be secured.
US10141111B2	Method of manufacturing stacked ceramic capacitor including identifying direction of stacking in stacked ceramic capacitor In a method of identifying a direction of stacking in a stacked ceramic capacitor, while density of magnetic flux generated from a magnetism generation apparatus is measured with a magnetic flux density measurement instrument, a stacked ceramic capacitor is caused to pass between a magnetism generation apparatus and the magnetic flux density measurement instrument and variation in magnetic flux density at least at the time of passage of the stacked ceramic capacitor is measured. Based on a result of measurement of magnetic flux density, a direction in which a plurality of internal electrodes are stacked in the stacked ceramic capacitor is identified.
US10141103B2	Power supply circuit A power supply circuit includes a DC-DC converter and a choke coil. The choke coil includes a pair of coils wound in mutually opposite directions, and the coils are connected between a DC power source and the DC-DC converter. In the choke coil, a self-resonating frequency in a common mode is higher than a self-resonating frequency in a normal mode. In the choke coil, a normal mode impedance at the highest frequency in an AM band is higher than a common mode impedance at the lowest frequency in an FM band.
US10141100B2	Common-mode noise reduction In one general aspect, a converter circuit includes a magnetic core and a coil assembly. The coil assembly includes a primary winding assembly, a secondary winding assembly, and an auxiliary winding assembly. The primary winding assembly includes a conductive medium arranged in at least one primary winding layer. The secondary winding assembly includes a conductive medium arranged in at least one secondary winding layer. The auxiliary winding assembly includes a conductive medium arranged in at least one auxiliary winding layer. The at least one auxiliary winding layer includes an auxiliary winding layer disposed adjacent to a layer of the at least one primary winding layer and adjacent to a layer of the at least one secondary winding layer.
US10141099B2	Electronic component and manufacturing method thereof An electronic component includes a magnetic body and an internal coil structure embedded in the magnetic body. The internal coil structure includes a first coil pattern part and a second coil pattern part formed on the first coil pattern part. An outermost coil pattern portion of the first coil pattern part is thicker than an inner coil pattern portion thereof.
US10141094B2	Mounting arrangement for inductive outlet A mounting arrangement for securing a wireless power outlet to an underside of a surface includes an electronics housing configured to contain therewithin components of the outlet and a coil housing. The coil housing is configured to contain a primary inductive coil of the outlet. The mounting arrangement further includes a heat sink configured to expel thermal energy from the primary inductive coil and a flexible thermal conductor.
US10141093B2	Reactor A reactor that includes a coil made of a wound coil wire; a magnetic core on which the coil is arranged, and that forms a closed magnetic path, wherein the magnetic core has an inner core section that is arranged on an inside of the coil; and a heat dissipating sheet that is interposed at least partially between an inner circumferential surface of the coil and an outer circumferential surface of the inner core section that is opposite to the inner circumferential surface of the coil, wherein the heat dissipating sheet is in contact with the coil and the inner core section.
US10141090B2	Resin composition, paste for forming a varistor element, and varistor element A resin composition which includes (A) an epoxy resin, (B) a curing agent, and (C) carbon nanotubes, wherein the carbon nanotubes contain therein semiconducting single-walled carbon nanotubes in an amount of 70% by weight or more. A cured product of a paste made from the resin composition can be used to form a varistor element.
US10141086B2	Cable for high speed data communications A cable for high speed data communications is provided. The cable includes a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The first inner conductor is substantially parallel to the second inner conductor and to a longitudinal axis. The cable includes a conductive shield wrapped around the first and second inner conductors, with an overlap of the conductive shield along and about the longitudinal axis. The overlap is aligned with a low current plane. The low current plane is substantially parallel to the first and second inner conductors, substantially equidistant from the first and second inner conductors, and substantially orthogonal to a plane including the first and second inner conductors.
US10141085B2	Conductor joint and conductor joint component A conductor joint for joining a copper conductor to a fiber-structured heating element whose dimensions are length (L)>>width (W)>>thickness (T), and which heating element comprises carbon fiber strands, wherein the copper conductor is transversely disposed to the longitudinal direction (L) of the heating element to form a layered structure in the thickness direction (T), on both sides of the heating element, the copper conductor comprising strands separable from each other. The strands of the copper conductor, the number and diameter of which are suitable for transferring a power of more than ten kW, are quantitatively substantially evenly distributed on both sides of the heating element, the strands are disposed in a planar manner in such a way that the strands substantially lie in one plane, adjacent to each other, and the ends of the strands extend, in the width direction (W) of the heating element, beyond the heating element, wherein the portions of the ends of the strands extending beyond the heating element overlap each other, and an electric joint is formed between the lateral faces of these overlapping strands.
US10141084B2	Electronic device An anisotropic conductive film, the anisotropic conductive film including an insulating layer and a conductive layer laminated on the insulating layer, the conductive layer containing conductive particles, wherein after glass substrates are positioned to face each other on the upper and lower surface of the anisotropic conductive film and are pressed against the anisotropic conductive film at 3 MPa (based on the sample area) and 160° C. (based on the detection temperature of the anisotropic conductive film) for 5 sec, a ratio of the area of the insulating layer to that of the conductive layer is from about 1.3:1 to about 3.0:1.
US10141082B2	Oxidation resistant copper nanoparticles and method for producing same The present invention relates to oxidation resistant copper nanoparticles, and to a method for producing the same, which includes the steps of: preparing a first solution composed of a solvent, a polymer, and an organic acid; stirring the first solution to produce a first stirred solution; mixing the first stirred solution, a copper precursor, and a first reducing agent to produce a second reactant solution; mixing a second reducing agent with the second reactant solution to produce a third reactant solution; and collecting copper nanoparticles separated from the third reactant solution, which is a very simple process performing the reactions at a normal temperature under atmospheric conditions to produce copper nanoparticles, and an eco-friendly method firstly applying a watery solvent so as to achieve mass production of copper nanoparticles only by mixing solutions. In particular, the copper nanoparticles according to the present invention may have excellent oxidation resistant properties to prevent them from being oxidized for three months or more even when preserved at a normal temperature under atmospheric conditions.
US10141080B2	Insoluble cesium glass The present disclosure relates to an insoluble cesium mixed multimetal oxide, ceramic, glass-ceramic or glass which is intended to be a replacement for cesium chloride or similar materials used as radiation sources. Additionally, this insoluble compound could replace other insoluble lower specific activity cesium compounds used in industrial, underwater, and underground/downhole application because it would allow the use of older lower specific activity cesium stock solutions. The disclosure further provides a method for the cesium to be recovered from cesium chloride sources.
US10141078B2	Liquid fuel nuclear fission reactor fuel pin Disclosed embodiments include nuclear fission reactors, nuclear fission fuel pins, methods of operating a nuclear fission reactor, methods of fueling a nuclear fission reactor, and methods of fabricating a nuclear fission fuel pin.
US10141075B2	Predicting and mitigating risk of ectasia and optimizing therapeutic outcomes Systems and methods are provided for evaluating an eye of a patient. A modeling component is configured to determine a representation of at least the cornea of the eye from a three-dimensional structural image of the eye and at least one biomechanical property of the eye. A feature extractor is configured to extract a plurality of features from the model of at least the cornea of the eye. An ectasia evaluation component is configured to calculate at least one parameter associated with the risk of ectasia in the eye from the extracted plurality of features. A system output is configured to provide the calculated at least one parameter to one of a treatment system and a user.
US10141073B2	Systems and methods for controlling acquisition of sensor information Systems and methods are described for controlling acquisition of sensor information, including: one or more physiological sensors and a computing device including a processor programmed to query the physiological sensors to measure one or more physiological parameters of an individual in response to at least one flag indicating a need to measure the one or more physiological parameters; receive a set of sensor values from the physiological sensors; assign a quality value to the set of sensor values received from the physiological sensors; retain the set of sensor values if the assigned quality value of the set of sensor values meets or exceeds a minimum quality value threshold; and update the at least one flag if the assigned quality value of the set of sensor values meets or exceeds the minimum quality value threshold.
US10141072B2	Efficient encoder based on modified RU algorithm Memory systems may include a memory portion, and a controller suitable for receiving information data, generating first stage data, generating a first portion parity information, generating a second portion parity information based at least in part on the first portion parity information and the first stage data, and outputting the second portion parity information.
US10141068B2	Magnetic element, skyrmion memory, skyrmion memory-device, solid-state electronic device, data-storage device, data processing and communication device A magnetic element capable of generating and erasing a skyrmion, including a magnet shaped as a thin layer and including a structure surrounded by a nonmagnetic material; a current path provided surrounding an end region including an end portion of the magnet, on one surface of the magnet; and a skyrmion sensor that detects the generation and erasing of the skyrmion. With Wm being width of the magnet and hm being height of the magnet, a size of the magnet, with the skyrmion of a diameter λ being generated, is such that 2λ>Wm>λ/2 and 2λ>hm>λ/2. With W being width of the end region in a direction parallel to the end portion of the magnet and h being height of the end region in a direction perpendicular to the end portion of the magnet, the end region is such that λ≥W>λ/4 and 2λ>h>λ/2.
US10141067B2	Magnetic memory device According to the embodiment, a magnetic memory device includes a magnetic body. The magnetic body includes first and second extending regions, and a first connecting region. The first extending region spreads along a first direction and along a second direction crossing the first direction, and includes first and second end portions extending in the first direction. The second end portion is separated from the first end portion in the second direction. The second extending region spreads along the first direction and along a third direction crossing the first direction, and includes third and fourth end portions extending in the first direction. The fourth end portion is separated from the third end portion in the third direction. The first connecting region is provided between the first and third end portions, and connects the first end portion with the third end portion.
US10141066B2	Memory device and operating method thereof A memory device including: a memory block including a plurality of cell strings; a peripheral circuit configured to set voltages for a program operation of selected memory cells in the cell strings, and program the selected memory cells by using the set voltages; and a control circuit configured to control the peripheral circuit so that the selected memory cells are programmed in response to a program command, and increase a channel voltage of non-selected cell strings including non-selected memory cells while the selected memory cells are programmed, and an operating method thereof.
US10141065B1	Row redundancy with distributed sectors A semiconductor device comprises an embedded flash memory with row redundancy. The embedded flash memory comprises a memory bank that includes multiple physical sectors, where each physical sector comprises a plurality of erase sectors. In the memory bank, multiple portions of an additional erase sector are respectively distributed among the multiple physical sectors. The multiple portions of the additional erase sector are configured as a row-redundancy sector for the memory bank.
US10141064B1	Prevention of neighboring plane disturb in non-volatile memory Techniques are presented for the prevention and detection of inter-plane disturbs in a memory circuit, where, when concurrently performing memory operations on multiple planes, a defect in one plane can feed back through a common supply node and adversely affect memory operations in another node. To isolate such defects to plane in which the occur, the memory supplies the elements, such as a word line, of different planes from a common supply node through a uni-directional circuit element, such as a diode. In this way, if the voltage on an element in an array gets pulled up to an elevated voltage though a defect, this elevated voltage is stopped from flowing back to the common supply node. Additionally, by comparing the voltage levels on either side of the uni-directional circuit element, it can be determined whether such a defect is present in an array.
US10141061B2	Memory system According to one embodiment, a memory system includes a semiconductor memory and a controller. The semiconductor memory is configured to execute a first to third read operations. In the first read operation, a first voltage is applied to a selected word line. In the second read operation, a second voltage different from the first voltage and a third voltage are applied to the selected word line. In the third read operation, a fourth voltage different from the first to third voltages and a fifth voltage are applied to the selected word line. An absolute value of a difference between the second voltage and the fourth voltage is different from an absolute value of a difference between the third voltage and the fifth voltage.
US10141060B1	Memory system According to one embodiment, a memory system includes a semiconductor memory including a memory cell, and a controller configured to control the semiconductor memory and capable of creating second data based on first data read from the memory cell. Upon receiving a physical erase request for the first data held in the memory cell from an external device, the controller transmits one of an erase instruction and a write instruction for the second data to the semiconductor memory.
US10141058B1	Multi-chip non-volatile semiconductor memory package including heater and sensor elements A method of healing a plurality of non-volatile semiconductor memory devices on a multi-chip package is disclosed. The multi-chip package can be heated to a temperature range having a temperature range upper limit value and a temperature range lower limit value. The temperature of the multi-chip package can be kept essentially within the temperature range for a predetermined time period by monitoring a thermal sensing element with a sensing circuit outside of the multi-chip package. The thermal sensing element may be located near the components with the lowest failure temperature to ensure the multi-chip package is not damaged during the healing process.
US10141055B2	Methods and apparatus for pattern matching using redundant memory elements Methods include receiving a pattern to be searched in a memory having a plurality of sets of memory elements with each set coupled to a separate data line and corresponding to a same set of bit positions of the pattern. Methods further include receiving a pattern of data to be programmed into a memory, programming a first data state into one memory cell of each cell pair of a plurality of cell pairs of a memory array, and programing a second data state into another memory cell of each cell pair of the plurality of cell pairs for each bit position of the pattern. Memory configured to facilitate such methods include a plurality of cell pairs, each cell pair of the plurality of cell pairs programmed to store a same bit of data corresponding to a particular bit position of a pattern to be searched in the memory.
US10141053B2	Method for driving a semiconductor device including data migration between a volatile memory and a nonvolatile memory for power-saving To reduce power consumption of a processing device including a processor and a main memory in the processor. The main memory includes not only a volatile memory such as a DRAM but also a nonvolatile memory. The processor monitors access requirements to the main memory. The processor determines on the basis of the monitoring results whether the volatile memory or the nonvolatile memory operates mainly. In the case where the main memory changes from the volatile memory to the nonvolatile memory, part or all of data stored in the volatile memory is backed up to the nonvolatile memory. While the nonvolatile memory operates mainly, supply of power supply voltage to the volatile memory is stopped or power supply voltage to be supplied is lowered.
US10141052B2	Methods, articles, and devices for pulse adjustment to program a memory cell Embodiments disclosed herein may relate to adjusting an aspect of a programming pulse for one or more memory cells, such as based at least in part on one or more detected programmed resistance values for the one or more memory cells.
US10141041B1	Systems and methods for maintaining refresh operations of memory banks using a shared A memory device includes memory banks that each have multiple rows with row addresses. The memory device also includes a counter that stores and increments a first row address of a first row of a first set of memory banks to a second row address of a second row of the first set of memory banks in response to a first refresh operation when the memory device is operating in a first mode. The memory device further includes circuitry that blocks incrementing the second row address to a third row address of a third row of the first set of memory banks when the memory device transitions from the first mode to a second mode and the first refresh operation is not paired with a second refresh operation that is performed when the memory device is operating in the first mode.
US10141039B2	Burst length defined page size In some examples, a memory device is configured with a reduced command set and a variable burst length. In some instances, the variable burst length defines a page size associated with data to be loaded into a cache. In other instances, the variable burst length may be set on the fly per read/write command and, in some cases, the burst length may be utilized to define the page size associated with the read/write command.
US10141038B2	Computer system and memory device According to one embodiment, a system includes: a device including a memory cell array, the device configured to execute first read operation of a first read method and second read operation of a second read method on the memory cell array; a processor configured to receive a first data from the device, the first data from a selected region in the memory cell array by the first read operation, configured to execute first calculation processing using the first data during the second read operation to the selected region, and configured to acquire a result of the first calculation processing by a first signal based on a comparison result of the first data and a second data, the first signal indicating that the first data is valid, and the second data from the selected region by the second read operation.
US10141035B1	Memory cell with a read selection transistor and a program selection transistor The memory cell includes a read selection transistor, a program selection transistor, and an anti-fuse capacitor. The read selection transistor has a first terminal coupled to a bit line, a second terminal, and a control terminal coupled to a read word line. The program selection transistor has a first terminal coupled to the second terminal of the read selection transistor, a second terminal coupled to a high voltage control line, and a control terminal coupled to a program word line. The anti-fuse capacitor has a first terminal coupled to the second terminal of the read selection transistor, and a second terminal coupled to a low voltage control line.
US10141025B2	Method, device and computer-readable medium for adjusting video playing progress A method, device and computer-readable medium are provided for adjusting video playing progress in the field of video processing. The method for adjusting video playing progress includes: acquiring a keyword inputted by a user; determining at least one matching keyframe corresponding to the keyword in a target video, which includes at least one keyframe; displaying the at least one matching keyframe; and adjusting displaying progress of the target video to target displaying progress, when a selection operation on a keyframe of the at least one matching keyframe is detected, where the target displaying progress corresponds to the keyframe as indicated by the selection operation.
US10141012B1	Manual to automatic turntable player conversion A manual to automatic record player conversion includes a base unit and a blade that attaches to the tone arm. The base unit includes a movable a piston that engages the blade in order to move the tone arm upward, to specified locations on the record, or to the rest position. The position of the blade is detected by locating a reflective strip on the blade using an optical sensor, so that the piston remains positioned under the blade. The piston uses a tapered cone structure to engage a slot in the blade, compensating for any inaccuracies in position of the piston with respect to the blade. The base unit may be structured to interact with a remote control through Bluetooth or other wireless connectivity. The remote control may be a software program or “app” that is operated through a smart phone, tablet computer, or other computer.
US10141009B2	System and method for cluster-based audio event detection Methods, systems, and apparatuses for audio event detection, where the determination of a type of sound data is made at the cluster level rather than at the frame level. The techniques provided are thus more robust to the local behavior of features of an audio signal or audio recording. The audio event detection is performed by using Gaussian mixture models (GMMs) to classify each cluster or by extracting an i-vector from each cluster. Each cluster may be classified based on an i-vector classification using a support vector machine or probabilistic linear discriminant analysis. The audio event detection significantly reduces potential smoothing error and avoids any dependency on accurate window-size tuning. Segmentation may be performed using a generalized likelihood ratio and a Bayesian information criterion, and the segments may be clustered using hierarchical agglomerative clustering. Audio frames may be clustered using K-means and GMMs.
US10141008B1	Real-time voice masking in a computer network A voice signal may be adjusted to mask traits such as the gender of a speaker by separating source and filter components of a voice signal using cepstral analysis, adjusting the components based on pitch and formant parameters, and synthesizing a modified signal. Features are disclosed to support real-time voice masking in a computer network by limiting computational complexity and reducing delays in processing and transmission while maintaining signal quality.
US10141002B2	Communication devices and methods for temporal analysis of voice calls Headsets having corresponding audio adapters and methods comprise: a microphone configured to generate analog audio for a voice call; an analog-to-digital converter configured to convert the analog audio to digital audio; a voice activity detector configured to detect speech in the digital audio; a processor configured to i) determine a temporal characteristic of the speech, and ii) generate a message based on the temporal characteristic of the speech and a temporal characteristic of the voice call; and a transmitter configured to transmit the message.
US10141001B2	Systems, methods, apparatus, and computer-readable media for adaptive formant sharpening in linear prediction coding An apparatus includes a first calculator configured to determine a long-term noise estimate of the audio signal. The apparatus also includes a second calculator configured to determine a formant-sharpening factor based on the determined long-term noise estimate. The apparatus includes a filter configured to filter a codebook vector to generate a filtered codebook vector. The filter is based on the determined formant-sharpening factor, and the codebook vector is based on information from the audio signal. The apparatus further includes an audio coder configured to generate a formant-sharpened low-band excitation signal based on the filtered codebook vector.
US10140992B2	System and method for voice authentication over a computer network Systems, computer-implemented methods, and tangible computer-readable media are provided for voice authentication. The method includes receiving, on a mobile device, a speech sample from a user as part of a request for a restricted-access resource separate from the mobile device. When the user has previously established an identity with the mobile device, the method includes transmitting the speech sample along with the request to an authentication server which compares the speech sample to a previously established speech profile associated with the user and providing access to the restricted-access resource based on a response to the request from the authentication server if the speech sample from the user matches the speech profile on the authentication server with a minimum certainty threshold.
US10140991B2	Using audio characteristics to identify speakers and media items Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing speaker identification. In some implementations, data identifying a media item including speech of a speaker is received. Based on the received data, one or more other media items that include speech of the speaker are identified. One or more search results are generated that each reference a respective media item of the one or more other media items that include speech of the speaker. The one or more search results are provided for display.
US10140987B2	Aerial drone companion device and a method of operating an aerial drone companion device A method of operating an aerial drone companion device includes detecting a first voice command spoken by a first user. The aerial drone companion device is autonomously oriented such that an image capture device faces the first user in response to detecting the first voice command. A second voice command spoken by the first user is detected while the image capture device faces the first user. The second voice command is transmitted from the aerial drone companion device to a computer located remotely from the aerial drone companion device. A task signal is received indicating a task to be performed. The task signal is generated by the computer based on the second voice command, and the task signal is transmitted by the computer and received by the aerial drone companion device. The method includes autonomously executing the task by the aerial drone companion device.
US10140986B2	Speech recognition Voice input is received from a user. An ASR system generates in memory a set of words it has identified in the voice input, and update the set each time it identifies a new word in the voice input to add the new word to the set, during at least one interval of speech activity. Information is pre-retrieved whilst the speech activity interval is still ongoing, for conveying in a response to be outputted at the end of the speech activity interval.
US10140980B2	Complex linear projection for acoustic modeling Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for speech recognition using complex linear projection are disclosed. In one aspect, a method includes the actions of receiving audio data corresponding to an utterance. The method further includes generating frequency domain data using the audio data. The method further includes processing the frequency domain data using complex linear projection. The method further includes providing the processed frequency domain data to a neural network trained as an acoustic model. The method further includes generating a transcription for the utterance that is determined based at least on output that the neural network provides in response to receiving the processed frequency domain data.
US10140979B2	Modeling a class posterior probability of context dependent phonemes in a speech recognition system What is disclosed is a system and method for modelling a class posterior probability of context dependent phonemes in a speech recognition system. A representation network is trained by projecting a N-dimensional feature vector into G intermediate layers of nodes. At least some features are associated with a class label vector. A last intermediate layer ZG of the representation network is discretized to obtain a discretized layer {circumflex over (Z)}. Feature vector Q is obtained by randomly selecting V features from discretized layer {circumflex over (Z)}. Q is repeatedly hashed to obtain a vector Qf where Qf is an output of the fth hashing. An equivalent scalar representation is determined for each Qf. In a manner more fully disclosed herein, a posterior probability Pf is determined for each (x, b) pair based on the equivalent scalar representation of each respective Qf. The obtained posterior probabilities are used to improve classification accuracy in a speech recognition system.
US10140974B2	Method and apparatus for speech recognition A method and apparatus for speech recognition are disclosed. The speech recognition apparatus includes a processor configured to process a received speech signal, generate a word sequence based on a phoneme sequence generated from the speech signal, generate a syllable sequence corresponding to a word element among words comprised in the word sequence based on the phoneme sequence, and determine a text corresponding to a recognition result of the speech signal based on the word sequence and the syllable sequence.
US10140973B1	Text-to-speech processing using previously speech processed data Systems, methods, and devices for generating text-to-speech output using previously captured speech are described. Spoken audio is obtained and undergoes speech processing to create text. The resulting text is stored with the spoken audio, with both the text and the spoken audio being associated with the individual that spoke the audio. Various spoken audio and corresponding text are stored over time to create a library of speech units. When the individual sends a text message to a recipient, the text message is processed to determine portions of text, and the portions of text are compared to the library of text associated with the individual. When text in the library is identified, the system selects the spoken audio units associated with the identified stored text. The selected spoken audio units are then used to generate output audio data corresponding to the original text message, with the output audio data being sent to a device of the message recipient.
US10140968B2	Acoustic absorption and methods of manufacture FIG. 2 shows a microperforated panel absorber 22 comprising: a microperforated facing 24; a non-perforated facing 26; and a cellular core structure 28 therebetween; the core structure 28 provides a number of primary cells 33 and a number of secondary cells 37; the secondary cells 37 each provide a reduced cell depth in comparison to the primary cells 33. FIG. 9 shows that the number of the primary cells 33 and the number of the secondary cells 37 ensures that sound absorption at frequencies up to and including the peak frequency is substantially maintained and that the sound absorption at frequencies higher than peak frequency is substantially increased relative to a comparable panel absorber in which the secondary cells are effectively replaced by primary cells.
US10140959B2	Mobile terminal and method of controlling the same The present disclosure relates to a mobile terminal capable of outputting graphic objects and a control method thereof. The mobile terminal includes a display unit that is configured to display a home screen page including a plurality of graphic objects, and a controller that is configured to output the plurality of graphic objects on the other region, except for a specific region, of the home screen page, wherein the plurality of graphic objects are output on positions, decided based on a preset condition, on the other region.
US10140958B2	Managing multiple systems in a computer device Resources of multiple systems are managed in a computer device. A first processing system having a set of dedicated resources also has a resource manager to manage at least one of the resources. The first processing system is prevented from directly accessing the resources without authorization. A second processing system, connected to the set of dedicated resources, has a supervisor application to grant control to individual resources to the resource manager of the first processing system. A computer program is executed in the first processing system. The supervisor application grants control of at least one resource to the resource manager of the first processing system in a way that is transparently to the computer program executing in the first processing system.
US10140957B1	Controlling content output features to optimize content consumption A computing device may output content including text content, audio content, and video content according to one or more content output features. The content output features may include font features and page layout features for text content, volume and playback rate for audio content, and playback rate for video content. In some cases, a consumption rate of content by the individual may be determined to identify values of content output features that may increase consumption of content by the individual. The settings for the content output features may be modified to correspond with the values that provide increased consumption of content.
US10140955B1	Display latency calibration for organic light emitting diode (OLED) display A system for calibrating an organic light emitting diode (OLED) display is presented. The calibration system includes a series of photodiodes coupled to at least a portion of illumination elements of the OLED display, a controller, and a driver circuit. The series of photodiodes is configured to measure, for one or more illumination elements, illumination latencies and time delays associated with different brightness levels. The controller obtains, for each illumination element, information about brightness levels associated with image light emitted from that illumination element for at least two consecutive video frames. Based on the measured latencies, the time delays and the information about brightness levels, the controller determines a driving signal for a driver circuit for each illumination element. The driver circuit applies the determined driving signal to that illumination element to calibrate the OLED display.
US10140950B2	Display device driving method and video display apparatus The present disclosure provides a display device driving method and the like that can suppress degradation of display quality at the time of switching to a video based on a video signal from an external signal source. The display device driving method according to the present disclosure includes: receiving a training signal transmitted from an external signal source; after receiving the training signal, transmitting a lock signal to the external signal source at a timing based on an internal synchronization signal of the display device; after transmitting the lock signal, receiving a video signal that is transmitted from the external signal source and is synchronous with an external synchronization signal; and displaying a video by using the video signal received from the external signal source.
US10140942B2	Semiconductor device A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.
US10140941B2	Method and apparatus for adjusting a screen refresh frequency and display The present disclosure provides a method and apparatus for adjusting a screen refresh frequency and a display. The method comprises: acquiring and storing a current frame of picture signal; calculating a similarity value between the current frame of picture signal and a previous frame of picture signal; and acquiring a screen refresh frequency for the current frame of picture signal based on the similarity value according to a preset relationship between similarity values and screen refresh frequencies, so as to realize adjustment of the screen refresh frequency.
US10140937B2	Display panel, liquid crystal display and driving method therefor The disclosure provides a display panel, a liquid crystal display and a driving method therefor. In the display panel, each of rows and columns of pixels includes primary color pixels and white pixels arranged alternately; primary color pixels and white pixels in each row are electrically connected with different gate lines; primary color pixels in each odd-numbered row have third color, primary color pixels in each even-numbered row are arranged to alternate the first and second colors, and in any two adjacent even-numbered rows, colors of two primary color pixels located in one same column are different from each other; or, primary color pixels in each even-numbered row have third color, primary color pixels in each odd-numbered row are arranged to alternate the first and second colors, and in any two adjacent odd-numbered rows, colors of two primary color pixels located in one same column are different from each other.
US10140930B2	Signal generating unit, shift register, display device and signal generating method A signal generating unit, a shift register, a display device and a signal generating method. The signal generating unit includes: a first output transistor; a second output transistor; a first-node potential control module, configured to output a first control signal to a gate electrode of the first output transistor under control of an inputted start signal; a second-node potential control module configured to output a second control signal, which has an opposite phase with the first control signal, to a gate electrode of the second output transistor; and a first capacitor structure configured to be charged when the first-node potential control module outputs a single-pulse-width level signal for controlling the first output transistor to be switched on, and to maintain the gate electrode of the first output transistor in an on state during a subsequent time period having one pulse width.
US10140928B2	Pixel driving circuit, driving method, array substrate and display apparatus Provided are a pixel driving circuit, a driving method, an array substrate and a display apparatus. The pixel circuit comprises: a data line, a gate line, a first power line, a second power line, a reference signal line, a light emitting device, a driving transistor, a storage capacitor, a reset unit, a data writing unit, a compensation unit and a light emitting control unit. The pixel driving circuit can compensate and eliminate the display nonuniformity caused by the threshold voltage difference of the driving transistors.
US10140927B2	Gray scale generator and driving circuit using the same A driving circuit for driving a light emitting unit includes a gray scale generation circuit and a driving unit, and a gray scale generation circuit, includes a shift register unit and a data storage unit. The shift register unit receives a luminance-related data, and the shift register unit is a k-bit shift register unit. The data storage unit has parallel input ends and a serial output end. The data storage unit receives the luminance-related data via its parallel input ends and serially outputs bits of the luminance-related data to generate a serial signal. The data storage unit determines time points to output different bits of the serial signal to generate a gray-scale control signal according to a serial-out control signal. The driving unit is coupled to the gray scale generation circuit to adjust a light-emitting time of the light emitting unit according to the gray-scale control signal.
US10140925B2	Pixel circuits for AMOLED displays A system is provided for controlling an array of pixels in a display in which each pixel includes a light-emitting device and a reference voltage source that controllably supplies a reference voltage having a magnitude that turns off the light-emitting device. While the reference voltage is coupled to a drive transistor, a control voltage is supplied to the gate of the drive transistor to cause the drive transistor to transfer to a node common to the drive transistor and the light-emitting device, a voltage that is a function of the threshold voltage and mobility of the drive transistor. During an emission cycle, the current conveyed through the light emitting device via the drive transistor is controlled by a voltage stored in the storage capacitor, which is a function of the threshold voltage and mobility of the drive transistor so that the current supplied to the light-emitting device remains stable.
US10140923B2	Pixel driving system of AMOLED having initialization signal of alternating high and low levels and method for driving pixel of AMOLED having initialization signal of alternating high and low levels The present application provides a pixel driving system of AMOLED and a pixel driving method of AMOLED. The pixel driving system of AMOLED includes a pixel driving circuit of a 4T1C architecture, and an initialization voltage supply module electrically connected to the pixel driving circuit, by providing a high level of an initialization signal from the initialization voltage supply module at the light emission stage in the pixel driving circuit to effectively compensate the threshold voltage of the driving thin film transistor, so that the current flowing through the organic light emitting diode is stabilized while reducing the leakage current of the gate and the source of the driving thin film transistor in the light emission stage, the stability of the compensation data in the light emission stage, to enhance the compensation effect.
US10140922B2	Pixel driving circuit and driving method thereof and display device A pixel driving circuit and a driving method thereof, and a display device are provided. The pixel driving circuit includes input module, compensation module, drive module, light emitting module and control signal input module. The input module is configured to transmit a signal of a data voltage terminal to the compensation module under control of first gate signal terminal. The compensation module is configured to compensate for a threshold voltage of the drive module under control of the input module and a threshold voltage control terminal. The drive module is configured to drive the light emitting module to emit light under control of first control signal terminal. The control signal input module is configured to transmit a signal of second voltage terminal or third voltage terminal to the first control signal terminal under control of second control signal terminal and third control signal terminal.
US10140918B2	Actively driven organic light-emitting display apparatus An embodiment of the present disclosure provides an actively driven organic light-emitting display apparatus to eliminate a defect in which the current flowing through the lighting device in the actively driven organic light-emitting display apparatus is affected by the instable current caused by the instable threshold voltage of the drive transistor, so that the current flowing through the lighting device is accurate and make the brightness of the whole actively driven organic light-emitting display apparatus be even. The display apparatus comprises a light emitting device, a light emitting device drive unit, a first switch unit, a second switch unit, a current control unit and a resistor which constitute a feedback loop. An input terminal of the current control unit is input a data signal to control that the current of the light emitting device is only associated with the resistor, voltage of the input data signal and the supply voltage.
US10140917B2	Power supply circuit, driving method for the same and display device Provided are a power supply circuit, a driving method for the same, and a display device. The power supply circuit comprises a first control sub-circuit, a second control sub-circuit, a voltage converting sub-circuit, a first output sub-circuit, and a second output sub-circuit; the first control sub-circuit controls the first voltage level terminal to be connected to the first node, the second control sub-circuit controls the second voltage level terminal to be connected to the second node, the voltage converting sub-circuit adjusts the voltage at the first node and the voltage at the second node, the first output sub-circuit outputs the voltage at the first node to the first output terminal, the second output sub-circuit outputs the voltage at the second node to the second output terminal. Structure of the power supply circuit can be simplified, and thereby manufacturing cost of the power supply circuit can be reduced.
US10140916B2	Charge pump and operating method thereof A charge pump and operating method thereof are disclosed. The charge pump includes a first capacitor to a third capacitor and a first switch to a tenth switch. The charge pump is used to receive an input voltage and provide an output voltage to a load capacitor. When the charge pump is operated in a first mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (−½) times the input voltage. When the charge pump is operated in a second mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (−⅔) times the input voltage.
US10140915B2	Display device, display system and display method The present disclosure provides a display device, a display system and a display method. The display device includes a driver circuit, a display panel, and an interference unit arranged at a display side of the display panel. The driver circuit is configured to drive the display panel to display an image, and a time period for each frame of the image includes a display period and an interference period. During the display period, the interference unit is in a transparent state so as to enable light beams from the display panel to pass through the interference unit, and during the interference period, the interference unit is in an interference state so as to interfere with the light beams from the display panel.
US10140910B2	Shift register, a gate line driving circuit, an array substrate and a display apparatus The present disclosure provides a shift register, a gate line driving circuit, an array substrate and a display apparatus. The shift register comprises: an inputting circuit for controlling a potential of a pulling up node (PU); a pulling down driving circuit for controlling the potentials of the PU and a pulling down node to be different; a resetting circuit for pulling down the PU and a signal outputting terminal (Output); a first outputting circuit for pulling down the Output; a second outputting terminal for outputting a signal from a clock signal terminal via the Output; a controlling circuit for connecting the second outputting circuit with the PU when the PU is at a high level and pulling the first terminal of the second outputting circuit down to a potential as twice as the potential of the low level signal terminal when the PU is at a low level.
US10140907B2	Display panel, display device and method for pixel arrangement A display panel, a display device and a method for pixel arrangement, which can improve picture quality. The display panel includes a plurality of sub-pixels arranged in an array, and the sub-pixels arranged in a first direction are arranged in one of following modes: a first mode of sub-pixel arrangement, in which a first sub-pixel or a third sub-pixel is inserted between every two second sub-pixels; and a second mode of sub-pixel arrangement, in which the first sub-pixel and the third sub-pixel are inserted between every two second sub-pixels.
US10140905B2	Controller, data driver circuit, display device, and method of driving the same A controller, a data driver circuit, a display device, and a method of driving the same are provided. Color-specific data driving is performed through adaptive overdriving in consideration of differences in response times of color-specific subpixels. Differences in response times of color-specific subpixels due to different thicknesses of color-specific pigment layers are reduced.
US10140903B2	Array substrate and driving method thereof, display panel and display device The invention provides an array substrate and a driving method thereof, a display panel and a display device. The array substrate comprises a plurality of circulating units and a plurality of pixel circuits. Each circulating unit consists of four sub-pixel units located in four columns and two rows, sub-pixel units in any two adjacent columns are located in different rows and have different colors, and sub-pixel units in at least one row have different colors. Each sub-pixel unit is connected to one pixel circuit, and each sub-pixel unit comprises a first sub-pixel and a second sub-pixel located in the same column and having the same color. The pixel circuit is configured to drive the first sub-pixel when a first frame picture is displayed, and to drive the second sub-pixel when a second frame picture is displayed.
US10140901B2	Shift register circuit, display panel and display apparatus having the same The present application discloses a shift register circuit having a pull-down drive sub-unit providing a first pull-down signal to a pull-down node; a first pull-down sub-unit connected to the pull-down node, a pull-up node, and an output port, the first pull-down sub-unit being configured to reduce noise level at the pull-up node and/or the output port based on the first pull-down signal; and at least one second pull-down sub-unit, each of the at least one second pull-down sub-unit having a pull-down input port, each of the at least one second pull-down sub-unit connected to the pull-up node and the output port, and being configured to reduce noise level at the pull-up node and/or output port based on the second pull-down signal inputted into the pull-down input port.
US10140900B2	Data driver, display device including the data driver and method of driving the display device with different gamma data A data driver includes a gamma unit, a digital-to-analog converter, and an output buffer. The gamma unit receives at least one reference voltage, and generates a first gamma reference voltage corresponding to a first sub-pixel and a second gamma reference voltage corresponding to a second sub-pixel using the received at least one reference voltage. The digital-to-analog converter receives the first and second gamma reference voltages from the gamma unit, and generates a first gamma data value corresponding to the first sub-pixel using the first gamma reference voltage and a second gamma data value corresponding to the second sub-pixel using the second gamma reference voltage. The output buffer outputs a first frame including the first gamma data value and a second frame including the second gamma data value. The output buffer outputs the first and second frames in a repeated manner for every predetermined number of frames.
US10140899B2	Image shift controller for changing a starting position of an image and display device including the same An image shift controller and a display device including the same, the image shift controller including a starting position generator configured to generate image position information using sample data of first image data, and a shift determiner configured to determine a movement direction and a movement amount of an image using the image position information.
US10140896B2	Airframe display systems and methods An airframe display system and method. The airframe display system has an airtight airframe having at least one airbeam. The airbeam has a sleeve of dimensionally stable material. A stretch fabric cover is received over the airframe whereby, upon inflation, the airframe is substantially rigid and the stretch fabric cover is taut over the airframe defining a display surface area.
US10140889B2	Hernia model A model for practicing transabdominal pre-peritoneal (TAPP) and total extraperitoneal (TEP) approaches for laparoscopic hernia repairs is provided. The model simulates an insufflated space between the abdominal muscles and peritoneum. A spring layer may be incorporated to provide a realistic resiliency to the model while in the simulated insufflated configuration. At least one hole is provided in the model from which synthetic tissue protrudes to simulate a hernia. The model is used to selectively simulate direct, indirect and femoral inguinal hernias as well as incisional hernias by removably placing the protruding simulated tissue into any one of several openings. The model contains all important anatomical structures and sits on a base frame or is connected to a rigid simulated pelvis. When located inside a laparoscopic trainer with an angled top cover, the model provides an ideal simulation for teaching and practicing laparoscopic hernia repair.
US10140886B2	Automated assessment and grading of computerized algorithms A grading system and method for grading a user solution to a computing assignment are presented. The method includes receiving a program code submitted by a user, wherein the received program code is the user solution to the computing assignment; activating at least one code processing engine, wherein each code processing engine is a secured isolated execution environment; executing the program code in the at least one activated code processing engine to produce an answer; determining a grade for the answer based on an expected answer and an approximate grading function, wherein the approximate grading function is determined based on a type of the computing assignment; and returning the grade to the user.
US10140884B2	Method and apparatus for writing form training An apparatus and method for training writing position can be implemented in the form of a glove with fasteners that secure a thumb, forefinger and middle finger together in a desired writing grip position. A protrusion can be applied to an outer lateral portion of the user's writing hand between a pinky finger and a wrist area, which can be mounted on a glove worn by the user, to prop up the writing hand of the user at a desired angle for writing. The protrusion can be implemented in the form of a ball that is fastened to the outer lateral portion of the glove worn on the writer's hand. The glove can be configured to be customized for a given user, such as by selecting a desired glove size, fastener position and/or position of a protrusion on the outer lateral portion of the glove between the pinky finger and the wrist. The glove is potentially useful for training a desired writing position of the user's writing hand as may be helpful in overcoming some of the challenges related to dysgraphia.
US10140883B2	Self-learning surveys for open-ended analysis A method of automatically evolving survey questions includes receiving, at a processor, a first set of textual responses to at least one open-ended question in a survey, reformatting the first set of textual responses as a set of possible textual responses in the form of closed-ended questions with numerical ratings as options, storing the set of possible textual responses in a memory in communication with the processor, selecting and transmitting a subset of the set of possible textual response to survey recipients, receiving, at the processor, participant numerical ratings for each textual response, using the processor to generate a confidence measure and score for each possible textual response based upon the participant ratings, generating a ranked list, with the processor, including the confidence measures, storing the ranked list, and converting at least one of the original open-ended question in the survey to a closed-ended ended question, using a subset of the textual responses.
US10140882B2	Configuring a virtual companion A service may be provided that allows interacting users to interact with characters presented by devices of the interacting users. The operation of the character presented to an interacting user may be customized for that interacting user. For example, a first controlling user may specify first information for configuring or controlling the operation of the character when the character is interacting with a first interacting user, and a second controlling user may specify second information for configuring or controlling the operation of the character when the character is interacting with a second interacting user. The information provided by a controlling user may be used to select a segment to be used for a session between an interacting user and the character.
US10140881B1	CPR training assembly A CPR training assembly for instructing a person to perform CPR or choking rescue on an infant, a child or an adult includes a housing and an audio unit that is coupled to the housing. The audio unit emits audio outwardly from the housing to audibly alert a user. The audio unit stores data pertaining to audible instructions for performing CPR or choking rescue on infants, children and adults. A control unit is coupled to the housing and the control unit is electrically coupled to the audio unit to select the audible instructions for a respective one of the infants, children and adults. In this way the user can choose to receive audible instructions that correspond to whether an infant, a child or an adult needs CPR or choking rescue.
US10140879B1	Interactive behavioral treatment delivery system and method of use Systems and methods are disclosed for presenting medical treatment information relating to a patient's conditions or symptoms. Some embodiments of the system include interactive display views presenting patient behavioral instructional information in multiple formats, including, for example, textual and/or multimedia. Some embodiments of the system can present information such as, for example, guidance on how to administer and/or receive one or more medical treatments. Information presented can, in part, be determined by logical processing of information obtained interactively from a patient, patient's assistance, biometric data collection device, and/or medical practitioner. The system can log session navigation and data collection information to a local data store and/or transmit that information to a remote device for additional processing and/or storage. In one embodiment, the system provides behavior based birthing assistance.
US10140877B2	Collision avoidance systems The disclosure is directed to systems and methods for collision avoidance of aerial vehicles. More particularly, the disclosure is directed to systems and methods for avoiding collisions between manned aerial vehicles and unmanned aerial vehicles. The unmanned aerial vehicle includes a low power RF beacon which transmits signals over a predefined frequency monitored by manned aerial vehicles.
US10140876B2	Systems and methods for enhanced awareness of obstacle proximity during taxi operations Systems and methods for predicting and displaying targets based on height in relation to the wing, wingtip or other elements of the aircraft, such as engine nacelles. The location of ground obstacles is based on radar returns (from sensors deployed on the ownship), aircraft surveillance data, and/or an airport moving map database.
US10140874B2	System and method for enabling virtual sightseeing using unmanned aerial vehicles A system of virtual sightseeing using unmanned aerial vehicles (UAV) and methods of making and using same. The virtual sightseeing system can include a plurality of UAVs arranged over a geographical area of interest in one or more ground configurations. In response to a sightseeing request, one or more UAVs are activated and deployed to a sightseeing region of interest. The UAVs travel to the region of interest and, upon arriving, acquire data for presentation in real-time. The data can include both visual and non-visual data from the region of interest and can be presented in integrated fashion in a virtual reality terminal. The virtual sightseeing is supervised by an operational subsystem that is responsible for efficient allocation of UAVs in response to multiple sightseeing requests. Even if physically separate, the subsystems of the virtual sightseeing system can communicate via a data communication subsystem, such as a wireless network.
US10140870B1	Occupant facing vehicle display A vehicle for maneuvering an occupant of the vehicle to a destination autonomously as well as providing information about the vehicle and the vehicle's environment for display to the occupant.
US10140867B2	Collision avoidance system A collision avoidance system comprises: a following vehicle data acquiring unit that acquires following vehicle data indicating the relative position and relative speed of a following vehicle traveling behind the host vehicle; a travel data acquiring unit that obtains travel data indicating travel conditions for the host vehicle; a specific state extraction unit that extracts specific travel data indicating specific travel conditions for the host vehicle under which the possibility of a collision between the host vehicle and the following vehicle is high; a database unit storing a plurality of pieces of specific travel data; a determination unit that determines whether or not there is the possibility of a collision between the host vehicle and the following vehicle; and a warning data output unit that outputs warning data to the following vehicle if the determination unit determines that there is the possibility of a collision.
US10140862B2	Hybrid distributed prediction of traffic signal state changes Computer-implemented predictions of upcoming traffic control signal states or state changes can be used to improve driver convenience, safety, and fuel economy. Such information can be used advantageously by a human operator, or by an autonomous or semi-autonomous vehicle control system. Predictions can be computed with suitable machines installed in a vehicle, in cooperation with a remote back-end server system. The prediction computations in the vehicle may be supported by data communicated to the vehicle computing machinery over various wireless communications, including telecom systems, DSRC, etc.
US10140859B1	Amelioration of traffic gridlock conditions A risk of at least one vehicle blocking an intersection is determined. One or more ameliorative actions are determined based on the risk. At least one of the one or more ameliorative actions are performed.
US10140857B2	Vehicle turn detection An turn detection system is configured to determine headings or a course of a vehicle over a period of time and evaluate whether the vehicle has registered a turn based on these headings/course. In some arrangements, upon detecting a turn, sensor data may be collected to determine one or more characteristics or attributes of the turn. Such data may indicate a loss event associated with the turn and be used to calculate a probability or risk of loss given the various characteristics of the turn. These probabilities may further be applied to determine various costs and premiums.
US10140856B2	Automatic detection of lane closures using probe data A plurality of instances of probe data are received. Each instance is received from a probe apparatus of a plurality of probe apparatuses each comprising a plurality of sensors and being onboard a vehicle. An instance comprises location information indicating a location of the corresponding probe apparatus. For each of one or more instances, a distance parameter is determined based on the location information and a road segment corresponding to the location. A set of distance parameters is defined based on the distance parameter determined for each of the one or more instances. The set of distance parameters is analyzed to identify clusters of probe data. The number of clusters identified is determined and compared to a historical number of clusters. If the number of clusters identified is less than the historical number of clusters, it is determined that there is a lane closure corresponding to the road segment.
US10140854B2	Vehicle traffic state determination An instance of probe data that was captured by sensors of a probe apparatus onboard a vehicle is received. Previous instances of probe data captured by the probe apparatus onboard the vehicle are accessed and the instance of probe is analyzed based on the previous instances of probe data. A current traffic state is determined for the vehicle based on the analysis. In an example embodiment, the analysis comprises generating a hidden Markov model based on speed data of the probe data. A Viterbi-path is obtained corresponding to the instance of probe data and the previous instances of probe data. The current traffic state is defined based on the Viterbi-path. The current traffic state may be used to determine traffic information/data for a road segment and/or predict a future traffic state for the vehicle. Traffic management decisions and/or routing decisions for the vehicle may be made based thereon.
US10140853B2	Household appliances infrared remote waveform replication learning method and system The present disclosure provides a method for replication and learning of a waveform for infrared (IR) remote control of a household appliance. The method includes: sampling a data code in a household appliance infrared remote waveform by a direct sampling method, so as to obtain sampled data; performing feature extraction on the sampled data to obtain a feature value; reversing the level whose length is shorter than the minimum feature value and is within a preset range; adding the reversed level length with the adjacent levels length to perform deburring in the household appliance infrared remote waveform, wherein adjacent levels refer to the levels previous and after the reversed level, and the minimum feature value is feature value of the minimum level length.
US10140852B2	Remote control device, server, method, and computer program A mobile terminal 1A is configured to communicate with a remote control server 4A that transmits a remote control signal to operate an operation object apparatus via a particular local area network NW2 or a wide area communication network NW1. A permission/rejection information storage part 102 stores whether execution of remote control operation based on the operation instruction information is permitted or rejected when each operation instruction information has gone through any communication network. When receiving the input of operation instruction information, a communication network discrimination part 106 discriminates with which communication network communication has established. An operation permission/rejection decision part 107 decides permission/rejection of execution of the operation instruction information according to the results. When remote control operation based on operation instruction information is permitted as a result of decision, operation instruction information is transmitted to the remote control server 4A.
US10140851B2	Method and electronic device for performing connection between electronic devices A method of performing a connection between electronic devices and an electronic device thereof. The method may include: receiving a first signal including first information of the media device through first communication mode; generating a second signal including identification information of the media device by using at least a part of the first information in response to the first signal; transmitting the second signal to the media device through the first communication mode; and performing a connection with the media device by using the first information.
US10140850B2	Motor control device and motor control method One exemplary embodiment of the present invention is a motor control device configured to control rotation of a motor based on a drive signal input from an input terminal wherein the motor control device extracts two or more pieces of information of first drive information indicating a drive state or a drive stop state of the motor, second drive information indicating a rotation direction of the motor, third drive information indicating whether the motor is in a forced stop state, and fourth drive information indicating a rotational speed of the motor from at least one of a duty ratio, a voltage, and a frequency in the single drive signal, and controls the motor.
US10140848B2	Motion sensor adjustment Systems and techniques are provided for motion sensor adjustment. A signal indicating that motion was detected by a motion sensor may be received. A status of an HVAC system may be received from a computing device that controls the operation of vents of the HVAC system. The status of the HVAC system may include times vents of the HVAC system are operating. Using the status of the HVAC system, it may be determined that a vent of the HVAC system located in an area visible to the motion sensor was operating during the time period in which the motion sensor detected motion by correlating the time period in which the motion sensor detected motion with the times the vent was operating as indicated by the status of the HVAC system. The signal indicating that motion was detected may be ignored as a false alert and no alert may be generated.
US10140845B1	Notification system for mobile devices A method and system for generating an event notification on a mobile electronic device is provided. A notification message including an event impact record and a notification urgency record is received on the mobile electronic device. An impact sensory alert is generated based on the comparison between the event impact record with a plurality of sensory alerts presets of first sensory output signals and second sensory output signals. An urgency sensory alert is also generated based on the comparison between the notification urgency record with the plurality of sensory alerts presets of the first sensory output signals and the second sensory output signals. The impact sensory alert and the urgency sensory alert are outputted via the first sensory output signals and second sensory output signals.
US10140844B2	Smart device distributed security system A security system incorporating one or more sensors and one or more smart devices connected together via the Internet, other network or media. The one or more smart devices may have an alarm application (app) that permits a user to set and unset an alarm, monitor a status change of an event, have access to video information associated with the event, take remote or local action relative to the event, and more. The processing may be more than moving processing to one smart device. Core control may reside in more than one device, and thus result in a whole system robustness.
US10140843B2	Visual valve position indicator with wireless transmitter An indicator device with wireless communication functionality for monitoring a position of a valve actuating device. The indicator device including a visual indication device having an outer beacon and an inner beacon received within the outer beacon and arranged to rotate relative to the outer beacon, a wireless module including at least one sensor, positioned within the inner beacon of the visual indication device, and configured to transmit a message using the wireless module, and a shaft extending through the visual indication device and coupled to the valve actuating device. Rotation of the shaft is detectable by the at least one sensor of the wireless module to indicate the position of the valve actuating device, and the indicator device is sealed to inhibit infiltration of liquid and penetration of debris to the wireless module.
US10140841B2	Emergency notification apparatus and method A system, apparatus and method for alerting an emergency responder to an emergency, which includes a processor obtaining data from at least one sensor, determining, that the data indicates an emergency condition, based on the determining, obtaining location information and a unique identifier, and communicating the location information and the unique identifier to a node via a network connection.
US10140838B2	Automatic transmission of reminders for devices left behind A method for generating and transmitting a reminder message includes obtaining a unique user profile. The user profile includes a user identification (ID) indicative of a unique user, an object ID indicative of a unique object, and a device ID indicative of a unique mobile device. The processor is configured to predict a spatial relationship between the user, the object, and the mobile device. The prediction is based, in part, on the user ID, the object ID, and the device ID, where the prediction includes a geographic location for the user, the object, and/or the mobile device. The processor compares a location of at least two of the user, the object and the mobile device with the prediction of the user's spatial relationship with the object and the mobile device. The processor transmits a reminder message when the prediction of the spatial relationship exceeds a predetermined threshold.
US10140835B2	Monitoring of vectors for epidemic control In one embodiment, a computing device receives vector data from a plurality of vector-identifying sensors distributed across an area associated with the computing device. The computing device may then determine an amount of vectors within the area based on the vector data, and compares the amount of vectors to a threshold associated with the area. In response to the amount being greater than the threshold, the computing device may then trigger a remediation alarm, accordingly.
US10140831B2	Ionization air filters for hazardous particle detection An air filtration for detecting hazardous particles includes a housing having an air flow pathway extending therethrough. The housing is configured to receive air flow from an inlet of the housing and to expel air flow from an outlet of the housing. A pair of electrodes are positioned within the air flow pathway. A sensor system is operatively connected to the pair of electrodes to measure electrical current flowing therebetween. A processor is operatively connected to the sensor system to compare the measured electrical current with a stored baseline current. An alarm is operatively connected to the processor. The processor activates the alarm when the measured electrical current is different than the stored baseline current.
US10140826B2	Surveillance system and method of controlling the same A surveillance system including a surveillance server and at least one network camera is provided. The surveillance server includes: a communication interface configured to communicate with a network camera; and a processor configured to determine an event based on at least one image received from the network camera during a first period, determine an activation time of the network camera based on the event, and transmit an event reaction request including information about the activation time to the network camera during a second period after the first period.
US10140820B1	Devices for tracking retail interactions with goods and association to user accounts for cashier-less transactions Devices, systems, and method are provided for tracking items in a store for processing a cashier-less purchase transaction. In one example, a method for tracking items in a physical store for processing cashier-less purchase transactions is provided. The method includes detecting a portable wireless coded communication (WCC) device in the physical store. The WCC device is associated with an on-line account of a shopper. Then, receiving, by a server, sensor data regarding the WCC device, its location in the physical store and proximity to items in the physical store. The method includes receiving, by the server, interaction data of an item on a shelf of the physical store by the shopper using one or more sensors of the physical store and the WCC device to determine that the item is one targeted for purchase. The interaction data is configured to identify a type of said item and add it to an electronic shopping cart of the shopper having the on-line account for processing said cashier-less purchase transactions. The method further includes processing, by the server, an electronic charge to a payment service of the shopper for the item. The WCC device may be a portable device of the user, and an application for said cashier-less purchase transactions can be run by the WCC device or portable device of the user.
US10140819B2	Card game with counting Various embodiments include determining a value of a statistic describing cards that have been dealt from a deck, and modifying the rules of a game based on the statistic.
US10140816B2	Asynchronous persistent group bonus games with preserved game state data A system, apparatus, and method for preserving game state data for an asynchronous persistent group bonus game may have a plurality of gaming machines associated with the asynchronous persistent group bonus game and at least one network server having at least one processor and at least one non-volatile memory. The processor may be configured to determine whether a bonus game session is triggered on any of the plurality of gaming machines; and if the bonus game session is triggered, display live game monitor activities, and periodically save the persistent bonus game state and other data on the at least one non-volatile memory.
US10140813B2	Enriched game play environment Systems and methods for a gaming machine are provided. A gaming machine includes a game world engine, and a real world engine. The game world engine provides an entertainment game including a plurality of levels, generates a trigger based on a player using an enabling element of the entertainment game, accumulates game world credit based on the player's use of the enabling element, determines a progress from a first level of the entertainment game to a second level of entertainment game on the basis of the game world credit, and selects a level real world credit play table on the basis of the progress. The real world engine receives the trigger from the game world engine and executes a gambling game to determine a gambling outcome using the random number generator, the level real world credit pay table, and a wager of an amount of the real world credit.
US10140810B1	System and method for communicating between a mobile communication device and a gaming device A system and method for communicating between a mobile communication device and a venue apparatus is disclosed herein. The system comprises a mobile communication device, a venue apparatus, and a wireless local area network (WLAN) for a venue. The venue apparatus comprises a beacon for transmitting low energy BLUETOOTH transmissions. The mobile application is configured to verify a transmission from the venue apparatus in a registry when the mobile communication device is within three feet of the venue apparatus.
US10140807B2	Enhanced slot-machine for casino applications A slot machine including an entertainment software engine constructed to provide an entertainment game and display a received wager result; a first and second real world engine constructed to provide a wager result in response to a wager request; and a game world engine connected to the entertainment software engine, the game world engine constructed to: receive a request for a wager for a player of the entertainment game triggered by a player action taken while playing the entertainment game; communicate, the first and second wager requests; receive a first and second wager result; and generate, based on operator instructions, a controlled sequence of a portion of the entertainment game, the controlled sequence changing the state of the entertainment game.
US10140806B2	Wide area roulette display system with group arena play A system enables group play for table games of craps and/or roulette comprising. The gaming table surface enables play of craps or roulette. A processor receives event outcomes from outcomes on the gaming table surface from game play. Multiple player input terminals are distributed around the gaming table surface in an arc including of more than 200 degrees. The multiple player input terminals are in two-way communication with the processor. An elevated display system is supported above and around the gaming table surface. The elevated display system shows a dynamic rendition of craps or roulette game play including at least a display of event outcomes from play of craps or roulette on which the wagers are resolved by the processor.
US10140801B2	Controlling dispensing of items A device for controlling dispensing of items, includes a frame 34; at least one drawer 16 slidably mounted to the frame, the drawer having a plurality of storage sections 21; a plurality of access panels 3, each associated with one of the storage sections; control means operable to control movement of each of the access panels 3 relative to the associated drawer 16 (such as by controlling an actuator rod 210 and a latch 50) so that, when the drawer 16 is opened, the access panel 3 is either in a first mode which prevents access to its associated storage section 21 or in a second mode which allows access to its associate storage section 21.
US10140799B2	Device for detecting foreign object attached on surface of sheet-like medium A device for detecting a foreign object attached on a surface of a sheet-like medium, comprising a static electricity providing part (A) for providing static electrical charges, a medium transporting part (B) for transporting a medium under detection, and a static electricity sensor and identifier part (C). The medium transporting part comprises a static electricity receiving unit and a static electricity absorbing unit sequentially connected. The static electricity receiving unit is connected to the static electricity providing part (A), and the static electricity absorbing unit is connected to the static electricity sensor and identifier part (C). The static electricity receiving unit is configured to transfer the static electrical charges obtained from the static electricity providing part (A) to the medium under detection. The static electricity absorbing unit is configured to absorb the static electrical charges of the medium under detection.
US10140796B2	Selective seating controller A method, system, and/or computer program product improve a function of a computer used to make a seat in a venue available to a user. One or more processors received a request for a seat at a venue from a user. The processor(s) retrieve a user profile of the user and a seat profile of the seat, and then match features in the user profile to features in the seat profile. The processor(s), in response to the features in the user profile matching the features in the seat profile, store the user profile and the seat profile in a seat control storage device that is solely dedicated to the seat. The processor(s) then direct the user to the seat that is identified in the seat control storage device, where the user is identified by the user profile in the seat control storage device, and where the seat is identified by the seat profile in the seat control storage device.
US10140795B2	Food storage apparatus and method of controlling the same Disclosed herein are a food storage apparatus with improved security performance due to performing of a lock/unlock function from far away and a method of controlling the same. Also, provided are a food storage apparatus which allows a user far away to take appropriate measures by reporting approach of an unauthorized person, opening of a door, etc. or to check a thief or stolen food and a method of controlling the same. The food storage apparatus includes a body in which a storage space for storing food is formed, a door installed on the body to be openable, a locking unit which locks the door, a communication unit which communicates with an external terminal to receive a locking command, and a control unit which controls the locking unit to lock the door when the locking command is received from the terminal.
US10140793B2	Method for monitoring a parking facility A method for monitoring a parking facility that has an area reserved for autonomously driving vehicles, including: receiving an access request associated with a person for the reserved area, checking whether the person is authorized for access to the reserved area, granting access if the person is authorized for access, monitoring a behavior of the person in the reserved area. Also described is a corresponding device, system and computer program.
US10140792B1	Portable access control An access control device configured to store a list of user identifiers and user attribute data, receive a set of access criteria specifying one or more attributes, receive and identify a user identifier via a data input component, determine an access status of the user identifier based on the access criteria, and present the access status in such a way as is perceivable by a user of the access control device.
US10140790B2	Data recorder system and unit for a vehicle Disclosed is a data recorder unit and system for a vehicle. The system includes at least one video camera device configured to generate video data associated with the vehicle and/or its surroundings, and wirelessly transmit at least a portion of the video data. The data recorder unit includes a data recorder enclosure, a data processing unit located in the enclosure and configured to: wirelessly receive at least a portion of the video data from the at least one video camera device, process at least a portion of the video data, and generate processed video data based at least partially on the video data, and at least one storage device comprising at least one crash-hardened memory in communication with the at least one data processing unit and configured to store at least a portion of at least one of the video data and the processed video data.
US10140788B2	Automated engineering order creation A system of one or more processors for creating an engineering order for aircraft from a published, electronic service bulletin is disclosed. The system may include an interface, a database, and an engineering order (EO) module in operative communication with the interface and the database. The EO module may be configured to receive service bulletin data from the interface, access the database, and filter out a plurality of aircraft from the aircraft fleet information in the database based on the service bulletin data. The EO module may be further configured to receive a service bulletin configuration status for the aircraft, and divide the plurality of aircraft into different groups of aircraft based on the service bulletin configuration status for the aircraft. The EO module may be further configured to extract service bulletin data that is applicable to the different groups of aircraft, and generate an engineering order.
US10140785B1	Systems and methods for determining fuel information of a vehicle The present disclosure provides systems and methods for determining or providing fuel information of a vehicle, such as predicting fuel intake and usage for the vehicle. A method for predicting a fueling event of a vehicle comprises using a mobile computing device carried in the vehicle to track the vehicle along a route. Multiple stop events may be detected when tracking the vehicle, and for each of the multiple stop events, each of duration and a geographic location may be determined. Next, a given stop event of the multiple stop events may be determined to be a fueling event based at least in part on a duration and geographic location of the given stop event.
US10140773B2	Rendering virtual objects in 3D environments Systems, methods, devices, and other techniques for placing and rendering virtual objects in three-dimensional environments. The techniques include providing, by a device, a view of an environment of a first user. A first computing system associated with the first user receives an instruction to display, within the view of the environment of the first user, a virtual marker at a specified position of the environment of the first user, the specified position derived from a second user's interaction with a three-dimensional (3D) model of at least a portion of the environment of the first user. The device displays, within the view of the environment of the first user, the virtual marker at the specified position of the environment of the first user.
US10140770B2	Three dimensional heads-up display unit including visual context for voice commands The disclosure includes a system and method for wireless data sharing between a mobile client device and a three-dimensional heads-up display unit. A system may include a three-dimensional heads-up display unit (“3D HUD”) installed in a vehicle. The system may include a memory storing instructions that, when executed, cause the system to: establish a peer-to-peer video stream between a mobile client device and the vehicle; generate live video data for providing a video stream for causing a screen of the mobile client device to display visual content of the 3D HUD that includes substantially live images depicting what the driver of the vehicle sees when looking at the 3D HUD; and stream the live video data to the mobile client device to cause the screen of the mobile client device to display the video stream that depicts what the driver of the vehicle sees when looking at the 3D HUD.
US10140768B2	Head mounted display, method of controlling head mounted display, and computer program A head mounted display, includes an image display unit enabling the user to visually recognize the virtual image, and an augmented reality processing unit causing the image display unit to form the virtual image including a virtual object displayed additionally to a real object actually existing in the real world, in which the augmented reality processing unit causes the virtual image including the virtual object in a first display aspect to be formed, and then causes the virtual image including the virtual object in a second display aspect to be formed after a predetermined retention time period has elapsed, and in which a degree of the visibility hindrance of the virtual object in the second display aspect for the real object is lower than a degree of the visibility hindrance of the virtual object in the first display aspect for the real object.
US10140765B2	Staged camera traversal for three dimensional environment A staged camera traversal for navigating a virtual camera in a three dimensional environment is provided. The staged camera traversal can include a launch stage and an approach stage. During the launch stage, the tilt angle can be decreased towards zero tilt (i.e. straight down) with respect to the vertical. During an approach stage, the tilt angle of the virtual camera can be increased from about zero tilt towards the tilt angle associated with a target location. In certain implementations, the staged camera traversal can further include a traversal stage occurring between the launch stage and the approach stage. The tilt angle of the virtual camera can be maintained at about zero tilt during the traversal stage. The approach path of the virtual camera can be aligned along a view direction associated with the target destination during the approach stage.
US10140764B2	Generating efficient, stylized mesh deformations using a plurality of input meshes The present disclosure includes methods and systems for manipulating digital models based on user input. In particular, disclosed systems and methods can generate modified meshes in real time based on a plurality of input meshes and user manipulation of one or more control points. For example, one or more embodiments of the disclosed systems and methods generate modified meshes from a plurality of input meshes based on a combined shape-space, deformation interpolation measure. Moreover, in one or more embodiments, the disclosed systems and methods utilize an as-rigid-as-possible-deformation measure to combine input meshes into a modified mesh. Further, the disclosed systems and methods can variably combine input shapes over different portions of a modified mesh, providing increased expressiveness while reducing artifacts and increasing computing efficiency.
US10140763B2	Rendering a computer generated image using a stencil buffer A method and apparatus for rendering a computer-generated image using a stencil buffer is described. The method divides an arbitrary closed polygonal contour into first and higher level primitives, where first level primitives correspond to contiguous vertices in the arbitrary closed polygonal contour and higher level primitives correspond to the end vertices of consecutive primitives of the immediately preceding primitive level. The method reduces the level of overdraw when rendering the arbitrary polygonal contour using a stencil buffer compared to other image space methods. A method of producing the primitives in an interleaved order, with second and higher level primitives being produced before the final first level primitives of the contour, is described which improves cache hit rate by reusing more vertices between primitives as they are produced.
US10140762B2	Tessellation method A tessellation method is described which uses vertex tessellation factors. For a quad patch, the method involves comparing the vertex tessellation factors for each vertex of the quad patch to a threshold value and if none exceed the threshold, the quad is sub-divided into two or four triangles. If at least one of the four vertex tessellation factors exceeds the threshold, a recursive or iterative method is used which considers each vertex of the quad patch and determines how to further tessellate the patch dependent upon the value of the vertex tessellation factor of the selected vertex or dependent upon values of the vertex tessellation factors of the selected vertex and a neighbor vertex. A similar method is described for a triangle patch.
US10140760B1	Method and system for consistent identification of numbered elements in multiple layered views captured from a 3D model A method for consistent identification of numbered elements in multi-layered views captured from a 3D model may include generating a three dimensional (3D) model in a 3D model viewer displayed through a machine display through operation of a 3D modeler, configuring a feature mapper with a model feature definition to define at least one subregion of the 3D model as a model feature; mapping the model feature to a feature identifier in a mapping; generating an edge wireframe projection of a model view of the 3D model; determining visible sub-regions associated with model features in the edge wireframe projection; applying the edge wireframe projection to a background layer of a technical drawing; and rendering the feature identifier with a lead line originating from visible sub-regions on a defined feature foreground layer of the technical drawing.
US10140759B2	Three-dimensional display and data generation method Provided is a method for generating light emission data for a three-dimensional display provided with a plurality of multicolor light emitting elements arranged in three-dimensional directions, the method comprising: a modeling step for acquiring a 3D polygon model; a voxelization step for representing the 3D polygon model by a plurality of voxels and calculating position information of each of the voxels; a surface color calculation step for calculating, for the 3D polygon model, color information of a front-side surface with respect to a specific point of view and color information of a back-side surface with respect to the specific point of view; an interior color calculation step for referring to the position information and calculating, on the basis of the color information of the front-side surface and the color information of the back-side surface, color information of voxels located between the front-side surface and the back-side surface; and a mapping step for referring to the position information and mapping the color information of each of the voxels to a two-dimensional relative position to generate the light emission data.
US10140754B1	Graphical user interface system and method for modeling lighting of areas captured by location scouts Techniques described herein are directed to simulating lighting conditions of a real-world location in advance of beginning video production at the location. As described herein, captured data (e.g., captured images, captured video, and/or scanned three-dimensional data) of a candidate outdoor location may be used to generate a three dimensional model of the outdoor location. Thereafter, a simulation software application may be used to provide a graphical user interface for rendering the three dimensional model of the location under a variety of different lighting conditions. In particular implementations, the simulation software application may be used to render the location under a variety of different light conditions corresponding to different times of day.
US10140752B2	Medical image processing system, medical image processing apparatus, medical image diagnosis apparatus, and medical image processing method, related to a stereoscopic medical image process A medical image diagnosis system according to an embodiment includes a determining unit, a rendering processing unit, and an output unit. The determining unit is configured to, based on information related to a stereoscopic function of a display unit connected to an output target apparatus serving as an output target, determine a parallax image number of images that are for realizing a stereoscopic view and are to be displayed by the display unit. The rendering processing unit is configured to generate rendering images corresponding to the parallax image number, by performing a rendering process on volume data that represents three-dimensional medical images. The output unit is configured to output the rendering images corresponding to the parallax image number to the output target apparatus, as the images that are for realizing the stereoscopic view and are to be simultaneously displayed by the display unit.
US10140744B2	Specular highlights on photos of objects Systems and methods are presented for recording and viewing images of objects with specular highlights. In some embodiments, a computer-implemented method may include accessing a first plurality of images, each of the images in the first plurality of images including an object recorded from a first position, and a reflection of light on the object from a light source located at a different location than in each of the other images in the first plurality of images. The method may also include generating a first composite image of the object, the first composite image comprising a superposition of the first plurality of images, and wherein each of the images in the first plurality of images is configured to change in a degree of transparency within the first composite image and in accordance with a first input based on a degree of tilt.
US10140737B2	Dimension reducing visual representation method In a data visualization system, a method of arranging, in n dimensions, data points representing n or more variables, the method including the steps of: a data point ranking module ranking a set of data points with respect to a first axis of a visual representation using a first variable; and based on a second variable, a data point distribution module distributing the set of data points along the first axis while retaining information relating to the ranking of data points determined in step i).
US10140734B2	System and method for simulataneous image artifact reduction and tomographic reconstruction of images depicting temporal contrast dynamics Described here is a system and method for image reconstruction that can automatically and iteratively produce multiple images from one set of acquired data, in which each of these multiple images corresponds to a subset of the acquired data that is self-consistent, but inconsistent with other subsets of the acquired data. The image reconstruction includes iteratively minimizing the rank of an image matrix whose columns each correspond to a different image, and in which one column corresponds to a user-provided prior image of the subject. The rank minimization is constrained subject to a consistency condition that enforces consistency between the forward projection of each column in the image matrix and a respective subset of the acquired data that contains data that is consistent with data in the subset, but inconsistent with data not in the subset.
US10140730B2	Display control methods and apparatuses Various display control methods and apparatuses are provided. A method comprises acquiring planar mapping relationship information between an imaging plane and a display plane, and deform-displaying the display content on the display plane at least according to the planar mapping relationship information, to reduce a deformation degree of an image formed by the deformed display content on the imaging plane. A requirement for alignment precision of an imaging device required by the imaging plane is reduced to acquire an image of the display content deformed less to some extent, and users' operational convenience is increased.
US10140728B1	Encoder with image filtering and associated methods An encoder includes a processor and a memory coupled thereto. A digital image to be encoded is stored in the memory. The digital image includes an array of pixels, with each pixel having an RGB color value associated therewith. Image filtering is performed on the digital image and includes calculating an RGB Euclidean geometric distance between a current pixel and a prior pixel, comparing the calculated RGB Euclidean geometric distance to a threshold, and changing the RGB color value of the current pixel to the same RGB color value as the prior pixel when the calculated RGB Euclidean geometric distance is less than the threshold. Run length encoding is performed on the filtered digital image.
US10140726B2	Apparatus and method for estimating gazed position of person An image processing apparatus comprises: a detecting unit to detect, respectively from plural images obtained by imaging with plural imaging units a space in which plural persons exist, positions of the persons on the images; an associating unit to perform association of a same person in the plural images; a person position estimating unit to estimate positions of the persons in the space, based on the positions of the persons on the images detected from the plural images and a result of the association by the associating unit; a direction estimating unit to estimate eye directions of the persons, based on the plural images; and a distribution estimating unit to estimate a spatial distribution of positions gazed by the plural persons, based on the estimated positions of the plural persons in the space and the estimated eye directions of the plural persons.
US10140725B2	Apparatus for and method of estimating dimensions of an object associated with a code in automatic response to reading the code Dimensions of an object associated with an electro-optically readable code are estimated by aiming a handheld device at a scene containing the object supported on a base surface. A scanner on the device scans the scene over a field of view to obtain a position of a reference point of the code associated with the object, and reads the code. A dimensioning sensor on the device captures a three-dimensional (3D) point cloud of data points of the scene in automatic response to the reading of the code. A controller clusters the point cloud into data clusters, locates the reference point of the code in one of the data clusters, extracts from the point cloud the data points of the one data cluster belonging to the object, and processes the extracted data points belonging to the object to estimate the dimensions of the object.
US10140721B2	Mechanical system on computer with rotational projector and Realsense™ camera Methods and apparatus relating to a mechanical system on computer with rotational projector and RealSense™ camera are described. In an embodiment, a device includes three portions: a first portion to comprise a projector; a second portion to comprise a camera; and a third portion to comprise one or more computing system components. At least the first and second portions are rotationally engaged to allow for independent rotation of the first portion and the second portion. Other embodiments are also disclosed and claimed.
US10140717B2	Imaging apparatus and vehicle controller In order to provide an imaging apparatus which minimizes erroneous recognition of a moving body and prevent a braking operation from being erroneously performed, even if the moving body is likely to cross a road, the imaging apparatus includes a correlation value calculation unit that calculates a correlation value from two images captured by two imaging units, a three-dimensional object detection unit that detects a three-dimensional object from the two images, a region dividing unit that divides an image region including the three-dimensional object into multiple regions, a relative speed calculation unit that calculates relative speed for every region of the multiple regions, and a reliability calculation unit that calculates reliability of the three-dimensional object, based on the relative speed calculated for every region.
US10140712B2	Detection of stent struts relative to side branches In part, the disclosure relates to methods of stent strut detection relative to a side branch region using intravascular data. In one embodiment, detecting stent struts relative to jailed side branches is performed using a scan line-based peak analysis. In one embodiment, false positive determinations relating to stent struts are analyzed using a model strut.
US10140711B2	Method of analyzing vertebral edges of vertebrae in images acquired from an upright MRI system A method of analyzing a spinal region of a subject. The method includes steps of obtaining a first sagittal image of the spinal region of the subject using an upright magnetic resonance imaging unit; identifying a first vertebral edge on a first side of a first disc in the first sagittal image; identifying a second vertebral edge on a second side of the first disc in the first sagittal image; and determining a first angle between the first vertebral edge and the second vertebral edge for the first disc.
US10140708B2	Method for gestational age estimation and embryonic mutant detection A method to characterize shape variations in brain ventricles during embryonic growth in mammals, the method including extracting a brain ventricle skeleton from one or more images, calculating a volume profile for the skeleton using the extracted images, partitioning the brain ventricle based on the volume profile along the skeleton, the brain ventricle being partitioned into two lateral ventricles and a main ventricle, the main ventricle being further partitioned into three sub regions, determining volume vectors of the two lateral ventricles and the three sub regions, computing a means square error between the determined computed volume vectors and a pretrained mean volume vector of embryos during different gestational stages, and classifying the embryo to the gestational stage having the lowest mean square error. A method to characterize mutant detection in mammals, the method including acquiring one or more images, computing a volume profile directly along a path of the detected skeleton from the one or more images, aligning the volume profile against a standard profile, and evaluating the volume profile against the standard profile to detect a mutation.
US10140703B2	Systems and methods for evaluating accuracy in a patient model Systems, devices, and methods are described for providing patient anatomy models with indications of model accuracy included with the model. Accuracy is determined, for example, by analyzing gradients at tissue boundaries or by analyzing tissue surface curvature in a three-dimensional anatomy model. The determined accuracy is graphically provided to an operator along with the patient model. The overlaid accuracy indications facilitate the operator's understanding of the model, for example by showing areas of the model that may deviate from the modeled patient's actual anatomy.
US10140698B2	Polygon-based geometry classification for semiconductor mask inspection Disclosed are methods and apparatus for providing feature classification for inspection of a photolithographic mask. A design database for fabrication of a mask includes polygons that are each defined by a set of vertices. Any of the polygons that abut each other are grouped together. Any grouped polygons are healed so as to eliminate interior edges of each set of grouped polygons to obtain a polygon corresponding to a covering region of such set of grouped polygons. Geometric constraints that specify requirements for detecting a plurality of feature classes are provided and used for detecting a plurality of feature classes in the polygons of the design database. The detected features classes are used to detect defects in the mask.
US10140694B2	Image display apparatus An image display apparatus includes a display, an image receiver to receive a high dynamic range image, and a controller to set luminance information of an image to be displayed based on brightness information of the high dynamic range image and information about a luminance that is displayable on the display and to perform control to display an image having a luminance adjusted based on the set image luminance information. Accordingly, the image display apparatus is capable of converting and displaying the high dynamic range image so as to match the luminance that is displayable on the display.
US10140693B2	Motion imagery corner point sequencer A computer-implemented method for ordering vertices in an image frame within a data stream, wherein the image frame corresponds to Earth-viewing data. A point of intersection of a primary pair of lines is determined and loaded into computer memory, and interrogated as to a sign of a signed remainder with respect to each of two secondary lines defined by the pairwise ordered sets of vertices. In the case of opposite remainder sign with respect to the two secondary lines, two provisional indices are swapped to obtain a rectified index for each of the four vertices. The process is repeated with respect to the signed remainder of the intersection point of the secondary lines relative to the primary lines. The four vertices are then fit, in accordance with index ordering, into a tiling of the surface of the Earth based on the rectified index of each of the four vertices.
US10140692B2	Tire image rectifying method A method of rectifying an image representing a surface of a tire is provided. According to the method, a circumferential marking present on a tire is detected in an image of the tire. Based on the marking, and for each line of a plurality of lines of the image, a reference position on the tire is determined. For each of the lines of the image, a difference between the reference position on the line under analysis and a minimum value of the reference positions for all of the lines of the image is determined. For each of the lines of the image, pixels of the line under analysis are radially offset by a value of the difference.
US10140691B2	Correcting perspective distortion in double-page spread images A distortion correction component of a mobile device receives an image of a spread open multi-page document, determines a binding edge line of the spread open multi-page document, determines a first set of substantially vertical straight lines lying left of the binding edge line and a second set of substantially vertical straight lines lying right of the binding edge line. The distortion correction component then determines a first vanishing point based on the first set of substantially vertical straight lines and a second vanishing point based on the second set of substantially vertical straight lines. A first quadrangle is determined based on the first vanishing point and a second quadrangle is determined based on the second vanishing point. A corrected image for the first page is generated based on the first quadrangle and a corrected image for the second page is generated based on the second quadrangle.
US10140688B2	Image processing apparatus for image processing based on accurate fundamental matrix An image processing apparatus 1 includes a feature point set acquirer, a degree-of-scattering acquirer, a fundamental matrix acquirer and a processor. The feature point set acquirer acquires feature point sets, each including a plurality of feature points within an image. The degree-of-scattering acquirer acquires a degree of scattering indicating a degree of scattered distribution of the feature points. The fundamental matrix acquirer acquires a fundamental matrix, based on coordinates of the feature points p included in feature point sets acquired by the feature point set acquirer and the degree-of-scattering acquired by the degree-of-scattering acquirer, acquires a fundamental matrix indicating the epipolar geometric relationship between the image and another image in a video including the image. The processor performs image processing of the video based on the fundamental matrix acquired by the fundamental matrix acquirer.
US10140677B2	Graphics processing unit and device employing tessellation decision A graphics processing unit (GPU) for determining whether to perform tessellation on a first model according to a control of a central processing unit (CPU) is provided. The GPU reads the first model from a memory, which stores prepared models having different complexities; calculates a complexity of the first model; compares the calculated complexity with a reference complexity; and determines whether to perform a tessellation operation on the first model according to a comparison result.
US10140672B2	Apparatus and method of managing a licensable item An apparatus and method of managing a licensable item includes accessing a licensing policy related to managing a licensable item, and a license agent making a determination to act to enforce the licensing policy or to first communicate with a server before acting to enforce the licensing policy. Further, the apparatus and method include enforcing the licensing policy in accordance with the determination to act to enforce the licensing policy or to first communicate with a server before acting.
US10140666B1	System and method for targeted data gathering for tax preparation A computer-implemented method for the targeted gathering of tax data for use with tax preparation software includes a computing device presenting to the user a plurality of interview questions or statements. The computing device creates a user profile based on the responses to the interview questions or statements. The computing device identifies highly relevant tax topics based on user profile and executes a user interface manager to automatically generate interview questions or statements on said highly relevant tax topics. The user then confirms whether other tax topics apply to the user. The computing device executes a tax calculation engine of the tax preparation software configured to compute a tax liability or refund amount.
US10140664B2	Resolving similar entities from a transaction database A technique for identifying related transaction records from a database storing transaction records for multiple entities includes grouping transaction records with a common attribute value into transaction record sets, receiving a selection of an exemplar record set and determining the probability the transaction record set stores transaction records associated with a first entity. Other operations include resolving the transaction record set as storing transaction records associated with the first entity. This improves the process of identifying related transaction records because related transaction records missed by string comparisons transaction record attributes are detected.
US10140657B2	Wireless beacon connections for providing digital letters of credit on detection of a user at a location There are provided systems and methods for wireless beacon connections for providing digital letters of credit on detection of a user at a location. A payment provider may authorize use of one or more wireless beacons at a merchant location. When a user arrives at the merchant location, the user may be checked in through a communication device in possession of the user. Once checked in to the merchant location, the payment provider may determine and amount of credit to extend to the user based on the user's credit worthiness (for example, their credit rating, asset to debt ratio, etc.). The payment provider may then generate a letter of credit, which the payment provider may limit in use by time, location, etc. The payment provider may communicate the letter of credit to the user for use at the merchant location.
US10140654B2	Concepts for repair and service of a consumer device using a network connection and diagnostic test Embodiments of the present invention provide a repair or purchase program that may be associated with a common carrier. In various embodiments, one or more bids for a target item are received prior to receiving a listing for an item. After receiving the listing for the item, one or more relevant bids may be identified. Information associated with at least one of the identified bids may be provided. A user selection of one of the identified bids may be received. Completion of the transaction indicated by the user's selection may be facilitated. Associated methods, systems, and computer program products are provided.
US10140645B2	Intelligent fuel purchasing recommendations Systems and methods for providing information to aid users make fuel purchasing decisions and facilitating fuel purchases at fuel providers. A user checks-in to a vehicle with a user account. The user is provided with recommended fuel provider locations based on information such as vehicle information, user account information, traffic information, user information, traffic information, fuel provider information, etc. User checks-in to a fuel provider location based on a connection to a device at the fuel provider location. A payment provider may receive a fuel purchase request authorizing a payment from the user account and processes the payment.
US10140638B2	Providing information technology resiliency in a cloud-based services marketplace A method for providing a cloud-based service includes receiving information from a customer of the service over a conversational interface, the information identifying a requirement of the customer related to a resiliency of the service, and identifying a service provider who provides the service in a manner that satisfies the requirement. A method for building a knowledge base of cloud-based service providers includes receiving information from a service provider, the information specifying at least one resiliency attribute of the service provider, matching the information to a standardized service descriptor, wherein the service descriptor is indexed within an ontology-based organizational framework that indexes a plurality of service descriptors, and storing the service descriptor for the service provider.
US10140632B2	Providing information regarding books having scenes in locations within proximity to a mobile device Techniques are described herein that are capable of performing location-based book identification. For example, book(s) may be identified that discuss a location that is within a designated proximity to a mobile device. In accordance with this example, information regarding the book(s) may be provided for consumption by a user at the mobile device. For instance, the information may be displayed on the mobile device in response to the mobile device coming within the designated proximity to the location. The information may include an excerpt of at least one of the book(s), an indication of other location(s) that are discussed by at least one of the book(s), an offer to purchase at least one of the book(s), etc. The user may share the information through social media, interact with other readers and/or the author via a social network, etc.
US10140631B2	Image processing server An image recognition approach employs both computer generated and manual image reviews to generate image tags characterizing an image. The computer generated and manual image reviews can be performed sequentially or in parallel. The generated image tags may be provided to a requester in real-time, be used to select an advertisement, and/or be used as the basis of an internet search. In some embodiments generated image tags are used as a basis for an upgraded image review. A confidence of a computer generated image review may be used to determine whether or not to perform a manual image review.
US10140630B2	Facilitating user-generated content In one implementation, a computer-implemented method includes receiving, at a computer system, a request to solicit one or more users to generate media content for a campaign; identifying, by the computer system, a plurality of content creating users; obtaining demographic data for a plurality of content consuming users who have accessed the media content that was generated by the plurality of content creating users; determining distributions of the plurality of content consuming users across a plurality of demographic categories; selecting, by the computer system, a portion of the plurality of content creating users based on a comparison of i) the one or more parameters for the campaign and ii) the distributions of the plurality of content consuming users across the plurality of demographic categories; and providing information that identifies an opportunity to generate media content for the campaign.
US10140623B1	Detection and explanation of lifts in merchant data A service provider may receive merchant analytics information from a plurality of merchant devices. In some examples, the service provider may generate a model based at least in part on the merchant analytics information, the model including a core set of features for predicting a merchant metric associated with a merchant. The service provider may detect a lift in an observed value of the merchant metric based at least in part on a residual value of the merchant metric at a location of the lift, and add an additional feature to the model to cause a predicted value of the merchant metric to correspond to the observed value of the merchant metric at the location of the lift. The service provider may further send information associated with the feature to a merchant device associated with the merchant. As an example, the information may include a prediction for the merchant metric and/or a recommendation for improving the business of the merchant.
US10140621B2	Determining and using brand information in electronic commerce An apparatus and method for predicting a brand name of a product are disclosed herein. A product identification number for the product is converted into a normalized global trade item number (GTIN). For each of a plurality of GTIN prefixes corresponding to the normalized GTIN, brand names and counts of each of the brand names using product information stored in a product catalog are identified. A probability distribution of the brand names is determined in accordance with the brand names and the counts of the brand names for the plurality of the GTIN prefixes. A predicted brand name for the product is identified from among the brand names for the plurality of the GTIN prefixes, the predicted brand name having a highest probability score in the probability distribution of the brand names.
US10140619B2	Dynamic creative creation and delivery A method and system for generating a creative script is disclosed. Plug-ins into a third party ad creation tool interact through application program interface (API) to allow insertion of dynamic aspects into the creative script. Alternative content is defined for each dynamic aspect inserted into the creative. One or more content groups are defined that select a number of dynamic aspects and their corresponding alternative content. The different combinations of alternative content are culled to define each content group. Target attributes are selected into a target group. The creative script is served according to the combinations of alternative content. Those combinations that are deemed more acceptable are favored over time to increase efficacy of the creative script.
US10140613B2	Systems and methods for converting account portfolios from one processing network to another Methods and systems for translating account data from a converted account portfolio during a transaction initiated by a cardholder using a payment card are provided. The method may be implemented using a translation service computing device. The method includes storing first account data in a memory along with a corresponding translation identifier, the first account data associated with a first payment processing network (PPN), and receiving, at the TS computing device, an authorization request message. The authorization request message includes transaction data associated with the transaction and second account data, including the translation identifier, associated with the payment card and a second PPN. The method includes translating the second account data to the first account data by performing a lookup using the translation identifier, generating a translated authorization request message including the transaction data and the first account data, and transmitting the translated authorization request message to an issuer bank.
US10140612B1	POS system with white box encryption key sharing Systems, and associated methods, involving both a trusted and an untrusted device where sensitive data or keys are shared between those devices are disclosed. A disclosed method includes storing a key in a secure memory on a first device, receiving sensitive data via a user interface on a second device, generating a set of white box encryption instructions based on the key using a white box encryption generator on the first device, generating a complete data representation of the set of white box encryption instructions using a secure processor on the first device, transmitting the complete data representation from the first device to the second device, and encrypting the sensitive data using the complete data representation on the second device. The complete data representation is not Turing complete and is not executable with respect to the second device.
US10140611B1	Electronic device with light-generating sources to illuminate an indicium This disclosure is directed to, in part, providing a third party with access to at least some information in a user's account maintained by a host. The agent may assist a user in selecting an item, purchasing the item, customizing the item, and/or performing other actions. The agent may interact with the user during the assistance. In various embodiments, the user may provide the agent with a token that allows the agent to gain at least temporary access to at least a portion of the user's account. In some instances, the agent may purchase the item for the user using information in the user's account, such as payment information, shipping address information, and/or other information. The agent may place an item, such as a special order item in a virtual shopping cart or other location, which may be stored with the user's account.
US10140610B2	Customer token preferences interface Embodiments are directed to token management. Embodiments initiate presentation of a digital wallet management interface including initiating presentation of a digital wallet; initiating presentation of an original token associated with the digital wallet; initiating presentation of a toggle switch comprising a first position and a second position and associated with the original token and configured for graphical manipulation by the user between the first position and the second position, wherein the first position corresponds to the original token being available for use as a payment credential; and where the second position corresponds to the original token being unavailable for use as a payment credential.
US10140606B2	Direct personal mobile device user to service provider secure transaction channel Ensuring security of electronic transactions between a personal mobile device user and a service provider involves establishing trust between a user and a transaction service provider, authenticating the personal mobile device of the user, establishing a secure communication channel between the user and the service provider, and registering the user with the service provider over the secure communications channel.
US10140604B1	Point of sale device with multiple processors A point-of-sale (POS) device includes a processor, a battery, a transaction object reader, a printer with a printer controller, and optionally a temperature sensor. The processor determines a present power discharge capability rate of the battery, optionally based on a temperature measured by the temperature sensor. The processor also calculates a first estimated power draw rate based on a first setting value for at least one of the components of the POS device, such as the printer. If the first estimated power draw rate is dangerously close to the present power discharge capability rate of the battery, a second estimated power draw rate is calculated based on a second setting value for the one or more components. If the second estimated power draw rate is no longer dangerously close to the present power discharge capability rate of the battery, the components are set to the second settings value.
US10140603B2	Financial transaction processing with digital artifacts and multiple payment methods using a server A method and system for conducting an online payment transaction through a point of sale device. The method includes receiving input from a user selecting an item for purchase through the point of sale device; calculating a total purchase amount for the item in response to a request from the user to purchase the item; and sending payment authorization for the total purchase amount from the point of sale device to a payment entity, in which the payment authorization is sent to the payment entity via a mobile communication device of the user. The method further includes receiving a result of the payment authorization from the payment entity through the mobile communication device; and completing the payment transaction based on the result of the payment authorization.
US10140601B2	Portable electronic device sales, provisioning, and user care vending kiosk In some examples, portable electronic device sales, provisioning, and user care may include authenticating a user associated with a user portable electronic device. A user portable electronic device connector may be used to communicatively connect to a portable electronic device receptacle of the user portable electronic device, and transfer data and/or configurations associated with the user portable electronic device to a data storage. Options to purchase a new portable electronic device may be displayed. Selection of a new portable electronic device may be received from a display of at least one new portable electronic device, and the selected new portable electronic device may be configured by transferring, from the data storage, the data and/or the configurations associated with the user portable electronic device to the selected new portable electronic device.
US10140599B2	Methods and systems for processing electronic transactions and managing vehicle costs A computer-implemented method for performing an electronic transaction using a payment computer coupled to a database is provided. The transaction includes an item purchased in association with a vehicle and initiated by a cardholder with a merchant. The method includes receiving, at the payment computer, an authorization request message from the merchant, the authorization request message including first transaction data, wherein the first transaction data includes a vehicle identifier for identifying the vehicle, an account data associated with the cardholder, and purchase data associated with a first purchased item; transmitting an authorization response message from the payment computer to the merchant, the authorization response message including an approval of the electronic transaction by an issuer bank; storing, within the database, the first transaction data including the vehicle identifier; storing, within the database, other transaction data associated with other purchased items for the vehicle, wherein the first transaction data and the other transaction data define a total transaction data associated with the vehicle; and tracking, by the vehicle identifier, the total transaction data for access by the cardholder.
US10140598B2	Device including encrypted data for expiration date and verification value creation In order to make it more difficult to obtain numbers that can be used to conduct fraudulent transactions, a portion of a real account number is encrypted. The encrypted portion of the account number is used to generate a new account number, a new expiration date, and a new verification value. This information can be determined using processor that may reside in a point of sale terminal, a smart card, or a computer operated by a user. The new account number, the new expiration date, and the new verification value can be used in a payment transaction. A server computer in a central payment processing network may determine that the new account information is not the real account information, and may subsequently generate a modified authorization request message using the real account information and may send it to an issuer for approval. The transmission of data is more secure, since real account information is not sent from the merchant to the payment processing network.
US10140596B2	Third party authentication of an electronic transaction A first identity credential (for example, a username and password), in conjunction with a second identity credential (for example, a token identifier and a token-generated password) verified by an authentication provider, permits access to a protected resource (for example, a bank account) maintained by a service provider (for example, a bank) where the service provider is a separate entity from the authentication provider. Such separation of the service provider from the authentication provider allows multiple service providers to use the same authentication provider such that subscribers of services from multiple service providers may register a single authentication provider, and thus use a single method to produce the second identity credential. An authentication provider provides a common validation service to a plurality of unrelated service providers. An electronic user interface and a key-chain token for carrying out the authentication process are also disclosed.
US10140593B2	System, method and recording medium for doorbell control based on doorbell data and calendar data A doorbell control method, system, and non-transitory computer readable medium for a doorbell, include causing a doorbell to perform a differentiated action based on doorbell data and calendar data of an electronic calendar, and annotating the calendar with information based on an activation of the doorbell.
US10140590B2	Data approval system and method A data approval system is provided. The system comprises a transaction model comprising program code for implementing one or more computer-implemented methods for use in an approval process, the approval process comprising an approval operation; a plurality of differentiated data-handling modules adapted to provide different methods for managing data during the approval process, wherein each module comprises program code for implementing one or more computer-implemented methods; and a storage device for storing configuration parameters that are configurable for a particular approval process; wherein the data approval system is adapted to select one or more data-handling modules from the plurality of modules to manage data during the approval process based on the configuration parameters.
US10140585B2	Control systems and methods for economical optimization of an electrical system including battery degradation The present disclosure is directed to systems and methods for economically optimal control of an electrical system. Some embodiments employ generalized multivariable constrained continuous optimization techniques to determine an optimal control sequence over a future time domain in the presence of any number of costs, savings opportunities (value streams), and constraints. Some embodiments also include control methods that enable infrequent recalculation of the optimal setpoints. Some embodiments may include a battery degradation model that, working in conjunction with the economic optimizer, enables the most economical use of any type of battery. Some embodiments include techniques for load and generation learning and prediction. Some embodiments include consideration of external data, such as weather.
US10140582B2	Systems and methods of cognitive patterns knowledge generation A processor based system and method of generating cognitive pattern knowledge of a sensory input is disclosed. The method comprising the steps of receiving sensory input to create at least one concrete pattern, receiving at least one abstract pattern comprising abstract segments and vertically blending the concrete pattern with the abstract pattern by selectively projecting abstract segments to create a vertically blended pattern whereby the vertically blended pattern represents cognitive pattern knowledge of the sensory input. In some embodiments, the systems and methods further comprise creating a measure of a degree of vertical blending and when the measure of the degree of vertical blending exceeds a threshold, horizontally blending at least two abstract patterns to create a horizontally blended abstract pattern.
US10140579B2	Situational awareness and communication system A situational awareness and communication system that receives a request for situational awareness information from a requesting device associated with a requester. The situational awareness request includes a geographic area of interest and one or more of a demographic profile of interest and a topical area of interest. The system also receives real-time geographic location data reported by mobile communication devices associated with potential respondents and one or more of demographic data and topical area of interest data reported by the communication devices or obtained from social media files associated with the potential respondents located within the geographic area of interest. The system provides the situational awareness information to the requesting device including demographic statistics for potential respondents located within the geographic area of interest.
US10140578B1	System and method for managing social-based questions and answers A computer-implemented method of managing questions and answers on a computer-hosted service. The method includes a computing device receiving text based tax question and answer pairings and inputting the tax question and answer pairings into a content model executed by the device and outputting a content score for each tax question and answer pairing based on the model. The content score comprises a number within a range. One end of the range corresponds to product content and another end of the range corresponds to general tax content. The device outputs an answer quality score for the tax question and answer pairings based at least in part on the content score and votes assigned to each respective question and answer pair, wherein votes comprises up votes and down votes. The device may generate a FAQ list stored in a database based at least in part on the answer quality score.
US10140577B2	Data processing method and apparatus A non-transitory computer-readable recording medium contains an event processing control program for event processing that processes received event data in accordance with processing rules and outputs output data. The program causes a computer to execute a process that includes obtaining first assessment values pertaining to output data by the event processing for a first type of events, periodically by a first period. A correlation coefficient value of first and second received event data is periodically calculated by a second period longer than the first period. The first and second received event data are received event data of the first type and of a second type different from the first type, respectively. A second filtering condition pertaining to the second received event data is set based on the correlation coefficient value and a first filtering condition that pertains to the first received data and is specified from the assessment values.
US10140576B2	Computer-implemented system and method for detecting anomalies using sample-based rule identification A computer-implemented system and method for detecting anomalies using sample-based rule identification is provided. Data for data is maintained analytics in a database. A set of anomaly rules is defined. A rare pattern in the data is statistically identified. The identified rare pattern is labeled as at least one of anomaly and non-anomaly based on verification by a domain expert. The set of anomaly rules is adjusted based on the labeled anomaly. Other anomalies in the data are detected and classified by applying the adjusted set of anomaly rules to the data.
US10140573B2	Neural network adaptation to current computational resources Methods and apparatus are provided for processing in an artificial nervous system. According to certain aspects, resolution of one or more functions performed by processing units of a neuron model may be reduced, based at least in part on availability of computational resources or a power target or budget. The reduction in resolution may be compensated for by adjusting one or more network weights.
US10140571B2	Hierarchical scalable neuromorphic synaptronic system for synaptic and structural plasticity In one embodiment, the present invention provides a neural network circuit comprising multiple symmetric core circuits. Each symmetric core circuit comprises a first core module and a second core module. Each core module comprises a plurality of electronic neurons, a plurality of electronic axons, and an interconnection network comprising multiple electronic synapses interconnecting the axons to the neurons. Each synapse interconnects an axon to a neuron. The first core module and the second core module are logically overlayed on one another such that neurons in the first core module are proximal to axons in the second core module, and axons in the first core module are proximal to neurons in the second core module. Each neuron in each core module receives axonal firing events via interconnected axons and generates a neuronal firing event according to a neuronal activation function.
US10140568B2	RFID switch tag Various embodiments of RFID switch devices are disclosed herein. Such RFID switch devices advantageously enable manual activation/deactivation of the RF module. The RFID switch device may include a RF module with an integrated circuit adapted to ohmically connect to a substantially coplanar conductive trace pattern, as well as booster antenna for extending the operational range of the RFID device. The operational range of the RFID switch device may be extended when a region of the booster antenna overlaps a region of the conductive trace pattern on the RF module via inductive or capacitive coupling. In some embodiments, all or a portion of the booster antenna may at least partially shield the RF module when the RFID switch device is in an inactive state.
US10140567B2	Method and apparatus pertaining to radio-frequency identification tags A presently-powered RFID tag can itself determine its own relative movement with respect to a reader. This RFID tag can responsively alter its read state to thereby permit the RFID tag to respond to a subsequent read inquiry. By one approach the RFID tag assesses its own movement by monitoring the strength of its received power. By another approach, the RFID tag has a power source that becomes electrically charged via radio-frequency energy received by the tag antenna and that power source is configured to become operably discharged at a point in time that corresponds to a typical null-sensing duration of time for a given application setting for that RFID tag.
US10140565B2	Transaction card having internal magnetic stripe A transaction card is provided. The transaction card includes a card frame having a card inlay and a card housing. The transaction card also includes a magnetic stripe disposed inside the card frame between the card inlay and the card housing.
US10140561B2	Cognitive localization for enhancing appliance conditioning features A system for automated localization of information for smart appliances identifies a user of the smart appliance via a user interface. The system receives scanned input associated with an item from a scanning component. The system requests cognitive services from an appliance cognitive localization server, where the cognitive services integrates localization information with the item information. The system provides the localization information to the smart appliance, and operates the smart appliance using the localization information and the item information. The system retrieves the localization information and the item information from an item repository during a subsequent scan of the item using the scanning device.

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