| Document | Document Title |
|---|---|
| US10129562B2 |
Image processing device and method
The present technique relates to an image processing device and method for preventing increases in the processing load of image encoding and decoding. The image processing device includes: a temporal prediction control unit that controls, in a prediction of a motion vector, whether a temporal prediction is to be performed to predict the motion vector by using the motion vector of a neighbor region temporally adjacent to the current region being processed; and a motion vector encoding unit that predicts the motion vector of the current region by performing only a spatial prediction to predict the motion vector from the motion vector of a neighbor region spatially adjacent to the current region or performing both the spatial prediction and the temporal prediction under the control of the temporal prediction control unit, and encodes the motion vector of the current region by using the predicted value. |
| US10129561B2 |
Video encoding method, video encoding apparatus, video decoding method, video decoding apparatus, and video encoding/decoding apparatus
Various embodiments for deriving a motion vector predictor for a current block are provided. At least one first candidate of a predictor of the motion vector for the current block is derived from a first motion vector of a first block that is adjacent to the current block in the current picture. At least one second candidate of the predictor is derived from a second motion vector of a second block that is included in a picture that is different from the current picture when a number of the first candidate is less than a maximum number. A zero motion vector is added as a third candidate of the predictor when a sum of the numbers of the first candidate and the second candidate is less than the maximum number. The third candidate is added until a total number of candidates is equal to the maximum number. |
| US10129555B2 |
Decoding a picture based on a reference picture set on an electronic device
A method for decoding a picture on an electronic device is described. The method includes obtaining a bitstream. The method also includes obtaining a current picture. The method further includes obtaining a relative reference picture set (RPS) parameter. The method additionally includes initializing an index value. Furthermore, the method includes processing another RPS parameter based on the index value. The method also includes decoding the current picture. |
| US10129552B2 |
Method and system for rate control during video transcoding
A local system encodes previously decoded video data using a transcoding quantization value based on a source quantization value provided by a previous encoder as part of the retrieved video data. The transcoding quantization value can be determined additionally based the fullness of the video buffer of a target system, where a measure of the fullness can be obtained directly from the target system or modeled by the local system. The video data is encoded by the local system and then provided to a target system for decoding and subsequent display and/or storage. |
| US10129549B2 |
Coding of significance maps and transform coefficient blocks
A higher coding efficiency for coding a significance map indicating positions of significant transform coefficients within a transform coefficient block is achieved by the scan order by which the sequentially extracted syntax elements indicating, for associated positions within the transform coefficient block, as to whether at the respective position a significant or insignificant transform coefficient is situated, are sequentially associated to the positions of the transform coefficient block, among the positions of the transform coefficient block depends on the positions of the significant transform coefficients indicated by previously associated syntax elements. Alternatively, the first-type elements may be context-adaptively entropy decoded using contexts which are individually selected for each of the syntax elements dependent on a number of significant transform coefficients in a neighborhood of the respective syntax element, indicated as being significant by any of the preceding syntax elements. |
| US10129547B2 |
Image processing apparatus
In order to obtain an image processing apparatus whose object is to realize edge detection with utilizing motion vectors calculated during image encoding, included are: a motion vector processing part to calculate, for each macroblock, information concerning a motion between frames, from motion vectors included in an encoded image signal; a motion vector filter to let through motion vectors each having a predetermined piece of information out of the calculated information; a frame counter to output a count end signal when a counted number of frames of the encoded image signal received by the motion vector processing part reaches a predetermined number of frames; a frequency counter to integrate a frequency of the motion vectors let through the motion vector filter over the predetermined number of frames for each macroblock; and an edge determiner to determine, upon reception of the count end signal, whether or not the frequency integrated by the frequency counter for each macroblock exceeds a threshold, and if the integrated frequency exceeds the threshold, judge a macroblock concerned as being an edge. |
| US10129546B2 |
Context adaptive binary arithmetic coding (CABAC) with scalable throughput and coding efficiency
A method for encoding a video sequence is provided that includes entropy encoding syntax elements representative of transform coefficients generated as the video sequence is processed, wherein entropy encoding syntax elements representative of a transform coefficient includes binarizing the syntax elements representative of the transform coefficient to generate a plurality of binary symbols (bins), coding a portion of the plurality of bins in context coding mode, and coding a remaining portion of the plurality of bins in bypass coding mode. The method further includes reducing the number of bins that are coded in context coding mode for each transform coefficient in a plurality of subsequent transform coefficients that are entropy encoded after a specified number of transform coefficients have been entropy encoded. |
| US10129545B2 |
Image processing apparatus and method
An image processing apparatus and a method for improving the coding efficiency for a quantization parameter are provided. The method includes steps of setting a predicted quantization parameter for a current coding unit by using multiple quantization parameters which are set for multiple surrounding coding units located around the current coding unit which is target of coding processing, and setting a difference quantization parameter indicating a difference value between the quantization parameter which is set for the current coding unit and the predicted quantization parameter. |
| US10129540B2 |
Reduced complexity coefficient transmission for adaptive loop filtering (ALF) in video coding
A method for adaptive loop filtering is provided that includes determining a coefficient value for each coefficient position of an adaptive loop filter, applying the adaptive loop filter to at least a portion of a reconstructed picture using the coefficient values, and entropy encoding coefficient values into a compressed bit stream using predetermined short binary codes, wherein the short binary code used depends on the coefficient position of the coefficient value. |
| US10129537B2 |
Autostereoscopic 3D display apparatus
An autostereoscopic three-dimensional (3D) display apparatus is provided. The autostereoscopic 3D display apparatus includes an image display unit configured to display a 3D image including a 3D virtual object or a 3D image including a 3D virtual object and text; and an optical unit configured to reflect or transmit the displayed 3D image from the image display unit toward a viewer, transmit an image of a real object facing the viewer, and display a combination of the 3D image and the image of the real object to the viewer. |
| US10129533B2 |
High quality and moire-free 3D stereoscopic image rendering system using a lenticular lens
A three dimensional (3D) stereoscopic image rendering system uses a lenticular lens sheet with a light diffusing multi-layer, which may include an adhesive layer, formed on the external surface of its lower base. The microstructural constitution of the light diffusing multi-layer suppresses moiré patterns typically affecting the 3D images. When longitudinally directed stray light rays are internally reflected from the interior surfaces of each lenticular lens in the sheet and impinge on the light diffusing multi-layer contacting the lower base, the stray light rays are scattered diffusely into various directions, thereby significantly reducing the intensity of the moiré pattern and its effect on the image. In addition, certain related problems, such as crosstalk between left and right directed images are also reduced. As a result, the viewer perceives a high quality, moiré free, stereoscopic 3D image. |
| US10129528B2 |
Control arrangement and method for controlling a position of a transfer device of a harvesting machine
An adjustable transfer device for unloading processed crop onto a container of a transport vehicle including a control arrangement with an electronic control unit, among other integrated components. Electronic control unit calculates position of expected point of incidence of crop flow on the container. Further provided is a system that identifies and tracks a target object in image data, which is then used to determine the trajectory of the target. With the trajectory known, the control arrangement can accurately direct the crop flow into the container. |
| US10129522B2 |
Processing device for the generation of 3D content versions and associated device for obtaining content
A device is intended to process three-dimensional content for a server. The three-dimensional content comprises at least two image sequences obtained from different angles, wherein a three-dimensional rendering is associated to a level of disparity between said at least two image sequences. This processing device is configured to generate from a content at least two different content versions corresponding to different levels of disparity adapted to different transmission bit rates, wherein the disparity level decreases with said transmission bit rate. A server comprising the processing device, a three-dimensional content-obtaining device, and a content receiver comprising three-dimensional content-obtaining device are further disclosed. |
| US10129520B2 |
Apparatus and method for a dynamic “region of interest” in a display system
A method and apparatus of displaying a magnified image comprising obtaining an image of a scene using a camera with greater resolution than the display, and capturing the image in the native resolution of the display by either grouping pixels together, or by capturing a smaller region of interest whose pixel resolution matches that of the display. The invention also relates to a method whereby the location of the captured region of interest may be determined by external inputs such as the location of a person's gaze in the displayed unmagnified image, or coordinates from a computer mouse. The invention further relates to a method whereby a modified image can be superimposed on an unmodified image, in order to maintain the peripheral information or context from which the modified region of interest has been captured. |
| US10129517B2 |
Full-color freespace volumetric display with occlusion
A system includes a particle configured for emitting light in response to stimulation by a light beam, a first light source configured for generating a first light beam that traps the particle in a potential well created by the light beam in air, and a second light source configured for generating a second light beam that stimulates the particle to emit emission light. |
| US10129514B2 |
Systems and methods for generating a digital image
A system, method, and computer program product for generating a digital image is disclosed. In use, a first image set is captured by a first image sensor, the first image set including two or more first source images and a plurality of chrominance values, and a second image set is captured by a second image sensor, the second image set including two or more second source images and a plurality of luminance values. Next, a first image of the first source images and a second image of the first source images are combined to form a first pair of source images, and a first image of the second source images and a second image of the second source images are combined to form a second pair of source images. Additionally, a first resulting image by is generated combining the first pair of source images with the second pair of source images. Additional systems, methods, and computer program products are also presented. |
| US10129513B2 |
Color metadata for a downlink data channel
The present invention provides a method and system for determining and providing color metadata for a downlink data channel. In accordance with the present invention color metadata is determined such that gamut mapping is defined by a transmitted source gamut which enables adapted mapping that preserves saturation and contrast levels of the source for a downlink data channel. The metadata is then provided to a downlink data channel for color management. |
| US10129511B2 |
Image processing apparatus, image projection apparatus, and image processing method
An image processing apparatus includes an input image color space conversion unit that converts an input image signal of each frame of a moving image signal into a luminance image signal and a color difference image signal, a luminance image correction unit that adjusts a histogram equalization correction intensity of a histogram equalization process for each frame and applies the histogram equalization process to the luminance image signal of each frame to generate a luminance-corrected image signal, a color difference image correction unit that applies a saturation enhancement process to the color difference image signal of each frame, in parallel with the histogram equalization process, to generate a color-difference-corrected image signal, and an output image color space conversion unit that converts the luminance-corrected image signal and the color-difference-corrected image signal into an output image signal in the same format as the input image signal. |
| US10129509B2 |
Imaging apparatus and imaging method
An imaging apparatus and method for multi-spectral imaging is described. The imaging apparatus includes an imaging element that takes an image of a subject, a multi-spectral filter that has a plurality of spectral filters dispersing incident light on the imaging element by predetermined wavelength regions, and a drive unit that drives the multi-spectral filter without stopping the individual spectral filters and continuously switches the spectral filters to cover an opening in the imaging element. The imaging apparatus detects whether a boundary between adjacent ones of the plurality of spectral filters included in the multi-spectral filter is in a position to block the opening in the imaging element, and performs signal processing for invalidating an image output from the imaging element in a period in which it is detected that the boundary between the spectral filters is in the position to block the opening in the imaging element. |
| US10129507B2 |
System and method for self-checkout using product images
A network of cameras is disposed throughout a store, such as a grocery store, for example. The cameras are positioned so as to monitor the products available in the store, as well as the entrances and exits to and from the store. Customers are identified as they enter the store, and their movements throughout the store are tracked. The cameras capture images of the products selected by the customer and then send those images to a computer server. The server identifies each product selected by the customer, maintains a total price for all products selected by the customer, and automatically debits the customer's account for the total price upon detecting the customer leaving the store. |
| US10129505B2 |
Method and system for providing a visual indication that a video relay service call originates from an inmate at a corrections facility
Embodiments of the present invention are directed to a method and system for providing a visual indication that a video relay service (VRS) call originates from an inmate at a corrections facility, in which the method includes initiating a video relay service (VRS) call from a corrections facility between a called party and an inmate incarcerated at the corrections facility; and displaying a visual indication on a VRS client used by the called party for a predetermined time period, the visual indication indicating that the VRS call is originating from a corrections facility. |
| US10129501B2 |
Image processing device, image processing method, and program
The present disclosure relates to an image processing device, an image processing method, and a program capable of increasing the utility of processing for reducing discontinuity in display of image frames acquired through imaging at different imaging rates.From image frames including normally imaged frames imaged at a normal imaging rate, and high-rate imaged frames imaged at a rate higher than the normal imaging rate, determination is made on image frames imaged at at least one of the imaging rates to be image frames for which a displaying rate is to be changed. The displaying rate of the image frames determined to be the image frames for which the displaying rate is to be changed is adjusted within a predetermined range from a timing when the imaging rate is switched. The present technology is applicable to an image processing device configured to perform image processing on image frames, for example. |
| US10129499B1 |
Securing wireless network credentials without a user login
Disclosed is a system and method for securely storing a Wi-Fi password or similar WLAN security credentials on a device, such as a camera. The password is secured by encryption using an encryption key generated from the Service Set Identifier (SSID) of the network. A one-way-hash of the SSID is stored in a non-volatile memory of the device, but the plaintext SSID is not stored on the device. At a later time, the device may detect the SSID of the network and hash the detected SSID. If the hash matches a previously stored hash, an encryption key is generated from the SSID and the encryption key is used to decrypt the password associated with the matching hash. Without knowledge of the SSID, an attacker who gains access to the device will not be able to recover the password from the hashed SSID and the encrypted password. |
| US10129498B2 |
Methods for transmitting audio and video signals and transmission system thereof
Transmitting audio and video signals, can include: detecting if the state of a video control signal has changed, where a video signal includes the video control signal and a video data signal; generating, if the state of the video control signal has not changed, a first serial data packet based on the video signal and an audio signal; generating, if the state of the video control signal has changed, a second serial data packet based on the video signal and the audio signal; transmitting over a serial link, an encoded data frame formed by encoding the first and second serial data packets in a predetermined encoding manner; decoding and de-serializing the encoded data frame to restore the video signal and the audio signal; and outputting the video signal to a video display circuit, and outputting the audio signal to an audio processor respectively. |
| US10129497B2 |
Semiconductor image sensor module and method of manufacturing the same
A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array. |
| US10129495B2 |
Apparatus and method for generating local binary patterns (LBPS)
Techniques for direct local binary pattern (LBP) generation are presented. An image sensor for LBP generation includes a variable reference signal generator and a sensor pixel array that can generate events based on optical signals on the sensor pixel array and a reference level from the variable reference signal generator. The image sensor also includes an address encoder that can encode the addresses of the sensor pixels that generate events, and a binary image generator that can create a binary image based on the addresses of the sensor pixels that generate the events at the reference level. The image sensor may also include a local binary pattern generator configured to determine local binary pattern labels for image pixels whose binary value changes from a first binary image at a first reference level to a subsequent second binary image at a next reference level. |
| US10129493B2 |
Radiation imaging apparatus and control method of the same
A radiation imaging apparatus, comprising a sensor array, a readout unit, for reading out image data from the sensor array, which includes a first mode of reading out image data in a first period and a second mode of reading out image data in a second period shorter than the first period, a holding unit and a controlling unit, wherein, after irradiation to the sensor array is complete, the controlling unit performs first control which causes the holding unit to hold image data read out in the second mode while the sensor array is not irradiated, as offset data for the second mode, and then, performs second control which causes the holding unit to hold image data read out in the first mode while the sensor array is not irradiated, as offset data for the first mode. |
| US10129491B2 |
Active real-time characterization system using fiber optic-based transmission media
A system for providing active real-time characterization of an article under test is disclosed. An infrared light source, a first visible light source and a second visible light source each outputs and directs a beam of coherent light at a particular area on the article under test via respective optical fibers. A visible light camera and a visible light second harmonic generation camera, an infrared camera and an infrared second harmonic generation camera, a sum-frequency camera and a third-order camera are each configured to receive a respective return beam of light from the particular area on the article under test via respective optical fibers. A processor receives signals from the cameras and calculates in real time respective spectroscopic signals and compares each calculated signal with each other calculated signal and with a predetermined baseline signal to ensure that the article under test conforms to an expected value. |
| US10129490B2 |
Systems and approaches for thermal image corrections
A thermal imaging system includes a thermal imaging sensor configured to capture thermal images of assets in an environment, a non-thermal imaging sensor coupled to the thermal sensor and being configured to capture non-thermal images of the assets, an image alignment system, an image correction system, and a controller configured to control operation of the thermal and non-thermal imaging sensors, the image alignment system, and the image correction system. The controller is configured to determine, using the image correction system, that data representative of a reflective surface is present in a present thermal view of a particular asset, cause the thermal and non-thermal imaging sensors to capture pose-corrected images, generate pose corrected thermal and non-thermal images, with at least one having corrected thermal data corresponding to a location of the reflective surface, and associate the corrected thermal data with the at least one reflective surface. |
| US10129487B2 |
Conversion gain modulation using charge sharing pixel
An image sensor including an array of pixel elements is operated according to two operation modes to modulate the conversion gain of the pixel to operate the image sensor based on the impinging light conditions. More specifically, an image sensor pixel element is operated in a high conversion gain mode for low light conditions and in a low conversion gain mode for bright light conditions. The low conversion gain mode implements charge sharing between the floating diffusion and the photodiode. The low conversion gain mode further implements partial reset where the photodiode and the floating diffusion are reset to the same potential and to a potential slightly less than the pinning voltage of the photodiode. |
| US10129486B2 |
Image capturing apparatus, control method therefor, and storage medium
An image capturing apparatus includes an image capturing unit; a division photometry unit that detects a brightness of an object in each of a plurality of divided areas; a weighting unit that weights a photometric value of each of the divided areas; an exposure determination unit that determines exposure based on weighting; and a control unit that performs control such that a degree of reflection of the condition of the object on weighting is different between a case where object image capture is performed intermittently by the image capturing unit in order to generate a time-lapse movie, and a case where object image capture is performed by the image capturing unit in order to generate a movie whose ratio of playback time to image capture time is larger than the time-lapse movie. |
| US10129484B2 |
Optical filter opacity control for reducing temporal aliasing in motion picture capture
The present invention comprises a system for and method of frequency prefiltering comprising a camera shutter capable of continuously variable illumination during a single exposure of the sensor. The shutter comprises a continuously variable exposure effector which in disposed in an image path, either in front of a lens or between a lens and a sensor. The system for frequency prefiltering further comprises a synchronization cable that synchronizes a drive system with a sensor or with film. The shutter further comprises a postfilter. The postfilter comprises a digital finite impulse response convolutional filter. |
| US10129479B2 |
Photographing apparatus and photographing method with optical low-pass filter effect
In a photographing apparatus, a low-pass selector controller (processor) is configured to perform a plurality of photographing operations including an LPF-ON photographing operation, which obtains an image signal from an image sensor in a state where the image sensor has been LPF driven by the image-shake correction device (driver) and obtains an optical low-pass filter effect, and an LPF-OFF photographing operation, which obtains an image signal from the image sensor in a state where the image sensor has not been LPF driven by the image-shake correction device (driver) and does not obtain an optical low-pass filter effect. |
| US10129478B2 |
System and method for supporting smooth target following
A method for supporting target tracking includes acquiring a target from one or more images captured by an imaging device carried by a movable object, obtaining a relative distance between the movable object and the target, and generating one or more control signals based on the relative distance to direct the movable object to track the target. |
| US10129477B2 |
Smart image sensor having integrated memory and processor
An apparatus is described. The apparatus includes a smart image sensor having a memory and a processor that are locally integrated with an image sensor. The memory is to store first program code to be executed by the processor. The memory is coupled to the image sensor and the processor. The memory is to store second program code to be executed by the processor. The first program code is to cause the smart image sensor to perform an analysis on one or more images captured by the image sensor. The analysis identifies a region of interest within the one or more images with machine learning from previously captured images. The second program code is to cause the smart image sensor to change an image sensing and/or optical parameter in response to the analysis of the one or more images performed by the execution of the first program code. Alternatively or in combination, the memory is to store third program code to be executed by the processor and fourth program code to be executed by the processor. The third program code is to store multiple images captured by the image sensor in the memory. The fourth program code is to merge the multiple images in the memory. |
| US10129476B1 |
Subject stabilisation based on the precisely detected face position in the visual input and computer systems and computer-implemented methods for implementing thereof
In some embodiments, the present invention provides for an exemplary computer system that may include: a camera component configured to acquire a visual content, wherein the visual content having a plurality of frames with a visual representation of a face of a person; a processor configured to: apply, for each frame, a multi-dimensional face detection regressor for fitting at least one meta-parameter to detect or to track a plurality of multi-dimensional landmarks representative of a face; apply a face movement detection algorithm to identify each displacement of each respective multi-dimensional landmark between frames; and apply a face movement compensation algorithm to generate a face movement compensated output that stabilizes the visual representation of the face. |
| US10129473B2 |
Video recording apparatus, control method therefor, and storage medium storing control program therefor
A video recording apparatus that is capable of reducing generation of error in a time code due to an auto-power-off function. A setting unit sets a count method by which a time code given to a video image is counted by selecting from among a plurality of count methods including a free run mode in which the time code is counted regardless of whether a video image is recording. A control unit controls so as to perform auto power off to turn off power when a predetermined condition, which includes a condition where there is no user's operation within a predetermined period, is satisfied in a mode other than the free run mode. The control unit controls so as not to turn off the power even when the predetermined condition is satisfied in the free run mode. |
| US10129466B2 |
Image generating apparatus, image generating method, and image generating program
An image generating apparatus includes: an input unit that inputs data on a defocused image group; a storage unit that stores data on a plurality of filters generated based on a three-dimensional blur function; and a computing unit that generates a new image by applying the filter to the defocused image group. When a first element of a first filter out of the plurality of filters is symmetrical or anti-symmetrical with a second element included in the first filter or a second filter, which is different from the first filter, the storage unit does not store the data on the first element, and the computing unit generates the data on the first element of the first filter based on data on the second element which is stored in the storage unit when the first filter is used. |
| US10129465B2 |
Building night vision and other driver assistance systems (DAS) using near infra-red (NIR) illumination and a rolling shutter
A system mountable in a motor vehicle. The system includes a camera and a processor configured to receive image data from the camera. The camera includes a rolling shutter configured to capture the image data during a frame period and to scan and to read the image data into multiple image frames. A near infra-red illuminator may be configured to provide a near infra-red illumination cone in the field of view of the camera. The near infra-red illumination oscillates with an illumination period. A synchronization mechanism may be configured to synchronize the illumination period to the frame period of the rolling shutter. The frame period may be selected so that the synchronization mechanism provides a spatial profile of the near infra-red illumination cone which may be substantially aligned vertically to a specific region, e.g. near the center of the image frame. |
| US10129462B2 |
Camera augmented reality based activity history tracking
Augmented reality can be used to display previously captured images on a viewfinder of a camera as the camera's active position nears a position from which the picture was originally taken. A histogram file may associate the original image with positional information of the camera when the image was captured. When the cameras active position nears those coordinates, a transparent version of the digital image is displayed on the viewfinder of the camera. The positional information may include a spatial location of the camera (e.g., GPS coordinates, etc.) as well as an orientation of the camera (e.g., yaw, pitch, roll, etc.). Augmented reality can be used to guide the user to configure/re-configure the camera in order to correct (or avoid) an image quality issue/defect when re-taking a picture. |
| US10129460B2 |
System for producing compliant facial images for selected identification documents
A method of recoding a photograph for use in a personal photo identification document such as a passport includes using a digital image capture system, including a digital camera, a computer processor, and memory to store specifications and requirements for a photo print in order to be compliant for use in a user selected photo ID such as a passport for a selected country or jurisdiction, using the digital image capture system to capture a facial image, using facial image processing techniques to provide automatic detection of a face and facial feature points on the facial image, processing the facial image and generating a visual indication of compliance, and when compliant, generating the photograph based on the compliant facial image. |
| US10129451B2 |
Camera module, molded circuit board assembly, molded photosensitive assembly and manufacturing method thereof
A camera module, a molded circuit board assembly, a molded photosensitive assembly and manufacturing method thereof are disclosed. The camera module includes a molded base which is integrally formed with a circuit board through a molding process, wherein a photosensitive element may be electrically connected on the circuit board and at least a portion of a non-photosensitive area portion of the photosensitive element is also connected by the molded base through the molding process. A light window is formed in a central portion of the molded base to provide a light path for the photosensitive element, wherein a cross section of the light window is configured to have a trapezoidal or multi-step trapezoidal shape which has a size increasing from bottom to top to facilitate demolding and avoiding stray lights. |
| US10129449B2 |
Flash band, determination device for detecting flash band, method of controlling the same, storage medium, and image pickup apparatus
A flash band determination device capable of always detecting a flash band with high accuracy, and correcting the detected flash band. It is determined whether or not there is a high-luminance area in an image, which is an area having a luminance level exceeding a predetermined luminance level. When determining whether or not a flash band which is an area having a luminance level higher than a predetermined threshold level is present in a difference image which is a difference between two images which are continuously obtained, if it is determined that the high-luminance area is present, whether or not the flash band is present is determined, by excluding an area corresponding to the high-luminance area, as a determination excluded area, from the difference image. |
| US10129447B2 |
Mass digitization system
A mass digitization system may include a work surface rotatably coupled to a support structure, and a motor coupled to the work surface to selectively rotate the work surface. An imaging station may be positioned proximate the work surface to capture digital images of items on a receiving surface of the work surface. The motor may rotate the work surface and the imaging station may include an imaging device to capture images of items on the receiving surface as the items are positioned in the image capture area of the imaging device. |
| US10129445B2 |
Roof mounted imager module
A roof mounted module for a vehicle includes a base plate configured to be operably coupled with a vehicle roof. An outer housing operably coupled with the base plate. An inner housing proximate the outer housing, including an imager sealing portion defining a sealing plane. The inner housing defines an inner cavity. An imager module is disposed in the cavity and is in communication with a viewing aperture defined through the outer housing. An imager mounting feature is disposed between the imager module and the inner housing. The imager mounting feature applies a force acting in a direction normal to the sealing plane. |
| US10129444B2 |
Solid-state imaging element and camera system
A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line. |
| US10129441B2 |
Image forming apparatus for forming test pattern on sheet using coloring material of plurality of colors
The image forming apparatus includes: a measuring unit configured to measure reflected light from a test sheet, the measuring unit including a first sensor and a second sensor, a generation unit configured to generate information regarding a color of a plurality of measurement images based on a measurement result by the measuring unit; and a detection unit configured to detect a sensor that has output an abnormal measurement result in the measuring unit, based on the measurement result. The detection unit is further configured to detect a sensor that has output the abnormal measurement result, based on measurement results obtained by the measuring unit regarding reflected light from a predetermined region of the test sheet. The predetermined region corresponds to a region on which the plurality of measurement images are not formed. |
| US10129439B2 |
Dynamically colour adjusted visual overlays for augmented reality systems
A number of illustrative variations may include a method of producing augmented reality experience. |
| US10129438B2 |
Color conversion apparatus, non-transitory recording medium storing color conversion program and color conversion method
A color conversion apparatus includes a hardware processor that obtains a scanner profile created on the basis of measured RGB values and corresponding measured colorimetric values of patches in a first color chart, and creates a table including correction amounts of RGB values, each according to the level of flare estimated for a patch and each associated with an RGB-value difference and a patch-size difference, on the basis of RGB values of patches in the first color chart and RGB values of patches in a specific chart. The specific chart is created by using a part of the patches in the first color chart with the RGB value or patch size being changed. The hardware processor further corrects measured RGB values of patches in a second color chart with the table, and convers the corrected RGB values into colorimetric values with the scanner profile. |
| US10129437B2 |
Image processing apparatus, image processing method, recording medium, and program
An image processing apparatus includes a color separation unit separating image data into a luminance component and a color component; a processing unit generating second image data of the luminance component by manipulating pixel values of multi-resolution image data generated from first image data of the luminance component and reconstructing the manipulated multi-resolution image data; and a composition unit compositing the second image data of the luminance component with image data of the color component. Further, the processing unit generates the second image data of the luminance component based on pixel values which are adjusted by using parameters in accordance with pixel values of the image data of the color component. |
| US10129436B2 |
Image forming system and image forming method
A image forming system of the present inventation includes a control section that causes a pattern image for image density control to be formed on an image carrier, and performs density correction control for correcting a density of a formed image on the basis of density information on the formed pattern image for image density control, wherein the control section determines a timing for performing the density correction control, on the basis of information corresponding to a density difference generated between images formed by the plurality of image forming apparatuses. |
| US10129433B2 |
Charge determining information processing apparatus, charge processing method, and computer-readable recording medium
An information processing apparatus includes a provider identification information acquiring unit that acquires a piece of provider identification information for each of a plurality of devices that cooperatively execute a plurality of functions, based on device identification information of the device, the piece of provider identification information allowing identification of whether a provider of the device is a predetermined provider as a provider of a cooperating function; a determining unit that determines whether a non predetermined-provider device provided by a provider other than the predetermined provider exists among the devices based on pieces of the provider identification information; a charge processing unit that performs charge processing to profit the predetermined provider when the non predetermined-provider device exists; and a cooperation controlling unit that controls the devices to cooperatively execute the functions based on the cooperating function. |
| US10129430B2 |
Information processing apparatus and data arrangement method for creating an electronic watermark
An information processing apparatus is for arranging at least one dot, which expresses information relating to image data, in the image data. The information processing apparatus includes processing circuitry configured to create an edge image of the image data; determine a position near an edge in the edge image to be a position of the at least one dot; and arrange the at least one dot at the determined position in the image data. |
| US10129428B2 |
System, image forming device, and information processing method
A system includes: a server and at least one device. The server includes a control unit configured to transmit Web content data including display information indicating at least one application that is able to be used by a device and at least one application command to cause the device to perform processing related to the at least one application. The device includes: a Web browser including: a display control unit configured to perform control for displaying a screen based on the Web content data on a display unit; and an execution unit configured to request execution of an application command included in the Web content data in accordance with an operation performed by a user via the screen; and a processing execution unit configured to, based on a request from the Web browser, perform processing related to an application corresponding to the request. |
| US10129422B2 |
Image reader and image forming apparatus
An image reader includes: a reading section reading a document; a document conveyance section being supported in an openable and closable manner with respect to the reading section; foamed synthetic resin members being supported on a lower surface of the document conveyance section; a document pressing plate being fitted to the document conveyance section with the foamed synthetic resin members in between; and height regulation sections being formed at the document conveyance section and being pressed by second platen glass with the document pressing plate in between, wherein the height regulation sections are located at positions overlapping with a region of the second platen glass when the document conveyance section is in a closed state. |
| US10129421B2 |
System and method for remote device interface customization
A system and method for generating customized user interface on a multifunction peripheral. The multifunction peripheral has an intelligent controller with a processor and memory, and a document processing engine with functional subsystems subject to software control by the intelligent controller. The intelligent controller functions as a webserver operating through a network interface. A variety of device control applications are stored with each applications configured to engage a corresponding subset of the functional subsystems. Image files generate an interface image corresponding to a device control application on a touchscreen multifunction peripheral interface. The webserver receives selection data corresponding to at least one selected device control application from an associated web client and outputs a web page displaying image files corresponding to each selected device control application image to the web client via the network interface generating a preview image of a customized user interface. |
| US10129420B2 |
Image processing apparatus, control method, and storage medium thereof
A print data storage apparatus generates preview images for several pages in advance. A print output apparatus displays an outline of print data using the preview images to prompt a user to select print data. When the user requests further information of the print data, the print output apparatus obtains print data from the print data storage apparatus and further generates a preview image. |
| US10129416B1 |
Image processing apparatus, control method for image processing apparatus, and recording medium
An image processing apparatus is configured to accept an operation instruction from an operation unit of the image processing apparatus and, via a network, an operation instruction from an information processing apparatus. A restriction is set on change in a setting of the image processing apparatus. Whether to permit cancellation of the restriction setting is set. A control is made in such a way that the cancellation of the restriction setting is permitted in a case where the cancellation of the restriction setting is set to be permitted. A control is made in such a way that the cancellation of the restriction setting is not permitted in a case where the cancellation of the restriction setting is set not to be permitted. An instruction from the information processing apparatus is accepted to cancel the restriction setting regardless of the setting of whether to permit the cancellation of the restriction setting. |
| US10129415B2 |
Image reading apparatus, image forming apparatus, image reading method, and storage medium
Provided is an image reading apparatus including a line sensor including three line sensors arranged at a predetermined interval in a sub-scanning direction, and being configured to read an image of an original by the respective line sensors, which includes light receiving elements arranged in a first direction, to generate read data representing the read image, the three line sensors each including a first light receiving element configured to receive red light, a second light receiving element configured to receive blue light, and a third light receiving element configured to receive green light, which are arranged in a main scanning direction; and a reading control board. The reading control board is configured to generate a first combined flag obtained by combining results of detecting abnormal images of respective colors and a second combined flag obtained by combining results of detecting abnormal images of the respective colors. |
| US10129411B1 |
System and method of enhancing a mobile device upgrade offer
In an embodiment, a system comprises an application that is configured to identify features of a current mobile service plan associated with a current mobile device, wherein the features of the current mobile service plan comprises at least an amount of time remaining on a current mobile service plan contract, identify different mobile devices, wherein identifying the different mobile devices comprises identifying a retail price for each of the different mobile devices generate an available price for each of the different mobile devices based on at least the features of the current mobile service plan associated with the current mobile device and the retail price for each of the different mobile devices, and to provide the generated available price for each of the different mobile devices to a user associated with the current mobile device. |
| US10129409B2 |
Joint acoustic echo control and adaptive array processing
A system and method for joint acoustic echo control and adaptive array processing, comprising the decomposition of a captured sound field into N sub-sound fields, applying linear echo cancellation to each sub-sound field, selecting L sub-sound fields from the N sub-sound fields, performing L channel adaptive array processing utilizing the L selected sub-sound fields, and applying non-linear audio echo cancellation. |
| US10129405B2 |
Systems and methods for optimal scheduling of resources in a contact center
Managing resources in a contact center including assigning each resource to one of a first set of resources each comprising a proficiency level above a first threshold for a first resource attribute, or a second set of resources each comprising a proficiency level below the first threshold for the first resource attribute and a proficiency level above a second threshold for a second resource attribute. An expected number of contacts requiring resources possessing one of the first or second resource attribute is predicted for a time period, and a correlation between the first and second resource attribute is identified. Based on the correlation, a minimum number of resources from each set required to handle the expected number of contacts at a predetermined service level for the time period is forecasted. The minimum number of resources from the first set is less than a number of resources required without the correlation. |
| US10129404B2 |
Systems and methods for managing multi-tenant callback services
Systems and methods for managing multi-tenant callback services may be provided via a multi-tenant services integration platform. Several multi-tenant software as a service applications may be offered as a hosted software solution via the multi-tenant services integration platform. Various applications may deploy and support a shared tenant and shared services environment where there can be many different customers (companies and users) running in their own virtual partition from a single application instance. The applications may be multi-tenant aware and integrated into an administration portal which integrates several shared tenant services. The tenant model may allow for customized application configurations to be run from a single application instance. Further, improved methods for providing callback management, calculating estimated wait times and providing for callback initiation may be integrated in such multi-tenant services. |
| US10129399B1 |
Systems and methods for automated call-handling and processing
Methods, systems, and computer-readable media consistent with the present disclosure manage multiple telephone calls by managing a session record associated with the call, amending the session record according to a plurality of rules to reflect a plurality of instructed actions, evaluating an amended session record to derive at least one of the plurality of instructed actions, and implementing a derived instructed action on the call under the control of an automated apparatus. |
| US10129398B1 |
System, method, and computer-readable medium for abbreviated-code dialing in a network system
A system, method, and computer readable medium for abbreviated dialing in a femtocell network is provided. A user having authorized access to the femtocell network may dial another authorized user using an abbreviated code. On receipt of the call request, a femtocell system may evaluate the destination number to determine if it is an abbreviated code. If the dialed number is not an abbreviated code, the femtocell system may direct the call request to the telecommunication core network for processing thereby. If the dialed number is evaluated by the femtocell system as an abbreviated code, the femtocell system may direct the call request to an on-site PBX for call handling. If the abbreviated code is a valid code and the dialed user equipment is currently in the femtocell network service area, the PBX may then complete the call setup within the femtocell network. |
| US10129396B1 |
System and method for providing self-service while on hold during a customer interaction
The invention relates to a customer interaction management system that comprises a memory, an input and a computer processor programmed to: interact, via a first communication channel, with the customer via an automate self-service feature; receive a customer input to opt out of the automated self-service feature; place the customer in a queue with an estimated wait time; determine whether the estimated wait time exceeds a threshold wait time; engage the customer in a self-service on hold feature via a second communication channel separate from the first communication channel; and maintain the customer's place in the queue while the customer interacts with the self-service on hold. |
| US10129394B2 |
Telephonic communication routing system based on customer satisfaction
A method for automatically routing a telephonic communication is provided, and includes receiving a customer identifier and communicating with a customer history database storing historic data and determining whether the received customer identifier corresponds to a stored customer identifier in the customer history database, wherein the customer profile included in the stored historic data is based on a portion of a customer's demographic identity. Historic data corresponding to the stored customer number is identified based on the comparison of the received customer identifier and the stored customer identifier. The telephonic communication is associated with a predetermined communication destination based on the identified historic data. The method and systems additionally generate a customer routing record for the customer that includes the analyzed historic data, and associate the customer routing record with each customer identifier and store the customer routing record in the customer history database to facilitate future customer call routing. |
| US10129384B2 |
Automatic device configuration for event detection
A method in which an electronic device that has one or more movement sensors and a computer processor may detect events in a way that is convenient for daily use by a person. A behavior detection mode may be activated when the electronic device is physically attached to the torso of the person wherein the electronic device may be disposed in a special article (e.g. an article of manufacture, article of clothing, etc.) designed to be attached to the torso of the person so that it activates a behavior detection mode. |
| US10129380B2 |
Wearable devices for headset status and control
A wearable device includes an output display device, a transceiver, a user-operable control, and a processor. The transceiver is configured to communicate over a wireless link with a phone. The processor is configured to generate a control signal in response to an operation of the user-operable control. The processor is also configured to cause the transceiver to transmit, over the wireless link, the control signal. In addition, the processor is configured to receive, via the transceiver and over the wireless link, a notification of a status change at a headset based on the control signal. Furthermore, the processor is configured to cause the output display device to indicate the status change at the headset based on the control signal. The headset is in wireless communication with the phone. |
| US10129370B2 |
Mapping between user interface fields and protocol information
A gateway device for implementing data security is described herein. The gateway device is coupled between a client device and a server device, and generates a mapping between portions of data received from a client device and interface fields or data elements of the client device. Upon receiving subsequent data from the client device, the gateway device can access the generated mapping to identify portions of the subsequent data corresponding to particular interface fields or data elements of the client device using the mapping, and can encode the identified portions of the subsequent data, for instance based on data protection techniques defined by a security policy. The encoded data can then be outputted by the gateway device to the server device. |
| US10129363B2 |
Plug-in cache
An application may support the use of a plug-in. A plug-in may have an associated cache. The application may allow the plug-in to intercept network requests. The plug-in can determine if a network request is for an already-cached resource and provide the resource as a response to the intercepted network request. Additionally or alternatively, the application may allow the plug-in to make network requests. The plug-in can make a network request for data in order to add the data to the plug-in's cache. The plug-in may be able to determine when the application, the system, the network, or any suitable combination thereof are idle and cause cache requests to be made during idle periods. |
| US10129362B2 |
Caching system
This document describes a content caching system for pre-loading digital components, the system including a communication interface configured to communicate with a remote device over a wireless network, a local content cache; and an evaluation system comprising one or more processors. The one or more operations include pre-loading a digital component for rendering in a browser at a time that is subsequent to a time of the pre-loading, registering a scheme of a network reference for the cached digital component, with the scheme comprising a specified portion of the network reference for the cached digital component; retrieving, from the local content cache, the pre-loaded digital component associated with the digital component tag comprising the network reference; and rendering, from the local content cache, the pre-loaded digital component in a graphical user interface rather than requesting the digital component from the remote device. |
| US10129356B2 |
Physical layer caching for flexible MIMO cooperation in wireless networks
Cooperative physical layer caching systems for base stations are described herein. Base stations include cache memories that store portions of content. Base stations receive requests for content files from mobile devices. Cooperative physical layer caching systems can determine contents of the cache memories and can coordinate physical transmissions of the content files based on the contents of the cache memories. |
| US10129354B2 |
Proxy-controlled request routing
When a user sends a request to access an asset or resource, for example a program code file or a media file, the access request can be processed by a proxy device. The proxy can use directory information obtained from a directory, for example a company-wide Lightweight Directory Access Protocol (LDAP) directory, to determine whether or not the request is from an authorized network user listed in the directory. The proxy can use management information obtained from another database to determine roles, subordinate assignment information, and access authorization information associated with the requesting user. The proxy can conditionally route the request to a resource host based on the directory information and the management information. The proxy can also transform a resource returned in response to the request by using pipeline language parameters included in a URL associated with the access request. |
| US10129353B2 |
Overlay networks for application groups
A communication to a network location is detected at a computing device. The communication to the network location is encrypted dependent at least in part on whether the network location is at a different computing device from the computing device. |
| US10129350B2 |
Apparatus for determining identities between users
In a first aspect of the present invention, provided are an information processing apparatus including a behavior-history acquisition unit configured to acquire behavior histories of first users identified by first-user identification information, a transmission-history acquisition unit configured to acquire information transmission histories of second users identified by second-user identification information, and a determination unit configured to determine identity between the first users and the second users on the basis of behavior details included in the behavior histories and transmission details included in the transmission histories; a method for processing information with the information processing apparatus; and a program using the information processing apparatus. |
| US10129349B2 |
Systems, methods, and apparatus to process background requests while monitoring network media
Methods, apparatus, systems, and articles of manufacture to monitor mobile Internet usage are disclosed. An example method includes accessing a log of requests from a proxy. The log of requests is a mixture of foreground requests and background requests. Each request has a timestamp and belongs to a respective application. The respective applications of the requests are identified. A burst of consecutive requests is identified in the log of requests. The requests in the burst are differentiated between the foreground requests and the background requests based on the timestamps of the requests. The respective applications of the foreground requests are credited with a presentation duration. |
| US10129345B2 |
Providing content to a geographically constrained set of recipients
Users of social networking computer systems provide location information that is transformed into geo-coded coordinates specifying user locations. Providers of content, such as messages or documents, also participate in the social networking system and use drawing tools or provide data files that define one or more geographical areas or regions of a map, which may define a larger geographical area that encompasses the users of the social networking system. Data specifying the areas is stored. The content providers create one or more messages and associate each of the one or more messages with one or more of the areas. The users communicate requests for messages to the social networking system; in response, the system associates the user location data with the stored areas and messages, and returns only those messages that have been associated with the particular areas in which the users are located. As a result, users receive only messages for their areas, and only messages that the content providers have designated as intended for or relevant to their areas. |
| US10129344B2 |
Integrated user interface for consuming services across different distributed networks
User interface integration across multiple clouds is achieved by hosting UI extensions for different services in the same browser window. The UI extensions are initialized by a shell with any necessary security context for the corresponding cloud. The shell provides versioning so that the newest version of the UI is presented to users for all versions of a service. A connector in a local cloud provides translation between APIs across different clouds. |
| US10129335B2 |
Method and system for dynamic group creation in a collaboration framework
In general, embodiments of the invention relate to a method for transmitting messages. The method includes determining that a first device and a second device are members of a communication group based on the first device and the second device concurrently accessing a file, receiving a message from the first device, making a first determination, in response to receiving the message, that the first device is a member of the communication group, and based on the first determination, making a second determination that the second device is a member of the communication group, and based on the second determination, transmitting a second message to the second device, wherein the second message is generated, based at least in part, on the message. |
| US10129328B2 |
Centralized management of webservice resources in an enterprise
A single centralized metadata repository for an entire enterprise can maintain the metadata pertaining to various different web service applications on application servers of heterogeneous types within the enterprise. The metadata items stored in the centralized repository all can be stored in a same canonical format that can be expected and understood by all metadata accessors. The metadata maintained within the central repository can be given a life span that is linked with the life span of the web service application to which that metadata pertains. When a web service application is deployed on an application server, metadata pertaining to that webservice can be pushed automatically to the central repository for storage. When such a web service application is undeployed from an application server, the metadata pertaining to that webservice can be removed automatically from the central repository so as not to waste storage space. |
| US10129327B2 |
Retrieval of a file from multiple storage nodes
A system and associated computer program product for retrieving a file from a distribution of storage nodes. A client computer sends a request for a file to a proxy layer and in response, the proxy layer generates a script for obtaining the requested file and sends the script to the client computer. The client computer executes the script, resulting in portions of the requested file being obtained from respective storage nodes in a storage layer. The portions of the requested file are concatenated to form the requested file. |
| US10129326B1 |
Emergency calling with a telephony application
Techniques are disclosed for implementing emergency calling with a telephony application. In some examples, an application that executes on a user device provides voice communication functionality. Where a user attempts to contact an emergency number via this application (e.g., 911), the application can first determine whether the application is executing on a mobile phone or on a tablet. Where the application is executing on a mobile phone, the application can invoke a telephone dialer functionality provided by the mobile device to call the emergency service. Where the application is executing on a tablet, the application can access the emergency service via a uniform resource name for the emergency service. |
| US10129317B2 |
Method and apparatus for streaming media content to client devices
A method includes providing a variant playlist file that identifies a plurality of variant streams each corresponding to a different encoding of a same media presentation; tracking a first set of media segments encoded at a first bitrate that correspond to a first playlist file for a first variant stream associated with the variant playlist file; responsive to a second encoded bitrate associated with a second set of media segments that correspond to a second variant stream being higher than the first encoded bitrate: determining a number of media segments to include in a plurality of media segments from the second set of media segments that correspond to the first set of media segments; and providing, to the client device, a second playlist file that identifies a plurality of media segments from the second set of media segments that correspond to respective ones of the first set of media segments. |
| US10129314B2 |
Media feature determination for internet-based media streaming
A media service server for streaming media items with similar media features receives a plurality of media items, where each media item of the plurality of media item is labeled with one or more media features characterizing the media item. Audio content features from the plurality of media items are extracted. Correlations between the audio content features and the media features are identified. A set of media items to be analyzed is received. For each media item of the set of media items, a set of media features based on the identified correlations between the audio content features and the plurality of media features is estimated. Each estimated media feature is associated with a confidence score. The set of media items with the estimated media features is provided to one or more experts for expert analysis. |
| US10129313B2 |
System, method, and logic for managing content in a virtual meeting
An example method is provided and includes receiving an input associated with sharing data in a virtual meeting involving a first endpoint and a second endpoint associated with a meeting in a network environment. A window associated with an application that is running on the endpoint is scanned to determine a dataset for sharing, via the virtual meeting, with the second endpoint. The method also includes identify a portion of the dataset to restrict based on analyzing the dataset against a metric. The method also includes preventing a window of the at least one window from being transmitted, via the virtual meeting, to the second endpoint based on a determination that the window includes the portion of the dataset to restrict. |
| US10129311B2 |
Moving a portion of a streaming application to a public cloud based on sensitive data
A streams manager determines which portions of a streaming application process sensitive data, and when performance of the streaming application needs to be increased, selects based on the sensitive data which portion(s) of the streaming application can be moved to a public cloud. The streams manager then interacts with the public cloud manager to move the selected portion(s) of the streaming application to the public cloud. By taking sensitive data into account, the streams manager protects the integrity of sensitive data while still taking advantage of the additional resources available in a public cloud. |
| US10129308B2 |
Session description information for over-the-air broadcast media data
An over-the-air (OTA) broadcast middleware unit is configured to receive aggregated session description data for a plurality of sessions, wherein each of the sessions transports media data related to common media content, and wherein each of the sessions is transmitted as part of an OTA broadcast, and extract at least some of the media data from the OTA broadcast based on the aggregated session description data. The OTA broadcast middleware unit may further deliver the extracted media data to a streaming client, such as a Dynamic Adaptive Streaming over HTTP (DASH) client. |
| US10129301B2 |
Apparatus, system, and method of controlling data transmission, and recording medium
A transmission management system, when a request for starting communication with a second transmission terminal is received from a first transmission terminal, obtains first service contents information associated with first service identification information for identifying a service to be provided to the first transmission terminal, and causes a relay device to transmit content data that matches the first service contents information to the second transmission terminal in response to receiving content data at the relay device from first transmission terminal. |
| US10129296B2 |
Mitigating a denial-of-service attack in a cloud-based proxy service
A proxy server in a cloud-based proxy service receives a message that indicates that a domain, whose traffic passes through the proxy server, may be under a denial-of-service (DoS) attack. The proxy server enables a rule for the domain that specifies that future requests for resources at that domain are subject to at least initially passing a set of one or more challenges. In response to receiving a request for a resource of that domain from a visitor, the proxy server presents the set of challenges that, if not passed, are an indication that that the visitor is part of the DoS attack. If the set of challenges are passed, the request may be processed. If the set of challenges are not passed, the request may be dropped. |
| US10129294B2 |
Method and device for categorizing a stream control transmission protocol (SCTP) receiver terminal as a malicious SCTP receiver terminal
A method and a device are provided for categorizing a Stream Control Transmission Protocol (SCTP) receiver terminal (120) as a malicious SCTP receiver terminal, which generates spoofed optimistic SCTP selective acknowledgement (SACK) packet for exploiting a SCTP transmitter terminal as a flood source for Denial-of-Service attacks. The SCTP receiver terminal (120) generates data enriched SCTP SACK packets (170). Each data enriched SCTP SACK packet comprises a cumulative payload essence of all successfully received data packets (200). The SCTP transmitter terminal (110) performs a data enriched SACK validation in which it computes the cumulative payload essence of all successfully transmitted data packets (200), and compares the computed value with the cumulative payload essence contained in the received data enriched SACK. The SCTP transmitter terminal detects a spoofed optimistic SACK packet if the comparison results in a difference. |
| US10129293B2 |
Managing traffic control in a network mitigating DDOS
Embodiments are provided for managing routes of data traffic within a network. The management may be performed via a graphical user interface that interacts with a Web server to update a configuration file. The configuration file can be converted to router management commands by a network management device (e.g., a BGP speaker). The commands can then be sent to border routers for controlling network traffic. Embodiments are also provided for capturing and logging routing updates made in a network. |
| US10129290B2 |
Dynamic adaptive defense for cyber-security threats
Disclosed is a cyber-security system that is configured to aggregate and unify data from multiple components and platforms on a network. The system allows security administrators can to design and implement a workflow of device-actions taken by security individuals in response to a security incident. Based on the nature of a particular threat, the cyber-security system may initiate an action plan that is tailored to the security operations center and their operating procedures to protect potentially impacted components and network resources. |
| US10129288B1 |
Using IP address data to detect malicious activities
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for detecting malicious activities. One of the methods includes obtaining a collection of user event logs or receiving user events through real-time feeds; using data from the user event logs/feeds to determine IP address properties for individual IP addresses and IP address ranges; and for each incoming event, updating the IP address properties for the corresponding IP address and IP prefix properties. |
| US10129286B2 |
Zero day threat detection using host application/program to user agent mapping
A technique allows associating host applications and user agents in network traffic and detecting possible malware without relying on signatures of the user agents. A database of host applications and user agents is maintained, allowing automatic update of the database when a new application or new application to user agent mapping is discovered. Partial matches may be made when a change is made to the application, allowing learning the new mapping automatically. If an application is associated with more than a threshold number of user agents, an indication may be generated that the application is suspicious and possibly malware. |
| US10129282B2 |
Anomalous network monitoring, user behavior detection and database system
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for network monitoring, user account compromise determination, and user behavior database system. The system monitors network actions of user accounts including user account access across multitudes of network accessible systems, determines user account transitions, and determines different types of high-risk user behavior indicative of compromise. Network actions can be obtained from generated information by the network accessible systems, and correlated across additional data sets including contextual ones. User interfaces are generated describing network actions of user accounts, and are configured for user interaction, which cause generation of updated user interfaces and access to electronic data sources to determine information relevant to the user interaction. |
| US10129280B2 |
Modular event pipeline
A modular pipeline for event management in a computer environment is provided to enable the high volume of events that may be relevant to the security and stability of that environment to be gathered and analyzed for relevancy in a lower volume format. The modular pipeline enables event collection to meet various use cases so that the data comprising the events may be held and transmitted in a reduced volume format so that the relevancy of the events, rather than the events themselves, may be used by various systems with less transmission overhead and greater responsiveness. Aspects of the modular pipeline streamline and optimize the performance of a computing device within a network environment and provide for additional analytics of that environment. |
| US10129277B1 |
Methods for detecting malicious network traffic and devices thereof
A method, non-transitory computer readable medium, and anomaly detection apparatus that monitors network traffic exchanged with a plurality of client devices and a plurality of server devices to obtain client-side signal data for a plurality of client-side signals and server-side signal data for a plurality of server-side signals. A determination is made when a server health anomaly or a network traffic anomaly is a false positive based at least in part on a comparison of at least a portion of the client-side signal data or at least a portion of the server-side signal data to a historical scoreboard database comprising historical data regarding one or more historical network traffic or server health anomalies. A mitigation action is initiated when the determining indicates that one or more of the server health anomaly or network traffic anomaly is not a false positive. |
| US10129272B2 |
Network apparatus for pairing with user device and pairing method thereof
A network apparatus for performing a pairing with a user device, with the network apparatus already paired with a broker apparatus is disclosed, the network apparatus including a communicator including communication circuitry; a storage configured to store an RSSI value measured in the network apparatus and broker apparatus regarding a signal being exchanged with the broker apparatus with the broker apparatus at a close position; and a processor configured to determine whether the user device is close to the broker apparatus by as much as a predetermined distance based on each RSSI value measured in the network apparatus, broker apparatus, and user device regarding a signal being exchanged with the user device, an RSSI value measured regarding a signal being received from the broker apparatus, and a predetermined condition regarding a relationship between each RSSI value stored, and in response to determining that the user device is close to the broker apparatus by as much as the predetermined distance, to control the communication circuitry to perform an association for pairing with the user device. |
| US10129261B2 |
Method for serving location information access requests
The present invention relates to processing location information access requests. An identifier of a sender of a received location information access request is determined, and the identifier is compared to identifiers in a contact storage. Location access control information and/or supplementary contact information associated with an entry having a matching identifier in the contact storage is then retrieved. |
| US10129260B1 |
Mutual privacy management
Determining whether a message should be allowed to be sent is determined. A request to send a message to a recipient is received from a sender's client device. A determination is made at a server as to whether the sender is allowed to send the message to the recipient, based on a privacy list. A response to the sender is sent, based on the determination. |
| US10129259B2 |
Installment configurations within a vehicle and interoperability of devices configured to implement secure communication lockdowns, and methods of use thereof
In some embodiments, the present invention provides for a hardware component that includes at least the following: a logic cell; where the logic cell is configured in a static configuration within the hardware component which cannot be changed during run-time; where the hardware component is an intermediary between a processor of an ECU that is located within a vehicle and a communication network of the vehicle; where the logic cell is configured to solely serve a respective communication network; where the logic cell is configured to verify a portion of each communication against at least one of: a pre-defined approved message dictionary, a finite state machine, and an approved communication schema; and performing one of: executing an administrative action with an unauthorized communication or one of: transmitting an approved communication from the hardware component or modifying the approved communication with a pre-defined change. |
| US10129258B2 |
Secure component-based web applications
Disclosed are examples of systems, apparatus, methods and computer program products for providing a security model for component-based web applications. Documents for a web-based application are received, with the application containing custom components and Application Programming Interface (API) components. A Document Object Model (DOM) is processed corresponding to the web-based application, with the custom and API components modeled in hierarchical form. For each custom component, a key is assigned in accordance with the rules of capability security, accessible custom components are identified for which the custom component can provide the assigned key, a virtual DOM is generated for the custom component with the component and identified accessible custom components being modeled in hierarchical form, and the custom component is prohibited access to all inaccessible custom components. |
| US10129257B2 |
Authorization server access system
Systems and techniques are provided for authorizing restricted action (e.g., data access) requests using a tiered arrangement. A rule set is generated based on a policy received by an authorization server and is transmitted to a broker associated with an enterprise server. A restricted action request is received by an agent associated with the enterprise server and is provided to the broker associated with the enterprise server. The broker analyzes the request in view of the rule set and determines if the restricted action request should be granted or denied. The policy and/or rule set are updated based on activities and/or events within the system and a new rule set is generated based on the updated policy. |
| US10129254B2 |
Automated provisioning of a network appliance
Certain embodiments disclose a method of provisioning security services for a domain or set of domains. The method comprises sending an electronic message to the domain or set of domains. The electronic message comprising a secret message. The secret message is encrypted using a public key that a certificate server associates with the domain or set of domains. The method further comprises receiving a response from the domain or set of domains. The response comprises data derived by decrypting the secret message using a private key of the domain or set of domains. In response to a determination that the received data corresponds to the secret message sent in the electronic message, the method initiates the provisioning of the security services for the domain or set of domains. |
| US10129253B2 |
Methods and apparatus for allowing users to control use and/or sharing of images and/or biometric data
Methods and apparatus for allowing an individual to preserve his/her privacy and control the use of the individual's images and/or personal information by other, without disclosing the identity of the individual to others, are described. In various embodiments the individual seeking privacy provides his/her identifying information, images, and sharing preferences indicating desired level of privacy to a control device which is then stored in a customer record. The control device can be queried to determine if an image or other information corresponds to a user who has restricted use of his/her image or other information in a public manner. Upon receiving a query the control device determines using the stored customer record whether an individual has authorized use of his or her image. Based upon the determination a response is sent to the querying device indicating whether the use of the image and/or individual's information is authorized. |
| US10129252B1 |
Identity management system
A system and method of validating an identity of a user device is disclosed that includes registering a biometric signature with an authoritative identity source, transmitting an encrypted user identity element from the authoritative identity source to a user device, sending an identity request from a third party entity to the user device, transmitting the encrypted user identity element from the user device to the third party, sending an identity validation request from the third party to the authoritative identity source, transmitting a communication from the authoritative identity request to the third party entity, and informing the third party entity if the identity of the user is confirmed. |
| US10129250B2 |
System and method of notifying mobile devices to complete transactions
A method including registering an authority device for an account on an auth platform; receiving transaction request from an initiator to the auth platform; messaging the authority device with the transaction request; receiving an authority agent response from the authority device to the auth platform; if the authority agent response confirms the transaction, communicating a confirmed transaction to the initiator; and if the authority agent response denies the transaction, communicating a denied transaction to the initiator. |
| US10129249B1 |
Randomizing state transitions for one-time authentication tokens
Methods and apparatus are provided for randomizing state transitions for one-time authentication tokens. A user authentication passcode is generated by determining a generation time within an epoch for initiating computation of the user authentication passcode; initiating computation of the user authentication passcode at the determined generation time; and presenting the user authentication passcode at a presentation time that is de-coupled from the generation time. The generation time occurs, for example, at a random offset from a start of the epoch. A time difference between the presentation time and a completion of the computation of the user authentication passcode comprises, e.g., a uniformly distributed random variable over a range of values having a finite mean value. The epoch optionally comprises pre-computation epochs and a variable number of user authentication passcodes are optionally computed during a given pre-computation epoch. The number of passcodes generated per epoch can be varied in a random manner. |
| US10129247B2 |
System and method for utilizing behavioral characteristics in authentication and fraud prevention
A behavioral characteristics authentication system and method (“BCA system”) that facilitates authentication of the identity of a user, registrant, or applicant of a website, application, or other accessible computer resource using a verification process that incorporates behavioral characteristics. In operation, the BCA system compares a single user's behavior with their previous behavior, a user's behavior with behavior generally attributed to non-fraudulent behavior, or a user's behavior with behavior generally attributed to fraudulent behavior. The population of other users that a user's behavior is compared with may be selected to have similar demographic or other characteristics as the user. By analyzing various behavioral characteristics associated with legitimate or fraudulent multi-factor authentication attempts, the BCA system adds another layer of security to online transactions. |
| US10129244B2 |
Securing computing resources
Various examples are directed to systems and methods for providing access to computing resources. A resource system may receive an access request from a first user. The access request may comprise resource data describing a computing resource and function data describing a requested function to be performed on the computing resource. The resource system may determine that credential data provided by the first user is valid. The resource system may identify secondary data for the access request and generate an access object based at least in part on access object fragment data and the secondary data. The resource system may execute the access object to enable performance of the requested function on the computing resource. |
| US10129237B2 |
System and method invoking security and profile utilities for global account registration
Systems and methods are disclosed herein for managing electronic access from remote devices to a plurality of back-end computer platforms. The system includes a front-end computing system connected to the plurality of computerized back-end services by a data network, the front-end computer system including a network interface, a profile utility, and security utility. The network interface is configured to receive a registration request for a user identity. The front-end computer system invokes services of the security utility to verify information concerning the user identity and to register a global user account for the user. The front-end computer system invokes the profile utility to merge or link pre-existing user accounts associated with the user identity for the plurality of computerized back-end services. The front-end computer system also invokes the profile utility to determine roles for the user identity in relation to each of the computerized back-end services. |
| US10129235B2 |
Key hierarchy for network slicing
A method is provided for facilitating service-specific security while avoiding a full authentication and key agreement exchange each time a service is activated on a device. Multiple services on a single device and sharing the same session link (e.g., radio link or radio bearer) and the same physical network may nonetheless obtain distinct service-specific network connectivity root keys from which service-specific security/session keys may be derived. In such case, instead of performing a full authentication and key agreement exchange with an operator or provider (e.g., home subscription server or HSS), the device may authenticate a network slice using a security credential established during a prior authentication with another network slice. |
| US10129234B2 |
Identity confirmation method and identity confirmation system using life log
Provided are an identity confirmation method and an identity confirmation system in which it is not necessary to keep a password in memory and in which a credential used for authentication is changed automatically without requiring a user operation. Life log data for the user is received, life log data history is accumulated and managed, the life log data history is referenced to generate a question relating to history that the user is likely to know, the question is transmitted over the Internet to a mobile communication device, an answer to the question relating to history produced by the user and transmitted from the mobile communication device is received over the Internet, the answer from the user is evaluated to determine whether or not the answer is correct, and the success or failure of identification is determined on the basis of the evaluation result. |
| US10129232B1 |
Secure interactive debug
A method for ensuring secure access by a debugger to a privileged debug service for trouble shooting a product of a customer during a debug session is disclosed. Secure access is provided via an intermediate SID server. The method includes invoking a secure login process for accessing the privileged debug service, resulting in generation of a challenge string to be provided to the SID server upon determining that the customer has authenticated and has the rights for granting access to the privileged debug service. The method also includes receiving from the debugger a response string indicating that the debugger has successfully authenticated with the SID server, validating the response string, and providing the debugger with access to the privileged debug service by receiving input from the debugger indicating one or more commands/actions to be executed on the privileged debug service and executing the indicated commands/actions on the privileged debug service. |
| US10129231B2 |
Computerized system and method for automatically sharing device pairing credentials across multiple devices
Disclosed are systems and methods for improving interactions with and between computers in content searching, generating, hosting and/or providing systems supported by or configured with personal computing devices, servers and/or platforms. The systems interact to identify and retrieve data within or across platforms, which can be used to improve the quality of data used in processing interactions between or among processors in such systems. The disclosed systems and methods automatically pair and unpair hardware devices that are logged into a single account. Once a user logs into their profile associated with an online account, the disclosed systems and methods perform the novel, computerized steps of auto-pairing any or all of the other devices that are also logged into the account. The disclosed systems and methods allow any number of devices to be automatically paired or unpaired through shared password-less credentials associated with a single profile. |
| US10129228B1 |
Authenticated communication between devices
Various examples are directed to systems and methods for establishing a secure, authenticated connection between devices utilizing a password authenticated key exchange. A client may send an encrypted connection request message to a server via a first communication medium. The server may send the client first data token data via a first communication medium. The client may encrypt the first data token with a password-authenticated key, for example, obtained in a password authenticated key exchange with the server. The client may encrypt the first token data based at least in part on the password-authenticated key to generate a message authentication code (MAC). The client may send the MAC to the server. |
| US10129223B1 |
Lightweight encrypted communication protocol
A lightweight network protocol provides mutual authentication and encryption of a communication channel in environments where the amount of computing resources available to the networked devices is constrained. When a new device is added to a network, the device contacts a registration service and provides information that is published via a device directory. The network entity locates the device via information provided by the device directory, and establishes an encrypted network connection with the device. A shared secret is established between the device and the network entity using a key-exchange protocol. Consecutive messages that are sent or received are encrypted or decrypted with a sequence of cryptographic keys generated based at least in part on the shared secret. Key-exchange parameters are added to message exchanges between the device and the network entity to facilitate regenerating the shared secret. |
| US10129222B2 |
Trusted storage systems and methods
Systems and methods are disclosed for providing a trusted database system that leverages a small amount of trusted storage to secure a larger amount of untrusted storage. Data are encrypted and validated to prevent unauthorized modification or access. Encryption and hashing are integrated with a low-level data model in which data and meta-data are secured uniformly. Synergies between data validation and log-structured storage are exploited. |
| US10129219B1 |
Methods and systems for securing data stored at a storage area network
Methods and systems for securing data are provided. For example, one method includes providing context information for an input/output (I/O) operation to a security module by an adapter communicating with a computing device and a storage device via a network; storing encryption parameters associated to a security association handle by the security module; using a workflow handle by the security module to obtain the security association handle for retrieving stored encryption parameters for encrypting payload transmitted by the adapter and for decrypting payload received by the adapter; predicting a first frame header for encrypting the payload transmitted by the adapter and a second frame header for decrypting payload received by the adapter; providing the encrypted payload for transmission to the adapter by the security module, after discarding the first predicted header; and providing the decrypted payload to the computing device by the security module, after discarding the second predicted header. |
| US10129217B2 |
Secure shell authentication
A first information handling system receives a security challenge and forwards it to a second information handling system. The second information handling system retrieves a private key from a public/private encryption key pair and satisfies the challenge with the private key. The second information handling system forwards the satisfied challenge without divulging the private key. The second information handling system is in a more secure environment than the first information handling system. The challenge may be satisfied by signing the challenge with the private key. Satisfying the challenge may be a step in creating a secure shell connection between the first information handling system and an organization maintaining the first information handling system and the second information handling system. |
| US10129213B2 |
System and method for compliance based automation
This invention generally relates to a process and computer code for enabling users to create adapters that enable application automation processes that allow customers to define compliance boundaries using a rules-based compliance firewall for their service providers and allow service providers to perform automation on customer machines remotely while adhering to customer's compliance requirements. |
| US10129212B2 |
Computation of historical data
Secure computation of enterprise data in a cloud is provided, by a third party, such that values and data manipulation processes are encrypted through use cryptographic processes that are secure. A method can comprise performing operations including receiving security data representing an attribute included in a log file, generating encoded attribute data as a function of the attribute, a hash function, or salt data representing an alphanumeric string, and sending the encoded attribute data to a second device. |
| US10129203B2 |
Network client ID from external managment host via management network
A method includes a management host server causing a power distribution unit to apply standby power to at least one server management module having at least one service processor; the management host server receiving an IP address request from the at least one server management module; the management host server network assigning the IP address and associates the at least one server management module with the assigned IP address; and the management host server issuing a command to the at least one server management module to store a client ID as a location sensor value wherein a geographic map can be created using the client ID. |
| US10129202B2 |
Optimizing global IPv6 address assignments
In one embodiment, a device in a network determines that one or more network nodes should use a stateful address configuration protocol to obtain network addresses. The device causes the one or more network nodes to use the stateful address configuration protocol, in response to determining that the one or more nodes should use the stateful address configuration protocol to obtain network addresses. The device determines that the one or more network nodes should use a stateless address configuration protocol to obtain network addresses. The device causes the one or more network nodes to use the stateless address configuration protocol, in response to determining that the one or more nodes should use the stateless address configuration protocol to obtain network address. |
| US10129198B2 |
Contextually driven messaging system
A method may include receiving, by a computing device associated with a user, a message from an origination source and receiving, by the computing device, an audio input. The method may also include determining, by the computing device and based at least in part on the audio input and contextual information, a probability that the user intends to send a response message to the origination source. The method may further include, responsive to determining that the probability the user intends to send the response message to the origination source satisfies a threshold probability, determining, by the computing device, that the user intends to send the response message to the origination source. The method may also include, responsive to determining that the user intends to send the response message to the origination source, generating, by the computing device and based on the audio input, the response message, and sending, by the computing device, the response message to the origination source. |
| US10129194B1 |
Tertiary classification of communications
Information associated with a plurality of electronic communications associated with an entity is obtained. An entry including information associated with a given email address is generated in a whitelist. The entry including the information associated with the given email address is generated based at least in part on a determination, from the obtained information associated with the plurality of electronic communication associated with the entity, that at least a threshold number of electronic communications have been exchanged between the entity and the given email address, and that the at least threshold number of emails were exchanged during a period of time that exceeds a threshold period of time. Subsequent to generating the whitelist entry, an electronic communication to be classified is received. A classification of the received electronic communication is performed based at least in part on a determination of whether the received electronic communication corresponds to an entry in the whitelist. |
| US10129193B2 |
Identifying relevant content contained in message streams that appear to be irrelevant
A first level of relevance, to at least one interest of a user, of content within a topic message within a message stream can be determined. Responsive to determining that the first level of relevance, to the at least one interest of the user, of the content within the topic message is below a threshold value, each of a plurality of other messages within the message stream can be processed using natural language processing performed by a processor. A respective second level of relevance, to the at least one interest of the user, of each the other messages can be determined. For each of the other messages for which the respective second level of relevance is equal to or above the threshold value, an alert can be presented to bring an attention of the user to the other message. |
| US10129186B2 |
Service function chain (SFC) data communications with SFC data in virtual local area network identifier (VLAN ID) data fields
A data system transfers data packets over Service Function Chains (SFCs). A classifier receives the packets and determines SFC Identifiers (IDs) and metadata. The classifier inserts the SFC IDs and metadata in Virtual Local Area Network (VLAN) ID data fields of the packets. The classifier transfers the classified packets to a forwarder. The forwarder identifies the SFC IDs and metadata from the VLAN ID data fields. The forwarder selects network functions based on the SFC IDs and metadata. The forwarder transfers the packets having the SFC IDs and metadata in the VLAN ID data fields to the selected network functions. The selected network functions identify the SFC IDs and metadata from the VLAN ID data fields. The network functions process the packets based on the SFC IDs, metadata, and configured policies to perform functions like network address translation, firewall, deep packet inspection, and others. |
| US10129185B2 |
System and method for implementing virtual platform media access control (MAC) address-based layer 3 network switching
Novel tools and techniques might provide for implementing virtual platform media access control (“MAC”) address—based layer 2 and layer 3 network switching. In some embodiments, a method might comprise receiving, at a network node in a network, a data packet having a header comprising a MAC destination address, and routing, with the network node, the data packet over open systems interconnection (“OSI”) model layer 3 or network layer of the network, based at least in part on the MAC destination address in the header of the data packet. The MAC destination address comprises a first portion comprising an organizationally unique identifier (“OUI”) and a second portion comprising an identifier for a destination network interface controller (“NIC”) and/or virtual NIC (“VNIC”), which might be associated either with the same service provider associated with the network node or the network or with a different service provider, content provider, and/or application provider. |
| US10129178B1 |
Combining and processing as a whole portions of a ordered segment of data elements split between two communications channels
A block of ordered data elements comprising a plurality of sub-blocks each of which is to be processed by a different processing module in segments of the data elements having a particular length characteristic can be received in parallel streams on parallel communication channels. The data elements in each stream can be received and directed to the corresponding processing module. The tail of a segment split between two of the streams and received earlier in time than the corresponding head of the split segment can be buffered until the head is received on the other stream. The head and the tail of the split segment can then be processed as a whole segment in a corresponding processing module. |
| US10129175B1 |
Systems and methods for performing carrier aggregation based on subframe configuration
Systems and methods are described for performing carrier aggregation based on subframe configuration. It may be determined that conditions for a wireless device in communication with an access node meet a carrier aggregation criteria, wherein the access node and wireless device communicate using a first subframe configuration. Signal information may be received from the wireless device comprising received signal levels for a plurality of candidate secondary carriers. Subframe configurations used by the candidate secondary carriers to communicate with wireless devices may be retrieved. One or more of the plurality of candidate secondary carriers may be selected based on the received signal level information and the retrieved subframe configurations. And carrier aggregation may be activated such that the one or more selected secondary carriers are used to transmit downlink data to the wireless device. |
| US10129171B2 |
Allocation and scheduling for time and frequency division multiplexing system
A Time and Frequency Division (TaFD) scheduler based on a TaFD allocation unit based credit allocation may schedule both time and frequency division for both legacy Data Over Cable Service Interface Specification (DOCSIS) channels and DOCSIS orthogonal frequency division multiple access (OFDMA) channels. In embodiments, scheduling by the TaFD schedules both single carrier quadrature amplitude modulation (SC-QAM) transmissions and OFDMA upstream transmissions. In embodiments, the scheduler schedules based on TaFD allocation unit based credit allocations, where TaFD allocation unit based credits may be allocated for OFDMA overlapped regions. The credits may be dynamically adjusted based on channel utilization and an outstanding bandwidth demand or a prioritized pending bandwidth demand. The TaFD scheduler may use independent hierarchy priority queuing schemes. |
| US10129170B2 |
Automated split of work in a cloud environment
Techniques disclose managing cloud computing resources provisioned to processing elements of a distributed application (e.g., for a streams processing environment). A cloud manager determines changes in availability of cloud resources. The cloud manager notifies a runtime manager of a distributed application of the change in availability. The runtime manager in turn requests that the cloud manager adjust the provisions based on the notification. The cloud manager provisions the cloud resources based on the request. |
| US10129168B2 |
Methods and systems providing a scalable process for anomaly identification and information technology infrastructure resource optimization
A method for anomaly identification and IT resource optimization includes retrieving, by a workload engine executing on a first computing resource, from a database populated by a client agent executing on a second computing resource, a metric associated with a process. The method includes analyzing, by the workload engine, the retrieved metric and the process. The method includes associating, by the workload engine, at least one workload with the process, responsive to the analysis. The method includes analyzing, by an exception engine executing on the first computing resource, the retrieved metric, the process, and the at least one workload; analyzing includes applying at least one workload rule to the at least one workload. The method includes identifying, by the exception engine, an operational anomaly within the process, responsive to the analysis by the exception engine. The method includes providing a recommendation for mitigating the operational anomaly. |
| US10129166B2 |
Low latency re-timer
Described is a low latency re-timer for systems supporting spread spectrum clocking. The re-timer comprises: a first clock frequency estimator to estimate a frequency of a receive clock (RX CLK) and to provide a first timestamp associated with a first clock that underwent spread spectrum; a second clock frequency estimator to estimate a frequency of a transmit clock (TX CLK) and to provide a second timestamp associated with a second clock that underwent spread spectrum; and a comparator to compare the first timestamp with the second timestamp. |
| US10129162B1 |
Systems and methods for defining storage
System and methods are provided for providing modular control of network data packet handling and configurations. In one aspect, a storage-to-network mapping data structure is provided that can translate network connection parameters into high level, searchable concepts. In turn, these searchable concepts can be used by one or more modular software-defined storage applications to provide rules for network traffic handling that can then be merged into a dataplane forwarding data structure for implementation by a dataplane forwarder. |
| US10129158B2 |
MaxMesh: mesh backhaul routing
A system is disclosed, comprising: a centralized routing node configured to: identify a set of congested links based on the link utilization statistics, each congested link having at least one traffic flow that may be active, each traffic flow having at least one traffic source and a path set comprising a set of nodes and links that may be used by the traffic flow as packets travel from the at least one traffic source to one or more destinations; identify a set of non-congested links based on the link utilization statistics, each non-congested link sharing at least one traffic source with a traffic flow of a congested link in the set of congested links; identify a path fork in a path set between a source and a destination of a particular traffic flow associated with a particular congested link in the set of congested links; and compute a new utilization level for the particular congested link that would result from moving the particular traffic flow from the particular congested link to a particular non-congested link in the set of non-congested links. |
| US10129155B2 |
Delay based congestion control protocol co-existing with TCP
Technologies are described for performing hybrid rate control that switches between a delay-based mode and a passive loss-based mode for a flow of network traffic. The switching can be performed based on the presence of loss-based TCP network flows. For example, rate control can be performed for a flow of network traffic in a delay-based mode. When the presence of a loss-based TCP network flow is detected, the flow of network traffic can be switched from the delay-based mode to a passive loss-based mode and rate control can be performed in the passive loss-based mode. When the loss-based TCP flow is no longer detected, the flow of network traffic can be switched back to the delay-based mode. |
| US10129153B2 |
In-line network accelerator
A smart NIC (Network Interface Card) is provided with features to enable the smart NIC to operate as an in-line NIC between a host's NIC and a network. The smart NIC provides pass-through transmission of network flows for the host. Packets sent to and from the host pass through the smart NIC. As a pass-through point, the smart NIC is able to accelerate the performance of the pass-through network flows by analyzing packets, inserting packets, dropping packets, inserting or recognizing congestion information, and so forth. In addition, the smart NIC provides a lightweight transport protocol (LTP) module that enables it to establish connections with other smart NICs. The LTP connections allow the smart NICs to exchange data without passing network traffic through their respective hosts. |
| US10129151B2 |
Traffic management implementation method and apparatus, and network device
A traffic management (TM) implementation method and apparatus, and a network device, where the TM implementation apparatus is located aside a processor or a switching fabric chip, receives a packet management request sent by the processor or the switching fabric chip, where the packet management request includes a queue identifier, and the queue identifier is used to identify a flow queue in which the processor or the switching fabric chip stores a data packet, performs traffic management on the packet management request, and generates a packet management response according to a management result, where the packet management response includes a management indication and the queue identifier, sends the packet management response to the processor or the switching fabric chip such that the processor or the switching fabric chip processes, according to the management indication, the data packet in the flow queue corresponding to the queue identifier. |
| US10129149B2 |
Dynamic packet routing
The present invention generally relates to methods of routing packets in a network comprising Autonomous Systems (ASs), next hop determiners for routing packets in such a network, systems for routing packets in such a network, and route indicator feeders for providing modified route indicators. A method of routing packets in such a network may comprise: obtaining route indicators each comprising: an indicator of a network prefix; and an indicator of an AS path for delivering packets to an AS having the network prefix; identifying at least one said route indicator having an AS path indicator comprising a predetermined AS identifier; storing the network prefix indicator of each said identified route indicator; receiving at least one packet having an address indicating a destination; and if the destination address of said packet is within an address range defined by a said stored prefix indicator, transmitting the packet on a non-peering connection to the AS having the predetermined AS identifier. |
| US10129146B2 |
Methods and apparatus for providing mobility in ethernet network
A method and apparatus for providing a mobility in an Ethernet network. An Ethernet switch receives an Ethernet frame through a port of the Ethernet switch, and transmits the Ethernet frame to an upper Ethernet switch through a root port of the Ethernet switch based on whether a forwarding information for a destination address of the Ethernet frame exists in a forwarding table. |
| US10129145B2 |
Routing IPv6 packets between autonomous systems
Systems, methods, architectures, mechanisms or apparatus for routing packets between source and destination endpoints associated with different autonomous systems without requiring public advertising of the addresses of the source and destination endpoints to other autonomous systems (ASN). |
| US10129144B1 |
Extending virtual routing and forwarding using source identifiers
Systems, methods, apparatus and computer readable medium is disclosed for extending the Virtual Routing and Forwarding (VRF) in the network using embedded source identifiers in the packets. An example apparatus may include ports, memory and processing logic. The memory may include VRF routing tables corresponding to respective VRF domains and a list of media access control (MAC) addresses, wherein each MAC address in the list is linked to one of the respective VRF routing tables. The processing logic may be configured to receive an ingress packet at a port, identify a matching MAC address in the list that matches a source identifier of the ingress packet, and process the ingress packet according to the respective VRF domain associated with the matching MAC address that matches the source identifier. |
| US10129140B2 |
Server-centric high performance network architecture for modular data centers
Disclosed are systems and methods for network architecture that is a server-centric network architectural design. |
| US10129139B2 |
Method and apparatus for relaying in multicast network
A source node includes a topology information extractor configured to acquire information of a channel state between nodes included in a multicast network, and extract topology information of the multicast network. The source node further includes a relay node selector configured to select, from the nodes, a relay node to relay a packet transmitted from the source node, based on the topology information. |
| US10129137B2 |
Transferring data in a gateway
Transferring data by a gateway that is connected to a network with a SIMM-node. In response to a request to establish multi-MAC address routing information of a SIMM-node, multiple MAC addresses are obtained, corresponding to an IP address of the SIMM-node. The multi-MAC address routing information, including information in a route table, an ARP table, and a NEXT_HOP table, is established by adding to the ARP table corresponding relationships of the IP address with the multiple MAC addresses of the SIMM-node. The corresponding relationships of the IP address with the multiple MAC addresses of the SIMM-node is added to the NEXT_HOP table. Routing entries of the SIMM-node are established in the route table. In response to receiving a data message sent to the IP address of the SIMM-node, the message is routed by using the established multi-MAC address routing information of the SIMM-node. |
| US10129128B2 |
Analysis of network performance
Methods and apparatus are disclosed for analyzing network performance in relation to a network portion comprising a group of nodes. The method may comprise: obtaining probe measurements in respect of a plurality of target nodes in the group, respective probe measurements each resulting from a probe test-message being sent via a network path from a testing node to a target node and an associated probe response-message triggered by receipt and local processing at the respective target node of the probe test-message being received via a path from the respective target node by the testing node, the respective probe measurements relating to a network performance characteristic in respect of the paths taken by the respective probe test-messages and the probe response-messages associated therewith and being dependent also on the local processing of the respective probe test-messages at the respective target nodes; comparing probe measurements obtained in respect of different target nodes in the group, and in dependence on the comparison, assigning a weighting in respect of at least one of the nodes; and determining a network performance analysis measure in relation to the network portion according to a predetermined function dependent on the probe measurements and on the weighting. |
| US10129125B2 |
Identifying a source device in a software-defined network
In an example, there is disclosed a computing apparatus, having: a network interface to communicatively couple to a software-defined network (SDN); first one or more logic elements providing an SDN controller engine to provide a control function for the SDN; and second one or more logic elements providing a route tracing engine to: receive a tunneling notification from a network device agent, the tunneling notification associated with a network flow; and perform a backtracking traceroute operation to deterministically identify a source device for the flow. There is also disclosed a method of providing the foregoing, and one or more tangible, non-transitory computer-readable storage mediums for providing the foregoing. |
| US10129124B2 |
Method and apparatus for controlling in-vehicle mass diagnostic communication
The present disclosure relates to a method and apparatus for controlling mass diagnostic communication in a vehicle capable to prevent a transmission error of a diagnostic message which can occur during mass diagnostic communication. The method of controlling mass diagnostic communication in a controller connected to a vehicle controller area network (CAN) communication network may include calculating a reception time interval between a previously received CAN frame and a currently received CAN frame, calculating a CAN frame processing time in the controller based on a length of data included in the received CAN frame, and determining a separation transmission period of a mass diagnostic message by comparing the calculated reception time interval with the calculated CAN frame processing time. |
| US10129123B2 |
Measurement apparatus, communications apparatus, and relay apparatus
A measurement apparatus calculates a rate based on a time base of a second communications apparatus by dividing a total data amount arriving between two arbitrary response messages corresponding to transmission data, by a difference in transmission time information of the response messages. The measurement apparatus calculates a time conversion factor between a first communications apparatus and the second communications apparatus. The measurement apparatus calculates an arrival rate of the transmission data based on a time base of the first communications apparatus, by multiplying the calculated rate by the calculated time conversion factor. |
| US10129119B2 |
Systems and methods for analyzing report access data
An access data analytics system including a processor and a memory is provided. The processor stores an electronic report in the memory. The electronic report is generated based on an electronic report query include a plurality of parameters. The processor also collects access profile data including metadata associated with a user accessing the report, stores the access profile data within the memory, receives an access analytics data request requesting access analytics data associated with the stored report, retrieves the stored access profile data, generates an access analysis table including the access analytics data associated with the stored report based on the retrieved access profile data, and provides an extract including at least a portion of the access analytics data associated with the stored report from the access analysis table to a requestor of the access analytics data request. |
| US10129117B2 |
Conditional policies
Conditional policies can be defined that change based on security measurements of network endpoints. In an example embodiment, a network traffic monitoring system can monitor network flows between the endpoints and quantify how secure those endpoints are based on analysis of the network flows and other data. A conditional policy may be created that establishes one or more first connectivity policies for handling a packet when a security measurement of an endpoint is a first value or first range values, and one or more second connectivity policies for handling the packet. The connectivity policies may include permitting connectivity, denying connectivity, redirecting the packet using a specific route, or other network action. When the network traffic monitoring system detects a change to the security measurement of the endpoint, one or more applicable policies can be determined and the system can update policy data for the network to enforce the policies. |
| US10129116B2 |
Techniques for capturing execution time data in dataflow graphs
A method for supporting communication between a client and a server includes receiving a first message from a client. The method also includes creating an object in response to the first message. The method also includes sending a response to the first message to the client. The method also includes receiving changes to the object from a server. The method also includes storing the changes to the object. The method also includes receiving a second message from the client. The method also includes sending the stored changes to the client with a response to the second message. |
| US10129115B2 |
Method and system for network monitoring using signature packets
A method of monitoring a network with a test device connected to the network includes monitoring a plurality of packets which pass through the test device, comparing a predefined field of each of the plurality of packets to a predefined pattern so as to identify signature packets, evaluating whether the signature packets satisfy a predefined condition, and, if the predefined condition is satisfied, sending a notification to a user. A system implementing the method is provided. |
| US10129114B1 |
Protocol exposure as network health detection
Techniques for exposing network health over network connections in service provider network are disclosed. Monitors such as connection tracking modules may be configured to process network information (e.g., TCP connection state information) relating to network traffic and to transmit the network information to a health manager for analysis. As an example, a customer may request network information relating to a virtual instance provided by a service provider. In response to the request, TCP connection state information relating to the virtual instance may be extracted and processed to determine a network health condition. Information relating to the determined network health condition may be provided to the requesting customer. |
| US10129101B2 |
Application driven and adaptive unified resource management for data centers with Multi-Resource Schedulable Unit (MRSU)
An apparatus comprising a processor configured to obtain estimated processing requirements, estimated memory requirements, estimated storage requirements, and estimated network communication requirements for a plurality of data center (DC) tenants; determine a Minimum Resource Schedulable Unit (MRSU) for the tenants, the determined MRSU comprising a dynamically allocatable group of processor resources, processing memory resources, storage resources, and network resources comprised in at least one of a plurality of DC servers, wherein the MRSU is determined such that each DC tenant's estimated processing requirements, estimated memory requirements, estimated storage requirements, and estimated network communications requirements are met by allocation of a corresponding integer value of MRSUs; and allocate the corresponding integer value of MRSUs to each DC tenant as an MRSU allocation; and a transmitter coupled to the processor and configured to transmit the MRSU allocation to the DC servers for allocation to the DC tenants. |
| US10129100B2 |
Policy management system for heterogeneous cloud services
Some embodiments provide a method for a system that enforces policy for a network. The method receives (i) a first set of network state data from a first cloud management application that manages a first aspect of the network and stores its network state data in a first format and (ii) a second set of network state data from a second cloud management application that manages a second aspect of the network and stores its network state data in a second format. The method stores the first and second sets of network state data in a single, unified data format. The method monitors the stored sets of network state data to determine whether the network state violates one or more network policies that constrain the network state received from the first and second cloud management applications. |
| US10129098B2 |
Networked device resource enumeration
Various systems and methods for device resource enumeration are described herein. In one example, an enumeration module may include logic executable at a networked device. The enumeration module may be configured to enumerate resources of the networked device without dependency on write permissions to a file system of the networked device, and generate a data object stored in a memory unit of the networked device based on the enumerated resources. |
| US10129095B2 |
Node placement method within a wireless network, such as a wireless local area network
A method of and associated system for placing nodes in a wireless local area network (WLAN) includes receiving user-specified parameters regarding the network. The parameters can include a layout of a building or other space, and requirements for the WLAN. An algorithm then employs these parameters to automatically create and optimized layout of multiple wireless access points for the WLAN. The method can display the layout and provide various types of information to the user. |
| US10129092B2 |
Enabling cross-realm authentication between tenant and cloud service provider
A first network adapter is inserted into a first resource server of each tenant of a plurality of tenants serviced by a cloud service provider. The first network adapter is configured to be controlled by the cloud service provider. The first resource server of each tenant includes a second network adapter configured to be controlled by the tenant. Each of the first network adapter is operably coupled with an interconnection network infrastructure. The interconnection network infrastructure is operably coupled with cloud service provider infrastructure. Related methods, techniques, apparatuses, systems, non-transitory computer program products, and articles are also described. |
| US10129088B2 |
Configuration of rules in a network visibility system
Aspects of the present disclosure enable a router controller to maintain a default rules table indicating allocation of IP addresses (of GTP packets) to respective output ports. In an embodiment, the router controller receives information indicating the respective tunnel endpoint IP addresses of a control session and a data session of a user. The router controller is configured to determine whether such IP addresses of the control session and the data session(s) are allocated to the same output port. If the IP addresses of the control session and the data session are not allocated to the same output port, router controller is configured to generate a dynamic rule to force packets of both the control session and the data session to the same output port. |
| US10129087B2 |
Application service location and management system
A system for locating and managing application services according to one embodiment includes a location determination circuit configured to determine a physical location of an associated server; and a service location management (SLM) agent associated with the server. The SLM agent is configured to maintain a registry of service applications provided by the server and to transmit multicast messages over a data center network. The multicast messages are configured to advertise: an identification (ID) of the server; the service applications provided by the server; and the physical location of the server. |
| US10129082B2 |
System and method for determining a master remote access controller in an information handling system
A method and information handling system (IHS) determines a master remote access controller (RAC) in a distributed IHS having multiple communicatively-connected computing nodes with corresponding RACs. The method includes transmitting a first set of RAC parameters from a first RAC to several other RACs. The first set of RAC parameters includes a locality of reference (LOR) value for the first RAC. Several other sets of RAC parameters are received from the other RACs. A first list of all of the RACs is generated including the associated LOR values. The first list is sorted based on the LOR values and the RAC having the highest LOR value in the first list is designated as a first master RAC candidate. |
| US10129080B2 |
Method of provisioning network elements
A system and method for provisioning network elements, such as but not limited to the type of network elements used in cable television system to facilitate subscriber access to services. The provisioning may be accomplished without communications between multiple provisioning servers. This allows the provisioning to be conducted in a stateless manner. |
| US10129077B2 |
Configuring and operating a XaaS model in a datacenter
Some embodiments provide novel inline switches that distribute data messages from source compute nodes (SCNs) to different groups of destination service compute nodes (DSCNs). In some embodiments, the inline switches are deployed in the source compute nodes datapaths (e.g., egress datapath). The inline switches in some embodiments are service switches that (1) receive data messages from the SCNs, (2) identify service nodes in a service-node cluster for processing the data messages based on service policies that the switches implement, and (3) use tunnels to send the received data messages to their identified service nodes. Alternatively, or conjunctively, the inline service switches of some embodiments (1) identify service-nodes cluster for processing the data messages based on service policies that the switches implement, and (2) use tunnels to send the received data messages to the identified service-node clusters. The service-node clusters can perform the same service or can perform different services in some embodiments. This tunnel-based approach for distributing data messages to service nodes/clusters is advantageous for seamlessly implementing in a datacenter a cloud-based XaaS model (where XaaS stands for X as a service, and X stands for anything), in which any number of services are provided by service providers in the cloud. |
| US10129075B2 |
Multicast only fast re-route over remote loop-free alternate backup path
Techniques are described for enhancements to Protocol Independent Multicast (PIM) to support multicast only fast re-route (MoFRR) over a remote loop free alternate (RLFA) backup path in a network. This disclosure describes a modified PIM control message having a new PIM message type and an additional field to indicate an address of a RLFA network device in the RLFA backup path. According to techniques of this disclosure, network devices along the RLFA backup path are configured to forward the modified PIM control message toward the RLFA network device instead of toward a source of a requested multicast group. When the RLFA network device receives the modified PIM control message, the RLFA network device is configured to forward a conventional PIM control message towards the source of the requested multicast group. In this way, PIM can be used to provide MoFRR over a RLFA backup path. |
| US10129074B2 |
Techniques for accessing logical networks via a virtualized gateway
Disclosed are various embodiments for receiving, via a network, a request from a client to establish a network tunnel over the network. A credential is received from the client in order to establish the network tunnel. The client is authenticated based upon the credential. The client negotiates, via the network, to establish the network tunnel. |
| US10129070B2 |
Methods and systems for correction of carrier frequency offset (CFO) in wireless transceivers
Methods and systems for correcting carrier frequency offsets (CFOs) in a wireless transceiver are disclosed. The method includes receiving a first predetermined number of data packets and analyzing the first predetermined number of data packets to determine one or more wireless link quality metrics. The method includes adjusting a local oscillator in accordance with a first local oscillator adjustment strategy. The method includes receiving a second predetermined number of data packets and analyzing the second predetermined number of data packets to determine the one or more wireless link quality metrics. The method includes repeating the first local oscillator adjustment strategy if the wireless link quality metrics improve. The method includes changing to a second local oscillator adjustment strategy if the wireless link quality metrics worsen and adjusting the local oscillator in accordance with the second local oscillator adjustment strategy. |
| US10129069B2 |
Data transmission method and apparatus
In an embodiment, a method includes performing, by a transmit end, transmit power enhancement processing on a target field of a preamble in a wireless local area network (WLAN) system, where the target field includes one or more fields, other than a non-legacy signal field, in a non-legacy field of the preamble in the WLAN system. The method also includes sending, by the transmit end, to a receive end the preamble on which transmit power enhancement processing has been performed. |
| US10129067B2 |
Apparatus and method for sending and receiving broadcast signals
A broadcast signal transmitter is disclosed. A broadcast signal transmitter according to an embodiment of the present invention comprises an input formatting module performing baseband formatting and outputting at least one Physical Layer Pipe (PLP) data; a BICM module error-correction processing the PLP data; a framing & interleaving module interleaving the PLP data and generating a signal frame; and a waveform generating module inserting a preamble into the signal frame and generating a broadcast signal by performing OFDM modulation. |
| US10129065B2 |
Tail cancelation and addition of unique word for orthogonal frequency division multiplexing
Precoding, a symbol permutation operation, or pulse shaping may be used to suppress or cancel a tail or head of a symbol. Precoding may include utilization of a suppression vector. A unique word (UW) may be added to the suppression vector before spreading. The symbol and values of the suppression vector may be spread by a spreading function(s) and may be shaped prior to transmission. |
| US10129061B2 |
Apparatus and method for sending and receiving broadcast signals
A broadcast signal transmitter is disclosed. A broadcast signal transmitter according to an embodiment of the present invention comprises an input formatting module performing baseband formatting and outputting at least one Physical Layer Pipe (PLP) data; a BICM module error-correction processing the PLP data; a framing & interleaving module interleaving the PLP data and generating a signal frame; and a waveform generating module inserting a preamble into the signal frame and generating a broadcast signal by performing OFDM modulation. |
| US10129059B2 |
Low latency multi-amplitude modulation receiver
A multi-amplitude modulation receiver includes a signal coupler block coupled to a mixer array block receiving a first input signal from the signal coupler block and a second input from a LO circuit that provides N overlapping phase signals. Outputs of the N mixer elements are coupled to a baseband filter (BBF) block then to a decision threshold block including decision threshold elements including a signal input and at least one comparator receiving at least one VTH value. A phase ordering and mapper block selects M out of the N phases. A digital logic and control block is coupled to control a filter gain and corner frequency of the BBF block and control the VTH value for the decision threshold block which compares a signal received to the VTH value. Outputs from the decision threshold block are coupled inputs of an M-input decision combiner which provides a single data output. |
| US10129058B2 |
Demodulation reference signal based automatic gain control
When processing a signal received wirelessly a gain is applied to a reference signal and the wireless channel over which a received signal passed is estimated using the reference signal with the applied gain. Equalization values obtained from the estimating are adjusted to remove effects of the applied gain. Those adjusted equalization values are then used to equalize at least a data portion of the received signal. The results are stored in a computer readable memory, such as a buffer of a decoder also within the same receiver. Embodiments describe the received signal can be a subframe in which the reference signal is a DMRS or similar that occupies an entire symbol position thereof, as well as a single symbol in which the reference signal is a pilot sequence or pilot samples and the data portion is also within that same single symbol. |
| US10129056B2 |
Phase noise tracking and reduction
A group of data symbols for a current block of data symbols in multiple blocks received over a communication channel is equalized, based on a pilot block, to generate a group of equalized symbols. The group of equalized symbols is de-rotated as a function of a current phase estimate to determine initial de-rotated equalized symbols. The phase estimate is an estimate of phase caused by noise for blocks previous to the current block. Additionally, a phase metric is calculated from real and imaginary parts of the initial de-rotated equalized symbols, wherein the phase metric estimates phase caused by noise for the current block. The current phase estimate is updated with the phase metric. The initial de-rotated equalized symbols are de-rotated by the phase metric to determine final equalized and de-rotated symbol estimates. The final equalized and de-rotated symbol estimates are output. Apparatus, methods, and computer program products are disclosed. |
| US10129051B2 |
Method and apparatus for iterative interference cancellation and channel estimation of system based on FTN communication including pilot
Disclosed herein are a method and apparatus for iterative interference cancellation and channel estimation in a system based on FTN communication including a pilot. Interference of a pilot symbol on a data symbol is estimated, and the estimated interference is eliminated from a sequence of data symbols. When demodulation and channel decoding are performed on the sequence of data symbols, interference between data symbols and interference of a data symbol on a pilot symbol are estimated. Such estimation is repeatedly performed, and as FTN interference is repeatedly estimated and eliminated, channel estimation performance is improved, and through the improved channel estimation performance, the reception performance of the entire system is improved. |
| US10129049B2 |
Data transmission method and media access controller
Embodiments provide a data transmission method, including: receiving, by a receiving circuit in a media access controller, N packets; generating, by a distributing circuit, a first data block and a second data block, where the first data block includes a first set, and the second data block includes a second set; distributing the first data block to a first circuit, and distributing the second data block to a second circuit; converting, by the first circuit, the first data block into first data, and converting, by the second circuit, the second data block into second data; and sending, by the first circuit, the first data through a first channel, and sending, by the second circuit, the second data through a second channel. In addition, another method and a corresponding media access controller are further provided. The foregoing technical solution helps reduce circuit resources occupied by an Ethernet interface. |
| US10129044B2 |
Method and apparatus for controlling smart device
The present disclosure relates to a method and an apparatus for controlling a smart device. The method includes: when a screen of the terminal is locked and it is determined that a user performs a first preset operation on a control key on the lock screen of the terminal, acquiring information regarding at least one smart device through a preset smart-home Internet-of-Things (IoT) protocol and displaying the acquired information on a control interface of the terminal; and when it is detected that the user performs a second preset operation related to a smart device displayed on the control interface, controlling, according to the second preset operation, the smart device through the smart-home IoT protocol. |
| US10129039B2 |
Method of online charging a guest user of an application content provider
The invention proposes a method of integrating a service of an application content provider in an IMS core network, and the method includes the step of: allowing a network user to click-to-dial a mobile caller by using a network account. Preferably the step of allowing a network user to click-to-dial a mobile caller by using a network account is performed by providing an open application program interface between the application content provider and a call session control function. |
| US10129036B2 |
Post-processing mechanism for physically unclonable functions
In accordance with embodiments disclosed herein, there is provided systems and methods for providing a post-processing mechanism for physically unclonable functions. An integrated circuit includes a physically unclonable function (PUF) unit including an adaptive PUF logic. The adaptive PUF logic receives a PUF response having a plurality of bits. The adaptive PUF logic also determines whether a record exists for bit among the plurality of bits in the PUF response. The record includes a stored bit location and a stored bit value corresponding to the stored bit location. The adaptive PUF logic also overrides a bit value of the bit in the PUF response with the stored bit value when it is determined that the record exists for the bit in the PUF response. The bit value of the bit in the PUF response is different from the stored bit value. |
| US10129032B2 |
Secure revisioning auditing system for electronic document files
Methods and systems for providing secure recording of revisions made to electronic documents, using secure methods to validate the recorded changes, are disclosed. An electronic device making a change to an electronic document can transmit the change to the network. An audit log chain is residing on the network and shared among all the nodes on the network. A node on the network can verify a change of document made by other nodes and add a new block to the chain using one-way hashes, making the chain resistant to tampering. If an invalid block is detected, the system can send an auditing alert to the network. The audit log can be strongly resistant to tampering, providing reliable evidence for use in audit compliance, investigations, and business or court record keeping. |
| US10129030B2 |
Information delivery system, information delivery method, short-range communication device, information delivery apparatus, and server
A wearable device generates a temporary ID, generates an encrypted user ID, and transmits the temporary ID and the encrypted user ID to a shop system. The shop system receives the temporary ID and the encrypted user ID, transmits a temporary ID corresponding to the received temporary ID and the encrypted user ID to a server, and transmits the temporary ID transmitted by an identifier transmission unit and waiting state information to the server. The server stores the user ID in association with an information delivery destination of the user ID, receives the encrypted user ID and the temporary ID, associates the temporary ID and the information delivery destination of the user ID, receives the temporary ID and the waiting state information, and transmits the waiting state information to the information delivery destination of the user ID corresponding to the temporary ID. |
| US10129029B2 |
Proofs of plaintext knowledge and group signatures incorporating same
Systems and methods are provided for proving plaintext knowledge of a message m, encrypted in a ciphertext, to a verifier computer. The method includes, at a user computer, encrypting the message m via a predetermined encryption scheme to produce a ciphertext u, and generating a plurality l of challenges ci, i=1 to l, dependent on the ciphertext u. For each challenge ci, the user computer generates a cryptographic proof Π2i comprising that challenge ci and a zero-knowledge proof of plaintext knowledge of the message m encrypted in the ciphertext u. The user computer sends the ciphertext u and the l proofs Π2i to the verifier computer. Each challenge ci is constrained to a predetermined challenge space C permitting identification, by searching the challenge space C, of an element ci″ such that the message m can be obtained via a decryption operation using the ciphertext u, the element ci″, and a decryption key of said encryption scheme. |
| US10129028B2 |
Relational encryption for password verification
A method of equality verification using relational encryption including receiving a relational key that includes a first relational key component and a registration ciphertext that includes an encryption of a first plaintext data set. The method includes storing the registration ciphertext without decrypting the registration ciphertext. After the storing of the registration ciphertext, the method includes receiving an authentication request and communicating a safeguard data set that includes a random challenge in response to the authentication request. The method includes receiving an encrypted response that is generated based on the safeguard data set and a second plaintext data set. The method includes verifying a relationship between the encrypted response and the registration ciphertext using the relational key without decrypting the encrypted response and without decrypting the registration ciphertext. The relationship indicates that equality exists between the first and the second plaintext data sets. |
| US10129025B2 |
Binding data to a network in the presence of an entity with revocation capabilities
Implementations of the disclosure provide for binding data to a network in the presence of an entity with revocation capabilities. A cryptographic system is provided that includes a memory to store revocation information comprising a plurality of identifiers and a processing device operatively coupled to the memory. A provisioning public key is recovered in view of a first intermediate public key associated with a client device storing encrypted data. A binding identifier is generated for the client device in view of the provisioning public key. It is determined whether access to the encrypted data associated with the binding identifier is revoked or allowed in view of the revocation information. Responsive to determining that the access is allowed, provide a second intermediate public key to derive an encryption key to access the encrypted data in view of at least the provisioning public key and the first intermediate public key. |
| US10129024B2 |
Encrypted file storage
Various systems facilitate encrypted file storage. A client device may generate an encrypted version of a file. The client device may obtain at least one reference to at least one storage location for the encrypted version of the file. The client device may cause the encrypted version of the file to be store at the at least one storage location using the at least one reference to the at least one storage location. |
| US10129016B2 |
Data serializer
A serializer circuit may include a recovery circuit, an adjusting circuit, and a multiplexer circuit. The recovery circuit may be configured to receive a first data signal at a first frequency, to generate a first clock signal at the first frequency using the first data signal, and to retime the first data signal based on the first clock signal to generate a retimed first data signal. The adjusting circuit may be configured to receive a second data signal and retime the second data signal based on the first clock signal to generate a retimed second data signal. The multiplexer circuit may be configured to multiplex the retimed first data signal and the retimed second data signal. |
| US10129011B2 |
System and method for reducing false preamble detection in a communication receiver
An apparatus comprising: a signal detection circuit determine a count reached by a counter between successive detected edge signals and to provide an indication of whether successive detected edge signals are separated from each other by at least a prescribed time interval; a clock circuit that produces clock signal pulses in response to a provided indication of an occurrence of a succession of detected edge signals each separated from a previous edge signal of the succession by at least the prescribed time interval; phase matching circuitry configured to align the produced clock signal pulses with detected edge signals; and a pattern matching circuit that that samples a sequence of detected edge signals aligned with the produced clock signal pulses to detect a data packet. |
| US10129010B2 |
Dual-mode radio system having a full-duplex mode and a half-duplex mode
Embodiments of a dual-mode radio system are disclosed. In one embodiment, the radio system includes a first radio unit including a transmitter, a receiver, an antenna, and switching circuitry adapted to couple either an output of the transmitter of the first radio unit or an input of the receiver of the first radio unit to the antenna of the first radio unit. In addition, the radio system includes a second radio unit including an antenna and either a transmitter having an output coupled to the antenna of the second radio unit, a receiver having an input coupled to the antenna of the second radio unit, or both a transmitter having an output selectively coupled to the antenna of the second radio unit and a receiver having an input selectively coupled to the antenna of the second radio unit. The radio system has both a full-duplex mode and a half-duplex mode. |
| US10129009B2 |
Electronic device, method and system for half duplex data transmission
An electronic device and method for half duplex data transmission in a long range keyless entry and go system, and more specifically to an RFID transponder, a corresponding read/write (R/W) unit and methods for operating the RFID transponder and the R/W-unit. There is a first coil, a second coil and a third coil, being arranged as a three-dimensional antenna, a first capacitor, a second capacitor and a third capacitor couplable in parallel to the first coil, the second coil and the third coil, respectively, for selectively forming a first, a second and a third parallel-resonant circuit for receiving radio signals, a series-resonant circuit for transmitting radio signals and a control stage configured to either use one of the first, second or third parallel-resonant circuits for receiving radio signals or the series-resonant circuit for transmitting signals. |
| US10129008B2 |
Module
A module includes: a first filter connected between an antenna terminal and a first terminal and allowing a signal in a first frequency band from 2.4 to 2.5 GHz to pass therethrough; a second filter connected between the antenna terminal and a second terminal and allowing a signal in a second frequency band from 5.0 to 6.0 GHz to pass therethrough; a switch selecting and connecting a first or second port to the antenna; a third filter connected between the first port and a third terminal and allowing a signal in a third frequency band between the first and second frequency bands to pass therethrough; and a fourth filter connected between the second port and a fourth terminal and allowing a signal in a fourth frequency band that is between the first and second frequency bands and partially overlaps or is continuous with the third frequency band to pass therethrough. |
| US10129007B2 |
Answer information feedback method, answer information reception method, and related apparatuses
An answer information feedback method includes steps of: with respect to a current uplink subframe of a primary carrier in a TDD mode, determining, by a terminal, a downlink subframe of a secondary carrier in an SDL mode and corresponding to the current uplink subframe in answer information feedback as a to-be-fed-back downlink subframe, the to-be-fed-back downlink subframe being determined from designated downlink subframes of the secondary carrier in accordance with a downlink retransmission timing mode for a DL-reference UL/DL configuration of the secondary carrier, the designated downlink subframes including downlink subframes except a downlink subframe having a location identical to an uplink subframe indicated by the DL-reference UL/DL configuration, the DL-reference UL/DL configuration being identical to a timeslot configuration of the primary carrier; and transmitting answer information for the to-be-fed-back downlink subframe to a network side using the current uplink subframe. |
| US10129003B2 |
Method and apparatus for interference mitigation utilizing antenna pattern adjustments
A system that incorporates the subject disclosure may perform, for example, a method for receiving interference information, identifying a plurality of interferers, approximating a location of the plurality of interferers, and adjusting an antenna pattern of an antenna. The method can include determining traffic loads and adjusting the antenna pattern according to the traffic loads. Other embodiments are disclosed. |
| US10128999B2 |
Efficient protection of basic service set traffic
Methods, systems, and devices are described for wireless communication. An access point may use a protection mechanism to cause stations to defer from accessing the wireless medium during a quiet duration. During the quiet duration the access point may transmit data packets to stations. After the quiet duration, a contention period may be present to allow stations to monitor the medium to make sure the medium is continuously idle before attempting a transmission. The access point may determine a quiet duration based on a number of data packets pending transmission to at least one station. Furthermore, the access point may transmit data packets to a number of stations during the quiet duration. By determining the quiet duration based on a number of data packets, the access point may reduce the overall number of contention periods which may increase throughput and decrease power consumption. |
| US10128993B2 |
Systems and methods of adaptive frame structure for time division duplex
A time division duplex (TDD) transmission time interval (TTI) communicating transmissions in a first direction may include one or more regions for communicating in a second direction, where the first direction is a transmit direction and the second direction is a receive direction, or vice versa. A radio frame may include TDD TTIs with such regions and/or TDD TTIs without such regions for wireless communication, and these TDD TTIs may further be configured in accordance with different frame structure configurations, such as different TTI lengths, subcarrier spacings or symbol durations. |
| US10128990B2 |
Terminal, base station, transmission method, and reception method
If repetition transmission is applied to a response signal for a downlink data signal and an uplink signal, the uplink signal is repeatedly transmitted using a certain number of consecutive subframes starting with a first subframe, at which the repetition transmission of the uplink signal starts, and the response signal is repeatedly transmitted using at least the certain number of consecutive subframes starting with a second subframe, at which the repetition transmission of the response signal starts. The first subframe is set to be the same as the second subframe. |
| US10128987B2 |
Scalable receive window auto-tuning
Examples of the disclosure dynamically scale receive window auto-tuning. Tuning data is obtained, including the number of bytes in a receive buffer and the distribution of receive packets over time. Aspects of the disclosure use this tuning data to determine rates at which one or more applications on the receiving computer are consuming data and adjust or maintain the receive buffer accordingly in a dynamic manner to scale a receive window to current conditions. |
| US10128986B2 |
Method and apparatus for controlling soft buffer for TDD-FDD carrier aggregation
Provided is a method and apparatus for controlling soft buffer for TDD-FDD carrier aggregation. The method includes: establishing a Radio Resource Control (RRC) connection with a base station through a first serving cell, the first serving cell supporting a Time Division Duplex (TDD) mode; receiving an RRC message from the base station through the first serving cell, the RRC message comprising carrier aggregation (CA) configuration information, the CA configuration information comprising information of a second serving cell supporting a Frequency Division Duplex (FDD) mode; determining a maximum number of DL HARQ processes for the second serving cell, the maximum number of DL HARQ processes for the second serving cell being differently determined according to a DL reference timing; and storing soft channel bits for a received transport block (TB) based on the determined maximum number of DL HARQ processes for the second serving cell. |
| US10128978B2 |
Receiver, method for cancelling interference thereof and transmitter for the same
Provided is a method for eliminating an interference operating on a receiver of a transmitter in a communications system, which includes transmitting at least one user signal; changing user phase information to be separated from interference phase information by a preset difference, when receiving the user phase information of the user signal and the interference phase information of an interference signal from at least one receiver; and transmitting at least one other user signal according to the changed user phase information. |
| US10128977B2 |
Transmitting a first and a second channel quality information between two network elements
It is described a method for transmitting channel quality information between a second network element and a first network element. The method comprises includes (a) dividing a range of possible radio channel qualities between the two network elements into a fixed number of quality classes, (b) measuring the quality of a radio channel between the two network elements, (c) selecting one quality class out of the fixed number of quality classes based on the measured quality of the radio channel, (d) transmitting from the second network element to the first network element a first channel quality information being indicative for the selected quality class, and (e) transmitting from the second network element to the first network element a second channel quality information being indicative for the measured quality within the limits of the selected quality class. It is further described the first and the second network element, which in conjugation with each other are adapted to carry out the described method. |
| US10128976B2 |
Radio wave jamming system, radio wave jamming apparatus, and radio wave jamming method
A radio wave jamming system (1) comprises a plurality of radio transmitters (10) that are adapted to transmit respective jamming signals (11) including substantially the same frequency. The plurality of radio transmitters (10) are further adapted to temporally change at least one of the transmission phases of the jamming signals (11), which are to be transmitted from the plurality of radio transmitters (10), so as to temporally change the phase differences among the jamming signals (11) when the jamming signals (11) transmitted from the plurality of radio transmitters (10) arrive at a particular site (50). Thus, for example, a radio wave jamming system that can be constituted by small-output radio devices can be provided. |
| US10128972B2 |
Method for converting wavelength of optical signal in passive optical network
According to the present disclosure, a controlling unit arbitrarily determines a current set temperature of a temperature setting unit to cause a light generating unit connected to the temperature setting unit to generate an optical signal having a wavelength according to the current set temperature, thereby making it possible to effectively reduce a wavelength overlap phenomenon that may occur when a plurality of R-ONUs in a passive optical network simultaneously transmit the optical signals. |
| US10128971B2 |
Multi wavelength routing plane optical architecture
Example embodiments of the present invention relate to a multi wavelength-routing-plane optical architecture. Example embodiments include a Reconfigurable Optical Add Drop Multiplexer (ROADM) supporting a multi wavelength-routing-plane optical architecture, and optical networks supporting a multi wavelength-routing-plane optical architecture. |
| US10128968B2 |
Satellite downlink signal performance monitoring at identified antennas
A satellite monitoring system is disclosed. The system may monitor various downlink signals of various satellites. In response to user queries, the system may provide diagnostic and other data related to the characteristics of the downlink signals. In this manner, an independent verification and validation of downlink signal characteristics may be performed. Moreover, the system may take various actions in response to detected anomalies related to the characteristics of the downlink signals, such as automatically generating alerts for users and/or activating an uplink facility, such as a backup uplink facility and/or providing control signals to user devices, such as antenna controllers, to reorient user antennas in response to the characteristics of the downlink signals. |
| US10128961B2 |
Angular electrode
An electrode having a first metallic plate; and a second metallic plate arranged at an angle of greater than 0° and less than 180° with respect to the first metallic plate. |
| US10128960B2 |
Estimation method for optical receiver and light source device
A method for estimating characteristics of an optical receiver includes: a generating process, a monitoring process, a suppressing process, a guiding process and an estimating process. The generating process generates a modulated optical signal based on an oscillation signal. The monitoring process monitors an optical spectrum of the modulated optical signal or a spectrum of an electric signal obtained by performing optical-to-electrical conversion on the modulated optical signal. The suppressing process suppresses a modulation component of an upper sideband or a lower sideband of the modulated optical signal based on the optical spectrum of the modulated optical signal or the spectrum of the electric signal. The guiding process guides the modulated optical signal in which the modulation component is suppressed to the optical receiver. The estimating process estimates the characteristics of the optical receiver based on an output signal of the optical receiver. |
| US10128959B1 |
Tap centerer method and structure for coherent optical receiver
A method and structure for tap centering in a coherent optical receiver device. The center of gravity (CG) of the filter coefficients can be used to evaluate a proper convergence of a time-domain adaptive equalizer. However, the computation of CG in a dual-polarization optical coherent receiver is difficult when a frequency domain (FD) adaptive equalizer is adopted. In this case, the implementation of several inverse fast-Fourier transform (IFFT) stages is required to back time domain impulse response. Here, examples of the present invention estimate CG directly from the FD equalizer taps and compensate for an error of convergence based off of the estimated CG. This estimation method and associated device architecture is able to achieve an excellent tradeoff between accuracy and complexity. |
| US10128956B2 |
Calibration of pluggable optical module
An optical communications apparatus comprising a host (100) and an optical module (200) comprising a Mach-Zehnder modulator (202), MZM, wherein the optical module is removably connected to the host via a connection path, the optical communications apparatus comprising: a signal generator (101) at the host, configured to generate a plurality of calibration signals at a plurality of frequencies; a host interface (102) configured to transmit the calibration signals to the optical module via the connection path; a module interface (201) configured to receive the transmitted calibration signals; wherein the MZM is configured to use the calibration signals to modulate a laser light source (206) and biased to a point at which average output power is proportional to the output modulated signal; an optical detector configured to measure an average magnitude of an output of the MZM when each of the calibration signals is used to modulate the laser light source; one of a host calibration unit (103) and a module calibration unit (203), configured to determine a magnitude response of the connection path based on the measured average magnitudes and magnitudes of the respective calibration signals, and further configured to determine a pre-emphasis characteristic based on the magnitude response, the pre-emphasis characteristic for application to signals transmitted by the optical transmitter in use. |
| US10128953B2 |
High-speed pluggable optical transceivers with advanced functionality
An optical transceiver configured to operate in a host device includes an electrical interface communicatively coupled to the host device to interface electrically with the host device, wherein the optical transceiver is compliant with a Multi-Source Agreement (MSA) which is supported by the host device; optical transceiver components communicatively coupled to the electrical interface, wherein the optical transceiver components are configured to optically interface signals with a second optical transceiver to form an optical link; and electronic dispersion compensation circuitry communicatively coupled to the optical transceiver components and configured to electronically compensate for optical fiber chromatic and/or polarization mode dispersion associated with the optical link, separate and independent from the host device. |
| US10128945B2 |
MIMO visible light communication system receiving device
A receiving device for a multi-input multi-output (MIMO) visible light communication system includes a collimation unit, a metal thin film, a transparent substrate and a receiving unit. The receiving device performs receiving by using optical components, and uses the metal thin film as a main receiving component, which plays a role of filtering and enhanced transmission, and equals to implementing a function of filtering and signal amplification by using electronic components, but overcomes the nonlinear effect of the electronic components, thereby solving the problem of waveform distortion in receiving. |
| US10128942B2 |
Method of transmitting an optical data signal via a fiber optical medium in opposite directions at the same carrier wavelength
The described method relates to fiber optic communication engineering and can be used in fiber optic communication systems for creating several independent communication channels. One object of the method is to increase the utilization efficiency of the optic fibers by using optical signals transmitted in opposite directions at one wavelength. |
| US10128941B2 |
Dimming control for orthogonal frequency division multiplexing-based visible light communication
A method of dimming control for orthogonal frequency division multiplexing (OFDM)-based visible light communication (VLC). The method includes transmitting, by an optical communication device, an optical signal using OFDM with all active sub-carriers when a first dimming level is observed, transmitting, by the optical communication device, the optical signal using OFDM with a first subset of active sub-carriers and without sub-carrier index modulation (SIM) when a second dimming level is observed, wherein the second dimming level is less than the first dimming level; and transmitting, by the optical communication device, the optical signal using OFDM with a second subset of active sub-carriers and with SIM when a third dimming level is observed, wherein the second subset of the active sub-carriers is smaller than the first subset of the active sub-carriers, and wherein the third dimming level is less than the second dimming level. |
| US10128937B2 |
Data management method and data management system
A management device is connected with a plurality of relay devices, and the relay devices store data collected by a device. The management device registers, when a connection notification is received from one of the relay devices, relay device identification information, which identifies the relay device, of the relay device serving as the request destination when the data is acquired, sends a data acquisition request to the specified relay device, and sends, to one of the relay devices, relay device identification information of the target relay device targeted for deletion. The plurality of the relay devices associates, when the identification information targeted for the deletion is received, inquiry destination information specifying the target relay device with the data, and performs, when the data acquisition request is received, response control of the data on the basis of the determination of whether the inquiry destination information is associated with the data. |
| US10128935B2 |
Partial downlink repeater apparatus and methods useful in conjunction therewith
For use with a cellular communication network having a base station transmitting downlink signals received by mobile device/s: a downlink signal reception enhancement system including partial repeater apparatus enhancing quality of reception of at least a portion of downlink signal/s by mobile device/s, the partial repeater apparatus including a downlink receiver receiving at least a portion of downlink signal/s arriving from the base station; a controller including a critical region selector, selecting only a portion of at least one individual downlink signal; and a partial transmitter generating signal/s by regenerating, according to characteristic/s of at least one of a downlink signal and the mobile device, at least the portion selected by the critical region selector, and to transmit a signal including at least the regenerated portion plus less than all of the individual downlink signal. |
| US10128934B2 |
Method and repeater for broadband distribution
Aspects of the subject disclosure may include, for example, a method that includes extracting first channel signals from first guided electromagnetic waves bound to an outer surface of a transmission medium of a guided wave communication system; amplifying the first channel signals to generate amplified first channel signals in accordance with a phase correction; selecting one or more of the amplified first channel signals to wirelessly transmit to at least one client device via an antenna; and guiding the amplified first channel signals to the transmission medium of the guided wave communication system to propagate as second guided electromagnetic waves, wherein the phase correction aligns a phase of the second guided electromagnetic waves to add in-phase with a residual portion of the first guided electromagnetic waves that continues propagation along the transmission medium. |
| US10128923B2 |
Method and device for configuring waveform at transmitter
Method and device for configuring a waveform at a transmitter are provided. The method includes: receiving at least one input signal, each input signal corresponding to a subcarrier spacing setting; performing IDFT pre-processing to each input signal, the IDFT pre-processing including DFT pre-coding or offset modulation; performing IDFT to each input signal which is subjected to the IDFT pre-processing, the IDFT including an IDFT with parameters including resource mapping and a corresponding IDFT size; performing IDFT post-processing to each input signal which is subjected to the IDFT to obtain at least one output signal, the IDFT post-processing including cyclic extension and time-domain windowing; adding the at least one output signal in time domain; and transmitting the added signal through a corresponding antenna port. Waveforms are configured flexibly according to practical scenarios at the transmitter to determine a most suitable waveform for current scenario, which meets practical requirements of 5G technology. |
| US10128921B2 |
Multi-user multiple-input multiple-output (MU-MIMO) operation and user selection
System and method of Multi-User Multiple-Input Multiple-Output (MU-MIMO) Beamforming communication. An MU-MIMO BF training session is used to train all the responders in a user group in relation to an initiator having multiple antenna arrays. Accordingly, suitable TX-RX sector pairs are selected based on the training results, and the user group is arranged into subsets such that the initiator can transmit data to the responders in one subset simultaneously by using mutually orthogonal BF waveforms. Prior to the MU-MIMO BF training session, the initiator can select TX sectors of the TX antennas and responders for the training session based on results from a prior or preliminary SISO BF training. |
| US10128913B2 |
Method and circuit of an actively transmitting tag
A circuit of an actively transmitting tag includes an antenna, a digitizer, a voltage-controlled oscillator (VCO), an output amplifier, a phase-displacement detector, and a regulator. The input of the digitizer connects to the antenna. The outputs of the digitizer and the output amplifier are connected to the input terminals of the phase-displacement detector. The output amplifier connects the output of the VCO to the antenna and the regulator connects the output of the phase-displacement detector to the VCO. |
| US10128906B2 |
Power line signal coupler
A main power line (+ and − lines) is coupled to a power supply, for example a car battery, grounded to a vehicle chassis. Positive and negative main power lines are coupled to a power line gateway module, and spliced to carry power for a segment, until receiving, by splices, RF power line communcations. The main power lines, now carrying power and RF power line communications are then coupled to remote modules. RF power line communication carries signal from the power line gateway module to a impedance matching network or a transformer are used to match impedances. |
| US10128905B2 |
Method and system for impulsive noise classification and mitigation
A system for classifying impulsive noise on a communications signal comprises an impulse signal generator, an integrator, a first comparator, and an impulse peak detector. The impulse signal generator receives a communications signal that includes impulsive noise and is configured to provide an impulse signal that includes just the impulsive noise. The integrator receives the impulse signal and integrates the impulse signal to determine the power of the impulse signal. The first comparator receives the impulse signal and is configured to compare the impulse signal to a first reference signal and indicate the time during which the value of the impulse signal is greater than the value of the first reference signal. The impulse peak detector receives the impulse signal and is configured to process the impulse signal, compare the processed signal to a second reference signal, and detect the peak value of the impulse signal. |
| US10128904B2 |
Low-latency bi-directional repeater
A repeater circuit is disclosed. The repeater circuit is coupled to a transmission line driven by a first transmitter circuit and configured to detect a signal transition from a first voltage level to a second voltage level at a first position on the transmission line. The repeater circuit then reinforces the signal transition from the second voltage level to a third voltage level at the first position on the transmission line without interrupting a current through the transmission line. |
| US10128893B2 |
Method and system for planar, multi-function, multi-power sourced, long battery life radio communication appliance
A multifunction electronic key is provided with at least one wireless communication interface that can function as an access control key to unlock an electronic lock when the key is placed in proximity of an electronic lock that has been previously configured to allow temporal access to the said electronic key, and at least one of the following functions: a) Measure the electric field experienced by the device, process it and optionally send it to a second wireless device; b) A physical button to communicate a distress signal to a second wireless device, in response to which the second wireless device estimates the position of the electronic key and generates a system alarm indicating the identity of the electronic key that generated the alarm and its position estimate; c) Measures the device's motion, process it and optionally send it to a second wireless device; d) One or two way audio communication via the wireless link; e) Measures ionizing radiation. |
| US10128892B1 |
Generic SerDes tuning module
Systems and methods of tuning SerDes links between transmitter SerDes channels and receiver SerDes channels are described. Generally, the SerDes links may be tuned using a generic SerDes tuner implementation and a tuning algorithm. The tuning algorithm may have a first tuner interface specific to the transmitter SerDes device and a second tuner interface specific to the receiver SerDes device. The tuning algorithm may define a sequence of operations from the first tuner interface and the second tuner interface that when executed result in calibration of the SerDes link. |
| US10128891B2 |
Mobile phone / tablet shell with finger grasping ring
A mobile phone/tablet case with finger grasping ring comprises a box for receiving a body of the mobile phone or tablet, a finger grasping ring is provided on the box bottom; the finger grasping ring is provided a multiple of finger holes which are enterable by fingers. Another embodiment the finger grasping ring has an elastic valve and an elastic belt; the elastic valve has one side connected with the elastic bottom together and other sides are separated from the bottom; the elastic belt has two opposite ends connected with the elastic valve together and other two opposite sides separated from the elastic valve, the elastic belt is parallel to long sides of the box. When the middle finger of user enter the gap between the belt and valve, the case with a mobile phone/tablet is grasped without thumb. |
| US10128888B2 |
Tablet computer case
A device case for a portable electronic device includes a device stand attached to a hack surface of the case housing. The device stand is formed by an inner stand and outer stand connected by releasable hinged connections to the back surface of the case housing. A track is formed on a surface of the outer stand that the inner stand slides along. A locking portion such as a cavity or channel on the outer stand locks the inner stand into an open position with respect to the outer stand. At least a portion of the outer stand is flexible such that applying a threshold pressure to the device case causes the portion of the outer stand to flex such that the locking portion releases the inner and outer stand from the open position without damaging the stand. |
| US10128886B1 |
Radio frequency (RF) receivers and methods to spread spectral energy of spurious outputs
Radio frequency (RF) receivers and methods to spread spectral energy of spurious responses of mixers over a frequency band are disclosed. For example, a receiver includes first and second mixers, and first and second variable frequency oscillators (VFOs). The first mixer is configured to receive an RF signal and provide an intermediate frequency (IF) signal. The second mixer is coupled with the first mixer and configured to receive the IF signal and provide a baseband signal. The first VFO is coupled with the first mixer and configured to provide a first angle modulated LO signal. The second VFO is coupled with the second mixer and configured to provide a second angle modulated LO signal. The first and second mixers provide a stable frequency downconversion. |
| US10128884B2 |
Antenna interface circuit, data card, and antenna connection control method and apparatus
A circuit includes a main connector and a single-pole double-throw switch. A common contact of the main connector is used as a port of a main receiver, and a normally-closed contact of the main connector is used as a port of a main antenna. Furthermore, a normally-open contact of the main connector is used as a port of an external antenna, and a common contact of the single-pole double-throw switch is used as a port of a diversity receiver. Additionally, a normally-closed contact of the single-pole double-throw switch is used as port of a diversity antenna, and a normally-open contact of the single-pole double-throw switch is connected to the normally-closed contact of the main connector. |
| US10128881B2 |
Time to digital converter, radio communication device, and radio communication method
A time to digital converter has a counter, a first phase difference detector, a first capacitor, a second capacitor having capacitance N times a capacitance of the first capacitor, a comparator to compare a charge voltage of the first capacitor with a charge voltage of the second capacitor, a first charge controller, a first phase difference arithmetic unit, a second phase difference detector, a second charge controller, a second phase difference arithmetic unit to operate the phase difference between the first signal and the second signal, and a third phase difference arithmetic unit to detect a fractional phase difference between the first signal and the second signal. The first phase difference arithmetic unit operates the phase difference between the first signal and the second signal, based on a reference phase, when the counter suspends a measurement operation. |
| US10128879B2 |
Enhanced receive sensitivity for concurrent communications
A system using multiple communication technologies for concurrent communication is disclosed. The system includes a loopback receiver, a receiver, and a noise remover component. The loopback receiver is configured to obtain a coupled signal and generate a noise signal from the coupled signal. The noise signal includes direct transmission noise. The receiver is configured to receive a chain receive signal and to provide a receive signal therefrom. The noise remover component is configured to generate a wanted receive signal from the noise signal and the receive signal. |
| US10128877B2 |
Network assisted interference cancellation and suppression, methods and devices for controlling the same
The disclosure discloses Network Assisted Interference Cancellation and Suppression (NAICS), methods and devices for controlling the same, which are configured to reduce processing complexity of User Equipment (UE) in NAICS under the condition of no excessive high-layer signalling overhead and no waste of a Carrier Aggregation (CA) capability of the UE in a CA scenario. The method for NAICS includes that: the UE receives an Interference Cancellation (IC) indication message sent by a Node B, and the IC indication message includes an Identifier (ID) of a Component Carrier (CC) which is targeted when the UE performs NAICS. The CC is a CC which performs CA transmission on the UE; and the UE performs NAICS on the CC according to the IC indication message. |
| US10128876B2 |
Efficient output power combining digital microwave radio system
A digital microwave radio system includes a splitter that splits a common baseband input into two baseband outputs, first and second transmitters, each transmitter electrically connected to a baseband output of the splitter via a mixer, a common local oscillator electrically connected to the mixer of the first transmitter and the mixer of the second transmitter via an adjustable phase shifter, respectively, and a combiner. The common local oscillator is configured to up-convert each baseband output into a radio-frequency signal using a corresponding mixer. The combiner combines the two radio-frequency signals into a 0-degree phase-shift output and a 180-degree phase-shift output, respectively. A phase error control loop adjusts the phase shifter to minimize the 180-degree phase-shift radio-frequency output. A combiner gain control loop adjusts the output power level of the two transmitters in accordance with an actual power detector reading at the 0-degree phase-shift radio-frequency output. |
| US10128875B1 |
Methods and system of a digital transmitter with reduced quantization noise
A digital transmitter includes baseband interfaces to generate digital baseband signals with baseband frequencies, digital-upconverting stages to upconvert the baseband frequencies to first radio frequencies having a predetermined frequency range, a M-Band ΔΣM modulator to modulate the up-stage signals based on noise shaping and noise quantization processes, delay registers to align phases of the modulated up-stage signals, a noise canceler to generate noise canceling signals with a converted polarity, a Switch Mode Power Amplifier to amplify the phase aligned modulated up-stage signals up to a predetermined power level, a linear power amplifier to amplify the noise canceling signals up to the predetermined power level, a power combiner to combine to generate transmitting signals by combining the amplified phase aligned modulated up-stage signals and the amplified noise canceling signals, and an antenna to transmit the transmitting signals. |
| US10128872B2 |
Enabling radio frequency multiplexing in a wireless system
A communication device comprises a set of filters that are selectively coupled to different groups of front end ports and an antenna port to form a diplexer, a single filter or a no filter connection for transmission and reception of different data signals. A processor operates to selectively determine or combine filters and couple them to the front end ports and the antenna port based on an operational mode and a frequency separation of signals operating in different frequency ranges of different operating bands. The operational mode can alter between a carrier aggregation mode, in which more than one operating band is aggregated during transmission or reception, and a non-carrier aggregation mode, in which only one filter, no filters or the diplexer is bypassed. The insertion loss of the transmissions and receptions can also be actively decreased. |
| US10128868B1 |
Efficient dictionary for lossless compression
Various systems and methods for lossless data compression are described herein. A process for lossless data compression includes hashing an input byte stream to produce a hash key; identifying a set of dictionary entries in a hash table using the hash key, the hash key associated with a word from a compact dictionary; identifying a set of candidate words from the compact dictionary based on the identified set of dictionary entries, the compact dictionary being a subset of a standard dictionary; determining a best match of the set of candidate words with the input byte stream; and encoding the best match of the set of candidate words as a compressed output of the input byte stream, the encoding including an operation to determine an index into the standard dictionary of the best match and using the index in the encoding operation. |
| US10128864B2 |
Non-linear converter to linearize the non-linear output of measurement devices
A non-linear converter comprising a non-linear voltage divider having a plurality of resistors representing a non-linear transfer function, an analog multiplexer having analog multiplexer inputs coupled to the non-linear voltage divider and configured to output an analog multiplexer output, the analog multiplexer chooses one of the plurality of resistors based on a logic signal and the non-linear transfer function, an analog comparator having an analog comparator first input configured to receive an analog input voltage, an analog comparator second input configured to receive the analog multiplexer output and the analog comparator configured to output a comparator voltage output and a logic loop coupled to the analog comparator and configured to receive the comparator voltage output and configured to output the logic signal, wherein the logic signal represents a linearized digital word. |
| US10128863B2 |
Resistor-based configuration system
A configuration circuit for obtaining a digital code includes a controller circuit that generates a plurality of multibit control words. A digitally controlled current source circuit receives a multibit control word generated by the controller circuit. The digitally controlled current source circuit generates an output current that corresponds to the multibit control word in accordance with a predetermined output curve. A test voltage node receives the output current, and a test voltage develops in response to the output current. A reference voltage node develops a reference voltage, the level of which is independent of the multibit control word. A voltage comparison circuit (i) receives the test voltage and the reference voltage, (ii) compares the two voltages to produce a comparison result and (iii) sends the comparison result to the controller circuit. The digital code is obtained by the configuration circuit using the comparison result and the multibit control word. |
| US10128854B2 |
Oscillation circuit, electronic apparatus, and moving object
An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element having a frequency-temperature characteristic, and a frequency adjustment circuit having a capacitance circuit connected to the oscillating circuit and adapted to adjust an oscillation frequency of the oscillating circuit, and a logic circuit, to which a signal having been output from the oscillating circuit is input, and which adjusts a frequency of the signal, and the frequency adjustment circuit compensates the frequency-temperature characteristic using at least the capacitance circuit in a predetermined temperature range, and compensates the frequency-temperature characteristic using the logic circuit alone outside the predetermined temperature range. |
| US10128848B2 |
Level shifter
A level shifter that includes: a power supply system current source; a second transistor having a third main electrode that is connected to an input voltage signal terminal, a fourth main electrode that is connected to an output voltage signal terminal, and a second control electrode that is connected to a third power supply voltage having a voltage that is lower than a first power supply voltage and higher than a second power supply voltage; a second resistor; and a third transistor having a fifth main electrode that is connected to the second end of the second resistor, a sixth main electrode that is connected to the second power supply voltage, and a third control electrode that is connected to a first control electrode of a first transistor of the power supply system current source. |
| US10128846B2 |
Apparatus and method for data level shifting with boost assisted inputs for high speed and low voltage applications
The disclosure relates to a data level shifter circuit including a boost circuit configured to generate a boosted input data signal based on a transition of an input data signal; a first input transistor including a first control signal configured to receive the input data signal; a second input transistor including a second control terminal configured to receive the boosted input data signal, wherein the first and second input transistors are coupled in parallel between a node and a lower voltage rail; and a latch circuit configured to generate an output data signal based on the input data signal, wherein the latch circuit is coupled between an upper voltage rail and the node. |
| US10128842B1 |
Output impedance calibration for signaling
Methods, systems, and devices for output impedance calibration for signaling are described. Techniques are provided herein to adjust impedance levels associated with data transmitted using signaling and related techniques. In some cases, the signaling may be multi-level signaling. Such signaling may be configured to increase a data transfer rate without increasing the frequency of data transfer and/or a transmit power of the communicated data. |
| US10128833B2 |
Millivolt power harvesting FET controller
Circuits and methods for controlling a transistor that has first, second and third terminals, wherein a voltage level at said first terminal controls in part a current flow from said second terminal to said third terminal. A controller receives an voltage existing across the second and third terminals of the transistor, generates an isolated voltage and uses that voltage to power components of the controller. The controller provides a voltage to the first terminal of the transistor, whereby the controller regulates the voltage across the second and third terminals of the transistor by regulating the voltage provided to the first terminal. |
| US10128832B2 |
Converter system, driving circuit and method for semiconductor switch
The present application discloses a converter system, a driving circuit and a driving method for a semiconductor switch. The driving circuit includes a driving unit, a sampling unit and a selection unit. A plurality of turn-off driving units with different turn-off parameters is provided in the driving unit, and a turn-off driving unit having a turn-off parameter adaptive to the working state of the semiconductor switch is selected according to the working state of the semiconductor switch so as to turn off the semiconductor switch. |
| US10128830B2 |
Track and hold circuit
A track and hold circuit comprises an input buffer amplifier, a unit gain amplifier module, a sampling switch, a drive triode and a sampling capacitor. The input buffer amplifier receives an input signal. In a track phase, the sampling switch is electrically connected to an emitter electrode of the drive triode; the input signal charges the sampling capacitor after being buffered by the input buffer amplifier, amplified without distortion by the unit gain amplifier module and driven by the drive triode. In a hold phase, the sampling switch is electrically connected to a base electrode of the drive triode; the base voltage of the drive triode is pulled down until the drive triode is cut off; electrical charges on the sampling capacitor are thereby held, causing the signal to be held on the sampling capacitor. |
| US10128829B2 |
Composite semiconductor device
Provided is a composite semiconductor device that has a low on-resistance and a high load-short-circuit resistance. In a composite semiconductor device (10) including a normally-on first FET (Q1) and a normally-off second FET (Q2) that are cascode-connected to each other. In a case where a voltage applied to a drain of the first FET (Q1) is 400 V, a relation of the following expression is satisfied: [ Math . 1 ] RonQ 2 VTHQ 1 + 1 Id max 1 ≥ 1 Id max , where a time elapsed after short circuit T represents a time elapsed after a time at which a load connected to the composite semiconductor device (10) starts to be short-circuited, RonQ2 represents a value of an on-resistance of the second FET, VTHQ1 represents a threshold voltage of the first FET, Idmax1 represents a drain current of the first FET in a saturated state of the first FET when a gate voltage of the first FET is 0 V, and Idmax represents a drain current limited to an extent that breakdown of the first FET is prevented for the time elapsed after short circuit T of at least 2 μsec. |
| US10128828B2 |
Synchronous, internal clock edge alignment for integrated circuit testing
A synchronous clock edge alignment system and method increases detection coverage of transition delay faults that occur in logic circuits that have data released by a clock at an input of logic circuits internal to an integrated circuit and/or released at the output of the logic circuits when testing an integrated circuit. To increase detection coverage of inter-clock transition delay faults, in at least one embodiment, the synchronous clock edge alignment system and method align same transition type edges of internal data releasing clock signals, and at least two of the clock signals have different frequencies. By aligning the edges of the clock signals, transition delay faults that might otherwise not have occurred can be detected by, for example, a conventional circuit testing apparatus. Thus, aligning the edges of the clock signals increases detection of inter-clock transition delay faults. |
| US10128822B2 |
Integrated circuits for controlling slew rates of signals
An integrated circuit includes a differential signal driver that receives a first signal from a first input terminal, receives a second signal, which is a differential signal of the first signal, from a second input terminal, outputs a first output signal corresponding to the first signal to a first output terminal, and outputs a second output signal corresponding to the second signal to a second output terminal. The integrated circuit further includes a first capacitor unit connected to the first output terminal and controlling a slew rate of the first output signal based on a first capacitance, a second capacitor unit connected to the second output terminal and controlling a slew rate of the second output signal based on a second capacitance, and a phase selection unit that receives the first signal and provides the first signal to the second capacitor unit, and that receives the second signal and provides the second signal to the first capacitor unit, so as to control the slew rates of the first and second output signals. |
| US10128819B2 |
High rejection wideband bandpass N-path filter
Certain aspects of the present disclosure provide an N-path filter implemented using a generalized impedance converter (GIC) circuit. The GIC circuit is configured such that the N-path filter has a desired frequency response, which may include a wide passband with steeper rejection than a conventional N-path filter with only a single pole in each filter path. Certain aspects of the present disclosure provide an N-path filter having a frequency response with multiple concurrent passbands. In certain aspects, the N-path filter with multiple passbands is implemented using the GIC circuit. In other aspects, the N-path filter may include a bandpass response circuit where an inductance of the bandpass response circuit may be implemented using gyrators. |
| US10128816B2 |
High-frequency module
In a high frequency module, in addition to a main transmission path in which a high-frequency signal propagates in first filter elements, a sub transmission path is defined by inductive coupling or capacitive coupling between a first inductor and a matching element or by inductive coupling between the first inductor and a second inductor. The sub transmission path has different amplitude characteristics and phase characteristics from those of the main transmission path depending on a degree of the inductive coupling or capacitive coupling, and transmission characteristics as a high-frequency module are adjustable by adjusting the amplitude characteristics and the phase characteristics of the sub transmission path. |
| US10128814B2 |
Guided surface acoustic wave device providing spurious mode rejection
Embodiments of a Surface Acoustic Wave (SAW) device having a guided SAW structure that provides spurious mode suppression and methods of fabrication thereof are disclosed. In some embodiments, a SAW device includes a non-semiconductor support substrate, a piezoelectric layer on a surface of the non-semiconductor support substrate, and at least one interdigitated transducer on a surface of the piezoelectric layer opposite the non-semiconductor support substrate. A thickness of the piezoelectric layer, a SAW velocity of the piezoelectric layer, and an acoustic velocity of the non-semiconductor support substrate are such that a frequency of spurious modes above a resonance frequency of the SAW device is above a bulk wave cut-off frequency of the SAW device. In this manner, the spurious modes above the resonance frequency of the SAW device are suppressed. |
| US10128813B2 |
Bulk acoustic wave (BAW) resonator structure
A bulk acoustic wave (BAW) resonator comprises: a first electrode; a second electrode comprising a plurality of sides, wherein at least one of the sides is a connection side; a piezoelectric layer disposed between the first and second electrodes, and an acoustic reflective element disposed beneath the first electrode, the second electrode and the piezoelectric layer, wherein an overlap of the reflective element, the first electrode, the second electrode, and the piezoelectric layer defines an active area of the acoustic resonator; a bridge adjacent to a termination of the active area of the BAW resonator; and a discontinuity disposed in the bridge. |
| US10128812B2 |
Electrical resonator
An acoustic resonator comprises a substrate comprising a cavity. The electrical resonator comprises a resonator stack suspended over the cavity. The resonator stack comprises a first electrode; a second electrode; a piezoelectric layer; and a temperature compensating layer comprising borosilicate glass (BSG). |
| US10128810B2 |
Impedance matching structure of transmission line
An impedance matching structure is disposed on a circuit board for matching an impedance of a transmission line for transmitting an electronic signal. The structure includes: at least two redundant conducting sections coupled to different points between an input terminal and an output terminal of the transmission line, wherein the redundant conducting sections are apart from one another, and a first terminal of each of the redundant conducting sections is coupled to the transmission line, while a second terminal of each of the redundant conducting sections is apart from the transmission line; and at least one grounded conducting section, each of which corresponds to one of the redundant conducting sections, and surrounds in separation from the corresponding redundant conducting section, wherein each of the at least two redundant conducting sections is disposed in a corresponding plating hole. |
| US10128809B2 |
Intelligent method and apparatus for spectral expansion of an input signal
A method, and a corresponding apparatus, for processing an input signal comprise filtering the input signal to separate a passband frequency component of the input signal from a stopband frequency component of the input signal, and adjusting relative signal power values of the passband frequency component and the stopband frequency component of the input signal based at least in part on signal values of a number of samples associated with the input signal. In the case of audio signals, for example, such processing is used for spectral expansion of the input signal by enhancing the power of the stopband, or low and high frequencies, component with respect to the power of the passband component of the input signal. As a result, a better audio quality is achieved. |
| US10128796B2 |
Power amplification module and front end circuit
A PA module (10) includes multiple amplifying elements (11a, 11b) and a variable filter circuit (12). The amplifying elements (11a, 11b) amplify a transmission signal in a frequency range including multiple communication bands and are cascade-connected to each other. The variable filter circuit (12) is connected between the amplifying elements (11a, 11b). The variable filter circuit (12) uses a transmission band corresponding to a used communication band selected from the multiple communication bands as a pass band and a reception band corresponding to the used communication band as an attenuation band. |
| US10128794B2 |
Feedback compensated oscillator
An oscillator produces an oscillator output signal usable as a clock signal, otherwise as a frequency reference on an integrated circuit. The oscillator includes an RC network with a voltage-controlled element, such as a voltage-controlled resistor, voltage-controlled capacitor or a combination including a voltage-controlled resistor and voltage-controlled capacitor. Also, a tunable element having an adjustable resistance determined by a first static parameter is included in the RC network. The oscillator also includes a feedback circuit which can include a frequency-to-voltage converter. The feedback circuit generates a control signal for the voltage-controlled element. The feedback circuit includes a feedback reference circuit having a reference output determined by a second static parameter, and a loop amplifier responsive to the reference output and the oscillator output signal. |
| US10128789B2 |
Phantom electric motor system with parallel coils
A method and apparatus for operating an electric motor is presented. A transmit magnetic field is received at a group of receive coils having a group of axes oriented substantially parallel to magnetic field lines from a transmit coil and having a group of resonant frequencies. A resonant frequency in the group of resonant frequencies is different from other receive coils in the group of receive coils. A receive magnetic field is generated at a receive coil in the group of receive coils having the resonant frequency when the transmit magnetic field has a selected frequency matching the resonant frequency. The receive magnetic field attracts a rotor in the electric motor. |
| US10128786B2 |
Electric vehicle electric drive system
A vehicle may include an inverter, a motor coupled to the inverter, and a traction battery coupled to the inverter and having a terminal voltage equal to a rail voltage between rails of the inverter such that the rail voltage is unregulated. The vehicle may also include a voltage converter configured to reduce the terminal voltage below an intermediate bus voltage threshold on an intermediate bus, and an auxiliary converter configured to draw power from the intermediate bus to supply auxiliary loads. |
| US10128782B2 |
Variable frequency drive motor control
Various embodiments include a variable frequency drive motor control apparatus. The apparatus includes a main controller having a first interface. A motor controller is coupled to and controls an electric motor, the motor controller further coupled to the main controller. A network switch is coupled to the main controller, the motor controller, and a remote controller over respective digital connections. The remote controller has a second interface. The network switches data between the first interface, the second interface, and the motor controller. A network coupler is coupled between a variable frequency drive controller and the motor controller. |
| US10128781B2 |
Variable electric motor system and electrically powered device
This variable electric motor system comprises an electrically powered device and a planet gear transmission device. One of a sun gear shaft, a planet gear carrier shaft, and an internal gear carrier shaft of the planet gear transmission device constitutes an output shaft, another shaft constitutes a constant-speed input shaft, and the other shaft constitutes a variable-speed input shaft. The electrically powered device includes: a constant-speed electric motor including a constant-speed rotor that rotates about the axis, and that is connected to the constant-speed input shaft; and a variable-speed electric motor including a variable-speed rotor that rotates about the axis, and that is connected to the variable-speed input shaft. The variable-speed rotor has a shaft insertion hole formed therethrough in the axial direction, the shaft insertion hole having a cylindrical shape centered on the axis. The constant-speed rotor is inserted through the shaft insertion hole. |
| US10128780B2 |
Method and system for controlling the regenerative braking of a vehicle
A method of and a system for controlling the regenerative braking of a vehicle includes initiating a regenerative braking mode in response to an initiating control input to an accelerator of the vehicle, the initiating control input comprising a reduction in the degree of actuation of the accelerator of the vehicle, modifying a level of regenerative braking in the regenerative braking mode in response to at least one of a further reduction in the degree of actuation of the accelerator, application of a brake of the vehicle, application of a clutch of the vehicle, and a change of gear of the vehicle, and maintaining a modified level of regenerative braking after the additional control input has been terminated. |
| US10128779B2 |
Induction motor long start protection
Method and system for protecting induction motors from stalled start conditions provide a motor overload protection device that includes a stalled start detector capable of differentiating long start from stalled start conditions. This helps the motor overload protection device identify a stalled start condition right away and trip immediately rather than allowing the motor to continue drawing locked rotor current for the duration of the startup interval. Such a motor overload protection device may be used with any suitable multiphase induction motors, including two-phase motors, three phase motors, and the like. And because only the motor phase currents are used to detect the stalled start condition, the motor overload protection device disclosed herein does not require voltage phase shift information and/or motor speed measurements, thereby simplifying overall management of the motor. |
| US10128778B2 |
Energy harvester
An energy harvester is provided. The energy harvester includes a housing, a permanent magnet that is disposed within the housing, and a mass body that has a relative position to the permanent magnet changed by a translational motion within the housing by vibration energy from the exterior and that is formed of a magnetic substance. Further, a piezoelectric body generates electricity while elastically supporting vibration with respect to the housing of the permanent magnet by the translational motion of the mass body and an induction coil is disposed within the housing to generate induction electricity based on the vibration of the permanent magnet. |
| US10128774B2 |
Inverter inrush current limiting
A method and circuit arrangement is described for start-up and shut-down of high power DC to AC inverters which limits inrush current for capacitor charging, reduces input and output relay contact stress and discharges internal capacitors upon shut down. A preferred inrush limiting component has a higher resistance when hot than when cold, such as an incandescent filament lamp. |
| US10128773B2 |
Electric power conversion device and electric power system
An electric power conversion device includes a first arm and a second arm each including converter cells. The converter cell of the first arm is a first converter cell having a full-bridge configuration including an energy storing element and semiconductor switching elements. The converter cell of the second arm is a second converter cell having a half-bridge configuration including an energy storing element and semiconductor switching elements. Thus, short-circuit current between DC terminals is suppressed. |
| US10128772B2 |
Load control device for high-efficiency loads
A load control device for controlling power delivered from an AC power source to an electrical load includes a thyristor, a gate coupling circuit for conducting current through a gate terminal of the thyristor, a controllable switching circuit coupled between first and second main terminals of the thyristor, and a control circuit for controlling the gate coupling circuit to conduct a pulse of current through the gate terminal to render the thyristor conductive at a firing time during a half cycle. The gate coupling circuit is able to conduct at least one other pulse of current through the gate terminal after the firing time until a transition time before an end of the half-cycle. The control circuit is configured to render the controllable switching circuit conductive to conduct current through the electrical load between approximately the transition time until approximately the end of the half-cycle. |
| US10128770B2 |
Converter and electric power conversion apparatus
An adverse effect on a smoothing capacitor device caused by heat is suppressed. A flow path forming body 240 provided with protruding portions 411, 412 for attaching a capacitor board, a smoothing inductor device 130 mounted on the flow path forming body 240, and a capacitor board 170A on which a smoothing capacitor device 170 is implemented are provided, and the capacitor board 170A is fixed to the protruding portions 411, 412 for attaching the capacitor board, in such a manner that the smoothing capacitor device 170 is away from the flow path forming body 240. |
| US10128769B2 |
Remotely controllable modular power control device for power generation
A power adjusting circuit includes a sensor configured to measure a voltage and a current of the first AC output by an inverter, an AC/DC/AC converter configured to receive the first AC output from the inverter, and a controller configured to convert the first AC output to a second AC output having a desired power factor. |
| US10128768B2 |
Meter/voltage regulator with volt-ampere reactive control positioned at customer site
A method and system are provided for sourcing and sinking reactive power to an electric grid. The control system includes a terminal electrically coupled to a power source that originates from an electric utility grid. The terminal receives a grid alternating current having a real power component and a reactive power component. A power converter is electrically coupled to the terminal, the power converter includes an active rectifier that converts substantially all of the grid alternating current to a direct current and an energy storage device that stores energy supplied by the direct current. The active rectifier sources the reactive power component and the stored energy through the terminal to the electric utility grid. The power converter further includes an inverter that converts the direct current to a load alternating current having at least one of a load real power component and a load reactive power component. |
| US10128766B1 |
Method and apparatus for bi-directional switched mode power supply with fixed frequency operation
Various embodiments relate to a method and circuit for maintaining zero voltage switching while having a fixed switching frequency, the method including switching on a first switch, on a primary side, at a beginning of a primary stroke of a time period at zero voltage and switching off the first switch at an end of the primary stroke, switching on a second switch, on a secondary side, at a beginning of a secondary stroke of a time period and switching off the second switch at an end of the secondary stoke of a time period and switching on a second switch at a beginning of a ringing period of the time period and switching off the second switch at an end of a bi-directional flyback action. |
| US10128765B2 |
Multi-stage power converter using pulse width modulator to convert sampled second-stage power parameters into digital pulse width modulation signals and control method thereof
A multi-stage power converter includes a first-stage power conversion circuit, a second-stage power conversion circuit, a second-stage analogic sampler, a pulse width modulator, a first isolator, a pulse width analyzer and a control unit. The second-stage analogic sampler samples power parameter from the second-stage power conversion circuit. The pulse width modulator converts the power parameter into a pulse width modulation signal. The pulse width analyzer receives the pulse width modulation signal through the first isolator in an isolation manner, calculates a duty ratio of the pulse width modulation signal according to a rising edge and a falling edge of the pulse width modulation signal, and calculates the power parameter according to the duty ratio. The control unit controls operations of the second-stage power conversion circuit according to the power parameter that is obtained by the pulse width analyzer. |
| US10128763B2 |
Output-side controller with switching request at relaxation ring extremum
A method for regulating a power converter includes initiating a transition of a switch coupled to an input side of the power converter from an OFF to an ON state to regulate a transfer of energy from the input to an output side of the power converter after a switch control signal generator receives an enable signal and if a feedback signal representative of an output of the power converter indicates a change in an output of the power converter. The enable signal is generated to communicate a control signal from the output to the input side in response to a first signal representative of a voltage on an output terminal that oscillates in response to an ending of the transfer of energy. The transition of the switch from the OFF to the ON state occurs substantially at a time that the first signal reaches an extremum. |
| US10128762B2 |
Semiconductor device for controlling power source
A semiconductor device for power supply control includes an over-current detection circuit which detects an over-current state on a secondary side of a transformer by comparing a voltage in proportion to current flowing in a primary-side winding wire with an over-current detection voltage; a control signal generation circuit which generates a control signal to turn off a switching element when the over-current detection circuit has detected the over-current state; and an over-current detection level generation circuit which generates the over-current detection voltage in accordance with an on-duty of a driving pulse of the switching element. The over-current detection level generation circuit is configured to generate the over-current detection voltage in accordance with: Vocp=Vint+a·ON Duty, where Vocp represents the over-current detection voltage, ON Duty represents the on-duty, Vint represents the over-current detection voltage to be a reference, and “a” represents a correction coefficient. |
| US10128761B2 |
Control method and device employing primary side regulation in a quasi-resonant AC/DC flyback converter
The present disclosure is directed to a primary-controlled high power factor quasi resonant converter. The converter converts an AC power line input to a DC output to power a load, generally a string of LEDs, and may be compatible with phase-cut dimmers. The power input is fed into a transformer being controlled by a power switch. The power switch is driven by a controller having a shaping circuit. The shaping circuit uses a current generator, switched resistor and capacitor to produce a reference voltage signal. The controller drives the power switch based on the voltage reference signal, resulting in a sinusoidal input current in a primary winding of the transformer, resulting in high power factor and low total harmonic distortion for the converter. |
| US10128760B2 |
PCB planar transformer and converter using the same
A PCB planar transformer, comprising: at least one primary winding layer, each formed with a primary winding therein, wherein wire traces constituting the primary winding have a first horizontal width; at least one secondary winding layer, each formed with a secondary winding therein, wherein wire traces constituting the secondary winding have a second horizontal width; and at least one shielding layer, each located between the primary winding layer and the adjacent secondary winding layer, wherein the shielding layer is formed with a conductor therein, and the conductor in the shielding layer has a third horizontal width, wherein at least one of the first horizontal and the second horizontal width is smaller than the third horizontal width of the conductor in the shielding layer. |
| US10128759B2 |
Power supplying apparatus with piezoelectric transformers
A power supplying apparatus includes a first piezoelectric transformer operated at a first operating frequency, a second piezoelectric transformer operated alternately with the first piezoelectric transformer and operated at a second operating frequency, wherein the second operating frequency is a multiple of the first operating frequency. |
| US10128755B2 |
Slew mode control of transient phase based on output voltage slope of multiphase DC-DC power converter
A multi-phase switch mode, voltage regulator has a transient mode portion in which a phase control output is coupled to one or more control inputs of one or more switch circuits that conduct inductor current through one or more transient phase inductors, from amongst a number of phase inductors. A slew mode control circuit detects a high slope and then a low slope in the feedback voltage and, in between detection of the high slope and the low slope, pulses the phase control output of the transient mode portion so that the switch circuit that conducts transient phase inductor current adds power to, or sinks power from, the power supply output. Other embodiments are also described. |
| US10128751B1 |
Control system for controlling a DC-DC voltage converter circuit
A control system for controlling a DC-DC voltage converter circuit is provided. An output voltage controller outputs a DC-DC voltage converter control voltage to an input control terminal to increase a switching duty cycle within the DC-DC voltage converter circuit when the low voltage is less than an output reference voltage. An input voltage controller reduces the DC-DC voltage converter control voltage at the input control terminal of the DC-DC voltage converter circuit when a high voltage is less than an input reference voltage to reduce the switching duty cycle within the DC-DC voltage converter circuit. |
| US10128750B2 |
Switched-mode power converter with an inductive storage element and a cascode circuit
A switched-mode power converter includes an inductive storage element and a cascode circuit. The cascode circuit includes a double-gate field effect transistor. A switchable load path of the double-gate field effect transistor is electrically connected in series with the inductive storage element. |
| US10128747B2 |
Frequency-controlled voltage source
Voltage source circuits, asynchronous processing systems and methods are disclosed. A voltage source circuit includes a capacitor storing an operating voltage for an asynchronous processor. A frequency comparator compares a frequency reference and a feedback signal indicative of an operating frequency of the asynchronous processor to determine whether or not the operating frequency is less than a target frequency. When operating frequency is less than the target frequency, a charge pump adds charge to the capacitor. |
| US10128746B2 |
Switched capacitor DC-DC power converter
The present disclosure relates to a switched capacitor DC-DC converter configured for converting a DC input voltage into a higher or lower DC output voltage. The switched capacitor DC-DC converter comprises an output voltage regulator utilizing a feedback loop with a multi-level quantizer configured to convert a lowpass filtered control signal into a corresponding digital control signal. |
| US10128742B2 |
Reference signal for a current regulator
A PFC circuit according to the invention is connected to a grid, includes an input filter and a rectifier connected to a converter. A control circuit generates the reference current for the current regulator of the converter that controls its input current. Thereby, the reference current is generated by adding an offset current (I0) to a standard reference current and adapting the magnitude of the standard reference current to compensate for a change of the input power resulting from the addition of the offset current (I0). However, due to the addition of the offset current (I0) the magnitudes of some lower harmonic components of the input current of the power supply unit are increased and the magnitudes of some higher harmonic components of the input current are decreased such that the power supply may draw more current from the grid. |
| US10128741B2 |
Power conversion device
Each phase arm of a power conversion device includes at least one converter cell connected in series. For each converter cell, an element driving unit is provided which turns on one switching element in the converter cell as a startup element. The element driving unit is supplied with power from a DC capacitor, and when voltage of the DC capacitor exceeds startup voltage Vsh, turns on the startup element. Thus, at the time of startup of the power conversion device, the DC capacitor in each converter cell is initially charged to desired voltage. |
| US10128739B2 |
Power conversion device
A first offset voltage which is added to voltage commands in a first three-phase voltage command calculated on the basis of a control command for an AC rotary machine, and a second offset voltage which is added to voltage commands in a second three-phase voltage command calculated on the basis of a control command for the AC rotary machine, are set in such a manner that a period during which one of a first power converter and a second power converter outputs an effective vector and the other thereof outputs a zero vector occurs during a carrier period of a first carrier wave signal and a second carrier wave signal. |
| US10128738B2 |
Determination of entering and exiting safe mode
The disclosure describes examples of integrate circuit (IC) chips. An IC chip includes a first detector configured to generate information indicative of whether an input supply voltage or power is greater than or equal to a first threshold, a second detector configured to receive a circuit voltage or current level and generate information used to indicate a status of the IC chip based on the received circuit voltage or current level, and a controller configured to cause the IC chip to enter a safe mode in response to both the first detector indicating that the input supply voltage or power is greater than the first threshold and the circuit voltage or current level being greater than a second threshold. |
| US10128737B1 |
Constant on-time switching converter and clock synchronization circuit
A constant on-time switching converter and a clock synchronization circuit are provided, which generate a synchronization signal according to a clock signal, an input voltage, and an output voltage. The synchronization signal will be synchronized with a period length of the clock signal, thereby acquiring the duty cycle of the constant on-time switching converter. People in the business can accordingly avoid the interference with the synchronization signal and other major clock signals, to prevent electromagnetic interference (BMI) generation. |
| US10128733B2 |
Position-detection system
A position-detection system for a drive having a rotor, which can move along a path, comprises an encoder unit, a signal-detection unit and a signal-processing device. The encoder unit or the signal-detection unit is arranged on the rotor, and the respective other unit is arranged along the path. Furthermore, the signal-processing device is designed to generate a first position signal and a second position signal on the basis of a relative position of the encoder unit and signal-detection unit. The signal-processing device is designed to determine a longitudinal position of the rotor along the path on the basis of phase values of the first and second position signals. Furthermore, the signal-processing device is designed to determine a distance, directed transversely with respect to the path, between the encoder unit and the signal-detection unit, on the basis of amplitude values of the first and second position signals, and to detect an operating state of the drive on the basis of the distance. |
| US10128728B2 |
Manufacturing method for segment coil
A manufacturing method for a segment coil according to the invention includes forming an assembled wire by bundling a plurality of element wires, forming a stranded wire by twisting the assembled wire, forming a rectangular conductor by rolling the stranded wire, and forming a segment coil by cutting the rectangular conductor into a given length and bending the cut rectangular conductor. Before the rectangular conductor is bent, the plurality of element wires is fastened at a position where the coil end portion of the segment coil is formed. |
| US10128726B2 |
Method for manufacturing a laminate and method for manufacturing a rotor
A method for manufacturing a laminate used for manufacturing a rotor is provided. The method includes: (a) stamping out a plurality of workpieces from a metal sheet wherein each of the workpieces has a temporarily-interlocking portion; and (b) obtaining a laminate including the workpieces integrated together by the temporarily-interlocking portion, wherein each of the workpieces further has a shaft hole, a magnet insertion hole, and a weight-reducing hole formed between the shaft hole and the magnet insertion hole, and the temporarily-interlocking portion is provided to the weight-reducing hole. |
| US10128725B2 |
Contact brush holder
A contact brush holder is disclosed. According to an aspect, a brush holder is provided for receiving at least two contact brushes and holding the brushes in contact with a slip ring in an electrical power device. The brush holder comprises a holder body adapted for receiving said brushes. The brushes are arranged on opposite sides of a plane in which a central axis of the brush holder is located and in which an axis of rotation of the electric apparatus is situated. A biasing device is provided for biasing the holder body towards the slip ring, thus biasing the at least two contact brushes towards the slip ring. |
| US10128721B2 |
Motor
A motor may include a motor body portion; a connector portion disposed to the motor body portion; and a wiring member electrically connected to the motor body portion. The connector portion has a surface exposed to an outside of the motor body portion. The wiring member includes a plurality of external connection terminals which are connected to the external power supply to protrude from the exposed surface of the connector part. The connector portion is provided with a through hole which extends from the exposed surface toward the accommodating space and connects the outside of the motor body portion and the accommodating space. When viewed in the normal direction of the exposed surface, at least a portion of the through hole is positioned inside an edge of an external connection terminal group which consists of the plurality of external connection terminals. |
| US10128717B2 |
Ring for an electric machine
The present disclosure relates to a ring for a rotor of an electric machine as a support for a retaining ring and for cooling coils of the rotor. It is an object of the invention to provide measures for cooling coils of a rotor of an electric machine. Disclosed is a ring for an electric machine, the ring is connected between a retaining ring and coils wound around a rotor, whereas the ring is fabricated from a non-conductive material. |
| US10128708B2 |
Armature and motor
There is provided an armature including a shaft; a core attached to the shaft; a commutator that is attached to the shaft, and includes a plurality of commutator segments; windings that are wound onto the core, and are connected to the respective commutator segments; and a short-circuit member that connects together a pair out of the plurality of commutator segments, and is disposed further to the commutator radial direction outside than an outer peripheral portion of the commutator. |
| US10128707B2 |
Winding for an electric machine having transposed bars comprised of stacks of strands
The winding for an electric machine comprises transposed bars having at least four stacks of strands. Couples of stacks of strands define elementary transposed bars. The winding comprises at least two stacks of cooling pipes in each transposed bar, each stack of cooling pipes being arranged between two stacks of strands, and at least one crossover transposed bar in which the sides of the elementary transposed bars are exchanged. |
| US10128705B2 |
Electric motor heating/cooling system
An electric motor includes a case, a stator that includes a stator laminaiton and end-windings, a rotor coupled to the case via at least one rotor bearing. The rotor includes a hollow cylindrical body, a first shaft portion, and a second shaft portion. The hollow cylindrical body includes an inner wall, an outer wall, a first distal end, and a second distal end. The first shaft portions couples to the first distal end and the second shaft portion couples to the second distal end. The second shaft portion includes a fluid feed tube formed therewith having a fluid receive end and a fluid feed end, the fluid feed end extending to a central inner portion of the hollow cylindrical body. A plurality of fluid exit ports adjacent the first distal end and the second distal end of the hollow cylindrical body spray fluid onto components of the stator. |
| US10128702B2 |
Rotor of rotary electric machine and method of producing the same
A rotor of a rotary electric machine includes a rotor core. The rotor core has magnet insertion holes which are arranged at first circumferential intervals and in which permanent magnets are disposed. The rotor core includes steel plates, a first core block, and a second core block. The steel plates are stacked in an axial direction of the rotor. The first core block includes first steel plates among the steel plates stacked with rotational stacking at a rotational stacking angle corresponding to a common multiple of a first circumferential interval among the first circumferential intervals and a second circumferential interval among second circumferential intervals. The second core block includes second steel plates among the steel plates stacked with the rotational stacking at the rotational stacking angle from a position shifted by an angle corresponding to the first circumferential interval relative to the first core block. |
| US10128695B2 |
Hybrid Wi-Fi and power router transmitter
The present disclosure provides a method of wireless transmission of power and Wi-Fi signals to electronic devices. The method includes identifying a first receiver that is associated with a first electronic device that requires power and a second receiver that is associated with a second electronic device that requires Wi-Fi signals, generating RF signals at least in part by converting power provided by a power source, where the transmitter includes a first set of antennas for transmitting RF signals and a second set of antennas for transmitting Wi-Fi signals, and transmitting, to the first receiver, the RF signals using at least two antennas of the first set of antennas connected to the transmitter. The method further includes, while transmitting the RF signals using the at least two antennas of the first set of antennas, simultaneously transmitting, to the second receiver, Wi-Fi signals using the second set of antennas. |
| US10128694B2 |
Power storage apparatus
A storage apparatus includes a plurality of storage cells connected in series. Each storage cell comprises a storage element that stores a charge, a container that houses the storage element, a reception antenna capable of receiving power transmitted from a transmission antenna of a feeding facility provided in a wireless power transfer system, and a charging control circuit that charges the storage element using the power received by the reception antenna. The plurality of storage cells are charged concurrently and wirelessly, and therefore charging can be performed on all of the storage cells without overcharging or undercharging. |
| US10128691B2 |
Bidirectional power converter
A bidirectional power converter circuit is controlled via a hysteresis loop such that the bidirectional power converter circuit can compensate in near real time for variations and even changes in transmit and receive coil locations without damaging components of the system. Because the bidirectional power converter is capable of both transmitting and receiving power (at different times), one circuit and board may be used as the main component in multiple wireless power converter designs. |
| US10128687B2 |
Power transmission apparatus, and power transmitting device and power receiving device for the power transmission apparatus
There is provided a non-contact power transmission apparatus which can supply stable power from a power transmitting side to a power receiving side even if a load is changed. The power transmission apparatus transmits power from a power transmitting device to a power receiving device in a non-contact manner. The power transmitting device includes a series circuit which is connected to a direct-current power source, and includes a parallel resonance circuit including a first capacitor and a first inductor, and a switch element, a drive source to drive on or off the switch element, and a first series resonance circuit connected to a connection point between the parallel resonance circuit and the switch element and including a second inductor, a second capacitor and a power transmission coil. The power receiving device includes a second series resonance circuit including a power receiving coil paired with the power transmission coil and a third capacitor connected in series to the power receiving coil, and a rectifying circuit to rectify a voltage generated in the second series resonance circuit and to supply the voltage to a load circuit. |
| US10128686B1 |
Systems and methods for identifying receiver locations using sensor technologies
An example method disclosed herein includes: acquiring, by at least one sensor in communication with a transmitter, data indicating a location of an electrical apparatus within a transmission field of the transmitter. The transmitter is in communication with a mapping memory that stores information that identifies a set of receivers that has each been designated to receive power waves from the transmitter. The method also includes: determining, by the transmitter, using the mapping memory and the data indicating the location of the electrical apparatus, whether the electrical apparatus is a respective receiver of the set of receivers. The method further includes: transmitting, by the transmitter, power waves to the electrical apparatus upon determining that the electrical apparatus is the respective receiver, wherein the power waves are transmitted to converge in a three dimensional space to form one or more pockets of energy at the location associated with the electrical apparatus. |
| US10128679B2 |
Adaptive charger with input current limitation and controlling method for the same
An adaptive charger can include: a power converter configured to receive an input current from an external power supply, and to generate an output current as a charging current to a load; a current feedback loop configured to compare a first detection signal that represents the input current against a first current reference signal, and to generate a first error signal, where the power converter is configured to regulate the input current according to the first error signal; and the current feedback loop being configured to determine an overload state of the external power supply according to an input voltage of the power converter, where the charger is configured to enter a current limit state when the external power supply is determined to be in the overload state, and where the first current reference signal is gradually reduced until the external power supply recovers to a non-overloaded state. |
| US10128673B2 |
Portable device for aiding low temperature high power output of battery pack
Disclosed is a portable device for aiding low temperature high power output of a battery pack, the device including a primary loop and a control unit, in which: the primary loop is configured as a working loop of the battery pack and comprises a power resistor, herein two ends of the power resistor are electrically connected with the positive/negative terminal of the battery pack respectively, and the battery pack discharges at low temperatures through the power resistor so that an internal temperature of the battery pack rises; and the control unit is configured to control on/off of the primary loop. |
| US10128671B2 |
Cupholder (3 in 1)
The present invention discloses a charging cup holder with slot having a cup sleeve, a fixing base and a cup carrier, the cup sleeve used for a cup passing through is hinged to the upper end of the fixing base, and the cup carrier for supporting the cup is hinged to the lower end of the fixing base, wherein a USB interface used to electrically connect with a mobile terminal is provided on the fixing base and the cup sleeve is provided with two opposite slots for placing the mobile terminal. The charging cup holder may not only hold the cup, but also the mobile terminals can be placed in the slot of the cup sleeve conveniently, such as cell phones and other mobile electronic devices, to realize charging easily by electrically connecting to the USB interface on the fixing base. |
| US10128669B2 |
Method of transmitting and receiving power and electronic device using the same
An electronic device comprising: a battery having a plurality of cells that are connected in series; a circuit electrically connected to the battery; and a conductive pattern electrically connected to the circuit, wherein the circuit is configured to: receive a first signal wirelessly from a first external device by using the conductive pattern, charge at least some of the plurality of cells in the battery by using a power of the first signal, generate a second signal by changing a first voltage, that is produced by at least two of the plurality of cells in the battery, into a second voltage that is lower than the first voltage, and wirelessly transmit the second signal to a second external device, the second signal being transmitted by using the conductive pattern. |
| US10128667B2 |
DC/DC converter with capacitor voltage balancing
A method for voltage balancing of series connected capacitors, wherein a voltage in an intermediate circuit of an electric circuit can be easily and safely balanced between a plurality of series connected capacitors and thus these components are operated safely in terms of their voltage strength. This problem is solved in that the voltage balancing is accomplished in that, in a first step of the method, an at least partial discharging of a first or a second capacitor occurs across a first or second winding of a transformer, while thanks to the action of the transformer a current is induced in a second step of the method in the second or first winding which charges the second or first capacitor as a charging current. |
| US10128663B2 |
Wireless power transfer using stacked resonators
A wireless power transfer system may include a primary resonator and one or more secondary resonators. At least one of the secondary resonators lie in overlapping relation to the primary resonator. An electromagnetic (EM) field generated by the primary resonator can couple to the secondary resonators, thus inducing current flow in the secondary resonators. EM fields generated by the secondary resonators interact with the EM field from the primary resonator to produce a resultant EM field. |
| US10128662B2 |
Power system for an aircraft with dual hybrid energy sources
A power system for an aircraft having a plurality of power-consuming components, some of which have transient power requirements, which is greater than the average power requirement, the power system includes at least one generator, a power distribution buss, a non-battery power source, a battery power source, and a power controller selectively coupling the non-battery power source and the battery power source to the power distribution buss to satisfy the transient power requirements. |
| US10128661B2 |
Status indicator for power generation systems
An indicator device includes a housing configured to be coupled to positive and negative DC wire lines that supply power from an energy generation source to an inverter. The indicator device further includes a current sensor for measuring a current level on the positive and negative DC wire lines, and voltage sensors for measuring a first voltage across the positive and negative DC wire lines, a second voltage across the positive DC wire line and a ground terminal, and a third voltage across the negative DC wireline and the ground terminal. A circuit block compares the measured current level to one or more threshold current levels, and further compares the measured first, second and third voltages to one or more threshold voltage levels, and in response provides an output signal. A visual indicator receives the output signal from the circuit block, and in response provides a visual indication of whether voltage and current levels on the positive and negative DC wire lines are at levels that may harm humans. |
| US10128659B2 |
Energy generation interactions bypassing the grid
Methods, devices, and systems for controlling energy generation interactions that bypass the grid may be provided. Flow control devices may be directly connected with one another independent of electrical connections to the utility grid. In some examples, the direct connections between the devices may enable sharing of power, controlling power flow over the direct connections, and/or recording relative power flows between the devices. |
| US10128658B2 |
Autonomous methods, systems, and software for self-adjusting generation, demand, and/or line flows/reactances to ensure feasible AC power flow
Autonomous, self-adjusting, and distributed line flow processing for a network having nodes with branches coupling adjacent ones of the nodes and components coupled to the nodes. Systems, methods, and software made in accordance with this disclosure can be used to identify where power flows can exceed the maximum transfer limit in each line and to enable automated adjustments in order to avoid such conditions. These can be useful tools for both system operators of large electrical networks and for implementing automated schemes to ensure network feasibility in micro-grids or other networks with many smart components embedded with communications and/or computation capabilities. |
| US10128656B2 |
Power assist unit and power assist system
A power assist apparatus includes a branch power lines, a first power storage device, a power assist converter, and a second power storage device. The branch power line is connected to a main line of a natural energy power generation system, which is connected to a system. The first power storage device connected to the branch power line. The power assist converter connected to the branch power line. The second power storage device connected to a downstream side of the power assist converter. |
| US10128654B2 |
Method and apparatus for correcting for power harmonics
A light-emitting diode (“LED”) lighting unit includes an operational, a sense resistor electrically connected to the input of the operational amplifier, a first field effect transistor (“FET”) whose gate is electrically connected to the output such that the input voltage at the gate of the first FET rises and falls with the output voltage, a second FET whose gate is electrically connected to the output such that the input voltage at the gate of the second FET rises and falls with the output voltage, and a string of LED lights connected such that when the voltage across the string drops below a level to operate, the voltage across a sense resistor drops, causing the operational amplifier to increase its output until the input voltage at the gate of the second FET increases allowing one bank of LED lights to operate. |
| US10128652B2 |
Stabilizing a DC electricity network
A method of stabilizing a DC electricity network, the network including a DC voltage source powering electrical loads that are connected in parallel to terminals of the voltage source and each of which is to receive a current or voltage setpoint. The method stabilizes the network by regulating setpoints applied to the loads by a virtual stabilization impedance generated at terminals of each load, the virtual impedances being dimensioned to stabilize the network in desired operating points and in given configurations of the network including a state in which at least one load is inactive or has failed and a state in which the stabilization of a load is inactive. Each virtual impedance is generated by a non-linear regulation loop acting on the setpoint for the corresponding load. |
| US10128650B2 |
Relay protection method and apparatus against LC parallel circuit detuning faults
A relay protection method against LC parallel circuit detuning faults comprises the steps of: a relay protection device samples a current of a parallel LC, that is, a reactor and a capacitor, and samples a total current flowing through the whole LC; convert the current of the reactor into a current of an equivalent capacitor; calculate amplitudes of the current of the equivalent capacitor and a current of a realistic capacitor and calculate an amplitude of the total current flowing through the LC; calculate a current amplitude ratio of the equivalent capacitor to the realistic capacitor; and when the amplitude of the total current flowing through the LC is large enough, send an alarm signal or a trip after a setting time delay if the current ratio exceeds a preset upper and lower limit range. Also provided is a corresponding relay protection device. |
| US10128649B2 |
Power supply device
A power supply device includes a resistor that limits an electric current supplied from an AC power supply, a switching unit that is connected in parallel with the resistor, a rectifier circuit unit that is connected to a subsequent stage of the resistor and the switching unit and rectifies an AC voltage of the AC power supply, a booster circuit unit, a DC-voltage detection unit that detects a DC voltage output from the booster circuit unit, an AC voltage detection unit, a protection setting unit that compares a first protection voltage calculated on the basis of the boosting level by the booster circuit unit with a second protection voltage calculated based on the AC voltage detected by the AC-voltage detection unit and sets either one as a protection voltage, and a control unit that opens the switching unit when the DC voltage falls below the protection voltage and stops boosting. |
| US10128648B2 |
Diagnostic system for a DC-DC voltage converter
A diagnostic system for a DC-DC voltage converter having a low voltage bi-directional MOSFET switch is provided. The low voltage bi-directional MOSFET switch has first and second nodes. The microcontroller samples a first voltage at the first node at a first sampling rate utilizing a first common channel in a first bank of channels to obtain a first predetermined number of voltage samples. The microcontroller determines a first number of voltage samples in the first predetermined number of voltage samples in which the first voltage is less than a first threshold voltage. The microcontroller sets a first voltage diagnostic flag equal to a first fault value if the first number of voltage samples is greater than a first threshold number of voltage samples indicating a voltage out of range low fault condition for the analog-to-digital converter. |
| US10128642B2 |
Foldable cable tray
The present invention relates to a foldable cable tray configured for ease of transportation and for storage. The foldable cable tray includes a first side rail, a second side rail, a plurality of rungs movably connected to the first and second side rails to transit the foldable cable tray between unfolded and folded positions, and a locking device configured to lock each of the plurality of rungs to the first and second side rails when the foldable cable tray is in the unfolded position. |
| US10128634B2 |
Integrated wavelength locker
Described are various configurations of integrated wavelength lockers including asymmetric Mach-Zehnder interferometers (AMZIs) and associated detectors. Various embodiments provide improved wavelength-locking accuracy by using an active tuning element in the AMZI to achieve an operational position with high locking sensitivity, a coherent receiver to reduce the frequency-dependence of the locking sensitivity, and/or a temperature sensor and/or strain gauge to computationally correct for the effect of temperature or strain changes. |
| US10128631B2 |
Generation of VUV, EUV, and X-ray light using VUV-UV-VIS lasers
A method for extending and enhancing bright coherent high-order harmonic generation into the VUV-EUV-X-ray regions of the spectrum involves a way of accomplishing phase matching or effective phase matching of extreme upconversion of laser light at high conversion efficiency, approaching 10−3 in some spectral regions, and at significantly higher photon energies in a waveguide geometry, in a self-guiding geometry, a gas cell, or a loosely focusing geometry, containing nonlinear medium. The extension and enhancement of the coherent VUV, EUV, X-ray emission to high photon energies relies on using VUV-UV-VIS lasers of shorter wavelength. This leads to enhancement of macroscopic phase matching parameters due to stronger contribution of linear and nonlinear dispersion of both atoms and ions, combined with a strong microscopic single-atom yield. |
| US10128630B2 |
Solar-pumped laser device
A solar-pumped laser device includes: a light-guiding plate configured such that a fluorescence substance absorbing solar light and emitting fluorescence including a predetermined wavelength is dispersed in the light-guiding plate so as to bring the fluorescence to exit a predetermined surface; and an optical fiber disposed close to the predetermined surface, the optical fiber including: a core part in which a medium excitable by the fluorescence so as to emit a laser is dispersed; and a clad part that is formed by a material through which the fluorescence passes, is disposed around the core part, and has a smaller refractive index than a refractive index of the core part, wherein a light emitted by the medium is totally reflected by one end surface of the optical fiber, and is brought to pass through the other end surface of the optical fiber. |
| US10128629B2 |
Laser oscillator provided with discharge tube and laser processing machine
A laser oscillator which can effectively remove scattered light by a simpler configuration. The laser oscillator comprises an output mirror and a rear mirror which are arranged facing each other and a discharge tube which is arranged between the output mirror and the rear mirror. The discharge tube has a first part which gets larger in inner diameter from a first end part in an axial direction facing the output mirror toward the rear mirror. |
| US10128626B2 |
Composite cable and composite harness
A composite cable is provided that improves terminal machinability while maintaining bending resistance. The composite cable is provided with: a pair of first electric wires; a twisted-pair wire obtained by twisting together a pair of second electric wires having an outer diameter that is smaller than that of the first electric wires; and a tape member spirally wrapped around an aggregate obtained by twisting the pair of first electric wires together with the twisted-pair wire. The twisting direction of the twisted-pair wire, the twisting direction of the aggregate, and the wrapping direction of the tape member are all the same direction. |
| US10128625B2 |
Bus bar and power electronic device with current shaping terminal connector and method of making a terminal connector
A current shaping phase leg bus bar for power electronics systems includes a first terminal connector, a second terminal connector, insulated from the first terminal connector, and a third terminal connector, insulated from the first and second terminal connectors. At least one of the terminal connectors is a current shaping terminal connector that includes one or more layers having a plurality of pre-defined locations for electrical connections, said plurality of pre-defined locations including one or more first locations and a plurality of second locations, and includes one or more gaps within or among its one or more layers, to provide substantially balanced conductive pathways among its one or more first locations and its plurality of second locations. |
| US10128624B2 |
Power connector system
A power connector system includes a header connector having a header housing mounted to a chassis. The header housing holds a header terminal comprising a plurality of contact members arranged side-by-side in a stacked arrangement. Each contact member has a pair of spring beams defining sockets at a mating end of the contact member. The sockets of the contact members are aligned to define a tab socket of the header terminal. The power connector system includes a plug connector having a plug housing holding a tab terminal. The tab terminal has a mating end and a cable end. The mating end is received in a mating direction into the tab socket of the header terminal during mating to electrically connect the tab terminal with the header terminal. |
| US10128622B1 |
Electrical system, and power inlet apparatus and electrical receptacle assembly therefor
An electrical receptacle assembly is for a power inlet apparatus of an electrical system. The power inlet apparatus includes a housing. The electrical system has a power source and a transfer switch. The electrical receptacle assembly includes an electrical receptacle structured to be mechanically coupled to the housing and electrically connected with the power source and the transfer switch, and an indication assembly mechanically coupled to and electrically connected with the electrical receptacle. The indication assembly has a status indicator adapted to provide an indication of circuit status within the electrical system. |
| US10128621B2 |
Cable connector
The present disclosure discloses a cable connector, which comprises: at least one cable, the at least one cable comprises an insulating sheath, a shielding layer inside the insulating sheath and at least one conductive wire; a connector, the connector comprises a metal shell, the metal shell is provided with a cable receiving portion mounting the at least one cable, the at least one cable is inserted into the connector to allow the connector and the at least one conductive wire to be electrically connected. The shielding layer is exposed out of the insulating sheath at an end of the at least one cable, a conductive elastomer is sheathed on the exposed shielding layer, when the cable receiving portion squeezes the at least one cable, the conductive elastomer is deformed and fills most of a gap between the cable receiving portion and the at least one cable. |
| US10128617B2 |
Angle connector for differential transmission of data signals
An angle connector for differential transmission of data signals, having first and second conductor pair ends in a first and second flat angle connector end surface, respectively, wherein the connector end surfaces are tilted spatially relative to one another, wherein, between the angle connector end surfaces, the angle connector has at least one first curved section in which all conductors of the conductor pair(s) are arranged with the respective longitudinal axes parallel to one another and all longitudinal axes follow a curved line, wherein in the first curved section, the longitudinal axes of at least one conductor pair follow differently curved lines, which are curved to varying degrees in such a way that, in the first curved section, two conductors have different geometric lengths relative to one another, wherein the angle connector has at least one second section in which all conductors of the conductor pair(s) are twisted for a predetermined fraction of a lay length in such a way that all conductors of the conductor pair(s) have an identical geometric length. |
| US10128613B2 |
Pin connector assembly
A pin connector assembly has male connector and a female connector. The male connector has a first alignment slot formed on a first housing of the male connector and a mounting hole. The female connector has a second alignment slot formed on a second housing of the male connector and a mounting hole. The first and second alignment slots allows the male connector and the female to be coupled with each other without damaging metal contacts on the male connector. Moreover, the installation efficiency of the male connector and the female connectors are improved. The mounting holes of the male and female connectors are used for detachably mounting the male and female connectors on tubes of a trunk of an artificial Christmas tree. |
| US10128612B1 |
Dual purpose latch
An electronics module includes a housing having four sides and defining an axis extending from a front to rear of the housing. Each side defines a mating feature that engages a mating feature of another electronics module. One side defines a pin-receiving receptacle, another defines a recess extending partially through a width or a thickness of the housing; and another includes a catch mechanism. A latch is mounted within the recess and includes a body having top, bottom, front, rear, inner side, and outer side surfaces. The bottom or top surface defines an opening to a vertical channel formed in the body. A hook extends from the rear surface and secures a catch on the other module. A spring-biased pin is received within the channel and mounted within the recess such that an end of the pin extends through the opening beyond a surface of the electronics housing. |
| US10128611B2 |
Ferrule assembly for an electrical connector
A ferrule assembly for terminating an electrical connector to a cable includes an inner ferrule, an outer ferrule and an inner ferrule sleeve. The inner ferrule has an inner surface and an outer surface. The inner ferrule is conductive and provides electrical shielding. The outer ferrule is positioned radially outside of the inner ferrule such that a cable shield of the cable is received between the inner ferrule and the outer ferrule. The outer ferrule secures the cable shield between the inner ferrule and the outer ferrule. The inner ferrule sleeve is positioned radially inside of the inner ferrule. The inner ferrule sleeve substantially fills the space between the inner ferrule and an inner jacket of the cable. The inner ferrule sleeve is dielectric and electrically isolating the inner ferrule from an inner conductor of the cable. |
| US10128606B2 |
Connector having a potting material covered by a protective plate with holes for contact terminals and for filling of the potting material
In a relay connector, a male terminal is formed in a rod-like shape, inserted into a through hole penetrating a male terminal housing chamber, extends inside a cylinder part, and has a first contact part. A protective plate includes a body part that partitions an internal space defined by the cylinder part and the male terminal housing chamber into a first space portion located on the first contact part side of the male terminal and a second space portion located on the male terminal housing chamber side of the male terminal, a terminal hole that is formed in the body part, and configured to receive the male terminal thereinto, and a filling port that is formed in the body part, and communicably connects the first space portion and the second space portion to each other. The second space portion is filled with a potting filling part. |
| US10128597B2 |
Electrical contact pad for electrically contacting a connector
An electrical contact pad for electrically contacting a connector includes first, second and third regions. The first region is connected to a trace. The second region is adjacent to the first region and has a width less than the first region. The third region is adjacent to the second region and has a width that is greater than the second region. The third region is sized to make contact with a connector. Having the width of the second region be smaller than the width of the first and third regions increases an impedance of the electrical contact pad. |
| US10128594B2 |
Connectors having three-dimensional surfaces
Apparatus and methods are described, including apparatus that includes a connector. The connector includes a connector body including at least one mating surface having a first longitudinal end, and a second longitudinal end that is narrower than the first longitudinal end. A plurality of electrically-conductive terminals are coupled to the mating surface of the connector body. Other embodiments are also described. |
| US10128593B1 |
Connector having a body with a conductive layer common to top and bottom surfaces of the body as well as to wall surfaces of a plurality of holes in the body
Embodiments of the present invention include a method for fabricating a hybrid land grid array connector and the resulting structures. A body is provided. The body includes a first plurality of holes and a second plurality of holes. A conductive layer is deposited on the top and bottom surfaces of the body and the wall surfaces of the first plurality of holes resulting in the top and bottom surfaces being electrically common. The conductive layer is removed from the wall surfaces of a first subset of the first plurality of holes. A portion of the conductive layer is removed from the top surface of the body and the bottom surface of the body from an area surrounding the first subset of the first plurality of holes. |
| US10128587B2 |
Power connection apparatus assembly and power connection apparatus
A power connection apparatus assembly has first and second power connection apparatuses. The first apparatus includes a connecting unit and a first circuit board. The connecting unit has a conductive member and a positioning member, the conductive member has a mounting plate portion and an inserting plate portion bending from the mounting plate portion and extending. The mounting plate portion has a positioning hole, the positioning member has a flat plate portion cooperating with the mounting plate portion and a protruding post protruding from the flat plate portion to correspondingly pass through the positioning hole. The first circuit board has an insertion hole corresponding to the positioning hole in position to allow the protruding post to insert therein, the protruding post of the positioning member passes through the positioning hole of the mounting plate portion of the conductive member and inserts into the insertion hole so that the mounting plate portion and the first circuit board are positioned relative to each other. The second apparatus has a second circuit board and an electrical connector corresponding to the connecting unit. The inserting plate portion of the conductive member may insert into an insertion slot of the electrical connector, and after the conductive member and the electrical connector has mated with each other, the first circuit board and the second circuit board are parallel to each other. |
| US10128586B2 |
Plug connector for making solder-free contact with a coaxial cable
A plug connector has an outer conductor socket to receive a coaxial cable. An inner conductor receiving element receives an inner conductor of the coaxial cable and is arranged in a centered manner within the outer conductor socket. The outer conductor socket has at least one contact-making area which makes electrical contact with an outer conductor of the coaxial cable. At least one separating element is arranged within the outer conductor socket in such a way that making electrical contact with the end of the outer conductor of a coaxial cable that can be or is inserted into the outer conductor socket and the outer conductor socket is prevented or suppressed. In the plugged-in state, the contact-making area is arranged in the outer conductor socket in such a way that electrical contact can be or is made radially with the circumferential wall adjoining the end. |
| US10128582B2 |
Splice with tap clamp
A wire connection system for providing electrical communication between a first conductor and a second conductor includes a housing having a sidewall, a housing surface, and a housing channel. The sidewall extends between a first end and a second end and at least partially encloses a housing chamber. The connection system further includes at least one jaw supported for movement within the housing chamber and configured to engage the first conductor. The connection system further includes a clamp member at least partially disposed within the housing channel, the clamp member including a clamp surface proximate the housing surface in a facing relationship. The connection system further includes a linear actuator coupled to the housing and movable along a longitudinal axis, the linear actuator coupling the housing and the clamp member and movably coupled to the at least one jaw. |
| US10128581B2 |
Crimp terminal
A crimp terminal (1) includes a barrel (13) on which a recessed serration (14) is formed, the barrel is to be bent and crimped to a conductor portion (21) of a wire (2), and the shape of an outer edge of the serration (14) is formed so that arcs (A1 to A4) each of which is convex outward continue to each other. |
| US10128574B2 |
Antenna tuning assembly and mobile communication apparatus using same
An antenna tuning assembly is disclosed, including: a substrate; an input path on the substrate, for receiving control signals; a tuning network on the substrate, including an impedance circuit with a tunable impedance and at least one tuner connecting with the impedance circuit and the input path for generating an corresponding impedance in response to the control signals; an output path connecting with the tuning network on the substrate, for coupling to an external antenna according to the corresponding impedance. |
| US10128569B2 |
Antenna assembly and electronic device
An antenna assembly and an electronic device are provided. The antenna assembly includes: an antenna body having a feed point, a first grounding point, a second grounding point, and a third grounding point; a feed circuit connected with the antenna body via the feed point; a first grounding circuit configured to provide at least two low frequency states and connected with the antenna body via the first grounding point; a second grounding circuit connected with the antenna body via the second grounding point; and a third grounding circuit connected with the antenna body via the third grounding point. |
| US10128562B2 |
LTE/Wi-Fi wireless router
The invention relates to a wireless router, comprising at least one first antenna suitable to operate within a Wi-Fi frequency band, said first antenna comprising a ground plane and a first probing structure. The invention also relates to a second antenna comprising a second probing structure, wherein said second antenna is configured to be mounted as add-on to said Wi-Fi router. The invention further relates to an assembly of multiple second antennas. |
| US10128558B2 |
Directional couplers and devices including same
Directional couplers having a chain configuration and devices incorporating same. In some implementations, a chain coupler assembly can include a plurality of couplers each having a driver arm configured to route a respective RF signal and a coupled arm disposed physically proximate to the driver arm to detect a portion of power of the respective RF signal. Portions of the driver arm and the coupler arm can form an overlapping region. At least one of the driver arm and the coupled arm can have a non-straight arm shape, and the coupled arms of the plurality of couplers can be connected together in series. |
| US10128557B2 |
Chip-to-chip interface comprising a microstrip circuit to waveguide transition having an emitting patch
The present invention relates to a microstrip circuit and a chip-to-chip interface apparatus comprising the same. According to one aspect of the invention, there is provided a microstrip circuit. The microstrip circuit includes a feeding line providing a signal, a probe being connected to one end of the feeding line, and a patch emitting the signal to a waveguide. The patch is disposed in a layer opposite to a layer in which the feeding line and the probe are disposed, with a core substrate being positioned therebetween. At least one of length of the probe, thickness of the core substrate, and permittivity of the core substrate is determined based on bandwidth of a transition between the microstrip circuit and the waveguide. |
| US10128549B2 |
Electrical energy store
An electrical energy store for a motor vehicle has multiple battery cells oriented in the same direction. Each battery cell has two parallel sides and a cell terminal with one plus pole and one minus pole. The battery cells are in the form of pouch cells between which there is arranged a cooling foil that comprises graphite particles and a cooling duct connected in heat-transmitting fashion to the cell terminal and to the foil. |
| US10128548B2 |
Battery device, and protection method thereof
A battery device in one aspect of the present disclosure comprises a battery, a cell voltage monitoring part, a power supply line, a plurality of monitor lines, and an interrupter. The interrupter interrupts the power supply line and all of the plurality of monitor lines when the battery enters an overdischarge state. |
| US10128544B2 |
Cooling for battery units in energy storage system
Systems and methods for controlling the temperature of an energy storage system are provided. More specifically, a time period of increased battery temperature attributable to, for instance, charging or discharging of the battery can be identified. A control system can be used to reduce the ambient temperature of a space associated with the battery energy storage devices in the time period prior to or immediately before the period of increased battery temperature. The ambient temperature can be maintained at a nominal ambient temperature at other times. |
| US10128543B2 |
Molten metal rechargeable electrochemical cell
The present invention provides rechargeable electrochemical cells comprising a molten anode, a cathode, and a non-aqueous electrolyte salt, wherein the electrolyte salt is situated between the molten anode and the cathode during the operation of the electrochemical cell, and the molten anode comprises an aluminum material; also provided are batteries comprising a plurality of such rechargeable electrochemical cells and processes for manufacturing such rechargeable electrochemical cells. |
| US10128540B2 |
Lithium secondary battery
Disclosed is a lithium secondary battery including: (i) a cathode active material including a lithium metal phosphate according to Formula 1 below; (ii) an anode active material including amorphous carbon; and (iii) an electrolyte for lithium secondary batteries including a lithium salt and an ether based solvent, wherein propylene carbonate (PC) is included in an amount of 1 wt % to 60 wt % in the electrolyte for lithium secondary batteries, based on the total weight of the electrolyte, Li1+aM(PO4-b)Xb (1) wherein M is at least one selected from metals of Groups II to XII; X is at least one selected from F, S and N, −0.5≤a≤+0.5, and 0≤b≤0.1. |
| US10128538B2 |
Non-aqueous electrolytic solution and lithium ion secondary battery
The present invention provides a non-aqueous electrolytic solution comprising a phosphinoamine-based compound represented by formula (1) below and a lithium ion secondary battery comprising the non-aqueous electrolytic solution. By adding the phosphinoamine-based compound to the non-aqueous electrolytic solution, oxidative degradation in the non-aqueous electrolytic solution is suppressed, and thus gas generation is suppressed. |
| US10128537B2 |
Electrolyte formulations for electrochemical cells containing a silicon electrode
Additives to electrolytes that enable the formation of comparatively more robust SEI films on silicon anodes. The SEI films in these embodiments are seen to be more robust in part because the batteries containing these materials have higher coulombic efficiency and longer cycle life than comparable batteries without such additives. The additives preferably contain a nitrate group. |
| US10128535B2 |
Secondary battery including electrolytic solution having an unsaturated cyclic ester carbonate, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus including the same
A secondary battery includes: a cathode; an anode; and an electrolytic solution. The anode includes a carbon material and styrene-butadiene rubber. The electrolytic solution includes an unsaturated cyclic ester carbonate represented by the following Formula (1). (X is a divalent group in which m-number of >C═CR1R2 and n-number of >CR3R4 are bonded in any order. Each of R1 to R4 is one of a hydrogen group, a halogen group, a monovalent hydrocarbon group, a monovalent halogenated hydrocarbon group, a monovalent oxygen-containing hydrocarbon group, and a monovalent halogenated oxygen-containing hydrocarbon group. Any two or more of the R1 to the R4 are allowed to be bonded to one another. m and n satisfy m≥1 and n≥0.) |
| US10128530B2 |
Multi-functional electrolyte for thermal management of lithium-ion batteries
The high thermal conduction resistances of a lithium-ion battery (LIB) severely limit the effectiveness of a conventional external thermal management system (TMS). A method for a new thermal management system for lithium-ion batteries that utilizes a multi-functional electrolyte (MFE) to remove heat locally inside the cell by evaporating a volatile component of the MFE is disclosed. These new electrolyte mixtures comprise a high vapor pressure co-solvent. The characteristics of a previously unstudied high vapor pressure co-solvent HFE-7000 (65 kPa at 25° C.) in an MFE (1 M LiTFSI in 1:1 HFE-7000/EMC), and other possible MFE compositions that can be utilized in a custom electrolyte boiling facility, are disclosed. |
| US10128528B2 |
Combinatorial chemistries for matching multiple batteries
A micro-hybrid battery system includes a lithium ion battery module configured to be coupled to an electrical load. The lithium ion battery module includes a housing. The lithium ion battery module also includes a first lithium ion battery cell disposed in the housing and having a first active material chemistry including a first cathode active material and a first anode active material. The lithium ion battery module also includes a second lithium ion battery cell electrically connected to the first lithium ion battery cell and disposed in the housing. The second lithium ion battery cell has a second active material chemistry including a second cathode active material and a second anode active material. The first and second active material chemistries are different such that the first and second lithium ion battery cells have different open circuit voltages. |
| US10128526B2 |
Electrode assembly having step, secondary battery, battery pack and device including electrode assembly, and method of manufacturing electrode assembly
There is provided an electrode assembly including a first electrode laminate having at least one or more electrode units having a first area, stacked therein, a second electrode laminate having at least one or more electrode units having a second area smaller than the first area, stacked therein, and a step portion provided by stacking the first electrode laminate and the second electrode laminate in a direction perpendicular to a plane and having a step formed due to a difference in areas of the first and second electrode laminates, the electrode assembly being characterized in that, the electrode unit is wound by a rectangular-shaped separation film such that at least a portion of the rectangular-shaped separation film covers the step portion of the electrode assembly, and a step having a shape identical to the step portion is formed. |
| US10128523B2 |
Fuel cell system and control method for the same
A fuel cell system is equipped with a fuel cell and a secondary battery. This fuel cell system is equipped with a recordation unit that records a charge-discharge history of the secondary battery, a prediction unit that predicts restriction on an output of the secondary battery based on the charge-discharge history recorded by the recordation unit, and an output control unit that starts power generation by the fuel cell prior to a timing of restriction on the output of the secondary battery, when the prediction unit predicts restriction on the output of the secondary battery and the fuel cell is in an intermittent operation state. |
| US10128522B2 |
Complete oxidation of sugars to electricity by using cell-free synthetic enzymatic pathways
The present invention is in the field of bioelectricity. The present invention provides energy generating systems, methods, and devices that are capable of converting chemical energy stored in sugars into useful electricity. |
| US10128520B2 |
Fuel cell
A fuel cell includes an electrolyte membrane electrode assembly and a resin frame member. The electrolyte membrane electrode assembly includes an electrolyte membrane, a first electrode and a second electrode. The resin frame member has a recess in which the first electrode, the electrolyte membrane, and a portion of a second electrode catalyst layer protruding from a second gas diffusion layer are disposed, and an insertion hole which is in communication with the recess and in which the second gas diffusion layer is inserted. A filling layer covering an outer edge portion of the second electrode catalyst layer and having an oxygen permeability of 2×105 ml/m2·24 hr·atm or less is formed at least in a space between an inner wall of the insertion hole and the second gas diffusion layer. |
| US10128519B2 |
Aqueous all-copper redox flow battery
The present disclosure relates to aqueous all-copper redox flow batteries. This battery comprises at least one first and second half-cell compartments including the first and second aqueous electrolyte solutions comprising a copper compound and supporting electrolytes and a first and second electrodes. The battery further comprises external storage tanks for the electrolytes residing outside of the half-cell compartments, and means for circulating the electrolytes to and from the half-cells. There is a separator between the first and the second half-cell, and the half-cells of this battery are configured to conduct oxidation and reduction reactions for charging and discharging the battery. |
| US10128516B2 |
Fuel cell system
A control device for fuel cell includes, comprising a compressor configured to supply cathode gas to a fuel cell, a driving device including at least two compressor driving sources including a drive motor and a driving body using a power source other than the drive motor, the driving device configured to drive the compressor by the driving sources; and a control unit. The control unit configured to control a state of the power source on the basis of an operating state of the fuel cell, and the control unit selects the driving source to be used out of the compressor driving sources on the basis of the state of the power source. |
| US10128510B2 |
Advanced electrocatalysts for oxygen reduction reaction
Provided are nanocomposites including an iron-based core and a nitrogen-doped graphitic carbon shell, and methods of making and using the same. Included in the nanocomposites is an Fe3C-based interlayer between the core and the shell. The nanocomposites can show a catalytic activity toward reducing oxygen comparable to commercial Pt/C catalysts. |
| US10128509B2 |
Gas vent for electrochemical cell
An electrochemical cell system is configured to utilize an ionically conductive medium flowing through a plurality of electrochemical cells. One or more gas vents are provided along a flow path for the ionically conductive medium, so as to permit gasses that evolve in the ionically conductive medium during charging or discharging to vent outside the cell system, while constraining the ionically conductive medium within the flow path of the electrochemical cell system. |
| US10128504B2 |
Negative active material for rechargeable lithium battery, and rechargeable lithium battery including same
A negative active material for a rechargeable lithium battery, including crystalline carbon-based material particles, for which a maximum volume % in a graph of a particle size distribution on a volume basis is about 20 volume % or more. |
| US10128503B2 |
Conductive fibrous materials
There is provided a conductive fibrous material comprising a plurality of carbonaceous fibers, wherein each carbonaceous fiber is fused to at least one other fiber. The carbonaceous fibers may be fused at fiber-to-fiber contact points by a polymer. The process of making the conductive fibrous material comprises mixing a phenolic polymer with a second polymer to form a polymer solution, preparing phenolic fibers having nano- or micro-scale diameters by electrospinning the polymer solution, and subsequent carbonization of the obtained phenolic fibers, thereby generating carbonaceous fibers, wherein each carbonaceous fiber is fused to at least one other fiber. The conductive fibrous material may be useful in electrode materials for energy storage devices. |
| US10128502B2 |
Positive electrode active material and lithium secondary battery including the same
Disclosed herein are a positive electrode active material including at least one selected from among compounds represented by Formula 1 below and a lithium secondary battery including the same that is capable of improving lifetime characteristics and rate characteristics while exhibiting excellent safety: xLi2MyMn(1-y)O3-zAz*(1−x)LiM′O2-z′A′z′ (1), where M is at least one element selected from a group consisting of Ru, Mo, Nb, Te, Re, Ir, Pt, Cr, S, W, Os, and Po, M′ is at least one element selected from a group consisting of Ni, Ti, Co, Al, Mn, Fe, Mg, B, Cr, Zr, Zn, and second row transition metals, A and A′ are each independently a negative monovalent or divalent anion, and 0 |
| US10128501B2 |
Nickel composite hydroxide and manufacturing method thereof, cathode active material for nonaqueous-electrolyte secondary battery and manufacturing method thereof, and nonaqueous-electrolyte secondary battery
Provided are a cathode active material having a suitable particle size and high uniformity, and a nickel composite hydroxide as a precursor of the cathode active material. When obtaining nickel composite hydroxide by a crystallization reaction, nucleation is performed by controlling a nucleation aqueous solution that includes a metal compound, which includes nickel, and an ammonium ion donor so that the pH value at a standard solution temperature of 25° C. becomes 12.0 to 14.0, after which, particles are grown by controlling a particle growth aqueous solution that includes the formed nuclei so that the pH value at a standard solution temperature of 25° C. becomes 10.5 to 12.0, and so that the pH value is lower than the pH value during nucleation. The crystallization reaction is performed in a non-oxidizing atmosphere at least in a range after the processing time exceeds at least 40% of the total time of the particle growth process from the start of the particle growth process where the oxygen concentration is 1 volume % or less, and with controlling an agitation power requirement per unit volume into a range of 0.5 kW/m3 to 4 kW/m3 at least during the nucleation process. |
| US10128497B2 |
Water-free titania-bronze thin films with superfast lithium ion transport
A multilayered structure including a substrate and a layer of calcium-doped bronze is disclosed. A multilayered structure including a substrate, a layer of calcium-doped bronze, and a layer of pure bronze is also disclosed. A method for fabricating a multilayer structure including a substrate and a layer of calcium-doped bronze is also disclosed. |
| US10128493B2 |
Negative electrode active material, negative electrode and battery
Provided is a negative electrode active material which can improve discharge capacity per amount and charge-discharge cycle characteristics. The negative electrode active material of the present embodiment contains at least one of material A and material B, and material C: material A: carbonaceous powder material in which a ratio of a peak intensity at 1360 cm−1 with respect to a peak intensity at 1580 cm−1 in the Raman spectrum is not more than 0.5; material B: carbonaceous powder material in which a ratio of a peak intensity at 1360 cm−1 with respect to a peak intensity at 1580 cm−1 in the Raman spectrum is more than 0.5; material C: powder material whose main component is an active substance made up of an alloy phase. This alloy phase undergoes thermoelastic diffusionless transformation when releasing metal ions or occluding the metal ions. |
| US10128492B2 |
Positive electrode for alkaline storage batteries and alkaline storage battery
A positive electrode for alkaline storage batteries that enables to improve the active material utilization rate, while suppressing the self-discharge. The positive electrode for alkaline storage batteries includes a support having conductivity, and a positive electrode active material adhering to the support. The positive electrode active material includes particles of a nickel oxide. The particles of the nickel oxide include a first particle group having a particle diameter of 20 μm or more, and a second particle group having a particle diameter of less than 20 μm. The first particle group includes a first component with cracks, and a second component without cracks. The proportion of the first particle group in the particles of the nickel oxide is 15 vol % or more, and the proportion by number of the first component in the first particle group is 15% or more. |
| US10128489B2 |
Surface modifications for electrode compositions and their methods of making
Compositions and methods of making are provided for surface modified electrodes and batteries comprising the same. The compositions may comprise a base composition having an active material capable of intercalating the metal ions during a discharge cycle and deintercalating the metal ions during a charge cycle, wherein the active material is selected from the group consisting of LiCoO2, LiMn2O4, Li2MnO3, LiNiO2, LiMn1.5Ni0.5O4, LiFePO4, Li2FePO4F, Li3CoNiMnO6, Li(LiaNixMnyCoz)O2, LiaMn1.5-bNi0.5-cMdO4-x, and mixtures thereof. The compositions may also comprise an annealed composition covering a portion of the base composition, formed by a reaction of the base composition in a reducing atmosphere. The methods of making comprise providing the base composition and annealing the base electrode in a reducing atmosphere. |
| US10128479B2 |
Method for manufacturing separator of fuel cell stack
A method for manufacturing a separator of a fuel cell stack includes: forming a gasket on the separator of the fuel cell stack; masking a surface of the separator except for a region of the surface of the separator on which the gasket is formed; and inserting the partially masked separator into a chamber to cross-link the gasket. |
| US10128466B2 |
Light-emitting device
A light-emitting device includes a first electrode and a second electrode opposed to each other, a first stack between the first and second electrodes, the first stack being adjacent to the first electrode and including a first light-emitting layer, a second stack between the first and second electrodes, the second stack being adjacent to the second electrode and including a second light-emitting layer, and a charge generation structure between the first and second stacks, the charge generation structure including an n-type charge generation layer, an interlayer organic layer, and a p-type charge generation layer which are sequentially stacked on the first stack. |
| US10128465B2 |
Display device including sealing structure which suppresses water penetration into display region
A display device, which includes a display region constituted by a plurality of pixels, includes a first substrate having a hygroscopic agent formed in a peripheral region outside the display region and a sealing film covering the hygroscopic agent, a second substrate disposed facing the first substrate, and an adhesive layer, at least a portion of which is disposed closer to the side of the display region than the hygroscopic agent, and which bonds the first substrate to the second substrate. |
| US10128463B2 |
Display device
A display device, including a display region formed of a plurality of pixels and a frame region formed on an outer side of the display region, includes a sealing film configured to cover the display region, a blocking portion formed in the frame region surrounding the display region, and buffering portions formed at least at two positions so as to be separated from each other on at least one straight line path extending from the display region to reach the blocking portion.In one embodiment of the present invention, the buffering portions have a wave shape in plan view. |
| US10128461B2 |
Display apparatus and method of manufacturing the display apparatus
A display apparatus includes a first display area including a first display unit configured to generate light and a first encapsulation unit disposed on the first display unit; a second display area including a second display unit configured to generate light and a second encapsulation unit disposed on the second display unit; and a through area disposed between the first display area and the second display area. The first encapsulation unit includes a first encapsulation layer covering a first side of an area of the first display unit corresponding to the through area. The second encapsulation unit includes a second encapsulation layer covering a second side of an area of the second display unit corresponding to the through area. |
| US10128459B2 |
Display device
A display device includes: a display panel including a display area and a pad area; a window disposed opposite to the display panel and covering the display area and the pad area; a printed layer located on a portion of the window overlapping the pad area; an adhesive layer located between the window and the display panel and covering at least a portion of an upper surface of the printed layer; and a reflection layer located between the printed layer and the adhesive layer. |
| US10128457B2 |
Light-emitting device and power-generating device
A light-emitting device having a light-extraction structure includes: a first electrode; a second electrode; a light-emitting layer disposed between the first electrode and the second electrode; and an inorganic-material-based layer disposed between the first electrode and the light-emitting layer or between the second electrode and the light-emitting layer. The inorganic-material-based layer has thickness of 100 nm or more and has conductivity of 10−6 Ω−1 cm−1 or more and 100 Ω−1 cm−1 or less. |
| US10128448B2 |
Transition metal complexes with carbene ligands and the use thereof in OLEDs
The present invention relates to iridium and platinum carbene complexes of the general formula (I), to OLEDs (Organic Light-Emitting Diodes) which comprise such complexes, to a device selected from the group consisting of illuminating elements, stationary visual display units and mobile visual display units comprising such an OLED, to the use of such a metal-carbene complex in OLEDs, for example as emitter, matrix material, charge transport material and/or charge or exciton blocker. |
| US10128443B2 |
Organic light-emitting device
An organic light-emitting device includes a first electrode; a second electrode facing the first electrode; and an organic layer between the first electrode and the second electrode and including an emission layer. The emission layer includes a first material represented by Formula 1 and a second material represented by Formula 2: |
| US10128437B1 |
Semiconductor structures including memory materials substantially encapsulated with dielectric materials, and related systems and methods
A semiconductor structure includes stack structures. Each of the stack structures comprises a first conductive material, a chalcogenide material over the first conductive material, a second conductive material over the chalcogenide material, and a first dielectric material between the chalcogenide material and the first conductive material and between the chalcogenide material and the second conductive material. The semiconductor structure further comprises a second dielectric material on at least sidewalls of the chalcogenide material. The chalcogenide material may be substantially encapsulated by one or more dielectric materials. Related semiconductor structures and related methods are disclosed. |
| US10128436B2 |
Storage element and memory
A storage element including a storage layer configured to hold information by use of a magnetization state of a magnetic material, with a pinned magnetization layer being provided on one side of the storage layer, with a tunnel insulation layer, and with the direction of magnetization of the storage layer being changed through injection of spin polarized electrons by passing a current in the lamination direction, so as to record information in the storage layer, wherein a spin barrier layer configured to restrain diffusion of the spin polarized electrons is provided on the side, opposite to the pinned magnetization layer, of the storage layer; and the spin barrier layer includes at least one material selected from the group composing of oxides, nitrides, and fluorides. |
| US10128434B2 |
Hall element module
The present invention provides a Hall element module for achieving miniaturization. A Hall element module includes a Hall element having an element surface and an element back surface, a terminal portion electrically connected to the Hall element and separated from the Hall element as viewed in a z direction, and a resin package covering at least one portion of each of the Hall element and the terminal. The resin package has a rectangular shape with four sides along the x direction and the y direction as viewed in the z direction. The terminal portion includes a terminal back surface facing the z direction and exposed from the resin package. An end edge of the terminal back surface includes a terminal back surface inclined portion opposed to the Hall element and inclined with respect to the x direction and the y direction as viewed in the z direction. |
| US10128426B1 |
LS core LED connector system and manufacturing method
The present invention relates to a new method, system and apparatus for light emitting diode (LED) packages. An object of the present invention is to provide an LED package having reduced components, a superior heat dissipation property and a compact structure that is easy to assemble, does not largely restrict use of conventional equipment for its manufacture, and is compatible with implementation within present illumination devices packaging. |
| US10128425B2 |
Semiconductor light emitting device
A semiconductor light emitting device includes a light emitting structure including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer; and an insulating layer on the light emitting structure and including first and second through-holes. The insulating layer includes a first lower insulating layer and a second lower insulating layer. The first insulating layer is disposed on the first conductivity-type semiconductor layer and is surrounded by the second lower insulating layer with the first through-hole interposed therebetween. |
| US10128424B2 |
Method for producing optoelectronic semiconductor components and optoelectronic semiconductor component
The invention relates in at least one embodiment to the production of optoelectronic semiconductor components and comprises the steps: A) providing an intermediate carrier (2) having a plurality of fixing points (23), B) providing optoelectronic semiconductor chips (3) each having a chip upper side (30) and a mounting side (32) located opposite thereto, wherein electric contact points (34) of the semiconductor chips (3) are each located on the mounting sides (32), C) attaching connecting means (4), D) fixing the contact points (34) to the fixing points (23) by means of the connecting means (4), E) producing a potting layer (5), such that the semiconductor chips (3) and the contact points (34) and the connecting means (4) are directly surrounded all round by the potting layer (5), F) detaching the semiconductor chips (3), such that the connecting means (4) are removed from the semiconductor chips (3) and recesses (44) are each provided at the contact points (34) as a negative form in relation to the connecting regions (4), and G) producing electric contact structures (6). |
| US10128420B2 |
LED package structure and chip-scale light emitting unit
The present disclosure discloses an LED package structure and a chip-scale light emitting unit. The chip-scale light emitting unit includes an LED chip, a phosphor sheet, and at least one light guiding group. The phosphor sheet covers entirely a top surface of the LED chip. The phosphor sheet has a light emitting surface arranged away from the LED chip, and the light emitting surface has a central region and a ring-shaped region surrounding the central region. The light guiding group is disposed on the ring-shaped region and covers at least 60% of an area of the ring-shaped region of the phosphor sheet, and the central region is not covered by the light guiding group. The light guiding group includes a plurality of light guiding micro-structures. |
| US10128415B2 |
Light source and display device using the same
A light source for a display device, includes: a first LED chip emitting a first light having a peak located within the range of wavelengths 380 nm to 500 nm, and a second LED chip emitting a second light having a peak located within the range of wavelengths 380 nm to 500 nm, wherein the peak wavelength of the second light is longer than the peak wavelength of the first light, and the difference between the peak wavelength of the second light and the peak wavelength of the first light is less than 40 nm and greater than or equal to 10 nm. |
| US10128406B2 |
GaN template substrate
A device substrate in which no streaked morphological abnormality occurs is achieved. A GaN template substrate includes: a base substrate; and a first GaN layer epitaxially formed on the base substrate, wherein the first GaN layer has a compressive stress greater than or equal to 260 MPa that is intrinsic in an inplane direction, or a full width at half maximum of a peak representing E2 phonons of GaN near a wavenumber of 568 cm−1 in a Raman spectrum is lower than or equal to 1.8 cm−1. With all of these requirements, a device substrate includes: a second GaN layer epitaxially formed on the first GaN layer; and a device layer epitaxially formed on the second GaN layer and made of a group 13 nitride. |
| US10128405B2 |
Optoelectronic component and method for the production thereof
A method of producing an optoelectronic component, comprising the method steps: A) providing a growth substrate (1); B) growing at least one semiconductor layer (2) epitaxially, to produce an operationally active zone; C) applying a metallic mirror layer (3) to the semiconductor layer (2); D) applying at least one contact layer (8) for electronic contacting of the component; E) detaching the growth substrate (1) from the semiconductor layer (2), so exposing a surface of the semiconductor layer (2); and F) structuring the semiconductor layer (2) by means of an etching method from the side of the surface which was exposed in method step E). |
| US10128399B1 |
Lateral-effect position-sensing detector
A lateral-effect position-sensing detector includes a second lateral-current collector layer, an electron barrier layer on the second lateral-current collector layer, an absorber layer on the electron barrier layer, a first lateral-current collector layer on the absorber layer, and a first elongate electrical contact and a second elongate electrical contact on each of the lateral-current collector layers. Incident light radiates a transparent first lateral-current collector layer to be absorbed by the undepleted absorber layer where electron and holes are generated. The depleted electron barrier layer prevents a flow of electrons from the absorber layer to the second lateral-current collector layer but allows electrons to flow to the second lateral-current collector layer. The lateral-effect position-sensing detector is sensitive to a lateral position between the first elongate electrical contact and the second elongate electrical contact of incident light on each of the lateral-current collector layer. |
| US10128398B1 |
Resonance avalanche photodiodes for dynamic biasing
Systems and methods implementing a resonance circuit, including an avalanche photodiode, in which a resonance frequency of the resonance circuit is matched with the frequency of a dynamic biasing signal of the avalanche photodiode, can be used in a variety of applications. In various embodiments, a method for blocking and/or compensating current injection associated with the parasitic capacitance of APDs operated under dynamic biasing may be substantially realized by the matching of the resonance frequency of a resonance circuit including the avalanche photodiode with the frequency of an applied dynamic biasing signal. Additional systems and methods are described that can be used in a variety of applications. |
| US10128397B1 |
Low excess noise, high gain avalanche photodiodes
A system, method, and apparatus for an avalanche photodiode with an enhanced multiplier layer are disclosed herein. In particular, the present disclosure teaches an avalanche photodiode having a multiplier with alternating layers of one or more quantum wells and one or more spacers. A method of making the avalanche photodiode includes growing the multiplier on a substrate. |
| US10128394B2 |
Nanowire-based solar cell structure
The solar cell structure according to the present invention comprises a nanowire (205) that constitutes the light absorbing part of the solar cell structure and a passivating shell (209) that encloses at least a portion of the nanowire (205). In a first aspect of the invention, the passivating shell (209) of comprises a light guiding shell (210), which preferably has a high- and indirect bandgap to provide light guiding properties. In a second aspect of the invention, the solar cell structure comprises a plurality of nanowires which are positioned with a maximum spacing between adjacent nanowires which is shorter than the wavelength of the light which the solar cell structure is intended to absorbing order to provide an effective medium for light absorption. Thanks to the invention it is possible to provide high efficiency solar cell structures. |
| US10128392B2 |
Method for manufacturing a thin film solar cell arrangement and such a thin film solar cell arrangement
Solar cell arrangement of a thin film solar cell array on a substrate; each solar cell being layered with a bottom electrode, a photovoltaic active layer, a top electrode and an insulating layer. A first trench and a second trench parallel to the first trench at a first side, separate a first solar cell and an adjacent second solar cell. The first and second trenches are filled with insulating material. The first trench extends to the substrate. The second trench extends into the photovoltaic active layer below the top electrode. A third trench extending to the bottom electrode is between the first and second trench. A fourth trench extending to the top electrode is at a second side of the first trench. The third and fourth trench are filled with conductive material. A conductive bridge connects the third trench and the fourth trench across the first trench. |
| US10128388B2 |
Methods for treating a polycarbonate glass surface and forming directed hierarchical nanopatterning and increasing hydrophobicity
A method of treating a polycarbonate glass surface, such as a bisphenol A polycarbonate, whereby the glass surface is immersed in a liquid phase polar aprotic solvent, such as dichloromethane, and exposed to a vapor phase polar aprotic solvent, such as acetone thus obtaining a textured glass surface with a hierarchical patterned nanoporous structure wherein the textured glass surface has a higher surface hydrophobicity and a marginally reduced optical light transmittance relative to the polycarbonate glass surface prior to the immersion, the exposure, or both. |
| US10128385B2 |
Lateral single-photon avalanche diode and method of producing a lateral single photon avalanche diode
A semiconductor body of a first type of conductivity is formed including a base layer, a first further layer on the base layer and a second further layer on the first further layer. The base layer and the second further layer have an intrinsic doping or a doping concentration that is lower than the doping concentration of the first further layer. A doped region of an opposite second type of conductivity is arranged in the semiconductor body, penetrates the first further layer and extends into the base layer and into the second further layer. Anode and cathode terminals are electrically connected to the first further layer and the doped region, respectively. The doped region can be produced by filling a trench with doped polysilicon. |
| US10128384B2 |
Semiconductor device
A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer. |
| US10128381B2 |
Semiconductor device with oxygen rich gate insulating layer
A thin film transistor structure in which a source electrode and a drain electrode formed from a metal material are in direct contact with an oxide semiconductor film may lead to high contact resistance. One cause of high contact resistance is that a Schottky junction is formed at a contact plane between the source and drain electrodes and the oxide semiconductor film. An oxygen-deficient oxide semiconductor layer which includes crystal grains with a size of 1 nm to 10 nm and has a higher carrier concentration than the oxide semiconductor film serving as a channel formation region is provided between the oxide semiconductor film and the source and drain electrodes. |
| US10128374B2 |
Metal oxide semiconductor having epitaxial source drain regions and a method of manufacturing same using dummy gate process
A semiconductor device in which sufficient stress can be applied to a channel region due to lattice constant differences. |
| US10128370B2 |
Semiconductor device
A semiconductor device capable of increasing a value of current that flows through the whole chip until a p-n diode in a unit cell close to a termination operates and reducing a size of the chip and a cost of the chip resulting from the reduced size, and including a second well region formed on both sides, as seen in plan view, of the entirety of a plurality of first well regions, a second ohmic electrode located over the second well region, a third separation region of a first conductivity type that is positioned closer to the first well regions than the second ohmic electrode in the second well region and that is formed to penetrate the second well region from a surface layer of the second well region in a depth direction, and a second Schottky electrode located on the third separation region. |
| US10128368B2 |
Double gate trench power transistor and manufacturing method thereof
A double gate trench power transistor and manufacturing method thereof are provided. The double gate trench power transistor gate structure includes an epitaxial layer, a trench structure formed in the epitaxial layer, at least two gate structures, and a shielding electrode structure. The trench structure includes a deep trench portion and two shallow trench portions respectively adjacent to two opposite sides of the deep trench portion. Each of the gate structures formed in each of the shallow trench portions includes a gate insulating layer and a gate electrode. The gate insulating layer has a first dielectric layer, a second dielectric layer and a third dielectric layer. The second dielectric layer is interposed between the first and third dielectric layers. Additionally, a portion of the gate insulating layer is in contact with a shielding dielectric layer of the shielding electrode structure. |
| US10128365B2 |
Bypassed gate transistors having improved stability
A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region. |
| US10128364B2 |
Semiconductor devices with an enhanced resistivity region and methods of fabrication therefor
Embodiments of a semiconductor device include a base substrate including an upper surface, a nucleation layer disposed over the upper surface of the base substrate, a first semiconductor layer disposed over the nucleation layer, a second semiconductor layer disposed over the first semiconductor layer, a channel within the second semiconductor layer and proximate to an upper surface of the second semiconductor layer, and an enhanced resistivity region with an upper boundary proximate to an upper surface of the first semiconductor layer. The enhanced resistivity region has an upper boundary located a distance below the channel. Embodiments of a method of fabricating the semiconductor device include implanting one or more ion species through the first semiconductor layer to form the enhanced resistivity region. |
| US10128363B2 |
Field effect transistor
Provided is a field-effect transistor (FET) that achieves compatibility between a higher current density and lower contact resistance and exhibits excellent properties, and a method for producing the FET. The FET includes: a channel layer above a substrate; an InAlN layer above the channel layer; an InxAlyGa1-(x+y)N layer on the InAlN layer, where 0 |
| US10128359B2 |
Semiconductor device with improved short circuit capability
A semiconductor device in which short circuit capability can be improved while decline in overall current capability is suppressed. In the semiconductor device, a plurality of IGBTs (insulated gate bipolar transistors) arranged in a row in one direction over the main surface of a semiconductor substrate include an IGBT located at an extreme end in the one direction and an IGBT located more centrally than the IGBT located at the extreme end. The current capability of the IGBT located at the extreme end is higher than the current capability of the IGBT located centrally. |
| US10128357B2 |
Process for forming homoepitaxial tunnel barriers with hydrogenated graphene-on-graphene for room temperature electronic device applications
A homoepitaxial, ultrathin tunnel barrier-based electronic device in which the tunnel barrier and transport channel are made of the same material—graphene. |
| US10128356B2 |
P-tunneling field effect transistor device with pocket
Tunneling field effect transistors (TFETs) are described herein. In an example, a TFET includes a pocket disposed near a junction of a source region, wherein the pocket region is formed from a material having lower percentage of one type of atom than percentage of the one type of atom in source, channel, and drain regions. |
| US10128355B2 |
Method for forming fin field effect transistor (FINFET) device
Methods for forming a fin field effect transistor (FinFET) device structure are provided. The method includes providing a first fin structure and a second fin structure extending above a substrate and forming an isolation structure over the substrate, and the an upper portion of the first fin structure and an upper portion of the second fin structure protrudes from the isolation structure. The method also includes forming a first transistor and a second transistor on the first fin structure and the second fin structure, and the first transistor includes a first gate dielectric layer. The method further includes forming an inter-layer dielectric (ILD) structure between the first transistor and the second transistor, and a portion of the first gate dielectric layer above the isolation structure is in direct contact with a sidewall of the ILD structure. |
| US10128352B2 |
Gate tie-down enablement with inner spacer
A gate tie-down structure includes a gate structure including a gate conductor and gate spacers and inner spacers formed on the gate spacers. Trench contacts are formed on sides of the gate structure. An interlevel dielectric (ILD) has a thickness formed over the gate structure. A horizontal connection is formed within the thickness of the ILD over an active area connecting the gate conductor and one of the trench contacts over one of the inner spacers. |
| US10128349B2 |
Semiconductor device
A semiconductor device is provided that is excellent in semiconductor properties and Schottky characteristics. A semiconductor device includes: a semiconductor layer containing a crystalline oxide semiconductor with a corundum structure as a major component; and a Schottky electrode on the semiconductor layer, wherein the Schottky electrode is formed by containing a metal of Groups 4-9 of the periodic table, thereby manufacturing a semiconductor device excellent in semiconductor properties and Schottky characteristics without impairing the semiconductor properties to use the semiconductor device thus obtained for a power device and the like. |
| US10128346B2 |
Semiconductor device
A semiconductor device includes a semiconductor pattern on a substrate along a first direction, a blocking pattern on a top surface of the semiconductor pattern, a first wire pattern on the blocking pattern along a second direction different from the first direction, the first wire including a first part and a second part on opposite sides of the first part, a gate electrode surrounding the first part of the first wire pattern, and a contact surrounding the second part of the first wire pattern, wherein a height of a bottom surface of the contact from a top surface of the substrate is different from a height of a bottom surface of the gate electrode from the top surface of the substrate. |
| US10128337B2 |
Methods for forming fin structures with desired profile for 3D structure semiconductor applications
Methods for forming fin structures with desired profile and dimensions for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. The methods include a structure reshaping process to reshape a shaped structure, such as a diamond like structure formed on a fin structure. In one embodiment, a method for forming a structure on a substrate includes performing an epitaxial deposition process to form a shaped structure on a fin structure disposed on a substrate, performing a mask layer deposition process to form a mask layer having a first width on the shaped structure, and performing a mask trimming process to trim the mask layer from the first width from a second width. |
| US10128336B2 |
Semiconductor devices and methods for manufacturing the same
Semiconductor devices and methods of manufacturing semiconductor devices. A semiconductor device includes a metal gate electrode stacked on a semiconductor substrate with a gate insulation layer disposed therebetween, spacer structures disposed on the semiconductor substrate at both sides of the metal gate electrode, source/drain regions formed in the semiconductor substrate at the both sides of the metal gate electrode, and an etch stop pattern including a bottom portion covering the source/drain regions and a sidewall portion extended from the bottom portion to cover a portion of sidewalls of the spacer structures, in which an upper surface of the sidewall portion of the etch stop pattern is positioned under an upper surface of the metal gate electrode. |
| US10128335B2 |
Nanowire semiconductor device including lateral-etch barrier region
A semiconductor device includes a semiconductor-on-insulator wafer having a buried oxide layer. The buried oxide layer includes therein opposing etch barrier regions and a gate region between the etch barrier regions. The semiconductor device further includes at least one nanowire having a channel portion interposed between opposing source/drain portions. The channel portion is suspended in the gate region. A gate electrode is formed in the gate region, and completely surrounds all surfaces of the suspended nanowire. The buried oxide layer comprises a first electrical insulating material, and the etch barrier regions comprising a second electrical insulating material different from the first electrical insulating material. |
| US10128334B1 |
Field effect transistor having an air-gap gate sidewall spacer and method
A method is disclosed wherein a gate, having a gate cap and a sacrificial gate sidewall spacer, is formed adjacent to channel region(s) of a transistor and metal plugs, having plug caps, are formed on source/drain regions. The sacrificial gate sidewall spacer is selectively etched, creating a cavity that exposes sidewalls of the gate and gate cap. Optionally, the sidewalls of the gate cap are etched back to widen the upper portion of the cavity. A dielectric spacer layer is deposited to form an air-gap gate sidewall spacer within the cavity. Since different materials are used for the plug caps, gate cap and dielectric spacer layer, a subsequently formed gate contact opening will be self-aligned to the gate. Thus, a gate contact can be formed over an active region (or close thereto) without risk of gate contact-to-metal plug shorting. A structure formed according to the method is also disclosed. |
| US10128332B2 |
Method for fabricating an improved field effect device
A SOI substrate is covered by a semiconductor material pattern which includes a dividing pattern made from electrically insulating material. The dividing pattern is coated by one or more semiconductor materials. The semiconductor material pattern is covered by a gate electrode which is facing the dividing pattern. The semiconductor material pattern and the gate pattern are covered by a cap layer. The substrate is eliminated to access the source/drain regions. Two delineation patterns are formed to cover the source region and drain region and to leave the dividing pattern free. A second cap layer is deposited and access vias are formed to access the source/drain regions by elimination of the delineation patterns. |
| US10128331B1 |
High-voltage semiconductor device and method for manufacturing the same
A high-voltage semiconductor device is provided. The device includes an epitaxial layer formed on a semiconductor substrate. The semiconductor substrate includes a first doping region having a first conductivity type. The epitaxial layer includes a body region that has a second conductivity type and a second doping region and a third doping region that have the first conductivity type. The second doping region and the third doping region are respectively on both opposite sides of the body region. A source region and a drain region are respectively in the body region and the second doping region. A gate structure is on the epitaxial layer. A fourth doping region having the second conductivity region is below the source region and adjacent to the bottom of the body region. The fourth doping region has a doping concentration greater than that of the body region. |
| US10128330B1 |
Semiconductor device with a buried junction layer having an interspersed pattern of doped and counter-doped materials
A semiconductor device having a novel buried junction architecture. The semiconductor device may have three terminals and a drift region between two of the terminals. The drift region includes an upper drift layer, a lower drift layer, and a buried junction layer between the upper and lower drift layers, wherein the upper and lower drift layers have a first type of doping. The buried junction layer comprises an interspersed pattern of a first material and a second material, the first material having a second type of doping opposite the first type of doping and the second material having the first type of doping and having a different doping concentration than the upper and lower drift layers. |
| US10128327B2 |
DRAM interconnect structure having ferroelectric capacitors exhibiting negative capacitance
An interconnect structure for use in coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors. In one embodiment, the negative capacitor includes a dielectric/ferroelectric bi-layer. When a negative capacitor is electrically coupled in series with a conventional dielectric capacitor, the series combination behaves like a stable ferroelectric capacitor for which the overall capacitance can be measured experimentally, and tuned to a desired value. The composite capacitance of a dielectric capacitor and a ferroelectric capacitor having negative capacitance coupled in series is, in theory, infinite, and in practice, very large. A series combination of positive and negative capacitors within a microelectronic interconnect structure can be used to make high capacity DRAM memory cells. |
| US10128325B2 |
Inductor structures for integrated circuits
Multiple intertwined inductor coils combine to form one or more transformer devices of a semiconductor device. The intertwined inductor coils are formed of only two metallization layers and vias coupling the layers. The inductor coils are vertically oriented and include a magnetic axis parallel to the substrate surface. A plurality of metal wires are provided on both a first device level and a second device level. Each of the metal wires on the first device level is coupled to two wires on the second device level and forms a first inductor coil. The two metal wires on the second device level that form part of the first inductor coil, are separated by a third wire that is coupled to two different first device level metal wires and forms part of a different second inductor coil intertwined with the first inductor coil. |
| US10128317B2 |
Method for eliminating electrical cross-talk in OLED microdisplays
An OLED microdisplay comprising a substrate, a pixel array and a patterned conductive layer underneath the anode pad array to form an effective ground plane in order to greatly reduce or eliminate electrical cross-talk between pixels, and a method for fabricating same. |
| US10128315B2 |
Methods of forming phase change memory apparatuses
Phase change memory apparatuses include memory cells including phase change material, bit lines electrically coupled to aligned groups of at least some of the memory cells, and heating elements electrically coupled to the phase change material of the memory cells. The heating elements include vertical portions extending in a bit line direction. Additional phase change memory apparatuses include dummy columns positioned between memory columns and base contact columns. The dummy columns include phase change memory cells and lack heating elements coupled to the phase change memory cells thereof. Additional phase change memory apparatuses include heating elements operably coupled to phase change memory cells. An interfacial area between the heating elements and the phase change memory cells has a length that is independent of a bit line width. Methods relate to forming such phase change memory apparatuses. |
| US10128314B2 |
Vertical bipolar transistor
The disclosure relates to an integrated circuit comprising a transistor comprising first and second conduction terminals and a control terminal. The integrated circuit further comprises a stack of a first dielectric layer, a conductive layer, and a second dielectric layer, the first conduction terminal comprising a first semiconductor region formed in the first dielectric layer, the control terminal comprising a second semiconductor region formed in the conductive layer, and the second conduction terminal comprising a third semiconductor region formed in the second dielectric layer. |
| US10128313B2 |
Non-volatile memory device and structure thereof
In the present disclosure, a non-volatile memory cell comprises a data storage unit, a selection unit and a switching unit. The data storage unit is configured to store an information bit and has a first end and a second end. The first end is coupled to a bit line. The selection unit is configured to access the data storage unit, and the selection unit has a first end coupled to a select line, a second end coupled to the second end of the data storage unit, and a third end coupled to a source line. The switching unit is configured to perform a formation operation and has a first end coupled to a forming line and a second end coupled to the second end of the data storage unit. |
| US10128311B2 |
Magnetic memory device
According to one embodiment, a magnetic memory device includes a memory cell array unit including magnetoresistive elements provided in an array in first and second directions, each including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer between the first and second magnetic layers, first transistors provided in an array in the first and second directions, and electrically connected to the magnetoresistive elements, respectively, switching units each electrically connected to corresponding ones of the first transistors in series, and each including at least one second transistor, wherein the first magnetic layers are separated from each other in the first and second directions, and the second magnetic layers are continuously provided in the first and second directions. |
| US10128309B2 |
Storage layer for magnetic memory with high thermal stability
Memory cells and method of forming thereof are presented. The method includes forming a magnetic tunnel junction (MTJ) element which includes a fixed magnetic layer, a tunneling barrier layer and a composite free magnetic layer. The composite free magnetic layer includes an insertion layer between first and second free magnetic layers. The insertion layer includes an oxide or oxidized layer. The insertion layer increases the overall thickness of the free layer, decreasing switching current as well as thermal stability. The oxidized layer may be MgO or HfOx. A surface layer may be provided over the oxide or oxidized layer to further enhance magnetic anisotropy to further decrease switching current. The surface layer is Ta, Ti or Hf. |
| US10128308B1 |
Micro LED display device and method of fabricating the same
The present invention relates to a puzzle-type micro light emitting diode (LED) display device which is capable of implementing a display having various sizes, the micro LED display device including: a micro LED panel in which a plurality of micro LED pixels is arranged in rows and columns; and a micro LED driving substrate (backplane) configured to include an active matrix (AM) circuit unit including a plurality of CMOS cells corresponding to the plurality of micro LED pixels, and a control circuit unit disposed in an outer region of the AM circuit unit, in which the control circuit unit is disposed to be adjacent to two sides among four sides of the micro LED panel. |
| US10128303B2 |
Light absorption apparatus
A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current. |
| US10128302B2 |
IR detector array device
We disclose herein a thermal IR detector array device comprising a dielectric membrane, supported by a substrate, the membrane having an array of IR detectors, where the array size is at least 3 by 3 or larger, and there are tracks embedded within the membrane layers to separate each element of the array, the tracks also acting as heatsinks and/or cold junction regions. |
| US10128301B2 |
Semiconductor device, solid-state imaging device and electronic apparatus
A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication. |
| US10128300B2 |
Solid-state image sensor, imaging device, and electronic equipment
The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor. |
| US10128294B2 |
Light-receiving device array and light-receiving apparatus
A light-receiving apparatus includes: a light-receiving device array including a semiconductor structure including a plurality of semiconductor mesas, a plurality of grooves each of which defines one of the semiconductor mesas, a plurality of first electrodes disposed on upper surfaces of the semiconductor mesas, a plurality of first bump electrodes disposed on the first electrodes, and a metal body disposed on a bottom surface of at least one of the grooves, the metal body being spaced apart from the first electrodes and the first bump electrodes; a semiconductor device processing an electric signal from the light-receiving device array; and an underfill disposed between the light-receiving device array and the semiconductor device. The metal body is spaced apart from a surface of the semiconductor device. The semiconductor device is joined to the light-receiving device array through the first bump electrodes. |
| US10128291B2 |
Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device
The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate. |
| US10128287B2 |
Physical layout and structure of RGBZ pixel cell unit for RGBZ image sensor
An image sensor is described having a pixel cell unit. The pixel cell unit has first, second and third transfer gate transistor gates on a semiconductor surface respectively coupled between first, second and third visible light photodiode regions and a first capacitance region. The pixel cell unit has a fourth transfer gate transistor gate on the semiconductor surface coupled between a first infrared photodiode region and a second capacitance region. |
| US10128280B2 |
Display device and method for driving the same
A semiconductor device having a configuration hardly generating variations in the current value due to a deteriorated EL element is to be provided. A capacitance element is disposed between the gate and the source of a driving TFT, video signals are inputted to the gate electrode, and then it is in the floating state. Suppose an EL element is deteriorated and the anode potential rises, that is, the source potential of the driving TFT rises, the potential of the gate electrode of the driving TFT, being in the floating state by coupling of the capacitance element, is to rise by the same amount. Accordingly, even when the anode potential rises due to the deteriorated EL element, the rise is added to the gate electrode potential as it is, and the gate-source voltage of the driving TFT is allowed to be constant. |
| US10128279B2 |
Display apparatus having a stepped part
Provided is a display apparatus including a substrate and a semiconductor layer including first and second semiconductor layers. A first gate insulating layer is formed on the semiconductor layer. A first gate wiring overlapping the first semiconductor layer is formed on the first gate insulating layer. A second gate insulating layer is formed on the first gate wiring. A second gate wiring overlapping the second semiconductor layer is formed on the second gate insulating layer. A third gate insulating layer covers the second gate wiring. A driving voltage line intersecting the first and second gate wirings is formed on the third gate insulating layer. A data line intersecting the first and second gate wirings is formed on the third gate insulating layer. A short circuit protection area is formed between the first gate wiring, the second gate wiring, the driving voltage line and the data line. |
| US10128278B2 |
Thin film transistor substrate and method of manufacturing the same
A thin film transistor substrate includes a switching element comprising a gate electrode electrically connected to a gate line extending in a first direction, an active pattern overlapping with the gate electrode, a source electrode disposed on the active pattern and electrically connected to a data line extending in a second direction crossing the first direction, and a drain electrode spaced apart from the source electrode. The thin film transistor substrate further includes an organic layer disposed on the switching element, a first electrode disposed on the organic layer, and a second electrode overlapping with the first electrode, and electrically connected to the drain electrode. A thickness of the second electrode is thicker than a thickness of the first electrode. |
| US10128277B2 |
Display device
A display device includes a plurality of gate lines extending in a first direction on the display area, a plurality of source lines extending in a second direction, a plurality of lead-out lines extending in the second direction and for transmitting gate signals to the plurality of gate lines. A plurality of connecting portions each electrically connects one gate line to one lead-out line. The plurality of connecting portions pass through a first insulating layer at a plurality of jointing points which are selected among a plurality of overlapping points where the plurality of lead-out lines and the plurality of gate lines overlap in a plane area. |
| US10128275B2 |
Display device
A display device is provided. The display device includes a display region, a first conductive loop disposed outside the display region, wherein the first conductive loop includes at least one first conductive block and at least two second conductive blocks, wherein a dielectric layer is disposed between the at least one first conductive block and the at least two second conductive blocks and has at least two via holes, and wherein the at least two second conductive blocks are electrically connected the at least one first conductive block by the at least two via holes. |
| US10128274B2 |
Thin film transistor array panel and a method for manufacturing the same
A thin film transistor array panel including: a substrate; a semiconductor layer disposed on the substrate; a source electrode and a drain electrode overlapping the semiconductor layer, and a gate electrode overlapping the semiconductor layer; and a first ohmic contact disposed between the semiconductor layer and the source electrode and a second ohmic contact disposed between the semiconductor layer and the drain electrode. The semiconductor layer includes a channel part that does not overlap the source electrode and the drain electrode. The first ohmic contact includes a first edge and the second ohmic contact includes a second edge. The first and second edges face each other across the channel part of the semiconductor layer. The first edge of the first ohmic contact is protruded from the source electrode toward the channel part and the second edge of the second ohmic contact is protruded from the drain electrode toward the channel part. |
| US10128272B2 |
Thin film transistor array substrate, method for fabricating the same and display device
Disclosed are a TFT array substrate, a method for fabricating the same and a display device. The TFT array substrate includes a plurality of pixel units, each of the plurality of pixel units includes a common electrode (9). The common electrode (9), is comb-shaped, and includes a plurality of strip electrodes and a plurality of slits. Each of the strip electrodes is configured for reflecting light incident on the strip electrode, and each of the slits is configured for transmitting light incident on the slit. As the comb-shaped common electrode with both a reflective region and a transmissive region is formed through a single patterning process, the fabrication process is simplified and the fabrication cost and difficulty are reduced. |
| US10128266B2 |
Three-dimensional semiconductor memory device
A semiconductor device includes lower and upper selection lines, a cell gate structure, a lower dummy structure and an upper dummy structure. The cell gate structure is between the lower and upper selection lines and includes cell gate electrodes stacked in a first direction. The lower dummy structure is between the lower selection line and the cell gate structure and includes a lower dummy gate line spaced from a lowermost one of the cell gate electrodes by a first distance. The upper dummy structure is between the upper selection line and the cell gate structure and includes an upper dummy gate line spaced from an uppermost one of the cell gate electrodes by a second distance. The cell gate electrodes are spaced by a third distance less than each of the first and second distances. |
| US10128265B2 |
Memory cells, integrated structures and memory arrays
Some embodiments include a memory cell which has, in the following order; a control gate, charge-blocking material, charge-trapping material, a first oxide, a charge-passage structure, a second oxide, and channel material. The charge-passage structure has a central region sandwiched between first and second regions. The central region has a lower probability of trapping charges and/or a lower rate of trapping charges than the first and second regions. Some embodiments include an integrated structure having a vertical stack of alternating conductive levels and insulative levels, and having a charge-passage structure extending vertically along the vertical stack. Some embodiments include a NAND memory array having a vertical stack of alternating insulative levels and wordline levels, and having a charge-passage structure extending vertically along the vertical stack. |
| US10128261B2 |
Cobalt-containing conductive layers for control gate electrodes in a memory structure
A memory film and a semiconductor channel can be formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, a metallic barrier material portion can be formed in each backside recess. A cobalt portion can be formed in each backside recess. Each backside recess can be filled with a cobalt portion alone, or can be filled with a combination of a cobalt portion and a metallic material portion including a material other than cobalt. |
| US10128260B2 |
Semiconductor device
A semiconductor device includes a substrate including a cell region and a peripheral region adjacent to the cell region, a cell stack structure located in the cell region, the cell stack structure including vertical memory strings, a circuit located in the peripheral region, the circuit driving the vertical memory strings, and an interlayer insulating layer formed on the substrate to cover the cell stack structure and the circuit, and including air gaps located between the cell region and the peripheral region. |
| US10128259B1 |
Method for manufacturing embedded memory using high-K-metal-gate (HKMG) technology
A method for manufacturing embedded memory using high-κ-metal-gate (HKMG) technology is provided. A gate stack is formed on a semiconductor substrate. The gate stack comprises a charge storage film and a control gate overlying the charge storage film. The control gate includes a first material. A gate layer is formed of the first material, and is formed covering the semiconductor substrate and the gate stack. The gate layer is recessed to below a top surface of the gate stack, and subsequently patterned to form a select gate bordering the control gate and to form a logic gate spaced from the select and control gates. An ILD layer is formed between the control, select, and logic gates, and with a top surface that is even with top surfaces of the control, select, and logic gates. The control, select, or logic gate is replaced with a new gate of a second material. |
| US10128256B2 |
One-time programming cell
A one-time programming cell includes a first metal oxide semiconductor (MOS) structure and a second transistor having a common gate electrode electrically connected to a word line. The first MOS structure has a first gate dielectric layer and the second MOS structure has a second gate dielectric layer. The second gate dielectric layer is thicker than the first gate dielectric layer. Source nodes of the first MOS structure and the second MOS structure are electrically connected, and a drain node of the second MOS structure is electrically connected to a bit line. |
| US10128251B2 |
Semiconductor integrated circuit structure and method for forming the same
A semiconductor IC structure includes a substrate including at least a memory cell region and a peripheral region defined thereon, a plurality of memory cells formed in the memory cell region, at least an active device formed in the peripheral region, a plurality of contact plugs formed in the memory cell region, and at least a bit line formed in the memory cell region. The contact plugs are physically and electrically connected to the bit line. More important, bottom surfaces of the contact plugs are lower a surface of the substrate. |
| US10128248B1 |
Aging tolerant apparatus
An apparatus is provided which comprises: a stack of transistors of a same conductivity type, the stack including a first transistor and a second transistor coupled in series and having a common node; and a feedback transistor of the same conductivity type coupled to the common node and a gate terminal of the first transistor of the stack. |
| US10128246B2 |
Semiconductor devices including an isolation layer on a fin and methods of forming semiconductor devices including an isolation layer on a fin
Semiconductor devices are provided. A semiconductor device includes a fin protruding from a substrate. Moreover, the semiconductor device includes first and second gate structures on the fin, and an isolation region between the first and second gate structures. The isolation region includes first and second portions having different respective widths. Related methods of forming semiconductor devices are also provided. |
| US10128240B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a substrate including first to third regions, wherein the third region is positioned in a first direction between the first and second regions, a fin protruding on the substrate and extending in the first direction, first and second gate structures respectively formed on the fin in the first and second regions, first and second spacers formed with spacing apart from each other on the fin in the third region. The first and second spacers are sloped in a direction away from each other, and the first and second spacers and an upper surface of the fin define a plurality of acute angles, the first and second spacers defining a recess, the fin and the first and second spacers defining sidewalls of the recess, and a device isolating film substantially filling the recess. |
| US10128237B2 |
Methods of gate replacement in semiconductor devices
A method of forming a semiconductor device includes forming a plurality of fins on a substrate, forming a polysilicon gate structure, and replacing the polysilicon gate structure with a metal gate structure. Replacing the polysilicon gate structure includes depositing a work function metal layer over the plurality of fins, forming a metal oxide layer over the work function metal layer, and depositing a first metal layer over the metal oxide layer. A first portion of the metal oxide layer is formed within an area between adjacent fins from among the plurality of fins. An example benefit includes reduced diffusion of unwanted and/or detrimental elements from the first metal layer into its underlying layers and consequently, the reduction of the negative impact of these unwanted and/or detrimental elements on the semiconductor device performance. |
| US10128236B2 |
Semiconductor device and method for fabricating the same
A semiconductor device is provided. The semiconductor device includes a gate spacer that defines a trench on a substrate and includes an upper part and a lower part, a gate insulating film that extends along sidewalls and a bottom surface of the trench and is not in contact with the upper part of the gate spacer, a lower conductive film that extends on the gate insulating film along the sidewalls and the bottom surface of the trench and is not overlapped with the upper part of the gate spacer, and an upper conductive film on an uppermost part of the gate insulating film on the lower conductive film. |
| US10128234B2 |
Electromigration resistant semiconductor device
A semiconductor device includes first and second transistors, a pair of first source/drain regions, a pair of second source/drain regions, and a cell. Each of the first source/drain regions corresponds to a first source/drain terminal of a respective one of the first and second transistors. Each of the second source/drain regions corresponds to a second source/drain terminal of a respective one of the first and second transistors. The cell includes a first voltage rail, a pair of second voltage rails, and a cell circuit. The first voltage rail is coupled to the first source/drain regions. Each of the second voltage rails is coupled to a respective one of the second source/drain regions and is configured to be coupled to the first voltage rail. The cell circuit is coupled to one of the second voltage rails. |
| US10128231B2 |
Integrated semiconductor device and manufacturing method therefor
An integrated device includes a field effect transistor formed within and upon an active region of a substrate and a resistor formed on an isolation region of the substrate. The field effect transistor includes a gate stacked structure having respective portions of a dielectric layer, a first conductive layer and a second conductive layer arranged in order from bottom to top. The resistor includes a resistor body being an enclosure portion of the first conductive layer and resistor terminals being portions of the second conductive layer on distal ends of the resistor body. A method for manufacturing a semiconductor device includes forming a gate stacked structure and a resistor stacked structure at the same time by patterning a dielectric layer, a first conductive layer and a second conductive layer. The method also includes forming a resistor having a resistor body by patterning the resistor stacked structure. |
| US10128229B1 |
Semiconductor devices with package-level configurability
A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad. |
| US10128226B2 |
Mechanisms for forming package structure
A package structure is provided. The package structure includes a semiconductor die and a protection layer surrounding sidewalls of the semiconductor die. The package structure also includes a conductive structure penetrating through the protection layer. The package structure further includes an interfacial layer between the protection layer and the conductive structure. The interfacial layer is made of an insulating material, and the interfacial layer is in direct contact with the protection layer. The interfacial layer extends across a back side of the semiconductor die. |
| US10128219B2 |
Multi-chip module including stacked power devices with metal clip
A Multi-Chip Module (MCM) package includes a substrate having a plurality of metal terminals and at least a first die attach area. An encapsulant is around the substrate including on at least a portion of the topside and at least a portion of the bottomside of the package. At least a first device including at least two device terminals is attached face up on the first die attach area. At least a second device including at least two device terminals is flip-chip attached and stacked on the first device. At least one of the first device and second device include a transistor. At least one metal clip is between the first device and second device including a plurality of clip portions isolated from one another connecting at least one device terminal of each of the first device and second device to respective metal terminals of the plurality of metal terminals. |
| US10128217B2 |
Memory devices with controllers under memory packages and associated systems and methods
Semiconductor devices with controllers under stacks of semiconductor packages and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a package substrate, a controller attached to the package substrate, and at least two semiconductor packages disposed over the controller. Each semiconductor package includes a plurality of semiconductor dies. The semiconductor device further includes an encapsulant material encapsulating the controller and the at least two semiconductor packages. |
| US10128215B1 |
Package including a plurality of stacked semiconductor devices having area efficient ESD protection
A package may include a plurality of stacked semiconductor devices (chips) is disclosed. Each chip may include through vias (through silicon vias—TSV) that can provide an electrical connection between chips and between chips and external connections, such as solder connections or solder balls. Electro static discharge (ESD) protection circuitry may be placed on a bottom chip in the stack even when through vias connect circuitry on a top chip in the stack exclusive of the bottom chip. In this way, ESD protection circuitry may be placed in close proximity to the ESD event occurring at an external connection. In particular, every chip in the stack of semiconductor chips may have circuitry electrically connected to the external connection and by placing ESD protection circuitry on the bottom chip closest to the electrical connection, instead of on all chips ESD protection may be more area efficient. Furthermore, by only placing ESD protection circuitry on a bottom chip in a stack of semiconductor chips, ESD protection circuitry may not be included on other chips, so that total area may be reduced and more chips may be produced on a single silicon wafer. |
| US10128214B2 |
Substrate and the method to fabricate thereof
The present invention discloses a substrate where the lateral surface of the substrate is formed to expose at least one portion of a via(s) for circuit connection. The substrate comprises a plurality of insulating layers; and a plurality of conductive layers separated by the plurality of insulating layers. A first lateral surface of the substrate is formed by the plurality of conductive layers and the plurality of insulating layers. The first lateral surface of the substrate comprises at least one first portion of a first via filled with a first conductive material. |
| US10128209B2 |
Wafer bonding process and structure
A semiconductor device and a method of fabricating the same are introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and one or more conductive pads are formed in the recesses. One or more barrier layers are formed between the passivation layers and the conductive pads. The conductive pads of the first substrate are aligned to the conductive pads of a second substrate and are bonded using a direct bonding method. |
| US10128193B2 |
Package structure and method for forming the same
A package structure and methods for forming the same are provided. The package structure includes an integrated circuit die in a package layer. The package structure also includes a first passivation layer covering the package layer and the integrated circuit die, and a second passivation layer over the first passivation layer. The package structure further includes a seed layer and a conductive layer in the second passivation layer. The seed layer covers the top surface of the first passivation layer and extends into the first passivation layer. The conductive layer covers the seed layer and extends into the first passivation layer. In addition, the package structure includes a third passivation layer covering the second passivation layer. The seed layer further extends from the top surface of the first passivation layer to the third passivation layer along a sidewall of the conductive layer. |
| US10128192B2 |
Fan-out package structure
A semiconductor package structure including a redistribution layer (RDL) structure having a first surface and a second surface opposite thereto is provided. The RDL structure includes an inter-metal dielectric (IMD) layer and a first conductive layer disposed at a first layer-level of the IMD layer. A molding compound covers the first surface of the RDL structure. A first semiconductor die is disposed over the second surface of the RDL structure and electrically coupled to the RDL structure. A plurality of bump structures is disposed over the second surface of the RDL structure and electrically coupled to the RDL structure. |
| US10128191B2 |
Package-on-package type package including integrated circuit devices and associated passive components on different levels
A package-on-package (PoP)-type package includes a first semiconductor package having a first passive element and a first semiconductor device mounted on a first substrate, and a second semiconductor package having a second semiconductor device mounted on a second substrate. The first passive element is electrically connected to the second semiconductor device. Related devices are also discussed. |
| US10128187B2 |
Integrated circuit structure having gate contact and method of forming same
One aspect of the disclosure relates to an integrated circuit structure. The integrated circuit structure may include: a gate stack having a gate conductor therein over a substrate, the gate stack being within a dielectric layer; a source/drain contact to a source/drain region over the substrate and adjacent to the gate stack within the dielectric layer; a conductor extending above, without contacting, the source/drain contact and extending within the dielectric layer to contact the gate conductor within the gate stack. |
| US10128179B2 |
Fan-out semiconductor package and electronic device including the same
A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad. |
| US10128178B2 |
Electronic package and method for fabricating the same
An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package. |
| US10128174B2 |
Semiconductor component and method of manufacture
In accordance with an embodiment, a semiconductor component includes a support and a plurality of leads. An insulated metal substrate having a first portion and a second portion bonded to the support. A semiconductor chip comprising a III-N semiconductor material is bonded to the first portion of the insulated metal substrate and a first electrical interconnect is coupled between a drain bond pad the first portion of the insulated metal substrate. A second semiconductor chip is bonded to the first electrical interconnect. A second electrical interconnect coupled between a lead of the plurality of leads and the second semiconductor chip. In accordance with another embodiment, a method of manufacturing a semiconductor component includes coupling a first semiconductor chip to a first electrically conductive layer and coupling a second semiconductor chip to a second electrically conductive layer. |
| US10128166B2 |
Power semiconductor module
A power semiconductor module includes a cooler; a plurality of power semiconductor units fixed on the cooler; and a bus bar unit connected electrically to the plurality of power semiconductor units. Each of the plurality of power semiconductor units includes a multilayered substrate including a circuit plate, an insulating plate, and a metal plate laminated in respective order; a semiconductor element fixed to the circuit plate; a wiring member having a printed circuit board and a plurality of conductive posts; external terminals connected electrically and mechanically to the circuit plate; and an insulating sealing material. The bus bar unit includes a plurality of bus bars mutually connecting the external terminals of the plurality of power semiconductor units. |
| US10128164B2 |
Electronic device and method of manufacturing the electronic device
An electronic component has a semiconductor element and a thermally conductive support member. A heat sink is disposed on one surface of the circuit body, and a thermally conductive insulating member is interposed between the heat sink and the support member. Input and output terminals and a ground terminal are also provided. A sealing resin is formed to expose a part of each of the input and output terminals and the ground terminal and one surface of the heat sink, and to cover a periphery of the electronic component structure. A main body conductor layer is formed to be insulated from the input and output terminals and cover an immersion region of the sealing resin and one surface of the heat sink immersed in a cooling medium. A ground conductor layer covers at least a part of the ground terminal and is electrically connected with the main body conductor layer. |
| US10128161B2 |
3D printed hermetic package assembly and method
A method is provided. The method includes one or more of removing existing ball bonds from an extracted die, placing the extracted die into a recess of a hermetic substrate, the extracted die having a centered orientation in the recess, and applying a side fill compound into the recess between the extracted die and the hermetic substrate. The method also includes 3D printing, by a 3D printer, a plurality of bond connections between die pads of the extracted die and first bond pads of the hermetic substrate in order to create a 3D printed die substrate, and 3D printing a hermetic encapsulation over the die, the side fill compound, and the 3D printed bond connections in order to create a hermetic assembly. The extracted die includes a fully functional semiconductor die removed from a previous package. The hermetic substrate includes the first bond pads coupled to second bond pads. |
| US10128158B2 |
Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor
An electrical device that in some embodiments includes a substrate including a lateral device region and a vertical device region. A lateral diffusion metal oxide semiconductor (LDMOS) device may be present in the lateral device region, wherein a drift region of the LDMOS device has a length that is parallel to an upper surface of the substrate in which the LDMOS device is formed. A vertical field effect transistor (VFET) device may be present in the vertical device region, wherein a vertical channel of the VFET has a length that is perpendicular to said upper surface of the substrate, the VFET including a gate structure that is positioned around the vertical channel. |
| US10128156B1 |
FinFET device with reduced parasitic capacitance and method for fabricating the same
A FinFET device and a method for fabricating the same are provided. In the method for fabricating the FinFET device, at first, a semiconductor substrate having fin structures is provided. Then, a dielectric layer and a dummy gate structure are sequentially formed on the semiconductor substrate. The dummy gate structure includes two dummy gate stacks, a gate isolation structure formed between and adjoining the dummy gate stacks, and two spacers sandwiching the dummy gate stacks and the gate isolation structure. Then, the dummy gate stacks are removed to expose portions of the dielectric layer and to expose sidewalls of portions of the spacers. Thereafter, an oxidizing treatment is conducted on the exposed portions of the dielectric layer and the portions of the spacers to increase quality of the dielectric layer. |
| US10128155B2 |
Integrated circuit device and method of fabricating the same
An integrated circuit device includes: a first fin-type active region in a first area of a substrate, the first fin-type active region having a first recess filled with a first source/drain region; a first device isolation layer covering both lower sidewalls of the first fin-type active region; a second fin-type active region in a second area of the substrate, the second fin-type active region having a second recess filled with a second source/drain region; a second device isolation layer covering both lower sidewalls of the second fin-type active region; and a fin insulating spacer on the first device isolation layer, the fin insulating spacer covering a sidewall of the first fin-type active region under the first source/drain region. |
| US10128153B2 |
Method of fabricating a semiconductor device and the semiconductor device
a method of fabricating a semiconductor device is described below.The method includes stacking a plurality of semiconductor chips on each of regions in a substrate having a plurality of first grooves extending in a first direction and a plurality of second grooves extending in a second direction intersecting the first direction, the region being defined by the first grooves and the second grooves, providing an encapsulation portion covering a side of the substrate on which the semiconductor chips are stacked, removing a surface portion of the substrate on the opposite side to the side on which the semiconductor chips are stacked to expose the first grooves and the second grooves, and cutting the encapsulation portion along the first grooves and of second grooves.The device and the method can provide higher productivity. |
| US10128150B2 |
Process of filling the high aspect ratio trenches by co-flowing ligands during thermal CVD
Implementations of the present disclosure generally relate to methods for forming thin films in high aspect ratio feature definitions. In one implementation, a method of processing a substrate in a process chamber is provided. The method comprises flowing a boron-containing precursor comprising a ligand into an interior processing volume of a process chamber, flowing a nitrogen-containing precursor comprising the ligand into the interior processing volume and thermally decomposing the boron-containing precursor and the nitrogen-containing precursor in the interior processing volume to deposit a boron nitride layer over at least one or more sidewalls and a bottom surface of a high aspect ratio feature definition formed in and below a surface of a dielectric layer on the substrate. |
| US10128148B2 |
Methods for fabricating semiconductor devices including surface treatment processes
Methods for fabricating semiconductor devices may provide enhanced performance and reliability by recovering quality of a low-k insulating film damaged by a plasma process. A method may include forming a first interlayer insulating film having a trench therein on a substrate, filling at least a portion of the trench with a metal wiring region, exposing a surface of the metal wiring region and a surface of the first interlayer insulating film to a plasma in a first surface treatment process, then exposing the surface of the first interlayer insulating film to a recovery gas containing a methyl group (—CH3) in a second surface treatment process, and then forming an etch stop layer on the metal wiring region and the first interlayer insulating film. |
| US10128146B2 |
Semiconductor substrate polishing methods and slurries and methods for manufacturing silicon on insulator structures
Polishing slurries for polishing semiconductor substrates are disclosed. The polishing slurry may include first and second sets of colloidal silica particles with the second set having a silica content greater than the first set. |
| US10128145B2 |
Diffusion resistor with reduced voltage coefficient of resistance and increased breakdown voltage using CMOS wells
Integrated circuits and manufacturing methods are presented for creating diffusion resistors (101, 103) in which the diffusion resistor well is spaced from oppositely doped wells to mitigate diffusion resistor well depletion under high biasing so as to provide reduced voltage coefficient of resistivity and increased breakdown voltage for high-voltage applications. |
| US10128143B2 |
Wafer processing laminate, temporary adhesive material for wafer processing, and method for manufacturing thin wafer
Temporary adhesive material for wafer processing, the temporary adhesive material being used for temporarily bonding support to wafer having circuit-forming front surface and back surface to be processed, including complex temporary adhesive material layer that has first temporary adhesive layer composed of thermosetting siloxane polymer layer (A), second temporary adhesive layer composed of thermosetting polymer layer (B), and third temporary adhesive layer composed of thermoplastic resin layer (C), wherein the polymer layer (A) is cured layer of composition containing (A-1) an organopolysiloxane having alkenyl group within its molecule, (A-2) an organopolysiloxane having R103SiO0.5 unit and SiO2 unit, (A-3) organohydrogenpolysiloxane having two or more Si—H groups per molecule, and (A-4) platinum-based catalyst. There can be provided a wafer processing laminate, temporary adhesive material for wafer processing, and method for manufacturing thin wafer using the same which facilitate temporary adhesion and delamination, has excellent CVD resistance, and increasing productivity of thin wafers. |
| US10128138B2 |
Substrate transfer method and storage medium
A substrate transfer method is provided. The substrate transfer method comprises: loading the transfer container to a load port, and separating the cover body from the container main body; detecting an accommodation status of the substrate in the container main body by a detection unit; correcting, by a correction device, the accommodation status of the substrate in the container main body in which the accommodation status of the substrate detected by the detection unit is abnormal; and allowing a substrate transfer device to enter the container main body in which the accommodation status of the substrate is corrected, and unloading the substrate from the container main body. |
| US10128135B2 |
Heat treatment method and heat treatment device
First, a substrate with one main surface on which a thin film of at least one of a mono-molecular layer and a multi-molecular layer including dopants is formed is prepared. Subsequently, the prepared substrate is placed in a chamber, and dopants included in the thin film are introduced from the thin film into a surface layer of the substrate by providing the substrate, through irradiation with light from a first lamp, with preliminary heat treatment in a first temperature band higher than a temperature before heating. Then, the dopants introduced into the surface layer of the substrate are activated by heating the substrate provided with the preliminary heat treatment and placed in the chamber from the first temperature band to a second temperature band higher than the first temperature band through irradiation with flash light from a second lamp. |
| US10128131B2 |
Sealing sheet with separators on both surfaces, and method for manufacturing semiconductor device
A sealing sheet with separators on both surfaces is provided with a sealing sheet, a separator (A) stacked on one surface of the sealing sheet and having a thickness of 50 μm or more, and a separator (B) stacked on the other surface of the sealing sheet. |
| US10128127B2 |
Thin-film transistor substrate manufacturing method and thin-film transistor substrate manufactured with same
A thin-film transistor (TFT) substrate includes a backing plate, a gate electrode formed on the backing plate, a gate insulation layer formed on the gate electrode and the backing plate, an active layer formed on the gate insulation layer, a source electrode and a drain electrode formed on the active layer and the gate insulation layer, a passivation layer formed on the source electrode, the drain electrode, the active layer, and the gate insulation layer, and a pixel electrode formed on the passivation layer. The gate insulation layer is formed of a material that is an oxide of a material that makes the gate electrode. The passivation layer is formed of a material that is an oxide of a material that makes the source electrode and the drain electrode. |
| US10128123B2 |
Substrate structure with array of micrometer scale copper pillar based structures and method for manufacturing same
Micro bump interconnection structures for semiconductor devices, and more specifically, a substrate structure comprising an array of micrometer scale copper pillar based structures or micro bumps eventually comprising a solder material and a method for manufacturing the same are provided. |
| US10128116B2 |
Integrated direct dielectric and metal deposition
Efficient integrated sequential deposition of alternating layers of dielectric and conductor, for example oxide/metal or metal nitride, e.g., SiO2/TiN, in a single tool, and even in a single process chamber enhances throughput without compromising quality when directly depositing a OMOM stack with many layers. Conductor and dielectric film deposition of a stack of at least 20 conductor/dielectric film pairs in the same processing tool or chamber, without breaking vacuum between the film depositions, such that there is no substantial cross-contamination between the conductor and dielectric film depositions, can be achieved. |
| US10128115B2 |
Method of forming ultra-shallow junctions in semiconductor devices
A method of forming MOS transistor includes the steps of performing a pocket implantation process on a substrate having a gate stack, performing a co-implanted ion implantation process on the substrate at a temperature less than room temperature, performing a lightly doped source/drain implantation process on the substrate, and forming source and drain regions in the substrate, adjacent the gate stack. |
| US10128114B2 |
Amorphization induced metal-silicon contact formation
A method of forming a metal-silicon contact is provided. Embodiments include forming a metal layer over a substrate; forming an amorphous silicon (a-Si) capping layer over the metal layer; implanting ions to induce an athermal migration of the a-Si capping layer into the metal layer; and annealing the metal layer and the a-Si capping layer to form a metal silicide layer over the substrate. |
| US10128112B2 |
Method of fabricating semiconductor device
A method of fabricating a semiconductor device is provided. The method includes forming a dummy gate electrode on a substrate, forming a trench on a side surface of the dummy gate electrode, performing a bake process of removing an impurity from the trench and forming a source/drain in the trench, wherein the bake process comprises a first stage and a second stage following the first stage, an air pressure in which the substrate is disposed during the first stage is different from an air pressure in which the substrate is disposed during the second stage, and the bake process is performed while the substrate is on a stage rotating the substrate, wherein a revolution per minute (RPM) of the substrate during the first stage is different from a revolution per minute (RPM) of the substrate during the second stage. |
| US10128110B2 |
Method to enhance growth rate for selective epitaxial growth
Embodiments of the present disclosure generally relate to methods for forming a doped silicon epitaxial layer on semiconductor devices at increased pressure and reduced temperature. In one embodiment, the method includes heating a substrate disposed within a processing chamber to a temperature of about 550 degrees Celsius to about 800 degrees Celsius, introducing into the processing chamber a silicon source comprising trichlorosilane (TCS), a phosphorus source, and a gas comprising a halogen, and depositing a silicon containing epitaxial layer comprising phosphorus on the substrate, the silicon containing epitaxial layer having a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, wherein the silicon containing epitaxial layer is deposited at a chamber pressure of about 150 Torr or greater. |
| US10128108B2 |
Oxide sintered body, sputtering target, and oxide semiconductor thin film obtained using sputtering target
Provided are an oxide sintered compact whereby low carrier density and high carrier mobility are obtained when the oxide sintered compact is used to obtain an oxide semiconductor thin film by a sputtering method, and a sputtering target which uses the oxide sintered compact. This oxide sintered compact contains oxides of indium, gallium, and aluminum. The gallium content is from 0.15 to 0.49 by Ga/(In+Ga) atomic ratio, and the aluminum content is from 0.0001 to less than 0.25 by Al/(In+Ga+Al) atomic ratio. A crystalline oxide semiconductor thin film formed using this oxide sintered compact as a sputtering target is obtained at a carrier density of 4.0×1018 cm−3 or less and a carrier mobility of 10 cm−2V−1sec−1 or greater. |
| US10128103B2 |
Apparatus and process for wafer cleaning
A process and apparatus for cleaning a wafer, the wafer having a front side and a back side, are provided. The process begins with placing the wafer on a platform, and a first gas stream delivering in a direction from a center to an edge of the front side of the wafer. The first gas stream prevents liquid drops entering a work piece region on the front side of the wafer and protects the integrity of the integrated circuits. A cleaning brush is rinsed by a first liquid stream and contacting the edge of the wafer for cleaning the wafer. The cleaning brush scrubs unwanted residual materials from the edge of the wafer, and the first liquid stream flushes the cleaning brush to recover the cleaning ability. |
| US10128102B2 |
Methods and apparatus for wetting pretreatment for through resist metal plating
Disclosed are pre-wetting apparatus designs and methods for cleaning solid contaminants from substrates prior to through resist deposition of metal. In some embodiments, a pre-wetting apparatus includes a process chamber having a substrate holder, and at least one nozzle located directly above the wafer substrate and configured to deliver pre-wetting liquid (e.g., degassed deionized water) onto the substrate at a grazing angle of between about 5 and 45 degrees. In some embodiments the nozzle is a fan nozzle configured to deliver the liquid to the center of the substrate, such that the liquid first impacts the substrate in the vicinity of the center and then flows over the center of the substrate. In some embodiments the substrate is rotated unidirectionally or bidirectionally during pre-wetting with multiple accelerations and decelerations, which facilitate removal of contaminants. |
| US10128101B2 |
Dimmable induction RF fluorescent lamp with reduced electromagnetic interference
A dimmable induction RF fluorescent light bulb comprising a power coupler with reduced extraneous electromagnetic radiation wherein a dimming facility utilizes burst-mode dimming that periodically interrupts the high frequency voltage and current to the power coupler with an off period and an on period in order to reduce the power being delivered to the power coupler wherein the off period is shorter than the time required for an electron density of the discharge within the lamp envelope to substantially decrease. |
| US10128100B2 |
Drive method and drive circuit for light-emitting device using gas discharge, and ultraviolet irradiation device
During a normal operation, alternating drive voltage to be applied between a pair of electrodes provided to face an outer surface of a bottom part of a gas discharge light emitting tube is switched to a voltage value V2 lower than a voltage value V1 at the time of starting lighting. Further, the alternating drive voltage to be applied during the normal discharge operation is intermittently applied in a predetermined cycle and duty ratio to enable adjustment of light emission intensity. |
| US10128096B2 |
System and method for ionization of molecules for mass spectrometry and ion mobility spectrometry
An ionizing system includes a channel and a heater coupled to the channel. The channel has an inlet disposed in a first pressure region having a first pressure and an outlet disposed in a second pressure region having a second pressure. The first pressure is greater than the second pressure. The heater is for heating the channel, and the channel is configured to generate charged particles of a sample in response to the sample being introduced into the channel. |
| US10128093B2 |
Method for deconvolution
Systems and methods prevent potentially convolved precursor ion peaks from being excluded in subsequent cycles of an IDA experiment so that additional product ion data is collected. A sample is ionized producing an ion beam. A plurality of cycles of an IDA experiment are performed on the ion beam. During each cycle of the IDA experiment and for each precursor ion peak on a filtered peak list produced in the filtering step of each cycle, several steps are performed. The precursor ion peak is identified in the precursor ion spectrum produced in the MS survey scan step of the cycle. It is determined if the precursor ion peak in the precursor ion spectrum includes a feature of convolution. If the precursor ion peak includes a feature of convolution, the precursor ion peak is prevented from being excluded in a filtering step of one or more subsequent cycles. |
| US10128089B2 |
Plasma processing apparatus
There is provided a plasma processing apparatus including a focus ring capable of preventing a part of a heat transfer sheet from adhering to and remaining on a mounting table. The plasma processing apparatus comprises: a chamber for performing a plasma process on a target object; a mounting table configured to mount thereon the target object; and a focus ring configured to surround the target object, the focus ring being in contact with the mounting table via a flexible heat transfer sheet. Further, the heat transfer sheet has a contact surface in contact with the mounting table and an anti-adhesion layer formed on the contact surface, and the anti-adhesion layer is located between said contact surface of the heat transfer sheet and a mounting surface of the mounting table. Furthermore, the anti-adhesion layer contains heat conductive particulates, and the heat transfer sheet is formed in an annular shape. |