Document Document Title
US09936153B1 CMOS image sensor with dual floating diffusions per pixel for flicker-free detection of light emitting diodes
Apparatuses and methods for image sensors with pixels that reduce or eliminate flicker induced by high intensity illumination are disclosed. An example image sensor may include a photodiode, a transfer gate, an anti-blooming gate, and first and second source follower transistors. The photodiode may capture light and generate charge in response, and the photodiode may have a charge capacity. The transfer gate may selectively transfer charge to a first floating diffusion, and the anti-blooming gate may selectively transfer excess charge to a second floating diffusion when the generated charge is greater than the photodiode charge capacity. The first source-follower transistor may be directly coupled to the first floating diffusion by a gate, the first source-follower to selectively output a first signal to a first bitline in response to enablement of a first row selection transistor, and the second source-follower transistor may be capacitively-coupled to the second floating diffusion, the second source-follower to selectively output a second signal to a second bitline in response to enablement of a second row selection transistor.
US09936152B2 Image sensor and sensor module
According to one aspect of the present invention, an image sensor and a sensor module have a configuration in which the image sensor outputs first brightness information representing brightness information of first image information obtained with a first exposure time and second brightness information representing brightness information of second image information obtained with a second exposure time separately from a composite image obtained by synthesizing the first image information and the second image information, updates the first and second exposure times based on an exposure time set value externally generated based on the first brightness information and the second brightness information, and changes a synthesis set value used for synthesis of the composite image based on the exposure time set value externally generated based on the first brightness information and the second brightness information.
US09936151B2 Single image sensor for capturing mixed structured-light images and regular images
A method and device for capturing a mixed structured-light image and regular image using an integrated image sensor are disclosed, where the structured-light image is captured using a shorter frame period than the regular image. In order to achieve a shorter frame period for the structured-light image, the structured-light image may correspond to an image captured with reduced dynamic range, reduced spatial resolution, or a combination of them. The capturing process comprises applying reset signals to a pixel array to reset rows of pixels of the pixel array, reading-out analog signals from the rows of pixels of the pixel array and converting the analog signals from the rows of pixels of the pixel array into digital outputs for the image using one or more analog-to-digital converters.
US09936149B2 Imaging apparatus with temperature sensors, imaging system and imaging method
An imaging apparatus includes sensor arrays each having a plurality of subarrays having a plurality of sensors which output signals based on radiation or light, and a plurality of temperature sensors which output signals based on temperatures of the sensor arrays. In this case, a signal output from one subarray of the plurality of subarrays and a signal of one temperature sensor of the plurality of temperature sensors are read out through a line to which the sensor included in the one subarray and the one temperature sensor are commonly connected.
US09936143B2 Imager module with electronic shutter
A method and apparatus are provided for operating a camera. The method includes the steps of providing an array of image sensing pixels, disposing an electronic shutter in an optical path between the array of pixels and an image where the electronic shutter has a reflective state and a transmissive state and applying a predetermined sequence of electrical signals to the electronic shutter to expose the image sensing pixels to the image.
US09936141B2 Image processing apparatus for performing correction processing for effecting virtual light source and method executed by image processing apparatus
The amount of light to be emitted by an auxiliary light source for capturing an image to which correction processing is applied, as well as a parameter used in the correction processing, is determined based on a degree of shadows of an object to be captured using the auxiliary light source. In this way, shadows in an image obtained through image capture using the auxiliary light source can be appropriately corrected with a simple method.
US09936140B2 Image capturing apparatus, control method for the same, and storage medium
An image capturing apparatus comprises an image capturing unit, a memory configured to store the image signal, a writing unit configured to write the image signal to the memory, a readout unit configured to read out at least a partial region of the image signal, a display unit configured to perform live-view display of an image, and a control unit configured to perform control for each frame of the image signal, wherein the control unit sets, when electronic zoom is in operation, the delay time such that the operation of the writing unit writing the image signal to the memory and the operation of the readout unit reading out the image signal from the memory end within a period of one frame of the image signal, regardless of the reading region changing.
US09936138B2 User terminal apparatus and control method thereof
A user terminal apparatus and a control method thereof are provided. The user terminal apparatus includes a display including a main display area which is disposed on a front surface of the user terminal apparatus, and a sub display area which extends from one side of the main display area and is disposed on at least one area of a rear surface of the user terminal apparatus, a camera configured to photograph an image, and a processor configured to display a live view acquired through the camera on one of the main display area or the sub display area, and control the display to display, in response to an orientation of the user terminal apparatus being changed, the live view on another one of the main display area or the sub display area.
US09936137B2 Display control apparatus, method for controlling the same, and storage medium
A display control apparatus includes a viewfinder including an eye contacting portion and an internal display unit, an eye approaching detection unit, a mode switching unit which selects one of a plurality of operation modes including first and second operation modes, and a control unit which performs control such that an on state of the internal display unit is changed to an off state based on detection, by the eye approaching detection unit, of an object which moves away from the eye contacting portion to a position at or further than a first distance from the eye contacting portion in the first operation mode, and the on state is changed to the off state based on detection, by the eye approaching detection unit, of an object which moves away from the eye contacting portion to a position at or further than a second distance, which is larger than the first distance, from the eye contacting portion in the second operation mode.
US09936133B2 Gimbaled camera object tracking system
A system for automatically controlling a gimbaled camera system of a vehicle. The system includes a camera positioned relative to a body of the vehicle and one or more sensors configured to sense the pointing direction of the camera. One or more sensors are configured to monitor movement of the vehicle relative to a surface. A processor is configured to receive the sensed camera pointing direction data and vehicle movement data. The processor establishes and stores a target position representative of the position of a target object relative to the vehicle body based on an object independent association and automatically adjusts the camera pointing direction in response to the vehicle movement data such that the camera remains aimed on the target position. A method for automatically controlling the gimbaled camera system is also provided.
US09936129B2 Generating high resolution images
Techniques are disclosed for generating a high resolution image from a plurality of images captured from a plurality of sensors. The pixels in one sensor have at least one of different size, shape, or orientation than pixels in another sensor. The difference in size, shape, or orientation of the pixels and the interconnection of pixels on respective sensors provides a high level of certainty that there will be sufficient difference in the captured images, with limited loss in image content, to generate a relatively high resolution image from the images captured by the respective sensors.
US09936124B2 Imaging apparatus, method for controlling the same, and storage medium storing program
An imaging apparatus that performs continuous imaging, includes: a focus detection unit that perform focus detection and calculates an amount of defocus in each of a plurality of imaging operations; a position detection unit that detects an image plane position corresponding to a subject position using the amount of defocus; an estimation unit that estimates a next image plane position using a plurality of pairs of data regarding the image plane position and a time at which the amount of defocus has been detected; and a turnabout determination unit that determines whether a subject is a turnabout subject, which is a subject that moves towards the imaging apparatus, changes direction of movement, and then moves away from the imaging apparatus. The number of pairs of data used for the estimation decreases based on a ratio of a highest image plane speed in past scenes to a current image plane speed.
US09936117B2 Method of setting camera profile and apparatus of obtaining image
An apparatus for receiving an image is provided. The apparatus includes: a camera searcher configured to search for a camera connected to a network; a camera register configured to register information about the camera which is identified as a result of the searching by the camera searcher; a profile setter configured to set a profile of the camera by referring to the information obtained from the camera; and an image receiver configured to receive an image from the camera according to the profile.
US09936115B2 Switchable camera system for a firearm
Systems, apparatuses, and methods for improving situational awareness for a user of a firearm are disclosed. An example camera system for a firearm includes a camera assembly, display panel, a mounting fixture, and switching mechanism. An example camera assembly includes a plurality of cameras fixedly oriented in a plurality of different directions. An example mounting fixture is secured to the camera assembly and configured to be removably attached to a firearm. An example switch is configured to select between the plurality of cameras to cause an image from the selected camera to be displayed on the display panel. An example method includes activating a firearm-mounted camera system, receiving a switch input from a user selecting a camera, generating an image of a portion of an environment with the selected camera, and displaying the image on a display panel to alert the user to conditions in the portion of the environment.
US09936113B2 Smart device and controlling method thereof
A smart device and controlling method thereof are disclosed. The smart device includes a camera including a lens and an iris positioned over the lens, the iris including a single layer film; and a controller configured to cause the iris to adjust a size of an aperture formed in the film to adjust quantity of light incident on the lens. A method for controlling the smart device includes obtaining a video of a subject consecutively via the camera, using preset conditions; detecting a relative movement between the subject and the smart device; and adjusting at least one of the conditions based on the detected movement.
US09936107B2 Apparatus and method for generating sensory effect metadata
A sensory effect metadata generating device is disclosed which includes a memory for storing a program for generating a sensory effect metadata corresponding to media and a processor for perform the program. The program is configured to extract characteristic points from the media, produce at least one of an object variation based on the characteristic points, an object zoom-in information, an incline information and a move information; and generate the sensory effect metadata.
US09936101B2 Image forming apparatus, and control method of image forming apparatus
An image forming apparatus includes a first setting unit that sets a setting value of individual setting information for a login user, and a second setting unit that sets, in a case where a logout request is received, a setting value of common setting information, wherein the second setting unit omits, in a case where a login request of a new user is received while the user is logged in, a process for setting the setting value of the common setting information based on the common setting information, and the first setting unit sets a setting value of individual setting information for the new user based on individual setting information associated with user identification information for identifying the new user.
US09936096B2 Image forming apparatus having a docking unit to mount a plurality of portable display apparatuses, a portable display apparatus mountable to the docking unit, a printing control method using the docking unit, and a display method using the docking unit
An image forming apparatus includes a docking unit configured to mount a plurality of portable display apparatuses therein, a communication interface configured to receive data, and a processor configured to control to store the received data in at least one of the plurality of portable display apparatuses.
US09936092B2 Electronic apparatus and method of controlling the same
In an electronic apparatus of this invention, after a security function is canceled, it is determined whether the elapsed time from cancellation of the security function to detection of attachment of a device having a security function of security level higher than that of the canceled security function or the elapsed time until the operation of the attached device is enabled has exceeded a predetermined time. Upon determining that the elapsed time has exceeded the predetermined time, the electronic apparatus enables the canceled security function again.
US09936089B2 Mobile autonomous scalable scanner system
This invention is directed to autonomous document scanning operations. A scanning device and one or more stacks of documents may use motors to autonomously move the documents into position to be scanned by the scanner. The scanning device may detect properties of the documents while scanning. Multiple stacks of documents may be scanned in this manner with minimal user intervention, eliminating the need for manual intervention when scanning groups of documents.
US09936086B2 Wireless image distribution system and method
A system and method for distributing at least one digital photographic image is presented, the system and method comprising at least one capturing device and at least one receiving device disposed in a communicative relation with one another via at least one wireless network. In particular, the capturing device is structured to capture the at least one digital photographic image via, for example, a capture assembly, whereas the receiving device is cooperatively structured to receive the digital photographic image via, for example, the at least one wireless network. In addition, the capturing device(s) and receiving device(s) may be disposed in a selectively paired relationship via one or more common pre-defined pairing criteria. Further, the at least one digital photographic image may be filtered via at least one pre-defined transfer criteria disposed on the capturing device and/or receiving device.
US09936084B2 Wrist computer wireless communication and event detection
A system includes a wrist computer and a portable video camera. The wrist computer acquires physical activity data measured by a sensor device, generates a time marker on the basis of the physical activity data, and transmits the time marker to the portable video camera according to a predefined wireless communication protocol. The portable video camera is configured to record video data, encode the video data into a video data file, and store the received time marker as meta data in the video file.
US09936079B1 Display dependent analytics
Apparatus and methods are disclosed for display dependent analysis of call data in an IBPX. In an example embodiment, an apparatus communicatively coupled to an IPBX server is configured to route VoIP calls in the IPBX. An interface circuit is configured to selected parameters of interest based on capabilities of a set of devices and generate subscription requests to subscribe the devices to the parameters of interest. A first processing circuit is configured to generate call summary metrics from call event messages for calls routed by the IPBX server. A second processing circuit subscribes a device identified in the subscription request to the selected set of parameters of interest identified in the subscription request. The second processing circuit evaluates call summary metrics for each parameter of interest subscribed to by the devices and provides results of the evaluation to devices that are subscribed to the parameter of interest.
US09936076B1 System and method for responding to customer calls
A computer-based system and method for responding to customer calls. The method includes automatically determining whether at least one incoming call meets existing customer criteria and further automatically determining a market segment of the at least one incoming call. The market segment may indicate whether a specific customer prefers: (i) no voice or face-to-face interaction with a representative; (ii) a face-to-face interaction with a representative; and/or (iii) a voice only interaction with a representative. The method further includes automatically routing the at least one incoming call based upon the determined market segment to one of: (1) an automated voice prompt; (2) a gaming system having two-way video capability; or (3) a person-to-person voice call system to facilitate answering incoming calls in a customer-friendly or customer preferred manner.
US09936073B2 Interactive voice response (IVR) system interface
A mobile device, such as a smart phone, receives and presents interactive audio content from an interactive voice response (IVR) system. The mobile device provides an interface that enables a user to navigate through a menu presented in the interactive content. The interface further presents action elements that identify actions that can be requested through the menu, and selection of the one of the action elements may cause the IVR to perform an associated action. For example, the interface may identify representatives at a call center, and a selection of one of the action elements causes the IVR to establish a communication between the mobile device and the selected representative. The action elements may further identify status information associated with the call center, such as an expected wait time.
US09936072B1 Automated response tool
A language processor includes a parser, an invoker, and an extractor. The parser parses a spoken statement to detect a plurality of words in the spoken statement and generates a parse tree based on the detected plurality of words. The invoker determines, based on the parse tree, a plurality of potential services to invoke to respond to the spoken statement. The extractor determines, for each potential service of the plurality of potential services, a parameter used during execution of that potential service and a value of the determined parameter based on the parse tree. The invoker is further configured to issue a command to invoke a potential service of the plurality of potential services using a value of a determined parameter.
US09936071B1 Automated response tool
An automated response tool includes a receiver, a language processor, and a service invoker. The receiver receives a call and a spoken statement from the received call. The language processor detects a plurality of words in the spoken statement and generates a parse tree based on the detected plurality of words. The language processor also determines, based on the parse tree, a service to invoke in response to the spoken statement, determines a parameter used during execution of the determined service, and determines, based on the parse tree, a value of the determined parameter. The service invoker issues a command to invoke the determined service, wherein the command comprises the determined value of the determined parameter.
US09936068B2 Computer-based streaming voice data contact information extraction
Embodiments relate to extracting contact information from streaming voice data. An aspect includes a speech recognition module configured to transcribe a stream of voice data representing at least a portion of a telephone conversation into text data; a contact information extraction module configured to extract contact information from the text data; and a transceiver configured to send at least a portion of the contact information to a recipient calling device.
US09936063B2 Rearranging display of mobile applications based on geolocation
Rearranging a set of generated application display panels is provided. A set of application display icons corresponding to a set of mobile applications installed on a mobile data processing system having matching keyword tags with a geolocation keyword tag corresponding to a defined geographic area is inserted into a set of generated application display panels. The set of generated application display panels with the inserted set of application display icons corresponding to the set of mobile applications having the matching keyword tags is rearranged based on the geolocation keyword tag corresponding to the defined geographic area. The rearranged set of generated application display panels with the inserted set of application display icons corresponding to the set of mobile applications having the matching keyword tags is displayed.
US09936059B2 Management of wireless access points via virtualization
Wireless access point (AP) and methods for providing wireless connectivity to wireless client are provided. According to one embodiment, a wireless AP includes a host hardware platform and a hypervisor for providing a first virtual machine where a first guest operating system (OS) is configured to run on the first virtual machine. A wireless module is configured to run on the first guest OS for managing the wireless connection to at least one wireless client. A wireless AP management console is configured to run on the wireless AP but outside the first guest OS and to manage operations of the wireless module and the first guest OS.
US09936057B2 Electronic device
An electronic device is disclosed. The electronic device according to an embodiment of the present invention may include a first watch module and a second watch module. The first watch module may include a first body, a watch movement, a first window, and a watch hand. The second watch module may include a second body extended from the first body, a circuit board, a second window, and a second display. The first body and the second body may form a bending, and are communicated to each other.
US09936055B2 Using multicasting to concurrently image multiple client devices
An update can be multicast to a number of client devices. By multicasting an update, the update can be concurrently distributed to a large number of client devices using a single network transmission. This greatly reduces the amount of time required to update the client devices as well as the amount of bandwidth that is required to transfer the update over the network. As part of this multicasting process, the client device, which may have missed a segment of the multicast, can request the missed segment. The missed segment can then also be multicast to eliminate or minimize the redundant transmission of the missed segment.
US09936053B2 Encoding parameters for a wireless communication system
In a method for generating a physical layer (PHY) data unit for transmission via a communication channel, information bits to be included in the PHY data unit are received. A number of padding bits are added to the information bits. The number of padding bits is determined based on respective virtual values of each of one or more encoding parameters. The information bits are parsed to a number of encoders and are encoded, using the number of encoders, to generate coded bits. The coded bits are padded such that padded coded bits correspond to respective true values of each of the one or more encoding parameters. The PHY data unit is generated to include the padded coded bits.
US09936035B2 Mobile push notification
In one embodiment, a method includes receiving a first notification through a communications network. The first notification includes a subset of user-facing information of an object having one or more states, the subset being determined at a first point in time. A second notification is received through the communications network. The second notification is an update to the user-facing information of the object, and the update may be a subset of user-facing information determined at a second point in time after the first point in time.
US09936033B2 Systems, methods, and apparatus to identify media presentation devices
Systems, methods, and apparatus to identify media presentation devices are disclosed. An example method includes associating respective ones of a first and a second network device with respective ones of at least two different pseudo domain name service (DNS) servers, wherein the pseudo DNS servers do not provide domain name-to-IP address translation. Crediting the first network device with accessing media in response to receiving a first domain name service query at a first pseudo DNS server from a first public Internet protocol address. Crediting the second network device with accessing media in response to receiving a second domain name service query at a second pseudo DNS server from the first public Internet protocol address.
US09936030B2 User content sharing system and method with location-based external content integration
Described are various embodiments of a user content sharing system and method with automated external content integration. In one embodiment, a system and method are provided in which a graphical user interface (GUI) is rendered on each system users' personal communication device. The GUI produces a content selection function selecting, under user operation, user content for sharing, and a sharing platform selection function selecting, under user operation, one or more sharing platforms. The system further comprise a digital content integrator communicatively linked to the user interface to gain access to the selected user content in response to the content selection function, the integrator having access to stored external content distinct from user content. The integrator integrates the external content with the selected user content to output integrated content. The system further comprises a communication interface communicatively linked to the integrator and selectively operable to interface with each of the distinct content sharing platforms, wherein the integrated content is concurrently relayed to the selected sharing platforms via the communication interface on behalf of system users as originating therefrom.
US09936029B2 Operation triggering method and apparatus for machine-to-machine communications
The present invention provides an operation triggering method and apparatus for machine-to-machine communications. The method implemented in a service capability middleware, includes retrieving a change result of the content of the subject resource stored in the service capability middleware; retrieving a representation of the operation resource associated with the subject resource, where the representation of the operation resource includes a condition for sending an operation request to an object resource and a uniform resource identifier of the object resource; constructing the operation request for the object resource when it is determined that the change result meets the condition for sending the operation request to the object resource in the representation of the operation resource; and sending the operation request to the object resource.
US09936027B2 Methods, systems, and computer readable media for application session sharing
Methods, systems, and computer readable media for application session sharing are disclosed. According to one method, the method includes receiving, from a first client node, a request for initiating a remote application session for interacting with an application instance by one or more users. The method also includes initiating the remote application session and configuring a remote control server for interacting with the remote application session. The method further includes providing communications between the first client node and the application instance associated with the remote application session using the remote control server.
US09936025B2 Application for vehicle-to-vehicle communication
Described herein is a framework for vehicle-to-vehicle communication. In accordance with one aspect, a send message to a receiving driver of a receiving vehicle is generated from a sending end-user device in response to a user event from a sending driver. The send message may be generated to include an image of the receiving vehicle of the receiving driver, and a voice message created by the sending driver. The send message may be sent to a server using the sending end-user device. The send message may further be processed by the server, in which the processing may include identifying the receiving vehicle, searching to find information of a receiving end-user device, and sending the send message to the receiving end-user device if information of the receiving end-user device is found.
US09936023B2 System and method to attach a local file system to a remote disk stack
In certain information handling system environments, storage devices connected to a client are redirected to a server or other information handling system. To increase efficiency and reduce costs, the server may mount a file system on top of the redirected storage device. Mounting the file system permits the redirected storage device to cache data associated with the storage device of a client. Requests from applications to read data or to write data to the storage device may be handled completely at the server by accessing the file system cache at the server.
US09936020B2 Access control of data in a dispersed storage network
A method begins by a dispersed storage (DS) processing module receiving, from a user device, a data access request and accessing hierarchical data access control information. The method continues with the DS processing module obtaining a logical memory access control file from the hierarchical data access control information and determining a data access request type of the request is within access rights of the user device. When the data access request type is within the access rights of the user device, the method continues with the DS processing module obtaining a data object access control file from the hierarchical data access control information. The method continues with the DS processing module determining, from the data object access control file, whether the data access request type is restricted. When the data access request type is not restricted, the method continues with the DS processing module processing the data access request.
US09936018B2 Task-context architecture for efficient data sharing
To provide a more seamless experience across multiple devices, task streaming systems and methods allow a user to create “task-contexts” and manage metadata of files stored across multiple data storage devices and user preferences associated with capabilities of the multiple devices for operating on the file. Furthermore, the task streaming systems and methods are provided to allow task-contexts to be shared from one device to another device. A task-context specifies one or more files and one or more operations to be performed on the one or more files. By providing a task-context from one device to the other device, a user can accomplish a task with a particular file and seamlessly transition between devices with minimal disruption and effort.
US09936011B2 Distributed database, method of sharing data, program storing medium, and apparatus for a distributed database
A distributed database of a peer-to-peer network is provided. In the network, a group is composed of plural nodes, and the nodes in the group each have CPU and a state list memory. CPU of each node sends other node a request for information to obtain and store node-state information. The node-state information is delivered through a prescribed route among the nodes in the group. When the number of nodes participating in the group increases more than a prescribed number, the participating nodes are separated into plural groups.
US09936001B2 Geographic placement of application components by a multi-tenant platform-as-a-service (PaaS) system
Implementations for geographic placement of application components by a multi-tenant Platform-as-a-Service (PaaS) system are disclosed. A method of the disclosure includes providing, by a processing device of a multi-tenant PaaS system, a list of geographic locations to a user of a multi-tenant PaaS system, receiving, by the processing device from the user, a first request to deploy a component of an application corresponding to the user, the first request comprising a selection of one of the geographic locations from the list, and communicating, by the processing device, a second request to deploy the component of the application, the second request directed to a messaging server dedicated to the selected geographic location of the user, the dedicated messaging server of the selected geographic location to handle a configuration of a node in the selected geographic location for the component of the application.
US09935999B1 File download manager
A download module accesses a download queue including at least two file download requests from an application running on a client device of a server. The application and each of the file download requests is associated with a context that comprises a set of context components that each indicates a part of the application. The file download request context components indicate parts of the application that use the requested file and the application context components indicate parts of the application that are active. The download module ranks each of the file download requests based on a comparison of the respective file download request context components of each file download request to the application context components of the application. The download module then selects two or more file download requests in the download queue for concurrent execution based on the respective rankings of the file download requests in the download queue.
US09935997B2 System for transforming mobile app into addressable network for stateless access
A computer system includes a master controller that receives an HTTP request for a first URL. The URL indicates a first state of a first mobile application. A navigation controller navigates to the first state of the first mobile application within a device. A content scraper extracts content from the first state and identifies forward links to corresponding additional states of the first mobile application. The computer system includes an output formatter configured to package the content and the forward links into an HTTP response and transmit the HTTP response to a source of the first HTTP request. The HTTP response includes a forward URL for each additional state of the first mobile application reachable from the first state. For each additional state, the forward URL includes an indicator of the first mobile application and a path to reach the additional state within the first mobile application.
US09935995B2 Embedded script security using script signature validation
A technique allows a client computer with a web browser to receive a web page having active content in response to transmitting a request for content. The active content includes a signature and a set of attributes associated with a web domain. The web browser can interpret the signature and the set of attributes as formatted in the active content. Validation of the signature and the set of attributes can be in a secure mode through a secure enclave module.
US09935983B1 System and architecture for electronic permissions and security policies for resources in a data system
An electronic permissions and security system are disclosed which may be used to determine permissions and policies for resources in a complex multi-dimensional data system. Analysis of resource data hierarchies and/or accessor data hierarchies using the permissions computing systems and methods discussed herein may provide efficient and flexible permissions analysis, determination, and management. The electronic permissions system may include for example, a permissions analysis module or component configured to access, traverse and/or analyze a resource hierarchy and/or an accessor hierarchy to determine permissions with respect to a resource. Permissions may be defined according to various policies which may include specific actions allowed or disallowed for the policy. Specific actions within a policy may also be organized hierarchically such that one particular grant of one permission may imply granting of another permission.
US09935981B2 Dynamic tuple for intrusion prevention systems
Embodiments of the present invention provide systems and methods for exchanging information. Communications between an intrusion prevention system (IPS) and at least one end-point are facilitated by controlling network traffic flow in an IPS and the at least one end-point and formation of an information plane. The formed information plane allows attributes of the IPS and the at least one end-point to reside in the formed information plane. A network access policy (NAP) works in conjunction with an IPS and leverages created customized network objects (CNOs). Upon analyzing data packets, the data packets may or may not be forwarded to the IPS.
US09935969B2 Domain classification based on client request behavior
Systems and methods for domain classification using the network request behavior of clients are provided. The network requests of a plurality of clients are analyzed to determine a domain corresponding to each request. This information can be used to associate a set of domains with each individual client. Because of the reciprocal nature of a network request, the information is also used to associate a set of clients with each individual domain. Within the plurality of domains associated with the plurality of clients, there may exist known domains having a classification and unknown domains having no classification. Based on the correlation of clients and domains from their respective associations, the system generates domain classification information for at least one of the unknown domains.
US09935968B2 Selective traffic analysis at a communication network edge
Embodiments disclosed herein provide systems and methods for recording for analyzing traffic at an edge of a communication network. In a particular embodiment, a method provides processing a first portion of data packets directed into the communication network from outside of the communication network to determine whether a first sampling policy adequately assesses risk to the communication network. Upon determining that the first sampling policy does not adequately assess the risk to the communication network, the method provides adjusting the first sampling policy. The method further provides identifying a second portion of the data packets based on the first sampling policy. An amount of data packets included in the first portion of the data packets is larger than or equal to an amount of data packets included in the second portion of the data packets.
US09935967B2 Method and device for detecting malicious URL
Examples of the present disclosure provide a method and device for detecting a malicious URL, the method includes: a URL detection request is received, contents of a page addressed by a URL in the URL detection request are analyzed, and it is determined that whether the page is a non-text page; when the page is a non-text page, a page image of the page, which is displayed in a browser and addressed by the URL in the URL detection request, is obtained, image detection is performed on the page image, and a page attribute of the URL in the URL detection request is obtained, whether the URL is a malicious URL is determined based on the page attribute of the URL in the URL detection request.
US09935958B2 Reverse access method for securing front-end applications and others
A System that provides a secured connection between servers on the LAN and clients on the WAN comprises the LAN (which includes LAN Server and LAN Controller) and the DMZ (which includes DMZ Server and DMZ Stack Pool Service). Wherein the Client Request reaches the DMZ Server it stores it in the DMZ Stack Pool Service and the LAN Controller establishes outbound TCP based connection to the DMZ Stack Pool Service that passes the Client Connection Information to the LAN Server via the LAN Controller. Then the LAN Server then generates a connection between the Service and DMZ Server.
US09935957B2 Transaction security systems and methods
Outbound traffic of a host application may be received from a host device having a host processor. The secure resource may be configured to provide a secure transaction based on the outbound network traffic. Using a second processor different than the host processor, it may be determined whether the host application is authorized to provide the outbound network traffic to the secure resource. The outbound network traffic may be allowed to be forwarded to the secure resource if the host application is authorized. The outbound network traffic may be disallowed to be forwarded to the secure resource if the host application is not authorized.
US09935952B2 Selectively permitting a receiver device to access a message based on authenticating the receiver device
A device may receive an indication to generate a link associated with accessing a message. The message may be intended for a shared device identifier of a receiver device identified by a receiver device identifier, where the shared device identifier is shared by multiple receiver devices. The device may store information associating the message with the receiver device identifier. The device may generate the link using information associated with the message. The device may provide the link to the receiver device after generating the link. The device may receive a request, from a requesting device, to access the message, the request including a device identifier associated with the requesting device. The device may selectively permit or prevent access to the message, by the requesting device, based on the stored information and the device identifier associated with the requesting device.
US09935951B2 Remote blind hashing
A remote data protection network provides a blind hashing service. A blind hashing server receives a message such as a digest from a client, and uses the message to derive a set of indices or offsets into a huge block of random data that is maintained by the remote data protection network. The corresponding extents of data in the block are combined, e.g. using a hash or HMAC function, and then returned to the invoking client, e.g. as a salt. The message and response may be salted with a unique client salt.
US09935947B1 Secure and reliable protection and matching of biometric templates across multiple devices using secret sharing
Biometric information from an initial sample is used to generate a biometric template for a user. The biometric template is split into multiple template shares using a polynomial secret sharing scheme, such that at least some threshold number of the resulting template shares must be combined to reconstruct the biometric template. After the biometric template is split, the resulting template shares are distributed to multiple components in the system, such as a server, and/or one more user devices, and the original copy of the biometric template is destroyed. To subsequently verify the identity of the user, the threshold number of template shares are obtained and combined to reconstruct the user's biometric template, and the reconstructed template is compared with biometric information extracted from one or more subsequently collected biometric samples. If there is a match between the reconstructed biometric template and the extracted biometric information, the user's identity is verified.
US09935945B2 Trusted management controller firmware
A method for ensuring management controller firmware security, by a security manager of a computing device, includes storing a public key and raw identity data, and obtaining, from a management firmware for a management controller of the computing device, encrypted identity data. The security manager decrypts the encrypted identity data with the public key into decrypted identity data, and compares the decrypted identity data with the raw identity data to determine whether the management firmware is authentic. The security manager protects the computing device from harm by the management firmware, in response to determining that the management firmware is not authentic.
US09935942B2 Authentication processing method and electronic device for supporting the same
An electronic device and authentication processing method for operating the electronic device is provided. The authentication processing method includes transmitting to an external server credential information input in the electronic device through a user interface, receiving an authentication request of the credential information, processing the authentication request based on the credential information stored in the electronic device, or determining whether to transmit the authentication request through the communication module based on the credential information stored in the external server.
US09935938B2 DTCP certificate authentication over TLS protocol
Authenticating devices utilizing Transport Layer Security (TLS) protocol to facilitate exchange of authentication information or other data to permit or otherwise enable access to services requiring authentication credentials, certificates, tokens or other information. The authentication may utilize Digital Transmission Content Protection (DTCP) certificates, Diffie-Hellman (DH) parameters or other information available to the authenticating devices, optionally without requiring device requesting authentication to obtain an X.509 certificate.
US09935937B1 Implementing network security policies using TPM-based credentials
A method for implementing network security policies in a multi-tenant network environment may include receiving a request for implementation of at least one network security policy on one or more computing devices of a service provider cloud environment. The network security policy identified by the request may be retrieved. The network security policy may be encrypted using encrypting credentials of the one or more computing devices. Decrypting credentials corresponding to the encrypting credentials are stored in a Trusted Platform Module (TPM) within the one or more computing devices. The encrypted network security policy may be pushed to the one or more computing devices, for decryption and implementation at the one or more computing devices.
US09935936B2 Federated realm discovery
A federated realm discovery system within a federation determines a “home” realm associated with a portion of the user's credentials before the user's secret information (such as a password) is passed to a non-home realm. A login user interface accepts a user identifier and, based on the user identifier, can use various methods to identify an account authority service within the federation that can authenticate the user. In one method, a realm list of the user device can be used to direct the login to the appropriate home realm of the user. In another method, an account authority service in a non-home realm can look up the user's home realm and provide realm information directing the user device to login at the home realm.
US09935934B1 Token management
A method and system for management access tokens is described. Access tokens for accessing third-party resources are stored and managed in a token repository. An access token may be obtained from a third-party resource. Once a user has authorized the system to access a third-party resource and unless that authorization is revoked, the user is not required to reauthorize the system in a pending or any subsequent interactive session, regardless of which shard of the system and third-party resource the user is connected to. The system can also use the authorization to execute scheduled requests for accessing or obtaining data from the third-party resource.
US09935932B2 Wireless sensor field enumeration
A system for authenticating data acquired by multiple sensors prior to storing the data in a database is described. The system also authenticates users requesting data access and intelligence agents that provide analyses of data stored in the database. As a result, any data or data analysis obtained from the system is traceable and reliable.
US09935927B2 System and method for low energy double authentication between mobile device and server nodes
Disclosed are systems, methods, and computer-readable storage media for Bluetooth low energy (BLE) double authentication between a mobile device and server nodes. A system using BLE authentication can receive at a mobile device, an identifier of a dongle attached to a server that enables wireless communication and can establish a wireless low energy connection with the dongle without paring. The system can receive a server identifier and can determine whether the server has previously been authenticated to yield a determination. When the determination is that the server has not previously been authenticated, the system can receive a baseband management controller username and a password. When the determination is that the server has previously been authenticated, the system can determine whether to perform a double authentication to yield a second determination. The system can perform the double authentication when the second determination indicates that the double authentication should be performed.
US09935924B1 Decentralized authoritative messaging
A secure chat client is described that allows users to exchange encrypted communications via secure chat rooms, as well as one-to-one communications. In particular, the secure chat client allows users to create, configure, and manage secure chat rooms. Furthermore, the secure chat client provides users with the ability to recover secure messages when they obtain a new device or otherwise lose communications.
US09935923B2 Secure data parser method and system
A secure data parser is provided that may be integrated into any suitable system for securely storing and communicating data. The secure data parser parses data and then splits the data into multiple portions that are stored or communicated distinctly. Encryption of the original data, the portions of data, or both may be employed for additional security. The secure data parser may be used to protect data in motion by splitting original data into portions of data, that may be communicated using multiple communications paths.
US09935919B2 Directory partitioned system and method
This disclosure relates in general to the field of directory information systems and/or services. In a method embodiment, a method of arranging objects in a directory information system includes providing a plurality of objects to a computer-readable medium having a directory information structure. Each object may have one or more characteristics and each object may be stored, for example, in the computer-readable medium according to the directory information structure. Storing the objects may further include performing a mathematic operation on at least one of the characteristic(s) of the object, and arranging the object in the directory information structure based at least in part on a result of the mathematical operation performed on at least one of the characteristic(s) of the object.
US09935918B2 Cloud-based infrastructure for determining reachability of services provided by a server
Technologies are described for using a cloud-based computer system to access services provided by a particular server over public Internet Protocol (IP) connections. In one aspect, a system includes a first computer system configured to run the particular server to provide a first service over public IP connections; and a second computer system configured to run a second server, where the particular server transmits, over public IP connections, a request for the second server to check the first service, where, responsive to receipt of the request for the second server to check the first service, the second server provides, to the particular server over public IP connections, information relating to whether the first service is available over public IP connections, and where the particular server updates an availability status of the first service over public IP connections based on the information provided by the second server.
US09935917B2 Methods of detecting and assigning IP addresses to devices with ARP requests
A method of discovering and assigning an IP address to a device to be discovered in a communication network having multiple interconnected nodes includes continuously monitoring, by the device to be discovered, the network for address resolution protocol (ARP) requests. The discoverer node transmits a number of ARP request to the network. The device to be discovered receives the number of ARP requests. The device to be discovered determines whether the number of ARP requests are unanswered by other devices in the network. The device to be discovered answers to the number of ARP requests with an ARP reply to claim an IP address associated with the number of ARP requests. The discoverer node and the device to be discovered exchange a pair of User Datagram Protocol (UDP) packets to complete the detection process.
US09935915B2 System and method that bridges communications between multiple unfied communication(UC) clients
This disclosure describes a system and method that bridges communications between multiple unified communication (UC) clients. This disclosure provides a UC bridging tool configured to execute computer implemented instructions using the processor and memory. The processor is further configured to: receive UC client specific human interface device HID commands from a plurality of UC clients with a UC client driver module, wherein each UC client driver is configured to translate UC client specific human interface device (HID) commands for each UC client driver to a common format; receive HID commands in the common format and translate the HID commands from the common format into a device specific format with a UC audio assistant module; pass the HID commands in the device specific format to an output device with a device specific driver module that further comprises a set of device specific drivers.
US09935908B2 Download of current portions of email messages
In general, this disclosure describes techniques of enabling devices to download only current portions of email messages without downloading historical portions of the email messages. For instance, when an email client generates a reply email message to an original email message, the reply email message includes a current portion and a historical portion. The current portion of the reply email message includes new information and the historical portion of the reply email message includes the original email message. The techniques of this disclosure enable devices to download the current portions of email messages without downloading the historical portions of the email messages.
US09935907B2 System and method for serving a message client
A system and method for synchronizing messages between client application instances and a message service provider includes a connection service communicatively coupled to a plurality of client messaging application instances; a first intermediary transfer layer with an inbound message data queue that queues message updates of a client application instance and an outbound message data queue that queues message updates and notifications from a mailbox service layer; a mailbox service layer communicatively coupled to the connection service through the first intermediary transfer layer; a second intermediary transfer layer with an mailbox message data queue that contains queued message data directed at the mailbox service layer and a message service data queue that contains queued message updates directed at a message service layer; and a message service layer configured for message interactions with an outside message service provider.
US09935903B2 Duplicate-free item creation using EWS by a single client
Processing client requests for duplicate-free server operations is particularly useful for creating and sending items using Microsoft Exchange Web Services (EWS). The system facilitates avoiding creation and sending of duplicate items. In contrast to conventional implementations that send a single command to create and then perform subsequent processing of an item, a feature of the present embodiment is using two commands: a first command to create the item, and a second command to subsequently process the item. In a specific implementation, an EWS item's provided ChangeKey property is used to keep track of the EWS's reply from the server to the client, thereby avoiding duplicate item creation.
US09935900B2 Method for providing protection switching service in virtual tenant network and controller therefor
A method for providing a protection switching service in a virtual tenant network (VTN) and a controller are provided. The method enables a real-time protection switching setup on a VTN path in order to provide reliability of a VTN service.
US09935897B2 Network switching device
Network switching arrangements including: setting an operation mode of a target switching block to a operation mode that is different from an operation mode of a first switching block while the first switching block is handling a switching process, the target switching block being one switching block selected from second switching blocks; performing a switchover process including starting the switching process using the target switching block instead of the first switching block, after completion of setting the operation mode of the target switching block; and copying the switching information held by the first switching block to the target switching block, prior to starting the switching process using the target switching block, after completion of setting the operation mode of the target switching block.
US09935892B2 Integrated capacity and architecture design tool
A method implemented in a computer infrastructure having computer executable code, including consolidating collected capacity architecture information, which includes data for installed resources, allocated resources and reserved resources and determining available resources based on the collected capacity architecture information. Additionally, the method includes displaying an indication the available resources and performing capacity planning based on the collected capacity architecture information and the available resources.
US09935889B2 Communication apparatus and method
A communication apparatus includes a storing unit, a setting unit, a transmitting unit. The storing unit stores the number of transmissions of data to a destination of the data in association with an identifier that identifies the data. The setting unit sets, when the number of transmissions of target data that is data of a target of transmission to the destination reaches a threshold, as alternative data, a combination of the target data and a retaining request for requesting retaining of the target data. The alternative data is data to be transmitted to the destination as an alternative of the target data. The setting unit sets, after transmission of the retaining request, the identifier of the target data as the alternative data. The transmitting unit transmits the alternative data to the destination.
US09935881B2 Method and apparatus of load sharing
A method of load sharing, includes: extracting a factor field capable of distinguishing data flow in a packet header of the classified data flow, and taking the factor field as an input factor of a default load sharing algorithm of a network forwarding device interface, or taking the factor field as an input factor of a load sharing algorithm capable of uniformly allocating the data flows and selected according to the flow characteristic of the data flows, calculating the paths of the data flows, and forwarding the data flows according to respective paths. The method is used for increasing the expansibility of the network forwarding device and achieving load balancing.
US09935880B2 Systems and methods for scalable and resilient load balancing
A method for providing resilient load balancing in a system comprising a first processing unit, a second processing unit, a first active load balancer and a second active load balancer is disclosed. A first set of packet flows may be mapped to the first active load balancer and a second set of packet flows may be mapped to the second active load balancer. The first set of packet flows may include a first packet flow. In some embodiments, the method includes: (a) storing, by the first processing unit, a set of state information associated with the first active load balancer, the set of state information comprising state information associated with a first session associated with the first packet flow; (b) receiving, by the first processing unit, information indicating that the first active load balancer is inoperable; and (c) in response to receiving the information indicating that the first active load balancer is inoperable, transmitting, from the first processing unit to the second active load balancer, the state information associated with the first session.
US09935868B2 Optimizing inter-PAN traffic
In one embodiment, a device identifies inter-personal area network (PAN) traffic between a first PAN and a second PAN. The device identifies a network node in the first PAN associated with the inter-PAN traffic and determines that the network node should join the second PAN. The device causes the network node to join the second PAN, in response to determining that the network node should join the second PAN.
US09935866B2 Systems and methods for last mile optimization of transmission of real-time data
The present invention relates to systems and methods for last mile optimization for the transmission of real-time data. Pseudo-packets are sent to a last mile optimizer located at each of several ‘best’ servers. The last mile optimizers provide feedback regarding jitter, latency and packet loss of the pseudo-packets to determine quality of service for each of the servers. The server with the best quality of service is selected as the ‘single best’ server. A plurality of transporter algorithms may then be applied to pseudo-packets that are then sent to the single best server, and the quality of service for each transporter algorithm is subsequently measured for effectiveness. The transporter algorithms that are shown to be effective are combined together for the actual transmission of real-time data. Continuous monitoring of transmission quality allows for utilizing backup pathways upon detection of a problem, and negotiation of preferred transporter algorithms.
US09935856B2 System and method for determining end user timing
A system automatically determines end user timing across multiple platforms and network browsers. End user timing data may be captured using one or more techniques. The techniques may include utilizing a navigation timing standard and handler call back functionality. The end user timing data may be analyzed to identify which technique's data is most accurate, and the most accurate end user timing data is then reported.
US09935855B2 Method and apparatus for a power-efficient framework to maintain data synchronization of a mobile personal computer to simulate a connected scenario
An apparatus and method for a power-efficient framework to maintain data synchronization of a mobile personal computer (MPC) are described. In one embodiment, the method includes the detection of a data synchronization wakeup event while the MPC is operating according to a sleep state. Subsequent to wakeup event, at least one system resource is disabled to provide a minimum number of system resources required to re-establish a network connection. In one embodiment, user data from a network server is synchronized on the MPC without user intervention; the mobile platform system resumes operation according to the sleep state. In one embodiment, a wakeup alarm is programmed according to a user history profile regarding received e-mails. In a further embodiment, data synchronizing involves disabling a display, and throttling the system processor to operate at a reduced frequency. Other embodiments are described and claimed.
US09935845B2 Cloud migration and maintenance controls
Improved cloud migration tools are provided. In some embodiments, improved cloud migration tools may provide complex cloud migration analysis techniques for automated monitoring of aggregate compliance with cloud migration protocols, including user- and/or organizational defined architectural guidelines. In some embodiments, improved cloud migration tools may provide automated detective cloud controls, particularly in the management across multiple cloud computing platform accounts, virtual private clouds (VPCs), and/or a large numbers of numbers of resources.
US09935844B2 Reducing internodal communications in a clustered system
A clustered system has a subset of nodes coupled to a particular cluster resource. Nodes not coupled to the cluster resource may operate on a cluster resource through a node coupled to that resource. The nodes coupled to the resource form a group, the nodes in the group perform protocols to operate on the cluster resource, nodes not in the group do not participate in the protocols.
US09935843B1 Dissemination of NAT traversal attributes in a control plane protocol
A method for creating a secure network is provided. The method comprises establishing a controller for a plurality of edge nodes in the network; configuring each edge node to perform a discovery operation to discover Network Address Traversal (NAT) information for any NAT device associated with said edge node; and configuring each edge node to transmit any NAT information discovered through said discovery operation to the controller; and configuring the controller to distribute the NAT information received from the plurality of edge node to each edge node.
US09935838B2 Multi-stage network discovery
In a multi-stage network discovery system, a target device is identified by a logical address and associated with a configuration item (CI) record stored in a configuration management database (CMDB). A receiver module receives first probe data from a first probe running against the target device, the first probe data comprising constant attribute data of the target device, stores at least part of the first probe data in a first part of the CI record, receives subsequent probe data from at least one subsequent probe against the target device using the logical address, the subsequent probe data comprising the constant attribute data of the target device, determines that the constant attribute data from the subsequent probe matches the constant attribute data from the CI record, and in response to the determination, stores the subsequent data obtained from the second probe in a second part of the CI record.
US09935837B2 Physical change tracking system for enclosures within data centers
Embodiments for implementing change control management in computing center environments by a processor. A determination is made of a present status of a monitored component of a computing device in the computer center environment. A recording, using at least one sensor device, of a change of the present status of the monitored component, including a time stamp and information identifying an owner of the change is made. An analysis of a trend of status of the monitored component over time is made to generate an accurate prediction of future activity towards the monitored component.
US09935836B2 Exclusive IP zone support systems and method
Network resource monitoring systems and methods are presented. In one embodiment, a network resource monitoring method comprises: gathering network resource pre-monitoring information, including information indicating whether a network resource is associated with a zone, and if associated with a zone also gathering information indicating zone type; performing a network resource monitoring process on the network resource based on results of the gathered network resource pre-monitoring information; including performing a network resource monitoring process when the network resource is in a local zone that does not otherwise make available or share information with a global zone; and analyzing the results of the network resource monitoring process. In one embodiment, if the network resource is included in an exclusive IP zone. In one exemplary implementation, the network resource monitoring process comprises: ascertaining if a monitoring type trigger condition exists; performing a corresponding type of monitoring if the monitoring type trigger condition exists.
US09935835B2 Methods, apparatuses, and computer program products for facilitating synchronization of setting configurations
A method, apparatus, and computer program product are provided for facilitating synchronization of setting configurations. An apparatus may include a processor and a memory storing instructions that when executed by the processor cause the apparatus to configure a setting on the apparatus. The instructions when executed by the processor may further cause the apparatus to generate a settings data package comprising the setting configuration. The instructions when executed by the processor may additionally cause the apparatus to send the settings data package to a settings management service for synchronization of the setting configuration to at least one of a service or a user device. The settings management service may be configured to synchronize the setting configuration by distributing the settings data package to the at least one of the service or the user device. Corresponding methods and computer program products are also provided.
US09935834B1 Automated configuration of virtual port channels
In an example, there is disclosed a computing apparatus for providing an integrated service engine on a service appliance, including one or more logic elements providing a service appliance engine operable for performing a service appliance function; and one or more logic elements providing a protocol engine operable for: detecting that a plurality of upstream network switches are connected to the service appliance in a virtual port channel configuration; and provisioning virtual port channel (VPC) services comprising replicating a routing policy to each of the plurality of upstream network switches. There is also disclosed one or more computer-readable mediums having stored thereon instructions for providing the foregoing, and a computer-implemented method of performing the foregoing operations.
US09935820B2 Transmitter and transmission system
A transmitter used in a transmission system in which a first network is connected, via a second network, to a third network, the transmitter being arranged between the first network and the second network, the transmitter includes: a generator configured to specify an identifier of data area in which communication data affected by a failure occurred in the first network are stored, in a frame transmitted from the second network, and to generate failure information associated with the identifier specified; and a transmitter configured to transmit the failure information generated by the generator, via the second network, to another transmitter arranged between the second network and the third network.
US09935818B1 Diagnostic traffic generation for automatic testing and troubleshooting
A framework in a cloud network that may allow for debugging at multiple vantage points at different layers (e.g., layer 2, layer 3, etc.). The methods may provide tracer or measurement services that filter, capture, or forward flows that may include packets, calls, or protocols to look for particular signatures.
US09935816B1 Border gateway protocol routing configuration
A technology is described for updating an Autonomous System Number (ASN) in a Border Gateway Protocol (BGP) routing configuration. An example method may include receiving a request to update a BGP routing configuration on a gateway with an ASN associated with a customer. In response to the request, the BGP routing configuration on the gateway may be updated to replace a default ASN associated with a computing service provider with the ASN associated with the customer. The BGP routing configuration on the gateway may also be updated to allow the ASN associated with the customer to appear in an Autonomous System (AS) path at least twice, thereby allowing for BGP routes to be exchanged between gateways.
US09935815B2 Data administration unit, data access unit, network element, network, and method for updating a data structure
A data administration unit for updating a first data structure in a first memory may comprise a second memory, a data structure generator for setting up a second data structure in the second memory, a pointer generator for setting at least one of a dynamic change indicator and a pointer in the first data structure, a waiting unit for waiting for a finalization of a data access of a data access unit, and a data structure over-writer for overwriting the first data structure using data of the second data structure. An data access unit for accessing a first data structure in a first memory may comprise a data access driver, a first synchronization signal evaluator for reception and evaluation of a first synchronization signal, and a synchronization approval signal generator for generation and submission of a first synchronization signal.
US09935814B2 Method of obtaining a network address
The present invention comprises a method of and apparatus for simplifying the process of access to a network for a roaming computer user, divides the responsibility of servicing a given user wanting to access the network between multiple parties and minimizes the possibility of improper dissemination of email header data as well as improper use of network resources (including server systems) by non-clients.
US09935805B2 MIMO and MU-MIMO OFDM preambles
Certain aspects of the present disclosure present frame structures to support a plurality of standards, such as the IEEE 802.11ac in addition to the IEEE 802.11a/b/n/g. Preamble of the frame structure can be used by a receiver to detect transmission mode of the packet.
US09935804B2 Apparatus and method for transmitting and receiving of cyclic shift parameter for supporting orthogonality in MIMO environment
A method includes: determining a Cyclic Shift (CS) parameter that implicitly indicates an orthogonality allocation rule and orthogonality-related information, by determining a multiple access state of a User Equipment (UE), and transmitting the determined CS parameter to the UE, wherein the orthogonality-related information includes an Orthogonal Cover Code indicated by the CS parameter, the orthogonality allocation rule is determined as a uniform scheme or a non-uniform scheme according to the CS parameter, determining the CS parameter by which the non-uniform scheme is applied if the UE is in a Single User Multiple Input Multiple Output state, and determining the CS parameter by which the uniform scheme is applied if the UE is in a Multiple User Multiple Input Multiple Output state.
US09935801B2 Method for transmitting data by radiofrequency link in a remote-reading apparatus
The invention relates to a method for controlling digital data transmission in a remote-reading apparatus including a plurality of metering devices, each equipped with a radiofrequency module for communicating with a radiofrequency transmission/reception device of a gateway system of the apparatus, the method comprising a step of transmitting a digital signal from the radiofrequency module to the radiofrequency transmission/reception device and/or from the radiofrequency transmission/reception device to the radiofrequency module, the transmission being carried out via a carrier modulated by frequency shift modulation, the method being characterized in that the frequency shift modulation has a modulation index strictly equal to an integer value divided by two, and in that it includes a step of receiving the signal transmitted according to the modulation, comprising operations of generation of a synchronization signal synchronized with the received signal and synchronous detection of the received signal using the synchronization signal.
US09935800B1 Reduced complexity precomputation for decision feedback equalizer
Techniques for reducing the complexity and power requirements of precompensation units, as well as equalizers, devices, and systems employing such techniques. In an illustrative method for providing high speed equalization, the method comprises: obtaining a channel response that presents trailing intersymbol interference in a signal having a sequence of symbols from a symbol set; determining a distribution of threshold values for a precompensation unit corresponding to said channel response with said symbol set; deriving a reduced set of threshold values from said distribution; and implementing a decision feedback equalizer with a reduced-complexity precompensation unit employing the reduced set of threshold values. In a related illustrative method for providing high speed equalization, the method comprises: obtaining a channel response that presents trailing intersymbol interference in a signal having a sequence of symbols from a symbol set, the channel response and symbol set corresponding to an initial distribution of threshold values for a precompensation unit; deriving a filter that converts the channel response into a modified channel response, the modified channel response and symbol set corresponding to an improved distribution of threshold values in that the improved distribution includes fewer distinct threshold values or reduced spacing between at least some adjacent threshold values; and implementing a decision feedback equalizer with a reduced-complexity precompensation unit employing the threshold values in the improved distribution.
US09935796B2 Superposed signal sampling apparatus and sampling method
The present disclosure relates to a superposed signal sampling apparatus, including: a signal receiving module, a signal extracting module, and a signal output module. The signal receiving module is used to receive a superposed signal. The signal extracting module is used to determine whether the received superposed signal is within a preset threshold range of a direct current signal; if the received superposed signal is within the threshold range, extract a previously received signal as a direct current signal to be output; and if the received superposed signal is beyond the threshold range, extract a currently received signal as a direct current signal to be output. The signal output module is used to integrate the direct current signal extracted by the signal extracting module, and then output the direct current signal. The present disclosure further relates to a superposed signal sampling method.
US09935789B2 Centralized pluggable authentication and authorization
In particular embodiments, a first computing device may receive a request from a second computing device to access a first entity of an infrastructure, the second computing device being coupled to the first computing device, then determining an eligibility of the second computing device to access as least the first entity of the infrastructure, and if the second computing device is determined to be eligible to access the first entity, then assigning a second ticket to the second computing device responsive to the received request.
US09935787B2 Tunneling VoIP call control on cellular networks
Signaling from a mobile device is transparently tunneled through a cellular voice network to a Voice over Internet Protocol (“VoIP”) core network so that multi-party calls, including conference calls and call waiting, can be managed entirely within the VoIP core network. The tunneled signals enable call control to be implemented in the VoIP core network and also establish a way to communicate requests, instructions, and call state. The signaling is transparent to the cellular network because that network does not receive and interpret the signaling. Instead, the cellular network's existing and unmodified control plane is repurposed by the mobile device by placing new, brief outgoing calls through the cellular network to the VoIP core network where the called party number (i.e., the caller-ID) encodes specific information. The VoIP core network immediately releases the new cellular call once the caller-ID is received and the encoded information is interpreted.
US09935786B2 Low power bidirectional bus
A method of sending information between first and second modules connected by a signal bus comprises generating a clock signal in the first module, and imposing the clock signal on a first line of the bus. A first pattern of bit values is transmitted from the second module to the first module on a second line of the bus, during first half-periods of each period of said clock signal. A second pattern of bit values is transmitted from the first module to the second module on the second line of the bus, during second half-periods of each period of said clock signal, wherein the second half-periods of each period of said clock signal are different from the first half-periods of each period of said clock signal. Information can then be transmitted from the first module to the second module by altering the second pattern of bit values; and information can be transmitted from the second module to the first module by altering the first pattern of bit values.
US09935782B1 Scalable internet group management protocol (IGMP) snooping in a switch fabric
Internet Group Management Protocol (IGMP) snooping includes flooding an IGMP query received at a border leaf switch from a multicast router connected to the multicast router to all host devices in a given bridge domain through leaf switches in the bridge domain, and receiving multiple join requests from the connected host devices at the leaf switches. The IGMP snooping also includes consolidating the multiple join requests received at the leaf switches into a multicast groups membership repository to indicate for each leaf switch the multicast group membership of interest in the given bridge domain, and sending the repository to the border leaf switch to enable the border leaf switch to send a consolidated IGMP proxy report on behalf of the leaf switches to the multicast router based on the repository and that indicates the multicast membership of interest in the given bridge domain.
US09935777B2 Electronic signature framework with enhanced security
Improved document processing workflows provide a secure electronic signature framework by reducing attack vectors that could be used to gain unauthorized access to digital assets. In one embodiment an electronically signed document is removed from an electronic signature server after signed copies of the document are distributed to all signatories. The electronic signature server optionally retains an encrypted copy of the signed document, but does not retain the decryption password. This limits the amount of data retained by the electronic signature server, making it a less attractive target for hackers. However, the electronic signature server still maintains audit data that can be used to identify a signed document and validate an electronic signature. For example, a hash of the document (or other document metadata) can be used to validate the authenticity of an electronically signed document based on a logical association between an electronic signature and the signed document.
US09935774B2 Configurable cryptographic controller area network (CAN) device
Embodiments of a device and method are disclosed. In an embodiment, a CAN device includes a security module connected between a CAN bus interface of a CAN transceiver and a microcontroller communications interface of the CAN transceiver and an operational mode controller connected between the security module and the CAN bus interface. The security module is configured to perform a security function on data traffic received from the CAN bus interface or from the microcontroller communications interface. The operational mode controller is configured to set an operational mode for the CAN transceiver such that a CAN Flexible Data-rate (FD) frame or a corresponding CAN frame is output from the CAN bus interface. An identifier of the CAN FD frame is the same as an identifier of the corresponding CAN frame.
US09935772B1 Methods and systems for operating secure digital management aware applications
A system and method for servicing secure data object management aware applications using a cloud-based host environment and a local secure container. The cloud-based host environment creates a controlled digital object from a master digital object, and activates a tether associated with the controlled digital object. The tether includes an access permission, and optionally an operation permission (e.g., view, delete, store, edit, and copy) and a command (e.g., timeout, destroy). The controlled digital object is stored to an isolated storage of the secure container. The tether contents control access and manipulation of the controlled digital object. Certain conditions (e.g., timeout period reached, anomalous data access pattern detected), cause the controlled digital object to be destroyed and/or the tether to be inactivated. In accordance with applicable law, the cloud-based host environment utilizes the tether to detect, identify, and/or thwart unauthorized host environments in possession of the controlled digital object.
US09935764B2 Adaptive synchronous protocol for minimizing latency in TDD systems
Systems and methods are presented that offer significant improvements in the performance of time division duplex (TDD) systems by utilizing an adaptive synchronous protocol. Conventional TDD systems are limited because data is transmitted during discreet and limited intervals of time, and because TDD transceivers may not simultaneously transmit and receive for reasons of insufficiently separated frequencies and limited receiver selectivity. Typically, TDD systems have significant latency due to the time to change from transmission to reception and the propagation delay time. By synchronizing the master nodes and the one or more remotes and by scheduling the traffic loads between these nodes, remote nodes may begin transmitting before the master node is finished with its transmission, and vice versa. This method reduces latency and improves the frame efficiency. Further, the frame efficiency may improve as the distance from the master node to the remote node increases.
US09935763B2 Timing correction in a communication system
One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.
US09935762B2 Apparatus and method for centering clock signal in cumulative data eye of parallel data in clock forwarded links
An apparatus for setting the timing of a triggering edge of a clock signal with respect to received parallel data. The apparatus includes a set of flip-flops including respective data inputs, respective clock inputs, and respective data outputs, wherein the set of flip-flops are configured to generate a set of output data at the data output based on parallel data applied to the respective data inputs in response to a triggering edge of a clock signal applied to the clock inputs; a variable delay element configured to apply a calibrated delay to the clock signal; and a controller configured to generate a control signal for the variable delay element to apply the calibrated delay to the clock signal based on the set of output data generated at the data outputs of the set of flip-flops.
US09935760B2 Tunable filter for LTE bands
A tunable filter reduces the total number of filters used in TDD (Time-Division Duplex) communication circuitry. The communication circuitry may include a tunable filter and a first switch associated with the tunable filter. The tunable filter may include a tuning component and a filtering component. The tuning component may be located with the first switch on a first die. The filtering component may be located in a laminate underneath the first switch. Power amplifiers for amplifying transmission signals may be located on a second die, and the second die may be located on the laminate.
US09935755B2 Method and apparatus for signaling in digital radio systems
A method of transmitting data by a transmitter in a broadcast system, a transmission device for transmitting at least one data stream in a broadcast system, a method of receiving data by a receiver in a broadcast system, and a receiving device for receiving data in a broadcast system are provided. The method of transmitting data by a transmission device includes generating a first frame comprising a preamble and a payload, wherein the preamble comprises first information related to the payload of the first frame, and wherein the payload comprises the data; and transmitting the first frame, wherein the preamble includes at least one parity bit for third information related to a payload of a second frame, and wherein the second frame is a next frame of the first frame.
US09935745B2 Signal sending method and signal sending device
The present invention provides a signal sending method and a signal sending device, where the signal sending method includes: canceling interference from symbols of a boundary between at least two precoding code blocks in a multiple input multiple output filter bank multicarrier MIMO-FBMC system, where the precoding code block includes at least one time-frequency resource element that uses same precoding; performing precoding on a to-be-sent symbol in the precoding code block to obtain a precoded symbol; and sending the precoded symbol. In the present invention, mutual interference between precoding code blocks at a time-frequency critical location can be completely or partially canceled.
US09935743B2 Network element and method of operating the same
A method of operating a first network element in a wireless communications network to perform WIFI and long term evolution (LTE) communications with a second network element on an unlicensed portion of a radio spectrum, the unlicensed portion being divided into first and second frequency regions, includes performing, at the first network element, WIFI protocol communications over the unlicensed portion, including at least one of transmission to, and reception from, a second network element, of WIFI protocol data using one or more first frequencies of the first frequency region, and performing, at the first network element, LTE protocol communications over the unlicensed portion including at least one of transmission to, and reception from, the second network element, of LTE protocol data using one or more second frequencies of the second frequency region, the WIFI protocol communications and LTE protocol communications being performed by the first network element simultaneously.
US09935742B2 Adaptive HARQ for half duplex operation for battery and antenna constrained devices
A user equipment (UE) implements improved communication methods which enable uplink (UL) transmissions consistent with an UL timeline. The UE may have a transmit duty cycle and may transmit acknowledge/negative acknowledge messages to a base station according to the transmit duty cycle. Additionally, the UE may be configured to determine signal-to-interference-plus noise ratio (SINR) between the UE and the base station and compare SINR to a threshold. The UE may transmit redundancy versions of data in consecutive sub-frames with a duty cycle of two transmissions per X+1 sub-frames if SINR is equal or above the threshold and redundancy versions using a duty cycle of one transmission per X sub-frames if SINR is below the threshold. Further, the UE may be configured to communicate a number of UL HARQ processes supported by the UE, receive first information in a first sub-frame, and send second information X sub-frames after the first sub-frame.
US09935741B2 Providing acknowledgement information by a wireless device
In general, to provide acknowledgment information by a first wireless device, the first wireless device sends repeated instances of acknowledgment information in respective first and second frame structures, in response to receipt of first information from a second wireless device. In addition, the first wireless device also sends further acknowledgment information in the second frame structure that is responsive to second information received from the second wireless device.
US09935733B1 Method of and circuit for enabling a communication channel
A method of enabling a communication channel between a first communication circuit and a second communication circuit is described. The method comprises establishing a communication link according to a communication protocol between the first communication circuit and the second communication circuit, wherein the communication protocol enables the transmission of data between the first communication circuit and the second communication circuit at a standardized data rate; determining a standardized data rate for which the communication link between the first communication circuit and the second communication circuit fails to meet a predetermined quality threshold; and establishing a communication link according to the communication protocol at a non-standardized data rate below the determined standardized data rate.
US09935731B2 Communication apparatus, lens apparatus and image pickup apparatus including the same
A communication apparatus has a communicator configured to communicate with an external device capable of communication at multiple communication rates, a communication rate setter configured to change a communication rate of the communicator, and a period detector configured to detect a change period of the communication rates of the external device. The communication rate setter changes the communication rate based on the change period detected by the period detector.
US09935730B1 Systems and methods for using radio layer information to enhance network transfer protocols
Systems and methods for using radio layer information to enhance network transport protocols are provided. Channel characteristics are obtained from a radio layer in a mobile device. The channel characteristics indicate the quality of a connection between the mobile device and a base station. Based on the channel characteristics, a bandwidth of the connection between the mobile device and the base station is calculated. A server is instructed to transmit data to the mobile device at the data rate determined based on the determined bandwidth.
US09935722B2 Harmonic suppressing local oscillator signal generation
A transceiver includes local oscillator (LO) signal circuitry configured to output an LO signal having an LO frequency and mixer circuitry configured to input the LO signal and an information signal that encodes communication data and output a shifted signal that corresponds to the information signal shifted to a desired frequency. The LO signal circuitry includes selection circuitry and generation circuitry. The selection circuitry is configured to select a pulse pattern and a gap duration based at least on a target harmonic of the LO frequency to be suppressed. The pulse pattern includes at least two pulses spaced apart by a gap having the gap duration. The generation circuitry is configured to generate an LO signal characterized by the selected pulse pattern and gap duration.
US09935718B1 Feed-forward DC-bias acquisition for burst-mode optical receivers
An optical receiver receives a photocurrent from a photosensor and uses a transimpedance element to convert the photocurrent into an input voltage signal. An amplifier then amplifies the input voltage signal to produce a receiver output. During this process, a reference-voltage-generation circuit generates a reference voltage for the amplifier. This reference-voltage-generation circuit includes a data-detection circuit that detects data on the input voltage signal, and an adjustable low-pass filter, which filters the input voltage signal to produce the reference voltage. During a faster operating mode, which occurs when the data-detection circuit does not detect data on the input voltage signal, the filter has a cutoff frequency f1. During a slower operating mode, which starts a bias-delay time tBD after the data-detection circuit detects data on the input voltage signal, and lasts until the data-detection circuit no longer detects data, the filter has a lower cutoff frequency f2.
US09935709B2 Header and payload signals with different optical properties
A method, a system, and a non-transitory computer-readable memory resource containing instructions for transmitting data are provided. In an example, the method includes providing a header signal having a first optical property. The header signal indicates a start of a packet, and has a minimum period between transitions that is less than a frame period of a receiving device and greater than a scanline period of the receiving device. A payload signal of the packet is provided that has a second optical property that is different from the first optical property. The payload signal has a minimum period between transitions that is less than the frame period of the receiving device and greater than the scanline period of the receiving device.
US09935707B2 Methods, systems, and computer readable media for providing traffic generation or forwarding device that compensates for skew between electrical lanes in a manner that allows coherent detection of transmitted data
A method for transmitting and coherently detecting data transmitted over electrical lanes that experience different amounts of skew includes, at a traffic generation or forwarding device, self calibrating transmit and receive-side components of the traffic generation or forwarding device to account for skew between electrical lanes and setting per-electrical lane delays based on the calibration. Data to be transmitted to a network device is generated. The data to be transmitted is spread, using one of the transmit-side components, over a first number of electrical lanes. The data is multiplexed from the electrical lanes onto a second number of optical lanes, the second number being different from the first number. Data is transmitted to and received from the network device over the optical lanes. Transmitted data is reconstructed from the received data using the receive-side components.
US09935706B2 Built-in self test for loopback on communication system on chip
In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.
US09935703B2 Host node device and methods for use therewith
Aspects of the subject disclosure may include, for example, a host node device having a terminal interface that receives downstream channel signals from a communication network and send upstream channel signals to the communication network. An access point repeater launches the downstream channel signals as guided electromagnetic waves on a guided wave communication system and to extract a first subset of the upstream channel signals from the guided wave communication system. A radio wirelessly transmits the downstream channel signals to at least one client node device and to wirelessly receive a second subset of the upstream channel signals from the at least one client node device. Other embodiments are disclosed.
US09935702B2 Method and apparatus for feeding back channel state information for 3D MIMO in wireless communication system
A method of reporting channel state information to a base station at a user equipment (UE) in a wireless communication system is disclosed. The method includes configuring a two-dimensional (2D) antenna array transmission mode of a downlink data channel via a higher layer, receiving an indicator corresponding to one of transmission schemes of the downlink data channel via the higher layer, calculating the channel state information on the assumption of one transmission scheme of the downlink data channel corresponding to the indicator, and reporting the calculated channel state information to the base station. The transmission schemes of the downlink data channel include a demodulation-reference signal (DM-RS) based large delay (LD) cyclic delay diversity (CDD) transmission scheme and a closed loop multiplexing transmission scheme in the 2D antenna array transmission mode.
US09935700B2 Beam scanning method for hybrid beamforming in wireless communication system and apparatus therefor
A method for, at a transmitter, transmitting a signal to a receiver in a wireless communication system is disclosed. The method includes transmitting a first reference signal for omni-directionally providing a uniform reference beam to the receiver, transmitting a second reference signal for providing beams respectively corresponding to a predetermined number of sectors to the receiver, receiving, from the receiver, sector information selected based on the second reference signal and information about a beam gain difference between a beam corresponding to the selected sector and the reference beam, and performing beamforming for transmitting a signal to the receiver based on the sector information and the information about the beam gain difference.
US09935699B2 Communication method and apparatus using beamforming in a wireless communication system
A communication method and an apparatus using beamforming in a wireless communication system are provided. The communication method includes determining a candidate user set including one or more Mobile Stations (MSs), for Multiple User-Multiple Input Multiple Output (MU-MIMO) transmission, transmitting beam information indicating best Base Station (BS) transmission beams of the MSs of the candidate user set to the MSs of the candidate user set, receiving Precoding Matrix Index (PMI) information indicating a PMI to be used for baseband precoding from each of the MSs of the candidate user set, the PMI information being determined based on the beam information, and transmitting a signal precoded based on the PMI information to at least one MS.
US09935677B2 Devices and methods related to high power diode switches with low DC power consumption
Devices and methods are disclosed, related to high power diode switches. In some embodiments, a radio-frequency switch circuit can include a first switchable path implemented between a pole and a first throw, the first switchable path including one or more PIN diodes, and a second switchable path implemented between the pole and a second throw, the second switchable path including one or more PIN diodes. The radio-frequency switch circuit can further include a switchable shunt path implemented between the second throw and a ground, the switchable shunt path including at least one shunt PIN diode and a capacitance between the second throw and the at least one shunt PIN diode. The pole can be an antenna port, and the first and second throws can be transmit and receive ports, respectively.
US09935676B2 Opportunistic antenna switch diversity (ASDIV) in carrier aggregation
Aspects of the present disclosure relate to techniques for switching antennas in devices that have multiple antennas for communicating via aggregation of multiple carriers.
US09935675B2 RF front-end circuitry with transistor and microelectromechanical multiple throw switches
This disclosure relates generally to radio frequency (RF) front-end circuitry for routing RF signals to and/or from one or more antennas. Exemplary RF front-end circuitry includes a multiple throw solid-state transistor switch (MTSTS) and a multiple throw microelectromechanical switch (MTMEMS). The MTSTS may be configured to selectively couple a first pole port to any one of a first set of throw ports. The MTMEMS is configured to selectively couple a second pole port to any one of a second set of throw ports. The second pole port of the MTMEMS is coupled to a first throw port in the first set of throw ports of the MTSTS. The MTSTS helps prevent hot switching in the MTMEMS since the first throw port of the MTSTS may be decoupled from the second pole port of the MTMEMS before decoupling the second pole port from a selectively coupled throw port of the MTMEMS.
US09935674B2 Method and apparatus for radio antenna frequency tuning
A system that incorporates teachings of the present disclosure may include, for example, a non-transitory computer-readable storage medium, which can include computer instructions to determine a subset of use cases from a group of use cases stored in a memory of a communication device, and to determine a target use case from among the subset of use cases based on an operational parameter associated with a transceiver of the communication device. Additional embodiments are disclosed.
US09935669B1 Protection enclosure of portable electronic device
A protection enclosure of an portable electronic device includes a protective frame including a protective frame main body in which the portable electronic device is received and held and multiple protective frame magnetic members, which are arranged in the protective frame main body at intervals and grouped as at least one lateral protective frame magnetic attraction row and at least one longitudinal protective frame magnetic attraction row perpendicular to the lateral protective frame magnetic attraction row; and a protective cover including a protective cover main body having a bottom board, an end board, and a connection board connected between the bottom board and the end board and multiple protective cover magnetic members arranged, at intervals, on the end board to form at least one protective cover magnetic attraction row. Foldability is available between the bottom board and the connection board and also between the connection board and the end board.
US09935668B1 Detachment mechanism and indicator for mobile mount portable radio and method for the same
A ruggedized mobile mount for a portable handheld radio, including a detachment mechanism and indicator for removably attaching the handheld radio to the mobile mount is disclosed. In one embodiment, the detachment mechanism includes a mechanical indicator configured to indicate an attached and detached state of the handheld radio.
US09935667B2 Obtaining on-line service
Method and system for obtaining on-line service are provided. The method may include: a vehicle mounted system sending a first piece of information about its capability and a request for an on-line service to a mobile communication device connected to the vehicle mounted system; and the vehicle mounted system receiving contents of the on-line service from the mobile communication device, where the contents of the on-line service are obtained by processing to match the capability of the vehicle mounted system. Computation load of the vehicle mounted system may be reduced and more utilization may be realized.
US09935666B2 Transceiver using technique for improvement of phase noise and switching of phase lock loop (PLL)
A transceiver may include a reception (Rx) radio frequency (RF) part configured to process a received signal, a transmission (Tx) RF part configured to process a transmitted signal, and a phase lock loop (PLL) configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part. The PLL may be controlled according to whether the reception RF part or the transmission RF part is on. In addition, a transceiver may include quenching waveform generator (QWGs) to control quenching waveforms of the RF parts corresponding to a plurality of antennas. The quenching waveforms may be generated respectively by VCOs operating at a same frequency. The QWGs may control the VCOs such that the quenching waveforms do not overlap.
US09935658B2 Data processing apparatus
A data processing apparatus includes a memory, a processor which outputs write data when making a write request to the memory, and which inputs read data when making a read request to the memory, a first circuit which is coupled between the memory and the processor, and which includes a parity generating circuit generating a parity comprising a plurality of parity bits from the write data, the parity being written with the write data into the memory, and a second circuit which is coupled between the memory and the processor, and which includes a parity check circuit detecting a presence or an absence of an error of one-bit or two-bits in the read data and the parity read from the memory.
US09935657B2 Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
The present invention provides a method of transmitting broadcast signals. The method includes, formatting, by an input formatting block, input streams into plural PLPs(Physical Layer Pipes); encoding, by an encoder, data in the plural PLPs; time interleaving, by a time interleaver, the encoded data in the plural PLPs, wherein the time interleaving includes: cell interleaving, by a cell interleaver, the encoded data by permuting cells in a FEC(Forward Error Correction) block in the plural PLPs; frame mapping, by a framer, the time interleaved data onto at least one signal frame; and waveform modulating, by a waveform block, the mapped data in the at least one signal frame and transmitting, by the waveform block, broadcast signals having the modulated data.
US09935655B2 Reading of distributed erasure-coded data from an enterprise object storage system
Various implementations disclosed herein enable reading of an erasure-coded file striped across one or more storage entities of an enterprise object storage system. For example, in various implementations, a method of reading an erasure-coded file is performed by an ingest entity of a storage system that includes a cluster of storage entities. The ingest entity includes a non-transitory computer readable storage medium, and one or more processors. In various implementations, the method includes querying the storage entities of the cluster to determine where data segments of an erasure-coded file are located within the cluster. In various implementations, the method includes generating a mapping of the data segments across the storage entities. The mapping indicates a sequence for the data segments within the erasure-coded file. In various implementations, the method includes scheduling read requests for the data segments based on the sequence. The scheduling satisfies a storage utilization threshold.
US09935652B1 Data compression by hamming distance categorization
Data is compressed based on non-identical similarity between a first data set and a second data set. A representation of the differences is used to represent one of the data sets. For example, a probabilistically unique value may be generated as a new block label. Probabilistic comparison of the new block label with a plurality of training labels associated with training blocks produces a plurality of training labels that are potentially similar to the new block label. The Hamming distance between each potentially similar training label and the new block label is determined to select the training label with the smallest calculated Hamming distance from the new block label. A bitmap of differences between the new block and the training block associated with the selected training label is compressed and stored as a compressed representation of the new block.
US09935651B1 Data transmission method and apparatus
The present application discloses a data transmission method and apparatus. A specific implementation of the method includes: receiving to-be-transmitted data sent from an information sending end, and determining a sending coding type of the to-be-transmitted data; determining a receiving coding type of an information receiving end receiving the to-be-transmitted data; converting the to-be-transmitted data from the sending coding type to the receiving coding type using a preset transcoding model, to obtain transcoded transmission data, the transcoding model representing a corresponding relationship between the sending coding type and the receiving coding type; and sending the transcoded transmission data to the information receiving end. This implementation improves the data transmission efficiency.
US09935649B1 Low power quantizer with passive summers and interpolated dynamic comparators
A quantizer including passive summers, dynamic comparators and a clock generator. Each passive summer samples the input voltages and a reference voltage scaled by one of multiple graduated gains, and subtracts the scaled reference voltage from the sum of the input voltages. The graduated gains divide a predetermined voltage range into multiple voltage subranges, each between sequential pairs of the passive summers. The dynamic comparators compare each sequential pair of passive summer output voltages according to multiple splitting ratios and provide corresponding quantization bits. The dynamic comparators are activated in groups to reduce comparator kickback. Each dynamic comparator recharges the passive summer output voltages coupled to its inputs back to their initial voltage values to reduce kickback residual. The passive summers eliminate the need for a resistor string to generate the reference voltages. Staggered activation and comparator recharging replace preamplifiers used to suppress kickback and kickback residuals.
US09935648B1 Reducing reference charge consumption in analog-to-digital converters
To reduce the overall reference charge needed to perform operations, analog-to-digital converters can maintain reference voltage connections of the bit trial capacitors of the digital-to-analog converter (DAC) from the end of a current conversion to just prior to the beginning of the next acquisition phase. At the start of the next acquisition phase, the bottom plates of the bit trial capacitors of the DAC can be shorted to generate a common mode voltage. As the conversion phase begins, the bottom plates of the sampling capacitors are disconnected from the input voltage and the bottom plates of each bit trial capacitor are shorted to generate input common-mode voltage. As bit trials progress, the shorts between the bottom plates of the bit trial capacitors are removed and the bit trial results are applied to the bottom plates of the bit trial capacitors.
US09935646B2 Systems and methods for identifying a failure in an analog to digital converter
The present disclosure provides systems and methods for identifying failures in an analog to digital (A/D) converter. An intelligent electronic device (IED) may monitor a digital output of one or more A/D converters. The IED may determine a slope value limit associated with the A/D converter. The IED may determine an output slope value of the digital output based on a difference of a converter output value measured at a first time and a converter output value measured at a later time. If the determined output slope value exceeds the slope value limit, the IED may identify a failure of the A/D converter. An IED may determine that concurrent failures in multiple, parallel A/D converters are indicative of a problem upstream from the A/D converters.
US09935643B1 Adaptive charging systems and methods for a successive-approximation analog-to-digital converter
A successive-approximation register (SAR) analog-to-digital converter (ADC) includes a SAR circuit configured to generate a digital code based on an analog input signal. A digital-to-analog converter (DAC) is configured to convert the digital code to an analog voltage. The SAR circuit is further configured to generate a digital output signal based on a comparison between the analog input signal and the analog voltage. A first capacitor is configured to provide a reference voltage to the DAC. An adaptive charging module is configured to stabilize the reference voltage provided to the DAC by selectively connecting to a supply voltage during a first operating phase of the ADC to store a charge in the adaptive charging module and selectively connecting to the first capacitor during a second operating phase of the ADC to combine the charge stored in the adaptive charging module with a charge of the first capacitor.
US09935642B2 Quantum interference device, atomic oscillator, electronic apparatus, and moving object
An atomic oscillator includes an atom cell having an internal space in which alkali metal is encapsulated, a first light source section for making a resonance light pair, which is circularly polarized in the same direction as each other and resonates the alkali metal, enter the internal space using light from a first light source, a second light source for making adjustment light, which is circularly polarized in a rotational direction opposite to the direction of the resonance light pair and resonates the alkali metal, enter the internal space from the same side as the resonance light pair using light from a second light source, and an aperture member disposed between the internal space, and the first light source and the second light source.
US09935636B1 CMOS input buffer with low supply current and voltage down shifting
A method for implementing a CMOS input buffer that consumes very low current even when input levels are less than full swing. An additional optional stage enables conversion to very low voltage swing. The circuit can be manufactured with a standard CMOS processing technology and with high immunity to variation of process parameters. The circuit provides some hysteresis response, enhancing the input voltage margin.
US09935634B2 Communication between voltage domains
An integrated circuit including a first voltage domain incorporates real time clock circuitry that communicates via communication circuitry with processing circuitry contained within a second voltage domain. The communication circuitry includes first parallel-to-serial conversion circuitry located within the first voltage domain, level shifting circuitry for passing serial signals between the voltage domains and second parallel-to-serial circuitry located in the second voltage domain.
US09935628B2 FET—bipolar transistor combination, and a switch comprising such a FET—bipolar transistor combination
A transistor switch device is provided that exhibits relatively good voltage capability and relatively easy drive requirements to turn the device on and off. This can reduce transient drive current flows that may perturb other components.
US09935626B2 Driver for a power field-effect transistor, related system and integrated circuit
A driver for a power field-effect transistor includes a first and second circuits that apply respective charge currents to a gate of the power field-effect transistor when a control signal has a first logic value and the voltage between the gate and the source is smaller than a first threshold voltage and greater than a second threshold voltage. Third and fourth circuits apply respective discharge currents to the gate when the control signal has a second logic value and the voltage between the gate and the source is greater than a third threshold voltage and smaller than a fourth threshold voltage. The driver may include at least one field-effect transistor configured to generate at least one of the first, second, third or fourth threshold voltage.
US09935618B1 Schmitt trigger circuit with hysteresis determined by modified polysilicon gate dopants
A Schmitt trigger's hysteresis is established by standard and non-standard MOSFETs having different (lower/higher) threshold voltages. For example, a standard n-channel transistor having a relatively low threshold voltage (e.g., 1V) sets the lower trigger switching voltage, and a non-standard n-channel transistor (e.g., an n-channel source/drain and a polysilicon gate doped with a p-type dopant) exhibits a relatively high threshold voltage (e.g., 2V) that sets the higher trigger switching voltage. An output control circuit generates the Schmitt trigger's digital output signal based on the on/off states of the two (non-standard and standard) MOSFETs, whereby the changes digital output signal between two values when the analog input signal falls below the lower threshold voltage (i.e., when both MOSFETs are turned on/off) and rises above the higher threshold voltage (i.e., when both MOSFETs are turned off/on). Self-resetting and other circuits utilize the Schmitt trigger to facilitate, e.g., high dynamic range image sensor pixels.
US09935617B2 Semiconductor device
A semiconductor device that can operate normally with lower power consumption is provided. The semiconductor device includes a pair of first circuits which each include a first transistor and a second transistor capable of controlling the supply of a first signal to a gate of the first transistor, and a second circuit which is capable of generating a second signal which is to be supplied to a gate of the second transistor and which has a larger amplitude than the first signal. One of a source and a drain of one of the first transistors included in the pair of first circuits is electrically connected to one of a source and a drain of the other of the first transistors. The first signals supplied to the gates of the first transistors in the pair of first circuits have potentials with different logic levels.
US09935611B2 Elastic wave filter device
A SAW filter device defines a filter including a high acoustic velocity member, a low acoustic velocity film, a piezoelectric film, and an IDT electrode are stacked in this order. A comb capacitive electrode electrically coupled to the filter is provided on the piezoelectric film. Where λc is a wavelength determined by an electrode finger pitch of the comb capacitive electrode, and, among modes of an elastic wave generated by the comb capacitive electrode, VC−(P+SV) is an acoustic velocity of a P+SV wave, VC−SH is an acoustic velocity of a SH wave, and VC−HO is an acoustic velocity of, out of higher-order modes of a SH wave, a higher-order mode at the lowest frequency side, VC−(P+SV)fF−H, or VC−SH/λCfF−H.
US09935609B2 Piezoelectric component
A piezoelectric component which suppress ripples in the range of oscillation frequency and achieves stabilization of oscillation frequency is provided. A piezoelectric component of the invention includes a support substrate; a piezoelectric element having an elongated shape, comprising excitation electrodes disposed on one principal surface and the other principal surface thereof, respectively, the excitation electrodes facing each other; a first support portion and a second support portion which are disposed between both ends in a longitudinal direction of the piezoelectric element and the support substrate; and an electrically conductive joining material which joins the first support portion and the second support portion to the ends of the piezoelectric element, respectively. A center of the piezoelectric element is offset with respect to an intermediate point between the first support portion and the second support portion as seen in a plan view of the piezoelectric component.
US09935608B1 Nano- and microelectromechanical resonators
A resonator includes a piezoelectric plate and interdigitated electrode(s). The interdigitated electrode includes a plurality of conductive strips disposed over a top surface of the piezoelectric plate. A two-dimensional mode of mechanical vibration is excited in a cross sectional plane of the piezoelectric plate in response to an alternating voltage applied through the interdigitated electrode. The two-dimensional mode of mechanical vibration is a cross-sectional Lamé mode resonance (CLMR) or a degenerate cross-sectional Lamé mode resonance (dCLMR).
US09935602B2 Laminated LC filter
In a laminated LC filter, at least four LC parallel resonators are provided inside a multilayer body. At least a pair of loops of inductors in odd numbered-stage LC parallel resonators among the at least four LC parallel resonators are disposed at an angle at which magnetic coupling is obtained therebetween, and winding directions thereof are the same, so as to obtain magnetic coupling between the inductors. In addition, magnetic coupling may also be obtained between a pair of loops of inductors in even numbered-staged LC parallel resonators among the at least four LC parallel resonators.
US09935600B2 Switchable filters and design structures
Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam formed above the piezoelectric substrate and at a location in which, upon actuation, the MEMS beam shorts the piezoelectric filter structure by contacting at least one of the plurality of electrodes.
US09935598B2 Differential amplifier design as the preamp of DMM
An amplifying circuit comprises a differential input stage having a first input terminal, a second input terminal, and an intermediate node, wherein the differential input stage is configured to generate a differential current flowing through the intermediate node in response to an input voltage difference between the first and second input terminals. The amplifying circuit further comprises a first current source coupled to the intermediate node, which is configured to provide a first bias current which allows the differential current to vary within a predetermined range. The amplifying circuit further comprises an output terminal coupled to the intermediate node, and a second current source coupled to the intermediate node and configured to provide a second bias current. The second bias current compensates the differential current and the first bias current and produces an output current flowing through the output terminal in a predetermined direction. A measurement device is also described.
US09935596B2 Analog front-end circuit including instrumentation preamplifier and A/D converter
One embodiment provides an analog front-end circuit. When a chopping signal has a first logical value, a non-inverting instrumentation preamplifier subtracts a second input voltage from a first input voltage and generates a first output voltage by amplifying a subtraction voltage while outputting the second input voltage as a second output voltage. When the chopping signal has a second logical value, the non-inverting instrumentation preamplifier subtracts the first input voltage from the second input voltage and generates the first output voltage by amplifying and then inverting the polarity of a subtraction voltage while outputting the second input voltage as the second output voltage.
US09935592B1 Wide-band amplifiers using clipper circuits for reduced harmonics
The present invention breaks up the frequency bands which can be filtered by a simple low-loss band-pass or low pass filter. The second harmonic frequency is reduced by use of a non-linear clipper element which controls the driving waveform symmetry and can reduce the harmonics by as much as 5-15 db which makes the filter much simpler and allows the amplifier to remain wide-band. The output waveform from the amplifier is symmetrical or nearly symmetrical.
US09935591B2 Method and apparatus for current steering in high sensitivity, high linearity and large dynamic range high speed trans-impedance amplifiers
The present invention relates to a linear, high sensitivity, high speed trans-impedance amplifier (TIA) which allows a large dynamic range of input current up to very large values, maintains high linearity and keeps constant output voltage, maintains the same frequency response across the full gain control range, provides very high input sensitivity and large bandwidth, and allows input current monitoring without affecting input sensitivity. In other words, the novel circuit disclosed herein provides for the feedback path to maintain the same level of feedback even while the output signal is varied. This allows a wide and stable bandwidth, as well as a monitor to be placed in the TIA.
US09935588B2 Linearity performance for multi-mode power amplifiers
Circuits, devices and methods related to multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.
US09935585B2 RF amplifier operational in different power modes
Embodiments of a radio frequency (RF) amplification are disclosed. The RF amplification device includes a first RF amplification circuit, a second RF amplification circuit, and power control circuitry operable in a first power mode and a second power mode. The first RF amplification circuit has a cascode amplifier stage configured to amplify an RF signal. The cascode amplifier stage has an input transistor and a cascode output transistor that are stacked in cascode. The second RF amplification circuit is configured to amplify the RF signal. The power control circuitry is configured to bias the first cascode output transistor so that the first cascode output transistor operates in a saturation region in the first power mode and bias the first cascode output transistor so that the first cascode output transistor operates in a triode region in the second power mode. The second RF amplification circuit is assisted without introducing additional loading.
US09935584B1 Self-biased gyrator-based receiver for amplification and equalization of single-ended signals
A self-biased gyrator-based input receiver amplifies and equalizes single-ended signals. The input receiver implements inductive impedance useful for high-frequency peaking circuits using an active gyrator-C circuit comprising only resistive, capacitive, and transistor elements, which are easily and efficiently fabricated on a conventional integrated circuit. Transistors comprising the input receiver, along with resistive elements and capacitive elements may be implemented as digitally adjustable circuit elements, providing for adjustment of at least peak frequency, low-frequency gain, and termination impedance.
US09935576B1 Methods and controllers for operation of electric motors
A controller and methods for hybrid operation control of an electric motor in an electric motor system are provided. The controller is configured to receive a speed command for operating the electric motor, measure available voltage on an inverter configured to provide conditioned AC voltage to the electric motor, and determine a winding phase angle difference based on the received speed command and the measured available inverter voltage. The controller is also configured to adjust a phase angle difference between winding voltage commands for the switches of the inverter using the determined winding phase angle difference, and apply the winding voltage commands including the adjusted phase angle difference to the inverter switches to control the electric motor.
US09935575B2 Power conversion device and control method for same, and electric power steering control device
Provided are a power conversion device, relating to control of detecting a bus current in operation, and capable of acquiring an average current through a small amount of calculation and being implemented by an inexpensive microcomputer. A variation in a winding current flowing through a multi-phase winding of an AC rotating machine, namely, a phase current, is small at a timing at which voltage vectors on both sides of an axis having a larger inductance out of d and q axes of the AC rotating machine are output. Thus, switching signals are generated at timings at which the voltage vectors on both sides of the axis having the larger inductance out of the d and q axes are output, and the bus current is detected in accordance with the switching signals, thereby acquiring a value close to an average of the winding current.
US09935570B2 Use of an electronic device for operating a DC motor to control two peak and hold loads
Electronic device (1), capable of operating a DC motor, including an H bridge with an upper left-hand switch (R1), an upper right-hand switch (R2), a lower left-hand switch (R3) and a lower right-hand switch (R4), the second terminal (R1b) of the upper left-hand switch being connected to the second terminal (R3b) of the lower left-hand switch, and the second terminal (R2b) of the upper right-hand switch being connected to the second terminal of the lower right-hand switch, wherein the device is modified by cutting the link between the second terminal of the upper left-hand switch and the second terminal of the lower left-hand switch, and by cutting the link between the second terminal of the upper right-hand switch and the second terminal of the lower right-hand switch.
US09935565B2 Motor control circuit and method
In accordance with an embodiment, motor control circuit has a first selector connected to a second selector through an analog to digital converter. The first selector has an input that is connected to an external pin. In addition, the second selector has a plurality of inputs and a plurality of outputs, wherein a first register is connected to a first input and a second register is connected to a second output of the second selector. In accordance with another embodiment, at a beginning step of a method for setting a duty of a drive signal of a motor, a duty setting signal is applied to an external pin. The duty setting signal is converted into a digital duty setting signal. One of the digital duty setting signal or a predetermined duty signal is transmitted to a storage register.
US09935564B2 Propellant flow actuated piezoelectric igniter for combustion engines
A propellant flow actuated piezoelectric igniter device using one or more hammer balls retained by one or more magnets, or other retaining method, until sufficient fluid pressure is achieved in one or more charging chambers to release and accelerate the hammer ball, such that it impacts a piezoelectric crystal to produce an ignition spark. Certain preferred embodiments provide a means for repetitively capturing and releasing the hammer ball after it impacts one or more piezoelectric crystals, thereby oscillating and producing multiple, repetitive ignition sparks. Furthermore, an embodiment is presented for which oscillation of the hammer ball and repetitive impact to the piezoelectric crystal is maintained without the need for a magnet or other retaining mechanism to achieve this oscillating impact process.
US09935563B2 Electrical energy generation within a vehicle tire
An apparatus for installation within a tire for a vehicle includes a flexible arm and a power generating element coupled to the flexible arm for generating electrical energy. One end of the flexible arm is coupled to a rim of the tire. The opposing end of the flexible arm is configured to be in contact with the inside tread surface of the tire. The flexible arm is capable of deformation in response to a variability of distance between the rim and the inside tread surface during rolling movement of the tire, and the power generating element generates the electrical energy in response to deformation of the flexible arm. The apparatus may be combined with a tire pressure sensor module as a system so as to provide electrical energy for powering the tire pressure sensor module.
US09935557B2 Multi-output power supply
A multi-output power supply includes: a switching element that turns ON and OFF currents flowing through all primary coils of a plurality of transformers connected in parallel at a same time; a plurality of output circuits that rectify and smooth voltages induced in secondary coils of the plurality of transformers to produce a plurality of output voltages; a plurality of feedback voltage detection circuits that detect feedback voltages corresponding to the output voltages of the plurality of the output circuits; an averaging circuit that calculates an average feedback voltage from the feedback voltages detected by the feedback voltage detection circuits; and a control circuit that uses feedback control to turn the switching element ON and OFF according to the average feedback voltage calculated by the averaging circuit.
US09935555B2 Power supply apparatus and power supply method thereof
A power supply apparatus and a method for controlling the power supply apparatus are provided. The power supply apparatus drives an electronic apparatus which may operate in a first mode or a second mode. The power supply includes an input voltage generator that generates an input voltage; an output voltage generator that generates a first output voltage by using the input voltage, and supplies the output voltage to the electronic apparatus; and a detector that determines the mode of the electronic apparatus by detecting a load of the electronic apparatus, and outputs a control signal to the output voltage generator in response to the mode of the electronic apparatus changing from the first mode to the second mode. In response to receiving the control signal, the output voltage generator generates a second output voltage that corresponds to the second mode.
US09935553B2 Control scheme for hysteretic buck controller with inductor coil current estimation
A circuit and method for power converter for improved current monitoring, comprising a buck converter comprising a high side switch, a current sensing circuits parallel to the buck converter configured to sense a current through a low side switch, and a positive slope inductor coil estimator sensing circuit parallel to a buck converter configured to estimate a current magnitude.
US09935544B2 Method for power transfer between DC circuits
A method for transferring power between two DC circuits, each circuit being bipolar or connected at the midpoint thereof, involves: coupling the high voltage bus across a pair of inductors, arranged in parallel; coupling the low voltage bus across the pair of inductors; coupling the high voltage bus, the low voltage bus and the inductors by active switches and diodes, to provide for: (i) a storage configuration, wherein energy is transferred from one of the buses and stored in the inductors; and (ii) a release configuration, wherein energy is released from the inductors and transferred to the other of the buses.
US09935543B2 Digital control power circuit, control circuit thereof, control method, and electronic device using the same
A control circuit of a digital control power circuit is provided. The control circuit includes a feedback controller configured to generate a digital duty command value such that a digital feedback value corresponding to an output voltage of the digital control power circuit is close to a target value thereof, a pulse generator configured to generate a pulse signal having a duty ratio corresponding to the digital duty command value, a non-linear controller configured to correct a pulse width of the pulse signal when a variation in the output voltage is detected, and a driver configured to drive a switching device of the digital control power circuit depending on the pulse signal.
US09935542B2 Methods and apparatuses for adaptive dynamic voltage control for optimizing energy per operation per a given target speed
A method for implementing a Semiconductor Integrated Circuit device using Near/Sub-threshold technology with SOFTWARE programmable Adaptive Dynamic Voltage Control (ADVC) algorithm using different sensors inside the chip in order to improve the target speed and reduce the energy per operation of the final product. This method achieves the best power per performance for a given solution operating at a required speed.
US09935541B1 Floating charge pump voltage converter
A voltage converter includes at least one charge pump voltage converter circuit. The voltage converter generates three voltages (e.g., 1.2 volts, 2.5 volts, and 1.8 volts) for an electronic system, which can be a smartphone or electronic tablet or other device. The charge pump voltage converter circuit provides an output voltage that is an average of its input voltages. Compared to a low dropout regulator, charge pump voltage converter circuit has high efficiency. This voltage converter will save power compared to converters using a low dropout regulator. An implementation of the voltage converter can includes at least two charge pump voltage converter circuits to generate to different output voltages.
US09935536B2 Compact direct-drive actuator generating a constant force
The present disclosure relates to an electromagnetic actuator of the type producing a force due to the current that remains substantially constant over the entirety of its useful travel Y and that has a low force in the absence of current, including at least one stator structure, at least one electrical supply coil, and a moving member, the stator structure having, on the one hand, a central pole running perpendicular to the direction of the travel Y and having a width YC1 in the direction of the travel and terminating at its end in a width YC2 that is greater than or equal to the travel Y of the moving member, YC2 being greater than YC1, and, on the other hand, two lateral poles having widths YL1 in the direction of the travel and terminating at their end in a width YL2 greater than YL1.
US09935533B2 Squirrel-cage motor rotor and squirrel-cage motor
This squirrel-cage motor rotor includes a plurality of conductor bars provided at regular intervals along the circumferential direction of a rotor core, short-circuit rings connected to ends of the conductor bars, and reinforcement covers having axial-direction surfaces being in contact with axial-direction-end surfaces of the short-circuit rings. The reinforcement covers are enclosed by casting in the short-circuit rings. Holding rings are attached to the outer circumferential surfaces of the flange portions of the reinforcement covers and the outer circumferential surfaces of the short-circuit rings by interference fit.
US09935526B2 Electric rotating machine
A power module composite includes a power module (34) in which switching devices (32) included in an electric-power conversion circuit are molded, a driver module (37) that includes a control circuit (35) for controlling the switching devices (32) and is molded, a housing (39) containing the power module (34) and the driver module (37), and a heat sink (38) that is fixed to the housing (39) and refrigerates the switching devices (32); the power module 34 and the driver module 37 are mounted in that order on the heat sink (38) in such a way as to be superimposed on each other.
US09935517B2 Electric motor for power steering apparatus of vehicle
A first end contact portion of a first frame end contacts one end surface of a stator core. A second end contact portion of a second frame end contacts the other end surface of the stator core and includes an inner tubular part, which contacts the other end surface of the stator core, and a fixing part, which projects radially outward from the inner tubular part and contacts the other end surface. A through-bolt is threaded into the fixing part. An outer diameter of the one end surface is smaller than an outer diameter of an opposing surface of the first end contact portion. An outer diameter of an opposing surface of the inner tubular part is smaller than an outer diameter of the other end surface. A yoke of the stator core includes a relief groove, into which a portion of the through-bolt is fitted.
US09935514B1 Printed circuit board layout
A printed circuit board (PCB) includes a first plurality of conductive paths having first ends at an inner radius of the PCB and second ends at an outer radius of the PCB. The PCB further includes a second plurality of conductive paths having first ends at an outer radius of the PCB and second ends at an inner radius of the PCB. The PCB further includes a first plurality of conductive vias that pass through the PCB at the outer radius of the PCB and couple second ends of the first plurality of conductive paths to first ends of the second plurality of conductive paths. The PCB further includes a second plurality of conductive vias that pass through the PCB at the inner radius of the PCB and electrically couple second ends of the second plurality of conductive paths to first ends of the first plurality of conductive paths.
US09935511B2 Component for an electric machine
A component designed to form a rotor for an electric machine includes a shaft, and an active part which is disposed in concentric circumferentially surrounding relation to the shaft. The active part has a radially inwardly open slot. A leg is connected to the shaft and has a tip which points radially outward from the shaft and is received in the slot of the active part. Further received in the slot of the active part is a first end of a connecting element. A fastening element secures the connecting element in a region of a second end to the leg to thereby establish a form-fit connection of the leg and the connecting element to the active part.
US09935507B2 Device comprising an electric machine with a lightweight design
A device comprising a base body is provided. A stator pack of an electric machine is connected to the base body by means of a connecting structure. The electric machine includes a rotor which cooperates electromagnetically with the stator pack and is rotatably mounted relative to the stator pack such that the rotor can rotate about the rotational axis. The stator pack is fixed by means of the connecting structure relative to the base body. The stator pack includes a plurality of stator sheets which are stacked on top of each other when seen in the direction of the rotational axis. Electromagnetically inactive first intermediate layers are arranged at least between certain stator sheets. The first intermediate layers are components of the connecting structure. Torque exerted upon the rotor by means of the stator pack is transferred in the connecting structure by means of the layers.
US09935503B2 Radiative transfer and power control with fractal metamaterial and plasmonics
Systems according to the present disclosure provide one or more surfaces that function as heat or power radiating surfaces for which at least a portion of the radiating surface includes or is composed of “fractal cells” placed sufficiently closed close together to one another so that a surface (plasmonic) wave causes near replication of current present in one fractal cell in an adjacent fractal cell. A fractal of such a fractal cell can be of any suitable fractal shape and may have two or more iterations. The fractal cells may lie on a flat or curved sheet or layer and be composed in layers for wide bandwidth or multibandwidth transmission. The area of a surface and its number of fractals determines the gain relative to a single fractal cell. The boundary edges of the surface may be terminated resistively so as to not degrade the cell performance at the edges.
US09935502B2 Detection and protection of devices within a wireless power system
Exemplary embodiments are directed to detecting and limiting power transfer to non-compliant devices. A method may include detecting one or more non-compliant devices positioned within a charging region of a wireless power transmitter. The method may further include limiting an amount of power delivered to at least one of the one or more non-compliant devices.
US09935499B2 Power transmitting apparatus
A power transmitting apparatus (1) is provided with: a power feeder (13, 14, 15); a power receiver (23) disposed with a space from the power feeder; a power storing device (26) electrically connected to the power feeder and configured to supply power to a load (27); a distance changing device (16) configured to change a distance between the power feeder and the power receiver; a detecting device (25) configured to detect a power storage state associated with the power storing device; and a controlling device (11) configured to control the power feeder to change output power according to the detected power storage state, and configured to control the distance changing device to change the distance.
US09935497B2 Arrangement and method for providing a vehicle with electric energy by magnetic induction
An arrangement for providing a vehicle with electric energy includes a receiving device adapted to receive the magnetic component of an alternating electromagnetic field and to produce an alternating electric current by magnetic induction. The receiving device includes at least one phase line, each phase line being adapted to carry a phase of the alternating electric current. The at least one phase line forms a line arrangement which extends in a longitudinal direction transversely to a flux line direction, in which magnetic flux lines of the electromagnetic field penetrate the line arrangement, so that the line arrangement has a first end and a second end, the ends being located at opposite ends of the line arrangement in the longitudinal direction. The width of the line arrangement, gradually decreases along the extension of the line arrangement towards the first end and/or towards the second end.
US09935496B2 Wireless power transmission system and method for increasing coupling efficiency by adjusting resonant frequency
A wireless power transmission system and a method for increasing a coupling efficiency by adjusting a resonant frequency are provided. A device of the wireless power transmission system includes a resonator configured to transmit a wireless power, and a communication unit configured to receive information from another device. The device further includes a controller configured to determine a power transmission efficiency based on the information, and adjust a resonant frequency of the device, a resonant frequency of a relay device, and a resonant frequency of the other device, if the power transmission efficiency is less than or equal to a predetermined reference efficiency.
US09935494B2 Elevator power supply for inverter controller
A power architecture includes a panel receiving power from a power grid through a breaker, a power supply coupled to the breaker to receive power from the grid, a battery coupled to the power supply through a switch, an elevator motor controller coupled to the power supply, the power supply providing power from at least one of the grid and the battery to the controller, and a charger coupled to the breaker and the battery and configured to receive power from the power grid and provide power to the battery to charge the battery.
US09935492B2 Power control system and method for adjusting an input power limit of a DC-DC voltage converter
A power control system for adjusting an input power limit of a DC-DC voltage converter is provided. The system includes a microprocessor that determines an amount of output power being output by a battery pack, an amount of available power in the battery pack, and an amount of input power being input to the DC-DC voltage converter. The microprocessor determines an amount of power being provided to the DC-AC inverter based on the amount of output power being output by the battery pack and the amount of input power being input to the DC-DC voltage converter. The microprocessor decreases the input power limit of the DC-DC voltage converter if a sum of the amount of power being provided to the DC-AC inverter and the amount of input power being input to the DC-DC voltage converter is greater than the amount of available power in the battery pack.
US09935481B2 Mobile terminal including wireless charging module and battery pack
A mobile terminal is provided, which includes a wireless charging module, a battery pack, and a circuit board substrate. The wireless charging module includes a charging coil formed of a wound conducting wire and a communication coil placed adjacent to the charging coil. The wireless charging module has a substantially planar shape. The battery pack has a substantially planar shape and is configured to store power from the wireless charging module. The circuit board substrate is configured to control operation of the mobile terminal. The wireless charging module overlaps with each of the circuit board substrate and the battery pack.
US09935477B2 Charge/discharge control method and charge/discharge control apparatus for lithium ion battery
In a charge/discharge control method of a lithium ion battery having a negative electrode active material and connected to a charge/discharge control device, battery information regarding a charge/discharge state of the lithium ion battery is acquired by the charge/discharge control device, a degradation state of the lithium ion battery is determined on the basis of the battery information, by the charge/discharge control device, and a voltage range for charge/discharge of the lithium ion battery is changed on the basis of a determination result of the degradation state, by the charge/discharge control device.
US09935476B2 Charging mode switching circuit and method
A circuit and method for switching a charging mode are provided. The circuit for switching a charging mode, is coupled to a cell and externally coupled to a quick-charging adapter, and includes: a switch circuit, configured to connect the charging terminal and the cell terminal if a connection instruction is received from the first controlled terminal, such that the quick-charging adapter charges the cell via the switch circuit; a switching assembly, configured to receive a switching instruction from the controlled terminal; a first controller, configured to: receive a charging instruction, receive a quick-charging instruction at the first data terminal via the data interface terminal, and send the connection instruction from the third controlling terminal if the charging instruction and the quick-charging instruction are received; and a second controller, configured to send the charging instruction to the first controller if an insertion of the quick-charging adapter is detected.
US09935474B2 Mobile device battery charging
A method and apparatus for implementing a charging process is provided. The method includes determining that a charging surface of a mobile device is currently located on a charging surface of a structure including a charging apparatus. The charging surface of the mobile device includes charge receiving contacts electrically connected to a battery and a processor. The charging surface of the structure includes charging contacts electrically connected to a charging circuit and in communication with a controller. The processor determines that at least two contacts of the charge receiving contacts are in electro/mechanical contact with at least two contacts of the charging contacts and in response, a negotiation process with the controller with respect to selecting at least one associated charging voltage and polarity for charging the battery is executed resulting in a charging process between the charging circuit and the battery being enabled.
US09935473B2 Storage battery system
A storage battery system connected to a power system and operative based on a charge/discharge request from an EMS includes: a battery management unit configured to monitor a state of the storage battery; a power conditioning system; a control device configured to receive the charge/discharge request and storage battery information supplied from the battery management unit and to control the power conditioning system based thereon; an on-site monitoring and operating device directly connected to the control device, the on-site monitoring and operating device including a display unit configured to display the storage battery information and an operation unit configured to enable an on-site charge/discharge request to the AC-DC converter to be input. The control device includes an on-site request adjustment unit configured to receive the on-site charge/discharge request and the storage battery information and to determine a charge/discharge command to the power conditioning system based thereon.
US09935470B2 System and method for wireless power transfer using a power converter with a bypass mode
A system and method of wireless power transfer using a power converter with a bypass mode includes a power converter. The power converter includes a pulsed switch, a capacitor configured to supply a drive voltage to the pulsed switch, a first circuit configured to charge the capacitor when the power converter operates in a switched mode of operation, and, a second circuit configured to charge the capacitor when the power converter operates in a bypass mode of operation.
US09935468B2 Power receiving apparatus and power receiving method
A power receiving apparatus (105) is provided with: a power reception unit (106) disposed at a distance from and opposed to a power transmission unit (104) of the power transmitting apparatus (101); a direct current (DC) voltage changing device (108) which constitutes one portion of a power receiving circuit configured to electrically connect the power reception unit and an electrical load (109) and which can change DC voltage supplied to the electrical load; and a controlling device (112) configured to control the DC voltage changing device to change the DC voltage to bring a current phase difference between current of the power transmission unit and current of the power reception unit close to 180 degrees when the electric power is transmitted and received between the power transmission unit and the power reception unit, the current phase difference corresponding to overall resonant frequency.
US09935467B2 Power supply system, electronic device, and electricity distribution method of electronic device
A power supply system, an electronic device and an electricity distribution method, which can enhance, with maximum efficiency, power distribution of the electronic device. The power supply system includes a power source unit, an electricity distribution unit connected to the power source unit, a system load power supply unit connected to the electricity distribution unit, and a peripheral power supply unit connected to the electricity distribution unit. The electricity distribution unit includes a power consumption prediction module configured to detect system load power consumption and calculate a variation trend of the system load power consumption and a power consumption control module configured to adjust power supply capacities of the system load power supply unit and the peripheral power supply unit according to the variation trend of the system load power consumption.
US09935463B2 Redundant point of common coupling (PCC) to reduce risk of microgrid's islanding
A microgrid connecting at least one distributed electricity generator includes a first switch configured for, in a closed position, connecting the microgrid to a first network line at a first point of common coupling (PCC) and for, in an open position, disconnecting the microgrid from the first network line at the first PCC; a second switch configured for, in a closed position, connecting the microgrid to a second network line at a second PCC, and for, in an open position, disconnecting the microgrid from the second network line at the second PCC; and a control unit configured for, when an islanding event has been detected when the second switch is in its closed position and the first switch is in its open position, acting to close the first switch, bringing it to its closed position.
US09935459B2 Power network system, and power adjustment apparatus and method
A central control device is connected to a first power router including some power transmitting ends and a second power router including some power receiving ends, acquires, for each of the power receiving ends, received power information including identification information of each of the power transmitting ends and a value of supply power supplied from each of the power transmitting ends, and power supply priority information defining a priority for determining a power transmitting end for which an adjustment of the supply power to be supplied to each of the power receiving ends should be prioritized, determines a power transmitting end for which the supply power is adjusted from among the power transmitting ends based on the received power information and the priority defined in the power supply priority information, and adjusts the supply power in the determined power transmitting end.
US09935456B2 Wireless power transmission device
A wireless power transmission device includes: a wireless power transmission unit, a power transmission circuit, a wireless communication unit, an interruption circuit, a communication circuit, and a control circuit. The power transmission circuit is connected to the wireless power transmission unit and wirelessly transmits power through the wireless power transmission unit to another party's device. The interruption circuit is connected to the wireless communication unit. The communication circuit is connected through the interruption circuit to the wireless communication unit and communicates with the other party's device via the wireless communication unit. The control circuit is connected to the power transmission circuit and the interruption circuit and, when the power is transmitted, controls the interruption circuit to interrupt between the wireless communication unit and the communication circuit on the basis of a power level transmitted by the power transmission circuit.
US09935455B2 Monitoring and recoverable protection of thermostat switching circuitry
A method of automated sensing of an electrical anomaly associated with a thermostat may include switching a switching circuit within the thermostat to an on state. The switching circuit may be configured to activate an HVAC function when switched to the on state. The method may also include monitoring one or more electrical properties associated with the switching circuit. The method may additionally include determining if an electrical anomaly is associated with the switching circuit based at least in part on the monitored one or more electrical properties. The method may further include switching the switching circuit to an off state if an electrical anomaly is detected.
US09935451B2 Protection monitoring circuit, battery pack, secondary battery monitoring circuit, and protection circuit
A protection monitoring circuit includes a protection circuit which detects overcharge, overdischarge, and overcurrent of a secondary battery, and a secondary battery monitoring circuit which monitors a state of the secondary battery and detects a residual quantity of the secondary battery. The protection circuit includes a first communication terminal that is connected to the secondary battery monitoring circuit, a second communication terminal that is connected to a mobile device, and a level shift circuit that is connected to the first and second communication terminals. The level shift circuit performs a level shift of a signal input of the first communication terminal so as to become a second level and outputs the signal to the second communication terminal, and also performs the level shift of a signal input of the second communication terminal so as to become a first level and outputs the signal to the first communication terminal.
US09935444B1 Electrical panel structures
Electrical panel structures for a modular building system, such as a modular data center. The electrical panel structures provide a standardized structure for attachment of high voltage power, low voltage power, and/or data lines between rooms or components of the modular building system. The panel structures can include multiple conduits that extend between rooms or other components of a modular building structure. The panel structures can include, for example, conduits having couplers for the attachment of high voltage cables and/or pass-throughs for the passage of low voltage lines and/or data lines.
US09935443B2 Cable gland
A cable gland having a first cable gland portion and a second cable gland portion in engagement with each other is disclosed. The cable gland comprises earthing members (60) in electrical engagement with the first and second gland portions, each earthing member including a spike (68) for penetrating through a sheath layer of an electrical cable, following radially inward movement of the spike, thereby forming an electrical earth connection with a conducting portion of a cable. The first gland portion comprises a first cam surface and the second gland portion comprises a second cam surface, wherein the first and second cam surfaces are adapted to engage respective earthing member cam surfaces (72, 74) of the earthing member, the first and second cam surfaces thereby causing the earthing member and the corresponding spike to move radially inwards as the first and second gland portions are brought into threaded engagement with each other.
US09935440B1 Powered wall mount for a portable electronic device
A powered wall mount includes a cover plate and a mount head in electrical communication with one another. The cover plate is configured to cover an electrical outlet in a wall without blocking any sockets. The cover plate includes a pair of resilient contacts that resiliently contact respective terminals of a pair of terminals of the electrical outlet upon mating of the cover plate with the electrical outlet. The mount head, which may be attached to the wall near the electrical outlet, includes a device mounting surface, at least one connector configured to hold a portable electronic device at the device mounting surface, and a power transfer mechanism configured to transfer power to the device when held at the device mounting surface. The connector(s) may be magnetic. Conveniently, the device may be attached to the mount head, used indefinitely while drawing power as needed, and then detached.
US09935439B2 Mounting bracket for electrical or communication device
A stud mounting bracket for a junction box includes a mounting extension extending outward from a longitudinal end margin of a main body. The mounting extension includes a mounting body connected to the longitudinal end margin of the main body and an extension tab connected to the mounting body. The extension tab is pivotable relative to the mounting body about an axis from a compact configuration to an extended configuration to increase the length of the mounting extension. A box mounting bracket for mounting a junction box on a stud mounting bracket includes first and second jaws. The first and second jaws engage the stud mounting bracket for use in attaching the box mounting bracket to the stud mounting bracket. The first and second jaws are resiliently deflectable both relative to the base and independent of one another when attaching the box mounting bracket to the stud mounting bracket.
US09935436B1 Configurable electrical outlet cover enclosure
An electrical outlet cover with a lid having a configurable protrusion or recess to accommodate different uses and weather resistance states. The electrical outlet cover includes a base coupled to an electrical outlet and a lid hingedly coupled to the base along a first side. The lid includes a frame with a central aperture and a telescoping enclosure with a flange at a front edge of a sleeve, the flange extending outward from the sleeve. The sleeve may include a ledge extending outward from the sleeve adjacent a back edge of the sleeve on at least two sides of the sleeve. The sleeve is slidably coupled within the central aperture and movable between an expanded position and a collapsed position. The flange may abut the frame in the collapsed position and the ledge may abut the frame in the expanded position.
US09935431B2 Power supply identification apparatus and power supply identification method
Provided is a power supply identification apparatus including circuitry including a first input terminal, a second input terminal and an output terminal which outputs a driving voltage to an electric device, and a power supply identification section which (i) determines from which of a first power supply and the second power supply a power is being input based on a relationship between an input timing of a first voltage to the first input terminal and a second voltage to the second input terminal, and (ii) switches the driving voltage output from the output terminal according to the power supply the power is being input from to control an initial ON/OFF state of the electric device.
US09935430B2 Spark plug
A spark plug having a of center electrode, a ground electrode, and a noble metal tip that is laser-welded to at least one of the center electrode and the ground electrode The noble metal tip is joined to the electrode through a fused portion formed by laser welding, and the fused portion includes a first fused portion and a second fused portion.
US09935428B2 Semiconductor light-emitting element and method for manufacturing the same
A semiconductor light-emitting element has a distributed Bragg reflector that is grown by depositing an InAlN layer and a GaN layer a plurality of times in that order on a semipolar plane of a semiconductor substrate, and a semiconductor structure layer that is formed on the distributed Bragg reflector and includes an active layer. The InAlN layer has a plurality of projections on an interface with the GaN layer, and the InAlN layer has a low In region which is formed at the top of each of the plurality of projections and which is lower in In composition than the remaining region.
US09935427B2 Vertical cavity light-emitting element and method for manufacturing the same
A vertical cavity light-emitting element includes: a first-conductivity-type semiconductor layer; an active layer; a second-conductivity-type semiconductor layer that are formed in this order on a first reflector; an insulating current confinement layer formed on the second-conductivity-type semiconductor layer; a through opening formed in the current confinement layer; a transparent electrode covering the through opening and the current confinement layer and being in contact with the second-conductivity-type semiconductor layer via the through opening; and a second reflector formed on the transparent electrode. At least one of a portion of the transparent electrode corresponding to the opening and a portion of the second-conductivity-type semiconductor layer corresponding to the opening that are in contact with each other in the through opening includes a first resistive region disposed along an inner circumference of the through opening and a second resistive region disposed on a center region of the through opening.
US09935425B2 Fiber coupled laser source pump with wavelength division multiplexer
A pump laser package may include an input fiber to send signal light on a first optical path. A first lens may be arranged on the first optical path. The pump laser package may include a source to send pump light on a second optical path. A second lens and a negative lens may be arranged on the second optical path. The first lens and the negative lens may be arranged to create a virtual image associated with the pump light. The pump laser package may include an output fiber on a third optical path. The first lens may be arranged on the third optical path. The pump laser package may include a combiner to receive the signal light on the first optical path, receive the pump light on the second optical path, and send the signal light and the pump light on the third optical path.
US09935419B2 Optical fiber device
In an optical fiber device having a configuration in which an optical fiber is joined to a side surface of another optical fiber, a joint portion is suppressed from reaching a high temperature. The optical fiber device includes a first fluoride fiber, a second fluoride fiber, and a heat dissipation member. The first fluoride fiber guides light. The second fluoride fiber has a first end on or from which light is incident or output and a second end at which an end surface of the second fluoride fiber is obliquely joined to a side surface of the first fluoride fiber.
US09935414B2 Commutator of an electric motor
A commutator has a conductive layer, a segment layer and an insulating layer separating the conductive layer and the segment layer. The segment layer includes multiple commutator segments. A mounting hole is defined along an axis of the commutator passing through the conductive layer. The three-layer structure of the commutator forms a capacitor having an increased confronting area and reduced inter-plate distance. The capacitor thus has a greater capacitance and hence greater EMI absorbing capability, making it possible to reduce EMI emissions without additional EMI reduction components outside the commutator. A rotor and a motor employing the commutator are also disclosed.
US09935413B1 Hinge pin with electrical connection through a cylindrical pin body
A hinge pin includes a pin body, a first electrical connector located at a first end of the pin body, a second electrical connector located at a second end of the pin body, and electrical conductors that electrically connect the first electrical connector and the second electrical connector. The hinge pin may be incorporated in a hinge to connect a first hinge part and a second hinge part for rotation. The hinge may be incorporated in an apparatus in which first and second wire harnesses are connected to the first and second electrical connectors of the hinge pin by third and fourth electrical connectors.
US09935408B1 Electronic connector for charging or data transfer
An electronic connector includes a first connecting unit. The first connecting unit includes a housing having a ring hole disposed through the housing large enough for a finger to be inserted through the ring hole to grab the first connecting unit, a first electrical connector shaped for forming a first detachable electrical connection, the first electrical connector disposed at a first distal end of the first connecting unit, and an illuminator disposed within the housing proximate to the ring hole to illuminate an inside perimeter of the ring hole.
US09935398B2 Connector
A connector has a housing and an internal structural body. The housing has a receiving portion while the internal structural body has contacts. The housing has a second upper inner wall surface and a second lower inner wall surface which define a rear portion of the receiving portion. Each of the second upper inner wall surface and the second lower inner wall surface is formed with contact accommodation portions which individually accommodate the contacts. The contact accommodation portions are grooves extending in a mating direction and opening to a front portion of the receiving portion at least in part. Each of the contacts has a spring portion which is resiliently deformable and a contact point supported by the spring portion. The contact point is situated inside the rear portion when the connector is separated from the mating connector.
US09935394B2 Electrical connector
An electrical connection component for a machine cable is described. The electrical connection component is suitable for transmission of power with voltage levels greater than or equal to 1 kV and comprises at least one electrical conductor arranged for electrically coupling with a further electrical conductor of another electrical connection component. The electrical connection component comprises a housing having an internal region, and having a machine cable end, a connection end and a plurality of electrically insulating components positioned within the housing, at least one of the electrically insulating components being arranged so as to form-fit with a further one of the electrically insulating components. A portion of the internal region of the housing that is located at the connection end of the housing, and that would not otherwise be filled with the at least one electrical conductor and/or an associated flame path, is filled by the electrically insulating components.
US09935393B2 Waterproof connector
A waterproof connector including one or more contacts each having a contact-side waterproof shaped section formed around a surface of a contact-side fixed section, a shell having a fitted section with a pair of flat shell outer surfaces and a shell-side waterproof shaped section formed around a surface of a shell-side fixed section, a housing holding the one or more contacts and the shell, and a seamless waterproof member disposed around a periphery of the housing, the shell-side fixed section being positioned closer to a fitting axis between the waterproof connector and a counter connector than the shell outer surfaces of the fitted section is when viewed in a direction of the fitting axis, the shell-side waterproof shaped section, the contact-side waterproof shaped section and the waterproof member being disposed to overlap each other at a position in the direction of the fitting axis.
US09935391B2 Wire adapter assembly
A wire adapter assembly, comprising: a plug, comprising a first housing and a first male connector installed on a first end of the first housing, a second end of the first housing being equipped with a wire in electrical connection with the first male connector; an adapter, comprising a second housing and a first female connector installed at a first end of the second housing, the first female connector being adaptive to the first male connector, a second end of the second housing being equipped with a second male connector in electrical connection with the first female connector, and the first male connector being different from the second male connector; and a flexible connector, the flexible connector being of a flat strip or arc hinge structure, and connected with the first end of the first housing and the first end of the second housing respectively.
US09935388B2 Contact-support mechanism for increased retention force
Circuits, methods, and apparatus that may provide audio jacks capable of providing a sufficient retention force to avoid some inadvertent extractions of an audio plug. Examples may also provide audio jacks that may be readily assembled. Other examples may provide other types of connectors. These audio jacks or other connectors may provide contact structures having one or more contacts, each having a contact support to increase contact retention force. Different materials may be used to form the contacts and the contact supports. In this way, contacts may be formed using a highly conductive material, while the contact supports may be formed of a material having good spring characteristics. While such a contact may not be able to provide an adequate retention force on its own, the use of a contact support may sufficiently increase the retention force to prevent accidental extractions of an audio plug or other connector.
US09935385B2 Receptacle connector with contact assembly
A receptacle connector includes a contact assembly having a dielectric carrier holding contacts, which may be overmolded by the dielectric carrier. The receptacle connector includes a housing holding the contact assembly having a mating end mated with a plug connector and a mounting end mounted to the circuit board. The housing has first and second side walls and first and second end walls. The housing has a card slot open at the top for receiving the plug connector and a contact assembly cavity open at the bottom for receiving the contact assembly. The housing may have positioning ribs extending from the first and second side walls to position the contact assembly within the cavity and/or strengthening ribs extending across the cavity to connect the side walls at a location remote from the end walls.
US09935381B2 Connector, wireless communication module, wireless communication device, and electronic apparatus
A connector includes a plug and a receptacle which are fitted to each other and is used to connect a wireless communication module to an electronic apparatus. The plug includes a plurality of contacts. When the plug is connected to the receptacle in any of the first and second directions which are symmetric with respect to the center of a junction surface with the receptacle, the plurality of contacts are connected to contacts of the receptacle.
US09935380B2 Antenna device
The antenna device includes a first antenna module and a second antenna module. The first antenna module includes a number of first antennas disposed at intervals. The second antenna module includes a number of second antennas disposed at intervals within a space surrounded by the first antennas. The first and second antennas are of different polarization directions. In one embodiment, the first antennas are horizontally polarized antennas having omnidirectional field patterns. The second antennas are inverted F antennas. By arranging the first and second antennas along an outer ring and an inner ring respectively, the distance between the first and second antenna modules are maximized. Furthermore, by having the first and second antennas with orthogonal polarization directions, the mutual interference between the radiation energy of the first and second antenna modules is effectively reduced.
US09935374B2 Multi-band antenna
A multi-band antenna includes a circuit board having an insulation dielectric layer, a first ground plane and an impedance matching circuit formed on a first plane of the circuit board, and a second ground plane formed on a second plane of the circuit board. A slot antenna radiation main body, formed at a location of the second ground plane and corresponding to the exposed part of the insulation dielectric layer, includes first and second radiation main bodies. The first radiation main body includes a first impedance matching part and a first resonance part. The second radiation main body includes a second impedance matching part and a second resonance part. The first resonance part includes a plurality of first bends, a first segment, and a second segment. The second resonance part includes a plurality of second bends, a third segment, and a fourth segment.
US09935373B2 Self-grounded antenna arrangement
A self-grounded antenna arrangement includes a base or central portion in a first plane and a number of arm sections associated with the central portion that taper toward a respective end tip. Each arm section is adapted to form a transition from the central portion and being bent backward toward the central portion by more than 180 degrees so that its end tip approaches a first side of the central portion, at an opening in the central portion. The end tip is connected to a feeder configured to feed, via an arm-section-specific port, one specific port for each arm section. Each arm section has a mixed functionality of a curved monopole antenna and a loop antenna, and the antenna arrangement provides substantially uncoupled ports with far-field functions that are almost orthogonal in polarization, direction, or shape. The arrangement finds use in multiple-input multiple-output antenna systems for statistical multipath environments.
US09935371B2 Antennas
An example method of designing a multi-band antenna includes specifying a first portion of the multi-band antenna in a tangible medium, where the first portion corresponds to an existing design of a single-band monopole antenna for operating in a first frequency band, and specifying in the tangible medium a second portion of the multi-band antenna that is added to the first portion, where the second portion includes a dipole parasitic resonator that is resonant in a second frequency band.
US09935370B2 Multiband radio frequency (RF) energy harvesting with scalable antenna
A radio frequency (RF) energy harvesting device including a scalable metamaterial resonator antenna and a rectifying circuit formed on a flexible plastic substrate. The metamaterial resonator antenna includes a metal (e.g., silver) structure that is conformally fixedly disposed (i.e., either printed or deposited/etched) on the flexible substrate and configured to resonate at RF frequencies using primary and secondary antenna segments connected by linking segments such that captured RF signals are generated at two antenna end points that are 180° out-of-phase with each other. The rectifying circuit including additional metal structures that are also printed or otherwise formed on the flexible substrate, and one or more circuit elements that are configured to pass positive voltage pulses from the captured RF signals to an output node. Various metamaterial resonator antenna configurations are disclosed.
US09935369B1 Method for transmitting and receiving radar signals while blocking reception of self-generated signals
A method and apparatus which enables a facility or entity that transmits and receives radar signals to receive any incoming radar signal, while blocking reception of any signals generated by the facility or entity itself. The method comprises transmitting a primary signal from an rf generator; providing a second signal which is synchronized with the primary signal matching in both phase and amplitude, but with a phase difference of 180 degrees so that the two signals sum to zero. The second signal travels through a voltage controlled attenuator and thru a voltage controlled phase shifter. Combining in a combiner the second signal with a signal radiated by a transmitting antenna and received by a receiving antenna that connects into a transmission enabling mechanism, and then transmitting the combined signal to a detector apparatus.
US09935367B2 System and method for a beamformer
In accordance with an embodiment a beamforming circuit having a radio frequency (RF) front end and a plurality of beamforming delay circuits coupled to the RF front end. Each of the plurality of beamforming delay circuits includes a common delay circuit and a plurality of individual delay circuits coupled to the common delay circuit. Each of the individual delay circuits are configured to be coupled to an antenna element of a beamforming array.
US09935362B2 Systems, apparatuses and methods for biometric sensing using conformal flexible antenna
This invention provides conformal antenna structures, how to make and use the antenna structures, and systems in which the antenna structures may be used for biometric sensing of humans and other animals. The antenna structures of the invention includes at least one relatively flexible section connecting relatively rigid sections. The relatively flexible section connecting relatively rigid sections may flex so that the relatively rigid sections connected to the relatively flexible section can change orientation relative to one another. This allows the relatively rigid sections to be conformed to a region of a surface of a human or animal that is not flat (that is curved).
US09935358B2 Interface and communication device
An antenna of a communication terminal is disposed on a side on which a bottom surface of a reflective plate, which is included in a display, is present. When the reflective plate is irradiated by an LED light source, the antenna cannot be seen from the side on which a display screen of the display is disposed. Accordingly, an antenna coil of the antenna does not need transparent electrodes and can be made of various materials each having a high conductivity. Therefore, the antenna has high sensitivity, low manufacturing cost, and very efficiently performs near field communication with an external device located on the display screen side of the display.
US09935354B2 Frequency tunable balun
Systems and method are provided for making a balun's operational bandwidth tunable around multiple distinct center frequencies by using switches to vary the balun's dimensions. An embodiment of the present disclosure uses a pass gate structure for the switches, and the switches connect additional lengths of line in or out of the balun to change its frequency response. A balun in accordance with an embodiment of the present disclosure is able to switch its response between 2 or more adjacent bands by switching additional length of lines in and out of the balun's core windings.
US09935352B2 Composite transmission line and electronic device
A composite transmission line includes a laminated insulator including insulator layers, signal transmission lines including first and second signal transmission lines and a power transmission line. The power transmission line includes a power transmission conductor pattern along the insulator layers, and an interlayer connection conductor that interlayer-connects power transmission conductor patterns. The first signal conductor pattern of the first signal transmission line, the second signal conductor pattern of the second signal transmission line, and the power transmission conductor pattern are parallel or substantially parallel to each other on the insulator layers that are mutually different from each other. The first and second signal conductor patterns interpose a first ground conductor in the laminating direction of the insulator layers. The power transmission line is in a side portion of the first signal conductor pattern.
US09935346B2 Battery module
The present invention relates to a battery module, which includes one or more battery cell units, and the battery cell unit includes a battery cell, a fixing member located surrounding an outer circumference surface of the battery cell, and a heat absorbing material located between the battery cell and the fixing member, and as a result, heat generation inside the battery module is suppressed, and ignition between the series-connected battery cell units may be suppressed. Accordingly, excellent charge and discharge efficiency, an excellent cycle property and a lifespan property of the battery may be exhibited without concern for explosion or ignition of the battery module.
US09935345B2 Cooling structure of power storage device
A cooling structure of a power storage device includes a cooling plate, a partition member, and a heat conduction material. The cooling plate is to cool a storage battery bank including storage batteries which are stacked. The partition member is disposed between the storage battery bank and the cooling plate and includes divided areas. At least one of the storage batteries is provided in each of the divided areas. The heat conduction material is accommodated in at least one of the divided areas and is in contact with the at least one of the storage batteries and the cooling plate.
US09935336B2 Secondary battery, battery pack, electric vehicle, and electric power storage system
A secondary battery includes: a cathode including a lithium-oxygen-containing compound; an anode; and non-aqueous electrolytic solution including one or more first anions represented by Formula (1). B(XY)xFyRz-  (1) where X is one of a divalent chain hydrocarbon group, a divalent fluorinated chain hydrocarbon group, and nothing; Y is one of a cyano group (—C≡N) and an isocyano group (—N+≡C—); R is one of a monovalent fluorinated chain hydrocarbon group and a monovalent fluorinated cyclic hydrocarbon group; and x to z are integers that satisfy x>0, y≥0, z≥0, (x+y+z)=4, and (y+z)>0.
US09935334B2 Electrolyte and rechargeable lithium battery including same
An electrolyte for a rechargeable lithium battery includes a lithium salt, a non-aqueous organic solvent, and an additive. The additive is represented by Chemical Formula 1, and is included in an amount of about 0.05 wt % to about 3 wt % based on the total amount of the electrolyte. A rechargeable lithium battery including the same is also disclosed. Chemical Formula 1 is as described in the present specification.
US09935332B2 Tapered block copolymer electrolytes
Copolymers useful as components of polymer electrolytes are provided in which the copolymer comprises at least one block sequence represented by formula (I): A—(T)—B   (I) wherein A is a vinyl aromatic block, T is a tapered copolymer region copolymerized from a vinyl aromatic monomer and an oligo(oxyalkylene) acrylate monomer and B is an oligo(oxyalkylene) acrylate block.
US09935330B2 Battery manufacturing method and battery manufacturing apparatus
In a battery manufacturing method using a battery manufacturing apparatus, the battery manufacturing apparatus including a pressing unit, a measurement device, and a controller, the battery manufacturing method includes steps of (a) pressing a battery member by a pressing unit, (b) measuring, after the pressing step (a), by the measurement device, characteristics of the battery member, which has been pressed by the pressing unit, and (c) controlling, after the measurement step (b), by the controller, a state of pressing of the battery member by the pressing unit in accordance with a measurement result of the measurement device.
US09935329B2 Stepped electrode group stack
Disclosed herein is an electrode group stack including a stacked structure of electrode groups, each including a positive electrode, a negative electrode, and a separator disposed between the positive electrode and the negative electrode, in which the electrode groups are stacked in a height direction on the basis of a plane such that the positive electrode and the negative electrode face each other in a state in which the separator is disposed between the positive electrode and the negative electrode, wherein the stacked structure of the electrode groups includes electrode groups having different areas at an interface between the electrode groups, and a ratio of capacity to area of the positive electrode and the negative electrode at the interface between the electrode groups (N/P ratio) is equal to or greater than a ratio of capacity to area of a positive electrode and a negative electrode constituting an electrode group having a relatively large area (N/P ratio).
US09935322B2 Fuel cell system having curved membrane electrode assembly
The disclosure relates to a fuel cell system. The fuel cell system includes a fuel cell module, fuel and oxidizing gas. The fuel cell module includes a container and a membrane electrode assembly located on the container. The container includes a housing and a nozzle connected to the housing. The container defines a number of through holes located on the housing and covered by the membrane electrode assembly. The membrane electrode assembly includes a proton exchange membrane having a first surface and a second surface opposite to the first surface, a cathode electrode located on the first surface and an anode electrode located on the second surface.
US09935320B2 Composite body, collector member, gas tank, and fuel cell device
A composite body includes a substrate containing Cr; and a first composite oxide layer disposed on at least a part of a surface of the substrate, the first composite oxide layer having a spinel type crystal structure, a first largest content and a second largest content among constituent elements excluding oxygen of the first composite oxide layer being Zn and Al in random order. Accordingly, the composite body can suppress diffusion of Cr from the substrate containing Cr to the first composite oxide layer, and has improved long-term reliability. A collector member and a gas tank, each of which is formed of the composite body, can have improved long-term reliability. A fuel cell device having excellent long-term reliability can be obtained using the collector member and the gas tank.
US09935318B1 Solid oxide fuel cell cathode with oxygen-reducing layer
The disclosure provides a SOFC comprised of an electrolyte, anode, and cathode, where the cathode comprises an MIEC and an oxygen-reducing layer. The oxygen-reducing layer is in contact with the MIEC, and the MIEC is generally between and separating the oxygen-reducing layer and the electrolyte. The oxygen-reducing layer is comprised of single element oxides, single element carbonates, or mixtures thereof, and has a thickness of less than about 30 nm. In a particular embodiment, the thickness is less than 5 nm. In another embodiment, the thickness is about 3 monolayers or less. The oxygen-reducing layer may be a continuous film or a discontinuous film with various coverage ratios. The oxygen-reducing layer at the thicknesses described may be generated on the MIEC surface using means known in the art such as, for example, ALD processes.
US09935310B2 Silicon-containing material and secondary-battery active material including silicon-containing material
Providing a silicon-containing material having a novel structure being distinct from the structure of conventional silicon oxide disproportionated to use.A silicon-containing material according to the present invention includes at least the following: a continuous phase including silicon with Si—Si bond, and possessing a bubble-shaped skeleton being continuous three-dimensionally; and a dispersion phase including silicon with Si—O bond, and involved in an area demarcated by said continuous phase to be in a dispersed state.
US09935309B2 Negative electrode active material, raw material for a negative electrode active material, negative electrode, lithium ion secondary battery, method for producing a negative electrode active material, and method for producing a lithium ion secondary battery
A negative electrode active material including: a particle of negative electrode active material containing silicon-based material of SiOx (0.5≤x≤1.6); wherein the intensity A of a peak in a Si-region given in the chemical shift region of from −50 to −95 ppm and the intensity B of a peak in a SiO2-region given in the chemical shift region of from −96 to −150 ppm in a 29Si-MAS-NMR spectrum of the silicon-based material satisfy a relationship that A/B≥0.8. This provides a negative electrode active material which can increase a battery capacity, and can improve cycle characteristics and initial charge/discharge characteristics when used as a negative electrode active material for a lithium ion secondary battery.
US09935305B2 Secondary battery for large current charge and discharge characteristic
There is provided a secondary battery including a battery device that has a thickness of 3 to 20 mm, and a battery discharge capacity of 3 to 50 Ah, and an exterior material that packages the battery device. The battery device includes a positive electrode that has a positive electrode current collector and a positive electrode active material layer, a negative electrode that has a negative electrode current collector and a negative electrode active material layer, a separator that is interposed between the positive electrode and the negative electrode that are alternately laminated, a positive electrode tab that is electrically connected to a positive electrode current collector exposed portion and is led-out to the outside of the exterior material, and a negative electrode tab that is electrically connected to a negative electrode current collector exposed portion and is led-out to the outside of the exterior material.
US09935301B2 Pressure equalization element, housing comprising a pressure equalization element, lithium ion accumulator and motor vehicle
A pressure equalization element for a housing includes a water-impermeable membrane. The membrane is combined with either a pressure relief valve acting in two directions or with a corresponding combination of two pressure relief valves such that a volume of air exchange is reduced. An amount of moisture transported into the housing is thus also reduced.
US09935300B2 Battery retention assembly and method
An illustrative battery retaining assembly comprises a retaining plate, and a casing including mounting devices. One of the mounting devices may include a hinge device, and another of the mounting devices may include a latch device. The retaining plate includes engagement portions engageable with the mounting devices, such that the retaining plate may be mounted to the casing. One of the engagement portions may include a channel engageable with the hinge device, and another of the engagement portions may include a catch engageable with the latch device. The mounting devices and engagement portions may be configured to enable the retaining plate to slide at an oblique angle with respect to the casing, to provide a variable separation distance between the casing and the retaining plate.
US09935297B2 Method for manufacturing flexible display panel and flexible display panel
The disclosure provides a method for manufacturing a flexible display panel and a flexible display panel. Wherein the method comprises: binding a flexible substrate with a supporting column matrix on a supporting plate, and fixing the flexible substrate with the supporting plate by a sealant in vacuum, wherein the sealant is disposed at the edge of the supporting column matrix, such that the supporting column matrix is surrounded in a sealed space formed by the sealant, the supporting plate and the flexible substrate; forming a flexible display panel on the flexible substrate; and cutting the supporting plate and the flexible display panel along the inner side of the sealant, such that the flexible display panel separating with the supporting plate. Thus, the flexible substrate can be separated from the supporting plate without damaging devices disposed on the flexible substrate.
US09935295B2 Organic light-emitting component and method for producing an organic light-emitting component
According to at least one embodiment, an organic light-emitting component includes a substrate, a first electrode arranged on the substrate, and a second electrode. An organic light-generating layer stack is arranged between the first and second electrodes and includes a first organic OLED functional material. A first organic coupling-out layer is in optical contact with the organic light-generating layer stack and includes an organic material containing a second organic OLED functional material. One of the first and second electrodes is translucent, and the first organic coupling-out layer is arranged on that side of the electrode that faces away from the organic light-generating layer stack.
US09935292B2 Light-emitting device, electronic device, and lighting device
To provide a novel light-emitting device with high productivity, the light-emitting device includes a first light-emitting element, a second light-emitting element, and a third light-emitting element. In the first light-emitting element, a first lower electrode, a first transparent conductive layer, a first light-emitting layer, a second light-emitting layer, and an upper electrode are stacked in this order. In the second light-emitting element, a second lower electrode, a second transparent conductive layer, the first light-emitting layer, the second light-emitting layer, and the upper electrode are stacked in this order. In the third light-emitting element, a third lower electrode, a third transparent conductive layer, the second light-emitting layer, and the upper electrode are stacked in this order. The first transparent conductive layer includes a first region. The second transparent conductive layer includes a second region as thick as the third transparent conductive layer. The first region is thicker than the second region.
US09935289B2 Environmental sensitive element package and encapsulation method thereof
A package of environmental sensitive element including a first substrate, a second substrate, a barrier structure between the first substrate and the second substrate, an environmental sensitive element and an adhesive is provided. The second substrate is disposed above the first substrate. The environmental sensitive element is disposed on the first substrate and located between the first substrate and the second substrate. The barrier structure is distributed outside the environmental sensitive element. The adhesive is disposed between the first substrate and the second substrate and encapsulates the environmental sensitive element and the barrier structure, wherein an outgassing of the adhesive under 120 degrees Celsius is less than or equal to 5×10−7 gram/cm2.
US09935276B2 Organic electroluminescent materials and devices
Compounds including a ligand L according to Formula I devices containing the same and formulations including the same are described. In Formula I, B is a 5 or 6-membered carbocyclic or heterocyclic ring; C is a condensed aromatic ring system having at least two carbocyclic or heterocyclic rings; A-B represents a bonded pair of carbocyclic or heterocyclic rings coordinated to a metal M via a nitrogen atom in ring A and an sp2 hybridized atom X6 in ring B; RA, RB and RC can represent no substitutions or the maximum substitutions available on the respective ring; X1, X2, X3, X4, X5, and X6 are carbon or nd nitrogen, and X7 is carbon; at least one of RA and RC substituents adjacent to the bond between A and C is not hydrogen; and the ligand is coordinated to a metal, having an atomic number greater than 40.
US09935274B2 Substituted 12H-indolo[2,3-b]quinoxalino[2′,3′:4,5]pyrrolo[3,2,1-jk]carbazoles as organic electroluminescent materials
The present invention relates to an organic compound represented by the following formula 1. The organic compound according to the present invention can produce an organic electroluminescent device having low driving voltage, excellent current and power efficiencies, and remarkably improved driving lifespan.
US09935273B2 Fluoranthene derivative, light-emitting device material containing same, and light-emitting device
The purpose of the present invention is to provide an organic thin-film luminescent element which exhibits improved luminous efficiency, drive voltage and durability life. This fluoranthene derivative is characterized by having a specific structure that contains a fluoranthene skeleton.
US09935270B2 Electrochemical light emitting cell, composition for forming light emitting layer of electrochemical light emitting cell, and ionic compound for light emitting layer of electrochemical light emitting cell
A light-emitting electrochemical cell 10 includes an emitting layer 12 and electrodes 13 and 14, one on each side of the emitting layer 12. The emitting layer 12 contains a light-emitting material and an ionic compound. The ionic compound has general formula (1), wherein M is N or P; R1, R2, R3, and R4 each independently represent a C1-C20 saturated aliphatic group; and X is preferably an anion having a phosphoric ester bond or a sulfuric ester bond. The light-emitting material is preferably an organic light-emitting polymer, a metal complex, an organic low molecular compound, or a quantum dot.
US09935262B2 Magnetic tunnel junction element and manufacturing method therefor
A magnetic tunnel junction device and a manufacturing method therefor are provided. The magnetic tunnel junction device comprises: a seed layer having an FCC (001) crystal structure; a first ferromagnetic layer located on the seed layer and having perpendicular magnetic anisotropy; a tunneling barrier layer located on the first ferromagnetic layer; and a second ferromagnetic layer located on the tunneling barrier layer and having perpendicular magnetic anisotropy, wherein the first ferromagnetic layer has a BCC (001) crystal structure and does not have boron. Therefore, the magnetic tunnel junction device, which is structurally and thermally more stable, can be provided by using the seed layer configured to assist the crystal growth of a boron-free magnetic layer in a BCC (001) direction and provide perpendicular magnetic anisotropy thereto, that is, W2N or TaN which is a nitrogen-doped metal material having a cubic crystal structure and having a similar lattice constant to that of a magnetic layer material.
US09935258B2 Thermally tolerant perpendicular magnetic anisotropy coupled elements for spin-transfer torque switching device
Perpendicular magnetic anisotropy (PMA) type magnetic random access memory cells are constructed with a composite PMA layer to provide a magnetic tunnel junction (MTJ) with an acceptable thermal barrier. A PMA coupling layer is deposited between a first PMA layer and a second PMA layer to form the composite PMA layer. The composite PMA layer may be incorporated in PMA type MRAM cells or in-plane type MRAM cells.
US09935256B2 Piezoelectric composition, piezoelectric element and sputtering target
The present invention aims to provide a piezoelectric composition containing a composition represented by formula (5) as the main component, wherein the composition represented by formula (5) contains a first perovskite-type oxide represented by formula (1), a second perovskite-type oxide represented by formula (2), a tungsten bronze-type oxide represented by formula (3) and a third perovskite-type oxide represented by formula (4), (K1-x-yNaxLiy)q(Nb1-zTaz)O3 (1), SrZrO3 (2), Ba(Nb1-wTaw)2O6 (3), (Bi0.5Na0.5)TiO3 and/or (Bi0.5K0.5)TiO3 (4), (1−m−n−p)A+mB+nC+pD (5); in formula (1), 0.20≤x≤0.80, 0.02≤y≤0.10, 0.01≤z≤0.30 and 0.800≤q≤1.050; in formula (3), 0.01≤w≤0.30; and in formula (5), A represents the composite oxide represented by formula (1), B represents the composite oxide represented by formula (2), C represents the composite oxide represented by formula (3), D represents the composite oxide represented by formula (4), and 0.04≤m≤0.07, 0≤n≤0.010 and 0.001≤p≤0.020.
US09935253B2 Ceramic device and piezoelectric device
A piezoelectric device is a fired body including a body part 10 and external electrodes 21 and 22. A surface of the side electrode 22 is comprised only of a material for the side electrode 22. On a surface of the surface electrode 21 or a surface of a connection portion where the surface electrode 21 and the side electrode 22 are connected to each other, a protrusion h extending along a direction along which the connection portion extends and sticking out in a thickness direction of the surface electrode 21 is provided. A region, on the surface of the surface electrode 21, farther from the connection portion than the protrusion h is interspersed with a plurality of exposed portions in each of which a surface of a ceramic material having lower solder wettability than a material for the surface electrode 21 is exposed.
US09935252B2 Mechanically tunable superconducting qubit
A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.
US09935248B2 Light emitting device package
Embodiments of the present invention relate to a light emitting device package having uniform color characteristics, wherein the light emitting device package includes: a substrate including first and second lead frames; at least two light emitting devices disposed on the substrate and electrically connected to the first and second lead frames; an integrated wavelength conversion film disposed on the at least two light emitting devices and including a first region which overlaps the light emitting devices and a second region other than the first region; at least one recess which passes through the wavelength conversion film in a region corresponding to a gap between the adjacent light emitting devices; and a lens disposed on the substrate to cover the light emitting devices and the first and second lead frames.
US09935244B2 Light emitting device including a filter and a protective layer
A method according to embodiments of the invention includes providing a plurality of LEDs attached to a mount. A filter is attached to at least one of the plurality of LEDs. A protective layer is formed over the filter. A reflective layer is formed over the mount. A portion of the reflective layer disposed over the protective layer is removed.
US09935241B2 Solvent for manufacture of self-assembled nano-scale LED electrode assembly and method for manufacturing self-assembled nano-scale LED electrode assembly by the same
The present disclosure relates to a method for manufacturing a self-assembled nano-scale LED electrode assembly and more particularly, to a method for manufacturing a self-assembled nano-scale LED electrode assembly in which a nano-scale LED device can be self-aligned on two different electrodes without being chemically and physically damaged and the number of nano-scale LED devices to be mounted can be remarkably increased, and alignment and electrical connection of the LED devices can be further improved.
US09935237B2 Solid state lighting devices with dielectric insulation and methods of manufacturing
Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The solid state lighting device also includes an indentation extending from the second semiconductor material toward the active region and the first semiconductor material and an insulating material in the indentation of the solid state lighting structure.
US09935233B2 Additive for preparing suede on polycrystalline silicon chip and use method thereof
The invention disclosed an additive for preparing suede on a polycrystalline silicon chip. The invention also provides a suede preparation liquid for preparing suede on a polycrystalline silicon chip, comprising: an acid solution and the aforementioned additive for preparing suede on a polycrystalline silicon chip. The invention also provides a method for preparing suede on a polycrystalline silicon chip, by using which suede can be prepared on the surface of a polycrystalline silicon chip with the foregoing suede preparation liquid.
US09935232B2 Method of manufacturing semiconductor device
According to one embodiment, a method of manufacturing a semiconductor device includes a step of grinding to thin a first semiconductor wafer on which a semiconductor device is formed in a state in which a surface of a second semiconductor wafer is fixed on a chuck table of a grinding device after bonding the first semiconductor wafer to the second semiconductor wafer. The method includes a step of fixing a surface of the first semiconductor wafer on the chuck table and grinding the surface of the second semiconductor wafer in a state in which the first semiconductor wafer is bonded to the second semiconductor wafer prior to the grinding step to thin the first semiconductor wafer.
US09935230B1 Type IV semiconductor based high voltage laterally stacked multijunction photovoltaic cell
A method of forming a photovoltaic device that includes ion implanting a first conductivity type dopant into first regions of a semiconductor layer of an SOI substrate, wherein the first regions are separated by a first pitch; and ion implanting a second conductivity type dopant into second regions of the semiconductor layer of the SOI substrate. The second regions are separated by a second pitch. Each second conductivity type implanted region of the second regions is in direct contact with first conductivity type implanted region of the first regions to provide a plurality of p-n junctions, and adjacent p-n junctions are separated by an intrinsic portion of the semiconductor layer to provide P-I-N cells that are horizontally oriented.
US09935226B2 Photovoltaic module with simplified connection
Photovoltaic module (11) comprising a plurality of electrically connected photovoltaic cells (12), characterized in that it has a square shape and comprises at least two contact pads (17, 18) in each corner of the module so as to comprise at least four connectors (14, 15) on each edge (21; 22; 23; 24) of the module.
US09935222B1 Shingled array solar cells and method of manufacturing solar modules including the same
A solar cell is provided including a substrate having a front and back side, a metallization pattern deposited on the front side, the metallization pattern including a plurality of front side bus bars each including fingers extending therefrom, and a plurality of back side bus bars deposited on the back side. On the front side, one front side bus bar is formed along an edge of the front side of the substrate, and a remainder of the front side bus bars are unequally spaced across the substrate. On the back side of the substrate, only one back side bus bar is formed along an edge of the back side of the substrate, and a remainder of the back side bus bars are unequally spaced across the substrate.
US09935218B2 Generation of flexible high power pulsed waveforms
A method for generating high power pulsed RF waveforms comprises the steps of charging a transmission line in a pulse forming network with a high-voltage and discharging the voltage on the transmission line to ground utilizing a gallium nitride photoconductive switch.
US09935217B1 High efficiency photovoltaic cells and manufacturing thereof
Novel structures of photovoltaic cells are provided. The cells are based on nanometer or micrometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators, and may be metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications such as in space, commercial, residential and industrial applications.
US09935211B2 Back contact structure for photovoltaic devices such as copper-indium-diselenide solar cells
A back contact configuration for a CIGS-type photovoltaic device is provided. According to certain examples, the back contact configuration includes an optical matching layer and/or portion of or including MoSe2 having a thickness substantially corresponding to maxima of absorption of reflected light in CIGS-type absorbers used in certain photovoltaic devices. Certain example methods for making the back contact configuration wherein a thickness of the MoSe2 layer and/or portion can be controlled to be within thickness ranges that correspond to maxima of CIGS light absorption for reflected solar light are also provided.
US09935209B2 Multijunction metamorphic solar cell for space applications
A multijunction solar cell assembly and its method of manufacture including interconnected first and second discrete semiconductor body subassemblies disposed adjacent and parallel to each other, each semiconductor body subassembly including first top subcell, second (and possibly third) lattice matched middle subcells; a graded interlayer adjacent to the last middle solar subcell; and a bottom solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the last middle solar subcell; wherein the interconnected subassemblies form at least a four junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor body and the bottom solar subcell in the second semiconductor body.
US09935204B2 Static random access memory (SRAM) device for improving electrical characteristics and logic device including the same
A static random access memory (SRAM) device includes a circuit element that includes a first inverter having a first load transistor and a first drive transistor and a second inverter having a second load transistor and a second drive transistor. Input and output nodes of the first inverter and the second inverter are cross-connected to each other. A first transfer transistor is connected to the output node of the first inverter, and a second transfer transistor is connected to the output nodes of the second inverter. Each of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having multi-bridge channels. At least one of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having a different number of multi-bridge channels from the other transistors.
US09935202B2 Transistor and display device comprising oxide semiconductor layer
To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
US09935201B2 High doped III-V source/drain junctions for field effect transistors
A semiconductor device includes a fin patterned in a substrate; a gate disposed over and substantially perpendicular to the fin; a pair of epitaxial contacts including a III-V material over the fin and on opposing sides of the gate; and a channel region between the pair of epitaxial contacts under the gate including an undoped III-V material between doped III-V materials, the doped III-V materials including a dopant in an amount in a range from about 1e18 to about 1e20 atoms/cm3 and contacting the epitaxial contacts.
US09935193B2 MOSFET termination trench
A method, in one embodiment, can include forming a core trench and a termination trench in a substrate. The termination trench is wider than the core trench. In addition, a first oxide can be deposited that fills the core trench and lines the sidewalls and bottom of the termination trench. A first polysilicon can be deposited into the termination trench. A second oxide can be deposited above the first polysilicon. A mask can be deposited above the second oxide and the termination trench. The first oxide can be removed from the core trench. A third oxide can be deposited that lines the sidewalls and bottom of the core trench. The first oxide within the termination trench is thicker than the third oxide within the core trench.
US09935192B2 Optimized buffer layer for high mobility field-effect transistor
A stack along a z-axis for a high-electron-mobility field-effect transistor, comprises: a buffer layer comprising a first semiconductor material comprising a binary, ternary or quaternary nitride compound having a first bandgap, a barrier layer comprising a second semiconductor material comprising a binary, ternary or quaternary nitride compound and having a second bandgap, the second bandgap wider than the first bandgap, a heterojunction between the buffer and barrier layers and, a two-dimensional electron gas located in an XY plane perpendicular to the z-axis and in the vicinity of the heterojunction wherein: the buffer layer comprises a zone comprising fixed negative charges of density per unit volume higher than or equal to 1017 cm−3, the zone having a thickness smaller than or equal to 200 nm, the product of multiplication of the density per unit volume of fixed negative charges by the thickness of the zone between 1012 cm−2 and 3.1013 cm−2.
US09935191B2 High electron mobility transistor fabrication process on reverse polarized substrate by layer transfer
A method including forming a barrier layer on a polar compound semiconductor layer on a sacrificial substrate; coupling the sacrificial substrate to a carrier substrate to form a composite structure wherein the barrier layer is disposed between the polar compound semiconductor layer and the carrier substrate; separating the sacrificial substrate from the composite structure to expose the polar compound semiconductor layer; and forming at least one circuit device. An apparatus including a barrier layer on a substrate; a transistor device on the barrier layer; and a polar compound semiconductor layer disposed between the barrier layer and the transistor device, the polar compound semiconductor layer including a two-dimensional electron gas therein.
US09935190B2 Forming enhancement mode III-nitride devices
A method of fabricating a III-N device includes forming a III-N channel layer on a substrate, a III-N barrier layer on the channel layer, an insulator layer on the barrier layer, and a trench in a first portion of the device. Forming the trench comprises removing the insulator layer and a part of the barrier layer in the first portion of the device, such that a remaining portion of the barrier layer in the first portion of the device has a thickness away from a top surface of the channel layer, the thickness being within a predetermined thickness range, annealing the III-N device in a gas ambient including oxygen at an elevated temperature to oxidize the remaining portion of the barrier layer in the first portion of the device, and removing the oxidized remaining portion of the barrier layer in the first portion of the device.
US09935189B2 Transistor having germanium channel on silicon nanowire and fabrication method thereof
The present invention provides a transistor and a fabrication method thereof. By a silicon nanowire as a core region being serially wrapped by a germanium channel, a gate insulating film and a gate, the present invention enables to form a potential well for storing holes as a carrier of HHMT in the germanium channel by a valance band energy offset between the silicon core region and the germanium channel, to gain maximum gate controllability to the germanium channel, and to simplify a fabricating process by simultaneously forming the germanium channel and the gate insulating film in one process.
US09935183B2 Multilayer passivation or etch stop TFT
The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.
US09935181B2 FinFET having highly doped source and drain regions
A method of forming a semiconductor device that includes forming an in-situ doped semiconductor material on a semiconductor substrate, and forming fin structures from the in-situ doped semiconductor material. A sacrificial channel portion of the fin structures may be removed, wherein a source region and a drain region portion of the fin structures of the in-situ doped semiconductor material remain. The sacrificial channel portion of the fin structure may then be replaced with a functional channel region.
US09935178B2 Self-aligned channel-only semiconductor-on-insulator field effect transistor
In one example, a field effect transistor includes a fin. The fin includes a conducting channel formed from semiconductor-on-insulator and source/drain regions formed on opposite ends of the conducting channel, wherein the source/drain regions are formed from a material other than semiconductor-on-insulator. A gate is wrapped around the conducting channel, between the source/drain regions. In another example, a method for fabricating a field effect transistor includes forming a fin on a wafer. The fin includes a conducting channel formed from semiconductor-on-insulator and source/drain regions formed on opposite ends of the conducting channel, wherein the source/drain regions are formed from a material other than semiconductor-on-insulator. A gate is also formed between the source/drain regions and wraps around the conducting channel.
US09935176B1 Method for fabricating LDMOS using CMP technology
A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: etching a polysilicon layer above the well region through a window for a body region; and forming spacers at side walls of the polysilicon layer, to define positions of source regions in the well region.
US09935168B2 Gate contact with vertical isolation from source-drain
A method of forming a semiconductor structure includes forming a gate structure having a first conductive material above a semiconductor substrate, gate spacers on opposing sides of the first conductive material, and a first interlevel dielectric (ILD) layer surrounding the gate spacers and the first conductive material. An upper portion of the first conductive material is recessed. The gate spacers are recessed until a height of the gate spacers is less than a height of the gate structure. An isolation liner is deposited above the gate spacers and the first conductive material. A portion of the isolation liner is removed so that a top surface of the first conductive material is exposed. A second conductive material is deposited in a contact hole created above the first conductive material and the gate spacers to form a gate contact.
US09935167B2 Semiconductor devices
Semiconductor devices include a channel layer on a substrate, the channel layer including a material having a lattice constant different from a lattice constant of the substrate, a first gate electrode on the channel layer, a first source region of a first conductivity type at a first side of the first gate electrode, a first body region of a second conductivity type under the first source region and contacting the first source region, a first drain region of the first conductivity type disposed at a second side of the first gate electrode, a first drift region of the first conductivity type under the first drain region and contacting the first drain region, and a first stud region in the channel layer and the first drift region. The first stud region has an impurity concentration higher than an impurity concentration of the first drift region.
US09935162B2 Organic electroluminescent transistor array substrate and fabrication method thereof, and display device
An embodiment of the present disclosure provides an organic electroluminescent transistor array substrate, including a substrate, and a gate layer, a gate insulating layer, a semiconductor layer, a source layer, a pixel defining layer, an electroluminescent layer and a drain layer formed on the substrate, wherein, the source layer and the drain layer are located in different levels, the source layer includes plural source electrode units corresponding to sub-pixel units respectively, the pixel defining layer includes plural pixel defining units corresponding to the source electrode units respectively, and the respective source electrode units are embedded within the pixel defining units corresponding thereto.
US09935161B2 Display panel and method for manufacturing the same
A display panel including first and second sub pixel electrodes, a first light emitting unit, first and second charge generation layers, a second light emitting unit, and an upper electrode. The first light emitting unit is provided with a first contact hole. The first charge generation layer includes a first contact part being in the first contact hole and coupled to a portion of the first sub pixel electrode exposed by the first contact hole, and a first extension part extending from the first contact part and being on the first light emitting unit. The second charge generation layer and the second light emitting unit are provided with a second contact hole. The upper electrode includes a first upper electrode part being in the second contact hole and coupled to a second contact part of the second charge generation layer exposed by the second contact hole.
US09935160B2 OLED display device having pixel separation layer sidewall comprising curved sections
The present invention provides an OLED display device, which includes: a substrate (1), a plurality of pixel zones arranged in an array on the substrate (1), each of the pixel zones comprising a pixel electrode (2), an organic light-emitting layer (3), and a common electrode (4) that are sequentially stacked on the substrate (1), and a pixel separation layer (5) including a plurality of openings, the openings being each delimited and circumferentially surrounded by a pixel separation layer sidewall (51), each of the openings corresponding to one of the pixel zones. The pixel separation layer (5) is formed of an inorganic material. The pixel separation layer sidewall (51) includes, arranged from top to bottom, a first curved section (511), a linear section (512), and a second curved section (513), so as to overcome a deterioration issue of the organic light-emitting layer (3) caused by the pixel separation layer sidewall (51), prevent the organic light-emitting layer (3) and the common electrode (4) from breaking at a site corresponding to the pixel separation layer sidewall (51), prevent shorting between the common electrode (4) and the pixel electrode (2), which are the cathode and anode of the OLED display device, and improve displaying performance.
US09935159B2 Display panel and display device comprising the same
Disclosed herein are a display panel capable of reducing the amount of reflected light in a non-display area where an alignment key is disposed, and a display device employing the same. The display panel includes a substrate having a display area and a non-display area, an alignment key disposed on a first surface of the substrate, and a planarization layer disposed on the first surface of the substrate and having a via hole above the alignment key. The display panel also includes a first shielding layer disposed on a second surface of the substrate opposite the first surface and having a first opening hole overlapping with the alignment key in plan view, and a second shielding layer disposed on the planarization layer.
US09935157B2 OLED display
The present invention provides an OLED display including a red organic light-emitting element, a green organic light-emitting element, and a blue organic light-emitting element set corresponding to a red filter device, a green filter device, and a blue filter device respectively. Thus, the chromaticity coordinate of the OLED display can be adjusted and NTSC can be increased. Selection of material made of the red, green, and blue light-emitting elements and light-utilizing efficiency are increased.
US09935152B2 X-ray detector having improved noise performance
Exemplary embodiments are directed to imagining detectors and methods of fabricating the imagining detectors for use in medical imagining systems. In exemplary embodiments, a detector for an imaging device include a continuous unpatterned photoelectric material that forms a portion of a photosensor and an electrode disposed with respect to the photoelectric material to form an anode or cathode of the photosensor. Data readout lines connected to the outputs of transistors of the detector can be susceptible electronic noise from capacitive coupling between the electrode of the photosensor. In exemplary embodiments of the present disclosure, a lateral offset and/or vertical offset between the electrode and the data readout lines can be formed to control the capacitive coupling between the electrode and the data readout line.
US09935151B2 Low noise InGaAs photodiode array
A photodiode pixel structure for imaging short wave infrared (SWIR) and visible light built in a planar structure and may be used for one dimensional and two dimensional photodiode arrays. The photodiode arrays may be hybridized to a read out integrated circuit (ROIC), for example, a silicon complementary metal-oxide-semiconductor (CMOS) circuit. The photodiode in each pixel is buried under the surface and does not directly contact the ROIC amplification circuit. Charge is transferred form the detector using a junction field effect transistor (JFET) in each pixel. Disconnecting the photodiode from the ROIC amplification circuit enables low dark current as well as double correlated sampling in the pixel.
US09935150B2 X-ray detection panel of X-ray detector and method of manufacturing the same
An X-ray detection panel for X-ray detectors and a method of manufacturing the same are disclosed. The X-ray detection panel includes a substrate, a photodiode disposed on the substrate and generating an electrical signal in response to light illuminating the photodiode, a first thin-film transistor disposed on the substrate and processing the electrical signal generated by the photodiode, and a second thin-film transistor disposed on the substrate and removing a residual current component accumulated in the photodiode and the first thin-film transistor. The X-ray detection panel can improve actual sensitivity and signal-to-noise ratio (SNR).
US09935147B2 Deep trench isolation structure in image sensor device
An image sensor device includes a substrate having a front surface and a back surface, and a deep trench disposed at the front surface of the substrate. The deep trench has sidewalls, a bottom and an opening. A dielectric layer is disposed along the sidewalls and the bottom of the deep trench. An epitaxial layer is disposed on the front surface of the substrate. The deep trench and the epitaxial layer collectively define an air chamber. The deep trench has a chamfered portion at an interface between the epitaxial layer and the front surface of the substrate. The chamfered portion is free of dielectric layer.
US09935146B1 Phase detection pixels with optical structures
In order to increase angular response or otherwise customize the response of phase detection pixels to incident light, phase detection pixels may include optical structures. The optical structures may be formed between a microlens and at least first and second photodiodes to redirect incident light between the microlens and the photodiodes. The optical structures may include two or more layers with different indices of refraction. For example, a layer of silicon dioxide and a layer of silicon nitride may form a concave lens that increases the angular response of phase detection pixels. The optical structures may have any desired shape to customize the response of the photodiodes to incident light.
US09935142B2 Image sensor including transfer gates in deep trenches
An image sensor is described. The image sensor includes a photodiode that is formed in a substrate, a floating diffusion region that vertically overlaps with a first portion of the photodiode, a shallow trench isolation (STI) region that vertically overlaps with a second portion of the photodiode and has an elbow shape, and a transfer gate that is adjacent to at least two sides of the photodiode and has an elbow shape.
US09935141B2 Semiconductor device and manufacturing method thereof
In a semiconductor device in which a plurality of light receiving elements are provided in each of a plurality of pixels that form a solid-state image sensor, a decrease in the performance of the semiconductor device is prevented, the decrease occurring due to an increase in the number of wires. In the pixel having a first photodiode and a second photodiode, a first transfer transistor coupled to the first photodiode and a second transfer transistor coupled to the second photodiode are respectively controlled by the same gate electrode, thereby allowing the number of wires for controlling the first and the second transfer transistors is reduced.
US09935138B2 Article comprising a photodiode-side integrated fuse for avalanche photodetector focal plane array pixels and method therefor
A scalable fuse design for individual pixels of a focal plane array of photodiodes comprises a fuse disposed on the upper surface of each photodiode in the array, wherein the fuse is situated proximal to a side of each photodiode. The fuse of each photodiode is electrically coupled to the active region thereof via a first bus and is electrically coupled to an ROIC via a second bus.
US09935137B2 Manufacture method of LTPS array substrate
The present invention provides a manufacture method of a LTPS array substrate. By utilizing one halftone mask, the N type heavy doping, the channel doping of the first polysilicon layer of the NMOS region and the P type heavy doping of the second polysilicon layer of the PMOS region, the three processes which previously require three masks are integrated into one mask process, and two exposure processes are eliminated, which significantly raises the exposure capacity, and meanwhile saves the manufacture cost of two masks to effectively reduce the manufacture cost of the LTPS array substrate, and the manufactured LTPS array substrate possesses great electrical property.
US09935136B2 Manufacturing method of display with lighting devices
A manufacturing method of display with lighting devices is disclosed, including providing a tank containing a liquid; disposing a carrying plate with several recessed regions in the tank, and the carrying plate being immersed in the liquid; dropping several lighting devices into the liquid, wherein each of the lighting devices includes two conductive pads, and one of the two conductive pads includes a magnetic material; applying a magnetic field for the lighting devices and the lighting devices will dispose within the recessed regions of the carrying plate; removing the carrying plate with the lighting devices out of the tank, and assembling the lighting devices to an array substrate.
US09935134B2 Transistor substrate and display device
In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
US09935132B2 Pixel structure
A pixel structure including scan lines, data lines, and sub-pixels is provided. The scan and data lines are disposed on the substrate. The sub-pixels include switch devices, contact pattern layer, color filter pattern layers, and pixel electrodes. The switch devices are electrically connected to one scan line and one data line respectively. The contact pattern layer and the color filter pattern layer are disposed on the substrate and the switch devices. The contact pattern layer covers part of two adjacent switch devices. At least two color filter pattern layers include a patterned opening respectively, and the contact pattern layer is disposed in the patterned opening. The pixel electrodes are disposed on the color filter pattern layer, the contact pattern layer, and the switch device. At least one pixel electrode is partially disposed between the color filter pattern layer and the corresponding switch device while electrically connected to the switch device.
US09935128B2 Pixel circuit, electro-optical device, and electronic apparatus
An electro-optical device formed on a semiconductor substrate, includes: a first transistor controlling a current level according to a voltage between a gate and a source; a second transistor electrically connected between a data line and the gate of the first transistor; a third transistor electrically connected between the gate and a drain of the first transistor; and a light-emitting element emitting light at a luminance according to the current level, in which one of a source and a drain of the second transistor and one of a source and a drain of the third transistor are formed by a common diffusion layer.
US09935125B2 Semiconductor device and manufacturing method of the same
On a semiconductor substrate having an SOI region and a bulk silicon region formed on its upper surface, epitaxial layers are formed in source and drain regions of a MOSFET formed in the SOI region, and no epitaxial layer is formed in source and drain regions of a MOSFET formed in the bulk silicon region. By covering the end portions of the epitaxial layers with silicon nitride films, even when diffusion layers are formed by implanting ions from above the epitaxial layers, it is possible to prevent the impurity ions from being implanted down to a lower surface of a silicon layer.
US09935115B2 Nonvolatile semiconductor storage device and method of manufacturing nonvolatile semiconductor storage device
A nonvolatile semiconductor storage device includes a memory string including a plurality of memory cells connected in series with each other, and a select gate transistor connected to a first end of the memory string. The film thickness of a first hard mask on a select gate electrode of the select gate transistor is greater than the film thickness of a second hard mask film on a control gate electrode of the memory cells. The level of an upper surface of a first side wall insulating film provided on a side surface of the select gate transistor is higher than the level of an upper surface of the first hard mask film. The level of an upper surface of a second side wall insulating film provided on a side surface of the memory cells is higher than the level of an upper surface of the second hard mask film.
US09935114B1 Methods of forming an array comprising pairs of vertically opposed capacitors and arrays comprising pairs of vertically opposed capacitors
A method of forming an array comprising pairs of vertically opposed capacitors comprises forming a conductive lining in individual capacitor openings in support material. An elevational mid-portion of individual of the conductive linings is removed to form an upper capacitor electrode lining and a lower capacitor electrode lining that are elevationally separate and spaced from one another in the individual capacitor openings. A capacitor insulator is formed laterally outward of the upper and lower capacitor electrode linings. Conductive material is formed laterally outward of the capacitor insulator to comprise a shared capacitor electrode that is shared by vertically opposed capacitors in individual of the pairs of vertically opposed capacitors. Other methods and structure independent of method of manufacture are disclosed.
US09935113B2 Non-volatile memory and method for programming and reading a memory array having the same
A non-volatile memory (NVM) includes a fin structure, a first fin field effect transistor (FinFET), a second FinFET, an antifuse structure, a third FinFET, and a fourth FinFET. The antifuse structure is formed on the fin structure and has a sharing gate, a single diffusion break (SDB) isolation structure, a first source/drain region, and a second source/drain region. The SDB isolation structure isolates the first source/drain region and the second source/drain region. The first FinFET, the second FinFET and the first antifuse element compose a first one time programmable (OTP) memory cell, and the third FinFET, the fourth FinFET and the second antifuse element compose a second OTP memory cell. The first OTP memory cell and the second OTP memory cell share the antifuse structure.
US09935110B2 Memory device with manufacturable cylindrical storage node
A high capacitance embedded capacitor and associated fabrication processes are disclosed for fabricating a capacitor stack in a multi-layer stack to include a first capacitor plate conductor formed with a cylinder-shaped storage node electrode formed in the multi-layer stack, a capacitor dielectric layer surrounding the cylinder-shaped storage node electrode, and a second capacitor plate conductor formed from a conductive layer in the multi-layer stack that is sandwiched between a bottom and top dielectric layer, where the cylinder-shaped storage node electrode is surrounded by and extends through the conductive layer.
US09935105B2 Semiconductor device
Data hold time is controlled without excessively increasing a circuit area. A semiconductor device includes a data buffer and a flip-flop formed of fin. As a delay line, gate wirings being in the same layer as gate electrodes of the fin are provided in a data signal path from a data output node of the data buffer to a data input node of the flip-flop.
US09935103B2 Semiconductor device and manufacturing method thereof
A semiconductor device includes first and second Fin FET and a separation plug made of an insulating material and disposed between the first and second Fin FETs. The first Fin FET includes a first fin structure extending in a first direction, a first gate dielectric formed over the first fin structure and a first gate electrode formed over the first gate dielectric and extending a second direction perpendicular to the first direction. The second Fin FET includes a second fin structure, a second gate dielectric formed over the second fin structure and a second gate electrode formed over the first gate dielectric and extending the second direction. In a cross section a maximum width of the separation plug is located at a height Hb, which is less than ¾ of a height Ha of the separation plug.
US09935101B2 Vertical field effect transistor with uniform gate length
Fabrication of a semiconductor structure includes forming a set of two or more fins on a source/drain region formed on a substrate. A first mask layer and a second mask layer are formed on each fin. A spacer layer is formed on the source/drain region and between each fin, and a dielectric layer is formed on the spacer layer and along an exterior of each fin. A plurality of gate metal portions is created each having a thickness about equal to a target thickness. The first mask layer and an exposed portion of the dielectric layer are removed from each fin. An interlayer dielectric is deposited on the semiconductor structure. Portions of the interlayer dielectric and the gate metal are removed to a top of the second mask layer. The gate metal portions are each recessed to substantially the same depth.
US09935100B2 Power rail inbound middle of line (MOL) routing
In certain aspects, a semiconductor die includes a power rail, a first gate, and a second gate. The semiconductor die also includes a first gate contact electrically coupled to the first gate, wherein the first gate contact is formed from a first middle of line (MOL) metal layer, and a second gate contact electrically coupled to the second gate, wherein the second gate contact is formed from the first MOL metal layer. The semiconductor die further includes an interconnect formed from a second MOL metal layer, wherein the interconnect is electrically coupled to the first and second gate contacts, and at least a portion of the interconnect is underneath the power rail.
US09935099B2 Semiconductor device
The present invention provides a semiconductor device including a semiconductor substrate, a first well, a second well, a gate electrode, an oxide semiconductor structure and a diode. The first well is disposed in the semiconductor substrate and has a first conductive type, and the second well is also disposed in the semiconductor substrate, adjacent to the first well, and has a second conductive type. The gate electrode is disposed on the first well. The oxide semiconductor structure is disposed on the semiconductor substrate and electrically connected to the second well. The diode is disposed between the first well and the second well.
US09935094B2 GOA circuit based on LTPS semiconductor thin film transistor
The present invention provides a GOA circuit based on LTPS semiconductor thin film transistor to control the voltage levels of the first node (Q(n)) and the second node (P(n)) with the forward scan direct current control signal (U2D) and the backward scan direct current control signal (D2U). The clock signal (CK(M)) is merely in charge of the output of the GOA unit of corresponding stage, which can effectively reduce the loading of the clock signal. It ensures that the entire loading of the clock signal after the GOA units of multiple stages are coupled to promote the output stability of the GOA circuit, and to realize the forward-backward scan of the GOA circuit. Moreover, the GOA unit of each stage comprises only ten thin film transistors, which is beneficial to reduce the layout space of the GOA circuit and to achieve the narrow frame design of the display device.
US09935092B2 Radio frequency transistor stack with improved linearity
A RF transistor stack is described. The RF transistor stack comprises a first transistor having a T-gate layout configuration. The first transistor has a body region; a plurality of drain regions; and a plurality of source regions. A second transistor is provided which has a T-gate layout configuration. The second transistor has a body region; a plurality of drain regions; and a plurality of source regions. An interconnect operably couples the source regions of the first transistor with the source regions of the second transistor such that the distortion due to asymmetry in the division of RF voltage between the drain to source and the source to body terminals of first transistor is cancelled by reversing the asymmetry in the division of the RF voltage in the second transistor.
US09935091B2 Package-on-package structures and methods for forming the same
A package includes a package component, which further includes a top surface and a metal pad at the top surface of the package component. The package further includes a non-reflowable electrical connector over and bonded to the metal pad, and a molding material over the package component. The non-reflowable electrical connector is molded in the molding material and in contact with the molding material. The non-reflowable electrical connector has a top surface lower than a top surface of the molding compound.
US09935090B2 Substrate design for semiconductor packages and method of forming same
An embodiment device includes a first die, a first molding compound extending along sidewalls of the first die, and one or more first redistribution layers (RDLs) on the first die and the first molding compound. The device further includes a device package comprising a plurality of second dies, wherein the device package is bonded to an opposing surface of the one or more first RDLs as the first die and the first molding compound. A package substrate is bonded to the opposing surface of the one or more first RDLs. The package substrate is electrically connected to the first die and the plurality of second dies.
US09935084B2 Devices and methods of packaging semiconductor devices
Devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a device includes a first semiconductor device and a second semiconductor device coupled to the first semiconductor device. An underfill material is disposed between the first semiconductor device and the second semiconductor device. The underfill material is also disposed on sidewalls of the first semiconductor device and the second semiconductor device. The underfill material has a first thickness on sidewalls of the first semiconductor device and a second thickness on sidewalls of the second semiconductor device. The second thickness is different than the first thickness.
US09935083B2 Semiconductor package and manufacturing method thereof
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
US09935082B2 Stacked semiconductor dies with selective capillary under fill
Stacked semiconductor dies are provided with selective capillary under fill to avoid wafer warpage during curing. In one embodiment, a method of manufacturing a semiconductor device includes forming at least three stacks of semiconductor dies over a substrate, the stacks spaced apart from one another by gaps. A first sealing material such as a capillary under fill material is deposited into a first subset of the gaps. A second sealing material such as a mold resin is deposited into a second subset of the gaps. The first and second sealing materials are cured, and the die stacks are then singulated.
US09935076B1 Structure and method for fabricating a computing system with an integrated voltage regulator module
Systems that include integrated circuit dies and voltage regulator units are disclosed. Such systems may include a voltage regulator module and an integrated circuit mounted in a common system package. The voltage regulator module may include a voltage regulator circuit and one or more passive devices mounted to a common substrate, and the integrated circuit may include a System-on-a-chip. The system package may include an interconnect region that includes wires fabricated on multiple conductive layers within the interconnect region. At least one power supply terminal of the integrated circuit may be coupled to an output of the voltage regulator module via a wire included in the interconnect region.
US09935075B2 Wire bonding method and apparatus for electromagnetic interference shielding
Apparatuses relating generally to a microelectronic package having protection from electromagnetic interference are disclosed. In an apparatus thereof, a platform has an upper surface and a lower surface opposite the upper surface and has a ground plane. A microelectronic device is coupled to the upper surface of the platform. Wire bond wires are coupled to the ground plane with a pitch. The wire bond wires extend away from the upper surface of the platform with upper ends of the wire bond wires extending above an upper surface of the microelectronic device. The wire bond wires are spaced apart from one another to provide a fence-like perimeter to provide an interference shielding cage. A conductive layer is coupled to at least a subset of the upper ends of the wire bond wires for electrical conductivity to provide a conductive shielding layer to cover the interference shielding cage.
US09935071B1 Semiconductor package with lateral bump structure
A semiconductor package includes a semiconductor device having an upper surface and a side, wherein the upper surface and the side form a corner of the semiconductor device. The semiconductor package also includes a lateral bump structure disposed on the side and implementing a lateral signal path of the semiconductor device. The semiconductor package further includes a vertical bump structure disposed over the upper surface and implementing a vertical signal path of the semiconductor device.
US09935070B2 Interconnect structures and methods of forming same
Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is an interconnect structure including a post-passivation interconnect (PPI) over a first substrate and a conductive connector on the PPI. The interconnect structure further includes a molding compound on a top surface of the PPI and surrounding a portion of the conductive connector, a top surface of the molding compound adjoining the conductive connector at an angle from about 10 degrees to about 60 degrees relative to a plane parallel with a major surface of the first substrate, the conductive connector having a first width at the adjoining top surface of the molding compound, and a second substrate over the conductive connector, the second substrate being mounted to the conductive connector.
US09935069B2 Reducing solder pad topology differences by planarization
A technique is disclosed for causing the top surfaces of solder bumps on a chip to be in the same plane to ensure a more reliable bond between the chip and a substrate. The chip is provided with solder pads that may have different heights. A dielectric layer is formed between the solder pads. A relatively thick metal layer is plated over the solder pads. The metal layer is planarized to cause the top surfaces of the metal layer portions over the solder pads to be in the same plane and above the dielectric layer. A substantially uniformly thin layer of solder is deposited over the planarized metal layer portions so that the top surfaces of the solder bumps are substantially in the same plane. The chip is then positioned over a substrate having corresponding metal pads, and the solder is reflowed or ultrasonically bonded to the substrate pads.
US09935067B2 Methods of forming connector pad structures, interconnect structures, and structures thereof
Methods of forming connector pad structures, interconnect structures, and structures thereof are disclosed. In some embodiments, a method of forming a connector pad structure includes forming an underball metallization (UBM) pad, and increasing a surface roughness of the UBM pad by exposing the UBM pad to a plasma treatment. A polymer material is formed over a first portion of the UBM pad, leaving a second portion of the UBM pad exposed.
US09935066B2 Semiconductor package having a substrate structure with selective surface finishes
The present disclosure relates to a semiconductor package having a substrate structure with selective surface finishes, and a process for making the same. The disclosed semiconductor package includes a substrate body, a first metal structure having a first finish area and a second finish area, a second metal structure having a third finish area, a surface finish, and a tuning wire. The first metal structure and the second metal structure are formed over the substrate body. The surface finish is provided over the first finish area of the first metal structure and at least a portion of the third finish area of the second metal structure. The surface finish is not provided over the second finish area of the first metal structure. The tuning wire is coupled between the first finish area and at least one portion of the third finish area.
US09935065B1 Radio frequency device packages and methods of formation thereof
A semiconductor device package includes an integrated circuit chip comprising a radio frequency device. The radio frequency device includes active circuitry at a first surface of the integrate circuit chip. An antenna substrate is disposed over the first surface of the integrated circuit. The antenna substrate includes a first conductive layer disposed over the first surface of the integrated circuit chip. The first conductive layer includes a first transmission line electrically coupled to the integrated circuit chip. A first laminate layer is disposed over the first conductive layer. The first laminate layer overlaps a first part of the first transmission line. A second conductive layer is disposed over the first laminate layer. The second conductive layer includes a first opening overlapping a second part of the first transmission line. A second laminate layer is disposed over the second conductive layer. A first antenna is disposed over the second laminate layer and overlaps the first opening, the second part of the first transmission line, and the integrated circuit chip.
US09935063B2 Rlink-on-die inductor structures to improve signaling
Integrated circuit (IC) chip “on-die” inductor structures (systems and methods for their manufacture) may improve signaling from a data signal circuit to a surface contact of the chip. Such inductor structures may include a first data signal inductor having (1) a second end electrically coupled to an electrostatic discharge (ESD) circuit and a capacitance value of that circuit, and (2) a first end electrically coupled to a the data signal surface contact and to a capacitance value at that contact; and a second data signal inductor having (1) a second end electrically coupled to the data signal circuit and a capacitance value of that circuit, (2) a first end electrically coupled to the second end of the first data signal inductor, and to the capacitance value of the ESD circuit. Inductor values of the first and second inductors may be selected to cancel out the capacitance values to improve signaling.
US09935062B2 Backside fib probing detector in a forward and reverse body biasing architecture
An integrated circuit including a plurality of first semiconductor strips of a first conductivity type and of second semiconductor strips of a second conductivity type arranged in alternated and contiguous fashion on a region of the second conductivity type, including for each of the first strips: a plurality of bias contacts; for each bias contact, a switch capable of applying a potential on the bias contact; two detection contacts arranged at the ends of the first strip; and a detection circuit having its activation causing the turning off of the switches and the comparison with a threshold of the resistance between the detection contacts.
US09935060B2 Method for processing a wafer and wafer structure
A method for processing a wafer in accordance with various embodiments may include: removing wafer material from an inner portion of the wafer to form a structure at an edge region of the wafer to at least partially surround the inner portion of the wafer, and printing material into the inner portion of the wafer using the structure as a printing mask. A method for processing a wafer in accordance with various embodiments may include: providing a carrier and a wafer, the wafer having a first side and a second side opposite the first side, the first side of the wafer being attached to the carrier, the second side having a structure at an edge region of the wafer, the structure at least partially surrounding an inner portion of the wafer; and printing material onto at least a portion of the second side of the wafer.
US09935059B2 Wafer structure, fabrication method, and spray apparatus
A wafer structure and a method for fabricating the wafer structure, and a spray apparatus are provided. An exemplary method for forming the wafer structure includes providing a wafer having a central region and a peripheral region surrounding the central region; forming an interlayer dielectric layer on a surface of the wafer in the central region not in the peripheral region; forming a buffer layer on the surface of the wafer in the peripheral region not in the central region; and forming a glue layer on the interlayer dielectric layer and the buffer layer. The buffer layer is used to reduce the lattice mismatch between the wafer and the glue layer; and reduce the stress between the wafer and the glue layer.
US09935057B2 Multiple driver pin integrated circuit structure
An integrated circuit (IC) structure includes a plurality of driver pins at a driver pin level and oriented in a driver pin direction. Each layer of a plurality of layers of metal segment arrays includes two parallel metal segments oriented in a layer direction. The layer direction of a lowermost layer is perpendicular to the driver pin direction, and the layer direction of each additional layer is perpendicular to the layer direction of a layer immediately below the additional layer. The IC structure also includes a plurality of via arrays, each via array including two vias positioned at locations where one or more metal segments of a corresponding overlying layer overlap one or more of the two metal segments of a layer immediately below the via array or the plurality of driver pins.
US09935055B2 Methods of manufacturing a semiconductor device by forming a separation trench
A method of manufacturing a semiconductor device includes forming a separation trench into a first main surface of a semiconductor substrate and removing substrate material from a second main surface of the semiconductor substrate, so as to thin the substrate to a thickness of less than 100 μm, the second main surface being opposite to the first main surface, so as to uncover a bottom side of the trench. Additional methods of manufacturing semiconductor devices are provided.
US09935054B2 Mark forming method, mark detecting method, and device manufacturing method
A mark forming method includes: exposing a wafer with a mask image to form first and second resist marks that have different shapes than one another based on a portion of the mask image; applying a polymer layer that contains a block copolymer to the wafer by spin-coating; forming self-assembled regions in the applied polymer layer; selectively removing a portion of the self-assembled regions; and forming first and second wafer marks on the wafer using the first and second resist marks. This makes it possible to form the marks when forming circuit patterns using self-assembly of a block copolymer.
US09935053B2 Electronic component integrated substrate
An electronic component integrated substrate includes a first substrate including a first pad, a first solder resist layer provided with a first open portion that selectively exposes the first pad, and a connection pad formed on the first solder resist layer, and electrically connected to the first pad; a second substrate, stacked on the first substrate, including a second pad, and a second solder resist layer formed on the second pad and provided with a second open portion that selectively exposes the second pad; an electronic component mounted on the first substrate and sandwiched between the first substrate and the second substrate; and a substrate connection member that electrically connects the connection pad and the second pad with each other, the diameter of the connection pad being larger than each of the diameter of the first pad and the diameter of the second open portion.
US09935052B1 Power line layout in integrated circuits
Circuitry having power lines with comparable path resistances may include input-output blocks in an integrated circuit (IC) that are coupled to respective sets of bumps on the IC. The circuitry may have a core region and a periphery region. Groups of input-output blocks may be formed in the periphery region. A first set of power lines in the circuitry extends from the core region to the first group of input-output blocks whereas a second set of power lines in the circuitry extends from the core region to the second group of input-output blocks. The first and second sets of power lines are physically separate from each other.
US09935046B1 Package device and manufacturing method thereof
A package device and a method for fabricating thereof are provided. The package device includes a substrate, a redistribution structure, a circuit board structure, a plurality of first connectors and a first electronic component. The redistribution structure is disposed over the substrate. The redistribution structure includes a first dielectric layer and a first metal layer. The circuit board structure disposed over the redistribution structure. The circuit board structure includes a second dielectric layer and a second metal layer. The second dielectric layer of the circuit board structure has a plurality of protrusions embedded in the first dielectric layer of the redistribution structure. A first electronic component is disposed on the redistribution structure, and the first connectors are interposed between the redistribution structure and the first electronic component to interconnect the two.
US09935045B2 Semiconductor device and method of forming cantilevered protrusion on a semiconductor die
A semiconductor device has a first semiconductor die with a base material. A covering layer is formed over a surface of the base material. The covering layer can be made of an insulating material or metal. A trench is formed in the surface of the base material. The covering layer extends into the trench to provide the cantilevered protrusion of the covering layer. A portion of the base material is removed by plasma etching to form a cantilevered protrusion extending beyond an edge of the base material. The cantilevered protrusion can be formed by removing the base material to the covering layer, or the cantilevered protrusion can be formed within the base material under the covering layer. A second semiconductor die is disposed partially under the cantilevered protrusion. An interconnect structure is formed between the cantilevered protrusion and second semiconductor die.
US09935043B1 Interconnection substrate and semiconductor package
An interconnection substrate includes a first insulating layer, and an interconnection structure formed on the first insulating layer, wherein the interconnection structure includes an interconnection pattern having a first metal layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer, and a fourth metal layer covering an upper surface and side surface of the interconnection pattern, wherein an outer perimeter of the second metal layer protrudes at the side surface of the interconnection pattern to form a first protrusion, and the fourth metal layer has a second protrusion that protrudes at a side surface of the interconnection structure at a position corresponding to the first protrusion.
US09935042B2 Semiconductor package, smart card and method for producing a semiconductor package
A semiconductor package includes a chip, a layer which is thermally coupled to the chip and which is formed from a material having a triggering temperature of greater than or equal to 200° C., starting from which an exothermic reaction takes place, and encapsulating material which at least partly covers the chip and the layer. The layer is configured in such a way and is arranged relative to the chip in such a way that, in the case of a triggered exothermic reaction of the material of the layer, at least one component of the chip is damaged on account of the temperature increase caused by the exothermic reaction.
US09935037B2 Multi-stacked device having TSV structure
A multi-stacked device includes a lower device having a lower substrate, a first insulating layer on the lower substrate, and a through-silicon-via (TSV) pad on the first insulating layer, an intermediate device having an intermediate substrate, a second insulating layer on the intermediate substrate, and a first TSV bump on the second insulating layer, an upper device having an upper substrate, a third insulating layer on the upper substrate, a second TSV bump on the third insulating layer, and a TSV structure passing through the upper substrate, the third insulating layer, the second insulating layer, and the intermediate substrate to be connected to the first TSV bump, the second TSV bump, and the TSV pad. An insulating first TSV spacer between the intermediate substrate and the TSV structure and an insulating second TSV spacer between the upper substrate and the TSV structure are spaced apart along a stacking direction.
US09935035B1 Fluid cooled trace/via hybrid structure and method of manufacture
An interposer structure including a dielectric base material, and a metal based interconnect structure extending through the dielectric base material from a first side of the dielectric base material to an opposing second side of the dielectric base material. At least one metal line of the metal based interconnect structure extends from the first side of the dielectric base material to the second side of the dielectric base material and has a first non-linear portion. A fluidic passage extends through the dielectric base material, wherein the fluidic passage has a second non-linear portion.
US09935033B2 Heat sink coupling using flexible heat pipes for multi-surface components
An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second heat exchanger disposed in the opening on the at least one secondary device; at least one heat pipe coupled to the first heat exchanger and the second heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including a first portion, a second portion and at least one heat pipe coupled to the first portion and the second portion; and coupling the heat exchanger to the multi-chip package.
US09935030B2 Resin-encapsulated semiconductor device
A first resin encapsulated body and a second resin encapsulated body are stacked to form a resin-encapsulated semiconductor device. The first resin encapsulated body includes: a first semiconductor element; an external terminal; inner wiring; and a first resin for covering those components, at least a rear surface of the external terminal, a rear surface of the semiconductor element, and a surface of the inner wiring are exposed from the first resin. The second resin encapsulated body includes: a second semiconductor element having an electrode pad formed on a surface thereof; a second resin for covering the second semiconductor element; and a metal body connected to the electrode pad, and is partly exposed from the second resin. The inner wiring and the metal body are electrically connected to each other.
US09935026B2 Air-cavity package with dual signal-transition sides
The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, and a top electronic component. The bottom substrate includes a bottom signal via extending through the bottom substrate and the top substrate includes a top signal via extending through the top substrate. The perimeter wall extends between a periphery of the top substrate and a periphery of the bottom substrate to form a cavity. The bottom electronic component is mounted on the bottom substrate, exposed to the cavity, and electrically coupled to the bottom signal via. The top electronic component is mounted on the top substrate, exposed to the cavity, and electrically coupled to the top signal via.
US09935023B2 Methods for manufacturing semiconductor device and for detecting end point of dry etching
A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.
US09935021B2 Method for evaluating a semiconductor wafer
A method for evaluating a semiconductor wafer including preparing a reference wafer in which contamination element and amount of contamination are known, forming a plurality of cells including p-n junctions on the reference wafer, measuring junction leakage currents in the plurality of cells on the reference wafer to acquire a distribution of the junction leakage currents of the reference wafer, associating the distribution of the junction leakage currents of the reference wafer with a contamination element, forming a plurality of cells including p-n junctions on a wafer to be measured, measuring junction leakage currents in the plurality of cells on the wafer to be measured to acquire a distribution of the junction leakage currents of the wafer to be measured, and identifying a contamination element of the wafer to be measured based on the association.
US09935019B2 Method of fabricating a transistor channel structure with uniaxial strain
Method for creation of stressed channel structure transistors wherein at least one amorphizing ion implantation of the surface layer of a substrate of the semiconductor-on-insulator type is carried out through openings in a mask, so as to render zones of the surface layers amorphous and to induce relaxation of a zone intended to form a channel and located between the zones that have been rendered amorphous, the relaxation being carried out in a direction orthogonal to that in which it is intended that the channel current flows.
US09935016B2 Silicon and silicon germanium nanowire formation
Among other things, one or semiconductor arrangements, and techniques for forming such semiconductor arrangements are provided. For example, one or more silicon and silicon germanium stacks are utilized to form PMOS transistors comprising germanium nanowire channels and NMOS transistors comprising silicon nanowire channels. In an example, a first silicon and silicon germanium stack is oxidized to transform silicon to silicon oxide regions, which are removed to form germanium nanowire channels for PMOS transistors. In another example, silicon and germanium layers within a second silicon and silicon germanium stack are removed to form silicon nanowire channels for NMOS transistors. PMOS transistors having germanium nanowire channels and NMOS transistors having silicon nanowire channels are formed as part of a single fabrication process.
US09935013B2 Flexible device modulation by oxide isolation structure selective etching process
A semiconductor device with an increased effective gate length or an increased effective channel width, and a method of forming the same are provided. The effective gate length or the effective channel width of the device is increased by lowering a top surface of an oxide isolation structure below the gate of the semiconductor device.
US09935012B1 Methods for forming different shapes in different regions of the same layer
Disclosed are methods of forming different shapes in different regions of a specific layer. In the methods, a first mask layer and an etch process are used to form first shapes in a first region. Subsequently, a second mask layer and additional etch process(es) are used to form second shapes in a second region. However, before the second shapes are formed, a sacrificial layer of a degradable material is deposited onto the first mask layer and within openings in the specific layer surrounding the first shapes, thereby protecting the first shapes during formation of the second shapes. After the second shapes are formed, the material of the sacrificial layer is degraded (e.g., oxidized, volatilized, burned-off, etc.) so as to selectively remove that material from surfaces of the first mask layer and the specific layer without impacting the profiles of either the first shapes or the second shapes.
US09935009B2 IR assisted fan-out wafer level packaging using silicon handler
A support structure for use in fan-out wafer level packaging is provided that includes, a silicon handler wafer having a first surface and a second surface opposite the first surface, a release layer is located above the first surface of the silicon handler wafer, and a layer selected from the group consisting of an adhesive layer and a redistribution layer is located on a surface of the release layer. After building-up a fan-out wafer level package on the support structure, infrared radiation is employed to remove (via laser ablation) the release layer, and thus remove the silicon handler wafer from the fan-out wafer level package.
US09935008B2 Semiconductor device chip manufacturing method
Disclosed herein is a semiconductor device chip manufacturing method including a chipping prevention layer forming step of forming a chipping prevention layer at each intersection of a plurality of crossing division lines formed on the front side of a wafer, a modified layer forming step of applying a laser beam having a transmission wavelength to the wafer to the back side thereof along each division line in the condition where the focal point of the laser beam is set inside the wafer, thereby forming a modified layer inside the wafer along each division line, and a dividing step of grinding the back side of the wafer after performing the modified layer forming step, thereby reducing the thickness of the wafer and also dividing the wafer into individual semiconductor device chips along each division line where the modified layer is formed as a break start point.
US09935000B2 Slit stress modulation in semiconductor substrates
A disclosed example to modulate slit stress in a semiconductor substrate includes controlling a first process to apply a first material to a semiconductor substrate. The semiconductor substrate includes a slit between adjacent stacked transistor layers. The first material coats walls of the slit to reduce a first width of the slit between the adjacent stacked transistor layers to a second width. A second process is controlled to apply a second material to the semiconductor substrate. The second material is to be deposited in the second width of the slit. The first material and the second material are to form a solid structure in the slit between the adjacent stacked transistor layers.
US09934998B2 Semiconductor device and method of singulating thin semiconductor wafer on carrier along modified region within non-active region formed by irradiating energy
A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier with the adhesive disposed around the plurality of bumps. Irradiated energy is applied to the non-active region to form a modified region within the non-active region. The semiconductor wafer is singulated along the modified region to separate the semiconductor die. The semiconductor wafer is singulated along the modified region by applying stress to the semiconductor wafer. The adhesive is removed from around the plurality of bumps after singulating the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die comprising through silicon vias. The modified region optionally includes a plurality of vertically stacked modified regions.
US09934997B2 Adhesive sheet and method of manufacturing electronic component
An adhesive sheet is provided that is capable of inhibiting scraping up of an adhesive in the dicing step, does not cause chip detachment during dicing processing, facilitates picking up, and does not readily develop adhesive transfer. According to the present invention, an adhesive sheet is provided that comprises a substrate film and an adhesive layer laminated on the film, wherein the adhesive layer contains 100 parts by mass of a (meth)acrylate copolymer, from 5 to 250 parts by mass of a photopolymerizable compound, from 20 to 160 parts by mass of a softener, from 0.1 to 30 parts by mass of a curing agent, and from 0.1 to 20 parts by mass of a photopolymerization initiator, and the photopolymerizable compound has a weight average molecular weight from 40,000 to 220,000.
US09934995B2 Method for manufacturing a handle substrate for the temporary bonding of a substrate
This process includes steps: a) providing a carrier substrate including a receiving face; b) depositing a nonstick coating on the receiving face, the nonstick coating including a central region and a peripheral region; and c) trimming the carrier substrate so as to remove the peripheral region of the nonstick coating and to form a recess on the periphery of the carrier substrate, in order to obtain the handle wafer. Also relates to a process for temporarily bonding a substrate to a handle wafer fabricated using the process described above. Furthermore relates to a handle wafer fabricated using the process described above.
US09934986B2 Method of forming fine patterns
Provided is a method of forming fine patterns, which is capable of easily forming a plurality of patterns repeatedly with a fine pitch when forming patterns necessary for manufacturing a highly integrated semiconductor device exceeding a resolution limit of a photolithography process.
US09934984B2 Hydrofluorocarbon gas-assisted plasma etch for interconnect fabrication
In one embodiment, a method for hydrofluorocarbon gas-assisted plasma etch for interconnect fabrication includes providing a layer of a dielectric material and etching a trench in the layer of the dielectric material, by applying a mixture of an aggressive dielectric etch gas and a polymerizing etch gas to the layer of the dielectric material. In another embodiment, an integrated circuit includes a plurality of semiconductor devices and a plurality of conductive lines connecting the plurality of semiconductor devices. A pitch of the plurality of conductive lines is approximately twenty-eight nanometers.
US09934981B2 Techniques for processing substrates using directional reactive ion etching
A method of treating a substrate includes directing ions to the substrate along at least one non-zero angle with respect to a perpendicular to a substrate surface in a presence of a reactive ambient containing a reactive species where the substrate includes a surface feature. At least one surface of the surface feature is etched using the ions in combination with the reactive ambient at a first etch rate that is greater than a second etch rate when the ions are directed to the substrate without the reactive ambient and greater than a third etch rate when the reactive ambient is provided to the substrate without the ions.
US09934979B2 Gas distribution showerhead for inductively coupled plasma etch reactor
A two piece ceramic showerhead includes upper and lower plates which deliver process gas to an inductively coupled plasma processing chamber. The upper plate overlies the lower plate and includes radially extending gas passages which extend inwardly from an outer periphery of the upper plate, axially extending gas passages in fluid communication with the radially extending gas passages and an annular recess forming a plenum between the upper and lower plates. The lower plate includes axially extending gas holes in fluid communication with the plenum. The upper plate can include eight radially extending gas passages evenly spaced around the periphery of the upper plate and the lower plate can include inner and outer rows of gas holes. The two piece ceramic showerhead forms a dielectric window of the chamber through which radiofrequency energy generated by an antenna is coupled into the chamber. A gas delivery system delivers process gas to a plenum between the upper and lower plates having a gas volume of no greater than 500 cm3. The gas holes in the lower plate extend between the plenum and a plasma exposed yttria coated surface of the lower plate. The gas delivery system is operable to supply an etching gas and a deposition gas into the processing chamber such that the etching gas in the plenum can be replaced with the deposition gas within about 200 milliseconds and vice versa.
US09934974B2 Microwave plasma device
A processing system is disclosed, having a power transmission element with an interior cavity that propagates electromagnetic energy proximate to a continuous slit in the interior cavity. The continuous slit forms an opening between the interior cavity and a substrate processing chamber. The electromagnetic energy may generate an alternating charge in the continuous slit that enables the generation of an electric field that may propagate into the processing chamber. The electromagnetic energy may be conditioned prior to entering the interior cavity to improve uniformity or stability of the electric field. The conditioning may include, but is not limited to, phase angle, field angle, and number of feeds into the interior cavity.
US09934969B2 Charged-particle-beam patterning without resist
A process for fabricating an integrated circuit is provided. The process includes providing a substrate, forming a hard mask upon the substrate by one of atomic-layer deposition and molecular-layer deposition, and exposing the hard mask to a charged particle from one or more charged particle beams to pattern a gap in the hard mask. In the alternative, the process includes exposing the hard mask to a charged particle from one or more charged-particle beams to pattern a structure on the hard mask.
US09934967B2 Formation of devices by epitaxial layer overgrowth
Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping and epitaxial layer overgrowth. A method includes forming an opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semiconductor material lattice-mismatched to the first semiconductor material, is formed within the opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer.
US09934966B2 Method for processing a carrier and an electronic component
In various embodiments, a method for processing a carrier is provided. The method for processing a carrier may include: forming a first catalytic metal layer over a carrier; forming a source layer over the first catalytic metal layer; forming a second catalytic metal layer over the source layer, wherein the thickness of the second catalytic metal layer is larger than the thickness of the first catalytic metal layer; and subsequently performing an anneal to enable diffusion of the material of the source layer forming an interface layer adjacent to the surface of the carrier from the diffused material of the source layer.
US09934963B2 Multilayer dielectric structures with graded composition for nano-scale semiconductor devices
Multilayer dielectric structures are provided with graded composition. For example, a multilayer dielectric structure includes a stack of dielectric films, wherein the dielectric films include at least a first SiCNO (silicon carbon nitride oxide) film and a second SiCNO film. The first SiCNO film has a first composition profile of C, N, and O atoms. The second SiCNO film has a second composition profile of C, N, and O atoms, which is different from the first composition profile of C, N, and O atoms. The composition profiles of C, N and/or O atoms of the constituent dielectric films of the multilayer dielectric structure are customized to enhance or otherwise optimize one or more electrical and/or physical properties of the multilayer dielectric structure.
US09934962B2 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device includes a process of forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes: supplying a precursor containing a predetermined element to the substrate; supplying a first reactant containing nitrogen and carbon to the substrate; supplying a second reactant containing nitrogen to the substrate; and supplying a third reactant containing oxygen to the substrate, wherein in the cycle, a supply amount of the second reactant is set to be smaller than a supply amount of the first reactant.
US09934956B2 Time multiplexed chemical delivery system
A gas delivery system delivers different process gas compositions to a common supply line at specified times. Multiple reservoirs are fluidly connected to the common supply line with each reservoir having its own charge control valve for controlling connection of the reservoir to the common supply line. Each of the multiple reservoirs has a corresponding mass flow controller and delivery control valve connected to control flow of process gas from within the reservoir to a process module at specified times. The common supply line is operated to fill the multiple reservoirs with different process gas compositions in a time-divided manner. The mass flow controllers and delivery control valves of the multiple reservoirs are operated to deliver one or more process gas compositions to the process module in an accurately timed manner in accordance with a prescribed schedule. The multiple reservoirs are filled as needed to satisfy the prescribed schedule.
US09934955B2 Incandescent lamp
An incandescent lamp is provided which prevents disconnection of a coupling part between a filament and a lead wire and also which improves impact resistance. A lead wire 4 has, in a standing portion 11 inside of a bulb 2, a first zone 19a to a third zone 19c in order from a top. The third zone 19c further penetrates through a pinch seal part 3 while firmly fixed thereto. The first zone 19a and the second zone 19b are formed of materials consisting primarily of molybdenum and nickel, respectively. The third zone 19c is formed of a Dumet wire 29.
US09934952B2 Charged-particle detector and method of controlling the same
The present embodiment relates to a charged-particle detector, etc. provided with a structure for effectively suppressing ion feedbacks under a low-vacuum environment. In order to capture the residual-gas ions, which are generated by collisions between the electrons output from a MCP unit 200 and residual-gas molecules, by a second electrode 400, which is electrically insulated from a first electrode 300, which is mainly for capturing electrons, the potential of the first electrode 300 is set to be higher than an output-side potential of the MCP unit 200, and, on the other hand, the potential of the second electrode 400 is set to be lower than the output-side potential of the MCP unit 200. As a result, the ion feedbacks to the MCP unit 200 are effectively suppressed.
US09934948B2 Magnetron-sputtering coating system and method, and display substrate
It is provided a magnetron-sputtering coating system including a sputtering chamber. The sputtering chamber therein includes: a set of target, formed by concatenating a plurality pieces of target; a substrate carrier, arranged to be opposite to the target set, and support a substrate to be coated with a film; and a driving device, arranged to drive the substrate carrier to reciprocate in a direction of the arrangement of the target.
US09934947B2 Plasma processing apparatus and waveform correction method
A plasma processing apparatus includes an electrode to which a high frequency for plasma generation is applied and which serves as a mounting table for a target object. The plasma processing apparatus further includes a high frequency generation unit, a distortion component extraction unit and a waveform correction unit. The high frequency generation unit generates the high frequency by using waveform data including a set frequency component having a predetermined frequency. The distortion component extraction unit extracts a distortion component given to the high frequency in a path for transmitting the high frequency generated by the high frequency generation unit to the electrode. The waveform correction unit corrects the waveform data by combining an antiphase component obtained by inverting a phase of the distortion component and the set frequency component of the waveform data used for generation of the high frequency.
US09934944B2 Plasma induced flow electrode structure, plasma induced flow generation device, and method of manufacturing plasma induced flow electrode structure
In one embodiment, a plasma induced flow electrode structure has an electrode block, an insulating layer and an electrode layer. The electrode block has first and second surfaces and through holes penetrating between these first and second surfaces. The insulating layer is disposed on the first surface and inside the through holes. The electrode layer is disposed on the insulating layer of the first surface.
US09934943B2 Beam grid layout
A sub-beam aperture array for forming a plurality of sub-beams from one or more charged particle beams. The sub-beam aperture array comprises one or more beam areas, each beam area comprising a plurality of sub-beam apertures arranged in a non-regular hexagonal pattern, the sub-beam apertures arranged so that, when projected in a first direction onto a line parallel to a second direction, the sub-beam apertures are uniformly spaced along the line, and wherein the first direction is different from the second direction. The system further comprises a beamlet aperture array with a plurality of beamlet apertures arranged in one or more groups. The beamlet aperture array is arranged to receive the sub-beams and form a plurality of beamlets at the locations of the beamlet apertures of the beamlet array.
US09934942B1 Chamber with flow-through source
Described processing chambers may include a chamber housing at least partially defining an interior region of a semiconductor processing chamber. The chamber may include a showerhead positioned within the chamber housing, and the showerhead may at least partially divide the interior region into a remote region and a processing region in which a substrate can be contained. The chamber may also include an inductively coupled plasma source positioned between the showerhead and the processing region. The inductively coupled plasma source may include a conductive material within a dielectric material.
US09934941B2 Etching apparatus and etching method
According to one embodiment, an etching apparatus includes a stage in an etching chamber, the stage which holds one of a first substrate and a second substrate, a plasma generator in the etching chamber, the plasma generator which is opposite to the stage and irradiates an ion beam toward the stage, a grid which is provided between the plasma generator and the stage, a supporter supporting the stage, the supporter having a rotational axis in a direction in which the ion beam is irradiated, a controller which is configured to mount the first substrate on the stage and irradiate the ion beam with the beam angle larger than 0° to the first substrate, when an elapsed time from an end of an etching of a predetermined layer in the second substrate is equal to or larger than a predetermined time.
US09934936B2 Charged particle microscope with special aperture plate
A Charged Particle Microscope includes A specimen holder, for holding a specimen; A source, for producing a beam of charged particles; An illuminator, for directing said beam so as to irradiate the specimen; and A detector, for detecting a flux of radiation emanating from the specimen in response to said irradiation. The illuminator includes: An aperture plate comprising an aperture region in a path of said beam, for defining a geometry of the beam prior to its impingement upon said specimen. The aperture region includes a distribution of multiple holes, each of which is smaller than a diameter of the beam incident on the aperture plate.
US09934934B2 Electrostatic lens having a dielectric semiconducting membrane
Electrostatic lenses for focusing a beam of charged particles, and in particular an electron beam, are used especially in the electron guns of electron microscopes or electron-beam lithography apparatuses. The present disclosure improves the possibilities for focusing the particle beam, in particular an electron beam emitted by a cathode. The lens comprises at least one conducting electrode having at least one through-opening for the passage of an electron beam. Different electric fields are set up upstream and downstream of the opening. The passage opening is at least partially closed by a planar or curved thin membrane of semi-conducting material that is transparent to electrons and has a high dielectric permittivity. Structuring the membrane (holes or thickened portions of electrodes deposited on the membrane) makes it possible to correct lens aberration defects.
US09934932B2 System and method for multi-source X-ray-based imaging
An imaging module includes a plurality of cathodes and respective gates, each cathode configured to generate a separate beam of electrons directed across a vacuum chamber and each gate matched to at least one respective cathode to enable and disable each separate beam of electrons from being directed across the vacuum chamber. A target anode is fixed within the vacuum chamber and arranged to receive the separate beam of electrons from each of the plurality of cathodes and, therefrom, generate a beam of x-rays. A deflection system is arranged between the plurality of cathodes and the target anode to generate a variable magnetic field to control a path followed by each of the separate beams of electrons to the target anode.
US09934929B1 Hall current plasma source having a center-mounted or a surface-mounted cathode
A miniature Hall current plasma source apparatus having magnetic shielding of the walls from ionized plasma, an integrated discharge channel and gas distributor, an instant-start hollow cathode mounted to the plasma source, and an externally mounted keeper, is described. The apparatus offers advantages over other Hall current plasma sources having similar power levels, including: lower mass, longer lifetime, lower part count including fewer power supplies, and the ability to be continuously adjustable to lower average power levels using pulsed operation and adjustment of the pulse duty cycle. The Hall current plasma source can provide propulsion for small spacecraft that either do not have sufficient power to accommodate a propulsion system or do not have available volume to incorporate the larger propulsion systems currently available. The present low-power Hall current plasma source can be used to provide energetic ions to assist the deposition of thin films in plasma processing applications.
US09934928B2 Source housing assembly for controlling ion beam extraction stability and ion beam current
Provided herein are approaches for improving ion beam extraction stability and ion beam current for an ion extraction system. In one approach, a source housing assembly may include a source housing surrounding an ion source including an arc chamber, the source housing having an extraction aperture plate mounted at a proximal end thereof. The source housing assembly further includes a vacuum liner disposed within an interior of the source housing to form a barrier around a set of vacuum pumping apertures. As configured, openings in the source housing assembly, other than an opening in the extraction aperture plate, are enclosed by the extraction aperture plate and the vacuum liner, thus ensuring appendix arcs or extraneous ions produced outside the arc chamber remain within the source housing. Just those ions produced within the arc chamber exit the source housing through the opening of the extraction aperture plate.
US09934927B1 Infrared light generating system
A system for generating infrared light includes a sealed housing and a noble gas filling the housing. A window disposed in a wall of the housing is transparent to infrared radiation. Two electrodes, disposed in the housing, are aligned along a common longitudinal axis adapted to be approximately perpendicular to a local force of gravity. A gap is defined between the electrodes along the longitudinal axis. Obstruction(s), disposed in the housing adjacent to the gap between the electrodes, extend along the length of the gap. The obstruction(s) define a convection space between the electrodes. The convection space has a dimension, measured perpendicular to the longitudinal axis, in the range of 2 to 10 times the length of the gap. An electric current source is coupled to the electrodes.
US09934925B2 Fuse structures and forming and operation methods thereof
Fuse structures and forming and operation methods thereof are disclosed. One of the fuse structures includes a dielectric strip and a fuse strip extending in different directions. The dielectric strip is sandwiched by a first conductive strip and a second conductive strip. The fuse strip is insulated from each of the first conductive strip and the second conductive strip and has a blowing region corresponding to the dielectric strip.
US09934924B2 Bistable relay and bistable actuator
A bistable relay and a bistable actuator are provided. The bistable actuator includes a magnetic latching mechanism and an electromagnet. The magnetic latching mechanism includes a rotation shaft, a pillar-shaped permanent magnet, a columnar hollow magnetic conductor and two shells, and operates between a first and second stable states. The columnar hollow magnetic conductor surrounds the pillar-shaped permanent magnet wrapping the rotation shaft, and maintains a gap with the pillar-shaped permanent magnet. The electromagnet is connected to the columnar hollow magnetic conductor for driving the pillar-shaped permanent magnet to rotate, so as to switch the magnetic latching mechanism to the stable state. During a process that the magnetic latching mechanism is switched to the stable state, the rotation shaft rotates synchronously along with the magnetic latching mechanism to drive an impact system to move relative to a contact system, so as to contact or disconnect the contact points.
US09934923B2 Relay with integral phase controlled switching
A relay circuit includes a power supply to apply an AC input line voltage to the relay circuit, a relay coil and at least one pair of contacts actuated by the relay coil. A zero cross detection circuit and a control logic circuit for the relay circuit are also disclosed. The control logic circuit determines a zero crossover point in response to an output signal from the zero crossover detection circuit, and controls a relay coil to actuate the relay contacts to switch a load at the zero crossover point of a load current when the load is connected to the at least one pair of relay contacts, such that the voltage and current across the relay contacts is zero.
US09934922B2 Commutator structure comprising several channels of phase change material and interdigitated control electrodes
RF commutator including: a phase change material (7) arranged between a first conducting element (2) and a second conducting element (4), means of heating (11, 13) the phase change material provided with a first electrode (11) and a second electrode (13), the means of heating being capable of modifying the state of the phase change material (7) by injection of an electrical activation signal between the first electrode and the second electrode, at least one given electrode (11, 13) among the first electrode (11) and second electrode (13) comprising a conducting part (15a) arranged between the first conducting element (2) and the second conducting element (4), zones of the phase change material being laid out between the first conducting element (2) and the second conducting element (4) and being arranged on either side of this conducting part (15a).
US09934919B2 Locking switch assembly and related methods
A control assembly includes a locking device having at least a first mode of operation and a second mode of operation, the locking device configurable to change from the first mode of operation to the second mode of operation. The locking device has a non-contact sensor and a microcontroller. An independent communicator is configured to communicate configuration data to the microcontroller. The microcontroller is configured to change from the first mode of operation to the second mode of operation using configuration data received from the independent communicator.
US09934917B2 Lockable rocker switch, an electrical circuit including such a lockable rocker switch, and methods for unlocking and locking such a lockable rocker switch
A lockable rocker switch includes a fixed part, a rotatable part rotating between a first and a second rotation position, a magnetically actuatable locking component movable between a locking position so as to prevent rotation of rotatable part and a release position, so that rotatable part may rotate. The lockable rocker switch further includes a control component movable onto the rotatable part between a control position, for causing a magnetic action urging the locking component towards the release position, and a rest position, stopping the magnetic action.
US09934914B2 Heart-shaped self-locking button
A heart-shaped self-locking button includes one housing and one push rod. The push rod is slidably arranged within the housing. A heart-shaped structure is formed on the push rod. The button includes one pin and one flexible element. One end of the pin is fixed on the housing, while the other end is fitted with the heart-shaped structure. The flexible element is arranged between the housing and the push rod and presses the pin towards the heart-shaped structure to allow the pin to be in constant contact with the heart-shaped structure. The heart-shaped structure is arranged on the push rod. Also, the flexible element between the housing and the push rod is utilized to press the pin towards the heart-shaped structure on the push rod to allow the pin to be in constant contact with the heart-shaped structure when moving.
US09934907B2 Laminated ceramic electronic component and manufacturing method therefor
An external electrode included in a laminated ceramic electronic component is formed on a ceramic body by baking a conductive paste including a glass component. The ceramic body with the conductive paste applied thereto is subjected to heat treatment under the conditions where the top temperature is 800° C. or higher, and the electromotive force at the top temperature is 600 to 900 mV. In this heat treatment, the glass component in the conductive paste penetrates into grain boundaries between ceramic grains of the ceramic body, and a crystalline substance containing elements constituting the glass component is generated which has dissolving resistance against plating solutions.
US09934900B2 Electronic component for guiding a magnetic field
An electronic component for guiding a magnetic field comprises a core (20) of a magnetizable material, which has at least two spaced-apart legs (11a, 11b) with opposing surfaces (O11a, O11b) separated from one another by a gap (S). The component comprises at least one compressible molding (20), which is arranged compressed in the gap (S), the at least one molding (20) being in contact with the respective surfaces (O11a, O11b) of the at least two spaced-apart legs (11a, 11b).
US09934896B2 Inspection apparatus and inspection system for inspecting access-restricted spaces and areas
This relates to an inspection apparatus for inspecting a structural component to which access is restricted, comprising a movable unit including a superconductor and an inspection device, a drive unit including a magnetic field generator adapted to generate a magnetic field, wherein said movable unit and said drive unit are arranged with a predetermined gap therebetween for receiving said structural component and are coupled in a force-locking manner by means of the frozen magnetic flux, i.e., without a physical connection, between the magnetic field generator and the superconductor. Thus, spaces or areas to which access is restricted can be inspected without the need of physically connecting the drive unit and the movable unit.
US09934895B2 Spiral near field communication (NFC) coil for consistent coupling with different tags and devices
This document discloses one or more systems, apparatuses, methods, etc. for integrating a spiral near field communications (NFC) coil antenna to a portable device for consistent coupling with different tags and devices.
US09934886B1 Stable and easy-to-install and remove multi-conductive core cable and processing method thereof
The present invention discloses a stable and easy-to-install and remove multi-conductive core cable, an outer protective layer and cable inner core wires arranged in an inner cavity of the outer protective layer. The present invention also discloses a method for processing a stable and easy-to-install and remove multi-conductive core cable, and the method comprises the following steps: S1: preparing a traction rope, an outer protective layer of a cable to be threaded and cable inner core wires; S2: fixedly fastening one end of the traction rope to one end of the cable inner core wires, and threading the end with a hook of the traction rope out through an inner cavity of the outer protective layer; S3: fixing the hook by a wire drawing machine or a traction device and performing traction operation on the cable inner core wires; and S4: controlling an traction rate at not more than 3 m/min until end of the threading of the cable inner core wire. A runner mounting groove and an auxiliary runner device are arranged in the inner cavity of the outer protective layer of the cable, so that the cable threading process is facilitated, structural integrity is ensured, and such arrangement is applicable to design of short cables, and security is high and will not be affected after maintenance.
US09934882B2 Amine compound and ionic conductive agent, and electroconductive resin composition
An amine compound and an ionic conductive agent excellent in electroconductivity are provided. By using the amine compound, an electroconductive resin composition suppressed in bleeding and excellent in electroconductivity is provided. The amine compound and the ionic conductive agent have a structure represented by the following general formula (1).
US09934881B2 Non-metallic light conductive wire and its method and application products
The present invention relates to a non-metallic light conductive wire, a composite conductive wire, a special cable, a motor and the like application products made of the conductive wire, and a method of making the composite conductive wire.
US09934880B2 Copper paste composition and its use in a method for forming copper conductors on substrates
This invention relates to a copper thick film paste composition paste comprising copper powder, a Pb-free, Bi-free and Cd-free borosilicate glass frit, ruthenium-based powder, and an organic vehicle. The invention also provides methods of using the copper thick film paste composition to make a copper conductor on a substrate. Typical substrates are selected from the group consisting of aluminum nitride, aluminum oxide and silicon nitride.
US09934876B2 Magnetic field plasma confinement for compact fusion power
In one embodiment, a fusion reactor includes two internal magnetic coils suspended within an enclosure, a center magnetic coil coaxial with the two internal magnetic coils and located proximate to a midpoint of the enclosure, a plurality of encapsulating magnetic coils coaxial with the internal magnetic coils, and two mirror magnetic coil coaxial with the internal magnetic coils. The encapsulating magnetic coils preserve the magnetohydrodynamic (MHD) stability of the fusion reactor by maintaining a magnetic wall that prevents plasma within the enclosure from expanding.
US09934875B2 Integrated circuit and memory device performing boot-up operation
An integrated circuit may include nonvolatile memory suitable for outputting stored data during the boot-up operation, one or more registers suitable for receiving the data output by the nonvolatile memory and storing the received data when the boot-up operation is performed, and one or more internal circuits suitable for operating using the data stored in the one or more registers. In no-update mode, although the boot-up operation is performed, a data update from the nonvolatile memory to the registers may not be performed.
US09934868B2 Methods and apparatuses having strings of memory cells and select gates with double gates
An apparatus, a method, and a system are disclosed. The apparatus includes a string of memory cells coupled to a select gate drain transistor that has a front control gate and a back control gate. The front and back control gates can be coupled together such that they are biased at the same voltage or separate such that they can be biased at different voltages.
US09934867B2 Capacitance coupling parameter estimation in flash memories
A method for capacitance coupling parameter estimation is disclosed. Step (A) of the method determines a plurality of voltages in a plurality of memory cells of a nonvolatile memory in response to a plurality of writes to the memory cells. The voltages are determined in each of a plurality of cases related to inter-cell interference. Step (B) generates a system of equations of a capacitance coupling model in response to the voltages from all of the cases. Step (C) generates one or more parameters in response to the system of equations. The parameters include one or more couplings between a perturbed memory cell and a plurality of neighboring memory cells adjacent to the perturbed memory cell.
US09934866B2 Memory device with defined programming transaction time
This disclosure provides a method of accurately determining expected transaction times associated with flash memory subdivisions, such as devices, blocks or pages. By performing a test transaction to program each bit of each such unit, the maximum expected programming time of each unit may be determined in advance and used for scheduling purposes. For example, in a straightforward implementation, a relatively accurate, empirically measured time limit may be identified and used to efficiently manage and schedule flash memory transactions without awaiting ultimate resolution of attempts to write to a non-responsive page. This disclosure also provides other uses of empirically-measured maximum flash memory transaction times, including via multiple memory modes and prioritized memory; for example, if a high performance mode is desired, low variation in flash memory transaction times may be tolerated, and units not satisfying these principles may be marked relatively quickly.
US09934865B2 Dynamically adjusting read voltage in a NAND flash memory
A NAND flash memory device detects the occurrence of Cell Voltage Distribution Disruption Events (CVDDEs), such as a Partial Block Program (PBP) and Program-Read-Immediate (PM), and provides a way to dynamically adjust read voltage to account for CVDDEs. A read command includes extended addressing bits that are used when a CVDDE has occurred to access registers that indicate an adjustment to read voltage that is needed to accommodate the CVDDE. The read voltage is then dynamically adjusted to accommodate the CVDDE. When the CVDDE is no longer an issue, the read voltage is adjusted to its previous value before the CVDDE.
US09934860B1 Semiconductor memory device and method for driving same
A semiconductor memory device includes first to fourth electrodes; first and second semiconductor members; a first charge storage member provided between the first semiconductor member and the first electrode; a first interconnect connected to the second electrode side of the first semiconductor member and to the fourth electrode side of the second semiconductor member; and a control circuit. The control circuit sets the first interconnect to a floating state, causes a potential of the third electrode side of the second semiconductor member to increase to a first potential, causes the potential of the third electrode to increase to a second potential lower than the first potential, causes the potential of the second electrode to increase to a third potential lower than the first potential, applies a fourth potential lower than the second and the third potentials to the first electrode, and sets the fourth electrode to a floating state.
US09934857B2 Ternary content addressable memories having a bit cell with memristors and serially connected match-line transistors
An example ternary content addressable memory. A bit cell of the memory may include a first memristor that has a first terminal that is connected to a first data line and a second terminal that is selectively connected to a second data line via a first switching transistor. The bit cell may also include a second memristor that has a first terminal that is connected to a third data line and a second terminal that is selectively connected to a fourth data line via a second switching transistor. The bit cell may also include a first match-line transistor and a second match-line transistor that are connected in series between a first rail and a match line, with a gate of the first match-line transistor being connected to the second terminal of the first memristor, and a gate of the second match-line transistor being connected to the second terminal of the second memristor.
US09934853B2 Method and apparatus for reading RRAM cell
The present disclosure relates to a method and apparatus for performing a read operation of an RRAM cell, which applies a non-zero bias voltage to unselected bit-lines and select-lines to increase a read current window without damaging corresponding access transistors. In some embodiments, the method may be performed by activating a word-line coupled to a row of RRAM cells comprising a selected RRAM device by applying a first read voltage to the word-line. A second read voltage is applied to a bit-line coupled to a first electrode of the selected RRAM device. One or more non-zero bias voltages are applied to bit-lines and select-lines coupled to RRAM cells, within the row of RRAM cells, having unselected RRAM devices.
US09934850B2 Accessing memory cells in parallel in a cross-point array
Methods and structures for accessing memory cells in parallel in a cross-point array include accessing in parallel a first memory cell disposed between a first selected column and a first selected row and a second memory cell disposed between a second selected column different from the first selected column and a second selected row different from the first selected row. Accessing in parallel includes simultaneously applying access biases between the first selected column and the first selected row and between the second selected column and the second selected row. The accessing in parallel is conducted while the cells are in a thresholded condition or while the cells are in a post-threshold recovery period.
US09934848B2 Methods for determining the resistive states of resistive change elements
Devices and methods for determining resistive states of resistive change elements in resistive change element arrays are disclosed. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can determine resistive states of resistive change elements by sensing current flow. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can determine resistive states of resistive change elements without the need for in situ selection devices or other current controlling devices. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can reduce the impact of sneak current when determining resistive states of resistive change elements.
US09934843B2 SRAM cell with dynamic split ground and split wordline
An SRAM cell with dynamic split ground (GND) and split wordline (WL) for extreme scaling is disclosed. The memory cell includes a first access transistor enabled by a first wordline to control access to cross coupled inverters by a first bitline. The memory cell further includes a second access transistor enabled by a second wordline to control access to the cross coupled inverters by a second bitline. The memory cell further includes a split ground line comprising a first ground line (GNDL) separated from a second ground line (GNDR). The GNDL is connected to a transistor of a first inverter of the cross coupled inverters and the GNDR is connected to a first transistor of a second inverter of the cross coupled inverters.
US09934842B2 Multiple rank high bandwidth memory
Methods and apparatus related to multiple rank high bandwidth memory are described. In one embodiment, a semiconductor package includes a high bandwidth memory with multiple ranks. Other embodiments are also disclosed and claimed.
US09934841B1 Systems and methods for refreshing data in memory circuits
A memory refreshing circuit implemented on an integrated circuit comprising a memory circuit that stores original data and an algorithmic data generation circuit that generates write addresses and correct data such that the correct data is stored in the memory circuit at locations that are indicated by the write addresses to correct errors in the original data by overwriting the original data with the correct data during a random access mode of operation of the memory circuit.
US09934839B2 Dynamic adjustment of memory cell digit line capacitance
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be used to store a logic state. The capacitance of a digit line of the ferroelectric memory cell may be dynamically increased prior to, and during a portion of, a read operation used to determine a stored logic state of the cell. The capacitance may be increased by leveraging intrinsic capacitance of digit lines of the array—e.g., by shorting one digit line to another digit line. Increasing the capacitance of the digit line may increase the signal on the digit line that is sensed during the read operation.
US09934837B2 Ground reference scheme for a memory cell
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ground reference scheme may be employed in a digit line voltage sensing operation. A positive voltage may be applied to a memory cell; and after a voltage of the digit line of the cell has reached a threshold, a negative voltage may be applied to cause the digit line voltages to center around ground before a read operation. In another example, a first voltage may be applied to a memory cell and then a second voltage that is equal to an inverse of the first voltage may be applied to a reference capacitor that is in electronic communication with a digit line of the memory cell to cause the digit line voltages to center around ground before a read operation.
US09934836B2 Short circuit reduction in an electronic component comprising a stack of layers arranged on a flexible substrate
An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
US09934832B2 Apparatuses and methods for detecting frequency ranges corresponding to signal delays of conductive VIAS
Apparatuses for monitoring a signal on a conductive via are described. An example apparatus includes: a controller, a first conductive via, a second conductive via and an evaluation circuit. The controller provides a clock signal as a first signal. The first conductive via provides a second signal responsive to the first signal. The second conductive via provides a third signal responsive to the second signal. Responsive to the third signal, the evaluation circuit provides an evaluation result signal. The evaluation result signal is indicative of a frequency of the clock signal, based on a delay of the third signal relative to the clock signal. The first conductive via, the second conductive via and the evaluation circuit may be included in an interface die. The evaluation circuit may detect whether a frequency of the first signal is below a first threshold frequency and may further provide the evaluation result signal.
US09934830B2 Multi-communication device in a memory system
In a memory module including a memory device and a filter, the memory device operates with a clock of a reference frequency. The filter receives a multiplexed signal from a host and filters a signal of a frequency band from the multiplexed signal. The frequency band includes the reference frequency and the signal of the frequency band is provided to the memory device.
US09934828B2 Shared sense amplifier and write driver
Systems and methods are provided for a sense amplifier/write driver circuit. A system includes a set of transistors responsive to a memory cell, the set of transistors configured to operate as a sense amplifier in a first mode and to operate as a write driver in a second mode. One or more switches are configured to switch the set of transistors from the first mode to the second mode based on a control signal. Particular transistors of the set of transistors are configured by the one or more switches to amplify and retain data at a pair of input/output nodes for a period of time in the first mode. The particular transistors are further configured by the one or more switches to drive data to the pair of input/output nodes in the second mode.
US09934827B2 DRAM data path sharing via a split local data bus
Provided is memory device and a memory bank, comprising a global data bus, and a local data bus split into two parts, wherein the local data bus is configurable to direct signals to the global data bus. Provided also is a method in which signals are received in a local data bus that is split into two parts, and the signals are directed from the local data bus to the global data bus. Provided also is a computational device comprised of a processor and the memory device.
US09934823B1 Direction indicators for panoramic images
Devices, systems and methods are disclosed for improving a display of panoramic video data by including an angle indicator as a visual representation of a direction of a displayed portion of the panoramic video data relative to a reference location. For example, the angle indicator may illustrate an angle of the displayed portion of the video data relative to a front of the video capture device, using 360 degrees, and the user of the device may specify a desired angle and/or desired portion of the video data to display. In addition, the device may generate video tags including angle information based on the user input. For example, the device may determine the desired angle and/or desired portion of the video data to display and may generate a video tag associating the angle with a timestamp and/or video frame.
US09934821B2 Non-transitory computer-readable storage medium, playback control method, and playback control device
A non-transitory computer-readable storage medium storing a playback control program that causes a computer to perform a process, the process including specifying a plurality of partial videos extracted from a sport video, each of the plurality of partial videos being associated with information indicating a playback start positions and information on a content of sports play indicated by each of the plurality of partial videos, determining a plurality of playback times from the playback start position for each of the plurality of partial videos based on the information on the content corresponding to each of the plurality of partial videos and based on relation information that associates each of a plurality of contents of sports play with playback times, and playing back the plurality of partial videos based on the plurality of determined playback times.
US09934818B1 Automated seamless video loop
Techniques and devices for creating an AutoLoop output video by adding synthetic camera motion to the AutoLoop output video. The AutoLoop output video is created from a set of frames. After generating the AutoLoop output video based on a plurality of loop parameters and at least a portion of the frames, synthetic camera motion is combined with the AutoLoop output video. The synthetic camera loop is based on the subset of the input frames and exhibits some amount of camera motion for the subset of the input frames. Once the synthetic camera loop is generated, the synthetic camera loop and the video loop is combined to enhance the AutoLoop output video.
US09934817B2 System for recording, sharing, and storing audio
Systems, methods, and devices for recording, sharing, and storing an audio segment are provided. A user's audio segment is recorded by a recording device, in response to an audible prompt generated by the recording device. In some embodiments, the recording device provides a signal to the user that a recording session is in progress. Having recorded the audio segment, the recording device provides a reply to the user's recording, simulating a conversation between the recording device and the user. In embodiments, the recording device transfers the recorded audio to a sharing device for playback of the recorded audio segment. Further, the recorded audio segment may be transferred to a storage device, for storage and retrieval of the audio segment at a later date. The components of the recording device may be housed inside a commercial embodiment, such as a stuffed toy, for concealed recording of the user's audio segment.
US09934816B1 Avoiding debris accumulation on tape drive
For avoiding debris accumulation on a tape drive, a processor records a position error signal (PES) value and cumulative head turnaround count for each region of a plurality of regions of a magnetic tape. The processor further selects a first region in which to reverse travel of the magnetic tape relative to a tape head. In response to determining one of the PES value for the first region does not exceed a PES threshold and the cumulative head turnaround count for the first region does not exceed a count threshold, the processor reverses travel of the magnetic tape at the first region. In response to determining the PES value for the first region exceeds the PES threshold and the cumulative head turnaround count for the first region exceeds the count threshold, the processor selects a second region at which to reverse travel of the magnetic tape.
US09934815B2 Optical disc apparatus and optical disc reproduction method
An optical disc apparatus includes a synchronizer that generates a reproduction clock signal synchronized with a reproduction signal of information recorded in an optical disc medium, and generates a digital reproduction signal synchronized with the reproduction clock signal, an adaptive equalizer that generates a post-adaptive-equalization digital reproduction signal, and a maximum likelihood decoder that performs maximum likelihood decoding of the post-adaptive-equalization digital reproduction signal to generate a binary signal. The apparatus also includes an expected waveform generator that generates an expected waveform from the binary signal, a phase-advance waveform generator that generates a phase-advance waveform, a phase-delay waveform generator that generates a phase-delay waveform, and a metric detector that detects a phase error. In the optical disc apparatus, the synchronizer controls the phase of the digital reproduction signal using the phase error.
US09934812B2 Tension feedback for tape tension
A tension feedback signal is generated to reduce tension variation on a tape occurring at a reel frequency. Tension variation information may be obtained and used to generate the tension feedback signal. The tension feedback signal may be combined with a constant tension preset signal. The combined signal may be used to drive a tape reel at a tape reel speed adjusted according to the combined signal.
US09934811B1 Methods for controlling stray fields of magnetic features using magneto-elastic anisotropy
Systems and methods for controlling stray fields of a magnetic feature are provided. One such method can involve selecting a plurality of materials for a magnetic feature, selecting a plurality of additives, combining the plurality of materials for the magnetic feature and the plurality of additives in an electrolyte solution to form a combined solution, adding nitrogen to the combined solution, degassing the combined solution, depositing the combined solution as a thin film on a wafer using pulse plating, and lapping the thin film to form an edge of the magnetic feature. In several embodiments, the magnetic feature is a component of a magnetic transducer such as a writer pole, a reader shield, or a writer shield.
US09934809B2 Magnetic recording medium composition and method of manufacturing magnetic recording medium
The magnetic recording medium composition contains ferromagnetic powder, binder, and a crosslinkable component selected from the group consisting of a component capable of forming a crosslinking structure by a radical reaction, a component capable of forming a crosslinking structure by an ionic reaction, and a component capable of forming a crosslinking structure by a pericyclic reaction, wherein the crosslinkable component contains at least polyester, and the polyester has a weight average molecular weight ranging from 1,000 to 20,000, as well as contains, per molecule, one or more acidic groups, and one or more reactive groups selected from the group consisting of a radical reactive group, an ionic reactive group, and a pericyclic reactive group.
US09934802B2 Hysteresis compensation in a disc drive
Systems and methods for compensating for hysteresis in a disc drive are described. In one embodiment, a method may use an inverse hysteresis model to linearize effects of hysteresis of a microactuator in the disc drive. The hysteresis model may be a Coleman-Hodgdon hysteresis model. The hysteresis of the microactuator may be characterized, and the inverse hysteresis model may be based at least in part on the characterization. The inverse hysteresis model may be used to implement a digital filter. The digital filter may be employed in series with the microactuator to linearize the effects of hysteresis.
US09934801B1 Optically opaque overlay with periodic structures for a waveguide of a heat-assisted magnetic recording slider
An apparatus comprises a slider having an air bearing surface and is configured for heat-assisted magnetic recording. The slider comprises a write pole, a near-field transducer (NFT) proximate the write pole, and an optical waveguide configured to receive light from a light source and couple the light to the NFT. The optical waveguide comprises first and second opposing major surfaces and opposing first and second edges connected to the first and second major surfaces. An optically opaque overlay is disposed on or adjacent one or both of the first and second major surfaces of the optical waveguide. Periodic structures are disposed on a surface of the optically opaque overlay facing the waveguide. The periodic structures are configured to organize stray light emanating from the waveguide for absorption by the optically opaque overlay.
US09934800B1 Plasmonic coupler used with near-field transducer
A waveguide has a first cladding layer surrounding a near-field transducer. A core of the waveguide is disposed on the first cladding layer, and a second cladding layer is disposed on the core opposite the first cladding layer. A coupler is formed of a second plasmonic material and disposed in the waveguide such that a first edge of the coupler is proximate a media-facing surface and a first side of the coupler faces and is spaced apart from a peg of the near-field transducer in a downtrack direction.
US09934798B1 Lateral spin valve reader with vertically-integrated two-dimensional semiconducting channel
A lateral spin valve reader includes a detector located proximate to a bearing surface of the reader, and a spin injector located away from the bearing surface. The lateral spin valve reader also includes a channel that extends from the detector to the spin injector. The channel includes a two-dimensional semiconducting layer that extends from the detector to the spin injector.
US09934796B2 Areal density improvement of perpendicular magnetic recording (PMR) write head by tuning magnetic flux loops
A PMR writer is disclosed wherein magnetic flux return from a magnetic medium to a main pole is substantially greater through a trailing shield structure than through a leading return loop comprised of a leading shield, return path layer (RTP), and back gap connection (BGC). Magnetic impedance is increased between the RTP and main pole in the leading return loop by removing one or more layers in the BGC and replacing with dielectric material and non-magnetic metal to form a dielectric gap between the RTP and main pole. The non-magnetic metal may be Cu that is electrically isolated from coils within the write head. As a result, area density control and bit error rate are improved over a conventional dual write shield (DWS) structure comprising two flux return pathways. Moreover, adjacent track erasure is maintained at a level similar to a DWS design.
US09934795B1 Recording head with first and second coils that induce flux into write pole and shield
A recording head has a near-field transducer at a media-facing surface of the recording head and a write pole on a first side of the near field transducer. A first coil induces a first flux in the write pole. The recording head includes a shield on a second side of the near-field transducer that faces away from the first side. A second coil is proximate the shield and induces a second flux in the shield that controls a field angle of the first flux.
US09934793B2 Method for determining alcohol consumption, and recording medium and terminal for carrying out same
Disclosed are a method for determining whether a person is drunk after consuming alcohol capable of analyzing alcohol consumption in a time domain by analyzing a voice, and a recording medium and a terminal for carrying out same. An alcohol consumption-determining terminal comprises: a voice input unit for generating a voice frame by converting an inputted voice signal and outputting the voice frame; a voiced/unvoiced sound analysis unit for determining whether the voice frame inputted through the voice input unit corresponds to a voiced sound, an unvoiced sound, or background noise; a voice frame energy detection unit for extracting the average energy of voice frames which have been determined as a voiced sound by the voiced/unvoiced sound analysis unit; an interval energy detection unit for detecting the average energy of intervals including a plurality of voice frames which have been determined as voiced sounds; and an alcohol consumption determining unit for determining whether a person is drunk after consuming alcohol by extracting a difference value among the average energy of neighboring intervals which have been detected by the interval energy detection unit, thereby determining whether a person is drunk after consuming alcohol by analyzing the voice signal in a time domain.
US09934790B2 Encoded audio metadata-based equalization
A system for producing an encoded digital audio recording has an audio encoder that encodes a digital audio recording having a number of audio channels or audio objects. An equalization (EQ) value generator produces a sequence of EQ values which define EQ filtering that is to be applied when decoding the encoded digital audio recording, wherein the EQ filtering is to be applied to a group of one or more of the audio channels or audio objects of the recording independent of any downmix. A bitstream multiplexer combines the encoded digital audio recording with the sequence of EQ values, the latter as metadata associated with the encoded digital audio recording. Other embodiments are also described including a system for decoding the encoded audio recording.
US09934786B2 Speech recognition and transcription among users having heterogeneous protocols
A system is disclosed for facilitating free form dictation, including directed dictation and constrained recognition and/or structured transcription among users having heterogeneous native (legacy) protocols for generating, transcribing, and exchanging recognized and transcribed speech. The system includes at least one system transaction manager having a “system protocol,” to receive a verified, streamed speech information request from at least one authorized user employing a first legacy user protocol. The speech information request which includes spoken text and system commands is generated using a user interface capable of bi-directional communication with the system transaction manager and supporting dictation applications, including prompts to direct user dictation in response to user system protocol commands and systems transaction manager commands. A speech recognition and/or transcription engine (ASR), in communication with the systems transaction manager, receives the speech information request from the system transaction manager, generates a transcribed response, which can include a formatted transcription, and transmits the response to the system transaction manager. The system transaction manager routes the response to one or more of the users employing a second protocol, which may be the same as or different than the first protocol. In another embodiment, the system employs a virtual sound driver for streaming free form dictation to any ASR, regardless of the ASR's ability to recognize and/or transcribe spoken text from any input source such as, for example, a live microphone or line input. In another embodiment, the system employs a buffer to facilitate the system's use of ASRs requiring input data to be in batches, while providing the user with an uninterrupted, seamless dictating experience.
US09934783B2 Hotword recognition
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving audio data corresponding to an utterance, determining that the audio data corresponds to a hotword, generating a hotword audio fingerprint of the audio data that is determined to correspond to the hotword, comparing the hotword audio fingerprint to one or more stored audio fingerprints of audio data that was previously determined to correspond to the hotword, detecting whether the hotword audio fingerprint matches a stored audio fingerprint of audio data that was previously determined to correspond to the hotword based on whether the comparison indicates a similarity between the hotword audio fingerprint and one of the one or more stored audio fingerprints that satisfies a predetermined threshold, and in response to detecting that the hotword audio fingerprint matches a stored audio fingerprint, disabling access to a computing device into which the utterance was spoken.
US09934781B2 Method of providing voice command and electronic device supporting the same
An electronic device, a method, and a chip set are provided. The electronic device includes a memory configured to store at least one of audio feature data of audio data and speech recognition data obtained by speech recognition of audio data; and a control module connected to the memory, wherein the control module is configured to update a voice command that is set to execute a function through voice, the function being selected based on at least one of the audio feature data, the speech recognition data, and function execution data executed in relation to the audio data.
US09934778B2 Conversion of non-back-off language models for efficient speech decoding
Techniques for conversion of non-back-off language models for use in speech decoders. For example, an apparatus for conversion of non-back-off language models for use in speech decoders. For example, an apparatus is configured convert a non-back-off language model to a back-off language model. The converted back-off language model is pruned. The converted back-off language model is usable for decoding speech.
US09934777B1 Customized speech processing language models
User-specific language models (LMs) that include internal word indexes to a word table specific to the user-specific LM rather than a word table specific to a system-wide LM. When the system-wide LM is updated, the word table of the user-specific LM may be updated to translate the user-specific indices to system-wide indices. This prevents having to update the internal indices of the user-specific LM every time the system-wide LM is updated.
US09934774B1 Noise-cancelling earphone
A noise-cancelling earphone including a housing, an eartip, a speaker, a first microphone and a second microphone is provided. The housing includes a tube and a chamber. The tube has a first end and a second end opposite to the first end. The first end of the tube has an audio outlet, and the chamber is connected to the second end of the tube. The eartip is sleeved on the tube, and the eartip has an accommodating space which accommodates the tube. The speaker and the first microphone are disposed inside the tube and located in the accommodating space of the eartip. The second microphone is disposed inside the chamber.
US09934770B2 Electronic instrument and method for using same
An electronic instrument comprising an elongated member, comprising a plurality of detectors aligned in the elongated member, each detector for detecting a finger-sized object in the vicinity thereof and for providing a corresponding signal; a processing unit operatively connected to the plurality of detectors, the processing unit for receiving the signals from the plurality of detectors and for generating a signal indicative of a sound to generate and a sound generating unit operatively connected to the processing unit and wherein the processing unit is located inside the elongated member.
US09934767B2 Anterior load carriage stability and mobility support system
The present invention relates generally to the field of an anterior load carriage stability and mobility support system, and more particularly to marching band equipment and marching drum stability and mobility support belt for a marching drummer in K-12 primary or secondary, a collegiate, a drum and bugle corps or the like. A device capable of providing a support mechanism for the lumbar region of a user's back that allows for load distribution from loads placed anteriorly and inferiorly to the drummer's body. A preferred embodiment of the device includes a large piece and two smaller pieces of neoprene fabric, dual straps sewn along the sides of the belt, removable commercial grade closed cell foam sheets, and two plastic tubing for a sturdy structure with flexibility and versatility, and Velcro® sewn along the straps and on the obverse side of the belt for easy and secure attachment of the straps.
US09934766B2 Snare drum having improved throw off mechanism
A snare drum having an improved throw off includes a strainer shaft and a strainer bar both extending through the interior of the drum shell. The strainer bar is linked to the strainer shaft, a snare assembly is connected to the strainer bar, and a handle rotates the strainer shaft which moves the strainer bar and snare assembly between an upper position in which the snares of the snare assembly are engaged with the bottom head of the drum, and lower position in which the snares are disengaged from the bottom head. The snares are in parallel relation to the bottom head of the drum throughout the range of movement between the upper and lower positions. In one embodiment, the drum comprises a wood laminate and the top and bottom shell caps comprise carbon fiber.
US09934764B2 Systems and methods for management of percussion accessories
A drum tuning key includes a body having a longitudinal axis, a first end and a second end, the first end including a keyed interface configured to releaseably engage an element of a tuning assembly of a drum for cooperative rotation therewith and the second end including a radially-extending portion configured to be manipulated by a user to apply a torque in relation to the longitudinal axis to operate the tuning assembly, and a magnet carried by the body and having a first end, a second end, and an axis of magnetization extending between the first end and the second end, wherein at least one of the first end or the second end of the magnet is located at or adjacent an outer surface of the body.
US09934763B1 Resonating system
A resonating system includes a woodwind instrument that has a mouthpiece. Air is blown through the mouthpiece to play the woodwind instrument. A ligature is positioned around the mouthpiece and a reed is removably inserted into the mouthpiece. The reed vibrates when air is blown through the woodwind instrument. A resonator is provided and the resonator is removably positioned around the mouthpiece. The resonator is positioned between the ligature and the reed and the resonator is comprised of a rigid material. In this way the resonator enhances the vibration of the reed thereby enhancing a volume and clarity of an audible sound produced by the woodwind instrument.
US09934762B1 Pitch changing mechanisms for stringed musical instruments
Disclosed are pitch changing mechanisms, including fine-tuning and micro adjustment mechanisms. One mechanism is an adjustable tuning rod holder for a stringed instrument that is configured for both (A) fine tuning of the height of a pull-rod relative to a rod puller and pitch changer and (B) alignment the rod puller 1000 with the string 2500 on the instrument 2000. Other embodiments include roller nut and roller bridge housings. Yet still, disclosed are embodiments of pivot plates for fine or micro adjustments of the angle of a neck of a stringed instrument relative to the instruments body.
US09934758B1 Systems and methods for simulating adaptation of eyes to changes in lighting conditions
Capture of visual content by image sensor(s) may define a luminance of the visual content. A viewing field of view may define an extent of the visual content presented on a display. The luminance may vary as a function of a viewing field of view. A user may change the viewing field of view from a first viewing field of view to a second viewing field. A first luminance of the visual content within the first viewing field of view and a second luminance of the visual content within the second viewing field of view may be determined. A lighting effect may be applied to the visual content based on a difference between the first luminance and the second luminance.
US09934754B2 Dynamic sensor array for augmented reality system
A system and method for generating a dynamic sensor array for an augmented reality system is described. A head mounted device includes one or more sensors, an augmented reality (AR) application, and a sensor array module. The sensor array module identifies available sensors from other head mounted devices that are geographically located within a predefined area. A dynamic sensor array is formed based on the available sensors and the one or more sensors. The dynamic sensor array is updated based on an operational status of the available sensors and the one or more sensors. The AR application generates AR content based on data from the dynamic sensor array. A display of the head mounted device displays the AR content.
US09934753B2 Display device including voltage limiter and driving method thereof
A display device includes a scan driver which supplies a gate-on voltage or a gate-off voltage to scan lines, and a power supply unit which supplies the gate-off voltage to the scan driver, and includes a temperature sensor which generates a sensing voltage of which voltage value is changed corresponding to a temperature of a panel or an ambient temperature, a first voltage limiter which limits a minimum voltage value of the sensing voltage, and a second voltage limiter which limits a maximum voltage value of the sensing voltage.
US09934748B2 Display device, display method, and electronic device
Disclosed herein is a display device including: a display section configured to have a plurality of scanning signal lines to which respective scanning signals are applied, the display section performing line-sequential scanning by repeating interruption and resumption of the line-sequential scanning on a basis of the plurality of scanning signals, and displaying an image; and a scanning section configured to generate the plurality of scanning signals such that transition times on a pulse termination side of the respective scanning signals are equal to each other.
US09934746B2 Gate driving circuit and display device comprising the same
A gate driving circuit is provided. A gate driving circuit comprises a pull-up control unit including a control transistor, a pull-up unit, a carry unit which outputs a clock signal into a kth carry signal and a pull-down unit which pulls down a control node to an off voltage, wherein the control transistor includes one electrode and the other electrode connected to the control node, the one electrode and the other electrode being disposed on a gate electrode such that the one electrode and the other electrode being insulated from the gate electrode, wherein the gate electrode and the other electrode are disposed not to be overlapped with each other, and a distance between an upper surface of the gate electrode and a lower surface of the one electrode is longer than that of the upper surface of the gate electrode and a lower surface of the other electrode.
US09934743B2 Drive device, drive method, display device and display method
A display drive circuit (drive device) has a signal line drive circuit that, before the display panel is turned OFF, writes prescribed data signals to a respective plurality of pixels via a plurality of source signal lines, such that the potential of the drain electrodes of the respective pixels becomes equal to the potential of the opposite electrode after the display panel is turned OFF.
US09934732B2 Display method and display device
A display method and a display device are disclosed herein. The display method includes the following steps: analyzing an input image to obtain a plurality of first backlight control signals and a plurality of first liquid crystal control signals; generating image edge information associated with the input image; generating, according to the image edge information, at least one second backlight control signal and at least one target liquid crystal control signal that are associated with the image edge information; and displaying, according to the at least one second backlight control signal and the at least one target liquid crystal control signal, at least one multi-color sub-frame.
US09934731B2 Multiple backlight display system
A multiple backlight display system includes a display device having a light guide device including a plurality of edges. An edge backlight device is located along one of the edges of the light guide device. An array backlight device includes a plurality of array backlight zones that are located between the edges of the light guide device. A computing device receives an image for display on the display device and determines a plurality of brightness zones in the image. The computing device then generates backlight driving information using the plurality of brightness zones and provides the backlight driving information to the display device. The backlight driving information is configured to drive the array backlight device such a first array backlight zone provides light having a first brightness that is different than a second brightness of light that is provided by at least one second array backlight zone.
US09934730B2 Computing device and image processing method thereof
A computing device includes an illumination sensor which detects external illumination, a processor which sets a screen design as a first screen design when a first condition is satisfied, wherein the first condition is satisfied when the external illumination is lower than a first threshold illumination value and a current illumination, which is currently stored, is higher than the first threshold illumination value, and sets the screen design as a second screen design when a second condition is satisfied, wherein the second condition is satisfied when the external illumination is higher than a second threshold illumination value higher than the first threshold illumination value and the current illumination is lower than the second threshold illumination value, and a display which displays an image on a screen thereof based on the set screen design.
US09934728B2 Five-transistor-one-capacitor AMOLED pixel driving circuit and pixel driving method based on the circuit
An AMOLED pixel driving circuit has a 5T1C structure, which includes a first, a second, a third, a fourth, and a fifth thin film transistors, a capacitor, and an organic light emitting diode (OLED). The first thin film transistor is a drive thin film transistor. A first global signal, a second global signal, and a scan signal are fed, with various combinations thereof, for various operations of the circuit in an initialization stage, a data writing stage, a threshold voltage compensation stage, and a drive stage. The data writing stage and the threshold voltage compensation stage are carried out simultaneously for effectively compensating threshold voltage variation of the drive thin film transistor and the organic light emitting diode to make the display brightness of the AMOLED uniform and to promote the display quality.
US09934726B2 Display device having shared column lines
A display device having at least a plurality of pixel circuits, connected to signal lines to which data signals in accordance with luminance information are supplied, arranged in a matrix, wherein pixel circuits of odd number columns and even number columns adjacent sandwiching an axis in a column direction parallel to an arrangement direction of the signal lines have a mirror type circuit arrangement symmetric about the axis of the column direction, and there are lines different from the signal lines between signal lines of adjacent pixel circuits.
US09934723B2 Thin film transistor substrate, display panel including the same, and method of manufacturing the same
An electronic display panel comprising a plastic substrate; a bottom shield metal (BSM) on the plastic substrate; a thin-film transistor (TFT) on the BSM, the TFT and the BSM at least partially overlapping each other; and an active buffer layer between the TFT and the BSM, wherein the BSM is connected to one of a gate electrode, a source electrode, and a drain electrode of the TFT. A bottom shield metal (BSM) on the plastic substrate, the BSM located to minimize formation of a back channel in a pixel circuit by trapped charges of the plastic substrate, the pixel circuit in a pixel area defined by a gate line and a data line on the plastic substrate, the pixel circuit on the active buffer layer including a plurality of TFTs and a plurality of component interconnecting nodes.
US09934722B2 Light-emitting diode display having a minimized voltage drop deviation on a driving power line
A light emitting element display device is disclosed. In one aspect, the display includes a first pixel column including a plurality of pixels, a second pixel column including a plurality of pixels disposed substantially parallel to the first pixel column, a first transmission line between the first and second pixel columns, a second transmission line disposed substantially parallel to the first transmission line, and a power supply connected to any one of the first and second transmission lines so as to supply driving power. The first and second transmission lines may be connected to each other, at least one of the pixels of the first pixel column may be connected to the second transmission line, and at least one of the pixels of the second pixel column may be connected to the first transmission line.
US09934721B2 Organic light emitting display device and method for driving the same
Provided is an organic light emitting display device including: a display unit having a first display region and a second display region, and comprising a plurality of pixels; and a controller configured to calculate an OPR (On Pixel Ratio) of the plurality of pixels from video data input from an outside, and to generate corrected video data for decreasing driving current of the plurality of pixels based on the OPR, the OPR including a first OPR that corresponds to the first display region and a second OPR that corresponds to the second display region.
US09934720B2 Voltage compensation type pixel circuit and method for driving the same
A voltage compensation pixel circuit includes a driving transistor coupled to the light emitting element between a high potential power line and a low potential power line to drive the light emitting element in response to a predetermined voltage applied to a gate, switching transistor including a first switching transistor being switched in response to a voltage of a first gate signal, a second switching transistor and a third switching transistor being switched in response to a voltage of a third gate signal, and a fourth switching transistor being switched in response to a voltage of a second gate signal, a storage capacitor coupled between a first node and a second node, and a setup transistor coupled between the light emitting element and the driving transistor and operated by the driving transistor. The first node is coupled to the driving transistor. The second node is coupled between the second switching transistor and the fourth switching transistor.
US09934715B2 Display, timing controller and column driver integrated circuit using clock embedded multi-level signaling
Disclosed is a timing controller including: a receiving unit configured to receive image data; a buffer memory configured to temporarily store and output the received image data; a timing controller circuit configured to generate a transmission clock signal; and a transmitter configured to receive the transmission clock signal and a transmission data signal, wherein the transmission data signal includes the image data output by the buffer memory, wherein the transmitter is configured to transmit a transmission signal, wherein the transmission clock signal is embedded in the transmission data signal, and wherein the transmission clock signal has a magnitude different from the transmission data signal.
US09934714B2 Superresolution display using cascaded panels
System and method of displaying images in temporal superresolution by multiplicative superposition of cascaded display layers integrated in a display device. Using an original video with a target temporal resolution as a priori, a factorization process is performed to derive respective image data for presentation on each display layer. The multiple layers are refreshed in staggered intervals to synthesize a video with an effective refresh rate exceeding that of each individual display layer, e.g., by a factor equal to the number of layers. Further optically averaging neighboring pixels can minimize artifacts.
US09934713B2 Multifunction wristband
Embodiments of the invention are directed toward a multifunction wristband (or other wearable device) providing a lifestyle display that outwardly displays to other people the interests and social connections of the wearer, which can include data related to music, social media, charities, and more. The multifunction wristband can act either as a stand-alone device or as a companion device to another personal electronic device. Furthermore, it can incorporate a variety of additional useful features.
US09934712B2 Display, timing controller and column driver integrated circuit using clock embedded multi-level signaling
The present invention relates to a display, a timing controller and a column driver IC, and more particularly to a display, timing controller and column driver integrated circuit using clock embedded multi-level signaling. The present invention provides a timing controller including a transmitter for transmitting a transmission signal wherein a transmission clock signal is embedded therein between a transmission data signal to have a signal magnitude different from that of the transmission data signal. The present invention also provides a column driver integrated circuit including a receiving unit for separating a clock signal from a received signal using a magnitude of the received signal, and for performing a sampling of a received data signal from the received signal using the separated clock signal.
US09934703B2 Label for decorating a bottle, bottle and method of manufacture of such a label
The self-adhesive label (10) produced in relief in order visually and/or in a tactile manner to simulate decorative etching of the material of a container or a decorative seal or stamp applied to the container, includes: a layer of adhesive (105); a sheet of flexible plastic (110), one face of which is entirely covered by the layer of adhesive; and an extra thickness (120) formed on the opposite face of the sheet of flexible plastic to the layer of adhesive. The extra thickness includes a flexible plastic and covers the edge (115) of the sheet to form a decorative design simulating an engraved relief. The peripheries of the extra thickness and of the sheet of plastic are cut jointly, the cut edge of the extra thickness thus coming as a continuation of the cut edge of the sheet up to the lower surface of the sheet of flexible plastic.
US09934702B2 Magnetic cardette
A magnetic cardette for removably holding a card or sign. The cardette includes a stem insertable into a floral arrangement container. The top of the stem includes a plate of material that is attractable to the card, in turn, having a magnet thereon removably holding the card to the stem.
US09934696B2 Tabletop teaching device and method of using the same
A tabletop teaching device and a method of using the same may include a box having an interior housing, a top and a floor. The box may include within the interior housing, at least one printout of a scene placed on the floor of the box, at least one printout of a grid placed over the at least one printout of a scene, and at least one miniature item placed above the at least one printout of a grid, wherein each miniature item represents a potential victim, a fixed point, an object item, or a potential weapon. An instructor can then place a potential victim miniature item and a fixed point miniature item spaced apart along the at least one grid printout so as to instruct a first student to determine distances and angles between the potential victim utilizing the grid of the at least one printout of a grid.
US09934691B2 System and method for hailing vehicles
The present application provides a system and method for enabling a driver to locate a passenger. In one or more implementations, a graphical user interface is provided that is operable to send and receive information associated with passengers and vehicles. A location of a first vehicle, a location of a first passenger and a location of a second passenger are received. Information associated with the locations of the first and second passenger is transmitted and a representation of at least one of the first passenger and the second passenger and the respective location thereof is provided.
US09934690B2 Object recognition apparatus and vehicle travel controller using same
The present invention provides an object recognition apparatus which, in a vehicle that detects an object present behind (including obliquely behind) the vehicle using a radio wave radar, is able to precisely recognize the position of the object present behind (including obliquely behind) the vehicle during traveling on a curve and a lane change, and a vehicle travel controller using the same. An object recognition apparatus is provided with: an image capturing unit which captures an image of an environment in front of a vehicle; a lane detection unit which detects a lane in front of the vehicle on the basis of the image captured by the image capturing unit; a lane position estimation unit which estimates the position of a lane behind the vehicle on the basis of the lane detected by the lane detection unit and the travel history of the vehicle; a rear object detection unit which detects an object present behind the vehicle; and a relative position calculation unit which calculates the relative position of the object detected by the rear object detection unit with respect to the position of the lane estimated by the lane position estimation unit.
US09934688B2 Vehicle trajectory determination
A system includes a computer programmed to identify, from a first vehicle, one or more second vehicles within a specified distance to the first vehicle. The computer is further programmed to receive data about operations of each of the second vehicles, including trajectory data. Based on the data, the computer is programmed to identify, for each of the second vehicles, a distribution of probabilities of each of a set of potential planned trajectories. The computer is further programmed to determine a planned trajectory for the first vehicle, based on the respective distributions of probabilities of each of the set of potential planned trajectories for each of the second vehicles. The computer is further programmed to provide an instruction to at least one controller associated with the first vehicle based on the determined planned trajectory.
US09934680B2 Managing the control of an electrical device controllable by infrared control signals
An apparatus for managing the control of an electrical device controllable by infrared control signals (IR_Cmd) from an infrared remote control. The apparatus is placed opposite an infrared receiver module of the electric device so as to receive on the infrared receiver any infrared control signal (IR_Cmd) from the remote control and to prevent any infrared control signal (IR_Cmd) from the remote control from directly reacting the infrared receiver module. A controller controls the transmission to the electrical device, via the infrared emitter, of infrared control signals generated from infrared control signals (IR_Cmd) received by the infrared receiver or control signals received by the interface module, in accordance with a set of compatibility and/or priority rules relating to the execution of the received control signals.
US09934679B2 System and method for adaptive programming of a remote control
A method and system for adaptively configuring a remote control includes analyzing a log of events, maintained by the remote control, which indicate how the remote control and the devices it controls are used by a user. Once the analysis is performed, the system and method can suggest alternative configurations of the remote control to the user. The range and type of alternative configurations is not particularly limited and can include changing which devices are employed for various user activities and/or how those activities are performed, the placement and hierarchy of commands in a menu tree and/or troubleshooting and set up configurations. The analysis can be performed either partially or totally within the remote control, or at, or in conjunction with, a service to which the remote control connects through a network.
US09934676B2 Apparatus for data processing
The present disclosure relates to a data processing apparatus. The data processing apparatus includes: at least one data processor configured to collect the data from the RTUs and check alarm data associated with the collected data; a first data queue generating unit configured to receive the alarm data output from the data processor to create an alarm data queue; an alarm processing unit configured to receive the alarm data included in a first alarm data queue of the first data queue generating unit sequentially to create a second alarm data queue for creating an alarm message, and to create an alarm message based on alarm data in the second alarm data queue to output it. The alarm processing unit includes a second alarm data queue generating unit configured to receive alarm data from the first data queue generating unit and store the received alarm data into a second alarm data queue.
US09934674B2 Informing first responders based on incident detection, and automatic reporting of individual location and equipment state
A method and system are provided. The method includes generating a set of workplace predictors of risk relating to accidents, injury, and industrial hygiene, based on employee states that include a physical state and an emotional state. The method further includes collecting data for an elevated risk of a workplace accident at a work location responsive to the set of workplace predictors. The data includes employee data for employees involved in the elevated risk and workplace machinery data for workplace machinery involved in the elevated risk. The method also includes automatically dispatching the data to first responders using one or more hardware-based information dispatching devices.
US09934670B2 Infrastructure monitoring system and method
An infrastructure monitoring system includes: a first monitoring device configured to detect and monitor a first condition of a first aspect of the infrastructure and transmit a data signal including data relating to the first condition; a second monitoring device configured to detect and monitor a second condition of a second aspect of the infrastructure and transmit a data signal including data relating to the second condition; a third monitoring device configured to detect and monitor a third condition of a third aspect of the infrastructure and transmit a data signal including data relating to the third condition; and an operations center communicatively coupled to each monitoring device, the operations center configured to receive the data signal from each monitoring device and determine whether the data included in the data signal received from any one of the monitoring devices indicates a problem within the infrastructure.
US09934668B2 Method and apparatus for identifying transitions between sitting and standing postures
There is provided a method for identifying transitions between a standing posture and a sitting posture by a user, the method comprising obtaining measurements of the acceleration experienced by the user during movement; obtaining a signal indicating the height of a part of the user during movement; processing the measurements of the acceleration to identify candidate movements corresponding to transitions between a standing posture and a sitting posture; and determining an identified candidate movement as a transition from a sitting posture to a standing posture where the identified candidate movement coincides with an increase in height in the signal and an identified candidate movement as a transition from a standing posture to a sitting posture where the identified candidate movement coincides with a decrease in height in the signal.
US09934662B2 Programmable security sensor
Various embodiments of a programmable barrier alarm are described. In one embodiment, a programmable barrier alarm comprises a magnet and a sensor, the sensor comprising a magnet and a sensor, comprising a magnetic field detector for sensing a magnetic field produced by the magnet and for producing an electronic signal based on the magnetic field, a processor, and a memory for storing alarm threshold values and processor-executable instructions that, when executed by the processor, cause the sensor to, in a calibration mode of operation, determine a value of a first electronic signal from the magnetic field detector when the barrier is in the closed position, calculate a first threshold value based on the first electronic signal, and calculate a second threshold value based on the first electronic signal, in a normal mode of operation, compare electronic signals from the magnetic field detector to the first and second threshold values, and generate an alarm signal if any of the electronic signals are less than the first threshold or greater than the second threshold.
US09934660B2 Systems and methods for generating haptic effects associated with an envelope in audio signals
Systems and methods for generating haptic effects associated with envelopes in audio signals are disclosed. One disclosed system for outputting haptic effects includes a processor configured to: receive an audio signal; determine an envelope associated with the audio signal; determine a haptic effect based in part on the envelope; and output a haptic signal associated with the haptic effect.
US09934658B1 Visually-impaired-accessible building safety system
Building safety systems, methods, and mediums are provided. A method includes receiving a voice input by the building safety system. The method includes receiving voice data produced by a speech recognition process performed on the voice input. The method includes determining a response to the voice input based on the voice data. The method includes producing the response by the building safety system.
US09934656B2 Checkout system, settlement apparatus and method for executing settlement processing
A checkout system includes a plurality of settlement apparatuses and a registration apparatus. The registration apparatus includes a scanner, a storage unit, a communication interface, and a processor. The processor controls the scanner, the storage unit and the communication interface to identify a commodity corresponding to a scanned code, generate the settlement information, and transmit the settlement information to a selected one of the plurality of settlement apparatuses. The selected one of the plurality of settlement apparatuses determines, with respect to itself, whether a settlement processing is currently being performed and whether a settlement processing was completed within a preceding predetermined amount of time. Based on the determination, the selected one of the plurality of settlement apparatuses performs one of the settlement processing with respect to the received settlement information and transmission of the settlement information to another one of the plurality of settlement apparatuses.
US09934651B2 Gaming machine and method for providing player-selectable enhancement spots
A slot machine matrix game employs a player selectable hot spot feature in which the player is prompted to select desired locations to become hot spots in the gaming matrix. The player selectable hot spots may be employed in primary game play or bonus rounds. When a designated target symbol lands on a hot spot, the spot is activated. The number of activated hot spots may be used to award a progressive jackpot. The hot spots may also function to increase a prize multiplier.
US09934648B2 Method and apparatus for providing off-line purchases in a computer implemented game
A user device supports a computer implemented game. An input from a user is received. This input requests a purchase of an in-game item. When this input is received, a determination is made as to whether the user device is on-line or not. If the user device is off-line, it is determined if the in-game item can be purchased in dependence on a locally available in-game currency budget. If so, the requested in-game item is provided in the computer implemented game.
US09934647B2 System and method to provide user-configurable preferences and/or options for team play on a single gaming machine
A method and system to provide user-configurable preferences and/or options for team play on a single gaming machine is disclosed. According to one embodiment, a computer-implemented gaming system comprises a memory device having stored thereon a gaming application that enables multiplayer, turn-based gameplay among one or more players. A computer-processing unit is operatively connected to the memory device and processes the gaming application to enable the one or more players to specify a condition for determining when a player's turn at gameplay ends. Processing the gaming application further includes determining that the condition is satisfied for a current player and generating a message to indicate that the current player's turn at gameplay is terminated. A display presents the generated message to the one or more players.
US09934645B2 Parking meter with contactless payment
A parking meter is described that comprises components for providing parking meter functionality and a display for displaying parking information and a metal housing for protecting the parking meter components from an environment that has a display aperture through which the display is visible. The parking meter also comprises an antenna for a contactless payment reader arranged in or on the parking meter in close proximity to the display.
US09934638B2 Singulating and validating money items
An apparatus comprising a money item singulator and a money item validator. The money item singulator and the money item validator may each comprise a rotatable money item conveying element. The rotatable conveying elements may rotate synchronously so that money items are singulated on the rotatable element of the singulator and fed directly to be validated on the rotatable element of the validator.
US09934637B2 Electronic locking systems, methods, and apparatus
Electronic locking devices, systems, and methods may employ an accelerometer to detect an acceleration associated with displacement of a portion of an electronic locking device, for example, displacement of a housing that includes a display of the electronic locking device. Responsive to such an acceleration being detected, a message is transmitted to a device remote from the locking device. The message may include a photograph and or audio signal. Concurrently with the transmission of the message, a greeting may be played and/or displayed.
US09934635B2 Application and platform for temporary control over property access functions
A computing device may be configured to transition control over one or more functions of a rental unit to a user (e.g., a traveler) based on one or more of time, geo-location and access credentials. Access may be granted to the traveler to use one or more home automation functions including a HVAC system, a thermostat, lighting, security alarm, automated door locks, etc. An owner of the rental unit may have access to some or all of the home automation functions blocked during the traveler's stay at the rental unit, and at an end of the stay owner access to those functions may be enabled. Some functions may be activated prior to the traveler's arrival at the unit based on a time to arrival and/or distance from the unit. An application on a traveler's computing device may be configured to summon a repair service for the unit.
US09934633B2 Tactical security system
A tactical security system can be used to secure a room. For example, such a security system may be contained in a housing sized for shipment to a location for placement in a room in order to secure the room. Various components may be included in the housing, such as a storage device configured to store data received from one or more audio or video recording devices; an access controller configured to interface with a badge reader associated with one or more access points to the room in order to selectively control access to the room; a switch configured to couple the one or more audio or video recording devices with the storage device and to couple the badge reader with the access controller; and/or a power supply configured to supply power to the devices in the housing.
US09934631B2 Bio-implantable identification device and corresponding operating methods
A bio-implantable identification device configured for implantation in a user's body is provided. The bio-implantable identification device includes at least one memory configured to store a key, a receiver configured to receive an identification request, at least one processor configured to sign the identification request using the key stored in the at least one memory of the device, and a transmitter configured to transmit the signed request.