| Document | Document Title |
|---|---|
| US09806774B2 |
CSI feedback reduction for MIMO interference alignment
Channel state information (CSI) is reduced for a multi input multi output (MIMO) channel, in which feeding back a part of the CSI matrix is sufficient to align interference in a MIMO network. A feedback dimension quantifies a cost of the CSI feedback of the interference in the MIMO network. A feedback profile is determined that achieves a tradeoff between degrees of freedom, antenna resources and the cost of the feedback. The feedback profile parameterizes a feedback function, which determines how the CSI matrices are fed back to the transmitter. The precoders of the network are adaptive to only the partial CSI knowledge at the transmitter. |
| US09806770B2 |
Information processing system, information processing device, storage medium storing information processing program, information processing method, and storage device
An example of information processing system includes a storage device; and an information processing device for performing near field communication with the storage device. The storage device includes a storage unit storing application data usable in a predetermined application program and shared data usable in an application program regardless of whether the application program is the predetermined application program. The information processing system receives an instruction regarding data read and/or data write from/to the storage device from an application program to be executed by the information processing device. Under the condition that the instruction is from the predetermined application program, the application data is passed to the predetermined application program. Regardless of whether the instruction is from the predetermined application program, the shared data is passed to the application program that issued the instruction. |
| US09806769B2 |
Electromagnetically-coupled state detection circuit, power transmission apparatus, contactless power transmission system, and electromagnetically-coupled state detection method
An electromagnetically-coupled state detection circuit including a detection unit that measures a primary side Q value of a circuit containing a primary side coil electromagnetically coupled with a secondary side coil and power transmission efficiency to the secondary side coil, corrects the power transmission efficiency based on the Q value of the primary side coil, and detects a state of electromagnetic coupling with the secondary side coil based on an obtained corrected value of the power transmission efficiency. |
| US09806768B2 |
Methods and device for controlling power transmission using NFC
A method and system to control power transmission between two Near Field Communication (NFC) devices with and without data transfer using NFC technology are provided. The method includes transferring at least a portion of power between two NFC devices using different RF signals and appropriate NFC Transceivers. The method controls the power transmission between two NFC devices by proposed changes in NFC Digital Protocol, LLCP (Logical Link Control Protocol) and in the application flow control. |
| US09806764B2 |
Power transmitting apparatus, power receiving apparatus, and non-contact power transmission system
An active electrode and a passive electrode provided in a power transmitting apparatus 10 are connected to an inductor provided on the secondary side of a transformer generating an AC voltage and are respectively coupled to an active electrode and a passive electrode of a power receiving apparatus through electric fields. A ground electrode of the power transmitting apparatus faces the active electrode and the passive electrode and a ground electrode of the power receiving apparatus faces the active electrode and the passive electrode. A plurality of openings are formed in such a manner as to form a lattice in each of the ground electrodes. |
| US09806762B2 |
Method, apparatus and system for supporting non-vector line
Embodiments of the present invention provide a method, and an apparatus for supporting a non-vector line. The method includes: selecting n non-vector lines TL from lines that are in an initializing stage, where n is an integer greater than or equal to 1; controlling to perform no further initializing for other lines that are in the initializing stage except the TL until the TL fully enters a data transmission stage; and before the TL enters the data transmission stage, estimating a far-end crosstalk coefficient CTL-SV from the TL to a vector line SV that is in the data transmission stage, where the CTL-SV is used in signal processing to eliminate far-end crosstalk caused by the TL to the SV. |
| US09806760B2 |
Acquisition method for pseudo noise code at receiver and receiver for acquiring pseudo noise code
The method includes converting, by the receiver, an input signal into a return-to-zero (RZ) signal, generating, by the receiver, a first summation signal by performing an exclusive-or (XOR) operation on the RZ signal and a delayed signal obtained by delaying the RZ signal by a reference time, collecting, by the receiver, n-length seed codes from the first summation signal, generating, by the receiver, a PN code based on the seed codes, and generating, by the receiver, a second summation signal by performing an XOR operation on the PN code and the delayed signal. |
| US09806758B2 |
Apparatus and method for venting and sealing a portable communication device
An improved venting and sealing assembly for a portable communication device is provided. The venting and sealing assembly is formed of a housing enclosure having a walled aperture with a bottom surface and an offset through-hole passing therethrough. A flexible substrate having a vent hole is coupled to the housing enclosure across the walled aperture such that the vent hole is offset from the offset through-hole. A breathable membrane is coupled across the vent hole of the flexible substrate. A rigid plate having an opening is coupled to the breathable membrane, the opening of the rigid plate being aligned with the vent hole of the flexible substrate. A closed-loop sealing rib is formed around the vent hole of the flexible substrate and/or upon the bottom surface of the walled aperture of the housing enclosure. The assembly provides a vent path and a self-sealing enclosure. |
| US09806757B1 |
Mobile computing device holder
A mobile computing device holder that is operable to receive and releasably secure a mobile computing device such as but not limited to a tablet PC. The mobile computing device holder includes a body having an interior volume wherein the body is formed in the shape of an animal. Disposed within the interior volume of the body is a mobile computing device receiver that is configured to releasably secure a mobile computing device. The mobile computing device receiver includes a annular central portion and a first arm and second arm secured thereto and diametrically opposite the central portion. A base member is disposed within the interior volume of the body and functions to anchor the mobile computing device receiver wherein the base member and the mobile computing device receiver has an arm intermediate thereto. A controller is present to electrically couple to mobile computing device. |
| US09806753B2 |
Navigation method using wearable device in vehicle and vehicle carrying out the same
The present disclosure relates to a method of providing navigation-related information to a driver using a wearable device worn by the driver in a vehicle, and a vehicle capable of carrying out the same. An audio video navigation (AVN) system for providing navigation information using wearable device, may include: a wireless communication unit for wirelessly exchanging data with an external device, and a controller for controlling the wireless communication unit to transmit a signal corresponding to an event occurring in a navigation function to the wearable device such that a notice of the event is output as vibration through the wearable device when the wearable device capable of delivering the vibration to a wearer is connected through the wireless communication unit and a preset destination setting condition is satisfied. |
| US09806750B2 |
Bluetooth assisted remote discovery and wakeup
Disclosed herein are techniques to enable remote discovery of connectivity capabilities and remote connection of devices in a power efficient manner. In particular, discovery and connection requests for connectivity capabilities utilizing a first radio may be communicated using a second radio, the second radio utilizing a lower amount of power relative to the first radio. For example, connectivity capabilities such as Wi-Fi, Wi-Fi Direct, WiGig, Zigbee can be discovered and connection request communicated using a Bluetooth radio. |
| US09806748B2 |
Transponder with receiving means having a low electrical consumption in a listening mode
The transponder comprises an antenna and a receiver circuit (2) for receiving RF signals, this receiver circuit is implemented with a control mechanism to activate it at least periodically in a listening mode. This receiver circuit is comprises a decoding circuit (4), formed at least by a demodulator (8) and a decoder (10), and a wake-up circuit (14B) to analyze received RF signals in the listening mode and arranged for controlling the activation of the decoding circuit in this listening mode. The wake-up circuit comprises a frequency discriminator (17) and a digital modulation or preamble detector (18) downstream from a field clock generator (28). The wake-up circuit receives as entry an alternating signal branched from the signal chain through the receiver circuit upstream from the demodulator and it activates the decoding circuit only when a modulation or a preamble is detected in a received RF signal by the digital modulation or preamble detector. |
| US09806745B2 |
Systems and methods for low pass filter mismatch calibration
System and methods are provided for calibration of low pass filter mismatch. An example system includes: a tone generator configured to generate a tone signal with a baseband frequency value; one or more low pass filters configured to filter one or more analog signals associated with the tone signal; one or more analog-to-digital converters (ADCs) configured to generate one or more aliases associated with the one or more analog signals; and a calibration processor configured to detect low pass filter mismatch based at least in part on the one or more aliases associated with the tone signal. |
| US09806742B2 |
Data processing device and data processing method
In a transmitting device, in interchanging to interchange a code bit of an LDPC code in which a code length is 16200 bits and an encoding rate is 7/15 with a symbol bit of a symbol corresponding to any of 8 signal points defined by 8PSK, when 3 bits of code bits stored in three units of storages having a storage capacity of 16200/3 bits and read bit by bit from the units of storages are allocated to one symbol, a bit b0, a bit b1, and a bit b2 are interchanged with a bit y1, a bit y0, and a bit y2, respectively. A position of the interchanged code bit obtained from data transmitted from the transmitting device is returned to an original position. The present technology is applicable to a case of transmitting data using an LDPC code, for example. |
| US09806740B1 |
Device and method for data compression
A device for data compression includes a processing unit, a temporary memory, and a storage device. The temporary memory is used to temporarily store data to be compressed. The storage device includes multiple physical blocks. Each physical block has a same volume size. The processing unit compresses the to-be-compressed data, generates compressed data, and stores the compressed data into one of the physical blocks. The processing unit compares a data size of the compressed data and a volume size of one physical block, and when the data size of the compressed data is smaller than the volume size, the processing unit stores remnant data into the same physical block as the compressed data stored in, wherein the total data size of the remnant data plus the compressed data is equal to the volume size of the physical block both are stored in. |
| US09806738B2 |
Entropy encoding and decoding scheme
Decomposing a value range of the respective syntax elements into a sequence of n partitions with coding the components of z laying within the respective partitions separately with at least one by VLC coding and with at least one by PIPE or entropy coding is used to greatly increase the compression efficiency at a moderate coding overhead since the coding scheme used may be better adapted to the syntax element statistics. Accordingly, syntax elements are decomposed into a respective number n of source symbols si with i=1 . . . n, the respective number n of source symbols depending on as to which of a sequence of n partitions into which a value range of the respective syntax elements is sub-divided, a value z of the respective syntax elements falls into, so that a sum of values of the respective number of source symbols si yields z, and, if n>1, for all i=1 . . . n−1, the value of si corresponds to a range of the ith partition. |
| US09806732B1 |
Calibration of high speed ananlog-to-digital converters
The present disclosure relates to implementations of a method and a system for calibrating the system that includes analog-to-digital converters (ADCs). The method, performed on the system's corresponding components include, providing, from a signal generator, a first signal during a calibration mode. Parallel ADCs provide ADC outputs associated with the first signal. First parallel filters provide derivative signals associated with the ADC outputs. Second and third parallel filters provide first and second band-stop filtered signals associated with the ADC outputs and the derivative signals, respectively. The disclosure includes multiplying the first and the second band-stop filtered signals and selecting a portion of the multiplied signals that are accumulated for storage. The system incorporating these components performing these features is, accordingly, calibrated. |
| US09806730B1 |
Apparatus having source follower based DAC inter-symbol interference cancellation
A current digital-to-analog converter (DAC) and an integrated circuit chip including the DAC are disclosed. The current DAC includes a switching circuit that includes a plurality of switches coupled to receive differential digital control signals and to provide first and second differential current outputs, a current source coupled to an upper rail and to a first node of the switching circuit, a first current sink coupled to a lower rail and to a second node of the switching circuit, and an interference cancellation circuit coupled to substantially prevent a tail capacitance current from flowing through the first and second differential current outputs. |
| US09806729B1 |
Current steering cell with code-dependent nonlinearity cancellation and fast settling for low-power low-area high-speed digital-to-analog converters
Systems and techniques relating to a digital-to-analog converter (DAC) are described. A described DAC cell includes a differential switch pair coupled with a cross-coupled switch pair. Gate terminals of the differential switch pair are arranged to respectively receive an input signal to the cell and an inverted version of the input signal to respectively drive the gate terminals of the differential switch pair. Gate terminals of the cross-coupled switch pair are arranged to respectively receive the input signal and the inverted version of the input signal to respectively drive the gate terminals of the cross-coupled switch pair. The cross-coupled switch pair is configured to reduce or eliminate net differential transient current between switch output terminals of the differential switch pair. A current-to-voltage converter coupled with the switch output terminals of the differential switch pair generates a voltage that forms at least a portion of an output of the digital-to-analog converter. |
| US09806723B2 |
Digital phase locked loop for low jitter applications
A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator. The phase locked loop circuit also includes a digital path including a digital phase detector. The phase locked loop circuit further includes an analog path including a linear phase detector. Additionally, the phase locked loop circuit includes a feedback path connecting an output of the ring oscillator to an input of the digital path and an input of the analog path. The digital path and the analog path are parallel paths. The digital path provides a digital tuning signal the ring oscillator that digitally controls a frequency of the ring oscillator. The analog path provides an analog tuning signal the ring oscillator that continuously controls the frequency of the ring oscillator. |
| US09806719B1 |
Physically unclonable circuit having a programmable input for improved dark bit mask accuracy
An apparatus is described. The apparatus includes a physically unclonable (PUF) circuit having a programmable input. The programmable input is to receive a value that caused the PUF circuit to strengthen its stability or strengthen its instability. |
| US09806717B2 |
High-speed level-shifting multiplexer
Systems and methods for level-shifting multiplexing are described herein. In one embodiment, a method for level-shifting multiplexing comprises selecting one of a plurality of inputs based on one or more select signals, and pulling down one of first and second nodes based on a logic state of the selected one of the plurality of inputs. The method also comprises pulling up the first node if the second node is pulled down, and pulling up the second node if the first node is pulled down. |
| US09806714B2 |
Integrated RF MEMS on ATE loadboards for smart self RF matching
In a testing device, a method for implementing automatic RF port testing. The method includes attaching a device under test having a plurality of RF pins to a load board, dynamically tuning a plurality of RF ports of the load board to the plurality of RF pins, and automatically matching the plurality of RF ports to the plurality of RF pins with respect to impedance. The method further includes implementing an RF port testing process on the device under test. |
| US09806708B1 |
Reference level adjustment for calibration of dual-gate transistors
Disclosed are various embodiments related to dual-gate transistors and associated calibration circuitry. In one embodiment, dual-gate transistors may be configured in a sense amplifier arrangement, and calibration circuitry can be used to adjust an input offset of the sense amplifier. In another embodiment, a reference level voltage utilized in an amplifier with dual-gate transistors can be adjusted during a calibration sequence, and may be substantially unchanged from its nominal value outside of the calibration sequence. In another embodiment, a calibration sequence can be utilized to determine circuit results from a circuit including dual-gate transistors, and to adjust control gates to more closely coincide with expected or desired results. In yet another embodiment, a semiconductor memory device can include a memory array with amplifiers that include dual-gate transistors, as well as associated calibration circuitry. |
| US09806706B2 |
Switching unit and power supply circuit
A switching unit of an embodiment includes a first switching element of normally-on type, a second switching element of normally-off type having a non-reference potential side conductive terminal connected to a reference potential side conductive terminal of the first switching element, a series capacitor connected between a conduction control terminal of the first switching element and a conduction control terminal of the second switching element, and a diode having an anode connected to the conduction control terminal of the first switching element and a cathode connected to a common junction of the first switching element and the second switching element. |
| US09806704B2 |
Frequency multiplication processing method and device
The present invention relates to the technical field of printing in particular, to a frequency multiplication method and device, for solving the problem of poor quality of a printed image. One method comprises: for two adjacent pulse signals output from an encoder, determining a first kind of pulse signals and a second kind of pulse signals to be inserted between the two adjacent pulse signals according to a time interval between the two adjacent pulse signals and a frequency multiplication value corresponding to a longitudinal resolution; determining a period of the first kind of pulse signals to be inserted between the two adjacent pulse signals, and determining a period of the second kind of pulse signals to be inserted between the two adjacent pulse signals; and performing frequency multiplication processing on the two adjacent pulse signals. The embodiments of the invention further improve the printing quality of images. |
| US09806700B2 |
Input receiver with multiple hysteresis levels
An integrated circuit (“IC”) includes an input receiver with multiple hysteresis levels. An exemplary input receiver may be an input buffer with a Schmitt trigger that has multiple hysteresis windows between different high and low input voltages. This circuit may improve the input noise immunity of the external input signals and timing by allowing for a selection one of the plurality of levels depending on parameters of the input (e.g. noise level). |
| US09806699B2 |
Circuits and methods for DFE with reduced area and power consumption
A 1/n-rate decision feedback equalizer (DFE) and method include a plurality of branches. Each branch includes a summer circuit configured to add a feedback signal to a received input, and a latch configured to receive an output of the summer circuit in accordance with a clock signal. A feedback circuit includes a multiplexer configured to receive as input, an output of each branch, the multiplexer having a clocked select input and configured to multiplex the output of each branch to assemble a full rate bit sequence, and a filter configured to provide cancellation of intersymbol interference (ISI) from the received input to be provided to the summer circuit of each branch. |
| US09806693B2 |
Duplexer with a ladder filter portion and a specifically connected capacitor or elastic wave resonator
A duplexer includes a transmission filter with a ladder circuit configuration and a reception filter including a ladder filter portion connected to an antenna terminal and a longitudinally coupled resonator-type surface acoustic wave filter. In the transmission filter, a coupling capacitor is connected between an end portion of an inductor nearer to parallel arm resonators and a wiring line connecting the series arm resonators of the ladder filter portion to each other in the reception filter. |
| US09806692B2 |
Acoustic wave element, duplexer, and communication module
An acoustic wave element of the present disclosures has a piezoelectric substrate and an acoustic wave resonator S1 on a main surface of the piezoelectric substrate. The acoustic wave resonator S1 is one being divided into a first IDT electrode and a second IDT electrode which are electrically connected to the first IDT electrode. The first IDT electrode includes a first comb-shaped electrode on the signal input side and a second comb-shaped electrode on the signal output side. The second IDT electrode includes a third comb-shaped electrode on the signal input side and a fourth comb-shaped electrode on the signal output side. The direction of arrangement of the third comb-shaped electrode and the fourth comb-shaped electrode from the third comb-shaped electrode toward the fourth comb-shaped electrode is different from the direction of arrangement from the first comb-shaped electrode toward the second comb-shaped electrode. |
| US09806690B1 |
Subsynchronous oscillation relay
Relay devices and methods of use for detecting and reacting to subsynchronous oscillation events in electrical energy generation and transmission systems, such as but not limited to, subsynchronous control interactions between wind-turbine generators and series-compensated transmission lines. |
| US09806689B2 |
Electronic lock, locking system, method of operating an electronic lock, computer program product
According to an aspect of the invention, an electronic lock is conceived, being adapted to harvest energy from a radio frequency (RF) connection established between a mobile device and said electronic lock, further being adapted to use the harvested energy for processing an authorization token received via said RF connection from the mobile device, and further being adapted to use the harvested energy for controlling an unlocking switch in dependence on a result of said processing. |
| US09806687B2 |
System and method for signal amplification using a resistance network
A signal amplification method includes receiving, from a capacitive sensor, a first input signal by a first control terminal of a first transistor, and a second input signal by a first control terminal of a second transistor. The method also includes producing a first output signal, including amplifying a first signal at a first load path terminal of the first transistor using a first inverting amplifier having an output coupled to a resistance network, and producing a second output signal, including amplifying a second signal at a first load path terminal of the second transistor using a second inverting amplifier having an output coupled to the resistance network. The method also includes feeding back the first and second output signal to a second load path terminal of the first transistor and to a second load path terminal of the second transistor via the resistance network according to a pre-determined fraction. |
| US09806683B2 |
Average current-mode feedback control of multi-channel class-D audio amplifier
Described herein are several configurations of Class-D audio amplifiers, including a single-ended and a bridge-tied load (BTL) configuration, in which voltage-mode control and average current-mode control circuitry in feedback loops can be included to control the outputs of the Class-D amplifier to reduce open-loop errors and maintain a relatively high loop gain over an expected audio frequency range. The average current-mode control circuitry monitors current through a resistor common to both a current flow into a positive terminal of a loudspeaker associated with the amplifier and a current flow into a negative terminal of the loudspeaker. The voltage-mode control circuitry works with the average current-mode control circuitry in controlling the output of the Class-D audio amplifier. |
| US09806680B2 |
Apparatus and methods for radio frequency amplifiers
Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin. |
| US09806679B2 |
High-linearity CMOS WiFi RF power amplifiers in wide range of burst signals
An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal. |
| US09806673B2 |
Class-E outphasing power amplifier with efficiency and output power enhancement circuits and method
An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively. |
| US09806666B2 |
System and method for mounting solar panel frames on corrugated roofing
The system and method invention herein disclosed and claimed is a bracket and mounting method used to mount a solar panel frame to a corrugated roof without requiring any tools or special skills. |
| US09806662B2 |
Motor drive controller and method for controlling motor
A motor drive controller includes: a rotation status detector that detects a rotation status of a rotor of a motor and generates rotation status detection information corresponding to the detected rotation status; a rotation unevenness information generator that measures a rotation unevenness indicating a flutter characteristic of the motor based on the rotation status detection information and generates rotation unevenness information according to a result of measurement of the rotation unevenness; a control circuit that generates a driving control signal based on the rotation unevenness information and the target speed signal for controlling the motor to rotate in target speed corresponding to the target speed signal; and a motor driver that outputs a driving signal to the motor based on the driving control signal. |
| US09806661B2 |
Control device for on-vehicle electric compressor
A control device for an on-vehicle electric compressor controls and drives an electric motor arranged in the on-vehicle electric compressor. The control device includes a temperature acquisition unit, a current detector, a threshold current value setting unit, and a motor current controller. The temperature acquisition unit acquires a temperature of the control device. The current detector detects a motor current, which is current that flows through the electric motor. The threshold current value setting unit sets a threshold current value in accordance with the temperature of the control device acquired by the temperature acquisition unit. The motor current controller controls the motor current based on a detection result of the current detector so that the motor current becomes less than or equal to the threshold current value. |
| US09806659B2 |
Inverter drive system, bus bar and assembly
An inverter drive assembly includes a first bus bar having a plurality of bushings, including at least a first bushing and a second bushing, the first bus bar being configured to receive at least one DC link capacitor of the inverter drive assembly via the second bushing, a second bus bar electrically connected to the first bus bar at the first bushing, and an inverter electrically connected to the second bus bar, the inverter being configured to receive electrical current through the second bus bar, wherein a height of the first bushing defines an air gap of approximately 5 millimeters between the first bus bar and the second bus bar. |
| US09806657B2 |
Method and apparatus for control of switched reluctance motors
A short pitched switched reluctance motor control apparatus comprising a voltage provider comprising a first coupling and a second coupling configured to be coupled to a phase winding of the switched reluctance motor for applying a voltage to drive current in the winding between the first and second coupling is disclosed. The apparatus further comprises a controller configured to apply a first voltage pulse to the first coupling, and to apply a second voltage pulse to the second coupling, wherein the start of the second pulse is delayed with respect to the start of the first pulse, and the end of the first pulse is delayed with respect to the end of the second pulse. |
| US09806644B2 |
Control device
A control device that controls an inverter interposed between a DC power source and an AC rotary electric machine to perform power conversion between DC power and AC power, wherein the inverter includes a plurality of sets of an upper switching element and a lower switching element connected in series with each other between positive and negative electrodes on the DC side and controlled so as to be turned on and off in a complementary manner; and the control device executes short-circuiting processing, in which all the upper switching elements or all the lower switching elements are controlled so as to be turned on, while the AC rotary electric machine is stationary. |
| US09806643B2 |
Drive control apparatus for electric motor
The present invention relates to a drive control apparatus for an electric motor and a control method thereof. In the present invention, the generation of electric brake is suppressed while protecting a semiconductor relay from excessive surge voltage. The drive control apparatus is configured to include: a drive circuit for controlling the drive of the electric motor; a semiconductor relay arranged on a drive line between the drive circuit and the electric motor to cut off current supply from the drive circuit to the electric motor; and an active clamp circuit for turning on the semiconductor relay when a potential difference between the drive circuit side and the electric motor side of the semiconductor relay is greater than or equal to a predetermined value. |
| US09806641B2 |
Detection of electric motor short circuits
One embodiment describes a method that includes determining a desired torque level of a motor actuated by a motor starter; determining, using a control system, a configuration of the motor starter to achieve the desired torque level, in which determining the configuration includes determining which of a plurality of switching devices in the motor starter should be opened and which should be closed; and instructing, using the control system, the motor starter to implement the determined configuration by opening or closing one or more of the plurality of switching devices. |
| US09806640B2 |
Piezoelectric transmission systems
Apparatus for transmitting motion to a moveable body comprising: a first bar having ends; two articulated arms, each comprising first and second arms connected at a joint having an axis about which the first and second arms rotate, wherein the first arms are of equal length, the second arms are of equal length and the second arm of each articulated arm is connected to a different end of the bar at a joint having an axis about which second arm and bar rotate; a mount connected to the first arm of each articulated arm at a joint having an axis about which first arm rotates; a second bar coupled to each articulated arm at a joint having an axis about which the second bar rotates; and a piezoelectric motor coupled to the first bar controllable to apply a force selectively in either direction along the bar's length; wherein, the joints are configured so that all the axes are substantially parallel and the first arms are parallel and the second arms are parallel for all rotations about the axes. |
| US09806638B2 |
Apparatus for controlling grid-connected inverter
An apparatus for controlling a grid-connected inverter is disclosed. The apparatus according to an exemplary embodiment of the present disclosure is configured to promote an increase in efficiency of grid-connected inverter system and to improve a current THD by generating a voltage command by changing an offset voltage in response to size of DC-link power voltage and size of apparent power. |
| US09806636B2 |
DC/AC converter apparatus configurable as grid-connected or stand-alone and power conversion and generation system comprising such DC/AC converter apparatus
A DC/AC converter apparatus comprising: input terminals to be connected to a DC power source; a DC/AC conversion unit configured to receive input DC electrical power via the input terminals and to convert the input DC electrical power into AC electrical power, the DC/AC conversion unit comprising two output terminals; two AC backup output terminals; a switch arrangement to selectively connect the two AC output terminals to the grid terminals and to the two AC backup output terminals; a control unit associated to the switch arrangement and configured to: drive the switches of the switch arrangement, sense when an AC voltage at the grid terminals is below a predetermined threshold; and automatically drive the switches of the switch arrangement to disconnect the two AC output terminals from the grid terminals and to connect the two AC output terminals to the two AC backup output terminals when the AC grid voltage is below a said predetermined threshold. |
| US09806631B2 |
Apparatus for controlling paralleled inverter
An apparatus for controlling paralleled inverter is disclosed. In the apparatus for controlling paralleled inverter, one synchronization signal is shaped by at least two inverters to respectively transmit a voltage command and an operation command. |
| US09806626B2 |
Electric motor controller and methods of determining input power line energization
An electric motor controller and methods of determining which input power line of a plurality of input power lines of a motor drive controller has been energized are provided. An electric motor controller configured to be coupled to an electric motor includes a plurality of power input lines configured to receive an alternating current (AC) input voltage from an AC power source, an energized line detection device configured to sense that a power input line has been energized by the AC power source, and configured to output an isolated signal, and a rectifier configured to convert the AC input voltage having a frequency to a direct current (DC) voltage. The controller also includes a computing device coupled downstream from the energized line detection device and configured to determine which input power line has been energized. |
| US09806622B2 |
Power conversion device and power conversion control method for the same
Reduction in size and weight of transformer for grid tie applications is demanded and can be achieved by applying SST to the transformer. However, SST application to PCS for sunlight requires the following: handle a wide variation range of the voltage of solar power generation; reduce switching losses of power devices, DC/DC converter and inverter, in the power circuit to implement high frequency for SST application; increase voltage to the grid voltage; and reduce the dimensions of the high current path prior to step-up. Thus, LLC resonant converter configuration is applied with an inverter placed in the output, and series connected configuration is applied to the inverter. The LLC resonant converter is subject to constant frequency regulation with large output, step-up control with low output, and step-down control with the upper limit voltage according to MPPT voltage from sunlight, in order to achieve drive loss reduction and voltage range handling. |
| US09806617B1 |
Switch mode power converter with overshoot and undershoot transient control circuits
Circuits and methods control output voltage overshoot and undershoot of an SMPC in response to a load current transient. The SMPC control stage has at least one load variation detector that compares a feedback signal with at least one transient threshold level to determine that occurrence of the load current transient. When the load current transient has occurred, the at least one load variation detector causes a switch stage to be turned on to source or sink current to or from the load circuit to compensate the load current transient. A slope detector determines a change in polarity of the slope of the load current transient. When the slope changes polarity, the slope detector sends a signal for preventing an overshoot or an undershoot of the output voltage of the SMPC once the load current transient has been compensated. |
| US09806615B1 |
On-chip DC-DC power converters with fully integrated GaN power switches, silicon CMOS transistors and magnetic inductors
Fully integrated, on-chip DC-DC power converters are provided. In one aspect, a DC-DC power converter includes: a SOI wafer having a SOI layer separated from a substrate by a buried insulator, wherein the SOI layer and the buried insulator are selectively removed from at least one first portion of the SOI wafer, and wherein the SOI layer and the buried insulator remain present in at least one second portion of the SOI wafer; at least one GaN transistor formed on the substrate in the first portion of the SOI wafer; at least one CMOS transistor formed on the SOI layer in the second portion of the SOI wafer; a dielectric covering the GaN and CMOS transistors; and at least one magnetic inductor formed on the dielectric. A method of forming a fully integrated DC-DC power converter is also provided. |
| US09806611B2 |
Voltage generating circuits based on a power-on control signal
A circuit includes a power-on control circuit and a voltage generating circuit. The power-on control circuit is configured to cause a power-on control signal to follow a voltage level of a first supply voltage during a first time period that a voltage level of a second supply voltage is less than a threshold value, and to set the power-on control signal to have a voltage level of a reference voltage during a second time period that the voltage level of the second supply voltage is greater than the threshold value. The voltage generating circuit is configured to generate a voltage signal responsive to the power-on control signal. |
| US09806608B2 |
Charge pump having AC and DC outputs for touch panel bootstrapping and substrate biasing
A charge pump that can be configured to operate in a first mode and a second mode is disclosed. The charge pump can comprise a charging capacitor coupled to a first node and configured to transfer a first DC voltage to the first node. The charge pump can also comprise a first output node and a second output node coupled to the first node. During the first mode, the first output node can be configured to output a second DC voltage based on the first DC voltage, and the second output node can be configured to output a third DC voltage based on the first DC voltage. During the second mode, the first output node can be configured to output the second DC voltage, and the second output node can be configured to output an AC voltage, the AC voltage being offset by the third DC voltage. |
| US09806606B2 |
Multi-modal battery pack
At least one embodiment of the invention provides a multi-modal rechargeable battery pack that can switch between charging algorithms dynamically. This dynamic switching can be accomplished in a wide variety of ways, for example via external command or automatically. At least one embodiment of the invention provides a system that can switch a multi-modal rechargeable battery pack between one or more of a runtime mode, a lifespan mode, and a quick charge mode. |
| US09806605B2 |
Voltage divider circuit having at least two kinds of unit resistors
Provided is a voltage divider circuit having a small area and good accuracy of a division ratio. Among a plurality of resistors of the voltage divider circuit, each of resistors having a large resistance value, that is, resistors (1/4R, 1/2R, 1R, 9R, 10R) having high required accuracy of ratio includes first unit resistors (5A) that have a first resistance value and are connected in series or connected in parallel to each other, and each of resistors having a small resistance value, that is, resistors (1/16R, 1/8R) having low required accuracy of ratio includes second unit resistors (5B) that have a second resistance value smaller than the first resistance value and are connected in parallel to each other. |
| US09806599B2 |
Converter submodule with short-circuit device and power converter having same
A short-circuit device and a protection method for a submodule for a power converter are disclosed. The submodule includes a bridge circuit having at least one power semiconductor branch extending between a first and a second DC voltage node and at least one controllable power semiconductor switch disposed therein to which a freewheeling diode is connected in anti-parallel, and a capacitor connected in parallel to the bridge circuit. The short-circuit device has at least one selected of the freewheeling diodes anti-parallel to the power semiconductor switches of the bridge circuit, wherein the at least one selected freewheeling diode is manufactured in press pack design and rated such that, when a fault occurs in the submodule, the at least one selected freewheeling diode breaks down due to the fault conditions and provides a durable, stable, low-impedance short circuit path between a first and a second AC voltage connection of the submodule. |
| US09806598B2 |
Active filtering system
An active filtering system designed to be connected in parallel with an electric power supply network providing a main power supply current including a disturbing current, the system including at least one capacitor, a controlled current generator including an electric power supply intended to generate a positive determined voltage or a negative determined voltage and connected in series with the capacitor, a device for controlling the controlled current generator, designed to generate a compensation current to be applied to the main current in order to compensate the disturbing current while keeping a decoupling current measured at the connection point between the current generator and the capacitor at a value suitable for not saturating the current generator. |
| US09806597B2 |
Current conversion device for a single- or multi-axis arrangement and operating method
For operating multi-axis drive assemblies more reliably even in a field weakening range, a current conversion device is proposed which includes a voltage-source DC link, a plurality of inverters having each a DC input side connected to the voltage-source DC link and AC output-side terminals for connection to an electric motor, and a control device configured to short-circuit each of the inverters. A measurement device measures an electrical variable at each of the inverters. The control device determines based on the measured electrical variables independently for each of the inverters directly or indirectly whether a particular inverter is feeding energy into the voltage-source DC link, and short-circuits, when this is the case, the particular inverter independently of the other inverters. A corresponding operating method is also disclosed. |
| US09806594B2 |
Drive device for power converter and driving method of power converter
A drive device driving a power converter that includes a switching element formed from a wide bandgap semiconductor, includes a PWM-signal output unit that generates a drive signal that drives the switching element with PWM; an on-speed reducing unit that, when the switching element is changed from off to on, reduces a change rate of the drive signal; and an off-speed improving unit that, when the switching element is changed from on to off, draws charge from the switching element at a high speed and with a charge drawing performance higher than that at a time when the switching element is changed from off to on. |
| US09806590B2 |
Permanent magnet motor having reduced torque ripple
A permanent magnet motor, including: a stator assembly and a rotor assembly. The stator assembly includes: a stator core and a coil winding. The stator core includes: a yoke portion, a plurality of tooth portions, and a plurality of winding slots. The rotor assembly includes: a rotor core, a plurality of permanent magnets, and a rotor sheath. The tooth portions are extended out of the yoke portion. Each winding slot is formed between adjacent tooth portions. The permanent magnets are disposed at intervals on a surface of the rotor core and magnetic poles of two facing sides of adjacent permanent magnets are the same. The rotor sheath is disposed outside the rotor assembly and is divided into at least two segments axially. A magnetic conductivity of a first segment of the rotor sheath is different from a magnetic conductivity of a second segment of the rotor sheath. |
| US09806587B2 |
System and method for stator construction of an electric motor
A system and method to reduce core loss in the stator of an electric motor by first preparing laminations of the stator and/or rotor in a water jetting operation, punching or stamping operation, laser cutting operation, or similar manufacturing operation, and then subjecting the laminations to a temperature treatment in a manner such that, upon assembly into a stator and/or rotor of an electric motor and operated within expected parameters, core loss is reduced. The system and method subjects the laminations to a cold bath preferably consisting of liquid nitrogen, after stamping but preferably prior to assembly, and then stacking the laminations together for assembly as a stator and/or rotor of an electric motor. |
| US09806580B2 |
Motor having stator assembly with integrated mounting and heat sink features
A step motor integrates its mounting face and heat sink into the stator design. In particular, mounting holes (typically, four in number) are provided through the stator stack in outer perimeter areas. The stator stack itself becomes the mounting surface, allowing the heat generated from the stator to conduct directly to the mounting plate. The front end cap for holding the rotor in alignment is situated inside of the stator's mounting surface and takes no part in mounting the motor to the mounting surface. The end caps only hold the rotor in proper relation within the stator and contain the bearing assembly for the rotor's axial drive shaft. The perimeter of the stator assembly between the mounting screw holes may have saw-tooth cutouts that define heat-dissipation fins. |
| US09806576B2 |
Armature, armature manufacturing method, and rotating electrical device
An armature includes plural core configuration members and plural insulators integrated with the core configuration members, each insulator including a coupling portion that couples a pair of insulation portions. The armature includes plural coil wires, each including a pair of wound portions wound onto respective core configuration members, and a crossing wire connecting the pair of wound portions. Plural armature configuration units are configured independently by integrating a pair of the core configuration members with each insulator and winding the coil wire onto the pair of core configuration members. Plural armature configuration sections are configured by combining two armature configuration units adjacent in the circumferential direction. In each armature configuration section, the coupling portion and the crossing wire of one armature configuration unit are side by side with the coupling portion and crossing wire of the other armature configuration units along a direction orthogonal to an axial direction of the armature configuration section. |
| US09806575B2 |
Permanent-magnet AC power generator
The present invention relates to a plurality windings of U phase corresponding to one magnetic pole including first and second windings wound in a short pitch winding manner. The winding starts of the first and second windings are shifted by at least one tooth. The windings are wound so that a winding angle occupied by the windings inter-slot angle from the winding start of the first winding to the winding end of the second winding corresponds to a pole angle. The windings in the V phase are disposed in the same relationship as in the U phase at the position delayed by an electric angle of 120 degrees with respect to the U phase, and those in the W phase are disposed at the position delayed by an additional 120 degrees. The outputs of the windings are then each rectified, subsequently joined together and used by adding currents. |
| US09806574B2 |
Low loss permanent magnet excited electric machine
A permanent magnet excited electric machine includes a stator and a moving part movable relative to the stator. One of the stator and moving part has an electric winding system in the form of a single or multiple 3-phase system. The other one of the stator and moving part has permanent magnets. The winding system, in the form of a delta connection, has an inductance such that the related total reactance xB during rated operation according to xB=ωB·LY·PB/(Z3P·Ui,B2) is at least 0.8, wherein ωB is the electric angular frequency of the winding system during rated operation, LY is the phase inductance of the winding system in star connection, PB is the power of the machine during rated operation, Z3P is the number of 3-phase systems of the machine, and Ui,B is the amount of the induced conductor voltage during rated operation. |
| US09806561B2 |
UPS systems and methods using dual mode rectifier/inverter
An uninterruptible power supply (UPS system) includes a first converter circuit, a second converter circuit and a DC bus coupled to the first and second converter circuits. The system further includes a control circuit configured to control the first and second converter circuits and to selectively couple the first and second converter circuits to an AC source and a load to provide a first mode of operation wherein the first and second converter circuits respectively operate as a rectifier and an inverter to serve the load from the AC source and a second mode of operation wherein the first and second converter circuits operate as parallel inverters to serve the load from the DC bus. The control circuit may be configured to couple the AC source to the load to bypass the first and second converter circuits in a third mode of operation. |
| US09806558B2 |
Wireless charging equipment, terminal, wireless charging system comprising the same, control method thereof and non-transitory computer readable storage medium having computer program recorded thereon
Provided are wireless charging equipment, a terminal, a wireless charging system comprising the same, a control method thereof, and a non-transitory computer readable storage medium having computer program recorded thereon. That is, the present invention can conveniently share contents on a cloud, enlarge an application range of the wireless charging system, and improve convenience of usage by transmitting sharing link information and identification information of one or more second terminals to the wireless charging equipment in a first terminal, verifying the access to a corresponding second terminal in the wireless charging equipment to provide the sharing link information to the corresponding second terminal, and storing the sharing link information in the second terminal or downloading contents corresponding to the sharing link information, in the case where the first terminal acquiring the sharing link information provided from the service providing device is charged in the wireless charging equipment. |
| US09806554B2 |
Method of generating load variation for detecting wireless power receiving unit in wireless charging, and wireless power receiving unit
A method for generating a load variation for detecting a wireless power receiving unit in wireless charging is provided. The method includes maintaining a switch connected to a dummy load in an ON state by the wireless power receiving unit, receiving wireless power from a wireless power transmitting unit, and, upon receiving the wireless power, switching the switch connected to the dummy load to an OFF state. |
| US09806549B2 |
Accessory for an aerosol delivery device and related method and computer program product
The present disclosure relates to an accessory device usable with a portable electronic device and an aerosol delivery device. The accessory device may include a case configured to receive the portable electronic device and the aerosol delivery device therein. Further, the accessory device may include an interface that provides an electrical connection and/or a data connection between the aerosol delivery device and the portable electronic device. Thereby, the portable electronic device may charge the aerosol delivery device or vice versa and/or data may be exchanged therebetween. A related method and a computer program product are also provided. |
| US09806547B2 |
Circuits, devices, methods and systems to secure power-up for battery operating devices even with low current chargers and to execute other performances
An electronic power control circuit includes a power conditioner circuit (120, 130) having a charging input line (116), a battery-related line (133) of the power conditioner circuit (120, 130), and a power voltage output line (137); and an anti-crash loop mechanism (170) coupled to the battery-related line (133) and to the power voltage output line (137) of the power conditioner circuit (120, 130), the anti-crash loop mechanism (170) having a control output line (172, PWGOOD) to be selectively active and inactive in response to voltage levels over time on the battery-related line (133) and on the power voltage output line (137) of the power conditioner circuit (120, 130). |
| US09806546B2 |
Battery adaptor apparatus
The present invention concerns a power supply apparatus configured for coupling to an electronic device having a power port integral to the electronic device and a particular hardware profile. The power supply apparatus includes: a housing configured to extend the hardware profile of the electronic device in at least one dimension, a power source integral to the housing, and a power interface extending from the housing and configured to couple with the power port of the electronic device. A securing device integral to the housing is configured to couple the housing to the electronic device. Where the electronic device has a door covering its power port in a closed position and uncovering its port in an open extended position, the housing has a cover receiver for receiving the floor and maintaining the form factor of the electronic device and power supply. |
| US09806545B2 |
Battery management system, motor vehicle and battery module
A battery management system for a battery module having at least one battery cell provides a current path between poles of the battery module in response to a tripping signal. The current path prevents or terminates an arc in a fuse of the at least one battery cell after the fuse has been tripped. The battery management system can further include an apparatus to trip the fuse and provide the tripping signal in response to identifying the tripping of the at least one fuse. The battery management system can further include an apparatus to receive the tripping signal. |
| US09806542B2 |
Wireless power transmitting device and wireless power transmitting system
A wireless power transmitting device includes a self-oscillator circuit, a detection circuit that detects at least one of an oscillation frequency of the self-oscillator circuit and an output voltage of the self-oscillator circuit, a detection resonator that outputs, to detect a position of the power receiving device, power output by the self-oscillator circuit, and a control circuit that detects a degree to which the power receiving device approaches the detection resonator, based on a result of a detection performed by the detection circuit. |
| US09806536B2 |
Method and apparatus for wireless magnetic power transmission
Systems for wirelessly transmitting power to an implanted medical device. The wireless transmission system including a first and second transmitting coil both the first and second coil having substantially equal diameters and at least one conductor winding. A gap between the first transmitting second transmitting coil extending along a common axis by a distance equal to the radius of the first transmitting coil. A plurality of capacitors connected in series along the at least one conductor of the transmitting coils to divide the transmitting coils into a plurality of coil segments. An input connection is electronically coupled to the transmitting coils to deliver an excitation voltage to the transmitting coils to produce a substantially uniform magnetic field between the first transmitting coil and the second transmitting coil. |
| US09806535B2 |
Power-receiving device and power transmission system
A power-receiving device includes a secondary-side coil which can receive a first alternating current power without contact from a power-sending device having a primary side coil into which first alternating current power is input. The power-receiving device comprises a first power transmission path, a second power transmission path, a common path positioned in common with the first and second power transmission paths, and a voltage regulator arranged on the common path. The voltage regulator rectifies the first alternating current power received by the secondary coil or the second alternating current power from a connecting portion, converts the rectified power to a predetermined specific voltage value, and outputs the power. |
| US09806531B2 |
Power supply device and method, and program
A control unit controls a reader/writer to generate a vehicle ID read signal that is formed of a high frequency signal and used to read a vehicle ID recorded in an ID circuit, and supply the signal to a high-pass filter. The read signal or a write signal formed of the high frequency signal is superimposed on a power supply line and supplied to the high-pass filter. The high-pass filter supplies the vehicle ID read signal formed of the high frequency signal to the ID circuit. On the basis of the read signal, the ID circuit reads the vehicle ID stored in an IC built in the own circuit and transmits it as a response signal to a charger along a reverse path. An authentication part of the control unit turns on a selector switch when the vehicle ID being the response signal is determined to be legitimate. |
| US09806530B2 |
Load sharing system
A load sharing power system is provided including a plurality of generator sets configured to generate an electrical power supply. Each of the plurality of generator sets includes a driver operatively coupled to a drive shaft, such that the driver is configured to impart rotary motion to the drive shaft, and a generator operatively coupled to the drive shaft. The generator is configured to convert the rotary motion of the drive shaft to the electrical power supply. The system further includes a plurality of generator set controllers. Each of the plurality of generator set controllers is operatively coupled to a respective one of the plurality of generator sets. The system also includes a load sharing controller operatively coupled to one or more of the plurality of generator set controllers, and a communication network coupled to the load sharing controller and the plurality of generator set controllers and configured to convey one or more communication signals using an Ethernet Modbus TCP/IP communication protocol from the plurality of generator set controllers to the load sharing controller. The load sharing controller is configured to receive and process the one or more communication signals such that an electric power load coupled to the load sharing power system may be supplied with the electrical power supply. |
| US09806528B2 |
Systems and methods for estimating net solar energy production for airborne photovoltaic systems
A method for predicting electrical energy production of a photovoltaic system included in at least one aircraft is described. The method includes determining a first predicted amount of solar irradiance for each of a plurality of geographical points, determining a second predicted amount of solar irradiance received by the at least one aircraft along a flight path of the at least one aircraft, wherein the flight path includes a subset of the plurality of geographical points, and wherein the second predicted amount is based at least in part on the first predicted amount, and determining a predicted amount of electrical energy produced by the photovoltaic system along the flight path, based at least in part on the second predicted amount. |
| US09806527B1 |
Integrated electronics for perpetual energy harvesting
An apparatus for perpetually harvesting ambient near ultraviolet to far infrared radiation to provide continual power regardless of the environment, incorporating a system for the harvesting electronics governing power management, storage control, and output regulation. The harvesting electronics address issues of efficiently matching the voltage and current characteristics of the different harvested energy levels, low power consumption, and matching the power output demand. The device seeks to harvest the largely overlooked blackbody radiation through use of a thermal harvester, providing a continuous source of power, coupled with a solar harvester to provide increased power output. |
| US09806524B2 |
Electrical power tranmission
An improved management of an electrical power transmission network is obtained by providing at each of the subscriber premises a load control device which includes a power correction system for applying a capacitive load and/or a switched reactor for voltage correction across the input voltage and a sensing system defined by a pair of meters one at the supply and the second downstream of the voltage correction for detecting variations in power factor. A control system operates to control the power correction system in response to variations detected by the sensing system and to communicate between the load control device and the network control system so as to provide a bi-directional interactive system. |
| US09806522B2 |
Method for the controlled connection of a plurality of on-board power system branches of a vehicle, control unit for carrying out the method and on-board power system
A method for controlled connection of a plurality of on-board power system branches is disclosed, wherein electrical power is exchanged between first and third on-board power system branches if an uncritical supply state is present and electrical power is exchanged between second and the third on-board power system branches if a critical supply state is present in the first or third on-board power system branch. In a critical supply state, the first on-board power system branch is disconnected from the third on-board power system branch by opening a first switching device, and the second on-board power system branch is then connected to the third on-board power system branch via a second switching device. A second actuation device that actuates the second switching device receives a switch state signal from the first actuation device and closes the second switching device only if the received signal signals an open first switching device. |
| US09806519B2 |
Input redundant circuit
An input redundant circuit according to the present disclosure may include: a core power supply unit; a first input port connected to a first input voltage; a second input port connected to a second input voltage; a relay unit connected to the first input port and the second input port to supply one of the first input voltage and the second input voltage to the core power supply unit; and a surge current limiting unit coupled to the relay unit, configured to limit a surge current generated when the relay unit is switched between the first input voltage and the second input voltage. |
| US09806518B2 |
Methods of establishing and adjusting current limits for device couplers, and an electrical circuit for performing the methods
A method of establishing current limits for each of a plurality of device couplers mounted on a trunk of an electrical circuit at distributed physical positions, in which each of said device couplers is capable of servicing one or more spurs connected thereto, and in which said trunk has a total trunk current and a known resistive component, comprising the steps of: a) establishing physical characteristics of the electrical circuit including i) an order in which said device couplers are mounted on said trunk along its length; ii) a load current each device coupler requires to service the one or more spurs connected thereto; and, iii) a voltage drop of each of said sections of trunk caused by the resistive component thereof, which is proportional to a physical length thereof and the combined load currents of each device coupler serviced by that section of trunk; b) calculating a current limit for each device coupler, which current limit is greater than said load current, according to a predetermined tolerance rationale; c) calculating an intermediate trunk current available to each device coupler by deducting from said total trunk current the current limits of each device coupler preceding that device coupler in said order, as well as a consequential reduction in current caused by said voltage drop of each of said sections of trunk preceding that device coupler; and, d) adjusting said current limits so none exceeds the intermediate trunk current available to the corresponding device coupler. |
| US09806516B2 |
Method and device for protecting several strings of a photovoltaic generator from reverse currents
In order to protect reverse currents, several strings of a photovoltaic generator, which are connected in small groups respectively via a DC/DC-converter, parallel to a common DC voltage intermediate circuit, the current which flows over each of the DC/DC-converter is detected and if a reverse current is detected flowing through one of the DC/DC converters, the converter is stopped by controlling the DC/DC-converter. |
| US09806508B2 |
Electrical device box for mounting in a clean room
A double-single stainless steel electrical junction box is configured to receive two single covers. A center bridge spans between the top and bottom surfaces to define a first and a second cover plate-mounting aperture adjacent each lateral side of the bridge. The interior compartment of the junction box is common to both of the first and second cover plate-mounting apertures. Electrical conduit hubs can be disposed above the top surface and below the bottom surface of the junction box to allow electrical wiring to reach the interior compartment. |
| US09806503B2 |
Gas filled subsea electronics housing with spring engaged heat sink
Heat sinks that cool electronics are mounted within a subsea housing or vessel. Springs are used to provide pressure between the heat sinks and a vessel wall. Vessel wall deformation caused by external seawater pressure is absorbed by the springs, which maintain a pre-load force according to the spring characteristics. The mechanism also allows for rack mounting of the electronics without the need for manual access in the relatively compact vessel or housing. |
| US09806499B2 |
Spark plug for internal combustion engine
A spark plug 1 includes a tubular housing 2, a tubular insulator 3 held inside the housing 2, a center electrode 4 held inside the insulator 3 such that a distal end portion 41 protrudes, a ground electrode 5 that forms a spark discharge gap G between it and the center electrode 4, and a standing member 6 that stands distalward from a distal end portion 21 of the housing 2. In at least one of a pair of side surfaces 61 of the standing member 6 which face in a plug circumferential direction, there is formed a guide step portion 62 for guiding the flow of an air-fuel mixture in a combustion chamber of an internal combustion engine to the spark discharge gap G. |
| US09806498B2 |
Vertical-cavity surface-emitting laser diode and optical transmission apparatus
A vertical-cavity surface-emitting laser diode includes: a first resonator that has a plurality of semiconductor layers comprising a first current narrowing structure having a first conductive region and a first non-conductor region; a first electrode that supplies electric power to drive the first resonator; a second resonator that has a plurality of semiconductor layers comprising a second current narrowing structure having a second conductive region and a second non-conductive region and that is formed side by side with the first resonator, the second current narrowing structure being formed in same current narrowing layer as the layer where the first current narrowing structure is formed; and a coupling portion as defined herein; and an equivalent refractive index of the coupling portion is smaller than an equivalent refractive index of each of the first resonator and the second resonator. |
| US09806493B2 |
Method for detecting influence on laser from back-reflection light of laser and detection device
The present invention discloses a method for detecting influence on a laser from back-reflected light of the laser and a detection device. The method includes: receiving laser light input by a laser; splitting the input light into first detection light and second detection light via a beam coupler having a specific distribution proportion, and outputting the first detection light and the second detection light to a first optical power meter and an adjustable reflector, respectively; receiving a part of the second detection light reflected by the adjustable reflector, splitting the part of the second detection light reflected by the adjustable reflector into first back-reflection light and second back-reflection light, and returning the first back-reflection light and the second back-reflection light to the laser and the first optical power meter, respectively, detecting power of the first detection light by using the first optical power meter, and detecting power of the second back-reflection light by using a second optical power meter, and calculating power of the input light of the laser and power of the first back-reflection light, and establishing a power corresponding relationship between the power of the first back-reflection light and the power of the input light of the laser. By means of the foregoing manner, the present invention can detect a corresponding relationship between power of back-reflection light and power of input light of a laser. |
| US09806492B2 |
Optical amplifier using optical fiber
The present disclosure provides an optical amplifier using an optical fiber. The optical fiber includes a single-mode optical fiber in which a plurality of rare earth elements is doped simultaneously; first and second optical fiber gratings disposed at opposite sides of the optical fiber, respectively, and totally reflecting light having a wavelength in a specific range; a pumping light source configured to generate a pumping light to excite rare earth ions in the optical fiber; and an optical coupler connected to the optical fiber and configured to transmit a light signal generated from a light source and the pumping light generated from the pumping light source to the optical fiber. Therefore, it is possible to obtain efficient amplification of a light signal through a simple configuration using the rare earth elements-doped optical fiber. |
| US09806487B2 |
Optical fiber system having a remote power module
The present invention relates generally to high brightness optical fiber systems and, more particularly to optical fiber systems 104 having an optical power module 151 remote from an initial amplifier stage 101. In one aspect of the invention, the optical fiber system comprises a first active optical fiber 102 operatively coupled to one or more first pump sources 104; a first signal optical fiber 110 coupled to the first active optical fiber 102; one or more final pump sources 120; one or more final pump optical fibers 130, coupled to one or more of the final pump sources 120; and spatially separated from the one or more final pump sources 120 and the initial amplifier stage 101 comprising the first active optical fiber 102, a power module 151, comprising a final active optical fiber 150, coupled to the first signal optical fiber 110, said final active optical fiber 150 being coupled to said one or more final pump optical fibers 130. |
| US09806482B2 |
Slip ring and slip ring unit having a slip ring
A slip ring includes a dielectric carrier body having a circumferential lateral surface and radially oriented feed-through leads, a first conductive element, and a second conductive element. In a first section, the conductive elements extend in parallel at an axial offset on the lateral surface in the circumferential direction, and in a second section, they extend in the feed-through leads with a radial directional component. The first sections extend in the circumferential direction across a first angular dimension of less than 360°, so that a discontinuity is present along the circumferential direction of the conductive elements in a second angular dimension. The feed-through leads are arranged such that the second angular dimension of the first conductive element is situated at an offset from the second angular dimension of the second conductive element in the circumferential direction, the first and the second conductive elements being electrically connected to each other. |
| US09806480B1 |
Building wiring system, components and methods
The building electrical wiring system includes a component box to attach to a wall frame, and a current plate configured to be mounted at a back of the component box having a plurality of receiving slots corresponding respectively to hot, neutral and ground. A component device, such as a switch, includes internal component circuitry terminating in a plurality of conductor stems to insert into a respective receiving slot of the current plate. An electrical jumper bar includes an insulated conductor extending between opposite ends which include a respective prong for each conductive path and configured to electrically couple the current plate to another current plate associated with another component device. |
| US09806477B2 |
Jack for data and telecommunication system
A telecommunication or data-transmission jack has a dielectric housing forming a socket into which is insertable a plug having a plug body and plug contacts, a first circuit board carrying traces and fixed in the housing, connectors connected to the traces of the first circuit board, and a second flexible circuit board having a U-shaped outer end and an inner end. The outer end is provided with a plurality of outwardly exposed conductive strip contacts projecting into the socket and positioned in the socket to engage the plug contacts when the plug is fully inserted into the socket. The strip contacts are connected at the inner end of the second circuit board to the traces of the first circuit board. A dielectric support fitting complementarily within the U-shaped outer end of the second circuit board has respective fingers extending along and inwardly supporting the strip contacts. |
| US09806471B2 |
Power connector and a pluggable connector configured to mate with the power connector
Power connector includes a connector housing having a mating side and a mounting side. The connector housing includes a receiving cavity that opens to the mating side. The mounting side is configured to interface with an electrical component. The power connector also includes first and second power contacts disposed within the receiving cavity and configured to be terminated to the electrical component. The power connector also includes a multi-function contact configured to be terminated to the electrical component. The multi-function contact includes a switch segment that is disposed within the receiving cavity. The switch segment has a mating interface that is configured to engage the first power contact and is capable of flexing between first and second positions. The mating interface engages the first power contact in the first position and is separated from the first power contact in the second position. |
| US09806467B2 |
Electrical connector assembly having a metal urging member
An electrical connector assembly includes an insulating body provided with an accommodating cavity, a metal member retained to the outside of the insulating body, and a first connector disposed in the accommodating cavity. The accommodating cavity has two opposite side walls. The metal member has two side plates and two urging portions respectively connected to the two side plates. The urging portions are disposed in the accommodating cavity. Each of the side walls is disposed between the corresponding urging portion and the corresponding side plate. The first connector has a first metal casing. Each of the urging portions urges the first metal casing, and each of the urging portions is located between the first metal casing and the corresponding side wall. |
| US09806464B1 |
Structure of electrical connector
An improved structure of an electrical connector generally includes a shielding enclosure, at least one insulation body, an upper transmission conductor assembly, and a lower transmission conductor assembly. The upper and lower transmission conductor assemblies include an upper grounding terminal assembly, an upper power terminal assembly, a lower grounding terminal assembly, and a lower power terminal assembly, of which each terminal assembly defines a soldering section, an extension section, and a contact section. The soldering section has a width from 0.35 mm to 0.45 mm and a thickness from 0.15 mm to 0.25 mm. The extension section has a width from 0.35 mm to 0.45 mm and a thickness from 0.15 mm to 0.25 mm. The contact section has a width from 0.195 mm to 0.295 mm and a thickness from 0.15 mm to 0.25 mm. With such an arrangement, electrical current loading of the terminals can be effectively increased to meet the need for a large current without increasing noise interference. |
| US09806460B2 |
Card edge connector having a collapsible ejector
A card edge connector includes an elongated insulative housing extending in a longitudinal direction and defining at least one tower portion extending upwardly from a longitudinal end thereof, a plurality of contacts retained in the insulative housing, and an ejector received in the at least one tower portion for latching with or ejecting a memory card. The ejector has a base portion rotatably attached to the tower portion and a locking portion rotatably attached to the base portion, the at least one tower portion has a slot, the locking portion is rotatable inward to face towards the top surface of the insulative housing in order to reduce a height of the card edge connector, the base portion has a lower ejecting section, and the locking portion has an upper locking section. |
| US09806459B2 |
Plug connector part with a latching element
A plug connector part fix a plug connector includes a housing part; a plug portion which is arranged on the housing part for plug-in connection to another plug connector part; a latching element which is arranged in a movable manner on the housing part and has a latching portion that locks to the other plug connector part, the latching element being movable between a first, locking position for establishing locking between the plug connector part and the other plug connector part and a second, unlocking, position for unlocking the plug connector part from the other plug connector part; and a fixing device to fix the latching element in the first, locking position. The fixing device releases a fixing provided by the fixing device in the first, locking position by applying a force to the latching element that is greater than a predetermined fixing force. |
| US09806454B2 |
Grommet protective member and electrical wire connection device
An electrical wire connection device is provided with: a shield shell, one end side having a connection part for inserting an electrical wire, the other end side having a cap part that can be mounted on a casing; a grommet including a soft material, having formed at one end side an extension cylinder part through which an electrical wire can be passed, and having formed at the other end side a skirt part fitted into the shield shell from the connection part side and fitted to the outer peripheral surface of a step part; and a grommet protective member formed of material harder than the grommet and arranged surrounding the skirt part from the outer peripheral surface side, a flange part being formed on the inner peripheral surface of the grommet protective member and pressing against the outer peripheral surface of the grommet. |
| US09806452B2 |
Contact retaining part with space for axial movement of a contact element
A retaining part for the pull-resistant holding of a pin-shaped contact element having a housing with an accommodation space for accommodating the contact element and at least one primary securing element which protrudes into the interior of the accommodation space and can be radially deflected, having an axial stop for a projection of the contact element in order to secure the contact element in a pull direction (Z) opposite to an insertion direction (E), wherein a secondary securing element, which in a securing position contacts at least in sections the outside of the primary securing element, is provided to prevent the radial (R) deflection of the primary securing element. |
| US09806450B2 |
Electrical connector with zero-insertion-force forminals
An electrical connector assembly includes a first electrical connector and a second electrical connector mounted on the first electrical connector moveably. The first electrical connector includes an insulative housing, a number of first terminals and a cover mounted on the insulative housing. Each of the first terminals includes a pair of elastic mating portions having two guiding portions extending therefrom. The second electrical connector includes an insulative base and a number of second terminals. When the second electrical connector is connected with the first electrical connector, the second terminals are inserted into the first terminals in a zero-insertion-force manner. |
| US09806448B2 |
Right angle type electrical connector
An electrical connector includes an insulating housing, first terminals, second terminals and a shielding shell. The insulating housing has a base portion and a mating portion, and the base portion has a mounting surface. The first terminals have a pair of differential signal terminals, a power terminal, and a grounding terminal, and the second terminals having the same type of terminals. The power terminal and the grounding terminal are disposed at two opposite sides of the pair of differential signal terminals, respectively. The first terminals and the second terminals have connecting legs extending out of the mounting face. The connecting legs of the power terminals and the grounding terminals are disposed at the middle area of the mounting surface, and the connecting legs of the differential signal terminals are respectively disposed at two opposite sides of the connecting legs of the power terminals and the grounding terminals. |
| US09806447B2 |
Connector having fixed portions of a shell, differential pair of signal contacts and a ground contact arranged in a row forming a fixed portion group
A connector comprises a shell fixed portion connected to a shell, a ground contact and a differential pair consisting of two signal contacts. The ground contact has a ground fixed portion. Each signal contact has a signal fixed portion. The shell fixed portion, the signal fixed portions and the ground fixed portion are fixed to the circuit board when the connector is used. The shell fixed portion, one of the signal fixed portions, a remaining one of the signal fixed portions, the ground fixed portion form a fixed-portion group in which they are adjacent to one another in this order. Moreover, the ground fixed portion and the signal fixed portions are arranged in a row along a pitch direction. When the fixed-portion group is seen along the pitch direction, at least a part of the shell fixed portion occupies an area same as a part of the signal fixed portion. |
| US09806442B2 |
Plug connection device
A plug connection device for connecting a cable having at least one core to a circuit board includes a connector which can be connected to the core of the cable, and a base strip which can be connected to the circuit board The base strip includes a soldering pin which can be electrically connected to the core of the cable in a plug-in region by placing the connector onto the base strip and which can be soldered to the circuit board in a soldering region in order to produce a conductive connection. The soldering region of the soldering pin includes a plurality of contact zones such that the base strip can be connected to the circuit board in different orientations. |
| US09806441B2 |
Connecting structure for bus bar and electrical wire
A connecting structure uses a crimp terminal to connect a bus bar and an electrical wire together. The crimp terminal includes a bus bar-connecting section to be crimped to the bus bar, and an electrical wire-connecting section to be crimped to an end of the electrical wire. At least one of the bus bar-connecting section and the electrical wire-connecting section is provided with an oxide film breaking means for breaking an oxide film on the bus bar or a core wire on the end of the electrical wire. |
| US09806438B2 |
Ground bracket for an outlet of a rack power distribution unit and related method
An electronic device includes a chassis, a first outlet provided in the chassis, and a power source coupled to the first outlet. The first outlet has a first ground terminal. The device further includes a ground bracket configured to connect first ground terminal of the first outlet to the chassis to ground the first outlet. The electronic device further may include a second outlet provided in the chassis and spaced from the first outlet. The second outlet is coupled to the power source, and has a second ground terminal. The ground bracket is configured to connect the first ground terminal of the first outlet to the second ground terminal of the second outlet and to the chassis. A method of grounding outlets of the electronic device is further disclosed. |
| US09806436B2 |
Terminal base having an elctrical connector to connect a coil-side terminal of an elctric motor to an inverter-side terminal of an inverter
A terminal base that is disposed on an electrical connection path between a coil of an electric motor accommodated inside a case and an inverter disposed outside the case and connects a coil-side terminal serving as a terminal on a coil side to an inverter-side wiring member serving as a wiring member on an inverter side, the terminal base including: a connector that electrically connects the inverter-side wiring member and the coil-side terminal; a fastener that fixes the coil-side terminal to a first terminal serving as one terminal of the connector; and a terminal base main body that holds the connector. |
| US09806434B2 |
Coaxial cable connection structure
A core wire of a coaxial cable is easily placed and soldered onto a conductive joint portion. Conductive joint portions 2 are formed at a predetermined interval on a substrate 1. A solder resist portion 5 is formed on each side of the conductive joint portion 2. A core wire 41 of a coaxial cable 4 is housed between two of the solder resist portions 5. A core wire 41 is placed on an upper surface 2a of the conductive joint portion 2. In this state, the core wire 41 is, by solder 3, connected to the upper surface 2a of the conductive joint portion 2. |
| US09806431B1 |
Slotted waveguide array antenna using printed waveguide transmission lines
Example methods and systems for implementing slotted waveguide array antenna using printed waveguide transmission lines technology are described herein. One example method may include developing a slotted waveguide array antenna may be developed using a plurality of slotted waveguides aligned in an antenna array, in which each slotted waveguide may be developed using printed waveguide transmission lines technology. Components of the slotted waveguide array antenna may be developed using printed circuit board materials, such as Kapton-type laminate and FR4. In addition, through using printed waveguide transmission line technology, a slotted waveguide array antenna may be configured to radiate millimeter electromagnetic waves and may be configured to operate in radar, navigation, or other high frequency systems. |
| US09806430B2 |
Phase-conjugate configuration of high-gain, dual-polarized sector antennas for a repeater
An antenna system having a transmit assembly with a first set of antenna elements for transmitting signals. Each antenna element in this first set may be disposed from a respective adjacent antenna element by a predetermined azimuthal increment and by a predetermined altitudinal increment. The antenna system further includes a receive assembly having a second set of antenna elements for receiving signals. Each antenna element in this second set may be disposed from a respective adjacent antenna element by a predetermined azimuthal increment and by a predetermined altitudinal increment. The predetermined azimuthal and altitudinal increments of the first set may be substantially similar to the predetermined azimuthal and altitudinal increments, respectively, of the second set. |
| US09806423B2 |
Capacitively coupled patch antenna
Systems and methods relating to patch antennas. A patch antenna has a substrate, a resonant metal plate at one side of the substrate, and a ground plane at the other opposite side of the substrate. Two feed pins are used to couple the antenna to other circuitry. The feed pins pass through the substrate and holes in at the ground plane. The feed pins are physically disconnected from both the resonant metal plate and the ground plane. The feed pins are capacitively coupled to the resonant metal plate to provide an electronic connection between other circuitry and the patch antenna. |
| US09806418B2 |
Antenna structure for electronic device
An antenna structure for an electronic device includes a first portion, a number of radiating sections, and a number of branch sections. The first portion receives an electric current from a printed circuit board of the electronic device and couples the electric current to the number of radiating sections and the number of branch sections of the antenna structure. |
| US09806417B2 |
Antenna system and mobile terminal
An antenna system and a mobile terminal are disclosed. The antenna system includes an antenna radiator and an adjustable matching circuit connected between the antenna radiator and a radio frequency interface. The adjustable matching circuit adjusts the resistance between the antenna radiator and the radio frequency interface according to a plurality of frequency bands. The antenna radiator in the embodiments of the present disclosure is a metallic body of strip shape, which has a simple structure and is easy to implement and can be combined with the adjustable matching circuit to implement coverage of a larger range band width. |
| US09806415B2 |
Modulation patterns for surface scattering antennas
Modulation patterns for surface scattering antennas provide desired antenna pattern attributes such as reduced side lobes and reduced grating lobes. |
| US09806414B2 |
Modulation patterns for surface scattering antennas
Modulation patterns for surface scattering antennas provide desired antenna pattern attributes such as reduced side lobes and reduced grating lobes. |
| US09806404B2 |
Fin-shaped multi-band antenna module
A fin-shaped multi-band antenna module, e.g., for vehicles, includes an antenna printed circuit board and a plate arranged thereupon. In a lower region the plate is mechanically connected to the antenna printed circuit board. A first monopole extends in an essentially vertical direction on the plate and is connected to the antenna printed circuit board in a lower region by a feed point. The first monopole is inductively extended in the vertical direction in an upper region of the first monopole in order to enable transmission and reception of electromagnetic waves in a lower telephone frequency range. |
| US09806394B2 |
0/90 degree coupler with complex termination
The isolated port of a 0/90 degree coupler is terminated by a novel complex termination impedance circuit having a reactance. The absolute value of the reactance is at least two ohms. The coupler receives a signal on its input port, and outputs a first signal on its first output port and a second signal on its second output port. A first load is coupled to the first output port without an intervening matching network. A substantial impedance mismatch exists between the first output port and the first load. A second load is coupled to the second output port without an intervening matching network. A substantial impedance mismatch exists between the second output port and the second load. Despite the substantial impedance mismatches, the first and second signals have a phase difference in a range of from 88 degrees to 92 degrees while exhibiting an amplitude imbalance less than 2 dB. |
| US09806393B2 |
Gap waveguide structures for THz applications
A microwave/millimeter device having a narrow gap between two parallel surfaces of conducting material by using a texture or multilayer structure on one of the surfaces is disclosed. The fields are mainly present inside the gap, and not in the texture or layer structure itself, so the losses are small. The microwave/millimeter wave device further includes one or more conducting elements, such as a metallized ridge or a groove in one of the two surfaces, or a metal strip located in a multilayer structure between the two surfaces. The waves propagate along the conducting elements. At least one of the surfaces is provided with means to prohibit the waves from propagating in other directions between them than along the ridge, groove or strip. At very high frequency, the gap waveguides and gap lines may be realized inside an IC package or inside the chip itself. |
| US09806388B2 |
Battery system and driving method thereof
A battery system capable of cooling overheated battery packs among a plurality battery packs each mounted in a battery case by measuring temperatures of the battery packs is disclosed, and a driving method thereof is provided. In one embodiment, the battery system includes a plurality of battery packs, an air compressor for supplying a compressed cooling air to the plurality of battery packs, a gas dividing unit coupled between the plurality of battery packs and the air compressor and including a plurality of valves, and a controller for controlling opening and closing of each of the plurality of valves according to temperatures of the plurality of battery packs. |
| US09806387B2 |
Energy storage device with reduced temperature variability between cells
The present disclosure is directed to an improved energy storage device having a housing with one or more side walls that define an internal volume. The side walls include a bottom side wall and a front side wall having an air inlet and outlet. The energy storage device also includes a plurality of cells arranged in a matrix within the internal volume atop the bottom side wall. Further, the cells define a top surface. In addition, the energy storage device includes an airflow distribution network configured with the air inlet and the air outlet. Moreover, the airflow distribution network is at least partially sealed from the plurality of cells (e.g. at the front side wall) so as to reduce temperature variability across the cells when external air is provided through the air inlet. |
| US09806383B2 |
Electric energy storage device and method for operating an electric energy storage device
The invention relates to an energy storage device and a method for operating an energy storage device comprising a plurality of energy storage modules. In order to adjust the output voltage to the energy storage device, one or more energy storage modules is/are connected in series. According to the invention, the series-connected energy storage modules are selected in accordance with the state of charge and at least one other operating parameter in order to be able to use the individual energy storage modules in a particularly efficient manner. |
| US09806380B2 |
High temperature electrochemical cell structures, and methods for making
An electrochemical cell is described, including an anodic chamber and a cathodic chamber separated by an electrolyte separator tube, all contained within a cell case. The cell also includes an electrically insulating ceramic collar positioned at an opening of the cathodic chamber, and defining an aperture in communication with the opening; along with a cathode current collector assembly; and at least one metallic ring that has a coefficient of thermal expansion (CTE) in the range of about 3 to about 7.5 ppm/° C., contacting at least a portion of a metallic component within the cell, and an adjacent ceramic component. An active braze alloy composition attaches and hermetically seals the ring to the metallic component and the collar. Sodium metal halide batteries that contain this type of cell are also described, along with methods for sealing structures within the cell. |
| US09806378B2 |
Electrolytic solution containing mixture of fluorinated chain carbonates, electrochemical device, lithium ion secondary battery and module
The present invention aims to provide an electrolyte solution for forming, for example, a secondary battery having excellent oxidation resistance and high voltage cycle characteristics; an electrochemical device such as a lithium-ion secondary battery that contains the electrolyte solution; and a module that contains the electrochemical device. The present invention provides an electrolyte solution containing a solvent and an electrolyte salt, wherein the solvent contains a fluorine-containing compound (A) represented by formula (1) shown below, and a fluorine-containing compound (B) represented by formula (2) shown below: Rf1OCOOR (1) wherein Rf1 is a C1-C4 fluorine-containing alkyl group, and R is a C1-C4 non-fluorinated alkyl group, and Rf2OCOORf3 (2) wherein Rf2 and Rf3 are the same or different, and each is a C1-C4 fluorine-containing alkyl group. |
| US09806377B2 |
Secondary battery, electrolytic solution, battery pack, electronic device, and electrical vehicle
A secondary battery capable of improving cycle characteristics, conservation characteristics, and load characteristics is provided. The secondary battery includes a cathode, an anode, and an electrolytic solution. A separator provided between the cathode and the anode is impregnated with an electrolytic solution. The electrolytic solution includes one or more of a dicarbonic ester compound, a dicarboxylic compound, a disulfonic compound, a monofluoro lithium phosphate, and difluoro lithium phosphate and one or more of fluorinated lithium phosphate, fluorinated lithium borate, and imide lithium. |
| US09806371B2 |
Anode and battery
An anode capable of preventing expansion of an anode active material layer and a battery using it are provided. The anode includes an anode current collector, and an anode active material layer containing silicon (Si) as an element, wherein the anode active material layer therein contains at least one selected from the group consisting of a fluoride of an alkali metal and a fluoride of an alkali earth metal. |
| US09806360B2 |
Unit cell for solid-oxide fuel cell and solid-oxide fuel cell using same
The present invention relates to a unit cell for a solid-oxide fuel cell and to a solid-oxide fuel cell using same, and, more specifically, relates to: a unit cell for a solid-oxide fuel cell, wherein a fuel charging-and-discharging part and an air charging-and-discharging part are provided perpendicularly to a cathode comprised in the solid-oxide fuel cell; and a solid-oxide fuel cell using same. |
| US09806359B2 |
Fuel cell system and control method therefor
A fuel cell system includes: a fuel cell; an anode gas supply flow path for supplying an anode gas to the fuel cell; an anode gas discharge flow path for discharging an anode off gas from the fuel cell; an anode gas circulation flow path for connecting the anode gas supply flow path and the anode gas discharge flow path to each other; a circulation device provided on the anode gas circulation flow path and serving for supplying the anode off gas to the anode gas supply flow path; and a controller. When liquid water is residing in the circulation device, the controller controls a circulation flow rate of the circulation device to discharge the liquid water residing in the circulation device. The controller restricts an increasing rate of the circulation flow rate of the circulation device if it is decided that a quantity of the liquid water residing in the circulation device is equal to or more than a specified value. |
| US09806358B2 |
Power generation system, and methods for starting and operating fuel cell in power generation system
The present invention enables a fuel cell to be stably started by minimizing a lack of air in a gas turbine when starting the fuel cell. This fuel cell system comprises: a gas turbine (11) having a compressor (21) and a combustor (22); a first compressed air supply line (26) that supplies compressed air (A1), which has been compressed by the compressor, to the combustor; a solid oxide fuel cell (SOFC) (13) having an air electrode and a fuel electrode; a second compressed air supply line (31) that supplies partially compressed air (A2), which has been compressed by the compressor, to the air electrode; a blower (33) that is disposed on the second compressed air supply line, and raises the pressure of the compressed air (A2); a circulation booster line (60) connecting the upstream side and downstream side of the blower in the second compressed air supply line; a control valve (61) disposed on the circulation booster line; a control valve (63) disposed between the circulation booster line in the second compressed air supply line and the SOFC; and a control device (62) that closes the control valves and opens the control valves to start the blower when starting the SOFC. |
| US09806349B2 |
Activation device for an electric battery unit and electric battery unit with at least one activation device
The invention relates to an activation device for an electric battery unit, in particular, for a battery part of a torpedo. The invention also relates to a battery unit with activation devices of this type.An activation device incorporates an operating supply connection, to which an operating supply reservoir can be connected. A movably arranged cutting element can be pneumatically actuated via a pneumatic connection of the activation device by means of an actuation element, wherein a sealing element arranged in the path of travel of the cutting element controls the operating supply connection.In order to guarantee a safe storage, ready for operation, and a safe activation of a battery unit, it is provided in accordance with the invention that the activation device incorporates a pneumatic outlet, which can be fluidically connected to the pneumatic connection, depending on the position of the actuation element. |
| US09806348B2 |
Self-supported catalyst and method for manufacturing the same
A catalyst consisting of structurally ordered mesoporous carbon containing a transition metal and a method for preparing the same are provided. The method for preparing the catalyst includes forming a mixture of a carbon precursor and structurally ordered mesoporous silica, carbonizing the mixture to form a composite, and removing mesoporous silica from the composite. |
| US09806345B2 |
Electrochemical energy conversion devices and cells, and positive electrode-side materials for them
An electrochemical energy conversion device 10 comprising a stack of solid oxide electrochemical cells 12 alternating with gas separators 14, 16, wherein scavenger material selected from one or both of free alkali metal oxygen-containing compounds and free alkaline earth metal oxygen-containing compounds is provided in or on one or more of the positive electrode-side of the cell 12, the adjacent gas separator 14 and any other structure of the device 10 forming a gas chamber 64 between the cell and the gas separator. The invention also extends to the treated cell 12. |
| US09806343B2 |
Lead-acid battery formulations containing discrete carbon nanotubes
Compositions of discrete carbon nanotubes for improved performance lead acid batteries. Further disclosed is a method to form a lead-acid battery with discrete carbon nanotubes. |
| US09806342B2 |
Negative electrode active material of lithium secondary battery, negative electrode of lithium secondary battery, lithium secondary battery for vehicle installation using the negative electrode active material and negative electrode, and method for manufacturing the negative electrode active material
A negative electrode active material of lithium secondary battery includes: at least one of a petroleum-derived green coke and a coal-derived green coke; and at least one of a petroleum-derived calcined coke and a coal-derived calcined coke within a mass ratio range of 90:10 to 10:90 which are fired. |
| US09806340B2 |
Nonaqueous electrolyte battery and battery pack
According to one embodiment, a nonaqueous electrolyte battery including a positive electrode and a negative electrode is provided. The positive electrode includes LiNixM1-xO2 wherein M is a metal element including Mn, and x is within a range of 0.5≦x≦1. The negative electrode includes graphitized material particles and a layer. The graphitized material particles have an interplanar spacing of (002), according to an X-ray diffraction method, of 0.337 nm or less. The layer includes a titanium-containing oxide. The layer covers at least a part of a surface of the graphitized material particles. |
| US09806339B2 |
Titanium-niobium composite oxide-based electrode active material and lithium secondary battery using the same
An electrode active material comprising in major proportions a monoclinic titanium-niobium composite oxide represented by the formula TiNbxO(2+5x/2), wherein X is from 1.90 or more to less than 2.00. |
| US09806338B2 |
Nanoporous titanium niobium oxide and titanium tantalum oxide compositions and their use in anodes of lithium ion batteries
Nanoporous metal oxide framework compositions useful as anodic materials in a lithium ion battery, the composition comprising metal oxide nanocrystals interconnected in a nanoporous framework and having interconnected channels, wherein the metal in said metal oxide comprises titanium and at least one metal selected from niobium and tantalum, e.g., TiNb2-x TaxOy (wherein x is a value from 0 to 2, and y is a value from 7 to 10) and Ti2Nb10-vTavOw (wherein v is a value from 0 to 2, and w is a value from 27 to 29). A novel sol gel method is also described in which sol gel reactive precursors are combined with a templating agent under sol gel reaction conditions to produce a hybrid precursor, and the precursor calcined to form the anodic composition. The invention is also directed to lithium ion batteries in which the nanoporous framework material is incorporated in an anode of the battery. |
| US09806336B2 |
Positive electrode for nonaqueous electrolyte secondary batteries, and nonaqueous electrolyte secondary battery
Provided is a positive electrode for nonaqueous electrolyte secondary batteries including a positive electrode mixture layer formed of a positive electrode mixture paste containing a positive electrode active material. The positive electrode active material has a particle diameter of 2 μm or more and less than 7 μm. The positive electrode mixture layer includes a first mixture layer in which a maximum diameter of pores formed between particles of the positive electrode active material is more than 1.0 μm and 5.0 μm or less, and a second mixture layer in which a maximum diameter of the pores is 1.0 μm or less. The second mixture layer is arranged closer to the current collector than the first mixture layer. A ratio of a thickness of the first mixture layer to a thickness of the second mixture layer is more than 0.1 and 1.0 or less. |
| US09806335B2 |
Composite including conductive material and binder on surface of (semi) metal oxide and method of preparing anode slurry including the same
Provided are a composite and a method of preparing an anode slurry including the same. More particularly, the present invention provides a composite including a (semi) metal oxide, a conductive material on a surface of the (semi) metal oxide, and a binder, and a method of preparing an anode slurry including preparing a composite by dispersing a conductive material in an aqueous binder and then mixing with a (semi) metal oxide, and mixing the composite with a carbon material and a non-aqueous binder. |
| US09806334B2 |
Power storage device electrode, method for forming the same, power storage device, and electrical device
Irreversible capacity which causes a decrease in the charge and discharge capacity of a power storage device is reduced, and electrochemical decomposition of an electrolyte solution and the like on a surface of an electrode is inhibited. Further, the cycle characteristics of the power storage device is improved by reducing or inhibiting a decomposition reaction of the electrolyte solution and the like occurring as a side reaction in repeated charging and discharging of the power storage device. A power storage device electrode includes a current collector and an active material layer that is over the current collector and includes a binder and an active material. A coating film is provided on at least part of a surface of the active material. The coating film is spongy. |
| US09806331B2 |
Microstructured electrode structures
A structure for use in an energy storage device, the structure comprising a backbone system extending generally perpendicularly from a reference plane, and a population of microstructured anodically active material layers supported by the lateral surfaces of the backbones, each of the microstructured anodically active material layers having a void volume fraction of at least 0.1 and a thickness of at least 1 micrometer. |
| US09806330B2 |
Lithium-rich electrode plate of lithium-ion battery and preparation method thereof
The present disclosure provides a lithium-rich electrode plate of a lithium-ion battery and a preparation method thereof. The preparation method of the lithium-rich electrode plate of the lithium-ion battery comprises steps of: (1) in a protective gas environment, melting a lithium ingot to obtain a melting lithium; (2) in a vacuum environment, heating and drying ceramic particles to obtain dried and anhydrous ceramic particles; (3) in a protective gas environment, adding the dried and anhydrous ceramic particles into the melting lithium, stirring to make them uniformly mixed to obtain a modified melting lithium; (4) in a protective gas environment, uniformly coating the modified melting lithium on a surface of an electrode plate to be lithium rich to form a lithium-rich layer, which is followed by cooling to room temperature to obtain a lithium-rich electrode plate of a lithium-ion battery. The lithium-rich electrode plate is prepared according to the preparation method. |
| US09806329B2 |
Negative electrode for rechargeable lithium battery, method of manufacturing same, and rechargeable lithium battery including same
Disclosed are a negative electrode for a rechargeable lithium battery that includes a plurality of non-sheet-shaped graphite particles, at least one silicon-based particle in a void formed by assembling the non-sheet-shaped graphite particles, and a sheet-shaped graphite powder between the non-sheet-shaped graphite particles, the void, or both thereof, wherein a size of the silicon particle is smaller than a length of the longest axis of the sheet-shaped graphite powder. |
| US09806327B2 |
Method for the production of a porous element, and cell of a rechargeable oxide battery
A method for producing a porous element is presented. A powdery metal-ceramic composite material is produced. The composite material has a metal matrix and a ceramic portion amounting to less than 25 percent by volume. The metal matrix is at least partially oxidized to obtain a metal oxide. The metal-ceramic composite material is grinded and mixed with powdery ceramic supporting particles to obtain a metal-ceramic/ceramic mixture. The metal-ceramic/ceramic mixture is shaped into the porous element. The porous element can be used as an energy storage medium in a battery. |
| US09806326B2 |
One-step method for preparing a lithiated silicon electrode
In a one-step method for preparing a lithiated silicon electrode, a suspension of a lithium precursor and a silicon precursor in a carrier liquid is plasma sprayed without a carrier gas. The carrier liquid is water, alcohol, ethylene glycol, or mixtures thereof. The lithium precursor is selected from the group consisting of a lithium phosphate, a lithium nitrate, a lithium sulfate, a lithium carbonate, and combinations thereof. The suspension excludes an active carbon material and a binder. |
| US09806324B2 |
Secondary battery
According to some embodiments of the present invention, a secondary battery includes: an electrode assembly including a first electrode plate, a second electrode plate, and a separator between the first electrode plate and the second electrode plate; a case accommodating the electrode assembly and including a top opening; a cap plate sealing the top opening of the case and including a short-circuit hole; a first electrode terminal electrically coupled to the first electrode plate and protruding to an upper portion of the cap plate; an inductive element electrically coupled to the first electrode terminal and having self-inductance; a first connection plate electrically coupled to the inductive element and separated from the cap plate; and an inversion plate in the short-circuit hole. |
| US09806322B2 |
Battery cell connector
The invention relates to a battery cell connector with a first and a second substantially flat limb (1, 2), wherein the first limb (1) has a connecting side (3) for connection to a plurality of electrodes of a battery, the second limb (2) is arranged at an angle with respect to the first limb (1) and extends from that side (4) of the first limb which is opposite the connection side (3), wherein a shoulder (5) is provided which extends from the first to the second limb. Against this background, the invention specifies a battery cell connector with a high current-carrying capacity which is improved in comparison with the known battery cell connectors. For this purpose, the invention provides that the profile of the height (h) of the shoulder (5) from the first limb (1) towards the second limb is nonlinear and is convex with respect to the first and the second limb (1, 2). |
| US09806321B2 |
Electrode assembly having compact electrode tabs and secondary battery using the same
An embodiment of the present invention provides an electrode assembly in which a plurality of electrode tabs is made more compact inside an exterior case and a secondary battery using the same. An electrode assembly according to the embodiment of the present invention includes: a plurality of first plates of a first polarity; a plurality of second plates of a second polarity alternately arranged with the first plates; at least one of a plurality of first tabs or a plurality of second tabs extending from the first plates or the second plates, respectively, the at least one of the plurality of first tabs or the plurality of second tabs being together wound or bent more than once; a plurality of separators interposed between the first plates and the second plates; and a lead physically coupled to at least one of the first tabs or the second tabs. |
| US09806320B2 |
Traction battery assembly
A traction battery assembly includes adjacent battery cells supported by a tray and a busbar electrically connecting the adjacent battery cells. The busbar includes a longitudinal midpoint and a pair of bowed sections joined at the midpoint. Each of the bowed sections has an actuate portion in contact with a terminal on one of the cells. The bowed sections provide increased contact with the cells when the cells have different elevations with respect to the tray. A busbar module is also disclosed. The busbar module comprises a housing and a busbar supported within the housing. |
| US09806319B2 |
Battery module having ring terminal guide
Disclosed herein is a battery module having a plurality of unit cells that can be charged and discharged, the battery module including busbars for electrically interconnecting the unit cells, ring terminals connected to electrical connection portions of the unit cells for measuring voltages of the unit cells, and a busbar mounting member mounted at an outer surface of the battery module corresponding to the electrical connection portions of the unit cells, the busbar mounting member including ring terminal guides for preventing rotation of the ring terminals. |
| US09806317B2 |
Electric storage device
The electric storage device disclosed herein is a stacked type electric storage device. The electric storage device includes a separator insulating a first electrode from a second electrode. The electric storage device includes a first conductive path from a first electrode terminal to the first electrode, a second conductive path from a second electrode terminal to the second electrode, and a current interruption device disposed between the second electrode terminal and the second electrode, the current interruption device being configured to interrupt the second conductive path. The separator includes a first surface part covering the one surface of the first electrode, a second surface part covering the other surface of the first electrode, and a connection part connected to both the first and second surface parts. The connection part is disposed between the current interruption device and an end of the first electrode on a current interruption device side. |
| US09806316B2 |
Electrode assembly, fabricating method of the electrode assembly and electrochemical cell containing the electrode assembly
A fabricating method of a unit structure for accomplishing an electrode assembly formed by a stacking method, and an electrochemical cell including the same are disclosed. The fabricating method of the electrode assembly is characterized with fabricating the unit structure by conducting a first process of laminating and forming a bicell having a first electrode/ separator/ second electrode/ separator/ first electrode structure, conducting a second process of laminating a first separator on one of the first electrode among two of the first electrodes, and conducting a third process of laminating second separator/second electrode one by one on the other first electrode among the two of the first electrodes. |
| US09806315B2 |
Nonaqueous electrolyte secondary battery and method of manufacturing the same, and separator for nonaqueous electrolyte secondary battery
A method of manufacturing a nonaqueous electrolyte secondary battery includes: preparing a separator substrate; forming a porous layer, which contains at least a fluorophosphate and a binder, on a surface of the separator substrate; preparing an electrode body by laminating a positive electrode and a negative electrode to face each other with a separator including the porous layer interposed therebetween, in which the separator is arranged such that the porous layer faces the positive electrode; preparing a battery assembly including the electrode body and a nonaqueous electrolyte; and charging the battery assembly at least once. |
| US09806313B2 |
Electrochemical cells with glass containing separators
A coated method for the preparation of a separator comprising multiple layers of glass or glass and ceramic particles for use in an electrochemical cell, an electrochemical cell comprising such a separator and the use of such an electrochemical cell. The method comprises the steps of providing a mixture of an organic polymeric material, glass or glass and ceramic particles and at least one solvent, and preparing a multilayer by phase inversion. |
| US09806312B2 |
Lithium ion battery and lithium ion battery pack
According to one embodiment of the present invention, a lithium ion battery having desirable safety performance is provided. The lithium ion battery includes a battery housing, a battery cover assembled to the battery housing, a pressure relief valve coupled to the battery housing and/or battery cover, and a safety device formed on the housing and/or battery cover and fixed to the pressure relief valve. The safety device includes a shielding plate facing the pressure relief valve, a side wall and an air flow channel structure. The side wall extends from the shielding plate and connects with the battery housing or the battery cover. The air flow channel structure is defined in the side wall. |
| US09806311B2 |
Battery pack capable of discharging gases in pouch type battery cell
The present invention relates to a battery pack capable of discharging gases in a pouch type battery cell when a gas pressure inside the pouch type battery cell is increased over a reference pressure, the battery pack including: a plurality of pouch type battery cells; a case comprising partitions suppressing the pouch type battery cells from expanding in a thickness direction thereof, wherein the pouch type battery cells are respectively held in spaces defined by the partitions; and a punching unit installed on the case to pierce a portion of surfaces of the pouch type battery cells, which is not supported by the partition, and having pin members of which number is equal to that of the pouch type battery cells. |
| US09806309B2 |
Apparatus and method for increasing the safety during the use of battery systems
A battery system, in particular a lithium-ion battery system, comprising a discharge line (AL) with an opening for discharging substances which are produced in the battery system, in particular gases, to the surroundings of the battery system. |
| US09806302B2 |
Thin film battery package
A thin film battery package includes: a case having an open top side and defining a predetermined space therein, wherein the case has one side at which first and second electrodes formed of a metal material are exposed and electrically connected to the outside; a battery block on which a plurality of unit batteries are stacked so that the plurality of unit batteries is electrically connected between a first terminal and a second terminal, wherein the battery block is seated within the case so that the first and second terminals of the unit battery disposed at one end thereof are electrically connected to the first and second electrodes; and a cover sealed and coupled to the top surface of the case. |
| US09806300B2 |
Rapid replacement battery system
A replacement battery system design incorporating a pivoting battery holster and other features enabling one-handed battery removal for devices requiring a power source. |
| US09806299B2 |
Cathode for thin film microbattery
A battery comprising an anode comprising anode material in contact with a metal anode current collector. The battery further comprises a cathode comprising cathode material in contact with a cathode current collector comprising a transparent conducting oxide (TCO). The battery further comprises an electrolyte with a pH in a range of 3 to 7. |
| US09806298B2 |
Techniques for edge management of printed layers in the fabrication of a light emitting device
An ink jet process is used to deposit a material layer to a desired thickness. Layout data is converted to per-cell grayscale values, each representing ink volume to be locally delivered. The grayscale values are used to generate a halftone pattern to deliver variable ink volume (and thickness) to the substrate. The halftoning provides for a relatively continuous layer (e.g., without unintended gaps or holes) while providing for variable volume and, thus, contributes to variable ink/material buildup to achieve desired thickness. The ink is jetted as liquid or aerosol that suspends material used to form the material layer, for example, an organic material used to form an encapsulation layer for a flat panel device. The deposited layer is then cured or otherwise finished to complete the process. |
| US09806296B2 |
Organic light emitting diode device
An organic light emitting diode device includes: a first substrate; a first electrode on the first substrate; an organic light emitting layer on the first electrode; a second electrode on the organic light emitting layer; and a capping layer on the second electrode. The capping layer may include at least one high refractive-index layer and at least two low refractive-index layers having thicknesses different from each other. |
| US09806294B2 |
Surface light emitting element
A surface light emitting element includes a light emitting layer that emits light, a first electrode layer that is provided on the side of the light emitting layer from which the light is extracted and allows the light that has been emitted by the light emitting layer to pass through, a second electrode layer that is provided on the side of the light emitting layer from which light is not extracted, a light scattering layer that is provided on the side of the first electrode layer opposite to the side on which the light emitting layer is positioned, and a transparent substrate that is provided on the side of the light scattering layer opposite to the side on which the light emitting layer is positioned, wherein a conductive material in which the real part of a complex dielectric constant is negative is used in the first electrode layer. |
| US09806293B2 |
Encapsulation film
The present application relates to an encapsulating film, an electronic device and a method of manufacturing the same. In the present application, an encapsulating film having excellent moisture blocking property, handleability, workability and durability and a structure including a diode encapsulated with the encapsulating film may be provided. |
| US09806291B2 |
Cover window, manufacturing method thereof and flexible display apparatus comprising the same
Provided is a cover window includes a first layer including a polymer material, a second layer above a first surface of the first layer and including an oxide of a first metal, and an intermediate region between the first layer and the second layer, wherein the intermediate region includes the oxide of the first metal where the first metal binds to a dangling bond of oxygen of the polymer material, and the oxide of the first metal included in the second layer has a different composition ratio than the oxide of the first metal included in the intermediate region. |
| US09806284B2 |
Display device
A bent part is prevented from being damaged by preventing displacement of a bend. A display device includes a circuit substrate having a flat part and a bent part, a light emitting element layer disposed on each of unit pixels forming an image, a circuit layer stacked on an outside surface of the bent part, a sealing layer that covers and seals the light emitting element layer, and a double-sided tape that includes a base material having a first surface and a second surface, respectively provided with a first adhesive and a second adhesive, and is bent at an inside of the bent part of the circuit substrate with the first surface being outside. The first surface sticks to the circuit substrate, and the second surface is folded back and adhered together. |
| US09806283B2 |
Organic electroluminescent display panel, fabrication method thereof and display device
An organic electroluminescent display panel, a fabrication method thereof, and a display device are provided. The organic electroluminescent display panel comprises: a base substrate and a package cover plate disposed opposite to each other, and an organic electroluminescent structure disposed on the base substrate and provided between the base substrate and the package cover plate. The package cover plate has a first groove for accommodating the organic electroluminescent structure within a display region of the organic electroluminescent display panel; the package cover plate has at least one second groove surrounding the first groove and having a closed boundary within a non-display region of the organic electroluminescent display panel; the second groove accommodates a sealant; and there is a metal layer between a protrusion portion of the package cover plate and the base substrate. |
| US09806280B2 |
Organic electroluminescent element having a sealing substrate, and method for producing organic electroluminescent element
Provided is an organic EL element comprising: a gas barrier layer disposed on a substrate; a light-emitting part; an inorganic sealing layer; lead-out wiring that extends outside of the inorganic sealing layer; and a sealing substrate that is bonded via a resin adhesive layer, wherein the organic EL element is configured such that above at least the lead-out wiring, the sealing substrate is folded to the substrate side and makes contact with the inorganic sealing layer, and improvement of connection reliability with external equipment is possible. |
| US09806273B2 |
Field effect transistor array using single wall carbon nano-tubes
A field effect transistor array comprising a substrate and a plurality of single wall carbon nano-tubes disposed on a surface of the substrate. A plurality of electrodes are disposed over the nano-tubes such that the conductive strips are spaced-apart from each other. These electrodes form the contact point for the drain and source of the field effect transistor, while one or more of the nano-carbon tubes form the channel between the source and the drain. |
| US09806270B2 |
4H-imidazo[1,2-a]imidazoles for electronic applications
The present invention relates to compounds of formula a process for their production and their use in electronic devices, especially electroluminescent devices. When used as host material for phosphorescent emitters in electroluminescent devices, the compounds of formula I may provide improved efficiency, stability, manufacturability, or spectral characteristics of electroluminescent devices. |
| US09806268B2 |
Triazole derivative, and light-emitting element, light-emitting device, electronic device and lighting device using the triazole derivative
Objects are to provide the following: a substance that facilitates hole injection and has high triplet excitation energy; a light-emitting element having high emission efficiency using the substance that facilitates hole injection and has high triplet excitation energy; a light-emitting element having low driving voltage; and a light-emitting device, an electronic device, and a lighting device having low power consumption. Provided is a triazole derivative in which a dibenzothiophen-4-yl or dibenzofuran-4-yl group represented by General Formula (G2) is bonded to any one of Ar1 to Ar3 of a triazole derivative represented by General Formula (G1). In the formulas, A represents oxygen or sulfur, Ar1 to Ar3 separately represent a substituted or unsubstituted aryl group having 6 to 13 carbon atoms, and R1 to R7 separately represent hydrogen, an alkyl group having 1 to 4 carbon atoms, or a substituted or unsubstituted aryl group having 6 to 13 carbon atoms. |
| US09806266B2 |
Salts of phosphorus oxide as N-dopants for organic electronics
An organic electronic component contains a substrate, a first electrode, a second electrode and at least one electron transport layer between the first and second electrode. The electron transport layer is a salt-like derivative of a phosphorus oxo compound as n-dopant. |
| US09806262B2 |
Method of manufacturing organic light emitting device
Provided is a method of manufacturing an organic light emitting device, the method including forming a lower electrode on a lower substrate, forming an organic layer on the lower electrode, forming a light extraction layer including an adhesion layer and nanoparticles on an upper substrate, forming an upper electrode on the light extraction layer, and coupling the lower substrate to the upper substrate so that the upper electrode contacts the organic layer. The forming of the light extraction layer includes providing an adhesive between a first sacrificial substrate and the upper substrate, curing the adhesive to form the adhesion layer to form the adhesion layer, and removing the first sacrificial substrate to expose the adhesion layer. The first sacrificial substrate and the upper substrate are coupled to each other by the adhesion layer. |
| US09806261B2 |
Organic light emitting diode display
Disclosed is an organic light emitting diode (OLED) display comprising a substrate; an organic light emitting element disposed on the substrate; an encapsulation substrate disposed on the organic light emitting element; and an adhesive layer formed on the substrate, covering the organic light emitting element, and bonding the substrate on which the organic light emitting element is formed with the encapsulation substrate. |
| US09806258B2 |
Substrate imprinted with a pattern for forming isolated device regions
An example provides a method for forming an apparatus including a substrate imprinted with a pattern for forming isolated device regions. A method may include imprinting an unpatterned area of a substrate with a pattern to form a patterned substrate having a plurality of recessed regions at a first level and a plurality of elevated regions at a second level, and depositing a first layer of conductive material over the patterned substrate with a plurality of breaks to form a plurality of bottom electrodes. The method may include depositing a layer of an active stack, with a second layer of conductive material, over the plurality of bottom electrodes to form a plurality of devices on the plurality of recessed regions isolated from each other by the plurality of elevated regions. |
| US09806255B1 |
Resistive random access memory and method of forming the same
A resistive random access memory includes a lower electrode, an upper electrode and a resistive layer between the lower electrode and the upper electrode, wherein the resistive layer includes a constant-resistance portion and a variable-resistance portion surrounding the constant-resistance portion. |
| US09806254B2 |
Storage device with composite spacer and method for manufacturing the same
A storage device includes a first electrode, a second electrode, a storage element, a spacer and a barrier structure. The second electrode is opposite to the first electrode. The storage element is disposed between the first electrode and the second electrode. The spacer is formed on a sidewall of the second electrode, and the spacer has a notch positioned on a top surface of the spacer. The barrier structure is embedded in a lateral of the spacer, and the barrier structure has a top extending upwards past a bottom of the notch. In addition, a method of manufacturing the storage device is disclosed as well. |
| US09806248B2 |
Nanofiber-based thermoelectric generator module, method for manufacturing the same, and electrospinning apparatus for manufacturing nanofibers therefore
The present invention provides a method of manufacturing a nanofiber-based thermoelectric generator module, the method comprising: an electrode formation step of forming a plurality of electrodes and a plurality of second electrodes so as to be spaced apart from and opposite to each other in an alternately staggered arrangement relative to each other; a first nanofiber arrangement step of arranging a first nonofiber including an n-type or p-type semiconductor; and a second nanofiber arrangement step of arranging a second nonofiber including a semiconductor of a type different from the type of the semiconductor forming the first nanofiber, a nanofiber-based thermoelectric generator module manufactured by the method, and an electrospinning apparatus of manufacturing nanofibers for the nanofiber-based thermoelectric generator module. |
| US09806244B2 |
Substrate for light emitting device, light emitting device, and manufacturing method of substrate for light emitting device
Provided is a substrate for a light emitting device having high reflectivity, high heat radiating properties, dielectric strength voltage properties, long-term reliability including heat resistance and light resistance, and excellent mass productivity. A substrate (20) for a light emitting device includes: a first insulating layer (11) having thermal conductivity which is formed on a surface of one side of a metal base (2); a wiring pattern (3) which is formed on the first insulating layer (11); and a second insulating layer (12) having light reflectivity which is formed on the first insulating layer (11) and on some parts of the wiring pattern (3), so that some parts of the wiring pattern (3) are exposed, in which the first insulating layer (11) is a layer of ceramic formed by thermal spraying. |
| US09806243B2 |
Optoelectronic component and method for producing an optoelectronic component
In various embodiments, an optoelectronic component is provided. The optoelectronic component includes a carrier body. An optoelectronic layer structure is formed above the carrier body and has at least one contact region for electrically contacting the optoelectronic layer structure. A covering body is arranged above the optoelectronic layer structure. At least one contact cutout in which at least one part of the contact region is exposed extends through the carrier body and/or the covering body. At least one plug element for electrically contacting the optoelectronic component is arranged at least partly in the contact cutout and tightly closes the contact cutout. A contact medium, via which the plug element is electrically coupled to the contact region, is arranged in the contact cutout. |
| US09806239B2 |
Light emitting device
A light emitting device includes a substrate, a light emitting element mounted on the substrate, a phosphor plate for covering an upper surface of the light emitting element, a white reflecting resin placed on the substrate to surround side surfaces of the light emitting element and the phosphor plate, and a reflecting frame, including a reflecting film formed by plating and a bonding portion, and placed on the substrate to surround the light emitting element, the phosphor plate, and the white reflecting resin. The reflecting frame is directly bonded to the substrate by the bonding portion in a portion where the white reflecting resin is not located. |
| US09806237B2 |
Method for producing a light-emitting diode
A method for producing a light-emitting diode includes providing a light-emitting diode chip including a semiconductor body, and applying a luminescence conversion material to an outer area of the semiconductor body by thermal spraying such that at least part of electromagnetic radiation generated during operation of the light-emitting diode impinges on the luminescence conversion material, or providing a radiation-transmissive carrier, applying a luminescence conversion material to an outer area of the carrier by thermal spraying, and arranging the carrier at a radiation exit area of the light-emitting diode chip such that at least part of electromagnetic radiation generated during operation of the light-emitting diode impinges on the luminescence conversion material. |
| US09806235B2 |
Light emitting diode bracket
An LED bracket includes a first metal sheet, a second metal sheet and a casing. The casing covers the first and second metal sheets and includes a receiving slot. The casing partially covers the first and second metal sheets. The first metal sheet has a first pin terminal and a first carrying end. The second metal sheet has a second pin terminal and a second carrying end. The non-bent first and second pin terminals are opposite to each other and extended outwardly from the casing. The first and second carrying ends are disposed in the receiving slot and respectively have at least one first support portion and at least one second support portion to enhance the strength of fixing the first and second metal sheets with the casing. The non-bent pins improve the degree of freedom of the design of the casing and the light emission efficiency of LEDs. |
| US09806234B2 |
Light emitting device
A method of manufacturing a light emitting device includes a first step of mounting a light emitting element on a substrate having a conductor wiring and electrically connecting the light emitting element with the conductor wiring, a second step of disposing a light reflecting resin which reflects light from the light emitting element to surround the light emitting element, and a third step of disposing a sealing member after hardening the light reflecting resin to cover the light emitting element. |
| US09806232B2 |
Nitride semiconductor element and method for manufacturing the same
A nitride semiconductor element includes a sapphire substrate including: a main surface extending in a c-plane of the sapphire substrate, and a plurality of projections disposed at the main surface, the plurality of projections including at least one projection having an elongated shape in a plan view; and a nitride semiconductor layer disposed on the main surface of the sapphire substrate. The at least one projection has an outer edge extending in a longitudinal direction of the elongated shape, the outer edge extending in a direction oriented at an angle in a range of −10° to +10° with respect to an a-plane of the sapphire substrate in the plan view. |
| US09806228B2 |
Patterned layer design for group III nitride layer growth
A device having a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. |
| US09806225B2 |
Method of producing an optoelectronic semiconductor chip and an optoelectronic semiconductor chip
A method of producing an optoelectronic semiconductor chip includes providing a growth substrate and a semiconductor layer sequence grown on the growth substrate with a main extension plane including a p-conductive layer, an active zone and an n-conductive layer, removing the semiconductor layer sequence in regions to form at least one aperture extending through the p-conductive layer and the active zone into the n-conductive layer of the semiconductor layer sequence, depositing a protective layer on a side of the semiconductor layer sequence facing away from the growth substrate, depositing an aluminum layer containing aluminum across the entire surface on a side of the semiconductor layer sequence facing away from the growth substrate, removing the growth substrate, and forming a mesa by removing the semiconductor layer sequence at the regions of the protective layer, wherein the protective layer is subsequently freely externally accessible at least in places. |
| US09806223B2 |
Optoelectronic semiconductor chip and method for the production thereof
A method for producing an optoelectronic semiconductor chip based on a nitride semiconductor system is specified. The method comprises the steps of: forming a semiconductor section with at least one p-doped region; and forming a covering layer disposed downstream of the semiconductor section in a growth direction of the semiconductor chip, said covering layer having at least one n-doped semiconductor layer. An activation step suitable for electrically activating the p-doped region is effected before or during the formation of the covering layer. An optoelectronic semiconductor chip which can be produced by the method is additionally specified. |
| US09806220B2 |
Metal foil metallization for backplane-attached solar cells and modules
A back contact solar cell is described which includes a semiconductor light absorbing layer; a first-level metal layer (M1), the M1 metal layer on a back side of the light absorbing layer, the back side being opposite from a front side of the light absorbing layer designed to receive incident light; an electrically insulating backplane sheet backside of said solar cell with the M1 layer, the backplane sheet comprising a plurality of via holes that expose portions of the M1 layer beneath the backplane sheet; and an M2 layer in contact with the backplane sheet, the M2 layer made of a sheet of pre-fabricated metal foil material comprising a thickness of between 5-250 μm, the M2 layer electrically connected to the M1 layer through the via holes in the backplane sheet. |
| US09806219B2 |
Displays with camera window openings
A display may include a color filter layer, a liquid crystal layer, and a thin-film transistor layer. A camera window may be formed in the display to accommodate a camera. The camera window may be formed by creating a notch in the thin-film transistor layer that extends inwardly from the edge of the thin-film transistor layer. The notch may be formed by scribing the thin-film transistor layer around the notch location and breaking away a portion of the thin-film transistor layer. A camera window may also be formed by grinding a hole in the display. The hole may penetrate partway into the thin-film transistor layer, may penetrate through the transistor layer but not into the color filter layer, or may pass through the thin-film transistor layer and partly into the color filter layer. |
| US09806212B2 |
Ultrathin group II-VI semiconductor layers, group II-VI semiconductor superlattice structures, photovoltaic devices incorporating the same, and related methods
Disclosed are ultrathin layers of group II-VI semiconductors, group II-VI semiconductor superlattice structures, photovoltaic devices incorporating the layers and superlattice structures and related methods. The superlattice structures comprise an ultrathin layer of a first group II-VI semiconductor alternating with an ultrathin layer of at least one additional semiconductor, e.g., a second group II-VI semiconductor, or a group IV semiconductor, or a group III-V semiconductor. |
| US09806208B2 |
Method of passivating an iron disulfide surface via encapsulation in a zinc sulfide matrix
A method for passivating the surface of crystalline iron disulfide (FeS2) by encapsulating it within an epitaxial zinc sulfide (ZnS) matrix. Also disclosed is the related product comprising FeS2 encapsulated by a ZnS matrix in which the sulfur atoms at the FeS2 surfaces are passivated. Additionally disclosed is a photovoltaic (PV) device incorporating FeS2 encapsulated by a ZnS matrix. |
| US09806202B2 |
Semiconductor device and memory device
The present invention provides a transistor having a high on-state current. The transistor includes a plurality of fins, a first oxide semiconductor, a gate insulating film, and a gate electrode. One of adjacent two fins includes a second oxide semiconductor and a third oxide semiconductor. The other includes a fourth oxide semiconductor and the third oxide semiconductor. The second oxide semiconductor and the fourth oxide semiconductor include regions that face each other with the gate electrode positioned therebetween. The gate electrode and the second oxide semiconductor overlap with each other with the gate insulating film and the first oxide semiconductor positioned therebetween. The gate electrode and the fourth oxide semiconductor overlap with each other with the gate insulating film and the first oxide semiconductor positioned therebetween. |
| US09806201B2 |
Semiconductor device
A method for forming an oxide that can be used as a semiconductor of a transistor or the like is provided. In particular, a method for forming an oxide with fewer defects such as grain boundaries is provided. One embodiment of the present invention is a semiconductor device including an oxide semiconductor, an insulator, and a conductor. The oxide semiconductor includes a region overlapping with the conductor with the insulator therebetween. The oxide semiconductor includes a crystal grain with an equivalent circle diameter of 1 nm or more and a crystal grain with an equivalent circle diameter less than 1 nm. |
| US09806200B2 |
Semiconductor device
A semiconductor device including a miniaturized transistor is provided. The semiconductor device includes a first insulator, a second insulator, a semiconductor, and a conductor. The semiconductor is over the first insulator. The second insulator is over the semiconductor. The conductor is over the second insulator. The semiconductor includes a first region, a second region, and a third region. The first region is a region where the semiconductor overlaps with the conductor. Each of the second region and the third region is a region where the semiconductor does not overlap with the conductor. The second region and the third region each have a region with a spinel crystal structure. |
| US09806197B1 |
Display device having back gate electrodes
A display device including a substrate, a first gate electrode, a second gate electrode, an active layer, and a first data electrode is provided. The active layer is disposed between the first gate electrode and the second gate electrode. And one of the first gate electrode and the second gate electrode is connected to the data line, so as to reduce the off leak current. |
| US09806195B2 |
Method for fabricating transistor with thinned channel
A method of fabricating a MOS transistor having a thinned channel region is described. The channel region is etched following removal of a dummy gate. The source and drain regions have relatively low resistance with the process. |
| US09806193B2 |
Stress in trigate devices using complimentary gate fill materials
Embodiments relate to an improved tri-gate device having gate metal fills, providing compressive or tensile stress upon at least a portion of the tri-gate transistor, thereby increasing the carrier mobility and operating frequency. Embodiments also contemplate method for use of the improved tri-gate device. |
| US09806191B1 |
Vertical channel oxide semiconductor field effect transistor and method for fabricating the same
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a source layer; removing part of the source layer to form a first opening; forming a first channel layer in the first opening; forming a gate layer around the first channel layer and on the source layer; forming a drain layer on the gate layer and the first channel layer; removing part of the drain layer to form a second opening; and forming a second channel layer in the second opening. |
| US09806189B2 |
Semiconductor device
A semiconductor device includes a first conductivity type semiconductor layer, a second conductivity type body region in a semiconductor layer surface portion, a first conductivity type source region in a body region surface, apart from a peripheral edge of the body region, a first conductivity type drain region in the semiconductor layer surface portion apart from the body region, a gate electrode opposing the body region across a gate insulating film between the source and drain regions, an insulating layer on the semiconductor layer, resin on the insulating layer, a source electrode in the insulating layer, electrically connected to the source region, a drain electrode in the insulating layer, electrically connected to the drain region, and conductive shielding in the insulating layer, overlapping in a plan view from a direction normal to a semiconductor layer surface, the drain region and the gate electrode, and covering a region between them. |
| US09806186B2 |
Termination region architecture for vertical power transistors
A vertical power switching device, such as a vertical superjunction metal-oxide-semiconductor field-effect-transistor (MOSFET), in which termination structures in the corners of the integrated circuit are stretched to efficiently shape the lateral electric field. Termination structures in the device include such features as doped regions, field plates, insulator films, and high-voltage conductive regions and elements at the applied substrate voltage. Edges of these termination structures are shaped and placed according to a 2nd-order smooth, non-circular analytic function so as to extend deeper into the die corner from the core region of the device than a constant-distance path. Also disclosed are electrically floating guard rings in the termination region, to inhibit triggering of parasitic p-n-p-n structures. |
| US09806185B2 |
Non-volatile memory device and method of manufacturing the same
A non-volatile memory device and a method of manufacturing the same are provided. The device includes a substrate including a cell region and a peripheral region, a gate pattern formed over the substrate in the peripheral region, a multilayered structure formed over the gate pattern in the peripheral region, the multilayered structure including interlayer insulating layers and material layers for sacrificial layers, and a capping layer formed between the gate pattern and the multilayered structure in the peripheral region to cover the substrate, the capping layer configured to prevent diffusion of impurities from the material layers for the sacrificial layers into the substrate in the peripheral region. |
| US09806181B2 |
Insulated gate power device using a MOSFET for turning off
An insulated gate turn-off (IGTO) device has a PNPN layered structure so that vertical NPN and PNP transistors are formed. Trench gates are formed extending into the intermediate P-layer. The device is formed of an array of cells. A P-channel MOSFET, having a trenched gate, is formed in some of the cells. The control terminal of the IGTO device is connected to the insulated gates of all cells, including to the gate of the P-channel MOSFET, and to the intermediate P-layer. To turn the device on, a positive voltage is applied to the control terminal to turn on the NPN transistor by forward biasing its base-emitter. To turn off the IGTO device, a negative voltage is applied to the control terminal to turn on the P-channel MOSFET to short the NPN base to its emitter. |
| US09806180B2 |
Forming a non-planar transistor having a quantum well channel
In one embodiment, the present invention includes an apparatus having a substrate, a buried oxide layer formed on the substrate, a silicon on insulator (SOI) core formed on the buried oxide layer, a compressive strained quantum well (QW) layer wrapped around the SOI core, and a tensile strained silicon layer wrapped around the QW layer. Other embodiments are described and claimed. |
| US09806178B2 |
FinFET structure and method for fabricating the same
A method comprises recessing a substrate to form a fin enclosed by an isolation region, wherein the substrate is formed of a first semiconductor material, recessing the fin to form a trench over a lower portion of the fin, growing a second semiconductor material in the trench to form a middle portion of the fin through a first epitaxial process, forming a first carbon doped layer over the lower portion through a second epitaxial process, growing the first semiconductor material over the first carbon doped layer to form an upper portion of the fin through a third epitaxial process, forming a first source/drain region through a fourth epitaxial process, wherein a second carbon doped layer is formed underlying the first source/drain region and applying a thermal oxidation process to the middle portion of the fin to form an oxide outer layer. |
| US09806176B2 |
Structure and method for defect passivation to reduce junction leakage for finfet device
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate of a first semiconductor material; shallow trench isolation (STI) features formed in the semiconductor substrate; and a fin-like active region of a second semiconductor material epitaxy grown on the semiconductor substrate. The first semiconductor material has a first lattice constant and the second semiconductor material has a second lattice constant different from the first lattice constant. The fin-like active region further includes fluorine species. |
| US09806174B2 |
Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structure
A double-RESURF LDMOS transistor has a gate dielectric structure including a shallow field “bump” oxide region and an optional raised dielectric structure that provides a raised support for the LDMOS transistor's polysilicon gate electrode. Fabrication of the shallow field oxide region is performed through a hard “bump” mask and controlled such that the bump oxide extends a minimal depth into the LDMOS transistor's drift (channel) region. The hard “bump” mask is also utilized to produce an N-type drift (N-drift) implant region and a P-type surface effect (P-surf) implant region, whereby these implants are “self-aligned” to the gate dielectric structure. The N-drift implant is maintained at Vdd by connection to the LDMOS transistor's drain diffusion. An additional Boron implant is utilized to form a P-type buried layer that connects the P-surf implant to the P-body region of the LDMOS transistor, whereby the P-surf implant is maintained at 0V. |
| US09806169B2 |
Semiconductor devices having a gate stack
Semiconductor devices and methods for manufacturing the same are provided. In one embodiment, the method may include: forming a first shielding layer on a substrate, and forming one of source and drain regions with the first shielding layer as a mask; forming a second shielding layer on the substrate, and forming the other of the source and drain regions with the second shielding layer as a mask; removing a portion of the second shielding layer which is next to the other of the source and drain regions; forming a gate dielectric layer, and forming a gate conductor as a spacer on a sidewall of a remaining portion of the second shielding layer; and forming a stressed interlayer dielectric layer on the substrate. |
| US09806165B2 |
Manufacturing method of semiconductor device and semiconductor device
The thickness of an insulating film, which will serve as an offset spacer film and is formed in an offset monitor region, is managed as the thickness of an offset spacer film formed over the side wall surface of a gate electrode of an SOTB transistor STR, etc. When the measured thickness is within the tolerance of a standard thickness, standard implantation energy and a standard dose amount are set. When the measured thickness is smaller than the standard thickness, implantation energy and a dose amount, which are respectively lower than the standard values thereof, are set. When the measured thickness is larger than the standard thickness, implantation energy and a dose amount, which are respectively higher than the standard values thereof, are set. |
| US09806163B2 |
Semiconductor device having an nMOS SGT and a pMOS SGT
A semiconductor device includes first and second fin-shaped silicon layers on a substrate, each corresponding to the dimensions of a sidewall pattern around a dummy pattern. First and second pillar-shaped silicon layers reside on the first and second fin-shaped silicon layers, respectively. An n-type diffusion layer resides in an upper portion of the first fin-shaped silicon layer and in upper and lower portions of the first pillar-shaped silicon layer. A p-type diffusion layer resides in an upper portion of the second fin-shaped silicon layer and upper and lower portions of the second pillar-shaped silicon layer. First and second gate insulating films and metal gate electrodes are around the first and second pillar-shaped silicon layers, respectively. A metal gate line is connected to the first and second metal gate electrodes and extends in a direction perpendicular to the first and second fin-shaped silicon layers. |
| US09806161B1 |
Integrated circuit structure having thin gate dielectric device and thick gate dielectric device
One aspect of the disclosure relates to and integrated circuit structure and methods of forming the same. The integrated circuit structure may include: a thin gate dielectric device on a substrate, the thin gate dielectric device including: a first interfacial layer over a set of fins within the substrate, wherein the interfacial layer has a thickness of approximately 1.0 nanometers (nm) to approximately 1.2 nm; and a thick gate dielectric device on the substrate adjacent to the thin gate dielectric device, the thick gate dielectric device including: a second interfacial layer over the set of fins within the substrate; and a nitrided oxide layer over the second interfacial layer, wherein the nitrided oxide layer includes a thickness of approximately 3.5 nm to approximately 5.0 nm. |
| US09806160B2 |
Power integrated devices, electronic devices including the same, and electronic systems including the same
A power integrated device includes a semiconductor layer having first conductivity, a source region and a drain region each having second conductivity and disposed in the semiconductor layer, wherein the source region and the drain region are spaced apart from each other, a first drift region having the second conductivity, disposed in the semiconductor layer, and surrounding the drain region, a second drift region having the second conductivity, disposed in the semiconductor layer, contacting a sidewall of the first drift region, and having an impurity concentration lower than an impurity concentration of the first drift region, a gate insulation layer disposed over a channel region between the source region and the second drift region and extending over the second drift region, a field insulation plate disposed over the second drift region and the first drift region, contacting a sidewall of the gate insulation layer, and having a planar structure, and a gate conductive pattern disposed over the gate insulation layer, wherein the gate conductive pattern extends over the field insulation plate. |
| US09806157B2 |
Structure and method for transient voltage suppression devices with a two-region base
A transient voltage suppression (TVS) device and a method of forming the device are provided. The TVS device includes a first layer of wide band-gap semiconductor material formed of a first conductivity type material, a second layer of wide band-gap semiconductor material formed of a second conductivity type material over at least a portion of the first layer, the second layer including a first concentration of dopant. The TVS device further including a third layer of wide band-gap semiconductor material formed of the second conductivity type material over at least a portion of the second layer, the third layer including a second concentration of dopant, the second concentration of dopant being different than the first concentration of dopant. The TVS device further including a fourth layer of wide band-gap semiconductor material formed of the first conductivity type material over at least a portion of the third layer. |
| US09806155B1 |
Split fin field effect transistor enabling back bias on fin type field effect transistors
A method of forming the semiconductor device that may include forming a trench in a substrate, and forming a metal nitride in the trench. The method may further include forming a split fin structure from the substrate. The metal nitride is positioned in the split portion of the fin structure. The method may continue with removing the metal nitride from a source region and drain region portion of the split fin structure, in which the metal nitride remains in a channel region portion of the split fin structure. A gate structure may then be formed on a channel region portion of the fin structure. A back bias is applied to the semiconductor device using the metal nitride in the split portion of the fin structure as an electrode. |
| US09806153B1 |
Controlling channel length for vertical FETs
A vertical-type semiconductor device includes a first source/drain (S/D) region on an upper surface of a semiconductor substrate. A channel region is on an upper surface of the first S/D region, and extends along the vertical axis to define a channel length. A second S/D region is on an upper surface of the channel region, and separates the second S/D region from directly contacting the semiconductor substrate. An electrically conductive gate wraps around all outer surfaces of the channel region. The gate extends along the vertical axis to define a gate length that is less than the channel length. Dielectric gate elements are interposed between an upper surface of the gate and a lower surface of the second S/D region, and are configured to electrically insulate the gate from the second S/D region. |
| US09806149B2 |
Semiconductor device and method of manufacturing the semiconductor device
A MISFET has a threshold voltage that is not undesirably increased due to channel narrowing of the MISFET, and the MISFET is reduced in size and increased in withstand voltage. An anti-inversion p-type channel stopper region provided below an element isolation trench has an end that projects toward a channel region below a gate oxide film, and terminates short of the channel region. That is, the end is offset from the end of the channel region (the end of the element isolation trench). This suppresses diffusion in a lateral direction (channel region direction) of an impurity in the p-type channel stopper region, and thus suppresses a decrease in carrier concentration at the end of the channel region. As a result, a local increase in threshold voltage is suppressed. |
| US09806148B2 |
Device isolator with reduced parasitic capacitance
Isolator structures for an integrated circuit with reduced effective parasitic capacitance. Disclosed embodiments include an isolator structure with parallel conductive elements forming a capacitor or inductive transformer, overlying a semiconductor structure including a well region of a first conductivity type formed within an tank region of a second conductivity type. The tank region is surrounded by doped regions and a buried doped layer of the first conductivity type, forming a plurality of diodes in series to the substrate. The junction capacitances of the series diodes have the effect of reducing the parasitic capacitance apparent at the isolator. |
| US09806143B2 |
Organic light-emitting device
The present specification relates to an organic light emitting device. |
| US09806142B2 |
Display device
A display device comprising: a substrate with a display region and a border region; a first metal layer disposed on the substrate; a first insulating layer disposed on the first metal layer and having a first contact via on the border region; a second metal layer disposed on the first insulating layer and in the first contact via to electrically connect to the first metal layer; a second insulating layer disposed on the second metal layer; a first electrode layer disposed on the second insulating layer and having a first opening; a third insulating layer disposed on the first electrode layer and has a second opening on the border region; and a second electrode layer disposed on the third insulating layer and in the second opening to electrically connect to the first electrode layer, wherein the first contact via corresponds to the first opening, is disclosed. |
| US09806141B2 |
Organic light emitting display device having light blocking layer connecting adjacent subpixels and method for manufacturing the same
An organic light emitting display device has a display panel including a first subpixel, a second subpixel, a data line, and sensing lines. The sensing lines may include a vertical sensing line and a horizontal sensing line connected to the vertical sensing line. The horizontal sensing line may be formed of a source/drain metal layer present on the first substrate, and one portion thereof connected to a first electrode of a sensing transistor of the first subpixel and the other portion thereof connected to a first electrode of a sensing transistor of the second subpixel may be positioned in a region intersecting with the data line, and electrically connected by a connection electrode formed of an insulated light blocking layer below the source/drain metal layer present on the first substrate. |
| US09806137B2 |
Display substrates, methods of manufacturing the same and display devices including the same
A display substrate includes a base substrate, a switching device on the base substrate and an alignment pattern. The switching device includes an active pattern, a gate insulation layer pattern partially covering the active pattern, a gate electrode on the gate insulation layer pattern, and a source electrode and a drain electrode electrically connected to the active pattern. The alignment pattern has a multi-layered structure and is spaced apart from the switching device on the base substrate. The alignment pattern includes materials which have different transmittances. |
| US09806132B2 |
Organic X-ray detector with barrier layer
An organic x-ray detector and a method of making the organic x-ray detector are disclosed. The x-ray detector includes a TFT array disposed on a substrate, an organic photodiode layer disposed on the TFT array, a barrier layer disposed on the photodiode layer, and a scintillator layer disposed on the barrier layer, such that the barrier layer includes at least one inorganic material. |
| US09806130B2 |
Memory element with a reactive metal layer
A re-writeable non-volatile memory device including a re-writeable non-volatile two-terminal memory element (ME) having tantalum. The ME including a first terminal, a second terminal, a first layer of a conductive metal oxide (CMO), and a second layer in direct contact with the first layer. The second layer and the first layer being operative to store at least one-bit of data as a plurality of resistive states, and the first and second layer are electrically in series with each other and with the first and second terminals. |
| US09806129B2 |
Cross-point memory and methods for fabrication of same
The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material. The method of fabricating cross-point arrays further comprises patterning the memory cell material stack, which includes etching through at least one of the first and second active materials of the memory cell material stack, forming protective liners on sidewalls of the at least one of the first and second active materials after etching through the one of the first and second active materials, and further etching the memory cell material stack after forming the protective liners on the sidewalls of the one of the first and second active materials. |
| US09806128B2 |
Interposers for integrated circuits with multiple-time programming and methods for manufacturing the same
An interposer for an integrated circuit includes a first side and a second side. The interposer includes a substrate and a via disposed in the substrate. A first electrical contact is disposed on the first side. A second electrical contact is disposed on the second side and electrically connected to the via. The interposer also includes a multiple-time programmable (“MTP”) element electrically connected to the first electrical contact and/or the via. |
| US09806127B1 |
Micro wall light emitting diodes
Embodiments related to light emitting diodes having an electron transport layer core with first and second opposite sidewalls extending from a proximal end of the electron transport layer core adjacent to the substrate to a distal end of the electron transport layer core extending away from the substrate, an emission layer disposed on both the first and second sidewalls, and a hole transport layer disposed on the emission layer, displays having such light emitting diodes, systems incorporating such light emitting diodes, and methods for fabricating them are discussed. |
| US09806125B2 |
Compositionally graded photodetectors
An ultraviolet photodetector for a sensor device includes a film deposited on a substrate. The film includes a compositionally graded magnesium-zinc oxide having a ratio of magnesium-to-zinc that decreases between a portion of the film adjacent to the substrate and a portion of the film opposite the substrate for shifting the peak absorption of the film toward the visible wavelengths of the electromagnetic spectrum. |
| US09806124B2 |
Solid state image pickup apparatus and method for manufacturing the same
When forming a hollow portion between each color filter, in order to realize the formation of the hollow portions with a narrower width, a plurality of light receiving portions are formed on the upper surface of a semiconductor substrate, a plurality of color filters corresponding to each of the light receiving portions are formed above the semiconductor substrate, a photoresist is formed on each color filter, side walls are formed on the side surfaces of the photoresist, and a hollow portion is formed between each color filter by performing etching using at least the side walls as a mask. |
| US09806123B2 |
Image sensor and manufacturing method thereof
Provided are an image sensor and a method of manufacturing method of manufacturing the image sensor. The image sensor includes a substrate, photoelectric transducers and switching elements formed in layers on the substrate in this order. Each of the photoelectric transducers includes a hydrogenated amorphous silicon layer. Each of the switching elements includes an amorphous oxide semiconductor layer. The image sensor further includes a blocking layer arranged between the hydrogenated amorphous silicon layers of the photoelectric transducers and the amorphous oxide semiconductor layers of the switching elements, where the blocking layer suppresses penetration of hydrogen separated from the hydrogenated amorphous silicon layers. |
| US09806121B2 |
Solid-state imaging device
A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer. |
| US09806120B2 |
Solid-state image pickup apparatus and electronic apparatus
A solid-state image pickup apparatus includes a pixel region in which a plurality of pixels each including a photoelectric conversion element are arranged, transfer wirings formed on the pixel region in parallel to each other with uniform opening widths, and different wirings formed in a wiring layer above the transfer wirings. At least a part of the different wirings is overlapped with the transfer wirings on a plan position. The transfer wirings and the different wirings form a light shielding structure in the pixel region. |
| US09806118B2 |
Solid-state imaging device, manufacturing method thereof, and electronic apparatus
A solid-state imaging device includes a plurality of photoelectric conversion portions each provided to correspond to each of a plurality of pixels in a semiconductor substrate and receiving incident light through a light sensing surface, and a pixel separation portion that is embedded into a trench provided on a side portion of the photoelectric conversion portion and electrically separates the plurality of pixels in a side of an incident surface of the semiconductor substrate into which the incident light enters. The pixel separation portion is formed by an insulation material which absorbs the incident light entering the light sensing surface. |
| US09806113B2 |
CMOS image sensors including vertical transistor
Provided is a complementary metal-oxide-semiconductor (CMOS) image sensor. The CMOS image sensor can include a substrate having a first device isolation layer defining and dividing a first active region and a second active region, a photodiode disposed in the substrate and can be configured to vertically overlap the first device isolation layer, a transfer gate electrode can be disposed in the first active region and can be configured to vertically overlap the photodiode, and a floating diffusion region can be in the first active region. The transfer gate electrode can be buried in the substrate. |
| US09806112B1 |
Electrostatic discharge guard structure
The present application provides an electrostatic discharge guard structure for photonic platform based photodiode systems. In particular this application provides a photodiode assembly comprising: a photodiode (such as a Si or SiGe photodiode); a waveguide (such as a silicon waveguide); and a guard structure, wherein the guard structure comprises a diode, extends about all or substantially all of the periphery of the Si or SiGe photodiode and allows propagation of light from the silicon waveguide into the Si or SiGe photodiode. |
| US09806107B2 |
Semiconductor device
Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type. |
| US09806105B2 |
Thin film transistor substrate, display device including a thin film transistor substrate, and method of forming a thin film transistor substrate
Provided are a thin film transistor (TFT) substrate, a display device, and a method of forming the TFT. A TFT substrate includes: a first TFT including: a polycrystalline semiconductor (PS) layer, a first gate electrode (GE) overlapping the PS layer, a nitride layer (NL) on the first GE, an oxide layer (OL) on the NL, and a first source electrode and a first drain electrode on the OL, and a second TFT including: a second GE on a same layer as the first GE, a hydrogen collecting layer between the second GE and the NL, an oxide semiconductor (OS) layer on the OL, a second source electrode and a second drain electrode contacting respective sides of the OS layer, wherein the first TFT and the second TFT are disposed on a same substrate, and wherein the NL includes an opening exposing the hydrogen collecting layer of the second TFT. |
| US09806099B2 |
Semiconductor device
A semiconductor device including a capacitor whose charge capacity is increased while improving the aperture ratio is provided. Further, a semiconductor device which consumes less power is provided. A transistor which includes a light-transmitting semiconductor film, a capacitor in which a dielectric film is provided between a pair of electrodes, an insulating film which is provided over the light-transmitting semiconductor film, and a first light-transmitting conductive film which is provided over the insulating film are included. The capacitor includes the first light-transmitting conductive film which serves as one electrode, the insulating film which functions as a dielectric, and a second light-transmitting conductive film which faces the first light-transmitting conductive film with the insulating film positioned therebetween and functions as the other electrode. The second light-transmitting conductive film is formed over the same surface as the light-transmitting semiconductor film of the transistor and is a metal oxide film containing a dopant. |
| US09806096B2 |
Semiconductor device and method for manufacturing the same
An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si. |
| US09806094B2 |
Non-uniform spacing in transistor stacks
Field effect transistor stacks include a first field-effect transistor having a source finger, a drain finger, and a gate finger interposed therebetween, the source finger and the drain finger of the first field-effect transistor being separated by a first drain-to-source distance, and a second field-effect transistor in a series connection with the first field-effect transistor, the second field-effect transistor having a source finger, a drain finger, and a gate finger interposed therebetween, the source finger and the drain finger of the second field-effect transistor being separated by a second drain-to-source distance that is different than the first drain-to-source distance. |
| US09806092B1 |
Semiconductor memory device and methods for manufacturing the same
According to one embodiment, a semiconductor memory device includes first to fourth conductive layers, a first intermediate insulating layer, a second intermediate insulating layer, an inter-layer insulating layer, a first semiconductor body, a first memory layer, a second semiconductor body, a second memory layer, and a first interconnect. The second conductive layer is separated from the first conductive layer in a first direction. The third conductive layer is arranged with the first conductive layer in a second direction crossing the first direction. The fourth conductive layer is separated from the third conductive layer in the first direction and arranged with the second conductive layer in the second direction. The first intermediate insulating layer is provided between the first conductive layer and the third conductive layer. The second intermediate insulating layer is provided between the second conductive layer and the fourth conductive layer. |
| US09806091B2 |
Semiconductor memory device
A semiconductor memory device according to an embodiment comprises: a plurality of control gate electrodes arranged in a first direction intersecting an upper surface of a substrate; a semiconductor layer extending in the first direction and facing a plurality of the control gate electrodes from a second direction intersecting the first direction; and a gate insulating layer provided between the control gate electrode and the semiconductor layer. The semiconductor layer comprises: a first portion extending in the first direction and facing a plurality of the control gate electrodes; and a second portion provided on a closer side to the substrate than this first portion. A film thickness of the first portion in the second direction is larger than a film thickness of the second portion in the second direction. A crystal grain included in the first portion is larger than a crystal grain included in the second portion. |
| US09806085B1 |
Semiconductor device and method of forming the same
The present invention provides a semiconductor device and a method of forming the same, and the semiconductor device includes a first insulating layer, a source and a drain, a stacked structure, a second insulating layer, and a gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed on the first insulating layer, and the stacked structure is also disposed on the first insulating layer, between the source and the drain. The stacked structure includes a charge storage layer and an oxide semiconductor (OS) layer disposed on the charge storage layer. The second insulating layer covers the source, the drain and the OS layer. The gate is disposed on the second insulating layer. |
| US09806081B2 |
Semiconductor device having sub-cell blocks
A semiconductor device includes a substrate with cell and peripheral regions and capacitors provided on the cell region. The cell region may include a plurality of sub-cell blocks, which are spaced apart from each other by a plurality of sub-peripheral regions, and on which the capacitors are provided. Each of the sub-peripheral regions may have a width that is two to five times a distance between centers of an adjacent pair of the capacitors. |
| US09806080B2 |
Semiconductor devices and methods of manufacturing the same
A semiconductor device includes a substrate, a memory structure and a capacitor structure including at least one array of capacitors. The memory structure is disposed in a first region of the device. The capacitor structure is disposed in a second region of the device. The capacitor structure may include a first capacitor array, a second capacitor array, a third capacitor array and a first landing pad. The first landing pad is disposed between the substrate and lower electrodes of capacitors of the first and second capacitor arrays, and contacts the lower electrodes so as to electrically connect the first capacitor array and the second capacitor array. Upper electrodes of capacitors of the second and third capacitor arrays are integral such that the second capacitor array and the third capacitor array are electrically connected to each other. |
| US09806077B2 |
Semiconductor structure with low defect and method for forming the same
A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a fin structure over a substrate and forming an insulating layer around the fin structure. The method for manufacturing a semiconductor structure further includes removing a portion of the fin structure to form a trench in the insulating layer and filling the trench with a semiconductor material. The method for manufacturing a semiconductor structure further includes reflowing the semiconductor material to form a nanowire structure and a cavity under the nanowire structure. |
| US09806076B2 |
FinFET device and method of manufacturing same
A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device further includes a gate structure disposed on a portion of the fin structure and on a portion of the insulation material. The gate structure traverses each fin of the fin structure. The semiconductor device further includes a source and drain feature formed from a material having a continuous and uninterrupted surface area. The source and drain feature includes a surface in a plane that is in direct contact with a surface in a parallel plane of the insulation material, each of the one or more fins of the fin structure, and the gate structure. |
| US09806071B2 |
Integrated circuit with elongated coupling
An integrated circuit comprises a first layer on a first level. The first layer comprises a set of first lines. The first lines each have a length and a width. The length of each of the first lines is greater than the width. The integrated circuit also comprises a second layer on a second level different from the first level. The second layer comprises a set of second lines. The second lines each have a length and a width. The length of each of the second lines is greater than the width. The integrated circuit further comprises a coupling configured to connect at least one first line of the set of first lines with at least one second line of the set of second lines. The coupling has a length and a width. The set of second lines has a pitch measured between the lines of the set of second lines in the first direction. The length of the first coupling is greater than or equal to the pitch. |
| US09806070B2 |
Semiconductor device layout, memory device layout, and method of manufacturing semiconductor device
A layout of a semiconductor device includes active area regions, gate electrodes crossing the plurality of active area regions, spacers along sides of the corresponding plurality of gate electrodes, a first contact patterning region, a second contact patterning region, and a contact area. The first contact patterning region overlaps at least one active area region among the plurality of active area regions, at least one gate electrode among the plurality of gate electrodes, and at least one spacer among the plurality of spacers, the at least one spacer corresponding to the at least one gate electrode. The second contact patterning region overlaps a portion of the first contact patterning region. The contact area overlaps the at least one active area region. A boundary of the contact area is defined by boundaries of the first contact patterning region, the second contact patterning region and the at least one spacer. |
| US09806068B2 |
Semiconductor device
Inside an IGBT using GaN or SiC, light having an energy of approximately 3 [eV] is generated. Therefore, defects are caused in the gate insulating film of the IGBT. Furthermore, the charge trapped at a deep level becomes excited and moves to the channel region, thereby causing the gate threshold voltage to fluctuate from the predetermined value. Provided is a semiconductor device including a normally-ON semiconductor element that includes a first semiconductor layer capable of conductivity modulation and a first gate electrode, but does not include a gate insulating film between the first gate electrode and the first semiconductor layer; and a normally-OFF semiconductor element that includes a second semiconductor layer, a second gate electrode, and a gate insulating film between the second semiconductor layer and the second gate electrode. The normally-ON semiconductor element and the normally-OFF semiconductor element are connected in series. |
| US09806067B2 |
Die-die stacking
A semiconductor die is provided with an optical transmitter configured to transmit an optical signal to another die and an optical receiver configured to receive an optical signal from another die. Furthermore, a method of forming a semiconductor device is provided including forming a first semiconductor die with the steps of providing a semiconductor substrate, forming a transistor device at least partially over the semiconductor substrate, forming an optical receiver one of at least partially over and at least partially in the semiconductor substrate, forming a metallization layer over the transistor device, and forming an optical transmitter one of at least partially over the metallization layer and at least partially in the metallization layer. |
| US09806063B2 |
Reinforced wafer level package comprising a core layer for reducing stress in a solder joint and improving solder joint reliability
Some features pertain to a package that includes a redistribution portion, a first die coupled to the redistribution portion, a core layer coupled to the redistribution portion, and an encapsulation layer encapsulating the first die and the core layer. The redistribution portion includes a first dielectric layer. The core layer has a higher Young's Modulus than the encapsulation layer. In some implementations, the core layer includes a glass fiber (e.g., core layer is a glass reinforced dielectric layer). In some implementations, the core layer has a Young's Modulus of about at least 15 gigapascals (Gpa). In some implementations, the first die includes a front side and a back side, where the front side of the first die is coupled to the redistribution portion. In some implementations, the first dielectric layer is a photo imageable dielectric (PID) layer. |
| US09806061B2 |
Bumpless wafer level fan-out package
An integrated circuit package may include a first conductive pad on an interposer substrate, and a second conductive pad formed on a front surface of an integrated circuit die. The second conductive pad may directly contact the first conductive pad on the interposer substrate. The integrated circuit package may further include a package substrate having a cavity, in which the interposer substrate and the integrated circuit are disposed in the cavity. The interposer substrate may include interconnect pathways that are electrically coupled to the first and second conductive pads. A heat spreader may subsequently form over the integrated circuit die and the package substrate. |
| US09806060B2 |
Flexible packages including chips
A flexible package may be provided. The flexible package may include a flexible molding member including a top surface. The flexible package may include a first chip within the flexible molding member, and including a first top surface. The flexible package may include a second chip within the flexible molding member, and including a second top surface. The first top surface may face away from the top surface of the flexible molding member and the second top surface may face towards the top surface of the flexible molding member. |
| US09806059B1 |
Multi-stack package-on-package structures
Multi-stack package-on-package structures are disclosed. In a method, a first stacked semiconductor device is formed on a first carrier wafer. The first stacked semiconductor device is singulated. The first stacked semiconductor device is adhered to a second carrier wafer. A second semiconductor device is attached on the first stacked semiconductor device. The second semiconductor device and the first stacked semiconductor device are encapsulated. Electrical connections are formed on and electrically coupled to the first stacked semiconductor device and the second semiconductor device. |
| US09806058B2 |
Chip package having die structures of different heights and method of forming same
Structures and formation methods of a chip package are provided. The chip package includes a chip stack including a number of semiconductor dies. The chip package also includes a semiconductor chip, and the semiconductor chip is higher than the chip stack. The chip package further includes a package layer covering a top and sidewalls of the chip stack and sidewalls of the semiconductor chip. |
| US09806056B2 |
Method of packaging integrated circuits
Integrated circuits are packaged by placing a plurality of semiconductor dies on a support substrate, each one of the semiconductor dies having a plurality of terminals at a side facing the support substrate and covering the semiconductor dies with a molding compound to form a molded structure. The support substrate is then removed from the molded structure to expose the side of the semiconductor dies with the terminals, and a metal redistribution layer is formed on the molded structure and in direct contact with the terminals of the semiconductor dies and the molding compound. The redistribution layer is formed without first forming a dielectric layer on a side of the molded structure with the terminals of the semiconductor dies. A corresponding molded substrate and individual molded semiconductor packages are also disclosed. |
| US09806050B2 |
Method of fabricating package structure
A package structure includes: a first dielectric layer having a first surface and a second surface opposing the first surface; a semiconductor chip embedded in the first dielectric layer in a manner that the semiconductor chip protrudes from the second surface, and having an active surface and an inactive surface opposing the active surface, electrode pads being disposed on the active surface and in the first dielectric layer, the inactive surface and a part of a side surface adjacent the inactive surface protruding from the second surface; a first circuit layer disposed on the first surface; a built-up structure disposed on the first surface and the first circuit layer; and an insulating protective layer disposed on the built-up structure, a plurality of cavities being formed in the insulating protective layer for exposing a part of a surface of the built-up structure. The package structure includes only one built-up structure. |
| US09806048B2 |
Planar fan-out wafer level packaging
A proposed device may reduce or eliminate a step between a die and a mold compound. Bottom and top surfaces of the die may respectively be the active and non-active sides of the die. The mold compound maybe above the top surface of the die in a fan-in area corresponding to a lateral width of the die and may also be in a fan-out area corresponding to an area that extends laterally away from a side surface of the die. The mold compound in the fan-in area need not be coplanar with the mold compound in at least a portion of the fan-out area. The device may also include a redistribution layer below the bottom surface of the die and below the mold compound, and may further include an interconnect below the redistribution layer and electrically coupled to the die through the redistribution layer. A portion of the redistribution layer may be in the fan-out area. |
| US09806044B2 |
Bonding film for signal communication between central chip and peripheral chips and fabricating method thereof
A bonding film has at least a left longitudinal branch, and a lower latitudinal branch; a first bonding area is configured in a first branch, and a second bonding area is configured in a second branch. A plurality of outer top metal pads and a plurality of inner top metal pads are exposed on a top surface within each bonding area. A central chip is configured in a central area of the bonding film and is electrically coupled to the inner top metal pad, and at least two peripheral chips are configured neighboring to the central chip and electrically coupled to the outer top metal pads. Each of the inner top metal pads is electrically coupled to a corresponding outer top metal pad through an embedded circuitry. The central chip communicates with the peripheral chips through the inner top metal pad, embedded circuitry, and outer top metal pad of the bonding film. |
| US09806043B2 |
Method of manufacturing molded semiconductor packages having an optical inspection feature
A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described. |
| US09806037B2 |
Device for prevention of integrated circuit chip counterfeiting
A timer including a sensor and a radiation source is used to prevent counterfeiting of integrated circuits. The timer confirms the date code of the integrated circuit resulting in a more secure supply chain. |
| US09806034B1 |
Semiconductor device with protected sidewalls and methods of manufacturing thereof
A method of protecting sidewalls a plurality of semiconductor devices is disclosed. The method includes fabricating the plurality of semiconductor devices on a semiconductor wafer, etching to form a trench grid network on the backside of the semiconductor wafer. The trench grid network demarcate physical boundaries of each of the plurality of semiconductor devices. The method also includes depositing a protective layer on the backside and etching to remove the protective layer from horizontal surfaces and to singulate each of the plurality of semiconductor devices from the semiconductor wafer. |
| US09806033B2 |
Noise shielding techniques for ultra low current measurements in biochemical applications
A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together. In some embodiments, the device comprises a nanopore device, and wherein the nanopore device comprises a single cell of a nanopore array. |
| US09806025B2 |
SOI wafers with buried dielectric layers to prevent Cu diffusion
An SOI semiconductor device includes a first wafer having an active semiconductor layer and a first oxide layer and a second wafer having a semiconductor substrate and a second oxide layer, the first oxide layer being bonded to the second oxide layer, and one of the first wafer and the second wafer includes a nitride layer. The nitride layer can be formed between the semiconductor substrate and the second oxide layer. A third oxide layer can be formed on the semiconductor substrate and the nitride layer is formed between the second oxide layer and the third oxide layer. The nitride layer can be formed between the active semiconductor layer and the first oxide layer. The first wafer can include a third oxide layer formed on the active semiconductor layer and the nitride layer is formed between the third oxide layer and the first oxide layer. |
| US09806019B2 |
Integrated circuit with power saving feature
An integrated circuit includes a first transistor including a first current electrode, a second current electrode, and a bulk tie; a first conductive line coupled between the first current electrode and a first supply voltage; and a second conductive line coupled to the second current electrode. A resistance of the second conductive line is at least 5 percent greater than a resistance of the first conductive line. The bulk tie is coupled to a second supply voltage. The first supply voltage is different than the second supply voltage. |
| US09806018B1 |
Copper interconnect structures
Semiconductor devices include a patterned dielectric layer overlaying a semiconductor substrate; a metal layer comprising copper disposed in the patterned dielectric layer; and a barrier layer formed at an interface between the dielectric layer and the metal layer, wherein the barrier layer is AlOxNy. The patterned dielectric may define a trench and via interconnect structure or first and second trenches for a capacitor structure. Also disclosed are processes for forming the semiconductor device, which includes subjecting the dielectric surfaces to a nitridization process to form a nitrogen enriched surface. Aluminum metal is then conformally deposited onto the nitrogen enriched surfaces to form AlOxNy at the aluminum metal/dielectric interface. The patterned substrate is then metallized with copper and annealed. Upon annealing, a copper aluminum alloy is formed at the copper metal/aluminum interface. |
| US09806016B2 |
Stretchable semiconductor packages and semiconductor devices including the same
A semiconductor package includes an extendible molding member, a chip embedded in the molding member to have a warped shape, and connectors disposed in the molding member. First surfaces of the connectors are exposed at a surface of the molding member, and second surfaces of the connectors are coupled to the chip. |
| US09806015B1 |
Semiconductor packages including through mold ball connectors on elevated pads and methods of manufacturing the same
A semiconductor package includes first bump pads on a first surface of an interconnection structure layer, elevated pads thicker than the first bump pads on the first surface of the interconnection structure layer, a first semiconductor device connected on the first bump pads, through mold ball connectors connected on the elevated pads, respectively, a molding layer disposed covering the first surface of the interconnection structure layer to expose a portion of each of the through mold ball connectors, outer connectors respectively attached to the through mold ball connectors, and a second semiconductor device on a second surface of the interconnection structure layer opposite to the molding layer. |
| US09806010B2 |
Package module and method of fabricating the same
A method of fabricating a package module includes placing a pin frame having plural pins on a circuit substrate; bonding the pins to corresponding bonding areas on a circuit substrate, thereby connecting the pins to the bonding areas; cutting off a connecting portion of the pin frame; and bending the pins to be vertical to the circuit substrate. By placing the pins on the corresponding bonding areas on the circuit substrate through the pin frame, and then cutting off the connecting portion of the pin frame and bending the pins, the efficiency of assembling the package module can be greatly promoted. |
| US09806006B2 |
Etch isolation LPCC/QFN strip
Various structures and fabrication methods for leadless plastic chip carrier (QFN) packages which utilize carriers in strip format, wherein the leads (or terminals) are formed to be electrically isolated from one another within each unit and in which the units are formed to be electrically isolated from one another within the strip using chemical etching techniques. |
| US09806005B2 |
Electronic element mounting substrate and electronic device
An electronic element mounting substrate includes: a first wiring substrate configured to be a frame defining an interior portion as a first through-hole, the first wiring substrate including a lower surface including an external circuit connection electrode; a metal plate disposed on the lower surface of the first wiring substrate so as to cover an opening of the first through-hole, an outer edge thereof being located between an outer edge of the first wiring substrate and an inner edge of the first wiring substrate, an electronic element mounting portion being disposed in a region of an upper surface of the metal plate which region is surrounded by the first wiring substrate; and a second wiring substrate which is disposed in a peripheral region of the metal plate on the lower surface of the first wiring substrate and is electrically connected to the external circuit connection electrode. |
| US09806004B2 |
Semiconductor devices having a TSV, a front-side bumping pad, and a back-side bumping pad
Semiconductor devices are provided. The semiconductor devices include a substrate, a first interlayer insulating layer disposed on a front-side of the substrate, a TSV structure passing through the first interlayer insulating layer and the substrate. The TSV structure has a bottom end protruding from a back-side of the substrate, a back-side insulating layer and a back-side passivation layer disposed on the back-side of the substrate, and a bumping pad buried in the back-side insulating layer and the back-side passivation layer and disposed on the bottom end of the TSV structure. The bottom end of the TSV structure protrudes into the back-side bumping pad, and top surfaces of the back-side passivation layer and the back-side bumping pad are coplanar. |
| US09806003B2 |
Single base multi-floating surface cooling solution
An apparatus including a primary device and at least one secondary device coupled to a substrate; a heat exchanger disposed on the primary device and on the at least one secondary device, wherein the heat exchanger includes at least one portion disposed over an area corresponding to the primary device or the at least one second device including a deflectable surface; and at least one thermally conductive conduit coupled to the heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including the heat exchanger including at least one floating section operable to move in a direction toward or away from at least one of the plurality of dice and at least one thermally conductive conduit disposed in a channel of the heat exchanger and connected to the at least one floating section; and coupling the heat exchanger to the multi-chip package. |
| US09806002B2 |
Multi-reference integrated heat spreader (IHS) solution
Methods, systems, and apparatuses that assist with cooling semiconductor packages, such as multi-chip packages (MCPs) are described. A semiconductor package includes a component on a substrate. The component can include one or more semiconductor dies. The package can also include a multi-reference integrated heat spreader (IHS) solution (also referred to as a smart IHS solution), where the smart IHS solution includes a smart IHS lid. The smart IHS lid includes a cavity formed in a central region of the smart lid. The smart IHS lid can be on the component, such that the cavity corresponds to the component. A first thermal interface material layer (TIM-layer 1) can be on the component. An individual IHS lid (IHS slug) can be on the TIM-layer 1. The IHS slug can be inserted into the cavity. Furthermore, an intermediate thermal interface material layer (TIM-1A layer) can be between the IHS slug and the cavity. |
| US09806001B2 |
Chip-scale packaging with protective heat spreader
A semiconductor package can include a semiconductor die having an integrated circuit, a first die surface, and an opposite second die surface. A packaging can be attached to the die and have a holder surface opposite the first die surface. A heat spreader can be configured to cover the second die surface and the packaging surface and can be attached thereto by a layer of adhesive positioned between the heat spreader and the semiconductor die. A semiconductor package array can include an array of semiconductor dies and a heat spreader configured to cover each semiconductor die. A conductive lead can be electrically connected to the integrated circuit in a semiconductor die and can extend from the first die surface. Manufacturing a semiconductor package can include applying thermally conductive adhesive to the heat spreader and placing the heat spreader proximate the semiconductor die. |
| US09805999B2 |
Cured product
The present application relates to a cured product and the use thereof. The cured product has excellent processability, workability, and adhesive properties or the like, and does not cause whitening and surface stickiness, etc. The cured product has excellent transparency, moisture resistance, mechanical properties, and cracking resistance, etc. The cured product, for example, may be applied as an encapsulant or an adhesive material of a semiconductor device to provide a device having high long-term reliability. |
| US09805998B2 |
Liquid sealing material and electronic component using same
The purpose of the present invention is to provide: a liquid sealing material which has excellent PCT (pressure cooker test) resistance; and an electronic component which is obtained by sealing a part to be sealed with use of the liquid sealing material. A liquid sealing material of the present invention contains (A) a liquid epoxy resin, (B) a curing agent, (C) a silica filler and (D) a coupling agent, and is characterized in that the boron content in the silica filler (C) has an average of 1-50 ppm. |
| US09805997B2 |
Packaging methods for semiconductor devices with encapsulant ring
Packaging methods for semiconductor devices, and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes coupling a ring to a substrate, and coupling an integrated circuit die to the substrate within the ring. A molding material is disposed around the integrated circuit die within the ring. |
| US09805992B2 |
Strained finFET device fabrication
A method for forming a fin on a substrate comprises patterning and etching a layer of a first semiconductor material to define a strained fin, depositing a layer of a second semiconductor material over the fin, the second semiconductor material operative to maintain the a strain in the strained fin, etching to remove a portion of the second semiconductor material to define a cavity that exposes a portion of the fin, etching to remove the exposed portion of the fin such that the fin is divided into a first segment and a second segment, and depositing an insulator material in the cavity, the insulator material contacting the first segment of the fin and the second segment of the fin. |
| US09805985B2 |
Method of manufacturing semiconductor device and semiconductor device
A method of manufacturing a semiconductor device includes removing a first gate among a plurality of gates over a substrate. Removing the first gate exposes a first portion of an active area region under the first gate. The method further includes forming a first dielectric dummy gate over the exposed first portion of the active area region. The method further includes removing a second gate among the plurality of gates, wherein removing the second gate exposes a second portion of the active area region. The method further includes depositing a first gate electrode over the exposed second portion of the active area region. |
| US09805977B1 |
Integrated circuit structure having through-silicon via and method of forming same
One aspect of the disclosure relates to an integrated circuit structure. The integrated circuit structure may include a front side and back side opposing the front side, the integrated circuit structure comprising: a through-silicon-via (TSV) at least partially within a dielectric layer extending away from the front side; a first metal adjacent to the TSV and within the dielectric layer, the first metal being substantially surrounded by a first seed layer; a conductive pad over the first metal and the TSV and extending away from the front side, wherein the conductive pad provides electrical connection between the TSV and the first metal and includes a second seed layer substantially surrounding a second metal, wherein the second seed layer separates the second metal from the first metal and the TSV. |
| US09805976B2 |
Co or Ni and Cu integration for small and large features in integrated circuits
In one embodiment of the present disclosure, a method for depositing metal in a feature on a workpiece is provided. The method includes electrochemically depositing a second metal layer on a first metal layer on a workpiece having at least two features of two different sizes in a dielectric layer, wherein the second metal layer is a copper layer and wherein the first metal layer includes a metal selected from the group consisting of cobalt and nickel, wherein the first metal layer completely fills the smallest feature but does not completely fill the largest feature. |
| US09805974B1 |
Selective deposition of metallic films
Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved. |
| US09805971B2 |
Method of forming a via contact
Semiconductor device and method for forming a semiconductor device are presented. The method includes providing a substrate having a device component with a contact region. A contact dielectric layer is formed on the substrate. The contact dielectric layer covers the substrate and device component. At least one contact opening is formed through the contact dielectric layer. Upper portion of the contact opening includes wider opening with tapered sidewall profile while lower portion of the contact opening includes narrower opening with vertical sidewall profile. |
| US09805970B2 |
Method for forming deep trench spacing isolation for CMOS image sensors
A method for manufacturing an image sensor with deep trench spacing isolation is provided. A trench is formed in a semiconductor substrate, around and between a plurality of pixel regions of the semiconductor substrate. A cap is formed using epitaxy to seal a gap between sidewalls of the trench. Pixel sensors corresponding to the plurality of pixel regions are formed over or within the corresponding pixel regions. An image sensor resulting from the method is also provided. |
| US09805966B2 |
Wafer scale packaging
A method of wafer scale packaging acoustic resonator devices and an apparatus therefor. The method including providing a partially completed semiconductor substrate comprising a plurality of single crystal acoustic resonator devices, each having a first electrode member, a second electrode member, and an overlying passivation material. At least one of the devices to be configured with an external connection, a repassivation material overlying the passivation material, an under metal material overlying the repassivation material. Copper pillar interconnect structures are then configured overlying the electrode members, and solder bump structures are form overlying the copper pillar interconnect structures. |
| US09805964B2 |
System and method for multi-location zapping
A system for zapping a wafer, the system may include a pulse generation unit that is configured to generate (a) first zapping pulses for causing a breakdown in a first location of a backside insulating layer of a wafer, and (b) second zapping pulses for causing a breakdown in a second location of the backside insulating layer of the wafer; a first conductive interface that is configured to convey the first zapping pulses to the first location, while contacting the first location; a second conductive interface that is configured to convey the second zapping pulses to the second location, while contacting the second location; and wherein the first location differs from the second location. |
| US09805961B2 |
Transfer system
In a transfer system, at least one of a plurality of process apparatuses is connected to a station as a connected process apparatus. A station control unit controls a transfer device provided in the station through a communication with a process apparatus control unit to load the processing object to the connected process apparatus from the station and to unload the processing object from the connected process apparatus to the station. The station control unit controls the transfer device to begin unloading of the processing object from the connected process apparatus to the station after receiving a signal indicative of a presence of the processing object to be unloaded from the process apparatus control unit. |
| US09805960B2 |
Substrate conveyance method
When an edge of a wafer passes above a right sensor and a left sensor disposed in a conveyance route of the wafer to a substrate processing chamber, four edge intersecting points are acquired in a first wafer coordinate system, and a reference edge intersecting point set composed of two adjacent edge intersecting points is created from the four edge intersecting points. Between the two remaining edge intersecting points which do not constitute the reference edge intersecting point set, an edge intersecting point present within an area surrounded by two circles defined based on the two edge intersecting points constituting the reference edge intersecting point set is selected as an effective edge intersecting point, and a central position of a circle passing through the reference edge intersecting points and the effective edge intersecting point is acquired as a central position of the wafer. |
| US09805959B2 |
Plasma processing apparatus and plasma processing method
A plasma processing apparatus includes: a processing container which defines a processing space; a microwave generator; a dielectric having an opposing surface which faces the processing space; a slot plate formed with a plurality of slots; and a heating member provided within the slot plate. The slot plate is provided on a surface of the dielectric at an opposite side to the opposing surface to radiate microwaves for plasma excitation to the processing space through the dielectric based on the microwaves generated by the microwave generator. |
| US09805956B2 |
Lead frame and a method of fabrication thereof
Disclosed is a method of manufacturing a lead frame, which comprises the steps of: providing an electrically-conductive base material having first and second planar sides; forming a plurality of conductive contact points on the first planar side of the base material; providing a non-conductive filling material over the first planar side of the base material so that the filling material fills spaces in-between the plurality of contact points to a form a layer comprising the filling material and the plurality of contact points; and etching the second planar side of the base material to expose a pattern of the filling material from the second planar side of the base material and to thereby form a plurality of isolated conductive regions on the second planar side of the base material, each isolated conductive region being connected with at least a respective one of the plurality of contact points on the first planar side of the base material. A lead frame structure is also disclosed. |
| US09805952B2 |
Method for manufacturing semiconductor device
Provided are an oxide semiconductor layer in which the number of defects is reduced and a highly reliable semiconductor device including the oxide semiconductor. A first oxide semiconductor layer having a crystal part is formed over a substrate by a sputtering method. A second oxide semiconductor layer is formed by a thermal chemical vapor deposition method over the first oxide semiconductor layer. The second oxide semiconductor layer is formed by epitaxial growth using the first oxide semiconductor layer as a seed crystal. A channel is formed in the second oxide semiconductor layer. |
| US09805951B1 |
Method of integration process for metal CMP
A method of fabricating a semiconductor device is disclosed. The method includes forming a dielectric layer over a substrate. The substrate has an edge region and a center region. The method also includes forming a dielectric ring in the edge region, forming a metal layer over the center region of the substrate and over the dielectric ring in the edge region of the substrate and polishing the metal layer in the center region and the edge region to expose the dielectric ring in the edge region of the substrate. |
| US09805942B2 |
Method of modifying epitaxial growth shape on source drain area of transistor
Methods for forming semiconductor devices, such as FinFETs, are provided. An epitaxial film is formed over a semiconductor fin, and the epitaxial film includes a top surface having two facets. A cap layer is deposited on the top surface, and portions of the epitaxial film in a lateral direction are removed. Having a smaller lateral dimension prevents the epitaxial film from merging with an adjacent epitaxial film and creates a gap between the epitaxial film and the adjacent epitaxial film. |
| US09805940B2 |
Plasma processing apparatus and plasma processing method
A plasma processing method includes forming plasma in a processing chamber; and performing etching to a film to be processed of a film structure that has previously been disposed on an upper surface of a wafer that includes a plurality of film layers. The film structure includes: a lower film including at least one film layer and a groove structure; and an upper film including at least one film layer that covers an inside and an upper end of the groove structure. The plasma processing method includes: removing the upper film by etching until an upper end of the groove structure of the lower film is exposed; performing etching to a film layer of the upper film inside the groove structure; and determining an end point by using a value of thickness of the film layer inside the groove structure of the lower film upon completion of the removing. |
| US09805938B2 |
Substrate processing apparatus and substrate processing method
A substrate processing apparatus includes a rotating holder for a substrate, a first nozzle used to eject a jet flow, a second nozzle used to discharge a continuous flow, and a nozzle moving unit integrally moving the first and second nozzles. A landing position of the continuous flow is located closer to a rotation center than a landing position of the jet flow is. At least movement paths of the landing positions of the jet flow and the continuous flow or flow directions of the continuous flow and the jet flow are different from each other. The movement paths are made to be different from each other by locating the landing position of the continuous flow downstream of the movement path of the landing position of the jet flow. The flow directions are made to be different from each other by tilting the continuous flow. |
| US09805937B2 |
Method of manufacturing semiconductor device and semiconductor device
Reliability of a semiconductor device is improved. A power device includes: a semiconductor chip; a chip mounting part; a solder material electrically coupling a back surface electrode of the semiconductor chip with an upper surface of the chip mounting part; a plurality of inner lead parts and a plurality of outer lead parts electrically coupled with an electrode pad of the semiconductor chip through wires; and a sealing body for sealing the semiconductor chip and the wires. Further, a recess is formed in a peripheral region of the back surface of the semiconductor chip. The recess has a first surface extending to join the back surface and a second surface extending to join the first surface. Also, a metal film is formed over the first surface and the second surface of the recess. |
| US09805935B2 |
Bottom source/drain silicidation for vertical field-effect transistor (FET)
A method for manufacturing a semiconductor device includes forming a first active region on a semiconductor substrate, forming a semiconductor layer on the first active region, patterning the semiconductor layer into a plurality of fins extending from the first active region vertically with respect to the semiconductor substrate, wherein the first active region is located at bottom ends of the plurality of fins, forming a silicide layer on exposed portions of the first active region, forming an electrically conductive contact on the silicide region, forming a second active region on top ends of each of the plurality of fins, and forming a gate structure between the plurality of fins, wherein the gate structure is positioned over the first active region and under the second active region. |
| US09805933B2 |
Vertical power transistor with deep floating termination regions
Various improvements in vertical transistors, such as IGBTs, are disclosed. The improvements include forming periodic highly-doped p-type emitter dots in the top surface region of a growth substrate, followed by growing the various transistor layers, followed by grounding down the bottom surface of the substrate, followed by a wet etch of the bottom surface to expose the heavily doped p+ layer. A metal contact is then formed over the p+ layer. In another improvement, edge termination structures utilize p-dopants implanted in trenches to create deep p-regions for shaping the electric field, and shallow p-regions between the trenches for rapidly removing holes after turn-off. In another improvement, a dual buffer layer using an n-layer and distributed n+ regions improves breakdown voltage and saturation voltage. In another improvement, p-zones of different concentrations in a termination structure are formed by varying pitches of trenches. In another improvement, beveled saw streets increase breakdown voltage. |
| US09805932B2 |
Heat treatment method and heat treatment apparatus for heating substrate by irradiating substrate with light
First irradiation which causes an emission output from a flash lamp to reach its maximum value over a time period in the range of 1 to 20 milliseconds is performed to increase the temperature of a front surface of a semiconductor wafer from a preheating temperature to a target temperature for a time period in the range of 1 to 20 milliseconds. This achieves the activation of the impurities. Subsequently, second irradiation which gradually decreases the emission output from the maximum value over a time period in the range of 3 to 50 milliseconds is performed to maintain the temperature of the front surface within a ±25° C. range around the target temperature for a time period in the range of 3 to 50 milliseconds. This prevents the occurrence of process-induced damage while suppressing the diffusion of the impurities. |
| US09805926B2 |
Vibration resistant automotive front lighting lamp
A lamp for automotive front lighting and a vehicle headlight comprising the lamp are described, as well as a method of manufacturing the lamp. The lamp 10 comprises a base 12 for mechanical and electrical connection to an automotive headlight 50. A burner 14 is fixed to the base 12 and comprises an enclosed transparent vessel 22. A first filament 34 is arranged within the vessel 22. A holding wire 30c is arranged within the vessel, and a baffle 40 is arranged proximate to the first filament 34 to partially shield light emitted from the first filament 34. The baffle 40 is fixed to the holding wire 30c. The transparent vessel 22 comprises a vessel wall including a cylindrical portion 24 surrounding the first filament 34. In order to obtain a lamp which may withstand vibration, the vessel wall comprises, within the cylindrical portion 24, a deformed material portion 38 which contacts the baffle 40 or the holding wire 30c. The deformed material portion 38 is shielded from the first filament 34 by the baffle 40. During manufacture, the first filament 34, the baffle 40 and the holding wire 30c are inserted into the vessel 22, and the vessel wall is deformed to provide the deformed material portion 38. |
| US09805925B1 |
Electrodeless high intensity discharge lamp with field suppression probes
In electrodeless HID lamps the radio frequency (RF) source is separated from a lamp housing in which vessel containing plasma arc is mounted. This lamp housing is usually designed to maximize the amount of RF energy incident on the plasma arc. The plasma arc, however, cannot convert the entire amount of incident RF energy into light and a portion instead is released as propagating radiation or remains localized RF electromagnetic fields in the vicinity of lamp. In this invention, we introduce field suppression probes: Small, configurable structures that are made of conductive materials that mount directly to the lamp housing or alternately the lamp fixture that is able to suppress unused RF energy that is emanated from the lamp housing or plasma. These probes, when configured with the lamp, can substantially suppress the unused RF energy and prevent EMI emissions and reduce RF feedback that can adversely affect the lamp. |
| US09805923B2 |
Mass separators, mass selective detectors, and methods for optimizing mass separation within mass selective detectors
Mass separators are provided that can include at least one electrode component having a surface, in one cross section, defining at least two runs associated via at least one rise, the rise being orthogonally related to the runs. Mass selective detectors are provided that can include at least a first pair of opposing electrodes with each of the opposing electrodes having a complimentary surface, in one cross section, defining at least two runs associated via a rise. Methods for optimizing mass separation within a mass selective detector are also provided, including providing mass separation parameters; providing one set electrodes within the separator having a surface operatively aligned within the separator, the surface, in one cross section, defining at least two runs associated via a rise, the rise being orthogonally related to the runs; and modifying one or both of the rise and/or runs to achieve the mass separation parameters. |
| US09805918B2 |
Plasma source
The invention relates to a plasma source (1) for depositing a coating onto a substrate (9), which is connectable to a power source (P) and includes: an electrode (2); a magnetic assembly (4) located circumferentially relative to said electrode and including a set of magnets mutually connected by a magnetic bracket (46) including a first and second central magnet (43, 44) and at least one head magnet (45); and an electrically insulating enclosure (5) arranged such as to surround the electrode and the magnets. |
| US09805917B2 |
Plasma processing method
In a plasma processing method, first processes and second processes are performed alternately. In each first process, a first gas is supplied into a processing vessel from a gas supply system, and a first high frequency power is supplied from a first high frequency power supply. In each second process, the first high frequency power is supplied from the first high frequency power supply continuously from a first process which is performed just before the corresponding second process. In each second process, a gas switching signal for switching the gas from the first gas to the second gas is applied to the gas supply system. Further, a supply of a second high frequency power is begun by a second high frequency power supply when a parameter such as a load impedance exceeds a threshold value after the gas switching signal is applied to the gas supply system. |
| US09805913B2 |
Ion beam dimension control for ion implantation process and apparatus, and advanced process control
A process control method is provided for ion implantation methods and apparatuses, to produce a high dosage area on a substrate such as may compensate for noted non-uniformities. In an ion implantation tool, separately controllable electrodes are provided as multiple sets of opposed electrodes disposed outside an ion beam. Beam blockers are positionable into the ion beam. Both the electrodes and beam blockers are controllable to reduce the area of the ion beam that is incident upon a substrate. The electrodes and beam blockers also change the position of the reduced-area ion beam incident upon the surface. The speed at which the substrate scans past the ion beam may be dynamically changed during the implantation process to produce various dosage concentrations in the substrate. |
| US09805912B2 |
Hydrogen COGas for carbon implant
A system, apparatus and method for increasing ion source lifetime in an ion implanter are provided. Oxidation of the ion source and ion source chamber poisoning resulting from a carbon and oxygen-containing source gas is controlled by utilizing a hydrogen co-gas, which reacts with free oxygen atoms to form hydroxide and water. |
| US09805911B2 |
Inspection of regions of interest using an electron beam system
A system for scanning a plurality of regions of interest of a substrate using one or more charged particle beams, the system comprises: an irradiation module having charged particle optics; a stage for introducing a relative movement between the substrate and the charged particle optics; an imaging module for collecting electrons emanating from the substrate in response to a scanning of the regions of interest by the one or more charged particle beams; and wherein the charged particle optics is arranged to perform countermovements of the charged particle beam during the scanning of the regions of interest thereby countering relative movements introduced between the substrate and the charged particle optics during the scanning of the regions of interest. |
| US09805907B2 |
Multi charged particle beam writing method, and multi charged particle beam writing apparatus
A multi charged particle beam writing method includes emitting each corresponding beam in an “on” state while starting and continuing tracking control, shifting a writing position by beam deflection of the multi beams, in addition to tracking control, while continuing tracking control, emitting each corresponding beam in the next “on” state to the next writing position having been shifted while continuing tracking control, and returning the tracking position by resetting tracking control, after emitting each next corresponding beam to the next writing position having been shifted at least once, wherein writing of a predetermined region is completed by repeating the number of preset times a group of performing emitting, shifting, emitting, and returning, wherein the tracking time from start to reset of tracking control in at least one of the repeated groups is longer than the others. |
| US09805906B1 |
Mirror support module, a kit and a scanning electron microscope
A mirror support module having a body that includes an internal portion surrounding an inner space, an external portion, an aperture formed in the body and an intermediate region that extends between a segment of the internal portion and the aperture. When the intermediate region is subjected to a force directed in a first direction, the intermediate region can be moved in the first direction towards the aperture to reduce an area of the aperture while the external portion remains stable regardless of movement of the intermediate region. |
| US09805903B2 |
Energy radiation generator with uni-polar voltage ladder
A well-logging tool may include a sonde housing and a radiation generator carried by the sonde housing. The radiation generator may include a generator housing, a target carried by the generator housing, a charged particle source carried by the generator housing to direct charged particles at the target, and at least one voltage source coupled to the charged particle source. The at least one voltage source may include a voltage ladder comprising a plurality of voltage multiplication stages coupled in a uni-polar configuration, and at least one loading coil coupled at at least one intermediate position along the voltage ladder. The well-logging tool may further include at least one radiation detector carried by the sonde housing. |
| US09805901B2 |
Compact magnet design for high-power magnetrons
A high-power magnetron assembly includes a high-power magnetron and a compact magnetic field generator. The high-power magnetron includes a cathode configured to emit electrons in response to receiving a supply of voltage from a power supply. The high-power magnetron includes an anode configured to concentrically surround the cathode and to attract the emitted electrons across an interaction region between the cathode and the anode. The compact magnetic field generator includes a plurality of permanent magnets including: a cathode magnet that has a longitudinal axis of symmetry annularly and that is surrounded by the cathode and disposed within the magnetron; and an anode magnet configured to annularly surround an outer perimeter of the magnetron. An arrangement of the plurality of permanent magnets concentrically about the longitudinal axis of symmetry forms a specified magnetic field within the interaction region that bounds the electrons emitted within the interaction region. |
| US09805896B2 |
Mechanically operated switching device and related switchgear having a movable member for operating the switching device
An exemplary mechanically operated switching device includes at least one movable contact and an operating mechanism for coupling/separating the movable contact to/from a corresponding fixed contact. The operating mechanism includes first elastic mechanism for, upon release, providing the energy to separate the movable and fixed contacts. At least one shunt release having: a member movable between first and second stable positions, wherein movement from the first stable position to the second stable position releases the first elastic mechanism; at least a permanent magnet generating a force for holding the movable member in the first stable position, wherein the movable member held in the first stable position compresses a second elastic mechanism; and at least one electrical winding associated with the movable member and the electronic mechanism, which is configured to electrically drive the winding to generate a magnetic force that releases of the compressed second elastic mechanism. |
| US09805893B2 |
Electromagnetic relay
An electromagnetic relay (100) has high wear resistance, high corrosion resistance, and good magnetic properties. The electromagnetic relay (100) includes a magnetic component including an alloy layer on its surface formed by diffusion-coating of at least one element selected from the group consisting of Cr, V, Ti, and Al. The alloy layer has a thickness of 5 to 60 μm, inclusive. |
| US09805892B2 |
Electronic component and electronic component assembly structure
An electronic component includes a component main body having a rectangular parallelepiped shape and a plurality of lead terminals, and each lead terminal is disposed to droop along a side surface of the component main body facing the lead terminal. The plurality of lead terminals having different rigidities are arranged in a width direction of at least one side surface of the component main body, and the lead terminal having a highest rigidity among the plurality of lead terminals is disposed to protrude more in a direction in which it gets apart from the corresponding side surface of the component main body than the other lead terminals. Accordingly, it is possible to prevent deformation of the lead terminal. |
| US09805890B2 |
Electronic device state detection for zero power charger control, systems and methods
A charger appliance configured to determine a no-load, disconnected state from an electronic device having a rechargeable battery, and configured to determine a connected state of the charger with an electronic device in which recharging power may be supplied through the charger to the electronic device. Automatic connection and disconnection of a mains power supply is made depending on the detected state of the charger to avoid wasteful energy consumption in a no-load state. State detection may be determined by monitoring a voltage on one or more signal lines associated with the electronic device. |
| US09805889B2 |
Breaker
A circuit breaker, comprising a housing (100), an input-side wiring terminal (111) and an output-side wiring terminal (112) which are positioned on the housing, and a moving contact (202) and a stationary contact (201) which are positioned in the housing. A passage (300) is arranged in the housing between two wiring terminals to be connected with a conductor (400), and the conductor connected with the two wiring terminals is arranged in the passage. Therefore, the present invention has the advantages of simple wire connection, good safety, space saving, beautiful appearance and clear and accurate indication of the switch state. |
| US09805884B2 |
Switch having improved cover
An electrical switch (120) includes an insulative housing (121), the operation part (150) disposed in the housing (121), and the metallic cover (160) enclosing the housing (121). The metallic cover (160) includes a front plate (161), a pair of side plates (164) extending rearwardly from two opposite lateral sides of the front plate (161). The side plate (164) include a main body (165) to cover the corresponding side wall (125) of the housing and an extension (167) extending beyond a rear face of the housing (121) and adapted to be soldered upon a printed circuit board (110) on which the housing (121) is seated. |
| US09805883B2 |
Multipole electromechanical switching device
A method and apparatus using electromagnetic switching in a two-step connection process is provided to minimize surge currents and torque oscillations in three-phase motors during starts. |
| US09805876B2 |
Method for manufacturing electrode for aluminum electrolytic capacitor
A porous aluminum electrode has a porous layer formed by sintering aluminum powder on the surface of an aluminum core. The porous aluminum electrode, when subjected to a formation to a voltage of 200V or more, is boiled and then subjected to a first forming process in which formation is performed in an aqueous solution of ammonium adipate at a temperature of 80° C. or below and a second forming process in which formation is performed in a boric acid aqueous solution. When heat depolarization is first carried out, washing with water is performed for five minutes or more before heat depolarization; therefore, the porous layer is not destroyed. |
| US09805873B2 |
Vacuum variable capacitor
A vacuum variable capacitor includes a pre-vacuum enclosure for reducing a pressure differential across the bellows. The vacuum force load on the drive system can thereby be reduced, allowing faster movement of the movable electrode, faster capacitance adjustment of the vacuum variable capacitor and longer lifetimes of the device. |
| US09805869B2 |
High energy density electrostatic capacitor
A solid state electrical energy state storage device includes multiple dielectric layers or an integral heterogeneous dielectric layer. Layers or portions of the heterogeneous layer have permittivity augmented by exposing the dielectric material to electric/magnetic fields during formation of the dielectric before complete solidification. Such exposure results in radicals and/or an ordered matrix. A dielectric for the device may contain a new xylene based polymer formed under atmospheric conditions via reaction with monatomic oxygen and provided an augmented permittivity through exposure of the polymer to a magnetic field and/or an electric field during condensation and solidification on a substrate. |
| US09805866B2 |
Laminated ceramic electronic component
A laminated ceramic electronic component includes a ceramic body, first and second inner electrodes within the ceramic body and including opposed portions opposed to each other in the thickness direction of the ceramic body, a first terminal electrode electrically connected to the first inner electrode, and a second terminal electrode electrically connected to the second inner electrode. The widthwise distance between first widthwise edges and second widthwise edges of the first and second terminal electrodes are smaller, in plan view, than widths of the first and second inner electrodes at the opposed portions. |
| US09805864B2 |
Inductive spring system
An electrical connector system for communication or power transfer between a two connectors in which the first of the two connectors may be inserted into a receptacle of a second connector in order to align a coil within the first connector with a coil within the second connector to promote inductive communication between the first and second connector. In many embodiments, at least one of the two coils may also be used as a spring, providing a mechanical force. The mechanical force may assist in joining or separating the connectors. For example, the spring coil may be used in conjunction with a push-push mechanism to retain the first connector within the second connector and to eject the first connector when the connectors should be separated. |
| US09805862B2 |
Electronic component, power feeding apparatus, power receiving apparatus, and wireless power feeding system
The present disclosure provides an electronic component, including, a coil, and a circuit portion having a grounding terminal and a hot terminal and connected to the coil, wherein the grounding terminal of the circuit portion is connected to one end side of the coil, and the hot terminal of the circuit portion is connected to the other end side of the coil, thereby integrating the circuit portion with the coil. |
| US09805861B2 |
Communication terminal including close-proximity communication coil, power transmission coil, and metal plate
A communication terminal includes a close-proximity communication coil, a power transmission coil, and a metal plate. The close-proximity communication coil is configured to be used in a close-proximity communication system. The power transmission coil is configured to be used in a contactless power transmission system. At least a portion of the metal plate is disposed between the close-proximity communication coil and the power transmission coil. The close-proximity communication coil and the power transmission coil are disposed in non-overlapping locations when viewed from a direction perpendicular or substantially perpendicular to a main surface of the metal plate. At least one of the close-proximity communication coil and the power transmission coil electromagnetically couples with the metal plate. |
| US09805857B2 |
Method of manufacturing a multilayer transformer printed circuit board (PCB) for an electric car
The present invention provides a multilayer transformer PCB structure for an electric car and manufacturing method for the same, which includes first and second connecting copper tabs horizontally formed in plural on both surfaces of a base substrate, thereby forming inner layer circuits coupled to battery cells, and third and fourth connecting copper tabs stacked on a top surface of the first connecting copper tab and a top surface of the second connecting copper tab by patterning process a copper material several times as a predetermined thickness, thereby forming outer layer circuits coupled to the battery cells. According to the present invention configured thus, the transformer PCB for an electric car has a structure in which a conductive material having a predetermined thickness is stacked in a multilayer form, and thus an increased quantity of charges to be treated is highly distributed, thereby maximizing current efficiency. |
| US09805856B2 |
Coil component and method of manufacturing coil component
A magnetic core (50) has a core shaft part which is inserted into a bobbin part, and configures a magnetic path of magnetic flux formed by a coil (40); the magnetic core (50) is configured by combining a pair of magnetic components (51, 52); the magnetic components (51, 52) have core ends formed so as to cross a core shaft part; the base part (20) has a fitting part which fits with at least one of the pair of core ends, when the core shaft part is inserted into the bobbin part; and the coil component (100) is characterized in that the pair of magnetic components (51, 52) and the bobbin base (10) are fixed to each other, while being bound by a sheet-like fixation member (70) which extends over the core end and the base part having been fitted to each other. |
| US09805855B2 |
Magnetic core and coil component using same
A magnetic core has a structure in which Fe-based soft magnetic alloy particles are connected via a grain boundary. The Fe-based soft magnetic alloy particles contain Al, Cr and Si. An oxide layer containing at least Fe, Al, Cr and Si is formed at the grain boundary that connects the neighboring Fe-based soft magnetic alloy particles. The oxide layer contains an amount of Al larger than that in Fe-based soft magnetic alloy particles, and includes a first region in which the ratio of Al is higher than the ratio of each of Fe, Cr and Si to the sum of Fe, Cr, Al and Si, and a second region in which the ratio of Fe is higher than the ratio of each of Al, Cr and Si to the sum of Fe, Cr, Al and Si. The first region is on the Fe-based soft magnetic alloy particle side. |
| US09805849B2 |
Resistor circuit with temperature coefficient compensation
The present invention discloses a resistor circuit with temperature coefficient compensation, which comprises a first series resistor composed of a first resistor and a second resistor interconnected in series, and a second parallel resistor composed of a third resistor and a fourth resistor interconnected in series, with the first series resistor and the second parallel resistor interconnected in series, wherein the first resistor and the second resistor respectively have a positive and negative temperature coefficient and make the positive and negative temperature coefficients of the first series resistor offset each other, and the third resistor and the fourth resistor respectively have a positive and negative temperature coefficient and make the positive and negative temperature coefficients of the second parallel resistor offset each other. |
| US09805847B2 |
Thermistor material and method of preparing the same
A thermistor material and a method for preparing a thermistor material are provided. The thermistor material is prepared by mixing and heating a mixture containing BaTiO3, B2O3, SiO2, Li2O, P2O5, Cs2O, Nd2O3, Al2O3 and TiO2. |
| US09805845B2 |
Structurally augmented cable
A coaxial cable comprises inner and outer conductors disposed along an elongate axis, a dielectric insulating material disposed between the inner and outer conductors, a compliant outer jacket disposed over the inner and outer conductors, and a reinforcing outer jacket disposed over the compliant inner jacket, the outer jacket being physically separate from the inner jacket and comprising on-axis and off-axis fibers disposed in a binding matrix, the outer jacket comprising more on-axis than off-axis fibers. |
| US09805842B2 |
Wire harness
A conductive path (1) used in a wire harness includes a conductor (2) and an insulator (3). The conductive path (1) includes parts corresponding to route restriction sections (A, B) where route restriction is required, and parts corresponding to sections other than the route restriction sections (A, B), that is, different sections (C, D, E). The insulator (3) includes an extrusion-molded insulator main body (4) and multiple thick parts (6) post-attached to an outer surface (5) of the insulator main body (4). The thick parts (6) are disposed and formed at positions corresponding to the route restriction sections (A, B). |
| US09805840B2 |
Halogen-free crosslinked resin composition and insulated wire and cable using the same
A halogen-free crosslinked resin composition includes a base polymer including as a main component (a) an ethylene vinyl acetate copolymer and (b) an acid modified polyolefin resin having a differential scanning calorimetry glass transition temperature Tg of not higher than −55 degrees Celsius in a mass ratio (a):(b) of 70:30 to 100:0, the base polymer including 50 to 70% by mass of vinyl acetate, 0.5 to 10 parts by mass of a silicone rubber with respect to 100 parts by mass of the base polymer, and 100 to 250 parts by mass of a metal hydroxide with respect to 100 parts by mass of the base polymer. |
| US09805838B2 |
Organic semiconductor formulation
The invention relates to a formulation comprising p-type and n-type organic semiconductors (OSC) and one or more organic solvents, its use for the preparation of organic electronic (OE) devices, especially for bulk heterojunction (BHJ) organic photovoltaic (OPV) devices, to a process for preparing an OE device, especially a BHJ OPV device, using the formulation, and an OE device, especially a BHJ OPV device, prepared using such a process or formulation. |
| US09805837B2 |
Transparent conductive film and production method therefor
A transparent conductive film, includes: an organic polymer film substrate; at least one undercoat layer formed on the organic polymer film substrate by a dry process; and a transparent conductive coating provided on at least one surface of the organic polymer film substrate with the undercoat layer interposed therebetween, wherein the transparent conductive coating is a crystalline coating of an indium-based complex oxide having a content of a tetravalent metal element oxide of 7 to 15% by weight as calculated by the formula {(the amount of the tetravalent metal element oxide)/(the amount of the tetravalent metal element oxide+the amount of indium oxide)}×100(%), the transparent conductive coating has a thickness in the range of 10 to 40 nm, and the transparent conductive coating has a specific resistance of 1.3×10−4 to 2.8×10−4 Ω·cm. |
| US09805833B2 |
Passively initiated depressurization valve for light water reactor
A nuclear reactor is surrounded by a reactor radiological containment structure. Depressurization lines running from the reactor automatically vent the reactor to the containment structure or to a compartment in the containment structure when a low pressure condition exists in the reactor. The depressurization lines include biased-open passive valves and actively actuated isolation valves arranged in series. |
| US09805832B2 |
Control rod drive mechanism (CRDM) mounting system for pressurized water reactors
A standoff supporting a control rod drive mechanism (CRDM) in a nuclear reactor is connected to a distribution plate which provides electrical power and hydraulics. The standoff has connectors that require no action to effectuate the electrical connection to the distribution plate other than placement of the standoff onto the distribution plate. This facilitates replacement of the CRDM. In addition to the connectors, the standoff has alignment features to ensure the CRDM is connected in the correct orientation. After placement, the standoff may be secured to the distribution plate by bolts or other fasteners. The distribution plate may be a single plate that contains the electrical and hydraulic lines and also is strong enough to provide support to the CRDMs or may comprise a stack of two or more plates. |
| US09805828B1 |
Memory apparatus with post package repair
Apparatuses for memory repair for a memory device are described. An example apparatus includes: a non-volatile storage element that stores information; a storage latch circuit coupled to the non-volatile storage element and stores latch information; and a control circuit that, in a first repair mode, receives first repair address information, provides the first repair address information to the non-volatile storage element, and further transmits the first repair address information from the non-volatile storage element to the storage latch circuit. The control circuit, in a second repair mode, receives second repair address information and provides the second repair address information to the storage latch circuit and disables storing the second address information into the non-volatile storage element. |
| US09805827B2 |
Semiconductor memory devices, memory systems including the same and methods of operating the same
A semiconductor memory device includes a memory cell array and a test circuit. The test circuit reads data stream from the memory cell array, configured to, on comparing bits of each first unit in the data stream, compares corresponding bits in the first units as each second unit and outputs a fail information signal including pass/fail information on the data stream and additional information on the data stream, in a test mode of the semiconductor memory device. |
| US09805823B1 |
Automated stressing and testing of semiconductor memory cells
A memory cell readable through a bit line and addressable through a word line can be stressed by applying a stress voltage to the bit line for a stress voltage time, and addressing the memory cell through the word line for an addressing time included within the stress voltage time. The memory cell can be tested by writing a data value into the memory cell, stressing the memory cell, reading the stored value from the memory cell, and determining whether the stored value corresponds to the data value. A testable memory array can include a memory cell addressable through a word line and readable through a bit line, a precharge circuit, a stress circuit, and an array built-in self test (ABIST) circuit. The ABIST circuit can be configured to stress the memory cell by applying a stress signal to the stress circuit. |
| US09805811B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes a plurality of stacked first chips and a second chip. The second chip outputs a first signal to the first chips. The first chip outputs status information at timing based on the received first signal. The first chip shifts the received first signal and outputs the shifted first signal to the first chip of a next stage in synchronization with the first clock signal. The second chip receives a plurality of status information output in a serial manner from the first chips. |
| US09805809B1 |
State-dependent read compensation
Apparatuses, systems, methods, and computer program products are disclosed for state-dependent read compensation. A set of non-volatile storage cells comprising a plurality of word lines. A controller is configured to perform a read operation on one or more word lines adjacent to a target word line. A controller is configured to determine a read setting for application to a target word line based on a result of a read operation on one or more word lines adjacent to the target word line. A controller is configured to perform a read operation on a target word line using a determined read setting. |
| US09805807B2 |
Operation method operating nonvolatile memory device having plurality of memory blocks
A method of operating a nonvolatile memory device is provided as follows. The nonvolatile memory device includes memory blocks each of which has word lines. A setup voltage is applied to the word lines. A word line voltage is applied to a first word line selected from the word lines. Recovery voltages are applied to the word lines. Each recovery voltage is applied to at least one corresponding word line of the word lines. The recovery voltages have different voltage levels from each other. |
| US09805806B2 |
Non-volatile memory cell and method of operating the same
A non-volatile memory cell includes a substrate, a select gate, a floating gate, and an assistant control gate. The substrate includes a first diffusion region, a second diffusion region, a third diffusion region, and a fourth diffusion region. The select gate is formed above the first diffusion region and the second diffusion region in a polysilicon layer. The floating gate is formed above the second diffusion region, the third diffusion region and the fourth diffusion region in the polysilicon layer. The assistant control gate is formed above the floating gate in a metal layer, wherein an area of the assistant control gate overlaps with at least half an area of the floating gate. |
| US09805802B2 |
Memory device, memory module, and memory system
A memory device includes a memory cell array, a data pattern providing unit, and a write circuit. The memory cell array includes a plurality of memory regions. The data pattern providing unit is configured to provide a predefined data pattern. The write circuit is configured to, when a first write command and an address signal are received from an external device, write the predefined data pattern provided from the data pattern providing unit to a memory region corresponding to the address signal. |
| US09805798B2 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes a control circuit configured to control a soft program operation of setting nonvolatile memory cells to a first threshold voltage distribution state of the nonvolatile memory cells. When a characteristic of the nonvolatile memory cells is in a first state, the control circuit executes the soft program operation by applying a first voltage for setting the nonvolatile memory cells to the first threshold voltage distribution state to first word lines, and applying a second voltage higher than the first voltage to a second word line. When the characteristic of the nonvolatile memory cells is in a second state, the control circuit executes the soft program operation by applying a third voltage equal to or lower than the first voltage to the first word lines and applying a fourth voltage lower than the second voltage to the second word line. |
| US09805796B2 |
Non-volatile memory device and operating method thereof
A non-volatile memory device includes a first floating gate unit, a second floating gate unit, a selecting gate unit and a comparator. The first floating gate unit is configured to generate a first current according to a first bit signal and a control electric potential. The second floating gate unit is connected with the first floating gate unit in parallel, and configured to generate a second current according to a second bit signal and the control electric potential. The selecting gate unit is connected to the first floating gate unit and the second floating gate unit, and configured to generate the control electric potential according to a source signal and a word signal. The comparator is electrically connected to the first floating gate unit and the second floating gate unit, and configured to compare the first current with the second current, so as to generate a data-stored state signal. |
| US09805792B2 |
Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices
Embodiments disclosed include memory cell operating methods, memory cell programming methods, memory cell reading methods, memory cells, and memory devices. In one embodiment, a memory cell includes a wordline, a first bitline, a second bitline, and a memory element. The memory element is electrically connected to the wordline and selectively electrically connected to the first bitline and the second bitline. The memory element stores information via a resistive state of the memory element. The memory cell is configured to convey the resistive state of the memory element via either a first current flowing from the first bitline through the memory element to the wordline or a second current flowing from the wordline through the memory element to the second bitline. |
| US09805791B2 |
Resistive memory structure for single or multi-bit data storage
A resistive memory structure comprises at least one resistive memory element configured to store one or more bits of data and a circuit electrically connected to the resistive memory element for use in performing at least one of a read or write operation on the at least one resistive memory element. The circuit includes a resistor electrically connected in series to the resistive memory element thereby forming a voltage divider and electrical node therebetween, and an interpretation circuit electrically connected to the electrical node formed between the resistive memory element and the resistor. The interpretation circuit is configured to interpret a voltage at the electrical node and to determine a resistive state of the resistive memory element based on the voltage at the electrical node. |
| US09805790B2 |
Memory cell with retention using resistive memory
Described is an apparatus including memory cell with retention using resistive memory. The apparatus comprises: memory element including a first inverting device cross-coupled to a second inverting device; a restore circuit having at least one resistive memory element, the restore circuit coupled to an output of the first inverting device; a third inverting device coupled to the output of the first inverting device; a fourth inverting device coupled to an output of the third inverting device; and a save circuit having at least one resistive memory element, the save circuit coupled to an output of the third inverting device. |
| US09805788B2 |
Array power supply-based screening of static random access memory cells for bias temperature instability
A method of screening complementary metal-oxide-semiconductor CMOS integrated circuits, such as integrated circuits including CMOS static random access memory (SRAM) cells, for transistors susceptible to transistor characteristic shifts over operating time. For the example of SRAM cells formed of cross-coupled CMOS inverters, separate ground voltage levels can be applied to the source nodes of the driver transistors, or separate power supply voltage levels can be applied to the source nodes of the load transistors (or both). Asymmetric bias voltages applied to the transistors in this manner will reduce the transistor drive current, and can thus mimic the effects of bias temperature instability (BTI). Cells that are vulnerable to threshold voltage shift over time can thus be identified. |
| US09805783B2 |
Semiconductor device
A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL in a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against, for example, the Row Hammer problem, etc. can be taken. |
| US09805775B1 |
Integrated circuits with improved memory controllers
An integrated circuit may include a memory controller that interfaces with memory that operates using a memory clock signal having repeating memory clock cycles. The memory controller may include controller circuitry that receives memory access requests and generates corresponding memory commands using a controller clock signal having repeating controller clock cycles. The controller circuitry may partition each controller clock cycle into time slots that are associated with respective memory clock cycles. Each generated memory command may require a corresponding number of memory clock cycles to fulfill using the memory. The controller circuitry may assign a time slot to each memory command while preventing conflicts with previously issued memory commands. |
| US09805769B2 |
Semiconductor device having interconnection in package and method for manufacturing the same
A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip. |
| US09805766B1 |
Video processing and playing method and video processing apparatus thereof
A video processing and playing method adapted to a video processing apparatus is provided. The method includes the following steps. A digital video is received and the digital video is decoded to obtain a plurality of video frames. The video frames are analyzed to detect a human feature of the digital video. A recognition result of the detected human feature is determined by comparing the detected human feature with a plurality of sample features. The recognition result of the detected human feature is associated with a timestamp according to a time point of detecting the human feature. A first video segment of the digital video played according to the timestamp when receiving a user command selecting the recognition result. |
| US09805762B2 |
Band rewrite optimization
Implementations disclosed herein provide a method comprising comparing high-latency data sectors of a storage band, the high-latency data sectors having latency above a predetermined threshold, with target sectors for storing new data to determine one or more of the high-latency data sectors that may be skipped during retrieval of at-rest data from the storage band. |
| US09805753B2 |
Enhanced write pole and return pole for improved areal density
A system, according to one embodiment, includes: a main pole; and a trailing shield. A first distance D1 is defined in a track direction between the trailing shield and a pole tip region of the main pole; and a second distance D2 is defined in the track direction between the trailing shield and a second region of the main pole located behind the pole tip region, where D2 is greater than D1. Other systems, and methods are described in additional embodiments. |
| US09805751B1 |
Record head actuator sandwiched damper plus travel limiter
A magnetic recording head positioning assembly includes a coarse travel carriage secured to and spaced away from each of a front end assembly and head assembly via sandwiched fine guiding flexures and isolation flexures. The fine guiding flexures permit relative movement between the coarse travel carriage and head assembly. The isolation flexures permit relative movement between the coarse travel carriage and front end assembly. The fine guiding and isolation flexures thus isolate the coarse travel carriage from the front end assembly and head assembly. The assembly further includes dampers sandwiched between the coarse travel carriage and isolation flexures to limit movement of the isolation flexures. |
| US09805747B2 |
Method for making a perpendicular magnetic recording write head with write pole having thin side gaps and thicker leading gap
Ionized physical vapor deposition (IPVD) is used to form a magnetic recording disk drive write head main pole with thin side gap layers and a thicker leading gap layer. A metal or metal alloy is formed by IPVD in a trench with a bottom and outwardly sloping sidewalls. An optional Ru seed layer is deposited on the metal or metal alloy. This is followed by atomic layer deposition (ALD) of a Ru smoothing layer. If the IPVD results in metal or metal alloy side gap layers with a rough surface, the ALD process is modified, resulting in a smooth Ru smoothing layer that does not replicate the rough surface of the side gap layers. |
| US09805746B1 |
Low magnetic flux density interface layer for spin torque oscillator
A magnetic field-assisted magnetic recording (MAMR) head is provided, which includes a recording main pole, a seed layer, and a spin torque oscillator (STO) positioned over the main pole, in this order, in a stacking direction from a leading side to a trailing side of the recording head. The STO comprises a spin polarized layer (SPL), an interlayer with fcc structure, and a field generating layer (FGL), in this order in the stacking direction. The FGL comprises a low magnetic flux density interface (LMFDI) layer with bcc structure that directly contacts the interlayer. |
| US09805745B1 |
Magnetic recording and reproducing device comprising a magnetic head including a trailing shield and first and second shields having alternating magnetic and nonmagnetic layers
According to one embodiment, a magnetic head includes first and second shields, a magnetic pole, and a trailing shield. The magnetic pole is provided between the first and second shields. The trailing shield is separated from the magnetic pole. The first shield includes first magnetic layers and first nonmagnetic layers arranged alternately along a first stacking direction. The first nonmagnetic layers include at least one selected from the group consisting of Ru, Cu, and Cr. Thicknesses of the first nonmagnetic layers each is not less than 0.3 nanometers and not more than 2.2 nanometers. The second shield includes second magnetic layers and second nonmagnetic layers arranged alternately along a second stacking direction. The second nonmagnetic layers include at least one selected from the group consisting of Ru, Cu, and Cr. Thicknesses of the second nonmagnetic layers each is not less than 0.3 nanometers and not more than 2.2 nanometers. |
| US09805744B1 |
Dual writer design in interlaced magnetic recording
The disclosed technology includes a storage device including an interlaced magnetic recording (IMR) system, and a transducer head, including two writers, each writer including a write pole, wherein a width of a first write pole in a cross-track direction is substantially greater than a width of a second write pole in the cross-track direction, and wherein a down-track width of a front shield gap of the first write pole is substantially similar to down-track width of a front shield gap of the second write pole. In another implementation, the storage device includes an IMR system, and a transducer head, including two writers, each writer including a write pole, wherein a width of the first write pole in a cross-track direction is substantially greater than a width of a second write pole in a cross-track direction, and wherein a cross-track width of a side shield gap of the first write pole is substantially similar to a cross-track width of a side shield gap of the second write pole. |
| US09805741B1 |
Write current parameter selection for magnetic recording
A storage device includes a storage medium and a storage device controller that selectively varies a value of at least one write current parameter to generate alternating data tracks of variable written track width. According to one implementation, the alternating data tracks of variable written track width are generated with a single writer. |
| US09805740B2 |
Language analysis based on word-selection, and language analysis apparatus
The invention relates to a method for wording-based speech analysis. In order to provide a method that allows automated analysis of largely arbitrary features of a person from whom a voice file that needs to be analyzed comes, the invention detaches itself from the known concept of evaluating static keyword lists for the personality type. The method according to the invention comprises the preparation of a computer system by formation of a reference sample that allows the comparison that is necessary for feature recognition with other persons. The preparation of the computer system involves the recording and storage of a further voice file in addition to the voice files of the reference sample, the analysis of the additionally recorded voice file and the output of the recognized features using at least one output unit connected to the computer system. Furthermore, the invention relates to a speech analysis device for carrying out the method. |
| US09805739B2 |
Sound event detection
A system and method for the use of sensors and processors of existing, distributed systems, operating individually or in cooperation with other systems, networks or cloud-based services to enhance the detection and classification of sound events in an environment (e.g., a home), while having low computational complexity. The system and method provides functions where the most relevant features that help in discriminating sounds are extracted from an audio signal and then classified depending on whether the extracted features correspond to a sound event that should result in a communication to a user. Threshold values and other variables can be determined by training on audio signals of known sounds in defined environments, and implemented to distinguish human and pet sounds from other sounds, and compensate for variations in the magnitude of the audio signal, different sizes and reverberation characteristics of the environment, and variations in microphone responses. |
| US09805738B2 |
Formant dependent speech signal enhancement
An arrangement is described for speech signal processing. An input microphone signal is received that includes a speech signal component and a noise component. The microphone signal is transformed into a frequency domain set of short-term spectra signals. Then speech formant components within the spectra signals are estimated based on detecting regions of high energy density in the spectra signals. One or more dynamically adjusted gain factors are applied to the spectra signals to enhance the speech formant components. |
| US09805737B2 |
Apparatus and method for processing sensing data
According to an embodiment of the present disclosure, an apparatus for processing sensing data comprises an amplifier amplifying analog sensing data inputted from an outside source, an analog-digital converter converting the amplified analog sensing data into digital sensing data, a micro controller unit (MCU) including a signal modulator modulating the digital sensing data to a data wave having a sound waveform, transmittable to a sound input port of a terminal, and an output unit having a sound output terminal corresponding to the sound input port and outputting the data wave to the sound input port through the sound output terminal, wherein the data wave inputted to the sound input port is converted to an information value corresponding to the analog sensing data, and the information value is displayed on the terminal. |
| US09805731B2 |
Audio bandwidth extension by insertion of temporal pre-shaped noise in frequency domain
An audio decoder device for decoding a bitstream includes a bitstream receiver configured to receive the bitstream and to derive an encoded audio signal from the bitstream; a core decoder module configured for deriving a decoded audio signal in a time domain from the encoded audio signal; a temporal envelope generator configured to determine a temporal envelope of the decoded audio signal; a bandwidth extension module configured to produce a frequency domain bandwidth extension signal; a time-to-frequency converter configured to transform the decoded audio signal into a frequency domain decoded audio signal; a combiner configured to combine the frequency domain decoded audio signal and the frequency domain bandwidth extension signal in order to produce a bandwidth extended frequency domain audio signal; and a frequency-to-time converter configured to transform the bandwidth extended frequency domain audio signal into a bandwidth-extended time domain audio signal. |
| US09805729B2 |
Encoding device and method, decoding device and method, and program
The present technique relates to an encoding device and a method, a decoding device and a method, and a program capable of obtaining higher quality audio. An encoding unit encodes position information and a gain of an object in a current frame in multiple encoding modes. A compressing unit generates, for each combination of encoding modes of each pieces of position information and gains, encoded meta data including encoding mode information indicating the encoding modes and encoded data which are the encoded position information and gains, and compresses the encoding mode information included in the encoding meta data. A determining unit selects encoded meta data of which amount of data is the least from among the encoded meta data generated for each combination, thus determining the encoding mode of each pieces of position information and gains. The present technique can be applied to an encoder and a decoder. |
| US09805718B2 |
Clarifying natural language input using targeted questions
A dialog assistant embodied in a computing system can present a clarification question based on a machine-readable version of human-generated conversational natural language input. Some versions of the dialog assistant identify a clarification target in the machine-readable version, determine a clarification type relating to the clarification target, present the clarification question in a conversational natural language manner, and process a human-generated conversational natural language response to the clarification question. |
| US09805717B2 |
Voice-based input using natural language processing for interfacing with one or more devices
Aspects of the present invention provide a more universal, easy, natural, and vendor-agnostic interface to configure, manage, and/or monitor devices in networks. In embodiments, a user-friendly natural language interface voice interface may be used to “live chat” with one or more devices. In embodiments, a natural language input from a user intended for a target device is received and converted into one or more properly formed commands that are target-specific for the target device and may be executed by the target device. In embodiments, results from the execution of the one or more commands may be appropriately formatted for presentation to the user. |
| US09805711B2 |
Sound synthesis device, sound synthesis method and storage medium
A sound synthesis device that includes a processor configured to perform the following: extracting intonation information from prosodic information contained in sound data and digitally smoothing the extracted intonation information to obtain smoothed intonation information; obtaining a plurality of digital sound units based on text data and concatenating the plurality of digital sound units so as to construct a concatenated series of digital sound units that corresponds to the text data; and modifying the concatenated series of digital sound units in accordance with the smoothed intonation information with respect to at least one of parameters of the concatenated series of digital sound units to generate synthesized sound data corresponding to the text data. |
| US09805710B2 |
Systems and techniques for producing spoken voice prompts
Methods and systems are described in which spoken voice prompts can be produced in a manner such that they will most likely have the desired effect, for example to indicate empathy, or produce a desired follow-up action from a call recipient. The prompts can be produced with specific optimized speech parameters, including duration, gender of speaker, and pitch, so as to encourage participation and promote comprehension among a wide range of patients or listeners. Upon hearing such voice prompts, patients/listeners can know immediately when they are being asked questions that they are expected to answer, and when they are being given information, as well as the information that considered sensitive. |
| US09805708B2 |
Sound absorbing and insulating material with superior moldability and appearance and method for manufacturing the same
The present invention relates to a sound absorbing and insulating material with superior moldability and appearance and a method for manufacturing the same, more particularly to a sound absorbing and insulating material consisting of an inner sound absorbing and insulating layer 1 formed of a first nonwoven fabric mainly formed of a heat-resistant fiber and a binder uniformly distributed inside the first nonwoven fabric and maintaining the three-dimensional structure inside the first nonwoven fabric and an outer sound absorbing and insulating layer 2′, 2″ formed of a second nonwoven fabric mainly formed of a heat-resistant fiber, wherein the outer sound absorbing and insulating layer is stacked on one or both sides of the inner sound absorbing and insulating layer, and a method for manufacturing the same. The sound absorbing and insulating material of the present invention has superior sound-absorbing property, flame retardancy, heat resistance, heat-insulating property and high-temperature moldability. In addition, there is no concern of deterioration of surface appearance caused by leakage of the binder due to the presence of the outer sound absorbing and insulating layer. |
| US09805703B2 |
Systems and methods for capturing and interpreting audio
A device is provided as part of a system, the device being for capturing vibrations produced by an object such as a musical instrument. Via a fixation element, the device is fixed to a drum. The device has a sensor spaced apart from a surface of the drum, located relative to the drum, and a magnet adjacent the sensor. The fixation element transmits vibrations from its fixation point on the drum to the magnet. Vibrations from the surface of the drum and from the magnet are transmitted to the sensor. A method may further be provided for interpreting an audio input, such as the output of the sensors within the system, the method comprising identifying an audio event or grouping of audio events within audio data, generating a model of the audio event that includes a representation of a timbre characteristic, and comparing that representation to expected representations. |
| US09805699B1 |
Guitar arm rest
A guitar arm rest adapted for mounting on a side of a guitar for holding a guitar player's arm in a proper position on the guitar. The guitar arm rest includes an arm rest cup received next to an edge of the side of the guitar. A front of the arm rest cup is adapted for receiving the guitar player's arm thereon. A base plate is hinged to a back of the arm rest cup. The base plate includes one or more suction cups for securing the guitar rest on the side of the guitar. One end of a height adjustment pivot plate is hinged on the base plate. An opposite end of the pivot plate is received in a selected hole in a hole track plate. The hole track plate is attached to a rear of the arm rest cup. The pivot plate is used to adjust the height/angle of the arm rest cup above the side of the guitar. |
| US09805697B1 |
Method for tire tread depth modeling and image annotation
A vehicle service system having a means for acquiring images of a three-dimensional region of a vehicle wheel assembly tire tread surface. The vehicle service system is configured to process the acquired images to produce a collection of data points corresponding to the spatial position of surface points in the region from which tire tread wear characteristics are identified. The acquired images are further utilized to provide both a graphical and a numerical display to an operator, with the numerical display linked to specifically annotated or indexed points or windows within the graphical display, thereby enabling an operator to quickly identify specific focus points or regions on the tire surface which have been measured at the numerically identified tread depths. |
| US09805696B2 |
Synchronized image expansion
Various systems and methods related to displaying images from compressed data. For example, one method involves expanding a first portion of compressed data. The expanded first portion is written to a first memory location in a first memory. In response to detecting that a first segment of the expanded first portion has been read, a second portion of the compressed data is expanded. The expanded second portion is written to the first memory location. |
| US09805689B2 |
Apparatus and method for easy diagnosis, repair, and maintenance of a commercial display screen
One or more apparatuses and methods for enabling easy diagnosis, repair, and maintenance of a commercial display screen are disclosed. In one embodiment of the invention, this apparatus includes a removable commercial display kit box, a corresponding base plate interface unit attached to a rear panel of the commercial display screen, and a guiding mechanism for docking the removable commercial display kit box and the corresponding base plate interface unit. Furthermore, in one embodiment of the invention, the removable display kit box contains an analog-to-digital converter board, a power board, automatic-switching dual data ports, maintenance check visual indicators, and a removable fuse inlet. In case of a commercial display screen malfunction, the removable display kit box allows a quick inspection and a modular repair or replacement of a malfunctioning part, without requiring the entire commercial display screen to be dismounted from a wall or another attached structure. |
| US09805688B2 |
Wireless device supporting Wi-Fi direct service
A wireless device supporting Wi-Fi Direct service includes: a display; a communication unit; and a controller configured to cause: transmitting resolution information including a plurality of resolutions that are supported by the wireless device to a second wireless device; receiving an entire image including a first image and a second image from the second wireless device if a resolution of the first image is not one of the plurality of resolutions; displaying the first image by removing the second image from the received entire image when the entire image is received; and receiving the first image from the second wireless device without the second image if the resolution of the first image is included in the resolution information, the second image being an image that is added to the first image such that a resolution of the received entire image corresponds to one of the plurality of resolutions. |
| US09805685B2 |
Display controller, video signal transmitting method and system thereof for transmitting video signals with multiple data rate and reduced numbers of signals line
A display controller, video signal transmitting method and system thereof are provided. The display controller includes a processing circuit; a transmitting channel, coupled to the processing circuit; a receiving channel, coupled to the processing circuit; and a clock generator, that generates an internal clock signal and an external clock signal. Upon receiving a video signal, the processing circuit processes a first partial pixel data of the video signal to output a first display control signal. The transmitting channel converts a second partial pixel data of the video signal to a partial video signal having a multiple data rate according to the internal clock signal to be outputted. |
| US09805684B2 |
Display panel including buffer circuit to compensate for RC delay of a clock signal
A display panel includes a plurality of pixels, a gate driver, a clock pad, and a buffer circuit. The gate driver supplies gate signals to the plurality of pixels. The clock pad receives a clock signal. The buffer circuit is connected between the clock pad and the gate driver. The buffer circuit compensates for an RC delay of the clock signal received through the clock pad, and supplies the clock signal of which the RC delay is compensated to the gate driver. |
| US09805681B2 |
Fast gate driver circuit
A gate line driver circuit for a display panel includes a pull up circuit to drive a gate line of a display panel to a positive voltage that causes display panel switch elements that are coupled to the gate line to transition into an on state, a first pull down transistor to drive the gate line to a first negative voltage that causes the coupled display panel switch elements to transition into an off state, and a second pull down transistor to maintain the gate line at a second negative voltage that is less negative than the first negative voltage so as to maintain the coupled display panel switch elements in the off state. Other embodiments are also described and claimed. |
| US09805680B2 |
Liquid crystal display device and gate driving circuit
A liquid crystal display device and a gate driving circuit are disclosed. The gate driving circuit includes multiple-stage gate driving units and a control chip. Each stage gate driving unit includes a first pulling control unit, a first pulling unit, a second pulling control unit, a second pulling unit, a first reset unit, a second reset unit. The control chip is used for pulling a first clock signal and a first voltage reference signal to a first voltage level. Accordingly, the scanning lines driven by the gate driving circuit are all turned on in order to stably realize an All-Gate-On function. |
| US09805678B2 |
Liquid crystal display device having white pixel
An exemplary embodiment of the present invention provides a display device including red pixels, blue pixels, green pixels, and white pixels, a plurality of gate lines, and a plurality of data lines, wherein the red pixels, the blue pixels, and the green pixels are disposed to longitudinally extend in a vertical direction, and the white pixels are disposed to longitudinally extend in a horizontal direction below or above the red pixels, the blue pixels, and the green pixels. |
| US09805677B2 |
Display device for adjusting current output of a common voltage generating circuit
Provided is a display device, including: a display panel including a pixel electrode and a common electrode; a common voltage generating circuit configured to generate a common voltage to be supplied to the common electrode; a plurality of common transmission lines configured to transmit, to the common electrode, the common voltage generated by the common voltage generating circuit; a plurality of detection units, which are connected to the plurality of common transmission lines, respectively, and are configured to detect a transmission error of the common voltage in the plurality of common transmission lines, respectively; and a current adjusting unit configured to adjust a current amount of an output current of the common voltage generating circuit based on detection results of the plurality of detection units. |
| US09805671B2 |
Curved display and a driving method thereof
A curved display device includes a curved panel including a plurality of pixels, and an image compensation processor. The image compensation processor is configured to convert a first image signal into a second image signal by scaling the first image signal based on a curvature of the curved panel and a viewing distance between a viewer and the curved panel, map the second image signal onto corresponding pixels of the curved panel, and provide the mapped second image signal to the corresponding pixels of the curved panel. |
| US09805667B2 |
Brightness compensation method of mura area and design method of mura pixel dot brightness
The present invention provides a brightness compensation method of a Mura area and a design method of a Mura pixel dot brightness. By searching the right and lower normal pixel dots which are closest to the designated Mura pixel dot, and respectively recording the brightnesses of the right and lower normal pixel dots, and the distances between the right and lower normal pixel dots and the designated pixel dot, with combination of the brightnesses of the left and upper normal pixel dots adjacent to the designated Mura pixel dot, the weighted operation is executed to the brightnesses of the normal pixel dots at the right side, the lower side, the left side and the upper side to obtain the ideal brightness of the designated Mura pixel dot, and replace the original brightness of the designated Mura pixel dot with the obtained ideal brightness. Then, the brightness compensation of the Mura area is accomplished. The brightness of the Mura area after compensation is smoothly transited. |
| US09805660B2 |
Display device and method for correcting signal voltage using determined threshold voltage shift
A display is provided that includes a display having a light-emitting element and a drive transistor, which supplies a current to the light-emitting element causing the light-emitting element to emit light. The display also includes a signal line driving circuit that supplies a signal voltage applied between a gate and a source of the drive transistor, and a control circuit that calculates an amount of threshold voltage shift of the drive transistor on the basis of an amount of deterioration of a threshold voltage of the drive transistor during a deterioration period, and corrects the signal voltage in accordance with the amount of threshold voltage shift. |
| US09805658B2 |
Shift register, gate driving circuit and display device
The present disclosure provides a shift register, a gate driving circuit and a display device. The shift register comprises a set/reset unit, a pull down control unit, a pull down unit and an output unit. The set/reset unit sets or resets a pull up node in the output unit in response to a set signal or a reset signal. The output unit outputs an output signal in response to a first control signal through an output terminal of the shift register. The pull down control unit sets a pull down node in the pull down unit in response to a second control signal. The pull down control unit comprises a transistor and a capacitor, and the second control signal is applied to a gate of the transistor through the capacitor. |
| US09805656B2 |
Organic light emitting display device, pixel circuit of the same and driving method thereof
An organic light emitting display device, a pixel circuit of the organic light emitting display device and a method of driving the same are disclosed. The pixel circuit comprises a driving transistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, a second capacitor, a light emitting diode and a compensating diode. The degradation of the light emitting diode is compensated by the compensating diode. Since the degradation phenomena of the light emitting diode is compensated by the compensating diode, the light emitting diode is able to maintain an effective and normal brightness while using the same driving voltage, thereby ensuring higher display quality of images and scenes of the organic light emitting display device. |
| US09805654B2 |
Pixel circuit and its driving method, organic light-emitting display panel and display device
In the pixel circuit, at a charging stage, a charging unit controls a first end of a storage capacitor to be at a potential of an input signal from a second level signal input end, controls a second end of the storage capacitor to be at a potential equal to a difference between a potential of an input signal from the first level signal input end and a threshold voltage of a driving TFT; at a compensation jumping stage, a compensation jumping unit controls the first end to be at a data voltage, and enable a voltage at the second end to jump to a sum of the data voltage and a difference between the potential of the input signal from the first level signal input end and the threshold voltage of the driving TFT, to enable a light-emitting unit to emit light using the data voltage. |
| US09805651B2 |
Organic light emitting display apparatus
An organic light-emitting display apparatus includes a pixel circuit, a light emitter, an initialization transistor, and a coupling capacitor. The pixel circuit outputs a driving current to a node based on a data signal. The light emitter emits light based on the driving current at the node. The initialization transistor outputs an initial voltage to the node based on a first control signal received through a first control line. The coupling capacitor is between the node and the first control line. |
| US09805648B2 |
AMOLED display device including compensaton unit and driving method thereof
A display device is disclosed. In one aspect, the display device includes a plurality of pixels, a plurality of data lines respectively connected to the pixels, and a compensation unit connected to at least one the data lines. The compensation unit includes a first capacitor storing a leakage current of a pixel connected to the data line, a second capacitor storing a difference current, where the difference current is the difference between a reference current and a pixel current measured when a data signal of a reference gray signal is applied to the pixel. The compensation unit also includes a comparator outputting a difference value between the voltages stored in the first and second capacitors. According to embodiments, is possible to measure an accurate pixel current regardless of a leakage current and accurately detect deterioration of a pixel. |
| US09805641B2 |
Display device and electronic device including the same
The display device includes a first pixel, a second pixel, and a third pixel each including a first transistor, a second transistor, and a light-emitting element. In each of the first to third pixels, a first terminal of the first transistor is electrically connected to a signal line, a second terminal of the first transistor is electrically connected to a gate of the second transistor, a first terminal of the second transistor is electrically connected to a power supply line and a second terminal of the first transistor is electrically connected to the light-emitting element. A gate of the first transistor in the first pixel is electrically connected to a first scan line. A gate of the first transistor in the second pixel is electrically connected to a second scan line. A gate of the first transistor in the third pixel is electrically connected to a third scan line. |
| US09805640B2 |
Gate drive apparatus and display apparatus
Embodiments of the invention provide a gate drive apparatus and a display apparatus. With the gate drive apparatus, a clock signal is used in place of a forward scan signal and/or a clock signal is used in place of a backward scan signal and/or a reset signal and a first initial trigger signal (or a second initial trigger signal) are used in place of a low level signal and/or the same signal is used as a first initial trigger signal and a second initial trigger signal to thereby reduce the number of transmission lines for signals driving the gate drive apparatus. |
| US09805635B2 |
Display driving method, apparatus and display system
Embodiments of the present disclosure provide a display driving method, an apparatus and a display system, and are used for displaying different video signals to different users simultaneously through one display device. The method comprises: receiving a first image signal and a second image signal which correspond to different users respectively; performing a signal process on the first image signal to acquire a processed first image signal, and performing a signal process on the second image signal to acquire a processed second image signal; driving pixels of odd-numbered columns in the pixel array to display the processed first image signal and driving pixels of even-numbered columns in the pixel array to display the processed second image signal, wherein a polarization direction of the emergent light of the pixels of odd-numbered columns is different from that of the emergent light of the pixels of even-numbered columns. |
| US09805634B2 |
Display panel and image display method to increase brightness in a 3D image display mode
A display panel and an image display method for using in the display panel are provided. The display panel comprises first pixel rows and second pixel rows, the first pixel row is adapted for displaying a three-dimensional image according to a three-dimensional image data and the second pixel row is adapted for displaying a luminance compensated image corresponding to a luminance compensated data according to the luminance compensated data so as to increase a brightness of a screen composed of the three-dimensional image and the luminance compensated image. This increases the brightness of the three-dimensional image displayed by the display panel. |
| US09805632B2 |
Trailer hitch lighted display with integral step
A lighted display for mounting upon a vehicle having a trailer hitch receiver. The lighted display includes an elongated base member with a trailer hitch mount affixed midway along the base member. The base member also incorporates a horizontal step plate extending outward from upper edge of the base member allowing easier access to the rear of the vehicle. The base member is configured to receive multiple lighting elements within an elongated vertical channel. The lighting elements are connected to a trailer wiring plug which is configured to engage the vehicles trailer wiring connector. A message board is positioned within the vertical channel of the base member. The message board is made of a semi-translucent material which allows a portion of the light from the lighting elements to pass. The message board is partially masked with an opaque material, the unmasked portions forming the desired message for display. Upon illumination of the vehicle driving lights, one or more of the lighting elements are illuminated at the low light intensity level. Upon illumination of the vehicle brake light, one or more of the lighting elements are illuminated at the high light intensity level. And upon illumination of the vehicle turn signal light one or more of the lighting elements are illuminated at the high light intensity level in coordination with and on the corresponding side of the vehicle as the vehicle turn signal light. |
| US09805624B2 |
Simulated, representative high-fidelity organosilicate tissue models
A method of making a tissue model comprises determining one or more material properties of a tissue, wherein the one or more material properties include at least one of mechanical properties, electroconductive properties, optical properties, thermoconductive properties, chemical properties, and anisotropic properties, creating an anatomical structure of the tissue, selecting an artificial tissue material having one or more material properties that substantially correspond to the one or more material properties of the tissue, and coupling the artificial tissue material to the anatomical structure. |
| US09805623B1 |
CPR training system and method
A training system and training method for cardiopulmonary resuscitation (CPR) is disclosed. The training system includes a manikin, a chest compression module, a breathing module and a data processing module. The chest compression module and the breathing module are installed on the manikin and connected to the data processing module. During a training session, a student performs CPR on the manikin. The data processing module evaluates and provides feedback regarding the chest compressions and the rescue breathings performed by the student. The training method includes positioning the chest compression module and the breathing module on the manikin, initializing the chest compression module and the breathing module to identify compression and breathing characteristics of the manikin, performing CPR on the manikin, and evaluating the CPR based on the compression and breathing characteristics of the manikin. |
| US09805622B2 |
Physical lung model to simulate organ function in health and disease
The invention relates to a lung simulator apparatus, as well as to a method to ventilate a lung simulator with a ventilator. The lung simulator apparatus comprises an air chamber with a variable volume for an exchangeable gas, which air chamber is connected in parallel with two air conduits, and a gas exchange element for injecting a tracer gas into the air chamber, wherein the volumes of the air conduits are substantially different. The method of simulating lung function comprises filling a first gas into the air chamber, which has a variable volume and which is connected in parallel with the two air conduits, and injecting a second gas into the air chamber, pressing the first and second gas out of the air chamber, and optionally repeating these steps. |
| US09805620B2 |
Medical injector simulation device
An apparatus includes a simulated medicament delivery device and an electronic circuit system coupled to the simulated medicament delivery device. The electronic circuit system is configured to output an electronic output associated with a use of the simulated medicament delivery device. |
| US09805617B2 |
System for screen dance studio
A system for an exercise screen dance studio includes an image storage unit, an audio unit, a controller, a large mirror, a projector, a screen image unit, and a left-right image reversal unit for reversing left-right sides of an image. In addition, a screen image unit is provided either behind a trainee dancer with a large mirror being provided in front of the trainee or the screen image unit can be integrated with the large mirror. A large screen image unit and a projector for proving audio and image may be provided, wherein the large mirror is arranged in front of the trainee and the screen image unit is placed on a rear side thereof or inside the mirror so that the trainee can see simultaneously his/her reflected exercising image and the projected dance exercising image through the mirror in the same orientation with regard to left-right sides or as a reversed image. |
| US09805613B2 |
System and method for domain adaptation in question answering
A method for providing adaptation to a question answering (QA) system having an associated plurality of trace data and a question-answer set. The method includes submitting a set of questions to the QA system; receiving back from the QA system a set of answers; comparing the set of answers to answers in the question-answer set; and generating the plurality of trace data based on comparison, and an estimate of how much more training data is needed. The generating comprises (a) for each question type, successively sample an increasing number of question-answer pairs from the question-answer set; (b) automatically train the QA system using the sampled question-answer pairs; (c) automatically compute a functional dependence of the QA system performance on the remaining questions relative to the size of the sample; and (d) extrapolate from the functional dependence a number of training question-answer pairs of each question type. |
| US09805612B2 |
Interest-attention feedback method for separating cognitive awareness into different left and right sensor displays
A method for using an interest-attention feedback loop involving the determination of the interest of a person in a left sensor stimulation stream and a right sensor stimulation stream, and the adjustment of attention factors to balance that interest, with the intent to facilitate, or train, a person to intentionally suppress binocular fusion and operate within the dual experience, where the person is able to simultaneously render separate left and right mental displays. The dual experience allows the person new mental processing capabilities that can produce novel information synthesis, double the information input in man machine interfaces, and allow reaction to the cognitive awareness of two simultaneous world views. This includes facilitating awareness and interactions with two different computer screen interfaces simultaneously, reducing fatigue associated with optical screen switching, and encouraging the fusion of two different simultaneous experiences into an abstract information synthesis. |
| US09805611B2 |
System and method for electronic airfield signage
An airfield sign that includes a dynamic display area. |
| US09805608B2 |
Method and a device for assisting piloting in order to detect and signal local weather risks associated with the relief of the terrain overflown by an aircraft
A method having a step of preparing an on-board database containing various kinds of geographical data. During a step of preparing a risk database, at least one local weather risk is stored prior to flight for at least one mesh. During a weather determination step, current and/or forecast weather conditions are acquired for at least one mesh. During a processing step, at least one combined parameter is determined for at least one mesh, each value of a combined parameter being obtained by applying a logic function giving the value of the combined parameter for a mesh as a function of the geographical data and also of the weather risk and the meteorological data. During an analysis step, the presence of a potential local weather danger, at least around the aircraft, is detected in flight as a function of the combined parameter values. |
| US09805604B2 |
Terminal device
A terminal device is disclosed that is mountable in a vehicle. The terminal device comprises an acquirer, storage and a controller. The acquirer acquires, from the vehicle, i) traveling direction information indicating traveling directions of the vehicle in accordance with movement of the vehicle and ii) winker direction information indicating a winker direction indicated by a direction indicator of the vehicle. The controller i) stores in the storage the traveling direction information indicating a first traveling direction of the traveling directions, the first traveling direction being acquired when the acquirer has acquired the winker direction information, and ii) updates the traveling direction information indicating the first traveling direction with the traveling direction information indicating a second traveling direction, the second traveling direction being acquired after the acquirer has acquired the winker direction information, when the second traveling direction indicates a direction opposite to the winker direction. |
| US09805602B2 |
Parking service
A vehicle system includes a communication interface and a processing device. The processing device determines a proximity of a host vehicle to a target location. When the proximity to the target location is less than a predetermined value, the processing device commands the communication interface to transmit the target location to a parking server. In response, the processing device receives a message identifying at least one parking zone from the parking server. |
| US09805601B1 |
Vehicular traffic alerts for avoidance of abnormal traffic conditions
Methods and systems are described for generating a vehicle-to-vehicle traffic alert. Various aspects may include detecting that an abnormal traffic condition exists in an operating environment of a vehicle and generating a related electronic message. The electronic message may be transmitted via the vehicle's transceiver using a wireless communication to a nearby vehicle to alert the nearby vehicle of the abnormal traffic condition and to allow the nearby vehicle to avoid the abnormal traffic condition. |
| US09805600B2 |
Apparatus and method for providing road guidance information for a vehicle
Disclosed herein are an apparatus and a method for providing road guidance information to a vehicle. The apparatus may include: a position measurer configured to measure a position of the vehicle; a communicator configured to receive event information from an outside of the vehicle; and a processor configured to perform guidance and a warning for an event depending on whether or not the vehicle is scheduled to pass through an event occurrence point using a travel route history recorded by the position measurer and the received event information, when absence of map data is confirmed on the basis of the event information. |
| US09805599B2 |
Method and apparatus for vehicle message recall
A system includes a processor configured to receive a request for publication of a message to a vehicle. The processor is further configured to determine if the message has a time-sensitive indicia, defining an expiration time, affiliated therewith. Also, the processor is configured to deliver messages having time-sensitive indicia to a time-sensitive inbox. The processor is additionally configured to remove messages from the time sensitive inbox when a defined expiration time for a given message has passed. |
| US09805596B2 |
Wrong way indication beacon and related methods
A wrong way vehicle detection system may include a warning station positioned along a roadway including a wrong way indication sign, a flashing beacon(s), a forward facing movement sensor facing away from the direction of oncoming traffic, and a rear facing movement sensor. A communications device and a controller may also be included, and the controller may be configured to operate the forward facing sensor to detect a wrong way vehicle on the roadway, and responsive to the detection activate the at least one flashing beacon and operate the rear facing movement sensor to detect movement of the wrong way vehicle beyond the at least one warning station. The controller may also be configured to, responsive to detection of the movement of the wrong way vehicle beyond the warning station, send a wrong way vehicle detection alert to an operations center via the communications device. |
| US09805594B2 |
Method, evaluation system and vehicle for predicting at least one congestion parameter
A method, an evaluation system and a cooperative vehicle for predicting at least one congestion parameter are proposed. The method involves a detecting of a traffic density 71-74, a detecting of a current position x which is present during the detecting of the traffic density 71-74 and a relaying of the traffic density 71-74 and the current position x to an evaluation unit 60. Moreover, the method includes an evaluation of the traffic density 71-74 and a providing of at least one congestion parameter. |
| US09805593B2 |
Method for communication within an, in particular wireless, motor vehicle communication system interacting in an ad-hoc manner, device for the traffic infrastructure and road user device
The invention relates to a method for communication on the basis of an, in particular wireless, motor vehicle communication system interacting in an ad-hoc manner, wherein the communication takes place between road users themselves and/or between road users and traffic infrastructure, in which, in the vicinity of a node for traffic routes, particularly junctions or intersections between traffic routes such as road or rail junctions, a radio transmission/radio reception device associated with a first road user continuously sends a message to at least one second radio transmission/radio reception device, which is situated in the radio coverage area of the first radio transmission/radio reception device and is associated with a device for the traffic infrastructure, the message is sent such that, on the basis of the received message, for each manoeuvre that is possible at the node, at least one value correlating to a probability of execution of the manoeuvre at the node is ascertained, and the road users are controlled on the basis of the correlating value. The invention also relates to a device for the traffic infrastructure and to a road user device having means for carrying out the method. |
| US09805592B2 |
Methods of tracking pedestrian heading angle using smart phones data for pedestrian safety applications
This presentation provides methods to track pedestrians heading angle using smart phone data. Tracking heading angle especially at or from stationary position is key for pedestrian safety, e.g., for smart cross system and pedestrian collision mitigation system. It provides pedestrian-to-vehicle (P2V) platform. It deploys smart phones or mobile devices, equipped with DSRC (Dedicated short range communication) support, to act as beacons for pedestrians: Phone can alert driver to pedestrian presence in path; Pedestrian Basic Safety Message (BSM) can aid awareness for vehicles; It can be used for bicycles, as well. It also provides pedestrian-to-infrastructure (P2I) platform. Smart phone, through DSRC/cellular, transmits pedestrian presence to crosswalks/signals: It enables advanced crosswalk lighting/warning scheme; It enables bundling of pedestrian presence to vehicles. In this presentation, we provide various examples and variations on these. |
| US09805589B2 |
Trainable transceiver and camera systems and methods
A system for installation in a vehicle and for controlling a remote device includes a camera, a trainable transceiver, and a control circuit coupled to the camera and the trainable transceiver. The control circuit is configured to use geographic location information to determine when to initiate a process of using the camera to identify the remote device and transmit an activation signal formatted to control the remote device. Upon initiation of the process, the control circuit is configured to use the camera to identify the remote device by comparing information received via the camera to information stored in memory, and wherein the control circuit is configured to automatically transmit an activation signal formatted to control the remote device, using the trainable transceiver, in response to identifying the remote device. |
| US09805588B2 |
Wireless fire protection valve inspection and monitoring systems, and methods for automated inspection and monitoring of fire protection systems
A wireless fire protection system valve inspection and monitoring system, including: a plurality of valves, each valve including a detecting unit adapted to detect valve state information for the valve, wherein the valve state information comprises at least one of an open state, a partially-open state, and a closed state; at least one collection unit that wirelessly receives the valve state information from the detecting units; and an information module that receives the valve state information from the collection unit and aggregates, stores, and/or reports the valve state information. |
| US09805587B2 |
DIY monitoring apparatus and method
The present disclosure relates to a software application used on mobile devices that enables professional monitoring services to DIY monitoring systems that lack an ability to communicate with remote monitoring facilities. In one embodiment, alert messages are transmitted by a monitoring system gateway and received by a personal communication device. The alert messages indicate occurrences of events at a monitored premises. When the software application determines that an incoming communication is an alert message, an indication is provided to a user of the mobile device that an event has occurred at the premises, and giving the user a predetermined time period in which to respond to the indication. If the user fails to respond to the indication within a predetermined time period, a message is transmitted to a remote monitoring facility, alerting the remote monitoring facility of the event. |
| US09805582B2 |
Integrative security system and method
A method for monitoring and securing a facility without employing a manned control center, according to which a server acquires surveillance data from each of a plurality of distributed surveillance devices deployed within or adjacent to a given security sensitive facility. Then the server receives an intrusion alert from a guard, or from one or more of the plurality of surveillance devices to initiate a triggering event, if the acquired surveillance data is indicative of activity that has been detected at an indicated location. A first guard is alerted and presented with a full situational awareness image to assess the severity of the detected activity and the triggering event is terminated if found by the first guard to be of a low severity, or an interception operation initiated by self-dispatching or dispatching one or more additional guards to a close by location that holds tactical advantage relative to the indicated location if the triggering event was found by the first guard to be of a high severity. |
| US09805580B2 |
Initiating an alert based on a mobile device being left behind
A system and method for indicating an alert associated with a mobile device are provided. The system includes a device detector to detect whether the mobile device is in a state of wireless charging; an exit signal receiver to detect an event associated with an exit; a device determiner to determine, after the event is detected, whether the mobile device is in an area associated with the wireless charging; and a vehicle notifier to transmit an alert based the determination by the device determiner. Also provided is a method for augmenting a wireless charging system with a notification system. |
| US09805574B1 |
Vehicle child safety alert system
The vehicle child safety alert system comprises a seat sensor and an alarm fob. The seat sensor is installed in a child safety seat in order to detect a passenger. When a passenger is detected in the child safety seat the seat sensor queries the GPS for the GPS coordinates of the seat sensor. The GPS coordinates of the location of the seat sensor are wirelessly transmitted to the alarm fob. The alarm fob receives the GPS coordinates of the location of the seat sensor and compares the GPS coordinates of the location of the seat sensor to the GPS coordinates of the location of the alarm fob. If the distance between the GPS coordinates of the location of the seat sensor and the GPS coordinates of the location of the alarm fob is greater than a maximum allowable distance the alarm fob generates an alarm. |
| US09805573B2 |
Alert management utilizing mobile devices
Methods, computer systems, and computer-storage medium are provided for managing patient alerts using a mobile device. A mobile device associated with a patient caregiver receives a critical alert related to the patient, and the alert is presented on the mobile device. The alert includes important contextual information that enables the caregiver to make a quick assessment of how to effectively address the alert. The alert includes options for accepting the alert or rejecting the alert. Acceptance of the alert enables the caregiver to communicate the alert to selected caregivers that can assist in managing the alert. Rejecting the alert causes the alert to be automatically communicated to additional caregivers associated with patient. |
| US09805571B2 |
Smoke alarm mounting and dismounting system and method
A method of mounting and dismounting a smoke alarm from a supporting element mounted to an overhead surface; said method including the steps of, inserting an elongate implement into an opening provided in a body of the smoke alarm, and applying a force via the elongate implement so as to detach the body of the smoke alarm from the supporting element, and wherein the elongate implement is applied by a user standing on a floor surface below the overhead surface. |
| US09805563B2 |
Security device
A security device includes: a housing having a plug receptacle; a spool rotatably coupled to the housing; a locking mechanism having a locked state and an unlocked state, the locked state preventing the spool from rotating in a first direction, and the unlocked state allowing rotation of the spool in the first direction and in a second direction; a plug having an inserted position and a removed position with respect to the plug receptacle, the inserted position maintaining the locking mechanism in the locked state, and the removed position allowing alteration of the locking mechanism from the locked state to the unlocked state; a cable coupled to the spool and to the plug; an alarm circuit which activates an alarm upon sensing discontinuity of the cable and/or the plug moving from the inserted position to the removed position, the alarm circuit coupled to and rotating with the spool. |
| US09805561B2 |
Apparatus, method and system for checking rear lamp
An apparatus for checking a rear lamp includes a sensor and a controller. The sensor is disposed in at least one rear lamp and configured to obtain a first signal generated from the outside. The controller is configured to turn on the at least one rear lamp according to the first signal. |
| US09805558B2 |
Method for generating alternative gaming device outputs
A delivery method for providing supplemental slot machine output content through a slot machine has been developed. The method includes offering slot machine output content that has been tested by a gaming commission and offering supplemental slot machine output content that has not been tested by the gaming commission. A separation is maintained between the tested content and the untested content with a software construct that prevents the untested content from changing the tested content. |
| US09805554B2 |
Providing secondary wagering-game play via a mobile device
A wagering game system and its operations are described herein. In some embodiments, the operations can include obtaining a game code associated with a secondary game, wherein the game code was scanned from a physical game card. In some embodiments, the game code is scanned by a scanning mechanism of a mobile device. The physical game card is associated with a wagering game. The operations can further include determining an outcome for the secondary game based on the game code. The operations can further include providing, for presentation, an indication of the outcome. In some examples, the indication of the outcome is provided for presentation via the mobile device. |
| US09805550B2 |
Gaming device, program, system, and arcade gaming device
In order to improve the tempo of a game, a gaming device 100 has permission means (308) for, when execution means (306) starts to execute a game action in a game, permitting the execution by subtracting a consumption value according to the game action from an execution acceptable value for the game action, temporal recovery means (318) for allowing for recovery of the execution acceptable value resulting from the subtraction, as time passes using a recovery upper limit value as an upper limit, and payment recovery means (320) for allowing for recovery of the execution acceptable value resulting from the subtraction, based on payment or use of a game item obtained by the payment, even when the recovery upper limit value is exceeded. |
| US09805546B2 |
Methods and systems for monitoring golfers on a golf course
A method for monitoring golfers on a golf course is provided comprising the steps of: providing a memory device to each golfer authorized to be on course, the memory device having unique identifier; receiving, at a first memory device reader positioned at a first reader location on course, the unique identifier; transmitting the unique identifier together with a first reader identifier and a first time stamp to a base station receiver; ascertaining a number of authorized golfers on course based on the number of unique identifiers transmitted to the base station receiver within a specified period of time; capturing one or more images, using a camera positioned at a camera location, each image associated with a camera time stamp; analyzing the one or more images to ascertain a number of golfers on course within the specified period of time; and comparing the number of authorized golfers on course according to step (d) to the number of golfers on course determined according to step (f) to establish whether the number of golfers determined by the two methods correspond. A system for monitoring golfers on a golf course is also provided. |
| US09805545B2 |
Casino electronic gaming machine cabinet with mobile device dock and related techniques
A casino electronic gaming machine cabinet includes at least one display screen, multiple input controls, a dock configured to receive a player's mobile device, at least one communication interface capable of electronic communication with the player's mobile device via the dock while the mobile device executes wagering game software, and control circuitry to receive wagering game input commands entered by the player via the input controls of the casino electronic gaming machine cabinet, transmit, to the player's mobile device via the at least one communication interface while the player's mobile device is docked at the casino electronic gaming machine cabinet, control signals corresponding to the received wagering game input commands. The control signals provide control input to the wagering game software, receive from the player's docked mobile device, graphics output from the wagering game software providing visual components of the wagering game play. |
| US09805544B2 |
Method and system for mediating interactive services over a wireless communications network
The present invention is directed to a method and system for controlling the state of an interactive application and controlling delivery of the interactive application to one or more users. The system of the present invention is a system for delivering an interactive application to one or more users of a communications network and may comprise an interactive application adapted to the communications network; a user access device adapted to receive said interactive application; control means for establishing parameters under which said interactive application is rendered on said user access device; and mediation means for establishing terms for the interaction between the at least one user and other users and the communications network. |
| US09805542B2 |
Gaming system, gaming device, and method for providing a cascading symbols game having magnetic symbols and target symbols
A gaming system displays one of a plurality of symbols in each of a plurality of symbol positions, at least one of the plurality of symbols being a target symbol for establishing a direction of shifting and at least one of the plurality of symbols being a magnetic symbol for shifting toward a target symbol. If any generated magnetic symbol is associated with a generated target symbol, the gaming system shifts that magnetic symbol toward the associated target symbol, resulting in an empty symbol position. The gaming system fills the empty symbol position by shifting a displayed symbol or by generating one of the plurality symbols and repeats until no magnetic symbol is associated with a target symbol. The gaming system provides an award for any displayed winning symbol combination. The gaming system removes symbols from each winning combination, fills the empty symbol positions, and repeats as above. |
| US09805540B2 |
3D enhancements to game components in gaming systems including merged game components
An electronic gaming machine, a system and a method for providing game components with 3D enhancement are disclosed. The machine includes at least one processor, one persistent data store, one receiver to receive game data, and a display device configured with a user interface to display a portion of the game data as at least one of a row and a column of game components along a plane in accordance with a set of game rules for a given game, each one of the game components having an original symbol associated thereto, and at least two additional game components to provide a 3D enhancement in relation to the plane of the display device, wherein the at least one processor is configured to merge the at least two additional game components to provide at least one additional symbol, and integrate the at least one additional symbol into the given game. |
| US09805537B2 |
Information processing apparatus communicating with external device via network, and control method of the information processing apparatus
When an information processing apparatus connected to an external device via a network respectively displays an operation screen on an operation unit provided thereto and on the external device, the information processing apparatus changes display of a touched key with highlighting or without highlighting according to whether confidential information such as a password is entered. Depending on the entry on the operation unit, whether to display a character on the operation unit or not is determined. If the character is to be displayed, the highlighting of the character is not performed. If the character is not to be displayed, the highlighting of the character is performed. |
| US09805535B2 |
Customizable coin holder
A coin holder device 12 that includes a transparent front sheet 20 that contains receptacles 18 and first and second major surfaces 28 and 30. The receptacles 18 are recessed into the sheet 20 to project out from the second major surface 30. A backer sheet 22 has first and second major surfaces 32 and 34 and openings 36 that extend through the sheet 22. The openings 36 correspond in location to the receptacles 18 in the front sheet 20. The backer sheet 22 is removeably positioned over the receptacles 18, enabling the second major surface 30 to be juxtapositioned against the first major surface 32. The first major surface 32 has coin indicia 38 proximate the openings 36 indicative of the coin to be placed in the respective receptacle 18. The coin holding device is beneficial in that it allows custom-tailored coin holders to be supplied easily over the internet. |
| US09805532B2 |
Vehicle wireless communication system, vehicle control device, and portable machine
A vehicle control device includes a plurality of LF transmitters transmitting response request signals that reach an area around a vehicle and an interior of a vehicle chamber, and a UHF receiver receiving a signal transmitted from a portable machine. The portable machine includes an LF receiver receiving the response request signal and a UHF transmitter transmitting a response signal. The LF receiver in the portable machine has a reception region in which the response request signals transmitted from at least two of the LF transmitters are receivable when the portable machine approaches the vehicle. Door locking/unlocking is permitted if the LF receiver in the portable machine receives the response request signals transmitted from at least two of the LF transmitters within a predetermined time period. In contrast, door locking/unlocking is inhibited if the LF receiver receives the response request signal transmitted from one of the LF transmitters. |
| US09805529B2 |
Concepts for asset identification
Systems, methods, apparatus, and computer program products are provided for identifying assets (e.g., mobile assets and/or personnel assets). In one embodiment, a mobile asset can be uniquely identified from RFID tags. In another embodiment, mobile assets and personnel assets can be identified from captured image data. After identification, it can be determined whether the asset (e.g., mobile asset and/or personnel asset) is authorized for one or more activities and a corresponding perceivable indication can be generated. |
| US09805528B1 |
Authentication and authorization to control access to process control devices in a process plant
Techniques for controlling plant assets in a process plant include assigning permissions to users and user interface devices within the process plant, where the permissions specify a level of access to a plant asset. The permissions are then provided to the user interface devices. When a user connects a user interface device to a plant asset, the user interface device determines which operations the user may perform on the connected plant asset based on the permissions granted to the user. |
| US09805526B2 |
Fault monitoring for vehicles
Method and apparatus for calculating probabilities of service interruptions based on fault event indications. Instances of fault event indications are filtered to remove duplicate indications for the same fault event. Then a probability of the fault event indication causing a service interruption is calculated by dividing a number of service interruptions caused by instances of the fault event indication by the number of fault event indications. In the event that a particular fault event indication is associated with a high probability of causing a service interruption, a message can be automatically generated and transmitted upon receipt of a future instance of the service interruption. The message can provide information related to short-term solutions to address the fault event, long-term solutions to address the fault event, and parts and tools for addressing the fault event. |
| US09805520B2 |
Method and system for providing vehicle security service
A vehicle security service provision method in a vehicle gateway to provide communication in a vehicle includes determining whether or not an external device has been connected, transmitting an external device connection-informing message to a vehicle telematics unit through the in-vehicle communication when it is determined that the external device has been connected, receiving an external device connection acceptance message from the vehicle telematics unit, and processing a diagnosis request message received from the external device in response to the received external device connection acceptance message. In accordance with the disclosed method, connection of an external device to the vehicle is sensed in real time. Sensed results are informed to a user terminal, for execution of a user approval procedure. Accordingly, an effective vehicle security service can be provided. |
| US09805519B2 |
Performing services on autonomous vehicles
Technology is described for performing services on an autonomous vehicle. The autonomous vehicle may detect that a service is to be performed on the autonomous vehicle. The autonomous vehicle may select a service center to perform the service on the autonomous vehicle. The autonomous vehicle may provide commands to drive the autonomous vehicle to the service center to enable performance of the service on the autonomous vehicle. |
| US09805514B1 |
Dynamic haptic retargeting
Dynamic haptic retargeting can be implemented using world warping techniques and body warping techniques. World warping is applied to improve an alignment between a virtual object and a physical object, while body warping is applied to redirect a user's motion to increase a likelihood that a physical hand will reach the physical object at the same time a virtual representation of the hand reaches the virtual object. Threshold values and/or a combination of world warping a body warping can be used to mitigate negative impacts that may be caused by using either technique excessively or independently. |
| US09805512B1 |
Stereo-based calibration apparatus
A virtual reality (VR) headset calibration system calibrates a VR headset, which includes a plurality of locators and an inertial measurement unit (IMU) generating output signals indicative of motion of the VR headset. The system comprises a calibration controller configured to receive a headset model of the VR headset that identifies expected positions of each of the locators. The controller controls cameras to capture images of the VR headset while the headset is moved along a predetermined path. The images detect actual positions of the locators during the movement along the predetermined path. Calibration parameters for the locators are generated based on differences between the actual positions and the expected positions. Calibration parameters for the IMU are generated based on the calibration parameters for the locators and differences between expected and actual signals output by the IMU. The calibration parameters are stored to the VR headset. |
| US09805504B2 |
Image display methods
The present disclosure discloses an image display method in a CT system. The method comprises: implementing CT scanning on an inspected object, to obtain CT projection data; organizing the CT projection data according to a predetermined interval; extracting basic data from the organized CT projection data by using a fixed angle as a start angle and using 360 degrees as an interval; forming a DR image based on the extracted basic data; reconstructing a three-dimensional image of the inspected object from the CT projection data; and displaying the DR image and the reconstructed three-dimensional image on a screen at the same time. In the solution, the CT data is processed to obtain DR data. After the DR data is obtained, a DR image is obtained directly using a DR data processing algorithm. This enables an image recognizer to more accurately and more rapidly inspect goods carried by a passenger using the existing experience in image recognition of the DR image. |
| US09805499B2 |
3D-consistent 2D manipulation of images
One embodiment involves receiving selection of a first quadrilateral and a second quadrilateral in an image being edited in an image editing application. An edge of the first quadrilateral may be shared with an edge of the second quadrilateral. In this embodiment, one or more manipulations associated with the first quadrilateral and/or the second quadrilateral may be received. In response to the received manipulation(s), an updated view of the image is generated or otherwise displayed according to one embodiment. The updated view may be based at least in part on the image, the received manipulation(s), and/or one or more constraints. For example, the updated view may be based at least in part on a three-dimensional scene constraint. In embodiments, the updated view is consistent with a three-dimensional scene in the image. In some embodiments, the updated view is generated in real-time or substantially real-time. |
| US09805497B2 |
Collision-culling of lines over polygons
Collision-culling for early elimination of non-colliding ray segments over a group of polygons in a computer graphics system. The scene is subdivided into cells, at each cell three orthographically viewed buffers of the local scene are created, each buffer is aligned with one of the three main axes. All rays in a cell are examined vs. each of the buffers to eliminate ray segments that for certain do not collide with local polygons. |
| US09805495B2 |
Single pass bounding volume hierarchy rasterization
A render output unit running on at least one processor may receive a source pixel value to be written to a pixel location in a render target, wherein the source pixel value is associated with a source node in a hierarchical structure. The render output unit may receive a destination pixel value of the pixel location in the render target, wherein the destination pixel value is associated with a destination node in the hierarchical structure. The render output unit may determine a lowest common ancestor node of the source node and the destination node in the hierarchical structure. The render output unit may output a resulting pixel value associated with the lowest common ancestor node of the source node and the destination node to the pixel location in the render target. |
| US09805494B2 |
Electronic device, storage medium, program, and displaying method
An electronic device is provided which displays an object (body) on a flexible display screen in accordance with a three-dimensional shape of the display screen by utilizing the flexibility of the display screen. An electronic device including a display portion which includes a flexible display device displaying an object on a display screen; a detection portion detecting positional data of a given part of the display screen; and an arithmetic portion calculating a three-dimensional shape of the display screen on the basis of the positional data and computing motion of the object to make the object move according to a given law in accordance with the calculated three-dimensional shape of the display screen. |
| US09805489B2 |
Mosaic oblique images and methods of making and using same
A computer system running image processing software receives identification of a geographical area for which an oblique-mosaic image is desired; assigns surface locations to pixels included in an oblique-mosaic pixel map of the geographical area encompassing multiple source images, the oblique-mosaic pixel map being part of a mathematical model of a virtual camera looking down at an oblique angle onto the geographical area; creates a ground elevation model of the ground and vertical structures within the oblique-mosaic pixel map using overlapping source images of the geographical area, wherein the source images were captured at an oblique angle and compass direction similar to the oblique angle and compass direction of the virtual camera; and reprojects, with the mathematical model, source oblique image pixels of the overlapping source images for pixels included in the oblique-mosaic pixel map using the ground elevation model to thereby create an oblique-mosaic image of the geographical area. |
| US09805486B2 |
Image-drawing processing system, server, user terminal, image-drawing processing method, program, and storage medium
A user terminal apparatus includes an input receiver, an intersecting-image information obtaining unit and a divider. The input receiver receives input information relating to image-drawing and image-erasing. The intersecting-image information obtaining unit obtains image-drawing input information intersecting image-erasing input information as intersecting-image information when the input receiver receives image-erasing input information. The divider divides the intersecting-image information to erase a portion of the intersecting-image information contained in an erasing area computed from the image-erasing input information when the input information is image-erasing input information. |
| US09805475B2 |
Eulerian motion modulation
In one embodiment, a method of amplifying temporal variation in at least two images includes converting two or more images to a transform representation. The method further includes, for each spatial position within the two or more images, examining a plurality of coefficient values. The method additionally includes calculating a first vector based on the plurality of coefficient values. The first vector can represent change from a first image to a second image of the at least two images describing deformation. The method also includes modifying the first vector to create a second vector. The method further includes calculating a second plurality of coefficients based on the second vector. |
| US09805474B1 |
Pedestrian tracking at a traffic intersection to identify vulnerable roadway users for traffic signal timing, pedestrian safety, and traffic intersection control
Pedestrian detection and counting for traffic intersection control analyzes characteristics of a field of view of a traffic detection zone to determine a location and size of a pedestrian area, and applies protocols for evaluating pixel content in the field of view to identify individual pedestrians. The location and size of a pedestrian area is determined based either on locations of vehicle and bicycle detection areas or on movement of various objects within the field of view. Automatic pedestrian speed calibration with a region of interest for pedestrian detection is accomplished using lane and other intersection markings in the field of view. Detection and counting further includes identifying a presence, volume, velocity and trajectory of pedestrians in the pedestrian area of the traffic detection zone. |
| US09805472B2 |
System and method for smoke detection during anatomical surgery
Various aspects of a system and method for smoke detection during an anatomical surgery are disclosed herein. In accordance with an embodiment of the disclosure, the method is implementable in a surgical scene analysis engine, which is communicatively coupled to an image-capturing device that captures one or more video frames. The method includes the estimation of a partially visible region in a current video frame, based on a temporal difference between the current video frame and a previous video frame from the one or more video frames. Thereafter, one or more candidate pixels are detected in the estimated partially visible region in the current video frame. Further, a smoke region is determined in the partially visible region, based on pruning of one or more candidate pixels. |
| US09805470B2 |
Systems and methods for identifying medical image acquisition parameters
Systems and methods are disclosed for identifying image acquisition parameters. One method includes receiving a patient data set including one or more reconstructions, one or more preliminary scans or patient information, and one or more acquisition parameters; computing one or more patient characteristics based on one or both of one or more preliminary scans and the patient information; computing one or more image characteristics associated with the one or more reconstructions; grouping the patient data set with one or more other patient data sets using the one or more patient characteristics; and identifying one or more image acquisition parameters suitable for the patient data set using the one or more image characteristics, the grouping of the patient data set with one or more other patient data sets, or a combination thereof. |
| US09805469B2 |
Marking and tracking an area of interest during endoscopy
An area of interest of a patient's organ may be identified based on the presence of a possible lesion during an endoscopic procedure. The location of the area of interest may then be tracked relative to the camera view being displayed to the endoscopist in real-time or near real-time during the endoscopic procedure. If the area of interest is visually marked on the display, the visual marking is moved with the area of interest as it moves within the camera view. If the area of interest moves outside the camera view, a directional indicator may be displayed to indicate the location of the area of interest relative to the camera view to assist the endoscopist in relocating the area of interest. |
| US09805468B2 |
Sample image management system and sample image management program
Provided is a sample image management system that uses a cell culture vessel including a plurality of microwells and a plurality of first identifiers provided to the respective microwells in pairs. The sample image management system analyzes, in an enlarged sample image including a pair of the first identifier and the microwell, the microwell and the first identifier, and associates at least position information on the microwell with the enlarged sample image. |
| US09805467B2 |
Lung measurements
The present invention relates to lung measurement. In order to provide enhanced information about a patient that facilitates further assessment steps, 2D X-ray image data of a patient's chest is provided, and the image data is segmented to identify lung structures to provide segmented image data separated from un-segmented areas. Further, spatial lung volume information is extracted from the image data using the segmented image data derived from the image data. Still further, lungs symmetry information is determined using the extracted spatial lung volume information. Finally, the lungs symmetry information is provided to a user. For example, a 2D X-ray image data of a patient's chest is provided (84) and a lungs mask image is formed (86) after the step of segmenting the input image data. Then, the lungs mask image is used to define areas, within which a predetermined adaptation is applied (88) to the original 2D X-ray image data producing a thorax mask image. Next, left and right images are provided (90) showing the left and the right spatial lungs volume information of the regions defined originally by the lungs mask image. Finally, based on the spatial lungs volume information, lungs symmetry information or total lung volumes may be calculated and provided (92). |
| US09805463B2 |
Systems and methods for predicting location, onset, and/or change of coronary lesions
Systems and methods are disclosed for predicting the location, onset, or change of coronary lesions from factors like vessel geometry, physiology, and hemodynamics. One method includes: acquiring, for each of a plurality of individuals, a geometric model, blood flow characteristics, and plaque information for part of the individual's vascular system; training a machine learning algorithm based on the geometric models and blood flow characteristics for each of the plurality of individuals, and features predictive of the presence of plaque within the geometric models and blood flow characteristics of the plurality of individuals; acquiring, for a patient, a geometric model and blood flow characteristics for part of the patient's vascular system; and executing the machine learning algorithm on the patient's geometric model and blood flow characteristics to determine, based on the predictive features, plaque information of the patient for at least one point in the patient's geometric model. |
| US09805462B2 |
Machine learning method and apparatus for inspecting reticles
Apparatus and methods for inspecting a specimen are disclosed. An inspection tool is used at one or more operating modes to obtain images of a plurality of training regions of a specimen, and the training regions are identified as defect-free. Three or more basis training images are derived from the images of the training regions. A classifier is formed based on the three or more basis training images. The inspection system is used at the one or more operating modes to obtain images of a plurality of test regions of a specimen. Three or more basis test images are derived from to the test regions. The classifier is applied to the three or more basis test images to find defects in the test regions. |
| US09805457B2 |
Defect detection device and production system
Provided is a defect detection device capable of measuring the volume of surface defects. The defect detection device includes: an imaging device configured to image an image of an inspection object; a binarization processing unit configured to subject the image to first and second binarization processing by use of different first and second binarization thresholds, so as to calculate first and second sizes for an identical defect in the image; a ratio calculation unit configured to calculate a first ratio of the second size to the first size; and a depth determination unit configured to determine a depth of the defect depending on the first ratio. |
| US09805455B2 |
Rotary encoder system
A rotary encoder system for registering the rotary angle position and/or angular speed of a rotary shaft which extends along an axis of rotation, including at least two optical marks at the rotary shaft, an optical sensor with a pixel matrix having pixel points, an imaging device for imaging each mark in a substantially axial direction on the pixel matrix as a mark image, and an evaluation device for reading and evaluating the pixel matrix in order to determine data in relation to the rotary angle position and/or angular speed. Further, the marks, the imaging device and pixel points are embodied in such a way that the mark images on the pixel matrix have at least the area of a pixel point, and the evaluation device is embodied to establish the location of the centroids of the mark images on the pixel matrix. |
| US09805450B2 |
Image processing device and display device having the same
An image processing device includes a first filter that filters the image signal to output a first image signal, a second filter that converts the image signal corresponding to a predetermined pixel to a second image signal based on image signals corresponding to a plurality of peripheral pixels adjacent to the predetermined pixel, a third filter that filters the second image signal from the second filter to output a third image signal, a fourth filter that filters the third image signal from the third filter to output a fourth image signal, and an image synthesizer that synthesizes the first image signal from the first filter and the fourth image signal from the fourth filter. |
| US09805447B2 |
Methods of and apparatus for processing computer graphics
When carrying out a second, higher level of anti-aliasing such as 8×MSAA, in a graphics processing pipeline 1 configured to “natively” support a first level of anti-aliasing, such as 4×MSAA, the rasterization stage 3, early Z (depth) and stencil test stage 4, late Z (depth) and stencil test stage 7, blending stage 9, and downsampling and writeback (multisample resolve) stage 11 of the graphics processing pipeline 1 process each graphics fragment or pixel that they receive for processing in plural processing passes, each such processing pass processing a sub-set of the sampling points that the fragment represents, but the fragment shader 6 is configured to process each graphics fragment in a processing pass that processes all the sampling points that the fragment represents in parallel, so as to ensure compliance with the desired higher level of multisampled anti-aliasing. |
| US09805446B2 |
Method of changing algorithm and electronic device therefor
A method of changing an algorithm used in an electronic device and an electronic device thereof are provided. The method includes determining an algorithm based on at least one of information about environments and information about a useful amount of resources, determining a variable of the determined algorithm based on the at least one of information about the environments and the information about the useful amount of resources, and executing the determined algorithm based on the determined variable of the algorithm. |
| US09805444B2 |
Magnetic random access memory (MRAM)-based frame buffering apparatus, display driving apparatus and display apparatus including the same
Magnetic random access memory (MRAM)-based frame buffering apparatus are provided that may reduce a size and power consumption thereof by using a pixel self-refresh (PSR) method. The MRAM-based frame buffering apparatus includes a frame buffer memory including magnetic random access memory (MRAM). The frame buffer memory stores at least one piece of frame data. The MRAM-based frame buffering apparatus further includes a magnetic field sensor configured to detect an external magnetic field; and a frame buffer controller configured to control the storing of the at least one piece of frame data according to the intensity of the detected external magnetic field. |
| US09805443B2 |
Image processing method, image processing apparatus, program, storage medium, production apparatus, and method of producing assembly
A tentative local score between a point in a feature image in a template image and a point, in a target object image, at a position corresponding to the point in the feature image is calculated, and a determination is performed as to whether the tentative local score is smaller than 0. In a case where the tentative local score is greater than or equal to 0, the tentative local score is employed as a local score. In a case where the tentative local score is smaller than 0, the tentative local score is multiplied by a coefficient and the result is employed as a degree of local similarity. |
| US09805440B2 |
Method and apparatus to improve performance of chained tasks on a graphics processing unit
In an embodiment, at least one computer readable storage medium has instructions stored thereon for causing a system to send, from a processor to a task execution device, a first call to execute a first subroutine of a set of chained subroutines. The first subroutine may have a first subroutine output argument that includes a first token to indicate that first output data from execution of the first subroutine is intermediate data of the set of chained subroutines. The instructions are also for causing the system, responsive to inclusion of the first token in the first subroutine output argument, to enable the processor to execute one or more operations while the task execution device executes the first subroutine. Other embodiments are described and claimed. |
| US09805439B2 |
Memory space mapping techniques for server based graphics processing
The server based graphics processing techniques, describer herein, include loading a given instance of a guest shim layer and loading a given instance of a guest display device interface that calls back into the given instance of the guest shim layer, in response to loading the given instance of the guest shim layer, wherein the guest shim layer and the guest display device interface are executing under control of a virtual machine guest operating system. The given instance of the shim layer requests a communication channel between the given instance of the guest shim layer and a host-guest communication manager (D3D HGCM) service module from a host-guest communication manager (HGCM). In response to the request for the communication channel loading, the D3D HGCM service module is loaded and a communication channel between the given instance of the shim layer and the D3D HGCM service module is created by the HGCM. The given instance of the shim layer maps the graphics buffer memory space of a host D3D DDI binary executing under control of a host operating system. Thereafter, function calls are sent from the given instance of the guest shim layer through the communication channel to the D3D HGCM service module utilizing the graphics buffer memory space mapping. |
| US09805429B2 |
System and methods for analyzing documents
Systems and methods are provided for analyzing documents. In one implementation, a computer implemented method is provided for analyzing a patent application and providing a visual representation. According to the method, a selection is received from a user to view claims of the patent application in a claim tree hierarchy and a computer displays the claims in the claim tree hierarchy on a display. The claim tree hierarchy visually depicts relationships between the claims. The method identifies one or more words of at least one of the claims that constitutes an element and displays, in the claim tree hierarchy, the words constituting the element in association with the claim. |
| US09805423B1 |
Accident fault determination for autonomous vehicles
Methods and systems for determining fault for an accident involving a vehicle having one or more autonomous and/or semi-autonomous operation features are provided. According to certain aspects, performance data indicative of the performance of the features may be used to determine fault for a vehicle accident, such as a collision, by allocating fault for the accident between a vehicle operator, the autonomous operation features, or a third party. The allocation of fault may be used to determine an adjustment to an insurance policy and/or adjust coverage levels for an insurance policy. The allocation of fault may further be used to adjust risk levels or profiles associated with the autonomous or semi-autonomous operation features, which may be applied to other vehicles having the same or similar features. |
| US09805414B2 |
Method and system for auction information management
Foreclosure auction information received from each of a plurality of sources of such information via respective Internet bots, manual updates, or other sources, is used to populate a database according to a predefined schema and ruleset. The database is updated in near real time (from any or all of the datasources), and actionable auction information that meets user-determined criteria for accuracy, timeliness and/or relevancy is extracted from the database and presented for use by a user. |
| US09805413B2 |
System and method of site outage management
Systems and methods of site outage management are disclosed. In some example embodiments, a service outage of an online service is detected. The service outage disables the online service from receiving a bid for an item listing on the online service. The item listing has a seller and a listing end time. Timing information for the service outage is determined, and the item listing is identified based on the listing end time and the timing information for the service outage. An outage management action is performed based on the item listing being identified. The outage management action comprises one of automatically extending the listing end time, automatically transmitting an outage notification of the service outage to the seller, and automatically issuing a credit to an account of the seller. |
| US09805412B1 |
Systems and methods for strategic customer order capture
Aspects of the present disclosure disclose systems and methods for providing order entry platform that automatically enables telecommunication service providers to process customer orders for telecommunication products and/or services in near real-time. More particularly, one or more interactive interfaces, dynamically driven by a products catalog, may be generated that enable telecommunication service providers to automatically process orders received from customers for such products. |
| US09805405B2 |
Mobile device payment system and method
A mobile device payment system and method, the method for a mobile device user to purchase goods/services from merchants with financing by a mobile device manufacturer including: providing a mobile device; establishing a user account; establishing merchant accounts; transforming the merchant accounts into a universal merchant account data set; providing the universal merchant account data set to the mobile device user; storing the universal merchant account data set; requesting the mobile device manufacturer to load consumer credit; loading the credit amount; identifying goods/services for purchase; determining a total price for the identified goods/services and a merchant identifier associated with the selected merchant; actuating a purchase button; retrieving merchant bank deposit instructions; retrieving purchase credit; and routing the retrieved credit to the selected merchant in accordance with the retrieved merchant credit deposit instructions. |
| US09805402B1 |
Adaptive control of an item inventory plan
Techniques for determining a decision to acquire units of an item to be inventoried may be provided. For example, a demand for an item may be simulated to determine a consumption of a capacity for inventorying the item. A discrepancy between the consumption of the capacity and the capacity may be determined. An opportunity cost associated with the capacity may be updated based at least in part on determining that the discrepancy fails a convergence criterion. The opportunity cost may indicate a value associated with using the capacity. The consumption of the capacity may be simulated based at least in part on the updated opportunity cost. A resulting discrepancy may be determined. If the resulting discrepancy meets the convergence criterion, the decision to acquire the units of the item may be generated based at least in part on the updated opportunity cost. |
| US09805401B2 |
Sku translation between point of sale systems in kiosk-based quick service restaurant environments
Disclosed embodiments provide the ability to create a single customer-operated kiosk quick service restaurant ordering system menu application which may be easily integrated with any number of different back office point of sale system implementations without compromising menu design and the customer user interface experience. |
| US09805398B1 |
System, method, and computer program for rating network transmissions based on user requested data
A system, method, and computer program product are provided for rating network transmissions based on user requested data. In use, a transmission of data over a network is identified, where the data includes user requested data and additional data. Additionally, a size of the user requested data is determined. Furthermore, the transmission of the user requested data is rated based on the size of the user requested data. The transmission of additional data may be charged to third parties such as advertisers. |
| US09805396B2 |
Using multiple media players to insert data items into a media stream of a streaming media
Playback of a tagged audio stream at mobile communications device, or other processing device, can be controlled transparently to a user of the device by implementing multiple instances of a media player. A Spot Caching Instance of the media player can receive and cache an untagged content stream from an advertisement server. A Content Playback Instance of the media player can be used to play back and process a tagged content stream from a radio station to identify tags. When the Content Playback Instance detects a tag, it transfers control to an Ad Spot Playback Instance of the media player, which can play back part or all of the untagged content stream from cache. When playback of the untagged content stream is completed, the Ad Spot Playback Instance transfers control back to the Content Playback Instance. |
| US09805395B2 |
Online marketing system and method
A computer readable storage medium includes computer executable instructions which, when executed by a processor, causes the processor to perform a method of online marketing. At least one deal is associated with at least one competition. A plurality of user requests is received to compete for the deal as participants in the competition. Deal payment terms are determined for the deal based on a competition result of the competition. |
| US09805394B2 |
System and methods for upcoming event notification and mobile purchasing
Various embodiments relate generally to providing upcoming event notification and mobile purchasing and, more specifically but not exclusively relate to a system and methods for providing notifications of upcoming events to users of an online secondary ticket marketplace and allowing the users to purchase tickets to upcoming events using a mobile device. In one embodiment, a network-based system may receive a registration request from a user to receive alert notifications for upcoming events. The registration request may comprise a telephone number for a mobile device of the user. The network-based system may send an alert notification for an upcoming event to the mobile device of the user over a mobile telephone network. The alert notification may comprise a text message including relevant static or dynamic event information as well as an embedded hyperlink for allowing the user to transact a mobile purchase. |
| US09805393B2 |
Multimedia communication system and method
Systems and methods are disclosed for creating, editing, sharing and distributing high-quality, media-rich web-based communications. The communications are created in a layered fashion that integrates user-selected text, colors, background patterns, images, sound, music, video, or other media. The systems and methods are used to generate, edit, broadcast, and track electronic presentations, brochures, advertisements (such as banner advertisements on highly trafficked media websites), announcements, and interactive web pages, without the need for the user to understand complex programming languages. |
| US09805388B2 |
Premium instant messaging space
Monetizing on-line communications includes: assigning a price to become a buddy of a publisher in an on-line chat board; advertising the price to prospective subscribers of the publisher; receiving a bid from a prospective subscriber; and transmitting the bid offer to the publisher such that the publisher can accept or decline the bid offer. |
| US09805382B2 |
System and method for processing opinion data
A system that incorporates teachings of the present disclosure may include, for example, a media processor having a controller to solicit an appraisal for each of a plurality of media programs presented by the media processor for composing a proposal to update one or more operational features of the media processor according to one or more consumer preferences determined from one or more supplied appraisals. Other embodiments are disclosed. |
| US09805378B1 |
Use of user consumption time to rank media suggestions
A system receives a user request for a media item and identifies candidate media items for suggesting to the user with the media item. The system predicts a user consumption time for each candidate media item and selects a sub-set of the candidate media items that have higher predicted user consumption times. The system provides the requested media item with the sub-set of the candidate media items. |
| US09805374B2 |
Content preview
Techniques enable creation of a preview license for digital content. In some instances, the preview license indicates that it allows a content-consuming device to consume less than all of the content. This preview license may create a list specifying multiple portions of the digital content that the content-consuming device may consume. These techniques may also present to a device user an offer to purchase rights to consume all of the digital content after consumption of the preview-licensed portion(s). In other instances, a content server may embed the preview license into a content package that contains the digital content, allowing the server to distribute the package to multiple devices. In still other instances, the preview license may be bound to a domain rather than to individual devices. This allows member devices to share the digital content and the preview license, such that each member device may enjoy the preview experience. |
| US09805369B2 |
Private payment and purchasing system
A system allows for conducting the financial and commercial (buying, selling, donating, gifting and paying) transactions that leverage communication devices to avoid the disclosure of a user's payment information. The payee (seller, seller's agent, receiver of funds, etc.) provides information or a token to the payer (buyer, buyer's agent, or any other provider of funds) who then directs funds to that token. In other words, rather than the payer providing information that is used by the payee to “pull” funds from the payer, the system allows a payee to provide information to which a payer “pushes” a payment. Since the payment is “pushed” by a customer, and often, but not always, using some type of a communication and/or computing device, the point-of-sale (POS) terminal has essentially been transferred from the merchant to the customer. |
| US09805365B2 |
Mobile device security using wearable security tokens
The claimed subject matter provides systems and/or methods that effectuates and establishes mobile device security. The system can include devices that detect point of sale mechanisms or secure token devices and based at least in part on the detection of secure token devices the system effectuates release of electronic funds persisted on a mobile device in order to satisfy a debt accrued at the point of sale mechanism. |
| US09805362B2 |
Mobile devices for activating instant disposable payment cards
An instant disposable payment card can have a quick response (QR) code. The QR code can be scanned by the user. Scanning the QR code can facilitate activation and/or funding of the instant disposable payment card and/or can facilitate a creation of an account or an activation of a pre-created account at a payment system provider. The user can then use the instant payment card to pay for purchases. A merchant can scan the QR code or swipe a magnetic strip of the instant disposable payment card to effect payment to the merchant for the purchase. An account of the instant disposable payment card can be funded after use thereof to make a purchase. |
| US09805358B2 |
Changing email text based on payment status
An email payment system and method to provide users with the ability to initiate and send payments to one more recipients via email messaging. A user interface is provided in an email client that allows a user to insert payment with the email. Payment details are collected through one or more payment modals displayed in the email client. A payment object is inserted into the body of the email and is displayed to both the sender and recipient. The payment details captured in the payment object are communicated to a payment processor. The payment processor uses electronic payment accounts associated with the corresponding sender and recipient email addresses to identify the relevant electronic payment accounts and transfer the payment between said accounts. A status of the payment transaction is tracked and displayed within the payment object of the emails residing in both the sender and recipient email client. |
| US09805356B2 |
Point of sale display of greeting cards or scrapbooks with adjacent display of affixable media having scannable website addresses
A system for personalizing printed cards or scrapbooks with web-based links comprises a point of sale display of greeting cards or scrapbooks and a plurality of affixable media. Each of the affixable media comprise a scannable code and a description of the online content that will be displayed when the code is scanned by a recipient. A purchaser is able to create a personalized card or scrapbook by selecting a card or scrapbook from the point of sale display, selecting a scannable code based on its associated description, and then affixing the selected scannable code to the selected card or scrapbook, thereby creating a personalized card or scrapbook that directs the recipient to online content chosen by the purchaser from the set of options provided by the various affixable media. |
| US09805352B2 |
Transaction data capture system for a point of sale system
A method of operation of a transaction collection system includes: initializing a sniff daemon on the POS terminal; determining a sales transaction on the POS terminal; recording a transaction document of the sales transaction on a memory of the POS terminal; collecting the transaction document from the memory with the sniff daemon; and providing the transaction document for interpretation on an external system. |
| US09805350B2 |
System and method for providing access of digital contents to offline DRM users
The invention relates to a system and method providing access of one or more heterogeneous digital contents to at least one offline Digital Rights Management (DRM) user by a DRM server. This invention involves establishing the trust relationship among the DRM server, DRM client, user's machine and the end user by means of digital certificate. The server generates protected digital content by means of using a standard encryption algorithm. The invention further involves determining whether a license for accessing the protected file is requested by the legitimate user, and if so, generating a license consisting the user rights and the protected decryption key to be downloaded by legitimate user. The DRM client decrypts the protected file using a decryption key of the license, and renders the content to the end user by calling the appropriate and customized viewer during consumption. |
| US09805349B1 |
Method and system for delivering application packages based on user demands
A method and a system are provided for delivering on-demand software packages. In one aspect, the method may include subscribing services of a service provider operating a server, the server including an operating system and several application packages installed therein, initiating a client terminal by performing a network booting process using the operating system installed in the server, and executing in the client terminal a subscribed application package installed in the server using resources of the operating system resident in the client terminal. The method may further include charging the user a fee according to the application packages and the operating system subscribed by the user. |
| US09805347B2 |
Serial number and payment data based payment card processing
A server is operable to receive a media device identifying number (ID) and establish an association between a media device and a payment account and, in one embodiment, supports at least one of payment authorization and payment clearing based at least in part on the media device ID and the payment account. A network and system includes a payment card processor server that is operable to receive a payment authorization request and to determine if an authorized media device generated a purchase selection message and to determine to approve a received payment authorization request based, in part, if the media device was authorized for the purchase selection based upon a received media device ID. |
| US09805339B2 |
Method for monitoring and improving health and productivity of employees using a computer mouse system
Provided are embodiments of systems, computer medium and computer-implemented methods for sensing health characteristics of a user using a computer mouse having a location sensor configured to sense movement of the computer mouse relative to a work surface on which the computer mouse is located, a temperature sensor, a blood condition sensor and a blood pressure sensor. A method including transmitting, to a computer workstation, location data corresponding to sensed movement of the computer mouse for use in determining movement of the mouse, receiving temperature data from the temperature sensor, blood condition data from the blood condition sensor and blood pressure data from the blood pressure sensor, and transmitting, to the computer workstation, health data corresponding to the temperature data, the blood condition data, and the blood pressure data for use in determining the body temperature, the blood saturation level, and the blood pressure of the user. |