| Document | Document Title |
|---|---|
| US09743036B2 |
Electronic display adaptive refresh rate systems and methods
Systems and methods for controlling operation of an electronic display are provided. One embodiment describes an electronic display, which includes a display driver that writes image frames to pixels of the electronic display with a first refresh rate or a second refresh rate; and a timing controller that receives a plurality of image frames from an image source, in which the plurality of image frames are displayed on the electronic display to play video content; detects a cadence with which the plurality of image frames are received from the image source; and, based at least in part on the cadence of the plurality of image frames, instructs the display driver to write each of the plurality of image frames either as a single image frame at the first refresh rate or an image frame at the first refresh rate followed by a repeat of the image frame at the second refresh rate. |
| US09743033B2 |
Method for displaying image combined with playing audio in an electronic device
A method for generating an image combined with audio, and image display and audio output includes displaying an image, when a first image object within the image is selected, outputting a first audio object corresponding to the first image object and, when a second image object within the image is selected, outputting a second audio object corresponding to the second image object. |
| US09743032B2 |
Method and system for configuring a remote control device
Methods and systems are presented for configuring a remote control device to operate multiple devices. Functionality is provided to detect whether the remote control device has been configured to control one of the devices. If the remote control has not yet been configured to operate another device, the user is invited to configure the remote control accordingly. Detection may be based on additional codes transmitted with the remote control device that indicate the configuration status of the remote control. Detection may be additionally or alternately based on user behavior that is identified as consistent with operation of an un-configured remote control. |
| US09743026B2 |
Semiconductor photodetector
A semiconductor photodetector has at least one unit pixel having a photoelectric conversion part, a charge storage part, and a detection circuit. The photoelectric conversion part includes a charge multiplication region in which incident light is converted into a charge, and the charge is multiplied by avalanche multiplication. The charge storage part is connected to the photoelectric conversion part and stores a signal charge from the photoelectric conversion part. The detection circuit is connected to the charge storage part, converts the signal charge stored in the charge storage part into a voltage, passes the voltage through an amplifier to amplify the voltage, and outputs the amplified voltage. |
| US09743025B2 |
Method and system of implementing an uneven timing gap between each image capture in an image sensor
Stacked chip imaging system comprising pixel array partitioned into pixel sub-arrays (PSAs) disposed in first semiconductor die and ADC circuitry including ADC circuits disposed in second semiconductor die. Each PSA is arranged into pixel groups. Each pixel group generates pixel data signals. Pixel array captures image data of first frame with first exposure time, second frame with second exposure time, third frame with third exposure time, and fourth frame with fourth exposure time. First, second, third and fourth exposure times are different. At least one of the pixel groups in each of the pixel sub-arrays is coupled to a different ADC circuit from pixels groups remaining in each of the pixel sub-arrays. ADC circuitry acquires the pixel data signals. For each frame, ADC circuits converts pixel data signal received from pixel groups respectively coupled thereto from analog to digital to generate ADC outputs. Other embodiments are also described. |
| US09743022B2 |
Image sensors and related methods and electronic devices
An image sensor is provided including a pixel array, a correlated double sampling (CDS) unit, an analog-digital converting (ADC) unit, a control unit, and an overflow power voltage control unit. The pixel array includes at least one unit pixel that generates accumulated charges corresponding to incident light in a photoelectric conversion period and outputs an analog signal based on the accumulated charges in a readout period. The CDS unit generates an image signal by performing a CDS operation on the analog signal. An ADC unit converts the image signal into a digital signal. A control unit controls the pixel array, the CDS unit, and the ADC unit. An overflow power voltage control unit controls an overflow power voltage to have a low voltage level in the photoelectric conversion period and controls the overflow power voltage to have a high voltage level in the readout period. |
| US09743020B2 |
Super resolution optofluidic microscopes for 2D and 3D imaging
A super resolution optofluidic microscope device comprises a body defining a fluid channel having a longitudinal axis and includes a surface layer proximal the fluid channel. The surface layer has a two-dimensional light detector array configured to receive light passing through the fluid channel and sample a sequence of subpixel shifted projection frames as an object moves through the fluid channel. The super resolution optofluidic microscope device further comprises a processor in electronic communication with the two-dimensional light detector array. The processor is configured to generate a high resolution image of the object using a super resolution algorithm, and based on the sequence of subpixel shifted projection frames and a motion vector of the object. |
| US09743019B2 |
Multiplane panoramas of long scenes
Methods, systems, and articles of manufacture for generating a panoramic image of a long scene, are disclosed. These include, fitting a plurality of planes to 3D points associated with input images of portions of the long scene, where one or more respective planes are fitted to each of a ground surface, a dominant surface, and at least one of one or more foreground objects and one or more background objects in the long scene, and where distances from the 3D points to the fitted planes are substantially minimized. These also include, selecting, for respective one or more pixels in the panoramic image of the long scene, one of the input images and one of the fitted planes such that a distance is substantially minimized from the selected one of the fitted planes to a surface corresponding to the respective one or more pixels and occlusion of the respective one or more pixels is reduced in the selected one of the input images; and stitching the panoramic image of the long scene by projecting, for the respective one or more pixels in the panoramic image of the long scene, the selected one of the input images using the selected one of the fitted planes into the virtual camera. |
| US09743017B2 |
Integrated mobile desktop
Embodiments of the invention are generally directed to an integrated mobile desktop. An embodiment of an apparatus includes a display chip to receive graphical data and produce video display signals; and a logic chip to receive data from a mobile device and the video display signals from the display chip to generate a display including at least a portion for a representation of a display of the mobile device. The logic chip provides for integration of operations for the apparatus and the mobile device using the generated display. |
| US09743016B2 |
Techniques for improved focusing of camera arrays
Techniques for improved focusing of camera arrays are described. In one embodiment, for example, an apparatus may comprise a processor circuit and an imaging management module, and the imaging management module may be operable by the processor circuit to determine, for each of a plurality of candidate displacement factors for an image array comprising a plurality of images, a corresponding sharpness, determine an optimal displacement factor comprising a candidate displacement factor corresponding to a maximized sharpness, and transform the image array based on the optimal displacement factor. Other embodiments are described and claimed. |
| US09743015B2 |
Image capturing apparatus and method of controlling the same
An image capturing apparatus is provided, including: a first camera module and a second camera module configured to capture an image of a same subject; and a controller configured to map a second image obtained from the second camera module to a first image obtained from the first camera module, and to synthesize a third image of the subject using the first image and the mapped second image, wherein an image sensor included in the first camera module has a first pixel structure in which a pixel has a square shape, and an image sensor included in the second camera module has a second pixel structure that is different from the first pixel structure. |
| US09743011B2 |
Photographing apparatus and method
There are provided a photographing apparatus and a photographing method capable of generating an added image by adding up images, the apparatus and the method achieving image quality of the added image. A photographing apparatus includes: a photographing section that photographs a subject a plurality of times sequentially; an image processing section that adds up images so as to generate an added image; and an exposure condition calculation section that calculates the minimum number of shots of the photography, which is for calculating a plurality of predetermined exposure time periods, and unit exposure time periods of the shots of the photography performed the minimum number of times, on the basis of set and input exposure conditions. The image processing section generates an added image of the plurality of exposure time periods by adding up images which are captured through the shots of the photography for the unit exposure time periods. |
| US09743007B2 |
Lens module array, image sensing device and fusing method for digital zoomed images
A lens module array for being assembled to a portable device is provided. The lens module array includes a wide-angle mono lens module, a narrow-angle mono lens module, and two color lens modules. While the wide-angle mono lens module, the narrow-angle mono lens module, and the two color lens modules are assembled onto the portable device, the wide-angle mono lens module, the narrow-angle mono lens module, and the two color lens modules are located at four vertices of a quadrangle, respectively. Besides, the two color lens modules are located at two opposite vertices. |
| US09743002B2 |
Vehicle vision system with enhanced display functions
A vision system for a vehicle includes at least one image sensor, a control and a display. The image sensor is disposed at a subject vehicle and has a field of view exterior of the vehicle. The control, at least in part responsive to image processing of image data captured by the image sensor, is operable to generate an avatar representative of at least one object or scene segment in the field of view of the image sensor. The display is operable to display the avatar. The vision system may display an avatar that is a substantial representation of an object that is only partially viewed by the image sensor to enhance the display for viewing and understanding by the driver of the subject vehicle, and a portion of the avatar representing the non-viewed portion of the object may be displayed as a phantom image. |
| US09742998B2 |
Imaging apparatus
An imaging apparatus of the disclosure includes a case, an imaging system that captures an object image and generates image data, a displaying unit that displays the image data, a detection sensor that detects the case having been held by a user, a power supply unit that supplies power to the imaging system, the displaying unit, and the detection sensor, and a power supply operation unit that selects turning on or off of supplying power. When the detection sensor detects the case having been held by the user, the power supply unit supplies power to the imaging system, but not to the displaying unit, which is referred to as a tentative startup state. In this state, when the power supply operation unit is turned on, the power supply unit supplies power to the displaying unit. |
| US09742996B1 |
Single unit 360-degree camera with an integrated lighting array
Methods of creating a 360 degree camera as a single unit with an integrated lighting array are provided. The lighting array is invisible to the camera when acquiring a spherical image. The creating includes selecting a housing for the 360 degree camera, the housing (i) configured to carry the integrated lighting array and (ii) having a plurality of surfaces that includes at least a first outer surface and a second outer surface; and, positioning a plurality of lenses on the housing to collect a plurality of imaging spaces that are stitched together to form the spherical image. In order to keep the lighting array at least substantially invisible to the lenses of the camera, the methods can include defining a plurality of blind spaces, n, each of which includes a blind area on the housing. |
| US09742995B2 |
Receiver-controlled panoramic view video share
Systems and methods for constructing a live panoramic view from real-time streaming digital image data may include, by a computing device in real-time and for each identified digital image of a plurality of received digital images, a location of the received digital image may be determined within a panoramic view. The panoramic view may be updated with the received digital image based on the determined location, and the updated panoramic view may be displayed. The plurality of digital images may include standard video frames and/or optimized video frames received with the real-time streaming digital image data. The optimized video frames may be captured with one or more associated imaging parameters optimized for use in the panoramic view. |
| US09742978B2 |
Information processing device, imaging device, imaging system, control method for information processing device, control method for imaging device, and program
An appropriate user interface corresponding to use forms of the devices is provided.An imaging system includes an imaging device and an information processing device. The imaging device is connected to an information processing device by utilizing wireless communication so that imaging operation is controlled on a basis of an operational input performed in the information processing device. The information processing device performs control for switching a role of an operation member included in the information processing device on a basis of relative positional relationship with the imaging device. |
| US09742977B2 |
Camera remote control
Certain embodiments of the present invention provide the ability to control a camera from a wearable mechanism device, such as a watch, pendant or other device with its own limited display. Certain embodiments of the present invention provide a wearable mechanism device for remotely controlling a camera with an intuitive user interface and sequencing of interface options. In one embodiment, the display on the wearable mechanism changes before a picture or video is taken with the electronic camera. Certain embodiments of the present invention provide the ability to partially control a camera from the wearable mechanism device, providing split control. |
| US09742974B2 |
Local positioning and motion estimation based camera viewing system and methods
A method and a system for controlling camera orientation in training and exhibition systems. The method and system use a control algorithm to drive the orientation of a camera system at a determined reference velocity in order to place the aim-point of the camera system following a target aim-point in a local coordinate system. In some embodiments, the position and velocity of the target aim-point in the local coordinate system are determined based on dynamically filtered position and motion of a target object, where the position and motion of the target object are measured from a local positioning system. |
| US09742973B2 |
Array camera design with dedicated Bayer camera
The invention is directed to systems, methods and computer program products for capturing an image using an array camera. A method comprises determining an application associated with capturing an image using an array camera, wherein the array camera comprises a first sensor and at least one second sensor, wherein the first sensor comprises a red filter, a green filter, and a blue filter, and wherein each second sensor comprises a red filter, a green filter, or a blue filter; determining whether the application requires the image to have a first resolution equal to or greater than a predetermined resolution; determining whether the application requires depth information associated with the image; and in response to determining the application does not require the image to have the first resolution and does not require depth information, activating the first sensor, and capturing the image using the first sensor. |
| US09742971B2 |
Dual camera system zoom notification
In embodiments of dual camera system zoom notification, a dual camera system includes a first imager and a second imager that are designed to support synthetic optical zoom of a scene. A camera controller is implemented to determine that the synthetic optical zoom is not supported to capture an image of the scene with the dual camera system. The camera controller can then initiate a message for a user of the dual camera system to indicate that the synthetic optical zoom is not supported to capture the image of the scene. The message can be displayed to indicate that the synthetic optical zoom is not supported and/or to indicate that digital zoom is activated. A user can also be provided with selectable options that enable the user to decide the zoom operation when the dual camera system is not operational for synthetic optical zoom. |
| US09742969B2 |
Attachment optical system and image pickup system including the same
An attachment optical system detachably mounted between a lens system and an image pickup apparatus, includes: a receiver receiving first information for correcting lateral chromatic aberrations caused by the lens system; a computer deriving, based on the first information and optical characteristics of the attachment optical system, second information for correcting lateral chromatic aberrations; and a transmitter transmitting the second information to the image pickup apparatus, in which the first and second information include information for obtaining lateral chromatic aberration amounts under conditions of zoom, focus and f-number, based on ratio of image height to maximum image height, in which the first and second information indicate shift amounts of blue/red relative to green radially about optical axis, and in which the shift amounts of blue/red in the first information and in the second information are properly set as functions of ratio of image height to maximum image height. |
| US09742968B2 |
Image acquisition system and method for the manufacture thereof
An image acquisition system, in particular for automotive applications, includes: a substrate; an image sensor mounted on the substrate and contacted via contact points; an optically transparent sealing compound that covers the image sensor, the contact points, and a portion of the upper substrate side; an optical device being arranged or secured in or on the sealing compound. The optical device can be placed into the sealing compound after shaping of the sealing compound or directly. Furthermore, the optical device can also be arranged directly by shaping the sealing compound. Manufacture of the image acquisition system can be incorporated into a board populating process. |
| US09742965B2 |
Apparatus, systems and methods for user controlled synchronization of presented video and audio streams
Systems and methods are operable to correct synchronization between a video stream and an audio stream presented to a user. An exemplary embodiment receives a synchronization correction instruction, wherein the synchronization correction is configured to be initiated by the user; and incrementally adjusts one of the video stream and the audio stream by a synchronization correction, wherein the synchronization correction advances or retards presentation of at least one of the video stream and the audio stream by a predefined duration. |
| US09742964B2 |
Audio/visual device and control method thereof
An AV device including a first signal transmitter configured to output a video signal and a first audio signal corresponding to the video signal to a display device; a first signal receiver configured to receive a feedback signal of the first audio signal from the display device; a second signal transmitter configured to output a second audio signal corresponding to the video signal; and a controller configured to determine a processing delay time of the display device by comparing the first audio signal and the feedback signal, and control the second signal transmitter to delay the output of the second audio signal based on the determined processing delay time. |
| US09742960B2 |
Color correction system and method
A system and method for calibrating a digital imaging device for color correction is disclosed. The method comprises obtaining an input color value and a reference color value for each of a plurality of color references, as well as a noise evaluation image having a color noise for evaluating noise reduction, the input color values and reference color values being in a non-linear color space. A plurality of color correction parameters are determined as optimized based on evaluating a fitness function in the non-linear color space. The non-linear color space can be a CIE L*a*b* color space. The fitness function can include a color correction error and a noise amplification metric so as to reduce noise amplification during color correction. |
| US09742958B2 |
Image processing system and method for transferring a parameter by different transfer modes
An image forming apparatus includes an image processing unit configured to execute image processing that is requested, by using a parameter stored in a second storage unit included in the image processing unit; a control unit configured to store the parameter to be used by the image processing unit in a first storage unit, and generate identification information indicating a storage position of the parameter and store the identification in the first storage unit; and a transfer unit configured to acquire the parameter from the first storage unit based on the identification information stored in the first storage unit, and transfer the parameter to the second storage unit. The control unit stores the parameter in the second storage unit without storing the parameter in the first storage unit, according to the acquired parameter. |
| US09742954B2 |
Data processing apparatus, data processing method, and non-transitory computer readable medium
A data processing apparatus includes a preprocessing section that causes an input data column to serve as a first determination data column and obtains a second determination data column by delaying the input data column and obtains a processing data column by delaying the input data column by an amount larger than an amount by which the input data column is delayed in order to obtain the second determination data column and a controller that controls, by using the first determination data column and the second determination data column as indices, an operation performed by a FIFO memory for outputting the processing data column, which has been input to the FIFO memory. |
| US09742951B2 |
Lens unit, image reading device, and image forming apparatus
A lens unit includes a tube lens; a single lens arranged at a downstream side with respect to the tube lens in an optical incidence direction; and a supporting member that supports the tube lens and the single lens. Reflection light from a document is condensed on an image sensor by the tube lens and the single lens to form an image. An end surface part, not facing the tube lens, of the single lens is in direct contact with the supporting member. |
| US09742949B2 |
Image forming system that reduces time and labor for inputting license-related data to validate optional function of image forming apparatus, and activation method
The information processing device includes: a display part; an operational input part; an MFP selection part for presenting to an administrator a list of MFP candidates for activation of an optional function and then accepting a selection of the MFP via the operational input part; an optional function selection part for presenting to the administrator a list of optional function candidates to be activated on the selected MFP and then accepting a selection of the optional function via the operational input part; a license key acquisition part for acquiring a license key for activation of the selected optional function; and an optional function activation part for issuing to the selected MFP an instruction for activating the selected optional function on the selected MFP. |
| US09742946B2 |
System and method for shifting electric power modes in an image forming system
An image forming system includes a main body including a first control part controlling a power mode of the main body and an engine executing image processing, and an operation apparatus receiving an operation for instructing the engine to execute the image processing. The operation apparatus including a second control part controlling a power mode of the operation apparatus. When the operation apparatus receives an instruction to shift the power mode of the main body or the operation apparatus, the first control part determines whether shifting is possible based on a first program executed by the main body and controls a power supply of the main body according to the determination, and the second control part determines whether shifting is possible based on a second program executed by the operation apparatus and controls a power supply of the operation apparatus according to the determination. |
| US09742944B2 |
Image forming apparatus using recording sheet folded in half
An image forming apparatus includes a double-sided image forming portion capable of forming an image on each of first and second recording surfaces of a recording sheet, a double-sided image reading portion configured to acquire a pair of divided images each constituting a half of an original image, and an image forming control portion configured to supply a folded recording sheet folded in half to the double-sided image forming portion, and cause the double-sided image forming portion to perform processing of forming the pair of divided images on the first and second recording surfaces, respectively, of the folded recording sheet. |
| US09742941B2 |
Information processing apparatus, method for controlling information processing apparatus, and recoding medium regarding returning from a power saving state
An information processing apparatus includes a light emitting unit and a light receiving unit for receiving light output from the light emitting unit, and includes a detection unit for outputting a light reception signal indicating that the light receiving unit has received light from the light emitting unit, a driving signal output unit for outputting a driving signal to the detection unit so that the light emitting unit intermittently outputs light, a detection signal output unit for outputting, based on the output driving signal and the output light reception signal, a detection signal indicating whether an object exists between the light emitting unit and the light receiving unit, and a control unit including an interrupt port to which the output detection signal is input and for returning from a power saving state in response to the detection signal being input to the interrupt port in the power saving state. |
| US09742940B2 |
Image reading apparatus and image forming apparatus
An image reading apparatus includes an image scanning unit that is provided with a holding portion holding a flexible flat cable. The holding portion is protruded toward an upstream side in a sub scanning direction, and provided with a second wall part. The flexible flat cable that is extended from a connector is brought into contact with the second wall part. As for the flexible flat cable, a downward movement is regulated by a lower holding portion and an upward movement is regulated by an upper holding portion. Accordingly, the flexible flat cable does not rise. |
| US09742934B2 |
Internet fax message searching and fax content delivery using keyword detection
A system for providing an internet fax service has an engine to process a raw fax document, received for a user of the internet fax service, using digital character recognition to produce recognized text or an associated formatted text document. A conversion engine may convert the raw fax to native file format being one of a) word processor format, b) spreadsheet format, c) slide presentation format, or d) another format that can be read on a user interface. An internet server is to make the native file format document available to the user over an internet. A fax content processing unit is to perform keyword scanning of the recognized text, and then allows the user to search for stored faxes by keyword. Other embodiments are also described. |
| US09742933B2 |
Image processing apparatus having user login function, control method therefor, and storage medium
An image processing apparatus which is capable of improving ease of operation for users and also improving security when destinations are made public. The image processing apparatus is shared by a plurality of users and capable of selecting a destination from a plurality of address books and carrying out file transmission to the destination. It is determined whether or not a user has logged in, and when it is determined that the user has logged in, only personal addresses for the logged-in user are displayed on a display unit. The personal destinations displayed on the display unit are switched to destinations other than the personal destinations according to selection by the user. When it is determined that the user has not logged in, all destinations which are registered in the plurality of address books are displayed on the display unit. |
| US09742930B2 |
Image reading apparatus configured to read document
An image reading apparatus includes a gray reference member, a reading unit, an adjusting unit, a calibration unit, a storage unit, and a control unit. The control unit is configured to execute a first preprocessing and a second preprocessing. The first preprocessing includes: acquiring first black data from one line worth of image data; acquiring white data; calculating white-black difference data; acquiring first light gray data; and calculating first light gray-black difference data. The second processing includes: acquiring second black data from the one line worth of the image data; acquiring second light gray data; calculating second light gray-black difference data; calculating a change ratio by dividing the second light gray-black difference data by the first light gray-black difference data; and calculating calibration data by multiplying the white-black difference data by the change ratio. Shading of the image data is calibrated in response to the calibration data. |
| US09742929B2 |
Identifying problematic printers by applying Markov chain model
Systems and methods for identifying problematic printers are provided. An example method can involve determining a time interval for a printing device. The method may also involve determining a number of pages printed by the printing device during the time interval. The method may also involve determining a number of printing-device errors that occur on the printing device during the time interval. Still further, the method may involve determining one or more coefficients of a Markov chain based on the number of pages printed by the printing device during the time interval and the number of printing-device errors that occur on the printing device during the time interval. The method yet further includes, based on the determined coefficients of the Markov chain, determining an operational status of the printing device. |
| US09742928B2 |
Charging information for WLAN network selection in 3GPP-WLAN data offloading
A user equipment (UE) may receive charging data and use the charging data in determinations of whether to offload data from a mobile communication network, such as a 3GPP cellular network, to another wireless access network, such as a wireless local area network (WLAN). For example, the UE may receive, from the mobile communication network, charging data regarding one or more WLANs in the vicinity of the UE. The UE may also receive rules regarding whether to offload communication traffic from the cellular communication network to a particular WLAN based on charging data relating to the particular WLAN. The UE may detect one of the WLANs and determine whether to offload communication traffic to the WLAN based at least in part on the received rules and the received charging data regarding the WLAN. The determination may be further based on user preferences saved on the UE regarding the charging data. |
| US09742924B2 |
Methods for handing over a circuit switched call to an internet protocol call and related electronic devices and computer program products
A method includes establishing a circuit switched call with an automated answering system at a destination, the destination having a communication server associated therewith, transmitting a request to switch to Internet Protocol (IP) communication to the automated answering system, receiving an IP request acknowledgement message from the communication server responsive to transmitting the request to switch to IP communication, and establishing an IP communication session with the communication server responsive to receiving the IP request acknowledgement. Systems and computer program products are also disclosed. |
| US09742916B1 |
Customer service agent to customer connection
Technology for connecting a customer with a customer service agent is provided. In one example, a method may include receiving an initial request from a customer to connect with customer service. A connection may be created between the customer and a customer service agent for the customer service. Customer information for the customer may be linked with agent information for the customer service agent for a predetermined period of time. When a subsequent request to connect the customer with the customer service is received within the predetermined period of time, the customer may be connected with the customer service agent using the linking of the customer information with the agent information. |
| US09742911B2 |
Dialing method and device
A dialing method for a calling party includes determining a plurality of phone number groups to be dialed in a simultaneous or sequential ringing mode, each of the groups including at least one phone number; and transmitting the plurality of phone number groups and a dialing flag to a calling server. The dialing flag including a simultaneous or sequential ringing flag indicating that the plurality of phone number groups are to be dialed in the simultaneous or sequential ringing mode. The calling party can freely custom multiple phone numbers expected to be rung simultaneously or sequentially and transmit them to a calling server, without registering in the calling server in advance. Thus, the trouble of the user registering the numbers in the calling server may be avoided and the calling server does not need to maintain a large-scale database for storing the multiple numbers at a large cost. |
| US09742908B2 |
Computer-implemented system and method for identifying call recordings for retention
A computer-implemented system and method for identifying call recordings for retention is provided. A call is received into a call center and assigned to one of an agent and an interactive voice response device. A recording of the assigned call is generated. A set of call retention criteria is maintained and each of the retention criteria is associated with one or more time periods during which the criteria can be applied to the call recording. A portion of the criteria in the set is identified based on a time at which the criteria is to be applied to the call recording. The identified criteria is applied to the call recording and the call recording is stored when the applied criteria are satisfied. |
| US09742904B2 |
Mobile terminal and method for controlling the same
A mobile terminal including a terminal body; a wireless communication unit configured to perform wireless communication; a touchscreen display unit configured to switch between an inactivated state in which illumination is not applied to the touchscreen display unit and an activated state in which illumination is applied to the touch screen display unit; and a controller configured to receive a touch input on the touchscreen display unit when the touchscreen display unit is in the inactivated state, and execute a function corresponding to the received touch input and activate the touchscreen display unit. |
| US09742903B1 |
Detecting notable events and annotating multimedia data based on the notable events
A user device, such as a smart phone, may capture sensor data or interface with a wearable device, such as a smart watch, or another user device to capture sensor data related to the capture of multimedia content. The sensor data may relate to a user, other people, and/or an associated environment. The sensor data may be processed to detect notable events based on a sensor value having a value or being within a range of values associated with the notable event. When a notable event is detected, the multimedia content may be annotated or modified based on the notable event. For example, the multimedia content may be modified to identify the notable event and/or present sensor data captured in connection with the notable event. A user interface may be presented to enable a user to identify instances of notable events and exchange sensor data. |
| US09742901B2 |
Method, apparatus and terminal device for obtaining call log
Examples of the present disclosure provide a method, apparatus and terminal device for obtaining a call log of a terminal device. The method includes: when requesting for call log data of a terminal device, determining whether the terminal device is already in jailbreak; when the terminal device is not in jailbreak, from a call log database corresponding to an application program with a call function, obtaining call log data corresponding to the application program, and displaying the call log data through a User Interface (UI); and when the terminal device is in jailbreak, obtaining a full amount of call log data of the terminal device by a service program running background or a hook system interface, and displaying the full amount of call log data through a UI. According to the present disclosure, obtaining the call log data compatible with both the non jailbreak terminal device and the jailbreak terminal device is achieved. |
| US09742893B2 |
Mobile terminal with terminal case and operating method thereof
A mobile terminal and an operating method thereof are provided. The mobile terminal includes a terminal body; and a terminal case coupled to the terminal body to cover at least a front surface of the terminal body, the terminal body comprising: a display unit disposed at the front surface thereof, to display an image; a sensing unit sensing whether the front surface of the display unit is covered by the terminal case; and a controller controlling an operation of the display unit, and the terminal case comprising: a terminal coupling part to which the terminal body is coupled; a front cover part rotatably coupled to the terminal coupling part to cover the front surface of the terminal body and including a window for allowing a light emitted from the display unit to be transmitted; and a pattern part provided at a portion of the front cover part corresponding to a region other than the window, wherein the display unit is defined by an exposed region corresponding to the window and a hidden region corresponding to the region other than the window, wherein when a signal to turn on the display unit is input in a state where the front cover part covers the front surface of the display unit, the controller is configured to display a user interface at least in the hidden region, to enable a user input through a manipulation of the pattern part. |
| US09742889B1 |
Lighted phone charger and cup holder device
The present invention is a vertically oriented device that is intended to be installed in gambling casinos or other areas where there is limited space. The device serves several functions. It is a holder for a portable telephone while the phone is being charged and when in use. The device is provided with electrical power via various types of charger cords and ports to charge a variety of phones or other electrical devices. It is a drinking cup holder that is lighted so that a drinking cup in the holder is clearly visible. It also has a directional task light located under the drinking cup holder that provides light in an area under the cup holder and adjacent the device's supporting base to accommodate a cigarette ash tray or other item that needs to be lighted so as to be seen by the user. |
| US09742886B2 |
Shroud assembly for communication site
Generally described, aspects of the disclosed subject matter are directed to a shroud assembly for a communication site. In accordance with one embodiment of the present disclosure, a shroud assembly for a communication site is provided. The shroud assembly generally includes a wall portion, and a door portion movably coupled to the wall portion, wherein the door portion is configured for selective positioning in at least first and second positions relative to the wall portion, and wherein the wall portion and the door portion define a cover assembly having an inner chamber. |
| US09742884B2 |
Retry mechanism for data loading from on-premise datasource to cloud
A method and system of retrying to load data from a data source to a cloud target system are disclosed. A server receives a first data packet from a device via a communication network. The first data packet comprises first data. The server stores the first data in one or more databases. The server receives a second data packet from the device. The second data packet comprises second data and is marked with a retry flag. The server determines that the second data packet has been marked with the retry flag, and performs an upsert operation with the second data in the second data packet based on the determining that the second data packet has been marked with the retry flag. |
| US09742882B2 |
System and method for multiple data channel transfer using a single data stream
A number of channels of data, including audio, image, text, and support data are collected at one or more centralized servers. The individual channels are edited and processed for content and format, including the deletion and insertion of advertising content as well as inserting markers to indicate acceptable locations for additional content to be added. The edited and processed channels are sent to a plurality of transmission servers for additional processing and transmission. The transmission servers process one or more of the channels including the insertion of content at designated markers and the combination of the channels of data into a single, packetized data transfer stream. The data transfer stream is broadcast to a plurality of receiving units which de-packetize the original data channels and present any selected channel to the user of the receiving unit. The receiving units send status information back to the centralized servers where the data is processed and analyzed to evaluate the present use, and determine the future use of advertisements. |
| US09742881B2 |
Network virtualization using just-in-time distributed capability for classification encoding
A method for providing a “just-in-time” distributed capability for classification encoding is described. When a source transport node processes a new flow (a flow for the first time), the source transport node in some embodiments sends a metadata packet “just-in-time” to the destination transport node to propagate the classification encoding to use for the given flow. |
| US09742878B2 |
Clustering support across geographical boundaries
An approach is presented that provides computer clustering support across geographical boundaries. Inter-node communications are managed in a cluster by having each node operate at the network device driver (NDD) level within the kernel. Multiple types of NDD are utilized (Ethernet, SAN, DISK etc.) to provide redundancy so that nodes can reliably exchange heartbeat. To align with this architecture, for remote nodes, a pseudo NDD is used over Transmission Control Protocol (TCP) based communication interface to work along side other NDDs. Thus, the same packet which is sprayed over the NDDs pertaining to local nodes can be sprayed over the TCPSOCK NDD interface for remote nodes. Nodes (local or remote) receive the same packet and reassemble and process it in the same manner. |
| US09742866B2 |
System and method for improving internet communication by using intermediate nodes
A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The client device access an acceleration server to receive a list of available tunnel devices. The requested content is partitioned into slices, and the client device sends a request for the slices to the available tunnel devices. The tunnel devices in turn fetch the slices from the data server, and send the slices to the client device, where the content is reconstructed from the received slices. A client device may also serve as a tunnel device, serving as an intermediate device to other client devices. Similarly, a tunnel device may also serve as a client device for fetching content from a data server. The selection of tunnel devices to be used by a client device may be in the acceleration server, in the client device, or in both. The partition into slices may be overlapping or non-overlapping, and the same slice (or the whole content) may be fetched via multiple tunnel devices. |
| US09742863B2 |
RDMA-optimized high-performance distributed cache
For remote direct memory access (RDMA) by a client to a data record stored in a cache on a server, a hash map is received by a client from a server. The hash map includes one or more entries associated with a key for the data record stored in the cache on the server that stores a server-side remote pointer referencing the data record stored in the cache on the server. The client, using the key, looks up the server-side remote pointer for the data record from the hash map, and then performs one or more RDMA operations using the server-side remote pointer that allow the client to directly access the data record stored in the cache on the server. |
| US09742860B2 |
Bi-temporal key value cache system
Described herein are techniques for supporting bi-temporal data in a key value cache system. An embodiment provides bi-temporal data as the basic functionality of a key value cache system. An embodiment provides a redesign of the core data structures of a key value cache system, adds bi-temporal data storage in the key value hashing structure, and provides a temporality-aware memory space manager. Embodiments can achieve the same performance as current key value cache systems for regular queries (that is, the queries that only access the current versions of data) while supporting bi-temporal data. |
| US09742857B2 |
Systems and methods for supporting a network profile
The present solution is directed to a system for specifying a source internet protocol (IP) address used by an intermediary device for a connection to a server. The system includes a device intermediary to a plurality of clients and a server. The device may have a net profile for sending traffic to servers. The net profile specifies one or more internet protocol (IP) addresses to use as a source IP address for a connection between the device and the server. The device receives a request from a client of the plurality of clients via a first transport layer connection between the client and the device, identifies the net profile for the request, and establishes, responsive to the request, a second transport layer connection between the device and the server using an IP address. |
| US09742855B2 |
Hybrid tag matching
A method for communication includes posting, by a software process, a set of buffers in a memory of a host processor and creating in the memory a list of labels associated respectively with the buffers. The software process pushes a first part of the list to a network interface controller (NIC), while retaining a second part of the list in the memory under control of the software process. Upon receiving a message containing a label, sent over a network, the NIC compares the label to the labels in the first part of the list and, upon finding a match to the label, writes data conveyed by the message to a buffer in the memory. Upon a failure to find the match in the first part of the list, the NIC passes the message from the NIC to the software process for handling using the second part of the list. |
| US09742853B2 |
Dynamic computer systems and uses thereof
The invention concerns computer systems that are specially adapted to propagate content over a dynamic network, substantially in real time, by virtue of the locational proximity of network joined client computers. Preferably, the content will also be proximity-weighted, and more preferably also rank-weighted, topic-weighted, time-weighted, query-weighted, vote-weighted, and/or location-weighted. The invention particularly concerns such computer systems that employ more than one such weighting. The invention particularly concerns such computer systems that operate using, or through, mobile devices, particularly for distributed computing applications, including social media applications and communications applications conducted over Restricted Computer Networks. |
| US09742850B1 |
Method and apparatus for configuring a data source name (DSN) for use during a data source access
Certain aspects of the present disclosure relate to a technique to configure a data source name (DSN) for use during a data source access. A driver is selected. An identifier is provided that identifies a class, and a library or an application that implements a driver interface for accessing the data source. A connection string is forwarded with the identifier from an implementation of the driver interface to the driver. The connection string is forwarded from the driver to a driver manager managing a client. |
| US09742849B2 |
Methods and systems for establishing collaborative communications between devices using ambient audio
Various embodiments of the present invention are directed to systems and methods for enabling two or more devices in the same ambient audio environment to become automatically interconnected so that information can be exchanged between the devices. The two or more device detect substantially the same sounds, such as people talking in a meeting, automatically determine this fact and enter the devices into an information and document sharing relationship via a network. |
| US09742848B2 |
Method and system for transmitting paging messages to machine type communication (MTC) devices in wireless communication
A method to transmit paging messages to Machine Type Communication (MTC) devices in wireless communication is provided. The method includes establishing, by a first cluster head, a dedicated radio connection with at least one base station. The method also includes receiving a request from a plurality of MTC devices to transmit a signaling message. The signaling message includes a tracking area update (TAU) and paging information associated with the plurality of MTC devices. The method further includes storing information of the plurality of MTC devices associated with the first cluster head and base station corresponding to each of the MTC devices. The method includes fetching, by a Mobility Management Entity (MME), information of the base station associated with a serving MTC device based on receiving a data request from the at least one MTC device and transmitting the paging information to the base station associated with the serving MTC device. |
| US09742847B2 |
Network node physical/communication pins, state machines, interpreter and executor circuitry
A network of sensor and controller nodes having the ability to be dynamically programmed and receive updated software from one another, and from a host system. Each network node includes multiple state machines, at least some of which are operable relative to physical pins at the network node; the physical pins correspond to inputs from sensor functions or outputs to control functions. The network nodes include microcontrollers that are operable in an operating mode to execute a state machine and respond to commands from other nodes or the host, and in a read mode to receive and store program instructions transmitted from other nodes or the host. A learn mode is also provided, by way of which a network node can store program code corresponding to instructions and actions at the node when under user control. |
| US09742845B2 |
Multi-service cloud storage decision optimization process
A method for storage management of client files in a multi-service cloud environment is provided. The method includes receiving a mapped list of available cloud storage services of the multi-service cloud environment. The method further includes receiving categorization of the client files. The method further includes performing a qualitative analysis of the received mapped list of available cloud storage services and the categorized client files, to generate a decision data structure representative of cloud storage preferences of a client. The method further includes storing the client files in the multi-service cloud environment. The method further includes determining whether to encrypt the stored client files. The method further includes tagging individual files of the stored client files, or groups of client files of the stored client files, or a combination of the individually stored client files or the groups of client files for encrypting the stored client files. |
| US09742836B2 |
Systems and methods for content delivery
Embodiments of the present disclosure may be utilized to analyze a content item comprising text to identify: a quote, a named entity that is the source of the quote (e.g., a person or organization such as a company), and identification information for the named entity (such as a title of the person giving the quote). Quotes may also be ranked to determine, for example, the best quotes to include in an article. |
| US09742832B2 |
Transmission apparatus, transmission method, computer-readable storage medium storing transmission program, and relay system
Disclosed is a transmission apparatus or the like that is able to transmit information efficiently. The transmission apparatus, on the basis of history information which includes a service identifier and a message identifier associated therewith, transmits a difference between a third message having a large similarity ratio to a second message included in a specific service and the second message, and a message identifier identifying the second message via a communication network. |
| US09742830B2 |
Systems and methods for asynchronously joining and leaving video conferences and merging multiple video conferences
A method (and corresponding system and computer program product) providing control to open video conference is disclosed. One aspect enables participants of a video conference to asynchronously join and leave the video conference. Another aspect enables participants to merge multiple video conferences into a single video conference, or to split a single video conference into multiple video conferences. |
| US09742829B1 |
Managing multimedia messages being transmitted to recipient devices of foreign networks
A method, system, and medium are provided for managing multimedia messages being transmitted to recipient devices of foreign networks. The method includes sending a multimedia message having a message size that exceeds a maximum allowable size supported or accepted by a foreign network of a recipient device. The method also includes receiving an indication that the sent multimedia message exceeded the maximum allowable size supported or accepted by the foreign network of the recipient device. |
| US09742827B2 |
Rendering rated media content on client devices using packet-level ratings
A content delivery system provides packet-level ratings of media content for use by client devices in rendering the media content thereon. A client device can store a permission level and compare the permission level with respective rating levels included in received media packets. The media content within the received media packets is rendered on the client device on the condition that the permission level compares favorably with the associated rating level and blocked on the condition that the permission level compares unfavorably with the associated rating level. |
| US09742825B2 |
Systems and methods for configuring devices
Systems and methods for configuring devices are disclosed. One method can comprise receiving an output signal representing user rights relating to a requested data and processing the output signal to generate validation data. The method can also comprise transmitting the validation data to a source of the requested data, wherein the validation data facilitates the transmission of the requested data. |
| US09742824B2 |
Streaming media delivery system
Streaming media, such as audio or video files, is sent via the Internet. The media are immediately played on a user's computer. Audio/video data is transmitted from the server under control of a transport mechanism. A server buffer is prefilled with a predetermined amount of the audio/video data. When the transport mechanism causes data to be sent to the user's computer, it is sent more rapidly than it is played out by the user system. The audio/video data in the user buffer accumulates; and interruptions in playback as well as temporary modem delays are avoided. |
| US09742822B2 |
Sponsored stories unit creation from organic activity stream
Methods, apparatuses and systems directed to sponsored story generation from an organic activity stream in a social networking site. A user wishing to promote an entry from an organic activity stream may, using a sponsor user interface, specify the types of stories to promote to a portion of the home page displayed to a member of a social network. |
| US09742819B2 |
System and method for reliable messaging between application sessions across volatile networking conditions
An electronic device is provided comprising a processor, a memory coupled to the processor, and a communications module saved in the memory and an application saved in the memory. The communications module configures the processor to generate a first transmission sequence number associated with a transport message to be sent to a remote device, include the first transmission sequence number in the transport message, and send the transport message to the remote device. |
| US09742817B2 |
Method for setting up a communication link
In a method for setting up a communication link between a first telephony terminal (PA) and a second telephony terminal (PB) in a communication network which transports data packets, in particular on the Internet, with the aid of at least one signalling Server (SA, SB), in particular with the aid of an SIP Server, the first telephony terminal informs a first signalling Server that a call is intended to be made to the second telephony terminal. The first signalling Server which has been informed or a second signalling Server which has been informed by this first signalling Server recognizes that the call is intended to be made with a particular quality of Service and sets up a communication link between the first telephony terminal and the second telephony terminal, which link corresponds to this quality of Service. |
| US09742814B2 |
Selective call blocking and call re-direction
A selective call blocking function (SCBF) device, included in an internet protocol (IP) multimedia subsystem (IMS), processes a request to establish an IP call on an LTE network, such as a voice over long term evolution (VoLTE) call. The SCBF device identifies a user equipment (UE) associated with the IP call and an associated eNode B (eNB). For example, the SCBF may access a subscriber location memory to determine a location of the UE and an eNB associated with the location. The SCBF determines whether the eNB supports the IP call, and permits the IP call to be established via the IMS when the eNB supports the IP call. When the eNB does not support the IP call, the SCBF blocks the IP call and initiates a non-IP call, such as a 1× call, to the UE to prevent communications interruptions. |
| US09742813B2 |
Detecting potential legal decryption of historical data
Systems and methods provide for detecting the potential legal decryption of transmitted data. When a device connects to a server over a network, such as the Internet, the device determines whether a cipher without forward secrecy is used. If so, information regarding the connection is stored in a log. When the device subsequently connects to the server and receives a response code indicating that a resource is not available for legal reasons, the device checks the log to determine if the device has previously communicated with the server using a cipher without forward secrecy. Based on the check, the previous connection with the server is identified from the log. A message is presented indicating that data from the previous connection could be subject to legal decryption. |
| US09742811B2 |
System for providing DNS-based control of individual devices
A device control system is associated with individual devices connected through a network control point to a gateway and thereby to the Internet. The gateway inserts an EDNS0 pseudo resource record into an additional data section in each DNS query initiated by an individual device, the EDNS0 pseudo resource record identifying the initiating device. A dynamic policy enforcement engine in front of the DNS engine intercepts the DNS query, identifies the initiating device, and selects a policy that applies to the device. The dynamic policy enforcement engine may provide parental control and security service to the individual device by blocking the DNS query or passing it to the DNS engine according to the policy. A component that intercepts DNS queries may provide several additional types of services to the individual devices, including advertising, messaging, mobile device tracking, individual device application control, and delivery of individualized content. |
| US09742809B1 |
Authentication policy orchestration for a user device
A system and method for authentication policy orchestration may include a user device, a client device, and a server. The server may include a network interface configured to be communicatively coupled to a network. The server may further include a processor configured to obtain, from a client device via the network, a transaction request for a transaction, determine an authorization requirement for the transaction request based, at least in part, on a plurality of authorization policies, individual ones of the plurality of authorization policies being separately configurable by at least one of a relying party and an authorizing party, and complete the transaction based on the authorization requirement having been met. |
| US09742805B2 |
Managing dynamic deceptive environments
A deception management system (DMS) to detect attackers within a network of computer resources, including a discovery tool auto-learning the network naming conventions for user names, workstation names, server names and shared folder names, and a deception deployer generating one or more decoy attack vectors in the one or more resources in the network based on the network conventions learned by the discovery tool, so that the decoy attack vectors conform with the network conventions, wherein an attack vector is an object in a first resource of the network that has a potential to lead an attacker to access or discover a second resource of the network. |
| US09742803B1 |
Systems and methods for subscription management of specific classification groups based on user's actions
Embodiments of the disclosure describe systems and methods for selecting a first group of users, which is selected to receive simulated phishing emails as part of a simulated phishing campaign, and adding users to a second group of users based upon those selected users interacting with a simulated phishing email that is part of a simulated phishing campaign; tracking the completion of remediation training related to phishing emails by users in the second group of users and receiving one or more indications that the users in the second group of users have completed remedial training; and automatically adding users, who are members of the second user group, to the first user group, to a third user group, or to a predetermined user group responsive to the one or more indications that the users in the second group of users have completed remedial training. |
| US09742800B2 |
System and method for software defined behavioral DDoS attack mitigation
Systems and methods for software defined behavioral DDoS attack mitigation are provided. According to one embodiment, a method is provided for mitigating DDoS attacks. A DDoS attack mitigation appliance of multiple mitigation appliances controlled by a DDoS attack mitigation central controller receives DDoS attack mitigation policies through a network connecting the controller and the mitigation appliance. A DDoS attack is mitigated by the mitigation appliance based on the received mitigation policies. The mitigation policies are generated by the controller based on granular behavioral packet rate thresholds estimated based on granular traffic rate information collected from one or more of the multiple mitigation appliances controlled by the controller. |
| US09742799B2 |
Client-side active validation for mitigating DDOS attacks
Methods and systems for mitigating denial-of-service attacks include a proxy server that monitors a set of application servers configured to receive and service requests from clients. The proxy server intercepts the requests, and in response, provides the clients with customized client-side scripts embedded in markup language. The client-side scripts may include random strings to generate follow-through random uniform resource identifier redirection requests expected by the proxy server. The client-side scripts, upon execution, may challenge the clients by demanding user interaction within a specified period of time, requesting a delay before responding, and/or attempting to set a challenge cookie multiple times. If a client provides the demanded user interaction within the specified time, honors the delay, and/or sets the challenge cookie with the correct value, then the client-side scripts may generate a redirection request expected by the proxy server for that client and the proxy servers may whitelist that client for a configurable duration and forward that client's subsequent requests to the application servers without challenge. |
| US09742798B2 |
Mitigating neighbor discovery-based denial of service attacks
In one embodiment, a device in a network determines whether a destination address of a packet received by the device is within a neighbor discovery (ND) cache of the device. The device determines whether the destination address is not in a set of addresses used to generate an address lookup array or possibly in the set of addresses used to generate the address lookup array, in response to determining that the destination address of the packet is not within the ND cache. The device performs address resolution for the destination address of the packet, in response to determining that the destination address of the packet is possibly in the set of addresses used to generate the address lookup array. |
| US09742795B1 |
Mitigating network attacks
Systems and methods are described that enable the mitigation of network attacks directed to specific sets of content on a content delivery system. A set of content targeted in the attack may be identified based at least in part on a combination of network addresses to which attacked-related packets are transmitted. Thereafter, the content delivery system may mitigate the attack based on the identified target. For example, where both targeted and non-targeted sets of content are associated with the attacked network addresses, traffic directed to these sets of content may be separated, e.g., in order to reduce the impact of the attack on the non-targeted sets of content or increase the computing resources available to the targeted content. Redirection of traffic may occur using either or both of resolution-based redirection or routing-based redirection. |
| US09742791B2 |
Site independent methods for deriving contextually tailored security vulnerability corrections for hardening solution stacks
In auditing a target Web site for security exposures, site specific remediation reports are generated to provide instructional data tailored to components of the Web server solution stack as determined by the auditing computer system. Stack and component identification is performed in a site independent manner based on an analysis of Web page data retrieved by the auditing computer system. Informational aspects of the received data are recognized, enabling further identification of component implementation aspects. Based on the informational and implementation aspects, site, solution stack, and component specific security audit tests are executed against the target Web site. Audit identified security exposures are recorded in correspondence with site, solution stack, and component implementation specific remediation instruction data. |
| US09742788B2 |
Event correlation across heterogeneous operations
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for correlating domain activity data. First domain activity data from a first network domain and second domain activity data from a second network domain is received. The first domain activity data and the second domain activity data is filtered to remove irrelevant activity data, based on a first set of profile data for devices in the first network domain and a second set of profile data for devices in the second network domain. Unfiltered first and second domain activity data is aggregated. Aggregated unfiltered first and second domain activity data is correlated to determine an attack path for an attack that occurs across the first network domain and the second network domain, based on attack signatures and profiles associated with previously identified attacks. A visualization of the attack path is generated. |
| US09742786B2 |
System, method and computer readable medium for processing unsolicited electronic mail
An internet service provider (ISP) is configured to analyze a subscriber's sent e-mail packets to determine a subscriber identity associated with the e-mail packets. A database is then queried to determine a current sending rate of e-mails by the subscriber. A sending rate above an allowed threshold causes the upstream transmission of the e-mail packets to be blocked by injecting connection destroying packets. A subscriber remains blocked from upstream transmission of e-mails until the sending rate as determined by the ISP drops below a second, more stringent threshold. This automatic process is also accompanied by automated messaging to the subscriber with information as to the measures taken and remedial options. |
| US09742781B1 |
Generation and validation of user credentials
Obtaining and/or validating user credentials at client devices is described. This disclosure describes methods of generating representations of credentials for groups of users or for individuals. Representations for these credentials can be managed by a server or collection of servers, and distributed to appropriate users' client devices. These representations can then be outputted for evaluation by a credential authority, who confirms that the credential possessed by a given user is valid. A credential authority may be a person and/or a device that validates a credential. |
| US09742780B2 |
Audio based discovery and connection to a service controller
Techniques for automatically connecting to a service controller are described herein. In one example, a service controller device includes a processor and a computer-readable memory storage device storing executable instructions that cause the processor to broadcast at least one of an access credential, connection information or an access credential hash embedded in an audio signal. The processor can also authenticate a client device based on a transmission of at least one of the connection information, the access credential, or the access credential hash from the client device to the client connector and transmit data to the client device in response to authenticating the client device. |
| US09742779B2 |
Method and apparatus for securely providing access and elevated rights for remote support
An approach is provided to allow remote support representatives to carry out remote support session with minimal access and privileges to remote systems. An attempt is detected to establish a remote support session via a remote support appliance that is configured to establish the remote support session between a first device associated with a support representative and a second device associated with a user. A credential that provides an elevated access privilege is retrieved in response to the detection. The credential is provided to the first device for use in the establishment of the remote support session. |
| US09742776B2 |
Contact identification validation via social invitation
Systems and techniques are disclosed for receiving one or more recipient identifiers and a destination location from a user or an application. A uniform resource locator may be generated and may include a destination ID corresponding to the destination location. An entry containing the one or more recipient identifiers may be generated in an access control list for the destination location. A recipient may request access to the destination location by selecting the uniform resource locator. A recipient identifier may be determined for the recipient requesting the access and may be compared to entries in the access control list. If the recipient identifier matches an entry in the access control list, then the recipient may be granted access to the destination location. |
| US09742772B1 |
Access system
A method and apparatus to enable a user to send an action message including secure credential is described. The system comprises a receiving logic to receive the action message from a user, a repository including encrypted user-specific data, and an agent to access a resource through a network, the agent directed as specified by a connector object invoked by the action message. The agent further comprises logic to utilize the encrypted user-specific data from the repository to log into the resource through the network, and in one embodiment, action logic to perform one or more actions as instructed by the connector invoked by the action message. The agent further comprises, in one embodiment, extraction logic for extracting information resulting from of the agent's access to the data resource specified by the connector, and communication logic to communicate a result to the user or to another agent for further use. |
| US09742763B2 |
Secure authentication in a multi-party system
A user device transmits a login request. A provider server, receives a random number from and transmits other information to an authentication server. The provider server transmits the random number to the device. The random number is transferred to a second user device, which transmits it to the authentication server. The authentication server transmits provider authentication policy requirements and further transmits the other information to the second device. The second device transmits user validation information to the authentication server. The authentication server determines that the transmitted validation information corresponds to the service provider authentication policy requirements, compares the validation information with stored validation information for the user to authenticate the user. The second device transmits a message, including the random number and the other information, signed with a user credential to the authentication server. The authentication server transmits notice of authentication and the signed message to the provider server. |
| US09742760B1 |
System and method for improving login and registration efficiency to network-accessed data
A system, comprising: memory operable to store at least one program; at least one processor in communication with the memory, in which the at least one program, when executed by the at least one processor, causes the at least one processor to perform the steps of: receiving an initial request for access to restricted data from a client device, the initial request including a user identifier; determining whether the user identifier is associated with any of a plurality of user registration records for accessing the restricted data; transmitting login data to the client device if the user identifier is associated with one of the plurality of user registration records and transmitting registration data to the client device if the user identifier is not associated with any of the plurality of the user registration records. |
| US09742758B1 |
Techniques for network site validation
Disclosed are various embodiments for validating the identity of network sites. A communication session is established with a network site using a credential for the network site. A validation of the communication session is generated based at least in part upon a profile for the network site. The profile is derived from at least one previous communication session with the network site. An action is initiated in response to the validation when the validation indicates a discrepancy exists between the profile for the network site and the communication session with the network site. |
| US09742757B2 |
Identifying and destroying potentially misappropriated access tokens
A computer receives a request for protected user data with an access token presented by a client as authorization for the client to access the protected user data in a delegated environment. The computer parses the request to create a device fingerprint identifying the device submitting the request for the client. The computer compares the device fingerprint of the request to a previously stored device fingerprint of an authorized device associated with the access token. The computer automatically determines whether to identify the access token as potentially misappropriated based on the comparison of the device fingerprint of the request to the previously stored device fingerprint. |
| US09742756B1 |
Systems and methods for communications channel authentication
A user may access an Institution system via more than one communications channel, either by the same device (e.g., a mobile device accessing the Institution system via a voice channel and a data channel) or by different devices (e.g., a personal computer via a web channel and a phone via a voice channel). If a user is not currently authenticated to a communications channel and attempts to access the Institution system via a communications channel, the user may be authenticated using strong authentication. If the user is currently authenticated to the Institution system via a communications channel and would like to engage a second communications channel to access the Institution system, the user may authenticate to the second communications channel using both communications channels and weak authentication, such as single factor authentication or a challenge question. |
| US09742748B2 |
Encrypted purging of data from content node storage
Described herein are methods, systems, and software for encrypting and erasing data objects in a content node. In one example, a method of operating a content node that caches content divided into one or more data objects includes encrypting the one or more data objects using separate encryption keys for each of the one or more data objects, the separate encryption keys comprising a common portion shared by the one or more data objects and an individualized portion unique to each data object. The method further provides receiving a purge request to erase at least one data object and, responsive to the purge request, erasing at least one of the common portion or the individualized portion for the at least one data object based on the purge request. |
| US09742747B2 |
Differential client-side encryption of information originating from a client
A method may include allocating a number of public keys, where each respective public key is allocated to a respective entity of a number of entities; storing a number of private keys, where each respective private corresponds to a respective public key; storing one or more decryption algorithms, where each respective decryption algorithm is configured to decrypt data previously encrypted using at least one encryption algorithm of the encryption algorithms. Each respective encryption algorithm may be configured to encrypt data using at least one public key. Each respective decryption algorithm may be configured to decrypt data using at least one private key. The method may include receiving encrypted data, where the encrypted data is encrypted using a first public key and a first encryption algorithm, and the encrypted data is provided over a network. |
| US09742743B2 |
Information processing apparatus and mobile terminal device
A management server (110) encrypts storage target data and transmits the encrypted storage target data to mobile terminals (120a, 120b). Thereafter, the management server (110) receives and decrypts the encrypted storage target data stored in the mobile terminals (120a, 120b). |
| US09742742B1 |
Secure data transfer system and method
Secure transfer of electronic files containing confidential information is achieved by selecting and copying files to be transferred to an intended recipient and, prior to transfer, subjecting the copies to consolidation, compression, chunking and encryption. Decryption, unchunking and decompression of the transferred files can only be performed by a recipient who has also received a verification code, an encrypted and password protected sector file, and an encrypted password file. Decryption of the password file requires a private certificate available only to the intended recipient. Decryption of the other files requires a one-time random transaction password contained in the password file. |
| US09742741B2 |
Electronic device and method of transmitting content item
According to one embodiment, an electronic device includes a content transmitter. The content transmitter is configured to output a content item including first data and second data to one transmission path, by applying a first copyright protection system to copyright protection of the first data and applying a second copyright protection system to copyright protection of the second data. The first copyright protection system involves encryption of data to be copyright-protected. The second copyright protection system involves no encryption of data to be copyright-protected. |
| US09742738B2 |
Method and apparatus for enforcing storage encryption for data stored in a cloud
In one embodiment, a method includes providing a request to store at least a first piece of data. The request to store the first piece of data is a request to store the first piece of data in a first encrypted form on a cloud associated with the cloud application provider. The method also includes determining whether the cloud application provider is capable of encrypting the first piece of data, and providing the first piece of data to the cloud application provider if it is determined that the cloud application provider is capable of encrypting the first piece of data. If it is determined that the cloud application provider is not capable of encrypting the first piece of data, the method further includes encrypting the first piece of data to create the first encrypted form and providing the first encrypted form to the cloud application provider. |
| US09742733B2 |
Communication device, communication system, and communication device control method
A communication device includes a communication section and an encrypting section. When the communication section receives from a communication control device alternative address information indicating an address of an alternative device registered as a transfer destination after a communication request for communication with a specified device is transmitted to the communication control device, the communication section determines the alternative device as the communication partner and transmits to-be-transmitted data that is encrypted by the encrypting section to the alternative device. The transfer destination indicates a transfer destination of the data to be transmitted to the specified device. |
| US09742732B2 |
Distributed TCP SYN flood protection
A method and apparatus is disclosed herein for TCP SYN flood protection. In one embodiment, a TCP SYN flood protection arrangement comprises a first device operable to process packet input and output functions, including performing sender verification with respect to a connection initiation from a sender for a first TCP connection between the sender and a destination server and a second device, separate from the first device, to perform one or more security processing operations on packets of the first TCP connection from the sender after the first device verifies the sender is legitimate. |
| US09742731B2 |
Geolocation via internet protocol
Aspects of the present disclosure involve systems, methods, computer program products, and the like, for extracting information associated with one networking transmission protocol, such as Internet Protocol version 6 (IPv6), based on information associated with a different networking transmission protocol, such as Internet Protocol version 6 (IPv4). More specifically, when resolving an IP address for a Uniform Resource Locator (URL) through which a content file may be obtained, the system may base the resolved URL on attributes of an IPv4 address extracted from an IPv6 address for a machine associated with the request. In one particular example, a geographic location of a requested computing device or machine may be determined or estimated based on an IPv4 address extracted from an IPv6 address associated with the request. |
| US09742725B2 |
Network address identification
In a method for determining network information, in response to a computing device connecting to a computing system, the computing device identifying network information that corresponds to the computing system, wherein the computing system is configured to pass network information to the computing device while the computing system is powered on, but not logged in. The method further includes the computing device determining at least one network address for the computing system utilizing the identified network information that corresponds to the computing system. The method further includes the computing device displaying the determined at least one network address for the computing system. |
| US09742721B2 |
Method, system, server and client device for message synchronizing
A message synchronizing method, a message synchronizing system, a server and a client device are disclosed. In the method, a server acquires a shared message with an unread mark corresponding to a first communication account after at least one client device logs into the first communication account; the server sends the shared message with the unread mark to each of the at least one client device; if the server receives a read mark reported by any of the at least one client device after the shared message with the unread mark is read by the any of the at least one client device, the server performs synchronization, for the read mark, on each of the at the least one client device except the client device reporting the read mark. Message reading states among client devices for same communication account are synchronized. |
| US09742719B2 |
Method for real-time viral event prediction from social data
Filtering a set of social messages received in real time to yield a sub-set likely to relate to some first substantive content subject (such as a video available online). For each message in the sub-set, a respective social message sender, and a corresponding social influence value for each respective social message sender is determined. A prediction of the extent of the spread of the substantive content subject is made based on the social influence values of the social message senders. |
| US09742715B1 |
Method and system for storing real-time communications in an email inbox
In one embodiment, a method for maintaining real-time communications of a user includes receiving a user's real-time communications of different types over a network, presenting the real-time communications in an email inbox of the user in a uniform manner, and allowing the user to search contents of the real-time communications presented in the email inbox. |
| US09742714B2 |
Method, device and system for providing historical communication content
A communication server is disclosed. The communication server may receive, via at least one network interface, a request to add one or more new participants to a communication group; receive, from one or more members of the communication group, one or more selections indicating one or more selected portions of communication content for providing to the one or more new participants, wherein the communication content includes information transferred between a plurality of participants of the communication group prior to the one or more new participants being added to the communication group; determine, based on the one or more selections, a portion of the communication content for providing to the one or more new participants; and provide, via the at least one network interface, the portion of the communication content to one or more user devices associated with the one or more new participants. |
| US09742712B2 |
Real-time messaging method and apparatus
A system and method for the late-binding of time-based media in real-time. With late binding, the sender may create time-based media before or at the same time an active delivery route to the recipient is discovered. As soon as the route becomes available, the media is transmitted. The existing DNS and email infrastructure is possibly used for route discovery, while any real-time transmission protocol may be used for the actual delivery of the media. “Progressive” emails may also be used for the real-time delivery of time-based media. |
| US09742710B2 |
Mood information processing method and apparatus
Embodiments of the present invention disclose a mood information processing method and apparatus. The method includes: first determining a mood information mode that corresponds to an application program, acquiring mood information of a message sender if the mood information mode that corresponds to the application program is transmitting a mood or correcting a mood, and then sending the mood information of the message sender to a message receiver. The embodiments of the present invention are applicable to outputting mood information of a user in an application program. |
| US09742709B1 |
Method and system for providing interactive communications during an emergency
The disclosed invention relates generally to a system, method or apparatus for an improved emergency operations communication system. The object of the present invention pertains to the rapid and efficient collection and dissemination of information between any size population and an emergency operations center and personnel during an event. In one particular embodiment, the invention may provide improved communication, data gathering, analyzation, and organization with a system or method resulting in at least reduced communication time and improved situational awareness between a response center and personnel and discrete unknown or known members of the public. |
| US09742705B2 |
Signalling congestion
Congestion in respect to a network element operable to forward data items in a telecommunications networks, and in respect to a processing element operable to process requests for service is signaled. In either, the element is operable to perform its processing function at up to a processing rate which is subject to variation, and has a queue for items awaiting processing having a counter associated therewith which maintains a count from which a queue metric is derivable. A method comprises: updating the count at a rate dependent on the processing rate; further updating the count in response to receipt of items awaiting processing; and signalling a measure of congestion in respect of the element in dependence on the queue metric; then altering the rate at which the count is being updated and adjusting the counter whereby to cause a change in the queue metric if the processing rate has changed. |
| US09742701B2 |
Attachment unit interfaces for non-identical data rate links
An apparatus for operating a low data-rate (LDR) link and legacy switch at a high data-rate (HDR) includes a first block and a second block. The first block receives input signals from the legacy switch and generates identical output signals. The second block receives the identical output signals and generates an HDR signal for communication over the LDR link coupled to an access point. Further, a media access control (MAC) interface communicates data at a first data rate with an Ethernet PHY block including a first-in-first-out (FIFO) module and a buffer. The FIFO receives data from the MAC interface at the first data rate and transmits data at a second data rate. The buffer receives data from the Ethernet port at the second data rate and transmits the received data at the first data rate in response to detection of an end of packet. |
| US09742695B2 |
Relay device and connector
To provide a relay device capable of increasing the number of connected nodes in a bus-type network, and a connector providing the relay device. An active-star coupler as the relay device includes a bit width distortion correction circuit and a ringing pulse absorption circuit, corrects bit width distortion in bit units using the bit width distortion correction circuit and absorbs and eliminates ringing pulses in a terminus of a communication frame using the ringing pulse absorption circuit. |
| US09742693B2 |
Dynamic service insertion in a fabric switch
One embodiment of the present invention provides a switch. The switch includes a service management module and a packet processor. During operation, the service management module identifies a service provided by an appliance coupled to the switch via a local port. The packet processor constructs a notification message for a remote switch. The notification message includes information about the service and the appliance. In this way, the switch allows the remote switch to request the service. |
| US09742687B2 |
Management system and method for execution of virtual machines
A management system includes an information processing apparatus; a management apparatus; and a load balancing apparatus. And the management apparatus specifies a first processing entity that relates to a first application program whose performance is not guaranteed, upon detecting that a value related to a load of a second processing entity that relates to a second application program whose performance is guaranteed is equal to or greater than a first predetermined threshold, and requests the information processing apparatus to stop the first processing entity, and the information processing apparatus requests the load balancing apparatus to stop allocating processing to the first processing entity, stops the first processing entity upon detecting that a value related to a load of the first processing entity is equal to or less than a second predetermined threshold, and causes a third processing entity to start processing for the second application program. |
| US09742683B1 |
Techniques for enabling packet prioritization without starvation in communications networks
A method is provided in one example embodiment and includes determining whether a packet received at a network node in a communications network is a high priority packet; determining whether a low priority queue of the network node has been deemed to be starving; if the packet is a high priority packet and the low priority queue has not been deemed to be starving, adding the packet to a high priority queue, wherein the high priority queue has strict priority over the low priority queue; and if the packet is a high priority packet and the low priority queue has been deemed to be starving, adding the packet to the low priority queue. |
| US09742679B2 |
Rate limiter for a message gateway
A hardware-implemented rate limiter is described. This implementation guarantees that messages containing a value v are not forwarded at a higher rate than a predefined threshold value r. More specifically, given a number of times x in a time interval y, which specifies a rate r defined by x/y, the rate limiter reports a violation by selectively setting an error value when v occurs more than x times during the time interval y. Moreover, the rate limiter may be able to keep track of multiple predefined threshold values for different rates. Furthermore, the rate limiter may keep track of 2b different values v, where b is the number of digits of the binary representation of v. |
| US09742675B2 |
Management of bandwidth efficiency and fairness in cloud computing
Technologies are generally described to manage bandwidth efficiency and fairness in cloud computing. According to some examples, bottleneck links may be determined in a network connecting communication device pairs. A first bandwidth allocation may be determined of a first subset of the communication device pairs communicating through the bottleneck links. A second bandwidth allocation may be determined of a second subset of the communication device pairs unable to communicate through the bottleneck links. Then, the first bandwidth may be adjusted based on an analysis of the first bandwidth, the second bandwidth, a first weight attribute associated with the first subset and a second weight attribute associated with the second subset. |
| US09742674B1 |
Methods for distributed application visibility and reporting and devices thereof
A method, non-transitory computer readable medium, and multi-blade network traffic management apparatus that obtains, with a primary blade and one or more secondary blades, statistical data regarding network traffic respectively managed by each of the blades. The statistical data respectively obtained by each of the blades is stored by each of the blades in a respective database associated with each of the blades. A request for statistical data is received with the primary blade. Each of the databases is queried with the primary blade to retrieve at least a subset of the statistical data stored therein in response to the obtained request. The retrieved at least a subset of the statistical data is consolidated with the primary blade to generate a response to the received request. |
| US09742671B2 |
Switching method
A method for providing identifiers for virtual devices in a network. The method comprises receiving a discovery data packet directed to a physical network node associated with a physical endpoint device. A response to the discovery data packet directed to a physical network node is provided, the response comprising an identifier of a virtual device. At least one further discovery data packet directed at least to said virtual device is received. A response to a first one of the further discovery data packets is provided, the response comprising an identifier of a virtual endpoint device. At least some functionality of the virtual endpoint device is provided by the physical endpoint device. |
| US09742670B2 |
Non-eligible distance vector protocol paths as backup paths
In one embodiment, non-eligible distance vector protocol paths are used as backup paths. In one embodiment, the distance vector protocol is Enhanced Interior Gateway Protocol (EIGRP) and unless a path is a feasible successor for a destination, the path is not eligible as a backup path. Therefore, if there is no feasible successor, there is no eligible backup path. One embodiment avoids an initial delay in finding a replacement path for traffic by determining and installing a non-eligible backup path (e.g., a path that is not a feasible successor) in one or more forwarding tables. In this manner, the router can immediately forward packets over this non-eligible backup path until, for example, forwarding in the network can converge in light of the primary path being no longer available. |
| US09742669B2 |
Aliasing of named data objects and named graphs for named data networks
A method for aliasing of named data objects (in named data networks) and entities for named data networks (e.g., named graphs for named data networks). In various examples, aliasing of named data objects may be implemented in one or more named data networks in the form of systems, methods and/or algorithms. In other examples, named graphs may be implemented in one or more named data networks in the form of systems, methods and/or algorithms. |
| US09742666B2 |
Using headerspace analysis to identify classes of packets
Some embodiments provide a method that uses headerspace analysis. The method receives several flow entries for distribution to a set of forwarding elements that implement a logical network. The method models each of the flow entries as a function that operates on a representation of a packet header. The method uses the modeled functions to identify a set of paths from a packet source to a packet destination. For each particular path of the identified paths, the method uses inverses of the modeled functions to determine a set of packet headers. Packets sent from the packet source with any packet header in the set of packet headers follow the particular path through the flow entries. |
| US09742663B2 |
System and method for reducing information loss in an aggregated information handling system
An information handling system is provided. The information handling system includes a plurality of aggregation devices configured to distribute information in a virtual link trunk and a plurality of nodes coupled to the aggregation devices. When one of the plurality of aggregation devices received a reboot command, that aggregation device is configured to transmit a first message to the nodes indicating that the aggregation device is rebooting, receive a first acknowledgement message from the nodes indicating that they will not send any information to the rebooting aggregation device. The aggregation device is then configured to reboot, receive a second message from the nodes indicating the nodes are ready to receive information from the rebooted aggregation device, transmit a second acknowledgement message to the nodes indicating that the rebooted aggregation device has rebooted and is capable of receiving information, and receive information from at least one of the nodes for transmission to at least one other node. |
| US09742657B2 |
Method and system for resynchronization of forwarding states in a network forwarding device
A method, in a network controller of a control plane in a software defined network (SDN) coupled to a network element (NE) of a data plane in the SDN, of resynchronizing forwarding table entries of the NE according to forwarding table entries of the network controller is disclosed. The method includes causing the NE to update a first subset of forwarding table entries from a set of one or more of forwarding table entries to include a post-synchronization indicator. The method continues with causing the NE to delete, following the update of the first subset of forwarding table entries, a second subset of zero or more forwarding table entries from the set of forwarding table entries, where each forwarding table entry from the second subset includes a pre-synchronization indicator. |
| US09742656B2 |
Method for acquiring, by SDN switch, exact flow entry, and SDN switch, controller, and system
Embodiments of the present invention disclose a method for acquiring, by an SDN switch, an exact flow entry, applied to an SDN network, where the SDN network includes an SDN controller and multiple SDN switches, the SDN controller communicates with each SDN switch in an inband communication manner, and the method includes: first establishing, by a first SDN switch, a reliable connection to the SDN controller; then, sending a first control message based on a packet corresponding to a protocol for the reliable connection; adding path information of the first SDN switch to the control message; and subsequently, also adding, by each SDN switch that receives the first control message, path information of each SDN switch to the first control message, so that finally, the SDN controller knows an entire path, so as to deliver a flow table to the first SDN switch. |
| US09742653B2 |
Maintenance method for network connection and computer system
A maintenance method for network connection and a computer system are provided. The method is adapted to a computer system having a real-time clock. The real-time clock is configured to regularly wake up the computer system to check whether a network connection is working normally. In the method, a wake up operation to wake up the computer system is received from a user. It is determined whether a connection time of maintaining the network connection so far from a last time of entering a power saving mode is greater than a counting time for the real-time clock to wake up the computer system. It is tested whether the network connection is working normally when the connection time is greater than the counting time. The counting time of the real-time clock is updated to the connection time when the network connection is working normally. |
| US09742650B2 |
Systems and methods for measuring available capacity and tight link capacity of IP paths from a single endpoint
According to one exemplary embodiment, a method for determining the forward and reverse available capacity or tight link capacity of an IP path from a single endpoint includes the steps of: transmitting, from a source IP endpoint node toward a destination IP endpoint node, a forward packet train including a first plurality of IP test packets over the forward IP path; and receiving, at the source IP endpoint node, a corresponding reverse packet train from the destination IP endpoint node, the reverse packet train including a second plurality of IP test packets over the reverse IP path each of which correspond to a respective one of the first plurality of IP test packets. For those IP path capacity measurements embodiments which are TWAMP-based, no changes are needed to the TWAMP control protocol, e.g., since exemplary embodiments make use of padding octets to transfer additional information which can be used for available IP path capacity and tight IP link capacity calculations. |
| US09742648B2 |
Efficient topology failure detection in SDN networks
Techniques for performing efficient topology failure detection in SDN networks are provided. In one embodiment, a computer system (e.g., an SDN controller) can transmit a first message to a first network device, where the first message instructs the first network device to begin sending probe packets to a second network device at a predetermined rate. The computer system can further transmit a second message to the second network device, where the second message instructs the second network device to monitor for the probe packets sent by the first network device and to notify the computer system when one or more of the probe packets are not received by the second network device. If the computer system receives such a notification from the second network device, the computer system can determine that a port, link, or node failure has occurred between the first and second network devices. |
| US09742646B2 |
System and method for monitoring network connection quality by executing computer-executable instructions stored on a non-transitory computer-readable medium
A system and method for monitoring network connection quality utilizes software installed on a user computer to monitor a first network connection to a target server used for a desired activity and a second network connection to a benchmark server. Various network quality metrics are recorded and compared for each of the connections and displayed on a visual display so that the user may easily and accurately judge the health of the connection to the target server. |
| US09742639B1 |
Intelligent network resource discovery and monitoring
An intelligent multi-level resource discovery and analysis system and method identify and characterize physical, logical and virtual resources of a multi-vendor, multi-class, multi-layer network by automatically generating and sending discovery commands that query resources as to their addresses, identities, characteristics and operational states, and by analyzing responses to the commands to identify continuously and in real time resource vendors, types, operating states, configurations of resources and network topology, and changes to resource and network conditions. Externally entered or dynamically discovered discovery parameters define the types and level of detail of information discovered and analyzed. |
| US09742637B2 |
System and method of high volume rule engine
A rule engine configured with at least one hash table which summarizes the rules managed by the engine. The rule engine receives rules and automatically adjusts the hash table in order to relate to added rules and/or in order to remove cancelled rules. The adjustment may be performed while the rule engine is filtering packets, without stopping. The rules may be grouped into a plurality of rule types and for each rule type the rule engine performs one or more accesses to at least one hash table to determine whether any of the rules of that type match the packet. In some embodiments, the rule engine may automatically select the rule types responsive to a set of rules provided to the rule engine and adapt its operation to the specific rules it is currently handling, while not spending resources on checking rule types not currently used. |
| US09742633B2 |
System and method for electronically identifying connections of a system used to make connections
One embodiment is directed to a system that comprises a plurality of ports configured to establish a plurality of physical information connections and a plurality of physical scanning connections using cables. Each information connection is associated with a respective scanning connection. Each scanning connection is separate from the respective information connection associated with that scanning connection. The system is configured to selectively transmit a respective scanning signal from each port over a respective one of the scanning connections. The system is configured to selectively receive a respective scanning signal at each port from a respective one of the scanning connections. Connection information is derived from the scanning signals communicated over the scanning connections. Other embodiments are disclosed. |
| US09742632B2 |
Hybrid SDN controller
One embodiment provides a network interface controller. The network interface controller includes a portion of a hybrid software-defined networking (“SDN”) controller, the portion of the hybrid SDN controller including a service abstraction layer module (“SAL”) and a southbound application programming interface (“SB API”), the SAL including a representation of a physical network. |
| US09742631B2 |
Symmetric coherent request/response policy enforcement
A set of service level agreement (SLA) policies and service level definition (SLD) policies that are applied to a request message of a correlated request/response message pair are tracked. A response message of the correlated request/response message pair is detected. A corresponding set of platform-specific policy enforcement processing rules that are used to enforce the set of SLA policies and SLD policies on the response message are identified using the tracked set of SLA policies and SLD policies applied to the request message. The set of SLA policies and SLD policies are enforced on the response message using the identified corresponding set of platform-specific policy enforcement processing rules. |
| US09742630B2 |
Configurable router for a network on chip (NoC)
Example implementations described herein are directed to a configurable building block, such as a router, for implementation of a Network on Chip (NoC). The router is parameterized by a software layer, which can include the number of virtual channels for a port, the number of ports, the membership information of the virtual channels, clock domain, and so forth. The router may further be configured to implement arbitration techniques and flit processing techniques based on the parameters specified by the software layer. |
| US09742629B2 |
User-controlled network configuration for handling multiple classes of service
A network configuration method includes receiving end user input indicative of a network configuration. The end user input may include: a plurality of service classes, a particular packet header field for each of the plurality of service classes, and a particular service class mixture for the plurality of service classes. The particular service class may be indicated by a particular value of the particular packet header field. The method may further include configuring an ingress router to prioritize packets sent to the end user in accordance with the network configuration and configuring an egress router to queue network packets sent from the end user in accordance with the network configuration. |
| US09742628B2 |
Cross-layer aware communication of a multipath data flow via a communication network
A capability for cross-layer aware communication of a multipath data flow via a communication network is presented. The multipath data flow is transported using a set of multiple transmission flows based on a multipath transport protocol. The communication network supports a set of multiple communication paths. A controller is configured to determine a set of mappings between the multiple transmission flows of the multipath data flow and the multiple communication paths based on cross-layer state information, compute a set of path mapping rules for a network element based on the mappings between the multiple transmission flows of the multipath data flow and the multiple communication paths, and provide the path mapping rules to the network element. The network element is configured to apply the path mapping rules for mapping packets of the multipath data flow between the multiple transmission flows of the multipath data flow and the multiple communication paths. |
| US09742627B2 |
System for automatic connection between NVR and IP camera
A system of a network video recorder (NVR) device for automatic connection to an IP camera is provided. The system is implemented to make it possible to automatically establish a connection between the NVR device and the IP camera while reducing a user's intervention, and thereby a user not having enough expertise knowledge of IP network settings may be able to avoid experiencing inconvenience in manual settings, and also it is possible to prevent errors which may occur in manually adjusting the network settings and to prevent unnecessary time wasted on the network setting management process. |
| US09742623B2 |
Master device, communication system, and communication method
The communication method comprises transmitting a transfer command to transfer the data control, which enables execution of controlling data stored in one or more communication devices connected to at least one of the first and second master devices, from the first master device to the second master device through a first communication line, transmitting a response to the transfer command from the second master device to the first master device through the first communication line, and transmitting a confirmation notification for the response from the first master device to the second master device through the first communication line. The execution of controlling data in the first master device is stopped when the first master device has transmitted the confirmation notification, and the execution of controlling data in the second master device is enabled when the second master device has received the confirmation notification. |
| US09742621B2 |
Reliable and resilient end-to-end connectivity for heterogeneous networks
Embodiments of the present invention address deficiencies of the art in respect to connectivity management in a heterogeneous network and provide a method, system and computer program product for resilient and reliable end-to-end connectivity in a heterogeneous network. In one embodiment of the invention, a method for resilient and reliable end-to-end connectivity in a heterogeneous network environment can be provided. The method can include creating an instance of an abstracted network resource model (NRM) for a heterogeneous network environment of different network resource nodes. The method further can include binding an application endpoint in the instance of the abstracted NRM with a connectivity endpoint for a first of the different network resource nodes. Finally, the method can include re-binding the application endpoint to a second of the different network resource nodes in response to detecting the outage. |
| US09742620B2 |
Cooperation between MoCA service provider and consumer networks
Embodiments may be disclosed herein that provide systems, devices, and methods of operating a Multimedia over Coax (MoCA) network. One such embodiment is a method comprising: designating a selected MoCA device as a network controller; and logically partitioning, into virtual MoCA networks, a predetermined bandwidth reserved for the MoCA network by sending, from the network controller one or more beacons containing virtual network information. |
| US09742618B2 |
Resilient routing based on a multi-channel model for emergency management
There is provided a system and method for resilient routing based on a multi-channel model for emergency management. The system includes a packet delivery anomaly detector for determining an existence of an anomaly in a mandated routing infrastructure for a packet that renders the packet incapable of reaching a destination node designated for the packet through the mandated routing infrastructure. The system further includes a dynamic alternate route identifier for dynamically identifying alternate routes for the packet responsive to a determination of the existence of the anomaly. The alternate routes are outside the mandated routing infrastructure, are provided using one or more mobile devices external to and not part of the mandated routing infrastructure, and are dynamically identified responsive to at least geographic location information. The system also includes a wireless transmitter for wirelessly routing the packet using at least one of the alternate routes. |
| US09742614B2 |
Data-type definition driven dynamic business component instantiation and execution framework
In a complex workflow environment, a data-type-definition (DTD) schema drives a dynamic business component instantiation and execution framework that integrates documents with data and information created by various applications, potentially operating on several different platforms, enabling complex workflow and collaboration to occur over a communication network such as the Internet. The DTD execution language is preferably an industry specific XML-based tag set that defines business component instantiation, execution, input and output parameters, workflow, user profile, and collaboration specifications for a given task or data in a complex workflow process. Business and data processing components available on systems both within and outside the complex workflow system are called upon to provide the processing, interpretation, and transformation functions for the complex workflow system. The results of such processing are then returned to the complex workflow system for integration within the workflow process. |
| US09742613B2 |
Method and system for I/Q mismatch calibration and compensation for wideband communication receivers
Methods and systems for I/O mismatch calibration and compensation for wideband communication receivers may include receiving a radio frequency (RF) signal in a receiver of a communication device, down-sampling said received RF signal to generate a channel k and its image channel −k at baseband frequencies, determining average in-phase (I) and quadrature (Q) gain and phase mismatch of said channel k and said image channel −k, removing said average I and Q gain and phase mismatch of said channel k and said image channel −k, determining, after said removing said average I and Q gain and phase mismatch, a residual phase tilt of said channel k and said image channel −k, and compensating for said determined residual phase tilt of said channel k and said image channel −k utilizing a phase tilt correction filter. |
| US09742611B2 |
Synchronizing orthogonal frequency division multiplexed (OFDM) symbols in a receiver
In an embodiment, an apparatus includes a buffer to store incoming orthogonal frequency division multiplexed (OFDM) samples. This buffer is configured to output the OFDM samples according to a read pointer that can be adjusted by a sum value corresponding to a sum of a length of a symbol and a feedback value, to align the read pointer with the symbol. In addition, the apparatus further includes a feedback circuit coupled to the buffer to receive the output OFDM samples and generate the feedback value based at least in part on the output OFDM samples. |
| US09742607B2 |
Transmitter and method of transmitting payload data, receiver and method of receiving payload data in an OFDM system
A transmitter transmits payload data using Orthogonal Frequency Division Multiplexed (OFDM) symbols. The transmitter comprises a frame builder configured to receive the payload data to be transmitted and to receive first signalling data for use in detecting and recovering the payload data at a receiver, and to form the payload data and the first signalling data into frames for transmission, the first signalling data forming a part of the frames with the payload data. A modulator is configured to modulate a first OFDM symbol with the first signalling data and to modulate one or more second OFDM symbols with the payload data. A signature sequence processor provides a signature sequence, a combiner combines the signature sequence with the first OFDM symbol, and a transmission unit transmits the first and second OFDM symbols. The signature sequence provided by the signature sequence processor comprises at least one of a first synchronization sequence or a second message sequence, the first synchronization sequence and/or the second message sequence being combined by the combiner with the first OFMD symbol. The first synchronization sequence is provided for a receiver to detect and to recover the first signalling data from the first OFDM symbol and the second message sequence provides message information to the receiver. The message information may be used to convey a specific message to a user such as an emergency warning relating to a natural disaster such as an earthquake or a tsunami warning. |
| US09742605B2 |
OFDM mobile networks
Mobile Networks using Orthogonal Frequency Division Multiplex (OFDM) and or spread spectrum modulation and demodulation techniques process in mobile devices spread spectrum signals into OFDM signals. A first mobile device receives and demodulates a spread spectrum modulated signal into a baseband spread spectrum signal and processes the baseband spread spectrum signal into a first OFDM signal. The first OFDM signal is transmitted to a second mobile device. In the second mobile device the received first OFDM signal is demodulated and processed into a second OFDM signal. The second OFDM signal is transmitted in the mobile network. Alternatively, the first mobile device receives, instead of a spread spectrum signal a modulated OFDM signal. The mobile device has a motion detector which generates a motion detector signal for control of the mobile device. The mobile device has a heart rate sensor and measures the heart rate. |
| US09742601B2 |
Power line carrier/communications with improved immunity for transients and electromagnetic interferences
Power line carriers (PLCs) are susceptible to transients and electromagnetic interference (EMI) on the power line. To address transients and EMI on the power line, an improved power PLC involves transmitting a signal over the power line using a controlled current source, where the current source is modulated by the signal. The current source output is designed to be independent of the voltage on the power line and the load, and thus, is less susceptible to transients and EMI on the power line. The system architecture of the improved PLC also allows for simple, predictable, and flexible termination. In an example implementation in the automotive industry, the improved high frequency PLC may provide a low cost replacement for existing communication interfaces. The improved PLC may consolidate system in-vehicle communication, reduce in-vehicle wiring, provide system flexibility, and decrease vehicle weight and system cost. |
| US09742597B1 |
Decision feedback equalizer
An apparatus includes a decision feedback equalizer configured to receive a parallel signal generated based on a first clock. The decision feedback equalizer includes a first equalization block configured to receive a first symbol of a first set of parallel symbols provided by the parallel signal during a first clock cycle of the first clock. A decision feedback equalization is performed by the first equalization block to the first symbol to provide a first decision to a second equalization block. The second equalization block is configured to receive a second symbol of the first set of parallel symbols and perform a decision feedback equalization to the second symbol using the first decision received from the first equalization block to provide a second decision during the first clock cycle. |
| US09742591B2 |
CSI-RS based channel estimating method in a wireless communication system and device for same
A method is provided for computing a channel quality indicator (CQI) value by a user equipment in a wireless communication system. The method includes configuring, through a higher layer, channel measurement resources defined by channel status information-reference signal (CSI-RS) resource element configuration with non-zero transmission power and subframe configuration, configuring, through the higher layer, interference measurement resources defined by the CSI-RS resource element configuration with zero transmission power and the subframe configuration, and computing the CQI value based on a channel measurement and an interference measurement. The channel measurement is performed by using the channel measurement resources, and the interference measurement is performed by using the interference measurement resources. If two or more channel status information (CSI) subframe sets are configured, the interference measurement for one CSI subframe set of the two or more CSI subframe sets is performed by using the interference measurement resources. |
| US09742590B2 |
Channel state information (CSI) feedback protocol for multiuser multiple input, multiple output (MU-MIMO)
Certain aspects of the present disclosure provide techniques and apparatus for using channel state information (CSI) feedback for multiuser multiple-input multiple-output (MU-MIMO) transmission. For certain aspects, a method of wireless communications generally includes generating a training frame and transmitting the generated training frame. The training frame typically includes first information identifying a group of one or more apparatuses and second information indicating whether each of the apparatuses in the group is to determine at least one characteristic of a channel. For other aspects, a method of wireless communications generally includes receiving a request at an apparatus and transmitting, in response to the received request, a packet using frame aggregation, wherein two or more frames are transmitted in a single transmission using a single header. |
| US09742588B2 |
Methods and systems for selectively processing virtual local area network (VLAN) traffic from different networks while allowing flexible VLAN identifier assignment
Methods and systems for selectively processing VLAN traffic from different networks while allowing flexible VLAN identifier assignment are disclosed. According to one aspect, a layer 2 switch includes a virtual switch identifier data structure that associates a VLAN identifier extracted from a layer 2 frame and a port identifier corresponding to a port on which a frame is received with a virtual switch identifier. The virtual switch identifier is used to select a per-virtual-switch data structure, such as a forwarding table. The per-virtual-switch data structure is used to control processing of the layer 2 frame on a per-virtual-switch basis. The per-virtual-switch data structure may also be updated separately from the data structures assigned to other virtual switches. |
| US09742586B2 |
Intelligent host route distribution for low latency forwarding and ubiquitous virtual machine mobility in interconnected data centers
Techniques are presented for distributing host route information of virtual machines to routing bridges (RBridges). A first RBridge receives a routing message that is associated with a virtual machine and is sent by a second RBridge. The routing message comprises of mobility attribute information associated with a mobility characteristic of the virtual machine obtained from an egress RBridge that distributes the routing message. The first RBridge adds a forwarding table attribute to the routing message that indicates whether or not the first RBridge has host route information associated with the virtual machine in a forwarding table of the first RBridge. The first RBridge also distributes the routing message including the mobility attribute information and the forwarding table attribute, to one or more RBridges in the network. |
| US09742585B2 |
Signaling control among multiple communication interfaces of an electronic device based on signal priority
The present disclosure provides signaling control among multiple communication interfaces of an electronic device based on signal priority. According to an aspect, an electronic device includes multiple communication interfaces. The electronic device also includes a communication controller configured to determine priority of signals to be communicated on different communication interfaces among the plurality of communication interfaces. Further, the communication controller is configured to determine an order of communication of the signals among the different communication interfaces based on the priority of the signals to be communicated. The communication controller is also configured to control communication of the signals among the different communication interfaces based on the determined order of communication. |
| US09742582B2 |
House monitoring system
A house monitoring system includes at least one sensor that detects a predetermined event, a master device that communicates with the sensor, and is connected to a fixed telephone network so as to perform calls to other fixed telephones, and a mobile phone terminal that includes a display/input unit, performs wireless communication with the master device by using a wireless router, and is connected to other mobile phones via a mobile phone network. When the sensor detects the predetermined event, the master device transmits information regarding the sensor having detected the predetermined event to the mobile phone terminal, and the mobile phone terminal displays the information regarding the sensor having detected the predetermined event transmitted from the master device on the display/input unit. |
| US09742579B2 |
System for testing Ethernet paths and links without impacting non-test traffic
A system for testing Ethernet paths or links without adversely impacting non-test traffic. The system includes a test traffic generator that includes a scheduler that determines when a new test packet is generated. The test traffic generator includes a packet creator that builds a test packet and a transmitter for transmitting the test packet via the Ethernet path or link. The packet creator sends the test packet to the transmitter. The traffic generator includes a transmit credit block coupled to the transmitter or to the scheduler. The transmit credit block stores an amount of credits representing a number of bytes that are available to transmit and decrements the amount each time a non-test packet is communicated via the Ethernet path or link. |
| US09742574B2 |
Apparatus for the efficient transmission of multimedia streams for teleconferencing
A peer-to-peer forwarding node supports the operation of a teleconference across a telecommunications network. The telecommunications network comprises a plurality of nodes including one or more source locations and one or more remote locations. The teleconference includes teleconference participants at each of the source and remote locations. The peer-to-peer forwarding node is located at a given one of the plurality of nodes. The peer-to-peer forwarding node comprises a receiver and a transmitter. The receiver receives a request from a telecommunications controller to provide peer-to-peer forwarding of a media signal to be received from a first one of the source locations to a first one of the remote locations and which further receives the media signal from the first one of said source locations. The transmitter forwards the media signal from the first one of the source locations to the first one of the remote locations. |
| US09742573B2 |
Method and apparatus for calibrating multiple microphones
In one embodiment, a method includes capturing sound using a plurality of microphones, wherein the plurality of microphones is associated with a computing system. The method also includes determining energy levels for the plurality of microphones, and determining signal-to-noise ratios (SNRs) for the plurality of microphones. Finally, the method includes selecting a particular microphone of the plurality of microphones based on the energy levels and the SNRs, wherein selecting the particular microphone includes providing audio signals obtained by the particular microphone to the computing system for use. |
| US09742572B2 |
Upstream RF input level scaling
Embodiments include systems and methods for scaling power level of an upstream signal by a device processor of a head-end device in a communication network. In embodiments, the device processor may determine a power level of the signal received at the head-end device from a client device. The device processor may determine a difference between the power level of the received signal and a target power level of an analog-to-digital converter of the head-end device, and may adjust the power level of the received signal at the head-end device based on the determined difference. In embodiments, the device processor may determine a power level of an upstream signal to be received by the head-end device, may determine a difference between the power level of the received signal and the target power level, and may adjust the power level of a received signal at the head-end device based on the determined difference. |
| US09742567B2 |
Secondary elements in a fuzzy vault encoding scheme
The description relates in particular to a method for encoding information represented in the form of a function P, and to a corresponding method for decoding information. The encoding comprises the encoding of secondary information. These methods may be implemented within a context of biometric enrollment and (respectively) biometric authentication.The description also relates to an electronic device, a computer program, and a storage medium for the implementation of such methods. |
| US09742563B2 |
Secure provisioning of secret keys during integrated circuit manufacturing
A method, of an aspect, includes challenging a set of Physically Unclonable Function (PUF) cells, of an integrated circuit device, and receiving a set of PUF bits from the PUF cells in response. A PUF key is generated based on the set of PUF bits. An encryption of the PUF key with an embedded key is output from the integrated circuit device. The integrated circuit device receives an encryption of a fuse key with the PUF key. Fuses of the integrated circuit device are programmed with at least one of the fuse key and the received encryption of the fuse key with the PUF key. Other methods, apparatus, and systems are also disclosed. |
| US09742559B2 |
Inter-module authentication for securing application execution integrity within a computing device
Systems and methods for recognizing and reacting to malicious or performance-degrading behaviors in a mobile device include observing mobile device behaviors in an observer module within a privileged-normal portion of a secure operating environment to identify a suspicious mobile device behavior. The observer module may generate a concise behavior vector based on the observations, and provide the vector to an analyzer module in an unprivileged-secure portion of the secure operating environment. The vector may be analyzed in the unprivileged-secure portion to determine whether the mobile device behavior is benign, suspicious, malicious, or performance-degrading. If the behavior is found to be suspicious, operations of the observer module may be adjusted, such as to perform deeper observations. If the behavior is found to be malicious or performance-degrading behavior the user and/or a client module may be alerted in a secure, tamper-proof manner. |
| US09742558B2 |
Asymmetrical chaotic encryption
Implementations and techniques for asymmetrical chaotic encryption are generally disclosed. One disclosed method for asymmetrical encryption includes determining a ciphertext control block from data, where the ciphertext control block is based at least in part on one or more Chebyshev polynomials. The method also includes encrypting at least a portion of the data into an encrypted ciphertext block, where the encrypted ciphertext block is based at least in part on Logistic Mapping, and in which a final ciphertext includes the encrypted ciphertext block and the ciphertext control block. |
| US09742555B2 |
Encryption/identification using array of resonators at transmitter and receiver
A sender and a receiver includes first and second arrays of coupled oscillators, respectively, that are substantially identically constructed so as to exhibit substantially the same dynamical response to excitation. A chaotic waveform generated at the sender is transmitted to the receiver, which generates a second chaotic waveform, and compares the received waveform with the generated second waveform. If the first and second waveforms match the sender is an authorized sender. An integrated circuit includes an array of coupled oscillators that in combination generate a waveform in response to at least one excitation signal. The array of coupled oscillators represents, in response to application of the excitation signals, a multi-dimensional security key that is shared between the sender of the waveform and the receiver of the waveform. |
| US09742550B1 |
Deskew in a high speed link
Systems and methods for high speed communications are described herein. In certain aspects, the systems and methods include innovative transceiver architectures and techniques for re-timing, multiplexing, de-multiplexing and transmitting data. The systems and methods can be used to achieve reliable high-speed point-to-point communication between different electronic devices, computing devices, storage devices and peripheral devices. |
| US09742546B2 |
Inter-cell interference coordination in a wireless communication system
Disclosed herein is a wireless communication system. More particularly, disclosed herein is a method and apparatus for coordinating and reducing inter-cell interference in a wireless communication system. A method of transmitting channel state information (CSI) measurement resource information by a base station includes determining first and second subframe sets, in which CSI measurement will be performed, among a plurality of downlink subframes, transmitting information indicating the first and second subframe sets to a terminal, and receiving the CSI of each of the first and second subframe sets from the terminal. A subframe belonging to the first subframe set and a subframe belonging to the second subframe set do not overlap, and some of the plurality of subframes do not belong to either of the first and second subframe sets. |
| US09742543B2 |
Acknowledgment mechanisms for OFDMA operation
In an example of wireless communications based on orthogonal frequency-division multiple access (OFDMA), an access point may send a downlink frame to multiple stations. In response, some or all of the stations may transmit their respective uplink frames simultaneously after a predetermined time period. The uplink frames from the stations may be aggregated or multiplexed to form a final uplink frame that is received by the access point. Each of the uplink frames from the stations may include at least a legacy header and an acknowledgment frame. While a legacy header occupies the entire channel bandwidth of its uplink frame, an acknowledgment frame occupies a sub-band assigned to its station, where a sub-band is a portion of the channel bandwidth. Other methods, apparatus, and computer-readable media are also disclosed. |
| US09742542B2 |
Apparatus and method for transmitting muting information, and apparatus and method for acquiring channel state using same
The present disclosure relates to an apparatus and a method for transmitting muting information in a wireless communication system, and to an apparatus and a method for acquiring channel state using same. In an exemplary embodiment, muting information includes: a first data field, having a serving cell for receiving from peripheral cells in a multi-cell environment, at least one of a CSI-RS pattern, the number of CSI-RS antenna ports, a CSI-RS duty cycle, and CSI-RS transmission subframe offset information, and using same for expressing the cycle and the offset of muting subframes, which pertain to information on a resource block that can generate interference between the peripheral cells and CSI-RS; and a second data field for expressing a specific muting pattern, which must be muted within the muting subframes, having either 12 bits or 28 bits that display muting application in a bitmap format. |
| US09742540B2 |
Method and apparatus for transmitting uplink signal
A method and device for transmitting an uplink signal in a wireless communication system A user equipment (UE) sets up a sounding reference signal (SRS) configuration for a first serving cell, the SRS configuration including information for an SRS transmission, and determines an SRS subframe in which an SRS and a physical uplink shared channel (PUSCH) for the first serving cell are simultaneously triggered among a plurality of subframes according to the SRS configuration. The SRS subframe includes a plurality of orthogonal frequency division multiplexing (OFDM) symbols. If an SRS transmission on the SRS subframe for the first serving cell is overlapped with an uplink transmission for a second serving cell, determining, by the UE, whether the SRS is actually to be transmitted in the SRS subframe based on a total uplink transmission power. |
| US09742536B2 |
Method and system for balancing reference signal powers across OFDM symbols
A base station includes a reference signal allocator that allocates a first layer of dedicated reference signals and a second layer of reference signals to the same resource elements in a first resource block. The reference signals are allocated to two adjacent resource elements corresponding to a first OFDM symbol and a second OFDM symbol on a first, second, and third subcarriers of the first resource block. The base station also includes a reference signal multiplexer that multiplexes the first layer with the second layer. A first cover code W1 is applied to the first layer. A second cover code W2, different from the first cover code, is applied to the second layer in a first and third subcarriers, and a variation of the second cover code W2′ is applied to the second layer in a second subcarrier. |
| US09742534B2 |
Radio communication method, radio communication system, radio base station and user terminal
A radio communication system including a plurality of radio base stations and a user terminal that is capable of coordinated multiple point transmission with the plurality of radio base stations is provided, and, in this radio communication system, a radio base station has a generating section that generates parameter information related to downlink signals, a control information generating section that generates downlink control information that includes an indicator to represent specific parameter information, a control section that controls whether or not to configure a bit field for the indicator of the parameter information in the downlink control information, and a transmission section that transmits information as to whether or not the bit field for the indicator of the parameter information is configured, to the user terminal, by higher layer signaling. |
| US09742533B2 |
Avoiding serving cell interruption
Techniques for minimizing the loss of radio signals transmitted on and/or received from serving cells in a multi-carrier system by selectively adapting the time instance at which a wireless terminal: (1) changes its radio frequency (RF) bandwidth or activates a second RF chain or any additional RF chain for measuring on one or more secondary serving cells, and/or (2) performs setup or release of one or more secondary serving cells. An example method, implemented in a radio network node, comprises determining (510) a scheduling instance during which a wireless terminal is expected to be scheduled on at least one cell; and, determining (520) a timing at which to send a setup or release command for at least one secondary cell such that the requested set up or release procedure does not coincide with the scheduling instance. |
| US09742532B2 |
Method, system and device for using terminal identifier
The embodiments of the present invention disclose a method, a system and a device for using a user equipment identity, and the method includes: the network side configures, for a user equipment performing carrier aggregation, the uniform Radio Network Temporary Identity (RNTI)(s) in the cell where the carrier aggregation is performed; the network side and the user equipment perform data reception and transmission using the uniform RNTI(s) configured in the cell where the carrier aggregation is performed. By the invention, a user equipment with carrier aggregation technology is able to perform the data reception and transmission with each cell using the RNTI(s). |
| US09742531B2 |
Demodulation reference signals containing side information for interference cancellation
Embodiments for providing demodulation reference signals to provide side information for interference cancellation are generally described herein. In some embodiments, a sub-frame is prepared comprising two slots and configuring a physical resource block (PRB) for each slot, wherein each PRB comprises twelve Orthogonal Frequency Division Multiplexing (OFDM) subcarriers transmitting for a duration of 7 OFDM symbols per slot. In resource elements on each of three of twelve OFDM subcarriers, two pairs of demodulation reference signals (DMRS) are allocated to form three DMRS sets. Symbols are mapped with a first modulation for the two pairs of demodulation reference signals to three of the twelve OFDM subcarriers for transmission. A second modulation is added to a first of the three DMRS sets and a third modulation is added to a second of the three DMRS sets to indicate side information regarding an interfering signal for use in mitigating the interfering signal. |
| US09742526B2 |
Optimal signal constellation design for ultra-high-speed optical transport in the presence of phase noise
A method to process applicable to coherent optical channels with either linear or nonlinear phase noise includes: splitting a received sequence of data into clusters of points according to a cumulative log-likelihood function from constellation obtained in a previous iteration; generating new constellation points by calculating a center of mass of the clusters of points; repeating until convergence or until a predetermined number of iterations has been reached to determine a signal constellation; and transmitting signals over the coherent optical channels with nonlinear phase noise using the disclosed signal constellation and LDPC-coded modulation concepts. |
| US09742524B2 |
Method and transmitter for channel coding and modulation in the frequency domain of orthogonal frequency-division multiplexing wireless networks
The method comprising: applying, by a transmitter, a Forward Error Correction to an information block to be sent to a receiver and modulating said information block prior to its transmission, wherein the transmitter has knowledge of a channel frequency response seen by the receiver and the applying and modulating are performed at a variable-rate, at the transmitter side, by: transforming the information block into a number of smaller packets denoted as codeblocks fitting the input sizes accepted by the Forward Error Correction; selecting, a set of modulation and coding schemes to be independently applied to each of the codeblocks; including, information about the selected set of modulation and coding schemes within part of physical resources devoted to user data by reserving specific subcarriers and OFDM symbols; and mapping, said information within physical resources devoted to user data and not reserved for said selected set of modulation and coding schemes, first in order of ascending OFDM symbols and then of ascending subcarriers. |
| US09742523B2 |
Determining a high data rate for backchannel communications for initialization of high-speed networks
One embodiment provides a network controller having physical interface (PHY) circuitry that includes transmitter circuitry configured to transmit data frames to a link partner over a channel link. The network controller also includes a link speed cycling module configured to cause the transmitter circuitry to transmit data frames to the link partner using at least one high rate link speed. The network controller also includes an equalization presets module configured to apply at least one equalization preset setting to the transmitter circuitry while the transmitter circuitry is transmitting the data frames to the link partner. The link speed module is further configured to cause the transmitter circuitry to dwell, for a transmitter dwell time period, for the at least one equalization preset setting at the at least one high rate link speed. The transmitter dwell time period allows the link partner to lock on to the transmitted data frames. |
| US09742522B2 |
Jammer suppression for broadcast satellite system services
A system for interference suppression onboard a satellite includes a beamforming module that processes radio-frequency (RF) signals originated from a plurality of antenna elements of an array antenna to generate multiple analog signals. At least one of the analog signals is an anti-interference signal. Analog-to-digital converters convert the analog signals to a number of digital signals. A processing module processes the digital signals to generate a phase and amplitude control signal. A summation module generates one or more composite signals with reduced interference. |
| US09742521B2 |
Transmission device with mode division multiplexing and methods for use therewith
Aspects of the subject disclosure may include, for example, a transmission device that includes at least one transceiver configured to modulate data to generate a plurality of first electromagnetic waves. A plurality of couplers are configured to couple at least a portion of the plurality of first electromagnetic waves to a transmission medium, wherein the plurality of couplers generate a plurality of mode division multiplexed second electromagnetic waves that propagate along the outer surface of the transmission medium. Other embodiments are disclosed. |
| US09742515B2 |
Reference signal detection
Aspects of the disclosure are related to identifying whether an apparatus (e.g., base station, access point, etc.) is transmitting using a CRS based transmission scheme or a UE-RS based transmission scheme. Such detection may be necessary for PDSCH interference cancellation (IC) of a neighboring cell since a UE may not know which transmission scheme is used by the neighboring cell. For instance, the UE may know the transmission scheme of the serving cell, but the UE may not know the transmission scheme of a neighboring non-serving cell. As such, aspects of the disclosure provide for a blind detection algorithm to identify or determine a transmission mode or transmission scheme of a neighboring cell to then apply interference cancellation (IC) to an interfering signal received from the neighboring cell. |
| US09742510B2 |
Packet detection method based on noise power estimation using orthogonal sequence, transmitter, and receiver
A packet detection method of a receiver estimates noise power based on received samples and an orthogonal sequence that is orthogonal to a preamble sequence of a transmitter. The method verifies whether a packet is present in a radio channel based on the noise power. Also provided is a transmitter that selects a preamble sequence, modulates a transmission packet, and transmits the modulated transmission packet for reception by such a receiver. |
| US09742504B2 |
Movable barrier operator with signal translation module
The present invention is generally a movable barrier system that employs a movable barrier operator with a signal translation module, which enhances the quality of communications between wired components of a movable barrier system, including long distance wired communications between controllers and position sensors. In an exemplary embodiment, position sensors comprising encoders are coupled to translation module for reducing electromagnetic interference or noise from various components that may otherwise interfere with the communication; error detection and error correction means may be further implemented to facilitate diagnostic monitoring of the system from a monitoring device. |
| US09742501B2 |
Optical communication system and optical transmission device
The present invention relates to an optical communication system and an optical transmission device. By changing the ratio between the first segment and the segment or/and the amplitude of the second segment, the digital signal is modulated and transmitted in the form of an optical signal. Then a solar panel, which is used as the receiver for the optical signal, can receive the optical signal and give directly the one or more digital signal without demodulation. Thereby, the costs of using a solar panel as the optical receiver may be reduced and the transmission rate may be enhanced. |
| US09742491B2 |
Apparatus and method for monitoring in-band OSNR
An apparatus and a method for monitoring in-band OSNR (Optical Signal-to-Noise Ratio) which monitors the in-band OSNR by using two parallel Mach-Zehnder-interferometers with different optical time delays are disclosed. The apparatus and method can be resistant to chromatic dispersion, polarization mode dispersion and polarized noise, can measure the coherence characteristics of the signal without removing the noise, and can be manufactured into a semiconductor integrated device and be applied in the future high-speed optical network. |
| US09742490B1 |
System and method for automatic bandwidth management
Systems and methods for automatically managing the bandwidth requirements of application workloads may include learning the bandwidth requirements using historical data, predicting the required bandwidth for a time interval and provisions the services to deliver the appropriate bandwidth to the applications. Systems and methods for automatically managing the bandwidth requirements of application workloads may also include monitoring for the actual bandwidth requirements of the applications and adapt dynamically to changing requirements. |
| US09742485B2 |
Providing network connectivity and access to content and communications via moving objects
Various techniques for providing network connectivity are described herein. In one example, a moving object includes an uplink device of the moving object to connect the moving object to a publicly available computer network. The moving object also includes a downlink device of the moving object to be communicatively coupled to a remote device at a specific segment along a route of the moving object. The remote device is to provide data received via the downlink device to a user. The moving object also further includes a cache store communicatively coupled to the uplink device and the downlink device. Implementations include the use of commercial airplanes for providing connectivity via intermittent access and refreshing of a cache store that makes content available to end users. |
| US09742480B1 |
Channel-state information determination in wireless networks
A method for channel-state information determination in a wireless network comprises determining an initial channel-state information for a wireless channel based on a search of a plurality of sets of precoding codebook elements stored in a multiple input multiple output user equipment (UE) and determining a subsequent channel-state information based on the initial channel-state information. |
| US09742479B2 |
Method and apparatus for detecting an abnormal antenna condition
A method and mobile transceiver for asset tracking which detects an abnormal antenna condition (such as damage or tampering which detects damage or tampering suspected damage or tampering) is provided. The mobile transceiver of the present disclosure comprises a cellular transceiver and a satellite receiver, each having an internal antenna and external antenna. The mobile transceiver detects an abnormal antenna condition, and can switch from the external antenna to the internal antenna, or vice versa, when an abnormal antenna condition is detected. |
| US09742477B2 |
Data transmission method for multi-antenna system, and device
Embodiments of the present invention provide a data transmission method for a multi-antenna system, and a device. The method includes: performing first precoding processing on to-be-sent data in a first antenna direction of a multi-antenna system to generate first data; performing second precoding processing on the first data in a second antenna direction of the multi-antenna system to generate second data; and sending the second data to a receive node through each antenna port of the multi-antenna system; wherein: when the first precoding processing is first transmit diversity processing, the second precoding processing is second transmit diversity processing or second transmit spatial multiplexing processing; when the first precoding processing is first transmit spatial multiplexing processing, the second precoding processing is second transmit diversity processing. The method and the device are used to send data by using antennas in multiple antenna directions in the multi-antenna system. |
| US09742476B2 |
Uplink training for MIMO implicit beamforming
In a method for beamforming in a multiple input multiple output (MIMO) communication system, a data unit is received from a communication device via a MIMO communication channel, and it is determined whether the data unit satisfies one or more selection criteria. Further, when it is determined that the data unit satisfies the one or more selection criteria, the data unit is selected to be used in developing a steering matrix for transmitting data units to the communication device. |
| US09742473B2 |
Apparatus and method for using near field communication and wireless power transmission
An apparatus and method of using near field communication (NFC) and wireless power transmission (WPT) are provided. A power receiving apparatus includes a resonator configured to receive a power and to output the power. The power receiving apparatus further includes a near field communication (NFC) receiver configured to perform wireless communication using the power output by the resonator. The power receiving apparatus further includes a wireless power transmission (WPT) receiver configured to supply a voltage using the power output by the resonator. The power receiving apparatus further includes a connecting unit configured to selectively connect the resonator to either the NFC receiver or the WPT receiver. The power receiving apparatus further includes a mode selector configured to control the connecting unit to selectively connect the resonator to either the NFC receiver or the WPT receiver based on the power output by the resonator. |
| US09742462B2 |
Transmission medium and communication interfaces and methods for use therewith
Aspects of the subject disclosure may include, for example, a system for receiving first electromagnetic waves via a transmission medium without utilizing an electrical return path, and inducing second electromagnetic waves at an interface of the transmission medium without the electrical return path. In an embodiment, the first and second electromagnetic waves have a non-optical frequency range. Other embodiments are disclosed. |
| US09742460B2 |
System and method for generating exact symbol error rates of frequency-hopped signals
A system and method for transmitting data over a wireless communication network. The method broadly includes generating a frequency hopping pattern spanning a plurality of time hops and a plurality of signal frequencies; generating a signal including a number of data symbols, the signal incorporating the frequency hopping pattern such that the symbols are distributed across the signal frequencies according to the frequency hopping pattern; transmitting the signal from a transmitting unit to a receiving unit over the wireless communication network; and generating an exact symbol error rate for the signal as received by the receiving unit. |
| US09742459B2 |
Electronic device having sensors and antenna monitor for controlling wireless operation
An electronic device may be provided with wireless circuitry. Control circuitry may be used to adjust the wireless circuitry. The wireless circuitry may include an antenna that is tuned using tunable components. The control circuitry may gather information on the current operating mode of the electronic device, sensor data from a proximity sensor, accelerometer, microphone, and other sensors, antenna impedance information for the antenna, and information on the use of connectors in the electronic device. Based on this gathered data, the control circuitry can adjust the tunable components to compensate for antenna detuning due to loading from nearby external objects, may adjust transmit power levels, and may make other wireless circuit adjustments. |
| US09742455B1 |
Transmission dock of electronic device
A transmission dock for an electronic device includes a casing and a floatable connecting component. The casing includes a receiving chamber and two first limiting structures. A through opening is disposed at the bottom of the receiving chamber. The first limiting structures flank the through opening. The floatable connecting component includes a body, a transmission interface, and two second limiting structures. The body is movably disposed in the through opening. The transmission interface is disposed on the body. The second limiting structures are disposed on two opposing sides of the body, respectively. The second limiting structures and the first limiting structures moveably mate with each other, respectively, and limit each other, respectively. |
| US09742446B2 |
High efficiency linearization power amplifier for wireless communication
A predistortion system for linearizing the output of a power amplifier includes a first signal representative of an RF modulated signal and a feedback signal representative of nonlinear characteristics of a power amplifier. The system also includes a predistortion controller, comprising at least one lookup table, adapted to receive the first signal and the feedback signal and to generate a correction factor for correcting the nonlinear characteristics of the power amplifier and combining logic which combines the RF modulated signal with a signal corresponding to the correction factor and supplies it to the power amplifier to linearize the output of the power amplifier. |
| US09742441B2 |
Apparatus and methods of accessing all channels of a superheterodyne receiver simultaneously
An apparatus and method associated with exploiting a characteristic in super-heterodyne receivers such that a modulated signal will be received on all channels simultaneously regardless of the channel selected on the receiver. |
| US09742439B1 |
Method and device for forward error correction decoder system utilizing orthogonality of an H matrix
A method and apparatus for a quasi-cyclic low density parity check (QC-LDPC) decoder utilizes a parity check matrix (H matrix) having a matrix value for each row and column position in the matrix. Each matrix value is associated with an initial soft information element where, for each one of the matrix values associated with a constrained row, the one of the matrix values is constrained to a set of constraint values associated with a set of initial soft information elements. The set of initial soft information elements excludes a number of soft information elements that immediately precede a first initial soft information element. The first initial soft information element is associated with a selected first matrix value associated with a first row that immediately precedes the constrained row, and with the same column as the one of the matrix values in the constrained row. |
| US09742438B2 |
Method and apparatus for cipher detection
An embodiment of a method and apparatus for ciphering data. Data is provided for ciphering. The data is ciphered in a plurality of steps. For each step, determining an encoding for error detection of the data being processed within the step. Determining an output error detection encoding for the step. Processing data of the round to provide output error detection encoding. Then, verifying the encoding against a determined output error detection encoding. If the output error detection encoding is not the same as the determined error detection encoding, providing a signal indicating the presence of an error within the cipher process. |
| US09742435B1 |
Multi-stage data compression for time-series metric data within computer systems
The current document is directed to a multi-stage metric-data compression method and subsystem for compressing metric data collected and stored within distributed computing systems to facilitate computer-system management and administration. In a described implementation, metric data is partitioned into constant metric data, low-variability metric data, and high-variability metric data. High-variability metric data is compressed by identifying a set of basis metrics, or independent metrics, with respect to which a remaining set of dependent metrics can be expressed using coefficient multipliers. The high-variability metric data can then be stored as a set of independent metrics and set of coefficients, along with a small amount of additional data. |
| US09742427B2 |
Electrical circuit
An electrical circuit includes a signal processing chain and a controller. The signal processing chain includes an integrator configured to integrate an input signal over an integration time. The controller is connected to a signal output of the signal processing chain to receive and evaluate an output signal of the signal processing chain. The controller is further configured to adapt the integration time based on the output signal. |
| US09742426B2 |
Signal transfer function equalization in multi-stage delta-sigma analog-to-digital converters
Typically, complex systems require a separate and expensive equalizer at the output of an analog-to-digital converter (ADC). Rather than providing a separate equalizer, the effective Signal Transfer Function (STF) of a Multi-stAge noise SHaping (MASH) ADC can be modified by leveraging available digital filtering hardware necessary for quantization noise cancellation. The modification can involves adding calculations in the software previously provided for computing digital quantization noise cancellation filter coefficients, where the calculations are added to take into account equalization as well. As a result, the signal transfer function can be modified to meet ADC or system-level signal-chain specifications without additional equalization hardware. The method is especially attractive for high-speed applications where magnitude and phase responses are more challenging to meet. |
| US09742425B2 |
Rotation detector and rotation detection method
A rotation detector detecting rotation of a rotor, based on a signal produced according to rotation of the rotor, having a waveform according to a rotational cycle thereof, includes a signal obtaining unit to obtain two signals having phases different from each other; a vector operating unit to determine a vector according to a rotational angle of the rotor, based on the two signals; and a rotation detecting unit to detect rotation of the rotor, based on the vector. The two signals are produced from two elements located at positions farthest in a rotational angle of the rotor among plural rotation detecting elements located at positions different from each other. |
| US09742412B1 |
Low power wireless receiver for congested networks operating with beacon frames
A wireless receiver has a preamble detection apparatus and method which waits until the expected arrival of a beacon frame, after which power is cyclically applied during a preamble detection interval and a sleep interval until a preamble is detected. During the preamble detection interval, power is applied to receiver components, and during the sleep interval, power is not applied. The duration of the preamble detection interval is equal to a preamble sensing interval, and if a preamble is detected, power remains applied to a preamble processor for a preamble processing interval. The duration of the sleep interval is the duration of a long preamble less the sum of two times the preamble detection interval plus the preamble processing interval. Phase lock loop (PLL) power is applied a PLL settling time prior to and during the preamble detection interval. |
| US09742411B1 |
Simultaneous economic dispatch and frequency regulation of power systems
Various examples are provided for feedback control of power systems. The feedback control can provide simultaneous frequency regulation and economic operation of a power system. In one example, a method includes obtaining a frequency difference associated with a generator of a power system; determining an output power adjustment based at least in part upon the frequency difference and a cost function associated with the generator; and providing a power command to a secondary frequency control of the generator, the power command based upon the output power adjustment. In another example, a generator control system includes a primary frequency controller configured to control frequency droop of a generator of a power system; and a secondary frequency controller configured to adjust output power of the generator based at least in part upon a frequency difference associated with the generator and a cost function associated with the generator. |
| US09742408B1 |
Dynamic decode circuit with active glitch control
A dynamic decode circuit for decoding a plurality of input signals comprises a decoder that decodes the plurality of input signals to produce a result at a first node, the result is propagated to a second node while an evaluation clock is active by a pair of serially connected transistors consisting of a transistor receiving an evaluation clock at its gate and a transistor receiving the first node at its gate, the interconnection of the pair of serially connected transistors is precharged when the evaluation clock is inactive to provide a delay between the end of the active evaluation clock and the beginning of the precharge. |
| US09742402B1 |
Keyswitch and keyboard with distance detecting function
A keyboard with a distance detecting function includes a plurality of keyswitches, and each keyswitch includes a keycap, a base, a supporting component, a recovering component and a distance detecting unit. The base has a guide slot structure. The supporting component has a first end connecting to the keycap, and a second end movably assembled with the guide slot structure. The recovering component is disposed between the supporting component and the guide slot structure. The distance detecting unit is detachably disposed on the base, and adapted to detect a movement of the keycap relative to the base for determining whether the keyswitch is actuated. |
| US09742396B2 |
Core voltage reset systems and methods with wide noise margin
Presented systems and methods facilitate efficient reset operation. In one embodiment, a system comprises a core domain portion an I/O domain portion and a core reset I/O by-pass component. The core domain portion is configured to operate at a nominal core domain voltage level. The I/O domain portion configured to operate at a nominal I/O domain voltage level. The core reset I/O by-pass component configured to forward a reset indication to the core domain independent of the I/O domain. In one exemplary implementation the core reset I/O by-pass component is operable to receive an input reset indication at a high domain voltage level and to convert the input reset indication to a core reset signal that is less than or substantially equal to the nominal core domain voltage, wherein the high domain is voltage higher than the core domain voltage level. |
| US09742391B2 |
Single-chip multi-domain galvanic isolation device and method
An integrated circuit, including: at least three integrated circuit portions mutually spaced on a single electrically insulating die, the integrated circuit portions being mutually galvanically isolated; and signal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween. |
| US09742389B2 |
Semiconductor device and control method thereof
A semiconductor device includes a switching element chip, in which a switching element is formed; a first sensing element, which is provided in the switching element chip and is configured to detect first output voltage based on an operating current of the switching element; a second sensing element, which is provided outside the switching element chip and is configured to detect second output voltage based on the operating current of the switching element; and a control circuit, which detects the operating current based on the second output voltage and interrupts the switching element, based on the first output voltage of the first sensing element and the detected operating current, when the switching element is overheated. |
| US09742387B2 |
Voltage comparator
The present disclosure is applicable to electronic fields, and provides a voltage comparator. The voltage comparator includes a first branch, a second branch and a third branch. The first branch and the second branch both have self-biasing capabilities, and require no dedicated bias circuit. Under the same power voltage, the static power consumption of the voltage comparator is relatively low; fewer the power consuming branches exist in the circuit, and the reliability is high under low power consumption. |
| US09742383B2 |
Semiconductor integrated circuit
According to one embodiment, a semiconductor integrated circuit comprises: a first flip-flop including a first input circuit, a first latch, a second latch, and a first output circuit; a second flip-flop including a second input circuit, a third latch, a fourth latch, and a second output circuit; and a clock buffer configured to output a common clock signal to the first flip-flop and the second flip-flop. A first output terminal of the second latch is coupled to an input terminal of the first output circuit, and a second output terminal of the second latch is directly coupled to an input terminal of the second input circuit. |
| US09742379B2 |
Voltage clamp
A voltage clamp circuit which operates using a voltage controlled current source where the change of the polarity of the voltage controlled current source controls whether it is clamping or not. While clamping, the stability of the control loop uses the capacitance of the output to create and single pole roll-off of the loop gain and while not clamping, uses the capacitance of the circuit which sets the clamping voltage to produce the roll-off. The circuit operates in a linear fashion both while clamping and not clamping, which allows for a faster response when clamping is needed. |
| US09742373B2 |
Method of manufacturing a temperature-compensated micromechanical resonator
A method of making a temperature-compensated resonator is presented. The method comprises the steps of: (a) providing a substrate including a device layer; (b) replacing material from the device layer with material having an opposite temperature coefficient of elasticity (TCE) along a pre-determined region of high strain energy density for the resonator; (c) depositing a capping layer over the replacement material; and (d) etch-releasing the resonator from the substrate. The resonator may be a part of a micro electromechanical system (MEMS). |
| US09742368B2 |
Driver
A driver suitable for driving a power amplifier is provided. The driver includes a voltage buffer circuit and a voltage transforming circuit. The voltage buffer circuit receives an input signal, buffers the input signal, and outputs a first output signal. The voltage transforming circuit receives the first output signal and outputs a second output signal to the power amplifier, in which an equivalent inductance of the voltage transforming circuit and an input capacitance of the power amplifier are arranged to make the voltage buffer circuit have a voltage gain approximated to 1. |
| US09742365B1 |
Doherty amplifier
A multistage linear power amplifier receiving an input signal. The multistage linear power amplifier comprises a plurality of Class-AB amplifiers connected in a cascade configuration. The plurality of Class-AB amplifiers amplifies the input signal to generate an amplified input signal. At least one of the plurality of Class-AB amplifiers is biased such that the multistage linear power amplifier emulates a Class-C amplifier. |
| US09742364B2 |
System and method for a low noise amplifier module
In accordance with an embodiment, a circuit includes a low noise amplifier transistor disposed on a first integrated circuit, a single pole multi throw (SPMT) switch disposed on a second integrated circuit, and a bypass switch coupled between a control node of the low noise amplifier transistor and an output node of the low noise amplifier transistor. The SPMT switch couples a plurality of module input terminals to a control node of the low noise amplifier transistor, and the bypass switch including a first switch coupled between the control node of the low noise amplifier transistor and an intermediate node, a second switch coupled between the intermediate node and the output node of the low noise amplifier transistor, and a third switch coupled between the intermediate node and a first reference node. The first integrated circuit and the second integrated circuit are disposed on a substrate. |
| US09742362B2 |
Semiconductor device and operation method thereof
In a semiconductor device, power consumption is reduced. Further, a standby circuit is formed of a few elements, and thus increase in the circuit area of the semiconductor device is prevented. The standby circuit provided in the semiconductor device is formed of only one transistor and voltage supplied to the transistor is switched, whereby output current of the semiconductor device is controlled. As a result, the output current of the semiconductor device in a standby state can be substantially zero, so that the power consumption can be reduced. By using an oxide semiconductor for a semiconductor layer of a transistor, leakage current can be suppressed as low as possible. |
| US09742358B2 |
Power amplification circuit
A power amplification circuit includes: a first amplification transistor, a first signal being input to a base or gate thereof and a second signal obtained by amplifying the first signal being output from a collector or drain thereof; and a first bias circuit that supplies a first bias current to the base or gate of the first amplification transistor. The first bias circuit includes a first transistor that outputs the first bias current from an emitter or source thereof, and a first control circuit that controls an electrical connection between the emitter or source of the first transistor and ground. The first control circuit includes a first resistance element and a first switch element, which are connected in series with each other. The first switch element is switched on in the case of a first power mode and is switched off in the case of a second power mode. |
| US09742351B2 |
Apparatus and method for collecting state information of solar module
The present invention provides an apparatus and method for collecting state information of a solar module, which map a physical shape of a solar module, a string, and an array to a network layer of a modem, a repeater, and a gateway, and receive information about a solar power generation state from a node of an activated lower layer, thereby increasing an efficiency of data collection. |
| US09742350B2 |
Solar panel grounding lug assemblies and systems
Solar panel grounding lug assemblies and systems are disclosed. The grounding lugs may include a top member having a grounding wire channel and an aperture, a bottom member having an aperture, and a fastener inserted through the apertures. The fastener may couple the top member to the bottom member and secure a grounding wire within the grounding wire channel. |
| US09742343B2 |
Electric pump
An electric oil pump constructed by integrally combining an electric motor with an oil pump, wherein the electric motor is composed of a motor casing, a drive shaft that is disposed in a motor housing chamber formed inside the motor casing and is rotatably supported, a rotor that is disposed on the drive shaft, and a stator that is located inside the motor housing chamber and is attached to the motor casing. The electric oil pump is equipped with an internal controller that controls application of electric power to the stator so as to cause the drive shaft to be driven to rotate via the rotor. |
| US09742338B2 |
Dual power mode drive
A method of controlling a motor drive having a normal mode wherein a DC link voltage is charged using an AC (e.g. mains) power supply and an emergency mode wherein the DC link voltage is charged using a DC supply (e.g. from a battery) is described. In the normal mode of operation, if the DC link voltage falls below a threshold indicative of the AC power supply being lost, the emergency mode is entered, typically following an intervening coast mode (during which the motor is not driven). Similarly, in the emergency mode, if the DC link voltage rises above a threshold indicative of the AC power supply being restored, the normal mode is entered, typically following an intervening coast mode. |
| US09742336B2 |
Air conditioner with variable power converter
A power converter and an air conditioner having the same, in which the power converter includes a rectifying unit configured to rectify an input AC current and an interleave converter that has a plurality of converters and that is configured to convert rectified output from the rectifying unit to DC power and output the converted DC power. The power converter also includes a capacitor connected to an output terminal of the interleave converter, and a converter controller configured to control the interleave converter. The converter controller controls the interleave converter by calculating a load level of both terminals of the capacitor and changing a number of operating converters in the plurality of converters of the interleave converter based on the determined load level of both terminals of the capacitor. |
| US09742334B2 |
Electric motor system for vehicles and method of adjusting coil winding number of electric motor for vehicles
Provided is an electric motor system for vehicles, which adjusts a coil winding number of a vehicle electric motor. The electric motor system for vehicles includes an inverter configured to include a power switching circuit connected to a vehicle battery in parallel and a coil switching circuit connected to the power switching circuit, wherein the coil switching circuit receives and outputs a driving current having different phases which is generated according to a switching operation of the power switching circuit, an electric motor configured to include a plurality of winding coils that receive the driving current and are wound at multi stages, and a controller configured to control a switching operation of the coil switching circuit to adjust a winding number of each of the plurality of winding coils to a maximum coil winding number by serially connecting all of the plurality of winding coils in a low speed driving mode and to adjust the winding number of each of the plurality of winding coils to a minimum coil winding number by serially connecting some of the plurality of winding coils in a high speed driving mode. |
| US09742333B2 |
Motor control device
To achieve smooth switching of control without fluctuations in speed and torque, an excitation current command is allowed to transit linearly or in accordance with the function of speed between a value under sensorless vector control and a value under low-speed region control in accordance with a speed command or estimated speed in a speed region where the control is switched or in an adjacent speed region where sensorless vector control is performed. Therefore, abrupt variations in excitation current are reduced before and after the switching of the control. |
| US09742331B2 |
Doubly-fed, variable-speed, dual-voltage AC generation and distribution systems
A generation and distribution system includes an adjustable-speed prime mover and a doubly-fed asynchronous alternating-current (AC) generator driven by the prime mover and having a first poly-phase circuit, e.g., a stator, and a second poly-phase circuit, e.g., a rotor. The system further includes a first AC bus electrically coupled to the first poly-phase circuit configured to deliver AC power at a first AC voltage to multiple loads, and a second AC bus connected to the second poly-phase circuit configured to deliver AC power at a second AC voltage to another group of loads, the second AC voltage being lower than the first. The system includes a poly-phase transformer having first windings electrically coupled to the first AC bus and having second windings electrically coupled to the second AC bus, and a poly-phase AC-to-AC electronic converter circuit electrically coupled between the second poly-phase circuit and the second AC bus. |
| US09742330B2 |
Motor control method and apparatus
A motor control apparatus includes a high-resolution encoder for position control and a low-resolution encoder for velocity control, position control means for generating a velocity command in accordance with a difference between a given position command and the output of the high-resolution encoder, and velocity control means for generating a current command in accordance with a difference between the velocity command and a detected velocity that is based upon the output of the low-resolution encoder. A velocity control cycle based upon the velocity control means is made faster than a position control cycle based upon the position control means. |
| US09742329B2 |
Current regulation in motors
A motor controller that includes a processing device and a drive circuit. The drive circuit may include a plurality of switches, a motor winding, and a current sensor coupled together in an H-bridge configuration. The processing device is configured to cause a drive current to drive through the motor winding for a minimum amount of time. The processing device is also configured to compare the current through the current sensor to a threshold value at the minimum amount of time. The processing device is also configured to, based on the current being at or above the threshold value at the minimum amount of time, stop the drive current for an off period of time and cause a first decay of the current for a first percentage of the off period of time and a first slow decay for a second percentage of the off period of time. |
| US09742327B2 |
Motor drive controller
A motor drive controller includes: a motor driver that applies a voltage to each phase of a motor to rotate; a rotational position detector that detects rotational position of the motor and generates rotational position information indicating the rotational position; and a controller that outputs, to the motor driver, driving control signals for repeatedly adjusting an advance angle and a lag angle at energization switching of the each phase of the motor in a prescribed pattern based on the rotational position information generated by the rotational position detector. |
| US09742319B2 |
Current controller for an electric machine
A current controller for an electric machine that includes an input, an output, a threshold generator and a comparator. The threshold generator stores a scaling factor and includes a PWM module that operates on a reference voltage to generate a threshold voltage. The duty cycle of the PWM module is then defined by the scaling factor. The comparator compares a voltage at the input against the threshold voltage and causes an overcurrent signal to be generated at the output when the voltage at the input exceeds the threshold voltage. |
| US09742316B2 |
Apparatus and means for starting of AC motors, algorithm for self-adapting motor start with soft-starter
The invention relates to a method of starting an electric motor (10) powered by an alternating power supply voltage, said method consisting of supplying current to the motor (10) with a delay tret, during each period of the power supply voltage. The starting method comprises a first sequence in which the following steps are carried out during each nth period of the power supply voltage, where n is an integer number greater than 0: a) determine the value of a variation of a resistance of the electric motor during the previous n periods of the power supply voltage; b) compare said value of the variation of the determined motor resistance with a first threshold resistance value; c) if the value of the variation of the motor resistance is less than the first threshold value, reduce tret. The invention also relates to a starter device and a computer program. |
| US09742310B2 |
Apparatus and method for AC to DC electrical conversion
An electrical conversion apparatus is described which comprises a bridge rectifier 10 having an input side and an output side, and a switched capacitor line 16 arranged in parallel with the output side of the bridge rectifier 10, the switched capacitor line 16 comprising a capacitance 18 and a switch 20 arranged in series with one another so that the switch 20 can control charging and discharging of the capacitance 18. A method of electrical conversion is also disclosed wherein when the output voltage of the bridge rectifier is above a threshold level 26 and is rising the switch is closed so that the capacitance charges and a load is satisfied from the output of the bridge rectifier, when the output of the bridge rectifier is above the threshold level 26 and is falling the switch is opened so that the capacitance is isolated from the load, the load still being satisfied by the output of the bridge rectifier, and when the output of the bridge rectifier is below the threshold level 26, the switch is closed so that the load is served by discharge of the capacitance. The threshold level 26 may be dynamically controlled, for example in response to the output of a monitor circuit 32. |
| US09742309B2 |
Waveform shape discriminator
A waveform shape discriminator includes a running maximum finder circuit coupled to receive a sense signal. The running maximum finder circuit is coupled to update a running maximum signal in response to the sense signal. A first comparator is coupled to receive the sense signal and a running maximum threshold signal that is representative of the running maximum signal. A search window block is coupled to receive the input signal to detect a search window in the sense signal. An output circuit is coupled to an output of the first comparator and an output of the search window block to determine a presence of a waveform shape in the sense signal within the search window in the sense signal. |
| US09742307B2 |
Rectifying circuit for high-frequency power supply
Disclosed is a rectifying circuit for high-frequency power supply that rectifies an alternating voltage at a high frequency equal to or higher than 2 MHz, the rectifying circuit for high-frequency power supply including a current doubler rectifier circuit that rectifies the alternating voltage inputted from a reception antenna for power transmission 10, a partial resonant circuit that causes the current doubler rectifier circuit to perform partial resonant switching in a switching operation at the time of rectification, a matching functional circuit that has a function of matching a resonance condition to that of the reception antenna for power transmission 10, and a function of matching the resonance condition to that of the partial resonant circuit, and a smoothing functional circuit that smooths the voltage rectified by the current doubler rectifier circuit into a direct voltage. |
| US09742302B2 |
Zero-crossing detection circuit and switching power supply thereof
A zero-crossing detection circuit can include: a state judging circuit that generates a judging signal based on whether a body diode of a synchronous power switch is conducting when the synchronous power switch is off; a regulation voltage generator that reduces a regulation voltage when the judging signal indicates that the body diode is conducting, and increases the regulation voltage when the judging signal indicates that the body diode is not conducting, where a detection voltage includes a sum of the regulation voltage and a voltage at a first terminal of the synchronous power switch; and a comparison circuit that compares the detection voltage against a voltage at a second terminal of the synchronous power switch, and generates a zero-crossing detection signal that is activated to turn off the synchronous power switch when the detection voltage equals the voltage at the second terminal of the synchronous power switch. |
| US09742301B2 |
Electric power conversion device and control circuit determining occurrence of an abnormality state
An electric power conversion device has a transformer, a DC-AC conversion circuit, an AC-DC conversion circuit and a control circuit. The control circuit calculates an input current instruction value (Iref) based on a difference value (ΔV) between an output voltage (Vout) of the AC-DC conversion circuit and an output voltage instruction value (Vref). A comparator compares an input current (Iin) of the DC-AC conversion circuit with the value (Iref). The DC-AC conversion circuit is controlled by the comparison result of the comparator. The control circuit correctly determines an occurrence of an abnormality state of the electric power conversion device based on the operation state of the comparator, the difference value (ΔV) between the output voltage (Vout) of the AC-DC conversion circuit and the output voltage instruction value (Vref), and the input voltage (Vin) of the DC-AC conversion circuit without using any output current of the AC-DC conversion circuit. |
| US09742299B2 |
Insulated synchronous rectification DC/DC converter
A synchronous rectification controller is arranged on the secondary side of an insulated synchronous rectification DC/DC converter. The synchronous rectification controller controls a synchronous rectification transistor M. An automatic shutdown circuit judges, based on the voltage VDS across the synchronous rectification transistor, whether the operation mode of a primary-side controller is a burst mode or a non-burst mode. When judgment has been made that the operation mode is the burst mode, the automatic shutdown circuit instructs a driver to suspend the switching of the synchronous rectification transistor M. |
| US09742297B2 |
Power delivery device, AC adapter and electronic apparatus
A power delivery (PD) device includes: an AC/DC converter connected to an AC input, the AC/DC converter configured to change the AC input to a desired voltage value to be output in accordance with a first voltage changing control signal supplied from outside; and a DC/DC converter connected between an output of the AC/DC converter and a DC output, the DC/DC converter configured to change the output from the AC/DC converter to a desired voltage value to be output as a DC output in accordance with a second voltage changing control signal supplied from outside, wherein the AC/DC converter at a previous stage and the DC/DC converter at a subsequent stage are interlocked to change the output voltage to desired target voltage. There can be provided the PD device capable of delivering power with high power efficiency over the wide voltage ranges. |
| US09742296B2 |
Isolated DC-DC power conversion circuit system with circulating current reduction
The present invention provides a power conversion circuit system in which a circulating current can be reduced by accurately detecting the circulating current, to thereby improve efficiency in power conversion. The power conversion circuit system includes a power conversion circuit composed of a primary conversion circuit having left and right arms and a secondary conversion circuit having left and right arms, and a control circuit for controlling switching of switching transistors in the primary and secondary conversion circuits. The control circuit detects the circulating current at at least one of timings lagged by π/2+φ/2 from at least either a peak timing or a valley timing in a carrier counter where φ represents a difference in phase between the primary and secondary conversion circuits, and performs feedback control for reducing the detected circulating current to zero. |
| US09742294B2 |
Power converter controller utilizing external resistor for programming operating paramater during startup
A controller for use in a power converter includes an initialization circuit coupled to a sense terminal coupled to an external resistor to receive a sense voltage from external resistor during a startup mode of the power converter. The sense terminal is coupled to sense an output current of the power converter after the startup mode of the power converter is complete. A decoder circuit is coupled to receive the sense voltage from the initialization circuit during the startup mode of the power converter. The decoder circuit is coupled to sense a voltage across an external resistor during the startup mode of the power converter to determine a value of the external resistor to set an operating parameter of the power converter in response to the value of the external resistor. |
| US09742293B2 |
Power supply and method of power supplying
A power supply and a method of power supplying for converting an external alternating power into an output power with appropriate voltage and power are disclosed. The power supply includes an input charging unit, an input filtering unit, a regulating unit, a transformer, a controller, an output unit, an output capacitor, a switching unit and a feedback unit. The regulating unit is connected to the input filtering unit and comprises a regulating capacitor and a regulator connected in series. The regulator is controlled by the controller to perform one of the working modes including initial open circuit, power on conduction, short circuit normal operation and over-voltage open circuit protection. Therefore, the present invention overcomes the problem of inrush current upon powering on, and particularly, the controller performs digital operation with flexibility to meet actual requirements by updating appropriate firmware of software program. |
| US09742288B2 |
Output-side controller with switching request at relaxation ring extremum
A control circuit for use in an isolated power converter includes an output-side first controller having a switch control signal generator and an extremum locator. The switch control signal generator communicates a control signal to a second controller on the input side of the power converter via an isolated interface to initiate a transition of a switch from an OFF state to an ON state. The extremum locator enables the switch control signal generator to communicate the control signal in response to an oscillating voltage signal at an output terminal of the energy transfer element. The extremum locator enables the switch control signal generator such that the transition of the switch from the OFF state to the ON state occurs substantially at a time that the oscillating voltage signal reaches an extremum. |
| US09742281B2 |
Inductive buck-boost-converter and method for driving an inductive buck-boost-converter
In one embodiment an Inductive buck-boost-converter has an input (In) to which an input voltage (Vin) is supplied, an output (Out) at which an output voltage (Vout) is provided as a function of the input voltage (Vin), an inductor (L) having a first and a second terminal (Lx1, Lx2), a first switch (A) which switchably connects the inductor's (L) first terminal (Lx1) to the input (In), a second switch (B) which switchably connects the inductor's (L) first terminal (Lx1) to a ground potential terminal (10), a third switch (C) which switchably connects the inductor's (L) second terminal (Lx2) to the ground potential terminal (10), a fourth switch (D) which switchably connects the inductor's (L) second terminal (Lx2) to the output (Out), and a control unit (CTL) coupled to respective control inputs of first, second, third and fourth switches (A, B, C, D). Therein the converter is operated in three phases (1, 2, 3) by the control unit (CTL). In one of these three phases a transistor realizing the fourth switch (D) is driven in its saturation region by the control unit (CTL). |
| US09742279B2 |
Interleaved buck converter
An interleaved buck converter performs buck conversion by controlling operation of each of two switches thereof between an ON state and an OFF state. The switches have the same switching period and the same ON time interval, and a time delay from switching of one of the switches into the ON state to switching of the other one of the switches into the ON state equals the ON time interval of the switches minus a predetermined time interval. |
| US09742274B2 |
DC-DC high voltage converter
A DC-DC voltage converter including a main switch formed by a normally ON switch element connected in series with a normally OFF switch element including a control circuit, a load in series with the main switch, the main switch and the load being configured to be connected to terminals of a DC voltage source. A voltage source, that can be used for controlling is obtained by connecting a main peak detector circuit to the mid-point of the main switch. The control circuit of the normally OFF switch element can be supplied with the DC voltage that makes the entire device self-supplied. Such a converter can, for example, find application in aeronautics. |
| US09742271B2 |
DC-DC converter with low start-up power and voltage
A DC-DC converter (1) with low start-up power and voltage includes an inductor (3) connected to an input voltage source (2), a switch (11) connected to the inductor and controlled by a controller (10) and a diode (12) connected to a connection node of the inductor and the switch to provide an output voltage (Vout). The controller includes an oscillator and a monostable element, which are powered by the input voltage (Vin). The oscillator provides an oscillation signal (OSC) having a period T of a switching cycle of the switch. The monostable element (103) is controlled by the oscillation signal to determine a duration Tn of conduction of the switch, during which an increasing current (IL) flows through the inductor. The input impedance of the DC-DC converter increases, when the input voltage (Vin) drops below a first voltage threshold with a decreasing duty cycle d=Tn/T. |
| US09742270B2 |
Voltage regulator circuits, systems and methods for having improved supply to voltage rejection (SVR)
A voltage regulator is controlled to improve supply voltage rejection by cancelling an alternating component of a supply voltage signal that is capacitively coupled to a high-impedance node within the voltage regulator. This cancellation is done by capacitively coupling an inverted version of the alternating component to the high-impedance node to thereby substantially cancel the alternating component present on the high-impedance node. The high-impedance node may be a high-impedance voltage reference node of the voltage regulator. |
| US09742269B2 |
Voltage control circuit for a field device coupler
A voltage control circuit for electrically coupling a field device coupler to a bus line. An input voltage (UE) provided at the voltage control circuit by the bus line is converted into an output voltage (UA) that can be regulated and limited. If a current limitation is additionally provided, the “inherent safety” ignition protection type can be achieved. The voltage control circuit has a chopper-type regulator without galvanic isolation. A parallel path is formed parallel to the chopper-type regulator by a series connection of two buffer capacitors. Communication signals of higher frequency can be transmitted past the chopper-type regulator via the parallel path. The parallel path and a reference terminal of the chopper-type regulator are additionally connected via an impedance circuit to a reference potential at a second input terminal of the voltage control circuit. |
| US09742268B2 |
Boost converter circuit and a method for controlling a boost converter
A method for controlling a boost converter which generates an output voltage according to an input voltage. The boost converter includes an inductor, a first transistor, a second transistor, and a capacitor. The first transistor is coupled between the inductor and a ground. The second transistor is coupled between the inductor and an output terminal. The capacitor is coupled to both the second transistor and the output terminal. The method includes: charging the capacitor by repeatedly turning on the second transistor within a first time interval; turning on the first transistor and the second transistor by turns according to a first switching frequency within a second time interval; and turning on the first transistor and the second transistor by turns according to a second switching frequency within a third time interval. The first switching frequency is smaller than the second switching frequency. |
| US09742263B2 |
Method and apparatus for automatically equalizing bus bar voltages of power factor correction PFC circuit
An automatic equalization method and apparatus for bus bar voltages of a Power Factor Correction (PFC) circuit. The method includes calculating a difference in voltages of a positive bus bar and a negative bus bar, and increasing the rotation speed of a fan in the PFC circuit according to the difference in voltages of the positive bus bar and the negative bus bar until the voltages of the positive and negative bus bars are equalized. The apparatus includes a voltage difference module configured to calculate a difference in voltages of a positive bus bar and a negative bus bar, and a rotation speed control module configured to increase a rotation speed of a fan in the PFC circuit according to the difference in voltages of the positive bus bar and the negative bus bar, until the voltages of the positive and negative bus bars are equalized. |
| US09742261B2 |
Power factor correction circuit
The present application relates to AC power supplies and in particular to power factor correction circuits in AC-DC converters. The application provides an active power factor correction circuit in which zero voltage switching is inherently achieved using a passive snubbing approach employing a saturable transformer. |
| US09742260B2 |
Inverter synchronization
A method of initiating a grid-tied inverter is described, in which in-rush currents and DC overvoltage conditions are reduced or avoided. The method uses a pulse width modulator to drive the inverter under the control of a voltage feedforward signal such that the inverter output is dependent on the measured grid voltage. Then, an AC current feedback controller is enabled and the pulse width modulator is used to drive the inverter under the control of both the voltage feedforward control signal and the feedback control signal. |
| US09742258B2 |
Rotational-linear motion converter
A rotational-linear motion converter includes a cylindrical magnet rotor, a linear rail, a teeth row, and a magnet row. The magnet rotor includes a magnet row magnetized in a radial direction of the magnet rotor. The rail includes a plurality of projecting portions and recessed portions. The teeth row includes teeth and allows a magnetic flux flowing from the magnet row of the magnet rotor to pass between the magnet rotor and the rail. The magnet row includes magnets and is magnetized in an extending direction of the rail in order to align the magnetic flux flowing from the magnet row of the magnet rotor toward the projecting portions and the recessed portions of the rail. In the magnet row magnetized in the extending direction of the rail, the same polarity faces of adjacent magnets oppose each other in the extending direction of the rail. |
| US09742251B2 |
Interior permanent magnet machine for automotive electric vehicles
Certain aspects relate to topologies for an interior permanent magnet (IPM) electrical machine having increased saliency torque, increased flux-linkage, reduced magnet leakage flux, and reduced detrimental slotting effects compared to existing IPM electrical machines. The IPM electrical machine includes a rotor having a number of poles and a flux barrier formed along the edge of the rotor between poles. The flux barrier contains a magnet or set of magnets having a varying thickness, with a central thickest portion located along the d-axis of the rotor. A magnet retention structure, which may be formed integrally with the rotor or provided as a separate structure, surrounds the rotor and magnets. The rotor and magnets combine to form a smooth circular profile having no air gaps. |
| US09742248B2 |
Method for assembling rotor for use in IPM rotary machine
A method for assembling a rotor used in connection with an interior permanent magnet (IPM) rotary machine, the rotor having an axis of rotation and comprising a rotor yoke having bores and a plurality of permanent magnet segments disposed in the bores of the rotor yoke, each permanent magnet segment consisting of a plurality of magnet pieces. The method comprises the steps of: inserting the plurality of magnet pieces in each bore of the rotor yoke, with each of the magnet pieces for each of the magnet segments being kept loose from each other, for axially stacking the magnet pieces in the bore, and fixedly securing the stacked magnet pieces in the bore of the rotor yoke. |
| US09742247B2 |
Thermally protected electric motor
An electric motor for driving a motor vehicle component, such as a fan motor for cooling cooling water, has a thermal fuse with a contact spring. The contact spring has attached ends that are connected to a conducting path section between which an interruption point is formed. The springy ends of the contact spring are in soldered contact with each other in a spring-biased manner. The thermal fuse is a fuse module with a plastic support in which the conducting path sections are partially embedded in such a way that the contact spring lies in a window opening in the support. Terminals of the conducting path sections protrude from the plastic support. |
| US09742244B2 |
Driver device
In a driver device, a controller substrate has a center part on which a rotation angle sensor is attached and an outer periphery portion which is fixed onto a heat sink. The heat sink has a cylinder part extending in an axial direction of the rotation shaft to contact the outer periphery portion of the controller substrate. The cylinder part of the heat sink is continuously formed along an entire periphery and has the same height at all portions. Such configuration provides an even deformation distribution of the cylinder part due to a temperature change, thereby reducing unevenness of heat stress distribution along a substrate plane and decreasing stress applied to the sensor, which facilitates a reduction of a detection error of the sensor. |
| US09742242B2 |
Rotary electric machine including a stator coil end cooling construction and rotor with dual fan blades
In a rotary electric machine, first inclined surfaces that intersect a plane that includes a central axis of a shaft at a predetermined angle are disposed radially outside gaps between coil ends of circumferentially adjacent concentrated winding coils, and cooling air that is blown out from a cooling fan and has flowed radially outward through the gaps between the coil ends is converted into an axially outward flow by the first inclined surfaces. |
| US09742240B2 |
Vibrating compact motor with attached flexible circuit board for a mobile device
A compact motor which avoids peeling and cracking of the circuit board wiring pattern upon bending the printed circuit board. A projecting part (13), projecting toward the bottom side of the bracket (5), is provided on the back surface (5c) of the bracket (5) of a compact motor. A board insertion groove (S) is formed between the projecting part (13) and the back surface (5c). The flexible printed circuit board (10), inserted inside the board insertion groove (S), abuts the projecting part (13) and is bent facing the back. When the printed circuit board (10) is inserted into the board insertion groove (S) and bent, the printed circuit board (10) is in a state abutting the curved part (13a) of the projecting part (13), so the curved part (13a) of the projecting part (13) regulates bending and, by doing this, stabilizes bending of the flexible printed circuit board (10). |
| US09742235B2 |
Star disk for an electric machine
A rotor element or a star disk which is designed to be arranged on an electrically excited rotor of an electric machine, includes a base which is designed to be arranged in an insert between the axial end of a laminate stack of the rotor and at least one end winding of the rotor. At least one fin is fastened on the base and is designed to protrude in the insert through the at least one end winding axially out of the at least one end winding. |
| US09742232B2 |
Stator and electric pump
A stator may comprise: a core having a tubular shape and comprising a tooth extending toward a central axis of the tubular shape; a conducting wire engaging part projecting from an axial end of the core in an axially outward direction from the core; and a coil disposed on the tooth by winding a conducting wire on the tooth. An end of the conducting wire may be bent at a bending portion. The conducting wire may engage with the conducting wire engaging part at the bending portion. A diameter of the conducting wire at the bending portion may be smaller than a diameter of the conducting wire at another portion of the conducting wire. |
| US09742228B2 |
Torque ripple reduction in electric machines
An electric machine, such as an Internal Permanent magnet or Synchronous Reluctance machine, having X phases, that includes a stator assembly, having M slots, with a stator core and stator teeth, that is further configured with stator windings to generate a stator magnetic field when excited with alternating currents and extends along a longitudinal axis with an inner surface that defines a cavity; and a rotor assembly, having N poles, disposed within the cavity which is configured to rotate about the longitudinal axis, wherein the rotor assembly includes a shaft, a rotor core located circumferentially around the shaft. The machine is configured such that a value k=M/(X*N) wherein k is a non-integer greater than about 1.3. The electric machine may alternatively, or additionally, include a non-uniformed gap between the exterior surface of the rotor spokes and the interior stator surface of the stator. |
| US09742225B2 |
Electric machine
An electric machine comprise a first carrier having an array of electromagnetic elements and a second carrier having electromagnetic elements defining magnetic poles, the second carrier being arranged to move relative to the first carrier. An airgap is provided between the first carrier and the second carrier. The electromagnetic elements of the first carrier include posts, with slots between the posts, one or more electric conductors in each slot, the posts of the first carrier having a post height in mm. The first carrier and the second carrier together define a size of the electric machine. The magnetic poles having a pole pitch in mm. The size of the motor, pole pitch and post height are selected to fall within a region in a space defined by size, pole pitch and post height that provides a benefit in terms of force or torque per weight per excitation level. |
| US09742219B2 |
Circuit for comparing a voltage with a threshold
A circuit for comparing a voltage with a threshold, including: first and second nodes of application of the voltage; a first branch including a first transistor series-connected with a first resistor between first and second nodes; a second branch parallel to the first branch, including second and third series-connected resistors forming a voltage dividing bridge between the first and second nodes, the midpoint of the dividing bridge being connected to a control node of the first transistor; and a third branch including a second transistor in series with a resistive and/or capacitive element, between the control node of the first transistor and the first or second node, a control node of the second transistor being connected to the junction point of the first transistor and of the first resistor. |
| US09742218B2 |
Charging control device, charging control method, computer program, and recording medium
A charging control unit is used in a system having an engine, an electric power generator, and a battery charged by electric power generated by the electric power generator and being capable of executing stop control for prohibiting the engine from restarting in a state where the engine is stopped. The charging control device is provided with a charging and discharging rate calculation unit calculating a charging and discharging rate, the charging and discharging rate being the ratio of the absolute value of a charging current integrated value of the battery to the absolute value of a discharging current integrated value of the battery following the full charging of the battery, a pre-charging execution unit allowing the execution of the stop control, charging the battery by the electric power generated by the electric power generator, and executing pre-charging for increasing the average remaining capacity of the battery, the pre-charging execution unit shortening a period during which the pre-charging is executed when the calculated charging and discharging rate is high, and a refresh charging execution unit executing refresh charging for charging the battery by the electric power generated by the electric power generator, without executing the stop control, after the execution of the pre-charging and allowing the battery to be fully charged. |
| US09742215B2 |
Input device
An input device includes an input interface, a power module, a wireless charging module, a solar charging module and a controller. The power module provides electricity to the input device. The wireless charging module is used for wirelessly charging an electronic device. The solar charging module is used for charging the power module or providing electricity to the wireless charging module. When the controller detects that an electricity quantity percentage of the power module is lower than a predetermined value, the controller controls the solar charging module to charge the power module. When the electronic device is in communication with the input device, the controller controls the solar charging module to the provide electricity to the wireless charging module, and the electronic device is wirelessly charged by the wireless charging module if the electronic device is within a charging range. |
| US09742210B2 |
Self-powered remote control device
Remote control device comprising a generator (PVU) intended to convert light or mechanical energy to electrical energy, a wireless transmitter (RF) able to send messages to a remote receiver, a first electrical energy storage element (C1) connected to the energy generator (PVU) and intended to be charged with the electrical energy generated by the generator (PVU) in order to supply power to the wireless transmitter (RF) in a first operating mode of the control device, and a second electrical energy storage element (C2) intended to supply power to the wireless transmitter (RF) in a second operating mode. The second electrical energy storage element is connected to the generator (PVU) via parallel connection of a first resistor (R1) and a first diode (D1), the cathode of the first diode being connected to the positive terminal of the generator (PVU). |
| US09742205B2 |
Storage status adjusting circuit, storage status adjusting device, and storage battery pack
A storage status adjusting circuit includes: n (n is natural number greater than 2) switching units configured to switch between energy accumulation in respective n coils and energy release from the respective n coils to any one of component electric storage devices, which are respectively included in n assembled electric storage devices respectively including a plurality of the component electric storage devices; and n changing units configured to respectively change potential differences between both ends of the n coils; wherein the changing units change, based on the storage statuses of the n assembled electric storage devices, at least any one of the potential differences between both ends of the n coils, when accumulating energy in the n coils. |
| US09742202B2 |
Ship power-receiving structure, ship power-supplying device and ship power-supplying method
A power-receiving structure is provided in a ship and includes a power-receiving coil capable of wirelessly receiving electric power from a power-supplying coil on a land-side and an outer wall surface-forming section forming an outer surface of side of the ship, and the power-receiving coil is provided on an inside of the ship from the outer wall surface-forming section, and an electromagnetic field-transmissive section formed of a material through which an electromagnetic field propagates is provided in an opposing portion to the power-receiving coil in the outer wall surface-forming section. According to the present invention, the power-receiving coil is not protruded from the outer surface of side of the ship and can wirelessly receive electric power from the power-supplying coil on the land-side through the electromagnetic field-transmissive section. Accordingly, the power-receiving coil does not disturb the navigation of the ship and is not required to be pulled into the ship after the supply of the electric power to the ship is finished. |
| US09742201B2 |
Wireless power receiving apparatus
A wireless power transmitting apparatus transmits an electric power signal comprising any one from among an electric field, a magnetic field, and an electromagnetic field to a wireless power receiving apparatus. A transmission antenna includes a transmission coil. An automatic tuning assist circuit is coupled in series with the transmission antenna. A power supply applies an AC driving voltage across both terminals of a series circuit that comprises the transmission antenna and the automatic tuning assist circuit. A first controller switches on and off multiple switches in synchronization with the driving voltage. A voltage monitoring unit monitors the voltage that develops at an auxiliary capacitor. |
| US09742199B2 |
Contactless power supply system and contactless extension plug
A contactless power supply system includes a first power transmission coil, a plug power reception coil, a plug power transmission coil, and a first power reception coil. The first power transmission coil and the plug power reception coil are configured to satisfy a relational equation of (L2a/L1)1/2=G1/K1=N2a/N1, where L1 represents a self-inductance of the first power transmission coil, L2a represents a self-inductance of the plug power reception coil, N1 represents a winding number of the first power transmission coil, N2a represents a winding number of the plug power reception coil, K1 represents a coupling coefficient of the first power transmission coil and the plug power reception coil, and G1 represents a voltage conversion gain of the voltage applied to the plug power transmission coil relative to the voltage applied to the first power transmission coil. |
| US09742198B2 |
Controlling a fault-tolerant array of converters
A redundant path power subsystem comprises a plurality of phase regulators in a multi-phase power converter. The plurality of phase regulators comprises at least N+2 phase regulators. N phases are sufficient to serve an electrical load coupled with the redundant path power subsystem. The redundant path power subsystem also comprises a plurality of power supplies, and a plurality of input and control paths between the plurality of power supplies and the plurality of phase regulators. The plurality of input and control paths comprises a plurality of multiplexing logic devices and a plurality of phase controllers. The plurality of phase controllers is configured to control the plurality of phase regulators. The plurality of multiplexing logic devices is configured to multiplex control signals from the plurality of power supplies and a microprocessor for the plurality of phase controllers. |
| US09742197B2 |
Power distribution algorithm
A method and apparatus for distributing power through a network (1), the network comprising consumer units (C1-C4) and provider units (P1-P6), the method comprising: for each provider unit (P1-P6), allocating some production capacity of that provider unit (P1-P6) to each consumer units (C1-C4) to which that provider unit (P1-P6) is connected, performing one or more times a process of performing steps (a) to (c); wherein step (a) comprises, for each consumer unit (C1-C4), generating a vector of resource requests, step (b) comprises, for each provider unit (P1-P6), determining whether it currently satisfies the requests made of it; and step (c) comprises, for each provider unit (P1-P6) which does not currently satisfy the requests made of it, updating the current production allocation; and from each provider unit (P1-P6) and dependant on the current production allocation of that provider unit (P1-P6), delivering to a consumer unit (C1-C4) an amount of resource. |
| US09742196B1 |
Fuel cell power plant cooling network integrated with a thermal hydraulic engine
An illustrative example electrical power generating system includes a fuel cell power plant that is configured to generate electrical power. The fuel cell power plant includes a cell stack assembly including a plurality of fuel cells that are configured to generate electrical power based on a chemical reaction. A coolant network is configured to carry fluid toward the cell stack assembly where fluid in the coolant network can become heated by absorbing heat from the fuel cell power plant. The coolant network includes a thermal hydraulic engine that is configured to generate electrical power. The coolant network is configured to carry the heated fluid to the thermal hydraulic engine where the heated fluid can be used for generating electrical power. The coolant network is configured to carry a reduced temperature fluid from the thermal hydraulic engine back toward the cell stack assembly. |
| US09742192B2 |
Method and system for island detection and anti-islanding protection in distributed power generation systems
An effective, yet relatively simple and inexpensive, method for detection of islanding in distributed power generation systems. Statistical analysis of the local line frequency, as measured at the distributed generator, is performed to detect when an island has been formed. The statistical characteristics of the local frequency are controlled by the grid when the distributed generator is not islanding. When an island is formed, however, frequency control switches to circuitry associated with the distributed generator. Because the statistical characteristics of the frequency control performed by the distributed generator are markedly different from those of the grid, the islanding condition can be detected and corrected. |
| US09742184B2 |
Systems and methods for grounding power line sections to clear faults
A system for clearing power transmission line faults includes a sensor network configured to communicate with a transmission line and configured to detect one or more faults on the transmission line, a crowbar configured to coordinately switch first and second ends of a section of the transmission line to respective termination points, wherein the crowbar includes first and second grounding switches disposed respectively at about the first and second ends of the section of the transmission line, and a controller configured to receive information from the sensor network and configured to control the switching of the crowbar in response to the information. |
| US09742177B2 |
Electrical wire sealing assembly and method
A seal assembly includes a circular resilient grommet-type seal having one or more through axial openings equal in number to the wires which pass through the seal and a rigid wire channel or guide which is received within a complementary pocket aligned with the seal between the seal and a reaction surface. The rigid wire channel or guide is retained in the pocket and carries any force exerted on the seal by pressure within the device to the aligned reaction surface. A method of installation includes the steps of mounting an electrical device within a component, routing the electrical wires leading from the device through an opening, routing the wires through corresponding openings in a grommet-type seal, pressing the seal into the opening, routing the wires through passageways in the rigid wire channel or guide and installing the guide in a complementary pocket which is aligned with the seal at one end and includes a reaction surface at the other end. |
| US09742174B2 |
Removable electrical-accessory module, an electrical box for receiving such an accessory module, and a replacement method for replacing such an accessory module
An electrical-accessory module (130) for engaging in an electrical box (110) includes a casing (131) made of insulating material, and that includes a side wall (132) that is closed at the front by a front wall (134) for defining an inside space for receiving an electrical mechanism (140). The electrical-accessory module includes firstly snap-fastener elements (137) adapted to catch onto the electrical box, which snap-fastener elements include at least one catch member (137A) that is movable between a retracted position in which it does not hinder the insertion of the casing into the electrical box, and an extended position in which it is adapted to catch directly onto the electrical box, and secondly release elements (137C) for releasing the snap-fastener elements, which release elements are accessible via the front, through an access opening (139) provided in the front wall, so as to return the catch member into its retracted position. |
| US09742171B2 |
Electrical cord connection covering techniques
An electrical connection covering apparatus is designed to protect from moisture a connection between a plug of one extension cord and a socket of another extension cord. A compressible and elastic diaphragm is used to form a seal around the cables of the extension cords where they enter the apparatus. The apparatus includes a housing that has at least one aperture. The diaphragm extends across the aperture. The diaphragm projects inwardly with respect to an interior surface of the housing. The compressibility and elasticity of the diaphragm material is greater than that of the housing material. |
| US09742169B1 |
Junction box assemblies with sequentially elevated openings
An electric junction box assembly configured to help preserve the structural integrity of a bend in a tube is provided. The electric junction box assembly includes a junction box having at least one tube opening. The tube opening extends from an outer surface of the junction box into the inner space of the junction box. The tube opening is configured to hold the bend of the tube. The tube opening includes an outer opening and at least one inner opening. The outer opening is formed on an outer wall of the junction box and the inner opening is formed on an inner wall of the junction box. The inner opening is elevated with respect to the outer opening. Accordingly, the electric junction box assembly distributes the load of the weight of a tube and wire assembly so as to preserve the integrity of the tube and wire assembly. |
| US09742153B1 |
Compact emitter design for a vertical-cavity surface-emitting laser
A surface emitting laser may include an isolation layer including a first center portion and a first plurality of outer portions extending from the first center portion, and a metal layer including a second center portion and a second plurality of outer portions extending from the second center portion. The metal layer may be formed on the isolation layer such that a first outer portion, of the second plurality of outer portions, is formed over one of the first plurality of outer portions. The surface emitting laser may include a passivation layer including a plurality of openings. An opening may be formed over the first outer portion. The surface emitting laser may include a plurality of oxidation trenches. An oxidation trench may be positioned at least partially between the first outer portion and a second outer portion of the second plurality of outer portions. |
| US09742152B2 |
Tunable semiconductor laser based on reconstruction-equivalent chirp and series mode or series and parallel hybrid integration, and preparation thereof
A tunable distributed feedback (DFB) semiconductor laser based on a series mode or a series and parallel hybrid mode. A grating structure of the laser is a sampling Bragg grating based on the reconstruction-equivalent chirp technology. DFB lasers with different operating wavelengths based on the reconstruction-equivalent chirp technology are integrated together by a sampling series combination mode or a series/parallel hybrid mode, one of the lasers is selected to operate via a current, and the operating wavelength of the laser can be controlled by adjusting the current or the temperature, so that the continuous tuning of the operating wavelengths of the lasers can be realized. Various wavelength signals in parallel channels are coupled and then output from the same waveguide. An electrical isolation area (1-11) is adopted between lasers connected in series or lasers connected in series and connected in parallel to reduce the crosstalk between adjacent lasers. |
| US09742150B1 |
Optical amplifier devices and silicon photonic circuit devices comprising such optical amplifier devices
An optical amplifier device includes: an optical waveguide core; an active gain material layer stack; and a dielectric material between the active gain material layer stack and the optical waveguide core. The optical waveguide core includes an input portion, a middle portion, an output portion and tapers. The middle portion is connected to the input and output portions via the tapers. The tapers widen outwardly, whereby the middle portion has an effective refractive index that is smaller than an effective refractive index of any of the input and output portions. The active gain material layer stack includes III-V semiconductor material layers having different refractive indices so as to possess an effective refractive index that is larger than the effective refractive index of the middle portion. The active gain material layer stack extends relative to a subsection of the optical waveguide core that includes the middle portion and tapers. |
| US09742149B2 |
Method for controlling tunable wavelength laser
In the method for controlling a tunable wavelength laser, information designating an oscillation wavelength is inputted. A driving condition for causing laser oscillation at a first wavelength is acquired from a memory. A control value of wavelength characteristics of the etalon and a difference between the first wavelength and a second wavelength are referred to, and a control value of wavelength characteristics of the etalon for causing laser oscillation at the second wavelength is calculated. The control value of wavelength characteristics of the etalon are assigned to the tunable wavelength laser, and a wavelength is controlled so that a wavelength sensing result becomes a first target value. Information indicating a wavelength shift amount from the designated oscillation wavelength is inputted. The wavelength sensing result is calculated as a second target value. The wavelength is controlled so that the wavelength sensing result becomes the second target value. |
| US09742147B2 |
Monolithic integrated photonics with lateral bipolar and BiCMOS
After forming a first trench extending through a top semiconductor layer and a buried insulator layer and into a handle substrate of a semiconductor-on-insulator (SOI) substrate, a dielectric waveguide material stack including a lower dielectric cladding layer, a core layer and an upper dielectric cladding layer is formed within the first trench. Next, at least one lateral bipolar junction transistor (BJT), which can be a PNP BJT, an NPN BJT or a pair of complementary PNP BJT and NPN BJT, is formed in a remaining portion of the top semiconductor layer. After forming a second trench extending through the dielectric waveguide material stack to re-expose a portion of a bottom surface of the first trench, a laser diode is formed in the second trench. |
| US09742141B2 |
Laser chamber
A laser chamber including a first space and a second space in communication with the first space may include: a first discharge electrode disposed in the first space; a second discharge electrode disposed in the first space to face the first discharge electrode; a fan disposed in the first space and configured to flow laser gas between the first discharge electrode and the second discharge electrode; a peaking condenser disposed in the second space; and an electrical insulating member configured to partition the first space and the second space from one another, and disposed to allow the laser gas to pass through between the first space and the second space. |
| US09742139B2 |
Methods of using a hand tool to couple together first and second cable sections
An illustrative cable connector hand tool and associated methods are provided that include hand tool members having a side opening that allow cable connection sections to pass into a center aperture of the tool members. In one example, the hand tool members are formed with a recessed portion that receives an end of one of a pair of cable connectors such that mating edges of the cable connectors used to couple the cable connection sections are visible when the cable connectors are in a coupled configuration abutting each other. An exemplary recessed portion formed with a number of keyway indentions or recesses spaced apart in the center aperture that are operable to engage keys, protrusions, or lugs on an outer wall of the cable connectors. |
| US09742137B2 |
Method for automated splicing and terminating low, medium, high, and extra high voltage cables
A system and method for additively manufacturing splices and terminations for extra high, high, medium and low voltage power cable includes providing an additive manufacturing machine having at least one print head. Cable ends can be secured within a chamber from which atmospheric air can be evacuated and replaced with non-oxidizing gas. A scanning device can determine the composition and position of the various constituents of the cable ends, from which information a controller can determine the printing sequence and print a termination or splice portion. |
| US09742133B1 |
Power connector having a housing with a T-shaped tongue and each terminal with parallel and separated contact portions
A power connector is disclosed in this invention, including an insulating housing and at least one pair of power terminals. The insulating housing includes a T-type tongue plate, which has a flange, multiple grooves formed on two opposite surfaces of the tongue plate, and multiple ribs separating the grooves. Each power terminal includes a retaining plate, multiple parallel and separated contact portions mounted into the corresponding grooves and multiple parallel and separated mounting portions. The power terminal of the present invention can realize the power distribution and improve the heat dissipation performance of the power terminal by disposing these contact portions and defining heat-dissipating channels between these contact portions. |
| US09742129B2 |
Pin for a subsea connector
A pin for a subsea connector having an electrical conductor, an insulating sleeve around the conductor and a conductive layer provided on a portion of the outer surface of the insulating sleeve. The insulating sleeve has a recess that extends in an axial direction over a portion of the insulating sleeve. The conductive layer is provided in the recess. |
| US09742128B2 |
Smart plug having plug blade detection
A smart plug system is disclosed. The smart plug system includes a power plug configured to receive an alternating current power signal from shore power, a power receptacle configured to receive a plug having a plug blade, and a plug detection switch configured to detect receipt of the plug blade in the power receptacle. A rectifier circuit is included to rectify the alternating current power signal received at the power plug when the plug detection switch is actuated by receipt of the plug blade. The plug detection switch is further configured to prevent rectification of the alternating current power signal by the rectifier circuit when the plug blade is removed from the power receptacle. A logic level converter is included to receive the rectified power signal to convert the rectified power signal to a logic level signal. |
| US09742127B2 |
Power strips
A power strip having two or more powers strips daisy chained together where each of the two or more power strips include a sequence control module operable to sequentially activate and/or deactivate the outlets, thereby powering up or powering down each outlet separately across the two or more power strips. A pre-determined time delay, that can be set by a user, occurs between the activation and/or deactivation of the outlets. The sequence control module of each power strip is operatively coupled to the sequence control module of the subsequent next power strip so that one power strip can be used to trigger activation of the next power strip. |
| US09742126B2 |
Power connector, and electrical connection element and operating method therefor
An electrical connection element is for a power connector. The power connector includes an electrical component having a number of first electrical mating members. The electrical connection element comprises: a housing including a number of second electrical mating members structured to be electrically connected to the number of first electrical mating members; a contact assembly enclosed by the housing and being electrically connected to the number of second electrical mating members; and an operating mechanism for opening and closing the contact assembly. The contact assembly is structured to electrically connect and disconnect power while the number of first electrical mating members remain mechanically coupled to the number of second electrical mating members. |
| US09742124B2 |
Terminal block
A terminal block including an electric wire, a shield material, a terminal, a housing and a shield bracket. The shield material is configured to cover at least a part of the electric wire. The electric wire is connected to the terminal. The housing is configured to accommodate the terminal. The shield bracket is fixed to the housing. The shield bracket is configured to hold the shield material, and includes a folding portion. The folding portion is configured to hold an end of the shield material by sandwiching the end of the shield material. The folding portion has a notch hole. |
| US09742122B2 |
Electrcial connector and manufacturing method of the same
An electrical connector includes a terminal module including an insulative housing, and upper contacts, lower contacts and a shielding plate embedded in the housing. The housing includes a base and a mating tongue extending from the base, the mating tongue defines an upper surface, a lower surface and a front face thereof. The upper and lower contacts includes contacting sections exposing to the upper and lower surfaces of the mating tongue and soldering sections out of the base and connecting section jointing the contacting sections and the soldering sections, respectively. The shielding plate is disposed between the upper and lower contacts and includes a pair of side latches. The housing includes an insulative sub-housing and an insulative coat, the whole upper surface and the whole front face of the mating tongue and part of the lower surface of the mating tongue are formed with the coat. |
| US09742121B2 |
Electric connector
An electric connector 1 has: terminals 20 that include connection portions 21 arranged on one surface of a fitting part 50 for connection with a counterpart connector; terminals 30 that include connection portions 31 arranged on a surface opposite to the one surface of the fitting part 50 for connection with the counterpart connector; a plate-like screen plate 10 that is interposed between the first connection portions 21 and the second connection portions 31 of the fitting part 50; and a housing 40 comprises a primary molded portion 41 in which the terminals 30 and the screen plate 10 are integrally provided by insert molding and a secondary molded portion 42 in which the primary molded portion 41 and the terminals 20 are integrally provided by insert molding 42. |
| US09742120B2 |
Electrical plug connector
An electrical plug connector includes an insulated housing and a plurality of plug terminals. The insulated housing includes a base portion and a semi-tubular portion extending from one side of the base portion. The semi-tubular portion includes a portion, a front stopping portion at a front lateral surface of the portion, and a plurality of side blocks extending outward from two sides of the portion. The plug terminals include a plurality of signal terminals, one or more power terminal, and one or more ground terminal. The plug terminals are held in the insulated housing and at the surface of the portion. |
| US09742117B2 |
Communications jack having a flexible printed circuit board with conductive paths on two opposite sides of the board with the paths inductively and capacitively coupled
Communications jacks include a housing having a plug aperture that is configured to receive a mating RJ-45 plug along a longitudinal axis and eight jackwire contacts that are arranged as four differential pairs of jackwire contacts, each of the jackwire contacts including a plug contact region that extends into the plug aperture. A first of the jackwire contacts is configured to engage a longitudinally extending surface of a first blade of a mating RJ-45 plug when the mating RJ-45 plug is fully received within the plug aperture. |
| US09742110B2 |
Electronic device
An electronic device includes a plug-in module including a printed substrate on which an electronic circuit is mounted, and a baseplate to which the plug-in module is detachably connected, wherein a system side and a field side are connected with each other, and a predetermined option function is included in the plug-in module. |
| US09742109B1 |
Low profile and small form factor electrical connector system
An electrical connector system includes a connector and a header. The header includes a substantially T-shaped member having a proximal portion substantially rectangular in shape having a first width and a distal portion substantially rectangular in shape having a second width greater than the first width. A first and a second end portion of the distal portions are substantially T-shaped viewed end on. The first and the second end portions include a plurality of guides and shoulders. The connector includes a substantially rectangular member having a proximal portion having a first thickness and a distal portion having a second thickness less than the first thickness on a bottom side of the substantially rectangular member. The proximal portion includes first and second proximal feet and first and second distal feet. Each foot includes a foot retention shoulder and one or more guides. |
| US09742105B2 |
Protective cover and electrical connector having a radiation window formed by a plurality of radiation passages
A protective cover and an electrical connector assembly having the protective cover are disclosed. The protective cover has a body formed of an at least partly transparent or translucent electrically insulating material and an opaque electrically conductive layer disposed on the body. The electrically conductive layer has a radiation window penetrable by optical radiation formed by a plurality of radiation passages. |
| US09742101B2 |
Crimp terminal
A crimp terminal includes a terminal connecting portion and an electric wire connecting portion. The electric wire connecting portion is sectioned into a bottom portion, a first barrel piece, and a second barrel piece, and is sectioned into a core wire crimp portion, a sheath crimp portion, and a coupling crimp portion. A water stop member affixed to the inner wall face of the electric wire connecting portion before crimping processing forms a first water stop area, that suppresses the entry of water, from the gap between the outer wall face of the first barrel piece and the inner wall face of the second barrel piece, a second water stop area from the terminal connecting portion side of the distal end position of a core wire, and a third water stop area from the gap between the inner wall face of the sheath crimp portion and a sheath. |
| US09742100B2 |
Connector
A connector includes a mat seal in which lips are protruded from an inner circumferential surface of a wire insertion hole, and a terminal to which an electric wire is connected and which has a cylindrical body to be inserted a mating terminal. The terminal is accommodated in a position that passes through the wire insertion hole, and the electric wire is arranged in a press-fitted state in the wire insertion hole. When a curvature radius of an edge part of the cylindrical body that contacts to the inner circumferential surface of the wire insertion hole in a process of passing through the wire insertion hole is denoted by R1 and a compression ratio of the lip in the process of passing through the wire insertion hole is denoted by CR1, the curvature radius R1 is set based on a formula of difficulty of mat seal breakage =f(R1/CR1). |
| US09742096B2 |
Protective structures for connector contacts
Connector receptacles having protective structures for connector contacts. One example may provide a connector receptacle having one or more contacts that are reinforced with a protective piece around a portion of the contact. Another example may provide a connector receptacle having two or more contacts reinforced with adjacent protective pieces to provide additional protective reinforcement. Another example may provide a connector receptacle having two or more contacts reinforced with interlocking protective pieces. These protective pieces may protect contacts in a connector receptacle from damage when a device, module, or connector insert is inserted into the connector receptacle at an oblique angle, when a device, module, or insert is stressed while in the receptacle, or when a device, module, or insert is removed from the receptacle at an oblique angle. |
| US09742092B2 |
Electronic connector having flexible region
An electronic connector includes a housing and a plug extending from the housing. The plug includes at least one flexible region that provides flexing of the plug. In some example embodiments, the plug also includes at least one rigid region. The plug has at least one interconnect. Each interconnect includes a lead and a contact. The contacts are exposed on an exterior surface of the plug, such exposure being provided so as to enable electrical coupling between the plug and an electronic receptacle into which the plug may be removably inserted. |
| US09742091B2 |
Method and structure for conductive elastomeric pin arrays using solder interconnects and a non-conductive medium
A method and structure is provided for constructing elastomeric pin arrays using solder interconnects and a non-conductive medium. Pin to pin interconnects are constructed using a solder connection through a non-conductive medium. This structure eliminates the need for PCB structures as the medium, reducing manufacturing cost. In another embodiment one or more elastomeric columns extend through holes or openings in the non conductive medium. The elastomeric columns are fixed securely within the holes preferably with adhesive material. Compression stops are provided on both sides of each elastomeric column for both the upper and bottom surfaces of the non conductive medium. |
| US09742090B2 |
Contact
A contact includes a first terminal including a plurality of arms; a second terminal; a spring connecting the arms to the second terminal; and a casing covering the spring, wherein the arms outwardly protrude from one end of the casing, wherein an interval between the arms increases from a side of the casing to front edges of the arms, wherein when the arms are pushed toward the casing the arms are retracted into the casing and contact an inner side of the casing so that the interval between the arms decreases. |
| US09742089B2 |
Metal terminals
The metal terminals are a first terminal, and a second terminal mated with the first terminal, the first terminal has a first main body portion, a first contact portion, and a first lock portion, the second terminal has a second main body portion, a second contact portion contacting the first contact portion, and a second lock portion locking the first lock portion. The first lock portion includes a first engaging portion arranged on a surface of the first main body portion, and the second lock portion including a pair of second engaging portions arranged on opposing surfaces of the second main body portions. |
| US09742086B2 |
Printed wiring board and connector connecting the wiring board
A printed wiring board (1) includes: a base substrate (3); a plurality of pads (15a, 17a) for electrical connection that are disposed at one surface side of the base substrate (3) and at a connection end portion (13) to be connected with another electronic component (50); wirings (9, 11) that are connected with the pads (15a, 17a); and engageable parts (28, 29) that are formed at side edge parts of the connection end portion (13) and are to be engaged with engagement parts (58) of the other electronic component (50) in the direction of disconnection. The flexible printed wiring board (1) further includes reinforcement layers (31, 32) that are disposed at the other surface side of the base substrate (3) and at a frontward side with respect to the engageable parts (28, 29) when viewed in the direction of connection with the other electronic component, and that are formed integrally with the wirings (9). |
| US09742084B2 |
Connector and manufacturing method therefor
A connector is provided which includes engaging portions for engaging hooks formed on the upper arm portion of each terminal, an actuator having two contact pressure portions formed on each of two end surfaces positioned on opposite sides from each other in the left and right direction, and a housing having two holding portions opposing each other on the left and right sides and interposing the actuator. The holding portions press against the contact pressure portions of the actuator in a second position and do not press against the contact pressure portions of the actuator in a first position, where the position of the actuator when the engaging portions are engaging the hooks is the first position and the position of the actuator when the engaging portions are not engaging the hooks is the second position. |
| US09742083B2 |
Card edge connector
A card edge connector is provided which includes a housing mated with a card having connecting electrodes. The housing includes a first housing having first terminals mounted to contact the connecting electrodes and a second housing having second terminals connected to a core wire in a conductive wire. The first terminals and the second terminals contact each other under a predetermined amount of contact pressure when the first housing and the second housing are connected. |
| US09742082B1 |
Connection structure of electronic components and circuit board
An electrical connection of an electronic component, such as an inductor, and a circuit board is implemented as follows. The circuit board has a through-hole and is located at a distance from an inner bottom surface of the case. An electronic component is around the through-hole and between the inner bottom surface and the circuit board. The electronic component has a conducting wire and a conducting plate. The conductive connector is between the through-hole and the conducting plate and electrically connected to the conducting plate. The electronic component is electrically connected to the circuit board through the conductive connector. The insulated connector corresponds to the conductive connector and is between the conducting plate and the inner bottom surface. The fastener is connected to the conductive connector through the through-hole. Thus, a good electrical connection between the electronic component and the circuit board is achieved. |
| US09742079B2 |
Connector paint protection shield
An electrical wire connector includes a connector body having a first end engageable with one or more electrical wires and a second end removably engageable with a complementary end of a mating connector, the one or more electrical wires electrically bridgeable to one or more wires of the complementary connector when the connector body is engaged with the complementary connector. The electrical wire connector further includes a movable portion configured to selectively secure an engagement between the connector body and the complementary end of the mating connector, and a shield removably engaged to the connector body to cover a portion of the movable portion. |
| US09742075B2 |
System including a hybrid active array
A hybrid active array approach can combine aspects of a passive and active array architecture with transmitter, high power, and cooling components positioned in one location, e.g., below a ship deck, apart from a radiating location. Waveguides or signal transmission lines can convey a transmit signal from the transmitter to the radiating location, e.g., to a beamforming network (BFN), hybrid transmit/receive modules (HTRM), and a plurality of antenna elements. The exemplary BFN can set an amplitude distribution of an antenna aperture associated with the BFN, HTRMs, and plurality of antenna elements to control both transmit and receive sidelobes where low or reduced sidelobes on transmit reduces radiation outside of the main beam further reducing signal returns in one or more sidelobes sections of the antenna elements. In a receive mode, a reverse can occur and additional beamformers can be utilized for beamforming the receive beams. |
| US09742072B2 |
Printed circuit board arrangement for supplying antennas via a three-conductor system for exciting different polarizations
The printed-circuit board arrangement is used for the electrical connection of an amplifier unit to at least two antenna elements, whereas the at least two antenna elements are embodied on the printed-circuit board arrangement. The antenna elements are coupled via a three-line system to the amplifier unit, where the three-line system comprises three strip lines mounted on the printed-circuit board arrangement extending parallel to one another. |
| US09742070B2 |
Open end antenna, antenna array, and related system and method
A system includes an antenna array and a transceiver configured to communicate wirelessly via the antenna array. The antenna array includes a substrate having first and second ground plates. The antenna array also includes multiple substrate integrated waveguide (SIW) antenna elements located along an edge of the substrate. The antenna array further includes feed lines configured to provide signals to the antenna elements and receive signals from the antenna elements. Each antenna element includes a waveguide between the first and second ground plates and enclosed by vias through the substrate, where the waveguide has one open edge along the edge of the substrate. The system could include multiple antenna arrays, where each antenna array includes multiple SIW antenna elements and the antenna arrays are located along different edges of the substrate. |
| US09742066B2 |
Antenna device and communication terminal apparatus
The disclosure provides an antenna device and communications terminal including such an antenna device. The antenna device includes a coil including a conductor wound around a plate-shaped magnetic core. A flat conductor is positioned adjacent to the coil, and the coil is positioned such that it is closer than the flat conductor to an antenna of a communication partner positioned near the antenna device. The coil conductor includes a first conductor portion adjacent to a first main surface of the magnetic core and a second conductor portion adjacent to a second main surface thereof. A circuit substrate includes a ground electrode formation area and a ground electrode non-formation area. The antenna coil is mounted on the ground electrode non-formation area of the circuit substrate with the first main surface of the magnetic core facing the circuit substrate. |
| US09742061B2 |
Swivel mounted antenna
A swivel mount apparatus and method for installing a swivel mount apparatus on a vehicle. The swivel mount apparatus includes a first member, a second member rotatably coupled to the first member, and a mounting post affixed to the first member and extending upwardly relative to the first member, wherein the mounting post receives the second member. A receiving space is defined by the second member and receives an accessory, such that the accessory may be adjusted relative to the vehicle. |
| US09742060B2 |
Ceiling assembly with integrated repeater antenna
An active antenna may be installed within a ceiling assembly of a building to improve the range of a wireless and/or cellular network. Further, a ground plane may be installed throughout the ceiling to reduce the occurrence of multipath interference of radio frequency (RF) signals. In addition, one or more active and/or passive antennas may also be installed in the ceiling to further extend the range of the wireless and/or cellular network within the building. Each of the antennas may be designed to facilitate (RF) signal gain for a collection or range of frequencies. In some instances, the installation of active and/or passive antennas may increase the range of a communications network, while the installation of a ground plane throughout the ceiling may reduce the occurrence on multipath interference resulting in improved wireless and/or cellular network performance including increased bandwidth and range. |
| US09742058B1 |
Deployable quadrifilar helical antenna
Systems, devices, and methods for providing deployable and collapsible Quadrifilar Helical Antennas (QHA) on small satellites to improve communications in low earth orbit satellites. Monopole antennas are very popular for use on small satellites, generally because they are relatively easy to attach. By using circularly polarized antennas for the spacecraft and the ground station, polarization losses are virtually eliminated. The QHA can be designed to have a wide range of circularly polarized antenna patterns. Low power transmitters are employed on the small satellite to be consistent with the available energy. The communication link budgets are dependent on good radiation pattern characteristics for the small satellite downlink where higher data rates are required. Quadrifilar Helical Antennas can be collapsed and stowed inside a module to mount inside typical cubes known as 1U through 27U size small satellites. After launch from the rocket, the QHA can be deployed to its stored memory shape. The QHA radiating filars can be made from Nitinol wires having an activation temperature above which the filars resume their stored memory shape acquired during heating treatments. QHA applies an electrical direct current onto the filars after launch of the small satellite independent of the radio frequency of the QHA. |
| US09742056B2 |
Integrated antenna and proximity sensor element
An example electronic device may include an antenna module comprising an active element and a ground plane. The electronic device may include a proximity sensor element integrated within the antenna module, wherein the proximity sensor element is to detect proximity of a user. |
| US09742055B2 |
Antenna and electronic equipment using same
An antenna component for use in an antenna of electronic equipment, includes: a fastening part configured to connect with a metal plate in the electronic equipment, to make the metal plate serve as a part of the antenna component; and a radiator part connected to the fastening part and configured to generate antenna resonances in at least one frequency band. |
| US09742054B2 |
Electrical component holder
A holder is provided for holding an electrical component on a circuit board having a lead hole. The holder includes a body having a base for holding the electrical component and a connection member for mounting the body to the circuit board. The base includes a lead opening that is configured to hold a solder lead of the electrical component therein. The connection member extends from the base and is configured to mechanically connect to the circuit board such that the base holds an end of the solder lead of the electrical component within the lead hole of the circuit board. |
| US09742053B2 |
Methods of modifying erect concealed antenna towers and associated modified towers and devices therefor
The disclosure describes installing an antenna canister in a portion of a concealed antenna pole at a location that is below a top of the pole while the antenna pole is erect and associated components to facilitate the procedure, as well as multi-piece vertical rods, pole mounting bracket assemblies and retrofit kits. |
| US09742052B2 |
Device for transmitting between a microstrip on a circuit board and a waveguide using a signal line disposed within a housing that is soldered to the circuit board
A device for transmitting millimeter-wave signals between a microstrip formed on a circuit board and a waveguide, characterized by a housing which is soldered onto the circuit board with the aid of solder contacts and which contains a signal line, which is connected to the microstrip via a soldered connection suitable for use at high frequencies, and which connects this microstrip to a coupling point for the millimeter-wave signals, the coupling point facing the waveguide. |
| US09742051B2 |
High-frequency signal transmission line and manufacturing method thereof
A high-frequency signal transmission line includes a body including a plurality of first base layers and a second base layer stacked on one another in a stacking direction. The first base layers have a first relative permeability, and the second base layer has a relative permeability lower than the first relative permeability. A first signal line and a second signal line extending along the first signal line are provided in the body. In a cross section perpendicular or substantially perpendicular to a first direction in which the first signal line extends, the second base layer occupies at least a portion of an area between the first signal line and the second signal line. In the cross section perpendicular or substantially perpendicular to the first direction, the plurality of first base layers define a loop enclosing the first signal line, the second signal line and the second base layer. |
| US09742050B2 |
Methods and devices for grounding deep drawn resonators
Difficulties in grounding a non-integral, deep drawn resonator (DDR) to the filter body of a cavity may be substantially eliminated by preventing the movement of the DDR away from a grounding contact area on the filter body. The addition of a compression plate and stop limiter in the connection of the non-integral DR to the filter body helps insure that any such movement is eliminated or substantially reduced. |
| US09742049B2 |
Gravoltaic cells
Gravoltaic cell devices and methods are disclosed for producing robust electrochemical gravoltaic cells that convert a gravitational force into electrical energy. The cells includes a reaction vessel and a first stationary homogeneous volume of dissociated aqueous cations and a second stationary homogeneous aqueous volume of dissociated aqueous reactant cations, both volumes being disposed within the reaction vessel, and providing bulk solvent and anions a stationary bulk volume of a homogeneous mixture of solvent and dissociated anions collectively disposed homogeneously throughout the two layers of dissociated aqueous cations. The cell also includes an anode junction providing electrochemically active dissimilar anode/cation chemical species junction. The cell also includes a cathode junction providing a gravity-sustained electrochemically passive similar cathode/cation chemical species junction. One of the several purposes of the present invention is to further study and define said properties and to develop longer lasting interfaces. |
| US09742048B2 |
Metal-air battery
The invention provides a metal-air battery in which a metallic electrode can be smoothly inserted into a metal-air battery main body.The metal-air battery of the invention includes at least one cell. The cell includes an electrolytic tank that stores an electrolytic solution, a metallic electrode that is provided in the electrolytic tank and serves as an anode, at least one air electrode that serves as a cathode, an electrode insertion opening through which the metallic electrode is inserted into the electrolytic tank, and a position adjustment section. The position adjustment section is provided to adjust a position of the metallic electrode through contact between the metallic electrode and the position adjustment section during insertion of the metallic electrode into the electrolytic tank. |
| US09742044B2 |
Battery cell
A battery cell, in particular a lithium-ion battery cell, includes a housing, at least two electrical storage elements and a conductive cooling sheet metal. The at least two storage elements and the conductive cooling sheet metal are situated in the housing. |
| US09742042B2 |
Voltage protection and health monitoring of batteries with reference electrodes
In some variations, an apparatus provides real-time monitoring of voltage and differential voltage of both anode and cathode in a battery configured with at least one reference electrode. Voltage monitors are connected to a computer programmed for receiving anode voltage signals; receiving cathode voltage signals; calculating the derivative of the anode voltage with respect to time or with respect to capacity; and calculating the derivative of the cathode voltage with respect to time or with respect to capacity. Other variations provide an apparatus for real-time assessment of capacities of both anode and cathode in a battery, comprising a computer programmed for receiving electrode voltage signals; estimating first and second electrode open-circuit voltages at two different times, and correlating the first and second electrode open-circuit voltages to first and second electrode states of charge, respectively, for each of anode and cathode. The anode and cathode capacities may then be estimated independently. |
| US09742041B2 |
Lithium ion secondary battery system
An object of the present invention is to provide a battery system improved in output characteristics and/or storage characteristic while taking advantage of high energy density of a lithium ion secondary battery comprising a positive electrode containing a positive electrode active material having an operating potential of 4.5 V or more relative to a lithium metal. The present invention relates to a battery system having a first battery consisting of a 5 V-level battery(s), a second battery consisting of a 4 V-level battery(s), and a control system. |
| US09742040B2 |
Sodium-sulfur battery
A sodium-sulfur battery according to the present invention is provided with a reservoir space 100 that retains and solidifies a high-temperature molten material having flowed out of a cell 4, in order to prevent the high-temperature molten material from leaking out of a casing 1, even when an accident occurs to generate the high-temperature molten material inside the casing. The reservoir space 100 can be formed along a perimeter of the casing 1, or alternatively, can be formed inside the casing 1. The reservoir space 100 includes, for example, a composite member 15 of a rigid member 11, a heat-insulating material 12, and a heat-resisting material 13. |
| US09742037B2 |
Nonaqueous electrolyte battery
A nonaqueous electrolyte battery includes: a positive electrode, a negative electrode, and a nonaqueous electrolyte, wherein the positive electrode contains, as a positive electrode active material, a positive electrode material having a surface composition represented by the following formula (I); the nonaqueous electrolyte contains a halogenated carbonate represented by any of the following formulae (1) to (2) and an alkylbenzene represented by the following formula (3); a content of the halogenated carbonate is 0.1% by mass or more and not more than 50% by mass relative to the nonaqueous electrolyte; and a content of the alkylbenzene is 0.1% by mass or more and not more than 5% by mass relative to the nonaqueous electrolyte |
| US09742031B2 |
Lithium battery and the preparation method thereof
The present invention discloses a lithium battery, which comprises of a positive electrode plate, a negative electrode current collector substrate, a separator and electrolyte between the positive electrode plate and the negative electrode current collector substrate. The positive electrode plate comprises a positive electrode collector, a positive electrode active material-containing positive electrode layer attached to the positive electrode collector and positive electrode tab welded to the positive electrode collector. The negative electrode current collector substrate comprises a negative electrode current collector and negative electrode tab welded to the negative electrode current collector. The negative electrode current collector substrate is a current collector substrate with 6˜60 μm thickness having a planar or concavo-convex structure which is made from metal foil material or metal mesh with 6˜25 μm thickness. The electrolyte contains lithium salt and solvent, wherein the lithium salt is lithium hexafluorophosphate and its concentration in the electrolyte is between 1.5˜7 mol/L. The lithium battery of the present invention has characteristics of high power, high energy and low self-discharge rate. Meanwhile, the present invention also discloses a preparation method of the lithium battery and use thereof. |
| US09742029B2 |
Secondary battery including a gel electrolyte, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus including the same
A secondary battery includes a cathode, an anode, and an electrolyte layer including non-aqueous electrolytic solution and a polymer compound. The polymer compound includes a graft copolymer. The graft copolymer includes a block copolymer as a main chain, and includes one or both of a homopolymer and a copolymer as one or more side chains. The block copolymer includes, as polymerization units, vinylidene fluoride and hexafluoropropylene. The homopolymer includes, as a polymerization unit, one selected from the group consisting of vinylidene fluoride, hexafluoropropylene, monomethyl maleate, trifluoroethylene, chlorotrifluoroethylene, acrylic acid, and methacrylic acid. The copolymer includes, as polymerization units, two or more selected from the group consisting of vinylidene fluoride, hexafluoropropylene, monomethyl maleate, trifluoroethylene, chlorotrifluoroethylene, acrylic acid, and methacrylic acid. |
| US09742016B2 |
Fuel cell startup apparatus and method
A fuel cell startup apparatus and method reduces high-voltage generation and corrosion of a cathode electrode that may occur because the density of oxygen is locally high in a cell near a central flow distributor after long-term parking of a fuel-cell vehicle. To this end, density control gas is selectably injected into a fuel supply line prior to supply of reaction gas of hydrogen and air in a fuel cell startup process after long-term parking to forcedly mix anode-side gas in the fuel supply line and the cell with the density control gas. |
| US09742014B2 |
Method for forming channels on diffusion media for a membrane humidifier
A membrane humidifier assembly for a membrane humidifier for a fuel cell system and a method for making the same is disclosed, the method comprising the steps of providing a material for forming a diffusion medium; forming a plurality of channels in the material with one of a channel-forming roller, a means for etching the material, and a press for forming the diffusion medium; and providing a pair of membranes, wherein the diffusion medium is disposed between the pair of membranes. |
| US09742013B2 |
System for inspecting quality of membrane-electrode assembly of fuel cell and quality inspection method thereof
A system for inspecting quality of a membrane-electrode assembly (MEA) of a fuel cell includes a bonding device configured to bond the MEA and a gas diffusion layer (GDL) to manufacture a bonded unit thereof. A transfer device adsorbs one surface of the bonded unit to transfer the bonded unit. An inspection device is disposed on one side of the bonded unit transferred by the transfer device and inspects an outer appearance of the bonded unit. A reversing device places the bonded unit thereon by the transfer device and reverses the bonded unit vertically. A loading and lifting device loads the bonded unit thereon after being transferred by the transfer device and adjusts a loading height. |
| US09742006B2 |
Method for preparing lithium iron phosphate nanopowder coated with carbon
The present invention relates to a method for preparing a lithium iron phosphate nanopowder coated with carbon, including the steps of (a) preparing a mixture solution by adding a lithium precursor, an iron precursor and a phosphorus precursor in a triethanolamine solvent, (b) putting the mixture solution into a reactor and reacting to prepare amorphous lithium iron phosphate nanoseed particle, and (c) heat treating the lithium iron phosphate nanoseed particle thus to prepare the lithium iron phosphate nanopowder coated with carbon on a portion or a whole of a surface of a particle, and a lithium iron phosphate nanopowder coated with carbon prepared by the above method. The lithium iron phosphate nanopowder coated with carbon having controlled particle size and particle size distribution may be prepared in a short time by performing two simple steps. |
| US09742001B2 |
Graphene foam-protected anode active materials for lithium batteries
A lithium-ion battery anode layer, comprising an anode active material embedded in pores of a solid graphene foam composed of multiple pores and pore walls, wherein (a) the pore walls contain a pristine graphene material having essentially no (less than 0.01%) non-carbon elements or a non-pristine graphene material having 0.01% to 5% by weight of non-carbon elements; (b) the anode active material is in an amount from 0.5% to 95% by weight based on the total weight of the graphene foam and the anode active material combined, and (c) some of the multiple pores are lodged with particles of the anode active material and other pores are particle-free, and the graphene foam is sufficiently elastic to accommodate volume expansion and shrinkage of the particles of the anode active material during a battery charge-discharge cycle to avoid expansion of the anode layer. Preferably, the solid graphene foam has a density from 0.01 to 1.7 g/cm3, a specific surface area from 50 to 2,000 m2/g, a thermal conductivity of at least 100 W/mK per unit of specific gravity, and/or an electrical conductivity no less than 1,000 S/cm per unit of specific gravity. |
| US09741998B2 |
Method for manufacturing energy-storage composite material
The present disclosure provides a method for manufacturing an energy-storage composite material. The method includes (a) providing a solution having a carbon substrate, and placing the solution in a pressure container, and a surface of the carbon substrate having an energy-storage active precursor; (b) stirring the solution having the carbon substrate at a first stirring speed, and venting air in the pressure container at a first temperature, such that a pressure in the pressure container reaches a first pressure and is maintained for a first period of time; and (c) introducing a fluid into the pressure container, stirring the solution having the carbon substrate at a second stirring speed, increasing a pressure and a temperature in the pressure container to a second pressure and a second temperature and maintaining for a second period of time, and then reducing the pressure to the atmosphere pressure to obtain an energy-storage composite material. |
| US09741997B2 |
Rechargeable battery
A rechargeable battery includes fuses inside and outside a cell, thereby improving safety by preventing abnormal breakdown from occurring in the cell due to an electric short circuit. The rechargeable battery includes an electrode assembly including a first electrode plate, a second electrode plate and a separator between the first electrode plate and the second electrode plate, a case accommodating the electrode assembly, and a first electrode terminal and a second electrode terminal electrically connected to the first electrode plate and the second electrode plate and protruding to the outside of the case. One of the first electrode terminal and the second electrode terminal includes a fuse part. |
| US09741993B1 |
Power terminal for implantable devices
A battery terminal for an implantable battery is described. The battery terminal includes a foil stack, first and second side elements, and a weld joint coupling the foil stack and the side elements. The side elements define a varying height profile and a greatest height adjacent an inner surface of the side element in contact with the foil stack. Each element may define a height profile along the width that tapers toward an outer surface, biasing mass of the element close to the foil stack. |
| US09741991B2 |
Integrated voltage sense and bus bar system and method for vehicles having a traction battery
A vehicle includes a traction battery having a plurality of battery cells positioned in an array with a non-conductive bus bar housing having a plurality of compartments insulated from one another and containing one or more bus bars each having an integrally formed voltage sense connector. Each compartment may accommodate terminals of a pair of adjacent battery cells to be coupled by the associated bus bar. The voltage sense connector may include fingers for crimping and securing a voltage sense wire or a welding pad for welding, soldering, or similar connection. The voltage sense wires connect to a battery control module. |
| US09741989B2 |
Polyolefin microporous membrane
Disclosed is a polyolefin microporous membrane including a multilayer film having two or more layers. In this polyolefin microporous membrane, at least one surface layer has a thickness of not less than 0.2 μm but not more than 5 μm and contains inorganic particles, while at least one layer contains a polyethylene and has an air permeability of not less than 50 second/100 cc but not more than 1000 second/100 cc and a puncture strength of not less than 3.0 N/20 μm. |
| US09741988B2 |
Non-aqueous electrolyte secondary battery and method of manufacturing the same
A non-aqueous electrolyte secondary battery includes a separator including a base material and a heat resistance layer formed on at least one main surface of the base material and containing inorganic particles and a resin binder. The non-aqueous electrolyte secondary battery further includes an electrode composite material layer stacked on the heat resistance layer and containing electrode active material particles and an interposed layer interposed between the heat resistance layer and the electrode composite material layer. In the interposed layer, the inorganic particles, the resin binder, and the electrode active material particles are present as being mixed. A ratio of a thickness of the interposed layer to a thickness of the base material is not lower than 1% and not higher than 5%. |
| US09741987B2 |
Accumulator device
An electricity storage device includes a first electrode sheet, separators, and a second electrode sheet. The separators each include primary protrusions, which are located on the opposite sides of the first electrode sheet and protrude from the first electrode sheet, and secondary protrusions, which are located on the opposite sides of the first electrode sheet and protrude from the first electrode sheet in a direction different from the protrusion direction of the primary protrusions. The primary protrusions are welded to each other in a first weld region, and the secondary protrusions are welded to each other in a second weld region. The region width of the first weld region in the protrusion direction of the primary protrusions is greater than the region width of the second weld region in the protrusion direction of the secondary protrusions. |
| US09741985B2 |
Sealing plate for prismatic secondary battery, method for producing the same, and prismatic secondary battery using the same
A sealing plate for a prismatic secondary battery includes a pair of mouths for attaching a negative and positive electrode terminals, one mouth being formed near one end in a longitudinal direction of the sealing plate, and the other mouth being formed near the other end, coining areas used for positioning of an insulating member and formed around the pair of mouths on a front face of the sealing plate, a gas release valve and an electrolyte pour hole formed between the pair of mouths, and grooves formed between the respective coining areas and the long side edge of the sealing plate. The groove has a smaller depth near the gas release valve than the depth near the coining area. Even when the sealing plate is produced through forging, the front face has good flatness and the coining areas are unlikely to have a sink mark or a shear drop. |
| US09741975B2 |
Safely ingestible batteries
A battery for use in electronic devices and which is safely ingested into a body and a related method of making the battery. The battery includes an anode, a cathode and a quantum tunneling composite coating. The quantum tunneling composite coating covers at least a portion of at least one of the anode or the cathode and provides pressure sensitive conductive properties to the battery including a compressive stress threshold for conduction. The compressive stress threshold may be greater than a pre-determined applied stress in a digestive tract of the body in order to prevent harm if the battery is ingested. The battery may include a waterproof seal that extends between the quantum tunneling composite coating and a gasket separating the anode and cathode to inhibit the battery from short circuiting in a conductive fluid below the compressive stress threshold. |
| US09741973B2 |
Display device and method for manufacturing the same
A display device and a method for manufacturing the same, the display device including a substrate that includes a first area and a second area; a first pixel electrode on the first area of the substrate; a first organic layer on the first pixel electrode, the organic layer including a first light emitting layer; a first counter electrode on the first organic layer; an auxiliary layer on the first counter electrode at the first area of the substrate; a second pixel electrode on the second area of the substrate; a second organic layer on the second pixel electrode, the second organic layer including a second light emitting layer; a second counter electrode on the second organic layer; and an upper reflective layer on the second counter electrode at the second area of the substrate. |
| US09741966B2 |
Method for hybrid encapsulation of an organic light emitting diode
Methods and apparatus for encapsulating organic light emitting diode (OLED) structures disposed on a substrate using a hybrid layer of material are provided. The encapsulation methods may be performed as single or multiple chamber processes. The processing parameters used during deposition of the hybrid layer of material allow control of the characteristics of the deposited hybrid layer. The hybrid layer may be deposited such that the layer has characteristics of an inorganic material in some sublayers of the hybrid layer and characteristics of an organic material in other sublayers of the hybrid layer. Use of the hybrid material allows OLED encapsulation using a single hard mask for the complete encapsulating process with low cost and without alignment issues present in conventional processes. |
| US09741964B2 |
Frameless display device with concealed drive circuit board and manufacturing method thereof
The present invention provides a frameless display device and a manufacturing method thereof, in which a conductive connection body is formed on a substrate; a first via is formed in a protective layer to be located above the conductive connection body and a second via hole is formed in the substrate to be located under the conductive connection body. A circuit layout layer is connected through the first via with the conductive connection body and a flexible connection circuit connected to a drive circuit board is connected through the second via with the conductive connection body thereby achieving electrical connection between the drive circuit board and the circuit layout layer. The method is simple and easy to operate and in a frameless display device so manufactured, the flexible connection circuit and the drive circuit board are both arranged at a back side of the substrate without occupying an effective display zone thereby achieving frameless displaying and improving displaying quality. |
| US09741961B2 |
Organic light emitting display device and method for manufacturing the same
The present disclosure relates to an organic light emitting display device and a method for manufacturing the same. The present disclosure suggests an organic light emitting display device including an organic layer; a display element layer including a display area representing video data and a pad area extended from the display area, on the organic layer; film elements formed on the display element layer; a film type printed circuit board connected to the pad area; and a reinforcing adhesive filling a space between the film type printed circuit board and the film elements. |
| US09741955B2 |
Light-emitting element, light-emitting device, and method for manufacturing the same
An object is to provide a light-emitting element with high emission efficiency. Another object is to provide a light-emitting element with a long lifetime and high reliability. Another object is to provide a light-emitting element driven at low voltage. A first light-emitting layer whose one surface is in contact with a hole-transport layer, and a second light-emitting layer which is in contact with the other surface of the first light-emitting layer and includes a bipolar host material and a light-emitting substance are provided, where the hole-transport property of the first light-emitting layer is higher than that of the second light-emitting layer. A recombination region of holes and electrons is preferably provided in the light-emitting layer. The hole-transport layer preferably includes an anti-reducing substance. |
| US09741948B2 |
Self-assembled peptide nucleic acids
Ordered (e.g., self-assembled) structures, arranged from peptide nucleic acids and/or analogs thereof, are disclosed. The peptide nucleic acids forming the ordered structures comprise from 1 to 10 PNA backbone units, at least one comprising a guanine nucleobase or an analog thereof. Processes of generating the ordered structures, uses thereof and articles-of manufacturing, devices and systems containing same are also disclosed. |
| US09741943B2 |
Condensed fluoranthene compound, material for organic electroluminescent element using this compound, organic electroluminescent element using this material, and electronic device
A fused fluoranthene compound which includes an indeno[3,2-b]fluoranthene skeleton having a hetero atom is a novel compound, which is useful as a material for organic electroluminescence devices for use in an organic electroluminescence device and an electronic equipment. |
| US09741941B2 |
Organic electroluminescent materials and devices
A compound that has the structure according to Formula 1: as well as, devices and formulations containing the compound of Formula 1 are disclosed. In the compound of Formula 1: X1, X2, X3, X4, X5, and X6 are independently selected from the group consisting of C—R and N; each R is independently selected from the group consisting of hydrogen, deuterium, halide, alkyl, cycloalkyl, heteroalkyl, arylalkyl, alkoxy, aryloxy, amino, silyl, alkenyl, cycloalkenyl, heteroalkenyl, alkynyl, aryl, heteroaryl, acyl, carbonyl, carboxylic acids, ester, nitrile, isonitrile, sulfanyl, sulfinyl, sulfonyl, phosphino, and combinations thereof; and at least one R comprises a donor group with at least two electron donating nitrogens. |
| US09741940B2 |
Thiadiazole, light-emitting element, light-emitting apparatus, authentication apparatus, and electronic device
The thiadiazole represented by formula (2) or (4), when used as a light-emitting material in a light-emitting element, allows the light-emitting element to emit near-infrared light: wherein in formulae (2) and (4), each R independently represents a hydrogen atom, an alkyl group, or a substituted or unsubstituted aryl group. There may be a ring formed by a carbon linkage between two adjacent R's. |
| US09741937B2 |
Fluorene derivative, light-emitting element, light-emitting device, electronic device, and lighting device
An object is to provide a light-emitting element having high light-emission efficiency by provision of a novel fluorene derivative as represented by General Formula (G1) below. In the formula, R1 to R8 independently represent any of a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted phenyl group, or a substituted or unsubstituted biphenyl group. Further, α1 to α4 independently represent any of a substituted or unsubstituted arylene group having 6 to 12 carbon atoms. Furthermore, Ar1 and Ar2 independently represent any of an aryl group having 6 to 13 carbon atoms in a ring and Ar3 represents an alkyl group having 1 to 6 carbon atoms or a substituted or unsubstituted aryl group having 6 to 12 carbon atoms. J, k, m, and n each independently represent 0 or 1. |
| US09741935B2 |
Organic light-emitting device
An organic light-emitting device including a first electrode, a second electrode and an organic layer disposed between the first electrode and the second electrode is provided. |
| US09741930B2 |
Materials and components in phase change memory devices
Phase change memory cells, structures, and devices having a phase change material and an electrode forming an ohmic contact therewith are disclosed and described. Such electrodes can have a resistivity of from 10 to 100 mOhm·cm. |
| US09741929B2 |
Method of making a spin-transfer-torque magnetoresistive random access memory (STT-MRAM)
A method of making a novel STT-MRAM is disclosed, wherein the STT-MRAM comprises a novel apparatus along with a method of operating a spin-torque magnetoresistive memory and a plurality of magnetoresistive memory elements having spin-transfer torques acting on a recording layer from a MTJ stack and a novel magnetoresistance with a spin-valve layer. The spin-valve layer is field-reversible between two stable magnetization states either parallel or anti-parallel to the fixed reference layer magnetization through a set/reset current pulse along a conductive line provided by a control circuitry, accordingly, the magetoresistive element is pre-configured into a reading mode having canceled spin-transfer torques or a recording mode having additive spin-transfer torques. |
| US09741922B2 |
Self-latching piezocomposite actuator
A self-latching piezocomposite actuator includes a plurality of shape memory ceramic fibers. The actuator can be latched by applying an electrical field to the shape memory ceramic fibers. The actuator remains in a latched state/shape after the electrical field is no longer present. A reverse polarity electric field may be applied to reset the actuator to its unlatched state/shape. Applied electric fields may be utilized to provide a plurality of latch states between the latched and unlatched states of the actuator. The self-latching piezocomposite actuator can be used for active/adaptive airfoils having variable camber, trim tabs, active/deformable engine inlets, adaptive or adjustable vortex generators, active optical components such as mirrors that change shapes, and other morphing structures. |
| US09741921B2 |
Hydrogen free amorphous silicon as insulating dielectric material for superconducting quantum bits
A hydrogen-free amorphous dielectric insulating film having a high material density and a low density of tunneling states. The film is prepared by deposition of a dielectric material on a substrate having a high substrate temperature Tsub under high vacuum and at a controlled low deposition rate. In one embodiment, the film is amorphous silicon while in another embodiment the film is amorphous germanium. |
| US09741920B1 |
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits. |
| US09741918B2 |
Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit
A method for increasing the integration level of superconducting electronic circuits, comprising fabricating a series of planarized electrically conductive layers patterned into wiring, separated by planarized insulating layers, with vias communicating between the conductive layers. Contrary to the standard sequence of patterning from the bottom up, the pattern of vias in at least one insulating layer is formed prior to the pattern of wiring in the underlying conductive layer. This enables a reduction in the number of planarization steps, leading to a fabrication process which is faster and more reliable. In a preferred embodiment, the superconductor is niobium and the insulator is silicon dioxide. This method can provide 10 or more wiring layers in a complex integrated circuit, and is compatible with non-planarized circuits placed above the planarized wiring layers. |
| US09741915B2 |
LED module having LED element connected to metal layer exposed by opening in multi-layer resist
A light emitting diode (LED) module including: a substrate; a resist including a plurality of layers above the substrate; and an LED element mounted above the substrate. A content percentage of at least one of a phenyl group, an ester bond, and a carbon double bond in a second layer that is an uppermost layer of the plurality of layers is lower than a content percentage of the at least one of the phenyl group, the ester bond, and the carbon double bond in a first layer that is an underlying layer of the plurality of layers, the underlying layer being located below the uppermost layer. |
| US09741914B2 |
Lens for light-emitting device and method of manufacturing light-emitting device package
Disclosed are a lens for a light-emitting device usable in a display apparatus or a lighting apparatus, and a method of manufacturing a light-emitting device package. The lens may include a lens body including a light-receiving portion provided in a lower surface of the lens body, a light-emitting portion provided on an upper surface of the lens body, and a recess provided at a center of the upper surface of the lens body, and a flat portion provided in a horizontal shape on a bottom surface of the recess perpendicularly to a main emission line of light emitted from a light-emitting device to emit at least a part of light received through the light-receiving portion, upward. A diameter of the flat portion may be 1/100 to 1/10 of an inlet diameter of the light-receiving portion. |
| US09741911B2 |
Curable resin composition, optical element and optical semiconductor device
Disclosed is a curable resin composition that has significantly high transparency in the UV region, UV resistance and heat resistance, does not cause cracking, peeling or coloration even when used for sealing a UV LED to which high power is applied, and inhibits shrinking during curing. The curable resin composition includes 20-85 wt % of an alkoxy oligomer having a specific structure and present as liquid at room temperature and 15-80 wt % of a silicone resin present as solid at room temperature. The curable resin composition preferably includes 0.1-20 parts by weight of phosphoric acid, as a catalyst, based on 100 parts by weight of the combined weight of the alkoxy oligomer and the silicone resin. |
| US09741909B2 |
Package, light emitting device, and methods of manufacturing the package and the light emitting device
A package and a light emitting device with which production of burrs can be suppressed, and methods of manufacturing the package and the light emitting device easily are provided. A package includes a pair of lead electrodes made of metal plates and a resin molded body. A recess portion for mounting a light emitting element is formed. The pair of lead electrodes are exposed on a bottom surface of the recess portion. At least one of the pair of lead electrodes includes a groove portion that is formed on the metal plate and along a periphery of a surface of the metal plate exposed on a bottom surface of the recess portion. |
| US09741907B2 |
Light emitting diode package and manufacturing method thereof
A light emitting diode package includes a light emitting diode chip disposed in a housing, a first phosphor configured to emit green light, and a second phosphor configured to emit red light. White light is configured to be formed by a synthesis of light emitted from the light emitting diode chip, the first phosphor, and the second phosphor. The second phosphor has a chemical formula of A2MF6:Mn4+, A is one of Li, Na, K, Rb, Ce, and NH4, and M is one of Si, Ti, Nb, and Ta, and the Mn4+of the second phosphor has a mole range of about 0.02 to about 0.035 times the M. |
| US09741906B2 |
Light-emitting dies incorporating wavelength-conversion materials and related methods
In accordance with certain embodiments, electronic devices feature a polymeric binder, a frame defining an aperture therethrough, and a semiconductor die (e.g., a light-emitting or a light-detecting element) suspended in the binder and within the aperture of the frame. |
| US09741905B2 |
Optoelectronic element
An optoelectronic element includes an optoelectronic unit, a first metal layer, a second metal layer, a conductive layer and a transparent structure. The optoelectronic unit has a central line in a top view, a top surface, and a bottom surface. The second metal layer is formed on the top surface, and has an extension portion crossing over the central line and extending to the first metal layer. The conductive layer covers the first metal layer and the extension portion. The transparent structure covers the bottom surface without covering the top surface. |
| US09741903B2 |
Light-emitting device and light emitting device package having the same
The light-emitting element provides: a light-emitting structure, which comprises a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, and a second conductive semiconductor layer under the active layer. A first electrode is disposed under a first region under the light-emitting structure and electrically connected to the second conductive semiconductor layer; a second electrode disposed under a second region under the light-emitting structure and electrically connected to the first conductive semiconductor layer. A connection electrode is connected the second electrode with the first conductive semiconductor layer. An insulating layer is disposed between the first and second electrodes; a first protective layer is disposed around the lower circumference of the light-emitting structure; and a second protective layer is disposed between the insulating layer and the light-emitting structure. |
| US09741900B2 |
Nitride semiconductor light emitting element
A nitride semiconductor light emitting element 1 includes a second conductivity type nitride semiconductor layer which is formed above a first conductivity type nitride semiconductor layer, a first electrode 17a which is formed on a first region of the second conductivity type nitride semiconductor layer with a first current non-injection layer 13a in between, a first current diffusing layer 14a which is formed between the first current non-injection layer 13a and the first electrode 17a, a second electrode 17b which is formed on a second region of the second conductivity type nitride semiconductor layer with a second current non-injection layer 13b in between, a second current diffusing layer 14b which is formed on the second region and on the second current non-injection layer 13b, and an extending portion 17c which extends from the first electrode 17a and reaches the exposed first conductivity type nitride semiconductor layer. |
| US09741899B2 |
Device with inverted large scale light extraction structures
An interface including roughness components for improving the propagation of radiation through the interface is provided. The interface includes a first profiled surface of a first layer comprising a set of large roughness components providing a first variation of the first profiled surface having a first characteristic scale and a second profiled surface of a second layer comprising a set of small roughness components providing a second variation of the second profiled surface having a second characteristic scale. The first characteristic scale is approximately an order of magnitude larger than the second characteristic scale. The surfaces can be bonded together using a bonding material, and a filler material also can be present in the interface. |
| US09741895B2 |
Removal of 3D semiconductor structures by dry etching
Various embodiments include methods of fabricating a semiconductor device that include providing a plurality of nanostructures extending away from a support, forming a flowable material layer between the nanostructures, forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask and etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched. |
| US09741894B2 |
Ion implant system having grid assembly
An ion implantation system having a grid assembly. The system includes a plasma source configured to provide plasma in a plasma region; a first grid plate having a plurality of apertures configured to allow ions from the plasma region to pass therethrough, wherein the first grid plate is configured to be biased by a power supply; a second grid plate having a plurality of apertures configured to allow the ions to pass therethrough subsequent to the ions passing through the first grid plate, wherein the second grid plate is configured to be biased by a power supply; and a substrate holder configured to support a substrate in a position where the substrate is implanted with the ions subsequent to the ions passing through the second grid plate. |
| US09741892B2 |
Solar cell module production method, and solar cell module adhesive application system
A solar cell module production method involves applying an adhesive on a light-receiving surface and a rear surface of a solar cell having electrodes on the light-receiving surface and the rear surface, and positioning and attaching a wiring material on the adhesive. Specifically, the solar cell, which is positioned with the light-receiving surface facing upward, is inverted so that the rear surface is facing upward, and the adhesive is applied on the rear surface; and then the solar cell is inverted once again so that the light-receiving surface is facing upward, and the adhesive is applied to the light-receiving surface. |
| US09741891B2 |
Eva sheet comprising microparticles for solar cell and method for manufacturing the same
An EVA sheet for a photovoltaic module comprising microparticles, the main component of which is an ethylene-vinyl acetate resin is provided.A method for manufacturing an EVA sheet for a photovoltaic module comprising the steps of: (a) preparing microparticles, the main component of which is an ethylene-vinyl acetate resin; (b) dispersing the microparticles; and (c) sintering the dispersed microparticles is provided. |
| US09741889B2 |
Contact for silicon heterojunction solar cells
A photovoltaic device and method include a substrate coupled to an emitter side structure on a first side of the substrate and a back side structure on a side opposite the first side of the substrate. The emitter side structure or the back side structure include layers alternating between wide band gap layers and narrow band gap layers to provide a multilayer contact with an effectively increased band offset with the substrate and/or an effectively higher doping level over a single material contact. An emitter contact is coupled to the emitter side structure on a light collecting end portion of the device. A back contact is coupled to the back side structure opposite the light collecting end portion. |
| US09741888B2 |
Monolithic multiple solar cells
A monolithic multiple solar cell includes at least three partial cells, with a semiconductor mirror placed between two partial cells. The aim of the invention is to improve the radiation stability of said solar cell. For this purpose, the semiconductor mirror has a high degree of reflection in at least one part of a spectral absorption area of the partial cell which is arranged above the semiconductor mirror and a high degree of transmission within the spectral absorption range of the partial cell arranged below the semiconductor mirror. |
| US09741883B2 |
Floating cover sheet assembly having a solar module
A floating cover sheet of a liquid reservoir is configured to rest on the liquid surface and includes a plurality of elongated sheet panels each defining edges and a lower region. The sheet panels are connected to one another and each of the sheet panels has a buoyant carrier sheet disposed in the lower region thereof. The buoyant carrier sheet is made of plastic and defines a carrier surface. A plurality of panel-shaped solar modules are applied to corresponding ones of the carrier surfaces of the carrier sheets. The solar module has a width less than the width of the corresponding sheet panel so as to define, on each sheet panel, a strip of carrier material free of the solar module corresponding thereto and configured to be walked on and to be slip resistant. |
| US09741881B2 |
Photovoltaic module including integrated photovoltaic cells
A photovoltaic module and its manufacturing method. The module includes a first support wafer made of sintered silicon and a second layer of single-crystal silicon. |
| US09741880B2 |
Three-dimensional conductive electrode for solar cell
A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and forming a continuous photovoltaic stack including an N-type layer, a P-type layer and an intrinsic layer on the first electrode. A second electrode layer is deposited over the photovoltaic stack such that gaps or fissures occur in the second electrode layer between the pillar structures. The second electrode layer is wet etched to open up the gaps or fissures and reduce the second electrode layer to form a three-dimensional electrode of substantially uniform thickness over the photovoltaic stack. |
| US09741877B2 |
Composition for solar cell electrode and electrode prepared using the same
A composition for solar cell electrodes, the composition including silver (Ag) powder; a glass frit; an organic binder; and a solvent, the organic binder including a compound containing a repeat unit represented by Formula 1: wherein R1 is Na+, K+, NH4+, or PH3+; R2 is a hydrogen atom or a C1 to C2 alkyl group; and n is an integer of 1 to 3,500. |
| US09741874B2 |
Scalable voltage source
A scalable voltage source having a number N of partial voltage sources implemented as semiconductor diodes connected to one another in series, wherein each of the partial voltage sources has a semiconductor diode with a p-n junction. A tunnel diode is formed between sequential pairs of partial voltage sources, wherein the tunnel diode has multiple semiconductor layers with a larger band gap than the band gap of the p/n absorption layers and the semiconductor layers with the larger band gap are each made of a material with modified stoichiometry and/or a different elemental composition than the p/n absorption layers of the semiconductor diode. The partial voltage sources and the tunnel diodes are monolithically integrated together, and jointly form a first stack with a top and a bottom, and the number N of partial voltage sources is greater than or equal to two. |
| US09741860B2 |
Semiconductor device
A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion. |
| US09741857B2 |
Approach for an area-efficient and scalable CMOS performance based on advanced Silicon-On-Insulator (SOI), Silicon-On-Sapphire (SOS) and Silicon-On-Nothing (SON) technologies
New, distinct, and useful architectures for single-legged SOI-MOS were established and fabricated for the very first time. They incorporated into their architectures an innovative new configuration to wire the device Body to the Body-Tied-Source. This new configuration drastically increased the conductance between the Body and the Body-Tied-Source. This consequently allowed these devices to effectively support much higher operating biases. Same configuration also functioned on structures with very large peripheries. These gave proportional increase in this same conductivity, and for same area-efficiency, with the increase of their peripheries to accommodate higher currents. The functional model that governs this proportional scaling in these new architectures for single-legged SOI-MOS devices was established and is being claimed through this patent for the very first time. Through it, single-legged SOI-MOS devices will efficiently scale to area-efficient ultra large peripheries with minimal hits to their bandwidth. |
| US09741854B2 |
Method for manufacturing semiconductor device
There is provided a method for manufacturing a semiconductor device including a substrate including a plurality of active regions, a plurality of gate electrodes extending in a first direction to intersect a portion of the plurality of active regions, and including first and second gate electrodes disposed to be adjacent to each other in the first direction, a gate isolation portion disposed between the first and second gate electrodes. The gate isolation portion includes a first layer and second layers disposed on both ends of the first layer in a second direction perpendicular to the first direction. |
| US09741846B2 |
Semiconductor device
A semiconductor device includes a lateral transistor having: a semiconductor substrate including a drift layer; a first impurity layer in the drift layer; a channel layer in the drift layer; a second impurity layer in the channel layer; a separation insulation film on the drift layer between the channel layer and the first impurity layer; a gate insulation film on a channel region between the second impurity layer and the drift layer connected with the separation insulation film; a gate electrode on the gate insulation film and the separation insulation film; a first electrode connected with the first impurity layer; a second electrode connected with the second impurity layer and the channel layer; and a field plate on the separation insulation film between the gate electrode and the first electrode and connected with the first electrode. The field plate is larger than the gate electrode in a current direction. |
| US09741845B2 |
Lateral high voltage transistor
A device and a method for forming a device are disclosed. The device includes a substrate with a high voltage (HV) device region. The HV device region is defined with first and second device isolation regions and an internal dielectric region which are shallow trench isolation (STI) regions. A HV transistor is disposed in the HV device region. The HV transistor includes a gate dielectric layer on the substrate, a gate disposed on the gate dielectric layer, and a source region disposed in the substrate adjacent to the gate and first device isolation region while a drain region disposed in the substrate adjacent to the second device isolation region. A drift well and a body well are disposed in the substrate. At least one buried RESURF region is disposed under the internal dielectric region. |
| US09741843B2 |
Semiconductor device
A semiconductor device in which current sensing accuracy is maintained while ruggedness of a current sensing region is improved. The semiconductor device includes a semiconductor substrate; a main element provided on the semiconductor substrate and having a first trench gate structure including a first trench disposed on a first main surface side of the semiconductor substrate; a gate insulating film disposed along an inner wall of the first trench; and a gate electrode disposed inside the first trench; and a current detecting element for detecting a current flowing into the semiconductor substrate when the main element is operating provided on the semiconductor substrate and having a second trench gate structure including a second trench disposed on the first main surface side of the semiconductor substrate; the gate insulating film disposed along an inner wall of the second trench; and the gate electrode disposed inside the second trench. |
| US09741841B2 |
Group III-V semiconductor device with strain-relieving layers
According to one exemplary embodiment, a group III-V semiconductor device includes at least one transition layer situated over a substrate. The group III-V semiconductor device further includes a first strain-relieving interlayer situated over the at least one transition layer and a second strain-relieving interlayer situated over the first strain-relieving interlayer. The group III-V semiconductor device further includes a first group III-V semiconductor body situated over the second strain-relieving interlayer. The first and second strain-relieving interlayers comprise different semiconductor materials so as to reduce a strain in the first group III-V semiconductor body. The second strain-relieving interlayer can be substantially thinner than the first strain-relieving interlayer. |
| US09741838B2 |
Semiconductor device
A semiconductor device includes a plurality of gate electrodes. Each gate electrode includes a first portion extending from a first end to a second end and a second portion extending parallel the first portion from a first end to a second end. The first and second portions are spaced from each other. A third portion of at least one gate electrode connects the first end of the first portion to the first end of the second portion of the gate electrode. A first insulating film is on the plurality of gate electrodes. A first interconnect portion is disposed on the first or second portion the gate electrode to electrically connecting the gate electrode to a gate pad. A second interconnect portion is disposed on semiconductor regions between the gate electrodes and electrically connects the semiconductor regions to an emitter pad. |
| US09741832B2 |
Tunneling field effect transistors with a variable bandgap channel
Tunneling field effect transistors (TFETs) including a variable bandgap channel are described. In some embodiments, one or more bandgap characteristics of the variable bandgap channel may be dynamically altered by at least one of the application or withdrawal of a force, such as a voltage or electric field. In some embodiments the variable bandgap channel may be configured to modulate from an ON to an OFF state and vice versa in response to the application and/or withdrawal of a force. The variable bandgap channel may exhibit a bandgap that is smaller in the ON state than in the OFF state. As a result, the TFETs may exhibit one or more of relatively high on current, relatively low off current, and sub-threshold swing below 60 mV/decade. |
| US09741831B2 |
FinFET and method for manufacturing the same
A method for manufacturing a FinFET, and FinFETs are provided. In various embodiments, the method for manufacturing a FinFET includes forming a fin structure over a substrate. Next, a dummy gate is deposited across over the fin structure. The method continues with forming a pair of first spacers on sidewalls of the dummy gate. Then, a source/drain region is formed in the fin structure not covered by the dummy gate. The method further includes removing the dummy gate to expose the fin structure. After that, the first spacers are truncated, and a gate stack is formed to cover the exposed fin structure and top surfaces of the first spacers. |
| US09741824B2 |
Semiconductor device and fabrication method thereof
The present disclosure provides a method for forming a semiconductor device. The method includes providing a semiconductor substrate; forming a gate structure on the semiconductor substrate; and forming trenches in the semiconductor substrate on both sides of the gate structure. The method also includes forming a stress layer on inner sidewalls of each trench to fill up the trench; forming an interlayer on the stress layer, and forming a capping layer on the interlayer, wherein a top surface of the capping layer is higher than a top surface of the semiconductor substrate, and a lattice mismatch between the interlayer and the capping layer is lower than a lattice mismatch between the capping layer and the stress layer. |
| US09741822B1 |
Simplified gate stack process to improve dual channel CMOS performance
A semiconductor device and method of making the same wherein the semiconductor device includes a pFET region including a SiGe channel having a Si-rich top surface within the gate portion, and an nFET region including a Si channel. The method includes subjecting both the pFET and nFET regions to a single high-temperature anneal process thereby avoiding the need for an additional spike anneal process at RMG module. |
| US09741816B2 |
Electrical device and method for manufacturing same
A method for manufacturing an electrical device is disclosed. In an embodiment, the method includes providing a first layer of a first conductivity type, providing an intrinsic layer onto the first layer, providing one or more trenches into the intrinsic layer, filling the one or more trenches with a material of a second conductivity type opposite to the first conductivity type, and providing a second layer of a second conductivity type onto the intrinsic layer. |
| US09741814B2 |
Semiconductor device with fin transistors and manufacturing method of such semiconductor device
A semiconductor device including: a first conductivity type transistor and a second conductivity type transistor, wherein each of the first conductivity type transistor and the second conductivity type includes agate insulating film formed on a base, a metal gate electrode formed on the gate insulating film, and side wall spacers formed at side walls of the metal gate electrode, wherein the gate insulating film is made of a high dielectric constant material, and wherein offset spacers are formed between the side walls of the metal gate electrode and the inner walls of the side wall spacers in any one of the first conductivity type transistor and the second conductivity type transistor, or offset spacers having different thicknesses are formed in the first conductivity type transistor and the second conductivity type transistor. |
| US09741813B2 |
Pure boron for silicide contact
A semiconductor device includes a gate disposed over a substrate; a source region and a drain region on opposing sides of the gate; and a pair of trench contacts over and abutting an interfacial layer portion of at least one of the source region and the drain region; wherein the interfacial layer includes boron in an amount in a range from about 5×1021 to about 5×1022 atoms/cm2. |
| US09741812B1 |
Dual metal interconnect structure
Source/drain contact structures that exhibit low contact resistance and improved electromigration properties are provided. After forming a first contact conductor portion comprising a metal having a high resistance to electromigration such as tungsten at a bottom portion of source/drain contact trench to form direct contact with a source/drain region of a field effect transistor, a second contact conductor portion comprising a highly conductive metal such as copper or a copper alloy is formed over the first contact conductor portion. |
| US09741811B2 |
Integrated circuit devices including source/drain extension regions and methods of forming the same
Integrated circuit devices may include a stack that includes channel regions and gate electrodes stacked in an alternating sequence in a vertical direction. The channel regions may include impurities having a first conductivity type. The integrated circuit devices may also include source/drain regions on respective opposing sides of the stack, and the source/drain regions may be spaced apart from each other in a horizontal direction and may include impurities having a second conductivity type that is different from the first conductivity type. The integrated circuit devices may further include extension regions that may be between respective ones of channel regions and one of the source/drain regions and may include impurities having the second conductivity type. Each of the extension regions may have a thickness in the vertical direction that is less than those of the channel regions and the one of the source/drain regions. |
| US09741808B2 |
Split-gate trench power MOSFET with protected shield oxide
A plurality of gate trenches is formed into a semiconductor substrate in an active cell region. One or more other trenches are formed in a different region. Each gate trench has a first conductive material in lower portions and a second conductive material in upper portions. In the gate trenches, a first insulating layer separates the first conductive material from the substrate, a second insulating layer separates the second conductive material from the substrate and a third insulating material separates the first and second conductive materials. The other trenches contain part of the first conductive material in a half-U shape in lower portions and part of the second conductive material in upper portions. In the other trenches, the third insulating layer separates the first and second conductive materials. The first insulating layer is thicker than the third insulating layer, and the third insulating layer is thicker than the second. |
| US09741804B2 |
Thin film transistor substrate and display panel having film layer with different thicknesses
A thin film transistor (TFT) substrate includes a substrate and a TFT. The TFT is disposed on the substrate and comprises a gate, a gate dielectric layer, a film, a source and a drain. The gate is disposed on the substrate. The gate dielectric layer is disposed on the gate and the substrate. The film is disposed above the gate dielectric layer, and the source and the drain are disposed on the film and contacts with the film respectively. Wherein, there is an interval between the source and the drain, and the film corresponding to the interval has an arc concave portion. In addition, a display panel is also disclosed. |
| US09741793B2 |
Semiconductor device with false drain
An electronic apparatus includes a semiconductor substrate and first and second transistors disposed in the semiconductor substrate. The first transistor includes a channel region and a drain region adjacent the channel region. The second transistor includes a channel region, a false drain region adjacent the channel region, and a drain region electrically coupled to the channel region by a drift region such that the second transistor is configured for operation at a higher voltage level than the first transistor. The respective channel regions of the first and second transistors have a common configuration characteristic. |
| US09741782B2 |
Active matrix organic light-emitting display and display apparatus
An AMOLED comprises a plurality of pixel structures arranged in a matrix and one layer of power supply signal electrode configured to provide a power supply voltage signal for the pixel structures, and the power supply signal electrode has a planar structure. The planar power supply signal electrode can greatly reduce its resistance and hence can reduce the IR drop of power supply voltage signals that are transmitted over the power supply signal electrode, effectively reduce the impact of the IR drop on the display effect, and remarkably reduce the power consumption of a panel. |
| US09741780B2 |
Organic light-emitting diode display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a substrate including a display area configured to display an image and the display area includes first and second regions. A plurality of OLEDs are formed in the display area and separated from one another, and a plurality of pixel circuits are formed in the display area and include first and second pixel circuits respectively formed in the first and second regions. First and second contact holes are respectively formed in the first and second pixel circuits, each pixel circuit including thin film transistors (TFTs) including first and second TFTs and electrically connected to the OLEDs. Each pixel circuit includes a node line configured to electrically connect the first TFT to the second TFT through the first and second contact holes, and the first contact hole of is different from the second contact hole. |
| US09741779B2 |
Oxide semiconductor device
One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer. |
| US09741778B2 |
Organic light-emitting diode (OLED) display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a thin film transistor comprising an active layer, a gate electrode, a source electrode, and a drain electrode. A first insulating layer is formed at least between the active layer and the gate electrode and a second insulating layer formed at least between the gate, source, and drain electrodes. The OLED display also includes a third insulating layer covering the source and drain electrodes and a pixel electrode including a first portion formed in first and second openings respectively defined in the second and third insulating layers and a second portion formed outside of the second opening. A pixel defining layer is formed over the second portion of the pixel electrode and the third insulating layer and has a third opening. The third opening has an area greater than that of the second opening. |
| US09741777B2 |
Bottom-emitting OLED display panel
A bottom-emitting OLED display panel is provided. The bottom-emitting OLED display panel includes: a driving transistor disposed on a substrate; a protective layer covering the driving transistor; a planarization layer disposed on the protective layer; and a OLED device disposed on the planarization layer; and a reflective structure disposed between the protective layer and the planarization layer, the reflective structure is configured for reflecting light emitted from the OLED device and radiated on the reflective structure; a bottom surface of the reflective structure which is close to the protective layer at least covers a region occupied by the driving transistor. |
| US09741772B2 |
Display device comprising bending sensor
A display device including a bending sensor is provided. A display device including a bending sensor may include a flexible substrate including a display area and a bezel area surrounding the display area; and the bending sensor including a curved unit disposed in the bezel area and in which an electric change occurs when the flexible substrate is bent, and a detection unit detecting bending information by sensing the electric change. |
| US09741770B2 |
Organic light emitting diode display
An organic light emitting diode display includes a substrate, a transistor on the substrate, a reflecting electrode connected to the transistor, a color filter on the reflecting electrode, a first electrode on the color filter and electrically connected to the reflecting electrode, a pixel definition layer on the color filter and having an opening exposing the first electrode, a white emission layer in the opening and a second electrode on the white emission layer. |
| US09741769B1 |
Vertical memory structure with array interconnects and method for producing the same
Disclosed herein is a method and apparatus for fabricating a memory device. The memory device has a vertical stack of alternating layers of conductive and insulating layers wherein a top layer and a bottom layer are insulating layers. A plurality of vias is formed through the vertical stack from the top layer to the bottom layer. A memory layer disposed adjacent the conductive layers in the vias. A selector device disposed adjacent the memory layer wherein the selector device comprises multiple layers of dissimilar metal oxides. A lateral electrical contact to the memory layer through the conductive layer. And a top contact electrically connected to the conductive layer through a portion of the memory layer and the portion of the memory layer wherein the portion of the memory layer is configured to store data therein. |
| US09741759B2 |
Image sensor and method of manufacturing the same
Image sensor and method of manufacturing the same are provided. The image sensor includes a semiconductor substrate including a pixel area, a voltage connection area, and a pad area, a plurality of photoelectric conversion devices in the pixel area, an anti-reflective layer on a back side of the semiconductor substrate and on the plurality of photoelectric conversion devices, a device isolation structure between the plurality of photoelectric conversion devices, at least one voltage connection structure in the voltage connection area, and electrically connected to the device isolation structure, at least one voltage applying device electrically connected to the at least one voltage connection structure, an internal circuit including at least one conductive inner wire and at least one conductive inner via in an insulating layer, and a through via structure in the pad area. |
| US09741758B2 |
Methods of forming image sensors including deposited negative fixed charge layers on photoelectric conversion regions
A method of forming an image sensor can be provided by forming a respective photoelectric conversion region in each of a plurality of unit pixel regions of a substrate and depositing a material configured to provide a negative fixed charge layer on the photoelectric conversion region. |
| US09741754B2 |
Charge transfer circuit with storage nodes in image sensors
Apparatuses and methods for charge transfer in image sensors are disclosed. One example of an image sensor pixel may include a first charge storage node and a second charge storage node. A transfer circuit may be coupled between the first and second charge storage nodes, and the transfer circuit may have a first region proximate the first charge storage node and configured to have a first potential. The transfer circuit may also have a second region proximate the second charge storage node configured to have a second, higher potential. An input node may be configured to control the first and second potentials based on a transfer signal provided to the input node. |
| US09741752B1 |
Method for manufacturing TFT substrate
Disclosed is a method for manufacturing a TFT substrate, which uses one partial transmitting mask to form patterns of an active layer, a gate insulation layer, and a gate electrode through photolithography such that the entire process for manufacturing TFT substrate can be completely conducted by using only three masks. Compared to the prior art, one mask is save so that the operation is simplified and the manufacturing cost is reduced. |
| US09741751B2 |
Array substrate fabricating method
The present invention provides an array substrate fabricating method. The array substrate fabricating method comprises the steps of: forming a semiconductor material layer and a first photoresist layer on a substrate successively, forming a pattern of an active layer comprising thin film transistors by using the semiconductor material layer and the first photoresist layer through photoetching technology, and reserving the first photoresist layer at least on conductive areas of the active layer when the thin film transistors are turned on; and forming a first material layer on the substrate on which the active layer is formed and the first photoresist layer is reserved on the active layer, and forming a pattern comprising first structures by using the first material layer through the photoetching technology. The method is adapted for fabricating an array substrate using metal oxide thin film transistors. |
| US09741750B2 |
Thin film transistor, pixel structure, and method for manufacturing the same, array substrate and display device
A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor. |
| US09741749B2 |
Digital circuit having correcting circuit and electronic apparatus thereof
Provided is a digital circuit (30) that comprises: a switching circuit (31) having first transistors (32, 33) supplied with power supply potentials (VDD, VSS); correcting circuits (34, 36) connected between an input terminal (IN) inputted with an input signal and control terminals (gates) of the first transistors; capacitors (C2, C3) connected between the control terminals and the input terminal; diode-connected second transistors (35, 37) that are provided between nodes (N5, N6) between the capacitors and the control terminals and the power supply potentials and have the substantially same threshold voltage as the first transistors; and switches (SW2, SW3) connected in series with the second transistors. |
| US09741745B2 |
Array substrate, method for manufacturing the same and display device
The present disclosure discloses an array substrate including a display area and a data lead area. The display area includes data signal lines and gate lines. The data lead area includes peripheral wirings connecting the data signal lines and wiring terminals. The peripheral wirings include a plurality of metal traces which are corresponding to the data signal lines in a one-to-one manner and manufactured from a same layer as the gate lines. Each of the metal traces is connected to one of the data signal lines which is corresponding to the each of the metal trace. |
| US09741744B2 |
Array substrate, method for manufacturing the same, and display device
An array substrate comprises a TFT, a data line, a gate line and a passivation layer covering the TFT, the data line and the gate line. The array substrate further includes a first conductive structure and a second conductive structure connected with the first conductive structure, the first conductive structure is disposed on the passivation layer and above the TFT, and the second conductive structure is disposed on the passivation layer and above the data line and/or gate line. A method for manufacturing the array substrate and a display device having such an array substrate are also provided. |
| US09741743B2 |
Array substrate and fabrication method thereof, display panel and display device
Embodiments of the present invention disclose an array substrate comprising: a base substrate, a gate line and a gate electrode located on the base substrate; an insulating layer covering the gate line and the gate electrode; an active layer on the insulating layer, corresponding to the gate electrode; an etch stop layer above the active layer, the etch stop layer including a first via hole and a second via hole located above the active layer; a data line, a source electrode and a drain electrode and a pixel electrode on the etch stop layer, wherein the source electrode is connected with the active layer through the first via hole, wherein the etch stop layer is made of a light-shielding material. |
| US09741741B1 |
Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, GATE-short-configured, and GATECNT-short-configured, NCEM-enables fill cells
An IC includes logic cells, selected from a standard cell library, and fill cells, configured for compatibility with the standard logic cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The IC includes such NCEM-enabled fill cells configured to enable detection and/or measurement of a variety of open-circuit and short-circuit failure modes, including at least one via-open-related failure mode, one AACNT-short-related failure mode, one GATE-short-related failure mode, and one GATECNT-short-related failure mode. |
| US09741740B2 |
Semiconductor device
A well potential supply region is provided in an N-type well region of a cell array. Adjacent gates disposed in both sides of the well potential supply region in the horizontal direction and adjacent gates disposed in further both sides thereof are disposed at the same pitch. In addition, an adjacent cell array includes four gates each of which is opposed to the adjacent gates in the vertical direction. In other words, regularity in the shape of the gate patterns in the periphery of the well potential supply region is maintained. |
| US09741739B2 |
Semiconductor manufacturing method and semiconductor device
A semiconductor manufacturing method includes alternately stacking first films and second films to form a stack film. The method includes forming a plurality of recessed portions in a stack direction of the stack film at an interval in a first direction substantially perpendicular to the stack direction. The semiconductor manufacturing method includes forming third films in the recessed portions. The method includes forming a mask material on the stack film and the third films and diminishing the mask material to expose the stack film in a first range between an end of a stepped portion to be formed on the stack film and one of the third films and to position an end of the mask material on the third film. The method includes removing a predetermined number of layers of films from the stack film in the first range using the diminished mask material as a mask. |
| US09741738B2 |
Non-volatile semiconductor storage device and method of manufacturing the same
A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells. |
| US09741734B2 |
Memory devices and systems having reduced bit line to drain select gate shorting and associated methods
3D NAND memory devices and systems having reduced bit line to drain select gate shorting, including associated methods, are provided and described. |
| US09741733B2 |
Three-dimensional semiconductor memory devices
Semiconductor devices and methods of manufacturing the semiconductor devices are provided. The semiconductor devices may include a semiconductor pattern including an opening on a semiconductor substrate. A peripheral transistor and a peripheral interconnection structure may be disposed between the semiconductor substrate and the semiconductor pattern. The peripheral interconnection structure may be electrically connected to the peripheral transistor. Cell gate conductive patterns may be disposed on the semiconductor pattern. The cell vertical structures may extend through the cell gate conductive patterns and may be connected to the semiconductor pattern. Cell bit line contact plugs may be disposed on the cell vertical structures. A bit line may be disposed on the cell bit line contact plugs. A peripheral bit line contact structure may be disposed between the bit line and the peripheral interconnection structure. The peripheral bit line contact structure may extend through the opening of the semiconductor. |
| US09741730B2 |
Semiconductor device and method for manufacturing the same
According to one embodiment, the first separation film separates the control electrode, the first insulating layer, the charge storage layer, the intermediate insulating layer, the floating electrode layer, and the second insulating layer in a first direction. The second separation film separates a first stacked unit in a second direction. The first stacked unit includes the charge storage layer, the intermediate insulating layer, the floating electrode layer, the second insulating layer, and the semiconductor layer. The second direction intersects the first direction. The second separation film contains silicon. |
| US09741728B2 |
Method for forming a split-gate flash memory cell device with a low power logic device
A method of manufacturing an embedded flash memory device is provided. A pair of gate stacks are formed spaced over a semiconductor substrate, and including floating gates and control gates over the floating gates. A common gate layer is formed over the gate stacks and the semiconductor substrate, and lining sidewalls of the gate stacks. A first etch is performed into the common gate layer to recess an upper surface of the common gate layer to below upper surfaces respectively of the gate stacks, and to form an erase gate between the gate stacks. Hard masks are respectively formed over the erase gate, a word line region of the common gate layer, and a logic gate region of the common gate layer. A second etch is performed into the common gate layer with the hard masks in place to concurrently form a word line and a logic gate. |
| US09741722B2 |
Dummy gate structure for electrical isolation of a fin DRAM
Trench capacitors can be formed between lengthwise sidewalls of semiconductor fins, and source and drain regions of access transistors are formed in the semiconductor fins. A dummy gate structure is formed between end walls of a neighboring pair of semiconductor fins, and limits the lateral extent of raised source and drain regions that are formed by selective epitaxy. The dummy gate structure prevents electrical shorts between neighboring semiconductor fins. Gate spacers can be formed around gate structures and the dummy gate structures. The dummy gate structures can be replaced with dummy replacement gate structures or dielectric material portions, or can remain the same without substitution of any material. The dummy gate structures may consist of at least one dielectric material, or may include electrically floating conductive material portions. |
| US09741720B1 |
Higher ‘K’ gate dielectric cap for replacement metal gate (RMG) FINFET devices
A semiconductor structure includes a semiconductor substrate, n-type and p-type FinFETs on the substrate, each of the n-type and the p-type FinFETs include a channel region and a gate structure surrounding the channel region, each gate structure having a phase-changed high-k gate dielectric layer lining a gate trench thereof, the gate trench defined by a pair of spacers. The semiconductor structure further includes a conformal dielectric capping layer over each phase-changed high-k gate dielectric layer, the conformal dielectric capping layer having a higher dielectric constant than the phase-changed high-k gate dielectric layer. Further included on the n-type FinFETs is a multi-layer replacement gate stack of n-type work function material over the phase-changed high-k gate dielectric layer. A method of fabricating the semiconductor structure is also provided. |
| US09741718B2 |
High voltage CMOS with triple gate oxide
An integrated circuit containing a first plurality of MOS transistors operating in a low voltage range, and a second plurality of MOS transistors operating in a mid voltage range, may also include a high-voltage MOS transistor which operates in a third voltage range significantly higher than the low and mid voltage ranges, for example 20 to 30 volts. The high-voltage MOS transistor has a closed loop configuration, in which a drain region is surrounded by a gate, which is in turn surrounded by a source region, so that the gate does not overlap field oxide. The integrated circuit may include an n-channel version of the high-voltage MOS transistor and/or a p-channel version of the high-voltage MOS transistor. Implanted regions of the n-channel version and the p-channel version are formed concurrently with implanted regions in the first and second pluralities of MOS transistors. |
| US09741717B1 |
FinFETs with controllable and adjustable channel doping
A method of forming features of a finFET structure includes forming fins on a surface of a substrate. A first liner is formed around each fin and a shallow trench isolation region is formed around each fin. A dopant layer is implanted in each fin. A portion of the shallow trench isolation region is etched from each fin. A first portion of the structure is blocked and the first liner replaced with a second liner in a second portion of the structure. |
| US09741716B1 |
Forming vertical and horizontal field effect transistors on the same substrate
A method of forming a vertical FET device and a horizontal FINFET device on a common semiconductor substrate includes forming, on the semiconductor substrate, vertical device fins for the vertical FET device and the horizontal FINFET device with a sacrificial layer and a hard mask (HM) layer. The method also includes forming a vertical FET device doped source and drain (S/D) on the substrate, forming a shallow trench isolation (STI) and a bottom spacer, removing the HM layer and the sacrificial layer for horizontal FINFET device, and forming a sacrificial gate. The method further includes forming an oxide inter dielectric (ILD) layer, and opening the sacrificial gate, forming high-k vertical FET device gate and a high-k horizontal FINFET device gate, and forming contacts. |
| US09741715B2 |
Structure to prevent lateral epitaxial growth in semiconductor devices
A semiconductor device includes a set of fin structures having a set of fin ends at a respective vertical surface of a fin structure and is separated by a set of trenches from other fin structures. Each of the fin structures has a top surface which is higher than a top surface of a dielectric material in the set of trenches. A set of dielectric blocks is disposed at the set of fin ends, the dielectric blocks having a top surface level with or above the top surfaces of the fin structures which inhibit excessive epitaxial growth at the fin ends. |
| US09741713B1 |
Parasitic lateral bipolar transistor with improved ideality and leakage currents
A semiconductor structure includes a semiconductor substrate of n-type or p-type, a well of a type opposite the substrate, the well acting as the base of a diode, a first region of the same type as the substrate at a top of the well, a second region of the same type as the substrate is situated separate from the first region at the top of the well, the first region acting as an emitter of the diode and the second region acting as a collector of the diode, and a gate situated between the first region and second region over a top surface of the well. |
| US09741712B2 |
Semiconductor devices with trench gate structures in a semiconductor body with hexagonal crystal lattice
A semiconductor device includes trench gate structures in a semiconductor body with hexagonal crystal lattice. A mean surface plane of a first surface is tilted to a <1-100> crystal direction by an off-axis angle, wherein an absolute value of the off-axis angle is in a range from 2 degree to 12 degree. The trench gate structures extend oriented along the <1-100> crystal direction. Portions of the semiconductor body between neighboring trench gate structures form transistor mesas. Sidewalls of the transistor mesas deviate from a normal to the mean surface plane by not more than 5 degree. |
| US09741708B2 |
Transient voltage suppressor and ESD protection device and array thereof
Provided is a transient voltage suppressor including a substrate, a well region of a first conductivity type, a first doped region of a second conductivity type, and a second doped region of the second conductivity type. The substrate is electrically floating. The well region is located in the substrate. The first doped region is located in the well region to form a diode, and the first doped region is electrically connected to a first voltage. The second doped region is located in the well region, and the second doped region is electrically connected to a second voltage. |
| US09741706B2 |
Immunity to inline charging damage in circuit designs
Approaches for checking a design of an integrated circuit using an antenna rule are provided. A method includes determining a figure of merit for a transistor based on a resistance of a shunt path of the transistor relative to the size of the antenna and the size of the transistor. The method also includes comparing the determined figure of merit to a limit. The method further includes deeming the transistor to pass the antenna rule when the figure of merit is less than the limit, and deeming the transistor to fail the antenna rule when the figure of merit is greater than the limit. The determining and the comparing are performed by a computer device. |
| US09741704B2 |
Silicon-controlled rectifier and an ESD clamp circuit
A silicon-controlled rectifier (SCR) includes a first-type field, a second-type first field and a second-type second field disconnectedly formed in a first-type well; an entire first-type doped region formed within the first-type field; a segmented second-type doped region formed within the second-type first field; and a segmented first-type doped region formed within the second-type second field. |
| US09741701B2 |
Method of manufacturing a package-on-package type semiconductor package
A method for manufacturing a semiconductor package, for example a package-on-package type semiconductor device package. As non-limiting examples, various aspects of this disclosure provide high-yield methods for manufacturing a package-on-package type semiconductor package, or a portion thereof. |
| US09741699B2 |
Light emitting device
The present invention relates to a light emitting device comprising a transparent substrate which light can pass through and at least one LED chip emitting light omni-directionally. Wherein the LED chip is disposed on one surface of the substrate and the light emitting angle of the LED chip is wider than 180°, and the light emitted by the LED chip will penetrate into the substrate and at least partially emerge from another surface of the substrate. According to the present invention, the light emitting device using LED chips can provide sufficient lighting intensity and uniform lighting performance. |
| US09741698B2 |
Light-emitting device
A light-emitting device includes a substrate, a first light-emitting element mounted on the substrate, an annular transparent dam formed on the substrate so as to surround the first light-emitting element, a second light-emitting element that is mounted on the substrate so as to be embedded in an interior of the dam and that has a shorter peak emission wavelength than that of the first light-emitting element, and a sealing material filled inside the dam so as to seal the first light-emitting element. |
| US09741697B2 |
Three-dimensional 3D-oP-based package
The present invention discloses a three-dimensional 3D-oP (three-dimensional offset-printed memory)-based package (3D2-oP). The mask-patterns for different dice in a same 3D2-oP package are merged onto a same data-mask. At different printing steps, a wafer is offset by different values with respect to the data-mask. Accordingly, data-patterns from a same data-mask are printed into different dice in a same 3D2-oP package. |
| US09741696B2 |
Thermal vias disposed in a substrate proximate to a well thereof
An apparatus relates generally to a three-dimensional stacked integrated circuit. In such an apparatus, the three-dimensional stacked integrated circuit has at least a first die and a second die interconnected to one another using die-to-die interconnects. A substrate of the first die has at least one thermal via structure extending from a lower surface of the substrate toward a well of the substrate without extending to the well and without extending through the substrate. A first end of the at least one thermal via structure is at least sufficiently proximate to the well of the substrate for conduction of heat away therefrom. The substrate has at least one through substrate via structure extending from the lower surface of the substrate to an upper surface of the substrate. A second end of the at least one thermal via structure is coupled to at least one through die via structure of the second die for thermal conductivity. |
| US09741692B2 |
Methods to form high density through-mold interconnections
Methods of fabricating a microelectronic device comprising forming a microelectronic substrate having a plurality microelectronic device attachment bond pads and at least one interconnection bond pad formed in and/or on an active surface thereof, attaching a microelectronic device to the plurality of microelectronic device attachment bond pads, forming a mold chase having a mold body and at least one projection extending from the mold body, wherein the at least one projection includes at least one sidewall and a contact surface, contacting the mold chase projection contact surface to a respective microelectronic substrate interconnection bond pad, disposing a mold material between the microelectronic substrate and the mold chase, and removing the mold chase to form at least one interconnection via extending from a top surface of the mold material to a respective microelectronic substrate interconnection bond pad. |
| US09741689B2 |
3-D package having plurality of substrates
A package includes an interposer, which includes a first substrate free from through-vias therein, redistribution lines over the first substrate, and a first plurality of connectors over and electrically coupled to the redistribution lines. A first die is over and bonded to the first plurality of connectors. The first die includes a second substrate, and through-vias in the second substrate. A second die is over and bonded to the plurality of connectors. The first die and the second die are electrically coupled to each other through the redistribution lines. A second plurality of connectors is over the first die and the second die. The second plurality of connectors is electrically coupled to the first plurality of connectors through the through-vias in the second substrate. |
| US09741683B2 |
Device packaging facility and method, and device processing apparatus utilizing phthalate
Provided are a device packing facility and method using phthalate and a device processing apparatus utilizing the phthalate. The device packaging facility includes a mounting unit providing phthalate between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the phthalate and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit. |
| US09741680B1 |
Wire bond through-via structure and method
A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer. |
| US09741678B2 |
Laser welding machine and laser welding method using the same
A laser welding machine includes: an elevator that is capable of sliding an elevating platform; a pressing actuator that is fixed to the elevating platform at a base part of the pressing actuator and has a tip slidably connected to the base part and pressing a conductive upper terminal toward a conductive lower terminal; a laser oscillator; a machining optical device that is fixed to the elevating platform and has a lens to focus the laser light emitted from the laser oscillator; a position detector that detects a vertical positioning of the pressing actuator; a counter that receives an output of the position detector and delivers position information; and a control circuit that controls, based on the received signal from the counter, the elevator, the pressing actuator, and the machining optical device, and controls operation of the laser oscillator. |
| US09741677B1 |
Semiconductor device including antistatic die attach material
A semiconductor device includes a substrate, a semiconductor die, and an antistatic die attach material between the substrate and the semiconductor die. The antistatic die attach material includes a mixture of a nonconductive adhesive material and carbon black or graphite. In one example, the antistatic die attach material has a resistivity between 101 Ω·cm and 1010 Ω·cm. |
| US09741673B2 |
RF transistor packages with high frequency stabilization features and methods of forming RF transistor packages with high frequency stabilization features
A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells, an RF input lead coupled to the plurality of RF transistor cells, an RF output lead, and an output matching network coupled between the plurality of RF transistor cells and the RF output lead. The output matching network includes a plurality of capacitors having respective upper capacitor plates, wherein the upper capacitor plates of the capacitors are coupled to output terminals of respective ones of the RF transistor cells. The plurality of capacitors may be provided as a capacitor block that includes a common reference capacitor plate and a dielectric layer on the reference capacitor plate. The upper capacitor plates may be on the dielectric layer. |
| US09741672B2 |
Preventing unauthorized use of integrated circuits for radiation-hard applications
An integrated circuit, a method of forming an integrated circuit, and a semiconductor are disclosed for preventing unauthorized use in radiation-hard applications. In one embodiment, the integrated circuit comprises a silicon-on-insulator (SOI) structure, a radiation insensitive sub-circuit, and a radiation sensitive sub-circuit. The SOI structure comprises a silicon substrate, a buried oxide layer, and an active silicon layer. The radiation insensitive sub-circuit is formed on the active layer, and includes a partially depleted transistor. The radiation sensitive sub-circuit is formed on the active layer, and includes a fully depleted transistor, to prevent operation of the radiation sensitive sub-circuit under specified radiation conditions. Each of the partially depleted transistor and the fully depleted transistor includes a channel region formed in the active silicon layer, and the channel regions of the partially depleted transistor and the fully depleted transistor have substantially the same thickness but different doping concentrations. |
| US09741670B2 |
Electronic chip comprising multiple layers for protecting a rear face
An electronic chip and a method of making thereof is provided, where the electronic chip includes at least: an electronic circuit arranged at a front face of a substrate; a first protective layer arranged on a rear face of the substrate; a resistive element arranged on the first protective layer and facing at least one part of the electronic circuit, mechanically supported by the first protective layer and connected electrically and/or in an inductive manner to the electronic circuit; a second protective layer covering at least the resistive element; and in which the first protective layer comprises at least one dielectric material having a resistance to chemical etching by at least one chemical etching agent less than or equal to that of a dielectric material of the second protective layer. |
| US09741669B2 |
Forming large chips through stitching
A method includes performing a first light-exposure and a second a second light-exposure on a photo resist. The first light-exposure is performed using a first lithograph mask, which covers a first portion of the photo resist. The first portion of the photo resist has a first strip portion exposed in the first light-exposure. The second light-exposure is performed using a second lithograph mask, which covers a second portion of the photo resist. The second portion of the photo resist has a second strip portion exposed in the second light-exposure. The first strip portion and the second strip portion have an overlapping portion that is double exposed. The method further includes developing the photo resist to remove the first strip portion and the second strip portion, etching a dielectric layer underlying the photo resist to form a trench, and filling the trench with a conductive feature. |
| US09741667B2 |
Integrated circuit with die edge assurance structure
Integrated circuits with edge assurance structures are provided for more reliable and efficient monitoring of the die edge integrity using, for example, Automatic (or Automated) Test Equipment (ATE). The edge assurance structures can be used to test, for example, all (100%) of the production materials with virtually no extra cycle time and cost. The edge assurance structure can be located around an edge of the integrated circuit. The edge assurance structure can include a plurality of v-shaped structures that are connected to each other using a plurality of ultra-thick vias. The integrated circuit can include a pad that is coupled to the edge assurance structure. The pad can be used to measure a resistance of the edge assurance structure. |
| US09741666B1 |
Electromagnetic wall in millimeter-wave cavity
An apparatus includes a package, a wall and a lid. The package may be configured to mount two chips configured to generate one or more signals in a millimeter-wave frequency range. The wall may be formed between the two chips. The wall generally has a plurality of conductive arches that attenuate an electromagnetic coupling between the two chips in the millimeter-wave frequency range. The lid may be configured to enclose the chips to form a cavity. |
| US09741665B2 |
Alignment marks in non-STI isolation formation and methods of forming the same
A method includes forming a photo resist over a semiconductor substrate of a wafer, patterning the photo resist to form a first opening in the photo resist, and implanting the semiconductor substrate using the photo resist as an implantation mask. An implanted region is formed in the semiconductor substrate, wherein the implanted region is overlapped by the first opening. A coating layer is coated over the photo resist, wherein the coating layer includes a first portion in the first opening, and a second portion over the photo resist. A top surface of the first portion is lower than a top surface of the second portion. The coating layer, the photo resist, and the implanted region are etched to form a second opening in the implanted region. |
| US09741664B2 |
High density substrate interconnect formed through inkjet printing
Generally discussed herein are systems and apparatuses that include a dense interconnect bridge and techniques for making the same. According to an example a technique can include creating a multidie substrate, printing an interconnect bridge on the multidie substrate, electrically coupling a first die to a second die by coupling the first and second dies through the interconnect bridge. |
| US09741661B2 |
Logic semiconductor devices
A logic semiconductor device includes a plurality of active patterns extending in a horizontal direction and being spaced apart from each other in a vertical direction, an isolation layer defining the active patterns, a plurality of gate patterns extending in the vertical direction on the active patterns and the isolation layer, the gate patterns being spaced apart from each other in the horizontal direction, a plurality of lower wirings extending in the horizontal direction over the gate patterns, a plurality of upper wirings extending in the vertical direction over the lower wirings, a through contact connecting at least one upper wiring of the upper wirings and at least one gate pattern of the gate patterns, the through contact extending from a bottom surface of the upper wiring to a position under a bottom surface of one of the lower wirings relative to the active patterns. |
| US09741656B2 |
High-frequency integrated device with an enhanced inductance and a process thereof
The present invention provides a high-frequency integrated device, comprising a substrate including at least an on-chip active and passive member and a ferrite layer bonded to the substrate through an interfacial bridge and substantially wrapping plurality of surfaces of said at least on-chip active and passive members. The present invention also provides a system incorporating the high-frequency integrated device of the present invention. The present invention further provides a process for the preparation of the high-frequency integrated device. |
| US09741654B2 |
Integrated circuit having slot via and method of forming the same
An integrated circuit includes a first conductive line on a first metal level of the integrated circuit. The integrated circuit further includes a second conductive line on a second metal level of the integrated circuit. The integrated circuit further includes a slot via electrically connecting the first conductive line with the second conductive line. The slot via overlaps with the first conductive line and the second conductive line. The slot via extends beyond a periphery of at least one of the first conductive line or the second conductive line. |
| US09741652B1 |
Wiring substrate
A wiring substrate includes a wiring layer on a projection of an insulating layer. The wiring layer includes a first metal layer on an end face of the projection with a peripheral portion of the end face exposed, a second metal layer that is on the first metal layer and wider than the end face, and a third metal layer. The second metal layer includes first and second opposite surfaces with the second surface on the first metal layer with a peripheral portion thereof exposed. The third metal layer covers side surfaces of the first metal layer, and the first surface, the peripheral portion of the second surface, and side surfaces of the second metal layer, and fills in a region where the end face and the peripheral portion of the second surface face each other. The materials of the second and third metal layers are different. |
| US09741649B2 |
Integrated interposer solutions for 2D and 3D IC packaging
An integrated circuit (IC) package includes a first substrate having a backside surface and a top surface with a cavity disposed therein. The cavity has a floor defining a front side surface. A plurality of first electroconductive contacts are disposed on the front side surface, and a plurality of second electroconductive contacts are disposed on the back side surface. A plurality of first electroconductive elements penetrate through the first substrate and couple selected ones of the first and second electroconductive contacts to each other. A first die containing an IC is electroconductively coupled to corresponding ones of the first electroconductive contacts. A second substrate has a bottom surface that is sealingly attached to the top surface of the first substrate, and a dielectric material is disposed in the cavity so as to encapsulate the first die. |
| US09741648B2 |
Wiring board
A wiring board includes an insulating substrate having a plurality of laminated insulating layers and a mounting part in one surface of the insulating substrate, a large number of semiconductor element connection pads, a large number of external connection pads, and a solid pattern extending from a region corresponding to the mounting part to the peripheral portion of the insulating substrate, and including a straight line shaped current path without intervention of gas vent openings. |
| US09741646B2 |
Package substrate and its fabrication method
This disclosure provides a package substrate and its fabrication method. The package substrate includes: a carrier; a first wiring layer formed on the carrier; a conductive pillar layer having a plurality of metal pillars on the first wiring layer; a molding compound layer formed on the first wiring layer, covering all the first wiring layer and the metal pillars, and exposing one end face of each metal pillar; a second wiring layer formed on the molding compound layer and the exposed end faces of the metal pillars; and a protection layer formed on the second wiring layer. |
| US09741645B2 |
Dense interconnect with solder cap (DISC) formation with laser ablation and resulting semiconductor structures and packages
Dense interconnect with solder cap (DISC) formation with laser ablation and resulting semiconductor structures and packages are described. For example, a method of fabricating a semiconductor structure includes forming an insulative material stack above a plurality of solder bump landing pads. The solder bump landing pads are above an active side of a semiconductor die. A plurality of trenches is formed in the insulative material stack by laser ablation to expose a corresponding portion of each of the plurality of solder bump landing pads. A solder bump is formed in each of the plurality of trenches. A portion of the insulative material stack is then removed. |
| US09741642B1 |
Semiconductor package with partial plating on contact side surfaces
Embodiments of the present invention are directed to a semiconductor package with partial plating on contact side surfaces. The semiconductor package includes a top surface, a bottom surface opposite the top surface, and side surfaces between the top and bottom surfaces. Contacts are located on peripheral edges of the bottom surface. Each of the contacts includes a first surface that is flush with the bottom surface, a second surface that is flush with one of the side surfaces, and a third surface between the first surface and the second surface. Each of the side surfaces can include a step such that the area of the bottom surface is differently sized from the area of the top surface and the third surface is located at the step. The first surface is plated, while the second surface is exposed (not plated). At least a portion of the third surface is plated. |
| US09741641B2 |
Method for manufacturing semiconductor device, and semiconductor device
A semiconductor device, includes a die pad that has a first main surface and a second main surface located on the opposite side of the first main surface; a lead arranged next to the die pad; a semiconductor chip that has a surface, a first electrode and a second electrode formed on the surface, and a reverse side located on the opposite side of the surface, and is mounted on a chip mounting area of the first main of the die pad; a first wire that electrically couples the first electrode of the semiconductor chip and the lead; a second wire that electrically couples the second electrode of the semiconductor chip and the die pad; and a sealed body that seals the semiconductor chip, the first wire, and the second wire. |
| US09741639B2 |
Semiconductor chip, method for producing a semiconductor chip and method for soldering a semiconductor chip to a carrier
A semiconductor chip includes a semiconductor body and a chip metallization applied on the semiconductor body. The chip metallization has an underside facing away from the semiconductor body. The chip further includes a layer stack applied to the underside of the chip metallization and having a number N1≧1 or N1≧2 of first partial layers and a number N2≧2 of second partial layers. The first partial layers and the second partial layers are arranged alternately and successively such that at least one of the second partial layers is arranged between the first partial layers of each first pair of the first partial layers and such that at least one of the first partial layers is arranged between the second partial layers of each second pair of the second partial layers. |
| US09741637B2 |
Electronic device having a heat dissipation unit and method of manufacturing an electronic device
An embodiment discloses an electronic device, including: a processing component; and a heat dissipation unit thermally coupled to the processing component, the heat dissipation unit comprising: a first thermal conductive layer that directs heat that is generated by the processing component away from the processing component in a first direction, and a second layer disposed in relation to the first thermal conductive layer, where the second layer has a lower thermal conductivity as compared with the first thermal conductive layer in the first direction. Other aspects are described and claimed. |
| US09741634B2 |
Semiconductor device
A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material. |
| US09741630B2 |
Electronic component package and method of manufacturing the same
An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a through hole accommodating the electronic component, an adhesive layer bonding the wiring part and the frame to each other, and an encapsulant filling at least a portion of the through hole. |
| US09741629B2 |
Plasma processing apparatus and plasma processing method
A plasma processing method of processing layer structure previously formed on an upper surface of a wafer disposed in a processing chamber within a vacuum container and having a layer to be processed and an undercoating layer disposed under the layer by plasma in the processing chamber, includes a step of calculating an etching amount of the layer to be processed at time during processing of any wafer by using result of comparing real pattern data with detection pattern data obtained by combining two patterns of intensity having as parameter wavelength of interference light obtained by processing the layer structure containing three or more undercoating layers having different thickness and the layer to be processed in advance of the processing of the any wafer and a real pattern of intensity having as parameter the wavelength of the interference light obtained during processing of the layer structure on the any wafer. |
| US09741625B2 |
Method of forming a semiconductor device with STI structures on an SOI substrate
In a first aspect, the present disclosure provides a method of forming a semiconductor device, including providing an SOI structure comprising a base substrate, a buried insulating material layer formed on the base substrate and an active semiconductor layer formed on the buried insulating structure, forming a germanium-comprising layer on an exposed surface of the active semiconductor layer, forming a trench isolation structure, the trench isolation structure extending through the germanium-comprising layer and the active semiconductor layer, performing an annealing process after the trench isolation structure is formed, the annealing process resulting in an oxide layer disposed on a germanium-comprising active layer which is formed on the buried insulating material layer, and removing the oxide layer for exposing an upper surface of the germanium-comprising active layer. |
| US09741624B2 |
Spacer shaper formation with conformal dielectric film for void free PMD gap fill
An integrated circuit may be formed by removing source/drain spacers from offset spacers on sidewalls of MOS transistor gates, forming a contact etch stop layer (CESL) spacer layer on lateral surfaces of the MOS transistor gates, etching back the CESL spacer layer to form sloped CESL spacers on the lateral surfaces of the MOS transistor gates with heights of ¼ to ¾ of the MOS transistor gates, forming a CESL over the sloped CESL spacers, the MOS transistor gates and the intervening substrate, and forming a PMD layer over the CESL. |
| US09741622B2 |
Methods of forming NMOS and PMOS FinFET devices and the resulting product
One illustrative method disclosed herein includes, among other things, recessing first and second fins to define replacement fin cavities in a layer of insulating material, forming an initial strain relaxed buffer layer such that it only partially fills the replacement fin cavities, implanting carbon into the initial strain relaxed buffer layer in the NMOS region, forming a channel semiconductor material on the initial strain relaxed buffer layer within the replacement fin cavities in both the NMOS region and the PMOS region to thereby define an NMOS fin comprised of the channel semiconductor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of the channel semiconductor material and the initial strain relaxed buffer layer and forming gate structures for the NMOS and PMOS devices. |
| US09741620B2 |
Structures and methods for reliable packages
A device and method of forming the device that includes cavities formed in a substrate of a substrate device, the substrate device also including conductive vias formed in the substrate. Chip devices, wafers, and other substrate devices can be mounted to the substrate device. Encapsulation layers and materials may be formed over the substrate device in order to fill the cavities. |
| US09741618B2 |
Methods of forming semiconductor devices
In one embodiment, a method of forming a semiconductor device includes forming openings in a substrate. The method includes forming a dummy fill material within the openings and thinning the substrate to expose the dummy fill material. The dummy fill material is removed. |
| US09741608B2 |
Methods of fabricating semiconductor devices including supporting patterns in gap regions between conductive patterns
An integrated circuit device includes spaced apart conductive patterns on a substrate surface, and a supporting pattern on the substrate surface between adjacent ones of the conductive patterns and separated therefrom by respective gap regions. The adjacent ones of the conductive patterns extend away from the substrate surface beyond a surface of the supporting pattern therebetween. A capping layer is provided on respective surfaces of the conductive patterns and the surface of the supporting pattern. Related fabrication methods are also discussed. |
| US09741605B2 |
Reducing defects and improving reliability of BEOL metal fill
A method of reducing defects in and improving reliability of Back-End-Of-Line (BEOL) metal fill includes providing a starting metallization structure for semiconductor device(s), the metallization structure including a bottom layer of contact(s) surrounded by a dielectric material. The starting metallization structure further includes an etch-stop layer over the bottom layer, a layer of dielectric material over the etch-stop layer, a first layer of hard mask material over the dielectric layer, a layer of work function hard mask material over the first hard mask layer, a second layer of hard mask material over the work function hard mask layer, via(s) to the first hard mask layer and other via(s) into the etch-stop layer. The method further includes protecting the other via(s) while removing the second hard mask layer and the layer of work function hard mask material, and filling the vias with metal. Protecting the other via(s) may include, prior to the removing, filling the other via(s) with an Energy Removal Film (ERF) up to a top surface of the first hard mask layer, and, after the removing, removing the ERF material. |
| US09741603B2 |
Method for producing hybrid substrate, and hybrid substrate
A hybrid substrate has an SOI structure having a good silicon active layer, without defects such as partial separation of the silicon active layer is obtained without trimming the outer periphery of the substrate. An SOI substrate is obtained by sequentially laminating a first silicon oxide film and a silicon active layer in this order on a silicon substrate. A terrace portion that does not have the silicon active layer is formed in the outer peripheral portion of the silicon substrate surface. A second silicon oxide film is formed on the silicon active layer surface of the SOI substrate The bonding surfaces of the SOI substrate and a supporting substrate that has a thermal expansion coefficient different from that of the SOI substrate is subjected to an activation treatment. The SOI substrate and the supporting substrate are bonded with the second silicon oxide film being interposed therebetween. |
| US09741598B2 |
Protective tape and method for manufacturing a semiconductor device using the same
A protective tape and a method for manufacturing a semiconductor device using the same capable of achieving excellent connection properties. The protective tape includes an adhesive layer, a thermoplastic resin layer and a backing material film in that order; a modulus ratio of a shear storage modulus of the adhesive layer to a shear storage modulus of the thermoplastic resin layer at an application temperature at which the protective tape is applied is 0.01 or less. This suppresses resin residue on bumps thereby achieving excellent connection properties. |
| US09741597B2 |
Positioning device for glass substrate
The present invention provides a positioning device configured to position a glass substrate. The positioning device comprises a support base, a pair of first positioning mechanisms located on two neighboring sides of the glass substrate, a pair of second positioning mechanisms located on another two neighboring sides of the glass substrate, respectively, a pair of connecting bars, a driving member, a gear group and a conveying belt sleeved on the gear group. One end of the one of the pair of connecting bar is fixed with the conveying belt, and another end is fixed with one of the pair of first positioning mechanisms. One end of another one of the pair of connecting bar is fixed with the conveying belt, and another end is fixed with another one of the pair of first positioning mechanisms. |
| US09741594B2 |
Substrate processing apparatus and substrate processing method for performing heat treatment on substrate
Each of substrates which are sequentially loaded into an apparatus is transferred to one of empty (available) cooling units, and the cooling unit is reserved as a unit to be used for performing a cooling treatment after a post-exposure bake process for the substrate and the reservation information is stored. After one of the cooling units is reserved in advance before the post-exposure bake process, the substrate is transferred from the cooling unit to one of heating units without being subjected to a cooling treatment and is subjected to a post-exposure bake process therein. After the post-exposure bake process, the substrate is transferred from the heating unit to the reserved cooling unit which is reserved in advance and subjected to a cooling treatment therein. |
| US09741592B2 |
Micro device stabilization post
A method and structure for stabilizing an array of micro devices is disclosed. The array of micro devices is formed on an array of stabilization posts formed from a thermoset material. Each micro device includes a bottom surface that is wider than a corresponding stabilization post directly underneath the bottom surface. |
| US09741589B2 |
Substrate pad structure
A structure comprises a plurality of top pads protruding over a top surface of a package substrate, wherein a top pad comprises a first half-circle portion, a second half-circle portion and a first rectangular portion between the first half-circle portion and the second half-circle portion, a plurality of bottom pads embedded in the package substrate, wherein a bottom pad comprises a third half-circle portion, a fourth half-circle portion and a second rectangular portion between the third half-circle portion and the fourth half-circle portion and a plurality of vias coupled between the top pads and their respective bottom pads. |
| US09741586B2 |
Method of fabricating package structures
Some embodiments contemplate methods for forming a package structure and a package structure formed thereby. An embodiment method includes depositing a photosensitive dielectric layer on a support structure; forming a first layer on a surface of the photosensitive dielectric layer; exposing the photosensitive dielectric layer to radiation; and after the forming the first layer and the exposing to radiation, developing the photosensitive dielectric layer. The support structure includes an integrated circuit die. The layer has a different removal selectivity than the photosensitive dielectric layer during the developing. According to some embodiments, a thickness uniformity of the photosensitive dielectric layer after developing may be increased, and thickness loss from developing the photosensitive dielectric layer can be reduced. |