| Document | Document Title |
|---|---|
| US09736066B2 |
Method, apparatus and system for establishing optical bypass
Provided are a method, an apparatus and a system for establishing an optical bypass. The method includes: a route controller sending an optical bypass establishment request carrying information about an ingress node, an egress node and a required bandwidth to an optical transmission controller; and setting a second flow forwarding entry corresponding to the optical bypass for the ingress node and the egress node and sending the set second flow forwarding entry to the ingress node and the egress node when receiving an establishment success notification sent by the optical transmission controller, the establishment success notification being used for indicating that the optical transmission controller has allocated the optical bypass according to the optical bypass establishment request, set a first flow forwarding entry corresponding the bypass for each optical transmission device in the optical bypass, and sent the set first flow forwarding entry to a corresponding optical transmission device. |
| US09736065B2 |
Level of hierarchy in MST for traffic localization and load balancing
In one embodiment, a multiple spanning tree (MST) region is defined in a network, where the MST region includes a plurality of network nodes interconnected by links. A MST cluster is defined within the MST region, where the MST cluster includes a plurality of network nodes selected from the plurality of network nodes of the MST region. A network node of the MST cluster generates one or more MST bridge protocol data units (BPDUs) that present the MST cluster as a single logical entity to network nodes of the MST region that are not included in the MST cluster, yet enables per-multiple spanning tree instance (per-MSTI) load balancing of traffic across inter-cluster links that connect network nodes included in the MST cluster and network nodes of the MST region that are not included in the MST cluster. |
| US09736064B2 |
Offline queries in software defined networks
Methods and systems for finding a packet's routing path in a network includes intercepting control messages sent by a controller to one or more switches in a software defined network (SDN). A state of the SDN at a requested time is emulated and one or more possible routing paths through the emulated SDN is identified by replaying the intercepted control messages to one or more emulated switches in the emulated SDN. The one or more possible routing paths correspond to a requested packet injected into the SDN at the requested time. |
| US09736062B2 |
Service processing method, device and system
The present invention provides a service processing method, device and system. The method includes: receiving a service packet, and searching, according to a service identity in the service packet, a service routing table corresponding to the service packet, where the service identity represents a service to be processed by the service packet; and the service routing table includes a service label used to represent a service feature in the service, and a routing path for processing the service feature; and setting the service label in the service packet according to the service routing table, and sending, according to the routing path, the service packet to a service processing device configured to process the service feature corresponding to the service label, so that the service processing device processes the service feature corresponding to the service label. The present invention reduces an impact on an original service and improves scalability. |
| US09736060B2 |
Method and device for negotiating traffic path in link aggregation group
Provided are a method and device for negotiating a traffic path in an LAG, wherein the method includes that an aggregation port acquires indication information, wherein the indication information is used for indicating one or more groups of services or sessions needing to be borne by the aggregation ports, each group of the services or sessions includes one or more services or sessions; the aggregation port determines multiple groups of services or sessions to be borne, and/or services or sessions currently being borne by the aggregation port; an aggregation group portal to which the aggregation port belongs, performs traffic distribution according to services or sessions currently being borne by each aggregation port which belongs to the aggregation group portal. It is solved the problem in the related art that the same service or session cannot be transmitted bi-directionally on the same path, thus implementing the protection on the interconnect interface. |
| US09736056B2 |
Centralized predictive routing using delay predictability measurements
In one embodiment, a central device receives a routing strategy instruction that specifies a predictability threshold for communication delays in the network. The device estimates communication delays for a plurality of paths in the network and determines predictability measurements for the estimated delays. The device also selects, from among the plurality of paths, a particular path that has a predictability measurement that satisfies the predictability threshold and has a minimal estimated delay. The central device further installs the particular path at one or more other devices in the network. |
| US09736055B2 |
Inter-medium bridging with inter-domain routing and multi-medium domain coordination
Various embodiments of inter-medium bridging are provided. In one aspect, a method may involve an inter-medium bridging device bridging between a plurality of mediums of a network connected to the first inter-medium bridging device at the Data Link Layer of the Open Systems Interconnection (OSI) model. The plurality of mediums may comprise at least a first medium and a second medium that comprise separate communications channels. The method may also involve the inter-medium bridging device facilitating communications between an external device and the network through an application interface of the first inter-medium bridging device. |
| US09736053B2 |
Layer 2 path tracing through context encoding in software defined networking
A computer implemented method for network monitoring includes providing network packet event characterization and analysis for network monitoring that includes supporting summarization and characterization of network packet traces collected across multiple processing elements of different types in a virtual network, including a trace slicing to organize individual packet events into path-based trace slices, a trace characterization to extract at least 2 types of feature matrix describing those trace slices, and a trace analysis to cluster, rank and query packet traces based on metrics of the feature matrix. |
| US09736042B2 |
Visualization of the reach of a post by a member of an on-line social networking system
A system for visualizing the reach of a post by a member of an on-line social networking system may be designed to increase awareness of the members, as to which degree their posted updates are noticed and reacted to by other members. When a member creates a post, either through the on-line social networking website itself or through an application programming interface (API) that allows to include a share user interface (UI) control on a third web party site, the system monitors events associated with the post, collects statistics with respect to the monitored events and uses this data to generate a visualization of the reach of that post. Example visualization provides the creator of the post a sense of how many other members interacted with the post. |
| US09736041B2 |
Transparent software-defined network management
Systems and methods for network management, including adaptively installing one or more monitoring rules in one or more network devices on a network using an intelligent network middleware, detecting application traffic on the network transparently using an application demand monitor, and predicting future network demands of the network by analyzing historical and current demands. The one or more monitoring rules are updated once counters are collected; and network paths are determined and optimized to meet network demands and maximize utilization and application performance with minimal congestion on the network. |
| US09736035B2 |
Method and apparatus for providing information for selecting clouds
An information providing method includes: obtaining a template that defines one or more functions to be used; and extracting plural combinations that are used to implement the one or more functions, which are defined in the obtained template, from a data storage unit that stores, for each of computer resource providing services that provide one or plural functions, a performance indicator value for each of the one or plural functions. Each of the plural combinations includes a computer resource providing service and one or more functions in the computer resource providing service. The method further includes: calculating, for each plural combinations, a performance indicator value for the combination based on data in the data storage unit; and outputting, for at least one of the extracted plural combinations, the computer resource providing service, the one or more functions in the computer resource providing service, and the calculated performance indicator value. |
| US09736028B2 |
System and method for providing network support services and premises gateway support infrastructure
A service management system communicates via wide area network with gateway devices located at respective user premises. The service management system remotely manages delivery of application services, which can be voice controlled, by a gateway, e.g. by selectively activating/deactivating service logic modules in the gateway. The service management system also may selectively provide secure communications and exchange of information among gateway devices and among associated endpoint devices. An exemplary service management system includes a router connected to the network and one or more computer platforms, for implementing management functions. Examples of the functions include a connection manager for controlling system communications with the gateway devices, an authentication manager for authenticating each gateway device and controlling the connection manager and a subscription manager for managing applications services and/or features offered by the gateway devices. A service manager, controlled by the subscription manager, distributes service specific configuration data to authenticated gateway devices. |
| US09736017B2 |
Server-side protocol configuration of accessing clients
The present invention is a method, system and apparatus for configuring a client-side communications protocol stack. In a method of the invention, a mapping can be consulted to determine a set of client-side protocol stack components which correspond to a set of protocol stack components in a server side protocol stack instance. Subsequently, a listing can be created of the determined set of client-side protocol stack components. Finally, the listing can be published for access by externally disposed client computing processes. Preferably, the listing can be reversed. Also, the consulting step further can include determining at least one attribute to be applied to at least one of the client-side protocol stack components when enabling a client-side protocol stack to interoperate with the server-side protocol stack instance. |
| US09736010B2 |
Custom rendering of web pages based on web page requests
Web page optimization systems and methods are disclosed herein. In one implementation, a number of master pages and page layouts used to generate the web pages are defined. A number of channels are then defined to be associated with certain ones of the master pages and the page layouts. User device generating the request, a browser used to generate the request, or other suitable components of a user agent string in a web page request is then identified. A web page is dynamically rendered in response to the identified components of the user agent string using the master page and the page layout associated with a channel identified by such components of the web page request. |
| US09736008B1 |
Communication rate adjustment extension
Adjusting a WebSocket communication rate is disclosed. A WebSocket frame is received. It is determined that the WebSocket frame includes an indicator of a desired WebSocket communication rate. A transmission rate of a WebSocket communication is adjusted. The transmission rate is adjusted based at least in part on the received desired WebSocket communication rate. |
| US09736006B2 |
Scalable address resolution in a communications environment
A generic address resolution system facilitates communications among multiple network applications with heterogeneous addressing mechanisms, thereby allowing the network applications to interoperate with each other and/or with modules for providing enhanced functionalities. The address resolution system includes a resource mapping module that modularizes the components needed for address resolution and abstracts content from the underlying address types and content used by the network applications. The address resolution system includes a context engine that analyzes the addressing data to be resolved, selects one or more appropriate destination network applications based on contextual rules, and creates the application mapping template for the end-end routing of the communications among the network applications. |
| US09736003B1 |
Communication method in a home network, network and device for implementing such a method
The invention concerns a communication method in a home network comprising at least two devices connected to a communication bus, characterized in that, a first device including an internet application and a second device including means for connecting to the internet, said second device being able to manage at least one internet application protocol, said method comprises the steps of: sending a request from said first device to said second device for opening a connection between said first and second devices, wherein said request contains an internet application protocol identifier to identify the internet application protocol to be used over said connection; sending an internet protocol request under the format of said internet application protocol from said first device to said second device; forwarding said internet protocol request from said second device to an internet server; upon receipt; transferring a response from said internet server to said first device through said second device over said communication bus. The invention also concerns a network and a device for implementing the method above. |
| US09735999B2 |
Distributed antenna system interface for processing digital signals in a standardized format
An interface is provided for processing digital signals in a standardized format in a distributed antenna system. One example includes a unit disposed in a distributed antenna system. The unit includes an interface section and an output section. The interface section is configured for outputting a first complex digital signal and a second complex digital signal. The first complex digital signal is generated from a digital signal in a standardized format received from a digital base station. The output section is configured for combining the first complex digital signal and the second complex digital signal into a combined digital signal. The output section is also configured for outputting the combined digital signal. The combined digital signal comprises information to be wirelessly transmitted to a wireless user device. |
| US09735996B2 |
Fully parallel fast fourier transformer
Provided is a fully parallel fast Fourier transformer of N-point, where N is a natural number, including a bit-reversal arranging block configured to rearrange an order of N input complex number samples, a plurality of first processors configured to perform, in a plurality of group units, a 16-point FFT on the rearranged complex number samples, a twiddle factor multiplier configured to multiply outputs of the plurality of first processors by twiddle factors, a first group rearranging block configured to rearrange outputs of the twiddle factor multiplier in the plurality of group units, a plurality of second processors configured to perform, in the plurality of group units, 16-point FFT on the complex number samples grouped by the first group rearranging block, and a second group rearranging block configured to rearrange outputs of the plurality of second processors to output under a same arrangement criterion as the first group rearranging block. |
| US09735994B2 |
Broadcast signal transmitter, broadcast signal receiver, and method for transceiving broadcast signals in broadcast signal transceivers
A broadcast signal receiver according to the present invention comprises: a demodulator for performing OFDM demodulation on a received broadcast signal including a frame for the delivery of a broadcast service: a frame demapper for outputting the frame, the frame including a preamble that contains first signaling information, and a plurality of link-layer-pipes (LLPs) that contain PLP data, second signaling information and third signaling information, with the PLP data including a base layer and an enhancement layer of the broadcast service; and a decoder for decoding the first signaling information, for decoding the second and third signaling information, and for selectively decoding the PLP data by using the third signaling information. |
| US09735993B2 |
Cyclic prefix for non-contiguous signal transmission
Transmitted signals are modified to facilitate the emulation of circular convolution in non-contiguous transmission environments. These modified signals may be derived from well-known signature sequences. In an exemplary method, a tail portion of a final segment of a base signal is prefixed to an initial segment of the base signal, to form a first transmit segment. One or more additional transmit segments are formed by prefixing, to each of the one or more segments of the base signal other than the initial segment, a tail portion of the immediately preceding segment of the base signal. The transmit segments so formed are transmitted in respective ones of the plurality of non-contiguous transmit-time intervals. Corresponding methods for receiving the transmitted segments and reconstructing the base signal are also described, as are corresponding transmitting and receiving apparatuses. |
| US09735989B1 |
Continuous time linear equalizer that uses cross-coupled cascodes and inductive peaking
The disclosed embodiments relate to the design of an equalizer that uses both cross-coupled cascodes and inductive peaking to reduce distortion in a signal received from a communication channel by attenuating lower frequencies and amplifying higher frequencies. At lower frequencies, when the effects of inductive impedance within the equalizer are negligible, the equalizer essentially functions as a traditional cascode amplifier that presents high gain. At higher frequencies, the increases in inductive impedances within the equalizer act to boost a gain of the equalizer. |
| US09735986B2 |
Transmission and reception apparatus and method
A transmission apparatus includes a plurality of orthogonal frequency division multiplexing (OFDM) modulation signal generators, which generate a first OFDM modulation signal and a second OFDM modulation signal. The transmission apparatus also includes a transmitter that transmits the first OFDM modulation signal from a first antenna and the second OFDM modulation signal from a second antenna, in an identical frequency band. A reception apparatus is provided, which includes a plurality of antennas that receive a plurality of OFDM modulation signals; a plurality of OFDM demodulators that transform the plurality of OFDM modulation signals to a plurality of reception signals using Fourier transform; an estimator that outputs a distortion estimation signal using one or more symbols for demodulation included in the plurality of reception signals; and a demodulator that compensates for distortion of the reception signals using the distortion estimation signal and demodulates a data symbol included in the reception signals. |
| US09735984B2 |
Bursting cloud resources to affect state change performance
Method to perform an operation, by, responsive to a request specifying to transition a state of a virtual machine in a cloud computing environment from a first state to a second state, allocating one or more system resources to the virtual machine during the transition from the first state to the second state, and, upon completion of the transition, releasing a portion of the allocated one or more system resources to a pool of available resources, so that the virtual machine is left with a remaining portion of the allocated one or more resources sufficient for operation during the second state. |
| US09735981B2 |
Facilitation of session initiation protocol trunking
Session initiation protocol (SIP) trunking can be facilitated via a mobility network comprising a router and a virtual internet gateway. A router associated with a private branch exchange, can comprise a cellular modem to facilitate radio communication with a cellular network. The router can also perform operations associated with converting wireline signal data to cellular signal data and cellular signal data to wireline signal. A mobility network can also convert wireline signal data to cellular signal data via a virtual Internet gateway that can be used to encrypt or decrypt a voice signal. |
| US09735978B2 |
Playback queue control via a playlist on a mobile device
Embodiments provided herein involve connected states between a mobile device and one or more zones in a network media system and different interactions between the mobile device and the network media system involving the connected states. The connected states may be established between the mobile device and the one or more zones such that further actions taken on media items identified in the playlist on the mobile device may also be taken on corresponding media items in a playback queue associated with the one or more zones. The interface on the mobile device may display various graphical representations to indicate the different interactions involving the connected states, including when a connected state is established, when a connected state is lost, and when a reconnected state is reestablished. The interface may further provide selectable icons to allow a user to navigate among the different media playback options involving the connected states. |
| US09735977B2 |
Multi-networked lighting device
A lighting device utilizes physical or virtual separation of elements within the lighting device to isolate a first portion of data for delivery to a first data network from a second portion of data for delivery to a second data network. The first portion of data relates to a first signal generated responsive to a first sensed condition. The second portion of data may relate to the first signal or to a second signal generated responsive to the first sensed condition or a second sensed condition. The lighting device utilizes a first communication interface to deliver the first portion of data to the first data network and a second communication interface to deliver the second portion of data to the second data network. |
| US09735976B2 |
Method and device for vehicle communication
In a method for vehicle communication, a first vehicle provides first data for communication with a server. The first data is transmitted to a server by radio using a first communication protocol. The server transmits second data to a second vehicle by radio using the first communication protocol, the second data being determined depending on the first data. Depending on the second data, third data is transmitted by the second vehicle to a third vehicle by radio using a second communication protocol. |
| US09735974B2 |
Message processing
Measures, including methods, systems and non-transitory computer-readable storage mediums, for use in processing multicast group membership discovery protocol messages in a data center network including a plurality of compute servers. Each compute server in the plurality is capable of running one or more virtual machines. At a multicast group membership discovery protocol proxy located on a compute server in the plurality, a multicast group membership discovery protocol report message is received requesting delivery of data associated with a specified multicast group from a specified multicast data source. It is determined whether the specified multicast data source is hosted by a virtual machine running on the compute server. In response to a positive determination, a request corresponding to the received multicast group membership discovery protocol report message is forwarded to the virtual machine hosting the specified multicast data source on the compute server. |
| US09735971B2 |
High-availability, scalable policy and charging control systems, and methods therefor
In a method carried out by a first and second policy and charging rules functions (PCRF) (201, 202), the first PCRF receives (s10), from a policy and charging enforcement function (PCEF) (100), an IP-CAN session establishment indication, determines (s20) first policy decision information, causes (s30) a database (300) accessible by both PCRFs to store, in association with a session identifier, session information comprising the session data and the first policy decision information; and provides (s40), to the PCEF, the first policy decision information. Later, the second PCRF receives (s50), from the PCEF, a session modification indication, obtains (s60) therefrom the session identifier, retrieves (s70), from the database, the session information, determines (s80) second policy decision information; causes (s90) the database to store session information comprising the modified session data and second policy decision information; and provides (s100), to the PCEF, the second policy decision information. The invention also relates to a system putting into practice such method. |
| US09735967B2 |
Self-validating request message structure and operation
A method begins by a first device generating a self-validating message by creating a master key, using the master key to create a message encryption key, encrypting a message using the message encryption key to produce an encrypted message, encrypting the master key using a public key of a second device to produce an encrypted master key, and including a message authentication code of the first device in the self-validating message. The method continues by the second device receiving and decoding the self-validating message by verifying the message authentication code of the first device, and when the message authentication code of the first device is verified, decrypting the encrypted master key using a private key of the second device to recover the master key, using the master key to create the message encryption key, and decrypting the encrypted message using the message encryption key to recover the message. |
| US09735964B2 |
Federated realm discovery
A federated realm discovery system within a federation determines a “home” realm associated with a portion of the user's credentials before the user's secret information (such as a password) is passed to a non-home realm. A login user interface accepts a user identifier and, based on the user identifier, can use various methods to identify an account authority service within the federation that can authenticate the user. In one method, a realm list of the user device can be used to direct the login to the appropriate home realm of the user. In another method, an account authority service in a non-home realm can look up the user's home realm and provide realm information directing the user device to login at the home realm. |
| US09735962B1 |
Three layer key wrapping for securing encryption keys in a data storage system
Securing encryption keys in a data storage system using three layer key wrapping that encrypts a data encryption key using a key encryption key, encrypts the key encryption key using a controller encryption key, and encrypts the controller encryption key using a public key of an asymmetric key pair. The private key is stored on a removable storage device. A separate encryption accelerator component decrypts the encryption keys in order to encrypt and/or decrypt host data from a memory of a storage processor. The removable storage drive must be inserted into a receptacle of the encryption accelerator for encryption and/or decryption to be performed, since the encryption accelerator accesses the private key from the removable storage device in order to decrypt the encrypted controller key. The encryption accelerator generates key handles for the storage processor to use when requesting encryption and/or decryption operations. |
| US09735961B2 |
Managing key rotations with multiple key managers
A method, a device, and a non-transitory storage medium are provided to generate and transmit a request to obtain a resource object stored in a clustered network database that stores keys; determine based on a value of the resource object carried in a response, whether permission to update the keys is permitted, wherein a first value of the resource object grants permission and a second value of the resource object does not grant permission; determine whether any of the keys expired in response to receiving permission, wherein other network devices configured to update the keys are prevented from updating the keys while the network device is granted permission; generate a new key for each key of the keys that expired; and store the new key for each key; and release the resource object back to the clustered network database. |
| US09735960B2 |
Method for protecting data stored within a disk drive of a portable computer
A portable computer capable of protecting an encryption key that is sent out to a disk drive after a preboot process has ended is disclosed. The portable computer includes a disk drive for encrypting a volume as a whole, and for decoding data at the volume in response to a receipt of an encryption key from a system. The portable computer also includes a key transfer mechanism, a tamper detection mechanism and a protecting mechanism. In response to a boot process starting from a power-off state, the key transfer mechanism automatically sends the encryption key to the disk drive. The tamper detection mechanism detects a physical tampering of the disk drive. In response to a detection of a physical tampering by the tamper detection mechanism, the protecting mechanism prevents an operation of automatically sending the encryption key to the disk drive by the key transfer mechanism. |
| US09735957B2 |
Group key management and authentication schemes for mesh networks
According to one embodiment, techniques are provided to enable secure communication among devices in a mesh network using a group temporal key. An authenticator device associated with a mesh network stores a pairwise master key for each of a plurality of devices in a mesh network upon authentication of the respective devices. Using the pairwise master key, the authenticator device initiates a handshake procedure with a particular device in the mesh network to mutually derive a pairwise temporal key from the pairwise master key. The authenticator device encrypts and signs a group temporal key using the pairwise temporal key for the particular device and sends the group temporal key encrypted and signed with the pairwise temporal key to the particular device. |
| US09735956B2 |
Key ladder apparatus and method
In one embodiment a method, apparatus and system for is described for receiving a first input including a first decryption key and a second input including an encrypted second decryption key at a cryptographic decryption apparatus, the encrypted second decryption key to be decrypted by the cryptographic apparatus according to the first decryption key, storing a value of a key ladder length in a first register by a cryptographic processor, and using the stored value as a loop index by the cryptographic processor for a number of iterations of the cryptographic decryption apparatus executed as a loop, wherein at one stage in the loop execution of the cryptographic decryption apparatus, the second input includes the key ladder length, wherein the loop operation of the cryptographic decryption apparatus operates for a number of iterations equal to an initial value of the loop index. Related methods, apparatuses and systems are also described. |
| US09735950B1 |
Burst mode clock data recovery circuit for MIPI C-PHY receivers
An example burst mode clock data recovery circuit may include a clock recovery circuit coupled to receive a plurality of data signals, and provide a recovered clock signal in response. Each of the plurality of data signals includes data and an embedded clock signal, and the plurality of data signals may be based on an encoded symbol. The clock recovery circuit is coupled to generate the recovered clock signal in response to a first one of the plurality of data signals. A data recovery circuit may be coupled to receive the plurality of data signals and the recovered clock signal, and provide a plurality of recovered data signals in response to the recovered clock signal. The data recover circuit is coupled to delay each of the plurality of data signals, and capture each of the delayed plurality of data signals in response to the at least one clock pulse. |
| US09735949B2 |
Receiving device and receiving method
In order to efficiently compensate for effects of the Doppler shift, a receiving device includes a Doppler estimator that estimates a Doppler-shift frequency fdc of a received signal. A multiplier and an LPF detect the received signal based on a carrier frequency fc of the received signal and the Doppler-shift frequency fdc estimated by the Doppler estimator 11. A timing corrector corrects a timing T for extracting symbols of the received signal after detection by the LPF so as to track the Doppler shift. A symbol extractor extracts received symbols from the received signal after detection by the LPF at a timing corrected by the timing corrector. An adaptive equalizer estimates and determines symbols from the received symbols extracted by the symbol extractor. |
| US09735948B2 |
Multi-lane N-factorial (N!) and other multi-wire communication systems
System, methods and apparatus are described that facilitate communication of data over a multi-wire data communications link, particularly between two devices within an electronic apparatus. A receiving device receives a sequence of symbols over a multi-wire link. The receiving device further receives a clock signal via a dedicated clock line, wherein the dedicated clock line is separate from, and in parallel with, the multi-wire link. The receiving device decodes the sequence of symbols using the clock signal. In an aspect, a second clock signal is embedded in guaranteed transitions between pairs of consecutive symbols in the sequence of symbols. Accordingly, the receiving device decodes the sequence of symbols using the clock signal received via the dedicated clock line while ignoring the second clock signal. |
| US09735947B2 |
Transmitting device and transmitting method
A transmitting device includes a controller and a transmitter. The controller, in operation, adds an offset to a transmission power or a transmission power density of first data mapped in a remaining resource other than a data resource, to control a transmission power or a transmission power density of second data mapped in the data resource, for use of a second mapping pattern. A part of a resource on which a reference signal is to be mapped in a first mapping pattern of the reference signal is replaced with the data resource in a second mapping pattern of the reference signal. The transmitter, in operation, transmits a signal including the first data, the second data, and the reference signal. |
| US09735945B2 |
Resource management with device-device communication in next generation cellular networks
At the beginning of every epoch the invention estimates the average traffic demand from cellular and device-to-device traffic in each sector in either DL or UL directions based on history from previous epochs. It partitions the network into interfering sectors and employing device-to-device traffic to determine the dynamic fractional frequency reuse FFR patterns for each of these clusters. Then, in every frame, for the set of sectors co-located at the same base station and instantaneous traffic demands, the invention solves the problem of device-to-device traffic placement and scheduling of cellular and device-to-device traffic jointly. |
| US09735931B2 |
System and method for detecting active user equipments
Disclosed herein are an active resource unit detector and a method of use thereof. An embodiment method of detecting active resource units among a plurality of potential resource units includes receiving an aggregate signal containing active pilots transmitted over the active resource units via random access transmissions. The active pilots are then detected and respectively associated with the active resource units according to a pilot-to-resource unit mapping. |
| US09735926B2 |
Method and apparatus for data transmission of device-to-device user equipment in wireless communication system
According to an embodiment of the present invention, a method for transmitting Device-to-Device (D2D) data by a User Equipment (UE) in a wireless communication system, the method comprising: determining a bitmap to be applied to a subframe pool for data transmission from a subframe indicator bitmap; determining a set of subframes to transmit D2D data by using the bitmap to the subframe pool for data transmission; and transmitting D2D data in a subframe included in the determined subframe set, wherein a set of values available as k being the number of 1s in the subframe indicator bitmap are changed according to a change in a transmission mode under unchanged UL/DL configuration. |
| US09735924B2 |
Uplink feedback method, user equipment, and base station
The present invention provides an uplink feedback method, user equipment, and a base station, where the method includes: detecting, by user equipment, downlink data in at least two consecutive downlink sub-frames; performing joint encoding, by the user equipment, for a feedback for the downlink data in the at least two consecutive downlink sub-frames; and transmitting, by the user equipment in an uplink sub-frame corresponding to the last sub-frame of the at least two consecutive downlink sub-frames, joint uplink feedback information for the at least two consecutive downlink sub-frames, so as to resolve the issue of how to perform uplink feedback when downlink bandwidth is different from uplink bandwidth. |
| US09735923B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
A method and an apparatus for transmitting broadcast signals thereof are disclosed. The apparatus for transmitting broadcast signals comprises an encoder encoding service data, a time interleaver interleaving the encoded service data, a mapper mapping the interleaved service data into a plurality of OFDM (Orthogonal Frequency Division Multiplex) symbols to build at least one signal frame, a frequency interleaver frequency interleaving data in the at least one signal frame by using a different interleaving-seed which is used for every OFDM symbol pair comprised of two sequential OFDM symbols, wherein the frequency interleaving is performed by using two memories, a modulator modulating the frequency interleaved data by an OFDM scheme and a transmitter transmitting the broadcast signals having the modulated data, wherein an interleaving-seed is generated based on a cyclic shift value and an FFT size of the modulating. |
| US09735917B2 |
Digital wireless audio transmission system and method for wireless audio transmission
An audio transmission system including a wireless digital microphone unit which detects audio signals and wirelessly transmits the detected audio signals based on adjustable transmission settings and transmission parameters, and a central unit. The central unit has a monitor unit for monitoring and analyzing a frequency spectrum of an available frequency band, a link adaptation unit which adapts the microphone's transmission settings and parameters based on the results of the monitor unit, and a transmitting/receiving unit for receiving wirelessly transmitted audio signals from the wireless microphone unit and for transmitting transmission settings and transmission parameters via a return channel to the wireless microphone unit. The microphone's transmission settings and parameters are modified based on the transmission settings and transmission parameters transmitted via the return channel, which have a center frequency of a channel, a selection of a modulation method and parameters thereof, a data rate, and/or a channel encoding. |
| US09735913B2 |
Reduction of wavelength selective switch (WSS) filter-based impairment using selective subcarrier adjustment
A method may include transmitting, by an optical device, a first channel. The first channel may have a first set of subcarriers. The first channel may be attenuated during transmission by a filter associated with a wavelength selective switch. The method may further include transmitting, by the optical device, a second channel. The second channel may have a second set of subcarriers. The second channel may be attenuated during transmission by the filter associated with the wavelength selective switch. The first channel and the second channel being included in a super-channel. The first set of subcarriers may be selected based on a first signal quality factor associated with attenuation of the first set of subcarriers by the filter. The second set of subcarriers may be selected based on a second signal quality factor associated with attenuation of the second set of subcarriers by the filter. |
| US09735911B1 |
System and apparatus for multi user communication over a single fiber
A system and apparatus includes an optical masking unit that is configured for applying a user's mask code. The mask code has a code length of at least equal to a number of users. A light source unit is coupled to the optical masking unit. The light source unit includes a number of coherent lasers. The number of coherent lasers is at least equal to half the number of users. Each of the coherent lasers is configured for operation at a different specific prescribed operating frequency. A modulation unit is configured for applying the user's data to the coherent lasers. An optical combiner unit is operable for combining outputs of the coherent lasers to an optical fiber input. |
| US09735910B2 |
Data generation apparatus, data generation method, base station, mobile station, synchronization detection method, sector identification method, information detection method and mobile communication system
A mobile station communicates with a base station controlling over a cell containing a plurality of sectors. The mobile station also receives, from a base station, data of synchronization channels which includes sector specific codes respectively corresponding to sector identification numbers for identifying the sectors. In addition, the mobile station performs synchronization detection with reference to the data of synchronization channels, where the data of the synchronization channels mapped to a plurality of predetermined symbols at intervals of a half period of a frame and a plurality of predetermined subcarriers are specific to respective sectors in the same cell and common among adjacent cells. |
| US09735909B2 |
Radio repeater system for avoiding mobile device location interference
A radio repeater system is described that disables itself to avoid interfering with mobile network performed multilateration of mobile devices. The radio repeater provides additional network coverage for a localized area. The localized area can include enclosed spaces such as buildings or transportation terminals. The radio repeater system can monitor the signals received from cell towers, and if there are at least three signals of a predetermined signal strength, the radio repeater can disable itself to avoid interfering with mobile locating performed by the network. The radio repeater can remain disabled until the conditions that led to the disabling have passed. |
| US09735905B2 |
Systems and methods for implementing bi-directional synchronization propagation
Systems and methods for implementing bi-directional synchronization propagation between first and second communication devices are provided. The devices are arranged in a loop-timing configuration. A method includes detecting, by the second communication device, a switching signal comprising an indication to switch a timing role of the second communication device and engaging, by the second communication device, in a synchronization handshake with the first communication device over a communication link based on the detection of the switching signal. Engaging in the synchronization handshake includes determining whether the first communication device is configured to support bi-directional synchronization propagation. The method includes switching the timing role of the second communication device based on the synchronization handshake. |
| US09735904B2 |
PLL with clock and data recovery function for receiver phase synchronization
A transmitter for a radio frequency interconnect (RFI) includes a carrier generator configured to generate a clock recovery signal, and to transmit the clock recovery signal to a receiver. The carrier generator includes a first tuning arrangement configured to receive a first signal and to generate a first carrier signal based on the first signal. The carrier generator includes a second tuning arrangement configured to receive a second signal different from the first signal, and to generate a second carrier signal based on the second signal. The transmitter includes a first modulator configured to generate a first modulated data signal. The transmitter further includes a second modulator configured to generate a second modulated data signal. The transmitter includes an output configured to selectively transmit the first modulated data signal and the second modulated data signal to the receiver. |
| US09735901B2 |
Communication control device, communication control method, and terminal
Provided is a communication control device including a wireless communication unit configured to communicate wirelessly with a terminal in a macrocell that is allowed to communicate wirelessly in FDD mode using a frequency band, the macrocell being overlapped in part or in whole with a small cell that is allowed to communicate wirelessly in TDD mode using the frequency band, an acquisition unit configured to acquire a measurement result during handover of a terminal, the handover allowing the terminal to communicate wirelessly in the small cell, the measurement result being obtained by measuring a degree of interference between the terminal and one or more other terminals that communicate wirelessly in the macrocell, and a controller configured to control the handover based on the measurement result. |
| US09735899B2 |
Device and method for calibrating antenna array systems
A method and a system for calibrating an antenna array. The method may include the following steps: attaching successively pairs of a plurality of probe antennas to each other; performing an initial measurement of a multiport formed by the ports of said pair of probe antennas, the initial measurement yielding initial coefficients of said probe antennas; attaching successively one of said probe antennas to one of the antennas in said antenna array; performing a second measurement of multiports formed by the ports of said probe antennas and said antenna array, the second measurement yielding coefficients of the combination of said antenna array and said probe antennas; and using the initial coefficients and the second measurement coefficients to calibrate said antenna array. |
| US09735897B2 |
Electronic device and method for controlling radiation power
An electronic device includes: a sensor circuitry configured to generate information about a user's motion, at least one processor configured to determine a plurality of threshold values to be compared with a radiation power value and set the radiation power value associated with the determined plurality of threshold values, and an antenna configured to perform a communication in accordance with power. |
| US09735894B2 |
High performance receiver architecture and methods thereof
A user equipment (UE), receiver and method are generally described herein. The UE may include a mixer, a local oscillator (LO) and an analog-to-digital converter (ADC). The mixer may downconvert a differential radio frequency (RF) signal using LO signals and provide downconverted signals to the ADC. The mixer may provide decoupled lowpass filtering. The lowpass filter capacitors may retain charge when discharging is completed. For each differential signal, the mixer may have an input pullup resistor, first switches receiving the signal and driven by different LO signals, second switches receiving signals from the first switches such that connected pairs of switches may have driven by different LO signals, an ADC input resistor, charging capacitors each connected between first switches driven by the same LO signal, and grounding capacitors each connected to second switches associated with different RF signal outputs and driven by different LO signals. |
| US09735893B1 |
Patch system for in-situ therapeutic treatment
Discussed generally herein are methods and devices including or providing a patch system that can help in diagnosing a medical condition and/or provide therapy to a user. A body-area network can include a plurality of communicatively coupled patches that communicate with an intermediate device. The intermediate device can provide data representative of a biological parameter monitored by the patches to proper personnel, such as for diagnosis and/or response. |
| US09735892B1 |
Employing optical signals for power and/or communication
Apparatus, systems and methods employing contact lens sensors are provided. In some aspects, a contact lens includes a substrate that forms at least a portion of the body of the contact lens; an optical communication device disposed on or within the substrate; and a photodetector disposed on or within the substrate, wherein the photodetector harvests light emitted from a device and generates power from the harvested light. In some aspects, an apparatus comprises a tag having a circuit including: an optical communication device; and a photodetector that harvests light received and generates power from the harvested light. The tag can be disposed on or within a contact lens in various aspects. |
| US09735891B1 |
Wavelength optimization for free-space optical communications
A system and method involve propagating, from one or more optical sources connected to a platform, more than one optical signal through a surrounding medium towards a reflective surface. Reflected optical signals, representing the propagated optical signals reflected off of the reflective surface, are then detected using a detection system coupled to the platform. An ideal optical wavelength is then selected for optical communication from the platform within the surrounding medium based upon one or more characteristics of the detected reflected optical signals. |
| US09735889B2 |
Data transmission method
Described are, among other things, a method and a receiver for receiving a management data signal in an optical transmission system where a traffic data signal is transmitted as a NRZ modulated signal. The traffic data signal has a management data signal superimposed thereon as a pulse width modulation of the symbols of the NRZ modulated signal. The NRZ modulated signal is received with the data signal superimposed thereon and the traffic data signal is recovered. The recovered traffic data signal in anti-phase is added to the received signal. The management data signal is detected from the added signals. |
| US09735888B2 |
Control of LO signal frequency offset between optical transmitters and receivers
In an optical receiver, an optical local oscillator (LO) frequency is generated. A modulated optical frequency is received at the optical receiver. An LO-signal frequency offset between the received modulated optical frequency and the optical LO frequency is determined. A determination is made as to whether the LO-signal frequency offset is in one of multiple predefined non-overlapping target windows that cover respective non-zero LO-signal frequency offsets. If it is determined that the LO-signal frequency offset is not in one of the target windows, the optical LO frequency is tuned to drive the LO-signal frequency offset toward one of the target windows to ensure the LO-signal frequency offset is non-zero. |
| US09735887B2 |
Optical reception device and optical reception method
An optical reception device according to an exemplary aspect of the invention includes an optical front-end means for demodulating an inputted optical signal, converting the demodulated signal into an electrical signal and outputting the electrical signal, a pre-emphasis means for adding a high frequency component to the electrical signal, a digital signal processing means for receiving input of the electrical signal with the high frequency component added thereto via a transmission wire, and for performing a digital coherent reception process on the inputted electrical signal, an error detection means for detecting a signal error in the digital coherent reception process and a feedback control means for varying the level of a high frequency component added at the pre-emphasis means and, in accordance with signal errors detected at that time, controlling the pre-emphasis means. |
| US09735881B1 |
Coherent transceiver architecture
A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal at the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features. |
| US09735878B2 |
Optical transmitter and control method of optical transmitter
An optical modulation unit included in an optical transmitter includes two optical modulators that modulate each of two light beams based on applied bias voltages and input modulation signals, and an optical phase regulator that is connected to either of the two optical modulators, and regulates a phase of the light beam incident on the optical modulator. In a state where no modulation signal is input to the two optical modulators, while keeping bias voltages to be applied to one optical modulator and the optical phase regulator constant, the controller determines a first initial bias voltage such that an output light beam from the other optical modulator becomes zero. Thereafter, the controller determines a second initial bias voltage such that an output light beam from the one optical modulator becomes zero, while applying the first initial bias voltage to the other optical modulator. |
| US09735875B2 |
Field device and communication system
A field device provided with a first communication unit for communicating over a communication network, a second communication unit for communicating via infrared with an external device, a converter for converting a message transmitted by the external device and received by the second communication unit into data that can be transmitted over the communication network, and a first controller for controlling the first communication unit and transmitting the data converted by the converter to the communication network. |
| US09735873B2 |
Provisioning virtual optical networks
A method of provisioning an optical network may include receiving one or more virtual optical network (VON) requests. Each VON request may include one or more virtual nodes and one or more virtual links. The virtual nodes may have one or more candidate nodes corresponding to a physical optical network. The method may also include identifying mapping patterns for VON requests by iteratively assigning each virtual node to one of their candidate nodes for each combination of candidate nodes and assigning each virtual link to corresponding physical links. The method may also include formulating a first set of constraint equations based on mapping patterns for the VON requests and formulating a second set of constraint equations based on physical optical network constraints. The first and second set of constraint equations may be solved by satisfiability modulo theories to obtain a mapping solution. |
| US09735872B2 |
Remote device of optical relay system
A remote device of an optical relay system includes first and second remote driving units each extracting transmission signals of different frequency bands from downlink Radio Frequency (RF) signals provided from an optical conversion unit and outputting the transmission signals; and a downlink path control unit receiving the downlink RF signals from the optical conversion unit and transmitting the downlink RF signals to the second remote driving unit through the first remote driving unit, or transmitting the downlink RF signals to the second remote driving unit by bypassing the first remote driving unit. |
| US09735870B2 |
Taps for bidirectional high-speed data on optical fibers
A system for monitoring data traversing a bidirectional optical fiber includes a network tap. The network tap includes first and second network ports for bidirectional data transmission over a first optical fiber. The device includes first and second tap ports respectively associated with the first and second network ports. The first network port receives data transmitted in a first direction over the first optical fiber and at a first wavelength and provides the data to the second network port and to the first tap port. The second network port receives data transmitted in a second direction opposite the first direction over the first optical fiber and at a second wavelength different from the first wavelength and provides the data to the first network port and to the second tap port. The first and second tap the first and second tap ports provide the data to one or more network monitoring devices. |
| US09735868B2 |
Derivation of an identifier encoded in a visible light communication signal
Methods, systems, and devices are described for deriving an identifier encoded in a visible light communication (VLC) signal. One method includes capturing a first part of the VLC signal; extracting, from the first part of the VLC signal, a first pattern of bits representing at least a portion of the identifier encoded in the VLC signal; comparing the first pattern of bits to different portions of a plurality of identifiers; and identifying, based at least in part on the comparing, a subset of the plurality of identifiers as candidate matches to the identifier encoded in the VLC signal. |
| US09735858B2 |
Method for establishing radiofrequency links in a telecommunication network with an optimised ground gateway network
A method for establishing radiofrequency links via a satellite having several spots between a gateway and a service area comprising a plurality of elementary covering zones, designated cells, each cell being associated to a spot and including a plurality of terrestrial terminals, a forward link between the gateway towards the plurality of terrestrial terminals including a first step in which the gateway emits a first analog radiofrequency signal towards the satellite, with a first spectral efficiency; a second step in which a payload of the satellite receives the first analog radiofrequency signal; a third step in which the payload processes the first analog radiofrequency signal, and a fourth step in which the payload emits a plurality of second analog radiofrequency signals towards the cells with a second spectral efficiency, the first spectral efficiency being greater than the second spectral efficiency. |
| US09735855B2 |
Method and apparatus for relaying communication between an access point and a station in a wireless network
A network including an access point, a client station, and a proxy station. The proxy station is configured to communicate with the access point during a first period. During the first period the proxy station is configured to receive, from the access point, downlink data intended for the client station, and transmit, to the access point, uplink data received from the client station and intended for the access point. The proxy station is further configured to communicate with the client station during a second period. During the second period the proxy station is configured to receive, from the client station, the uplink data intended for the access point, and transmit, to the client station, the downlink data intended for the client station. |
| US09735853B2 |
Method and device for low-complexity feedback in a multiuser and multipoint cooperative communication system
Provided are a method and device for low-complexity feedback in a multiuser and multipoint cooperative communication system. The base station in the multiuser and multipoint cooperative communication system transmits a feedback stop signal to a terminal in order for the terminal receiving the feedback stop signal to stop feedback for a predetermined period. The terminal receiving the feedback stop signal stops the feedback of channel information for a period indicated by the feedback stop signal. |
| US09735847B2 |
Spatial modulation multiple-input-multiple-output (SM-MIMO) system
In an SM-MIMO wireless communication system, multiple transmitting antennae may be utilized to transmit wireless signals that carry signal sequences. A selection of the multiple transmitting antennae may be configured to represent a portion of the signal sequences so that channel state information (CSI) is not required at the receiving end of the SM-MIMO system. |
| US09735846B2 |
Communication devices for multiple group communications
A base station for communicating with multiple groups of wireless communication devices is described. The base station includes a processor and executable instructions stored in memory that is in electronic communication with the processor. The base station determines a number of wireless communication devices. The base station also splits the number of wireless communication devices into groups. The base station further determines a precoding matrix for each group. The base station additionally transmits a beamformed signal to each group using the precoding matrix for each group. |
| US09735838B2 |
Apparatus and method for simplifying wireless connection and data sharing
Provided are an apparatus and method for simplifying wireless connection and data sharing. In order to simply implement a complicated and difficult function related to vehicle wireless connection via NFC, the apparatus recognizes proximity or contact to a mobile device, transmits head unit wireless connection information to the mobile device, receives connection information from the mobile device, performs connection to the mobile device in an OBB scheme on the basis of the received connection information, and provides an NFC-linked service when the connection to the mobile device is completed. |
| US09735837B2 |
Method and wireless charging receiver capable of automatically detecting information of wireless power transmitter to limit maximum charging current provided for portable device
A method applied in a wireless charging receiver includes: dynamically detecting information of a wireless power transmitter which provides power for a portable device via the wireless charging receiver; and dynamically generating at least one power configuration signal on at least one signal path of a communication interface between the wireless charging receiver and the portable device according to the detected information of the wireless power transmitter, to limit a maximum charging current provided from the wireless charging receiver to the portable device at a specific charging current level. |
| US09735832B2 |
Communication system and communication device
An output circuit sends a control pilot signal generated in a voltage generator to an input circuit. A communication unit is connected between an earthed wire and a control pilot wire on the output side of the output circuit via a bandpass filter. A communication unit is connected between the earthed wire and the control pilot wire on the input side of the input circuit via a bandpass filter. A low-pass filter is interposed between the output circuit and the communication unit. A low-pass filter is interposed between the input circuit and the communication unit. |
| US09735831B1 |
System, apparatus and method for synchronizing communications between devices
Systems, apparatuses and methods for synchronizing communication actions between multiple communication devices by accounting for discrepancies between timing functionality in communicating devices. A time value indicative of a remote device's view of current time is received. Where it is determined that the time value differs from a locally generated view of current time by at least an established amount, the range of time in which communications signals with the remote device will be monitored and transmitted is extended. |
| US09735827B2 |
Protective enclosure for electronic device
A protective case for use with a portable electronic device includes a protective shell including a cavity for receiving the portable electronic device and a pliable surface disposed in an opening of the protective shell. The pliable surface being adapted to transmit at least a portion of a mechanical force applied at an external surface of the protective shell to the control feature of the installed portable electronic device to actuate the control feature of the installed portable electronic device. The protective case also includes a feature disposed in a wall of the protective shell for accessing an electrical connector of the installed portable electronic device from outside the protective shell. |
| US09735826B2 |
Noise shielding device with heat dissipation structure and electronic device having the same
An electronic device may include a noise shielding device that may include: a substrate including at least one heat generating component; a metallic shield cover that is disposed on the substrate to enclose the at least one heat generating component; a metal housing disposed around the shield cover; and a heat transfer member that is configured to transfer heat emitted from the heat generating component through an opening formed at a position corresponding to the heat generating component to the metal housing, wherein the metallic shield cover includes a plurality of tension fingers that protrude at predetermined intervals and contact a bottom face of the metal housing, and noise emitted from the heat generating component is shielded by a shielding region that is formed by the tension fingers and the metal housing. |
| US09735823B1 |
Swappable multi-component communication devices and methods
Various activity tracker and communication devices are presented. Such devices may include a processing unit and a battery unit. Such devices may also include a flexible band unit, that includes a first band and a second band that removably couple with each other and a component housing that defines a top window and a bottom window. In some embodiments, the battery unit may be inserted within a cavity defined by the component housing such that a top window permits the processing unit to be viewed when the processing unit is installed in the component housing, but the top window is sized to not permit the processing unit and the battery unit to be removed through the top window. |
| US09735820B2 |
Multi-current harmonized paths for low power local interconnect network (LIN) receiver
A LIN receiver includes a single, low power structure for both sleep and silent modes, with a single comparator for detecting LIN signaling during both sleep and silent modes as well as during active mode. In some embodiments, full receiving capability is implemented with a current as low as 5 microamps. In particular, dominant and recessive levels for the wakeup bloc are identical to those of standard LIN levels, fixed at about 3.5 V. Consequently, full LIN receiving capability is available during sleep mode. |
| US09735819B2 |
Mobile communications radio receiver for multiple network operation
A radio receiver for multiple radio network operation includes an RF unit for generating a first down-converted signal from a radio signal received from a first radio network and a second down-converted signal from a radio signal received from a second radio network. Further, it includes a first receiver comprising a paging indicator channel demodulator for demodulating a paging indicator channel of the first radio network based on the first down-converted signal, and a second receiver including a pilot channel demodulator for demodulating a pilot channel of the second radio network based on the second down-converted signal. |
| US09735817B2 |
Multi-channel array distortion compensation apparatus and method
The present invention provides a multi-channel array distortion compensation apparatus and method. The apparatus determines, according to a status of a first indication signal, whether to trigger a signal compensation operation; determines, according to a status of a second indication signal, a first adjustment condition is met, compares power of a received signal with a power threshold, and if the power of the received signal is greater than the threshold power, compensates the received signal according to a first adjustment factor; and if the status of the second indication signal does not meet the first adjustment condition, determines the status of the second indication signal meets a second adjustment condition, performs auxiliary compensation according to a second adjustment factor. By compensating signal distortion caused by chip stacking for a received signal, this reduces costs for implementing a multi-channel array system without the need to increase system complexity. |
| US09735816B2 |
Interference suppression for CDMA systems
Interference is cancelled from a baseband signal by synthesizing interference from estimated symbols in interfering subchannels. The estimated symbols are hard-coded, soft weighted, or zeroed, depending on the value of an estimated pre-processed signal-to-interference-and-noise ratio (SINR) in each subchannel in order to maximize a postprocessed SINR. The estimated pre-processed SINR is obtained from averages of estimated symbol energies and estimated noise variances, or from related statistical procedures. |
| US09735815B1 |
Radio apparatus
To provide a radio apparatus including an amplifier, a first mixer, an analog-to-digital converter, a distortion compensator, and an oscillator. The amplifier amplifies power of a transmission signal. The mixer unit mixes a feedback signal from the amplifier with a local signal of a predetermined frequency. The analog-to-digital converter performs analog-to-digital conversion on an output signal of the mixer unit. The distortion compensator compensates nonlinear distortion of the amplifier based on a digital signal obtained by performing the analog-to-digital conversion. The oscillator changes a frequency of the local signal to be mixed with the feedback signal in the first mixer in a time division manner, with frequency spacing corresponding to a sampling rate of the analog-to-digital converter. |
| US09735814B1 |
High power efficient amplification at cable modems through digital pre-distortion and machine learning in cable network environments
An example method for facilitating a high power efficient amplifier through digital pre-distortion (DPD) in cable network environments is provided and includes receiving a first signal and a second signal at a DPD coefficient finder in an amplifier module of a cable modem, the second signal including transformations of the first signal from distortions due to channel effects and amplifier nonlinearity, synchronizing the first signal and the second signal, removing the channel effects, computing a first vector representing an inverse of the nonlinearity of the amplifier, computing a second vector representing an inverse of certain channel effects and providing DPD coefficients to a DPD actuator, the DPD coefficients including the first vector and the second vector, the DPD actuator predistorting an input signal to the amplifier module with the DPD coefficients, such that an output signal from the amplifier module retains linearity relative to the input signal. |
| US09735813B2 |
Method and apparatus for signal edge boosting
Described is an apparatus for boosting a transition edge of a signal, the apparatus comprises: a logic to provide input data having a Unit Interval (UI); a programmable delay unit to receive the input data and operable to delay the input data by a fraction of the UI to generate a delayed input data; and one or more drivers to drive the input data and the delayed input data to a node. |
| US09735811B2 |
Digital predistortion of non-linear devices
A method and apparatus for compensating for nonlinearities in a non-linear device for manipulating a signal is described. Shortly before an initial discrete power increase is applied to the device, a first pre-distortion function is generated on the basis of a first set of DPD parameters and applied to the signal before it reaches the device. A predetermined time period after the initial power increase, the first pre-distortion function stops being applied to the signal, and a second pre-distortion function is generated on the basis of a second set of DPD parameters and applied to the signal. Shortly before a subsequent discrete power increase is applied to the device, the first pre-distortion function is generated on the basis of the first set of DPD parameters and applied to the signal. |
| US09735809B2 |
Transmitting apparatus and signal processing method thereof
A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method. |
| US09735808B2 |
Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM). |
| US09735807B2 |
Low density parity check encoder having length of 64800 and code rate of 2/15, and low density parity check encoding method using the same
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 2/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM). |
| US09735806B2 |
Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 4/15 code rate
A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis. |
| US09735805B2 |
Encoder, decoder and method
An encoder for encoding input data to generate corresponding encoded data includes data processing hardware which is operable: to determine at least partial reoccurrences of data blocks or data packets within the input data, wherein the data blocks or data packets include a plurality of bytes; to employ at least one reference symbol to relate reoccurrences of mutually similar data blocks or data packets and/or to indicate whether or not there are reoccurrences of mutually similar data blocks or data packets within the input data; to employ a plurality of change symbols, for example a plurality of mask bits, to indicate changed and unchanged data elements of partial reoccurrences of data blocks or data packets within the input data and a change of data values of changed data elements; and to encode the at least one reference symbol and the plurality of change symbols into the encoded data. |
| US09735789B2 |
Phase error detection in phase lock loop and delay lock loop devices
A device includes a lock detect circuit that is structured and arranged to: convert a reference clock to a reference triangle wave; convert a feedback clock to a feedback triangle wave; determine whether the feedback triangle wave is within a tolerance margin that is defined relative to the reference triangle wave; and generate a determiner output that is a first value when the feedback triangle wave is not within the tolerance margin, and a second value when the feedback triangle wave is within the tolerance margin. |
| US09735787B2 |
Frequency synthesizer with dynamic phase and pulse-width control
An agile frequency synthesizer with dynamic phase and pulse-width control is disclosed. In one aspect, the frequency synthesizer includes a count circuit configured to modify a stored count value by an adjustment value. The frequency synthesizer also includes an output clock generator configured to generate an output clock signal having rising and falling edges that are based at least in part on the stored count value satisfying a count threshold. The count circuit is further configured to alter at least one of the period or phase of the output clock signal based at least in part on modifying an adjustment rate of the count circuit. |
| US09735785B2 |
Apparatuses and methods for conversion of radio frequency (RF) signals to intermediate frequency (IF) signals
Various embodiments implement apparatuses and methods for conversion of radio frequency (RF) signals to intermediate frequency (IF) signals. More particularly, some embodiments are directed toward down conversion of RF signals to IF signals in a multi-band radio receiver, such as a satellite receiver, using a single oscillator for different frequency bands. For example, some of the apparatuses and methods presented are suitable for integration into monolithic RF integrated circuits in low-cost satellite receivers for home entertainment use. |
| US09735784B2 |
Programmable logic device and logic integration tool
An object of the present invention is to provide a high reliable/high safe programmable logic device with high error resistance. The present invention provides a programmable logic device that has a plurality of configuration memories. The configuration memories are divided into a plurality of areas and are arranged and a part of the plurality of areas is set to a high reliable area where reliability of the configuration memory is higher than in the other area. |
| US09735781B2 |
Physically unclonable camouflage structure and methods for fabricating same
An application specific integrated circuit (ASIC) and a method for its design and fabrication is disclosed. In one embodiment, the camouflaged application specific integrated circuit (ASIC), comprises a plurality of interconnected functional logic cells that together perform one or more ASIC logical functions, wherein the functional logic cells comprise a camouflage cell including: a source region of a first conductivity type, a drain region of the first conductivity type, and a camouflage region of a second conductivity type disposed between the source region and the drain region. The camouflage region renders the camouflage cell always off in a first camouflage cell configuration and always on in a second camouflage cell configuration having a planar layout substantially indistinguishable from the first configuration. |
| US09735774B2 |
Capacitive load driving circuit
A capacitive load driving circuit for repeating between charging and discharging for a capacitive load includes a charge supply source, a first signal path through which a first voltage is applied by the charge supply source, a second signal path through which a second voltage higher than the first voltage is applied by the charge supply source, and a connection path selector configured to electrically connect the capacitive load and the charge supply source via at least one of the first signal path and the second signal path, in accordance with a control signal. The charge supply source is arranged and configured to supply voltage to the connection path selection section. |
| US09735773B2 |
Systems and methods for sensing current through a low-side field effect transistor
Systems and techniques detecting a reverse current are disclosed. An apparatus comprises a switching circuit coupled to a load and a reference node. The switching circuit may be capable of conducting a reverse current from the reference node to the load when a voltage at the load is lower than a voltage at the reference node. A voltage source has a first terminal coupled to the load, a second terminal configured to follow a voltage at the load, and produces a voltage proportional to a voltage drop across the switching circuit. A comparator circuit is coupled to compare a voltage at the second terminal of the voltage source to the voltage at the reference node and configured to indicate when the reverse current has a magnitude greater than a predetermined threshold. |
| US09735769B1 |
Controlling current or mitigating electromagnetic or radiation interference effects using multiple and different semi-conductive channel regions generating structures
Systems and methods for controlling current or mitigating electromagnetic or radiation interference effects using multiple different semi-conductive channel regions generating structures formed by multiple different semi-conductive electrical current or voltage control structures. One embodiment includes providing a first and second metal oxide semiconductor field effect transistor (MOSFET) sections formed on opposite sides of a metal-semiconductor field effect transistor (MESFET) such that operation of the MESFET modulates or controls current otherwise controlled by an electrical path of the MOSFET sections. A control system for determining when an embodiment of the invention is to be operated is also provided to include automated systems including sensors as well as manually operated systems. Automated systems can include radiation sensors as well as other control systems such as high voltage radio frequency transmitter or receiver systems. Methods of operation for a variety of modes are also provided. |
| US09735765B2 |
Apparatuses, methods, and systems for jitter equalization and phase error detection
Embodiments include apparatuses, methods, and systems for jitter equalization and phase error detection. In embodiments, a communication circuit may include a data path to pass a data signal and a clock path to pass a clock signal. A jitter equalizer may be coupled with the data path and/or clock path to provide a programmable delay to the data signal and/or clock signal, respectively. The delay may be determined by a training process in which a supply voltage may be modulated by a modulation frequency. The delay may be dependent on a value of the supply voltage, such as a voltage level and/or jitter frequency component of the supply voltage. A phase error detector is also described that may be used with the communication circuit and/or other embodiments. |
| US09735763B1 |
High voltage input receiver using low-voltage devices
An input receiver for stepping down a high power domain input signal for a high power domain powered by a high power supply voltage into an output signal for a low power domain includes a waveform splitter. The waveform splitter splits the high power domain input signal into a high voltage signal and a low voltage signal. A high voltage input receiver receives the high voltage signal to produce a received high voltage that is level shifted into a first input signal. A low voltage input receiver receives the low voltage signal to produce a second input signal. A logic circuit generates the output signal from the first input signal and the second input signal. |
| US09735761B2 |
Flexible ripple mode device implementation for programmable logic devices
Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a programmable logic device (PLD) includes a plurality of programmable logic blocks (PLBs) and a plurality of logic cells within at least one of the PLBs, where each logic cell includes a four input lookup table (4-LUT) configured to provide a 4-LUT output signal to associated carry logic. Each logic cell is configurable according to at least two selectable operational modes including a logic function output mode and a ripple arithmetic output mode, and at least three of the 4-LUT inputs are interchangeable when a selected operational mode comprises the ripple arithmetic output mode. |
| US09735760B1 |
Devices with push-pull drivers
In one example, a device may include a first push-pull driver with a first impedance and a push-pull driver unit with a second push-pull driver having a second impedance. The push-pull driver unit may be in parallel with the first push-pull driver. The device may further include a pulse generating unit to activate the push-pull driver unit for a delay time following an edge transition in an input signal. In one example, the device may have an output impedance that is less than the first impedance when the push-pull driver unit is activated. |
| US09735756B2 |
Piezoelectric device
A piezoelectric device includes a piezoelectric vibrating piece and a base. The piezoelectric vibrating piece includes an excitation portion, a framing portion, a connecting portion, excitation electrodes, and extraction electrodes. The base includes a mounting terminal, a cutout portion formed on a side surface, and a cutout-portion electrode formed in the cutout portion. The cutout-portion electrode connects the mounting terminal to the extraction electrode. The extraction electrode includes a cutout-portion region connected to the cutout-portion electrode, an excitation-electrode connecting region connected to the excitation electrode, and an erosion preventing region disposed between the cutout-portion region and the excitation-electrode connecting region to prevent erosion by solder. The extraction electrode in the erosion preventing region is formed without containing gold (Au) and silver (Ag), and the extraction electrodes in the cutout-portion region and the excitation-electrode connecting region are formed containing at least one of gold (Au) and silver (Ag). |
| US09735755B2 |
BAW resonator having lateral energy confinement and methods of fabrication thereof
Embodiments of a Bulk Acoustic Wave (BAW) resonator in which an outer region of the BAW resonator is engineered in such a manner that lateral leakage of mechanical energy from an active region of the BAW resonator is reduced, and methods of fabrication thereof, are disclosed. In some embodiments, a BAW resonator includes a piezoelectric layer, a first electrode on a first surface of the piezoelectric layer, a second electrode on a second surface of the piezoelectric layer opposite the first electrode, and a passivation layer on a surface of the second electrode opposite the piezoelectric layer, the passivation layer having a thickness (TPA). The BAW resonator also includes a material on the second surface of the piezoelectric layer adjacent to the second electrode in an outer region of the BAW resonator. The additional material has a thickness that is n times the thickness (TPA) of the passivation layer. |
| US09735754B2 |
Bulk acoustic wave resonator having a plurality of compensation layers and duplexer using same
A bulk acoustic wave resonator (BAWR) includes a bulk acoustic resonance unit and at least one compensation layer. The bulk acoustic resonance unit includes a first electrode, a second electrode, and a piezoelectric layer disposed between the first electrode and the second electrode. The first electrode, the second electrode, and the piezoelectric layer each include a material that modifies a resonance frequency based on a temperature, and the at least one compensation layer includes a material that adjusts the resonance frequency modified based on the temperature in a direction opposite to a direction of the modification. |
| US09735748B2 |
Radio receiver having enhanced automatic gain control circuitry
An apparatus includes an input terminal to receive a radio frequency (RF) signal and to communicate the RF signal to a low noise amplifier (LNA) via an input signal path, and a capacitor attenuator coupled to the input terminal to attenuate the RF signal by a controllable amount and having a first portion controllable to include a used part configured on the input signal path and an unused part coupled between the input signal path and an AC reference node, and a second portion coupled between the LNA and the AC reference node. |
| US09735747B2 |
Balancing mobile device audio
Techniques related to balancing audio for mobile devices are discussed. Such techniques may include detecting a speaker of the device is at least partially obstructed, determining an audio output from the device is impeded due to the speaker being at least partially obstructed, and increasing an output from the speaker and/or an alternative speaker based on the audio output from the device being impeded. |
| US09735741B2 |
Receivers for digital predistortion
Aspects of this disclosure relate to a receiver for digital predistortion (DPD). The receiver includes an analog-to-digital converter (ADC) having a sampling rate that is lower than a signal bandwidth of an output of a circuit having an input that is predistorted by DPD. DPD can be updated based on feedback from the receiver. According to certain embodiments, the receiver can be a narrowband receiver configured to observe sub-bands of the signal bandwidth. In some other embodiments, the receiver can include a sub-Nyquist ADC. |
| US09735740B2 |
Low noise amplifier
A low noise amplifier includes an amplifier transistor having a source, a gate, and a drain. An input node is coupled to the gate. An output node is coupled to the drain. An inductor is coupled between the gate and the drain. |
| US09735738B2 |
Low-voltage low-power variable gain amplifier
In high speed communication applications, e.g., optical communication, a variable gain amplifier is used for input signal amplitude normalization or for linear equalization. Traditionally a bipolar Gilbert multiplier circuit is used. When moving towards a low-power application, a modified circuit topology is implemented to reduce the minimum supply voltage requirement of the variable gain amplifier while ensuring that bias current levels remain substantially the same and achieving the same current switching capacity as the traditional circuit. As a result, the power consumption of the circuit can be greatly reduced. The modified circuit topology combines the amplifier and gain transistors and achieves gain programming using a voltage difference of two pairs of floating voltage sources. |
| US09735737B2 |
High-gain low noise figure complementary metal oxide semiconductor amplifier with low current consumption
A radio frequency low noise amplifier circuit with a receive signal input, a receive signal output, and a voltage source include a low noise amplifier and a coupled inductor circuit with a primary inductive chain connected to the output of the low noise amplifier and to the voltage source. The coupled inductor circuit further includes a secondary inductive chain with a first inductor electromagnetically coupled to the primary inductive chain, and a second inductor in series with the first inductor and magnetically coupled to the primary inductive chain. The second inductor is connected to a feedback node of the low noise amplifier. There is an output matching network connected to the first inductor of the secondary inductive chain and to the receive signal output. |
| US09735733B2 |
Quantum interference device, atomic oscillator, electronic device, and moving object
An atomic oscillator includes an atom cell, a first light source device, a second light source device, and a reception section. The atom cell is filled with alkali metal. The first light source device emits a light beam that includes a resonance light beam pair configured to be circularly polarized with each other in the same direction and configured to cause the alkali metal to resonate. The second light source device emits a light beam that includes adjustment light beam configured to be circularly polarized in a reverse direction to the resonance light beam pair. The reception device receives the resonance light beam pair that pass through the atom cell. The adjustment light beam may include the resonance light beam that causes the alkali metal to resonate. In addition, the resonance light beam pair may be a line and the adjustment light beam is a line. |
| US09735730B2 |
Flash testing of photovoltaic modules with integrated electronics
A method for testing a photovoltaic (PV) module having an integrated power converter includes: obtaining a reference output signature of a PV module design in response to a flash pattern; applying the flash pattern to a PV module under test; acquiring an observed output signature of the PV module under test in response to the flash pattern; and comparing the observed output signature of the PV module under test to the reference output signature. Second reference output and observed output signatures may be obtained in response to a second flash pattern. The output signatures may be combined using various techniques. One or more parameters of the integrated power converter may be preset to one or more predetermined states prior to applying a flash pattern. |
| US09735729B2 |
Circuits and methods for limiting open circuit voltage of photovoltaic strings
A photovoltaic string may include an open circuit voltage limiter that conducts current in one direction to provide a limiter voltage less than an open circuit voltage of the photovoltaic string, and that conducts current in the other direction. One or more open circuit voltage limiters may be connected across the photovoltaic string or across selected groups of solar cells of the photovoltaic string. The limiter voltage may be greater than a maximum power point voltage but less than the open circuit voltage of the photovoltaic string. |
| US09735727B2 |
Controller of an electric motor
A controller for an electric motor includes a protective circuit for limiting current or for polarity reversal protection, the protective circuit including a field effect transistor having a gate. The protective circuit further includes a control unit for providing a control voltage for the gate, a smoothing capacitor for charge storage being provided at the gate. |
| US09735726B2 |
Independent pathways for detecting fault condition in electric motor
An electric motor system having substantially independent hardware-based and software-based pathways for detecting and initiating responses to fault conditions, such as over-current conditions, in an electric motor which is powered by a power inverter which is controlled by a power module and a microprocessor. Each pathway involves comparing a voltage, which is representative of an electric current flowing to the motor, to a predetermined maximum voltage, and if the former exceeds the latter using hardware or software to initiate shutting off the motor, such as by shutting off the power inverter. When one pathway detects a fault condition it may notify the other pathway, and the notified pathway may also initiate shutting off the motor. |
| US09735720B2 |
Electric motor torque control
A vehicle includes one or more inverter-fed electric machines such as permanent magnet synchronous motors. In response to a torque request, a controller issues commands to an inverter calculated to cause the motor to produce the requested torque. A method of operating the inverter may determine the commands based on the ratio of rotor speed to inverter input voltage, reducing the approximation error associated with multi-dimensional lookup tables. When the speed and voltage vary while maintaining a constant ratio and constant torque request, the issued commands produce a winding current in the electrical machine with constant direct and quadrature components. |
| US09735717B1 |
Brushless motor and wiper apparatus
A brushless motor comprises: a stator 21 having armature coils 21a, 21b, and 21c; a rotor 22 which is rotated by a revolving magnetic field; and a switching element 30a, wherein the brushless motor has a rotation number control unit 33 which switches between low-speed and high-speed mode, wherein in the low-speed mode, the rotation number control unit 33 supplies current to the armature coils 21a, 21b, and 21c at predetermined energization timing and controls a duty ratio to control the rotation number of the rotor 22, and in the high-speed mode, the rotation number control unit 33 supplies current to the armature coils 21a, 21b, and 21c at energization timing advanced from the energization timing for the low-speed mode, thereby performing field weakening control of weakening the revolving magnetic field from that of the low-speed mode to control the rotation number of the rotor 22. |
| US09735714B2 |
Motor controller, sheet conveying device, and image forming apparatus
A motor controller (58) according to the present invention includes a pulse width detection portion (595), a speed control portion (591), a pulse width storage portion (596), a same pulse detection portion (597), and a stop processing portion (598). The pulse width detection portion detects the pulse widths of pulses included in the pulse signal. The speed control portion performs: an acceleration control of the drive motor; and a deceleration control of the drive motor. The same pulse detection portion detects, from among the pulses included in the pulse signal inputted during the deceleration control, a pulse in which the pulse width detected by the pulse width detection portion is the same pulse width as the pulse width of an earliest pulse stored in the pulse width storage portion. The stop processing portion stops control of a rotation speed of the drive motor performed by the speed control portion. |
| US09735709B2 |
Power generation unit, electronic apparatus, transportation device, and method of controlling power generation unit
A power generation unit includes a deforming member (a beam) adapted to deform while switching a deformation direction, a first piezoelectric device provided to the deforming member (the beam), a second piezoelectric device provided to the deforming member (the beam), an inductor electrically connected to the first piezoelectric device, a switch disposed between the first piezoelectric device and the inductor, and a control section adapted to detect a voltage generated in the second piezoelectric device, and if the voltage detected has a level one of equal to and higher than a predetermined level, electrically connect the first piezoelectric device and the inductor to each other using the switch. |
| US09735701B2 |
Circuit and method for measuring available power in a wireless power system
A resonant wireless power receiver that includes an electromagnetic resonator having one or more inductive elements that are arranged to form a receiver coil and a network of passive components arranged to form a matching network. A rectifier circuit converts ac power from the electromagnetic resonator to dc power. An available-power indicator measures the rectified power to assess the instantaneous power available to the receiver. |
| US09735696B2 |
Filter capacitor degradation and calibration
Methods and power conversion systems in which a capacitor degradation detection system includes an adjustable gain amplifier circuit is calibrated by automatic adjustment of at least one amplifier gain to accommodate current and voltage levels of a particular filter circuit in a first mode. Capacitance values of filter capacitors are calculated according to amplified current signals and compared with an acceptable tolerance range to selectively identify a filter capacitor fault or to store calculated capacitance values as base values in an electronic memory in the first mode. During operation in a second mode with the rectifier and inverter on, the adjusted amplifier gain is used to amplify current sensor signals and/or voltage signals, and capacitance values of the filter capacitors are used to selectively identify capacitor degradation. |
| US09735694B2 |
Integrated circuit and switching power-supply device with charging control circuit
A switching power-supply device has a smoothing capacitor connected between a ground-side output terminal connected to one end of a secondary winding of a transformer and a non-ground-side output terminal connected to the other end of the secondary winding; an N-type transistor connected between the non-ground-side output terminal and the other end of the secondary winding; a capacitor connected to a connection point of the N-type transistor and the other end of the secondary winding; a charging circuit connected between a connection point of the N-type transistor and the non-ground-side output terminal and the capacitor and configured to charge the capacitor, and a control circuit configured to perform on-and-off control of the N-type transistor by using a voltage of the capacitor. |
| US09735692B1 |
Adapter with low standby loss and electronic system with low standby loss
An adapter includes a rectifying unit, a power factor correction unit, a standby circuit, a load-connecting detection circuit, a first power conversion circuit, a second power conversion circuit and an auxiliary voltage control circuit. When a load apparatus is connected to the adapter, a first ground side of the first power conversion circuit is short-circuited to a second ground side of the second power conversion circuit, so that the load-connecting detection circuit is turned on and sends out a first signal. After the auxiliary voltage control circuit receives the first signal, the auxiliary voltage control circuit is turned on to drive the first power conversion circuit and the second power conversion circuit, so that the first power conversion circuit and the second power conversion circuit start to convert a first voltage into a first output voltage and a second output voltage. |
| US09735691B2 |
Power supply device
A power supply device includes: a switching element that performs synchronous rectification on a power to be induced in a first secondary wiring of a transformer that performs voltage conversion; a first current detection circuit that detects a value of a current to be induced in a second secondary wiring of the transformer; a second current detection circuit that detects a change in the current to be induced in the second secondary wiring, the second current detection circuit having a higher response speed with respect to conversion of the current than that of the first current detection circuit; and a control unit (control circuit) that determines based on the change in the current detected by the second current detection circuit whether or not backflow is occurring, and controls the switching element in accordance with a result of the determination. |
| US09735690B2 |
Line frequency ripple reduction in a resonant converter
Systems and methods for reducing the line frequency ripple in a resonant converter are described. In some embodiments, a power supply includes a switching network; an LLC resonant tank coupled to the switching network; a rectifier coupled to the LLC resonant tank; and a control circuit coupled to the switching network and to the rectifier, where the control circuit is configured to modify an operating frequency of the switching network to reduce a line frequency ripple at an output of the rectifier. |
| US09735685B2 |
Interleaved LLC current equalizing converter
The present invention discloses an interleaved LLC convertor with current sharing. The interleaved LLC convertor with current sharing comprises: an interleaved LLC circuit, consisting of an even number of LLC circuits connected in parallel; and a plurality of windings with the same quantity as that of the LLC circuits, wherein all first polarization terminals from each of LLC circuits at its DC output side together constitute a first output terminal; all first terminals from each of the windings together constitute a second output terminal; a first half of the plurality of windings surround a magnetic core in a first direction, and a second half of the plurality of windings surround the magnetic core in a second direction; each of the plurality of windings has the same inductance, and the first half of the plurality of windings are inversely coupled with the second half of the plurality of windings; and the second polarization terminal of each LLC circuit at its DC output side connects to a second terminal of one of the windings. |
| US09735684B2 |
Controllers, power supplies and control methods
Power supplies together with related over voltage protection methods and apparatuses. A power supply has a transformer including a primary winding and an auxiliary winding. A power switch is coupled to the primary winding and a sensing resistor coupled between the power switch and a grounding line. A multi-function terminal of a controller is coupled to the sensing resistor. A diode and a first resistor is coupled between the auxiliary winding and the multi-function terminal. |
| US09735682B1 |
Step-down circuit
A step-down circuit includes a first transistor of N-type having a channel between an input terminal and a first node, and a gate to which a reference voltage that is lower than a peak value of an AC voltage applied to the input terminal is applied, a second transistor of P-type having a channel between the input terminal and a second node, and a gate to which the reference voltage is applied, a third transistor of N-type having a channel between the first node and an output terminal, and a gate to which the AC voltage is applied, a fourth transistor of P-type having a channel between the second node and the output terminal, and a gate to which the AC voltage is applied, a first capacitor connected between the first node and the second node, and a second capacitor connected between the output terminal and a reference potential terminal. |
| US09735676B2 |
Self-oscillating resonant power converter
Resonant power converters and inverters comprising a self-oscillating feedback loop coupled from a switch output to a control input of a switching network comprising one or more semiconductor switches (S1, S2). The self-oscillating feedback loop sets a switching frequency of the power converter (100) and comprises a first intrinsic switch capacitance (CGD) coupled between a switch output and a control input of the switching network and a first inductor (LG). The first inductor (LG) is coupled in-between a first bias voltage source and the control input of the switching network and has a substantially fixed inductance. The first bias voltage source is configured to generate an adjustable bias voltage (VBias) applied to the first inductor (LG). The output voltage (V0UT) of the power converter (100) is controlled in a flexible and rapid manner by controlling the adjustable bias voltage (VBias). |
| US09735674B2 |
PWM generation for DC/DC converters with frequency switching
A method for generating a pulse width modulation (PWM) control signal includes generating a sawtooth ramp signal at a first frequency under standard operating conditions using a ramp generator, generating a PWM square wave having a rising edge at a falling edge of the sawtooth ramp signal and a falling edge when the sawtooth ramp signal exceeds an error threshold, adjusting the frequency of the sawtooth ramp in response to a changed operating parameter of the ramp generator, and adjusting a peak input voltage of the ramp generator simultaneous with adjusting the frequency of the sawtooth ramp, thereby preventing one of a voltage overshoot and a voltage undershoot. |
| US09735667B2 |
Power supply management circuit utilizing multistage activation and related management method
A management circuit for a power supply is provided. The power supply includes a power factor correction circuit and a power conversion circuit. An output of the power factor correction circuit is coupled to an input of the power conversion circuit. The management circuit includes a power factor correction controller, a pulse width modulation controller and a control circuit. The power factor correction controller controls power factor correction of the power factor correction circuit. The pulse width modulation controller controls power conversion of the power conversion circuit. The control circuit selectively activates the pulse width modulation controller according to a first activated signal generated by an input power of the power supply. After the pulse width modulation controller is activated, the control circuit generates a second activated signal based on the first activated signal. The control circuit activates the power factor conversion controller according to the second activated signal. |
| US09735664B2 |
Cascaded multi-level power converter
A multi-level power converter comprising: n input stages (Ein_n), n being at least equal to 1, each input stage comprising n+1 identical input converters (CONVx_En) connected together, the input converters (CONVx_En) exhibiting an identical topology, chosen from among the architectures of the NPC (Neutral Point Clamped), ANPC (Active Neutral Point Clamped), NPP (Neutral Point Piloted) and SMC (Stacked Multicell Converter); an output stage (Eout) connected to the input stage of rank 1 and comprising an output converter (CONVs) supplied with a differential voltage (Vfloat) resulting from a first electrical potential applied to the output of a first input converter of the input stage of rank 1 and from a second electrical potential applied to the output of a second input converter of the input stage of rank 1, the output converter (CONVs) exhibiting a topology chosen from among an architecture with floating capacitor (FC), SMC (Stacked Multicell Converter), NPC (Neutral Point Clamped), NPP (Neutral Point Piloted) and ANPC (Active Neutral Point Clamped). |
| US09735658B2 |
Motor with multiple-pole sensing plate
Provided are a motor and a sensing magnet of the motor. The sensing magnet includes a through hole that is positioned at a center portion thereof, and a plurality of poles which are formed along an outer periphery thereof. Here, the plurality of poles includes a first pole and a second pole extending from the first pole in a direction of the through hole. |
| US09735654B2 |
Cooled magnet motor
An electric motor/generator includes a rotor with magnets mounted on the surface of the rotor, the magnets facing the stator over a gap. The magnets have a very high flux density but a limited ability to withstand high stator currents at high temperatures, preferably magnets made of the N48H material. By providing rotor magnet cooling means that reduces the temperature of the magnets by a cooling fluid, use of magnets with lower maximum working temperature and higher flux density is permitted and thereby higher flux can be obtained from the magnets. |
| US09735648B2 |
Drive device for electric vehicle
The present structure does not require a knuckle on the vehicle body side, improves rotational accuracy of an input shaft of a speed reduction unit, increases durability of bearings, and suppresses rotation noise of the bearings by improving the supporting structure of the input shaft of the speed reduction unit. In a drive device for an electric vehicle comprising: a speed reduction unit including an input shaft driven by an electric motor; a hub unit rotationally driven by an output member of the speed reduction unit; and a housing accommodating the electric motor and the speed reduction unit, wherein the input shaft of the speed reduction unit is supported by bearings provided at two locations in the axial direction, the drive device is configured such that the bearings provided at the two locations are both supported by the output member, and the housing is provided with a suspension joining portion. |
| US09735644B2 |
Inverter-integrated electric compressor
The purpose of the present invention is to provide an inverter-integrated electric compressor in which a DC power input system is simplified as a configuration for directly connecting a power source cable connector to a P-N terminal on a substrate, stress caused to the substrate can be reduced even in this case, and damage to the substrate and mounting components can be prevented. In the inverter-integrated electric compressor, a P-N terminal for inputting high-voltage DC power is provided on a main substrate of an inverter device, a power source cable can be connected by inserting a connector into the P-N terminal, the connector being provided to one end the terminal, an electrical component constituting the inverter device is placed on the opposite side of the P-N terminal to sandwich the main substrate therebetween, and the stress caused to the main substrate when the connector is inserted is borne by the electrical component. |
| US09735643B2 |
Rotating electric machine with seamless cover and lid section
A rotating electric machine includes a motor section and a controller section. The motor section includes an annular stator, a winding wire wound on the stator, and a rotor rotatably disposed inside the stator. The controller section is positioned in an axially non-overlapping position with the stator and controls an electric power supply to the winding wire for a drive control of the motor section. The rotating electric machine also includes a cover having a cylindrical shape which seamlessly covers the controller section and the motor section. The rotating electric machine further includes a lid section for sealing of an end part of the cover. As a result, the rotating electric machine is sealed from dust and water. |
| US09735632B2 |
Rotating electric machine rotor
A void group made up of plural voids is formed on an outer circumferential side of a longitudinal end portion of a permanent magnet provided in a rotating electric machine rotor. The void group includes a first void and a second void row where plural second voids are formed at predetermined intervals at a position further radially outwards than the first void. A rib is formed between a pair of adjacent second voids of the second void row. End portions of the first void respectively overlap the pair of adjacent second voids. An imaginary line that extends along the center of the rib passes through at least part of the first void. A magnetic pole center-side end portion of the void group extends from the outer circumferential surface of the permanent magnet towards an outer circumferential surface of a rotor core. |
| US09735631B2 |
Embedded permanent magnet rotary electric machine
Permanent magnets that constitute the single magnetic poles are constituted by n permanent magnet segments, the n permanent magnet segments being configured such that shapes and directions of orientation thereof have mirror symmetry relative to a plane that passes through a magnetic pole center and that includes a central axis of the rotor core, and being oriented such that a permanent magnet segment that is further away from the magnetic pole center in a circumferential direction has a smaller angle of orientation, and the permanent magnet segment that is positioned further away from the magnetic pole center in the circumferential direction being produced so as to have an approximately fan-shaped cross-sectional shape in which a radial width is wider than a circumferential width. |
| US09735628B2 |
Wireless energy transfer for mobile device applications
A wireless energy transfer system may include a first layer of conductive material that may be positioned proximate to a second layer. The second layer of magnetic material may be positioned proximate to the first layer of conductive material and a third layer. The third layer may be positioned proximate to the second layer and a fourth layer, wherein the third layer may include a first resonator coil, wherein the first resonator coil may be configured to transfer wireless energy to a second resonator coil when the second resonator coil is proximate to the first resonator coil. The fourth layer may be positioned proximate to the third layer, wherein the fourth layer may include a plurality of conductive material. |
| US09735627B2 |
Input driver for power amplifier and transmitter
An input driver includes a power converting unit and a level adjusting unit. The power converting unit is configured to generate a first power and a second power having an anti-phase relationship based on input power, and process the first power and the second power as differential inputs to output a third power. The level adjusting unit is configured to adjust a voltage level of the third power and output the adjusted power as an input to a power amplifier. |
| US09735624B2 |
Device for the transmission of an electromagnetic signal
A device for the transmission of electromagnetic signals, the device comprising: a conductive element at least one inducer, for inducing charge in said conductive element; a transmission circuit, for generation and transmission of electromagnetic signals; wherein said conductive element and said at least one inducer are movable, with respect to each other, between a plurality of relative positions; in a first position of said relative positions, said at least one inducer is arranged to induce a charge in said conductive element; in a second position of said relative positions, said conductive element is arranged to discharge; the conductive element is arranged to couple with the transmission circuit, in said first position and/or said second position, such that charging and/or discharging of said conductive element causes the transmission circuit to generate and transmit an electromagnetic signal; and the device is arranged such that movement of said device causes relative movement of said conductive element and said at least one inducer between said plurality of relative positions. |
| US09735623B2 |
Power transmitting method and power transmitter for communication with power receiver
A method and power transmitter for efficiently controlling power transmission to one or more power receivers in a wireless multi-power transmission system are provided. The method includes performing, when a predetermined measurement cycle arrives, a load measurement; comparing a current load measurement value with a previous load measurement value; determining whether the current load measurement value is increased over the previous load measurement value by at least as much as a first predetermined threshold; gradually increasing, when the load measurement value is increased over the previous load measurement value by at least as much as the first threshold, a transmission power value until a request for a subscription to a wireless multi-power transmission network from a power reception target within a predetermined time limit; and stopping, when the request for the subscription is not received before the time limit is exceeded, power transmission to the power reception target. |
| US09735622B2 |
Isolated signal transmission apparatus
An isolated signal transmission apparatus isolatingly transmits, from a control-side apparatus to a control target apparatus, an electric signal obtained by superimposing a communication signal on a direct-current signal. The apparatus includes a lower limiter circuit configured to output, to the control target apparatus, a direct-current signal, whose value is a predetermined lower limit value, if a value of the direct-current signal from the control-side apparatus is less than the predetermined lower limit value. |
| US09735621B2 |
Segment protected parallel bus
A Segment Protected Parallel Bus is for an uninterruptible power supply to electric consumers, whereby at least two electrical distributed power generation units, are connected electrically parallel, each distributed power generation unit is coupled to at least one electric consumer bus. At least two electrical protection zones for isolating electrical faults and multiple protection zones with instantaneous tripping for the electrical parallel connection of consumer networks are provided in a mutual electrical ring connection. In the ring connection, a first switching element with a switching time of less than 10 ms for the electrical decoupling of the consumer buses from one another starting at a predetermined voltage drop, which is established according to load requirements, is arranged between each protection zone with instantaneous tripping and an adjacent protection zone in the first ring direction with instantaneous tripping and an adjacent protection zone in the second ring direction with instantaneous tripping. |
| US09735615B2 |
Systems and methods for managing power backfeed in uninterruptible power supply systems
A system is provided. The system includes a plurality of uninterruptible power supplies (UPSs), a ring bus, and at least one controller communicatively coupled to the plurality of UPSs, the at least one controller configured to calculate an output voltage frequency for each UPS of the plurality of UPSs, wherein the output voltage frequency for a UPS of the plurality of UPSs is calculated based at least on a derivative of an average active output power of the UPS, and control operation of each UPS based on the respective calculated output voltage frequencies. |
| US09735613B2 |
System and methods for controlling a supply of electric energy
A system and methods for controlling the supply and distribution of backup electrical power determine when backup power is needed and allocates available backup power among connected devices in a power outage. Batteries may be used as an energy storage subsystem, and may backup a home heating plant and other devices based on a dual set of user-established priorities that may change during power blackouts and brownouts as the amount of stored energy decreases. |
| US09735611B2 |
Wireless charging device for vehicle
A wireless charging device includes an external cover to be disposed in an interior of a vehicle, a wireless charging module disposed in the external cover, and an elastic support disposed on a surface of the external cover to elastically support a power receiving apparatus removably inserted between the external cover and the elastic support. |
| US09735609B2 |
Charging apparatus
Embodiments of the present invention provide a charging apparatus comprising a case comprising at least one compartment capable of storing a battery-powered lighting device and at least one charging base capable of charging the battery-powered lighting device, wherein each charging base resides in a separate compartment of the case. Each compartment in the case is capable of receiving and storing a battery-powered lighting device in more than one orientation. Each charging base further comprises a charging interface system shaped to engage with and charge a battery-powered lighting device in at least two orientations, and a mounting system interface shaped to engage with and securely mount a battery-powered lighting device to the charging base in at least two orientations. The charging interface system is capable of providing an electrical current to the battery-powered lighting device in a variety of formats, including inductive, conductive and radio frequency charging. |
| US09735607B2 |
Non-contact power supply apparatus, charging apparatus, and battery apparatus
A charging apparatus maintains a balance in power between battery cells by respectively charging the battery cells with power, and rapidly charges the battery cells with power. The charging apparatus supplying unit wirelessly supplying power, and the battery apparatus includes a plurality of charging units corresponding to a plurality of battery cells in a one-to-one scheme. Each of the plurality of charging units respectively includes a charging unit charging a corresponding battery cell with power wirelessly received from the power supplying unit. |
| US09735606B2 |
Mobile terminal including charging coil and wireless communication coil, wireless charging module including charging coil and wireless communication coil
A mobile terminal is provided with a housing, a circuit substrate, a secondary-side non-contact charging module, and a heat dissipating sheet. The circuit substrate comprises a substrate, an electronic component that is mounted to the substrate, and a shield case that covers the electronic component. The heat dissipation sheet is in contact with the shield case. |
| US09735604B2 |
Apparatus and method for communicating data and power with electronic devices
A system, topology, and methods for providing power or data to electronic devices are described generally herein. Other embodiments may be described and claimed. The system may include an internal power source, charging module, modem, and an external power coupling module. |
| US09735602B2 |
Energy converting apparatus and method
The present invention relates to an energy converter for converting energy received from at least one energy source, wherein the at least one energy source includes a first photovoltaic generator, wherein the energy converter is configured to be connected to a second photovoltaic generator; the energy converter further includes a sensing unit configured to sense an open circuit voltage (VPVSS) of the second photovoltaic generator; and the energy converter is configured to convert energy received from the first photovoltaic generator based on the open voltage circuit sensed by the sensing unit. Moreover, the present invention relates to an energy conversion and storage system including the energy converter and least one energy storage element. |
| US09735599B2 |
Battery charger including correction device to correct control signals for supply switching circuit
A battery charger includes an input supply terminal configured to receive a supply signal and a battery terminal configured to be connected to a battery. A supply switching circuit is arranged between the battery terminal and the input supply terminal. A control device generates a control signal to control operation of the supply switching circuit. A fuel gauge device provide a digital estimation of a voltage signal across the battery. A correction device modifies the control signal in response to the digital estimation of the voltage signal across the battery if that digital estimation is outside of a value range between two thresholds. |
| US09735596B2 |
Battery control device, power storage device, power storage method, and program
A battery control device includes: a measurement unit that individually measures an amount of discharging current of each discharging secondary battery of discharging secondary batteries among a plurality of secondary batteries which are independently charged and discharged; a time calculating unit that calculates time required for discharging said each discharging secondary battery until said each discharging secondary battery reaches a constant battery capacity based on a discharging current rate for said each discharging secondary battery which is calculated based on the amount of discharging current, and a state of charge (SOC) of said each discharging secondary battery; a number calculating unit that calculates an expected number of charging secondary batteries among said plurality of secondary batteries, which become fully charged in a required time, based on a charging current rate for each charging secondary battery of charging secondary batteries among said plurality of secondary batteries which is calculated based on an amount of charging current of said each charging secondary battery, a SOC of said each charging secondary battery, and the required time, and calculates a total value of the expected number and an existing number of said charging secondary batteries among said plurality of secondary batteries which are already fully charged; and a control unit that determines whether or not to raise the charging current rate based on the total value. |
| US09735591B2 |
Control apparatus, control system, and storage battery control method
A HEMS 100 that controls a plurality of storage batteries 10 provided in a power consumer acquires information on type and/or deterioration level of each of the plurality of storage batteries. The HEMS 100 controls charge and discharge of each of the plurality of storage batteries 10 on the basis of the information on the type and/or the deterioration level of each of the plurality of storage batteries 10. |
| US09735585B2 |
Foreign object detection method for wireless charging systems
Systems, device and techniques are disclosed for measuring a parasitic load in an environment. A transmitter may transmit an out of order pulse such that a receiver with synchronous rectification circuitry rejects induced power from the transmitter based on the out of order pulse. The parasitic load is determined by measuring the amount of power induced by the transmitter while the intended receiver rejects the power subtracted by known inherent loss. |
| US09735581B2 |
Method and apparatus for obtaining electricity from offshore wind turbines
According to one aspect of the teachings herein, various feeder connection arrangements and architectures are disclosed, for collecting electricity from wind turbines in an offshore collection grid that operates at a fixed low frequency, e.g., at one third of the targeted utility grid frequency. Embodiments herein detail various feeder arrangements, such as the use of parallel feeder connections and cluster-based feeder arrangements where a centralized substation includes a common step-up transformer for outputting electricity at a stepped-up voltage, for low-frequency transmission to onshore equipment. Further aspects relate to advantageous generation arrangements, e.g., tower-based arrangements, for converting wind power into electrical power using, for example, medium-speed or high-speed gearboxes driving generators having a rated electrical frequency for full-power output in a range from about 50 Hz to about 150 Hz, with subsequent conversion to the fixed low frequency for off-shore collection. |
| US09735580B2 |
High voltage direct current transmission system and control method thereof
A high voltage direct current (HVDC) transmission system is provided. The high voltage direct current (HVDC) transmission system includes a rectifier converting alternating current (AC) power into DC power; an inverter converting the DC power into the AC power; DC transmission lines W1 and W2 transmitting the DC power obtained from the rectifier through conversion to the inverter; a first active power measurement unit measuring first active power input to the rectifier; a second active power measurement unit measuring second active power output from the inverter; and a first control unit controlling the operations of the rectifier and the inverter based on the first active power measured and the second active power measured, wherein the first control unit senses oscillation generated in the HVDC transmission system and generates a control signal for damping the sensed oscillation to control one or more of the rectifier and the inverter. |
| US09735578B2 |
Method of load shedding in aircraft and controller
To properly execute load shedding in an aircraft to maintain power supply to more devices. A method of load shedding includes a failure detection step of detecting a failure in a generator, and a load-shedding step. The load-shedding step includes determination step, and execution step, respectively, the determination step in which the load shedding is determined to be needed if the state where a power consumption exceeds a power-generation capacity continues for a monitoring time, and the execution step in which the load shedding is executed step-by-step while advancing a priority given to a target device until the power consumption falls below the power-generation capacity. |
| US09735577B2 |
Maintain power signature (MPS) powered device (PD)
A Maintain Power Signature (MPS) Powered Device (PD) is described. In one or more implementations, the MPS device comprises a current sensor configured to sense current flowing from Power Sourcing Equipment (PSE) to the PD. The current sense based MPS device also comprises a current generator configured to sink electrical current to prevent the PSE from removing power to the PD. Thus, the electrical current comprises a current amplitude characteristic selected based upon MPS requirements of the PSE. In some implementations, the current is sunk to a ground. In other implementations, the current is sunk to a storage device, such as a storage device included with the PD and/or external to the PD. |
| US09735576B2 |
Method and system for establishing a power feed to systems during operation
A method of adding a power feed to electrical systems includes coupling a set of input lines to a power source such that the input lines are connected to at least one phase of AC power from the power source, and coupling a set of backfeed lines to an output receptacle in a power distribution unit. The output receptacle may be connected in parallel with at least one other output receptacle that is supplying primary power to systems in the data center. The set of backfeed lines and the set of input lines may be tested to determine a match between a pair of lines in the set of backfeed lines and a pair of lines in the set of input lines. Determining the match may include matching the phase of the pair of backfeed lines with the phase of the pair of input lines. |
| US09735569B2 |
Driving circuit and driving method applied to display system and associated display system
A driving circuit applied in a display system includes a node, a current control circuit, a protecting circuit and a timing controller, wherein the node is arranged to connect to a lighting element; the current control circuit is coupled to the node and arranged to selectively provide a current to the lighting element according to a Pulse Width Modulation (PWM) signal; the protecting circuit is coupled to the node and arranged to be selectively enabled to limit the voltage of the node according to a control signal to make the voltage of the node maintain a predetermined voltage, wherein the lighting element does not have any current passed through when the voltage of the node maintains the predetermined voltage; and the timing controller is arranged to generate the PWM signal and the control signal. |
| US09735567B2 |
Semiconductor device and battery voltage monitoring device
A semiconductor device is provided for measuring a voltage of each of plural unit cells series-coupled in multi-stage and configuring an assembled battery. The semiconductor device includes two terminals coupled to two nodes which are electrodes of a unit cell and coupled with other unit cells, and a voltage measurement circuit which measures the inter-terminal voltage between the two terminals. The device also includes a down-convert level shifter circuit which converts the inter-terminal voltage into a low-potential-side inter-terminal voltage based on a ground potential, and a comparator circuit which compares the converted low-potential-side inter-terminal voltage with a predetermined reference voltage. The semiconductor device further includes an up-convert level shifter circuit which converts a low-potential-side shunt control signal based on the ground potential into a high-potential-side shunt control signal, and a switch which short-circuits the two terminals via a resistor based on the converted high-potential-side shunt control signal. |
| US09735562B2 |
Termination unit for a superconducting cable
A termination unit (1) for a superconducting cable (3), has an internal electrically insulating envelope (2) containing the phase conductors (3A, 3B, 3C) of the cable (3) in a cryogenic fluid. The internal envelope (2) has, for each phase conductor (3A, 3B, 3C), one first electrical connector (6A, 6B, 6C) connected to the corresponding phase conductor (3A, 3B, 3C) and protruding from the internal envelope (2). The termination unit (1) further has an electrically conductive, grounded casing (7) surrounding the internal envelope (2) and the first electrical connectors (6A, 6B, 6C), the grounded casing (7) comprising one bushing (8A, 8B, 8C) for each one of the first electrical connectors (6A, 6B, 6C), each bushing (8A, 8B, 8C) being connected to one of the first electrical connectors (6A, 6B, 6C) by a second electrical connector (9A, 9B, 9C) and being adapted to transmit voltage and current from its associated phase conductor (3A, 3B, 3C). |
| US09735558B1 |
Electrical cut-in floor box assembly
A cut-in floor box assembly including a bracket assembly, an electrical box, a support plate, and a cover plate for rapidly installing a duplex receptacle flush with a floor. Floor preparation requires simple drilling of the floor and subfloor with hole saws. Two concentric cuts are made in the floor, a hole of a first diameter through the floor and a second, smaller diameter hole through the subfloor. A peripheral wall on the bracket assembly fits within the hole in the subfloor. A floor mounting arrangement on the bracket assembly enables clamping the bracket to the subfloor. A component attachment arrangement on the electrical box is adapted to accept recessed attachment of a duplex receptacle enabling flush mounting of the duplex receptacle with respect to the floor surface. Two removable outlet covers on the cover plate provide convenient access to the receptacles for plug-in of electrical cords. |
| US09735556B2 |
Wire harness exterior member and wire harness
An exterior member has a straight tube body to be arranged at a vehicle underfloor portion of a vehicle and at least one rigidity adding portion to add rigidity to the straight tube body. |
| US09735555B2 |
Mechanical door interlock device for protecting power electrical switching apparatus and users
A mechanical switch-door interlock assembly includes a mounting assembly and an actuator assembly. The actuator assembly includes a body, a door sensor, an operating mechanism handle actuator, and a number of sliding coupling components. The actuator assembly body is slidably coupled to the mounting assembly. The actuator assembly body moves between a first position, wherein the operating mechanism handle actuator does not operatively engage the operating mechanism handle, and a second position, wherein the operating mechanism handle actuator operatively engages the operating mechanism handle and moves the operating mechanism handle to the second position. When a door is in a first position, the door operatively engages the door sensor and moves the actuator assembly body to the first position. When the door is in the second position, the door does not operatively engage the door sensor allowing the actuator assembly body to move into the second position. |
| US09735554B2 |
Method for manufacturing spark plug
A method for manufacturing a spark plug includes: a joining step of joining a rod-shaped ground electrode member to a front end portion of a metal shell; a tilt step of tilting the ground electrode member in a radial direction of the metal shell; a correction step of decreasing a tilt angle of the ground electrode member to an allowable tilt angle or less; and a welding step of welding a ground electrode tip to the ground electrode member. |
| US09735552B2 |
Spark plug
A spark plug includes: an insulator having an axial hole; a conductive member disposed around the insulator; a center electrode disposed inside the axial hole, having a bar shape extending in the axial direction, and located on a rear end side with respect to a front end of the conductive member; a ground electrode forming a spark gap between the ground electrode and the center electrode; and a connection part including a plurality of spokes extending in a radial direction whose inner ends are connected to the ground electrode, and connecting the conductive member to the ground electrode. The connection part includes a joint part that is jointed to an inner surface of the conductive member, and the ground electrode has at least one of a notch and a groove at a position that is different from a position connected to the spokes in a circumferential direction. |
| US09735551B2 |
Surge absorber and manufacturing method thereof
A surge absorber and a manufacturing method thereof are disclosed. Since a ceramic material with excellent mechanical strength is used to form a ceramic tube and the ceramic tube is joined to sealing electrodes by use of brazing rings according to the method of manufacturing the surge absorber, durability of the surge absorber is considerably improved. Since the ceramic tube is completely sealed, the surge absorber may be stably used at a high voltage. |
| US09735549B2 |
Methods for forming photonic integrated circuits based on quantum cascade structures
Photonic integrated circuits (PICs) are based on quantum cascade (QC) structures. In embodiment methods and corresponding devices, a QC layer in a wave confinement region of an integrated multi-layer semiconductor structure capable of producing optical gain is depleted of free charge carriers to create a low-loss optical wave confinement region in a portion of the structure. Ion implantation may be used to create energetically deep trap levels to trap free charge carriers. Other embodiments include modifying a region of a passive, depleted QC structure to produce an active region capable of optical gain. Gain or loss may also be modified by partially depleting or enhancing free charge carrier density. QC lasers and amplifiers may be integrated monolithically with each other or with passive waveguides and other passive devices in a self-aligned manner. Embodiments overcome challenges of high cost, complex fabrication, and coupling loss involved with material re-growth methods. |
| US09735544B2 |
Surface emitting laser element
A surface emitting laser element includes: a semiconductor structure layer interposed between a first multi-layer reflector and a second multi-layer reflector; an insulating current confinement layer that is formed on a semiconductor layer of a second conductivity type and includes a first through-hole with a transparent electrode; the second multi-layer reflector formed on the current confinement layer and the transparent electrode; a heat conducting layer that is formed on the second multi-layer reflector and includes a second through-hole disposed coaxially with the first through-hole in the current confinement layer and having a minimum opening diameter smaller than an opening diameter of the first through-hole; and an emission color converting portion that is formed above the second through-hole in the heat conducting layer and includes phosphor. |
| US09735543B2 |
Optical interconnects
The present disclosure relates to methods and apparatuses for improving tolerances of in-plane optical alignment of optical interconnects. An example method includes depositing a first reflector with a first spectral reflectivity on an end of an optical fiber, coupling a laser to another end of the optical fiber, changing a spectral reflectivity of a region of the first reflector adjacent to the end of a core of the optical fiber from the first spectral reflectivity by exposure to the laser, resulting in a first reflector with multiple regions of spectral reflectivity, and coupling the first reflector to an integrated unit comprising an optical cavity deposited on a second reflector. |
| US09735542B2 |
Ring-modulated laser
An optical source is described. This optical source includes a semiconductor optical amplifier, with a semiconductor other than silicon, which provides a gain medium. In addition, a photonic chip, optically coupled to the semiconductor optical amplifier, includes: an optical waveguide that conveys the optical signal; and a pair of ring-resonator modulators that modulate the optical signal. Furthermore, the pair of ring-resonator modulators is included within an optical cavity in the optical source. For example, the optical cavity may be defined by a reflective coating on one edge of the semiconductor optical amplifier and a reflector on one end of the optical waveguide. Alternatively, the optical cavity may be defined by reflectors on ends of the optical waveguide. |
| US09735541B1 |
Calibration of external-cavity tunable lasers
A method of calibrating a tunable laser includes shifting a filter output peak defined by a tunable optical feedback filter of the tunable laser in an optical spectral domain to align with a target etalon output peak of a plurality of spaced etalon output peaks defined by an etalon of the tunable laser. The method also includes shifting a cavity frequency grid defined by cavity modes of the tunable laser to align a target cavity mode of the cavity frequency grid with the filter output peak and shifting the spaced output peaks defined by the etalon to align a target etalon output peak with a target wavelength of an output wavelength grid. The method includes modifying a bias current and a modulation current of a gain section of the tunable laser to achieve a defined output modulation amplitude and a defined extinction ratio. |
| US09735533B2 |
Ultrashot pulse fiber laser
The invention is a passively mode-locked ultrashort pulse fiber laser for generating ultrashort laser pulses, including a resonator in a figure-of-eight configuration, wherein the resonator has a main ring and a secondary ring optically coupled thereto designed as a non-linear Sagnac interferometer, and wherein the main ring and the secondary ring are constructed of polarization-maintaining optical fibers, and the main ring and/or secondary ring have a fiber section designed as a laser-active medium, wherein the laser-active medium is optically pumped through an externally-coupled pump light source which is also comprised, wherein the ultrashort pulse fiber laser is developed in that a separate optical unit is provided in the resonator as a dispersion compensation unit for compensating a group delay dispersion of the ultrashort laser pulses. |
| US09735531B2 |
Float adapter for electrical connector and method for making the same
A method for making a float adapter for an electrical connector that includes a conductive shell that has opposite first and second ends, and at least one insulator received in the conductive shell. The at least one insulator has an engagement end and an interface end opposite the engagement end. The interface end has a lead-in tip portion that extends outside of one of the first and second ends of the shell. The at least one insulator has an inner bore for receiving an inner contact. A retaining sleeve is disposed around the conductive shell, the retaining sleeve having an engagement member for engaging the at least one insulator. |
| US09735530B2 |
Apparatus and method for axially spacing conductive rings of a slip ring assembly
An apparatus for determining axial spacing between conductive rings of a slip ring assembly includes a signal generator that generates an incident signal, a plurality of conductive rings axially spaced along a shaft where the plurality of conductive rings includes a first conductive ring and a second conductive ring that are axially spaced at a first axial distance. The shaft and the plurality of conductive rings are submerged in a bath of a liquid or encased in an epoxy. A first twisted wire pair is electronically coupled at to the signal generator and to inputs of the first and second conductive rings. A second twisted wire pair is electronically coupled at one end to outputs of the first and second conductive rings. A method for determining axial spacing between conductive rings of a slip ring assembly is also disclosed. |
| US09735526B1 |
Hybrid socket connector integrated with power supply and signal transmission functions
A hybrid socket connector is disclosed in this invention. The hybrid socket connector includes a receptacle housing having a signal receptacle part and a power receptacle part, a row of signal terminal assemblies mounted on the signal receptacle part, a row of power terminals mounted on the power receptacle part, and at least one tie bar mounted on the power receptacle part to retain these power terminals. Each signal port is generally Z-shaped. Each signal terminal has a first elastic arm and a second elastic arm located below the first elastic arm. The first and second elastic arms are staggered along a left-right direction. The hybrid socket connector of the invention can integrate the power supply with the signal transmission to ensure the safety of its structure and improve the electrical performance thereof. |
| US09735524B1 |
Three-level converter arrangement and connecting arrangement for same
A connecting arrangement for a three-level converter arrangement includes a first to third connection rail which are each in the form of a shaped metal body. The respective connection rail has a line section and a connection section which has a connection means. The respective connecting rail has a line section and a connecting section which, for its part, has an associated respective connecting means. The respective connection means forms, with the connecting means, a force-fitting, electrically conductive connection. The connection rails are connected to the connecting rails with the correct polarity. The respective line sections of the connection rails and the connecting rails are situated one above the other in a stack, wherein the first connecting section, in projection in the normal direction of the first connection section, covers the first connection section; wherein the second connecting section, in projection in the normal direction of the second connection section, covers the first connection section and the second connection section, and wherein the third connecting section, in projection in the normal direction of the third connection section, covers the second connection section and the third connection section. |
| US09735523B2 |
Optical assemblies with managed connectivity
An example universal contact assembly includes plug contact members and a sensing contact member that are overmolded together to form a single unit. Example adapter block assembly include a first optical adapter; a first contact assembly disposed in an aperture defined in the first optical adapter; a first circuit board; and a retainer arrangement that holds the first circuit board to the first optical adapter with sufficient force to retain the first contact assembly within the aperture. Example retainer arrangements include a cover having flanges with tabs that deflect into cavities defined by the first optical adapter; clamp members that clamp a cover to the first optical adapter to hold the first circuit board therebetween; and a retention strip having barbs that attach to the first optical adapter and barbs that attach to the first printed circuit board. |
| US09735521B2 |
Float adapter for electrical connector
A float adapter for an electrical connector that includes a conductive shell that has opposite first and second ends, and at least one insulator received in the conductive shell. The at least one insulator has an engagement end and an interface end opposite the engagement end. The interface end has a lead-in tip portion that extends outside of one of the first and second ends of the shell. The at least one insulator has an inner bore for receiving an inner contact. A retaining sleeve is disposed around the conductive shell, the retaining sleeve having an engagement member for engaging the at least one insulator. |
| US09735519B2 |
Coaxial connector assembly and communication system having a plurality of coaxial contacts
Coaxial connector assembly includes a connector module having a connector body and a plurality of coaxial contacts. The coaxial connector assembly also includes a mounting frame having a mating side and a mounting side that face in opposite directions. The mounting side faces in a mounting direction along the mating axis and is configured to interface with a support wall. The mounting frame defines a passage that extends through the mating and mounting sides. The passage includes a connector-receiving recess that opens to the mounting side and is defined by blocking surfaces. The blocking surfaces include a first blocking surface that faces in a lateral direction that is perpendicular to the mating axis and a second blocking surface that faces in the mounting direction. The first and second blocking surfaces are sized and shaped relative to the connector module to permit the connector module to float. |
| US09735516B2 |
Car charging connector
The invention relates to a plug-in connector (10) that has an insulation insert (1) and at least one contact element (2), wherein the at least one contact element (2) is connected to a conductor of a cable, wherein the insulation insert (1) has at least one receptacle, in which the at least one contact element (2) and the at least one section of the conductor connected thereto are provided, wherein a first seal (7) that seals the insulation insert (1) is provided in the at least one receptacle, wherein the at least one contact element (2) is sealed in the insulation insert (1) using the first seal (7) and wherein the conductor connected to the at least one contact element (2) is sealed in the insulation insert (1) using a second seal (8). According to the invention, the at least one contact element is held in a receptacle that is substantially formed from an opening (3) and two legs (4) axially protruding therefrom. |
| US09735514B2 |
Connector module with internal wireless communication device
A connector module includes a signal interface, a wireless communication module and a connector housing. The signal interface is configured to exchange signals between a cable and a communication unit when the connector module is connected to the communication unit. The wireless communication module is configured to exchange information in a first mode between the communication unit and a wireless terminal when the connector module is connected to the communication unit, and, when the connector module is disconnected from the communication unit, to exchange information in a second between a memory internal to the connector module and the wireless terminal mode. The connector housing contains the signal interface and the wireless communication module. |
| US09735513B2 |
Shielded shell and shielded connector
A shielded shell and a shielded connector that prevents a fixing member for fixing a shielding member from interfering with another member such as a grommet. A shielding member such as a braided wire is placed on the outer circumferential surface of a shielded shell and fixed by the fixing member. The outer circumferential surface of the shielded shell is provided with a step portion that increases in diameter from the rear portion, at which a fixing region of the shielding member is positioned, toward a front portion, and is provided with position restriction portions that protrude outward from portions of the outer circumferential surface in the circumferential direction and restrict the position of the front end of the fixing member that is to be attached to the fixing region. |
| US09735507B1 |
Locking structure of telecommunication connector
A locking structure is provided for a telecommunication connector and includes a pull resistant section, which has a front end forming an engagement section connected to a connection surface that is connected to a spring arm, which is provided with a projection; a locking section, which is a U-shaped configuration; and a connection section, which connects the pull resistant section and the locking section and is formed with a cavity, which has an end section in which an opening is formed to correspond to the spring arm. The locking structure is combinable with a connector body to form a telecommunication connector that is insertable into a socket, such that the pull resistant section is received into an insertion hole of the socket and the spring arm is brought into engagement with blocks formed inside the socket so as to prevent the telecommunication connector from being removed out of the socket. |
| US09735492B2 |
Adjustable rotary socket assembly
An electrical outlet includes an outlet housing having an outer support arm and an inner support arm, the outer and inner support arms defining a socket receptacle; the inner and outer support arms having a rotational support member and a fixed electrical contact assembly; a rotary socket having at least one plug receiver for receiving an electrical plug and a rotary contact plate attached thereto; wherein the rotary contact plate is rotationally supported by the rotational support member, and the rotary contact plate maintains electrical contact with the fixed electrical contact assembly through a predetermined range of rotation of the rotary socket. Rotation control functions of the rotary contact plate to limit the range of rotation and provide adjustable angles of rotation are also described. |
| US09735491B2 |
Easily removable contacts for micro connectors
A plug including a base having a top surface, a plurality of openings in the top surface, a retraction unit having a first portion in the base and a second portion extending from the base to a position in front of a corresponding opening, and a conductive unit having a notch where the conductive unit extends through one opening such that the retraction unit engages the notch to prevent the conductive unit from passing back through the opening. |
| US09735490B2 |
Electrical connector terminal
An electrical connector terminal comprises a resilient contact end) for electrically contacting with an insertion end of a mating electrical connector terminal. At least one side of the resilient contact end contacts with the insertion end at a plurality of electrical contact portions separated from each other in a longitudinal direction. |
| US09735484B2 |
Electrical connector system including electrical cable connector assembly
Electrical connectors provide signal connections between electronic devices using electrically-conductive contacts, or electrical contacts. In some applications, a connector including a solid substrate body may facilitate the connection of cables with a complementary connector. |
| US09735480B2 |
Coaxial cable and connector assembly
A coaxial cable-connector assembly includes a coaxial cable and a coaxial connector. The coaxial cable includes: an inner conductor having a termination end, the termination end including a bore; a dielectric layer that overlies the inner conductor; an outer conductor that overlies the dielectric layer having a termination end; and a jacket that overlies the outer conductor. The coaxial connector includes: an inner conductor body including a boss that encircles the termination end of the inner conductor and a longitudinal bore; an outer conductor body electrically connected with the termination end of the outer conductor; and an expansion member inserted into the bore of the termination end of the inner conductor, the expansion member being sized and configured to radially expand the termination end of the inner conductor into electrical contact with the boss of the inner conductor body. |
| US09735473B2 |
Compact radiation structure for diversity antennas
An antenna for diversity operation comprising a plurality of connected antenna units (100). The antenna units each having a first radiation element (102) with length of a quarter of a wavelength at a first operating frequency a second radiation element (104) with length of a quarter of a wavelength at a second operating frequency distinct from the first operating frequency, the second radiation element sharing with the first radiation element a segment of the first radiation element. A feed point for coupling a feed to one of said first or second radiation elements such that the elements resonate at the first and second operating frequencies respectively and at substantially orthogonal polarizations. Diversity antennas configured with two or more of the antenna units. |
| US09735470B2 |
Multiband data signal receiving and/or transmitting apparatus
Apparatus is provided to allow the reception and/or transmission of data signals at two different frequency bands. The apparatus includes a waveguide (4) which has a first section (6) of larger cross sectional area for receiving and/or transmitting the lower frequency band signals, and a reducing section (8) which leads to a section with a reduced cross sectional area in comparison to the first section (6) and this allows the receipt of the higher frequency band signals. In one embodiment sections of the waveguide can be rotated to allow the apparatus to be adjusted to any particular orientation to suit the particular circular polarity transmission type at the location at which the apparatus is provided at that time. |
| US09735465B2 |
Motor feed antenna for vehicle
According to some embodiments, an unmanned vehicle includes a power supply configured to supply an electrical power signal to a motor for propelling the unmanned vehicle, a wireless communication device configured to transmit or receive a radio frequency (RF) signal, and a motor feed antenna coupled to the power supply and the wireless communication device, the motor feed antenna configured to conduct the electrical power signal from the power supply to the motor, and to transmit or receive RF signals as an antenna for the wireless communication device. |
| US09735458B2 |
Non-reciprocal circuit device and communication apparatus using the same
Disclosed herein is a non-reciprocal circuit device includes: a substrates including a magnetic plate having a circular surface and a dielectric ring having an annular surface, the circular surface and the annular surface being substantially coplanar; a center conductor disposed on the substrates; and a permanent magnet that applies a magnetic field to the center conductor. The center conductor includes: a main conductor portion positioned on a straight line extending from a center of the circular surface to an outer periphery of the annular surface; and a branched conductor portion extending in a radial direction of the substrate from the center of the circular surface. The branched conductor portion includes: a wide portion disposed on the circular surface; and a narrow portion having a width smaller than that of the wide portion and disposed across a boundary between the circular surface and the annular surface. |
| US09735456B2 |
Electromagnetic resonant coupler and high-frequency transmission device
A high-frequency transmission device includes first and second resonators as ring-shaped wires each having an opening part at a part thereof, first and second input/output terminals each electrically connected to both resonators, a first ground shield formed on a plane different from planes on which both resonators are arranged, a second ground shield formed on a plane different from the planes on which both resonators and the first ground shield are arranged, and first and second ground wires each formed to surround peripheries of both resonators. The ground shields and the ground wires are respectively connected to each other. A dielectric wire is present between both ground wires, and the ground wires are not electrically connected to each other. |
| US09735454B2 |
Apparatus for controlling lithium-ion battery and method of recovering lithium-ion battery
An apparatus for controlling a lithium-ion battery is provided in which a power-generating element including a positive electrode element and a negative electrode element is housed in a case, wherein the case contains a compound releasing an electron toward the positive electrode element to provide a proton at an electric potential lower than a first electric potential being a positive electrode potential corresponding to a negative electrode potential at which precipitation of lithium occurs, the electric potential lower than the first electric potential being a second electric potential and being higher than a positive electrode potential corresponding to an upper limit value of working voltages of the lithium-ion battery, and the apparatus includes a controller configured to perform recovery processing of changing the lithium precipitated on the negative electrode element into a lithium ion using the proton by using a power source section supplying a power to the lithium-ion battery to bring the positive electrode potential to the second electric potential. |
| US09735452B2 |
Apparatus and method for monitoring component breakdown of battery system
An apparatus and a method for monitoring a breakdown of a battery system component are provided to more accurately determine whether a cooling fan for cooling a battery of an environment-friendly vehicle or a part related to the cooling fan fails. The method for monitoring a breakdown of a battery system component compulsorily driving, by a controller, the cooling fan and measuring the current temperature of the battery when the battery management system fails to receive a pulse width modulation PWM signal that represents an operation state of the cooling fan and a feedback signal (PFM) of the cooling fan from a cooling fan controller. |
| US09735450B2 |
Electrochemical energy storage devices
Provided herein are energy storage devices. In some cases, the energy storage devices are capable of being transported on a vehicle and storing a large amount of energy. An energy storage device is provided comprising at least one liquid metal electrode, an energy storage capacity of at least about 1 MWh and a response time less than or equal to about 100 milliseconds (ms). |
| US09735445B2 |
Alkali metal or alkali-ion batteries having high volumetric and gravimetric energy densities
Provided is an alkali metal-ion battery, comprising: (a) an anode having an anode active material dispersed in a first liquid electrolyte disposed in pores of a 3D porous anode current collector having at least 80% by volume of pores; (b) a cathode having a cathode active material dispersed in a second liquid electrolyte disposed in pores of a 3D porous cathode current collector wherein the cathode thickness-to-current collector thickness ratio is from 0.8/1 to 1/0.8; (c) a separator disposed between the anode and the cathode; wherein the anode or cathode active material loading is greater than 10 mg/cm2, the anode and cathode active materials combined exceeds 40% by weight of the battery, and/or the 3D porous anode and/or cathode current collector has a thickness no less than 200 μm (preferably greater than 500 μm and more preferably greater than 700 μm) and is in physical contact with the separator. |
| US09735444B2 |
Hard carbon composite for alkali metal-ion batteries
A method is provided for fabricating a graphene-doped, carbohydrate-derived hard carbon (G-HC) composite material for alkali metal-ion batteries. The method provides graphene oxide (GO) dispersed in an aqueous solution. A carbohydrate is dissolved into the aqueous solution and subsequently the water is removed to create a precipitate. In one aspect, the carbohydrate is sucrose. The precipitate is dehydrated and exposed to a thermal treatment of less than 1200 degrees C. to carbonize the carbohydrate. The result is the formation of a graphene-doped, carbohydrate-derived hard carbon (G-HC) composite. Typically, the G-HC composite is made up of graphene in the range of 0.1 and 20% by weight (wt %), and HC in the range of 80 to 99.9 wt %. The G-HC composite has a specific surface area of less than 10 square meters per gram (m2/g). A G-HC composite suitable for use in alkali metal-ion batteries electrodes is also provided. |
| US09735442B2 |
Fuel cell comprising a proton-exchange membrane, having an increased service life
A fuel cell includes a proton-exchange membrane, and a cathode and anode fixed on its opposite sides. The anode delimits a flow conduit between a molecular-oxygen inlet area and a water outlet area. The cathode includes a support for catalyst material. The support has first and second materials to which catalyst is fixed, the first material being a graphitized material. The second material has a resistance to corrosion by oxygen that is greater than that of the first material. A quantity of the second material at the inlet area is greater than a quantity of the second material at the water outlet. The cathode comprises a first layer including the first material and a second layer including the second material. A thickness of the second layer decreases between the molecular-oxygen inlet area and the water outlet area. |
| US09735439B2 |
Fuel cell vehicle
A fuel cell vehicle includes a fuel cell, a storage device, a receptacle, a housing, and a vehicle side communication device. The housing has a bottom wall recessed from a surface of a body of the fuel cell vehicle by a predetermined depth. The receptacle protrudes from a bottom face of the bottom wall to an inner space of the housing. The vehicle side communication device is provided to the housing on an outer circumferential side of the receptacle. The vehicle side communication device is configured to wirelessly communicate with a nozzle side communication device provided to a nozzle. The vehicle side communication device is disposed on a deeper side than the bottom face of the bottom wall and/or is disposed via a partition wall configured to shield the vehicle side communication device from fuel gas in the inner space. |
| US09735434B2 |
Ceramic enclosed thermal battery
At least a portion of the enclosure of a thermal battery is formed of a ceramic material that is non-porous and electrically-non-conductive. The thermal battery includes at least one cell, a squib that when activated causes the at least one cell to become active, and an enclosure that surrounds the at least one cell and the squib. Squib terminals and battery terminals extend through the enclosure and are electrically connected to the squib and to the at least one cell, respectively. At least the portion of the enclosure through which the squib and battery terminals extend is formed of the ceramic material. The enclosure includes a container and a header. At least the header is made from the ceramic material, and preferably both the container and the header are made from the ceramic material. |
| US09735432B2 |
Method for fabricating core-shell particles supported on carrier and core-shell particles supported on carrier fabricated by the same
The present invention provides a method for fabricating core-shell particles supported on a carrier, the method including: forming a solution by adding a first metal supported on a carrier to a solvent; adjusting a pH of the solution from 7 to 14 and adding a metal salt of a second metal thereto; and forming core-shell particles by adding a reducing agent to the solution and forming a shell including the second metal on a surface of a core particle including the first metal, and core-shell particles fabricated by the method. |
| US09735428B2 |
Negative electrode material for lithium ion secondary batteries, negative electrode for lithium ion secondary batteries, lithium ion secondary battery, method for producing negative electrode material for lithium ion secondary batteries, and method for producing negative electrode for lithium ion secondary batteries
Provided is a negative electrode material for a lithium ion secondary battery, which has excellent high-temperature storage characteristics and cycle characteristics. The negative electrode material for a lithium ion secondary battery has a high molecular weight polymer adsorbed on a carbon material, the O/C value of surface functional group quantity is 4.5% or more and 25% or less in the negative electrode material for a lithium ion secondary battery, and the S/C value of surface functional group quantity is 0.05% or more and 2.5% or less in the negative electrode material for a lithium ion secondary battery. Also provided are a negative electrode for a lithium ion secondary battery, lithium ion secondary battery, and methods for producing the negative electrode material, the negative electrode, and the battery. |
| US09735426B2 |
Cathode active material, cathode and lithium battery including the same, and method of preparing the cathode active material
A cathode active material including a lithium transition metal oxide of Chemical Formula 1: Li2-xMexMyMn1-yO3-δ Chemical Formula 1 wherein 0≦x≦0.2, 0≦y≦0.2, 0 |
| US09735425B2 |
Silicon-silicon oxide-lithium composite material having nano silicon particles embedded in a silicon:silicon lithium silicate composite matrix, and a process for manufacture thereof
A process for producing a silicon:silicon oxide: lithium composite (SSLC) material useful as a negative electrode active material for non-aqueous battery cells includes: producing a partially lithiated SSLC material by way of mechanical mixing; subsequently producing a further prelithiated SSLC material by way of spontaneous lithiation procedure; and subsequently producing a delithiated SSLC material by way of reacting lithium silicide within the dispersed prelithiated SSLC material with organic solvent(s) to extract lithium from the prelithiated SSLC material, until reactivity of lithium silicide within the prelithiated SSLC material with the organic solvent(s) ceases. The delithiated SSLC material is a porous plastically deformable matrix having nano silicon embedded therein. The delithiated SSLC material can have a lithium silicide content of less than 0.5% by weight. A battery cell having as its negative electrode active material an SSLC material as set forth herein can exhibit an irreversible capacity loss of less than 10%. |
| US09735424B2 |
Active material for rechargeable battery, rechargeable battery, and electronic apparatus
A rechargeable battery including: a positive electrode; a negative electrode including active material; and an electrolytic solution, in which the active material is capable of occluding and releasing lithium ions and includes Si and O as constituent elements, and an atomic ratio (Si/(Si+O)) of Si with respect to Si and O is 30 atomic % to 75 atomic % in a surface of the active material. |
| US09735419B2 |
Secondary battery and method for forming electrode of secondary battery
An object is to provide a secondary battery having excellent charge-discharge cycle characteristics. A secondary battery including an electrode containing silicon or a silicon compound is provided, in which the electrode is provided with a layer containing silicon or a silicon compound over a layer of a metal material; a mixed layer of the metal material and the silicon is provided between the metal material layer and the layer containing silicon or a silicon compound; the metal material has higher oxygen affinity than that of ions which give and receive electric charges in the secondary battery; and an oxide of the metal material does not have an insulating property. The ions which give and receive electric charges are alkali metal ions or alkaline earth metal ions. |
| US09735413B2 |
Battery pack tab welding method
A positive electrode tab and negative electrode tab of a battery pack are configured by stacking a plurality of single cells each of which has positive electrode tab and negative electrode tab drawn outward and formed of metals different from each other in kind. In a welding method, clad material is disposed between positive electrode tab of second single cell and negative electrode tab of first single cell. Next, with a laser welder, focal point is aimed at interface between negative electrode tab and clad material, and laser is applied thereto from the side of negative electrode tab. Then, focal point is aimed at interface between positive electrode tab and clad material, and laser is applied thereto from the side of positive electrode tab. |
| US09735409B2 |
Lead acid battery
On each negative plate (1), a non-woven fabric (2) composed of fibers of at least one material selected from a group of materials comprising glass, pulp and polyolefins comes into contact with the entire surface of the plate without being integrated with the plate. Each negative plate (1), which is in contact with the non-woven fabric (2), is contained in an envelope separator (3) comprising a microporous synthetic resin sheet, and is laminated with a positive plate (4). The non-woven fabric is manufactured through papermaking process in which glass fibers, pulp and silica powder are preferably used and dispersed in water as the main components. |
| US09735406B2 |
Battery pack
In a battery pack, a plurality of cells are arranged, the cells each have an outlet through which gas generated in the cell is released in one direction, each two of the cells are arranged as one unit, and the each two of the cells are arranged such that directions of gas released through the outlets of the two cells are opposite to each other. |
| US09735404B2 |
Battery case with gas exhausting reinforcement
A battery case for mounting under a floor of a vehicle comprises a case body containing a battery module and a cover for closing over an opening of the case body. A reinforcement member for reinforcing the case body is attached to an outer surface of the case body. The case body is provided with a gas circulation hole for letting a gas flow from within the case body into the reinforcement member. The reinforcement member is provided with a gas exhaust port for letting out the gas having flown into the reinforcement member. |
| US09735401B2 |
Sealed sodium-based thermal batteries and methods of sealing same
The present application provides configurations, components, assemblies and methods for sealing cells of sodium-based thermal batteries, such as NaMx cells. In some embodiments the cells may include an integrated bridge member hermetically sealed to an electrically conductive case and a ceramic collar of the cell to hermetically seal an anodic chamber of the cell. In some embodiments the cells may include the ceramic collar hermetically sealed to an electrolyte separator tube of the cell to hermetically seal the anodic chamber of the cell. In some embodiments the anodic chamber may be defined, at least in part, by the case, integrated bridge member, ceramic collar and electrolyte separator tube. In some embodiments the cells may include a current collector hermetically sealed to the ceramic collar, and a cap member hermetically sealed to the current collector tube to hermetically seal a cathodic chamber of the cell. |
| US09735397B2 |
Radiation-emitting organic-electronic device and method for the production thereof
A process of producing a radiation-emitting organic-electronic device having a first and a second electrode layer and an emitter layer includes: A) providing a phosphorescent emitter with an anisotropic molecule structure and a matrix material, B) applying the first electrode layer to a substrate, C) applying the emitter layer under thermodynamic control, with vaporization of the phosphorescent emitter and of the matrix material under reduced pressure and deposition thereof on the first electrode layer such that molecules of the phosphorescent emitter are in anisotropic alignment, and D) applying the second electrode layer on the emitter layer. |
| US09735396B2 |
White organic light emitting diode
A white organic light emitting diode including a first electrode; a second electrode facing the first electrode; a charge generation region between the first and second electrodes; a first emitting layer to emit light of a first color, the first emitting layer being between the first electrode and the charge generation region; and a second emitting layer to emit light of a second color, the second emitting layer being between the second electrode and the charge generation region, wherein the charge generation region includes a hole generation region to generate holes, an electron generation region to generate electrons, and a depletion prevention region to prevent a depletion region from being generated by the holes and the electrons, the depletion prevention region being between the hole generation region and the electron generation region. |
| US09735395B2 |
Organic light emitting diode device, manufacturing method thereof and display apparatus
An organic light emitting diode (OLED) device includes a cathode, an anode and an organic function layer interposed between the cathode and the anode. A material of the cathode is at least one of a metal and a metal alloy. The light emitted from the organic function layer exits at least through the cathode. The organic light emitting diode device further includes an anti-reflective layer on a side of the cathode that faces away from the organic function layer. The anti-reflective layer includes a first surface and a second surface opposite to each other. The first surface contacts the cathode. External light reflected by the first surface and external light reflected by the second surface interfere destructively. |
| US09735388B2 |
Narrow bezel large area organic light emitting diode display
The present disclosure relates to a narrow bezel large area organic light emitting diode display. An organic light emitting diode display includes a substrate having a display area and a non-display area; a gate driver disposed in the non-display area; a ground line overlapping on the gate driver with a passivation layer; an anode electrode disposed in the display area; an organic light emission layer disposed in the display area and stacked on the anode electrode; and a cathode electrode stacked on the organic light emission layer and contacting the ground line. |
| US09735386B2 |
Quantum-dot based hybrid LED lighting devices
A white light source is a hybrid organic light emitting diode (OLED) device having an electroluminescent layer including a blue emitting organic phosphor or a combination of a green emitting organic phosphor with a blue emitting phosphor and a conversion layer including photoluminescent quantum dots (QDs) at or near the light exiting face of the hybrid OLED. The QDs down-convert a portion of the blue or blue and green light to higher wavelengths of visible light, where the combination of wavelengths exiting the device provides white light. The QDs can be within an array of microlenses on the light exiting surface of the hybrid OLED to enhance the efficiency of light emission from the electrically excited phosphors and the down-conversion QDs. |
| US09735382B2 |
Circuit layout for thin film transistors in series or parallel
Multiple thin film transistors are aligned in serial and parallel orientation. A second source region is disposed between a first source region and a first drain region. A second drain region is disposed between the first source region and the first drain region. The second drain region and the second source region substantially coincide. A first gate is disposed between the first source region and the coinciding second source and second drain regions. A second gate region is disposed between the first drain region and the coinciding second source and second drain regions. An semiconductor is disposed between the first source region, the first drain region, and the coinciding second source and second drain regions. A dielectric material is disposed between the semiconductor substrate and the first and second gates. |
| US09735380B2 |
Transistor manufacturing method and transistor
A transistor manufacturing method includes: forming a first insulator layer of which formation material is a fluorine-containing resin, on a substrate having a source electrode, a drain electrode, and a semiconductor layer so as to cover the semiconductor layer; forming a second insulator layer so as to cover the first insulator layer; forming a base film on at least part of a surface of the second insulator layer; and after depositing a metal which is an electroless plating catalyst on a surface of the base film, forming a gate electrode on the surface of the base film by electroless plating, wherein the forming of the base film is performed by applying a liquid substance which is a formation material of the base film to the surface of the second insulator layer, and the second insulator layer has a higher lyophilic property with respect to the liquid substance than the first insulator layer. |
| US09735375B2 |
Green luminescent materials
There is provided a compound having Formula I In the formula: R1 can be aryl, alkyl, silyl, or deuterated analogs thereof; R2 can be aryl, alkyl, silyl, or deuterated analogs thereof; R3 can be H, D, alkyl, silyl, deuterated alkyl, or deuterated silyl; and R4 is the same or different at each occurrence and is H, D, aryl, alkyl, silyl, deuterated aryl, deuterated alkyl, or deuterated silyl. |
| US09735374B2 |
Metal complex and light-emitting device containing the metal complex
A metal complex exhibits blue light emission of high color purity and has a color purity of small temperature dependence, particularly in the blue region. Specifically, the metal complex is represented by Formula (1a): wherein M is a metal atom; R0 is a divalent linking group; each j independently represents 0 or 1; RP1, RP2, RP3, RP4 and RP6 each independently represents a hydrogen atom or the like; RP5 represents a halogen atom or the like; m is an integer of from 1 to 3, n is an integer of from 0 to 2, and m+n is 2 or 3; and the portion represented by Formula (2): represents a bidentate ligand; wherein Rx and Ry are an atom bonding to the metal atom M, and each independently represents a carbon atom, an oxygen atom or a nitrogen atom. |
| US09735373B2 |
Organic electroluminescent materials and devices
Aluminum chelate complex compounds with two substituted 8-hydroxyquinoline ligand and one dibenzothiophene, dibenzofuran or dibenzoselenophene ligands or aza-analogs of these molecules, attached directly or through an aromatic spacer to the oxygen atom is provided to improve lifetime, operating voltage and efficiency of an OLED. Additional substitution of dibenzothiophene or dibenzofuran ring may also provide charge delocalization, HOMO modification and higher Tg. |
| US09735371B2 |
Compounds for electronic devices
The present invention relates to a compound of the formula (I), to the use of this compound in an electronic device, and to an electronic device comprising one or more compounds of the formula (I). The invention furthermore relates to the preparation of the compound of the formula (I) and to a formulation comprising one or more compounds of the formula (I). |
| US09735370B2 |
Compound, device and method of making same
An organic light-emitting device comprises an anode, a cathode and a light-emitting layer between the anode and the cathode. The light-emitting layer comprises a compound of formula (I): wherein Ar1, Ar2, Ar3, Ar6 and Ar7 in each occurrence independently represent an unsubstituted or substituted aryl or heteroaryl group; X independently in each occurrence represents S or O; R independently in each occurrence represents H or a substituent; p is 0 or 1; q is 0 or 1; f is 1, 2 or 3; g is 1, 2 or 3; and adjacent groups Ar3 or adjacent groups Ar2 may be linked by a divalent group to form a ring. This compound can provide a bluer emitter that can be blended into current host formulations (deep blue, CIEy<0.08) suitable for solution processing. |
| US09735369B2 |
Luminescent material for organic optoelectric device and organic optoelectric device and display device
Disclosed are an organic compound represented by the Chemical Formula 1, an organic optoelectric device including the organic compound, and a display device including the organic optoelectric device. |
| US09735367B2 |
Light emitting diode
A light emitting diode includes an insulating substrate, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a first electrode, and a second electrode. The semiconductor carbon nanotube layer has a first surface and a second surface. The first MgO layer coats entire the first surface. The second surface is divided into a first region and a second region. The first region is coated with the second MgO layer. The second MgO layer is covered by the functional dielectric layer. The second region is exposed. The first electrode is electrically connected to the first region. The second electrode is electrically connected to the second region. |
| US09735363B2 |
Method for imprinting opto-electronic components with bus bars
In a method for imprinting optoelectronic components with at least one bus bar, the bus bar following the shape of the optoelectronic component and allowing a homogeneous color impression on the rear face of the component, the bus bar is printed on a basic material before deposition of a photoactive layer. The basic material may comprise a substrate, or an electrically conductive transparent layer on a substrate. Subsequently, a conductive layer on the substrate is structured to form isolated regions, the photoactive layer is deposited and structured, and then a counter electrode is applied and structured. |
| US09735362B2 |
Tunneling nanotube field effect transistor and manufacturing method thereof
A tunneling nanotube field effect transistor includes: an insulating layer disposed on a substrate; a gate electrode disposed on the insulating layer; a source electrode and a drain electrode disposed on the insulating layer on respective adjacent sides of the gate electrode; and a carbon nanotube extending through the gate electrode, wherein the carbon nanotube is supported by the source electrode, the gate electrode, and the drain electrode, wherein the carbon nanotube includes a first portion adjacent to the source electrode and a second portion adjacent to the drain electrode, and wherein the source electrode and the gate electrode are spaced apart by an exposed section of the first portion, and the drain electrode and the gate electrode are spaced apart by an exposed section of the second portion. |
| US09735361B2 |
Method of making a stack of the type comprising a first electrode, an active layer, and a second electrode
A method of making a stack of the type comprising a first electrode, an active layer, and a second electrode, for use in an electronic device, in particular of the organic photodetector type or the organic solar cell type, the method comprising the following steps: a) depositing a first layer (2) of conductive material on a substrate (1) in order to form the first electrode; b) depositing an active layer (3) in the form of a thin organic semiconductor layer, this layer including non-continuous zones (30); c) locally eliminating the first conductive layer (2) through the non-continuous zones (30) of the active layer by chemical attack; and d) depositing a second layer (4) of conductive material on the active layer (3) in order to form the second conductive electrode. |
| US09735356B2 |
Strained multilayer resistive-switching memory elements
The resistive-switching memory element of the present invention comprises a first electrode, a resistive-switching element; and a second electrode wherein the resistive-switching element is arranged between the first electrode and the second electrode and the resistive-switching element comprises, or consists of, a plurality of metal oxide layers and wherein neighboring metal oxide layers of the resistive-switching element comprise, or consist of, different metal oxides. |
| US09735353B2 |
Phase-change memory cell having a compact structure
A memory cell includes a selection transistor having a control gate and a first conduction terminal connected to a variable-resistance element. The memory cell is formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of a semiconductor. The gate is formed on the active layer and has a lateral flank covered with a second insulating layer. The variable-resistance element includes a first layer covering a lateral flank of the active layer in a trench formed through the active layer along the lateral flank of the gate and reaching the first insulating layer, and a second layer made of a variable-resistance material. |
| US09735352B2 |
Phase change memory element
A phase-change memory element with an electrically isolated conductor is provided. The phase-change memory element includes: a first electrode and a second electrode; a phase-change material layer electrically connected to the first electrode and the second electrode; and at least two electrically isolated conductors, disposed between the first electrode and the second electrode, directly contacting the phase-change material layers. |
| US09735350B2 |
Method and system for removing boron from magnetic junctions usable in spin transfer torque memory applications
A method provides a magnetic junction having a top and sides. A first magnetic layer, a nonmagnetic spacer layer and a second magnetic layer are deposited. The nonmagnetic spacer layer is between the first and second magnetic layers. A free layer is one of the magnetic layers. A reference layer is the other of the magnetic layers. The second magnetic layer includes an amorphous magnetic layer having nonmagnetic constituent(s) that are glass-forming. An anneal is performed in a gas having an affinity for the nonmagnetic constituent(s). The gas includes at least one of first and second gases. The first gas forms a gaseous compound with the nonmagnetic constituent(s) The second gas forms a solid compound with the nonmagnetic constituent(s). The second gas is usable if the anneal is performed after the magnetic junction has been defined. The solid compound is at least on the sides of the magnetic junction. |
| US09735345B2 |
Vertical hall effect sensor
In one aspect, a vertical Hall effect sensor includes a semiconductor wafer having a first conductivity type and a plurality of semiconductive electrodes disposed on the semiconductor wafer. The plurality of semiconductive electrodes have the first conductivity type and include a source electrode, a first sensing electrode and a second sensing electrode, arranged such that the source electrode is between the first sensing electrode and the sensing electrode and a first drain electrode and a second drain electrode, arranged such that the first sensing electrode, second sensing electrode, and source electrode are between the first drain electrode and the second drain electrode. The vertical Hall effect sensor also includes a plurality of semiconductor fingers disposed on the semiconductor wafer and interdigitated with the plurality of semiconductive electrodes, the semiconductor fingers having a second conductivity type. |
| US09735344B2 |
Hybrid hall effect magnetoelectronic gate
Hybrid Hall Effect Devices implemented with Spin Transfer Torque write capability are configured as magnetoelectronic (ME) devices. These devices are useable as circuit building blocks in reconfigurable processing systems, including as logic circuits, non-volatile switches and memory cells. |
| US09735339B2 |
Piezoelectric device and an apparatus
A piezoelectric device comprises at least one element comprising at least one sheet of piezoelectric material. The element is mounted on a circuit board comprising at least one conductive layer having at least one opening. The element is located on the opening and supported by edges of the opening in such a manner that the opening extends laterally beyond the area of the sheet of piezoelectric material. The element is sandwiched between an overlay and the circuit board in such a manner that vibrations of the sheet of piezoelectric material are sufficient to cause vibration of the overlay. |
| US09735336B2 |
Method for switching an electrical load in a bridge branch of a bridge circuit, and bridge circuit
In one embodiment, a method for switching an electrical load having at least one capacitive component and one inductive component in a bridge branch of a bridge circuit comprises a charging of the bridge branch to a first voltage (V1) in a forward switching phase (F), a discharging of the capacitive component of the electrical load in a first open switching phase (O1), a charging of the bridge branch to a second voltage (V2) in a reverse switching phase (R), with the second voltage (V2) being polarized inversely from the first voltage (V1), and a negative charging of the capacitive component of the electrical load in a second open switching phase (O2). A bridge circuit is also provided. |
| US09735334B1 |
Apparatus for manufacturing thermoelectric module
An apparatus for manufacturing a thermoelectric module includes an alignment mechanism for aligning a plurality of thermoelectric elements with respect to a plurality of electrodes attached to a substrate, wherein the alignment mechanism includes a dispenser having a plurality of injection portions and the plurality of thermoelectric elements is inserted into the plurality of injection portions. |
| US09735333B2 |
Thermoelectric module
A thermoelectric module is provided that includes a housing that has at least two opposite walls, and a plurality of thermoelectric elements that have at least two opposite surfaces, and a plurality of conductor bridges. At least two thermoelectric elements are connected to a conductor bridge, and the thermoelectric elements, via one of the surfaces thereof, are in thermal contact with a support element, a combination of at least two thermoelectric elements and a conductor bridge being in thermal contact with a support element. |
| US09735332B2 |
Thermoelectric power generation system for vehicle
A thermoelectric power generation system for a vehicle is provided. The system includes an air compressor that is configured to compress and discharge air and a vortex tube that is configured to receive the compressed air discharged from the air compressor and separate and discharge the compressed air into two groups of air having a temperature difference. In addition, a thermoelectric module is provided that includes a thermoelectric element having a channel formed at a first side thereof introduced with any one of the two groups of air and a channel formed at a second side thereof introduced with the other of the two groups of air to generate an electromotive force due to a temperature difference of the two groups of air. |
| US09735331B2 |
Bonding wire for semiconductor package and semiconductor package including same
Provided is a bonding wire for a semiconductor package and a semiconductor package including the same. The bonding wire for the semiconductor package may include a core portion including silver (Ag), and a shell layer surrounding the core portion, having a thickness of 2 nm to 23 nm, and including gold (Au). The semiconductor package may include a package body having a first electrode structure and a second electrode structure, a semiconductor light emitting device comprising a first electrode portion and a second electrode portion electrically connected to the first electrode structure and the second electrode structure, and a bonding wire connecting at least one of the first electrode structure and the second electrode structure to the semiconductor light emitting device. |
| US09735330B2 |
Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements
A lead frame for mounting LED elements includes a frame body region and a large number of package regions arranged in multiple rows and columns in the frame body region. The package regions each include a die pad on which an LED element is to be mounted and a lead section adjacent to the die pad, the package regions being further constructed to be interconnected via a dicing region. The die pad in one package region and the lead section in another package region upward or downward adjacent to the package region of interest are connected to each other by an inclined reinforcement piece positioned in the dicing region. |
| US09735327B2 |
Light emitting device and manufacturing method for same
Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a support substrate, a reflective ohmic contact layer on the support substrate, a functional complex layer including a process assisting region and ohmic contact regions divided by the process assisting region on the reflective ohmic contact layer, and a light emitting semiconductor layer including a second conductive semiconductor layer, an active layer, and a first conductive semiconductor layer on each ohmic contact region. |
| US09735326B2 |
Method of producing light emitting device
A method of producing a light emitting device includes providing a light emitting element on a base member, the base member including an insulating member and a pair of connection terminals at least on an upper surface thereof. The connection terminals have an exposed portion exposed to outside, with the light emitting element electrically connected to the connection terminals. A covering member is disposed to cover at least a portion of the upper surface of the light emitting element, and a protective layer is disposed to cover at least a portion of the exposed portions of the connection terminals. The covering member is removed, and material from the upper surface side of the base member is supplied to dispose a light-transmissive member on the upper surface of the light emitting element. At least a portion of the light-transmissive member present on the protective layer is then removed. |
| US09735325B2 |
Semiconductor device and manufacturing method of semiconductor device
According to one embodiment, a manufacturing method of a semiconductor device includes the transferring a first group from a first support to a second support; the deforming the second support to convert each pitch of the semiconductor chips in the first group transferred on the second support into a second pitch different from the first pitch; the forming an insulating layer around each of the semiconductor chips, the insulating layer covering each of the semiconductor chips in the first group arranged in the second pitch; and the dicing the insulating layer. The first group is selected from a plurality of semiconductor chips supported by the first support. The plurality of semiconductor chips is arranged in an initial pitch. The first group is arranged in a first pitch being longer than the initial pitch. |
| US09735324B2 |
Light emitting device and manufacturing method thereof
A light emitting device including a substrate including an entire top surface that is flat, a light emitting diode on the substrate, a lead frame disposed on the flat top surface of the substrate, the lead frame electrically connected to the light emitting diode, a dam member disposed on the substrate and being adjacent to the light emitting diode, the dam member having a circular configuration which has an opening, a first member disposed on the light emitting diode, the first member including a fluorescent substance to convert a light emission spectrum of light from the light emitting diode, a second member disposed in the opening of the dam member, a circumference of the second member being defined by the dam member and a lens disposed on the second member is provided. |
| US09735323B2 |
Light emitting device having a triple phosphor fluorescent member
A light emitting device includes a light emitting element of a peak emission wavelength in a range of 430 nm to 470 nm and a fluorescent member. The fluorescent member includes a first phosphor including a silicate having a composition that contains at least one element selected from the group consisting of Ca, Sr, and Ba, at least one element selected from the group consisting of Cl, F, and Br, and Mg and Eu, a second phosphor including an aluminate that has a composition containing Lu and Ce, and a third phosphor having emission spectrum with a half bandwidth of 86 nm or less and including a silicon nitride that has a composition containing at least one of Sr or Ca, and containing Al and Eu. |
| US09735320B2 |
LED packages and manufacturing method thereof
A method of manufacturing LED packages includes the steps of: forming a conductive circuit layer on a substrate; screen printing a wall layer on the conductive circuit layer to form a trellis with a plurality of wall units, so that regions of the conductive circuit layer surrounded by the wall units are exposed; mounting and electrically connecting at least one LED die on the conductive circuit layer within each of the wall units; molding a transparent layer to cover the LED dies; and cutting along the wall units to form a plurality of LED packages. |
| US09735317B2 |
Method for forming a semiconducting portion by epitaxial growth on a strained portion
The invention pertains to formation of a semiconducting portion (60) by epitaxial growth on a strained germination portion (40), comprising the steps in which a cavity (21) is produced under a structured part (11) by rendering free a support layer (30) situated facing the structured part (11), a central portion (40), termed the strained germination portion, then being strained; and a semiconducting portion (60) is formed by epitaxial growth on the strained germination portion (40), wherein the structured part (11) is furthermore placed in contact with the support layer (30) in such a way as to bind the structured part (11) of the support layer. |
| US09735315B2 |
Semiconductor heterostructure with stress management
A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure. |
| US09735310B2 |
Damage-and-resist-free laser patterning of dielectric films on textured silicon
In accordance with embodiments disclosed herein, there are provided methods and systems for implementing damage-and-resist-free laser patterning of dielectric films on textured silicon. For example, in one embodiment, such means include means for depositing a Silicon nitride (SiNx) or SiOx (silicon oxide) layer onto a crystalline silicon (c-Si) substrate by a Plasma Enhanced Chemical Vapor Deposition (PECVD) processing; depositing an amorphous silicon (a-Si) film on top of the SiNx or SiOx layer; patterning the a-Si film to define an etch mask for the SiNx or SiOx layer; removing the SiNx or SiOx layer via a Buffered Oxide Etch (BOE) chemical etch to expose the c-Si surface; removing the a-Si mask with a hydrogen plasma etch in a PECVD tool to prevent current loss from the mask; and plating the exposed c-Si surface with metal contacts. Other related embodiments are disclosed. |
| US09735307B2 |
Method of manufacturing thin-film solar cell
A method of manufacturing a thin-film solar cell includes forming a first electrode on a substrate; forming a first petition groove for dividing the first electrode; forming a semiconductor layer on the first electrode and in the first partition groove; forming a second partition groove for dividing the semiconductor layer; forming a second electrode on the semiconductor layer and in the second partition groove; and forming a third partition groove for dividing the second electrode and the semiconductor layer. At least one of the steps of forming the first partition groove, the second partition groove, and the third partition groove includes forming an opening in a partition groove forming layer to expose a lower layer surface below the partition groove forming layer, bringing a needle into contact with the lower layer surface, and forming the partition groove by moving the needle in a predetermined direction. |
| US09735306B2 |
Wüstite-based photoelectrodes with lithium, hydrogen, sodium, magnesium, manganese, zinc and nickel additives
A photoelectrode, photovoltaic device and photoelectrochemical cell and methods of making are disclosed. The photoelectrode includes an electrode at least partially formed of FeO combined with at least one of lithium, hydrogen, sodium, magnesium, manganese, zinc, and nickel. The electrode may be doped with at least one of lithium, hydrogen, and sodium. The electrode may be alloyed with at least one of magnesium, manganese, zinc, and nickel. |
| US09735304B1 |
Photo detector systems and methods of operating same
A monolithic photo detector device disposed on a bulk substrate, comprising a photo detector disposed integrated in the bulk substrate including: (1) a p-type doped impurity region extending along a first direction in the major surface of the substrate and receiving a first voltage, (2) first and second gates being spaced apart from each other and extending in the first direction over the major surface of the substrate, wherein the gates receives a second voltage, (3) an n-type doped impurity region, extending along the first direction in the major surface of the substrate and receiving a third voltage; and (4) a light absorbing region, disposed between the second doped impurity region and the first gate. The device also includes control circuitry, integrated in the substrate to generate the first, second and third voltages that control an operating state of the detector. |
| US09735297B2 |
Method for preparing light absorption layer of copper-indium-gallium-sulfur-selenium thin film solar cells
A preparation method of the light absorption layer of a copper-indium-gallium-sulfur-selenium film solar cell is provided. The method employs a non-vacuum liquid-phase chemical technique, which comprises following steps: forming source solution containing copper, indium, gallium, sulfur and selenium; using the solution to form a precursor film on a substrate by a non-vacuum liquid-phase process; drying and annealing the precursor film. Thus, a compound film of copper-indium-gallium-sulfur-selenium is gained. |
| US09735295B2 |
Electrode having excellent light transmittance, method for manufacturing same, and electronic element including same
An electronic device with an electrode having a superior light transmittance and including a substrate, an amine group-containing compound layer formed on the substrate, and a metal layer formed on the amine group-containing compound layer is provided. In accordance with the present invention, the electrode is easily manufactured when a solution process is used, has performances of a light transmittance, a sheet resistance, and flexibility higher than those of a typical ITO transparent electrode, and a manufacturing cost of the electrode may be reduced. |
| US09735292B2 |
High-voltage gallium nitride schottky diode
A Schottky diode is formed on a silicon support. A non-doped GaN layer overlies the silicon support. An AlGaN layer overlies the non-doped GaN layer. A first metallization forming an ohmic contact and a second metallization forming a Schottky contact are provided in and on the AlGaN layer. First vias extend from the first metallization towards the silicon support. Second vias extend from the second metallization towards an upper surface. |
| US09735290B2 |
Semiconductor device
An integrated diode (100) comprising a substrate (102); a Schottky cell (104) on the substrate (102); a heterojunction cell (106) on the substrate (102); a common anode contact (108) for both the Schottky cell (104) and the heterojunction cell (106); and a common cathode contact (110) for both the Schottky cell (104) and the heterojunction cell (106). |
| US09735289B2 |
Ion implantation-assisted etch-back process for improving spacer shape and spacer width control
Disclosed herein is a semiconductor device including a first dielectric disposed over a channel region of a transistor formed in a substrate and a gate disposed over the first dielectric. The semiconductor device further includes a second dielectric disposed vertically, substantially perpendicular to the substrate, at an edge of the gate, and a spacer disposed proximate to the second dielectric. The spacer includes a cross-section with a perimeter that includes a top curved portion and a vertical portion that is substantially perpendicular to the substrate. Further, disclosed herein, are methods associated with the fabrication of the aforementioned semiconductor device. |
| US09735282B2 |
Semiconductor device and display device having semiconductor device
Luminance variation due to change of current through a light-emitting element caused by change in environmental temperature is suppressed. Current through a first light-emitting element in a pixel portion is controlled by a monitor circuit. The monitor circuit includes a second light-emitting element, a transistor, a resistor, and an amplifier circuit. An anode of the second light-emitting element is connected to a source of the transistor. A cathode of the second light-emitting element is connected to the resistor and a first input terminal of the amplifier circuit. A second input terminal of the amplifier circuit is connected to a second power supply line. An output terminal of the amplifier circuit is connected to a gate of the transistor. The drain of the transistor is connected to a third power supply line. The transistor and the resistor each include an oxide semiconductor film. |
| US09735279B2 |
Gas sensor and method of manufacturing the same
A gas sensor includes: a channel layer in which a F-terminated GNR, a H-terminated GNR, and a F-terminated GNR whose edge portions are terminated with different modifying groups are bonded to each other; a source electrode formed on one end of the channel layer; and a drain electrode formed on the other end of the channel layer, in which a surface of the H-terminated GNR is exposed, and this exposed portion is a gas sensing part. |
| US09735277B2 |
Partially dielectric isolated fin-shaped field effect transistor (FinFET)
One embodiment provides a method comprising etching a fin of a fin-shaped field effect transistor (FinFET) to form a reduced fin, and laterally etching the reduced fin to form a fin channel including a first fin channel sidewall and a second fin channel sidewall opposing the first fin channel sidewall. The method further comprises forming a first thin dielectric tunnel and a second thin dielectric tunnel on the first fin channel sidewall and the second fin channel sidewall, respectively. Each thin dielectric tunnel prevents lateral epitaxial crystal growth on the fin channel. The method further comprises etching an insulator layer disposed between the fin channel and a substrate of the FinFET to expose portions of a substrate surface of the substrate. A source epitaxy and a drain epitaxy are formed from vertical epitaxial crystal growth on the exposed portions of the substrate surface after epitaxial deposition. |
| US09735275B2 |
Channel replacement and bimodal doping scheme for bulk finFET threshold voltage modulation with reduced performance penalty
A method includes removing a top portion of a substrate after implantation of a punch through stopper into the substrate; epitaxially growing undoped material on the substrate, thereby forming a channel; filling a top portion of the channel with an intermediate implant forming a vertically bi-modal dopant distribution, with one doping concentration peak in the top portion of the channel and another doping concentration peak in the punch through stopper; and patterning fins into the channel and the punch though stopper to form a finFET structure. |
| US09735274B2 |
Semiconductor device including a stacked wire structure
A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a stacked wire structure formed over the substrate. The semiconductor device structure also includes a gate structure formed over a middle portion of the stacked wire structure and a source/drain (S/D) structure formed at two opposite sides of the stacked wire structure. The S/D structure includes a top surface, a sidewall surface, and a rounded corner between the top surface and the sidewall surface. |
| US09735270B2 |
Semiconductor transistor having a stressed channel
A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain films are deposited in the recesses. The source and drain films are made of an alloy of silicon and germanium. The alloy is epitaxially deposited on the layer of silicon. The alloy thus has a lattice having the same structure as the structure of the lattice of the layer of silicon. However, due to the inclusion of the germanium, the lattice of the alloy has a larger spacing than the spacing of the lattice of the layer of silicon. The larger spacing creates a stress in a channel of the transistor between the source and drain films. The stress increases IDSAT and IDLIN of the transistor. An NMOS transistor can be manufactured in a similar manner by including carbon instead of germanium, thereby creating a tensile stress. |
| US09735269B1 |
Integrated strained stacked nanosheet FET
Transistors and methods of forming the same include forming a fin of alternating layers of a channel material and a sacrificial material. Stress liners are formed in contact with both ends of the fin. The stress liners exert a stress on the fin. The sacrificial material is etched away from the fin, such that the layers of the channel material are suspended between the stress liners. A gate stack is formed over and around the suspended layers of channel material. |
| US09735266B2 |
Self-aligned contact for trench MOSFET
A trench metal oxide semiconductor field effect transistor (MOSFET) includes an epitaxial layer over a substrate a first trench in the epitaxial layer and a second trench in the epitaxial layer. A depth of the first trench is different from a depth of the second trench. The trench MOSFET further includes a source region surrounding the self-aligned source contact, wherein the source region is convex-shaped. The trench MOSFET further includes a self-aligned source contact between the first trench and the second trench; wherein the self-aligned source contact is connected to the source region. |
| US09735263B2 |
Transistor and switching system comprising silicon carbide and oxides of varying thicknesses, and method for providing the same
An insulated gate field-effect transistor (IGFET) device includes a semiconductor body (200) and a gate oxide (234). The semiconductor body includes a first well region (216) doped with a first type of dopant and a second well region (220) that is doped with an opposite, second type of dopant and is located within the first well region. The gate oxide includes a relatively thinner outer section (244) and a relatively thicker interior section (246). The outer section is disposed over the first well region and the second well region. The interior section is disposed over a junction gate field effect transistor region (218) of the semiconductor body doped with the second type of dopant. A conductive channel is formed through the second well region when a gate signal is applied to a gate contact (250) disposed on the gate oxide. |
| US09735261B2 |
Semiconductor device and formation thereof
A semiconductor devices and method of formation are provided herein. A semiconductor device includes a gate structure over a channel and an active region adjacent the channel. The active region includes a repaired doped region and a growth region over the repaired doped region. The repaired doped region includes a first dopant and a second dopant, where the second dopant is from the growth region. A method of forming a semiconductor device includes increasing a temperature during exposure to at least one of dopant(s) or agent(s) to form an active region adjacent a channel, where the active region includes a repaired doped region and a growth region over the repaired doped region. |
| US09735260B2 |
III-V HEMT devices
A semiconductor device has a stacked structure in which a p-GaN layer, an SI-GaN layer, and an AlGaN layer are stacked, and has a gate electrode that is formed at a top surface side of the AlGaN layer. A band gap of the AlGaN layer is wider than a band gap of the p-GaN layer and the SI-GaN layer. Moreover, impurity concentration of the SI-GaN layer is less than 1×1017 cm−3. Semiconductor devices including III-V semiconductors may have a stable normally-off operation. |
| US09735259B2 |
Method to build vertical PNP in a BiCMOS technology with improved speed
Various particular embodiments include an integrated circuit (IC) structure including: a stack region; and a silicon substrate underlying and contacting the stack region, the silicon substrate including: a silicon region including a doped subcollector region; a set of isolation regions overlying the silicon region; a base region between the set of isolation regions and below the stack region, the base region including an intrinsic base contacting the stack region, an extrinsic base contacting the intrinsic base and the stack region, and an amorphized extrinsic base contact region contacting the extrinsic base; a collector region between the set of isolation regions; an undercut collector-base region between the set of isolation regions and below the base region; and a collector contact region contacting the collector region under the intrinsic base and the collector-base region via the doped subcollector region. |
| US09735254B2 |
Trench-gate RESURF semiconductor device and manufacturing method
A trench-gate device with lateral RESURF pillars has an additional implant beneath the gate trench. The additional implant reduces the effective width of the semiconductor drift region between the RESURF pillars, and this provides additional gate shielding which improves the electrical characteristics of the device. |
| US09735253B1 |
Closely packed vertical transistors with reduced contact resistance
A method of forming a semiconductor device and resulting structures having closely packed vertical transistors with reduced contact resistance by forming a semiconductor structure on a doped region of a substrate, the semiconductor structure including a gate formed over a channel region of a semiconductor fin. A liner is formed on the gate and the semiconductor fin, and a dielectric layer is formed on the liner. Portions of the liner are removed to expose a top surface and sidewalls of the semiconductor fin and a sidewall of the dielectric layer. A recessed opening is formed by recessing portions of the liner from the exposed sidewall of the dielectric layer. A top epitaxy region is formed on the exposed portions of the semiconductor fin and dielectric layer such that an extension of the top epitaxy region fills the recessed opening. The top epitaxy region is confined between portions of the liner. |
| US09735247B2 |
High-frequency conductor having improved conductivity
A high-frequency conductor having improved conductivity comprises at least one electrically conductive base material. The ratio of the outer and inner surfaces of the base material permeable by a current to the total volume of the base material is increased by a) dividing the base material perpendicularly to the direction of current into at least two segments, which are spaced from each other by an electrically conductive intermediate piece and connected both electrically and mechanically to each other, and/or b) topographical structures in or on the surface of the base material and/or c) inner porosity of at least a portion of the base material compared to a design of the base material in which the respective feature was omitted. It was found that, as a result of these measures concerning the design, it is possible to physically arrange the same amount abase material so that a larger fraction of the base material is located at a distance of no more than skin depth from an outer or inner surface and is thus involved in current transport. As a result, a lesser fraction remains unused as a function of the skin effect. |
| US09735244B2 |
Quasi-vertical structure having a sidewall implantation for high voltage MOS device and method of forming the same
A semiconductor device includes a buried layer in a substrate, the buried layer having a first dopant type. The semiconductor device further includes a first layer over the buried layer, the first layer having the first dopant type. The semiconductor device further includes at least one first well in the first layer, the at least one first well having a second dopant type. The semiconductor device further includes an implantation region in a sidewall of the first layer, the implantation region having the second dopant type, wherein the implantation region is below the at least one first well. |
| US09735243B2 |
Semiconductor device, integrated circuit and method of forming a semiconductor device
A semiconductor device comprises a transistor formed in a semiconductor body having a first main surface. The transistor comprises a source region, a drain region, a channel region, a drift zone, a source contact electrically connected to the source region, a drain contact electrically connected to the drain region, and a gate electrode at the channel region. The channel region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The channel region has a shape of a first ridge extending along the first direction. One of the source contact and the drain contact is adjacent to the first main surface, the other one of the source contact and the drain contact is adjacent to a second main surface that is opposite to the first main surface. |
| US09735238B2 |
Avoiding internal switching loss in soft switching cascode structure device
In a cascode switching device, avalanche breakdown of a control transistor and loss of soft switching or zero voltage switching in a high voltage normally-on depletion mode transistor having a negative switching threshold voltage and the corresponding losses are avoided by providing additional capacitance in parallel with a parallel connection of drain-source parasitic capacitance of the control transistor and gate-source parasitic capacitance of the high voltage, normally-on transistor to form a capacitive voltage divider with the drain-source parasitic capacitance of the high voltage, normally-on transistor such that the avalanche breakdown voltage of the control transistor cannot be reached. The increased capacitance also assures that the drain source parasitic capacitance of the high voltage, normally-on transistor is fully discharged before internal turn-on can occur. |
| US09735236B2 |
Quantum dot channel (QDC) quantum dot gate transistors, memories and other devices
This invention describes a field-effect transistor in which the channel is formed in an array of quantum dots. In one embodiment the quantum dots are cladded with a thin layer serving as an energy barrier. The quantum dot channel (QDC) may consist of one or more layers of cladded dots. These dots are realized on a single or polycrystalline substrate. When QDC FETs are realized on polycrystalline or nanocrystalline thin films they may yield higher mobility than in conventional nano- or microcrystalline thin films. These FETs can be used as thin film transistors (TFTs) in a variety of applications. In another embodiment QDC-FETs are combined with: (a) coupled quantum well SWS channels, (b) quantum dot gate 3-state like FETs, and (c) quantum dot gate nonvolatile memories. |
| US09735235B2 |
Nanowire and method of fabricating the same
A method of forming a nanowire includes providing a substrate. The substrate is etched to form at least one fin. Subsequently, a first epitaxial layer is formed on an upper portion of the fin. Later, an undercut is formed on a middle portion the fin. A second epitaxial layer is formed to fill into the undercut. Finally, the fin, the first epitaxial layer and the second epitaxial layer are oxidized to condense the first epitaxial layer and the second epitaxial layer into a germanium-containing nanowire. |
| US09735232B2 |
Method for manufacturing a semiconductor structure having a trench with high aspect ratio
The present disclosure provides a method for manufacturing a semiconductor structure. The method includes several operations as follows. A semiconductor substrate is received. A trench along a depth in the semiconductor substrate is formed. The semiconductor substrate is exposed in a hydrogen containing atmosphere. Dopants are inserted into a portion of the semiconductor substrate. A dielectric is filled in the trench. The dopants are driven into a predetermined distance in the semiconductor substrate. |
| US09735229B2 |
Semiconductor device
A semiconductor device includes a semiconductor substrate in which an active region and an edge termination region are defined, a semiconductor element formed in the active region, and first to fourth P layers formed in a region spanning from an edge portion of the active region to the edge termination region in the surface of the semiconductor substrate. The first to fourth P layers respectively have surface concentrations P(1) to P(4) that decrease in this order, bottom-end distances D(1) to D(4) that increase in this order, and distances B(1) to B(4) to the edge of the semiconductor substrate that increase in this order. The surface concentration P(4) is 10 to 1000 times the impurity concentration of the semiconductor substrate, and the bottom-end distance D(4) is in the range of 15 to 30 μm. |
| US09735226B1 |
Power module
Provided is a power module having a sufficient space in which a large electronic component in size is disposed, and having yield strength against external stresses, such as vibrations. A power module includes: an insulating substrate; a semiconductor element mounted above the insulating substrate; a sealant sealing the insulating substrate and semiconductor element, and forming the outer shape of the power module; and a pair of terminals disposed on the sealant, in both ends of the sealant in a width direction of the power module in an upright manner. The pair of terminals are spaced from each other by a distance greater than the width of a film capacitor being a first electronic component mounted on the bottom surface of a control substrate being a circuit substrate coupled to tips of the pair of terminals. The pair of terminals are longer in a height direction than the film capacitor. |
| US09735225B2 |
Chip resistor and electronic equipment having resistance circuit network
A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired. The chip resistor is arranged to have a resistor network on a substrate. The resistor network includes a plurality of resistor bodies arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films and fuse films. By selectively fusing a fuse film, a resistance unit can be electrically incorporated into the resistor network or electrically separated from the resistor network to make the resistance value of the resistor network the required resistance value. |
| US09735220B2 |
Display module
An organic display device includes a pixel driving circuit having a thin film transistor connected to a current supply line and a capacitor. A first insulation layer, with a first electrode thereon, covers a source electrode of the transistor. The first electrode is connected to the transistor through a contact hole in the insulation layer. A second insulation layer including an aperture is formed on the first insulation layer and electrode layers. An organic light emitting layer, with a second electrode thereon is formed in the aperture and connected to the first electrode. The second insulation layer includes an inner wall at the aperture, said inner wall having a surface of a convex plane on an edge of the recessed part of the first electrode. The convex plane is located between the organic light emitting layer and the edge of the first electrode, and the second electrode is formed over plurality of pixels. |
| US09735214B2 |
Organic light emitting display device and manufacturing method thereof
An organic light emitting display (OLED) device, and a method for manufacturing the OLED device are discussed. The OLED device according to one embodiment includes a thin film transistor formed on a substrate; a planarization layer formed on the thin film transistor; a first bank layer including a first opening; a lower electrode formed in the first opening and connected to the thin film transistor, an end segment of the lower electrode being disposed on the first bank layer; a second bank layer formed on the first bank layer and covering the end segment of the lower electrode, the second bank layer including a second opening corresponding to the first opening; an organic emitting layer formed on the lower electrode and in the second opening; and an upper electrode formed on the organic emitting layer. |
| US09735213B2 |
Organic light-emitting display apparatus and manufacturing method thereof
An organic light-emitting display apparatus includes a substrate, a thin film transistor on the substrate, a pixel electrode electrically connected to the thin film transistor, a pixel defining layer having an opening exposing a center portion of the pixel electrode and covering an edge of the pixel electrode, and a first low reflection layer between the pixel electrode and the pixel defining layer, the first low reflection layer including a metal. |
| US09735211B2 |
Organic light emitting diode display device having improved aperture ratio and lifetime
An organic light emitting diode display device includes a substrate including a display region, wherein a plurality of pixel regions are defined in the display region; a first electrode over the substrate and in each of the plurality of pixel regions; a bank including a lower layer and an upper layer on the first electrode, the lower layer disposed on edges of the first electrode and having a first width and a first thickness, the upper layer disposed on the lower layer and having a second width smaller than the first width; an organic emitting layer on the first electrode and a portion of the lower layer; and a second electrode on the organic emitting layer and covering an entire surface of the display region. |
| US09735210B2 |
OLED display apparatus with in cell touch structure
An OLED display apparatus with an in cell touch structure includes a cover plate, an array substrate facing the cover plate, an organic light-emitting layer arranged therebetween, multiple driving lines and multiple sensing lines arranged at an inner side of the cover plate facing the array substrate, multiple signal pins arranged at an inner side of the array substrate, where each of the signal pins corresponds to one of the driving lines or one of the sensing lines, and multiple conductive structures. The conductive structures are arranged between the driving lines and the signal pins or between the sensing lines and the signal pins. Each conductive structure includes an end electrically connecting a driving line or a sensing line to a corresponding signal pin, and an opposite end electrically connected to a corresponding touch signal transmission line. |
| US09735208B2 |
Transparent display panel and driving method thereof
A transparent display panel including a transparent substrate and a plurality of display units formed on the substrate is provided. Each of the display units includes a color light area and a least one of transparent areas disposed around the color light area. The color light area has a geometric center, a first color pixel structure, a second color pixel structure, and a third color pixel structure. The first, second and third color pixel structures take the geometric center as a center in each display unit and are disposed in a radial way corresponding to the center to form the color light area. |
| US09735207B2 |
Display substrate and driving method thereof, display apparatus
A display substrate and a driving method thereof, and a display apparatus are provide. The display substrate includes an array of a plurality of sub-pixels having at least two colors, wherein the sub-pixels of each color constitute a plurality of sub-pixel sets, each of the sub-pixel sets includes at least two sub-pixels of the same color and arranged adjacently in a first direction, and sub-pixel sets of different colors are arranged alternately in the first direction. The display substrate may be applied to display devices, particularly to organic light emitting diode display devices using different organic light emitting layer materials for different sub-pixels. |
| US09735203B2 |
3-dimensional (3D) non-volatile memory device and method of fabricating the same
Provided are 3D non-volatile memory devices and methods of fabricating the same. A 3D non-volatile memory device according to an embodiment of the present invention includes a plurality of conductive lines, which are separated from one another in parallel; a plurality of conductive planes, which extend across the plurality of conductive lines and are separated from one another in parallel; and non-volatile data storage layer patterns, which are respectively arranged at regions of intersection at which the plurality of conductive lines and the plurality of conductive planes cross each others. |
| US09735202B1 |
Implementation of VMCO area switching cell to VBL architecture
Systems and methods for improving performance of a non-volatile memory that utilizes a Vacancy Modulated Conductive Oxide (VMCO) structure are described. The VMCO structure may include a layer of amorphous silicon (e.g., a Si barrier layer) and a layer titanium oxide (e.g., a TiO2 switching layer). In some cases, the VMCO structure or VMCO stack may use bulk switching or switching O-ion movements across an area of the VMCO structure, as opposed to switching locally in a constriction of vacancy formed filamentary path. A VMCO structure may be partially or fully embedded within a word line layer of a memory array. |
| US09735198B2 |
Substrate based light emitter devices, components, and related methods
Substrate based light emitter devices, components, and related methods are disclosed. In some aspects, light emitter components can include a substrate and a plurality of light emitter devices provided over the substrate. Each device can include a surface mount device (SMD) adapted to mount over an external substrate or heat sink. In some aspects, each device of the plurality of devices can include at least one LED chip electrically connected to one or more traces and at least one pair of bottom contacts adapted to mount over a surface of external substrate. The component can further include a continuous layer of encapsulant disposed over each device of the plurality of devices. Multiple devices can be singulated from the component. |
| US09735197B1 |
Image sensor including a transfer transistor having a vertical channel and pixel transistors having thin film channels
Image sensors are provided. The image sensor may include a photodiode formed in a substrate, a lower interlayer dielectric layer formed over the substrate, a drive transistor gate electrode formed over the lower interlayer dielectric layer, and a transfer transistor gate electrode including an upper portion and a lower portion. The upper portion of the transfer transistor gate electrode may be formed over the drive transistor gate electrode. The lower portion of the transfer transistor gate electrode may be formed in a pillar shape and vertically extends from the upper portion of the transfer transistor gate electrode through the drive transistor gate electrode and the lower interlayer dielectric layer into the substrate. |
| US09735196B2 |
Photosensitive capacitor pixel for image sensor
A method of fabricating a pixel array includes forming a transistor network along a frontside of a semiconductor substrate. A contact element is formed for every pixel in the pixel array that is electrically coupled to a transistor within the transistor network. An interconnect layer is formed upon the frontside to control the transistor network with a dielectric that covers the contact element. A cavity is formed in the interconnect layer. A conductive layer is formed along cavity walls of the cavity and a dielectric layer is formed over the conductive layer within the cavity. A photosensitive semiconductor material is deposited over the dielectric layer within the cavity. An electrode cavity is formed that extends into the contact element. The electrode cavity is at least partially filled with a conductive material to form an electrode. The electrode, the conductive layer, and the photosensitive semiconductor material form a photosensitive capacitor. |
| US09735189B2 |
Image sensor with solar cell function and electronic device thereof
A unit pixel element that acts as an image sensor or a solar cell according to the present invention comprises a photo detector that drives a photocurrent flow, induced by light incident onto the gate, along the channel between the source and the drain; a first switch that is wired and switched on or switched off between the source terminal of the photo detector and the first solar cell bus; and a second switch that is wired and switched on or switched off between the gate terminal of the photo detector and the second solar cell bus, and features a function of light energy harvesting and high-efficiency photoelectric conversion that generates and supplies effective electric power. |
| US09735188B2 |
Image sensor with solar cell function
A unit pixel element that acts as an image sensor or a solar cell according to the present invention comprises a photo detector that drives a photocurrent flow, induced by light incident onto the gate, along the channel between the source and the drain; a first switch that is wired and switched on or switched off between the source terminal of the photo detector and the first solar cell bus; and a second switch that is wired and switched on or switched off between the gate terminal of the photo detector and the second solar cell bus, and features a function of light energy harvesting and high-efficiency photoelectric conversion that generates and supplies effective electric power. |
| US09735183B2 |
TFT flat sensor and manufacturing method therefor
A method of manufacturing a thin film transistor flat sensor that includes depositing a first metal film on a substrate and forming a common electrode on the substrate with one patterning process; successively depositing an insulating film and a second metal film on the substrate having the common electrode formed thereon, and forming a gate electrode by applying one pattering process to the second metal film; applying one patterning process to the deposited insulating film to form a common electrode insulating layer, wherein a first via hole is formed in the common electrode insulating layer at a location corresponding to the common electrode; depositing a transparent conductive film on the substrate having the common electrode, and forming a first conductive film layer, acting as one polar plate of a storage capacitor, on the common electrode and the gate electrode with one patterning process. |
| US09735181B2 |
Array substrate and method of manufacturing the same, display panel, and display device
An array substrate and a method of manufacturing the same, a display panel and a display device are disclosed. The array substrate includes: a base substrate, and a first conductive layer, a first insulation layer, a semiconductor layer, a second conductive layer, a second insulation layer, and a third conductive layer that are sequentially formed on the base substrate. The first conductive layer includes a gate electrode pattern, the semiconductor layer includes an active area pattern, and the second conductive layer includes a source-drain electrode pattern; the second insulation layer is provided with a connection via hole between the third conductive layer and the second conductive layer; and the semiconductor layer further includes a spacing pad pattern in a region where the connection via hole is provided. |
| US09735177B2 |
Array substrate, method for manufacturing the same and display device
The present invention provides an array substrate, a method for manufacturing the same and a display device, and relates to technical field of displays. The method for manufacturing an array substrate comprises forming a metal layer on a substrate and removing superficial metallic oxide on the metal layer by a washing process. The method for manufacturing an array substrate according to the present inversion can remove the superficial metal oxide on the metal layer and improve the performance of a TFT. |
| US09735176B2 |
Stacked nanowires with multi-threshold voltage solution for PFETS
A threshold voltage tuning approach for forming a stacked nanowire gate-all around pFET is provided. In the present application, selective condensation (i.e., oxidation) is used to provide a threshold voltage shift in silicon germanium alloy nanowires. The threshold voltage shift is well controlled because both underlying parameters which govern the final germanium content, i.e., nanowire width and amount of condensation, are well controlled by the selective condensation process. The present application can address the problem of width quantization in stacked nanowire FETs by offering various device options. |
| US09735172B2 |
Method to match SOI transistors using a local heater element
An integrated circuit with a matched transistor pair with a matching resistance heater coupled to each transistor of the matched transistor pair. A method for forming a matching resistance heater. A method for operating an SOI integrated circuit containing a matched transistor pair with a matching resistance heater coupled to each transistor of the matched transistor pair. |
| US09735171B2 |
Semiconductor memory device and method of manufacturing the same
According to an embodiment, a semiconductor memory device includes a plurality of control gate electrodes, a semiconductor layer, and a charge accumulation layer. The plurality of control gate electrodes are provided as a stack above a substrate. The semiconductor layer has as its longitudinal direction a direction crossing the substrate, and faces the plurality of control gate electrodes. The charge accumulation layer is positioned between the control gate electrode and the semiconductor layer. A gap is provided between the semiconductor layer and a lower end portion of the charge accumulation layer. |
| US09735161B2 |
Memory device and fabricating method thereof
A memory device and a method for fabricating the same are provided. The memory device includes a substrate, a first active region, a second active region, a gate structure, and a capping layer. The first active region and the second active region are alternately disposed in the substrate. The gate structure is disposed in the substrate and between the first active region and the second active region. The capping layer is over the gate structure to define a void therebetween. |
| US09735152B2 |
Non-planar structure with extended exposed raised structures and same-level gate and spacers
A starting non-planar semiconductor structure is provided having a semiconductor substrate, raised semiconductor structures coupled to the substrate, and a layer of isolation material(s) surrounding the raised structures. The isolation layer is recessed to expose about 40 nm to about 70 nm of the raised structures. The increased height of the exposed raised structures, compared to conventional, allows for a taller gate and taller spacers, which reduces undercut under the spacers and short-channel effects from the loss of isolation material in fabrication. |
| US09735149B2 |
Schottky barrier diode
An SBD includes a semiconductor substrate; an anode electrode which is in Schottky contact with a front surface of the semiconductor substrate; and a cathode electrode which is in ohmic contact with a rear surface of the semiconductor substrate. A trench extending from the front surface of the semiconductor substrate toward the rear surface of the semiconductor substrate is provided in the semiconductor substrate, and an inner surface of the trench is covered with an insulating film. An insulating layer is deposited at a deep portion of the trench, and a conductive layer is deposited at a shallow portion of the trench. An n-type front surface region in contact with the anode electrode, an n-type rear surface region in contact with the cathode electrode, and an n-type intermediate region connecting the front surface region and the rear surface region are provided in the semiconductor substrate. |
| US09735147B2 |
Fast and stable ultra low drop-out (LDO) voltage clamp device
In one general aspect, an apparatus can include a junction-less, gate-controlled voltage clamp device having a gate terminal coupled to a voltage reference device. |
| US09735142B2 |
Method of forming a protecting element comprising a first high concentration impurity region separated by an insulating region of a substrate
With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n+-type region—insulating region—second n+-type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second n+ regions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance. |
| US09735141B2 |
Compound semiconductor transistor with gate overvoltage protection
A transistor device includes a compound semiconductor body, a drain disposed in the compound semiconductor body and a source disposed in the compound semiconductor body and spaced apart from the drain by a channel region. A gate is provided for controlling the channel region. The transistor device further includes a gate overvoltage protection device connected between the source and the gate, the gate overvoltage protection device including p-type and n-type silicon-containing semiconductor material. |
| US09735138B2 |
Integrated circuit package and method of making the same
A method of making an integrated circuit package includes: (a) forcing a circuit layered structure that includes a metal substrate and a circuit pattern, the metal substrate having opposite first and second surfaces, the circuit pattern including at least two spaced apart die contacts that protrude from the first surface of the metal substrate, the metal substrate directly interconnecting the die contacts; (b) bonding first and second terminal contacts of an electronic die to the die contacts, respectively; and (c) forming an insulator layer on the first surface of the metal substrate to encapsulate the die and the die contacts after step (b). |
| US09735133B2 |
Light-emitting device and lighting device provided with the same
A light-emitting device capable of ensuring an electric connection between a light-emitting element and an electrode without generating any problem in practical use, by both connecting methods with a solder and a connector, and a lighting device provided with the light-emitting device are provided. The light-emitting device according to the present invention has a plurality of LED chips, and a soldering electrode land and a connector connecting electrode land electrically connected to the chips, on a ceramic substrate. The soldering electrode land is formed of a first conductive material having a function to prevent diffusion to a solder, and the connector connecting electrode land is formed of a second conductive material having a function to prevent oxidation. |
| US09735131B2 |
Multi-stack package-on-package structures
A package includes a first device die, and a first encapsulating material encapsulating the first device die therein. A bottom surface of the first device die is coplanar with a bottom surface of the first encapsulating material. First dielectric layers are underlying the first device die. First redistribution lines are in the first dielectric layers and electrically coupling to the first device die. Second dielectric layers are overlying the first device die. Second redistribution lines are in the second dielectric layers and electrically coupling to the first redistribution lines. A second device die is overlying and electrically coupling to the second redistribution lines. No solder region connects the second device die to the second redistribution lines. A second encapsulating material encapsulates the second device die therein. A third device die is electrically coupled to the second redistribution lines. A third encapsulating material encapsulates the third device die therein. |
| US09735127B2 |
Semiconductor device and electronic device
An improvement is achieved in the reliability of a semiconductor device. Over a die pad, first and second semiconductor chips are mounted. The first and second semiconductor chips and a part of the die pad are sealed in a sealing portion. The first semiconductor chip includes a power transistor. The second semiconductor chip controls the first semiconductor chip. The thickness of the portion of the die pad over which the first semiconductor chip is mounted is smaller than the thickness of the portion of the die pad over which the second semiconductor chip is mounted. |
| US09735126B2 |
Solder alloys and arrangements
A solder alloy is providing, the solder alloy including zinc, aluminum, magnesium and gallium, wherein the aluminum constitutes by weight 8% to 20% of the alloy, the magnesium constitutes by weight 0.5% to 20% of the alloy and the gallium constitutes by weight 0.5% to 20% of the alloy, the rest of the alloy including zinc. |
| US09735124B2 |
Semiconductor structure and method of fabricating the same
The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved. |
| US09735122B2 |
Flip chip package structure and fabrication process thereof
Disclosed herein are various chip packaging structures and methods of fabrication. In one embodiment, a flip chip package structure can include: (i) a pad on a chip; (ii) an isolation layer on the chip and the pad, where the isolation layer includes a through hole that exposes a portion of an upper surface of the pad; (iii) a metal layer on the pad, where the metal layer fully covers the exposed upper surface portion of the pad; and (iv) a bump on the metal layer, where side edges of the bump do not make contact with the isolation layer. |
| US09735121B2 |
Semiconductor chip, semiconductor package including the same, and method of fabricating the same
A semiconductor chip and/or a semiconductor package including the same are disclosed. The semiconductor chip may include an integrated circuit on a substrate, a center pad electrically connected to the integrated circuit, a lower insulating structure on the center pad and having a contact hole exposing the center pad, the lower insulating structure including a plurality of lower insulating layers sequentially stacked on the substrate, a conductive pattern including a contact portion, a pad portion, a conductive line portion, the contact portion filling the contact hole, the pad portion including a test region and a bonding region, a conductive line portion on the lower insulating structure and connecting the contact portion to the pad portion, and an upper insulating structure on the conductive pattern and having a first opening exposing the pad portion, and the upper insulating structure including an upper insulating layer and a polymer layer. |
| US09735118B2 |
Antennas and waveguides in InFO structures
A method includes forming a first metal plate, forming a metal ring aligned to peripheral regions of the first metal plate, and placing a device die level with the metal ring, encapsulating the device die and the metal ring in an encapsulating material. The method further includes filling a dielectric material into a space encircled by the metal ring, and forming a second metal plate covering the dielectric material and the metal ring, with an opening formed in the second metal plate. A plurality of redistribution lines is formed, with one of the redistribution lines overlapping a portion of the opening. The first metal plate, the metal ring, the second metal plate, and the dielectric material in combination form an antenna or a waveguide. The redistribution line forms a signal-coupling line of the passive device. |
| US09735113B2 |
Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP
A semiconductor device has a first semiconductor die stacked over a second semiconductor die which is mounted to a temporary carrier. A plurality of bumps is formed over an active surface of the first semiconductor die around a perimeter of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and carrier. A plurality of conductive vias is formed through the encapsulant around the first and second semiconductor die. A portion of the encapsulant and a portion of a back surface of the first and second semiconductor die is removed. An interconnect structure is formed over the encapsulant and the back surface of the first or second semiconductor die. The interconnect structure is electrically connected to the conductive vias. The carrier is removed. A heat sink or shielding layer can be formed over the encapsulant and first semiconductor die. |
| US09735110B2 |
Semiconductor device and semiconductor device manufacturing method
A semiconductor device according to the present invention includes a semiconductor substrate, and an interlayer dielectric film, formed on the semiconductor substrate, having a multilayer structure of a compressive stress film and a tensile stress film. |
| US09735109B2 |
Semiconductor device and semiconductor device manufacturing method
To restrict the deterioration of properties in a semiconductor device due to hydrogen, provided is a semiconductor device including a semiconductor substrate; a hydrogen absorbing layer that is provided above a top surface of the semiconductor substrate and formed of a first metal having a hydrogen absorbing property; a nitride layer that is provided above the hydrogen absorbing layer and formed of a nitride of the first metal; an alloy layer that is provided above the nitride layer and formed of an alloy of aluminum and a second metal; and an electrode layer that is provided above the alloy layer and formed of aluminum. A pure metal layer of the second metal is not provided between the electrode layer and the nitride layer. |
| US09735108B2 |
Line structure and a method for producing the same
A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole. |
| US09735107B2 |
Contact structure and formation thereof
A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure. The annealed cobalt plug is formed by annealing a cobalt plug at a first temperature for a first duration, while exposing the cobalt plug to a first gas. The repaired lattice structure of the annealed cobalt plug is more regular or homogenized as compared to a cobalt plug that is not so annealed, such that the annealed cobalt plug has a relatively increased conductivity or reduced resistivity. |
| US09735105B2 |
Integrated secure device
According to an example aspect of the present invention, there is provided an apparatus comprising a silicon layer comprising security circuitry and a first part of a first sensor, an insulator layer attached on the silicon layer, comprising integrated therein a second part of the first sensor, and a conducting pathway coupling the security circuitry to the first sensor, comprising a portion extending on the insulator layer and portions extending at least partly through the insulator layer. |
| US09735103B1 |
Electrical antifuse having airgap or solid core
An antifuse structure including an opening through a dielectric material to a contact surface and an antifuse material layer present within the opening. The antifuse material layer may be a phase change material alloy of tantalum and nitrogen, wherein at least a base surface of the antifuse material layer is present on the contact surface and sidewall surfaces of the antifuse material layer are present on sidewalls of the opening through the dielectric material. An airgap or solid material core may be in the opening atop the base surface of the phase change material alloy. An electrically conductive material may be in direct contact with at least the antifuse material layer. |
| US09735100B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device according to the present invention includes a plurality of semiconductor chips, a plate electrode disposed on the plurality of semiconductor chips for connecting the plurality of semiconductor chips, and an electrode disposed on the plate electrode. The electrode has a plurality of intermittent bonding portions to be bonded to the plate electrode and a protruded portion which is protruded erectly from the bonding portions. The protruded portion has an ultrasonic bonding portion which is parallel with the bonding portion and is ultrasonic bonded to an external electrode. |
| US09735098B2 |
Wiring substrate and semiconductor device
A wiring substrate including an insulation layer, a connection terminal projecting from an upper surface of the insulation layer, a protective insulation layer formed on the upper surface of the insulation layer covering a lower side surface of the connection terminal, and a cover layer covering an upper side surface and an upper surface of the connection terminal exposed from the protective insulation layer. The protective insulation layer includes an upper surface defining a protrusion bulged upward around the connection terminal. The protrusion includes a peak, a first slope inclined downward from the peak and extending toward the connection terminal, and a second slope inclined downward from the peak and extending away from the connection terminal. The cover layer further covers the first slope, the peak, and a part of the second slope. |
| US09735097B1 |
Package substrate, method for making the same, and package structure having the same
A package substrate includes a first conductive wire layer having a first end portion and a second end portion opposite to the first end portion. A width of the first end portion is greater than that of the second end portion. An isolating layer covers the second end portion and contains the first conductive wire layer. The isolating layer defines blind holes which have conductive portions. A second conductive wire layer covers the isolating layer, and includes a third end portion facing the second end portion and a fourth end portion opposite to the third end portion. A width of the third end portion is greater than that of the fourth end portion. Solder mask layers are formed on the first conductive wire layer and on the second conductive wire layer, each solder mask layer defining an opening. |
| US09735096B1 |
Lead frame and method for manufacturing the same
A metal plate 1 to be a lead frame has a plating with Sn or Zn or a plating with various alloys containing these metals only on the side faces and half-etched faces 6, and a noble metal plating layer formed on the front surface as a surface on which a semiconductor device is to be mounted. |
| US09735089B2 |
Thermal management for flexible integrated circuit packages
Disclosed herein are systems and methods for thermal management of a flexible integrated circuit (IC) package. In some embodiments, a flexible IC package may include a flexible substrate material; a component disposed in the flexible substrate material; a channel disposed in the flexible substrate material forming a closed circuit and having a portion proximate to the component; electrodes disposed in the flexible substrate material and positioned at locations proximate to the channel, wherein the electrodes are coupled to an electrode controller to selectively cause one or more of the electrodes to generate an electric field; and an electrolytic fluid disposed in the channel. In some embodiments, a flexible IC package may be coupled to a wearable support structure. Other embodiments may be disclosed and/or claimed. |
| US09735083B1 |
Adjustable heat sink fin spacing
A heat sink includes a heat sink base, a first fin, and a second fin. The spacing between the base and the first fin and the second fin, restively, may be adjusted by rotating a threaded rod. The threaded rod includes a first threaded knurl that is engaged with the first fin and a second threaded knurl that is engaged with the second fin. The thread pitch of the first threaded knurl and the second threaded knurl may differ. For example, the pitch of the first threaded knurl may be smaller than the pitch of the second threaded knurl if the first fin is located nearest the heat sink base relative to the second fin. The spacing of the heat sink fins may be adjusted based upon the current operating conditions of the electronic device to maintain an optimal temperature of a heat generating device during device operation. |
| US09735081B2 |
Semiconductor device
A semiconductor device capable of carrying out temperature detection appropriately by a temperature sensor is provided. In a semiconductor device disclosed herein, a first width of a first portion within a front surface insulating film (that is, part located in an upper part of an active region among a part extending along a first side of a front surface electrode that is closer to the temperature sensor) is wider than a second width of a second portion within the front surface insulating film (that is, part located in the upper part of the active region among a part extending along a second side of the front surface electrode). |
| US09735080B2 |
Single-layer wiring package substrate, single-layer wiring package structure having the package substrate, and method of fabricating the same
A single-layer wiring package substrate and a method of fabricating the same are provided, the method including: forming on a carrier a wiring layer having a first surface and a second surface opposing the first surface and being in contact with the carrier; forming on the carrier and on the wiring layer a dielectric body that has a first side having a first opening, from which a portion of the wiring layer is exposed, and a second side opposing the first side and disposed at the same side as the second surface of the wiring layer; and removing the carrier, with the second side of the dielectric body and the second surface of the wiring layer exposed. Therefore, a coreless package substrate is fabricated, and the overall thickness and cost of the substrate are reduced. |
| US09735077B1 |
Heterogeneous miniaturization platform
A method of forming an electrical device is provided that includes forming microprocessor devices on a microprocessor die; forming memory devices on an memory device die; forming component devices on a component die; and forming a plurality of packing devices on a packaging die. Transferring a plurality of each of said microprocessor devices, memory devices, component devices and packaging components to a supporting substrate, wherein the packaging components electrically interconnect the memory devices, component devices and microprocessor devices in individualized groups. Sectioning the supporting substrate to provide said individualized groups of memory devices, component devices and microprocessor devices that are interconnected by a packaging component. |
| US09735072B2 |
Method for producing a plurality of measurement regions on a chip, and chip with measurement regions
A a chip and a method for producing the chip with a plurality of measurement regions which are provided with electrodes for electrically detecting reactions in which, in order to reliably separate the individual measurement regions from one another, a monolayer of a fluorosilane is formed on the chip surface which has strongly hydrophobic properties. Therefore, during spotting with a liquid, the drops of liquid applied by spotting can be reliably prevented from coalescing, and thus, causing mixing of the substances in the drops of liquid which are supposed to be immobilized in the measurement regions. |
| US09735069B2 |
Method and apparatus for determining process rate
A method for dry processing a substrate in a processing chamber is provided. The substrate is placed in the processing chamber. The substrate is dry processed, wherein the dry processing creates at least one gas byproduct. A concentration of the at least one gas byproduct is measured. The concentration of the at least one gas byproduct is used to determine processing rate of the substrate. |
| US09735068B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes receiving film thickness distribution data of a polished first insulating film of a substrate; calculating processing data for reducing a difference between a film thickness at a center side of the substrate and a film thickness at a periphery side of the substrate, based on the film thickness distribution data; loading the substrate into a process chamber; supplying a process gas to the substrate; and correcting a film thickness of the first insulating film based on the processing data by activating the process gas so that a concentration of active species of the process gas generated at the center side of the substrate differs from a concentration of active species of the process gas generated at the periphery side of the substrate. |
| US09735061B1 |
Methods to form multi threshold-voltage dual channel without channel doping
Methods to form multi Vt channels, including a single type of WF material, utilizing lower annealing temperatures and the resulting devices are disclosed. Embodiments include providing an interfacial-layer on a semiconductor substrate; forming a first high-k dielectric-layer on the interfacial-layer; forming a second high-k dielectric-layer and a first cap-layer, respectively, on the first high-k dielectric-layer; removing the second high-k dielectric and first cap layers in first and second regions; forming a second cap-layer on the first high-k dielectric-layer in the first and second regions and on the first cap-layer in a third region; performing an annealing process; removing the second cap-layer from all regions and the first cap-layer from the third region; forming a third high-k dielectric-layer over all regions; forming a work-function composition-layer and a barrier-layer on the third high-k dielectric-layer in all regions; removing the barrier-layer from the first region; and forming a gate electrode over all regions. |
| US09735055B2 |
Electronic circuit unit and method of manufacturing electronic circuit unit
An electronic circuit unit includes a circuit substrate having a rectangular shape and is obtained by cutting an integral substrate along a vertical cut line and a horizontal cut line to be separated; a copper foil land soldered to components; and a substrate outer edge, which is formed by cutting, of two sides orthogonal to each other. The copper foil land and the substrate outer edge are positioned in the vicinity of a corner of the circuit substrate. Solder resist is provided around the copper foil land. A plurality of substrate exposure portions without the solder resist is provided in the vicinity of the substrate outer edge. |
| US09735054B2 |
Gate tie-down enablement with inner spacer
A method for forming a gate tie-down includes opening up a cap layer and recessing gate spacers on a gate structure to expose a gate conductor; forming inner spacers on the gate spacers; etching contact openings adjacent to sides of the gate structure down to a substrate below the gate structures; and forming trench contacts on sides of the gate structure. An interlevel dielectric (ILD) is deposited on the gate conductor and the trench contacts and over the gate structure. The ILD is opened up to expose the trench contact on one side of the gate structure and the gate conductor. A second conductive material provides a self-aligned contact down to the trench contact on the one side and to form a gate contact down to the gate conductor and a horizontal connection within the ILD over an active area between the gate conductor and the self-aligned contact. |
| US09735051B2 |
Semiconductor device interconnect structures formed by metal reflow process
Methods are devices are provided in which interconnection structures are formed using metal reflow techniques. For example, a method to fabricate a semiconductor device includes forming an opening in an ILD (inter-level dielectric) layer. The opening includes a via hole and a trench. A layer of diffusion barrier material is deposited to cover the ILD layer and to line the opening with the diffusion barrier material. A layer of first metallic material is deposited on the layer of diffusion barrier material to cover the ILD layer and to line the opening with the first metallic material. A reflow process is performed to allow the layer of first metallic material to reflow into the opening and at least partially fill the via hole with the first metallic material. A layer of second metallic material is deposited to at least partially fill a remaining portion of the opening in the ILD layer. |
| US09735048B2 |
Semiconductor device and fabricating process for the same
A semiconductor device and a fabricating process for the same are provided. The semiconductor device includes a base layer having a part of a reactive material; and a self-assembled protecting layer of a self-assembled molecule reacting with the reactive material formed over the part. |
| US09735046B2 |
Semiconductor device manufacturing method and storage medium
A method of manufacturing a semiconductor device includes preparing a substrate having an interlayer insulating film and a hard mask provided on the interlayer insulating film and having a predetermined pattern, etching the interlayer insulating film to form a trench, forming a MnOx film through an ALD method in a state where the hard mask is left on the interlayer insulating film, the MnOx film being turned into a self-forming barrier film by reacting with the interlayer insulating film, performing a hydrogen radical processing on the MnOx film, forming a Ru film through a CVD method, forming a Cu-based film through a PVD method or by forming a Cu seed through the PVD method, and then performing a Cu plating processing so as to embed the Cu-based film within the trench, and performing a CMP method to remove the hard mask and to form a Cu wiring. |
| US09735042B2 |
Dielectric punch-through stoppers for forming FinFETs having dual Fin heights
A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate. |
| US09735039B2 |
Apparatus for separating wafer from carrier
An apparatus for separating a wafer from a carrier includes a platform having an upper surface, a tape feeding unit, a first robot arm, and a controller coupled to the platform. The controller is configured to mount a wafer frame, by using the tape feeding unit, on a wafer of a wafer assembly on the upper surface of the platform. The wafer assembly includes the wafer, a carrier, and a layer of wax between the wafer and the carrier. The controller is also configured to heat the upper surface of the platform to a predetermined temperature and separate, by the first robot arm, the wafer and the wafer frame mounted thereon from the carrier. |
| US09735037B2 |
Locally heated multi-zone substrate support
Embodiments of the present disclosure provide an electrostatic chuck (ESC) having azimuthal temperature control. In one embodiment, the electrostatic chuck includes an insulating base, a dielectric layer disposed on the insulating base, the dielectric layer having a substrate supporting surface, a plurality of heating elements coupled to the insulating base, and a first set of electrodes and a second set of electrodes, wherein the plurality of heating elements are surrounded by the first set of electrodes and the second set of electrodes. |
| US09735031B2 |
Polishing compositions and methods for polishing cobalt films
The present disclosure relates to polishing compositions that can polish Cobalt (Co) films in semiconductor substrates containing a multitude of films including Co, metals, metal oxides and dielectrics. These polishing compositions comprise an abrasive, a weak acid acting as a removal rate enhancer (RRE), a pH adjuster, and an azole-containing corrosion inhibitor (CI). The RRE, pH adjuster and CI have a pKa in the 1-18 range (1 (pKamin) |
| US09735027B2 |
Method for etching organic film
Disclosed is a method for etching an organic film. Plasma of a processing gas containing hydrogen gas and nitrogen gas is generated within a processing container of a plasma processing apparatus that accommodates a workpiece. A partial region of the organic film that is exposed from a hard mask is changed into a denatured region by the generation of the plasma of the processing gas. Subsequently, plasma of a rare gas is generated within the processing container. The denatured region is removed by the plasma of the rare gas, and a substance released from the denatured region is deposited on the surface of the hard mask. In this method, the generation of the plasma of the processing gas and the generation of the plasma of the rare gas are repeated alternately. |
| US09735025B2 |
Etching method
A method of etching a first region including a multilayered film, in which first dielectric films and second dielectric films serving as silicon nitride films are alternately stacked, and a second region including a single-layered silicon oxide film is provided. The etching method includes a first plasma process of generating plasma of a first processing gas containing a fluorocarbon gas and an oxygen gas within a processing vessel of a plasma processing apparatus; and a second plasma process of generating plasma of a second processing gas containing a hydrogen gas, nitrogen trifluoride gas and a carbon-containing gas within the processing vessel. A temperature of an electrostatic chuck is set to a first temperature in the first plasma process, and the temperature of the electrostatic chuck is set to a second temperature lower than the first temperature in the second plasma process. |
| US09735021B2 |
Etching method
An etching method of etching a first region including a multilayered film, in which silicon oxide films and silicon nitride films are alternately stacked, and a second region including a single-layered silicon oxide film is provided. The etching method includes a first plasma process of generating plasma of a first processing gas containing a fluorocarbon gas and an oxygen gas within a processing vessel of a plasma processing apparatus; and a second plasma process of generating plasma of a second processing gas containing a hydrogen gas, nitrogen trifluoride gas, a hydrogen bromide gas and a carbon-containing gas within the processing vessel. A temperature of an electrostatic chuck is set to a first temperature in the first plasma process, and the temperature of the electrostatic chuck is set to a second temperature lower than the first temperature in the second plasma process. |
| US09735018B2 |
Extremely thin package
Techniques for achieving extremely thin package structures are disclosed. In some embodiments, a device comprises an integrated circuit connected to a leadframe or substrate via connections and EMC (Epoxy Molding Compound) surrounding the integrated circuit except at a backside of the integrated circuit and connecting areas via which the integrated circuit is connected to the leadframe or substrate. |
| US09735015B1 |
Fabricating method of semiconductor structure
A method of manufacturing a semiconductor structure, comprising: providing a preliminary structure having a first region and a second region and comprising a plurality of first trenches in the first region; forming a metal layer filling the first trenches covering on the preliminary structure, wherein the metal layer comprises a concave portion in the second region and the concave portion defines an opening; forming a metal nitride layer on the metal layer by an nitride treatment; and performing a planarization process to remove the metal nitride layer and a portion of the metal layer to expose the preliminary structure. |
| US09735014B2 |
Memory device
A method of manufacturing a memory device includes: providing a substrate; forming in a cell region a channel extending in a direction perpendicular to an upper surface of the substrate and a plurality of gate electrode layers and a plurality of insulating layers stacked alternatingly on the substrate to be adjacent to the channel; forming a plurality of circuit elements on the substrate at a peripheral circuit region disposed at a periphery of the cell region; and forming an interlayer insulating layer on the substrate in the cell region and the peripheral circuit region, the interlayer insulating layer including a first, bottom interlayer insulating layer covering the plurality of circuit elements and at least a portion of the plurality of gate electrode layers, and a second, top interlayer insulating layer disposed on the first interlayer insulating layer. |
| US09735012B2 |
Short-channel nFET device
A method of forming a semiconductor device is provided including co-implanting a halo species and carbon in a semiconductor layer with a finite tilt angle with respect to a direction perpendicular to the surface of the semiconductor layer. Furthermore, a semiconductor device is provided including an N-channel transistor comprising a halo region made of a halo species with a dopant profile formed in a semiconductor layer and a carbon species implanted in the semiconductor layer with substantially the same dopant profile as the dopant profile of the halo region. |
| US09735010B1 |
Fabrication of semiconductor fin structures
A semiconductor substrate is a provided and an insulating layer is formed thereon. A cavity structure is formed above the insulating layer, including a lateral growth channel and a fin seed structure arranged in the lateral growth channel. The fin seed structure provides a seed surface for growing a fin structure. One or more first semiconductor structures of a first semiconductor material and one or more second semiconductor structures of a second, different, semiconductor material are grown sequentially in the growth channel from the seed surface in an alternating way. The first semiconductor structures provide a seed surface for the second semiconductor structures and the second semiconductor structures provide a seed surface for the first semiconductor structures. The second semiconductor structures are selectively etched, thereby forming the fin structure comprising a plurality of parallel fins of the first semiconductor structures. Corresponding semiconductor structures are also included. |
| US09735001B2 |
Ion trap with parallel bar-electrode arrays
The invention “Ion Trap Array (ITA)” pertains generally to the field of ion storage and analysis technologies, and particularly to the ion storing apparatus and mass spectrometry instruments which separate ions by its character such as mass-to-charge ratio. The aim of this invention is providing an apparatus for ion storage and analysis comprising at least two or more rows of parallel placed electrode array wherein each electrode array includes at least two or more parallel bar-shaped electrodes, by applying different phase of alternating current voltages on different bar electrodes to create alternating electric fields inside the space between two parallel electrodes of different rows of electrode arrays, multiple linear ion trapping fields paralleled constructed in the space between the different rows of electrode arrays which are open to adjacent each other without a real barrier. This invention also provides a method for ion storage and analysis involving with the trapping, cooling and mass-selected analyzing of ions by this apparatus mentioned which constructs multiple conjoint linear ion trapping fields in the space between the different rows of electrode arrays. |
| US09735000B2 |
Methods, apparatus, and system for mass spectrometry
A miniature, low cost mass spectrometer capable of unit resolution over a mass range of 10 to 50 AMU. The mass spectrometer incorporates several features that enhance the performance of the design over comparable instruments. An efficient ion source enables relatively low power consumption without sacrificing measurement resolution. Variable geometry mechanical filters allow for variable resolution. An onboard ion pump removes the need for an external pumping source. A magnet and magnetic yoke produce magnetic field regions with different flux densities to run the ion pump and a magnetic sector mass analyzer. An onboard digital controller and power conversion circuit inside the vacuum chamber allows a large degree of flexibility over the operation of the mass spectrometer while eliminating the need for high-voltage electrical feedthroughs. The miniature mass spectrometer senses fractions of a percentage of inlet gas and returns mass spectra data to a computer. |
| US09734998B2 |
AC gate ion filter method and apparatus
The present invention uses an AC voltage instead of DC voltage on an ion gate to filter/selectively pass ions. The ions that pass through the AC ion gate can be further separated in a spectrometric instrument. An ion mobility spectrometer using the AC ion gate can achieve better gating performance. For a time of flight ion mobility spectrometer with an AC ion gate, a narrow pulse of selected ions can be passed into a drift tube where they are separated based on their low field ion mobility. Moreover, when the AC voltage at the AC ion gate has a waveform as used for differential ion mobility spectrometry, the time of flight ion mobility spectrometer is converted into a two dimensional separation spectrometer, where ions are first separated based on their high field ion mobility and then further separated based on their low field ion mobility. |
| US09734990B2 |
Plasma apparatus and substrate-processing apparatus
Provided are a plasma generating apparatus and a substrate processing apparatus. The plasma generating apparatus includes a plurality of dielectric tubes mounted in a plurality of through-holes formed in a vacuum container, respectively; antennas comprising or divided into a first group of antennas and a second group of antennas based on their disposition symmetry in the vacuum container and mounted outside the dielectric tubes, respectively; a first RF power source to supply power to the first group of antennas; a second RF power source to supply power to the second group of antennas; and a first power distribution unit disposed between the first group of antennas and the first RF power source to distribute the power from the first RF power source to the first group of antennas. |
| US09734989B2 |
Method for manufacturing semiconductor device, ion beam etching device, and control device
A film thickness distribution exists in a substrate plane after CMP step. This film thickness distribution results in, for example, variation in gate threshold value voltages of metal gates, and causes variation in element characteristics. It is an object of the present invention to easily improve the film thickness distribution processed by this CMP step.By using the ion beam etching method after the CMP step, the film thickness distribution in the plane of the substrate 111 is corrected. More specifically, when the ion beam etching is performed, the plasma density in the plasma generation chamber 102 is caused to be different between a position facing a central portion in the plane of the substrate 111 and a position facing an outer peripheral portion, so that the etching rate in the central portion in the plane of the substrate 111 and the etching rate in the outer peripheral portion in the substrate plane 111 are caused to be different. |
| US09734988B2 |
Exposure apparatus and exposure method
To form a complex and fine pattern by combining optical exposure technology and charged particle beam exposure technology, provided is an exposure apparatus that radiates a charged particle beam at a position corresponding to a line pattern on a sample, including a beam generating section that generates a plurality of the charged particle beams at different irradiation positions in a width direction of the line pattern; a scanning control section that performs scanning with the irradiation positions of the charged particle beams along a longitudinal direction of the line pattern; a selecting section that selects at least one charged particle beam to irradiate the sample from among the plurality of charged particle beams, at a designated irradiation position in the longitudinal direction of the line pattern; and an irradiation control section that controls the at least one selected charged particle beam to irradiate the sample. |
| US09734982B1 |
Beam current density distribution adjustment device and ion implanter
A beam current density distribution adjustment device is provided. The device includes member pairs in a long side direction of a ribbon beam, the member pairs adjusting a beam current density distribution in the long side direction of the ribbon beam by using an electric field or a magnetic field, members of each of the member pairs being disposed with the ribbon beam in-between the members. Opposing surfaces of the member pairs adjacent to each other in the long side direction of the ribbon beam are partially not parallel to a traveling direction of the ribbon beam. |
| US09734980B2 |
Graphene serving as cathode of X-ray tube and X-ray tube thereof
Graphene serving as the cathode of an X-ray tube, and a high-efficiency graphene cathode field emission X-ray tube. The graphene cathode field emission X-ray tube is high in conversion efficiency and less in stray radiation, reduces radiation dosage acting upon human body when used in the fields of medical treatment, security inspection and the like; the graphene cathode field emission X-ray tube is easy to realize a micro-focus X-ray tube, strong in emissive power and high in voltage resistance, and can be applied to the fields of semiconductor detection, industrial flaw detection and the like; in addition, the graphene cathode field emission X-ray tube is good in controllability, free from cathode heating. The graphene cathode field emission X-ray tube also has the characteristics of good stability and long service life. |
| US09734979B2 |
X-ray apparatus and a CT device having the same
The present application provides a curved surface array distributed x-ray apparatus, characterized in that, it comprises: a vacuum box which is sealed at its periphery, and the interior thereof is high vacuum; a plurality of electron transmitting units arranged on the wall of the vacuum box in multiple rows along the direction of the axis of the curved surface in the curved surface facing the axis; an anode made of metal and arranged in the axis in the vacuum box which comprises an anode pipe and an anode target surface; a power supply and control system having a high voltage power supply connected to the anode, a filament power supply connected to each of the plurality of the electron transmitting units, a grid-controlled apparatus connected to each of the plurality of electron transmitting units, a control system for controlling each power supply. |
| US09734976B2 |
Array of carbon nanotube micro-tip structures
An array of carbon nanotube micro-tip structure includes an insulating substrate and a plurality of patterned carbon nanotube film structures. The insulating substrate includes a surface. The surface includes an edge. A plurality of patterned carbon nanotube film structures spaced from each other. Each of the plurality of patterned carbon nanotube film structures is partially arranged on the surface of the insulating substrate. Each of the plurality of patterned carbon nanotube film structures comprises two strip-shaped arms joined together forming a tip portion protruding and suspending from the edge of the surface of the insulating substrate. Each of the two strip-shaped arms comprises a plurality of carbon nanotubes parallel to the surface of the insulating substrate. |
| US09734968B2 |
Multifunctional selection operation switch apparatus
A multifunctional selection operation switch apparatus includes: an operation member including multiple operated portions and capable of being rotationally operated, the operated portions being capable of selective contact operation; a rotational displacement detecting device capable of detecting rotational displacement of the operation member; an operation target detecting device capable of detecting on which of the operated portions contact operation is performed; and a controlling device outputting a command signal corresponding to the displacement and the one operated portion, based on detection results of the detecting devices. Accordingly, even if the operation member is a single member, multifunctional selection operation can be performed without difficulty by outputting, whenever necessary, a desired command from multiple operation commands. It is not necessary to mechanically and operatively connect the operation member and the operated portions by a structurally-complicated interlocking mechanism, thereby achieving reduction in the number of parts and cost. |
| US09734965B2 |
Arrangement of pushbutton switches with a programmable display
An arrangement of pushbutton switches with a programmable display that has a support structure with an assembly panel with openings for arranging there through an enclosure body of each push-button switch of the arrangement; a printed circuit board; and a shielding plate, wherein the enclosure body of each pushbutton comprises an appendix arranged through through-openings defined in the assembly panel, printed circuit board and plate; and a connector attached to the enclosure body that is opposite to and engaged with a connector of the printed circuit board, wherein each enclosure body is attached to the support structure by removable immobilizing means of said appendix with respect to said shielding plate, the immobilizing means comprising a nut with a coupling configuration to be coupled to a tubular shaft by a respective complementary coupling configuration integrated with or attached to the tubular shaft. |
| US09734964B2 |
Rubber mat keyboard, particularly a silicone mat keyboard
A data input and/or operator control system, particularly a keypad, also a POS keypad, having a lower portion and an upper portion and also at least one printed circuit board and at least one retaining plate. Inside, one or more protective mat(s) made of an elastic material is/are preferably adhesively bonded to the printed circuit board. In this protective mat, the components of the printed circuit board are recessed to as small an extent as possible and air ducts are incorporated in order to ensure that the keys are ventilated in relation to one another. |
| US09734963B2 |
Apparatus, system and method for a side actuator arrangement
An apparatus and system for a side actuator arrangement as well as a substrate, and method of manufacturing, for a side actuator arrangement. The apparatus includes a first part and a second part. The first part is configured to mechanically interlock with an edge of a substrate so as to prevent movement of the apparatus with respect to the substrate in a direction parallel to the edge of the substrate. The second part is configured to receive an actuatable conductive member such that, when the conductive member is actuated, the conductive member is able to be brought into contact with at least a first region of the edge of the substrate. |
| US09734958B2 |
Method for closing a switch and switch for performing the method
An embodiment relates to a method for closing a switch and a switch for performing the method, the switch having a stationary switch contact including a stationary contact face, a movable switch contact including a movable contact face parallel to the stationary contact face and lying under pressure against the stationary contact face in the closed state, and an elastic transversal offset of the contact faces which ensures that pressure is applied when the contact surfaces lie against each other. To guarantee closing during a short-circuit, a displaceable counter-pressure element is provided which presses against the movable contact face in the open position and at least reduces the transversal offset. The counter-pressure element moves in conjunction with the movable switch contact towards the closed position when the switch closes. The counter-pressure element stops moving during the closing movement, while the movable contact face continues to move into the closed position. |
| US09734957B2 |
Disconnector for photovoltaic applications
A disconnector for photovoltaic applications having at least two modular contact boxes, each contact box having a box-like body coupled to a contiguous box-like body of a contiguous modular contact box. The box-like body forms a central seat that accommodates a rotatable contact and two peripheral seats, each of which accommodates a connection portion of a corresponding fixed contact that can be accessed from the outside of the modular contact box. The rotatable contact is able to rotate about the axis of the central seat with respect to the box-like body in order to engage the fixed contacts arranged with their connection portion in the peripheral seats or to disengage from the fixed contacts. |
| US09734953B2 |
Carbon paste and solid electrolytic capacitor element
A carbon paste including a carbon powder, a resin, and an oxygen releasing oxidizer. The amount of the oxidizer is 3 to 30 parts by mass based on 100 parts by mass of the total amount of the carbon powder and the resin. A solid electrolytic capacitor element is prepared by a method which includes making a valve-action metal powder sintered to obtain an anode body, electrolytically oxidizing a surface of the anode body to chemically convert the surface into a dielectric layer, electrolytic polymerization to form a semiconductor layer of an electro conductive polymer on the dielectric layer, applying the carbon paste onto the semiconductor layer, and drying and hardening the carbon paste to form a carbon layer. |
| US09734951B2 |
MEMS electrostatic actuator
A MEMS electrostatic actuator comprises first and second opposing electrode arrangements, wherein at least one of the electrode arrangements is movable. A dielectric material (24) is adjacent the one of the electrode arrangements (22). The second electrode arrangement is patterned such that it includes electrode areas (26) and spaces adjacent the electrode areas, wherein the dielectric material (24) extends at least partially in or over the spaces. The invention uses a multitude of electrode portions as one plate. The electric field lines thus form clusters between the individual electrode portions and the opposing electrode. This arrangement provides an extended range of continuous actuation and tunability. |
| US09734941B2 |
Surface-mount inductor
A surface-mount inductor having a molded body which includes a coil formed by winding a rectangular wire and sealed by sealant having resin and filler, a surface of the molded body being a mounting face, the coil includes: first rolls wound in two-roll arrangement along the winding axis, the ends of the wire being placed at the outermost turn; and second rolls wound in positions adjacent to the first rolls and oppositely shifted along the winding axis, the inner diameter being equal to or larger than the outer diameter of the first rolls, the ends of the wire are brought out from the outermost turn of the second rolls as lead ends which are sealed in a manner that the winding axis is parallel with the mounting face and the lead ends are partially exposed at the mounting face, as well as a method for manufacturing the same. |
| US09734935B2 |
Wire harness
A wire harness comprises one or a plurality of electrically conductive paths, a tubular body into which the one or plurality of electrically conductive paths are to be inserted, and a protector to be engaged with a terminal of the tubular body, wherein the protector has a terminal engagement section to be engaged with the terminal of the tubular body, and a roll prevention portion which serves as an area that is mounted on a predetermined mounting surface without rolling, is formed in the terminal engagement section. |
| US09734934B2 |
Coaxial cable and medical cable using same
A coaxial cable includes a central conductor, and an electrical insulator formed around a circumference of the central conductor. The electrical insulator is made of an electrical insulating tape wrapped and overlapped around the circumference of the central conductor. The electrical insulating tape includes a plurality of voids formed on one outer circumferential surface. |
| US09734932B2 |
Negative dielectric constant material based on ion conducting materials
Metamaterials or artificial negative index materials (NIMs) have generated great attention due to their unique and exotic electromagnetic properties. One exemplary negative dielectric constant material, which is an essential key for creating the NIMs, was developed by doping ions into a polymer, a protonated poly (benzimidazole) (PBI). The doped PBI showed a negative dielectric constant at megahertz (MHz) frequencies due to its reduced plasma frequency and an induction effect. The magnitude of the negative dielectric constant and the resonance frequency were tunable by doping concentration. The highly doped PBI showed larger absolute magnitude of negative dielectric constant at just above its resonance frequency than the less doped PBI. |
| US09734931B2 |
Power-supply cable and apparatus for manufacturing electric wire used for said power-supply cable
It is an objective of the invention to provide a high-power supply cable characterized in that even when mounted in a narrow space where the cable undergoes a repetitive bending motion, any undesirable deformation out of the bending plane is small. There is provided a power-supply cable including: an electric wire including an electrical conductor and a resin sheath covering the electrical conductor, the electric wire having a tendency to generate a curl under a no-load condition, the curl having a curling direction, the curling direction being a normal to the curl, the electric wire having one or more longitudinal ends; a connecting terminal disposed at one of the longitudinal ends of the electric wire; and a curling tendency direction indicator showing the curling direction, the indicator being disposed along a normal line to the curl of the electric wire. |
| US09734930B2 |
Conductive resin composition and display device using the same
Disclosed are a conductive resin composition and a display device using the same. The display device includes a display panel, and a frame having conductivity, in which the display panel is mounted, wherein the frame is formed of a conductive resin composition and the conductive resin composition includes a resin including a polyester copolymer resin, and carbon nanotube (CNT). The conductive resin composition prevents static discharge due to electrical conductivity and improves production efficiency though simplification of the overall manufacturing process. In addition, the conductive resin composition is applicable to thin film molding due to improved moldability and self-extinguishes flames due to flame retardancy. |
| US09734929B2 |
Composition for forming solar cell electrode and electrode prepared using the same
Example embodiments relate to a composition for forming a solar cell electrode, and a solar cell electrode prepared using the composition. The composition for forming a solar cell electrode includes a silver (Ag) powder, a glass frit, and an organic vehicle, wherein the glass frit includes silver (Ag); tellurium (Te); and at least one selected from the group of lithium (Li), sodium (Na), and potassium (K), a molar ratio of the silver (Ag):the tellurium (Te) included in the glass frit is in a range of about 1:0.1 to about 1:50, and a molar ratio of the silver (Ag):lithium (Li), sodium (Na) or potassium (K) is in a range of about 1:0.01 to about 1:10. The solar cell electrode prepared using the composition has excellent fill factor and conversion efficiency due to minimized contact resistance (Rc) and series resistance (Rs). |
| US09734924B2 |
Method and apparatus for suppressing flow-induced jet pump vibration in a boiling water reactor
Flow induced vibration (FIV) at the slip joint between a nuclear reactor jet pump mixer and diffuser is suppressed without installing additional parts or altering the jet pump construction. The disclosed method determines a relationship between reactor operating conditions that trigger FIV and the magnitude of a mixer/diffuser transverse contact load. A mathematical analysis on a representative jet pump configuration determines the quantitative relationship between mixer/diffuser cold positions and their positions when the reactor is operating. Thus, a prediction can be made as to whether an installed jet pump will experience FIV, and the mixer and diffuser can be positioned by a mixer adjustment tool when the reactor is cold to provide the necessary operational transverse contact load. Alternatively, a contact load measuring tool directly measures the magnitude and direction of the cold mixer/diffuser transverse contact load to determine if FIV will be suppressed when the reactor is operating. |
| US09734922B2 |
System and method for operating a modular nuclear fission deflagration wave reactor
Illustrative embodiments provide modular nuclear fission deflagration wave reactors and methods for their operation. Illustrative embodiments and aspects include, without limitation, modular nuclear fission deflagration wave reactors, modular nuclear fission deflagration wave reactor modules, methods of operating a modular nuclear fission deflagration wave reactor, and the like. |
| US09734918B2 |
Shift register and the driving method thereof, gate driving apparatus and display apparatus
The present invention provides a shift register, a driving method, a gate driving apparatus and a display apparatus. Said shift register comprises a pull-up unit, a reset unit, a pull-down unit and a signal output; the pull-up unit is connected to said signal output and pulls up an output signal; the reset unit is connected to a control end of said pull-up unit and said signal output respectively and resets the potential of the control end of said pull-up unit after said output signal is at high level; the pull-down unit is connected to a control end of said pull-up unit and said signal output respectively and pulls down the potential of the control end of said pull-up unit and said output signal after said reset unit has reset the potential of the control end of said pull-up unit, so that said pull-up unit switches off. |
| US09734917B2 |
Current balance circuit and the method thereof
A current balance circuit for a power management device having a first current channel and a second current channel, having: a first current sense circuit configured to detect a current flowing through the first current channel, and to provide a first current sense signal indicative of the current flowing through the first current channel; wherein the current balance circuit draws current from the second current channel to the first current channel based on the first current sense signal. |
| US09734915B2 |
Shielded vertically stacked data line architecture for memory
Apparatuses and methods include an apparatus that includes first and second strings of vertically stacked memory cells, and first and second pluralities of vertically stacked data lines, and the use thereof. A data line of the first plurality of data lines is coupled to the first string through a first select device. A data line of the second plurality of data lines is coupled to the second string through a second select device and is adjacent to the data line coupled to the first string. Such an apparatus can be configured to couple the data line coupled to the first string to a shield potential during at least a portion of a memory operation involving a memory cell of the second string. |
| US09734905B2 |
Non-volatile memory using bi-directional resistive elements
A memory cell includes a first bidirectional resistive memory element (BRME), and a second BRME, a first storage node, and a second storage node. A resistive memory write to the cell includes placing the first BRME and the second BRME in complementary resistive states indicative of the value being written. During a subsequent restoration operation, the value as written in the first BRME and second BRME is written to the first storage node and the second storage node while a wordline connected to the memory cell is deasserted. |
| US09734900B2 |
Memory device architecture
Row electrode drivers and column electrode drivers for a memory device are distributed within a footprint share by a memory cell array. |
| US09734897B1 |
SRAM bitcell structures facilitating biasing of pass gate transistors
Static random access memory (SRAM) bitcell structures with improved minimum operation voltage (Vmin) and yield are provided. The structures may include a silicon substrate, a deep n-well (DNW) layer, p-well (PW) regions, doped back-plate (BP) regions, a buried oxide (BOX) layer, and/or active regions formed on the BOX layer and over portions of the BP regions. At least one BP region may extend below at least one shallow trench isolation (STI) region, at least one contact to back plate (CBP), at least one active region and at least one PC construct overlapping the at least one active region forming a channel of at least one of a first pass gate (PG1) transistor and a second pass gate (PG2) transistor. The at least one CBP facilitates biasing of at least one the PG1 and PG2 transistors during at least one of a read, write or standby operation of the structures. |
| US09734891B2 |
Overvoltage protection for a fine grained negative wordline scheme
A fine grained negative wordline scheme for SRAM memories is disclosed. The scheme includes a circuit having a static random access memory (SRAM) cell including at least a wordline coupled to a plurality of NFETs of a transistor array. The circuit further includes a wordline driver including a plurality of inverters coupled between a wordline group decode node, a power supply and the wordline. Overvoltage on the wordline driver and NFETs of the SRAM cell are eliminated by applying a power gating mode and lowering the power supply voltage. |
| US09734890B1 |
Systems and methods for individually configuring dynamic random access memories sharing a common command access bus
Systems and methods are disclosed for configuring dynamic random access memory (DRAM) in a personal computing device (PCD). An exemplary method includes providing a shared command access (CA) bus in communication with a first DRAM and a second DRAM. A first command from a system on a chip (SoC) is received at the first DRAM and the second DRAM. A decoder of the first DRAM determines whether to mask a mode register write (MRW) in response to the received first command. A second command containing configuration information is received vie the shared CA bus at the first DRAM and the second DRAM. Responsive to the determination by the decoder of the first DRAM, the received MRW is either ignored or implemented by the first DRAM. |
| US09734888B2 |
Address storage circuit and memory and memory system including the same
A memory including a plurality of word lines to which one or more memory cells are coupled, an address storage unit suitable for storing an input address corresponding to a first external signal that is inputted at a random time, and a control unit suitable for activating a word line corresponding to the input address of the plurality of word lines in response to an active command and refreshing one or more target word lines selected using an address stored in the address storage unit when performing a refresh operation. |
| US09734882B2 |
Magnetic memory cells with high write current and read stability
Memory cells and methods of forming thereof are disclosed. The memory cell includes a substrate and first and second select transistors. The first select transistor serves as a write selector and the second select transistor serves as a read selector. The gate of first select transistor is coupled to a write wordline (WL_w) and the gate of the second select transistor is coupled to a read/write wordline (WL_r/w). The source regions of the first and second select transistors are coupled to a source line (SL). A body well is disposed in the substrate. The body well serves as a body of the first and second select transistors. A back bias is applied to the body of the select transistors. A storage element which includes a magnetic tunnel junction (MTJ) element is coupled with a bitline (BL) and the first and the second select transistors. |
| US09734878B1 |
Systems and methods for individually configuring dynamic random access memories sharing a common command access bus
Systems and methods are disclosed for configuring dynamic random access memory (DRAM) in a personal computing device (PCD). An exemplary method includes providing a shared command access (CA) bus in communication with a first DRAM and a second DRAM. A first command from a system on a chip (SoC) is received at the first DRAM and the second DRAM. A decoder of the first DRAM determines whether to mask a mode register write (MRW) in response to the received first command. A second command containing configuration information is received vie the shared CA bus at the first DRAM and the second DRAM. Responsive to the determination by the decoder of the first DRAM, the received MRW is either ignored or implemented by the first DRAM. |
| US09734866B2 |
Perceptual computing input to determine post-production effects
Systems, apparatuses and methods may provide for detecting an event in visual content including one or more of a video or a still image and searching an effects database for a post-production effect that corresponds to the event. Additionally, the post-production effect may be automatically added to the visual content. In one example, adding the post-production effect includes adjusting one or more of a display backlight level or a display position setting of a device that presents the visual content. |
| US09734855B1 |
Data writer gap material with decreased protrusion
A data writer can have at least a write pole separated from a return pole by a non-magnetic lamination. The non-magnetic lamination may consist of first, second, and third non-magnetic materials that are each different and configured to provide a physical protrusion on an air bearing surface of less than 4 Angstroms. |
| US09734854B2 |
Tape heads with sub-ambient pressure cavities
A unidirectional and bi-directional tape head with sub-ambient pressure cavities. The tape head is adapted for reading and/or writing to a magnetic tape. The tape head includes: a tape-bearing surface; a transducer area, having at least one transducer designed for reading and/or writing to the magnetic tape; and a cavity open on the tape-bearing surface adjacent to the transducer area that extends parallel to the transducer area and transversally to the longitudinal direction of circulation of the tape such that an opening of the cavity faces the tape in operation. The cavity is further dimensioned and arranged with respect to the transducer area to create, upon circulation of the tape in operation, sub-ambient pressure therein. The present invention allows for a very close tape-head spacing. |
| US09734851B2 |
Monitoring head wear
A computer system for monitoring head wear includes reading from a cartridge a high frequency pattern and a low frequency pattern, determining a first read amplitude corresponding to the high frequency pattern and a second read amplitude corresponding to the low frequency pattern, and determining a head wear metric according to the first read amplitude and the second read amplitude. |
| US09734847B1 |
Characterizing a sensing circuit of a data storage device
A data storage device is disclosed comprising a disk, a head for accessing the disk, and a sensor for generating an alternating sensor signal. The sensor is disconnected from an input of a sensing circuit and while the sensor is disconnected an alternating calibration signal is injected into the input of the sensing circuit, wherein the alternating calibration signal comprises a predetermined offset and amplitude. A response of the sensing circuit to the alternating calibration signal is evaluated to detect at least one of an offset and a gain of the sensing circuit. |
| US09734846B2 |
Magnetic recording apparatus and controlling method of magnetic recording apparatus
In case of deleting shingle-recorded data on a recording medium, it enables to completely delete the data with the number of writing times less than the number of writing times in data recording. To do so, a magnetic recording apparatus, which records the data on the recording medium in a first direction with a writing unit, controls movement of a relative position of the recording medium and the writing unit such that a quantity of the movement in a second direction perpendicular to the first direction in the data deletion by overwriting another data is larger than a quantity of the movement in the second direction in the data recording. |
| US09734845B1 |
Mitigating effects of electronic audio sources in expression detection
In a speech-based system, a wake word or other trigger expression is used to preface user speech that is intended as a command. The system receives multiple directional audio signals, each of which emphasizes sound from a different direction. The signals are monitored and analyzed to detect the directions of interfering audio sources such as televisions or other types of electronic audio players. One of the directional signals having the strongest presence of speech is selected to be monitored for the trigger expression. If the directional signal corresponds to the direction of an interfering audio source, a more strict standard is used to detect the trigger expression. In addition, the directional audio signal having the second strongest presence of speech may also be monitored to detect the trigger expression. |
| US09734834B2 |
Comfort noise generation
A system for generating comfort noise for a stream of frames carrying an audio signal includes frame characterizing logic configured to generate a set of filter parameters characterising the frequency content of a frame; an analysis filter adapted using the filter parameters and configured to filter the frame so as to generate residual samples; an analysis controller configured to cause the residual samples to be stored in a store responsive to receiving an indication that the frame does not comprise speech; and a synthesis controller operable to select stored residual samples from the store and cause a synthesis filter, inverse to the analysis filter and adapted using filter parameters generated by the frame characterizing logic for one or more frames not comprising speech, to filter the selected residual samples so as to generate a frame of comfort noise. |
| US09734830B2 |
Speech recognition wake-up of a handheld portable electronic device
A system and method for parallel speech recognition processing of multiple audio signals produced by multiple microphones in a handheld portable electronic device. In one embodiment, a primary processor transitions to a power-saving mode while an auxiliary processor remains active. The auxiliary processor then monitors the speech of a user of the device to detect a wake-up command by speech recognition processing the audio signals in parallel. When the auxiliary processor detects the command it then signals the primary processor to transition to active mode. The auxiliary processor may also identify to the primary processor which microphone resulted in the command being recognized with the highest confidence. Other embodiments are also described. |
| US09734829B2 |
Electronic device, control method, and control program
According to one of aspects, an electronic device includes: a microphone; and a controller configured to perform processing based on a result of recognition of voice received by the microphone, wherein the controller is configured to display a list of applications when the processing fails to be performed based on the result of recognition. |
| US09734824B2 |
System and method for applying a convolutional neural network to speech recognition
A system and method for applying a convolutional neural network (CNN) to speech recognition. The CNN may provide input to a hidden Markov model and has at least one pair of a convolution layer and a pooling layer. The CNN operates along the frequency axis. The CNN has units that operate upon one or more local frequency bands of an acoustic signal. The CNN mitigates acoustic variation. |
| US09734820B2 |
System and method for translating real-time speech using segmentation based on conjunction locations
A system, method and computer-readable storage device which balance latency and accuracy of machine translations by segmenting the speech upon locating a conjunction. The system, upon receiving speech, will buffer speech until a conjunction is detected. Upon detecting a conjunction, the speech received until that point is segmented. The system then continues performing speech recognition on the segment, searching for the next conjunction, while simultaneously initiating translation of the segment. Upon translating the segment, the system converts the translation to a speech output, allowing a user to hear an audible translation of the speech originally heard. |
| US09734816B2 |
Noise reduction device
A noise reduction device includes a plurality of noise microphones, noise controller, and control speakers. Noise controller generates a control-sound signal to reduce a noise, at a control center of a control space, with the noise being detected by the plurality of noise microphones. Noise microphone disposed at a shorter distance from the control center than distance “d” indicated by Relational Expression (1) is smaller in number than noise microphones disposed at longer distances than distance “d” where “λ” is a wavelength corresponding to control upper-limit frequency “f” in noise microphones, “d0” is a distance from the control center to control speakers, “t” is a control delay time in control speakers, and “v” is a sound speed. d=d0+t×v−λ/2 (1) |
| US09734811B2 |
Instrument pickup
A optoelectronic pickup for a musical instrument includes at least one light source which directs light to impinge a string of the musical instrument in at least one photoreceiver located to detect the reflected light, so as to generate an electrical signal that is responsive to string vibrations. A number of dissimilar filter approaches are included to control undesired effects of spurious light, the filter approaches may be structure-based, signal processing-based, and/or optics-based. |
| US09734809B2 |
Digital control of the sound effects of a musical instrument
The object of the present invention concerns a control device (100) for a generation module (GM) of sound effects (EFA, EFB) of a musical instrument (MI), such device comprising computer software configured for: —the capture, using a digital camera (10), of at least one digital image (I) comprising at least one portion of the user's (U) face; —processing of such at least one image (I) to define expression data (D_EXi, i being a positive integer) containing information relating to facial expressions (EXa, EXb) of the user (U); —an analysis of such expression data (D_EXi) using a predefined first database (DB1) to determine a sound effect data (D_EFj, j being a positive integer) containing information relating to at least one sound effect (EFA, EFB) corresponding to the facial expression (EXa, EXb) of the user (U). |
| US09734808B2 |
Outdoor musical drum structures
A drum configured for permanent installation in an outdoor environment is presented. The drum comprises a mounting structure configured to permanently engage a mounting surface in the outdoor environment. The drum also comprises a shell coupled to the mounting structure. The drum also comprises a drum head coupled to the shell through use of a plurality of fasteners. The drum head comprises a tuned configuration. The drum structure is configured to be weather resistant. The drum head is configured to maintain the tuning configuration after a period of outdoor exposure. |
| US09734804B1 |
Drop tuner for fulcrum tremolo
The Drop Tuner comprising a pivoting lever element and two ring-like elements in an arrangement operable to quickly alter the position of a macro-tuner or other string tuning element on the instrument body to change the tension of a musical instrument string from one pre-selected pitch to another and back by moving the lever to one of two corresponding adjustable pre-selected positions. “Drop Tuner” refers to an adjustment device added to a string tuner element, macro-tuner or similar, with the capacity to quickly change from one adjustable predetermined pitch to another adjustable predetermined pitch and back comprising at least two adjustable predetermined tensioning positions. |
| US09734798B2 |
Timing-based scheduling for computer-generated animation
A method of scheduling and performing computations for generating an interactive computer-generated animation on behalf of a client device to achieve a desired quality of service includes generating a computational configuration of computations that, when performed, produce the computer-generated animation with the desired quality of service. The configuration includes an identification of a first computation that outputs first data, a first start time for the first computation, and a first end time, where the first computation is to end before the first end time. The configuration also includes an identification of a second computation that depends on the first data, and a second start time for the second computation. The first computation is performed in response to an occurrence of the first start time and the second computation is performed in response to an occurrence of the second start time. |
| US09734795B2 |
Pixel array and driving method thereof, display panel and display device
A pixel array is provided and includes a plurality of pixel groups. Each of the pixel groups includes three sub-pixels disposed to encircle a center point, and each center point is encircled by three sub-pixels in a pixel group in the present row and the present column, one sub-pixel in a pixel group in the present row and the next column, one sub-pixel in a pixel group in the previous row and the previous column and one sub-pixel in a pixel group in the previous row and the next column about it. A driving method for the pixel array, a display panel and a display device including the pixel array are provided. |
| US09734794B2 |
Device and method for driving liquid crystal display
A device for driving a liquid crystal display, in which a pixel voltage is reduced by a kickback voltage variable according to grayscales, includes: a signal controller which receives an input image signal corresponding to a grayscale; an image signal corrector which corrects the input image signal and generates a data input signal; and a data driver which supplies a data voltage corresponding to the grayscale based on the data input signal, where the grayscale includes black, white grayscale and intermediate grayscales, the data voltage includes positive and negative voltages, and when a difference between a sum of the positive and negative voltages and a common voltage is defined an offset value, a first offset value corresponding to the black grayscale, a second offset value corresponding to the white grayscale and a third offset value corresponding to the intermediate grayscale satisfy the inequation: |first offset value−second offset value|≦50 mV. |
| US09734790B2 |
Method of switching button functions and display system with portable device applying the same
A method of switching button functions is disclosed. The method is used for switching the functions of buttons used to operate a display when the portable device is connected to the display. The method includes the following steps of: detecting whether the portable device is connected to the display; if yes, determining whether the functions of the buttons can be switched according to whether a button information is received; if yes, pairing each of the buttons with functions provided by the portable device; and storing a pairing information of each of the buttons and the functions provided by the portable device. |
| US09734785B2 |
Gate driving unit
Provided is a gate driving unit including: a plurality of stages configured to be activated sequentially so as to generate gate signals; and a plurality of repair blocks having sizes smaller than the corresponding stages and configured to repair defects of the stages. Each of the repair blocks is disposed proximate to two or more stages so as to be configured to repair defects in the two or more stages. |
| US09734781B2 |
Gamma curve adjusting method and adjusting device for TFT-LCD to address problems caused by uneven gamma curve
The present disclosure provides a method and a device for adjusting a Gamma curve of TFT-LCD. The method comprises steps of: capturing grayscale images of the TFT-LCD to be tested which are displayed under a series of specific grayscale voltages; calculating grayscale information corresponding to the images according to the captured grayscale images, so as to obtain a Gamma curve; determining an uneven area in the Gamma curve based on the grayscale information corresponding to two adjacent grayscale voltages; calculating depth of the uneven area; and adjusting amplitude of any one or both of the two adjacent grayscale voltages based on the depth so that the Gamma curve between the two adjacent grayscale voltages is even. The present disclosure can improve the Gamma curve, thus eliminating the display color cast or the brightness abnormity. |
| US09734774B2 |
Image signal generating apparatus, liquid crystal display apparatus, method of generating image signal and storage medium storing image signal generating program
The image signal generating apparatus for a liquid crystal display element. A corner detector detects, when an input image signal contains multiple frame images each of which includes a first image area having a first tone and including a corner portion and a second image area having a second tone higher than the first tone and being adjacent in vertical, horizontal and oblique directions to the corner portion, the corner portion in each frame image, a tone provider generates an output image signal by providing a third tone lower than the second tone to one specific pixel adjacent in the oblique direction to a vertex of the corner portion in at least one of the multiple frame images. The tone provider provides the third tone to the specific pixel when the input image signal is a moving image signal. |
| US09734773B2 |
Display improvement method and apparatus for liquid crystal display panel
A display improvement method and apparatus for a LCD panel are provided. The method includes: acquiring a gamma curve for at least one kind of color sub-pixel of a variety of color sub-pixels in a case of a side view; determining a luminance enhancement starting point on the gamma curve, according to tangent slopes of points corresponding to respective gray-scale values on the acquired gamma curve, wherein a gray-scale value of the luminance enhancement starting point is j, and the luminance enhancement starting point has a tangent slope less than tangent slopes of points having gray scale values (j−1) and (j+1) on the gamma curve; increasing a luminance value of a point having a gray-scale value greater than or equal to the gray-scale value of the luminance enhancement starting point and less than a maximum gray-scale value on the gamma curve. |
| US09734768B1 |
User-manipulated coded image display and animation system
A coded image display and animation system with an illuminated shutter element device that permits the user, by placing individual coded image members and combinations of coded image members upon it, to create collages, puzzles and fantasy worlds that instantly appear to come to life and move realistically. Coded image members can be chosen and selectively repositioned, overlapped, and combined for varying displays and display effects. Larger, window-sized displays with or without coded image portions can be exploited, potentially to provide moving backgrounds, such as falling snow or moving clouds, upon which the coded image members can be positioned thereby permitting the user to create multi-member displays and animations, including animated stories and animated fantasy worlds. Coded image members and non-coded image members can have open portions for permitting the application of images or image portions by users, such as by erasable marking implements. |
| US09734767B2 |
Electronic device equipped with a backlight, control method for the same, and storage medium having control program stored thereon
An electronic device includes a first processor, a second processor, and a light source. The first and second processors are configured such that the first processor can be shifted from a control state of controlling the light source to a non-control state of not controlling the light source and such that the second processor can be shifted from the non-control state of not controlling the light source to the control state of controlling the light source, along with a shift of the first processor from an operating state to a non-operating state. |
| US09734764B2 |
Voltage drop compensator for display panel and display device including the same
A voltage drop compensator for a display device and the display device including the same are disclosed. In one aspect, the voltage drop compensator includes a region divider, an expected current calculator, a conversion matrix generator, a representative voltage calculator, and a compensator. The region divider is configured to divide the display panel into a plurality of regions, and the display panel includes a plurality of power lines and a plurality of pixels configured to receive a power voltage via the power lines. The expected current calculator is configured to calculate an expected current to flow in each of the regions based on input data provided to each of the regions. The conversion matrix generator configured to generate a conversion matrix based on a line resistance of each of the power lines and convert the expected current to a representative voltage provided to the regions based on the conversion matrix. |
| US09734763B2 |
Pixel circuit, driving method and display apparatus
The embodiments of the present disclosure disclose a pixel circuit, a driving method and a display apparatus. The pixel circuit comprises multiple sub-pixel circuits, one of which is arranged with a threshold compensation module, and shares a voltage compensated by the threshold compensation module with other sub-pixel circuits. According to the embodiments of the present disclosure, only a threshold compensation module may be arranged for multiple pixels, so as to reduce an average area occupied by a single pixel and is beneficial for improving the PPI of the display apparatus. |
| US09734754B2 |
Display device and method for driving same
A drive circuit classifies frame periods as a drive period and a pause period, and applies a selection voltage to scanning lines in turn and applies voltages according to a video signal (a measurement voltage in the case of measurement targets) to data lines in turn during the drive period. During the pause period, the drive circuit applies the selection voltage to one scanning line corresponding to measurement target pixel circuits, and a measurement circuit measures drive currents outputted to the data lines from the measurement target pixel circuits. The drive circuit may set a write period and a measurement period in the pause period. During the write period, the drive circuit may apply the measurement voltage to the data lines. During the measurement period, the measurement circuit may measure drive currents outputted to the data lines from the measurement target pixel circuits. |
| US09734748B2 |
Grayscale value setting method for liquid crystal panel and liquid crystal display
A grayscale value setting method for a liquid crystal panel is disclosed which includes obtaining actual luminance values of each grayscale G of the liquid crystal panel at front and slant view angles; dividing actual luminance values according to the area ratio of the main pixel area M and the sub pixel area S, and establishing corresponding relationships between the grayscale and the actual luminance values in the main and the sub pixel areas; calculating theoretical luminance values of each grayscale; setting a grayscale combination, such that a sum of difference values between actual and theoretical luminance values of the front and slant view angle are minimal; and repeating the last step to obtain grayscales respectively input to the main pixel and the sub pixel areas at all of grayscales of the liquid crystal panel. A liquid crystal display setting a grayscale value using the above method is also disclosed. |
| US09734747B2 |
Organic light emitting diode display apparatus and method for driving the organic light emitting diode display apparatus
The present invention provides a method for driving an Organic Light Emitting Diode (OLED) display apparatus. The method is for displaying a grayscale of one frame with N (N is a natural number equal to or larger than two) number of sub-frames including a writing period and a light-emitting period. Here, M (M is a natural number equal to or smaller than N) number of the sub-frames among the N number of sub-frames include a non-light-emitting period, and a length of the light-emitting period in a specific sub-frame of which a length of the light-emitting period is the shortest is proportional to a difference between a frame time and a time obtained by multiplying a length of the writing period and M. |
| US09734743B2 |
Microphone accessory, a method of using a microphone, and a microphone
The invention relates to microphone accessories, methods of using microphones, and a microphone. The accessory has at least one body having at least one display face for displaying at least one communication; an attachment formation for operatively attaching all or part of the accessory to the microphone; and a displacement arrangement controllable to displace all or part of the accessory automatically in a pre-determined or pre-selected manner relative to the microphone such that, in use, the at least one display face is correspondingly automatically displaced rotatably relative to the microphone. The invention also extends to an associates method of using a microphone by providing an accessory on a microphone flag and displacing the same relative to the microphone. Moreover, the invention extends to a microphone operable to displace a microphone accessory relative to a longitudinal axis of a handle thereof. |
| US09734736B2 |
Electronic device having self-emitting display panel
An electronic device includes a self-emitting display panel, a first transparent substrate, a second transparent substrate and two combining elements. The first transparent substrate includes two first edge portions and a first cover portion. The second transparent substrate includes two second edge portions and a second cover portion. The self-emitting display panel is disposed between the first cover portion and the second cover portion. The self-emitting display panel has a first surface facing to and covered entirely by the first cover portion and a second surface facing to and covered entirely by the second cover portion. One of the two combining elements is connected between one of the two first edge portions and one of the two second edge portions, and the other of the two combining elements is connected between the other of the two first edge portions and the other of the two second edge portions. |
| US09734734B2 |
Self-erectable displays and methods of making such self-erectable displays
Self-erectable displays and methods of making such self-erectable displays are disclosed. An example self-erectable display includes a shroud including a first shroud panel opposite a second shroud panel and a support coupled within the shroud. In the example display, the support including a top edge, a bottom edge, and first and second side edges. The first and second edges extend through an aperture defined by the support. The example display also includes an elastic band coupled to the support to outwardly bias first shroud panel from the second shroud panel. |
| US09734733B2 |
Modelling assembly
A modelling assembly 1400 includes a plurality of releasably interconnectable parts, the parts including floor parts 1402 and wall parts 1408. The assembly 1400 includes a plurality of pegs 102, each of which, in an assembled condition, extends from one part to another part to hold the parts together, at least one of the parts defining a peg receiving hole 104 in which one of the pegs 102 is receivable. |
| US09734729B2 |
Methods and systems for providing taxiway stop bar information to an aircrew
A method for displaying stop bar information to an aircrew member of an aircraft includes the steps of capturing a light signature emitted from an area surrounding the aircraft, processing the captured light signature to detect a lighted stop bar, and providing information to the aircrew member regarding the detection of the lighted stop bar. |
| US09734726B2 |
Systems and methods for providing landing exceedance warnings and avoidance
Systems and methods provide sloped landing exceedance warning and avoidance. One system includes a surface slope determination system configured to measure a plurality of distances between an aircraft and a surface. The system also includes an inertial navigation system configured to sense aircraft attitude information. A flight control system is communicatively coupled to the surface slope determination system and the inertial navigation system. The flight control system is configured to estimate a slope angle of the surface. The flight control system is also configured to determine one or more approach characteristics based on the slope angle and the aircraft attitude information. The flight control system is additionally configured to identify a warning condition and perform one or more avoidance measures when one or more of the approach characteristics exceeds a predetermined threshold. A pilot cuing device also generates a notification when the warning condition is identified. |
| US09734725B2 |
Ambulatory route management based on a personal drone
Embodiments include method, systems and computer program products for route planning and management with a drone. Aspects include receiving a destination for an individual and determining multiple routes between a position of the individual and the destination. Aspects further include deploying the drone to determine safety and accessibility risks associated with the multiple routes and determining a preferred route from the multiple routes based on the safety and accessibility risks associated with the multiple routes. |
| US09734724B2 |
Method and system for recovering the energy state of an aircraft during descent
A method and system is provided for the recovery of an aircraft energy upset in a time-constrained descent. The system includes a computational unit to assess a number of adjustments involving a combination of speed changes, aerodynamic brake deployment and track miles adjustments that alter the energy dissipation profile whilst allowing the aircraft to maintain a pre-determined time-of-arrival over an incoming waypoint along the original descent path. |
| US09734721B2 |
Accident notifications
A method comprising receiving sensor information from at least one sensor, determining that a vehicle was involved in an accident based, at least in part, on the sensor information, determining that an informative notification criteria is satisfied based, at least in part, on the accident, sending an informative notification in response to the determination that the informative notification criteria is satisfied, determining whether a remedial request criteria is satisfied based, at least in part, on the accident and the sensor information, in circumstances where the remedial request criteria is satisfied, sending a remedial request based, at least in part, on the satisfaction of the remedial request criteria, and in circumstances where the remedial request criteria fails to be satisfied, precluding sending of the remedial request based, at least in part, on the failure of satisfaction of the remedial request criteria is disclosed. |
| US09734720B2 |
Response mode verification in vehicle dispatch
A system for response mode verification according to an embodiment of the present disclosure may include a user interface device; a vehicle motion sensor located in a vehicle; a memory; and/or a processor communicably coupled to the user interface device, the vehicle motion sensor, and the memory, the memory including instructions that, when executed by the processor, cause the processor to: receive a dispatch request, receive a first indication from the user interface device based on a user indicating acceptance of the dispatch request, record an acceptance time of the first indication, receive a second indication from the vehicle motion sensor based on the vehicle motion sensor monitoring a change in movement of the vehicle, and record a vehicle motion time of the second indication, generate a notification indicating that a difference between the vehicle motion time and the acceptance time exceeds a threshold time. |
| US09734719B2 |
Method and apparatus for guiding a vehicle in the surroundings of an object
A method for guiding a vehicle in the surrounding environment of an object. The method includes reading in a multiplicity of view ray endpoints in a three-dimensional image, produced by a stereo camera of the vehicle, of a surrounding environment, containing the object, of the vehicle, at least one of the view ray endpoints representing an outer surface of the object, connecting the multiplicity of view ray endpoints to form a polygon that represents a free surface to be traveled by the vehicle, and generating a driving corridor, provided for the vehicle, for driving around the object, based on the free surface. |
| US09734711B2 |
Smarter traffic signs
Aspects identify different, mutually exclusive actions that each apply to usage of a roadway during occurrences of different respective associated combinations of temporal and road condition values. Current temporal data and combination road condition values that are associated with the mutually exclusive actions are determined. An active electronic display of a traffic sign device is driven to indicate one of the mutually exclusive actions as an active traffic requirement as a function of an association of the combination of the determined temporal and road condition values with the action, and to indicate a time or road condition value that differs from a respective one of the combination of the determined temporal and road condition values that are associated with the action as relevant to triggering application instead of another, different one of the mutually exclusive actions as the active traffic requirement. |
| US09734709B1 |
Instantiating an application based on connection with a device via a universal serial bus
An apparatus for managing telemetry sensor controllers identified by their communication port identifiers is disclosed. The apparatus may include a memory that stores telemetry sensor controller mappings, where a telemetry sensor controller mapping associates an equipment identifier for a telemetry sensor controller with a communication port identifier, and equipment identifier mappings, where an equipment identifier mapping associates an equipment identifier with a telemetry monitoring application. The apparatus may detect a connection with a telemetry sensor controller and receive an equipment identifier. The apparatus may then instantiate a telemetry monitoring application for managing the connected telemetry sensor controller by accessing the plurality of equipment identifier mappings with the received equipment identifier, where the telemetry monitoring application may instruct the connected telemetry sensor controller to perform a requestable operation. |
| US09734708B2 |
Safe interaction of a user with a smart utility meter
The invention relates to a method for enabling a user to safely interact with a smart utility meter (1), comprising the following steps:—Transmission by said user of a command signal from a remote handheld electronic device (2) through a short range wireless optical communication link (3) between optical transmitting means (20) provided on said handheld electronic device (2) and optical receiving means (11) provided on said smart utility meter (1); —Reception of said command signal on said optical receiving means (11). |
| US09734707B2 |
Features for use with a multi-sided controlling device
A multi-sided controlling device automatically makes keys on one or more sides of the controlling device active as a function of an operating mode of the controlling device. One or more sides of such a multi-sided controlling device may also have at least one keycap behind which is positioned an IR transmitter usable when another side of the controlling device is active. |
| US09734706B2 |
Multifunction cable for use with different signal inputs
A cable comprises a circuit, a switching element and an input connection for engaging an output connection of a sensor, the switching element configured to selectively enable the circuit of the cable assembly to process an accepted output of at least one of at least two sensors providing differing acceptable outputs and to provide a signal output corresponding to the accepted sensor output for processing by a monitor. A sensor includes an initiation element structured to cause a switching element associated with an input connection of the cable to change a mode of operation of the switching element to selectively enable the circuit to process an output of the sensor accepted by the cable and to provide a signal output corresponding to the accepted sensor output. A system comprises a monitor and the cable including the circuit and the switching element. Methods of operation are also disclosed. |
| US09734705B2 |
Logo assembly of an electronic device
A logo assembly, a control method, a controller and an electronic device are provided. The logo assembly comprises: a front case of a logo and a touchpad attached to a backside of the front case of the logo. The touchpad comprises a touch sensor configured to send a control signal to the controller when detecting a touch control operation to the front case of the logo, such that the controller performs a control operation to the electronic device after receiving the control signal. By attaching the touchpad to the backside of the front case of the logo, it solves the issue that a logo has a negative impact on the design of the position of buttons at the front panel of the electronic device, thus reducing the impact of the logo on the position of the buttons. |
| US09734704B2 |
Wireless gauntlet for electronic control
A wireless control system and method that can replace the traditional usage of a keyboard, mouse, handheld joystick, and remote to control apparatus such as mobile devices, computers, robotics, and appliances is disclosed. In various embodiments, the invention comprises two main electrical devices and one interchangeable attachment. The first main device comprises a gauntlet that can be strapped on an arm. This device, when active, can be used to transmit dynamic wireless signals which report the acceleration, orientation, and direction of one's wrist and calculate relative position of the palm. The second main device comprises a wireless programmable base receiver for receiving and processing the aforementioned wireless signals from the wireless gauntlet. The wireless programmable base receiver can be attached to an interchangeable attachment to trigger an electrical device such as a robot, electrical appliance, or computer that corresponds to the signals received from the gauntlet that subsequently become recognized as gestures. Accordingly, the base receiver can be used to control various applications. Several base receivers can be combined to form a control-zone, which gives a user the ability to control a set of electrical devices. Similarly, multiple users wearing a gauntlet may control the same electrical device. |
| US09734696B1 |
Medication reminder assembly
A medication reminder assembly includes a box that may have medication placed therein. An alarm unit is coupled to the box and the alarm unit may be manipulated. The alarm unit is programmable to emit a selected one of an audible alarm, a vibratory alarm and a visual alarm at selected intervals. Thus, the alarm unit generates a reminder to take the medication within the box. |
| US09734695B2 |
Activity monitoring apparatus
A vehicle component moves between a first position exposing a rearward area of a vehicle interior and a second position at least partially concealing the rearward area. A movement detection device senses movement of the vehicle component. A vehicle ignition device within the vehicle body structure is operated by a vehicle operator. A controller is operably connected to the movement detection device, the vehicle ignition device and an alerting device. The controller detects movement of the vehicle component and operation of the vehicle ignition device in predetermined sequences of movement and operation. The controller thereafter determines whether or not the vehicle operator has potentially left an object in the rearward area. In response to determining that the vehicle operator may have left an object in the rearward area of the vehicle interior, the controller provides an alarm signal. |
| US09734693B2 |
Remote equipment monitoring and notification using a server system
Systems, devices, and methods are provided for equipment monitoring comprising monitoring signals created by a PLC and sensors associated with a piece of equipment using a monitoring device comprising hardware communicatively coupled to a PLC and operative to transmit information over a communications network, transmitting signals from the monitoring device over the communications network to one or more databases stored on a server system comprising hardware and software communicatively coupled to the network, analyzing signals created by the PLC to determine the nature of the signals and using the analyzed signals to send alerts to one or more mobile service devices operated by technicians when emergency maintenance is required for the piece of equipment. |
| US09734678B2 |
Tactile based performance enhancement system
A system is disclosed for communicating tactile messages to a user, such as a racecar driver, yacht crewmember, or other athlete. The system can include a tactile vest having tactile activators for conveying tactile messages to the user, including real time messages for helping the user assess and improve physical performance. The messages may be generated based on various types of sensor data, including, for example, data collected by vehicle sensors of a racecar or yacht. |
| US09734677B2 |
Tactile sensation providing device
There is provided a tactile sensation providing device having a tactile sensation provider (20, 21, 22) configured to provide a tactile sensation by vibration and an atmospheric pressure controller 11 configured to control the atmospheric pressure of the space 50 opposite to the tactile sensation providing face 20a of the tactile sensation provider, when the tactile sensation provider vibrates. |
| US09734673B2 |
Automated teller machine comprising camera to detect manipulation attempts
An automated teller machine (ATM) is proposed having a control panel (CP) that has elements (1, 2, 3, 4, 5) arranged therein that are provided for users of the automated teller machine (ATM) and that has a camera (CAM) to detect manipulation attempts on the automated teller machine (ATM). The camera (CAM) is mounted in a housing section of the automated teller machine (ATM) surrounding the control panel (CP) and aligned in such a way that the camera (CAM) captures images of at least two of the elements (1, 2) arranged in the control panel (CP). In particular, the camera (CAM) captures image of the money dispensing compartment (1) and the keypad (2) in order to unequivocally detect any overlays installed there and similar manipulation or skimming attempts. |
| US09734672B2 |
Gaming system and method providing simultaneous gaming with linked paytable events
The gaming device disclosed herein includes a plurality of simultaneously, substantially simultaneously or sequentially played primary games, wherein a designated triggering event in at least one of the games causes the gaming device to change, modify, supplement, add to, activate or otherwise influence the paytable of at least another game. |
| US09734671B2 |
Gaming machine and methods of allowing a player to play gaming machines having randomly selected symbols
A method of allowing a player to play a gaming machine is described herein. The method includes displaying a game including a plurality of reels displayed in a display area. Each reel of includes a reel strip including a plurality of normal symbols positions and a plurality of special symbol positions. The method includes randomly generating an outcome of the game and displays the game outcome on the display device, wherein the game outcome including at least one special symbol position being displayed on at least one reel of the plurality of reels in the display area. The method also includes determining a symbol selection factor as a function of the generated game outcome, randomly selecting at least one special symbol as a function of the symbol selection factor, and displaying the game outcome including the selected special symbol displayed in the special symbol position. |
| US09734669B1 |
Cards, devices, systems, and methods for advanced payment game of skill and game of chance functionality
A user is provided with a GUI that may allow the user to change functionality associated with a non-battery-powered card, a battery-powered card, a payment sticker, or another device (e.g., a mobile telephonic device). The GUI may be provided by a website so that a user views the GUI from a web-browser. At any time, for example, a user may change additional functionality performed at a point-of-sale purchase. A user may change the additional functionality for a card or a button of a card. A user may switch to associate a game of chance or skill to the purchase. |
| US09734668B2 |
Gambling smart card with betting limits
A gambling smart card with betting limits is used in a gambling system. A gambler uses a smart card to place bets in a casino. The bet is reduced by a factor previously chosen by the gambler and agreed to by the casino. The smart card is programmed to reduce the bet by the agreed upon factor or percentage. The player appears to be betting more than the player actually bets because the winnings or losses will be reduced by the agreed upon factor. |
| US09734662B2 |
Gaming table device having a game table on which the game medium is disposed
A gaming table device which can determine frauds precisely and human errors is provided. A plurality of antennas for reading medium identification information of the game medium disposed on a game table through a wireless communication are disposed at locations spaced away from each other, and when a first antenna of the plurality of antennas is selected, a second antenna spaced at a predetermined distance from the first antenna of the plurality of antennas is selected. |
| US09734659B2 |
Single platform system for multiple jurisdiction lotteries and social media
A wireless communications system includes a computer system run on a single platform on which different lottery games for different jurisdictions are supported and run from the single platform. The single platform is configured to be in communication with one or more social media sites. Computer executable instructions, when executed by at least one network processor in a workflow server residing in a mobile communications network, implements components that include: a workflow module of sets of workflow instructions for processing different types of lottery game packets from different jurisdictions. A deep packet inspection module inspects a received lottery game packet and provides information about the lottery game packet to the workflow module. The workflow module coordinates processing of the received lottery game packets using selected ones of selectable communication function modules based on the information about the lottery game packet provided by the deep lottery game packet inspection module. |
| US09734656B2 |
Gaming system and a method of gaming
A gaming system comprises a player interface (50) comprising a display on which a plurality of selectable symbol display positions are displayed to a player, the player interface (50) allowing a player to select one or more windows (700-703) defining respective ones of one or more subsets of the symbol display positions (600), and a game controller (60) arranged to select symbols for display at all symbol display positions (600), and to evaluate selected symbols within each selected window based on a win entitlement applying to the selected window to determine a game outcome. |
| US09734655B2 |
System and method of accumulating and recording outcomes generated by a gaming device
The present invention provides a variety of systems and methods of playing a slot machine game in which players accumulate elements during one or more spins and at the conclusion of any spin may record the accumulation of said elements for future use at the same or different slot machine game. In three preferred embodiments, a player accumulates: the cumulative number of times one or more predetermined symbols appear in the symbol matrix; the cumulative number of points awarded by the game for winning symbol combinations appearing in the symbol matrix; or a set of predetermined winning symbol combinations. |
| US09734651B1 |
Money handling apparatus
A money handling apparatus is constituted by a mechanical processing unit configured to mechanically process money, and a manually-handled money storage unit for storing money by a manual handling. The mechanical processing unit includes an inlet for receiving money, a recognition and counting unit configured to recognize and count the money that has been received in the inlet, a mechanically-processed money storage unit configured to store the money, an outlet to which the money fed from the mechanically-processed money storage unit is discharged, and a money transport unit configured to connect these units and portions. The manually-handled money storage unit is not connected to the money transport unit of the mechanical processing unit, and has a structure in which money to be manually managed can be directly stored therein by hand and the stored money can be directly taken out therefrom by hand. |
| US09734650B2 |
Medium processing device
A banknote deposit and withdrawal apparatus causes a control section to function as an inserted medium counting unit, a normal medium counting unit and an abnormal mediums number calculation unit. The normal medium counting unit again feeds out and conveys banknotes from the banknote deposit and withdrawal section to the verification section in a quantity corresponding to the number of inserted banknotes, conveys abnormal banknotes that are verified as abnormal by the verification section to the banknote deposit and withdrawal section together with following banknotes but conveys normal banknotes that are verified as normal by the verification section to the temporary holding section and retains the normal banknotes therein, and counts a number of normal banknotes. The abnormal mediums number calculation unit subtracts the number of normal banknotes from the number of inserted banknotes to calculate an abnormal banknotes number. |
| US09734644B2 |
Wireless camera facilitated building security
A security system permits limited access into a building for authorized visitors. The security system includes an access interface pad installable at a building entryway and a camera device releasably secured to the access interface pad with an anchor. The anchor allows the camera device to detach from the access interface pad in response building access being authorized by the security system so that an authorized visitor can wear the camera device while in the secured building. The security system can both communicate with a remote device so that data captured by the camera can be transmitted to a user in real time and automatically analyze information from the camera with respect to certain security parameters. |
| US09734636B2 |
Mixed reality graduated information delivery
Embodiments that relate to presenting a plurality of visual information density levels for a plurality of geo-located data items in a mixed reality environment are disclosed. For example, in one disclosed embodiment a graduated information delivery program receives information for a first geo-located data item and provides a first visual information density level for the item to a head-mounted display device. When a spatial information density of geo-located data item information is below a threshold, the program provides a second visual information density level greater than the first level for a second geo-located data item displayed. |
| US09734632B2 |
Planning, navigation and simulation systems and methods for minimally invasive therapy
Disclosed herein are planning, navigation and simulation systems and methods for minimally invasive therapy in which the planning method and system uses patient specific pre-operative images. The planning system allows for multiple paths to be developed from the pre-operative images, and scores the paths depending on desired surgical outcome of the surgery and the navigation systems allow for minimally invasive port based surgical procedures, as well as craniotomies in the particular case of brain surgery. |
| US09734628B2 |
Techniques for processing reconstructed three-dimensional image data
Techniques are disclosed for creating digital assets that can be used to personalize themed products. For example, a workflow and pipeline used to generate a 3D model from digital images of a person's face and to manufacture a personalized, physical figurine customized with the 3D model are disclosed. The 3D model of the person's face may be simplified to match a topology of a desired figurine. While the topology is deformed to match that of the figurine, the 3D model retains the geometry of the child's face. Simplifying the topology of the 3D model in this manner allows the mesh to be integrated with or attached to a mesh representing desired figurine. |
| US09734625B2 |
Panoptic visualization of a three-dimensional representation of a complex system
A system is provided for panoptic visualization of a 3D representation of a complex system. The system includes a visualization engine configured to receive a digital 3D model of a complex system and produce a plurality of electronic document components including 2D images depicting elements of the complex system. The system also includes a data extractor configured to generate 2D derivatives of the 3D model, and communicate the 2D derivatives for inclusion in a panoptic visualization document collection. The data extractor may be configured to receive a document component including a 2D image depicting an element of the complex system, and extract from the 3D model, information identifying a spatial, design or functional relationship between the respective element and one or more other elements of the complex system. The data extractor may then be configured to provide the extracted information in metadata associated with the document component. |
| US09734623B2 |
Caching in map systems for displaying panoramic images
Operations for caching to display panoramic images include repeatedly receiving an indication of one or both of a current geographic location and a current view direction for a user, receiving from a remote server a first plurality of image tiles of a first panoramic image of a predicted geographic location, caching the received first plurality of image tiles, and processing the cached first plurality of image tiles. The processing includes decompressing the cached first plurality of image tiles and storing the decompressed image tiles. When the current geographic location is at the predicted geographic location, rendering, using the stored decompressed tiles, the first panoramic image to a plurality of three-dimensional surfaces in a memory, wherein each of the plurality of three-dimensional surfaces corresponds to a respective portion of a sphere. |
| US09734609B2 |
Transprojection of geometry data
Systems and methods for transprojection of geometry data acquired by a coordinate measuring machine (CMM). The CMM acquires geometry data corresponding to 3D coordinate measurements collected by a measuring probe that are transformed into scaled 2D data that is transprojected upon various digital object image views captured by a camera. The transprojection process can utilize stored image and coordinate information or perform live transprojection viewing capabilities in both still image and video modes. |
| US09734608B2 |
Incremental automatic layout of graph diagram for disjoint graphs
Adding a new disjoint graph diagram to an existing graph diagram. A set of one or more new nodes from a graph to be added to a first graph diagram are identified. An automatic graph diagram layout of the set of one or more new nodes is performed creating a second graph diagram. The first graph diagram is aligned along a first axis with the second graph diagram Nodes in the first graph diagram that are at least partially between a first point and a second point of boundaries of the second graph diagram are identified. A boundary is created around the nodes in the first graph diagram that are between the first and second points. The second graph diagram is moved along a second axis toward the boundary to create a combined graph diagram. |
| US09734600B2 |
Attenuation map with scattered coincidences in Positron Emission Tomography
An imaging system (36) includes a Positron Emission Tomography (PET) scanner (38) and one or more processors (52). The Positron Emission Tomography (PET) scanner (38) which generates event data including true coincident events and scatter events, the event data includes each end point of a line of response (LOR) and an energy of each end point. The one or more processors (52) are programmed to generate (72) a plurality of activity map and attenuation map pairs based on the true coincident events, and select (76) an activity map and an attenuation map from the plurality of activity and attenuation map pairs based on the scattered events. |
| US09734598B2 |
Engine for streaming virtual textures
An engine decompresses texture data belonging to a virtual texture stored in processor readable memory so that decompressed texture data may be used to update a selected sub-image of a large texture image used to render a CGI. The updated sub-image may be at any location in the larger texture image. A processor executes an application to provide control information to the engine. The control information may include commands to decode compressed texture data at source addresses and provide a stream of decompressed virtual texture data to selected sub-image destination addresses in a texture buffer used for rendering a CGI. Similarly, the engine may compress texture sub-image information and store the compressed result at a destination address. |
| US09734591B2 |
Image data processing method and electronic device supporting the same
A method of processing image data of an electronic device is provided. The method includes dividing the image data into at least one segment corresponding to a feature of at least part of the image data, determining a category corresponding to the at least one segment, and displaying the at least one segment in a converted form based on the category. |
| US09734588B2 |
Method and system for compressing a video using background subtraction and change detection in videos
A method and system is provided for the compression of a video captured from a static camera. A background image and an original image is captured from the static camera. A foreground object is extracted by taking the difference between the transformed original image and the transformed background image. The foreground object is represented as a sparse vector using wavelets. The method revolves around the compressive sensing framework by ingeniously using the complex field BCH codes and the syndrome as measurements to achieve robust background subtraction using reduced number of measurements. The reconstruction is carried out by a Complex-field BCH decoder coupled with block based implementation. According to another embodiment, an adaptive techniques has also been proposed for acquiring the measurements required for recovering the images. |
| US09734585B2 |
Image processing apparatus, image processing method, and storage medium for determining whether a target pixel is a character
An image processing apparatus counts at least one of the number of pixels having an identical color to a target pixel, the number of pixels having a similar color to the target pixel, and the number of pixels having a different color from the target pixel in a target window, and determines an attribute of the target pixel based on a result of the counting. |
| US09734584B2 |
Segmentation in diagnostic imaging applications based on statistical analysis over time
An embodiment of a segmentation solution for use in diagnostic imaging applications is proposed. A corresponding embodiment of a data-processing segmentation method comprises: providing a representation over a non-zero analysis time period of a body-part being perfused with a contrast agent, the representation comprising, for each location of a set of locations of the body-part, an indication of a response over the analysis time period of the location to an interrogation signal; calculating, for each selected location of a set of selected locations, the value of at least one statistical parameter of a statistical distribution of the response over the analysis time period of the selected location, the set of selected locations comprising all the locations or a part thereof; and segmenting the selected locations according to a comparison between the values of said at least one statistical parameter for the selected locations with at least one segmentation threshold. |
| US09734580B2 |
Image processing apparatus, image processing method, and program
Provided is a an image processing apparatus including a candidate detection unit configured to detect each of candidate images serving as candidates for a main subject for a plurality of frames of image data, and a main subject determination unit configured to obtain a degree of stable presence of the candidate images detected by the candidate detection unit within the image data spanning the plurality of frames and to determine a main subject among the candidate images using the degree of stable presence. |
| US09734573B2 |
Methods and systems for automatically determining magnetic field inversion time of a tissue species
A computer-implemented method for determining magnetic field inversion time of a tissue species includes generating a T1-mapping image of a tissue of interest, the T1-mapping image comprising a plurality of T1 values within an expected range of T1 values for the tissue of interest. An image mask is created based on predetermined identification information about the tissue of interest. Next, an updated image mask is created based on a largest connected region in the image mask. The updated image mask is applied to the T1-mapping image to yield a masked image. Then, a mean relaxation time value is determined for the largest connected region. The mean relaxation time value is then used to determine a time point for nulling longitudinal magnetization. |
| US09734570B2 |
Color correct imaging
Systems and methods for providing remote approval of an image for printing are provided. One system includes a processing circuit in communication with an image capturing device that is configured to capture an image of a printed product. The processing circuit is configured to process the captured image into a processed image accurate to within a tolerance in a color space to indicate the visual appearance of one or more colors. The color space is a standardized color space, such as sRGB or CIELAB. The processing circuit is further configured to transmit the processed image to a display located remote from the image capturing device and to receive an input signal from a remote input device to allow a user to approve or reject the displayed processed image for printing on a print device. |
| US09734568B2 |
Automated inline inspection and metrology using shadow-gram images
Shadow-grams are used for edge inspection and metrology of a stacked wafer. The system includes a light source that directs collimated light at an edge of the stacked wafer, a detector opposite the light source, and a controller connected to the detector. The stacked wafer can rotate with respect to the light source. The controller analyzes a shadow-gram image of the edge of the stacked wafer. Measurements of a silhouette of the stacked wafer in the shadow-gram image are compared to predetermined measurements. Multiple shadow-gram images at different points along the edge of the stacked wafer can be aggregated and analyzed. |
| US09734567B2 |
Label-free non-reference image quality assessment via deep neural network
A method for training a neural network to perform assessments of image quality is provided. The method includes: inputting into the neural network at least one set of images, each set including an image and at least one degraded version of the image; performing comparative ranking of each image in the at least one set of images; and training the neural network with the ranking information. A neural network and image signal processing tuning system are disclosed. |
| US09734563B2 |
Image processing apparatus and image processing method
An image is sharpened by using a frequency component exceeding a Nyquist frequency. In particular, an image processing apparatus 100 of the disclosure herein for generating an output image by sharpening an input image includes a first nonlinear processing unit 101 configured to generate a first signal by carrying out nonlinear processing on an input image signal representing the input image, a sharpening processing block 102 configured to generate a second signal containing a frequency component higher than a frequency component contained in the first signal by carrying out sharpening processing on the first signal, and an adder 103 configured to generate an output image signal representing the output image by adding the second signal to the input image signal. |
| US09734558B2 |
Method for generating high-resolution images using regression patterns
A method generates a high-resolution (HR) image from a low-resolution (LR) image using regression functions. During a training stage, training HR images are downsampled to LR images. A signature is determined for each LR-HR patch pair based on a local ternary pattern (LTP). The signature is a low dimensional descriptor used as an abstraction of the patch pair features. Then, patch pairs with the same signature are clustered, and a regression function which maps the LR patches to the HR patches is determined. In some cases patch pairs of similar signatures can be combined for learning and a single regression function determined, thus decreasing the number of required regression functions. During actual upscaling, LR patches of an input image are similarly processed to obtain the signatures and from the regression functions. The LR patches can then be upscaled using the training regression functions. |
| US09734555B2 |
Generating a tree map
A method for generating a tree map for tree map visualization includes obtaining node information of a plurality of nodes to be processed, the plurality of nodes to be processed being sub-nodes sharing a same parent node and the node information comprising at least sizes of the nodes; determining from the plurality of nodes a plurality of candidate nodes whose sizes are less than a threshold size; determining at least one super node including the plurality of candidate nodes based on the node information of the determined plurality of candidate nodes, a screen size, and the threshold size, such that when displaying in a zooming-in mode the super node on the screen, all candidate nodes in the super node are displayed at display sizes not less than the threshold size; and determining data required for displaying the tree map based on the determined super node. |
| US09734550B1 |
Methods and apparatus for efficiently determining run lengths and identifying patterns
Methods and apparatus for efficiently computing vertical run length values corresponding to an image and/or identifying image patterns, e.g., bar codes and QR codes, where binary image data is stored sequentially in memory, e.g., according to a horizontal row by row basis, are described. A set of detected pixel value change location information is initialized for each column of the image and is updated as processing occurs, e.g., recording row numbers in which a pixel value change was detected between the current row and the previous row. Scanning horizontally across each row, the bitmap is processed in a horizontal fashion, the same way bitmap pixels are laid out in memory. In accordance with a feature of various embodiments of the current invention, the order of bitmap accesses is such that the spatial locality of the code is vastly improved, and the cache performance increases in comparison to a traditional approach. |
| US09734547B2 |
Information processing device for controlling an order of displaying images in a single layer and information processing method implementing the same
An information processing device includes a layer structure including one or more layers for displaying display information. The information processing device includes a storage unit configured to store, in a predetermined storage area, a priority level included in a request, when the request to display the display information in one of the layers included in the layer structure is received; a determining unit configured to determine whether to display, on the one of the layers, the display information corresponding to the request, based on the priority level stored in the predetermined storage area; and a display unit configured to display the display information on the one of the layers, when the determining unit determines to display, on the one of the layers, the display information corresponding to the request. |
| US09734545B2 |
Software methods in a GPU
One embodiment of the present invention sets forth a technique for executing a software method within a graphics processing unit (GPU) that minimizes the number of clock cycles during which the graphics engine is idled. The function of the software method is performed by a firmware method that is executed by a processor within the GPU. The firmware method is executed to access and optionally update the state stored in the GPU. Unlike execution of a conventional software method, execution of the firmware method does not require an exchange of information between a CPU and the GPU. Therefore, the CPU is not interrupted and throughput of the CPU is not reduced. |
| US09734533B1 |
System and method for operating a state-based matching engine
A system and method for operating an on-demand auction for a Financial Instrument are provided in which a request is made for a Trading Center to conduct an on-demand auction for a Financial Instrument. If requirements are met, the Trading Center transitions from an Open Trading State (OTS) to a SNAP Auction State (SAS), excludes from the auction any order which explicitly requests exclusion, includes in the auction any remaining Resting Orders, includes in the auction certain new orders which arrive before the auction ends, activates and includes currently dormant orders, takes a snapshot of displayed buying/selling interest and attempts to include in the auction any available buying/selling interest in other Trading Centers which must be satisfied, computes the auction price, sends external Satisfaction Orders, attempts to match all responses to Satisfaction Orders and all internal orders included in the auction, and transitions back from the SAS to the OTS. |
| US09734531B2 |
Determining a profile for a recommendation engine based on group interaction dynamics
A technique includes using a processor-based machine to determine a dynamic interaction characteristic of a group of users. The technique further includes, based at least in part on the determined dynamic interaction characteristic, determining a profile of the group for a recommendation engine. |
| US09734527B2 |
Visual shopping
Systems and methods are provided for customizing consumer products. A display device may present a rendering of a customizable product to a user. The display device may also present a set of customizations on a scrollable axis. An input interface such as a touch interface may receive a selection of at least one customization from the user, and the rendering of the product may be updated to display the customizations selected by the user. An electronic file may be generated that includes product manufacturing details, which indicate the customizations selected by the user. The product may be an article of footwear, and a printer may print the selected customizations on the article of footwear. |
| US09734525B2 |
Metasearching on a wireless sensor network, using a plurality of spatially distributed sensor nodes that monitor physical and environmental conditions at a plurality of locations
Apparatus and method for metasearching on a wireless sensor network, which comprises a plurality of spatially distributed autonomous devices, comprising a plurality of spatially distributed sensor nodes, comprising a plurality of motes, each of which has a mote transceiver and at least one sensor that monitors physical and environmental conditions and collects physical and environmental data at a plurality of locations; and a gateway node, comprising a metasearch engine that sends a plurality of queries to at least of the plurality of motes, via the gateway node, based upon a request executed on a client device; the gateway node receiving search results from the at least two motes, the metasearch engine comprising a processor that groups and sorts the search results into at least two different groups comprising a plurality of physical and environmental data lists; the metasearch engine sending a response, via the gateway node, to the client device. |
| US09734524B2 |
Systems and methods for virtual markets with product pickup
A system and method for virtual markets with product pickup generally comprised of a three-dimensional user supermarket interface, where a user places an order, and a retail/warehouse hybrid procurement center, comprised of a fulfillment warehouse and a pickup bay, where the order is generally fulfilled, packaged and picked-up by a user. |