| Document | Document Title |
|---|---|
| US09722790B2 |
Identity management service using a blockchain providing certifying transactions between devices
Logic on a first remote device receives a first transaction number and personal data transmitted from a second remote device. The first transaction number was received from a distributed public database in response to a transmission, from the second remote device, of a signed hash value and a first public key associated with a first private key on the second remote device. The signed hash value was created by signing a hash value with the first private key and the hash value was generated by hashing the personal data with a hashing algorithm on the second remote device. The logic uses the first transaction number to retrieve the signed hash value and the first public key from the distributed public database. The logic hashes the personal data using the hashing algorithm to create a generated hash value and verifies the signed hash value against the generated hash value. |
| US09722789B2 |
Method and system for providing enhanced data encryption protocols in a mobile satellite communications system
An approach for improved security protocols in a mobile satellite system is provided. A remote terminal performs a key establishment function, including determination of a first encryption key for encrypting data for transmission over the satellite communications channels, and determination of an authentication key for authenticating entities communicating over the communications channels. The remote terminal receives a security mode command including a key indicator, and determines a second encryption key for enhanced session data security over communications channels. The second encryption key is determined based on the key indicator and a key generation algorithm. The remote terminal further determines a key indicator response and transmits a security mode complete command including the key indicator response to a satellite base station subsystem (SBSS). The key indicator response is constructed for the SBSS to determine the second encryption key based on the key indicator response and a key generation algorithm. |
| US09722784B2 |
Quantum cryptographic key distribution system including two peripheral devices and an optical source
A quantum cryptographic key distribution system, including: an optical source, which generates a plurality of optical pulses; an optical beam splitter, which generates, starting from each optical pulse, a first and a second optical sub-pulse; a first and a second peripheral device; and an optical path having a first and a second end connected to the optical beam splitter, the optical path extending through the first and second peripheral devices and being traversed in opposite directions by the first and second optical sub-pulses. The peripheral device randomly phase shifts the second optical sub-pulse by a first phase, and the second peripheral device randomly phase shifts the first optical sub-pulse by a second phase. Furthermore, the optical path is such as to cause interference in the first optical beam splitter between the first and second optical sub-pulses, as a function of first and second phases. |
| US09722778B1 |
Security variable scrambling
Methods and systems are provided for securing an integrated circuit device against various security attacks, such as side-channel attacks. By limiting the number of different challenge vectors that can be combined with a critical variable of an encryption operation, it becomes more difficult to create enough side channel measurements to successfully perform statistical side-channel analysis. |
| US09722776B2 |
Homomorphic signatures and network coding signatures
The subject disclosure is directed towards a technology by which data is securely distributed using a homomorphic signature scheme and homomorphic network coding signature schemes. A homomorphic signature scheme for signing the data is based upon binary pairing with standard prime order groups. Sets of data are signed based upon dividing a larger block of data into smaller blocks, and separately signing each smaller block. The smaller blocks may be distributed to nodes of a network topology that are configured for network coding. In one alternative, the homomorphic signature scheme protects against changes to the block identifier. Proof data may be provided independent of a random oracle, may be provided by providing parameters for verification in a Groth-Sahai proof system, or may be provided by providing parameters for verification independent of a Groth-Sahai proof system. |
| US09722770B2 |
Adaptive envelope extracting apparatus, signal decoding apparatus and short-distance contactless communication apparatus applying the adaptive envelope extracting apparatus, and method thereof
An envelope extracting apparatus includes: a clock extracting device arranged to extract a clock signal of a receiving modulation signal according to a first biasing voltage; and an edge detecting device arranged to generate a detecting signal to indicate an envelope edge of the receiving modulation signal according to a delayed clock signal of the clock signal and a second biasing voltage. |
| US09722766B2 |
Reference configuration for flexible time division duplexing
There are provided measures for reference configuration for flexible time division duplexing. Such measures exemplarily include obtaining a first configuration parameter and a second configuration parameter, determining an uplink reference configuration for a flexible uplink/downlink mode from said first configuration parameter, determining a downlink reference configuration for said flexible uplink/downlink mode from said second configuration parameter, and deriving an uplink/downlink configuration candidate set based on at least one of said first configuration parameter and said second configuration parameter. |
| US09722758B2 |
Channel-quality estimation for a wireless channel
This invention provides a method for a first communication device, such as a base station, to estimate a channel-quality profile of a channel when a second communication device, e.g., a user equipment, returns only channel-quality indicators (CQIs) of selected subbands and a wideband CQI. The profile is obtained by including, for any two neighboring frequencies of the selected subbands, an estimated CQI of a middle frequency between the two neighboring frequencies. After translating the CQIs of the two neighboring frequencies into corresponding linear CQI values, a linear estimated-CQI value for the middle frequency is determined by subtracting an offset from an average of said corresponding linear CQI values. The offset is determined according to a frequency separation between the two neighboring frequencies. Preferably, the offset is linearly proportional to the frequency separation. Interpolation, preferably linear interpolation, is used to obtain linear CQI values of other frequencies. |
| US09722757B2 |
Method for transmitting control information and apparatus therefor, and method for receiving control information and apparatus therefor
A method and a communication apparatus for transmitting uplink control information in a wireless communication system; and a method and a communication apparatus for receiving uplink control information in a wireless communication system are discussed. The method according to an embodiment includes identifying a Hybrid Automatic Repeat reQuest-Acknowledgement (HARQ-ACK)(0), HARQ-ACK(1) and HARQ-ACK(2); and transmitting bits b(0)b(1) using a Physical Uplink Control Channel (PUCCH) resource based on the HARQ-ACK (0), the HARQ-ACK(1) and the HARQ-ACK(2), according to a relation including Table 1. The HARQ-ACK(0) and the HARQ-ACK(1) indicate Acknowledgement (ACK)/Negative ACK (ACK/NACK)/Discontinuous Transmission (DTX) responses to data blocks related to a first cell, the HARQ-ACK(2) indicates ACK/NACK/DTX response to a data block related to a second cell, n(1)PUCCH,0 indicates a PUCCH resource linked to a Physical Downlink Control Channel (PDCCH) on the first cell, and n(1)PUCCH,2 indicates a PUCCH resource linked to a PDCCH on the second cell. |
| US09722756B2 |
Method and device for allocating resource for uplink control channel in wireless communication system
Provided are a method and a device for allocating a resource for an uplink control channel in a wireless communication system. The method for allocating a resource for an uplink control channel in a wireless communication system comprises: receiving at least one downlink subframe; and allocating a physical uplink control channel (PUCCH) resource for transmitting an acknowledgement/not-acknowledgement (ACK/NACK) for the at least one downlink subframe, wherein the PUCCH resource is allocated on the basis of a control channel element of a control channel for scheduling each of the at least one downlink subframe, and if a particular subframe that satisfies a particular condition is included in the at least one downlink subframe, a control channel element included in the special subframe is excluded from the control channel element used to allocate the PUCCH resource. |
| US09722755B2 |
Method and apparatus for transmitting channel quality control information in wireless access system
A method and apparatus for transmitting or receiving channel quality control information through a physical uplink shared channel (PUSCH) in a wireless access system that supports hybrid automatic retransmit request (HARQ). In one embodiment, a user equipment (UE) receives a physical downlink control channel (PDCCH) signal including an initial uplink grant, transmits uplink data using two transport blocks based on the initial uplink grant, receives a negative acknowledgement (NACK) information for one of the two transport blocks, and transmits a channel quality control information along with the one of the two transport blocks which is retransmitted according to the NACK information or a new transport block through the PUSCH to which the HARQ is applied. A number of coded symbols required to transmit the channel quality control information (Q′) is calculated based on the initial uplink grant. |
| US09722751B2 |
Device and method for monitoring the control channel in a multicarrier system
The present invention relates to a method and device for monitoring the control channel in a multicarrier system. Each of a plurality of sub-search spaces corresponds to each of a plurality of scheduled component carriers. The terminal monitors a downlink control channel for a scheduled component carrier corresponding to each of the plurality of sub-search spaces. Each of the plurality of sub-search spaces is defined displaced to the extent that they are offset from each other. |
| US09722750B2 |
Communications system, wireless base station, wireless terminal, and communications method
A wireless terminal, includes: an antenna; and, a processor, coupled to the antenna, the processor to receive, through the antenna, a common reference signal transmitted from a base station at a first timing at a frequency which is selected in accordance with identification information of a cell, to receive, through the antenna, a wireless-terminal-specific reference signal and a control signal both of which are concurrently transmitted by the base station at different frequencies, at a second timing that is different from the first timing; and, to demodulate the received control signal, based on the received wireless-terminal-specific reference signal. |
| US09722748B2 |
Method for receiving down link signal and apparatus therefor
A method for receiving downlink signal and an apparatus therefor are disclosed. A method for enabling a user equipment (UE) to receive a downlink signal from an eNB including a plurality of antenna ports in a wireless communication system includes: receiving a precoded reference signal according to a precoded reference signal configuration for the plurality of antenna ports; measuring receive (Rx) power of the reference signal for each of the plurality of antenna ports; and reporting, to the eNB, at least one of Rx power values of the reference signal, measured for the plurality of antenna ports. The reference signal is for serving cell search of the UE and precoding is applied to the plurality of antenna ports through which the reference signal is transmitted. |
| US09722747B2 |
Data transmission method and apparatus in network supporting coordinated transmission
A data transmission method and an apparatus in a network supporting coordinated multipoint transmission are provided. The method includes transmitting candidate sets of initial state information used to generate Demodulation Reference Signal (DMRS) scrambling sequences for the transmission points to the UE, and transmitting an indication corresponding to at least one candidate set of initial state information respectively associated with at least one transmission point to the UE, wherein the initial state information is used by the UE to generate DMRS scrambling sequences. |
| US09722746B2 |
Analog-to-digital converter with bandpass noise transfer function
Methods and apparatus for providing bandpass analog to digital conversion (ADC) in RF receiver circuitry of a wireless-communication device. The bandpass ADC includes first noise-shaping successive approximation register (NS-SAR) circuitry arranged in a first path and second NS-SAR circuitry arranged in a second path parallel to the first path, wherein the first and second NS-SAR circuitries are configured to alternately sample an analog input voltage at a particular sampling rate and to output a digital voltage at the particular sampling rate. |
| US09722743B2 |
Wireless communication in multi-rat system
A buffer status reporting scheme for a terminal (10) wishing to transmit data simultaneously in multiple RATs of a wireless communication network, which enables the co-ordination of multiple base stations (12, 14) of different RATs (e.g. LTE eNB, UMTS base station, WiFi access point, etc.) with the assistance of the terminal (10) in order to achieve efficient radio resource scheduling for multi-RAT multi-flow aggregation in uplink. A radio bearer is configured for multi-RAT multi-flow aggregation by the network, and multiple logical channel IDs are assigned to this RB that may be associated with different RATs. Logical channels associated with a certain RAT (or a given set of RATs) may be grouped into one logical channel group for radio resource scheduling reason. The terminal (10) performs buffer status reporting, according to the configuration, on all involved RATs and sends reports/indications to one or more involved base stations (12.14). |
| US09722738B2 |
Method of data transmission in multiple antenna system
A method of data transmission includes determining the number of layers, generating mapping symbols by mapping modulation symbols for a first codeword and modulation symbols for a second codeword to each layer, and transmitting the mapping symbols through a plurality of antennas. At least one of the first codeword and the second codeword is mapped to at least 3 layers and the number of layers is larger than 3. |
| US09722736B2 |
Method and apparatus for transmitting uplink and downlink data in TDD system
A method and an apparatus for transmitting uplink/downlink data on time division duplexing (TDD) carriers are provided. The method includes transmitting to a base station in a primary cell (PCell) and a secondary cell (SCell), a TDD uplink (UL)/downlink (DL) configuration of the PCell having a DL subframe super-set or UL subset that are common in the SCell and the PCell and a TDD UL-DL configurationg differing from each other, receiving data at a first subframe in the SCell, and transmitting, when a UL subframe set of the SCell is a subset of a UL subframe of the PCell, a feedback corresponding to the data at a subframe predefined in association with the first subframe in the PCell according to the TDD UL-DL configuration of the SCell. The method supports both the self-scheduling and cross-carrier scheduling of the UE using carriers of different TDD configurations. |
| US09722732B2 |
Method and apparatus for terminating repetition of data packet transmission
In one embodiment, the method includes first determining, at a device, whether a data packet is successfully decoded after a first number of data packet repetitions have been received. Here, the first number is less than a total number of data packet repetitions to be sent to the device. The method further includes first sending, by the device, an acknowledgement if the first determining determines the data packet was successfully decoded, the first sending occurring before the total number of data packet repetitions has been received. |
| US09722728B2 |
Rate adaptive turbo forward error correction
Techniques herein support enhanced multi-rate encoding and decoding of signals in multiple formats. In one embodiment, input data is received at a first device at one of a plurality of data rates. Encoder units are activated to produce streams of encoded input data. The encoder units are configured to operate at the same data rate. Differential encoding operations are performed to produce an encoded output stream. The encoded output stream is modulated for transmission to a second device. In another embodiment, a first device receives an encoded data stream that is transmitted from a second device. The modulated data stream includes encoded data at one of a plurality of data rates. Differential decoding is performed on the encoded data by activating one or more of a plurality of decoder units, where each of the plurality of decoder units is configured to operate at the same rate. |
| US09722725B2 |
System and method for resource management in heterogeneous wireless networks
A system and method for resource management in a heterogeneous wireless network that is performed via distributed implementation wherein the resources of the mobile communications system are managed on a coarse time-scale and a fine time-scale. The coarse time-scale management comprises a first stage of determining the user association for each of the TPs followed by a second stage of determining activation fractions for all TPs. The determining of the user association is performed by utilizing a GLS procedure having a Greedy Stage and a Local Search Stage. In the Greedy Stage, new user, TP pairs are analyzed and the pair with the greatest improvement in system utility is selected. In the Local Search Stage, potential swaps are analyzed and a pair offering the greatest improvement that exceeds a threshold is selected. The determining of activation fractions for all TPs is performed by utilizing an auxiliary function method. |
| US09722715B2 |
Systems and methods for determining a tag location
Systems (100) and methods (400) for Radio Frequency Identification (“RFID”) security tags. The methods comprise: concurrently reading the RFID security tags and locator tags to obtain unique identifiers thereof and Received Signal Strength Indicator (“RSSI”) measurements therefore, where the RFID security tags are respectively coupled to inventory items located within a facility and the locator tags are placed at locations within the facility so as to respectively define a plurality of Zones Of Interest (“ZOIs”) in which inventory items may reside; and determining which ZOI of the plurality of ZOIs each said RFID security tag resides within based at least on the RSSI measurements, a number of times each locator tag was read, read times specifying when the locator tags were read, differences in read times for the locator tags, and known locations of the locator tags. |
| US09722704B2 |
Optical transmission apparatus and method for controlling optical power
An optical transmission apparatus includes: an optical receiver configured to receive an optical signal; a variable optical attenuator configured to adjust a power of the optical signal to be input to the optical receiver according to a variable attenuation amount; and a controller configured to control the attenuation amount of the variable optical attenuator based on an electrical signal obtained by performing a coherent detection and a photoelectric conversion on the optical signal received by the optical receiver. |
| US09722703B2 |
Digital distributed antenna systems and methods for advanced cellular communication protocols
Digital distributed antenna systems and methods for advanced cellular communication protocols are provided. In one embodiment, a digital distributed antenna system comprises: a host unit; a plurality of communication links; a plurality of remote antenna units each coupled to the host unit by one of the plurality of communication links, wherein the communication links transport a downlink digitized RF signal from the host unit to the plurality of remote antenna units, and wherein the remote antenna units are each configured to generate an over-the-air analog RF signal via an antenna from the downlink digitized RF signal; and a localized signal conditioning and control module that extracts from a first digitized RF signal at least one data stream and converts the at least one data stream to baseband data stored in a memory. |
| US09722699B2 |
Systems and methods for managing power at an optical network terminal
Systems and methods presented herein provide for operating an optical network terminal (ONT) during a power outage. In one embodiment, an ONT includes an opto-electrical converter operable to receive an optical signal and to convert the optical signal to a data signal, and a data processing module operable to process data from the data signal. The ONT also includes a power management unit operable to detect a power outage of a power supply, to initiate a low power mode, to terminate a portion of data processing by the data processing module based on the low power mode, to convert the optical signal to electrical power, and to maintain operation of the low power mode utilizing the electrical power. The power management unit is further operable to monitor the power supply for restoration of power, and to reinitialize the data processing module upon restoration of power. |
| US09722696B2 |
Monitoring of communications network at packet and optical layers
A method of monitoring a communications network by monitoring packet errors in one of the paths having at least two optical sections coupled in series with a break in continuity of optical transmission monitoring between the optical sections, and monitoring a transmission quality of each of these optical sections. A state is detected in which the monitored packet errors do exceed an acceptable threshold, but at the same time the transmission quality of each of the optical sections is acceptable, and an indication is transmitted of the detection. This can cause a request for an alternative path for the packets, or cause adapting of these optical sections to reduce bit errors. This can enable handling of potential conflict between packet and optical layers, when the packet layer sees errors but the optical layer indicates no problem. |
| US09722693B2 |
Method of controlling communication device, communication device, and recording medium
A method of controlling a communication device executed by a processor included in the communication device, the method includes intermittently receiving, via a receiver of the communication device, at least two radio signals intermittently sent from a sending device; specifying a sending interval between the at least two radio signals, based on the at least two radio signals; and controlling the receiver so as to cause the receiver to be set, at each of timings at which a plurality of radio signals intermittently sent after the at least two radio signals from the sending device are received, to be in an operating state where the receiver is capable of receiving the plurality of radio signals, based on the specified sending interval. |
| US09722691B2 |
Data detection method and data detector for signals transmitted over a communication channel with inter-symbol interference
A data detection method, having the steps of: a. receiving a signal transmitted over a communication channel, the signal being representative of at least a stream of interfering symbols xk, each representing one or more bits of a transmitted message; b. filtering the received signal through at least a filter bank having at least a first filter representative of a linear response of the channel and a second filter representative of a non-linear response of the channel, and sampling the filtered signals at the symbol rate, thus obtaining respective sequences of filtered samples rk(1) rk(3); and c. jointly computing the a posteriori probabilities of N>1 consecutive symbols xk. A data detector for carrying out such a method, and a method of transmitting data over a nonlinear channel, optimizing spectral efficiency when data detection is performed using such a method is also provided. |
| US09722690B2 |
Network and networking method with intelligent broadband wireless relay for connectivity to mobile or portable devices
An ultrawideband radio transceiver/repeater provides a low cost infrastructure solution that merges wireless and wired network devices while providing connection to the plant, flexible repeater capabilities, network security, traffic monitoring and provisioning, and traffic flow control for wired and wireless connectivity of devices or networks. The ultrawideband radio transceiver/repeater can be implemented in discrete, integrated, distributed or embedded forms. |
| US09722689B2 |
Radio communication system, radio mobile station and radio base station
To improve system performance for mobile communications (group mobility) in a plurality of terminals existing inside the same moving object, a radio communication system of the present invention is a radio communication system for mobile communications in a plurality of user terminals existing in a moving object, and has a radio base station for forming a cell on a moving path of the moving object, and a radio mobile station installed in the moving object to relay communications between the plurality of user terminals and the radio base station. By this means, by offloading communications according to user terminals inside the moving object by the dedicated system for group mobility, it is possible to reduce the load on the existing radio communication system, and it is possible to improve system performance of the entire radio communication system. |
| US09722688B2 |
Wireless transport system
An object of the disclosed invention is to provide a polling-based multihop communication system capable of achieving robust communication. Solving means thereof is a (multihop communication) wireless transmission system including, as wireless stations, a base station, a plurality of relay stations connected at multiple stages by using the base station as a root, and a plurality of terminals connected to the relay stations, in which the base station and the relay stations perform communication using polling in one or more service periods which have been allocated to each of the base and relay stations in time division in advance in a system cycle. |
| US09722673B2 |
Interleaved coil and ferrite configuration to facilitate near field coupling
Described herein are techniques related to near field coupling (e.g., wireless power transfers (WPF) and near field communications (NFC)) operations among others. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. |
| US09722672B2 |
Wireless communication device and method of operating the same
A calibrator to process an output signal of an analog digital converter in a wireless communication device, the calibrator comprising a level filter to remove noise from the output signal of the analog digital converter using mask information regulating a signal level; a timing filter to remove pulses from the level-filtered signal that are beyond a reference duty ratio by using timing information; a pattern filter to remove pulses from the timing-filtered signal that are judged to not comprise a reference number of consecutive pulses by using pattern information; and a duty correction circuit to correct a duty of the pattern-filtered signal to improve performance of the wireless communication device by separately performing a filtering operation on noise and a damping component included in a normal signal. |
| US09722670B2 |
Wireless power transmission network and wireless power transmission method
The present invention relates to a wireless power transmission network and to a wireless power transmission method. In the wireless power transmission method according to one aspect of the present invention, a base station, which wirelessly transmits power using a magnetic field, performs in-band communication through the magnetic field used for wireless power transmission in order to determine whether an electronic device receiving power is in a charging area or in a communication area, and transmits wireless power accordingly. |
| US09722668B2 |
Home appliance, home appliance system, and method of controlling the same
A home appliance, a home appliance system, and a method of controlling the same are provided. The home appliance includes a display unit that outputs an operation setting and an operation state. The home appliance further includes a tag unit that performs Near Field Communication (NFC) with a terminal. The home appliance further includes a controller that (i) stores product information at the tag unit, (ii) receives data stored at the tag unit, (iii) changes the operation setting, (iv) controls the operation state, and (v) outputs the changed operation setting to the display unit. The controller (i) determines network connection information that is stored at the tag unit by the terminal, (ii) stores the network connection information in a communication unit, and (iii) transmits and receives data wirelessly by connecting, through the communication unit, to a network that is associated with the network connection information. |
| US09722661B2 |
Orthogonal symbol interleave for spreading signals
A receiver includes a plurality of de-spreading correlators that are programmed to only correlate a specific portion of the full spreading code according to an interleave factor. Each correlator may be associated with a different symbol. The received signal may be received at all correlators and is multiplied by a code generated by a code generator according to the symbol associated with the correlator. While each correlator may be despreading the received signal at all times, an enable signal is used to determine when information for an associated cell should be accumulated for each correlator. |
| US09722660B1 |
Simultaneous use of multiple radio frequency channels
In general, the subject matter described in this specification can be embodied in methods, systems, and program products for identifying data that is designated for wireless transmission to a remote computing device. A digital signal that encodes the data for transmission across a band of radio frequency channels is generated.Multiple radio frequency channels in the band that are available are determined. The digital signal is filtered to substantially reduce a power level of the digital signal at frequencies that correspond to channels in the band that have not been determined to be available. The filtered digital signal is converted to an analog signal. The analog signal is provided to an analog transmitter that isolates the band of channels to generate an isolated analog signal and that wirelessly transmits the isolated analog signal over the multiple available channels using one or more antennas. |
| US09722658B2 |
Control method of RF switch module
The present invention relates to a control method of an RF switch module. The RF switch module comprises a control device and a switch device. The control device is electrically connected to the switch device, and the control device is able to provide a control voltage to the switch device, and turn on or turn off the switch device. Further, the control device determines frequency or voltage value of the control voltage provided to the switch device according to the power or frequency of an RF signal transmitted by the switch device. |
| US09722655B2 |
Smart ultra box and protective case with the same
A smart ultra box adapting to a protective case is disclosed. The protective case protects a mobile communication device. The ultra box comprises a main body, a conversion unit and a flexible printed circuit board. The main body has a power output interface and an external power interface. The conversion unit disposes at the main body, to electrically connect the power output interface and the external power interface. The flexible printed circuit board electrically connects to the conversion unit, the flexible printed circuit board extending outwardly from the main body. The external power interface receives a commercial power source. The conversion unit converts the commercial power source into a first electric power and a second electric power. The power output interface output the first electric power, and the flexible printed circuit board transmits the second electric power. |
| US09722654B2 |
Smart ultra box and protective case with the same
A smart ultra box adapting to a protective case is disclosed. The protective case protects a mobile communication device. The ultra box comprises a main body, a conversion unit and an expansion module. The main body has an output interface and an external power interface. The conversion unit disposes at the main body, to electrically connect the output interface and the external power interface. The expansion module electrically connects to the conversion unit. The expansion module is for communication with an external device. |
| US09722651B2 |
Adaptive channel coding using polarization
Methods, systems, and devices are described for wireless communications at a wireless device. A wireless device may adaptively select a parity check matrix to increase the reliability of signal transmission by adapting to different channel statistics and channel types (e.g., erasure channels, channels with additive white Gaussian noise, and channels with discrete or continuous alphabets). For example, polarization codes (i.e., codes based on rows of a polarization matrix) may be used to construct parity check matrices “on-the-fly” given an estimation of dynamic channel conditions or diverse channel structures. The channel may be decomposed into polarized sub-channels corresponding to the polarization codes, and mutual information profiles may be determined for each of the polarized sub-channels. The parity check matrix corresponding to the polarization codes may be constructed based on the mutual information profile of all polarized sub-channels. The wireless device may encode or decode data based on the constructed parity check matrix. |
| US09722648B2 |
Integrated circuit device, electronic device and method for frequency detection
An integrated circuit comprises a frequency detector. The frequency detector comprises a timer state machine unit operably couplable to a timer and arranged to receive an incoming carrier signal; determine whether the incoming carrier signal comprises a valid frequency; generate a valid carrier indication when the incoming carrier signal is determined as having a valid frequency; and adjust the timer between at least a first timing mode of operation and a second timing mode of operation of the frequency detector in response to the determination. |
| US09722647B2 |
Calibration techniques for sigma delta transceivers
A cellular radio architecture that includes a transceiver front-end circuit including an antenna and a switch module having a switching network that directs analog transmit signals to be transmitted to the antenna and receives receive signals from the antenna. The architecture further includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer module, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture also includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to the transmit signals. The transmitter module includes a tunable bandpass filter and a power amplifier for amplifying the transmit signals before transmitting. The architecture also includes a calibration feedback and switch module that receives the amplified signals from the power amplifier. |
| US09722646B1 |
Integrative software radio frequency management system and method for compensation of nonlinear response in radio frequency devices
A RF communication system includes a radio transmitter comprising an RF power amplifier, the RF power amplifier including an input to receive an RF signal for transmission and being configured to amplify the RF signal for transmission across a communication channel; a RF digital pre- or post-distortion configured to compensate for nonlinearity of the RF communication system by operating on the RF signal entering or exiting the amplifier. |
| US09722645B2 |
Apparatus and method for generating a transmit signal
An apparatus for generating a transmit signal includes an up-conversion module and a delay module. The up-conversion module up-converts a first component signal of a multi-phase baseband transmit signal using a first oscillator signal and up-converts a delayed second component signal of the multi-phase baseband transmit signal using a second oscillator signal to generate a radio frequency transmit signal. The first oscillator signal and the second oscillator signal comprise an oscillator signal phase offset so that an edge of the second oscillator signal occurs earlier than a corresponding edge of the first oscillator signal. The delay module delays a second component signal of the multi-phase baseband transmit signal relative to the first component signal of the multi-phase baseband transmit signal by a predefined component signal delay to generate the delayed second component signal of the multi-phase baseband transmit signal. |
| US09722639B2 |
Carrier aggregation arrangements for mobile devices
Front end circuitry for a wireless communication system includes a first antenna node, a second antenna node, a first triplexer, a second triplexer, and front end switching circuitry coupled between the first triplexer, the second triplexer, the first antenna node, and the second antenna node. The front end switching circuitry is configured to selectively couple the first triplexer to one of the first antenna node and the second antenna node and couple the second triplexer to a different one of the first antenna node and the second antenna node. By using a first triplexer and a second triplexer in the mobile front end circuitry, the mobile front end circuitry may operate in one or more carrier aggregation configurations while reducing the maximum load presented to the first antenna node and the second antenna node, thereby improving the performance of the front end circuitry. |
| US09722635B2 |
Controller for a solid-state drive, and related solid-state
A controller for a solid state drive is proposed. The solid state drive comprises memory cells each one for storing a symbol among a plurality of possible symbols that the memory cell is designed to store. The controller comprises a unit for encoding information bits into encoded bits; a unit for mapping the encoded bits into the symbols, wherein the symbols are determined based on a plurality of allowed symbols, among the possible symbols, that the memory cells are allowed to store, whereas the symbols, among the possible symbols, other than the allowed symbols define forbidden symbols not allowed to be stored in the memory cells; a unit for demapping read symbols and for providing an indication of the reliability of the read symbols based on the forbidden symbols; and a unit for soft decoding the read symbols according to the reliability indication thereby obtaining the information bits. |
| US09722630B1 |
Decoding apparatus and method for decoding a serially transmitted signal thereof
The method for decoding a serially transmitted signal including: sampling the serially transmitted signal to obtain a plurality of sampled values according to a sampling period; obtaining a period of the serially transmitted signal according to a transition status of the sampled values; calculating a plurality of phase values according to the period and the transition status of the sampled values; obtaining a plurality of boundaries according to the phase values; and outputting a decoded data according to the boundaries and the transition status. |
| US09722629B2 |
Method and apparatus for converting from floating point to integer representation
Apparatus and methods for conversion from floating point to signed integer representation are provided. Two's complementation and determination of a shift control signal indicating the number of bit positions for shifting the two's complemented mantissa to produce the signed integer are performed in parallel. Generation of the shift control signal, including application of an optional scaling factor, is performed using an adder, with the most significant bit of input floating point exponent inverted and an external carry-in of one. Two's complementation for generation of the signed integer from the mantissa is performed using an adder. Certain aspects may be utilized for purposes other than format conversion. The two's complementation may be used for general conversion from unsigned to signed integer format or from signed to unsigned integer format. |
| US09722627B2 |
Detection of unknown code page indexing tokens
A method for determining an encoding used for a sequence of bytes may be provided. The method comprises providing a set of candidate code pages and transforming them into different groups of sequences of bytes, wherein each group of sequences of bytes corresponds to one of the candidate code pages. Thereby each code point is transformed by applying a transformation from one of the candidate code pages to a reference code point value relating to a reference encoding for each code point. The method comprises further separating each of the transformed sequences of bytes into groups of tokens, wherein each group of tokens relates to one candidate code page, and providing an index relating to a text corpus. Furthermore, the method comprises selecting a code page from the set of candidate code pages at least partially based on how many tokens are found in the index. |
| US09722623B1 |
Analog-to-digital converter with dynamic element matching
An embodiment ADC device includes a plurality of comparator elements, each comparator element of the plurality of comparator elements having a first input connected to an input port, each comparator element of the plurality of comparator elements having a second input port connected to a reference signal port. The ADC device further has a switch matrix having routing circuitry connected to an output of each comparator of the plurality of comparators, and a plurality of latches, with each latch of the plurality of latches having an input connected to the routing circuitry. The routing circuitry is configured to connect the output of each comparator of the plurality of comparators to an input of each latch of the plurality of latches according to one or more signals received at one or more control ports. |
| US09722622B2 |
Low parasitic capacitor array
The disclosure provides a capacitor array. The capacitor array includes one or more first metal plates vertically stacked parallel to each other. A second metal plate is horizontally stacked to couple one end of each first metal plate of the one or more first metal plates. One or more third metal plates are vertically stacked parallel to the one or more first metal plates. Each third metal plate of the one or more third metal plates is stacked between two first metal plates. |
| US09722621B2 |
Systems and methods for comparator calibration
The present invention is directed integrated circuits and methods thereof. More specifically, an embodiment of the present invention provides a comparator calibration loop where a digital integrator stores a running sum based on the output of a comparator. A DAC converts the running sum and generates an offset calibration voltage, which is filtered by a low-pass filter module, and the filtered offset calibration voltage is used to cancel out the intrinsic offset voltage and low frequency noise of the comparator. There are other embodiments as well. |
| US09722615B2 |
Method for operating programmable logic device
In a multi-context PLD (dynamically reconfigurable circuit), at the time of rewriting configuration data on a non-selected context during circuit operation, configuration data is stably stored. At the time of rewriting configuration data on a non-selected context, writing to a row which is to be rewritten continues until input signals supplied to input terminals of routing switches in the row become “L” all that time or the input signals become “L” at least once. More specifically, a write selection signal for the row continues to be output. In addition, while the write selection signal is being output, loading of configuration data into a driver circuit is not conducted, or loading of configuration data into a driver circuit is conducted but storage thereof in a line buffer is not conducted. |
| US09722613B1 |
Circuit arrangement for and a method of enabling a partial reconfiguration of a circuit implemented in an integrated circuit device
A circuit arrangement for enabling a partial reconfiguration of a circuit implemented in an integrated circuit device is described. The circuit arrangement comprises a plurality of circuit blocks, wherein each circuit block is configurable to implement a predetermined function and comprises a control circuit configured to receive a global enable signal and a plurality of global reconfiguration signals; and a routing network coupled to the plurality of circuit blocks for routing the global enable signal and the plurality of global reconfiguration signals to each circuit block of the plurality of circuit blocks; wherein each circuit block of the plurality of circuit blocks is configured to independently receive a local enable signal enabling a partial reconfiguration of the circuit in response to the plurality of global reconfiguration signals. |
| US09722612B2 |
Configuration sequence for programmable logic device
Techniques are provided to permit a programmable logic device (PLD) to comply with a communication standard before the PLD is fully configured. In one example, a method includes programming a first portion of a programmable logic device (PLD) with first configuration data. After the first portion is programmed, the first portion is operated in accordance with a communication standard to exchange data with a host system while a second portion of the PLD is programmed with second configuration data. |
| US09722610B2 |
Semiconductor device and high side circuit drive method
Aspects of the invention can include a pulse generating means that outputs a set signal and reset signal for driving the high potential side switching element is such that, while either one of the set signal or reset signal is in an on-state as a main pulse signal for putting the high potential side switching element into a conductive state or non-conductive state, the other signal is turned on a certain time after the rise of the main pulse signal, thereby generating a condition in which the set signal and reset signal are both in an on-state. |
| US09722609B2 |
Integrated level shifter
GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits. |
| US09722608B2 |
Multi-voltage to isolated logic level trigger
Various systems may benefit from interfaces for handling multiple types of inputs. For example, a device with a trigger input from an external device may benefit from an isolated logic level trigger that is capable of addressing multiple types and values of voltage. An apparatus can include an input configured to receive an external trigger input signal having a trigger input voltage. The apparatus can also include circuitry configured to automatically adjust the trigger input voltage to a value configured to be compatible with a provided attached system. A working range of the trigger input voltage can exceed a compatible working range of the provided attached system. |
| US09722607B2 |
Voltage level shifter
A voltage level shifter includes: in stages a pull-down driving unit suitable for receiving an input signal swinging between a ground voltage and a first supply voltage, and pull-down driving an output node to the ground voltage according to a voltage level of the input signal, wherein an output signal outputted through the output node swings between the ground voltage level and a second supply voltage level higher than the first supply voltage; a pull-up driving unit suitable for pull-up driving the output node, to the second supply voltage according to the voltage level of the input signal; a bias generation unit suitable for generating a bias voltage fixed to a preset voltage level; and a bias operation unit coupled between the output node and the pull-down driving unit, and suitable for lowering a voltage level of the output node in stages based on the bias voltage to supply the lowered voltage to the pull-down driving unit when a pull-down operation is performed by the pull-down driving unit. |
| US09722604B2 |
Current-mode logic circuit having a wide operating range
In one example, a current-mode logic (CML) circuit includes a differential transistor pair having a differential input port configured to receive a differential input voltage, a bias port configured for coupling to a current source, and a differential output port. The CML circuit further includes a load circuit coupled to the differential output port. The load circuit includes an active inductive load, a cross-coupled transistor pair, and a switch coupled between the cross-coupled transistor pair and the differential output. |
| US09722603B2 |
Switch housing for capacitive switches
The switch housing for capacitive switches has an outer contact surface and flat electrode structures which are arranged on the inside and in a position opposite the contact surface and which are placed by two-component injection molding in recessed regions of the housing body injected from a first, electrically non-conductive plastic component by a second, electrically conductive plastic component. Preferably, both plastic components are a polycarbonate, the second plastic component containing carbon fibers. |
| US09722600B2 |
Driving circuit of switching device for electric power control
In some embodiments, a driving circuit of a switching device for an electric power control capable of improving reliability of an ON/OFF driving and a monitoring operation of a switching device by configuring a configuration for the ON/OFF driving and the monitoring operation of the switching device in plural numbers is presented. A driving circuit of a switching device for an electric power control may include a driver circuit unit, a first logic device, a second logic device, and a controller. |
| US09722598B2 |
Semiconductor device
A semiconductor device, according to one possible configuration, includes switching circuits, each switching circuit comprising IGBT chips connected in series and clamping diodes. The semiconductor device also includes a first and a second wiring line and auxiliary emitter lines. The first wiring line and a first auxiliary emitter line connect the emitter terminals of IGBT chips of the first and second switching circuits. The second wiring line and another auxiliary emitter line connect the emitter terminals of the third IGBT chips of the first and second switching circuits. The wiring lines have a large current carrying capacity and a lower resistance value than their respectively connected auxiliary emitter line. |
| US09722594B2 |
Drive device
A drive device includes an off-side circuit controlling a gate current of a power switching element to perform an off operation. The off-side circuit includes: a main MOS transistor; a sense MOS transistor defining a drain current of the main MOS transistor; and a sense current control circuit controlling a drain current of the sense MOS transistor to be constant. The sense current control circuit includes: a reference power supply; a reference resistor; and an operational amplifier generating an output at the gate of the sense MOS transistor so that a potential between the reference resistor and the sense MOS transistor approaches the reference potential. The sense current control circuit flows a current, determined by a resistance value of the reference resistor and the reference potential, as the drain current of the sense MOS transistor. |
| US09722588B1 |
Apparatuses and methods for detecting frequency ranges corresponding to signal delays of conductive vias
Apparatuses for monitoring a signal on a conductive via are described. An example apparatus includes: a controller, a first conductive via, a second conductive via and an evaluation circuit. The controller provides a clock signal as a first signal. The first conductive via provides a second signal responsive to the first signal. The second conductive via provides a third signal responsive to the second signal. Responsive to the third signal, the evaluation circuit provides an evaluation result signal. The evaluation result signal is indicative of a frequency of the clock signal, based on a delay of the third signal relative to the clock signal. The first conductive via, the second conductive via and the evaluation circuit may be included in an interface die. The evaluation circuit may detect whether a frequency of the first signal is below a first threshold frequency and may further provide the evaluation result signal. |
| US09722580B1 |
Process information extractor circuit
A process information extractor circuit includes: a transistor array including a plurality of transistors, and configured such that, among the plurality of transistors, the number of transistors electrically coupled in series is adjusted depending on a code; a current source suitable for adjusting the amount of current flowing through the transistor array to a predetermined value; a comparator suitable for comparing a gate voltage of the transistors electrically coupled in series in the transistor array, with a reference voltage; and a code generator suitable for generating the code according to a comparison result of the comparator. |
| US09722578B2 |
Low delay modulated filter bank
The document relates to modulated sub-sampled digital filter banks, as well as to methods and systems for the design of such filter banks. In particular, the present document proposes a method and apparatus for the improvement of low delay modulated digital filter banks. The method employs modulation of an asymmetric low-pass prototype filter and a new method for optimizing the coefficients of this filter. Further, a specific design for a 64 channel filter bank using a prototype filter length of 640 coefficients and a system delay of 319 samples is given. The method substantially reduces artifacts due to aliasing emerging from independent modifications of subband signals, for example when using a filter bank as a spectral equalizer. The method is preferably implemented in software, running on a standard PC or a digital signal processor (DSP), but can also be hardcoded on a custom chip. The method offers improvements for various types of digital equalizers, adaptive filters, multiband companders and spectral envelope adjusting filter banks used in high frequency reconstruction (HFR) or parametric stereo systems. |
| US09722577B2 |
Method and apparatus for adaptive impedance matching
A system that incorporates teachings of the present disclosure may include, for example, an adaptive impedance matching network having an RF matching network coupled to at least one RF input port and at least one RF output port and comprising one or more controllable variable reactive elements. The RF matching network can be adapted to reduce a level of reflected power transferred from said at least one input port by varying signals applied to said controllable variable reactive elements. The one or more controllable variable reactive elements can be coupled to a circuit adapted to map one or more control signals that are output from a controller to a signal range that is compatible with said one or more controllable variable reactive elements. Additional embodiments are disclosed. |
| US09722576B2 |
Elastic wave filter and duplexer using same
An elastic wave filter has an unbalanced signal terminal, first and second balanced signal terminals, and first through fifth IDT electrodes arranged in ordinal order between a pair of grating reflectors. Wiring electrodes of the third and fifth IDT electrodes are disposed adjacent a ground electrode of the fourth IDT electrode, wiring electrodes of the second and third IDT electrodes are disposed adjacent one another, and ground electrodes of the first and second IDT electrodes are disposed adjacent one another. The unbalanced signal terminal is connected to the wiring electrodes of the first, third, and fifth IDT electrodes, and the first and second balanced signal terminals are connected to the wiring electrodes of the second and fourth IDT electrodes, respectively. A pitch gradation of pitch spacing between electrode fingers in each of the first, second, and third IDT electrodes on one side of a center line in the third IDT electrode is gradually reduced by a first spacing α, and a pitch gradation of pitch spacing between electrode fingers in each of the third, fourth, and fifth IDT electrodes on the other side of the center line is gradually reduced by a second spacing β (β≠α), as the distance from the center line increases. |
| US09722574B2 |
Acoustic wave device
An acoustic wave device is provided with a low-frequency side filter having a low-frequency side passband, a high-frequency side filter having a high-frequency side passband, and first and second balanced terminals. The low-frequency side filter is connected to a first unbalanced terminal. The low-frequency side passband is a frequency band from a first minimum frequency to a first maximum frequency. The high-frequency side filter is connected to a second unbalanced terminal. The high-frequency side passband is a frequency band from a second minimum frequency to a second maximum frequency. The low-frequency side filter includes a first longitudinally-coupled acoustic wave resonator and a first one-terminal pair acoustic wave resonator connected in series to the first longitudinally-coupled acoustic wave resonator. An antiresonant frequency of the first one-terminal pair acoustic wave resonator is set to be higher than the first maximum frequency and lower than the second minimum frequency. |
| US09722566B1 |
Systems and methods for tuning resonators
A high-Q factor resonator includes a solenoid having an embedded capacitor assembled in a machinable high-frequency dielectric printed circuit board (“PCB”), or other substrate. The solenoid comprises a plurality of surface conductors positioned on upper and lower surfaces of the PCB. The solenoid further comprises a plurality of conductive vias extending through the PCB between the surface conductors, and at least two aligned vias are separated by a capacitive gap. A liquid crystal dielectric is embedded within the capacitive gap in order to control the capacitance. Accordingly, a tunable capacitive filter is achieved by changing the dielectric permittivity of the liquid crystal. In one example, a nematic liquid crystal is sealed in the capacitive gap and has its permittivity changed with a low frequency bias to tune the capacitor. |
| US09722565B2 |
Filter component
A filter component includes a housing body. A first and at least one second busbar each have a first end section, and a second end section, between which in each case a center section is arranged. The end sections of the busbars each have connections for connecting electrical conductors to the filter component. The first and second end section and the center section of the first busbar are arranged in a first plane and the first and second end section and the center section of the at least one second busbar are arranged in a second plane, which is different from the first plane. |
| US09722562B1 |
Signal enhancements for audio
The present application describes signal enhancements to reduce bone conduction sensations of a wearable computing device and applications thereof. An example apparatus includes a wearable computing device comprising a bone conduction transducer (BCT) configured to receive and be driven by an audio signal, a processor, and a data storage comprising instructions executable by the processor to: (1) determine an input gain level of the audio signal at a frequency range; (2) compare the determined input gain level at the frequency range to a threshold gain level at the frequency range; (3) based on the comparison, apply a multi-band compressor (MBC) configured to process the audio signal to reduce gain in at least a portion of a mid-band frequency range of the audio signal; and (4) drive the BCT with the processed audio signal. |
| US09722555B1 |
Differential circuits with constant GM bias
The present invention is directed to electrical circuits and techniques thereof. More specifically, embodiments of the present invention provide a differential amplifier that has a differential amplifier section, a current source, and a feedback section. The differential amplifier section comprises NMOS transistors that receives two voltage inputs and generate a differential output. The current source provides a long tail for the differential amplifier section. The feedback section generates a feedback voltage based on a reference bias voltage. The feedback voltage is used by an amplifier to control the current source and to keep the biasing and gain of the differential amplifier substantially constant. There are other embodiments as well. |
| US09722549B2 |
Pixel master-slave photodiode bias control amplifier
A pixel master-slave photodiode bias control amplifier system is disclosed. The pixel master-slave photodiode bias control amplifier system may include a master pixel and one or more slave pixels. The slave pixel(s) may be connected to a portion of the master pixel. In this manner, components may be shared between/among the master pixel and the slave pixel(s); thus, for example, optimizing the component count of the pixel master-slave photodiode bias control amplifier system and the size occupied by the pixel master-slave photodiode bias control amplifier system. |
| US09722547B2 |
Compression control through amplitude adjustment of a radio frequency input signal
Compression control through amplitude adjustment of a radio frequency input signal. A power amplifier module can include a power amplifier. The power amplifier can include a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a power amplifier bias controller. The power amplifier bias controller can include a current comparator, a saturation controller, and a radio frequency (RF) attenuator. The current comparator can be configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The saturation controller can be configured to supply a reference signal to the RF attenuator based on the comparison value. The RF attenuator can be configured to modify the amplitude of an RF input signal supplied to the power amplifier based at least in part on the reference signal. |
| US09722544B2 |
Audio system having an improved efficiency and extended operation time
Embodiments of the disclosure may include a method and apparatus for improving the efficiency and extending the operation time between recharges or replacement batteries of a portable audio delivery system. The audio delivery system may include a processor, an audio processing device, a speaker, and a rechargeable power source. The audio delivery system is generally configured to generate and/or receive an audio input signal and efficiently deliver an amplified, high quality audio output signal to a user. In some embodiments of the disclosure, the audio processing device of the audio delivery system may include a switch mode power supply (SMPS), a signal delay element, an envelope detector, and a switching signal amplifier. |
| US09722539B2 |
Digital calibration for multiphase oscillators
A phase-locked loop circuit comprises a multi-phase oscillator having a plurality of coupled oscillators. A calibration module detects mismatches between frequency characteristics of the different oscillators in the phase-locked loop circuit during a calibration process. The calibration module then calibrates the various oscillators to compensate for the detected mismatch. Once calibrated, the phase-locked loop circuit can operate with little or no performance degradation despite the mismatch in frequency characteristics between the different oscillators. |
| US09722538B2 |
Constant voltage circuit and oscillation device
Provided are a constant voltage circuit configured to, when a power supply voltage is low, detect a leakage current to output a stable voltage at a power supply voltage level, and a crystal oscillation circuit using the constant voltage circuit. The constant voltage circuit includes a leakage current detection circuit including a PMOS transistor for monitoring a leakage current, which has a gate and a source being grounded. When a leakage current is detected, even with a constant voltage power supply, a voltage sufficient for turning on an output transistor of the constant voltage circuit can be applied to a gate of the output transistor. |
| US09722537B2 |
Fractional-N frequency synthesizer incorporating cyclic digital-to-time and time-to-digital circuit pair
A novel and useful look-ahead time to digital converter (TDC) that is applied to an all digital phase locked loop (ADPLL) as the fractional phase error detector. The deterministic nature of the phase error during frequency/phase lock is exploited to achieve a reduction in power consumption of the TDC. The look-ahead TDC circuit is used to construct a cyclic DTC-TDC pair which functions to reduce fractional spurs of the output spectrum in near-integer channels by randomly rotating the cyclic DTC-TDC structure so that it starts from a different point every reference clock thereby averaging out the mismatch of the elements. Associated rotation and dithering methods are also presented. The ADPLL is achieved using the look-ahead TDC and/or cyclic DTC-TDC pair circuit. |
| US09722532B2 |
Photovoltaic module mounting system
A photovoltaic (PV) module mounting system including a mounting bracket that has a curved mating surface extending as an arch between a pair of flat mounting feet portions. The mounting bracket supports a PV module coupling device. A hanger bolt is provided that has a first threaded portion adapted to engage a roof surface and a second threaded portion for passing through the curved mating surface of the mounting bracket. A threaded knob is adapted to mate with the second threaded portion of the hanger bolt. |
| US09722523B2 |
Inverter vector driving system and method for estimating capacitance using the same
The present invention relates to an inverter vector driving system and a method for estimating capacitance using the same. The present invention provides a method for estimating capacitance in an inverter vector driving system including a capacitor to which a rectified DC voltage of a three-phase power supply is charged, and a PWM inverter configured to transform the DC voltage into a three-phase AC voltage to be applied to a motor of an induction motor, including: operating the motor of the IM in a regeneration mode; generating a d-axis voltage command and a q-axis voltage command for the motor; adjusting a pulse of the PWM inverter by using the d-axis voltage command and the q-axis voltage command; and estimating capacitance of the capacitor by using a DC-link voltage and a DC-link current that are generated at the capacitor due to the inclusion of the AC component. |
| US09722518B2 |
System and method for improving acceleration performance of an electric vehicle
Systems and methods are disclosed for improving acceleration performance of an electric vehicle that includes an electric motor for propulsion. An exemplary system may include an inverter configured to drive the electric motor. The inverter may include at least one power electronic device. The system may also include a torque capability controller. The torque capability controller may be configured to receive information indicative of a selection between a first mode and a second mode. The second mode may correspond to a higher torque to be output by the electric motor than the first mode. The torque capability controller may also be configured to apply a switching frequency to the at least one power electronic device. The switching frequency may have a lower value when the received information indicates the selection of the second mode than when the received information indicates the selection of the first mode. |
| US09722517B2 |
Systems and methods for rotor position determination
Various embodiments are described herein for a system and method to eliminate mutual flux effect on rotor position estimation of switched reluctance motor (SRM) drives at rotating shaft conditions without a prior knowledge of mutual flux. Neglecting the magnetic saturation, the operation of conventional self-inductance estimation using phase current slope difference method can be classified into three modes: Mode I, II and III. At positive-current-slope and negative-current-slope sampling point of one phase, the sign of current slope of the other phase changes in Mode I and II, but does not change in Mode III. In one example embodiment, in order to operate the self-inductance estimation in Mode III, a variable-hysteresis-band current control method is proposed for the incoming phase and variable-sampling method is proposed for the outgoing phase. |
| US09722513B2 |
Torque-based stepwise motor starting
One embodiment describes a method that includes determining a desired torque level of a motor actuated by a motor starter; determining, using a control system, a configuration of the motor starter to achieve the desired torque level, in which determining the configuration includes determining which of a plurality of switching devices in the motor starter should be opened and which should be closed; and instructing, using the control system, the motor starter to implement the determined configuration by opening or closing one or more of the plurality of switching devices. |
| US09722511B2 |
Systems and methods for controlling an electrical power supply
Systems and methods for controlling an electrical power supply are provided. One system includes an input configured for receiving voltage measurement signals for the power supply and a controller for one or more electrical phases of the power supply. The controller includes an integrator configured to integrate the received voltage measurement signals and to generate integrated control signals or integrated error signals. The controller is configured to generate an output signal using the integrated control signals or the integrated error signals. The system also includes an output configured to output the output signal to control switching of the power supply. |
| US09722510B2 |
Modular inverter platform providing physical and electrical configurability and scalability
Modular inverter platforms and methods for providing physical and electrical configurability and scalability are disclosed. The modular inverter apparatus includes a printed circuit board (PCB) comprising at least two modules and one or more mounting components structured to switch the at least two modules between a plurality of physical configurations. The modular inverter apparatus also includes a plurality of electrical interconnections structured to electrically connect the at least two modules and to switch the at least two modules between a plurality of electrical configurations. |
| US09722508B2 |
Power conversion device and three-phase alternating current power supply device
Provided is a power conversion device that converts power between DC units and three-phase AC. A first-phase conversion device, a second-phase conversion device, and a third-phase conversion device each include a DC/DC conversion circuit and a single-phase power conversion circuit. For each of the first-phase conversion device, the second-phase conversion device, and the third-phase conversion device, when an absolute value of a voltage target value for the AC exceeds DC voltage of each DC unit, a control unit causes the DC/DC conversion circuit to operate to achieve the absolute value of the voltage target value and causes the single-phase power conversion circuit to only perform necessary polarity inversion, and when the absolute value of the voltage target value is smaller than the DC voltage, the control unit stops operation of the DC/DC conversion circuit and causes the single-phase power conversion circuit to operate to achieve the voltage target value. |
| US09722507B2 |
Electric power conversion apparatus
An electric power conversion apparatus according to an embodiment includes, wherein when a constituent element constituted of a leg in which two switching elements provided with self-arc-extinguishing capability are connected in series, and a capacitor connected in parallel with the leg is made a converter unit, and a constituent element formed by connecting one or more converter units in series is made a phase arm, a phase arm on the positive side, a single-phase four-winding transformer, and a phase arm on the negative side are included in each of three phases, one end of the phase arm on the positive side is connected to the positive side of a secondary winding of the four-winding transformer, and the other end thereof is connected to a DC positive side terminal. |
| US09722503B2 |
Modular configurable multi-megawatt power amplifier
In an embodiment, a power converter includes: a plurality of power amplifier units, each having: a plurality of slice each with a power conversion module including an AC/DC/AC converter; a mains controller to control the plurality of slices; and a feedback conditioning system coupled to the mains controller; a plurality of input contactors and a plurality of output contactors via which each of the plurality of power amplifier units is to couple between a transformer and a load; and a master controller coupled to the plurality of power amplifier units. |
| US09722500B2 |
Digital broadcast receiver apparatus and method
A power conversion device includes a power conversion circuit having first, second, third, and fourth switches, and a controller. The controller generates a first pulse signal for controlling the turning on and off of the first and fourth switches and a second pulse signal for controlling the turning on and off of the second and third switches, based on a circuit current flowing in the power conversion circuit and a voltage of an AC power source. The turning on and off of the switches causes the power conversion device to have a flowing current in which a high frequency component is mixed with a low frequency component. |
| US09722498B2 |
Control circuit for switching power converters with synchronous rectifiers
A control circuit for switching power converters with synchronous rectifiers is disclosed for providing start-up and shut-down protection. The control circuit for switching power converters with synchronous rectifiers includes a device for blocking the driving signals to the synchronous rectifiers, a voltage sampling circuit, a reference voltage, and a comparator. The comparator compares a sample voltage to a reference voltage to determine when to block and when to admit driving signals to the synchronous rectifiers. The control circuit for switching power converters with synchronous rectifiers is particularly useful for minimizing component damage due to start-up and shut-down transients. |
| US09722495B2 |
Systems and methods for real-time signal sampling in power conversion systems
System and method for regulating a power conversion system. An example system controller includes a signal processing component and a driving component. The signal processing component is configured to receive a feedback signal associated with an output signal of a power conversion system and generate a processed signal based on at least information associated with the feedback signal. The driving component is configured to generate a drive signal based on at least information associated with the processed signal and output the drive signal to a switch in order to affect a primary current flowing through a primary winding, the drive signal being associated with a demagnetization period corresponding to a demagnetization process of the power conversion system. The signal processing component is further configured to, sample and hold the feedback signal a plurality of times during the demagnetization period to generate a plurality of sampled and held signals. |
| US09722491B2 |
Method and apparatus for operating a switchmode power supply
A method and apparatus operate a switchmode power supply. The apparatus can include a pulse width modulation controller that can produce a first pulse width modulation signal at a first frequency. The apparatus can include a switchmode power supply switching element including a control terminal. The apparatus can include a harmonic filter coupled between the pulse width modulation controller and the control terminal of the switching element. The harmonic filter can provide a second pulse width modulation signal at a second frequency to the control terminal of the switching element. The second frequency can be higher than the first frequency. |
| US09722490B2 |
Smooth transition of a power supply from a first mode, such as a pulse-frequency-modulation (PFM) mode, to a second mode, such as a pulse-width-modulation (PWM) mode
In an embodiment, an apparatus, such as a power-supply controller, includes a generator and an adjuster. The generator is configured to provide a switching signal that causes a power supply to generate a regulated output signal, and the adjuster is configured to impart a condition to the power supply while the power supply is operating in a first mode, the condition being approximately equal to a condition that the power supply would have if the power supply were operating in a second mode. For example, such an apparatus may be able to reduce or eliminate a transient on a regulated output signal (e.g., a regulated output voltage) when a power supply transitions from a first operating mode, such as a pulse-frequency-modulation (PFM) mode, to a second operating mode, such as a pulse-width-modulation (PWM) mode. |
| US09722480B2 |
Position controlled electrodynamic linear motor
A linear drive for a miniaturized optical system, as used for example in an endoscope, includes a stator and an armature. The stator has a coil with two stator pole shoes arranged in axial direction, and two magnetic field sensors arranged at the outer side of the stator pole shoes. The armature has permanent magnets which are polarized in opposite directions, and a center armature pole shoe between the two permanent magnets, and an armature pole shoe at each side of the permanent magnet, opposite to the center armature pole shoe in axial direction. The magnetic field of the outer armature pole shoe goes completely or only in part, dependent from the armature position, through the magnetic field sensor and thus generates a position-dependent signal. This signal can be used for measuring and/or controlling the position of the armature. |
| US09722476B2 |
Self-centering electromagnetic transducers
Self-centering electromagnetic transducers, such as linear motors and generators, are disclosed. In one embodiment, an electromagnetic transducer includes an outer yoke made of a ferromagnetic material, and a coil assembly including a plurality of loops of electrically conductive wire, wherein the coil assembly is substantially surrounded by the outer yoke. The electromagnetic transducer further includes a magnet, and an inner yoke made of ferromagnetic material. The magnet is disposed within the outer yoke such that the coil assembly surrounds the magnet. The inner yoke is disposed within the magnet, and the magnet is free to translate. The electromagnetic transducer further includes at least one high-reluctance zone positioned within the outer yoke and/or the inner yoke. In some embodiments, the electromagnetic transducer includes one or more actuators that vary a width of one or more high-reluctance zones to change a spring rate of the electromagnetic transducer. |
| US09722472B2 |
Systems, computer medium and computer-implemented methods for harvesting human energy in the workplace
Provided are embodiments of systems, computer medium and computer-implemented methods for harvesting human energy from an employee. The techniques including determining an amount of energy harvested, and selectively enabling/disabling one or more electronic user devices based at least in part on the amount of energy harvested. The amount of energy harvested including kinetic energy and neural energy. The kinetic energy having been harvested by a kinetic energy system including one or more kinetic energy harvesting devices that harvest kinetic energy generated by physical activity of an employee. The neural energy having been harvested by a neural energy system that includes one or more neural energy harvesting devices that harvest neural energy generated by neural activity of the employee. |
| US09722469B2 |
Housing of a driving device
A housing of a driving device, in particular an electric motor adjustment drive for a motor vehicle, has a housing opening, which is covered by a gas-permeable membrane, in particular a membrane that is impermeable to liquid. The housing opening is surrounded by a collar contour, which is interrupted locally at the circumference and within which the membrane lies. |
| US09722468B2 |
Motor with rotor-mounted control circuitry
A rotating electromechanical machine has a rotor having at least one current-carrying winding and at least one rotor-mounted sensor configured to sense a machine property or parameter during machine operation. Rotor-mounted circuitry dynamically modifies at least one property of the current-carrying winding during machine operation in response to the sensed machine property or parameter. |
| US09722466B2 |
Rotary electric machine having shifted winding wire
A rotary electric machine includes a stator in which a plurality of armatures each have a coil formed by a winding wire wound in plural layers around bobbins mounted to a magnetic pole tooth, which are disposed annularly on an inner circumference of a cylindrical frame. The coil is formed by the winding wire being wound with a constant feed pitch in parallel with slots of the bobbins in plural layers. The winding wire forming a first layer of the coil is shifted by half the feed pitch between a left side and a right side of a center axis of the coil as viewed from a plane perpendicular to a stacking direction of a stacked iron core. |
| US09722465B2 |
Stator for rotating electric machine and method for manufacturing stator for rotating electric machine
A tooth of a stator has a tapered shape in which a tooth width decreases toward a distal end portion thereof. A winding is formed of an edgewise winding wound around the tooth in a row. The winding is supplied with power so that a terminal on a base portion side of the tooth may have a higher voltage than that of a terminal on the distal end portion side thereof. A tooth width Th of the base portion is set within the range of Tmin |
| US09722462B2 |
System and method for controlling resonant wireless power source
A resonant wireless power system includes a source circuit having a source coil, an ac driver with a first resistance, representing the equivalent output impedance of the ac driver, and a matching network. A current probe measures the magnitude signal of the instantaneous source coil current. A voltage probe measures the instantaneous ac driver voltage. A phase detector compares the phase of the instantaneous source coil current and the instantaneous ac driver voltage, and produces a first output signal proportional to the phase difference. A first amplifier compares the magnitude signal and a target signal, and produces an error signal proportional to the difference. A first compensation filter produces the control voltage that determines the ac driver supply voltage. A second amplifier amplifies the first output signal. A second compensation filter produces the control voltage that determines the impedance of a variable element in the source circuit. |
| US09722459B2 |
Apparatus and method for providing uninterruptible power
Systems and methods of controlling an uninterruptible power supply are provided. The uninterruptible power supply includes an input configured to receive input power, an output, a power conversion circuit coupled with the input and the output, and a controller coupled with the power conversion circuit. The power conversion circuit includes an inverter, which includes a low pass filter. The low pass filter includes an inductor, and the controller is configured to provide control signals to the inverter such that a first current, measured at the inductor, generates a second current, measured at the output, where the first current has a first polarity and the second current having a second polarity, and the first polarity is either zero or the same polarity as the second polarity. |
| US09722458B2 |
Power conversion device and method of controlling the same
A power conversion device includes a smoothing capacitor, an input voltage detection unit, a power conversion unit, and a controller. The input voltage detection unit detects a voltage value of the input voltage. The power conversion unit converts a direct-current voltage smoothed by the smoothing capacitor into an alternating-current voltage to output the alternating-current voltage to a power system. The controller has a first operation mode of outputting active power to the power system, has a second operation mode of outputting reactive power to the power system, determines whether or not the voltage value is one of equal to and higher than a determination value, and makes a transition from the first operation mode to the second operation mode within a predetermined time from a time point when it is determined that the voltage value is lower than the determination value. |
| US09722455B2 |
Controlling an application parameter
An apparatus, method, and computer program product for: receiving an indication of presence of a wireless charging field, detecting a change of orientation of a device during the presence of the wireless charging field and controlling an application parameter based on the detected change. |
| US09722453B2 |
Touch screen, electronic device, and wireless charging method
A touch screen, an electronic device, and a wireless charging method are provided. The touch screen includes: a substrate adapted to carry a touch sensor circuit, where the touch sensor circuit includes a first touch sensor circuit and a second touch sensor circuit; and an equivalent switch arranged between the first touch sensor circuit and the second touch sensor circuit, where the first touch sensor circuit and the second touch sensor circuit form the touch sensor circuit in a case that the equivalent switch is off; and the first touch sensor circuit and the second touch sensor circuit form an equivalent coil and two ends of the equivalent coil are connected to a rechargeable power supply to generate an induced current for charging the rechargeable power supply, in a case that the equivalent switch is on. |
| US09722449B2 |
Wireless power transmission system, furniture having wireless charging function used therein, and wireless power transmission apparatus used therein
Disclosed herein is a furniture having a wireless charging function, including: one or more transmission coil units disposed on the same plane of a flat plate of the furniture; and a central transmission controlling unit configured to select at least one transmission coil unit corresponding to a wireless power reception apparatus when the wireless power reception apparatus is placed on the flat plate, and to transmit a wireless power signal through the selected transmission coil unit, the central transmission controlling unit being installed separately from the plurality of transmission coil units. |
| US09722444B2 |
Electronic device and charging interface
An electronic device includes a platform controller hub and a charging interface. The charging interface includes a connector for coupling to a peripheral device, and a charging integrated circuit coupled to the connector. The connector includes an insert detecting member for detecting if the peripheral device is inserted. The charging integrated circuit can provide power to the connector. The platform controller hub can exchange data through the connector through the charging integrated circuit. The charging integrated circuit can cut off the power to the connector when the insert detecting member detects that no peripheral device is inserted in the connector. |
| US09722440B2 |
Modular object holder
An object holder adapted to hold a wide variety of objects including beverage holders such as cups, bottles, mugs, and tumblers; electronic devices such as mobile phones and tablets; remote controls; eating and writing utensils; and books. The device preferably includes a base, an upright extending upward from the base, and a receiver near the top of the upright. The receiver preferably includes an object holder which is preferably made detachable so that it may be washed in a dishwasher. The height of the receiver with respect to the base is adjustable in the present invention. The rotation of the receiver with respect to the base is preferably also made adjustable. The adjustment mechanism may preferably be activated using only one hand. |
| US09722437B2 |
Balancing device and method
Provided are balancing device and method which can achieve a balancing function between energy storage units connected in series using a small number of switch elements, thereby reducing the manufacturing cost and size and enabling various balancing modes. The balancing device for balancing between a plurality of energy storage units a battery module, in which the energy storage units are connected in series, includes: a transformer; and a switch network comparing a cell switch unit, a polarity switch unit, and au auxiliary switch unit, wherein the auxiliary switch unit includes: a first auxiliary switch unit for connecting a second common node to one terminal of the secondary winding of the transformer; and a second auxiliary switch unit for connecting a first common node to the other terminal of the secondary winding of the transformer. |
| US09722432B2 |
Contactless power supplying system, electric appliance, repeater, and adaptor
A contactless power supplying system includes a contactless power supplying device provided with a high-frequency inverter and a primary coil and an electric appliance provided with a secondary coil and a power receiving circuit that supplies induced electromotive force generated by the secondary coil to a load. The system further includes a structure having a variable shape and adapted to be independently secured, and at least one of a connecting wire for connecting the primary coil to the high-frequency inverter, a connecting wire for connecting the secondary coil to the power receiving circuit, and a connecting wire for connecting the power receiving circuit to the load. The at least one of the connecting wires is arranged along the structure. The secondary coil is spatially positioned with respect to the primary coil depending on the shape of the structure. |
| US09722427B2 |
Modular inverter system
A system connected to an AC power grid having an AC phase signal includes an inverter module including a first inverter coupled to a DC voltage, actuated based on the AC phase signal. The first inverter provides a first voltage signal having predetermined harmonic components. A second inverter includes second switch elements coupled to the DC voltage and actuated by a second set of control signals phase delayed with respect to the first control signals. A transformer module has first and second primary windings coupled to the first and second inverters. The transformer module further includes a secondary winding coupled to first primary winding, the second primary winding, and the AC power grid. The secondary winding is configured to provide a secondary output voltage to the AC power grid by combining the first voltage signal and the second voltage signal such that the predetermined harmonic components are substantially cancelled. |
| US09722426B2 |
Hybrid energy system and method
A hybrid energy system includes a (GTG) configured to provide a full-load power output and a storage device configured to store energy. The hybrid energy system includes a generator step-up transformer, wherein the GTG and the storage device are electrically co-located on a low side of the generator step-up transformer. |
| US09722423B2 |
Renewable energy power generation systems
We describe a modular adjustable power factor renewable energy inverter system. The system comprises a plurality of inverter modules having a switched capacitor across its ac power output, a power measurement system coupled to a communication interface, and a power factor controller to control switching of the capacitor. A system controller receives power data from each inverter module, sums the net level of ac power from each inverter, determines a number of said capacitors to switch based on the sum, and sends control data to an appropriate number of the inverter modules to switch the determined number of capacitors into/out of said parallel connection across their respective ac power outputs. |
| US09722419B2 |
Electrostatic discharge protection
An electrostatic discharge protection circuit comprises at least two electrostatic discharge protection units connected in series between respective pairs of at least three input terminals, one of the input terminals being a reference input terminal. Each of the units comprises a silicon controlled rectifier and a current mirror. The output of the silicon controlled rectifier constitutes a first output of the respective unit and is connected to an input terminal of the circuit. The output of the current mirror constitutes a second output of the respective unit and is connected with the reference input terminal of the circuit. Thus the units are connected in series but the output terminals of the current mirrors are all connected with the reference input terminal, which may be a ground terminal, so as to minimize the breakdown resistance of the circuit. |
| US09722418B2 |
Complex protection device
Disclosed is a complex protection device including a substrate, fuse terminals provided on the substrate, first resistive terminals provided on the substrate so as to be separated from the fuse terminals, second resistive terminals provided on the substrate opposite to the first resistive terminals across the fuse terminals, a fusible element connected to the fuse terminals, a first surface-mounted resistive element connected to the first resistive terminals, a second surface-mounted resistive element connected to the second resistive terminals, at least one printed resistive element connected to at least one of the first resistive terminals and the second resistive terminals and connected to at least one of the first surface-mounted resistive element and the second surface-mounted resistive element, and a switching element controlling flow of current to the first and second surface-mounted resistive elements and the at least one printed resistive element if overvoltage is applied. |
| US09722412B2 |
Hardware based over-current protection circuitry for power distribution systems
A power distribution unit that switches off power outlets in the event of an over-current condition by using circuitry that measures how long input current has exceeded a threshold and sending a reset signal to the power outlets when input current has exceeded the threshold for a predetermined time duration. |
| US09722411B2 |
Secondary power system and power supply device
The present provides a secondary power system and a power supply device. The secondary power system is used for supplying power for a load equipment, and comprises: a fuse circuit, a filter circuit, a convertor circuit and an over-voltage and under-voltage protection circuit, wherein, the fuse circuit, the filter circuit, the over-voltage and under-voltage protection circuit and the convertor circuit are sequentially connected in series; the over-voltage and under-voltage protection circuit is configured to cut off power supplied to the convertor circuit when power supplied by the primary power source is an under-voltage or over-voltage; the convertor circuit is configured to convert the primary power source into a secondary power source. The secondary power system, by providing an over-voltage and under-voltage protection circuit, can not only lower the cost of the convertor circuit, but also save the space occupied by the convertor circuit. |
| US09722409B2 |
Selectivity module with serial status signal
A selectivity module for dividing a load current in an installation system includes a housing, a plurality of branches in the housing, a plurality of switching devices, and a control unit. Each of the plurality of switching devices is configured for switching a branch current on and off in a corresponding one of the plurality of branches. The plurality of switching devices serves to output information about corresponding switching states. The control unit is connected to the plurality of switching devices and configured to output a status signal as a function of the output information from the plurality of switching devices. The output information relating to the individual switching states of all of the plurality of switching devices is contained in the status signal in a serial encoded form. |
| US09722408B2 |
ARC-free capacitor trip device
An apparatus includes an energy storage module that receives power from an AC power source. The energy storage module is sized to store electrical energy received from the AC power source that is sufficient to open one or more contacts when the AC power source is not present. The contacts disconnect electrical power to a load and the electrical energy is stored in a DC energy storage device. A connection module connects the energy storage device in series with a trip contact, a trip circuit, and an auxiliary contact. The trip contact closes in response to a trip signal. The trip circuit disconnects the one or more contacts in response to being energized, and the auxiliary contact opens in response to opening of the one or more contacts and disconnects power to the trip circuit. A disconnect module periodically disconnects electrical power from the trip circuit and the auxiliary contact. |
| US09722406B2 |
Undersea cable, undersea cable installation structure, and method for installing undersea cable
Ocean floating installations (1) are disposed on the ocean. The ocean floating installations (1) float on the ocean with the lower part of the ocean floating installations (1) being fixed to the seabed by mooring ropes (11). Each of the ocean floating installations (1) is connected at a connection part (5a) to a cable (3), which is a first cable. Each of the cables (3) is connected at a connection part (5b) to a cable (7), which is a second cable. In other words, the ocean floating installations (1) are connected to each other by the cables (3) and the cable (7). A connection is established with the cables (7) at the connection parts (5b) located on the seabed. In other words, the cables (7) are installed on the seabed. |
| US09722405B2 |
Locking cable hanger and method of using
This invention has to do with a locking cable hanger assembly system for the solar, mining, and electrical industry. The locking cable hanger assembly is comprised of a new wire locking mechanism, new multiple cable carrier saddles on one hanger, data carrier wire capability, and optional high dielectric, UV coated material. |
| US09722403B2 |
Electrical raceway drain fitting
A low point raceway fitting for draining accumulated condensation from electrical raceway systems installed in industrial, commercial and residential facilities. The drain fitting is a tubular member having a throughbore for pulling wire, connecting ends for installation in a raceway system, and an enlarged section between the ends profiled for engagement by a tool for installation. A drain passage is formed radially through the tool engaging section and is positioned at the underside of the horizontal fitting for gravity drainage. A screen insert can be placed in the drain passage to keep dirt and insects out. |
| US09722402B2 |
Cable carrier guide
A long travel cable carrier guide has a plurality of guideposts that support an upper portion of a cable carrier. The plurality of guideposts include horizontal rollers that rotate to allow the cable carrier to pass by the guideposts, but automatically return to a resting position wherein the horizontal rollers protrude into the path of the cable carrier. |
| US09722398B2 |
Optical device structure using GaN substrates for laser applications
An optical device includes a gallium nitride substrate member having an m-plane nonpolar crystalline surface region characterized by an orientation of about −1 degree towards (000-1) and less than about +/−0.3 degrees towards (11-20). The device also has a laser stripe region formed overlying a portion of the m-plane nonpolar crystalline orientation surface region. In a preferred embodiment, the laser stripe region is characterized by a cavity orientation that is substantially parallel to the c-direction, the laser stripe region having a first end and a second end. The device includes a first cleaved c-face facet, which is coated, provided on the first end of the laser stripe region. The device also has a second cleaved c-face facet, which is exposed, provided on the second end of the laser stripe region. |
| US09722395B2 |
Method and apparatus for mounting a semiconductor disk laser (SDL)
The present invention describes a method and apparatus for mounting a semiconductor disc laser (SDL). In particular there is described a cooling apparatus assembly (12) for mounting the semiconductor disc laser (1) the cooling apparatus assembly comprising a crystalline heat spreader (8) made of diamond, sapphire or SiC and optically contacted to the SDL (1). The apparatus further comprises a heatsink (13) made of copper and a recess (16) located on a first surface (15) of the heatsink. A pliable filler material (17) which may be In or an In alloy is provided within the recess (16) such that when a sealing plate (19) is fastened to the heatsink the SDL (1) is hermetically sealed within the recess. Hermetically sealing the SDL within the recess is found to significantly increase the lifetime of the device comprising the SDL. The heat sink (13) may be water cooled with pipes (14) delivering the water. In case the sealing plate (19) is made from for example Invar, it has an aperture (20). |
| US09722376B2 |
Connecting device and method for recognizing device
A connecting device is provided. The connecting device includes a first connector having a first pin row, a second connector having a second pin row, a data line connecting a data pin of the first pin row and a data pin of the second pin row, and a recognition line connecting a power pin of the first pin row and a recognition pin of the second pin row through a physical element. |
| US09722372B2 |
Longitudinally adjustable flat wire raceway
A flat wire assembly is positioned between retracted and extended states. The assembly includes an adjustable flat wire junction block having a main body. An extender extends outwardly from the main body. A cable which houses wires extends outwardly from the outer end of the extender. A cover plate extender is positionable between extended and retracted states. Sliders associated with slide brackets and associated with blade/wire connectors connect the flat wire blades to wires so that the positions of the sliders along the length of the flat wire blades are adjustable, thereby adjusting the length of the flat wire assembly. A cover and a base may be used to enclose the flat wire blades and the wires, and may be extended or retracted with the sliders sliding along the flat wire blades. |
| US09722371B2 |
Socket for vehicle passenger compartment
A socket for a vehicle passenger compartment comprising a socket body and at least one electrical connection element fixed to the socket body by clinching. The socket is adapted for use on multiple vehicles of different manufacturers. |
| US09722370B2 |
Method for reducing crosstalk in electrical connectors
An apparatus and method for crosstalk compensation in a jack of a modular communications connector includes a flexible printed circuit board connected to jack contacts and to connections to a network cable. The flexible printed circuit board includes conductive traces arranged as one or more couplings to provide crosstalk compensation. |
| US09722366B2 |
Electrical connector incorporating circuit elements
An electrical connector electrically connects a first printed circuit board and a second printed circuit board, where the electrical connector includes: (a) an insulative housing; (b) a plurality of signal conductors, with at least a portion of each of the plurality of signal conductors disposed within the insulative housing; (c) each of the plurality of signal conductors having a first contact end, a second contact end and an intermediate portion therebetween; and (d) a passive circuit element electrically connected to the intermediate portion of each of the plurality of signal conductors, where the passive circuit element is housed in an insulative package and includes at least a capacitor or an inductor. |
| US09722365B1 |
Connector
The connector includes a circuit board having a number of electronic components, a transmission assembly joined to the circuit board to a side of the electronic components, a first shielding member on the circuit board shielding the transmission assembly, a second shielding member on the circuit board shielding the electronic components, and a cover on and shielding the first and second shielding members. The connector can be produced to meet different needs by using a common first shielding member joined to a second shielding member adapted to a specific requirement such as dimension, shape, etc., thereby reducing the production and stock costs. The transmission assembly and the electronic components are shielded by the first and second shielding members, respectively, which are further shielded by the cover so as to prevent RF signal leakage and to achieve superior transmission quality. |
| US09722364B1 |
Outdoor external lightning arrestor
An outdoor external lightning arrestor includes a transmission line, a signal suppression circuit, insulation housing, a ground member, and a metal housing. The signal suppression circuit includes a circuit board thereon. A first connector, a second connector, and at least one protector are electrically connected to the circuit board. The first connector is electrically connected to the transmission line. The insulation housing is assembled to the circuit board and ground member, and the first resilient plate at one side of the ground member is in electrical contact with the second connector. The insulation housing is installed inside the metal housing, so that the second resilient plate at the other side of the ground member is in electrical contact with the metal housing. |
| US09722363B2 |
Coaxial cable connector with integral RFI protection
A coaxial cable connector for coupling an end of a coaxial cable to a terminal is disclosed. The connector has a coupler adapted to couple the connector to a terminal, a body assembled with the coupler and a post assembled with the coupler and the body. The post is adapted to receive an end of a coaxial cable. The post has an integral contacting portion that is monolithic with at least a portion of the post. When assembled the coupler and post provide at least one circuitous path resulting in RF shielding such that RF signals external to the coaxial cable connector are attenuated, such that the integrity of an electrical signal transmitted through coaxial cable connector is maintained regardless of the tightness of the coupling of the connector to the terminal. |
| US09722358B1 |
Power cord retainer
A Power Cord Retainer is disclosed for retaining a power cord in an electrical receptacle even when the cord is subjected to an extraction force. The retainer comprises a substantially flat rear panel having a left side, right side and top side that define a u-shaped interior midsection. Opposing side panels extend forward of the rear panel and include an outwardly extending clip having a hooked end adaptable for engagement and securement of a power cord plug in a receptacle. The u-shaped interior midsection is adaptable for engagement between an electrical enclosure exterior panel and a receptacle lip extension. |
| US09722357B1 |
Technology for maintaining secure connections of electronic cabling
For a chassis having a port mounted on a side of the chassis and connected to electronics in the chassis, with a plug mated in the port and a cable connected to the plug, first and second supports are mounted on the chassis side on opposing sides of the port, where each support has a respective, predetermined length extending away from the chassis side. A strap defines a slot beginning at a first end of the strap and extending along a portion of the strap's length. The strap is placed with the cable inserted in the slot and the plug at a central portion of the strap. With the supports mounted on the chassis side on opposing sides of the port, the strap connected to the respective supports, at least the plug forces curvature in a central portion of the strap, so that the central portion of the strap clamps the plug. |
| US09722354B2 |
Electronic card connector having improved shielding shell for electrostatic discharge protection
An electronic card connector, cooperated with a plug-in component and defining an insertion direction and a transverse direction perpendicular to the insertion direction, includes an insulative housing, a number of contacts retained in the insulative housing, a metal shell attached to the insulative housing and forming a cavity therebetween, and an ejector movable in the insulative housing. The metal shell has a number of lateral walls located at two sides and a front end thereof. One of the lateral walls has a resisting portion protruding to the cavity and resists the resisting portion to confine a movement thereof in a horizontal plane. |
| US09722353B2 |
Connector with alignment function
It is aimed to smoothly connect connectors by absorbing assembling variations between the connectors. A first spring piece (24) and a pair of second spring pieces (27) are deflectably provided in a holder portion (H) to resiliently sandwich a first connector (6) in a Y-axis direction. The second spring pieces (27) are formed with upper receiving surfaces (29) symmetrically inclined along an X-axis direction so that resilient forces act on both receiving portions (18) of the first connector (6) toward a center axis along the X-axis direction. Further, the first connector (6) is held in a state displaceable also in a Z-axis direction in the holder portion (H). This causes the first connector (6) to be held at a reference position and held in a three-dimensionally displaceable state. |
| US09722344B1 |
Safety shield for an electric plug
A safety shield is provided for use with an electrical plug engaged in a wall socket, the plug having two or more prongs extending from a plug body. The shield comprises a plate formed of an electrically insulating material, with two or more openings defined in the plate in alignment with the two or more prongs of the electrical plug, each opening sized for a snug fit with a corresponding prong. The plate defines a perimeter area around the two or more openings that is at least five times greater than a planar area bounded by the two or more openings. |
| US09722339B2 |
Connector and method of manufacturing same
A connector including a body, an adjacent pair of first terminals, a second terminal next to one of the first terminals, a third terminal next to the other first terminal, and a fourth terminal. The body holds the terminals at least partially and includes a first recess, a second recess, and a first separating portion therebetween. The first and third terminals each have a portion exposed through the first recess. The fourth terminal has a portion exposed through the second recess. The second terminal includes an exposed portion and an unexposed portion. The unexposed portion includes an area on one side in the first direction of a part in the second direction of the second terminal and is covered with the body. The exposed portion includes an area on the other side in the first direction of the part of the second terminal and is exposed through the first recess. |
| US09722338B2 |
Electric cable structural body, electric connection structure, and method for producing electric cable structural body
A first direction exposed conductor group includes a plurality of exposed conductor portions of a first flat cable, and a second direction exposed conductor group includes a plurality of exposed conductor portions of a second flat cable. The plurality of exposed conductor portions are located parallel to each other, and the plurality of exposed conductor portions are located parallel to each other. The first direction exposed conductor group and the second direction exposed conductor group intersect and overlap each other to form an intersection overlap portion. An intersection insulating film is provided between the first direction exposed conductor group and the second direction exposed conductor group at the intersection overlap portion. The exposed conductor portions and the exposed conductor portions facing each other via windows of the intersection insulating film are connected to be conductive to each other. Thus, an electric cable structural body is provided. |
| US09722337B2 |
Assembly for a computer system and angle plug
An assembly for a computer system includes an insert housing with a housing floor; a power supply unit arranged on the housing floor and having a plug contact; a main circuit board arranged within the insert housing substantially parallel to the housing floor; and an angle plug having a mating plug contact and a connection region for connection of the power supply unit to the main circuit board, wherein the angle plug, when connected to the main circuit board via the connection region, connects to a top face of the main circuit board at a first installation height of the main circuit board and connects to a bottom face of the main circuit board at a second installation height of the main circuit board so that height compensation with respect to the plug contact of the power supply unit is established in each case. |
| US09722336B2 |
Circuit board with resilient seal as vapor barrier
A circuit board has a socket with at least one plated through-hole. A connector includes a housing that has first and second connector interfaces with, respectively, at least first and second connector contacts. The first connector interface opens into an interior of the housing such that there is a vapor path through the first connector interface and the interior of the housing to the second connector contact at the second connector interface. A resilient seal is located at the first connector interface. The first connector contact extends through the resilient seal and into the plated through-hole. The resilient seal intimately seals around the first connector contact and provides a barrier at the first connector interface into the vapor path. |
| US09722333B2 |
Electronic component
An electronic module includes a circuit board having three first holes arranged therein in a predetermined pattern, and a cable having at least three wires, a support clip and a body. The three wires are arranged around a longitudinal axis of the cable. The support clip has a fixing element arranged radially outside the wires. The wires are held by the fixing element in such a way that the support clip is fixed in a non-rotational manner relative to the wires. The cable is configured in such a way that the support clip is connected in a non-rotational manner to the body with respect to the longitudinal axis, and that a course of the wires is deflected by the body in such a way that the ends of the wires are positioned in the predetermined pattern. Conductors of the wires are disposed in the first holes. |
| US09722330B2 |
Post-less coaxial cable connector with compression collar
A coaxial cable connector includes an inner barrel having a longitudinal axis, a front end, a rear end, and a compression band between the front and rear ends. A compression collar is mounted to the inner barrel for axial movement over the inner barrel from a retracted position to an advanced position. An inner post of the connector has opposed front and rear ends, and the front end of the inner barrel is carried at and on the rear end of the inner post. In response to axial movement of the compression collar over the inner barrel, the compression band compresses inward. When a cable is applied to the connector and the compression collar is moved axially forward over the inner barrel, the connector is permanently secured to the cable. |
| US09722325B2 |
Antenna configuration with coupler(s) for wireless communication
A cellular low band antenna is indirectly coupled to communication signals via a first coupler that is located within a same volume of a body as one or more wireless local area network (WLAN) antennas. Various antenna configurations can include the one or more WLAN antennas being indirectly coupled to communication signals via a second coupler within the same volume as the cellular low band antenna. A high band antenna is located in a different volume that is adjacent to the volume of the cellular low band antenna and the one or more WLAN antennas. Another similar antenna system can be provided in a separate volume for diversity communications in a communication device, such as a tablet, laptop or other such communication device. |
| US09722321B2 |
Full wave dipole array having improved squint performance
A cellular base station antenna having improves squint performance is provided. The antenna includes a ground plane, a first plurality of radiating elements supported over the ground plane by microstrip support PCBs, and a second plurality of radiating elements supported over the ground plane by stripline support PCBs. The first and second pluralities of radiating elements are arranged in at least one array of low band radiating elements, and the quantities of first and second pluralities of radiating elements are selected to reduce squint of a beam produced by the at least one array. The first plurality of radiating elements may be located below the second plurality of radiating elements in the array. The array may be arranged in a linear column or a staggered column. In one example, the first plurality of radiating elements comprises four radiating elements and the second plurality radiating elements comprises two radiating elements. |
| US09722319B2 |
Metamaterial antenna
The disclosure relates to a metamaterial antenna, where the metamaterial antenna includes an enclosure, a feed, a first metamaterial that clings to an aperture edge of the feed, a second metamaterial that is separated by a preset distance from the first metamaterial and is set oppositely, and a third metamaterial that clings to an edge of the second metamaterial, where the enclosure, the feed, the first metamaterial, the second metamaterial, and the third metamaterial make up a closed cavity; and a central axis of the feed penetrates center points of the first metamaterial and the second metamaterial; and a reflection layer for reflecting an electromagnetic wave is set on surfaces of the first metamaterial and the second metamaterial, where the surfaces are located outside the cavity. |
| US09722310B2 |
Extending beamforming capability of a coupled voltage controlled oscillator (VCO) array during local oscillator (LO) signal generation through frequency multiplication
A method includes separating phase of Local Oscillator (LO) signals generated by individual Voltage Controlled Oscillators (VCOs) of a coupled VCO array through varying voltage levels of voltage control inputs thereto. The method also includes frequency multiplying an output of each individual VCO of the coupled VCO array to increase a range of phase differences between the phase separated LO signals generated by the individual VCOs. Further, the method includes mixing the frequency multiplied outputs of the individual VCOs with signals from antenna elements of an antenna array to introduce differential phase shifts in signal paths coupled to the antenna elements during performing beamforming with the antenna array. |
| US09722305B2 |
Balanced multi-layer printed circuit board for phased-array antenna
A phased-array antenna assembly includes an antenna board stack, a radome configured to cover the antenna board stack, and a casing configured to support the antenna board stack. The antenna board stack includes a central core, a bottom antenna unit defining a bottom thickness between a bottom surface of the central core and a bottom end of the antenna board stack, and a top antenna unit defining a top thickness between a top surface of the central core and the top end of the antenna board stack that is substantially equal to the bottom thickness. The bottom antenna unit includes two spaced apart bottom metal layers each associated with a different distance from the axis of symmetry. The top antenna unit includes two spaced apart top metal layers each associated with a corresponding one of the distances from the axis of symmetry associated with the bottom metal layers. |
| US09722303B2 |
Wearable electronic device
A wearable electronic device includes a body and a wearing element. The body includes a conductive frame. The conductive frame includes a feeding point and at least one grounding point to form a first current path and a second current path. Furthermore, the conductive frame forms a loop antenna via the first current path and the second current path, respectively, so as to operate in a first band and a second band. The wearing element is connected to the body. |
| US09722302B2 |
Planar antenna microwave module
The present invention discloses a planar antenna microwave module, including an oscillation circuit board and a planar antenna board. The oscillation circuit board is a double-sided printed circuit board. The planar antenna board is a double-sided PCB independent of the oscillation circuit board. PCB copper foil of the planar antenna board forms a transmitting/receiving planar antenna. The planar antenna is laminated on a bottom surface of the oscillation circuit board by using a solder joint that runs through and electrically connects two layers of PCB copper foil, and is electrically connected to the oscillation circuit board through the solder joint. The antenna boards in the present invention are of independent and separate structures, and have a small design size, a simple manufacturing process, a short production cycle, low costs, and high economic benefits. |
| US09722298B2 |
Mobile wireless communications device with multiple-band antenna and related methods
A mobile wireless communications device may include a housing, a wireless transceiver carried by the housing and having a primary output, and a secondary output, and a multiple-band antenna carried by the housing and coupled to the wireless transceiver. The multiple-band antenna may include a dielectric substrate and a pattern of electrically conductive traces thereon defining a primary radiator and a secondary radiator spaced apart from the primary radiator. The primary radiator may include a first elongate member having a primary feed coupled to the primary output, and a first reference member spaced from the first elongate member and at least partially laterally surrounding the first elongate member and coupled to a reference voltage. The secondary radiator may include a second elongate member having a secondary feed coupled to the secondary output. |
| US09722297B2 |
Dielectric loaded elliptical helix antenna
An integrated wire elliptical helical antenna with novel cuboids dielectric resonator loading for circularly polarized wave transmission and reception is presented. The antenna is designed to operate in the center frequency of 915 MHz and it is utilized in RFID systems as a base station antenna. The elliptical structure is formed by steel wire and supporting acrylic plastic. The cuboids dielectric resonator is loaded at the inner surface of the proposed antenna. |
| US09722293B2 |
Communication device provided with antenna for near field wireless communication
A communication device includes a communication board; an antenna; a light-emitting element; and a connecting wire. The antenna is for near field wireless communication, and is provided on the communication board. The light-emitting element is provided on the communication board at a position away from the antenna. The connecting wire is provided on the communication board at a position away from the antenna and is connected to the light-emitting element. |
| US09722291B2 |
Dielectric resonator, assembly method thereof, and dielectric filter
The dielectric resonator includes a sealing cover, a dielectric resonant column, a metal cavity, and an electrically-conductive elastic structure body. The dielectric resonant column is located within the metal cavity, wherein the sealing cover is connected to an upper surface of the dielectric resonant column. The sealing cover is located at the upper end face of the metal cavity and is configured to seal the metal cavity. The metal cavity is provided with a groove at the bottom. The electrically-conductive elastic structure body is located within the groove and is configured to support the dielectric resonant column. The depth of the groove causes a lower surface of the dielectric resonant column to be lower than an inner bottom surface of the metal cavity after the sealing cover seals the metal cavity. A lower end face of the dielectric resonant column is in contact with the electrically-conductive elastic structure body. |
| US09722289B2 |
Metal-air flow batteries using oxygen enriched electrolyte
A metal air flow battery includes an electrochemical reaction unit and an oxygen exchange unit. The electrochemical reaction unit includes an anode electrode, a cathode electrode, and an ionic conductive membrane between the anode and the cathode, an anode electrolyte, and a cathode electrolyte. The oxygen exchange unit contacts the cathode electrolyte with oxygen separate from the electrochemical reaction unit. At least one pump is provided for pumping cathode electrolyte between the electrochemical reaction unit and the oxygen exchange unit. A method for producing an electrical current is also disclosed. |
| US09722288B2 |
Liquid electrolyte for batteries, method for producing the same, and battery comprising the same
An object of the present invention is to provide a liquid electrolyte for batteries, which has excellent ion conductivity, a method for producing the liquid electrolyte and a battery including the liquid electrolyte. Disclosed is a liquid electrolyte for batteries, comprising a mesoionic compound represented by the following general formula (1): wherein R1 and R2 are each independently an alkyl group having 1 to 3 carbon atoms. |
| US09722285B2 |
Method and system for equalizing and matching lithium secondary batteries
A method includes providing battery cells for secondary batteries. The battery cells are charged to a fixed voltage (Vc). The battery cells are laid aside in an open circuit for a preset self-discharge time period (t). A voltage (Vt) is measured after the period t for each battery cell. A voltage difference (ΔV) is determined for each battery cell, wherein ΔV=Vc−Vt. A self-discharge rate (ρ) is measured for each ΔV. A self-discharge current (Ic) is calculated during the period t, wherein Ic is a function of ρ. The Ic is curve-fitted to the ΔV for each battery cell to obtain an Ic−ΔV equation. The Ic is divided into h number of grades. The Ic−ΔV equation is utilized to determine h number of grades of ΔV associated with each grade of Ic. Battery cells are selected having a same grade of Ic and ΔV for matching. |
| US09722283B2 |
Using effective C-rates to determine inaccessible capacities of batteries
The disclosed embodiments provide a system that manages use of a battery in a portable electronic device. During operation, the system obtains a voltage of the battery and a state-of-charge of the battery and calculates an effective C-rate of the battery using the voltage and the state-of-charge. Next, the system uses the effective C-rate to estimate an inaccessible capacity of the battery. Finally, the system manages use of the battery with the portable electronic device based on the inaccessible capacity. |
| US09722276B2 |
Solid electrolyte, method for producing the same, and secondary battery comprising solid electrolyte
A solid electrolyte comprising: LiBH4; and an alkali metal compound represented by the following formula (1): MX (1) (in the formula (1), M represents an alkali metal atom, and X represents one selected from the group consisting of halogen atoms, NR2 groups (each R represents a hydrogen atom or an alkyl group) and N2R groups (R represents a hydrogen atom or an alkyl group)). |
| US09722273B2 |
Fuel cell system components
A fuel cell stack module includes a plurality of fuel cell stacks, a base supporting the plurality of fuel cell stacks, and a metal shell located over the base and the fuel cell stacks. The metal shell contains an integrated heat exchanger. |
| US09722270B2 |
Polymer, electrolyte membrane and electrode for a fuel cell, each including the polymer, fuel cell including at least one of the electrolyte membrane, and the electrode
A polymer including a reaction product of a sulfonated polyarylene ether sulfone and at least one compound selected from a sulfonated compound having a thiol group at a terminal thereof and a sulfonated compound having a hydroxy group at a terminal thereof. |
| US09722269B2 |
Reinforced electrode assembly
A fuel cell, a reinforced membrane electrode assembly and a method of fabricating a reinforced membrane electrode assembly. The method comprises depositing an electrode ink onto a first substrate to form a first electrode layer, applying a first porous reinforcement layer on a surface of the first electrode layer to form a first catalyst coated substrate, depositing a first ionomer solution onto the first catalyst coated substrate to form a first ionomer layer, and applying a membrane porous reinforcement layer on a surface of the first ionomer layer to form a reinforced membrane layer. |
| US09722265B2 |
Pressure-based liquid level detection and control for a fuel cell stack assembly
A fluid detection system and method for a fuel cell power plant is disclosed having a pressure sensor (61, 161) positioned in a fuel cell stack assembly (10) to measure pressure of fluid/liquid in a fluid/liquid flow path (40, 42, 44) therein and to provide a pressure-based signal (90, 63). The pressure-based signal (90, 63) is used to control a liquid management arrangement (53) at least during start-up and shut-down of the cell stack assembly (10) to regulate water level. The liquid management arrangement (53) may include means (50, 51) for controllably applying and releasing a vacuum to a water manifold (44, 54; 100) of the cell stack assembly (10) to regulate water flow and level therein. The pressure-based control of water level may extend across the entire operating range of the cell stack assembly (10), or may be complemented during steady state operation by voltage-based sensors (66, 166). |
| US09722264B2 |
Gas management systems and methods in a redox flow battery
A redox flow battery includes an anolyte storage tank configured for containing a quantity of anolyte and an anolyte headspace; a catholyte storage tank configured for containing a quantity of a catholyte and a catholyte headspace; and a gas management system comprising at least one conduit interconnecting the anolyte headspace and the catholyte headspace, and a gas exchange device configured to contain or release an evolving gas from either or both of the anolyte and catholyte storage tanks to an exterior battery environment when an interior battery pressure exceeds an exterior battery pressure by a predetermined amount. |
| US09722263B2 |
Fuel cell and fuel cell system
An object is to suppress interference with the flow of a reactive gas or an off-gas in a fuel cell. There is provided a fuel cell comprising a stacked body that includes at least a power generation body configured by stacking a plurality of unit cells; and an end plate that is placed on at least one end in a stacking direction of the stacked body. The stacked body includes a manifold that is formed to pass through at least the power generation body in the stacking direction and is configured to cause a reactive gas or an off-gas to flow through. The end plate comprises a through hole that is formed to communicate with the manifold; and a plate portion that is placed inside of the through hole at a position corresponding to an outer circumference of an opening of the manifold formed in an end face on the one end of the stacked body and is arranged away from the end face of the stacked body across a clearance. |
| US09722261B2 |
Fuel cell system
When it is judged that a fuel cell stack is drying up, recovery control is performed. In recovery control, the cathode pressure control valve is controlled so that the cathode pressure becomes an increased cathode pressure, a discharge flow rate of air of a turbocompressor is set to an increased flow rate of air, and a bypass control valve is controlled so that a flow rate of air which is fed to the fuel cell stack is maintained at the requested flow rate of air. Furthermore, a combination of an increased cathode pressure and increased flow rate of air for minimizing the amount of consumed power of the turbocompressor required for eliminating dry-up is set based on the requested flow rate of air of the fuel cell stack. |
| US09722259B2 |
Ceramic substrate for electrochemical element, manufacturing method therefore, fuel cell, and fuel cell stack
A ceramic substrate for an electrochemical element that includes a ceramic layer and a high-thermal-expansion-coefficient material layer that is laminated on the surface of the ceramic layer. The high-thermal-expansion-coefficient material layer has a higher coefficient of thermal expansion than the ceramic layer, and applies compressive stress to the ceramic layer. |
| US09722253B2 |
Non-aqueous electrolyte and electrochemical device comprising the same
Disclosed is an electrode comprising a coating layer formed partially or totally on a surface thereof, the coating layer comprising: (i) a reduced form of a first acrylate compound having one or two acryl groups; and (ii) a reduced form of a second acrylate compound having three or more acryl groups. Further, disclosed in an electrochemical device comprising a cathode, an anode, a separator and a non-aqueous electrolyte, wherein the cathode and/or the anode is the above electrode. |
| US09722251B2 |
Binder composition for secondary battery, cathode and lithium battery including the binder composition
In an aspect, a binder composition for a secondary battery including a first fluoropolymer binder containing a polar functional group; a second fluoropolymer binder that does not contain a polar functional group; and a non fluoropolymer binder is provided. |
| US09722250B2 |
Electrode material and method for manufacturing same
An electrode material including electrode active material particles and a carbonaceous film layer coating surfaces of the electrode active material particles and including a metal oxide, a content ratio of the metal oxide in the carbonaceous film layer being 5% by mass to 70% by mass. A method for manufacturing an electrode material, in which electrode active material particles, a metal salt or metal alkoxide containing any one or more metal atoms selected from a group consisting of Al, Zr, Si, and Ti, and an organic compound which is a precursor of carbon are mixed so that a total blending amount of the metal salt or metal alkoxide satisfies that an amount of a metal oxide in the carbonaceous film layer when the metal salt or metal alkoxide is all changed to the metal oxide is 5% by mass to 70% by mass, and are heated in a non-oxidative atmosphere. |
| US09722247B2 |
Vanadyl phosphates as high energy density cathode materials for rechargeable sodium battery
A positive electrode comprising ε-VOPO4 and/or Nax(ε-VOPO4) wherein x is a value from 0.1 to 1.0 as an active ingredient, wherein the electrode is capable of insertion and release of sodium ions and a reversible sodium battery containing the positive electrode are provided. |
| US09722235B2 |
Remote control unit with battery isolation tab
Handheld remote control assemblies with battery isolation tabs are disclosed. An assembly includes a body and a battery pocket formed in the body and defined by a sidewall and a lower surface. An electrical connection terminal is disposed on the lower surface, and a battery is disposed within the battery pocket. The body includes a channel formed therein and extending between the battery pocket and an edge of the body. A battery isolation tab includes a head portion disposed between the battery and the electrical connection terminal, a handle portion disposed external to the body, and a neck portion extending between the head portion and the handle portion, the neck portion at least partially received within the channel formed in the body. |
| US09722233B2 |
Battery cell separator
A lithium ion battery module includes a battery cell stack disposed within a housing of the battery module. The stack includes a first battery cell, a second battery cell positioned adjacent to the first battery cell, and a battery cell separator fitted over the first battery cell. The battery cell separator includes a plurality of walls formed from a continuous material and defining a pocket in which the first battery cell is disposed. The plurality of walls is configured to electrically insulate the first cell from the second cell. The separator also includes a projection extending from a wall of the plurality of walls, the projection is positioned between a terminal of the first battery cell and a terminal of the second battery cell and is configured to electrically insulate the terminals from one another. |
| US09722232B2 |
Secondary battery
A secondary battery, including an electrode assembly; a cap plate that seals the electrode assembly; an electrode pin electrically connected to the electrode assembly and on the cap plate with an insulating gasket therebetween; and a first lead tab coupled to the electrode pin, a relative ratio W2/W1 of a width W2 of the insulating gasket to a width W1 of the first lead tab satisfying 1.0 |
| US09722227B2 |
Cross-linked, microporous polysulfone battery electrode separator
A cross-linked microporous polysulfone or polysulfone copolymer battery electrode separator membrane are described. Such membranes, which would otherwise be soluble above a particular, generally high temperature in selected battery electrolyte systems, once at least in part cross-linked, swell in the electrolyte at the particular higher temperature instead of dissolving. When the membrane separators are restrained between solid electrodes in a battery, the separator cannot increase in bulk volume, and the swelling occurs within the pores with the pore volume decreasing from its original bulk volume. The drop in pore volume causes the battery current density to drop, thereby reducing the heat generation within the hot area of the battery. This process provides a measure of safety against overheating and fires, and the battery is capable of continued usage if the overheating is localized. |
| US09722224B2 |
Coated separator and electrochemical device including the same
A separator for a battery and an electronic device, the separator including a separator substrate; and a separator coating layer coated on at least one surface of the separator substrate, the separator coating layer including a binder and at least one quaternary ammonium salt. |
| US09722218B2 |
Welded structure in battery, forming method of the same, secondary battery cell and secondary battery module
A plating layer 4 is formed on a surface of a battery cover 3, and a peripheral edge part 37b of a cover case 37 is arranged on an upper surface of the plating layer 4. A welding part 40 is formed at a tip part of the peripheral edge part 37b. The welding part 40 includes a melted part 41 in which the tip of the peripheral edge part 37b is melted, and an elution part 42 flowing from the tip onto the plating layer 4, and the melted part 41 and the elution part 42 are welded to the plating layer 4 in the upper surface of the plating layer 4. |
| US09722213B2 |
Method for manufacturing electronic device
When a coating film 4 is formed on a substrate 1, on which elements 3 are formed, by an ALD film forming method or the like, the coating film 4 is partially removed in a simple step. A method for manufacturing an electronic device includes a step of coating the substrate 1 partially with a partially coating member 2, a step of forming the elements 3 on the substrate 1, a step of forming the coating film 4 on the substrate 1 to cover the elements 3 and the partially coating member 2, and a step of forming a crack 4A in the coating film 4 on the partially coating member 2. |
| US09722211B2 |
Organic light-emitting device
An organic light-emitting device includes at least one functional layer for generating electroluminescent radiation, an encapsulation structure formed on or over the at least one functional layer, and a heat conduction layer formed on or over the encapsulation structure. The heat conduction layer includes a matrix material and heat conducting particles embedded in the matrix material. |
| US09722208B2 |
Light-emitting devices using thin film electrode with refractive index optimized capping layer for reduction of plasmonic energy loss
A light emitting device includes a substrate, a first electrode disposed on the substrate, a light emission layer (EML) disposed on the first electrode, a second electrode disposed on the EML, and a capping layer disposed on the second electrode. A thickness of the second electrode is not more than 50 nm, a refractive index of the capping layer is less than a refractive index of the EML, and the EML and the second electrode are separated by a distance not more than 100 nm. |
| US09722205B2 |
Active-matrix organic light-emitting diode (AMOLED) display panel, manufacturing method thereof and display device
An active-matrix organic light-emitting diode (AMOLED) display panel, which includes an array substrate (1) and a color filter (CF) substrate (2) which are cell-assembled, is disclosed. The CF substrate (2) includes an anti-reflecting layer (21), a water blocking layer (24) and a CF layer (22) and a black matrix (BM) (23) arranged on the same layer. The anti-reflecting layer (21) is disposed on a side of the CF layer (22) and the BM (23) facing away from the array substrate (1). The water blocking layer (24) is disposed on a side of the CF layer (22) and the BM (23) close to the array substrate (1), or the water blocking layer (24) is disposed between the anti-reflecting layer (21) and the CF layer (22) and the BM (23). The AMOLED display panel can prevent water from entering the AMOLED display panel and is lighter and thinner. |
| US09722204B2 |
Display device
A display device is provided including a display region arranged with a plurality of pixels, and a first sealing region arranged in an exterior periphery part of the display region, the display region includes an individual pixel electrode arranged in each of the plurality of pixels, a common pixel electrode arranged in upper layer of the individual pixel electrode and in succession to the plurality of pixels, and a light emitting layer arranged between the individual pixel electrode and the common pixel electrode, and the first sealing region includes a sealing layer arranged on a lower layer than the common pixel electrode and a region stacked with the common pixel electrode extending from the display region, the stacked region being enclosed by the display region. |
| US09722203B2 |
Display device
A display device includes a first substrate, a light emitting element located on the first substrate and including a pair of electrodes and one organic layer or a plurality of organic layers located between the pair of electrodes, a second substrate located to face the first substrate, a third substrate located on a surface of the second substrate opposite to a surface thereof facing the light emitting element, and a tacky layer located between the second substrate and the third substrate, a tack strength between the tacky layer and the second substrate or the third substrate being weaker than an adhesive strength between one of the pair of electrodes and the one organic layer or an adhesive strength between the plurality of organic layers. |
| US09722201B2 |
Organic electroluminescence device and method of manufacturing the same
Provided are an organic electroluminescence device capable of enhancing reflectance of an anode, thereby resulting in improved light-emitting efficiency and a method of manufacturing the same. An anode (12), a thin film layer for hole injection (13), an insulating layer (14), an organic layer (15) including a luminescent layer (15C) and a cathode (16) including a semi-transparent electrode (16A) are laminated in order on a substrate (11). The anode (12) comprises silver which is a metal with high reflectance or an alloy including silver, and the thin film layer for hole injection (13) comprises chromium oxide or the like. Light generated in the luminescent layer (15C) is multiply reflected between the anode (12) and the semi-transparent electrode (16A) to be emitted from the cathode (16). As the reflectance of the anode (12) is enhanced, the light generated in the luminescent layer (15C) can be efficiently emitted. An alloy comprised in the anode (12) preferably includes silver, palladium and copper, and a silver content is preferably 50% by mass or over. |
| US09722200B2 |
Top-emitting white organic light-emitting diodes having improved efficiency and stability
The present disclosure relates to an emissive construct, which can be used in various OLED applications, for example, top-emission white organic light-emitting diodes. The emissive construct includes a fluorescent emissive layer, a partial hole-blocking layer, and a phosphorescent emissive. A recombination zone is shared between the fluorescent emissive layer and the phosphorescent emissive layer, such that the thickness of the partial hole-blocking layer is less than about one-third of the thickness of the recombination zone. |
| US09722195B2 |
Display device
A display device is disclosed. In one aspect, the display device includes a flexible substrate capable of being bent in a first direction and an insulating layer including a first opening pattern positioned on the flexible substrate and extending in a second direction crossing the first direction. |
| US09722193B2 |
Organic electroluminescent materials and devices
Compounds comprising phosphorescent metal complexes comprising cyclometallated imidazo[1,2-f]phenanthridine and diimidazo[1,2-a:1′,2′-c]quinazoline ligands, or isoelectronic or benzannulated analogs thereof, are described. Organic light emitting diode devices comprising these compounds are also described. |
| US09722192B2 |
Metal complex, preparation method and use thereof, and display device
A metal complex having a structural formula as follows, wherein, the metal atom M is selected from the group consisting of iridium (Ir), platinum (Pt), osmium (Os), rhenium (Re), ruthenium (Ru) and copper (Cu); R1, R2, R3 and R4 are independently selected from the group consisting of —F, —CF3, —CH3 and substituted phenyl; in the (C^N) substructure located on a left side of the metal atom M in the structural formula (I), C is located in a first aromatic or heteroaromatic ring, and N is located in a second heteroaromatic ring. The metal complex can be used in luminescent material of display devices. |
| US09722189B2 |
Adamantane compound for organic electroluminescent elements, and organic electroluminescent element
Provided are an organic EL device practically satisfactory in terms of its light-emitting characteristics, driving voltage, and durability, and a compound for an organic EL device to be used in the device. The organic EL device has a structure in which an anode, a plurality of organic layers including a light-emitting layer, and a cathode are laminated on a substrate, and the organic EL device contains, in at least one organic layer selected from the light-emitting layer, a hole-transporting layer, an electron-transporting layer, a hole-blocking layer, and an electron-blocking layer, an adamantane compound having at least one triarylborane structure in a molecule thereof as the compound for an organic EL device. |
| US09722188B2 |
Material for organic electronic device, and organic electronic device using the same
The present invention provides a novel compound that is capable of largely improving a life time, efficiency, electrochemical stability, and thermal stability of an organic electronic device, and an organic electronic device that comprises an organic material layer comprising the compound. |
| US09722186B2 |
Compound for organic optoelectronic device, organic light emitting diode comprising same, and display comprising organic light emitting diode
A compound for an organic optoelectronic device, an organic light emitting diode including the compound, and a display device including the organic light emitting diode are provided and the compound in which moieties represented by Chemical Formulae I and II that are sequentially linked is provided and thus, the organic light emitting diode has excellent life-span characteristics due to excellent electrochemical and thermal stability and high luminous efficiency at a low driving voltage. |
| US09722183B2 |
Display
Display comprising at least one organic light emitting diode, wherein the at least one organic light emitting diode comprises an anode, a cathode, a light emitting layer between the anode and the cathode, and at least one layer comprising a compound according to formula (I) between the cathode and the light emitting layer: wherein A1 and A2 are independently selected from halogen, CN, substituted or unsubstituted C1-C20-alkyl or heteroalkyl, C6-C20-aryl or C5-C20-heteroaryl, C1-C20-alkoxy or C6-C20-aryloxy, A3 is selected from substituted or unsubstituted C6-C40-aryl or C5-C40-heteroaryl, m=0, 1 or 2, n=0, 1 or 2. |
| US09722176B2 |
Isolation of magnetic layers during etch in a magnetoresistive device
Methods for manufacturing magnetoresistive devices are presented in which isolation of magnetic layers in the magnetoresistive stack is achieved by oxidizing exposed sidewalls of the magnetic layers prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls. |
| US09722168B2 |
Vibration generating apparatus
There is provided a vibration generating apparatus including: an elastic member having both end portions fixed to a housing; a piezoelectric element installed on one surface of the elastic member; and a circuit board connected to the piezoelectric element, wherein the elastic member has support parts formed on both side surfaces of both end portions thereof and bent downwardly in order to be installed in the housing, and a portion of the circuit board passing between the support parts has a flat panel shape. |
| US09722164B2 |
Fabrication of stable electrode/diffusion barrier layers for thermoelectric filled skutterudite devices
Disclosed are methods for the manufacture of n-type and p-type filled skutterudite thermoelectric legs of an electrical contact. A first material of CoSi2 and a dopant are ball-milled to form a first powder which is thermo-mechanically processed with a second powder of n-type skutterudite to form a n-type skutterudite layer disposed between a first layer and a third layer of the doped-CoSi2. In addition, a plurality of components such as iron, and nickel, and at least one of cobalt or chromium are ball-milled form a first powder that is thermo-mechanically processed with a p-type skutterudite layer to form a p-type skutterudite layer “second layer” disposed between a first and a third layer of the first powder. The specific contact resistance between the first layer and the skutterudite layer for both the n-type and the p-type skutterudites subsequent to hot-pressing is less than about 10.0 μΩ·cm2. |
| US09722163B2 |
Compliant interfacial layers in thermoelectric devices
A thermoelectric power generation device is disclosed using one or more mechanically compliant and thermally and electrically conductive layers at the thermoelectric material interfaces to accommodate high temperature differentials and stresses induced thereby. The compliant material may be metal foam or metal graphite composite (e.g. using nickel) and is particularly beneficial in high temperature thermoelectric generators employing Zintl thermoelectric materials. The compliant material may be disposed between the thermoelectric segments of the device or between a thermoelectric segment and the hot or cold side interconnect of the device. |
| US09722162B2 |
Semiconductor light emitting device
A semiconductor light emitting device includes first and second light emitting bodies, a first electrode, a second electrode and a first interconnection. The first and second light emitting bodies are disposed on a conductive substrate, and each includes first and second semiconductor layers and a light emitting layer therebetween. The first electrode is provided between the first light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer and the conductive substrate. The second electrode is provided between the second light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer. The first interconnection electrically connects the second semiconductor layer of the first light emitting body and the second electrode. The first interconnection includes a first portion extending over the first and second light emitting bodies and a second portion extending into the second light emitting body. |
| US09722160B2 |
Light emitting device and adaptive driving beam headlamp system
A light emitting device includes a substrate, a plurality of first wiring members, a plurality of second wiring members and a plurality of light emitting elements. The first wiring members extend in a first direction. The second wiring members extend in a second direction. Each of the second wiring members is segmented into a plurality of second wiring portions. The light emitting elements are disposed along the second direction. A first electrode of the light emitting element is connected to a corresponding one of the first wiring members. A second electrode of the light emitting element has a first connection part and a second connection part that is linked to the first connection part. The first connection part and the second connection part are connected to a corresponding one of the second wiring members and bridge at least two of the segmented second wiring portions in the second direction. |
| US09722158B2 |
Aligned multiple emitter package
A multiple element emitter package is disclosed for increasing color fidelity and heat dissipation, improving current control, and increasing rigidity of the package assembly. In one embodiment, the package comprises a casing with a cavity extending into the interior of the casing from a first main surface. A lead frame is at least partially encased by the casing, the lead frame comprising a plurality of electrically conductive parts carrying a linear array of LEDs. Electrically conductive parts, separate from the parts carrying the LEDs, have a connection pad, wherein the LEDs are electrically coupled to the connection pad, such as by a wire bond. This arrangement allows for a respective electrical signal to be applied to each of the LEDs. The emitter package may be substantially waterproof, and an array of the emitter packages may be used in an LED display such as an indoor and/or outdoor LED screen. |
| US09722157B2 |
LED module
An LED module according to the present invention includes an LED unit 2 and a case 1, where the LED unit includes an LED chip 21, and the case 1 includes a main body 11 made of a ceramic material and a pad 12a on which the LED unit 2 is mounted. The outer edge 121a of the pad 12a is positioned inward of the outer edge 2a of the LED unit 2 as viewed in plan. These arrangements prevent the light emission amount of the LED module A1 from reducing with time. |
| US09722156B2 |
Light-emitting device
A light-emitting device includes a light-emitting element; a first light transmissive member that is disposed over the light-emitting element and that includes a first upper surface, a lower surface, a first lateral surface; and a second lateral surface positioned outside the first lateral surface, a second light transmissive member that covers at least a part of the first lateral surface; and a light reflective member that is disposed on a lateral surface of the second light transmissive member, the second lateral surface of the first light transmissive member, and a lateral surface of the light-emitting element. |
| US09722154B2 |
Full spectrum solid state white light source, method for manufacturing and applications
A method of manufacturing a down-conversion substrate for use in a light system includes forming a first crystallography layer including one or more phosphor materials and, optionally, applying at least one activator to the crystallography layer, heating the crystallography layer at high temperature to promote crystal growth in the crystallography layer, and drawing out the crystallography layer and allowing the crystallography layer to cool to form the down-conversion substrate. A light system includes an excitation source for emitting short wavelength primary emissions; and a down-conversion substrate disposed in the path of at least some of the primary emissions from the excitation source to convert at least a portion of the primary emissions into longer-wavelength secondary emissions, wherein the substrate includes one or more crystallography layers, wherein each crystallography layer includes one or more phosphor materials, and optionally at least one activator. Down-converted secondary light may be produced by the system. |
| US09722147B2 |
Network of semiconductor structures with fused insulator coating
Networks of semiconductor structures with fused insulator coatings and methods of fabricating networks of semiconductor structures with fused insulator coatings are described. In an example, a semiconductor structure includes an insulator network. A plurality of discrete semiconductor nanocrystals is disposed in the insulator network. Each of the plurality of discrete semiconductor nanocrystals is spaced apart from one another by the insulator network. |
| US09722144B2 |
Phonon-recycling light-emitting diodes
Contrary to conventional wisdom, which holds that light-emitting diodes (LEDs) should be cooled to increase efficiency, the LEDs disclosed herein are heated to increase efficiency. Heating an LED operating at low forward bias voltage (e.g., V |
| US09722139B2 |
Non-uniform multiple quantum well structure
A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction. |
| US09722135B2 |
Nanowire sized opto-electronic structure and method for modifying selected portions of same
A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires. |
| US09722133B2 |
Methods for processing quantum dots and devices including quantum dots
A method of processing quantum dots is disclosed. The method comprises applying energy to excite the quantum dots to emit light and placing the quantum dots under vacuum after excitation of the quantum dots. Also disclosed is a method of processing a component including quantum dots comprising applying energy to the component including quantum dots to excite the quantum dots to emit light; and placing the component including quantum dots under vacuum after excitation. A method for processing a device is further disclosed, the method comprising applying energy to the device to excite the quantum dots to emit light; and placing the device under vacuum after excitation of the quantum dots. A method for preparing a device is also disclosed. Quantum dots, component, and devices of the methods are also disclosed. |
| US09722124B2 |
Optical radiation detection system comprising an electric parameter measuring circuit
An optical radiation detection system (100) comprising: an optical medium (1) structured to define a region (5) suitable for transmitting an optical radiation and being associated to at least one electric parameter varying as a function of the optical radiation concerning said region; at least one electrode (2, 3) electrically coupled to the optical medium (1), and spaced from said region (5), an electric power generator (4) connected to said at least one electrode (2) and structured to provide an electric signal (Se) to be applied to the optical medium. Further, the system comprises an electric measuring circuit (50) connected to said at least one electrode (2) and structured to provide a measuring electric signal (SM) representing a variation of said at least one electric parameter. |
| US09722122B2 |
Boron, bismuth co-doping of gallium arsenide and other compounds for photonic and heterojunction bipolar transistor devices
Isoelectronic co-doping of semiconductor compounds and alloys with acceptors and deep donors is used to decrease bandgap, to increase concentration of the dopant constituents in the resulting alloys, and to increase carrier mobilities lifetimes. For example, Group III-V compounds and alloys, such as GaAs and GaP, are isoelectronically co-doped with, for example, B and Bi, to customize solar cells, and other semiconductor devices. Isoelectronically co-doped Group II-VI compounds and alloys are also included. |
| US09722120B2 |
Bandgap grading of CZTS solar cell
A method for fabricating a photovoltaic device includes forming a polycrystalline absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) over a substrate. The absorber layer is rapid thermal annealed in a sealed chamber having elemental sulfur within the chamber. A sulfur content profile is graded in the absorber layer in accordance with a size of the elemental sulfur and an anneal temperature to provide a graduated bandgap profile for the absorber layer. Additional layers are formed on the absorber layer to complete the photovoltaic device. |
| US09722119B2 |
Solar cell panel
A plurality of solar cell assembly series of a solar cell panel are so arranged that any two adjacent solar cells in the plurality of solar cell assembly series have a potential difference which does not exceed V volts which is a maximum output voltage of the plurality of solar cell assembly series. |
| US09722114B2 |
Photovoltaic cell mounting substrate and photovoltaic cell module
A photovoltaic cell mounting substrate includes a substrate; and a plurality of grooves provided at one surface of the photovoltaic cell mounting substrate, the plurality of grooves including a first groove and a second groove that is placed at a circumferential side of the first groove, at the one surface of the substrate, the second groove being formed deeper than the first groove, with respect to the one surface of the substrate. |
| US09722107B2 |
Photoelectric conversion device and imaging system
A photoelectric conversion device according to an exemplary embodiment includes a pixel which includes a photoelectric conversion unit, an amplifier transistor that outputs a signal from the photoelectric conversion unit, and a reset transistor that supplies a reset voltage to the amplifier transistor. The photoelectric conversion unit includes a first electrode, a second electrode electrically connected to the amplifier transistor, a photoelectric conversion layer, and an insulating layer disposed between the photoelectric conversion layer and the second electrode. The pixel includes a first capacitor electrically connected to the second electrode. The capacitance value of the first capacitor, the capacitance value of a second capacitor between the first electrode and the second electrode, and a voltage supplied to the pixel satisfy a certain relationship. |
| US09722105B2 |
Conversion of metal seed layer for buffer material
Approaches for forming solar cells with a converted seed layer as a buffer material and the resulting solar cells are described. In an example, a method of fabricating a solar cell includes converting regions of a seed layer disposed on a plurality of p-n junctions of the solar cell to form a pattern of interdigitated converted regions. The converted regions are configured to electrically insulate non-converted regions of the seed layer from each other and provide a barrier to a laser that is, in fabricating the solar cell, directed towards the seed layer such that the barrier substantially avoids degradation of at least the plurality of p-n junctions from the laser. |
| US09722104B2 |
Solar cell and method for manufacturing the same
Disclosed are a solar cell and a method for manufacturing the same. A solar cell includes a semiconductor substrate, a tunnel layer on the first surface of the semiconductor substrate, a first conductive type semiconductor region on the tunnel layer and includes impurities of a first conductive type, a second conductive type semiconductor region on a second surface and includes impurities of a second conductive type opposite the first conductive type, a first passivation film on the first conductive type semiconductor region, a first electrode formed on the first passivation film and connected to the first conductive type semiconductor region through an opening portion formed in the first passivation film, a second passivation film on the second conductive type semiconductor region, and a second electrode formed on the second passivation film and connected to the second conductive type semiconductor region through an opening portion formed in the second passivation film. |
| US09722102B2 |
Glass comprising molybdenum and lead in a solar cell paste
In general, the invention relates to electro-conductive pastes comprising a glass which comprises molybdenum and lead as a constituent of a solar cell paste, and the use of such in the preparation of photovoltaic solar cells. More specifically, the invention relates to electroconductive pastes, precursors, processes for preparation of solar cells, solar cells and solar modules.The invention relates to an electro-conductive paste at least comprising as paste constituents: a) metallic particles; b) a glass; c) an organic vehicle; and d) an additive; wherein the glass comprises the following: i) Pb in the range from about 1 to about 94 wt. %; ii) Mo in the range from about 2 to about 30 wt. %; iii) O in the range from about 1 to about 50 wt. %; with the wt. % in each case being based on the total weight of the glass. |
| US09722090B2 |
Semiconductor device including first gate oxide semiconductor film, and second gate
A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor film, a first gate electrode, a second gate electrode, a first conductive film, and a second conductive film. The first gate electrode is electrically connected to the second gate electrode. The first conductive film and the second conductive film function as a source electrode and a drain electrode. The oxide semiconductor film includes a first region that overlaps with the first conductive film, a second region that overlaps with the second conductive film, and a third region that overlaps with a gate electrode and the third conductive film. The first region includes a first edge that is opposed to the second region. The second region includes a second edge that is opposed to the first region. The length of the first edge is shorter than the length of the second edge. |
| US09722088B2 |
Semiconductor device
Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction. |
| US09722086B2 |
Logic circuit and semiconductor device
In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5×1019 (atoms/cm3) or lower. Thus, leakage current of the transistor can be reduced. As a result, in the logic circuit, reduction in standby power and suppression of malfunction can be achieved. |
| US09722084B2 |
Method for forming a glass substrate with a depleted surface layer and polycrystalline-silicon TFT built thereon
There is disclosed a method for chemically treating a display glass substrate by treating at least one surface of the glass substrate with a heated solution containing HCl to form a depletion layer at the surface and under the surface of the glass substrate. The disclosure also relates to display glass substrates containing the depletion layer made by the disclosed process. In addition, the disclosure relates to methods of making thin-film transistors (“TFTs”) on these display glass substrates by depositing a Si layer directly on the chemically treated surface of the glass substrate, and annealing the Si layer to form polycrystalline silicon. |
| US09722078B2 |
Semiconductor device including fin shaped structure and method for fabricating the same
A semiconductor device and a method of fabricating the same, the semiconductor device includes a silicon substrate, a fin shaped structure and a shallow trench isolation. The fin shaped structure is disposed on the silicon substrate and includes a silicon germanium (SiGe) layer extending downwardly from a top end and at least occupying 80% to 90% of the fin shaped structure. The shallow trench isolation covers a bottom portion of the fin shaped structure. |
| US09722076B2 |
Method for manufacturing semiconductor device with contamination improvement
A semiconductor device includes a substrate, two gate structures, an interlayer dielectric layer and a material layer. The substrate has at least two device regions separated by at least one isolation structure disposed in the substrate. Each device region includes two doped regions disposed in the substrate. The gate structures are respectively disposed on the device regions. In each device region, the doped regions are respectively disposed at two opposite sides of the gate structure. The interlayer dielectric layer is disposed over the substrate and peripherally surrounds the gate structures. A top of the interlayer dielectric layer has at least one concave. The material layer fills the concave and has a top surface elevated at the same level with top surfaces of the gate structures. A ratio of a thickness of a thickest portion of the material layer to a pitch of the gate structures ranges from 1/30 to 1/80. |
| US09722075B2 |
Semiconductor device
Described herein is a semiconductor device including a semiconductor substrate in which an element region and a termination region surrounding the element region are provided. The element region includes: a gate trench; a gate insulating film; and a gate electrode. The termination region includes: a plurality of termination trenches provided around the element region; an inner trench insulating layer located inside of each of the plurality of termination trenches; and an upper surface insulating layer located at an upper surface of the semiconductor substrate in the termination region. The upper surface insulating layer includes a first portion and a second portion having a thinner thickness than the first portion and located at a location separated from the element region than the first portion, and a gate wiring is located at an upper surface of the first portion and is not located at an upper surface of the second portion. |
| US09722074B2 |
Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling
A non-volatile memory device and a method for forming the non-volatile memory device are disclosed. The memory device utilizes a local buried channel dielectric in a NAND string that reduces bulk channel leakage at the edge of the NAND string where the electric field gradient along the direction of the string pillar is at or near a maximum during programming operations. The memory device comprises a channel that is coupled at one end to a bitline and at the other end to a source. A select gate is formed at the end of the channel coupled to the bitline to selectively control conduction between the bitline and the channel. At least one non-volatile memory cell is formed along the length of the channel between the select gate and the second end of the channel. A local dielectric region is formed within the channel at the first end of the channel. |
| US09722065B1 |
Semiconductor device
A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer. The conductive layer is configured to maintain a channel in the active region when the transistor is triggered to be conducted. |
| US09722062B2 |
Semiconductor device and a method for manufacturing a semiconductor device
The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity. |
| US09722061B2 |
Bidirectional switch
A bidirectional switch is formed in a semiconductor substrate of a first conductivity type. The switch includes first and second thyristors connected in antiparallel extending vertically between front and rear surfaces of the substrate. A vertical peripheral wall of the second conductivity type connects the front surface to the rear surface and surrounds the thyristors. On the front surface, in a ring-shaped region of the substrate separating the vertical peripheral wall from the thyristors, a first region of the first conductivity type is provided having a doping level greater than the substrate and having the shape of a ring-shaped band portion partially surrounding the first thyristor and stopping at the level of the adjacent region between the first and second thyristors. |
| US09722057B2 |
Bipolar junction transistors with a buried dielectric region in the active device region
Device structure and fabrication methods for a bipolar junction transistor. A trench isolation region is formed that bounds an active device region along a sidewall. A dielectric region is formed that extends laterally from the sidewall of the active device region into the active device region. The dielectric region is located beneath a top surface of the active device region such that a section of the active device region is located between the top surface and the dielectric region. |
| US09722055B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device with a structure in which an increase in the number of oxygen vacancies in an oxide semiconductor layer can be suppressed and a method for manufacturing the semiconductor device are provided. The semiconductor device includes an oxide insulating layer; intermediate layers apart from each other over the oxide insulating layer; a source electrode layer and a drain electrode layer over the intermediate layers; an oxide semiconductor layer that is electrically connected to the source electrode layer and the drain electrode layer and is in contact with the oxide insulating layer; a gate insulating film over the source electrode layer, the drain electrode layer, and the oxide semiconductor layer; and a gate electrode layer that is over the gate insulating film and overlaps with the source electrode layer, the drain electrode layer, and the oxide semiconductor layer. |
| US09722051B2 |
Apparatus and method for FinFETs
A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped active region. |
| US09722049B2 |
Methods for forming crystalline IGZO with a seed layer
Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. A seed layer is formed above the substrate. The seed layer has a crystalline structure that is substantially dominant along the c-axis. An IGZO layer is formed above the seed layer. The seed layer may include zinc oxide. A stack of alternating seed layers and IGZO layers may be formed. |
| US09722046B2 |
Semiconductor device including a superlattice and replacement metal gate structure and related methods
A semiconductor device may include a substrate having a channel recess therein, a plurality of spaced apart shallow trench isolation (STI) regions in the substrate, and source and drain regions spaced apart in the substrate and between a pair of the STI regions. A superlattice channel may be in the channel recess of the substrate and extend between the source and drain regions, with the superlattice channel including a plurality of stacked group of layers, and each group of layers of the superlattice channel including stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A replacement gate may be over the superlattice channel. |
| US09722044B2 |
Manufacturing method of semiconductor device with silicon layer containing carbon
A semiconductor device having an n channel MISFET formed on an SOI substrate including a support substrate, an insulating layer formed on the support substrate and a silicon layer formed on the insulating layer has the following structure. An impurity region for threshold adjustment is provided in the support substrate of a gate electrode so that the silicon layer contains carbon. The threshold value can be adjusted by the semiconductor region for threshold adjustment in this manner. Further, by providing the silicon layer containing carbon, even when the impurity of the semiconductor region for threshold adjustment is diffused to the silicon layer across the insulating layer, the impurity is inactivated by the carbon implanted into the silicon layer. As a result, the fluctuation of the transistor characteristics, for example, the fluctuation of the threshold voltage of the MISFET can be reduced. |
| US09722040B2 |
Method for manufacturing an insulated gate bipolar transistor
Method for manufacturing an insulated gate bipolar transistor, which includes a drift layer of a first conductivity type between an emitter side, at which a gate and emitter electrode are arranged, and a collector side, at which a collector electrode is arranged including steps: providing a substrate of a second conductivity type, applying a dopant of the first conductivity type on the first side, creating a drift layer of the first conductivity type on the first layer, diffusing the ions such that a buffer layer is created, having a higher doping concentration than the drift layer, creating a base layer of the second conductivity type on the drift layer, creating an emitter layer of the first conductivity type on the base layer, thinning the substrate on the second side such that the remaining part of the substrate forms a collector layer. |
| US09722039B2 |
Fabricating high-power devices
According to an embodiment of the present invention, a method for fabricating a semiconductor device comprises depositing a transition layer on a substrate, depositing GaN material on the transition layer, forming a contact on the GaN material, depositing a stressor layer on the GaN material, separating the transition layer and the substrate from the GaN material, patterning and removing portions of the GaN material to expose portions of the stressor layer. |
| US09722035B2 |
Method for manufacturing termination structure of semiconductor device
A termination structure of a semiconductor device is provided. The semiconductor device includes an active area and a termination area adjacent to the active area, in which the termination area has the termination structure. The termination structure includes a substrate, an epitaxy layer, a dielectric layer, a conductive material layer and a conductive layer. The epitaxy layer is disposed on the substrate and has a voltage-sustaining region. The voltage-sustaining region has trenches parallel to each other. The dielectric layer is disposed in the trenches and on a portion of the epitaxy layer. The conductive material layer is disposed on the dielectric layer in the trenches. The conductive layer covers the trenches, and is in contact with the conductive material layer and a portion of the epitaxy layer, and is electrically connected between the active area and the termination area. A method for manufacturing the termination structure is also provided. |
| US09722029B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes an n+ type silicon carbide substrate, and in the substrate an active region where primary current flows and an edge termination area surrounding the active region. The semiconductor device has a first p-type region and a second p-type region in the edge termination area, and the first p-type region includes therein a plurality of third p-type regions, and the second p-type region includes therein a plurality of fourth p-type regions. The widths between the respective plurality of third p-type regions and the widths between the respective plurality of fourth p-type regions become greater further away from the active region. |
| US09722028B2 |
Silicon carbide substrate, semiconductor device, and methods for manufacturing them
A silicon carbide substrate has a first main surface, and a second main surface opposite to the first main surface. A region including at least one main surface of the first and second main surfaces is made of single-crystal silicon carbide. In the one main surface, sulfur atoms are present at not less than 60×1010 atoms/cm2 and not more than 2000×1010 atoms/cm2, and carbon atoms as an impurity are present at not less than 3 at % and not more than 25 at %. Thereby, a silicon carbide substrate having a stable surface, a semiconductor device using the substrate, and methods for manufacturing them can be provided. |
| US09722026B2 |
Semiconductor structure in which film including germanium oxide is provided on germanium layer, and method for manufacturing semiconductor structure
A semiconductor structure includes: a germanium layer; and a first insulating film that is formed on an upper surface of the germanium layer, primarily contains germanium oxide and a substance having an oxygen potential lower than an oxygen potential of germanium oxide, and has a physical film thickness of 3 nm or less; wherein a half width of frequency to height in a 1 μm square area of the upper surface of the germanium layer is 0.7 nm or less. |
| US09722023B2 |
Selective germanium P-contact metalization through trench
Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. The techniques can be implemented, for example, using a standard contact stack such as a series of metals on, for example, silicon or silicon germanium (SiGe) source/drain regions. In accordance with one example such embodiment, an intermediate boron doped germanium layer is provided between the source/drain and contact metals to significantly reduce contact resistance. Numerous transistor configurations and suitable fabrication processes will be apparent in light of this disclosure, including both planar and non-planar transistor structures (e.g., FinFETs), as well as strained and unstrained channel structures. Graded buffering can be used to reduce misfit dislocation. The techniques are particularly well-suited for implementing p-type devices, but can be used for n-type devices if so desired. |
| US09722021B2 |
Isolated well contact in semiconductor devices
An integrated circuit and method has an isolated well with an improved isolated well contact. The well contact diffusion is isolated from a device diffusion of opposite conductivity type within the isolated well by an isolation transistor gate. |
| US09722020B2 |
Super junction semiconductor device having columnar super junction regions extending into a drift layer
A super junction semiconductor device includes a semiconductor portion with first and second surfaces parallel to one another and including a doped layer of a first conductivity type formed at least in a cell area. Columnar first super junction regions of a second conductivity type extend in a direction perpendicular to the first surface and are separated by columnar second super junction regions of the first conductivity type. The first and second super junction regions form a super junction structure between the first surface and the doped layer. A first electrode structure directly adjoins the first surface and a second electrode structure directly adjoins the second surface. The first electrode structure has a first thickness and the second electrode structure has a second thickness. A sum of the first and second thicknesses is at least 20% of the thickness of the semiconductor portion between the first and second surfaces. |
| US09722017B2 |
Silicon carbide semiconductor device
A silicon carbide semiconductor device capable of achieving a decrease in ON resistance and an increase in breakdown voltage and a method for manufacturing a silicon carbide semiconductor device. A silicon carbide semiconductor device includes a silicon carbide substrate and a drift layer. The drift layer includes a breakdown voltage holding layer extending from a point where a doping concentration has a predetermined value to a surface of the drift layer. The doping concentration in the breakdown voltage holding layer continuously decreases from the point where the doping concentration has the predetermined value to a modulation point located further toward the surface of the drift layer than a midpoint in a film thickness direction of the breakdown voltage holding layer. The doping concentration in the breakdown voltage holding layer continuously increases from the modulation point to the surface of the drift layer. |
| US09722013B2 |
Thin film electronic component
A thin film electronic component includes: a substrate; a thin film electrode layer over the substrate; an inorganic insulation layer formed on the thin film electrode layer; an organic insulation layer formed on the inorganic insulation layer; and a lead-out electrode that electrically connects to the thin film electrode layer. The inorganic insulation layer has a through-hole formed therein, so as to expose a portion of the thin film electrode layer. The organic insulation layer has a through-hole formed therein, so as to expose the through-hole in the inorganic insulation layer. The lead-out electrode is formed in the through-hole in the inorganic insulation layer and the through-hole in the organic insulation layer. A shape of a borderline defining the through-hole at a top surface of the organic insulation layer in a plan view has chamfered corners. |
| US09722012B1 |
Circuits and methods providing mutual capacitance in vertical electrical connections
An electrical device including a structure having a plurality of dielectric layers, the structure further having a plurality of vertical electrical connections extending from a top layer of the dielectric layers to a bottom layer of the dielectric layers, a first vertical electrical connection of the plurality of vertical electrical connections including a first capacitive structure that extends in a plane perpendicular to a vertical dimension of the vertical electrical connection, wherein the first capacitive structure is disposed on a first dielectric layer of the plurality of dielectric layers, wherein the first dielectric layer is below the top layer, and a second vertical electrical connection of the plurality of vertical electrical connections including a second capacitive structure extending in the plane and disposed on the first dielectric layer. |
| US09722009B2 |
Pad electrode structure, flat display apparatus comprising the pad electrode structure, and the method of manufacturing the flat display apparatus
A pad electrode structure including a substrate, an insulating layer on the substrate, a pad electrode on a portion of the insulating layer, and an organic insulating layer on the pad electrode and having an opening exposing an upper surface of the pad electrode, wherein an insertion area is in the insulating layer near the substrate, and wherein the organic insulating layer is separated from an end portion of the substrate, and a portion of the organic insulating layer is in the insertion area. |
| US09722000B2 |
Organic light emitting device
An organic light emitting device utilizing the micro-cavity effect in the RGB subpixel regions while suppressing the micro-cavity effect in the white subpixel region is provided. The organic light emitting device includes a lower substrate, an anode formed on the lower substrate, an organic emission layer formed on the anode, a cathode formed on the organic emission layer, and a reflection decreasing layer formed on at least a portion of the cathode for reducing reflection of the light emitted from the organic emission layer by the cathode to reduce the micro-cavity effect. Such a selective use of the micro-cavity effect in the organic light emitting device improves the color accuracy, the luminance efficiency and the lifespan of the top emission type organic light emitting device. |
| US09721983B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a carrier substrate, a first color filter, a first photodetector, and a light enhancement structure. The first photodetector is disposed between the carrier substrate and the first color filter. The light enhancement structure is disposed between the first color filter and the carrier substrate and adjacent to the first photodetector for enhancing intensity of light incident the first photodetector. |
| US09721982B2 |
One transistor active pixel sensor with tunnel FET
A tunneling field effect transistor for light detection, including a p-type region connected to a source terminal, a n-type region connected to a drain terminal, an intrinsic region located between the p-type region and the n-type region to form a P-I junction or an N-I junction with the n-type region or the p-type region, respectively, a first insulating layer and a first gate electrode, the first gate electrode covering a portion of the intrinsic region on one side, and a second insulating layer and a second gate electrode, the second insulating layer and the second gate electrode covering an entire other side of the intrinsic region opposite to the one side, wherein an area of the intrinsic region that is not covered by the first gate electrode forms a non-gated intrinsic area configured for light absorption. |
| US09721981B2 |
Pixel circuit
A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type. |
| US09721978B2 |
Thin film transistor device, manufacturing method thereof, and display apparatus
Various embodiments provide a thin film transistor (TFT) device, a manufacturing method of the TFT device, and a display apparatus including the TFT device. An etch stop layer (ESL) material is formed on an active layer on a substrate. An electrical conductive layer material is formed on the ESL material for forming a source electrode and a drain electrode. The electrical conductive layer material is patterned to form a first portion of the source electrode containing a first via-hole through the source electrode, and to form a first portion of the drain electrode containing a second via-hole through the drain electrode. The ESL material is patterned to form an etch stop layer (ESL) pattern including a first ESL via-hole connecting to the first via-hole through the source electrode and including a second ESL via-hole connecting to the second via-hole through the drain electrode. |
| US09721976B2 |
Thin film transistor and fabrication method thereof, array substrate and display panel
A thin film transistor and a fabrication method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a gate electrode (2), a source electrode (5) and a drain electrode (6) disposed in a same layer on a base substrate (1); a gate insulating layer (3) disposed on the gate electrode (2), the source electrode (5) and the drain electrode (6); an active layer (4) disposed on the gate insulating layer (3); a passivation layer (7) disposed on the active layer (4) and the gate insulating layer (3). A first via hole (81) and a second via hole (91) are disposed in the passivation layer (7); a third via hole (82) and a fourth via hole (92) are disposed in the passivation layer (7) and the gate insulating layer (3); a first connection pattern (8) and a second connection pattern (9) are disposed on the passivation layer (7); the first connection pattern (8) is connected with the active layer (4) and the source electrode (5) through the first via hole (81) and the third via hole (82) respectively; the second connection pattern (9) is connected with the active layer (4) and the drain electrode (6) through the second via hole (91) and the fourth via hole (92) respectively. The thin film transistor effectively reduces the influence of the parasitic capacitance between the source electrode and the gate electrode and the parasitic capacitance between the drain electrode and the gate electrode on the thin film transistor. |
| US09721973B2 |
Thin film transistor substrate and display using the same
Provided are a thin film transistor substrate and a display using the same. A display includes: a first thin film transistor, the first thin film transistor including: a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode, and a first drain electrode, a second thin film transistor, the second thin film transistor including: a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode, and a second drain electrode, an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer being disposed on the first gate electrode and the second gate electrode and under the oxide semiconductor layer, and an etch-stopper layer disposed on the oxide semiconductor layer. |
| US09721969B2 |
Creation of wide band gap material for integration to SOI thereof
Devices and methods for forming a device are presented. The method for forming the device includes providing a support substrate having first crystal orientation. A trap rich layer is formed on the support substrate. An insulator layer is formed over a top surface of the trap rich layer. The method further includes forming a top surface layer having second crystal orientation on the insulator layer. The support substrate, the trap rich layer, the insulator layer and the top surface layer correspond to a substrate and the substrate is defined with at least first and second device regions. A transistor is formed in the top surface layer in the first device region and a wide band gap device is formed in the second device region. |
| US09721966B2 |
Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes a substrate, a first electrode layer, a second electrode layer, a third electrode layer, a fourth electrode layer, a first gate electrode layer, a second gate electrode layer, a gate insulating film, a first interlayer insulating film, a second interlayer insulating film. The first electrode layer is separated from the substrate in a first direction. The second electrode layer is separated from the first electrode layer in a second direction. The third electrode layer is provided between the first electrode layer and the second electrode layer. The third electrode layer includes a first edge face. A second edge face of the first gate electrode layer at the second gate electrode layer side is along the first edge face. |
| US09721961B2 |
Semiconductor memory device
In this semiconductor memory device, the first conducting layers are arrayed laminated in a first direction, and extend in a second direction intersecting with the first direction. The first conducting layers are arrayed in a third direction via interlayer insulating films. The third direction intersects with the first direction and the second direction. The interlayer insulating film is disposed between the first conducting layers arrayed in the third direction, and extends in the first direction. The second conducting layer is disposed between the first conducting layers arrayed in the third direction, and extends in the first direction. The second conducting layer has an approximately circular cross-sectional shape intersecting with the first direction. The variable resistance layer surrounds a peripheral area of the second conducting layer, and is disposed at a position between the second conducting layer and the first conducting layer. |
| US09721953B2 |
Semiconductor device
A semiconductor device capable of retaining data for a long time is provided. The semiconductor device includes first to third transistors, a fourth transistor including first and second gates, first to third nodes, a capacitor, and an input terminal. A source of the first transistor is connected to the input terminal. A drain of the first transistor and a source of the second transistor are connected to the first node. A gate of the second transistor, a drain of the second transistor, and a source of the third transistor are connected to the second node. A gate of the third transistor, a drain of the third transistor, the capacitor, and the second gate of the fourth transistor are connected to the third node. |
| US09721950B2 |
Semiconductor device
A semiconductor device including fin type patterns is provided. The semiconductor device includes a first fin type pattern, a field insulation layer disposed in vicinity of the first fin type pattern and having a first part and a second part, the first part protruding from the second part, a first dummy gate stack formed on the first part of the field insulation layer and including a first dummy gate insulation layer having a first thickness, and a first gate stack formed on the second part of the field insulation layer to intersect the first fin type pattern and including a first gate insulation layer having a second thickness different from the first thickness. |
| US09721949B1 |
Method of forming super steep retrograde wells on FinFET
A method of making a semiconductor structure is provided including providing a plurality of fins on a semiconductor substrate; depositing a layer containing silicon dioxide on the plurality of fins and on a surface of the semiconductor substrate; depositing a photoresist layer on one or more but less than all of the plurality of fins; etching the layer of silicon dioxide off of one or more of the plurality of fins on which the photoresist layer had not been deposited; stripping the photoresist layer; depositing a layer of pure boron on one or more of the plurality of fins on which a photoresist had not been deposited; and depositing a silicon nitride liner step on the plurality of fins. A partial semiconductor device fabricated by said method is also provided. |
| US09721948B1 |
Switch improvement using layout optimization
Chip structures having wiring coupled with the device structures of a high frequency switch and methods for fabricating such chip structures. A transistor is formed that includes a first source/drain region, a second source/drain region, and a first gate electrode having a first width aligned in a first direction. A wiring level is formed that includes a wire coupled with the first source/drain region. The wire has a length aligned in a second direction that is different from the first direction. |
| US09721946B2 |
Backside coupled symmetric varactor structure
A symmetric varactor structure may include a first varactor component. The first varactor component may include a gate operating as a second plate, a gate oxide layer operating as a dielectric layer and a body operating as a first plate of an area modulating capacitor. In addition, doped regions may surround the body of the first varactor component. The first varactor component may be supported on a backside by an isolation layer. The symmetric varactor structure may also include a second varactor component electrically coupled to the backside of the first varactor component through a backside conductive layer. |
| US09721945B2 |
Semiconductor device with IGBT and diode
A semiconductor device includes: an IGBT section including a vertical IGBT; and a diode section arranged along the IGBT section and including a diode. The diode section includes a hole injection reduction layer having a first conductivity type and arranged in an upper layer portion of a drift layer, extending to a depth deeper than an anode region constituted by a second conductivity type region in the diode section, having an impurity concentration lower than an impurity concentration of the anode region and higher than an impurity concentration of the drift layer. |
| US09721943B2 |
Wiring structure and electronic device including the same
A wiring structure may include at least two conductive material layers and a two-dimensional layered material layer in an interface between the at least two conductive material layers. The two-dimensional layered material layer may include a grain expander layer which causes grain size of a conductive material layer which is on the two-dimensional layered material layer to be increased. Increased grain size may result in resistance of the second conductive material layer to be reduced. As a result, the total resistance of the wiring structure may be reduced. The two-dimensional layered material layer may contribute to reducing a total thickness of the wiring structure. Thus, a low-resistance and high-performance wiring structure without an increase in a thickness thereof may be implemented. |
| US09721942B2 |
Semiconductor device and method for driving semiconductor device
By holding a voltage that depends on a video signal in a first capacitor, holding a voltage that depends on a threshold voltage of a transistor in a second capacitor, and then applying a total voltage of the voltage held in the first capacitor and the voltage held in the second capacitor between a source and a gate of the transistor, even when the threshold voltage varies, a current corresponding to the video signal can be supplied to a load. The voltage that depends on the video signal and the voltage that depends on the threshold voltage of the transistor are separately acquired. |
| US09721941B2 |
Semiconductor device in a level shifter with electrostatic discharge (ESD) protection circuit and semiconductor chip
The present examples relate to a semiconductor chip having a level shifter with an electrostatic discharge (ESD) protection circuit and a device applying to multiple power supply lines with high and low power inputs to protect the level shifter from the static ESD stress. More particularly, the present examples relate to using a feature to protect a semiconductor device in a level shifter from the ESD stress by using ESD stress blocking region adjacent to a gate electrode of the semiconductor device. The ESD stress blocking region increases a gate resistance of the semiconductor device, which results in reducing the ESD stress applied to the semiconductor device itself. |
| US09721940B2 |
Radiation-emitting semiconductor chip and method of producing radiation-emitting semiconductor chips
A radiation-emitting semiconductor chip having a semiconductor body including a semi-conductor layer sequence having an active region that generates radiation, a first semiconductor layer of a first conductor, and a second semiconductor layer of a second conductor different from the first conductor, and having a carrier on which the semiconductor body is arranged, wherein a pn junction is formed in the carrier, the carrier has a first contact and a second contact on a rear side facing away from the semiconductor body, and the active area and the pn junction connect to one another in antiparallel in relation to the forward-bias direction by the first contact and the second contact. |
| US09721939B2 |
Semiconductor device
Aspects of the invention provide a compact semiconductor device having a surge protection element, which can reliably protect against surge and is unlikely to be affected by manufacturing variation. By forming a parasitic n-p-n transistor on a guard ring, and adopting the parasitic n-p-n transistor as a surge protection element, it is possible to provide a compact semiconductor device having a surge protection element. Also, by adopting the parasitic n-p-n transistor as a surge protection element, it is possible to reduce the operating resistance in comparison with when using a parasitic n-p-n transistor as a surge protection element, and thus possible to improve the surge protection function. Further, by providing one surge protection element on the guard ring, rather than providing a surge protection element in each cell, it is possible minimize the effect of manufacturing variation (i.e., in-plane variation) on the surge protection function. |
| US09721938B1 |
Integrated circuit containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including tip-to-tip short configured fill cells, and the second DOE including corner short configured fill cells
An IC includes first and second designs of experiments (DOEs), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of tip-to-tip shorts, and the second DOE contains fill cells configured to enable NC detection of corner shorts. |
| US09721933B2 |
Laser marking in packages
A package includes a device die, a first plurality of redistribution lines underlying the device die, a second plurality of redistribution lines overlying the device die, and a metal pad in a same metal layer as the second plurality of redistribution lines. A laser mark is in a dielectric layer that is overlying the metal pad. The laser mark overlaps the metal pad. |
| US09721930B2 |
Semiconductor package and method for fabricating the same
A semiconductor package includes a first semiconductor chip stacked on a package substrate in which a first surface of the first semiconductor chip faces the package substrate and a second surface that is opposite to the first surface, a second semiconductor chip stacked on the first semiconductor chip that includes a third surface facing the first semiconductor chip and a fourth surface that is opposite to the third surface, and an integral adhesive structure that substantially continuously fills a first space between the package substrate and the first semiconductor chip and a second space between the first and second semiconductor chips. The integral adhesive structure includes an extension protruding from outer sidewalls of the first and second semiconductor chips. The extension has one continuously convex sidewall between a level of the first surface and a level of the fourth surface. |
| US09721928B1 |
Integrated circuit package having two substrates
A packaged IC device in which a die is sandwiched between first and second substrates such that (i) peripheral electrical contact pads of the die are wire bonded to the first substrate, e.g., for routing functional input/output signals, and (ii) core-area electrical contact pads of the die are connected to the second substrate in a flip-chip arrangement, e.g., for routing one or more power supply voltages to the core area of the die. The second substrate has a shape and position that (i) expose the peripheral electrical contact pads of the die for unencumbered machine-implemented wire bonding during the assembly process, and (ii) enable direct electrical connections between the first and second substrates outside the footprint of the die, e.g., by way of the corresponding solder bumps attached between the two substrates. |
| US09721927B1 |
Semiconductor device, structure and methods
A 3D semiconductor device, including: a first die including first transistors and first interconnect, overlaid by a second die including second transistors and second interconnect, where the first die has a first die area and the second die has a second die area, where the first die area is at least 10% larger than the second die area, and where the second die has a thickness of less than four microns. |
| US09721922B2 |
Semiconductor device and method of forming fine pitch RDL over semiconductor die in fan-out package
A semiconductor device has a first conductive layer including a plurality of conductive traces. The first conductive layer is formed over a substrate. The conductive traces are formed with a narrow pitch. A first semiconductor die and second semiconductor die are disposed over the first conductive layer. A first encapsulant is deposited over the first and second semiconductor die. The substrate is removed. A second encapsulant is deposited over the first encapsulant. A build-up interconnect structure is formed over the first conductive layer and second encapsulant. The build-up interconnect structure includes a second conductive layer. A first passive device is disposed in the first encapsulant. A second passive device is disposed in the second encapsulant. A vertical interconnect unit is disposed in the second encapsulant. A third conductive layer is formed over second encapsulant and electrically connected to the build-up interconnect structure via the vertical interconnect unit. |
| US09721921B2 |
Semiconductor device and method of bonding semiconductor die to substrate in reconstituted wafer form
A semiconductor device has a plurality of semiconductor die disposed over a carrier. An electrical interconnect, such as a stud bump, is formed over the semiconductor die. The stud bumps are trimmed to a uniform height. A substrate includes a bump over the substrate. The electrical interconnect of the semiconductor die is bonded to the bumps of the substrate while the semiconductor die is disposed over the carrier. An underfill material is deposited between the semiconductor die and substrate. Alternatively, an encapsulant is deposited over the semiconductor die and substrate using a chase mold. The bonding of stud bumps of the semiconductor die to bumps of the substrate is performed using gang reflow or thermocompression while the semiconductor die are in reconstituted wafer form and attached to the carrier to provide a high throughput of the flipchip type interconnect to the substrate. |
| US09721919B2 |
Solder bumps formed on wafers using preformed solder balls with different compositions and sizes
Solder-bumped semiconductor substrates (e.g., semiconductor wafers) and methods for forming solder bumped semiconductor substrates are provided, in which solder bumps are formed on a semiconductor substrate using preformed solder balls having different compositions and/or sizes. Two or more solder balls masks are successively utilized to place different types of preformed solder balls (differing in composition and/or size) into corresponding cavities of a solder ball fixture, and thereby form an array of different types of preformed solder balls arranged in the solder ball fixture. The array of preformed solder balls in the solder ball fixture are then transferred to corresponding contact pads of a semiconductor substrate (e.g., semiconductor wafer) using a single solder reflow process. This process allows different types of preformed solder bumps to be bonded to a semiconductor substrate at the same time using a single solder reflow process. |
| US09721914B2 |
Display device and array substrate for display device
An array substrate for a display device can include a substrate, a pad positioned on the substrate, an insulating layer positioned on the pad and including a plurality of open portions exposing the pad, a first metal layer positioned on the insulating layer and disposed to be in contact with the pad, a second metal layer positioned on the first metal layer, and a bump electrode positioned on the second metal layer and including a plurality of dimples. |
| US09721910B2 |
Method for manufacturing semiconductor device, semiconductor manufacturing apparatus, and wafer lift pin-hole cleaning jig
To shorten a maintenance time of a semiconductor manufacturing apparatus and to improve productivity of a semiconductor manufacturing line. A semiconductor wafer is processed by the semiconductor manufacturing apparatus in which reaction product in the inside of a wafer lift pin hole was removed using a cleaning jig having a return on its tip part. |
| US09721908B2 |
Thermal flow meter
Provided is a thermal flow meter that can be prevented from being eroded due to adhesion of water or like to a cut end portion of the lead exposed from the mold resin of the circuit package. A thermal flow meter 300 of the present invention is a thermal flow meter having a circuit package 400 formed by mounting a detection element 518 on leads 544 and 545 supported by a support frame 512, sealing with a mold resin, and cutting off the support frame 512, wherein cut end portions 544a and 545a of the leads 544 and 545 exposed from the mold resin of the circuit package 400 by cutting off the support frame 512 is covered by a covering portion 371. |
| US09721903B2 |
Vertical interconnects for self shielded system in package (SiP) modules
A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant. |
| US09721902B2 |
Method of manufacturing RF power amplifier module, RF power amplifier module, RF module, and base station
The present disclosure relates to a radio frequency (RF) unit of a base station, and more particularly, to a method of manufacturing an RF power amplifier module, an RF power amplifier module, an RF module, and a base station. The RF power amplifier module includes at least a power device, a power circuit board, a heat-dissipation substrate, and input/output ports. A power device die of the power device and the power circuit board are mounted on the heat-dissipation substrate. The power device die is connected to the power circuit board through packaging lead wires. In one exemplary embodiment, a heat-dissipation effect and manufacturing efficiency of the RF power amplifier module are improved and a cost of the RF power amplifier module is reduced. |
| US09721898B2 |
Methods of forming under device interconnect structures
Methods of forming microelectronic interconnect under device structures are described. Those methods and structures may include forming a device layer in a first substrate, forming at least one routing layer in a second substrate, and then coupling the first substrate with the second substrate, wherein the first substrate is bonded to the second substrate. |
| US09721890B2 |
System-on-chip, electronic apparatus including the same, and method of designing the same
A system-on-chip includes a substrate, a plurality of unit cells on the substrate, a first power mesh, and a second power mesh. The first power mesh includes a power rail that is connected to power terminals of the plurality of unit cells and is provided in a first metallization layer. The first power mesh also includes a power strap in a second metallization layer. The second power mesh is provided in a third metallization layer and a fourth metallization layer. |
| US09721889B1 |
Middle of the line (MOL) metal contacts
Integrated circuit (IC) structure embodiments and methods of forming them with middle of the line (MOL) contacts that incorporate a protective cap, which provides protection from damage during back end of the line (BEOL) processing. Each MOL contact has a main body in a lower portion of a contact opening. The main body has a liner (e.g., a titanium nitride layer) that lines the lower portion and a metal layer on the liner. The MOL contact also has a protective cap in an upper portion of the contact opening above the first metal layer and extending laterally over the liner to the sidewalls of the contact opening. The protective cap has an optional liner, which is different from the liner in the lower portion, and a metal layer, which is either the same or different than the metal in the main body. |
| US09721888B2 |
Trench silicide with self-aligned contact vias
A modified trench metal-semiconductor alloy formation method involves depositing a layer of a printable dielectric or a sacrificial carbon material within a trench structure and over contact regions of a semiconductor device, and then selectively removing the printable dielectric or sacrificial carbon material to segment the trench and form plural contact vias. A metallization layer is formed within the contact vias and over the contact regions. |
| US09721886B2 |
Preservation of fine pitch redistribution lines
An embodiment includes a semiconductor apparatus comprising: a redistribution layer (RDL) including a patterned RDL line having two RDL sidewalls, the RDL comprising a material selected from the group comprising Cu and Au; protective sidewalls directly contacting the two RDL sidewalls; a seed layer including the material; and a barrier layer; wherein (a) the RDL line has a RDL line width orthogonal to and extending between the two RDL sidewalls, and (b) the seed and barrier layers each include a width parallel to and wider than the RDL line width. Other embodiments are described herein. |
| US09721884B2 |
Inductor device and method of manufacturing the same
An inductor device includes a first insulating layer having a first via hole, a first metal layer formed on an upper surface of the first insulating layer and having a droop portion at an upper end-side of the first via hole, a second metal layer formed on a lower surface of the first insulating layer and having a first connection part exposed to a bottom surface of the first via hole, and a first metal-plated layer formed in the first via hole and configured to connect the first connection part and the droop portion of the first metal layer. |
| US09721879B2 |
Device with pillar-shaped components
A device with pillar-shaped components, includes a substrate; a wiring layer disposed on the substrate; and pillar-shaped components disposed on any of the substrate and the wiring layer, each of the pillar-shaped components having a bottom part connected to the substrate and/or the wiring layer, a top part opposed to the bottom part, and a lateral face part extending from the bottom part and connected to the top part; wherein each of the pillar-shaped components includes a first pillar-shaped part formed by plating, a second pillar-shaped part formed on the first pillar-shaped part by plating, and a ring-like projection part formed on the lateral face part to project outward and extend in a circumferential direction, and to be in a position higher than a joint position between the first pillar-shaped part and the second pillar-shaped part. |
| US09721877B1 |
Method of mounting passive electronic component on lead frame
A packaged electronic device has first and second lead frame leads and a passive electronic component mounted, across a gap between the leads, on the top sides of the leads, using an adhesive. Facing lateral sides of the leads each include a recess that receives the adhesive. The recess promotes adhesion between the electronic component and the corresponding lead while limiting spread of the adhesive on the bottom side of the electronic component. The adhesive in the recesses promotes adhesion of the component to the leads by inhibiting cracking, and enhances inspection capability at the device backside. |
| US09721875B2 |
Power module and fabrication method for the same
A power module includes: an insulating layer; a leadframe disposed on the insulating layer; a semiconductor chip disposed on the leadframe; and a mold resin formed so as to cover the semiconductor chip and at least a part of the metal layer, wherein a groove into which a part of the insulating layer is inserted is formed on a surface of the leadframe facing the insulating layer. Accordingly, there can be provided the power module with improved reliability so that the insulating layer and the leadframe may be hardly deviated from each other even if external force is applied thereon; and a fabrication method for such a power module. |
| US09721868B2 |
Three dimensional integrated circuit (3DIC) having a thermally enhanced heat spreader embedded in a substrate
A three dimensional integrated circuit (3DIC) includes a first substrate and a heat spreading structure embedded in the first substrate. The 3DIC further includes a die electrically connected to the first substrate, wherein the die is thermally connected to the heat spreading structure. The 3DIC further includes a plurality of memory units on the die, wherein the die is between the plurality of memory units and the first substrate, and the plurality of memory units is thermally connected to the heat spreading structure by the die. The 3DIC further includes an external cooling unit on the plurality of memory units, wherein the plurality of memory units is between the die and the external cooling unit, and the die is thermally connected to the external cooling unit by the plurality of memory units. |
| US09721862B2 |
Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages
A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A size of the standardized carrier is independent from a size of the semiconductor die. An encapsulant is deposited over the standardized carrier and around the semiconductor die. An interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The semiconductor device is singulated through the encapsulant. Encapsulant remains disposed on a side of the semiconductor die. Alternatively, the semiconductor device is singulated through a second portion of the base semiconductor and through the encapsulant to remove the second portion of the base semiconductor and encapsulant from the side of the semiconductor die. |
| US09721860B2 |
Silicon package for embedded semiconductor chip and power converter
A packaged transistor device (100) comprises a semiconductor chip (101) including a transistor with terminals distributed on the first and the opposite second chip side; and a slab (110) of low-grade silicon (l-g-Si) configured as a ridge (111) framing a depression including a recessed central area suitable to accommodate the chip, the ridge having a first surface in a first plane and the recessed central area having a second surface in a second plane spaced from the first plane by a depth (112) at least equal to the chip thickness, the ridge covered by device terminals (120; 121) connected to attachment pads in the central area having the terminals of the first chip side attached so that the terminals (103) of the opposite second chip side are co-planar with the device terminals on the slab ridge. |
| US09721858B2 |
Controllable integrated capacitive device
An integrated circuit includes several metallization levels separated by an insulating region. A hollow housing whose walls comprise metallic portions is produced within various metallization levels. A controllable capacitive device includes a suspended metallic structure situated in the hollow housing within a first metallization level including a first element fixed on two fixing zones of the housing and at least one second element extending in cantilever fashion from the first element and includes a first electrode of the capacitive device. A second electrode includes a first fixed body situated at a second metallization level adjacent to the first metallization level facing the first electrode. The first element is controllable in flexion from a control zone of this first element so as to modify the distance between the two electrodes. |
| US09721857B2 |
Semiconductor device and manufacturing method thereof
When VC inspection for a TEG is performed, it is easily detected whether any failure of a contact plug occurs or not by increasing an emission intensity of a contact plug, so that reliability of a semiconductor device is improved. An element structure of an SRAM is formed on an SOI substrate in a chip region. Also, in a TEG region, an element structure of an SRAM in which a contact plug is connected to a semiconductor substrate is formed on the semiconductor substrate exposed from an SOI layer and a BOX film as a TEG used for the VC inspection. |
| US09721856B2 |
Implementing resistance defect performance mitigation using test signature directed self heating and increased voltage
A method and system are provided for implementing resistive defect performance mitigation for integrated circuits. A test is generated for identifying resistive defects. A first self heating repair process is performed for repairing resistive defects. Testing is performed to identify a mitigated resistive defect and a functional integrated circuit. Responsive to identifying a resistive defect not being mitigated and a functional integrated circuit, a second repair process is performed, then testing is performed again. |
| US09721854B2 |
Structure and method for in-line defect non-contact tests
A system, method and apparatus may comprise a wafer having a plurality of spiral test structures located on the kerf of the wafer. The spiral test structure may comprise a spiral connected at either end by a capacitor to allow the spiral test structure to resonate. The spiral structures may be located on a first metal layer or on multiple metal layers. The system may further incorporate a test apparatus having a frequency transmitter and a receiver. The test apparatus may be a sensing spiral which may be placed over the spiral test structures. A controller may provide a range of frequencies to the test apparatus and receiving the resonant frequencies from the test apparatus. The resonant frequencies will be seen as reductions in signal response at the test apparatus. |
| US09721853B2 |
System and method for forming a semiconductor device
A system and method for forming a semiconductor device is provided. The system may measure characteristics of the substrate to determine an amount of induced stress on the substrate. The measured characteristics may include warpage, reflectivity and/or crack information about the substrate. The induced stress may be determined, at least in part, based on the measured characteristics. The system may compare the induced stress on the substrate to a maximum intrinsic strength of the substrate and adjust an anneal for the substrate based on the comparison. The adjustment may reduce or limit breakage of the substrate during the anneal. The system may control at least one of a peak anneal temperature and a maximum anneal duration for an anneal unit, which may perform an anneal on the substrate. The measurements and control may be performed ex-situ or in-situ with the anneal. |
| US09721852B2 |
Semiconductor TSV device package to which other semiconductor device package can be later attached
A first package includes a laminate layer, an overmold layer above and in direct contact with the laminate layer, and a logic circuit-through-silicon via (TSV) layer including a first logic die and TSVs. The logic circuit-TSV layer is within the overmold layer, and the TSVs are electrically exposed at a top surface of the overmold layer. The first package may be fabricated and tested by a first party prior to being provided to a second party. A second package includes a second logic die. The second party may attach the second package to the first package at the electrically exposed TSVs of the first package to realize a complete and functional semiconductor device. |
| US09721848B1 |
Cutting fins and gates in CMOS devices
A semiconductor device includes a first fin and a second fin arranged on a substrate, a gate stack arranged over a channel region of the first fin, and spacers arranged along sidewalls of the gate stack. A cavity is arranged adjacent to a distal end of the gate stack. The cavity is defined by the substrate, a distal end of the second fin, and the spacers. A dielectric fill material is arranged in the cavity such that the dielectric fill material contacts the substrate, the distal end of the second fin, and the spacers. |
| US09721845B1 |
Vertical field effect transistors with bottom contact metal directly beneath fins
Various embodiments disclose a method for fabricating one or more vertical fin field-effect-transistors. In one embodiment, a structure is formed. The structure comprises a substrate, a source/drain layer, and a plurality of fins formed on the first source/drain layer. The source/drain layer comprises a first semiconductor layer, a sacrificial layer, and a second semiconductor layer. A bottom spacer layer is formed in contact with the second semiconductor layer and the plurality of fins. A gate structure is then formed. A dielectric layer is deposited in contact with at least the gate structure, the bottom spacer layer, and the second semiconductor layer. At least a portion of the dielectric layer and a portion of the second semiconductor are removed. This removal forms a trench exposing a portion of the sacrificial layer. The sacrificial layer is then removed forming a cavity. A contact material is deposited within the trench and the cavity. |
| US09721844B2 |
Semiconductor device comprising a switch
A semiconductor device comprising a switch and a method of making the same. The device has a layout that includes one or more rectangular unit cells. Each unit cell includes a gate that divides the unit cell into four corner regions. Each unit cell also includes a source comprising first and second source regions located in respective opposite corner regions of the unit cell. Each unit cell further includes a drain comprising first and second drain regions located in respective opposite corner regions of the unit cell. Each unit cell also includes a plurality of connection members extending over the gate, source and drain for providing electrical connections to the gate, source and drain. |
| US09721843B2 |
Asymmetric high-k dielectric for reducing gate induced drain leakage
An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region. |
| US09721837B2 |
Wafer level optoelectronic device packages with crosstalk barriers and methods for making the same
A method for wafer level fabricating a plurality of optoelectronic devices, starting with a wafer that includes a plurality of light detector sensor regions, includes attaching each of a plurality of light source dies to one of a plurality of bond pads on a top surface of the wafer that includes the plurality of light detector sensor regions. The method also includes attaching, to the wafer, a preformed opaque structure made off-wafer from an opaque material, wherein the preformed opaque structure includes opaque vertical optical barriers. Additionally, solder balls or other electrical connectors are attached to the bottom of the wafer. The wafer is diced to separate the wafer into a plurality of optoelectronic devices, each of which includes at least one of the light detector sensor regions, at least one of the light source dies and at least two of the solder balls or other electrical connectors. |
| US09721836B2 |
Structure and formation method of damascene structure
A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a first conductive feature over the semiconductor substrate. The semiconductor device also includes a first dielectric layer over the semiconductor substrate and surrounding the first conductive feature. The semiconductor device further includes a second conductive feature over the first conductive feature, and the second conductive feature extends into the first conductive feature. In addition, the semiconductor device includes a second dielectric layer over the first dielectric layer and surrounding the second conductive feature. The semiconductor device also includes an etch stop layer between the first dielectric layer and the second dielectric layer. The etch stop layer surrounds the first conductive feature, and a bottom surface of the second conductive feature is above the etch stop layer. |
| US09721831B2 |
Method and apparatus for semiconductor planarization
A method includes forming a plurality of first semiconductor fins and a plurality of second semiconductor fins in a substrate, depositing a gate electrode layer over the substrate, wherein upper portions of the plurality of first semiconductor fins and the plurality of second semiconductor fins are embedded in the gate electrode layer, depositing a reverse film over the gate electrode layer and applying a chemical mechanical polish process to the reverse film and the gate electrode layer, wherein during the step of applying the chemical mechanical polish process, depositing a slurry between a polishing pad and the reverse film, and wherein a slurry selectivity ratio of the gate electrode layer to the reverse film is greater than 1. |
| US09721830B2 |
Methods of manufacturing semiconductor devices including isolation layers
A method of manufacturing a semiconductor device comprising the steps of: forming a trench at an upper portion of a semiconductor substrate forming a preliminary filling insulation layer by coating a siloxane composition on the semiconductor substrate to fill the trench performing a low temperature curing process at a temperature in a range from about 50° C. to about 150° C. such that the preliminary filling insulation layer is transformed into a filling insulation layer including polysiloxane and forming an isolation layer by planarizing the filling insulation layer. |
| US09721829B2 |
FinFETs with different fin height and EPI height setting
An integrated circuit structure includes a first semiconductor strip, first isolation regions on opposite sides of the first semiconductor strip, and a first epitaxy strip overlapping the first semiconductor strip. A top portion of the first epitaxy strip is over a first top surface of the first isolation regions. The structure further includes a second semiconductor strip, wherein the first and the second semiconductor strips are formed of the same semiconductor material. Second isolation regions are on opposite sides of the second semiconductor strip. A second epitaxy strip overlaps the second semiconductor strip. A top portion of the second epitaxy strip is over a second top surface of the second isolation regions. The first epitaxy strip and the second epitaxy strip are formed of different semiconductor materials. A bottom surface of the first epitaxy strip is lower than a bottom surface of the second epitaxy strip. |
| US09721828B2 |
Method to reduce particles during STI fill and reduce CMP scratches
A method of filling STI trenches with dielectric with reduced particle formation. A method of depositing unbiased STI oxide on an integrated circuit during STI trench fill that reduces STI defects during STI CMP. |
| US09721825B2 |
Method of providing a flexible semiconductor device and flexible semiconductor device thereof
Some embodiments include a method. The method can include providing a carrier substrate having an edge. Further, the method can include providing a cross-linking adhesive, and providing a flexible substrate having an edge. Further still, the method can include coupling the flexible substrate to the carrier substrate using the cross-linking adhesive such that at least a portion of the edge of the flexible substrate is recessed from the edge of the carrier substrate and such that the cross-linking adhesive has an exposed portion of the cross-linking adhesive at an offset portion of the first surface of the carrier substrate between the at least the portion of the edge of the flexible substrate and the edge of the carrier substrate. Meanwhile, the method can include etching the exposed portion of the cross-linking adhesive. Other embodiments of related methods and devices are also disclosed. |
| US09721816B2 |
Decapsulation system
A decapsulation apparatus has an etch plate, an off-center etch head having an opening, a cover sealing to the etch plate forming an etching chamber, a gasket surrounding the opening, a ram sealed through the cover, a pressure-controlled source of Nitrogen or inert gas continuously purging the etching chamber at a low gas pressure, a f toggle mechanism mounted to a metal plate t, an etchant supply subsystem comprising sources of etchant solutions, an etchant solution pump, supply passages and controls to select etchants and etchant ratios, and a heat exchanger heating or cooling the etchant solution, etchant waste passages f conducting used etchant away. Etchants are mixed in the passages to the reaction region, and turbulence in the reaction region is promoted by impinging etchant solution on the encapsulated device. |
| US09721815B2 |
Substrate processing apparatus and substrate processing method
In a substrate processing apparatus, chemical-solution processing is performed by supplying a chemical solution to the upper surface of a substrate in a state where a top plate is located at a first relative position. Also, cleaning processing is performed by supplying a cleaning liquid to the upper surface of the substrate in a state where the top plate is located at a second relative position closer to the substrate than the first relative position is. Moreover, dry processing is performed on the substrate by rotating the substrate in a state where the top plate is located at a third relative position closer to the substrate than the second relative position is. This allows a chemical atmosphere above the substrate to be efficiently removed during the cleaning processing. Consequently, the occurrence of particles due to the chemical atmosphere above the substrate can be suppressed during the dry processing. |
| US09721810B2 |
Methods for enhancing P-type doping in III-V semiconductor films
Methods of doping a semiconductor film are provided. The methods comprise epitaxially growing the III-V semiconductor film in the presence of a dopant, a surfactant capable of acting as an electron reservoir, and hydrogen, under conditions that promote the formation of a III-V semiconductor film doped with the p-type dopant. In some embodiments of the methods, the epitaxial growth of the doped III-V semiconductor film is initiated at a first hydrogen partial pressure which is increased to a second hydrogen partial pressure during the epitaxial growth process. |
| US09721808B2 |
Methods of forming semiconductor devices including contact holes
Methods of fabricating a semiconductor device are provided. The methods may include forming a stopper layer on a target layer including a cell area and an edge area, forming a hard mask including first upper openings and dam trench on the stopper layer, forming opening spacers on inner walls of the first upper openings and a dam pattern in the dam trench, removing the stopper layer exposed in the first upper openings to form first lower openings, forming pillar patterns in the first lower openings and the first upper openings and an eaves pattern on the dam pattern, removing the hard mask in the cell area, forming a first polymer block between the pillar patterns including second upper openings, etching the stopper layer exposed in the second upper openings to form second lower openings, and removing the first polymer block, the pillar patterns, the dam pattern and the eaves pattern. |
| US09721802B2 |
LED based optical source coupled with plasma source
An apparatus configured to remove metal etch byproducts from the surface of substrates and from the interior of a substrate processing chamber. A plasma is used in combination with a solid state light source, such as an LED, to desorb metal etch byproducts. The desorbed byproducts may then be removed from the chamber. |
| US09721801B2 |
Apparatus and a method for treating a substrate
A substrate treating method may include jetting a fluid containing an abrasive onto a substrate, and polishing the substrate using the jetted fluid. |
| US09721796B2 |
Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budget
A process is disclosed of forming metal replacement gates for PMOS transistors with oxygen in the metal gates such that the PMOS gates have effective work functions above 4.85. Metal work function layers in the PMOS gates are oxidized at low temperature to increase their effective work functions to the desired PMOS range. Hydrogen may also be incorporated at an interface between the metal gates and underlying gate dielectrics. Materials for the metal work function layers and processes for the low temperature oxidation are disclosed. |
| US09721792B2 |
Method of forming strain-relaxed buffer layers
Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top. Whereas conventionally formed buffer layers are often thick, rough and/or defective, the strain relaxed buffer layers formed using the implementations described herein demonstrate improved surface morphology with minimal defects. |
| US09721791B2 |
Method of fabricating III-nitride semiconductor dies
According to an embodiment of a method of fabricating III-Nitride semiconductor dies, the method includes: growing a III-Nitride body over a group IV substrate in a semiconductor wafer; forming at least one device layer over the III-Nitride body; etching grid array trenches in the III-Nitride body and in the group IV substrate; forming an edge trench around a perimeter of the semiconductor wafer, the grid array trenches terminating inside the group IV substrate; and forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches. |
| US09721789B1 |
Saving ion-damaged spacers
Methods of selectively removing silicon oxide are described. Exposed portions of silicon oxide and spacer material may both be present on a patterned substrate. The silicon oxide may be a native oxide formed on silicon by exposure to atmosphere. The exposed portion of spacer material may have been etched back using reactive ion etching (RIE). A portion of the exposed spacer material may have residual damage from the reactive ion etching. A self-assembled monolayer (SAM) is selectively deposited over the damaged portion of spacer material but not on the exposed silicon oxide or undamaged portions of spacer material. A subsequent gas-phase etch may then be used to selectively remove silicon oxide but not the damaged portion of the spacer material because the SAM has been found to not only preferentially adsorb on the damaged spacer but also to halt the etch rate. |
| US09721786B2 |
Sulfur-containing thin films
In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel. |
| US09721785B2 |
Method for manufacturing silica layer, silica layer, and electronic device
A method of manufacturing a silica layer includes: coating a pre-wetting liquid material including a carbon compound on a substrate; coating a composition for forming a silica layer on the substrate coated with the pre-wetting liquid material; and curing a substrate coated with the composition for forming a silica layer. |
| US09721784B2 |
Ultra-conformal carbon film deposition
Embodiments of the invention relate to deposition of a conformal carbon-based material. In one embodiment, the method comprises depositing a sacrificial dielectric layer with a predetermined thickness over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, introducing a hydrocarbon source, a plasma-initiating gas, and a dilution gas into the processing chamber, wherein a volumetric flow rate of hydrocarbon source:plasma-initiating gas:dilution gas is in a ratio of 1:0.5:20, generating a plasma at a deposition temperature of about 300 C to about 500 C to deposit a conformal amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate, and removing the patterned features. |
| US09721778B2 |
Mass spectrometer
A mass spectrometer (1) is provided with: an ionization chamber (10) for ionizing a sample (S) on its surface at an analysis point through irradiation by a laser beam; an analysis chamber (23) having a mass spectroscope (24) for detecting ions; a middle vacuum chamber (21, 22) arranged between the ionization chamber (10) and the analysis chamber (23); and an introduction pipe (12) or an introduction hole for allowing the inside of the housing (11) of the ionization chamber (10) to communicate with the inside of the middle vacuum chamber (21), wherein ions and fine particles, which have not been drawn into the introduction pipe (12) or introduction hole, can be prevented from spreading inside of the chamber. The structure of the mass spectrometer (1) further includes: an exhaust pipe (13); and a fan (15) for drawing air into the exhaust pipe (13) so that air that contains ions and/or fine particles, which have not been introduced into the introduction pipe (12) or introduction hole, can be suctioned up into the exhaust pipe (13) when the fan (15) is in operation. |
| US09721771B2 |
Film forming apparatus
A film forming apparatus includes a processing chamber, a gas supply unit, a stage, at least one holder, a power supply, at least one magnet and a magnet rotation unit. The gas supply unit is configured to supply a gas into the processing chamber. The stage is provided in the processing chamber, and has a center coinciding with a central axis which extends in a vertical direction. The stage is configured to cool the object to about −50° C. or below. Each holder is configured to hold a target, and extends in an annular shape above the stage inside the processing chamber. The power supply is configured to generate a voltage to be applied to the target. Each magnet is provided outside the processing chamber and faces the target. The magnet rotation unit is configured to rotate the magnet about the central axis. |
| US09721770B2 |
Oxide sintered body, production method therefor, target, and transparent conductive film
A target for sputtering which enables to attain high rate film-formation of a transparent conductive film suitable for a blue LED or a solar cell. A oxide sintered body includes an indium oxide and a cerium oxide, and one or more oxide of titanium, zirconium, hafnium, molybdenum and tungsten. The cerium content is 0.3 to 9% by atom, as an atomicity ratio of Ce/(In+Ce), and the content of cerium is equal to or lower than 9% by atom, as an atomicity ratio of Ce/(In+Ce). The oxide sintered body has an In2O3 phase of a bixbyite structure has a CeO2 phase of a fluorite-type structure finely dispersed as crystal grains having an average particle diameter of equal to or smaller than 3 μm. |
| US09721767B2 |
Embedded mask patterning process for fabricating magnetic media and other structures
In some examples, a method comprising depositing a functional layer (e.g., a magnetic layer) over a substrate; depositing a granular layer over the functional layer, the granular layer including a first material defining a plurality of grains separated by a second material defining grain boundaries of the plurality of grains; removing the second material from the granular layer such that the plurality of grains of the granular layer define a hard mask layer on the functional layer; and removing portions of the functional layer not masked by the hard mask layer, wherein the depositing of the functional layer, the depositing of the granular layer, removing the second material, and removing the portions of the functional layer are performed in a vacuum environment. |
| US09721766B2 |
Method for processing target object
A method for processing a target object includes a formation step of forming a silicon oxide film in a processing chamber by repeatedly executing a sequence including a first step of supplying a first gas containing aminosilane-based gas, a second step of purging a space in the processing chamber after the first step, a third step of generating a plasma of a second gas containing oxygen gas after the second step, and a fourth step of purging the space after the third step. The method further includes a preparation step executed before the target object is accommodated in the processing chamber and a processing step of performing an etching process on the target object. The preparation step is performed before the processing step. The formation step is performed in the preparation step and the processing step. In the first step, a plasma of the first gas is not generated. |
| US09721765B2 |
Plasma device driven by multiple-phase alternating or pulsed electrical current
A plasma source is provided. The plasma source includes at least three hollow cathodes, including a first hollow cathode, a second hollow cathode, and a third hollow cathode, each hollow cathode having a plasma exit region. The plasma source includes a source of power capable of producing multiple output waves, including a first output wave, a second output wave, and a third output wave, wherein the first output wave and the second output wave are out of phase, the second output wave and the third output wave are out of phase, and the first output wave and the third output wave are out of phase. Each hollow cathode is electrically connected to the source of power such that the first hollow cathode is electrically connected to the first output wave, the second hollow cathode is electrically connected to the second output wave, and the third hollow cathode is electrically connected to the third output wave. Electrical current flows between the at least three hollow cathodes that are out of electrical phase. The plasma source is capable of generating a plasma between the hollow cathodes. |
| US09721763B2 |
Systems and methods for providing gases to a process chamber
A gas supply system for providing a plurality of process gases to a process chamber includes a plurality of mass flow controllers each arranged to receive a respective subset of the plurality of process gases. Each of the respective subsets includes more than one of the process gases, and at least one of the process gases is provided to more than one of the plurality of mass flow controllers. Respective valves are arranged upstream of each of the plurality of mass flow controllers to selectively provide the respective subsets to the mass flow controllers. A first quantity of the plurality of mass flow controllers is less than a total number of the plurality of process gases to be supplied to the process chamber. The first quantity is equal to a maximum number of the plurality of process gases to be used in the process chamber at any one time. |
| US09721758B2 |
Unified RF power delivery single input, multiple output control for continuous and pulse mode operation
A radio frequency (RF) control system including a RF generator having a power amplifier that outputs a RF signal and a controller. A matching network receives the RF signal and generates a plurality of RF output signals. The matching network includes a ratio tuning element to vary a ratio of power between the plurality of RF output signals. The first controller communicates a ratio control signal to the matching network, and the matching network controls the ratio tuning element in accordance with the ratio control signal. The RF controls system operates in a continuous and pulse mode of operation. The controller can also control the rise or fall of a pulse edge or a level or duration of incremental changes in the pulse edge. |
| US09721756B2 |
Charged particle beam writing apparatus and charged particle beam writing method
A charged particle beam writing apparatus includes a storage unit to store writing data of a region to be written in a target object, a first dividing unit to read the writing data and divide the region to be written into at least one first data processing region that overlaps with at least a first region where a pattern has been arranged, and at least one second data processing region that overlaps with a second region where no pattern is arranged without overlapping with the first region, a data processing unit to perform data processing of predetermined data processing contents for at least one first data processing region without performing the data processing for at least one second data processing region, and a writing unit to write a pattern on the target object, based on processed data. |
| US09721755B2 |
Method and device for characterizing an electron beam
A device for detecting X-rays radiated out of a substrate surface, said device comprising at least one X-ray detector, a resolver grating and a modulator grating, said resolver grating with at least one opening facing towards said X-ray detector is arranged in front of said X-ray detector. Said modulator grating is provided between said resolver grating and said substrate at a predetermined distance from said resolver grating and said substrate, where said modulator grating having a plurality of openings in at least a first direction, wherein said x-rays from said surface is spatially modulated with said modulator grating and resolver grating. |
| US09721752B2 |
Sample holder and charged particle device
The objective of the present invention is to maintain the surrounding of a sample at atmospheric pressure and efficiently detect secondary electrons. In a sample chamber of a charged particle device, a sample holder (4) has: a gas introduction pipe and a gas evacuation pipe for controlling the vicinity of a sample (20) to be an atmospheric pressure environment; a charged particle passage hole (18) and a micro-orifice (18) enabling detection of secondary electrons (15) emitted from the sample (20), co-located above the sample (20); and a charged particle passage hole (19) with a hole diameter larger than the micro-orifice (18) above the sample (20) so as to be capable of actively evacuating gas during gas introduction. |
| US09721751B2 |
Electron microscopy specimen and method of fabrication
A method for preparing plan-view transmission electron microscopy specimens is disclosed. The method employs isotropic vapor-phase etching in conjunction with one or more integrated etch-stop layers that give rise to a support membrane having a well-controlled, substantially uniform thickness. In some embodiments, the support membrane comprises an etch-stop layer that is formed using a high-precision formation process, such as atomic-layer deposition, oxidation, and the like. As a result, formation of the support membrane does not require additional processes, such as mechanical polishing or ion milling, to achieve its desired thickness. The method enables reduced specimen-preparation time, as well as simultaneous preparation of multiple specimens having large, uniformly thick areas for imaging. |
| US09721750B2 |
Controlling contamination particle trajectory from a beam-line electrostatic element
Provided herein are approaches for controlling particle trajectory from a beam-line electrostatic element. In an exemplary approach, a beam-line electrostatic element is disposed along a beam-line of an electrostatic filter (EF), and a voltage is supplied to the beam-line electrostatic element to generate an electrostatic field surrounding the beam-line electrostatic element, agitating a layer of contamination particles formed on the beam-line electrostatic element. A trajectory of a set of particles from the layer of contamination particles is then modified to direct the set of particles to a desired location within the EF. In one approach, the trajectory is controlled by providing an additional electrode adjacent the beam-line electrostatic element, and supplying a voltage to the additional electrode to control a local electrostatic field in proximity to the beam-line electrostatic element. In another approach, the trajectory is influenced by one or more geometric features of the beam-line electrostatic element. |
| US09721744B2 |
Fuse holder and fuse interruption mechanism
It is aimed to provide a fuse holder with a novel structure capable of improving insertion operability in the fuse holder for holding a plurality of fuses. A plurality of fuse holding portions (26a, 26b) are provided into which main body portions (16, 16) of fuses (12a, 12b) are to be mounted and in which lead portions (14, 14) of the fuses (12a, 12b) are held in a projecting state. Holding positions of the fuses (12a, 12b) by the plurality of fuse holding portions (26a, 26b) are made different from each other in a projecting direction of the lead portions (14) from the main body portions (16) in the fuses (12a, 12b). |
| US09721738B2 |
Hand-actuated transmitter unit
In order to improve a hand-actuated transmitter unit for vehicles, in particular for handlebar-controlled vehicles, comprising a housing, an actuating lever which is movable relative to the housing and is coupled to a transmission element such that an actuation of the actuating lever is transmitted by means of the transmission element to a slave unit, such that further functions of a vehicle can be controlled, it is proposed that a detector unit which detects with at least one detector a transition of the actuating lever from a non-actuated state to an actuated state and vice versa is associated with the transmitter unit. |
| US09721737B2 |
Switch device
Provided is a switch device including rotor members mounted so as to be rotatable about a longitudinal axis of a lever main body, knob members mounted so as to be integrally rotatable with the rotor members, the knob members including cam surfaces that face the cam surfaces of the rotor members with a gap therebetween, a movable contact member being movable in the longitudinal axis direction by a rotational operation of the rotor members and the knob members about the longitudinal axis, and a flexible substrate linearly disposed in the longitudinal axis direction in at least a movable range of the movable contact member, the flexible substrate including a contact portion, a contact terminal of the movable contact member being brought into contact with and separated from the contact portion in association with the movement in the longitudinal axis direction of the movable contact member. |
| US09721730B1 |
Capacitor having multiple anodes housed in a stacked casing
A capacitor is described. The capacitor comprises a first casing member having a first face wall extending to a first surrounding sidewall in turn extending to a first annular edge defining a first open end. A second casing member has a second face wall extending to a second surrounding sidewall in turn extending to a second annular edge defining a second open end. The second casing member is supported on the first annular edge to thereby close the first open end of the first casing member and provide a first capacitor enclosure comprising the first and second casing members in a stacked relationship. A cover is secured to the second annular edge to close the second casing member and provide a second capacitor enclosure. An anode, for example of tantalum, and a cathode active material, for example of ruthenium oxide, reside in capacitive association with each other inside each of the first and second capacitor enclosures. A working electrolyte is also contained in the capacitor enclosures. Finally, leads extend from each anode through insulative seals structures supported by the casing members for making electrical connection to the capacitor. |
| US09721725B2 |
Electronic component and manufacturing method thereof
A magnetic substrate has such a shape that ridges extending between principal surfaces are cut away by cutout portions. A multilayer body has corners arranged so as to overlap the cutout portions. A coil includes lead portions which are connected with both ends of a coil portion and which are drawn out to the corners. A coil is combined with the coil to constitute a common mode choke coil and includes lead portions which are connected with both ends of a coil portion and which are drawn out to the corners. Connecting portions connect external electrodes to the lead portions and are provided at the cutout portion. |
| US09721722B2 |
Power reception device, vehicle including power reception device, and power transfer system
A vehicle includes a power reception unit, a rectifier, a power line, and a cooling fan. The power reception unit of the vehicle is configured to receive, in a contactless manner, AC power output from a power transmission unit of a power transmission device. The rectifier rectifies the electric power received by the power reception unit. The electric power rectified by the rectifier is output through the power line. The cooling fan cools the power reception unit. The cooling fan is electrically connected to the power line, and operates with the electric power received from the power line. |
| US09721721B2 |
Wireless power transmitter, wireless power receiver and impedence control method
Disclosed is a wireless power transmitter which transmits power through a wireless power receiver to a load side. The wireless power transmitter includes a power source for generating AC power; a transmission coil for wirelessly transmitting the AC power to a reception coil of the wireless power receiver; and a detecting unit for detecting a coupling state between the transmission coil and the reception coil. |
| US09721715B2 |
Solid state components having an air core
Solid state components having an air core and methods of producing such components are presented. An air core component preferably has lower conducting bands, upper conducting, and conducting posts that collectively form a conducting coil. A coating material placed at least over the upper bands of the coil provides structural support for the coil. The coil can be built around or in a sacrificial core material that can be removed leaving an air core behind. |
| US09721711B2 |
Switch structure and electronic device employing same
A switch structure includes a power element, a keypad, a first magnetic component, and a second magnetic component. The second magnetic component is positioned adjacent to the first magnetic component. When the keypad is deactivated, a magnetic attractive force is generated between the first magnetic component and the second magnetic component. When the keypad is activated, the power element controls the first magnetic component to generate a magnetic repulsive force with the second magnetic component. |
| US09721708B2 |
High-temperature superconducting coil and method of manufacturing same
There is provided a high-temperature superconducting (HTS) coil and a method of manufacturing the same, allowing simple and excellent affixation between side panels for cooling the superconducting coil and the HTS coil while inhibiting delamination of an HTS wire. The method of manufacturing the HTS coil including the rare-earth-based HTS wire of the superconducting coil and side panels for cooling the superconducting coil which are affixed thereto, windings of the rare-earth-based HTS wire of the superconducting coil being separated between turns, includes: utilizing a tape-like polytetrafluoroethylene (PTFE) film 3 as an insulator between the windings of the rare-earth-based HTS wire 2 to form a PTFE-film co-wound superconducting coil; impregnating the PTFE-film co-wound superconducting coil 4 with epoxy resin 6; and affixing the side panels 5 to the PTFE film co-wound superconducting coil 4. |
| US09721705B2 |
Magnetic particle having high-reflective protective membrane and method for producing same
The present invention relates to a magnetic particle having a high-reflective protective membrane and a method for producing same, especially wherein the magnetic particle includes a magnetic core, a shell formed on the magnetic core, and a high-reflective protective membrane formed on the shell, and the high-reflective protective membrane has low-refractive-index and high-refractive-index membranes. The magnetic particle has advantages that have high brightness and prevent the shell from being damaged by friction with a filler and pressure between rollers during a dispersion step of an ink-making process. Also, the magnetic particle is used for different colored inks, general paint, particulate pigments for vehicles, pigments for cosmetics, catalyst paint, and especially anti-forgery inks, etc., and has advantages that are durable and express colors that existing magnetic pigments fail to. |
| US09721704B2 |
Wire cover
A wire cover (10) is mounted on a rear surface of a housing (30) such that a bundle of wires (31) pulled out from a rear surface of the housing (30) is guided in a predetermined direction. The wire cover (10) includes a binding member (40) with a band (41) to be wound around the wires (31) and a lock (42) for locking the band (41) at a predetermined position. The bundle of the wires (31) is fixed by the binding member (40). The band (41) extends from a first outer surface (46) of the lock (42) and is inserted into the interior of the lock (42) from a second outer surface (47) of the lock (42) to be locked. First positioning portions (24) contacts the first surface (46) of the lock (42) and a second positioning portion (25) contacts the second surface (47) of the lock (42). |
| US09721700B2 |
Water-stop structure for electrical wire, and method for manufacturing same
A water-stop structure for electrical wire includes: a terminal including an electrical wire connection portion; and an electrical wire in which an outer circumference of a conductor including a plurality of single wires is coated with an insulation coating portion and which is swaged to be fixed to the electrical wire connection portion, a water-stop agent being filled into a gap in the insulation coating portion to thereby perform water stop in the electrical wire. The water-stop agent includes a fluorescent agent. |
| US09721699B2 |
Water-stop structure for wire harness
A water-stop structure including a water-stop tube is provided in which the water-stop tube can be brought into intimate contact with a water-stop region in a wire harness having a steep thickness gradient and thus water-stop performance is improved. The wire harness includes a first portion and a second portion that is thinner than the first portion. An inner water-stop tube covers the water-stop region ranging from the first portion to the second portion in a state where the inner water-stop tube is heated and shrunk. An outer water-stop tube covers the inner water-stop tube at a position between a portion on the first portion side and a portion on the second portion side in the water-stop region in a state where the outer water-stop tube is heated and shrunk. |
| US09721698B2 |
Wire harness
A first electric wire is fastened, in a first frame, by a plurality of first wire hooking ribs provided on upper side edges of an upper thin plate, and by a plurality of second wire hooking ribs provided at lower thin plates, thereby being routed three-dimensionally. A second electric wire is fastened, in a second frame, by a plurality of third wire hooking ribs provided staggered along the upper side edges of the second frame, thereby being routed in a serpentine shape. With the electric wires routed and the second frame accommodated at a predetermined location in a housing space of the first frame, the first electric wire passes below the second electric wire at openings in the structure and passes above the second electric wire at connecting portions in the structure while passing on the connecting portions. |
| US09721696B2 |
Wire for deep water transmission
An electrically conductive wire for deep water transmission includes a first wire portion and a second wire portion. The first wire portion makes up one end of the wire, and is formed from a first metal. The second wire portion is formed from a second metal. The first metal has a higher ultimate tensile strength than the second metal. The first wire portion is used to support the weight of the second wire portion, thereby allowing the electrically conductive wire to be used in underwater or subsea power cables which may be freely suspended from their origin for providing electricity to electrical devices located in deep water or ultra-deep water. |
| US09721695B2 |
Thermoplastic molding composition
The thermoplastic molding composition comprises, based on the thermoplastic molding composition, a) at least one polyamide, copolyamide or a polyamide-comprising polymer blend as component A, b) from 0.1 to 10% by weight of carbon nanotubes, graphenes or mixtures thereof as component B, c) from 0.1 to 3% by weight of ionic liquids as component C, wherein the thermoplastic molding composition does not comprise any polyamide-12 units. |
| US09721692B2 |
System and method for generating electricity from radioactive isotopes
A system and method for generating electricity by combining a fuel core and a drive regulation and containment system, the fuel core having a plurality of radioactive isotopes disposed between a plurality of crystalline lattices, and the drive regulation and containment system having a plurality of electromagnets that concentrate charged particles generated in the fuel core from the plurality of radioactive isotopes, and an electric field generated by an electron flow initiation system for driving the charged particles through the fuel core to create a current flow. |
| US09721688B2 |
Lift-based up-ender and methods using same to manipulate a shipping container containing unirradiated nuclear fuel
A shipping container containing an unirradiated nuclear fuel assembly is lifted off the ground by operating a crane to raise a lifting tool comprising a winch. The lifting tool is connected with the shipping container by a rigging line connecting with the shipping container at a lifting point located on the shipping container between the top and bottom of the shipping container, and by winch cabling connecting with the shipping container at the top of the shipping container. The shipping container is reoriented by operating the winch to adjust the length of the winch cabling so as to rotate the shipping container about the lifting point. Shortening the winch cabling rotates the shipping container about the lifting point from a horizontal orientation to a vertical orientation, while lengthening the winch cabling rotates the shipping container about the lifting point from the vertical orientation to the horizontal orientation. |
| US09721686B2 |
Handoff methods and assemblies for refueling a nuclear reactor
Systems and methods for refueling a nuclear reactor that has a reactor core in a reactor pool having a plurality of elongated reactor core components, a fuel pool for storing core components, and a transfer channel connecting the fuel pool to the reactor pool. The method includes retrieving a replacement core component from the fuel pool, and securing the replacement core component in a first compartment of a handover assembly in a vertical position. The method also includes retrieving a spent core component from the reactor core, and securing the spent core component in a second compartment of the handover assembly in a vertical position. The replacement core component is retrieved from the first compartment and installed into the reactor core. The spent core component is retrieved from the second compartment and stored in a storage rack in the fuel pool. |
| US09721679B2 |
Nuclear fission reactor fuel assembly adapted to permit expansion of the nuclear fuel contained therein
A nuclear fission reactor fuel assembly adapted to permit expansion of the nuclear fuel contained therein. The fuel assembly comprises an enclosure having enclosure walls to sealingly enclose a nuclear fuel foam defining a plurality of interconnected open-cell voids or a plurality of closed-cell voids. The voids permit expansion of the foam toward the voids, which expansion may be due to heat generation and/or fission gas release. The voids shrink or reduce in volume as the foam expands. Pressure on the enclosure walls is substantially reduced because the foam expands toward and even into the voids rather than against the enclosure walls. Thus, the voids provide space into which the foam can expand. |
| US09721678B2 |
Nuclear fuel assembly design
A duct for a nuclear fuel assembly includes a tubular body and an elongated member. The tubular body has a sidewall with an inner face and an outer face and is configured to contain nuclear fuel within a fuel region. The elongated member extends from the outer face along at least a portion of the fuel region and has a contact surface configured to stabilize the duct during operation of the nuclear fuel assembly. |
| US09721677B2 |
Nuclear fission reactor, a vented nuclear fission fuel module, methods therefor, and a vented nuclear fission fuel module system
Illustrative embodiments provide a nuclear fission reactor, that includes a reactor vessel, a nuclear fission fuel element capable of generating a gaseous fission product, a valve body defining a plenum for receiving the gaseous fission product, and a valve in operative communication with the plenum for controllably venting the gaseous fission product from the plenum. |
| US09721676B2 |
Deposition of a protective coating including metal-containing and chromium-containing layers on zirconium alloy for nuclear power applications
The invention relates to compositions and methods for coating a zirconium alloy cladding of a fuel element for a nuclear water reactor. The coating includes a first tier or layer and a second tier or layer. The first layer includes an elemental metal and the second layer is an oxidation-resistant layer that includes elemental chromium. The first layer serves as an intermediate layer between the zirconium alloy substrate and the second layer. This intermediate layer can be effective to improve adhesion of the second layer to the zirconium alloy substrate. The multilayer coating forms a protective layer which provides improved capability for the zirconium alloy cladding to withstand normal and accident conditions to which it is exposed in the nuclear reactor. |
| US09721675B1 |
Memory device having input circuit and operating method of same
An input circuit of a memory device includes an input receiver to receive an input signal, a clock receiver to receive a clock signal, a data latch, an input signal delay path coupled to the input receiver and configured to provide a delayed internal input signal to the data latch, a first clock signal delay path coupled to the clock receiver and configured to provide a first delayed internal clock signal, a second clock signal delay path coupled to the input receiver and configured to provide a second delayed internal clock signal, and a multiplexer coupled to receive and select one of the first delayed internal clock signal and the second delayed internal clock signal in response to a test mode control signal, and to provide the selected signal to the data latch. |
| US09721673B1 |
Distributed current source/sink using inactive memory elements
A Multi-Time-Programmable-Memory (MTPM) array architecture, whose structure comprising of having Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) memory elements arranged in a set of twin-pairs coupled by wordlines (WLs), bitlines (BLs) and sourcelines (SLs). More specifically, the use of inactive portions of the MTPM array structure as substitutes for conventional BL write driver areas by utilizing a set of twin-pairs acting in parallel. These substituted twin-pair sets will improve programming efficiency (VGS) and retention (VDS) through a lowering Interconnect (IR) drop and VDS drops at the BL write driver. |
| US09721666B2 |
Memory system
A memory system includes a semiconductor memory device having memory cells arranged in rows and columns, and a controller configured to issue a write command with or without a partial page program command to the semiconductor memory device. The semiconductor memory device, in response to the write command issued without the partial page command, executes a first program operation on a page of memory cells and then a first verify operation on the memory cells of the page using a first verify voltage for all of the memory cells of the page, and in response to the write command issued with the partial page command, executes a second program operation on a subset of the memory cells of the page and then a second verify operation on the memory cells of the subset using one of several different second verify voltages corresponding to the subset. |
| US09721662B1 |
Non-volatile memory with efficient programming
A non-volatile memory system includes a plurality of NAND strings (or other arrangements) that form a monolithic three dimensional memory structure, bit lines, word lines, and one or more control circuits. Multiple NAND strings of the plurality of NAND strings have different select gates connected to different select lines. The multiple NAND strings are connected to a common bit line. The multiple NAND strings are connected to a common word line via their respective different select gates. The one or more control circuits concurrently program multiple memory cells on the multiple NAND strings. |
| US09721660B2 |
Configurable volatile memory without a dedicated power source for detecting a data save trigger condition
A volatile memory data save subsystem may include a coupling to a shared power source such as a chassis or rack battery, or generator. A data save trigger controller sends a data save command toward coupled volatile memory device(s) such as NVDIMMs and PCIe devices under specified conditions: a programmable amount of time passes without AC power, a voltage level drops below normal but is still sufficient to power the volatile memory device during a data save operation, the trigger controller is notified of an operating system shutdown command, or the trigger controller is notified of an explicit data save command without a system shutdown command. NVDIMMs can avoid reliance on dedicated supercapacitors and dedicated batteries. An NVDIMM may perform an asynchronous DRAM reset in response to the data save command. Voltage step downs may be coordinated among power supplies. After data is saved, power cycles and the system reboots. |
| US09721659B2 |
Memory device, method of controlling memory device, and memory system
A memory device according to an embodiment comprises a data processing circuit that includes: a data write pre-processing circuit that processes input data to generate first intermediate data; a data write processing circuit that sequentially sets a voltage difference between a selected row line and a selected global bit line based on the first intermediate data; a data read processing circuit that detects a current flowing in the selected global bit line or a voltage of the selected global bit line and sequentially generates second intermediate data from a result of that detection; and a data read post-processing circuit that processes the second intermediate data to generate output data, the data write pre-processing circuit and the data read post-processing circuit having a correcting function that corrects a difference that may occur between the input data and the output data. |
| US09721657B1 |
Managing threshold voltage shift in nonvolatile memory
Apparatus, systems, and methods to correct for threshold voltage drift in non-volatile memory devices are disclosed and described. In one example, a compensated demarcation voltage is generated by either a time-based drift compensation scheme or a disturb-based drift compensation scheme, and read and write operations to the non-volatile memory are carried out using the compensated voltage threshold. |
| US09721654B1 |
Memory device
A memory device according to one embodiment includes a first interconnection, a second interconnection, a charge storage portion provided between the first interconnection and the second interconnection, a tunnel film provided between the first interconnection and the charge storage portion, and a block film. the charge storage portion is capable of accumulating an electron. The tunnel film includes a fine particulate layer that including conductive fine particulates satisfying the Coulomb blockade condition, a first tunnel insulating layer provided between the first interconnection and the fine particulate layer, and a second tunnel insulating layer provided between the fine particulate layer and the charge storage portion. The block film is provided between the charge storage portion and the second interconnection. The block film has an energy structure in which no concave portion with an energy barrier lower than energy barriers on both sides thereof is present. |
| US09721645B1 |
SRAM arrays and methods of manufacturing same
An embodiment static random access memory (SRAM) array includes a first SRAM mini array having a first plurality of functional SRAM cells in a first column of the SRAM array. Each of the first plurality of functional SRAM cells share a first bit line (BL). The SRAM array further includes a second SRAM mini array having a second plurality of functional SRAM cells in the first column. Each of the second plurality of functional SRAM cells share a second BL independently controlled from the first BL. The SRAM array further includes and a SRAM dummy array between the first SRAM mini array and the second SRAM mini array. The SRAM dummy array includes a plurality of SRAM array abut dummy cells in the first column. A first endpoint of the first BL and a second endpoint of the second BL are disposed in the SRAM dummy array. |
| US09721637B2 |
Method of writing to a spin torque magnetic random access memory
A method for determining an optimized write pattern for low write error rate operation of a spin torque magnetic random access memory. The method provides a way to optimize the write error rate without affecting the memory speed. The method comprises one or more write pulses. The pulses may be independent in amplitude, duration and shape. Various exemplary embodiments adjust the write pattern based on the memory operating conditions, for example, operating temperature. |
| US09721630B2 |
Strobe acquisition and tracking
A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command in accordance with a determination that a time interval since a last read command issued by the memory controller exceeds a predetermined value. |
| US09721625B2 |
Time-constrained data copying between storage media
Time-constrained data copying between storage media is disclosed. When an electronic device is engaged in real-time operations, multiple data blocks may need to be copied from one storage medium to another storage medium within certain time constraints. In this regard, a data port is operatively controlled by a plurality of registers of a first register bank. The plurality of registers is copied from the first register bank to a second register bank within a temporal limit and while the data port remains under control of the plurality of registers being copied. By copying the plurality of registers within the temporal limit, it is possible to prevent operational interruption in the data port and reduce bandwidth overhead associated with the register copying operation. |
| US09721624B2 |
Memory with multiple write ports
A memory 2 includes a regular array of storage elements 4. A regular array of write multiplexers 8 is provided outside of the regular array of storage elements 4. The storage element pitch is matched to the write multiplexer pitch. The write multiplexers 10 support a plurality of write ports. When forming a memory design 2, a given instance of an array of write multiplexers 8 may be selected in dependence upon the desired number of write ports to support and this combined with a common form of storage element array 4. |
| US09721623B2 |
Memory apparatus using plurality of power sources and system including the same
A memory apparatus may include first to third pads to provide first to third voltages, respectively, to internal circuits. The first pad may receive a first external voltage, and provide the first voltage. The second and third pads may receive a second external voltage. The second pad may provide the second voltage, and the third pad may provide the third voltage. |
| US09721621B2 |
Semiconductor device
According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller. On the opposite side of the controller to the signal line, the multiple nonvolatile semiconductor memory elements are aligned along the longitudinal direction of the substrate. |
| US09721617B2 |
Adaptive media content recording
A media content processing system includes a receiver configured to receive a media content signal, associated with a media content instance, from a plurality of sources including a first source and a second source. The media content processing system further includes a processing device programmed to generate a first recorded segment that includes a portion of the media content instance received from the first source, determine a signal strength of the media content signal received from the first source, compare the signal strength to a predetermined level, request the media content signal from the second source if the signal strength is below the predetermined level, generate a second recorded segment that includes a portion of the media content instance received from the second source, and concatenate the second recorded segment to the first recorded segment. |
| US09721616B2 |
Playback of content pre-delivered to a user device
Systems and methods for displaying content pre-delivered to a user device, playing back content pre-delivered to a user device, and/or pre-delivering content to a user device during concurrent content playback, are described. In some embodiments, the systems and methods include or interact with a mobile application that displays descriptions of content available for playback via the mobile application along with indicators that represent a state of delivery (e.g., a state of pre-delivery) for the content items. |
| US09721613B2 |
Content management system, management content generation method, management content reproduction method, program and recording medium
In a content management system, a still image generation unit generates at least one piece of still image data based on moving image data. A still image selection unit causes a user to select one piece of still image data from among the generated at least one piece of still image data. A management marker registration unit registers the selected still image data or information based on the selected still image data as a management marker in association with the moving image data. An access key issuing unit issues an access key for accessing the moving image data. And a management image generation unit generates management image data including the still image data and the access key. |
| US09721611B2 |
System and method of generating video from video clips based on moments of interest within the video clips
Videos may be automatically generated using a set of video clip. Individual moments of interest may be identified within individual video clips of a set of video clips. A moment of interest may correspond to a point in time within a video clip. The point in time may be associated with one or more values of one or more attributes of the video clip. Individual moments of interest may be associated with individual portions of a video. The video may be generated using the set of video clips based on the associations. |
| US09721609B2 |
Image capturing apparatus, image capturing system, and control method for the image capturing apparatus
An image capturing apparatus comprises an image capturing unit that includes an image sensor that has an effective pixel region and a reference pixel region which outputs a reference signal for correcting an output signal of the effective pixel region. In a case where a predetermined condition is satisfied, a reduction unit reduces a data amount of reference pixel region data that corresponds to the reference pixel region in an image data obtained by the image capturing unit. A recording unit records the image data after the processing performed by the reduction unit. |
| US09721605B2 |
Magnetic tape and method of manufacturing the same
Provided is a magnetic tape, which comprises, on a nonmagnetic support, a nonmagnetic layer comprising nonmagnetic powder and binder, and on the nonmagnetic layer, a magnetic layer comprising ferromagnetic powder and binder; wherein at least the magnetic layer comprises one or more components selected from the group consisting of a fatty acid and a fatty acid amide; a quantity of components selected from the group consisting of a fatty acid and a fatty acid amide per unit area of the magnetic tape among components that are extracted from a surface on the magnetic layer side of the magnetic tape is less than or equal to 15.0 mg/m2, and a concentration of carbon, C, that is obtained by X-ray photoelectron spectroscopy conducted at a photoelectron take-off angle of 10 degrees on the surface on the magnetic layer side of the magnetic tape is greater than or equal to 50 atom %. |
| US09721601B2 |
Quasi-statically oriented, bi-directional tape recording head
A computer program product for orienting a head, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith that are readable/executable by a controller to cause the controller to determine a desired pitch for transducers of a magnetic head for reading and/or writing to a magnetic tape, and are readable/executable by the controller to cause the controller to cause a mechanism to orient the magnetic head towards first and second positions to achieve the desired pitch when the tape travels in first and second directions, respectively. Outer data transducers of the third array are about aligned with outer data transducers of the second array when the magnetic head is positioned towards the first position, and the outer data transducers of the third array are about aligned with outer data transducers of the first array when the magnetic head is positioned towards the second position. |
| US09721596B2 |
Data reader with resonant tunneling
A data reader may have an resonant tunnel structure disposed between first and second magnetic structures. The resonant tunnel structure can be configured with a spacer layer disposed between first and second barrier layers. The first barrier layer can have a first thickness that is smaller than a second thickness of the second barrier layers with the thicknesses each measured along a common plane to provide resonant tunneling for the data reader. |
| US09721595B1 |
Method for providing a storage device
A method for providing a storage device that includes a plurality of read sensor stacks for each reader of the storage device. The plurality of read sensor stacks are distributed along a down track direction and offset in a cross-track direction. A plurality of electronic lapping guides (ELGs) are provided for the read sensor stacks. The read sensor stacks are lapped. Lapping is terminated based on signal(s) from the ELG(s). |
| US09721592B1 |
Perpendicular magnetic recording head with trailing gap covering magnetic pole and side gaps and method of manufacturing same
This perpendicular magnetic recording head includes: a magnetic pole; a pair of side shields disposed to face each other with the magnetic pole interposed therebetween in a cross track direction; a pair of side gaps each provided between the magnetic pole and the pair of side shields; a trailing gap provided to cover the magnetic pole and the pair of side gaps, and having a first width in the cross track direction; and a first magnetic layer covering the trailing gap and having a second width larger than the first width in the cross track direction. |
| US09721589B2 |
Light source alignment
Implementations disclosed herein provide a method comprising emitting light at a plurality of locations across a surface of a recording head, detecting light output from a diffraction grating axis with a detector, and determining a target position for mounting a light source on the surface of the recording head by analyzing the detected light output corresponding to one or more of the plurality of locations. |
| US09721588B2 |
Magnetic recording system including differentiated write current emphasis signal generator circuit
A storage system includes a magnetic storage medium, a magnetic write head, a channel circuit and a preamplifier. The channel circuit includes a write data input, a differentiated edge emphasis signal generator, a write data output and a differentiated edge emphasis signal output. The preamplifier includes a write data input configured to receive write data from the channel circuit write data output, an edge emphasis signal input configured to receive a differentiated edge emphasis signal from the channel circuit differentiated edge emphasis signal output, and a write current edge emphasis controller configured to generate a write current to the magnetic write head based at least in part on the write data and on the differentiated edge emphasis signal. |
| US09721581B2 |
Method and device for mitigating wind noise in a speech signal generated at a microphone of the device
A mobile communication device and a method of mitigating wind noise in a speech signal generated at a microphone of the mobile communication device. A primary microphone of the mobile communication device receives speech and wind noise and generates a first speech signal based on the speech and the wind noise that is received. A secondary microphone of the mobile communication device receives attenuated speech and generates a second speech signal based on the attenuated speech that is received. The secondary microphone is shielded from the wind noise when the primary microphone receives speech and the wind noise. A processor of the mobile communication device processes the first speech signal to replace a low frequency portion of the first speech signal with the second speech signal in order to mitigate the wind noise in the first speech signal. |
| US09721580B2 |
Situation dependent transient suppression
Provided are methods and systems for providing situation-dependent transient noise suppression for audio signals. Different strategies (e.g., levels of aggressiveness) of transient suppression and signal restoration are applied to audio signals associated with participants in a video/audio conference depending on whether or not each participant is speaking (e.g., whether a voiced segment or an unvoiced/non-speech segment of audio is present). If no participants are speaking or there is an unvoiced/non-speech sound present, a more aggressive strategy for transient suppression and signal restoration is utilized. On the other hand, where voiced audio is detected (e.g., a participant is speaking), the methods and systems apply a softer, less aggressive suppression and restoration process. |
| US09721577B1 |
Complex exponential modulated filter bank for high frequency reconstruction or parametric stereo
An apparatus and method are disclosed for filtering and performing high frequency reconstruction of an audio signal. The apparatus includes an analysis filter bank, a phase shifter, a high frequency reconstructor, and a synthesis filter bank. The analysis filterbank receives real-valued time domain input audio samples and generates complex valued subband samples. The phase shifter shifts a phase of the complex-valued subband samples by an arbitrary amount. The high frequency reconstructor modifies at least some of the complex valued subband samples. A phase shifter unshifts a phase of the modified complex-valued subband samples by the arbitrary amount. The synthesis filter bank receives the modified complex valued subband samples and generates time domain output audio samples. The analysis filter bank comprises analysis filters that are complex exponential modulated versions of a prototype filter with an arbitrary phase shift. |
| US09721574B2 |
Concealing a lost audio frame by adjusting spectrum magnitude of a substitute audio frame based on a transient condition of a previously reconstructed audio signal
In accordance with an example embodiment of the present invention, disclosed is a method and an apparatus thereof for controlling a concealment method for a lost audio frame of a received audio signal. A method for a decoder of concealing a lost audio frame comprises detecting in a property of the previously received and reconstructed audio signal, or in a statistical property of observed frame losses, a condition for which the substitution of a lost frame provides relatively reduced quality. In case such a condition is detected, the concealment method is modified by selectively adjusting a phase or a spectrum magnitude of a substitution frame spectrum. |
| US09721565B2 |
Method for selecting interactive voice response modes using human voice detection analysis
In an interactive voice response system, a method is provided for selective enhancement of voice recognition capability during an interaction. The method includes the acts (a) taking a call and prompting for a voice response from the caller, (b) failing to recognize the response, (c) executing a routine to detect and isolate the captured word or phrase in the response, and (d) attempting to recognize the response a second time. |
| US09721561B2 |
Method and apparatus for speech recognition using neural networks with speaker adaptation
In a speech recognition system, deep neural networks (DNNs) are employed in phoneme recognition. While DNNs typically provide better phoneme recognition performance than other techniques, such as Gaussian mixture models (GMM), adapting a DNN to a particular speaker is a real challenge. According to at least one example embodiment, speech data and corresponding speaker data are both applied as input to a DNN. In response, the DNN generates a prediction of a phoneme based on the input speech data and the corresponding speaker data. The speaker data may be generated from the corresponding speech data. |
| US09721558B2 |
System and method for generating customized text-to-speech voices
A system and method are disclosed for generating customized text-to-speech voices for a particular application. The method comprises generating a custom text-to-speech voice by selecting a voice for generating a custom text-to-speech voice associated with a domain, collecting text data associated with the domain from a pre-existing text data source and using the collected text data, generating an in-domain inventory of synthesis speech units by selecting speech units appropriate to the domain via a search of a pre-existing inventory of synthesis speech units, or by recording the minimal inventory for a selected level of synthesis quality. The text-to-speech custom voice for the domain is generated utilizing the in-domain inventory of synthesis speech units. Active learning techniques may also be employed to identify problem phrases wherein only a few minutes of recorded data is necessary to deliver a high quality TTS custom voice. |
| US09721553B2 |
Sensor-based percussion device
Percussion devices are described employing sensor arrays based on piezoresistive materials. |
| US09721550B2 |
Ergonomic support and control pad for a stringed musical instrument
An instrument support adapted for placement between a musical instrument and a musician's body includes a flexible pad joined to a flexible flap. The instrument support has a roughly textured side for resting against a musician's clothing without slipping and a smoothly textured side for contacting the instrument. A transverse ridge extending from an approximately flat upper surface of the pad establishes an accurately repeatable position reference for playing the instrument and prevents the instrument from slipping from the pad. The smoothly textured top of the pad establishes close contact with a smooth surface on the instrument and may establish stiction or suction between the pad and the instrument. An end of the flap may optionally be tucked around a belt worn by a musician to hold the pad in a preferred position against the musician's chosen leg. Some embodiments include a belt clip attached the flap. |
| US09721548B1 |
Bass drum beater apparatus, bass drum pedal system, and methods of making and using the same
The present invention relates to a bass drum beater apparatus. Specifically, the bass drum beater apparatus comprises a beater head interconnected with a spring element that is, in turn, interconnected to a base element that is connected to a beater rod. A bass drum pedal system is further provided. Methods of making and using the same are further provided. |
| US09721547B2 |
Pedal device for electronic percussion instrument
A pedal device for an electronic percussion instrument is provided, wherein first and second detection means for detecting a rotation of a pedal by different methods are alternatively disposed in a base. The pedal has a pressing part on a lower surface side. The base includes a first portion located under the pressing part for supporting the first detection means, and a second portion located around the first portion for supporting the second detection means. The first portion supports the first detection means such that a first pressed part of the first detection means is disposed on a displacement trajectory of the pressing part that displaces with the rotation of the pedal, and the second portion disposes the second detection means such that a second pressed part of the second detection means is disposed on the displacement trajectory of the pressing part. |
| US09721541B2 |
Portable communication device for an advanced display
A portable communication device equipped with a screen and a random access memory. The device receives a data stream through a radio link for automatically displaying information from the data stream on a display screen, without any user's request, a part of this information being stored in random access memory during a period of time that is longer than the duration of display and displays information from the data stream on the display screen, upon user's request, this information being stored in random access memory during the duration of display only. |
| US09721540B2 |
Display device having scope of accreditation in cooperation with depth of virtual object and controlling method thereof
A display device having a scope of accreditation in cooperation with a depth of a virtual object and a controlling method thereof are disclosed in this specification. The display device according to this specification outputs a three-dimensional (3D) image including virtual objects. And a scope of accreditation accrediting (or recognizing) that a virtual object has been selected is configured in the virtual object. At this point, an area of a scope of accreditation may be configured to be in cooperation with a depth of a virtual object along an increasing or decreasing direction of the depth of the virtual object, wherein the depth of the virtual object indicates a distance level between the virtual object and a user's perspective within the 3D image. |
| US09721537B2 |
Motor vehicle display device
A motor vehicle display device is provided with information on vehicle operating states which can be displayed in an analog and/or digital manner by display elements, wherein in the direction of viewing of the motor vehicle display device, the display elements are disposed at least in two superimposed planes or plane regions. At least one first plane or one first plane region is provided, in which at least one active display element is disposed, and at least one further plane or one further plane region is provided, which is positioned before the first plane or the first plane region in a viewing direction, wherein only passive display elements are disposed therein, with at least one passive display element being disposed there. In this way the motor vehicle display device is given an appearance with a special 3D effect. |
| US09721535B2 |
Reducing energy consumption of a display
Embodiments disclosed herein provide systems, methods, and computer program product for managing power consumption of a display. An illumination area of the display may be adjusted to limit or increase a number of activated light emitting devices, and thus, adjust power consumption of the display. A device may receive an input to adjust the first illumination area to the second illumination area. In response, a device may, for example, disable a portion of the first illumination area not included in the second illumination area. In another example, a device may enable a portion of the second illumination area not included in the first illumination area. An amount of operation time and/or energy storage may be calculated, based at least in part on a resize of an illumination area of the display. |
| US09721534B2 |
Display apparatus and method for controlling backlight module thereof
A display apparatus and a method for controlling a backlight module thereof are provided. The display apparatus includes the backlight module, an input unit and a processing unit. A light-emitting device of the backlight module includes a first light-emitting unit and a second light-emitting unit. A photoelectric conversion efficiency of the first light-emitting unit is higher than that of the second light-emitting unit, and a covering color gamut of the second light-emitting unit is larger than that of the first light-emitting unit. The input unit generates an input signal. The processing unit is coupled to the input unit and configured to receive the input signal generated by the input unit, and the processing unit is coupled to the backlight module, and dynamically adjusts respective light intensity ratios of the first light-emitting unit and the second light-emitting unit according to the received input signal. |
| US09721533B2 |
Image compensating device and display device having the same
An image compensating device includes a transmission ratio calculator configured to output a red transmission ratio of a user's crystalline lens, a green transmission ratio of the crystalline lens, and a blue transmission ratio of the crystalline lens based on the user's age, and a compensator configured to receive red input data, green input data, and blue input data and compensate the red input data, the green input data, and the blue input data based on the red transmission ratio, the green transmission ratio, and the blue transmission ratio. |
| US09721531B2 |
Pixel arrangement structure, display device and display method
The disclosure provides a pixel arrangement structure, a display device and a display method. The pixel arrangement structure comprises at least one pixel unit arranged in parallel along the longitudinal direction, each pixel unit comprising first pixels and second pixels arranged alternately along the horizontal direction; each first pixel comprising a first sub-pixel and a second sub-pixel arranged in turn in a first row along the horizontal direction and a third sub-pixel in a second row along the horizontal direction; each second pixel comprising a third sub-pixel in the first row along the horizontal direction and a first sub-pixel and a second sub-pixel arranged in turn in the second row along the horizontal direction, sub-pixels located in the first row inclining towards a first direction, sub-pixels located in the second row inclining towards a second direction, wherein the first direction and the second direction are horizontally opposite. |
| US09721530B2 |
Method of displaying an image, display apparatus performing the same, method of calculating a correction value applied to the same and method of correcting grayscale data
A method of displaying an image on a display panel which comprises a plurality of pixels arranged as a matrix type includes measuring a tristimulus value of X, Y and Z values of a displayed image to generate a target curve, generating a corrected grayscale data of a red pixel, a green pixel and a blue pixel using X, Y and Z values of the target curve and converting the corrected grayscale data to a data voltage to provide a data line of the display panel with the data voltage. |
| US09721527B2 |
Electrochromic display panel, driving method thereof and display device
The embodiments of the present invention disclose an electrochromic display panel, a driving method thereof and a display device; the electrochromic display panel comprises: a first substrate and a second substrate arranged with box alignment; the first substrate being divided into a plurality of pixel units; a plurality of electrochromic strips made of a black electrochromic material are arranged in each pixel unit of the first substrate; a electrochromic layer made of the black electrochromic material is arranged on the second substrate; the black electrochromic material presents a transparent state when it is powered off, and presents a black state when it is powered on. The electrochromic display panel provided by the embodiment of the present invention realizes both color display and black display with one electrochromic material; compared with the prior art, the embodiment of the present invention has advantages of low cost, stable luminous efficiency and simple driving mode. |
| US09721526B2 |
Display driver with small-area level shift circuit
A level shift circuit includes first and second NMOS transistors that are coupled between a first supply terminal, and first and second output nodes, respectively, and have respective control terminals receiving input signals of a low amplitude, third and fourth PMOS transistors which are coupled between a second supply terminal, and the first and second output nodes outputting signals of high amplitude, respectively, a fifth PMOS transistor which is coupled between a gate of the third PMOS transistor and the second output node, and has a gate coupled to the first output node, a sixth PMOS transistor which is coupled between a gate of the fourth PMOS transistor and the first output node, and has a gate coupled to the second output node, and first and second load elements which are coupled between the second supply terminal and the gates of the third and fourth PMOS transistors, respectively. |
| US09721525B2 |
Display apparatus having a data driver operated in a power cut-off mode or a stand-by mode
A display apparatus includes a display panel configured to display an image, a data driver including a voltage generator configured to convert an image data applied thereto to a data voltage and a buffer configured to apply the data voltage to the display panel, a timing controller including a mode controller configured to generate a mode selection signal on the basis of an image frame rate of the image data. The data driver is configured to be operated in a power cut-off mode or a stand-by mode in response to the mode selection signal. The driving voltage switch is configured to cut off the analog driving voltage applied to at least one of the buffer and the voltage generator during the power cut-off mode and the bias controller is configured to reduce a bias current in the stand-by mode. |
| US09721522B2 |
Array substrate including a charge sharing unit, driving method thereof, and display device
An array substrate, a driving method thereof, and a display device are disclosed. The array substrate comprises a plurality of pixel units (11) defined by gate lines (110) and data lines (111) intersecting each other and a charge sharing unit (12). The charge sharing unit (12) is connected with at least two of the data lines (111). During a time period when a gate line (110) is not input with any scan signal for turning on pixel units (11), the charge sharing unit (12) electrically connects at least two data lines (111), to which it is connected, with each other. With this array substrate, the circuits for realizing charge sharing function is disposed in the driving unit for driving the display to display, thereby reducing costs of the driving unit and facilitating panellization of the driving unit. |
| US09721521B2 |
Gating control module transistor circuit for a gate driving method to switch between interlaced and progressive driving of the gate lines
The present disclosure discloses a gate driving method, a driving apparatus of a display panel and a display apparatus. The driving apparatus may be in two driving modes, i.e., a first mode and a second mode. In the first mode, due to a reduced number of gate lines to be driven when various frames of images are displayed, the power consumption can be reduced. In addition, due to the effect of persistence of vision of human eyes, better quality of display images can be ensured while reducing power consumption. In the second mode, as respective lines of gate lines are driven progressively when various frames of images are displayed, the display panel is enabled to have better quality of display images. By switching the driving apparatus between the first mode and second mode, a number of gate lines to be driven can be reduced so as to reduce power consumption. |
| US09721520B2 |
GOA circuit and a liquid crystal display
The application disclosure a GOA circuit and a liquid crystal display. The GOA circuit including a plurality of GOA unit connected in series, wherein a Nth level GOA unit including a fifth transistor, a eighth transistor and a leakage control module. wherein the leakage control module is connected in series between the Nth level gate terminal signal and the drain terminal of the eighth transistor and/or between the Nth level pull-down signal and the drain terminal of the fifth transistor; in the valid period of the Nth level scanning signal can block the Nth level gate terminal signal through the leakage pathway of the eighth transistor and/or to block the Nth level pull-down signal through the leakage pathway of the fifth transistor to achieve the stability of the GOA circuit. |
| US09721517B2 |
Display device
A display device according to the present disclosure includes a plurality of gate lines extending in a row direction, a plurality of data lines intersecting with the gate lines, the data lines extending in a column direction, a plurality of pixels connected to the gate lines and the data lines, and a data driving unit configured to output a plurality of data voltages to the pixels, wherein the data driving unit outputs the data voltages based on a first column inversion scheme and a second column inversion scheme to respective data lines along the column direction. |
| US09721516B2 |
Method of driving display panel and display device including the display panel
A method of driving a display panel and display device including the same are disclosed. In one aspect, the method comprises providing input image data, generating a gamma reference voltage, generating a data voltage based on the gamma reference voltage and input image data, providing the data voltage to the display panel, and determining whether the input image data represents a still image or a video image. The method further comprises substantially periodically and alternately generating first and second common voltages when the input image data represents the still image, and providing the first and second common voltages to the display panel. |
| US09721514B2 |
Method for driving reflective LCD panel
A method for driving a reflective LCD panel is provided. The driving method includes following steps: the reflective LCD panel is driven by a driving signal with alternate positive and negative polarities, wherein the driving signal has positive polarity for a first driving duration and the driving signal has negative polarity for a second driving duration; a color beam is provided to irradiate the reflective LCD panel during a partial time period of the first driving duration; and the color beam is provided to irradiate the reflective LCD panel during a partial time period of the second driving duration. |
| US09721511B2 |
Display device and control method thereof
A display device includes: a display unit including a plurality of pixels and a plurality of division areas; a data driver configured to apply a data signal corresponding to image data to the display unit, and to control a slew rate of the data signal, based on a bias voltage; and a bias controller configured to control the data driver so that the slew rate of the data signal is changed for each division area, based on a luminance variation of the image data corresponding to each of the division areas. |
| US09721499B2 |
Organic light emitting diode display including driving voltage line
An organic light emitting diode (OLED) display including a first pixel, a second pixel, and a third pixel disposed in a matrix and first to third driving voltage lines configured to transmit a driving voltage to the first to third pixel, respectively. A width of one driving voltage line among the first to third driving voltage lines is different from the width of the other driving voltage lines. |
| US09721492B2 |
Image display apparatus and method of controlling image display apparatus
An image display apparatus according to the present invention includes: an acquisition unit configured to acquire a size of a flat region on the basis of an input image, this flat region, from among regions of the input image, being a region in which a change in gradation value in a spatial direction of the image is small; and an image processing unit configured to perform unevenness reduction processing on the input image, this unevenness reduction processing reducing at least one of brightness unevenness and color unevenness of a screen at a higher reduction degree as the flat region is larger in size. |
| US09721489B2 |
Providing augmented reality based on third party information
A profile set by a particular user from a social network application may be used to determine a view provided by the mobile electronic device to a user of the mobile electronic device. The particular user in a captured video of the current view is detected and augmented in real time to mimic a virtual character in an augmented video. |
| US09721487B1 |
Vehicle emergency distress indicator
A distress indicia marker is provided for signaling a vehicle emergency situation. The marker includes an indicia flag, at least one vertical post element, and a securing device. The vertical post element provided to support the indicia flag at an upper end, and a number of vertical post may be interconnected. Each post element is formed as a linearly elongated member in which a receiving coupling is formed at an upper end and an attachment nipple is formed at the lower end. The securing device accepts an attachment nipple of a vertical post element. |
| US09721484B2 |
Shoulder kit assembly for crash test dummy
A shoulder kit assembly for a crash test dummy includes a spine interface member for attachment to a spine of the crash test dummy and a scapula for attachment to the spine interface member. The shoulder kit assembly includes a load cell for attachment to the spine interface member for measuring load in a plurality of axes on a shoulder joint and an upper arm assembly having an arm bone made of a plastic material for operative attachment to the scapula. In addition, the shoulder kit assembly also includes a two axis rotational shoulder joint, a relatively soft molded flesh around the plastic arm bone, and provisions for two accelerometers at the shoulder and at the neck T1 location. |
| US09721483B2 |
Medical treatment simulation devices
Medical treatment simulation devices are disclosed. One device includes an overlay, a tracheostomy structure, one or more tubes, at least one sensor, and at least one feedback device. The overlay is configured to be secured to a subject. The overlay is configured to cover at least a portion of a neck and upper torso of the subject. The tracheostomy structure is provided in a neck portion of the overlay. The one or more tubes are positioned within the overlay. The tubes are connected to the tracheostomy structure. The sensor is coupled to the tracheostomy structure and configured to detect a manipulation of the tracheostomy structure. The feedback device is coupled to the overlay. The feedback device is configured to provide feedback based on the manipulation detected by the at least one sensor. |
| US09721481B2 |
Hearing and speech impaired electronic device control
A sign language message may be derived from user movements detected proximate to an electronic device by comparing the movements to a database that includes data regarding one or more sign languages. A control function may then be identified which the electronic device may be caused to perform. Output related to the user's detected movements may be provided to the user. In some implementations, output specifying identified control functions may be transmitted to a presentation device. Further, in some implementations, if a sign language message and/or a control function cannot be unambiguously derived and/or identified, output promoting the user to provide additional information may be transmitted to a presentation device. Detected movements may be compared to data regarding multiple different sign languages and/or a subset of available multiple different sign languages. |
| US09721480B2 |
Augmented tutoring
An augmented tutoring system is provided that includes a simulation device, at least one sensor and a controller. The simulation device is adapted to provide a simulation that has an objective to accomplish by a student, wherein to achieve the objective a plurality of tasks must be correctly completed. The at least one sensor is adapted to monitor a cognitive state of the student while engaged with the simulation. The controller is adapted to process cognitive state information from the at least one sensor and to process student progress information relating to the completion of each of the tasks. The controller is further adapted to provide feedback to the student based at least in part on the processed cognitive state information and the processed task completion information. |
| US09721479B2 |
Apparatus, system and method for teaching music and other art forms
An apparatus, system and method are disclosed for teaching musical instruction. The invention disclosed includes providing music instruction based upon a student's ability and preferred most dynamic efficient method of learning. |
| US09721476B2 |
System and method for dynamic cognitive training
A method of visual cognitive training is performed at a device with a display. The method includes sequentially displaying a plurality of visual stimuli in a first region of a subject's field of view. While sequentially displaying the plurality of visual stimuli, the device moves the first region periodically along a predefined path within the subject's field of view. The device prompts the subject to respond to a task associated with the sequential display of the plurality of visual stimuli. The device receives a response to the task associated with the sequential display of the plurality of visual stimuli and records information corresponding to the subject's response to the task associated with the sequential display of the plurality of visual stimuli. |
| US09721473B2 |
Asset tracking system
An asset tracking system including a dispatching system and a movable object module. The dispatching system includes a processing device configured for controlling the dispatching system, a position information receiver configured for receiving position information associated with a movable object, a position data store configured for storing the position information, and a report module configured for reporting the position information to a first non-owning entity, wherein the report module includes a verification unit configured for receiving verification information corresponding to the first non-owning entity; and a position information reporter configured for, upon receipt of the verification information, providing the position information to the first non-owning entity, wherein the position information is inaccessible to a second non-owning entity lacking the verification information. The movable object module determines the position information corresponding to the movable object and transmits the position information to the position information receiver. |
| US09721470B2 |
Intelligent parking space identification and notification
An approach is provided in which an intelligent parking system receives a request from a driver of a vehicle for a parking space. The intelligent parking system identifies available parking spaces and selects a preferred parking space from the available parking spaces based upon comparing dynamic parking space properties corresponding to the available parking spaces to factors such as driver skill data corresponding to the driver or vehicle properties corresponding to the vehicle. In turn, the intelligent parking system notifies the driver of the preferred parking space. |
| US09721461B2 |
Method, apparatus and system for affirming alarm identity of video monitoring system
Disclosed are a method, an apparatus and a system for affirming alarm identity of a video monitoring system. The method comprises: detecting an alarm of front-end, and notifying a mobile phone signal detecting unit to collect mobile phone signal in correspondence with a monitoring area according to the detecting operation; analyzing the mobile phone signal, and sending an alarm affirming message to an analyzed mobile phone number; and selecting whether to cancel the alarm of front-end according to an acquired alarm affirming feedback message. The method for affirming alarm identity of the video monitoring system provided by the present invention can be actualized conveniently in the video monitoring system, and the reliability is high, wherein the referred correlative preset condition can be set flexibly, and the alarm accuracy of the video monitoring system is improved. |
| US09721456B2 |
Personal hazard detection system with redundant position registration and communication
A system for monitoring the safety of personnel on a work site, by providing workers on the site with portable battery powered safety monitors equipped with alarms, sensors to detect hazardous conditions, at least two forms of geo-location and two forms of voice and data telecommunication and two CPU's sharing the computation load, each CPU equipped to monitor and reset the other in case of failure to function, with each monitor capable of serving as a node in a mesh network and relaying information concerning alarms detected including location thereof to other monitors on the mesh network. |
| US09721455B1 |
Adaptive alarm
Embodiments include methods, systems and computer program products for creating event reminders on a computational system. Aspects include receiving an alarm system input, the alarm system input including an event identifier, an event time, and an event influencer. Aspects also include calculating an alarm time based upon the alarm system input. Aspects also include creating an alarm signal at the alarm time. Aspects also include outputting the alarm signal. |
| US09721452B2 |
Hand-wash management and compliance system
A method and apparatus for managing hand-washing compliance can include: sensing a user's hand-wash motions; estimating hand-wash scrubs per minute based on the user's hand-wash motions; counting a total hand-wash scrubs based on the user's hand-wash motions; estimating hand-wash vigor based on the user's hand-wash motions; calculating a hand-wash score based on the hand-wash vigor; displaying the hand-wash vigor, the total hand-wash scrubs, and the hand-wash scrubs per minute on a display; and displaying a timer that counts down based on the hand-wash vigor. |
| US09721450B2 |
Wearable repetitive behavior awareness device and method
The present invention relates generally to an awareness enhancement apparatus and method for undesirable repeated behaviors, including but not limited to obsessive compulsive and related disorders, and most relevant to trichotillomania (hair pulling), onychophagia (nail biting), dermatillomania (skin picking) and thumb sucking, among others. More particularly, the invention relates to a sensing and feedback device and associated methods of use which indicates a behavior based on the user's physical gestures and positioning of the hands, these gestures and positions being related to these undesirable behaviors typical of such disorders and alerting the user so that he or she can reduce the behavior. |
| US09721447B2 |
Display of rechargeable battery charge notification
A method can include receiving power level information for a device that includes a rechargeable battery and a display; determining a power level differential based at least in part on the power level information and historical information of the device; and rendering a power level differential notice to the display. |
| US09721446B1 |
Detecting allergens present in a product
A method, system and computer program product for detecting allergens present in a product. A tag (e.g., passive RFID tag) receives a query from the user of a computing device containing a list of allergens to determine if an allergen is present in the product (e.g., product for ingestion). Product information associated with the product in stored in secure memory (e.g., write-only memory) on the tag. The tag determines if an allergen to the user is present in the product using the list of allergens in the query as well as the product information associated with the product. The tag then notifies the user of the computing device regarding whether an allergen to the user is present in the product based on the determination. In this manner, allergens are detected in a product and made known to the user. |
| US09721445B2 |
Child monitoring bracelet/anklet
Methods and systems are described for tracking location using a home automation system. One method includes receiving sensor data indicating presence of a wearable tracking device in a predetermined area of a property monitored by the home automation system, confirming an identity of the tracking device, and generating a notice indicating a location of the tracking device. |
| US09721442B2 |
Emergency manager for a lighting device
An emergency manager for a lighting device (1), which lighting device is configured to transmit information by coding its output light. The emergency manager has a light coding unit (5), configured to code light emitted by a light emitter (3), thereby enabling the light emitter to emit a coded light signal including an individual identifier identifying the lighting device; an emergency indicator (7); and a control unit (9). The control unit is configured to control the light coding unit to adjust the coded light signal to increase a robustness of a transmission of the coded light signal upon receiving an emergency indication from the emergency indicator. |
| US09721427B2 |
System and method for positionally accurate gaming content
A system is disclosed for providing access to first interactive content or second interactive content by a user of a portable computing device based upon a determined location of the portable computing device. The system includes a host server, a content server storing data representing the first interactive content and the second interactive content, and a communication network in communication with the host server and the content server. One or more WiFi communication beacons are in communication with the host server through the communication network. The communication network is configured to establish communication with the portable computing device. The host server is configured to determine a location of the portable computing device from the communication of the portable computing device with the communication network using a combination of WiFi signals and Bluetooth signals. The host server configured to control the content server and enable the portable computing device to display the first interactive content when the portable computing device is determined to be in a first location and to display the second interactive content when the portable computing device is determined to be in a second location. |
| US09721425B2 |
Logistics methods for processing lottery and contest tickets with generic hardware
A lottery data transfer method for processing lottery ticket data piggybacks on a merchant's existing debit or credit card interchange system. A BIN is assigned to lottery tickets that is unique in the merchant's credit or debit card interchange, the BIN associated with a lottery data blob also provided on the lottery ticket. The lottery BIN and data blob are into the merchant's existing credit or debit card activation barcode protocol to initiate transfer of the lottery data to a central lottery site via the interchange. At a processor within the interchange, the unique lottery BIN is flagged to initiate special routing to and further processing of the lottery data blob at the lottery central site, wherein the lottery data blob is processed outside of the interchange's debit or credit card data transfer and processing procedures. |
| US09721422B2 |
Multiple game gaming machine
A gaming machine comprises a display and a game controller arranged to control images of symbols displayed on the display. The game controller is arranged to play a game wherein at least one random event is caused to be displayed on the display and, if a predefined winning event occurs, a prize is awarded. A plurality of sub-games constitute the game displayed on the display. As an initial display, fewer than a full set of images of each of the sub-games are displayed to show a partial outcome of the game, the fewer than the full set of images being representative of a determination of an expected value for each of the sub-games. |
| US09721420B2 |
Video switcher and touch router method for multi-layer displays
A gaming method for presenting both gaming content based video signals and secondary video signals over a multi-layer touch screen display using a multiple Display Manager system is disclosed. First and second display managers are configured to receive game content video signals from a gaming controller and secondary video signals from a secondary video source. The first display manager is in communication with a front layer of the touch screen display and the second display manager is in communication with a back layer of the touch screen display. The screen may be split between multiple signals, or one or more signals may overlay one or more background signals. The overlaid signals may completely obscure the background signals, or they may provide a level of transparency. A touch router device interprets touches at a touch screen shared display to transform coordinates to enable interpretation of the player's touch inputs. |
| US09721419B1 |
Vending machine for retaining and dispensing feminine hygiene products through a novel coin operating apparatus
A vending machine that dispense feminine hygiene products. Specifically, this invention is a coin-operated vending machine that dispenses sanitary napkins and tampons. This invention allows a user to purchase a feminine hygiene product by placing a coin or multiple coins in a slot within the vending machine and pressing a product release button. The product is then dispensed to the consumer. The apparatus also provides a mechanism for retrieving a coin in the event that the vending machine is out of a specific feminine hygiene. Further, in the free condition, this product dispenser has a time delay to prevent users from rapidly removing all of the products. |
| US09721416B2 |
Authentication apparatus and method
The present invention provides an authentication apparatus operative to determine the authenticity of a polymer film, comprising an optically-based birefringence measuring arrangement operative to measure a first effect influenced by a birefringence characteristic of said film from a first angle comprising a non-normal angle to a plane of said film, and at least one of: a second angle; and a third angle; and wherein said apparatus is operative to: compare a value, or range of values, representative of said first effect as measured from said first angle with a value, or range of values representative of a specified first effect corresponding to a predetermined birefringence characteristic of an authentic polymer film for said first angle; compare a value, or range of values, representative of said first effect as measured from said at least one of said second and third angles with a value, or range of values representative of a specified first effect corresponding to a predetermined birefringence characteristic of an authentic polymer film for respective second and/or third angles; and output an authenticity signal indicative of authenticity or otherwise of said film based upon said comparisons. There are also provided one or more methods of determining the authenticity of a polymer film. |
| US09721409B2 |
Biometrics for user identification in mobile health systems
A wearable device may include a sensor system capable of obtaining physiological from a user's body. Some wearable devices may include a substance delivery system. A sensor system of a wearable device may include at least one “bio-assurance sensor” capable of obtaining biometric data that may be used to identify a user. For example, the bio-assurance sensor may be used to ensure that the wearable device is not removed from the user's body and/or placed on or in another user's body. In some examples, the wearable device may be used with a second device, such as a smart phone, that includes at least one “authentication sensor,” such as a fingerprint sensor, that also may be used to identify a user. However, in some implementations the wearable device may include at least one authentication sensor. |
| US09721407B2 |
Method for tracking procedures performed on personal protection equipment and actions of individuals
A method for tracking procedures performed on personal protection equipment (PPE) and actions of individuals includes the following steps. An article of PPE configured with a smart tag is provided to an individual prior to performance of a task. After the individual performs the task, the article of PPE is processed. Information is retrieved from the smart tag during at least one of: before, during and after processing the article of PPE. After the performance of the task, the individual's data is read and the individual enters into a designated area. |
| US09721404B2 |
Apparatus for a security system of a vehicle
The invention relates to an apparatus (10) for a security system of a vehicle (1), in particular for a keyless activation of a locking mechanism of the vehicle (1), having a communication device (20) for communication with a mobile identification transmitter (100) by means of a radio signal (F) with a radio frequency (F.1), wherein an inductive charging process (L) can be carried out in the region of the vehicle (1) with a charging frequency (L.1), in particular for electrically charging an energy storage device.According to the invention the radio frequency (F.1) differs from the charging frequency (L.1) such that an interference in the communication with the mobile identification transmitter (100) can be prevented. |
| US09721401B2 |
Communication system and method for a rail vehicle consist
A rail vehicle consist may include a master unit and at least one trailing unit coupled to the master unit. The master unit may include a first processor in communication with a second processor of the at least one trailing unit. A power source may be disposed on the at least one trailing unit and may include a sensor associated with the second processor. A display may be disposed on the master unit and may be associated with the first processor to display characteristics monitored by the sensor wherein the display presents a message image, a warning image, and an isolate image. |
| US09721400B1 |
Detecting motor vehicle damage
A method and system for detecting motor vehicle damage is described which includes a sensor to detect damage to a motor vehicle component from a plurality of motor vehicle components. A network interface is provided to transmit an indication of the detected damage, the indication including an identifier associated with the damaged motor vehicle component. Also provided is a data store to store the indication of the detected damage. |
| US09721398B2 |
Mobile telemetry system
An automotive vehicle may include a processor configured to buffer records of vehicle information created at a scheduled acquisition rate, and to buffer event files of vehicle information created upon the occurrence of predetermined triggering events. The processor may be further configured to cause the buffered records to be wirelessly transmitted on a last-in first-out basis if a signal strength in a vicinity of the vehicle is greater than a first predetermined threshold, and to cause the buffered files to be wirelessly transmitted if the signal strength is greater than a second predetermined threshold. |
| US09721397B2 |
Automatic toll booth interaction with self-driving vehicles
A computer-implemented method, system, and/or computer program product enables automatic toll booth interaction with self-driving vehicles (SDVs). An SDV interrogation transceiver at a toll booth interrogates a driving mode module on an SDV. The SDV is capable of being operated in autonomous mode by an on-board SDV control processor. The driving mode module selectively controls the SDV to be operated in the autonomous mode or in manual mode, in which a human driver of the SDV manually operates the SDV. The SDV interrogation transceiver receives a driving mode descriptor of the SDV, which identifies whether the SDV currently is operating in the autonomous mode or in the manual mode while traveling on a toll road. An adjusted toll charge for the SDV to travel on the toll road is then transmitted based on the driving mode descriptor. |
| US09721395B2 |
Reprojection OLED display for augmented reality experiences
Methods for generating and displaying images associated with one or more virtual objects within an augmented reality environment at a frame rate that is greater than a rendering frame rate are described. The rendering frame rate may correspond with the minimum time to render images associated with a pose of a head-mounted display device (HMD). In some embodiments, the HMD may determine a predicted pose associated with a future position and orientation of the HMD, generate a pre-rendered image based on the predicted pose, determine an updated pose associated with the HMD subsequent to generating the pre-rendered image, generate an updated image based on the updated pose and the pre-rendered image, and display the updated image on the HMD. The updated image may be generated via a homographic transformation and/or a pixel offset adjustment of the pre-rendered image by circuitry within the display. |
| US09721387B2 |
Systems and methods for implementing augmented reality
A method implemented in a video playback system is described for incorporating augmented reality (AR) into a video stream. The method comprises determining a target pattern, determining an inner pattern in the target pattern, determining a relationship between the target pattern and the inner pattern, and receiving, by the video playback system, frames of the video stream. For each frame within the frame sequence, binarization is performed according to a predetermined threshold. Based on whether a location of the target pattern can be determined, a location of the inner pattern is determined. Based on the location of the inner pattern on received frames and the determined relationship between the target pattern and the inner pattern, a location of the target pattern is determined. The method further comprises displaying a virtual object with the target pattern on an output device based on the location of the target pattern. |
| US09721383B1 |
Predictive information for free space gesture control and communication
Free space machine interface and control can be facilitated by predictive entities useful in interpreting a control object's position and/or motion (including objects having one or more articulating members, i.e., humans and/or animals and/or machines). Predictive entities can be driven using motion information captured using image information or the equivalents. Predictive information can be improved applying techniques for correlating with information from observations. |
| US09721382B2 |
Portable globe creation for geographical information system
Portable globes may be provided for viewing regions of interest in a Geographical Information System (GIS). A method for providing a portable globe for a GIS may include determining one or more selected regions corresponding to a geographical region of a master globe. The method may further include organizing geospatial data from the master globe based on the selected region and creating the portable globe based on the geospatial data. The portable globe may be smaller in data size than the master globe. The method may include transmitting the portable globe to a local device that may render the selected region at a higher resolution than the remainder of the portable globe in the GIS. A system for providing a portable globe may include a selection module, a fusion module and a transmitter. A system for updating a portable globe may include a packet bundler and a globe cutter. |
| US09721379B2 |
Real-time simulation of fluoroscopic images
A method includes registering a first coordinate system of a fluoroscopic imaging system and a second coordinate system of a magnetic position tracking system. A three-dimensional (3D) map of an organ of a patient is computed using the magnetic position tracking system. A field-of-view (FOV) of the fluoroscopic imaging system in the second coordinate system is calculated using the registered first and second coordinate systems. Based on the 3D map and the calculated FOV, a two-dimensional (2D) image that simulates a fluoroscopic image that would be generated by the fluoroscopic imaging system is created, and the 2D image that simulates the fluoroscopic image is displayed. |
| US09721374B2 |
Chart animation
Chart animation control may be provided. Upon receiving a change to a displayed visualization comprising a plurality of data elements, a determination may be made as to whether to animate an update of the visualization according to the change to the displayed visualization. In response to determining to animate the update of the visualization according to the change to the data value, an animation of the update may be constructed and rendered and the updated visualization may be displayed. |
| US09721372B2 |
Text resizing within an embedded image
A computer receives user preferences. The computer receives a document, wherein the document includes an image. The computer determines that the image contains embedded text. The computer determines that the embedded text does not satisfy the received user preferences. The computer modifies the embedded text to satisfy user preferences. |
| US09721364B2 |
Polygon simplification
Polygons can be simplified from an original, higher resolution to a simplified, lower resolution such that the simplified versions of the polygons do not introduce errors and also do not render boundaries shared with other polygons invalid. |
| US09721363B2 |
Encoding polygon data for fast retrieval and rendering
An indexed list of vertices is generated to represent a polygon. The indexed list is ordered so as to define one or more boundaries of a polygon, where each element in the indexed list of vertices specifies respective coordinates in an at least two-dimensional space. A description of several component shapes that make up the polygon is generated, where the description includes indices into the indexed list of vertices. The indexed list of vertices and the description of the component shapes are provided to a computing device for rendering the polygon. |
| US09721359B2 |
Apparatus and method of decompressing rendering data and recording medium thereof
Provided is a decompression apparatus and method thereof for decompressing rendering data. The decompression apparatus includes a data parsing unit configured to acquire a control component and a texture component from compressed input data including rendering information of an object, a decompression controller configured to allocate the control component to a control unit, wherein the control unit extracts a control command from the control component, and a logic calculation unit configured to, based on the control command, restore texture data of the object from the texture component. |
| US09721357B2 |
Multi-aperture depth map using blur kernels and edges
The present disclosure overcomes the limitations of the prior art by using blurring of edges. For example, a first image may contain an edge and a second image may contain the same edge as the first image. The two images may be captured by imaging systems with blur characteristics that vary differently as a function of object depth. For example, a dual-aperture system may simultaneously capture a faster f-number visible image and a slower f-number infrared image. Depth information may be generated by comparing blurring of the same edge in the two images. |
| US09721353B2 |
Optical positional information detection apparatus and object association method
An optical positional information detection apparatus for detecting a position indicated by a pointer on a display surface. The optical positional information detection apparatus includes an imaging unit that captures an image of one or more pointers situated within a predetermined distance from the display surface; an image obtaining unit that obtains a first image captured by the imaging unit and a second image captured by the imaging unit; a movement distance calculation unit that uses a first feature amount based on the first image in which first pointers are captured and a second feature amount based on the second image in which second pointers are captured so that the movement distance calculation unit calculates a movement distance from the first pointers to the second pointers; and an association unit that associates the second pointers with the first pointers based on a limitation on the movement distance. |
| US09721352B1 |
Method and apparatus for computer vision analysis of cannon-launched artillery video
Systems and methods are provided to quantify the pitching and yawing motion of a projectile during ballistic flight using two camera/tracker video systems. Image processing tools are used to segment the shape of the projectile in each frame of a launch video, which allows the location and observed pitch angle to be calculated with sub-pixel accuracy. Subsequent automated analysis uses the history of the projectile location and the pitching behavior to calculate estimates for the epicyclic motion, as well as other ballistic parameters such as aeroballistic coefficients. Using two cameras located at different orthographic views of the line-of-fire (LOF) allows the pitching and yawing motion history of the projectile to be calculated in three dimensions (3D). In addition, input of the camera locations, cannon trunnion location, and the cannon pointing direction allows for automatic correction for camera misalignment. |
| US09721345B2 |
Method and device for generating at least one virtual image of a measurement object
The invention relates to a method and a device for generating at least one virtual image of a measurement object, in which a virtual position and/or a virtual orientation of the measurement object is determined and a virtual position and/or virtual orientation of at least one imaging or image recording device of a coordinate measuring machine is determined. The virtual image is generated on the basis of geometric data of the measurement object and on the basis of optical properties of the measurement object and the virtual image is additionally generated on the basis of imaging parameters of the imaging or image recording device. |
| US09721342B2 |
Systems and methods of monitoring waste
Systems, methods, and computer-readable media are disclosed for monitoring waste. Example methods may include monitoring a waste compartment of a waste container, the waste compartment configured to receive waste items, and determining a waste level of waste items in the waste compartment. Methods may include identifying a waste haul threshold indicative of a predetermined waste level at which a waste haul notification is triggered, determining that the waste level meets the waste haul threshold, and triggering the waste haul notification indicating that the waste container is to be emptied based at least in part on the waste level. |
| US09721341B2 |
Methods of obtaining geometry from images
In one aspect, a method of detecting at least on feature associated with a blood vessel in at least one image of at least one blood vessel using a matched filter adapted to respond to the at least one feature is provided. The method comprises applying a scale detection filter to selected voxels in the at least one image to determine a scale for the matched filter at each of the selected voxels, determining an orientation for the matched filter at each of the selected voxels, wherein determining the orientation is assisted by using the scale determined at each of the selected voxels, applying the matched filter at each of the selected voxels at the scale and the orientation determined at each of the selected voxels to obtain a filter response at each of the selected voxels, and analyzing the filter response at each of the selected voxels to determine if the respective voxel corresponds to the at least one feature. |
| US09721337B2 |
Detecting defects on a wafer using defect-specific information
Methods and systems for detecting defects on a wafer using defect-specific information are provided. One method includes acquiring information for a target on a wafer. The target includes a pattern of interest formed on the wafer and a known DOI occurring proximate to or in the pattern of interest. The information includes an image of the target on the wafer. The method also includes searching for target candidates on the wafer or another wafer. The target candidates include the pattern of interest. The target and target candidate locations are provided to defect detection. In addition, the method includes detecting the known DOI in the target candidates by identifying potential DOI locations in images of the target candidates and applying one or more detection parameters to images of the potential DOI locations. |
| US09721334B2 |
Work-piece defect inspection via optical images and CT images
A computer-implemented method, computer program product, and system for detecting work-piece defects. The computer-implemented method may include: receiving a first image of a training work-piece captured using a non-destructive imaging process and a second image of the training work-piece captured using a destructive imaging process; receiving an image of a work-piece captured using a non-destructive imaging process, wherein the work-piece is substantially similar to the training work-piece, and the non-destructive imaging process used to capture the work-piece is substantially similar to the non-destructive imaging process used to capture the training work-piece; matching the image of the work-piece to the first image of the training work-piece; and enhancing the image of the work-piece using the second image of the training work-piece, in response to the image of the work-piece matching the first image of the training work-piece. |
| US09721333B2 |
Methods and systems for estimation of additive noise
Aspects of the present invention are related to systems and methods for estimation of additive noise in an image or in a video sequence. An additive-noise estimate may be computed based on a first significant peak in a histogram of standard-deviation values of patches of an image-channel image associated with an input image. |
| US09721330B2 |
Temporal noise reduction method for noisy image and related apparatus
Determining of still/movement may be performed with reference to quantization noise of a first section to which a first pixel belongs, and for different results of determining of whether the first pixel is in a movement area or a still area, different frame difference thresholds applicable to the movement area and the still area are separately set, and different frame difference calculation manners are used, different blending coefficients applicable to the movement area and the still area are selected according to the different frame difference thresholds applicable to the movement area and the still area and the frame difference calculation manners, and a noise reduction blending manner is selected according to the different blending coefficients applicable to the movement area and the still area, the frame difference calculation manners, and a pixel value of the first pixel in a current frame. |
| US09721327B2 |
Method for automatically adjusting a picture according to contents of the picture at terminal equipment
A method for automatically adjusting a picture right according to contents of the picture at terminal equipment is provided, including the following steps: analyzing the picture, extracting information from the picture; calculating information to obtain weight, respectively calculating the sum of information weight in each of four directions; comparing sums of information weight of the four directions to obtain the direction with the maximum weight; and adjusting the picture in the direction with the maximum weight. The method judges the direction in which the picture should be adjusted according to contents of the picture itself, avoiding manual adjustment to the picture. |
| US09721326B2 |
Method and system for improving resolution in laser imaging microscopy
A method and a system for obtaining a high-resolution image of a volume of a sample using laser imaging are provided. The method includes a step of probing the volume of the sample with a first excitation beam having an intensity profile of maximum intensity at a center thereof, thereby obtaining a positive image of the volume. The method also includes a step of probing the volume of the sample with a second excitation beam having an intensity profile of minimum intensity at a center thereof and defining a peripheral region of maximum intensity around the center, thereby obtaining a negative image of the volume. The method finally includes a step of subtracting the negative image from the positive image, thereby obtaining the high-resolution image of the volume of the sample. Advantageously, embodiments of the invention can be probe- and fluorescence-independent, and be conveniently retrofitted into existing laser imaging systems. |
| US09721322B2 |
Selective utilization of graphics processing unit (GPU) based acceleration in database management
A method for the selective utilization of graphics processing unit (GPU) acceleration of database queries in database management is provided. The method includes receiving a database query in a database management system executing in memory of a host computing system. The method also includes estimating a time to complete processing of one or more operations of the database query using GPU accelerated computing in a GPU and also a time to complete processing of the operations using central processor unit (CPU) sequential computing of a CPU. Finally, the method includes routing the operations for processing using GPU accelerated computing if the estimated time to complete processing of the operations using GPU accelerated computing is less than an estimated time to complete processing of the operations using CPU sequential computing, but otherwise routing the operations for processing using CPU sequential computing. |
| US09721314B2 |
Apportioning shared financial expenses
A determination can be made that a first user is available for a card-less payment transaction with a merchant restaurant. Data describing a booking for a shared financial expense to be incurred at the merchant restaurant can be obtained. The data can describe a second user participating in the group transaction. A total amount due for the shared financial expense can be obtained. A determination can be made that the second user is contributing to the shared financial expense. A respective electronic bill for the first and second users can be generated. Each respective electronic bill can be for an apportioned amount due for the shared financial expense. Data describing the respective electronic bill for the apportioned amount due for the shared financial expense can be sent to the first and second users. |
| US09721308B2 |
Evaluating the influence of offline assets using social networking resources
Techniques are disclosed for using social networking resources to evaluate the influence of offline marketing assets. In certain embodiments data posted to a social network is analyzed to identify references to a particular marketer and/or a particular brand. Where such reference is identified, geographic location data associated with the posted data is stored in a database. As this location data is aggregated over a period of time, it can be cross-referenced with location data corresponding to offline marketing assets that belong to the particular marketer and/or that are otherwise associated with the particular brand. Offline marketing assets that geographically correspond to a cluster of social networking activity can be understood as wielding influence within social networks and being capable of generating valuable word-of-mouth. |
| US09721306B2 |
Data linkage support system and data linkage support method
A data linkage support system is disclosed that includes a storage device storing a process object table and a specification table, and an arithmetic device that displays a screen including display of a data item prescribed by specification information of the specification table and an item selection interface accepting selection of a corresponding data item in the process object table to be correlated with the data item and that correlates the corresponding data item selected in the item selection interface with the data item prescribed by the specification information to generate and store a conversion parameter of accounting data between the consolidated subsidiary company and the parent company into the storage device. |
| US09721302B2 |
Server for real-time accident documentation and claim submission
An server that facilitates efficient and convenient processing of an insurance claim. The claim processing application can receive text, image, and audio data associated with the insurance claim. Using the received data, a model of the user's vehicle and the scene of the accident are generated and displayed on the user's mobile device. Damaged portions of the user's vehicle can be identified automatically or by the user. Damage can be tagged using the mobile device and additional data can be provided by the user and associated with each tag. The server's claim processing application can be used to provide a preliminary claim assessment, submit a completed insurance claim application to an insurance provider, and/or process the insurance claim. |
| US09721300B2 |
Systems and methods for financial optimization using portfolio calibration
Investment portfolios undergo a calibration procedure to improve their efficiency and stability. Any set of portfolios could be selected for calibration. If said portfolios represent a result of a portfolio optimization or asset allocation, then using original model inputs, an optimization procedure is performed to compute an original efficient frontier and a set of frontier portfolios is selected for calibration. A plurality of random samples of modified optimization inputs based on the original inputs is generated. For each random sample of inputs a modified efficient frontier is computed using the portfolio optimization model with modified inputs. Each portfolio selected for calibration is projected on the modified efficient frontier to create a corresponding modified calibration portfolio. Calibrated portfolio is created by averaging its calibrations. Calibrated efficient frontier is created by averaging all calibration portfolios for each selected portfolio on the original frontier. |
| US09721295B1 |
Forecasting supply chain components
Disclosed are various embodiments for generating an interface for communication of at least one supply chain associated with an order that comprises forecast completion times for components of the at least one supply chain. The interface includes nodes that are associated with components of the at least one supply chain. The nodes within the interface are linked, wherein each link connects two of the nodes and indicates a relationship between the corresponding components of the at least one supply chain. The nodes and the links are arranged into a rooted tree within the interface, wherein the rooted tree represents the organization of the components of the at least one supply chain. |
| US09721294B1 |
Apparatus and method for evaluating and presenting supply chain condition of an enterprise
The present application is directed to, among other things, a computer-automated method of presenting data relating to a supply chain. The method may include using stored parts data of the enterprise, including content of a bill of materials for at least one of a product or a group of products, and, for each part in the bill of materials and a list of approved sources for such part, risk data associated therewith. The method may include using stored supplier data. The method may include computing supply chain data, including at least one of revenue impact and risk score, corresponding to the at least one of the product and the group of products, of the enterprise, wherein the data is aggregated according to geographic region. The method may include serving graphical information wherein the computed supply chain data is represented on a map on the basis of geographic region. |
| US09721292B2 |
System and method for image quality scoring
A system receives images of objects. The system identifies a category for each of the objects, and extracts features from the images. The features relate to a quality of the image. The features of the images are stored in a database according to the category of each object, such that each set of features is associated with its corresponding image. The system displays the images on a network-based publication system, and receives data relating to the displayed images. The data is analyzed, and the images are ranked as a function of the analysis. The system redisplays the images on the network-based publication system as a function of the ranking of the images. |
| US09721291B1 |
Identifying effective images associated with items
Disclosed are various embodiments for identifying a best or most effective image associated with an item. A user interface is generated that includes the item as well as one of a plurality of images associated with the item. Interactions associated with the item are monitored and an image score is adjusted based upon whether these interactions are positive are negative. The process can be repeated over a large sample size. A highest scored image is designated as the most effective image at achieving a particular result. |
| US09721287B2 |
Method and system for interacting with a user in an experimental environment
A method and system for provides a user with an ability to capture a sample of an experiential environment and deliver that sample to an interactive service to trigger one or more predetermined events. In exemplary embodiments of the invention such triggered events include the delivery of information and services to the user, the execution of tasks and instructions by the service on the user's behalf, communication events; surveillance events and other control-oriented events that are responsive to the user's wishes. In other exemplary embodiments of the invention, the triggered events include transaction-oriented events, entertainment events, and events associated with enhancements to human ability or function. |
| US09721285B2 |
Facilitation of authorized in-store pickup in conjunction with online ordering
Technologies are described herein for the facilitation of authorized in-store pickup in conjunction with online ordering. A request to process an order of an item selected by a customer and placed through a website may be received. The website may be transformed to a cart fulfillment web page including a fulfillment interface. Through the fulfillment interface, a selection of an option for in-store pickup by a third party may be received from the customer. Through the fulfillment interface, identifying information regarding the third party, pickup details associated with the in-store pickup of the item by the third party, and a preferred notification method for contacting the third party may also be received from the customer. An authorization pickup record related to the in-store pickup of the item by the third party may be generated. The authorization pickup record may be transmitted to the third party via the preferred notification method. |
| US09721284B1 |
System and method for facilitating a game through a primary client device and in-game content purchases through a mobile device
The disclosure relates to systems and methods for communicating a primary display comprising information that facilitates visual presentation of a view of a game space to a primary client device and facilitating purchases of content for use in the game through a secondary client device such as a user's smartphone. The system may include a game device that allows a user to play a video game or otherwise interact with a virtual environment using the primary client device and purchase content for use in the video game using a secondary client device while playing the video game using the primary client device. The purchased content may be integrated into the game space such that purchased content is available for use while the user is playing the video game. |
| US09721283B2 |
Location based transactions
A user's location is determined by location information communicated by a user device, such as a smart phone. Merchants near the user location are determined and selected. Merchant payment information is transmitted to the user device so that the user can easily make a payment to the merchant through the user device. Merchant offerings may also be sent to the user device for purchase and subsequent payment, where the merchant offerings may be specifically selected for the user. |
| US09721282B2 |
Merchant verification of in-person electronic transactions
Validation data, such as an image selected by a merchant, is rendered on a mobile device of a customer to provide the merchant confirmation that payment for an item submitted through the mobile device of the customer was in fact received by the merchant. The merchant may establish an account on a network-accessible computing device (e.g., in the “cloud”) that includes the validation data. The customer authorizes payment to the merchant from the mobile device using the network connectivity of the mobile device. When the payment is received by the merchant, the network-accessible computing device sends the validation data to the customer's mobile device. The merchant may be confident that he or she has in fact received an electronic payment from the customer when the validation data is presented on the mobile device. Techniques to prevent reuse and copying of the validation data are also discussed. |
| US09721272B2 |
Determining advertisement channel mixture ratios
Methods, systems, and apparatus, including computer program products, for determining a mixture ratio for allocating portions of an advertising budget among different advertising channels (e.g., print, online, radio, television) to optimize a performance measure, such as cost-per-action. A mixture space is used to define the available advertising channels and any constraints placed on those channels, such as no more than fifty percent of the advertising budget being allocated to a particular channel, and test mixture ratios are selected according to an optimality criterion. The selected test mixture ratios are used during a testing period on live traffic. The performance measures from the test mixture ratios are used to select a preferred mixture ratio from the mixture space. |
| US09721268B2 |
Providing offers associated with payment credentials authenticated in a specific digital wallet
Embodiments of the invention are directed to systems, methods and computer program products for providing supplemental account information in digital wallets. An exemplary apparatus is configured to: receive a request to provide a digital wallet on a user's mobile device, authenticate at least one payment credential for use within the digital wallet; receive access to an application programming interface configured to push offers to digital wallets, wherein the application programming interface is associated with at least one database maintained by the digital wallet provider; receive, via the application programming interface one or more offers from the at least one database, wherein the offers include at least one incentive for processing payments using the at least one payment credential associated with the digital wallet; and present, to the user on a display of the mobile device, the one or more offers. |
| US09721266B2 |
System and method for capturing information for conversion into actionable sales leads
The present invention relates to business-to-business marketing organizations who participate in lead-generation activities via their company website. More particularly, the invention provides a target lead-generation system and method that targets the right businesses using real-time predictive and behavioral analytics and website traffic data and connects businesses to potential customers and suppliers to drive business revenue. Even more particularly, the invention provides a system and method for real-time searching and matching of data input into website registration forms by website visitors, provides for real-time cleansing and appending of attribute rich company demographic and firmographic data to the website form and to the marketing database. The resulting information is then available for use by other systems such as marketing automation systems and CRM systems. |
| US09721265B2 |
Systems and methods for generating adaptive surveys and review prose
Systems and methods are provided for generating adaptive surveys including questions and answer options selectable by users, and human-readable review prose based on answers to the questions. The survey may be related to an assessment of a business, and may be transmitted to a user electronic device. The generated survey may include one or more questions with selectable answer options. The selection of the answer options can be received from the user electronic device, and be used to generate the prose for the review. The user and/or the business may edit the prose and/or modify the intensity of the generated review. Tree data structures may be utilized to generate the questions of the survey, to store the answers, and generate the sentences of the review. Analytic data may be generated based on the selected answer options, which can be used to assess and influence marketing and business efforts. |
| US09721262B2 |
Systems and methods for providing time-sensitive communications of targeted advertisements to mobile devices
Systems and methods of the present invention facilitate the sale of products, such as goods and/or services. Specifically, merchants of products provide incentives for consumers that may be defined by time and geography to drives sales of the products, such as during low demand periods. Moreover, the present invention allows consumers to search for and claim time-sensitive incentives from merchants; specifically, incentives requiring instant or nearly instant acceptance and/or redeemability. |
| US09721260B2 |
Method and apparatus for marking manufactured items
A method and apparatus includes providing a cryptographic key, in an inactive state, to a point in a supply chain for manufactured items, providing the cryptographic key, in an active state, and an activation code for activating the cryptographic key, to a verification center, and providing the activation code to the point in the supply chain in response to the point in the supply chain transmitting information relating to the received cryptographic key. The method includes generating, at the point in the supply chain, an identification (ID) code for each manufactured item, derived from the cryptographic key in the active state and a dynamic key generated for each batch of manufactured items. Including providing the dynamic key for each batch of manufactured items to the verification center, marking each manufactured item with the ID code, and counting the actual or correct number of ID codes marked on the manufactured items. |
| US09721257B2 |
Virtual photorealistic digital actor system for remote service of customers
A system for remote servicing of customers includes an interactive display unit at the customer location providing two-way audio/visual communication with a remote service/sales agent, wherein communication inputted by the agent is delivered to customers via a virtual Digital Actor on the display. The system also provides for remote customer service using physical mannequins with interactive capability having two-way audio visual communication ability with the remote agent, wherein communication inputted by the remote service or sales agent is delivered to customers using the physical mannequin. A web solution integrates the virtual Digital Actor system into a business website. A smart phone solution provides the remote service to customers via an App. In another embodiment, the Digital Actor is instead displayed as a 3D hologram. The Digital Actor is also used in an e-learning solution, in a movie studio suite, and as a presenter on TV, online, or other broadcasting applications. |
| US09721249B2 |
Tokenization in mobile environments
Data can be protected in mobile and payment environments through various tokenization operations. A mobile device can tokenize communication data based on device information and session information associated with the mobile device. A payment terminal can tokenize payment information received at the payment terminal during a transaction based on transaction information associated with the transaction. Payment data tokenized first a first set of token tables and according to a first set of tokenization parameters by a first payment entity can be detokenized or re-tokenized with a second set of token tables and according to a second set of tokenization parameters. Payment information can be tokenized and sent to a mobile device as a token card based on one or more selected use rules, and a user can request a transaction based on the token card. The transaction can be authorized if the transaction satisfies the selected use rules. |
| US09721248B2 |
ATM token cash withdrawal
Embodiments of the invention are directed to a system for managing financial tokens associated with a financial account, whereby the system is directed towards generating and authenticating tokens associated with the financial account in order to grant access to a user to conduct financial transactions on the financial account using an Automated Teller Machine (ATM). The system is configured to generate a server token that is associated with at least one financial account; communicate, to a first mobile device, a server packet comprising at least the server token; receive, from an ATM, a security packet communicated from a second mobile device to the ATM comprising at least a device token; authenticate the device token, the authentication comprising comparing the device token with the server token, thereby resulting in a successful authentication of the device token; and communicate the successful authentication to the ATM. |