最新美国发明专利第2017-08-01期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09722290B2	Electrical energy store A storage cell has an air electrode, connected to an air supply device, and a storage device. Channels for receiving a storage medium rest on the storage electrode. In addition, partition walls for partitioning off the channels with respect to one another are provided. The partition walls have a recess in the region of the storage electrode. This recess serves the purpose of spacing apart the storage medium from the storage electrode.
US09722286B2	Battery pack and method of controlling an electric fan in the battery pack A battery pack is provided. The battery pack includes first and second temperature sensors that are disposed in first and second interior spaces, respectively. The first temperature sensor generates a first signal indicative of a first temperature level of the battery cell. The second temperature sensor generates a second signal indicative of a second temperature level of the DC-DC voltage converter. The battery pack further includes a microprocessor that determines a first fan speed percentage value of the electric fan based on the first temperature level, and a second fan speed percentage value of the electric fan based on the second temperature level. The microprocessor selects the first fan speed percentage value if the first fan speed percentage value is greater than the second fan speed percentage value.
US09722281B2	Processes for preparing 1-alkyl-3-alkyl-pyridinium bromide and uses thereof as additives in electrochemical cells The invention relates to the use of at least one 1-alkyl-3-alkyl-pyridinium halide, in particular 1-alkyl-3-methyl-pyridinium bromide, as an additive in bromine-generating electrochemical cells, such as zinc/bromine cells. Processes for preparing 1-alkyl-3-methyl-pyridinium bromide and concentrated aqueous solutions comprising same for use as additives in the aforementioned cells, are also disclosed.
US09722280B2	Acrylonitrile derivatives as additive for electrolytes in lithium ion batteries An electrolyte composition (A) containing (i) at least one aprotic organic solvent; (ii) at least one conducting salt; (iii) at least one compound of formula (NC)(A1X1)C═C(X2A2)(CN) wherein X1 and X2 are independently from each other selected from N(R′), P(R1), O, and S, and A1 and A2 are selected from H or organic substituents; and electrochemical cells containing electrolyte composition (A).
US09722279B2	All-solid-state metal-metal battery comprising ion conducting ceramic as electrolyte An all-solid-state metal-metal battery with both high energy density and high power density is provided. The battery has an anolyte including at least one active anode metal ion conducting ceramic solid and a catholyte including at least one active cathode metal ion conducting ceramic solid sandwiched between an anode including an alkali metal or an alkaline earth metal as the active anode metal and an cathode including a transition metal as the active cathode metal. Prior to the initial charge, the battery may have an anode current collector devoid of the active anode metal or a cathode current collector devoid of the active cathode metal.
US09722278B2	Method for producing a lithium-based electrolyte for a solid microbattery A method for producing a solid lithium-based electrolyte for a solid microbattery implements the cathode sputtering of a lithium-based target material on an object supported by a substrate holder. A grid made of lithium-free electrically conductive material is interposed between the object and the lithium-based target material, the grid being electrically connected to the substrate holder.
US09722277B2	Electrolyte for batteries with regenerative solid electrolyte interface An energy storage device comprising: an anode; and a solute-containing electrolyte composition wherein the solute concentration in the electrolyte composition is sufficiently high to form a regenerative solid electrolyte interface layer on a surface of the anode only during charging of the energy storage device, wherein the regenerative layer comprises at least one solute or solvated solute from the electrolyte composition.
US09722272B2	Additives for zinc-bromine membraneless flow cells The invention relates to the use of nitrogen-containing compounds belonging to the classes of N-alkyl pyridinium halide, N-alkyl-2-alkyl pyridinium halide and 1-alkyl-3-alkyl imidazolium halide, as additives in electrolyte solutions for zinc bromine membraneless flow cells. The invention also provides electrolyte solutions comprising such additives and processes for operating said cells.
US09722271B2	Polymer electrolyte membrane, membrane electrode assembly and fuel cell including the same A polymer electrolyte membrane includes a fluorinated polymer membrane and a coating layer including a hydrocarbon-based ionomer on at least one surface of the fluorinated polymer membrane. The polymer electrolyte membrane maintains high hydrogen ion conductivity and has improved performance under high temperature and low humidity conditions. A membrane electrode assembly and a fuel cell including the polymer electrolyte membrane are also disclosed.
US09722267B2	Module level redundancy for fuel cell systems This disclosure relates to module level redundancy for fuel cell systems. A monitoring component monitors a set of operational parameters for a fuel cell group. The fuel cell group includes a set of fuel cell units, each having a set of fuel cell stacks. The fuel cell stacks include a set of gas powered fuel cells that convert air and fuel into electricity using a chemical reaction. The monitoring component determines that the set of operational parameters do not satisfy a set of operational criteria, and, in response, a load balancing component adjusts the electrical output capacity of the set of fuel cell units included in the fuel cell group.
US09722257B2	Method of enhancing electrodes One embodiment includes a method of forming a hydrophilic particle containing electrode including providing a catalyst; providing hydrophilic particles suspended in a liquid to form a liquid suspension; contacting said catalyst with said liquid suspension; and, drying said liquid suspension contacting said catalyst to leave said hydrophilic particles attached to said catalyst.
US09722255B2	Catalyst layer assembly A reinforced catalyst layer assembly, suitably for use in a fuel cell, said reinforced catalyst layer assembly comprising: (i) a planar reinforcing component consisting of a porous material having pores extending through the thickness of the material in the z-direction, and (ii) a first catalyst component comprising a first catalyst material and a first ion-conducting material, characterized in that the first catalyst component is at least partially embedded within the planar reinforcing component, forming a first catalyst layer having a first surface and a second surface is disclosed.
US09722254B2	Graphene application in battery This disclosure relates to a battery and a method for its manufacture. The method of manufacture may include forming a cathode layer proximate to a cathode current collector. The method further includes forming an electrolyte layer proximate to the cathode layer and an anode layer proximate to the electrolyte layer. The method additionally includes forming an anode current collector layer proximate to the anode layer. At least one of the cathode current collector layer or the anode current collector layer includes a plurality of graphene monolayers. The method yet further includes determining a stepped arrangement of the graphene monolayers; and patterning at least a portion of the plurality of graphene monolayers according to the stepped arrangement.
US09722249B2	Use of conductive polymers in battery electrodes Described are a composition at least comprising complexes of polythiophene and polyanions, at least one lithium-containing compound, and at least one solvent, wherein the composition comprises less than 1 g of a material comprising elemental carbon, based on 1 g of the polythiophenes, or comprises no material at all comprising elemental carbon, and a process for the preparation of a composition, the composition obtainable by this process, the use of a composition and a cathode in an Li ion accumulator.
US09722248B2	Electrode formulations comprising graphenes Disclosed herein are cathode formulations comprising graphenes. One embodiment provides a cathode formulation comprising an electroactive material, and graphene interspersed with the electroactive material, wherein a ratio of (mean electroactive material domain size)/(mean graphene lateral domain size) ranges from 3:2 to 15:1. Also disclosed are cathodes comprising such materials and methods of making such cathodes.
US09722246B2	Method of preparing inorganic particles and inorganic particles prepared using the same Disclosed is a method of preparing inorganic particles using a hydrothermal synthesis device, including introducing a precursor liquid or slurry stream including a reaction precursor for preparation of an inorganic material into a hydrothermal synthesis reactor, introducing a supercritical liquid stream including water into the hydrothermal synthesis reactor, preparing an inorganic slurry by hydrothermal reaction in the hydrothermal synthesis reactor and discharging the inorganic slurry therefrom, and filtering the discharged inorganic slurry, wherein the precursor liquid or slurry stream includes an NH3 source at a high temperature of the supercritical liquid stream and thus clogging of the stream in the hydrothermal synthesis reactor is inhibited by pH changes in the hydrothermal reaction.
US09722244B2	Positive electrode material for lithium-ion battery A compound of formula Li4+xMnM1aM2bOc wherein: M1 is selected from the group consisting in Ni, Mn, Co, Fe and a mixture thereof; M2 is selected from the group consisting in Si, Ti, Mo, B, Al and a mixture thereof; with: −1.2≦x≦3; 0
US09722241B2	Positive active material for rechargeable lithium battery, method of preparing same, and rechargeable lithium battery including same A positive active material for a rechargeable lithium battery includes a core including an overlithiated oxide represented by Chemical Formula 1, a first coating layer on the core and including a compound having a spinel structure, and a second coating layer on the first coating layer and including a compound represented by Chemical Formula 2. The compound having a spinel structure shows a peak between about 2.6 V and about 2.7 V in a graph of differential capacity dQ/dV vs. voltage, where the voltage is between about 4.7 V and about 2.5 V. In Chemical Formula 1, 0
US09722240B2	Electrode materials derived from polyquinonic ionic compounds and their use in electrochemical generators The present invention is concerned with novel compounds derived from polyquinonic ionic compounds and their use in electrochemical generators.
US09722239B2	Negative electrode According to one embodiment, there is provided a negative electrode. The negative electrode includes a negative electrode layer. The negative electrode layer contains a titanium composite oxide and a carboxymethyl-cellulose compound. The carboxymethyl-cellulose has a degree of etherification of 1 or more and 2 or less. The negative electrode layer has a density of 2.2 g/cm3 or more.
US09722238B2	Battery pack Provided is battery pack, including a plurality of battery cells that and a case covering the plurality of battery cells, wherein at least one drainage hole is formed on a bottom of the lower case, that includes a first region and a second region, the first region being a region from an inner surface to a predetermined depth in a thickness direction of the bottom of the lower case and the second region being a region from where the first region ends to an outer surface from the thickness direction of the bottom of the lower case, wherein the first region includes a first tiling portion formed tilted such that the drainage hole becomes smaller, grooves formed at regular intervals along a circumference of the drainage hole from where the first tilting portion ends to the outer surface of the bottom of the lower case and a foreign substance blocking portion formed on a same plane as the outer surface of the lower case.
US09722236B2	Apparatus and method for use in storing energy Some embodiments provide energy storage systems that comprise: a first electrode; a second electrode; an electrolyte; the first electrode, the second electrode and the electrolyte are positioned such that the electrolyte is in contact with at least the first electrode; and a polarity reversal system electrically coupled with the first electrode and the second electrode, wherein the polarity reversal system is configured to allow the energy storage system to operate while a first polarity to charge and discharge electrical energy while operating in the first polarity, and the polarity reversal system is configured to reverse the voltage polarity across the first and second electrodes to a second polarity to allow the energy storage system to continue to operate while the second polarity is established across the first electrode and the second electrode to continue to charge and discharge electrical energy while operating in the second polarity.
US09722231B2	Bladed fuse connectors for use in a vehicle battery module A battery system having a bladed fuse connector and a method of operation of the bladed fuse connector are provided. The system may, in certain embodiments, include a printed circuit board (PCB) and a high current interconnect. The high current interconnect may be mounted to and extending upward from the PCB. The battery system may also include a fuse. The fuse may limit an amount of current flowing through the battery system. Additionally, the battery system may include a bladed fuse connector coupled between the high current interconnect and the fuse. The bladed fuse connector may carry a current between the high current interconnect and the fuse. To that end, the bladed fuse connector may include an S-shaped bend between the high current interconnect and the fuse.
US09722229B2	Electric vehicle battery attachment assembly and method An example method of connecting an electric vehicle battery includes welding a landing of a terminal to a bus bar, and pressing a landing of the terminal and the bus bar against one another during the welding. The landing is along a first plane and a base of the terminal is along a second plane that is spaced from the first plane.
US09722223B1	Battery pack retention assembly and method An exemplary battery pack retention assembly includes a bracket, a protrusion configured to transition from a disengaged position with the bracket to an engaged position with the bracket in response to movement of a battery pack enclosure relative to a portion of vehicle.
US09722222B2	Battery module A battery module includes a plurality of battery cells, a holder, and a bus-bar. The plurality of battery cells are arranged along one direction, and each of the plurality of battery cells includes a terminal and a vent at an upper surface. The holder is on the plurality of battery cells and has an opening through which the terminal is exposed. The bus-bar is has a portion in the opening of the holder and electrically couples adjacent ones of the plurality of battery cells. The holder includes a bus-bar fastening portion at an area corresponding to the terminal and an exhaust portion at an area corresponding to the vent. The bus-bar fastening portion and the exhaust portion are integrally formed.
US09722221B2	Battery cell having frame and method for manufacturing the same Provided are a battery cell for a secondary battery and a method for manufacturing the same, and more particularly, a battery cell having a frame, the frame protecting the battery cell.
US09722220B2	Element for mounting a battery in a winding tube of a home-automation screen Element (12) for holding a power supply device (5) for supplying power to an actuator (4) for controlling a movable screen (3), the actuator causing a drive shaft to rotate, the holding element comprising a body (120) provided with a hole (125) for receiving at least part of the power supply device and a longitudinal slit (126) on at least part of the body.
US09722214B2	OLED panel, method for fabricating the same, screen printing plate, display device The present invention provides an OLED panel and a method for fabricating the same, a screen printing plate, and a display device. The method comprises: forming an OLED mother board, wherein supporting adhesive is formed between an upper base plate and a lower base plate of the OLED mother board, and said supporting adhesive is located below a cutting line; and cutting said OLED mother board along said cutting line to obtain OLED panels. In the fabricating method of the present invention, when the OLED mother board is cut by a cutter wheel, the upper and lower base plate of the OLED mother board is subject to small deformation due to support of the supporting adhesive. As a result, travelling accuracy of the cutter wheel is improved, the distance between the cutting line and packaging adhesive is greatly reduced, and the frame width of the fabricated OLED panel is far less than that of an OLED panel fabricated by a conventional method.
US09722212B2	Lighting device, light-emitting device, and manufacturing method and manufacturing apparatus thereof The sizes of an evaporation mask used for a full-color light-emitting device and an evaporation mask used for a lighting device are different from each other. For this reason, separate evaporation masks are necessary, and in the case of processing a large number of substrates at once, many evaporation masks are prepared in accordance with the number of substrates to be processed, thereby increasing the total footprint of a manufacturing apparatus. One object of the present invention is to solve a problem of such an increase. A full-color display device can be manufactured by using a color filter and white light-emitting elements in combination. By this manner, a manufacturing line for the light-emitting device can have some steps in common with a manufacturing line for the lighting device; consequently, the total footprint of the manufacturing apparatus is reduced.
US09722199B2	Organic light emitting display device An organic light emitting display device comprises first and second electrodes facing each other on a substrate; and three emission portions arranged between the first electrode and the second electrode, wherein at least one among the three emission portions includes two emitting layers, and the first, second and third emission portions being collectively configured as a TOL-FESE (Thickness of Organic Layers between the First Electrode and the Second Electrode) structure in which thicknesses of organic layers between the first electrode and the second electrode are different from one another, each organic layer having a specified thickness that provides the organic light emitting display device having the TOL-FESE structure with improved red efficiency or blue efficiency and minimized color shift rate with respect to a viewing angle, when compared to an organic light emitting display device that lacks the TOL-FESE structure.
US09722197B2	Inverted organic electronic device and method for manufacturing the same Disclosed is a method for manufacturing an inverted organic electronic device. The method includes preparing a substrate having a first electrode; depositing a mixture of a cathode interface material and a photo active material onto the first electrode to form a bilayer or composite layer of a cathode interface layer and a photo active layer, followed by forming an anode interface layer on the bilayer or composite layer; and forming a second electrode on the anode interface layer. According to the present invention, it is possible to achieve simplification of a manufacturing process of an inverted organic electronic device and to provide an inverted organic electronic device having excellent performance by forming a cathode interface layer in the form of a uniform and pinhole-free thin film.
US09722191B2	Organic light-emitting device An organic light-emitting device including a first electrode; a second electrode facing the first electrode; and an organic layer between the first electrode and the second electrode, the organic layer including an emission layer, wherein the organic layer includes at least one organometallic compound represented by Formula 1, below, and at least one condensed cyclic compound represented by Formula 40, below:
US09722190B2	Use of square planar transition metal complexes as dopant The present invention relates to the use of a square planar transition metal complex as dopant, charge injection layer, electrode material or storage material.
US09722185B2	Heterocyclic compound and organic light-emitting device including the same A heterocyclic compound and an organic light-emitting device including the heterocyclic compound, the heterocyclic compound being represented by Formula 1 below:
US09722179B2	Transition metal oxide resistive switching device with doped buffer region A resistive switching memory comprising a first electrode and a second electrode; an active resistive switching region between the first electrode and the second electrode, the resistive switching region comprising a transition metal oxide and a dopant comprising a ligand, the dopant having a first concentration; a first buffer region between the first electrode and the resistive switching material, the first buffer region comprising the transition metal oxide and the dopant, wherein the dopant has a second concentration that is greater than the first concentration. In one embodiment, the second concentration is twice the first concentration. In one embodiment, the first buffer region is thicker than the active resistive switching region.
US09722178B2	Resistive memory having confined filament formation Resistive memory having confined filament formation is described herein. One or more method embodiments include forming an opening in a stack having a silicon material and an oxide material on the silicon material, and forming an oxide material in the opening adjacent the silicon material, wherein the oxide material formed in the opening confines filament formation in the resistive memory cell to an are enclosed by the oxide material formed in the opening.
US09722174B1	Low dielectric constant interlayer dielectrics in spin torque magnetoresistive devices By manufacturing magnetoresistive devices using low-k dielectric materials as the inter-layer dielectrics and higher-k dielectric materials for hard masks and encapsulation, the overall dielectric constant characteristics of the magnetoresistive devices can be kept lower, thereby decreasing capacitance and allowing for higher speed operations. Elimination or reduction of residual higher-k dielectric material through stripping or other processes minimizes “islands” of higher-k dielectric material that can detract from overall dielectric constant performance. One or more masking and one or more etching steps can be used to form the devices either with or without the additional stripping of the higher-k material.
US09722173B2	Memory device According to one embodiment, a memory device includes a stacked body and a controller. The stacked body includes a first magnetic layer, a second magnetic layer stacked with the first magnetic layer, and a first nonmagnetic layer provided between the first magnetic layer and the second ferromagnetic layer. The second ferromagnetic layer includes a first portion and a second portion stacked with the first portion. The controller causes a current to flow in the stacked body in a programming period. The programming period includes a first and a second period. The current has a first value in the first period and a second value in the second period. The second value is less than the first value.
US09722172B2	Electronic device and method for fabricating the same This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes an interlayer dielectric layer formed over a substrate and having a hole; a conductive pattern filled in the hole and having a top surface located at a level substantially same as a top surface of the interlayer dielectric layer; and an MTJ (Magnetic Tunnel Junction) structure formed over the conductive pattern to be coupled to the conductive pattern and including a free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer, wherein an upper portion of the conductive pattern includes a first amorphous region.
US09722171B2	Piezoelectric material, piezoelectric element, and electronic apparatus The present invention provides a lead-free piezoelectric material having a high piezoelectric constant and a high mechanical quality factor in a wide operating temperature range. The piezoelectric material includes a perovskite-type metal oxide represented by Formula (1): (Ba1-xCax)a(Ti1-yZry)O3 (1.00≦a≦1.01, 0.125≦x<0.155, and 0.041≦y≦0.074) as a main component. The metal oxide contains Mn in a content of 0.12 parts by weight or more and 0.40 parts by weight or less based on 100 parts by weight of the metal oxide on a metal basis.
US09722167B2	Piezoelectric vibration piece and piezoelectric vibration device using same A piezoelectric vibration piece has an inverted mesa-type structure, comprising a thinned portion serving as a vibration region at a central part of a piezoelectric plate; and a thickened portion formed all along or partly along perimeter of the thinned portion to reinforce the thinned portion. In the piezoelectric vibration piece, contact metals including a large number of discrete metallic thin films are provided on the whole surfaces of the piezoelectric plate. A piezoelectric vibration device comprises the piezoelectric vibration piece which is housed in a package, wherein extraction electrodes of the piezoelectric vibration piece are connected to internal terminals of the package through a conductive adhesive. These structural and technical advantages prevent undesirable flowage of the conductive adhesive before thermal curing. As a result, the piezoelectric vibration piece and the piezoelectric vibration device comprising the same successfully attain excellent vibration characteristics.
US09722166B2	Tunnel-effect power converter A tunnel-effect power converter including first and second electrodes having opposite surfaces, wherein the first electrode includes protrusions extending towards the second electrode.
US09722165B2	Thermoelectric pixel for temperature sensing, temperature control and thermal energy harvesting A thermoelectric pixel includes a micro-platform and a device layer having one or more support layers suspended at a perimeter thereof. The pixel includes structures which reduce thermal conductivity and improve platform planarity. In embodiments providing an infrared sensor, carbon nanotubes are used to enhance infrared absorption into the sensor pixel. In other embodiments, the pixel provides a thermoelectric energy harvester.
US09722161B2	P-n separation metal fill for flip chip LEDs A light emitting diode (LED) structure has semiconductor layers, including a p-type layer, an active layer, and an n-type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface through which light is emitted. Portions of the p-type layer and active layer are etched away to expose the n-type layer. The surface of the LED is patterned with a photoresist, and copper is plated over the exposed surfaces to form p and n electrodes electrically contacting their respective semiconductor layers. There is a gap between the n and p electrodes. To provide mechanical support of the semiconductor layers between the gap, a dielectric layer is formed in the gap followed by filling the gap with a metal. The metal is patterned to form stud bumps that substantially cover the bottom surface of the LED die, but do not short the electrodes. The substantially uniform coverage supports the semiconductor layer during subsequent process steps.
US09722159B2	Optoelectronic component with a pre-oriented molecule configuration and method for producing an optoelectronic component with a pre-oriented molecule configuration An optoelectronic component includes a substrate, a connecting element applied on the substrate and a layer sequence that emits electromagnetic radiation. The layer sequence is applied on the connecting element. The connecting element includes at least one connecting material that has an oriented molecular configuration. The connecting element has at least one parameter that is anisotropic.
US09722155B2	LED light source package Provided is a LED light source package comprising a circuit board, a light source seated on an upper portion of the circuit board, and a lens structure arranged on the upper portion of the circuit board via the light source. A surface that faces the light source in the lens structure includes a first inclined surface that projects toward the light source as going to a center portion of the lens structure.
US09722152B2	Light emitting device comprising releasable wavelength converter This disclosure provides a lighting device which comprises a support structure comprising a locking mechanism, a light source arranged in contact with the support structure, a wavelength converter configured to convert light from a first wavelength range to a second wavelength range, the wavelength converter having a light entrance surface configured to receive light and a light exit surface configured to emit light. The wavelength converter is releasably connected to the support structure in a locked position via said locking mechanism, and the light entrance surface is arranged in optical contact with the light source.
US09722151B2	Quantum dots (QD) glass cells, and the manufacturing methods and applications thereof A QD glass cell includes a glass cell and QD fluorescent powder material. The glass cell includes a receiving chamber, and the QD fluorescent powder being encapsulated within the receiving chamber. A manufacturing method of the QD glass cell includes: S101: manufacturing a glass cell comprising a receiving chamber, and the glass cell comprising an injection port transmitting fluid into the receiving chamber; S102: manufacturing fluid QD fluorescent powder material; S103: filling the fluid QD fluorescent powder material into the receiving chamber via the injection port; S104: applying a curing process to the fluid QD fluorescent powder material within the receiving chamber; and S105: sealing the injection port by hot melting to obtain the QD glass cell. In addition, the above QD glass cell may be applied to LED light source.
US09722150B2	Illumination method and light-emitting device To provide an illumination method and a light-emitting device which are capable of achieving, under an indoor illumination environment where illuminance is around 5000 lx or lower when performing detailed work and generally around 1500 lx or lower, a color appearance or an object appearance as perceived by a person, will be as natural, vivid, highly visible, and comfortable as though perceived outdoors in a high-illuminance environment, regardless of scores of various color rendition metric. Light emitted from the light-emitting device illuminates an object such that light measured at a position of the object satisfies specific requirements. A feature of the light-emitting device is that light emitted by the light-emitting device in a main radiant direction satisfies specific requirements.
US09722149B2	Light emitting device and fabricating method thereof A light-emitting device includes a light-emitting element for emitting primary light, and a wavelength conversion unit for absorbing part of the primary light and emitting secondary light having a wavelength longer than that of the primary light, wherein the wavelength conversion unit includes plural kinds of phosphors having light absorption characteristics different from each other, and then at least one kind of phosphor among the plural kinds of phosphors has an absorption characteristic that can absorb the secondary light emitted from at least another kind of phosphor among the plural kinds of phosphors.
US09722148B2	Luminescent ceramic for a light emitting device A semiconductor light emitting device comprising a light emitting layer disposed between an n-type region and a p-type region is combined with a ceramic layer which is disposed in a path of light emitted by the light emitting layer. The ceramic layer is composed of or includes a wavelength converting material such as a phosphor. Luminescent ceramic layers according to embodiments of the invention may be more robust and less sensitive to temperature than prior art phosphor layers. In addition, luminescent ceramics may exhibit less scattering and may therefore increase the conversion efficiency over prior art phosphor layers.
US09722143B2	Semiconductor light-emitting device According to one embodiment, the p-side electrode is provided on the second semiconductor layer. The insulating film is provided on the p-side electrode. The n-side electrode includes a first portion, a second portion, and a third portion. The first portion is provided on a side face of the first semiconductor layer. The second portion is provided in the first n-side region. The third portion overlaps the p-side electrode via the insulating film and connects the first portion and the second portion to each other.
US09722142B2	Light emitting diode die and manufacturing method thereof An LED die includes a substrate, a pre-growth layer, a first insulating layer and a light emitting structure. The pre-growth layer, the first insulating layer and the light emitting structure are formed on the structure that order. The substrate includes a first electrode, a second electrode and an insulating part. The insulating part is formed between the first electrode and the second electrode. The LED die further includes a second insulating layer and a metal layer which are formed around the pre-growth layer. The present disclosure includes a method for manufacturing the LED die.
US09722140B2	Optoelectronic semiconductor chip comprising a multi-quantum well comprising at least one high barrier layer An optoelectronic semiconductor chip includes a p-type semiconductor region, an n-type semiconductor region, and an active layer embodied as a multi-quantum well structure arranged between the p-type semiconductor region and the n-type semiconductor region. The multi-quantum well structure includes a plurality of alternating quantum well layers and barrier layers. At least one barrier layer, which is arranged closer to the p-type semiconductor region than to the n-type semiconductor region, is a high barrier layer that has an electronic band gap that is greater than an electronic band gap of the remaining barrier layers.
US09722138B2	Separating a wafer of light emitting devices Embodiments of the invention are directed to a method of separating a wafer of light emitting devices. The method includes scribing a first groove on a dicing street on the wafer and checking the alignment of the wafer using a location of the first groove relative to a feature on the wafer. After checking the alignment, a second groove is scribed on the dicing street.
US09722136B2	Optoelectronic semiconductor chip and method for producing optoelectronic semiconductor chips An optoelectronic semiconductor chip has a semiconductor body and a substrate on which the semiconductor body is disposed. The semiconductor body has an active region disposed between a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type. The first semiconductor layer is disposed on the side of the active region facing the substrate. The first semiconductor layer is electrically conductively connected to a first termination layer that is disposed between the substrate and the semiconductor body. An encapsulation layer is disposed between the first termination layer and the substrate and, in plan view of the semiconductor chip, projects at least in some regions over a side face which delimits the semiconductor body.
US09722134B1	Method for transferring semiconductor structure A method for transferring a semiconductor structure is provided. The method includes: coating an adhesive layer onto a carrier substrate; disposing the semiconductor structure onto the adhesive layer, such that the adhesive layer temporarily adheres the semiconductor structure, in which the adhesive layer includes an adhesive component and a surfactant component therein after the disposing; irradiating the electromagnetic wave to the adhesive layer through the carrier substrate to reduce adhesion pressure of the adhesive layer to the semiconductor structure while remaining the semiconductor structure within a predictable position, in which the semiconductor structure has a rejection band or is completely opaque, the carrier substrate has a pass band, and the pass band of the carrier substrate and the rejection band of the semiconductor structure overlaps; and transferring the semiconductor structure from the adhesive layer to a receiving substrate structure after the adhesion pressure of the adhesive layer is reduced.
US09722131B2	Highly doped layer for tunnel junctions in solar cells A highly doped layer for interconnecting tunnel junctions in multijunction solar cells is presented. The highly doped layer is a delta doped layer in one or both layers of a tunnel diode junction used to connect two or more p-on-n or n-on-p solar cells in a multijunction solar cell. A delta doped layer is made by interrupting the epitaxial growth of one of the layers of the tunnel diode, depositing a delta dopant at a concentration substantially greater than the concentration used in growing the layer of the tunnel diode, and then continuing to epitaxially grow the remaining tunnel diode.
US09722130B2	Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.
US09722128B2	Solar power system and solar panel installation method [Problem] To provide a solar power system and a solar panel installation method with which, by using a positioning configuration which is not prone to visible vertical misalignment while preserving sunlight lighting efficiency in the positioning of a plurality of solar panels, solar panel installation is easy, and which is suitable to installing a large solar power system on a hill, in wetlands, etc. [Solution] A solar power system comprises a solar panel group (2) in which a plurality of vertically oriented rectangular solar panels (21) are inclined in the same direction, either left or right, at a prescribed angle of inclination (theta), and the lighting faces (22) of each of the solar panels (21) are arrayed in the same plane.
US09722121B2	Nanostructured units formed inside a silicon material and the manufacturing process to perform them therein The invention bears on elementary nanoscale units nanostructured-formed inside a silicon material and the manufacturing process to implement them. Each elementary nanoscale unit is created by means of a limited displacement of two Si atoms outside a crystal elementary unit. A localized nanoscale transformation of the crystalline matter gets an unusual functionality by focusing in it a specific physical effect as is a highly useful additional set of electron energy levels that is optimized for the solar spectrum conversion to electricity. An adjusted energy set allows a low-energy secondary electron generation in a semiconductor, preferentially silicon, material for use especially in very-high efficiency all-silicon light-to-electricity converters. The manufacturing process to create such transformations in a semiconductor material bases on a local energy deposition like ion implantation or electron (γ,X) beam irradiation and suitable thermal treatment and is industrially easily available.
US09722118B2	Application of the encapsulant to a back-contact back-sheet A method for the production of a photovoltaic module comprising back-contact solar cells. A lower encapsulating layer, followed by an alignment and an application of the lower encapsulating layer to the inner surface of the back-contact back-sheet. The lower encapsulating layer, comprises a lower surface facing the back-contact back-sheet and an upper surface opposite the lower surface. The method includes adhesion of one or more predetermined portions of the lower surface of the encapsulating layer to the back-contact back-sheet, having each portion a predetermined superficial area which is lower than the total area of the lower surface of the lower encapsulating layer. The adhesion of the lower encapsulating layer is followed by the application of the lower encapsulating layer to the back-contact back-sheet.
US09722117B1	Method for manufacturing crystalline silicon solar cell modules The disclosure relates to solar cell, and especially to a method for manufacturing a crystalline silicon solar cell module. The method includes: a) providing a solar cell module to be laminated, including a back plate, a first bonding layer, a crystalline silicon solar cell component, a second bonding layer and a top plate in contact in sequence, where the crystalline silicon solar cell component is a crystalline silicon solar cell or a cell string formed by connecting multiple crystalline silicon solar cells; b) laminating the solar cell module to be laminated under current injection, to obtain a laminated solar cell module; and c) installing a frame and a junction box on the laminated solar cell module, to obtain a crystalline silicon solar cell module. The crystalline silicon solar cell module is under the current injection during the laminating process, improving the performance against light-induced degradation.
US09722116B2	Solar cell apparatus Disclosed is a solar cell apparatus. The solar cell apparatus includes a solar cell panel; a protective substrate formed on the solar cell panel such that a step difference is formed between the protective substrate and the solar cell panel; and a sealing member at a lateral side of the solar cell panel and on a bottom surface of the protective substrate.
US09722113B2	Tetradymite layer assisted heteroepitaxial growth and applications A multilayer stack including a substrate, an active layer, and a tetradymite buffer layer positioned between the substrate and the active layer is disclosed. A method for fabricating a multilayer stack including a substrate, a tetradymite buffer layer and an active layer is also disclosed. Use of such stacks may be in photovoltaics, solar cells, light emitting diodes, and night vision arrays, among other applications.
US09722112B2	Methods and semiconductor materials suitable for photovoltaic cells Methods and semiconductor materials produced by such methods that are suitable for use in photovoltaic cells, solar cells fabricated with such methods, and solar panels composed thereof. Such methods include a wet-chemical synthesis method capable of producing a Group I-III-VI2 semiconductor material by forming a solution containing an organic solvent, at least one Group I precursor of at least one Group I element, and at least one Group III precursor of at least one Group III element. The Group I precursor is present in the solution in an amount of less than 120% of a stoichiometric ratio of the Group I element in the Group I-III-VI2 semiconductor material, and the Group III precursor is present in the solution in an amount of greater than 55% of a stoichiometric ratio of the Group III element in the Group I-III-VI2 semiconductor material.
US09722111B2	Surface passivation for CdTe devices In one embodiment, a method for surface passivation for CdTe devices is provided. The method includes adjusting a stoichiometry of a surface of a CdTe material layer such that the surface becomes at least one of stoichiometric or Cd-rich; and reconstructing a crystalline lattice at the surface of the CdTe material layer by annealing the adjusted surface.
US09722108B2	Photodetector with plasmonic structure and method for fabricating the same A photodetector with a plasmon structure includes a semiconductor substrate, a plurality of light-receiving elements that are formed in a predetermined pattern, protruding from the semiconductor substrate, and a nanostructure that is placed in contact with a surface of the semiconductor substrate among the light-receiving elements and which induces a plasmon phenomenon thereon.
US09722106B2	Method of manufacturing a solar cell with local back contacts The invention relates to the manufacturing process of a solar cell (1) with back contact and passivated emitter, comprising a dielectric stack (10) of at least two layers consisting of at least a first dielectric layer (11) made of AlOx in contact with a p-type silicon layer (3), and a second dielectric layer (13) deposited on the first dielectric layer (11). Besides, the method of manufacturing comprising a formation step of at least one partial opening (15) preferably by laser ablation into the dielectric stack (10), sparing at least partially the aforementioned first dielectric layer.
US09722103B2	Thermal compression bonding approaches for foil-based metallization of solar cells Thermal compression bonding approaches for foil-based metallization of solar cells, and the resulting solar cells, are described. For example, a method of fabricating a solar cell includes placing a metal foil over a metalized surface of a wafer of the solar cell. The method also includes locating the metal foil with the metalized surface of the wafer. The method also includes, subsequent to the locating, applying a force to the metal foil such that a shear force appears between the metal foil and the metallized surface of the wafer to electrically connect a substantial portion of the metal foil with the metalized surface of the wafer.
US09722101B2	Solar cell, solar cell manufacturing method, and solar cell module A solar cell includes a photoelectric conversion section having first and second principal surfaces, and a collecting electrode formed on the first principal surface. The collecting electrode includes first and second electroconductive layers in this order from the photoelectric conversion section side, and includes an insulating layer between the first and second electroconductive layers. The insulating layer is provided with an opening, and the first and second electroconductive layers are in conduction with each other via the opening provided in the insulating layer. The solar cell has, on the first principal surface, the second principal surface or a side surface of the photoelectric conversion section, an insulating region freed of a short circuit of front and back sides of the photoelectric conversion section, and the surface of the insulating region is at least partially covered with the insulating layer.
US09722100B2	Thick-film pastes containing lead-tellurium-lithium-oxides, and their use in the manufacture of semiconductor devices The present invention provides a thick-film paste for printing the front side of a solar cell device having one or more insulating layers. The thick film paste comprises an electrically conductive metal, and a lead-tellurium-lithium-oxide dispersed in an organic medium.
US09722099B2	Light sensing device with outgassing hole in a light shielding layer and an anti-reflection film A light sensing device includes a substrate, a light sensing area on the substrate, and a light shielding layer over the substrate. The light shielding layer does not cover the light sensing area. At least one outgassing hole is formed through the light shielding layer.
US09722097B2	Semiconductor device and method for manufacturing the same A semiconductor device is provided. The semiconductor device includes a substrate; a well region disposed in the substrate; an isolation structure surrounding an active region in the well region; a source region disposed in the well region; a drain region disposed in the well region; a second conductive type first doped region disposed in the well region and disposed along a periphery of the active region; a second conductive type second doped region disposed in the well region and under the source region, the drain region and the second conductive type first doped region, wherein the second conductive type second doped region is in direct contact with the second conductive type first doped region; a source electrode; a drain electrode and a gate electrode. The present disclosure also provides a method for manufacturing the semiconductor device.
US09722094B2	TFT, array substrate and method of forming the same The present invention proposes a TFT, an array substrate, and a method of forming a TFT. The TFT includes a substrate, a buffer layer, a patterned poly-si layer, an isolation layer, a gate layer, and a source/drain pattern layer. The poly-si layer includes a heavily doped source and a heavily doped drain, and a channel. The gate layer includes a first gate area and a second gate area. The source/drain pattern layer includes a source pattern, a drain pattern and a bridge pattern, with the source pattern electrically connecting the heavily doped source, the drain pattern electrically connecting the heavily doped drain, and one end of the bridge pattern connecting the first gate area and the second gate area. The driving ability of the present inventive TFT is enhanced without affecting the leakage current.
US09722092B2	Semiconductor device having a stacked metal oxide To provide a transistor with favorable electrical characteristics. A semiconductor device includes a first insulator over a substrate; a first metal oxide over the first insulator; a second metal oxide over the first metal oxide; a first conductor and a second conductor over the second metal oxide; a third metal oxide over the second metal oxide, the first conductor, and the second conductor; a second insulator over the third metal oxide; and a third conductor over the second insulator. The second metal oxide includes a region in contact with a top surface of the first metal oxide and regions in contact with side surfaces of the first metal oxide. The second metal oxide includes channel formation regions.
US09722091B2	Method for manufacturing semiconductor device Provided is a transistor containing a semiconductor with low density of defect states, a transistor having a small subthreshold swing value, a transistor having a small short-channel effect, a transistor having normally-off electrical characteristics, a transistor having a low leakage current in an off state, a transistor having excellent electrical characteristics, a transistor having high reliability, or a transistor having excellent frequency characteristics. An insulator is formed, a layer is formed over the insulator, oxygen is added to the insulator through the layer, the layer is removed, an oxide semiconductor is formed over the insulator to which the oxygen is added, and a semiconductor element is formed using the oxide semiconductor.
US09722089B2	Thin film transistor array panel and manufacturing method thereof A thin film transistor array panel includes a substrate and a gate line disposed on the substrate. The gate line includes a gate electrode. A gate insulating layer is disposed on the gate line. An oxide semiconductor layer is disposed on the gate insulating layer. The oxide semiconductor layer at least partially overlaps the gate electrode. A data line is disposed on the oxide semiconductor layer. The data line includes a source electrode and a drain electrode facing the source electrode. The oxide semiconductor layer includes tungsten, indium, zinc, or tin.
US09722082B2	Methods and apparatus for doped SiGe source/drain stressor deposition A method of manufacturing a semiconductor device includes etching a recess into a substrate and epitaxially growing a source/drain region in the recess. The source/drain region includes a first undoped layer of stressor material lining the recess, a lightly doped layer of stressor material over the first undoped layer, a second undoped layer of stressor material over the lightly doped layer, and a highly doped layer of stressor material over the second undoped layer.
US09722081B1	FinFET device and method of forming the same A FinFET device and a method of forming the same are disclosed. In accordance with some embodiments, a FinFET device includes a substrate having at least one fin, a gate stack across the at least one fin, a strained layer aside the gate stack and a silicide layer over the strained layer. The strained layer has a boron surface concentration greater than about 2E20 atom/cm3 within a depth range of about 0-5 nm from a surface of the strained layer.
US09722071B1	Trench power transistor A trench power transistor is provided. The trench gate structure of the trench power transistor includes at least one insulting layer, a gate electrode, and a shielding electrode, which are disposed in a trench of an epitaxial layer. The insulating layer formed on an inner wall of the active trench to isolate an epitaxial layer from the gate and the shielding electrodes. The insulating layer includes a first dielectric layer, a second dielectric layer and a third dielectric layer. The first and second dielectric layers extend from an upper portion of the inner wall to a lower portion of the inner wall of the active trench. The third dielectric layer is formed on the second dielectric layer and located at the lower portion of the active trench. A portion of the second dielectric layer is interposed between the first and third dielectric layers.
US09722066B2	Semiconductor device To enhance electromigration resistance of an electrode.A drain electrode is partially formed on a side surface of a drain pad. In this case, the drain electrode is integrated with the drain pad and extends from the side surface of the drain pad in a first direction (y direction). A recessed portion is located in a region overlapping with the drain electrode in a plan view. At least a part of the drain electrode is buried in the recessed portion. A side surface of the recessed portion, which faces the drain pad, enters the drain pad in the first direction (y direction).
US09722060B2	Semiconductor device and semiconductor module In a semiconductor device, an element forming region formed with a semiconductor element for controlling a current is defined on a surface of a semiconductor substrate. A termination region is defined so as to surround the element forming region. In a gate electrode, a probe-contacting region and a wire region are defined. The probe-contacting region and the wire region are separated by an insulator formed on a surface of the gate electrode. Thus, the surface of the probe-contacting region and the surface of the wire region are located at the same height.
US09722059B2	Latch-up free power transistor There are disclosed herein various implementations of a latch-up free power transistor. Such a device includes an insulated gate situated adjacent to a conduction channel in the power transistor, an emitter electrode in direct physical contact with the conduction channel, and a collector electrode in electrical contact with the conduction channel. The power transistor also includes an emitter layer in contact with a surface of a semiconductor substrate adjacent the conduction channel.
US09722053B1	Methods, apparatus and system for local isolation formation for finFET devices At least one method, apparatus and system are disclosed for forming a fin field effect transistor (finFET) while reducing oxidization and fin critical dimension loss. A plurality of fins of a transistor are formed. A hard mask layer is formed on top of the fins. A first liner layer is formed over the fins and the hard mask layer. A partial deposition process is performed for depositing a first insulation material in a first portion of a channel between the fins. A second liner layer is formed above the fins, the first insulation material, and the channel. A second insulation material is deposited above the second liner layer. A fin reveal process is performed for removing the second insulation material to a predetermined height. An etch process is performed for removing the hard mask layer and the first and second liner layers above the predetermined height.
US09722052B2	Fin cut without residual fin defects A method of forming semiconductor fins is provided. Sacrificial fins are provided on a surface of substrate. A hard mask layer, formed around the sacrificial fins and the gaps therebetween, is made coplanar with a topmost surface of the sacrificial fins. A fin cut mask then covers a portion of the sacrificial fins and partly covers a sacrificial fin. Trenches are formed in the hard mask layer by removing sacrificial fins not covered by the fin cut mask and that portion of the sacrificial fin not partly covered by the fin cut mask. Spacers are formed on the sidewalls of the trenches and a plug is formed in the trench formed by removing that portion of the sacrificial fin not partly covered by the fin cut mask. Semiconductor fins are grown epitaxially in the trenches having the spacers from the exposed surface of the substrate upward.
US09722050B2	Semiconductor device and manufacturing method thereof A semiconductor device includes a substrate, at least one active semiconductor fin, at least one first dummy semiconductor fin, and at least one second dummy semiconductor fin. The active semiconductor fin is disposed on the substrate. The first dummy semiconductor fin is disposed on the substrate. The second dummy semiconductor fin is disposed on the substrate and between the active semiconductor fin and the first dummy semiconductor fin. A top surface of the first dummy semiconductor fin and a top surface of the second dummy semiconductor fin are curved in different directions.
US09722047B2	Method of producing a high-voltage transistor The high-voltage transistor device comprises a semiconductor substrate (1) with a source region (2) of a first type of electrical conductivity, a body region (3) including a channel region (4) of a second type of electrical conductivity opposite to the first type of conductivity, a drift region (5) of the first type of conductivity, and a drain region (6) of the first type of conductivity extending longitudinally in striplike fashion from the channel region (4) to the drain region (6) and laterally confined by isolation regions (9). The drift region (5) comprises a doping of the first type of conductivity and includes an additional region (8) with a net doping of the second type of conductivity to adjust the electrical properties of the drift region (5). The drift region depth and the additional region depth do not exceed the maximal depth (17) of the isolation regions (9).
US09722041B2	Breakdown voltage blocking device In one embodiment, a breakdown voltage blocking device can include an epitaxial region located above a substrate and a plurality of source trenches formed in the epitaxial region. Each source trench can include a dielectric layer surrounding a conductive region. The breakdown voltage blocking device can also include a contact region located in an upper surface of the epitaxial region along with a gate trench formed in the epitaxial region. The gate trench can include a dielectric layer that lines the sidewalls and bottom of the gate trench and a conductive region located between the dielectric layer. The breakdown voltage blocking device can include source metal located above the plurality of source trenches and the contact region. The breakdown voltage blocking device can include gate metal located above the gate trench.
US09722037B2	Compound semiconductor device and manufacturing method of the same An embodiment of a compound semiconductor device includes: a substrate; a nitride compound semiconductor stacked structure formed on or above the substrate; and a gate electrode, a source electrode and a drain electrode formed on or above the compound semiconductor stacked structure. A recess positioning between the gate electrode and the drain electrode in a plan view is formed at a surface of the compound semiconductor stacked structure.
US09722033B2	Doped zinc oxide as n+ layer for semiconductor devices A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-type layer is formed on or in the p-doped layer. The n-type layer includes ZnO on the p-doped layer to form an electronic device.
US09722032B2	Tuned semiconductor amplifier Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.
US09722031B2	Reduced current leakage semiconductor device A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed thereon, over-etching the channel layer to expose an extension region below the gate structure, epitaxially growing a halo layer on the exposed extension region using a first in-situ dopant and epitaxially growing a source or drain on the halo layer using a second in-situ dopant, wherein the first in-situ dopant and the second in-situ dopant are of opposite doping polarity. Using an opposite doping polarity may provide an energy band barrier for the semiconductor device and reduce leakage current. A corresponding apparatus is also disclosed herein.
US09722025B2	FinFETs having dielectric punch-through stoppers A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
US09722024B1	Formation of semiconductor structures employing selective removal of fins Formation of semiconductor structures employing selective removal of fins includes, for example, providing a substrate having a first plurality of fins having first hard masks thereon, a second plurality of fins having second hard masks thereon, the first hard mask being different from the second hard mask, depositing a first fill material between lower portions of the first and second fins, depositing a third hard mask layer on the first fill material between the first and second fins, depositing a second fill material on the third hard mask extending between upper portions of the first and second fins, selectively removing the second hard masks and the second fins to form open cavities in the first and second fill material, depositing a third fill material in the opened cavities, and removing the second fill material and the third fill material above the third hard mask to form a fin-cut region.
US09722022B2	Sidewall image transfer nanosheet A method for forming active regions of a semiconductor device comprising forming a nanosheet stack on a substrate, forming the nanosheet stack comprising forming a sacrificial nanosheet layer on the substrate, and forming a nanosheet layer on the sacrificial nanosheet layer, forming an etch stop layer on the nanosheet stack, forming a mandrel layer on the etch stop layer, removing portions of the mandrel layer to form a mandrel on the etch stop layer, forming sidewalls adjacent to sidewalls of the mandrel, depositing a fill layer on exposed portions of the etch stop layer, removing the sidewalls and removing exposed portions of the etch stop layer and the nanosheet stack to expose portions of the substrate.
US09722019B2	High voltage integrated circuit device A high voltage integrated circuit device suppresses the quantity of holes that are implanted due to a negative voltage surge, thus preventing malfunction and destruction of a high side circuit. A p−-type aperture portion has a gap portion in an n-type well region that is a voltage resistant region, penetrating the n-type well region to reach a p-type substrate, so as to enclose an n-type well region that is a high potential region.
US09722018B2	Vertical high voltage semiconductor apparatus and fabrication method of vertical high voltage semiconductor apparatus A silicon carbide vertical MOSFET includes an N-counter layer of a first conductivity type formed in a surface layer other than a second semiconductor layer base layer selectively formed in a low concentration layer on a surface of the substrate, a gate electrode layer formed through a gate insulating film in at least a portion of an exposed portion of a surface of a third semiconductor layer of a second conductivity type between a source region of the first conductivity type and the N-counter layer of the first conductivity type, and a source electrode in contact commonly with surfaces of the source region and the third semiconductor layer. Portions of the second conductivity type semiconductor layer are connected with each other in a region beneath the N-counter layer.
US09722015B1	Capacitor structure and method for manufacturing the same The present disclosure provides a capacitor structure, including a substrate having a conductive region; a trench in the conductive region and having a bottom portion and an inner sidewall portion; a spacer over the inner sidewall portion of the trench; a first conductive layer over the bottom portion and the spacer in the trench; a first dielectric layer over the first conductive layer and in the trench; a second conductive layer over the first dielectric layer and in the trench; and a second dielectric layer over the second conductive layer and in the trench, wherein the spacer comprises an angle in a range of from about 85 to about 89 degrees with respect to the bottom portion of the trench and comprises a flared opening opposite to the bottom portion of the trench. The present disclosure also provides a method for manufacturing the capacitor structure.
US09722014B2	Memory devices including capacitor structures having improved area efficiency Semiconductor structures including a plurality of conductive structures having a dielectric material therebetween are disclosed. The thickness of the dielectric material spacing apart the conductive structures may be adjusted to provide optimization of capacitance and voltage threshold. The semiconductor structures may be used as capacitors, for example, in memory devices. Various methods may be used to form such semiconductor structures and capacitors including such semiconductor structures. Memory devices including such capacitors are also disclosed.
US09722011B2	Film scheme for MIM device The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a multi-layer capacitor dielectric layer including an amorphous dielectric layer configured to mitigate the formation of leakage paths, and a method of formation. In some embodiments, the MIM (metal-insulator-metal) capacitor has a capacitor bottom metal layer. A multi-layer capacitor dielectric layer is disposed over the capacitor bottom metal layer. The multi-layer capacitor dielectric layer has an amorphous dielectric layer abutting a high-k dielectric layer. A capacitor top metal layer is disposed over the multi-layer capacitor dielectric layer. The high-k dielectric layer within the capacitor dielectric layer provides the MIM capacitor with a high capacitance density, while the amorphous dielectric layer prevents leakage by blocking the propagation of grain boundaries between the capacitor top metal layer and the capacitor bottom metal layer.
US09722010B2	Display device having stacked storage capacitors below light emitting element A display device according to the present disclosure includes: a transistor section (100) that includes a gate insulating film (130), a semiconductor layer (140), and a gate electrode layer (120), the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section (200) that includes a first metal film (210) and a second metal film (220), the first metal film being disposed at a same level as wiring layers (161, 162) that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film (152) in between; and a display element that is configured to be controlled by the transistor section.
US09722008B2	Organic light-emitting display apparatus including a reflection control layer as a capacitor electrode An organic light-emitting display apparatus, including a substrate, a reflection control layer disposed on the substrate and including a metal layer and dielectric layer, a thin-film transistor disposed on the reflection control layer and including an active layer, a gate electrode, a source electrode, and a drain electrode, a storage capacitor disposed on the reflection control layer and including a first electrode and a second electrode, a pixel electrode connected to one of the source electrode and the drain electrode, an intermediate layer disposed on the pixel electrode and including an organic emission layer, an opposite electrode disposed on the intermediate layer, in which a portion of the metal layer of the reflection control layer comprises the first electrode of the storage capacitor.
US09722005B2	Light-emitting device, array substrate, display device and manufacturing method of light-emitting device The present invention discloses a light-emitting device, array substrate, display device and manufacturing method of light-emitting device. The light-emitting device comprises a substrate and a pixel define layer provided on the substrate, the pixel define layer defines at least one pixel unit, each of which comprises a plurality of first electrodes, an organic layer provided on the plurality of first electrodes, and a second electrode provided on the organic layer. The light-emitting device, array substrate, display device and manufacturing method provided by the present invention can allow the formed film of the organic layer on the first electrodes to have good flatness and allow portions of the organic layer on different first electrodes to have substantially the same thickness, thus flatness and uniformity of the formed film of the organic layer in the light-emitting device is improved and further display quality of the light-emitting device is improved.
US09722002B2	Organic light-emitting diode display An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate including a pixel region including a plurality of pixels. A plurality of lighting test transistors is formed in a peripheral region surrounding the pixel region and electrically connected to the pixels, and the lighting test transistors are configured to test lighting of the pixels. Each of the lighting test transistors includes a first active layer pattern formed over the substrate, a first gate electrode formed over the first active layer pattern, and a conductive pattern formed over the first gate electrodes. The conductive pattern is electrically connected to the first gate electrode, the first gate electrodes are spaced apart from each other and have substantially the same shape, and the conductive patterns are integrally formed.
US09722001B2	Organic light emitting display and manufacturing method thereof An organic light emitting display including a substrate, a first electrode and a second electrode on the substrate and facing each other, at least two organic light emitting layers between the first electrode and the second electrode, and at least two color filters on the second electrode, the organic light emitting layers emitting a first color light, and the color filters emitting a second color light and a third color light.
US09721999B2	Pixel element structure, array structure and display device A pixel element structure is disclosed. The pixel element structure includes first, second, and third sub-pixel elements, each including a light-emitting region. At least one of the first, second, and third sub-pixel elements includes a light-transmitting region, where the light-emitting region includes an organic light-emitting diode light-emitting structure, and where the organic light-emitting diode light-emitting structure includes a first substrate, and a nontransparent anode, a pixel defining layer, an organic layer and a cathode, sequentially arranged above the first substrate.
US09721998B2	Display device and driving method thereof Disclosed is a display device including a pixel portion having a plurality of pixels which have a display element and a transmissive portion. The display element includes a light-emitting element which does not transmit external light, while the transmissive portion is arranged to transmit external light. In the display element, a top-emission or bottom-emission type light-emitting element is provided. On the other hand, no light-emitting element or a dual-emission type light-emitting element which possesses an EL layer interposed between two light-transmissive electrodes is provided to the transmissive portion. The emission color of the display element is controlled by a color filter which overlaps with the light-emitting element in the display element, while no color filter is given to the transmissive portion.
US09721997B2	Organic light emitting device Provided is an organic light emitting device including: an organic emission layer disposed between a first electrode and a second electrode and in a plurality of sub-pixel areas; a plurality of electroluminescence units which include the organic emission layer and are formed by stacking; and a charge generation layer between the plurality of electroluminescence units, where the charge generation layers respectively disposed in the plurality of sub-pixel areas have a step and are formed at different positions, and the second electrodes respectively disposed in the multiple sub-pixel areas have a step and are formed at different positions.
US09721992B2	Organic optoelectronic component with a light emitting element and a light detecting element and method for operating such an organic optoelectronic component An organic optoelectronic component and a method for operating an organic optoelectronic component are disclosed. In an embodiment an organic optoelectronic component includes an organic light emitting element including an organic functional layer stack having an organic light emitting layer between two electrodes and an organic light detecting element including a first organic light detecting element including a first organic light detecting layer, and a second organic light detecting element including a second organic light detecting layer, wherein the organic light emitting element and the organic light detecting element are arranged laterally adjacent on a common substrate, wherein the first organic light detecting element is configured to detect ambient light, wherein the second organic light detecting layer of the second organic light detecting element is arranged between two non-transparent layers, the non-transparent layers shade the second organic light detecting layer of the second organic light detecting element from ambient light.
US09721988B2	Method for manufacturing semiconductor device, and semiconductor device Provided is a semiconductor device with improved performance. In a method for manufacturing a semiconductor device, after forming a gate electrode of a transfer transistor over a p-type well, a photodiode is formed in one part of the p-type well positioned on one side with respect to the gate electrode. Then, a cap insulating film including silicon and nitrogen is formed over the photodiode before implanting impurity ions for formation of an n-type low-concentration semiconductor region of the transfer transistor, into the other part of the p-type well positioned on a side opposite to the one side with respect to the gate electrode.
US09721987B2	Pixel with transistor gate covering photodiode The semiconductor device includes a semiconductor substrate, an isolation feature, a photodiode and a transistor gate. The isolation feature is disposed in the semiconductor substrate. The photodiode is disposed in the semiconductor substrate and adjacent to the isolation feature. The photodiode includes a first pinned photodiode (PPD) with a first dopant type and a second PPD with a second dopant type. The second PPD is embedded in the first PPD, and is different from the first dopant type. The transistor gate is disposed over the photodiode and includes a first portion and a second portion. The first portion with the first dopant type is used for controlling the operation of the semiconductor device. The second portion with the second dopant type is adjacent to the first portion. The second portion covers the photodiode and extends toward the isolation feature.
US09721979B1	Method for manufacturing array substrate, array substrate and display device A method for manufacturing an array substrate comprises: forming a pixel electrode and a gate of a thin film transistor on a substrate; forming a gate insulating layer; forming an active layer and a source and a drain, which are provided on the active layer, of the thin film transistor by a patterning process; forming a passivation layer; forming a main via penetrating through the gate insulating layer and the passivation layer and a main-via extension portion under a portion of the drain by a patterning process, wherein the main via is connected to the main-via extension portion; removing a portion of the drain which protrudes above the main-via extension portion so as to form a final via; and forming a connection electrode and a common electrode, wherein the connection electrode electrically connects the drain to the pixel electrode through the final via.
US09721975B2	Semiconductor device, display device, and electronic device A semiconductor device including: one or more pieces of first wiring having a main wiring section and a bifurcation wiring section; one or a plurality of pieces of second wiring having a trunk wiring section and a plurality of branch wiring sections within a gap region between the main wiring section and the bifurcation wiring section; one or a plurality of transistors each divided and formed into a plurality of pieces, the plurality of branch wiring sections individually functioning as a gate electrode and the one or plurality of transistors having a source region formed within the main wiring section and within the bifurcation wiring section and having a drain region formed between the plurality of branch wiring sections; and one or a plurality of pieces of third wiring electrically connected to the drain region of the one or plurality of transistors.
US09721968B2	Semiconductor device, electronic component, and electronic appliance A semiconductor device with a novel structure that can consume less power and have a reduced size of a circuit. In the semiconductor device, when configuration operation is started in a path transistor in a configuration memory, supply of an H-level potential to a signal pass node is stopped and then the potential of the signal pass node is set at L level, whereby configuration data is input to a memory potential retaining node, which is a gate of the path transistor. After the configuration operation is completed, the supply of the H-level potential to the signal pass node is resumed so that capacitive coupling occurs between the path transistor and the memory potential retaining node and increase the gate potential of the path transistor, so that a boosting effect is obtained. The above structure eliminates the need for a keeper circuit, reducing the power consumption and the circuit area.
US09721965B2	Non-volatile memory device having vertical cell Provided is a non-volatile memory device having a vertical channel cell. The non-volatile memory device includes a substrate having a well. A first vertical channel and a second vertical channel are in contact with the well, and protrude from the well. A pipe channel connecting the first and second vertical channels is disposed. A cut-off gate electrode stacked over the well, and surrounding side surfaces of the first and second vertical channels is disposed. A pipe gate electrode stacked over the cut-off gate electrode, and having the pipe channel is disposed. A plurality of memory-cell gate electrodes stacked over the pipe gate electrode, and surrounding the side surfaces of the first and second vertical channels is disposed. A select gate electrode stacked over the plurality of memory-cell gate electrodes, and surrounding the side surfaces of the first and second vertical channels is disposed.
US09721964B2	Low dielectric constant insulating material in 3D memory A memory device includes a plurality of stacks of conductive strips alternating with insulating strips. At least one of the insulating strips includes an insulating material with a dielectric constant equal to or lower than 3.6. A plurality of structures of a conductive material is arranged orthogonally over the stacks. Memory elements are disposed in interface regions at cross-points between side surfaces of the stacks and structures. The insulating strips can have equivalent oxide thicknesses EOT substantially greater than their respective physical thicknesses. The EOT can be at least 10% greater than the respective physical thicknesses. The at least one of the insulating strips can consist essentially of the insulating material with a dielectric constant equal to or lower than 3.6.
US09721963B1	Three-dimensional memory device having a transition metal dichalcogenide channel A monolithic three-dimensional memory device contains a high mobility metal dichalcogenide channel. A stack of alternating layers comprising first material layers and second material layers is formed over a substrate. A memory opening is formed through the stack of alternating layers. A memory film is formed in the memory opening. A metal dichalcogenide channel is formed on an inner sidewall of the memory film. A dielectric core is formed within the metal dichalcogenide channel. A stack of titanium and gold may be employed to form a drain region to enhance contact. A hafnium oxide, aluminum oxide or hafnium aluminum oxide hafnium aluminum oxide layer may be employed on either side, or on both sides, of the metal dichalcogenide channel to enhance the mobility of electrons in the metal dichalcogenide channel.
US09721959B2	Semiconductor device To provide a semiconductor device that holds data even when power supply is stopped. The semiconductor device includes a first transistor, a second transistor, a third transistor, and a capacitor. One of a source electrode and a drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the third transistor and one electrode of the capacitor. A gate electrode of the second transistor is electrically connected to the other of the source electrode and the drain electrode of the third transistor.
US09721957B2	Static random access memory (SRAM) cells including vertical channel transistors A static random access memory (SRAM) cell can include a first pull-up transistor, a first pull-down transistor, a second pull-up transistor, a second pull-down transistor, a first access transistor, and a second access transistor, all being coupled together in a 6 transistor SRAM cell, wherein each of the transistors is configured as a vertical channel transistor.
US09721951B2	Semiconductor device using Ge channel and manufacturing method thereof According to one embodiment, a semiconductor device includes a first complementary semiconductor device provided on a semiconductor substrate, and including a CMOS circuit, a metal electrode provided above the first complementary semiconductor device, a semiconductor layer provided above the metal electrode, including an nMOS region and a pMOS region separated from each other, and containing Ge; and a second complementary semiconductor device including an nMOSFET provided on the first portion of the semiconductor layer and a pMOSFET provided on the second portion of the semiconductor layer.
US09721937B1	Integrated circuit containing first and second does of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including tip-to-tip short configured fill cells An IC includes first and second designs of experiments (DOEs), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of side-to-side shorts, and the second DOE contains fill cells configured to enable NC detection of tip-to-tip shorts.
US09721936B2	Field-effect transistor stack voltage compensation Field-effect transistor (FET) stack voltage compensation. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series between the first and terminal and the second terminal. Each switching element has a parameter that is configured to yield a desired voltage drop profile among the connected switching elements. Such a desired voltage drop profile can be achieved by some or all FETs in a stack having variable dimensions such as variable gate width or variable numbers of fingers associated with the gates.
US09721935B2	Semiconductor device and manufacturing method thereof A semiconductor device includes a first chip, a second chip stacked on the first chip, and a third chip stacked on the second chip. The second chip includes a second semiconductor layer having a second circuit surface facing the first wiring layer and a second rear surface opposite to the second circuit surface, a second wiring layer provided on the second circuit surface and connected to a first wiring layer of the first chip, and a second electrode extending through the second semiconductor layer and connected to the second wiring layer. The third chip includes a third semiconductor layer having a third circuit surface and a third rear surface facing the second chip, a third wiring layer provided on the third circuit surface, and a third electrode extending through the third semiconductor layer, connected to the third wiring layer and connected to the second electrode through bumps.
US09721926B2	Semiconductor device having stacked semiconductor chips interconnected via TSV and method of fabricating the same A semiconductor device includes at least first and second semiconductor chips stacked on each other along a first direction, at least one silicon-through-via (TSV) through at least the first semiconductor chip of the first and second semiconductor chips, a contact pad on the at least one TSV of the first semiconductor chip, the contact pad electrically connecting the TSV of the first semiconductor chip to the second semiconductor chip, and a plurality of dummy pads on the first semiconductor chip, the plurality of dummy pads being spaced apart from each other and from the contact pad along a second direction, and the dummy pads having same heights as the contact pads as measured between respective top and bottom surfaces along the first direction.
US09721923B1	Semiconductor package with multiple coplanar interposers A semiconductor package includes a first interposer, a second interposer, and a gap between the first interposer and the second interposer. The first interposer and the second interposer are coplanar. A first die is mounted on the first interposer and the second interposer. The first die includes first connection elements connecting the first die to the first interposer or the second interposer. A redistribution layer (RDL) structure is disposed on bottom surfaces of the first and second interposers for connecting the first interposer with the second interposer. The RDL structure includes at least one bridge trace traversing the gap to electrically connect the first interposer with the second interposer.
US09721920B2	Embedded chip packages and methods for manufacturing an embedded chip package A method for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate; placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip; and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad.
US09721918B2	Contact area design for solder bonding A package component includes a dielectric layer and a metal pad over the dielectric layer. A plurality of openings is disposed in the metal pad. The first plurality of openings is separated from each other by portions of the metal pad, with the portions of the metal pad interconnected to form a continuous metal region.
US09721917B2	Semiconductor device having an inductor A semiconductor device is provided with a semiconductor chip. The semiconductor chip has a semiconductor substrate, an interconnect layer, an inductor and conductive pads (first pads). The interconnect layer is provided on the semiconductor substrate. The interconnect layer includes the inductor. The pads are provided on the interconnect layer. The pads are provided in a region within a circuit forming region of the semiconductor chip, which does not overlap the inductor.
US09721915B2	Semiconductor device A semiconductor device capable of inhibiting oxidation of a Cu wiring even in a high temperature operation. The semiconductor device includes a semiconductor substrate having a main surface, a Cu electrode which is selectively formed on a side of the main surface of the semiconductor substrate, an antioxidant film formed on an upper surface of the Cu electrode except an end portion thereof, an organic resin film which is formed on the main surface of the semiconductor substrate and covers a side surface of the Cu electrode and the end portion of the upper surface thereof, and a diffusion prevention film formed between the organic resin film and the main surface of the semiconductor substrate and between the organic resin film and the side surface and the end portion of the upper surface of the Cu electrode, being in contact therewith.
US09721913B2	Semiconductor package and method of manufacturing thereof A semiconductor package comprises a semiconductor chip having an active surface with a conductive pad thereon; an electroplated Au—Sn alloy bump over the active surface; and a (glass) substrate comprising conductive traces electrically coupling with the electroplated Au—Sn alloy bump, wherein the electroplated Au—Sn alloy bump has a composition from about Au0.35Sn0.15 to about Au0.75Sn0.25 in weight percent uniformly distributed from an end in proximity to the active surface to an end in proximity to the substrate. A method of manufacturing a semiconductor package comprises forming patterns of conductive pads on an active surface of a semiconductor chip; electroplating Au—Sn alloy bump over the conductive pads; and bonding the semiconductor chip on a corresponding conductive trace on a substrate by a reflow operation or a thermal press operation.
US09721911B2	Chip package and manufacturing method thereof A chip package includes a chip, a laser stopper, an isolation layer, a redistribution layer, an insulating layer, and a conductive structure. The chip has a conductive pad, a first surface, and a second surface. The conductive pad is located on the first surface. The second surface has a first through hole to expose the conductive pad. The laser stopper is located on the conductive pad in the first through hole. The isolation layer is located on the second surface and in the first through hole. The isolation layer has a third surface opposite to the second surface, and has a second through hole to expose the laser stopper. The redistribution layer is located on the third surface, a sidewall of the second through hole, and the laser stopper in the second through hole. The conductive structure is located on the redistribution.
US09721897B1	Transistor with air spacer and self-aligned contact A method of fabricating a semiconductor transistor and the semiconductor transistor include a source region and a drain region within a substrate. The method includes forming a gate above the substrate, forming a source contact above the source region and a drain contact above the drain region, and forming air spacers within a dielectric between the gate and each of the source contact and the drain contact. Metal caps are formed on the source contact and the drain contact, and a gate cap is formed between the dielectric and at least a portion of a bottom surface of higher-level contacts, which are contacts formed above the source contact and the drain contact.
US09721896B2	Interconnection structure, fabricating method thereof, and semiconductor device using the same A semiconductor device includes a semiconductor substrate comprising a contact region, a silicide present on the contact region, a dielectric layer present on the semiconductor substrate, the dielectric layer comprising an opening to expose a portion of the contact region, a conductor present in the opening, a barrier layer present between the conductor and the dielectric layer, and a metal layer present between the barrier layer and the dielectric layer, wherein a Si concentration of the silicide is varied along a height of the silicide.
US09721895B1	Self-formed liner for interconnect structures An interconnect dielectric material having an opening formed therein is first provided. A surface nitridation process is then performed to form a nitridized dielectric surface layer within the interconnect dielectric material. A metal layer is formed on the nitridized dielectric surface layer and then an anneal is performed to form a metal nitride layer between the metal layer and the nitridized dielectric surface layer. A portion of the originally deposited metal layer that is not reacted with the nitridized dielectric surface is then selectively removed and thereafter an electrical conducting structure is formed directly on the metal nitride layer that is present in the opening.
US09721892B2	Method for improving adhesion between porous low k dielectric and barrier layer A semiconductor device and method for manufacturing the same are provided. The method includes providing a semiconductor substrate, forming a porous low-k dielectric layer on the semiconductor substrate, forming a through-hole and a trench of a copper interconnect structure, performing a helium plasma treatment on an exposed surface of the porous low-k dielectric layer, performing a nitrogen plasma treatment on the exposed surface of the porous low-k dielectric layer to form a silicon nitride layer, performing an argon plasma treatment on the silicon nitride layer, and forming a diffusion barrier layer on bottoms and sidewalls of the through-hole and the trench of the copper interconnect structure. Through the successive helium, nitrogen and argon plasma treatments, the low-k dielectric layer has a smooth and dense surface that increases the adhesion strength between the low-k dielectric layer and the diffusion barrier layer to improve reliability and yield of the semiconductor device.
US09721891B2	Integrated circuit devices and methods An integrated circuit device includes a first metal layer including aluminum. The integrated circuit device includes a second metal layer including an interconnect structure. The interconnect structure includes a layer of first material including aluminum. The integrated circuit device includes an inter-diffusion layer that includes aluminum. The inter-diffusion layer is proximate to the first metal layer and proximate to the layer of first material including aluminum. The integrated circuit device includes an aluminum oxide barrier layer. The aluminum oxide barrier layer is proximate to a dielectric layer and proximate to the layer of first material including aluminum.
US09721885B2	Electrical fuse and/or resistor structures Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.
US09721882B2	Land side and die side cavities to reduce package z-height A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die mounted to a die side surface of the package substrate, and the opposing land side surface of the package substrate may be mounted to a printed circuit board (PCB). The capacitor may be mounted within a cavity formed in the die side surface of the package substrate or the land side surface of the package substrate. Mounting a capacitor within a cavity may reduce the form factor of the package. The die may be mounted within a cavity formed in the die side surface of the package substrate. Solder balls connecting the package to the PCB may be mounted within one or more cavities formed in one or both of the package substrate and the PCB.
US09721873B2	Semiconductor device and manufacturing method thereof A semiconductor device with a through via penetrating a semiconductor substrate, in which shorting between a wiring and a semiconductor element is prevented to improve the reliability of the semiconductor device. A liner insulating film as a low-k film, which has a function to insulate the semiconductor substrate and a through-silicon via from each other and is thick enough to reduce capacitance between the semiconductor substrate and the through-silicon via, is used as an interlayer insulating film for a first wiring layer over a contact layer. This prevents a decrease in the thickness of an interlayer insulating film in the contact layer.
US09721869B2	Heat sink structure with heat exchange mechanism The heat sink structure includes a vapor chamber, a heat pipe, and capillary elements. The vapor chamber includes a housing, a first capillary structure covering inside the housing, and a first working fluid filled inside the housing. The housing includes through holes and an inner top wall. Both ends of the heat pipe are inserted through the two through holes respectively and are exposed from the housing. The heat pipe includes a pipe body, a second capillary structure covering inside the pipe body, and a second working fluid filled inside the pipe body. Each of the capillary elements is connected to the inner top wall. One end of each of the capillary elements is in contact with the first capillary structure, and the other end of each of the capillary elements is in thermal contact with the heat pipe.
US09721866B2	Semiconductor device having multiple bonded heat sinks A method for manufacturing a semiconductor device is provided, the method including: mounting a first element on a wiring substrate, placing a first heat sink on the first element with a metal material interposed between the first heat sink and the first element, attaching the first heat sink to the first element via the metal material by heating and melting the metal material, and mounting a second element on the wiring substrate after the steps of attaching the first heat sink to the first element.
US09721863B2	Printed circuit board including a leadframe with inserted packaged semiconductor chips An electronic module includes a circuit board, having a carrier layer, the carrier layer having a plurality of recess areas in a main surface thereof, and a plurality of electronic sub-modules, each one of the sub-modules being disposed in one of the recess areas and each one of the sub-modules having a carrier, a semiconductor chip disposed on the carrier, and an encapsulation material disposed on the carrier and on the semiconductor chip.
US09721861B2	Semiconductor device A semiconductor device includes a semiconductor element and a ceramic circuit substrate on which the semiconductor element is mounted. The ceramic circuit substrate includes a ceramic substrate having one surface and the other surface facing each other, a metal circuit board joined to the one surface of the ceramic substrate and electrically connected to the semiconductor element, and a metal heat-dissipation plate joined to the other surface of the ceramic substrate. The metal circuit board is greater in thickness than the metal heat-dissipation plate. A surface of the metal heat-dissipation plate on a side opposite to the ceramic substrate is larger in area than a surface of the metal circuit board on a side opposite to the ceramic substrate. Thereby, a semiconductor device capable of suppressing warpage of the ceramic substrate can be achieved.
US09721859B2	Semi-hermetic semiconductor package A method of assembling a semi-hermetic semiconductor package includes bonding a semiconductor die having bond pads to a top side of a base region of a package substrate having vertical side walls that are hollow which define an inner open volume (gap) having an adhesive or thermoplastic material therein. There are a plurality of metal terminals providing top terminal contacts on the top side of the base region and bottom terminal contacts on a bottom side or below the base region. The bond pads are coupled to the top terminal contacts. A lid is placed which provides a top for the semiconductor package, where the lid extends to vertically oriented end protrusions so that the protrusions are positioned within the adhesive or thermoplastic material to secure the protrusions within the adhesive or thermoplastic material to provide a seal for the semiconductor package.
US09721849B2	High performance isolated vertical bipolar junction transistor and method for forming in a CMOS integrated circuit A CMOS integrated circuit containing an isolated n-channel DEMOS transistor and an isolated vertical PNP transistor has deep n-type wells and surrounding shallow n-type wells providing isolation from the p-type substrate. The isolated n-channel DEMOS transistor has an upper n-type layer providing an extended drain, and a lower p-type layer isolating the extended drain from the underlying deep n-type well. The isolated vertical PNP transistor has an upper n-type layer providing a base and a lower p-type layer providing a collector. A CMOS integrated circuit having opposite polarities of the transistors may be formed by appropriate reversals in dopant types.
US09721847B2	High-k / metal gate CMOS transistors with TiN gates An integrated circuit with a thick TiN metal gate with a work function greater than 4.85 eV and with a thin TiN metal gate with a work function less than 4.25 eV. An integrated circuit with a replacement gate PMOS TiN metal gate transistor with a workfunction greater than 4.85 eV and with a replacement gate NMOS TiN metal gate transistor with a workfunction less than 4.25 eV. An integrated circuit with a gate first PMOS TiN metal gate transistor with a workfunction greater than 4.85 eV and with a gate first NMOS TiN metal gate transistor with a workfunction less than 4.25 eV.
US09721842B2	Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly or indirectly by using layers composed of multi-layer thin film stacks, or in other embodiments, by a single blocking layer. By taking advantage of unexpected etch selectivity of the multi-layer stack or the controlled etch process of a single layer stack, etch damage to the high-k may be avoided and work function metal thicknesses can be tightly controlled which in turn allows field effect transistors with low Tinv (inverse of gate capacitance) mismatch.
US09721841B1	Electronic circuit of fin FET and methof for fabricating the electronic circuit An electronic circuit includes a plurality of fin lines on a substrate and a plurality of gate lines with a first line width, crossing over the fin lines. The gate lines are parallel and have a plurality of discontinuous regions forming as a plurality of slots. A region of any one of the gate lines adjacent to an unbalance of the slots has a second line width smaller than the first line width.
US09721839B2	Etch-resistant water soluble mask for hybrid wafer dicing using laser scribing and plasma etch Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer including a plurality of integrated circuits includes forming a water soluble mask above the semiconductor wafer, the water soluble mask covering and protecting the integrated circuits. The method also includes baking the water soluble mask to increase the etch resistance of the water soluble mask. The method also includes, subsequent to baking the water soluble mask, patterning the water soluble mask with a laser scribing process to provide a water soluble patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also includes plasma etching the semiconductor wafer through the gaps in the water soluble patterned mask to singulate the integrated circuits.
US09721838B2	Production method for semiconductor element, and semiconductor element A production method for a semiconductor element (10) includes: a semiconductor element forming step of forming the semiconductor element (10) including a dielectric film (3); a dicing region forming step of forming dicing regions (11) by removing the dielectric film (3) in partition regions that partition the semiconductor element (10); and a dicing step of dicing the dicing regions (11).
US09721835B2	Modulating microstructure in interconnects Recrystallization and grain growth of an interconnect metal, such as Cu, is achieved at higher anneal temperatures of 150° C. to 600° C., for example, for short anneal times of five to 180 minutes by forming a metal stress locking layer on the interconnect metal before anneal and chemical-mechanical polishing. The stress locking layer extends the elastic region of the interconnect metal by suppressing atom diffusion to the free surface, resulting in near zero tensile stress at room temperature after anneal. Stress voiding, which creates reliability problems, is thereby avoided. Improved grain size and texture are also achieved. The stress locking layer is removed after anneal by chemical-mechanical polishing or wet etching leaving the metal interconnect with low stress and improved grain size and texture. Annealing can be done in a forming gas or nitrogen gas atmosphere.
US09721834B2	HDP fill with reduced void formation and spacer damage A method for filling gaps between structures includes forming a plurality of high aspect ratio structures adjacent to one another with gaps, forming a first dielectric layer on tops of the structures and conformally depositing a spacer dielectric layer over the structures. The spacer dielectric layer is removed from horizontal surfaces and a protection layer is conformally deposited over the structures. The gaps are filled with a flowable dielectric, which is recessed to a height along sidewalls of the structures by a selective etch process such that the protection layer protects the spacer dielectric layer on sidewalls of the structures. The first dielectric layer and the spacer dielectric layer are exposed above the height using a higher etch resistance than the protection layer to maintain dimensions of the spacer layer dielectric through the etching processes. The gaps are filled by a high density plasma fill.
US09721827B2	Semiconductor arrangement with stress control and method of making One or more semiconductor arrangements are provided. The semiconductor arrangements include a buried layer over a well, a dielectric layer over the buried layer, a first gate stack over the dielectric layer and a S/D region disposed proximate the first gate stack. The S/D region has a first tip proximity region that extends under the first gate stack. One or more methods of forming a semiconductor arrangement are also provided. The methods include forming a S/D recess in at least one of a dielectric layer, a buried layer or a well, wherein the S/D recess is proximate a first gate stack and has a first recess tip proximity region that extends under the first gate stack as a function of the buried layer, and forming a S/D region in the S/D recess such that the S/D region has a first tip proximity region that extends under the first gate stack.
US09721812B2	Optical device with precoated underfill A method for fabricating an optical multi-chip module (MCM) includes temporarily curing an underfill material on a chip including an optical device to prevent flow of the underfill material. The chip is flip-chip mounted on a waveguide module having a mirror for directing light to or from the chip, wherein the underfill material is disposed between the chip and the waveguide module. The underfill material is cured to adhere the chip to the waveguide module.
US09721809B2	Method of forming gettering layer Disclosed herein is a method of forming a gettering layer for capturing metallic ions on the back side of a semiconductor wafer formed with devices on the face side thereof. The method includes irradiating the back-side surface of the semiconductor wafer with a pulsed laser beam having a pulse width corresponding to a thermal diffusion length of 10 to 230 nm, to thereby form the gettering layer.
US09721804B1	Semiconductor device and method for fabricating the same A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a fin-shaped structure on the substrate; performing a first etching process to remove part of the fin-shaped structure for forming a trench; and performing a second etching process to extend the depth of the trench and divide the fin-shaped structure into a first portion and a second portion.
US09721803B2	Etching method for substrate to be processed and plasma-etching device In one embodiment of the present invention, an etching method for a substrate to be processed comprises: (a1) a step in which etchant gas is supplied into a processing container than accommodates a substrate to be processed; (b1) a step in which the inside of the processing container is evacuated; (c1) a step in which a noble gas is supplied into the processing container; and (d1) a step in which microwaves are supplied into the processing container so as to excite the plasma of the noble gas inside the processing container. The sequential process including the step of supplying the etchant of supplying the etchant gas, the evacuating step, the step of supplying the noble gas, and the step of exciting the plasma of the noble gas may be repeated.
US09721799B2	Semiconductor package with reduced via hole width and reduced pad patch and manufacturing method thereof The present disclosure relates to a semiconductor package and method of making the same. The semiconductor package includes an encapsulation layer, a dielectric layer, a component, and a first patterned conductive layer. The encapsulation layer has a first surface. The component is within the encapsulation layer and has a front surface and a plurality of pads on the front surface. The dielectric layer is on the first surface of the encapsulation layer, and defines a plurality of via holes; wherein the plurality of pads of the component are against the dielectric layer; and wherein the dielectric layer has a second surface opposite the first surface of the encapsulation layer. Each of plurality of via holes extends from the second surface of the dielectric layer to a respective one of the plurality of the pads. The first patterned conductive layer is within the dielectric layer and surrounds the via holes.
US09721798B2	Method and apparatus for depositing amorphous silicon film Provided is a method and apparatus for depositing an amorphous silicon film. The method includes supplying a source gas and an atmospheric gas onto a substrate in a state where the substrate is loaded in a chamber to deposit the amorphous silicon film on the substrate. The atmospheric gas includes at least one of hydrogen and helium. The source gas includes at least one of silane (SiH2), disilane (Si2H6), and dichlorosilane (SiCl2H2).
US09721794B2	Hardmask composition and method of forming patterning by using the hardmask composition Example embodiments relate to a hardmask composition and/or a method of forming a fine pattern by using the hardmask composition, wherein the hardmask composition includes at least one of a two-dimensional layered nanostructure and a precursor thereof, and a solvent, and an amount of the at least one of a two-dimensional layered nanostructure and the precursor is about 0.01 part to about 40 parts by weight based on 100 parts by weight of the hardmask composition.
US09721793B2	Method of patterning without dummy gates Techniques herein provide precise cuts for fins and nanowires without needing dummy gate pairs to compensate for overlay misalignment. Techniques herein include using an etch mask to remove designated portions of gate structures to define a trench or open space having fin structures, nanowires, etc. The uncovered fin structures are etched away or otherwise removed from the trench segments. The etch mask and material defining the trench provide a combined etch mask for removing uncovered fin portions. Subsequently the trench segments are filled with dielectric material. Without needed dummy gate pairs a given substrate can fit significantly more electrical devices per unit area.
US09721790B2	Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control A method for processing a semiconductor wafer in a single wafer processing chamber may include heating the single wafer processing chamber to a temperature in a range of 650-700° C., and forming at least one superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions. Depositing the oxygen may include depositing the oxygen using an N2O gas flow.
US09721788B1	Simultaneous formation of liner and metal conductor In one aspect of the invention, a method for fabricating an advanced metal conductor structure includes providing a conductive line pattern including a set of conductive line trenches in a dielectric layer. Each conductive line trench of the conductive line pattern having parallel vertical sidewalls and a horizontal bottom. A surface treatment of the dielectric layer is performed. The surface treatment produces an element enriched surface layer in which a concentration of a selected element in a surface portion of the parallel sidewalls and horizontal bottoms of the conductive line trenches is increased. A first metal layer is deposited on the element enriched surface layer. A first thermal anneal is performed which simultaneously reflows the first metal layer to fill a first portion of the conductive line trenches and causes a chemical change at interfaces of the first metal layer and the element enriched surface layer creating a liner which is an alloy of the first metal and selected element. A wetting layer is deposited on the first metal layer. A second thermal anneal is preformed which reflows the wetting layer to fill a second portion of the conductive line trenches. A second metal layer is deposited on the wetting layer. A second thermal anneal is performed which reflows the second metal layer to fill a remaining portion of the conductive line trenches. Another aspect of the invention is a device formed by the method.
US09721787B2	Film deposition using tantalum precursors Provided are methods of depositing tantalum-containing films via atomic layer deposition and/or chemical vapor deposition. The method comprises exposing a substrate surface to flows of a first precursor comprising TaClxR5-x, TaBrxR5-x or TaIxR5-x, wherein R is a non-halide ligand, and a second precursor comprising an aluminum-containing compound, wherein x has a value in the range of 1 to 4. The R group may be C1-C5 alkyl, and specifically methyl. The resulting films comprise tantalum, aluminum and/or carbon. Certain other methods relate to reacting Ta2Cl10 with a coordinating ligand to provide TaCl5 coordinated to the ligand. A substrate surface may be exposed to flows of a first precursor and second precursor, the first precursor comprising the TaCl5 coordinated to a ligand, the second precursor comprising an aluminum-containing compound.
US09721783B2	Methods for particle reduction in semiconductor processing Methods for removing particles from a wafer for photolithography. A method is provided including providing a semiconductor wafer; attaching a polyimide layer to a backside of the semiconductor wafer; and performing an etch on an active surface of the semiconductor wafer; wherein particles that impinge on the backside during the etch are captured by the polyimide layer. In another method, includes attaching a layer of polyimide film to a backside of a semiconductor wafer; dry etching a material on an active surface of the semiconductor wafer; depositing of an additional layer of material on the active surface of the semiconductor wafer; removing the layer of polyimide film from the backside of the semiconductor wafer; patterning the layer of material using an immersion photolithography process to expose a photoresist on the active surface of the wafer; and repeating the attaching, dry etching, depositing, removing and patterning steps.
US09721782B2	Method and apparatus for shaping a gas profile near bevel edge A method for etching a bevel edge of a substrate in a processing chamber is provided. The method includes flowing an inert gas into a center region of the processing chamber defined above a center region of the substrate and flowing a mixture of an inert gas and a processing gas over an edge region of the substrate. The method further includes striking a plasma in the edge region, wherein the flow of the inert gas and the flow of the mixture maintain a mass fraction of the processing gas substantially constant. A processing chamber configured to clean a bevel edge of a substrate is also provided.
US09721780B2	M/Z targeted attenuation on time of flight instruments A method of mass spectrometry is disclosed comprising separating ions according to one or more physico-chemical properties. Ions which are onwardly transmitted to a Time of Flight mass analyzer are controlled by attenuating ions which would otherwise be transmitted to the Time of Flight mass analyzer and cause saturation of an ion detector and which have been determined or which are predicted to have a relatively high intensity.
US09721777B1	Magnetically assisted electron impact ion source for mass spectrometry The invention relates to a mass spectrometer having an electron impact ionization source which comprises an ejector for forming a beam of sample gas being driven in a first direction through an interaction region; a magnet assembly configured and arranged such that its magnetic field lines pass through the interaction region substantially parallel to the first direction; an electron emitter assembly for directing electrons toward the interaction region in a second direction being aligned substantially opposite to the first direction, wherein the electrons propagate along and are confined about the magnetic field lines until reaching the interaction region and forming sample gas ions therein; and a mass analyzer located downstream from the interaction region to which the sample gas ions are guided for mass analysis.
US09721769B2	In-vacuum rotational device This invention relates to the in-vacuum rotational device on a cylindrical magnetron sputtering source where the target or target elements of the target construction of such device are enabled to rotate without the need of a vacuum to atmosphere or vacuum to coolant dynamic seal. This invention relates to the use of the device in vacuum plasma technology where a plasma discharge, or any other appropriate source of energy such as arcs, laser, which can be applied to the target or in its vicinity would produce suitable coating deposition or plasma treatment on components of different nature. This invention also relates but not exclusively to the use of the device in sputtering, magnetron sputtering, arc, plasma polymerization, laser ablation and plasma etching. This invention also relates to the use of such devices and control during non-reactive and reactive processes, with or without feedback plasma process control. This invention also relates to the arrangement of these devices as a singularity or a plurality of units. This invention also relates to the target construction which can be used in such device. This invention also relates to the use of these devices in different power modes such as DC, DC pulsed, RF, AC, AC dual, HIPIMS, or any other powering mode in order to generate a plasma, such as sputtering plasma, plasma arc, electron beam evaporation, plasma polymerization plasma, plasma treatment or any other plasma generated for the purpose of a process, for example, and not exclusively, as deposition process or surface treatment process, etc.
US09721768B2	Apparatus for optical emission spectroscopy and plasma treatment apparatus Disclosed is an apparatus for optical emission spectroscopy which includes a light measuring unit measuring light in a process chamber performing a plasma process on a substrate, a light analyzing unit receiving light collected from the light measuring unit to analyze a plasma state, a control unit receiving an output signal of the light analyzing unit to process the output signal, and a light collecting controller disposed between the process chamber and the light measuring unit so as to be combined with the light measuring unit. The light collecting controller controls the light collected to the light measuring unit.
US09721754B2	Method and apparatus for processing a substrate with a focused particle beam The invention relates to a method for processing a substrate with a focussed particle beam which incidents on the substrate, the method comprising the steps of: (a) generating at least one reference mark on the substrate using the focused particle beam and at least one processing gas, (b) determining a reference position of the at least one reference mark, (c) processing the substrate using the reference position of the reference mark, and (d) removing the at least one reference mark from the substrate.
US09721749B2	X-ray generator and fluorescent X-ray analyzer The present invention provides an X-ray generator including an X-ray tube 2 radiating primary X-rays X1 to a specimen S, a housing 3 accommodating the X-ray tube 2, an X-ray radiation area controller 4 limiting the radiation area of the primary X-rays X1 from the X-ray tube 2 to the specimen S, and a device holder 5 holding the X-ray radiation area controller 4 with respect to the housing 3. The X-ray tube includes a case 6, an electron ray source 7 generating electron rays, and a target unit 8 having a base fixed to the case and receiving electron rays through a protruding free end. The device holder has a fixed-base 5a fixed to the housing, directly under the base of the target unit, and a supporting extension 5b extending from the fixed-base in the protrusion direction of the target unit and supporting the X-ray radiation area controller.
US09721745B2	Fuse load-break switch for low-voltage high-power fuses Fuse load-break switch (1) for low-voltage high-power fuses, a fuse contact pair for receiving a fuse (5A, 5B, 5C) being provided within a housing (2) of the fuse load-break switch (1) for each current phase to be disconnected, characterized in that a thermal power loss brought about by the fuses (5A, 5B, 5C) is dissipated into at least one heat dissipation duct (3) provided laterally on the housing (2) of the fuse load-break switch (1).
US09721742B1	Power integrated circuit with autonomous limit checking of ADC channel measurements A power loss protection integrated circuit includes a current switch circuit portion (eFuse) and an autonomous limit checking circuit. The limit checking circuit includes an input analog multiplexer, an ADC, a plurality of capture registers, a state machine, and a flag output terminal. For each capture register, the limit checking circuit further includes an associated lower limit register and an associated upper limit register. The state machine controls the multiplexer and the capture registers so the ADC digitizes voltages on various nodes to the monitored, and stores the results into corresponding capture registers. In integrated circuit has circuitry that allows both a high voltage as well as a high current to be monitored. The value in a capture register is compared to upper and lower limit values. If any capture value is determined to be outside the limits, then a digital flag signal is asserted onto the flag output terminal.
US09721740B1	Zero moment switch mechanism A magnetically-triggered proximity switch includes an actuator assembly disposed within a switch body, and the actuator assembly includes an actuator body extending along an actuator axis. A primary contact and a secondary contact is each coupled to the actuator body and may be separated from a center contact along the actuator axis. The actuator assembly is pivotable between a first switch position and a second switch position about a pivot axis. In the first switch position, the center contact is in contact with a common contact and the first contact is in contact with a primary contact, thereby completing a circuit between a common arm and a primary arm. In the second switch position, the center contact is in contact with the common contact and the second contact is in contact with a secondary contact, thereby completing a circuit between the common arm and a secondary arm.
US09721734B2	Graphene-nanomaterial composite, electrode and electric device including the same, and method of manufacturing the graphene-nanomaterial composite A graphene-nanomaterial composite, an electrode and an electric device including the graphene-nanomaterial composite and a method of manufacturing the graphene-nanomaterial composite include a graphene stacked structure including a plurality of graphene films stacked on one another; and a nanomaterial between the plurality of graphene films and bonded to at least one of the plurality of graphene films by a chemical bond.
US09721732B2	Solid electrolytic capacitor, and production method thereof A production method efficiently produces a box sealed type solid electrolytic capacitor in which a capacitor element is accommodated in a box-shaped case. The method includes a step of preparing a bottom wall substrate having bottom walls. A step forms cathode anode circuit patterns on the bottom wall substrate. A step prepares a peripheral side wall substrate having peripheral side walls. A step prepares a peripheral side wall substrate in which a plurality of through-holes are provided that correspond to plurality of bottom wall structural portions. A step fixes a capacitor element to each bottom wall structural portion of the bottom wall substrate. A step obtains a capacitor continuous member in which a plurality of capacitor structural portions structuring a solid electrolytic capacitor by attaching an upper lid substrate on the peripheral side wall substrate. A step obtains a plurality of solid electrolytic capacitors by cutting the capacitor continuous member.
US09721727B2	Multilayer ceramic capacitor A multilayer ceramic capacitor has a laminate including dielectric layers laminated alternately with internal electrode layers of different polarities, wherein the dielectric layer contains ceramic grains having Ba, Ti, and X (wherein X represents at least one type of element selected from the group consisting of Mo, Ta, Nb, and W) and a variation in the concentration distribution of X above in the ceramic grain is within ±5%. The multilayer ceramic capacitor can offer excellent service life characteristics even when the thickness of the dielectric layer is 0.8 μm or less, as well as excellent bias characteristics.
US09721723B2	Hand-held power tool rechargeable battery having molded housing projection A hand-held power tool rechargeable battery is provided, including at least one rechargeable battery housing, at least one rechargeable battery cell and at least one inductive charging unit, which includes at least one inductive charging coil for charging the at least one rechargeable battery cell. It is provided that the rechargeable battery housing has at least one molded housing projection, which is delimited at least partially by an area of an inductive charging side of the rechargeable battery housing.
US09721717B2	Coil arrangement and method for controlling a coil arrangement A coil arrangement has at least four coil cores around which in each case a coil winding is disposed, wherein the coil cores project over the coil windings in each case with a first coil core end region and a second coil core end region, wherein the coil arrangement furthermore has a first yoke part and a second yoke part. The first and second coil core end regions of the first and second coil core are in each case disposed opposite a first yoke side face of the first or second yoke part respectively, and the first and second coil core end regions of the first and second coil core are in each case disposed opposite a second yoke side face of the first or second yoke part respectively.
US09721716B1	Magnetic component having a core structure with curved openings A magnetic component includes a first core half having a core body with first and second core legs protruding from the core body and a middle core leg protruding from the core body between the first and second core legs. A first U-shaped channel is defined between the first core leg and the middle core leg, and a second U-shaped channel is defined between the second core leg and the middle core leg. A first rounded outer core surface is disposed on the core body oriented substantially parallel to the first U-shaped channel, and a second rounded outer core surface is disposed on the core body oriented substantially parallel to the second U-shaped channel. In some embodiments, a second core half having a similar shape is positioned oppositely adjacent the first core, and a bobbin structure is positioned on the middle core legs such that the first and second U-shaped channels form transverse clearance openings in the magnetic component. Air can be passed transversely through the first and second U-shaped channels to extract heat from the magnetic component.
US09721714B1	Electromagnet and flexible circuit board A flexible circuit board includes a substrate and a circuit unit formed on the substrate. The substrate has two carrying segments and a connecting segment, and the two carrying segments are connected by the connecting segment. The circuit unit has a plurality of conductive lines and at least one connecting line, and each conductive line and the connecting line are separated from each other. The conductive lines are respectively formed on the two carrying segments, and the connecting line is formed on the connecting segment and the two carrying segments. Two opposite ends of each carrying segment are configured to connect with each other to form a tubular structure, and two opposite ends of the connecting line are configured to connect to two adjacent conductive lines respectively formed on the two tubular structures, thereby the circuit unit is formed as a coil.
US09721713B2	Electromagnetic solenoid with inclined pole faces An electromagnetic solenoid assembly is disclosed. The solenoid assembly includes a cup-shaped ring defining a pocket for an annular coil, and including a radially extending portion, a radially inner axially extending flange, and a radially outer axially extending flange. An axially outer end of the radially outer axially extending flange includes a first inclined surface and an axially outer end of the radially inner axially extending flange includes a second inclined surface. A ring-shaped armature includes a radially outer portion and a radially inner portion. An axially outer end of the radially outer portion includes a third inclined surface and an axially outer end of the radially inner portion includes a fourth inclined surface. Pairs of the inclined surfaces are aligned substantially parallel to each other. A distance between the ring-shaped armature and the cup-shaped ring is variable based on energizing the annular coil.
US09721707B2	Superconducting coil device having a coil winding A plurality of windings in a coil winding of a superconducting coil device includes at least one superconducting strip conductor that has a strip-shaped substrate strip and a superconducting layer arranged on the substrate strip. The coil device is subdivided into a plurality of segments in which adjacent windings are cast or adhered together within each segment, adjacent windings being, at most, weakly connected or adhered together in at least one sub-region, in the intermediate region between two adjacent segments.
US09721703B2	Wildlife guard apparatus, modular systems and methods for using the same A wildlife guard apparatus for an electrical insulator body includes at least one guard assembly. Each guard assembly includes a guard member and a base wall member secured to the guard member. The at least one guard assembly is configured or configurable to form an enclosure defining a chamber. In the enclosure configuration, the at least one guard member defines an end opening communicating with the chamber and the at least one base wall member extends across the end opening to close at least a portion thereof. The enclosure is configured to receive the insulator body such that the insulator body includes a first portion and a second portion, the first portion extending through the end opening and adjacent the at least one base wall member, and the second portion being disposed in the chamber. The at least one guard member is formed of a first material and the at least one base wall member is formed of a second material that is softer than the first material.
US09721702B1	Integrated wire harness batch production with double buffer assembly systems Virtually-integrated wire harness design and automated production systems and methods that achieve completely integrated data management by automatically producing scripts to dynamically propagate production commands and data to various subsystems for handling assembling necessary circuits and wire harness layout boards to produce corresponding batches of wire harnesses while script-based methods control configuring, testing, and using wire harness layout boards, and assembling, testing, reworking, and delivering wire harnesses. As derived from CAD-created specifications, the production system uses a programmable, automated wire C&C center prepares individual wire circuits. While automatic wire indexing, sorting, and delivery systems transfer circuits into, and retrieve circuits from, a transportable programmable, automated, indexed storage system equipped with an array of individual circuit tubes, and a script-controlled assembly system sends visual, aural, and other cues to help an assembler populate and configure a wire harness layout board with connector blocks and turn posts, and guides the assembler in building, testing, reworking, and delivering the corresponding batch of wire harnesses.
US09721701B2	Conductive compositions for jacket layers and cables thereof A conductive composition can include a polyolefin base polymer, a high structure carbon black and a low structure carbon black. The conductive composition can exhibit two or more of a thermal conductivity of about 0.27 W/mK or more when measured at about 75° C., a volume resistivity of about 75 ohm-m or less when measured at about 90° C. and an elongation at break of about 300% or more. Cables having coverings formed of such conductive compositions and methods of making such cables are also described herein.
US09721697B2	Organic polymeric bi-metallic composites Organic polymeric bi-metallic alkoxide or aryloxide composites are used as dielectric materials in various devices with improved properties such as improved mobility. These composites comprise a poly(meth)acrylate or polyester having metal coordination sites, and the same or different bi-metallic alkoxide or aryloxide molecules that are coordinated with the organic polymer. The bi-metallic alkoxide or aryloxide molecules can be represented by Structure (I) shown herein. Such composites are generally soluble at room temperature in various organic solvents and be provided in homogeneous organic solvent solutions that can be suitably applied to a substrate to form dielectric materials.
US09721694B2	Fine silver particle powder, method for manufacturing the same, silver paste using the powder and method of use of the paste A method suitable for mass production of nanoparticles with a uniform particle diameter is provided. It is an object to provide a powder of the nanoparticle obtained by this method, a dispersion containing the nanoparticles, and a paste containing the nanoparticles. There is provided a method for manufacturing silver particles including the step of reducing silver in a silver solution containing a protective agent composed of an organic material and a copper component in an amount of 1 to 1,000 ppm relative to the amount of silver to obtain particles having an average particle diameter (DTEM) of 5 to 100 nm as measured using a transmission electron microscope.
US09721691B2	Molybdenum-converter based electron linear accelerator and method for producing radioisotopes The present invention provides a method for producing molybdenum-99 comprising: i) providing an electron accelerator; ii) providing a molybdenum converter/target unit (Mo-CTU) comprising one or more metallic components, wherein each one of said metallic components is made of a material selected from the group consisting of natural molybdenum, molybdenum-100, molybdenum-98, and mixtures thereof; iii) directing an electron beam generated via said electron accelerator onto said Mo-CTU to produce a braking radiation (bremsstrahlung); iv) employing said bremsstrahlung onto said Mo-CTU to produce molybdenum-99 and neutrons via a photo-neutron reaction; v) slowing down the neutrons produced in step iv) with a low atomic liquid, e.g. distilled water; and optionally vi) employing the neutrons produced in step iv) to produce a complementary amount of molybdenum-99 via a neutron capture reaction on said Mo-CTU. The invention further provides an apparatus for producing molybdenum-99.
US09721690B2	Melting device for consolidating contaminated scrap A mobile melting device for consolidating contaminated scrap and to a corresponding method. The melting device has a crucible chamber and a crucible base. The crucible is arranged on the crucible base during operation, and the crucible base and the crucible chamber together form a gas-tight furnace housing. It is thus possible to carry out the method in a vacuum or under protective gas such that even a reactive material can be consolidated. The melting device can be assembled and disassembled with little effort.
US09721689B2	Method for decontamination of an object An object to be decontaminated contaminated with radioactive material, e.g., contaminated soil or water, is introduced into eluting solvent and dissolved, and the radioactive material is separated from the object to be contaminated by elution of the radioactive material into the eluting solvent. The eluting solvent containing the radioactive materials dissolved therein and the object to be decontaminated are separated into solid and liquid. The soil after solid-liquid separation and from which the radioactive material is removed is collected, and the eluting solvent after solid-liquid separation and a separated liquid containing contaminated water are introduced into an electrolysis tank and electrolyzed. Metal ions such as those of the radioactive materials are deposited on the cathode in the electrolysis tank. Hydrogen containing tritium generated in electrolysis is collected in the electrolysis tank. The hydrogen is moved to the outside of the electrolysis tank and trapped.
US09721682B2	Managing nuclear reactor control rods A nuclear reactor control rod drive assembly includes a control rod drive mechanism coupled to a drive shaft and operable to bi-directionally urge the drive shaft through a portion of an inner volume of a reactor vessel at a first force; a control rod manifold coupled to the drive shaft; a plurality of control rods coupled to the control rod manifold, the plurality of control rods adjustable among a plurality of positions within the inner volume of the reactor vessel based on operation of the control rod drive mechanism; and at least one variable strength joint positioned between the control rod drive mechanism and the plurality of control rods.
US09721681B2	Integral pressurized water reactor with compact upper internals assembly An integral pressurized water reactor (PWR) comprises: a cylindrical pressure vessel including an upper vessel section and a lower vessel section joined by a mid-flange; a cylindrical central riser disposed concentrically inside the cylindrical pressure vessel and including an upper riser section disposed in the upper vessel section and a lower riser section disposed in the lower vessel section; steam generators disposed inside the cylindrical pressure vessel in the upper vessel section; a reactor core comprising fissile material disposed inside the cylindrical pressure vessel in the lower vessel section; and control rod drive mechanism (CRDM) units disposed inside the cylindrical pressure vessel above the reactor core and in the lower vessel section. There is no vertical overlap between the steam generators and the CRDM units.
US09721671B2	Memory device which performs verify operations using different sense node pre-charge voltages and a common discharge period Sense circuits in a memory device can be pre-charged to different levels in a sensing process to reduce the amount of time used for sensing. During sensing of first and second memory cells, a control circuit pre-charges first and second sense circuits to first and second voltages, respectively. The first and second sense circuits are associated with the first and second memory cells, respectively. Also, during the sensing, a control gate voltage is applied to the first and second memory cells. The control circuit allows the first and second sense node voltages to discharge in a common discharge period and the cells are sensed using a common trip condition. The first and second memory cells are therefore subject to different concurrent verify tests.
US09721670B1	Semiconductor device and operating method thereof A semiconductor device includes a plurality of first memory strings each first memory string having a channel with a first length and a plurality of second memory strings each second memory string having a channel with a second length shorter than the first length. A method of operating the semiconductor device includes: performing a first read operation on the first read unit, wherein the first read unit includes the first memory cells sharing the same first word line among first memory cells included in the plurality of the first memory strings; and performing a second read operation on the second read unit, wherein the second read unit includes the second memory cells sharing the same second word line among second memory cells included in the plurality of the second memory strings.
US09721669B2	Data protection method, memory control circuit unit and memory storage apparatus A data protection method for a memory storage apparatus is provided. The method includes obtaining a current system time from a host system as a boot time, if the memory storage apparatus is powered on, and a basic input/output system of the host system loads and executes instruction programs in the expansion ROM of the memory storage apparatus for transmitting the current system time to the memory storage apparatus. The method also includes obtaining a shutdown time corresponding to the memory storage apparatus; calculating an off time from the shutdown time to the boot time and performing a refresh operation on physical erasing units of a rewritable non-volatile memory in the memory storage apparatus if the off time is longer than an off time threshold.
US09721668B2	3D non-volatile memory array with sub-block erase architecture A memory device has a divided reference line structure which supports sub-block erase in NAND memory including a plurality of blocks. Each block in the plurality of blocks is coupled to a set of Y reference lines, where Y is two or more. Each block in the plurality of blocks includes a single reference select line (RSL), which is operable to connect each sub-block in the block to a corresponding reference line in the set of Y reference lines. A control circuit can be included on the device which is configured for an erase operation to erase a selected sub-block in a selected block.
US09721667B2	High voltage switch circuit for switching high voltage without potential drop and semiconductor memory device including the same There are provided a high voltage switch circuit and a semiconductor memory device including the same. A high voltage switch circuit may include a switching circuit including a first depletion transistor and a first high voltage transistor, which are coupled in series between an input terminal and an output terminal, and a control signal generator for applying, to the first depletion transistor, a control signal having the same potential level as an input voltage applied to the input terminal, in response to a first enable signal and a second enable signal.
US09721665B2	Data writing method and system A data writing method for writing data to a flash memory includes writing an initial value to the data storage area, determining whether or not the writing of the initial value is performed normally based on a write flag, writing data to the data storage area when the writing is performed normally, and erasing a block including the data storage area when the writing is not performed normally. An initial value is written to the data storage area before writing data, so that whether or not an error correction code storage area contains the initial value may be confirmed. An erase operation of the block is performed only when the error correction code storage area does not contain the initial value, so that the number of times of erasure of the block may be reduced and the life of the product may be increased.
US09721663B1	Word line decoder circuitry under a three-dimensional memory array The total chip area for a three-dimensional memory device can be reduced employing a design layout in which the word line decoder circuitry is formed underneath an array of memory stack structures. The interconnection between the word lines and the word line decoder circuitry can be provided by forming discrete word line contact via structures. The discrete word line contact via structures can be formed by employing multiple sets of etch masks with overlapping opening areas and employed to etch a different number of pairs of insulating layers and electrically conductive layers, thereby obviating the need to form staircase regions having stepped surfaces. Sets of at least one conductive interconnection structure can be employed to provide vertical electrical connection to the word line decoder circuitry. Bit line drivers can also be formed underneath the array of memory stack structures to provide greater areal efficiency.
US09721656B2	Encoded cross-point array A device includes a cross-point array and an access circuit to access subsets of memory elements respectively corresponding to encoded blocks of data. For each of the subsets of memory elements, a row or a column of the cross-point array that includes a first memory element in the subset and a second memory element in the subset further includes a third memory element that is between the first and second memory elements along the row or column and is in one of the subsets corresponding to another of the encoded blocks.
US09721652B2	State dependent sensing for wordline interference correction A variable compensation pass bias based on a state being sensed in non-volatile memory based is provided. Shifts in the apparent charge stored by a memory cell can occur because of coupling based on charge stored by adjacent cells. To account for the shift, compensations can be applied to an adjacent word line when reading based on the different possible conditions of an adjacent cell. The effects of coupling may be more pronounced for memory cells in lower states corresponding to lower threshold voltages. A compensation pass bias can be reduced as the state being sensed at a selected word line increases to account for the different effects. A compensation pass bias for an adjacent word line may be reduced with the application of larger read reference voltages to a selected word line. Other variations to a compensation pass bias are provided.
US09721651B2	Write driver and level shifter having shared transistors A circuit includes: a first data line; a second data line; a write driver including first and second transistors; a first switch connected in series with the first transistor to form a first series-connected pair; a second switch in series with the second transistor to form a second series-connected pair; and a level shifter which includes the first and second transistors. The first series-connected pair is coupled between a first voltage node and the first data line. The second series-connected pair is coupled between the first voltage node and the second data line. Gate terminals of the first and second transistors are correspondingly cross-coupled with the second and first data lines.
US09721650B1	Architecture to improve write-ability in SRAM A memory and apparatus are disclosed. The memory includes a memory core having a plurality of memory cells. The memory also includes a first write assist circuit configured to assist writing to a first group of the plurality of memory cells of the memory core. Additionally, the memory includes a second write assist circuit configured to assist writing to a second group of the plurality of memory cells of the memory core. The apparatus includes at least one processor. The apparatus also includes a memory array. The memory array includes a memory core having a plurality of memory cells. The memory also includes a first write assist circuit configured to assist writing to a first group of the plurality of memory cells of the memory core and a second write assist circuit configured to assist writing to a second group of the plurality of memory cells of the memory core.
US09721641B2	Apparatus, method and system for memory device access with a multi-cycle command Techniques and mechanisms for determining a timing of a command to access a memory device resource. In an embodiment, a multi-cycle command which is exchanged from a memory controller to a memory device, wherein the multi-cycle command indicates an access to a bank of the memory device. Timing of the one or more other commands is controlled, based on the multi-cycle command, to enforce a time delay parameter which describes an operational constraint of the memory device. In another embodiment, timing of one or more commands is determined with reference to a beginning of a last cycle of a multi-cycle command.
US09721639B1	Memory cell imprint avoidance Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A cell may be written with a value that is intended to convey a different logic state than may typically be associated with the value. For example, a cell that has stored a charge associated with one logic state for a time period may be re-written to store a different charge, and the re-written cell may still be read to have the originally stored logic state. An indicator may be stored in a latch to indicate whether the logic state currently stored by the cell is the intended logic state of the cell. A cell may, for example, be re-written with an opposite value periodically, based on the occurrence of an event, or based on a determination that the cell has stored one value (or charge) for a certain time period.
US09721636B1	Method for controlled switching of a MRAM device A method and apparatus for controlled switching of a magnetoresistive random access memory device is disclosed herein. The method includes delivering a current to a magnetoresistive random access memory device, wherein the MRAM device is in a first state, measuring a voltage drop across the magnetoresistive random access memory device in real-time with a resistance detector, wherein a voltage drop beyond a threshold voltage equates to switching from a first state to a second state, the first state different from the second state, determining whether the MRAM device has switched from the first state to the second state, and stopping the current delivered to the magnetoresistive random access memory device.
US09721635B2	Electronic device having semiconductor memory comprising variable resistance elements for storing data Provided are, among others, memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device which includes two variable resistance elements in each storage cell, thereby increasing margin and speed of a read operation. One disclosed electronic device includes a semiconductor memory unit which, in one implementation, in addition to two variable resistance elements, further includes a bit line and a bit line bar formed at a metal level; a first word line formed at a transistor level lower than the metal level, and extended in a direction perpendicular to the bit line or the bit line bar; a first selecting element formed at the transistor level and coupled to the bit line and the first word line; a second selecting element formed at the transistor level and coupled to the bit line bar and the first word line.
US09721633B2	Semiconductor memory device with address latch circuit A semiconductor memory device includes: banks each including a memory cell array; word lines connected to rows in each of the banks; and an address latch circuit configured to latch a full address specifying one of the word lines, the full address including a first address and a second address. The address latch circuit receives a first command and a second command to latch the first address and the second address in accordance with the first command and the second command, respectively. Paths for the first address and the second address are configured to be separate from each other.
US09721631B2	Precessional magnetization reversal in a magnetic tunnel junction with a perpendicular polarizer A magnetic device that includes a perpendicular magnetized polarizing layer configured to provide a first spin-torque and an in-plane magnetized free layer having a magnetization vector having at least a first stable state and a second stable state. The magnetic device also includes a reference layer configured to provide a second spin-torque. The first spin-torque and the second spin-torque can combine. The in-plane magnetized free layer and the reference layer form a magnetic tunnel junction and the combined first spin-torque and second spin-torque influences the magnetic state of the in-plane magnetized free layer. An application of a voltage pulse, having either positive or negative polarity and a selected amplitude and duration, through the magnetic device causes the magnetization vector to oscillate between the first stable state and the second stable state for a portion of the duration regardless of an initial state of the magnetization vector.
US09721627B2	Method and apparatus for aligning signals A method and corresponding apparatus for aligning a data signal with a corresponding clock signal include oversampling the data signal based on the corresponding clock signal and generating corresponding data samples. An indication of skew between the data signal and the corresponding clock signal is detected based on data samples. A variable delay line coupled to the data signal is then adjusted based on the indication of skew detected. According to at least one example implementation, the data signal is oversampled based on the corresponding clock signal and multiple time-shifted versions of the corresponding clock signal. At least one signal of the corresponding clock signal and the multiple time-shifted versions of the corresponding clock signal is employed in sampling the data signal at a potential transition edge of the data signal.
US09721626B2	Built-in test circuit of semiconductor apparatus A semiconductor apparatus includes a clock buffer and a reference voltage generation unit. The clock buffer generates an internal clock signal, based on first and second clock signals, in a first operation mode, and generates the internal clock signal, based on the first clock signal and a reference voltage, when a normal operation test is performed in a second operation mode. The reference voltage generation unit generates the reference voltage when the normal operation test is performed in the second operation mode.
US09721622B2	Systems with memory segmentation and systems with biasing lines to receive same voltages during accessing Memory devices, memory arrays, and methods of operation of memory arrays with segmentation. Segmentation elements can scale with the memory cells, and may be uni-directional or bi-directional diodes. Biasing lines in the array allow biasing of selected and unselected select devices and segmentation elements with any desired bias, and may use biasing devices of the same construction as the segmentation elements.
US09721620B2	Hermetic sealing of hard disk drive using laminated film seal A hermetically-sealed hard disk drive (HDD) utilizes a laminated film seal to seal an HDD cover-to-base interface. The laminated film seal may be constructed of a heat sealant layer hermetically-coupled to and forming a seal with the base, a barrier layer which inhibits gas from escaping from inside the HDD, and a film surface protective layer which protects the heat sealant and barrier layers. Embodiments may include a heat sealant layer comprising a thermoplastic polymer such as polypropylene, a barrier layer comprising a metal such as aluminum, and a film surface protective layer comprising a thermoplastic polymer such as polyethylene terephthalate.
US09721618B2	Storage cartridge dock system A storage cartridge dock system and method are provided. The storage cartridge dock system in one example includes a case including a front panel, an upper cartridge slot formed in the front panel of the case and configured to receive an upper storage cartridge, with the upper cartridge slot including an upper interface connector, at least a lower cartridge slot formed in the front panel and configured to receive a lower storage cartridge, with the at least lower cartridge slot including a lower interface connector, and a first external connector and a second external connector coupled to the upper interface connector of the upper cartridge slot and coupled to the lower interface connector of the at least lower cartridge slot.
US09721615B2	Non-linear video review buffer navigation In one embodiment, a method for non-linear navigation of video content includes: receiving the video content in a live video review buffer, where the video content is indexed according to a time code index, defining video content windows in the video content according to blocks of time according to the time code index, displaying a grid of video tiles, where each of the video tiles is associated with one of the video content windows in the live video review buffer, defining an in-focus status for one of the video tiles, and in response to user input, navigating the video content window associated with the video tile with the in-focus status.
US09721614B2	Display device and control method thereof Disclosed is a control method of a display device including displaying a playback screen of video images, the playback screen of the video images showing one video image and a progress bar to visualize the progression of the video images, acquiring time information regarding respective bookmark images associated with the video images, the bookmark images respectively including the time information in the sequence of the video images and/or frame information regarding one video image corresponding to the time information, and displaying the bookmark images close to the progress bar at positions corresponding to the time information regarding the respective bookmark images. When a difference between first time information regarding a first bookmark image and second time information regarding a second bookmark image is a time threshold or less, the first and second bookmark images among the bookmark images are displayed as overlapping each other.
US09721608B2	Spindle motor and disk drive apparatus A motor includes a rotating portion including a rotor magnet, and arranged to rotate about a central axis extending in a vertical direction; a bearing mechanism arranged to support the rotating portion such that the rotating portion is rotatable about the central axis; a stator portion arranged opposite to the rotor magnet; a housing arranged to accommodate the rotating portion, the bearing mechanism, and the stator portion therein; and a sealing member. The housing includes a base portion substantially in a shape of a plate and arranged to extend radially below the rotating portion. The base portion includes a first lower surface arranged to face downward, and a through hole arranged to pass through the base portion in the vertical direction and arranged to have a portion of the bearing mechanism arranged therein. The sealing member is arranged to cover a lower side of the through hole, and includes at least a metal layer.
US09721606B2	Magnetic tape and method of manufacturing the same The magnetic tape has a magnetic layer containing ferromagnetic powder and binder on one surface of a nonmagnetic support, and has a backcoat layer containing nonmagnetic powder and binder on the other surface thereof, wherein the magnetic layer contains one or more components selected from the group consisting of a fatty acid and a fatty acid amide; the backcoat layer has a thickness of less than or equal to 0.30 μm and contains one or more components selected from the group consisting of a fatty acid and a fatty acid amide; a magnetic layer side C—H derived C concentration is greater than or equal to 45 atom %; and a backcoat layer side C—H derived C concentration is greater than or equal to 35 atom %.
US09721599B2	Suspension board with circuit and producing method thereof A suspension board with circuit includes a metal supporting board, an insulating base layer formed on one side of the metal supporting board in a thickness direction thereof, a conductive layer, and an insulating cover layer formed on the one side of the insulating base layer to cover the conductive layer. Either one of the insulating base layer and the insulating cover layer includes an opening extending therethrough in the thickness direction. The conductive layer includes a wire formed on the one side of the insulating base layer, and a connection terminal electrically connected to the wire and exposed from the opening to be capable of electrical connection to an electronic element. The suspension board with circuit further includes a protective layer for protecting the connection terminal exposed from the opening.
US09721593B2	Near field transducer (NFT) including peg and disc of different materials Devices having air bearing surfaces (ABS), the devices include a near field transducer (NFT) that includes a disc configured to convert photons incident thereon into plasmons; and a peg configured to couple plasmons coupled from the disc into an adjacent magnetic storage medium, wherein the disc includes a disc material and the peg includes a peg material, wherein the disc material is different from the peg material and wherein the disc material has a first real part of the permittivity and a peg material has a second real part of the permittivity and the second real part of the permittivity is not greater than the first real part of the permittivity.
US09721591B1	Magnetic recording write apparatus having a pole having an aspect ratio greater than one and an auxiliary pole A magnetic write apparatus has a media-facing surface (MFS) and includes an auxiliary pole, coil(s) and a main pole having a pole tip and a yoke. The pole tip occupies part of the MFS. The yoke has a yoke length measured from the MFS in a yoke direction perpendicular to the MFS. The yoke length is less than four microns. The main pole has a total length in the yoke direction and a width in a cross-track direction. The main pole is continuous along the total length. The aspect ratio of the main pole is the total length divided by the width and exceeds one. The main pole includes surface(s) having a nonzero acute flare angle from the MFS. The auxiliary pole is adjacent to the main pole and recessed from the MFS by not more than 1.05 micron. The coil(s) energizes the main pole and have not more than two turns.
US09721586B1	Voice controlled assistant with light indicator A voice controlled assistant has a housing to hold one or more microphones, one or more speakers, and various computing components. The housing has an elongated cylindrical body extending along a center axis between a base end and a top end. The microphone(s) are mounted in the top end and the speaker(s) are mounted proximal to the base end. A control knob is rotatably mounted to the top end of the housing to rotate about the center axis. A light indicator is arranged on the control knob to exhibit various appearance states to provide visual feedback with respect to the one or more functions being performed by the assistant. In one case, the light indicator is used to uniquely identify participants involved in a call.
US09721583B2	Integrated sensor-array processor An integrated sensor-array processor and method includes sensor array time-domain input ports to receive sensor signals from time-domain sensors. A sensor transform engine (STE) creates sensor transform data from the sensor signals and applies sensor calibration adjustments. Transducer time-domain input ports receive time-domain transducer signals, and a transducer output transform engine (TTE) generates transducer output transform data from the transducer signals. A spatial filter engine (SFE) applies suppression coefficients to the sensor transform data, to suppress target signals received from noise locations and/or amplification locations. A blocking filter engine (BFE) applies subtraction coefficients to the sensor transform data, to subtract the target signals from the sensor transform data. A noise reduction filter engine (NRE) subtracts noise signals from the BFE output. An inverse transform engine (ITE) generates time-domain data from the NRE output.
US09721582B1	Globally optimized least-squares post-filtering for speech enhancement Existing post-filtering methods for microphone array speech enhancement have two common deficiencies. First, they assume that noise is either white or diffuse and cannot deal with point interferers. Second, they estimate the post-filter coefficients using only two microphones at a time, performing averaging over all the microphones pairs, yielding a suboptimal solution. The provided method describes a post-filtering solution that implements signal models which handle white noise, diffuse noise, and point interferers. The method also implements a globally optimized least-squares approach of microphones in a microphone array, providing a more optimal solution than existing conventional methods. Experimental results demonstrate the described method outperforming conventional methods in various acoustic scenarios.
US09721578B2	System for maintaining reversible dynamic range control information associated with parametric audio coders On the basis of a bitstream (P), an n-channel audio signal (X) is reconstructed by deriving an m-channel core signal (Y) and multichannel coding parameters (a) from the bitstream, where 1≦m
US09721576B2	Compressed domain encoding apparatus and methods for use with media signals Apparatus, methods, and articles of manufacture for encoding a compressed media stream are disclosed. Example method of watermarking a digital media signal disclosed herein include copying compressed audio packets associated with an audio stream included in a transport stream of the digital media signal into respective frames of compressed audio data to be watermarked to include media identification information. Such example methods can also include determining whether a composition of the transport stream has changed during copying of the compressed audio packets into the respective frames of the compressed audio data. Such example methods can further include, if the composition of the transport stream has changed, writing the frames of the compressed audio data to an output stream corresponding to the digital media signal without applying a watermark to the frames of the compressed audio data.
US09721575B2	System for dynamically creating and rendering audio objects Embodiments of systems and methods are described for providing backwards compatibility for legacy devices that are unable to natively render non-channel based audio objects. These systems and methods can also be beneficially used to produce a reduced set of audio objects for compatible object-based decoders with low computing resources.
US09721571B2	System and method for voice print generation A computer-implemented method for enrolling in a database voice prints generated from audio streams may include receiving an audio stream of a communication session and creating a preliminary association between the audio stream and an identity of a customer that has engaged in the communication session based on identification information. The method may further include determining a confidence level of the preliminary association based on authentication information related to the customer and if the confidence level is higher than a threshold, sending a request to compare the audio stream to a database of voice prints of known fraudsters. If the audio stream does not match any known fraudsters, sending a request to generate from the audio stream a current voice print associated with the customer and enrolling the voice print in a customer voice print database.
US09721570B1	Outcome-oriented dialogs on a speech recognition platform A speech recognition platform configured to receive an audio signal that includes speech from a user and perform automatic speech recognition (ASR) on the audio signal to identify ASR results. The platform may identify: (i) a domain of a voice command within the speech based on the ASR results and based on context information associated with the speech or the user, and (ii) an intent of the voice command. In response to identifying the intent, the platform may perform multiple actions corresponding to this intent. The platform may select a target action to perform, and may engage in a back-and-forth dialog to obtain information for completing the target action. The action may include streaming audio to the device, setting a reminder for the user, purchasing an item on behalf of the user, making a reservation for the user or launching an application for the user.
US09721569B2	Gaussian mixture model accelerator with direct memory access engines corresponding to individual data streams Systems, apparatus and methods are described including operations for memory access via direct memory access engines, of a Gaussian Mixture Model Accelerator, corresponding to individual data streams.
US09721567B2	Multi-level voice menu Methods, apparatus, and computer-readable media are described herein related to a user interface (UI) that can be implemented on a head-mountable device (HMD). The UI can include a voice-navigable UI. The voice-navigable UI can include a voice navigable menu that includes one or more menu items. The voice-navigable UI can also present a first visible menu that includes at least a portion of the voice navigable menu. In response to a first utterance comprising one of the one or more menu items, the voice-navigable UI can modify the first visible menu to display one or more commands associated with the first menu item. In response to a second utterance comprising a first command, the voice-navigable UI can invoke the first command. In some embodiments, the voice-navigable UI can display a second visible menu, where the first command can be displayed above other menu items in the second visible menu.
US09721563B2	Name recognition system A speech recognition system uses, in one embodiment, an extended phonetic dictionary that is obtained by processing words in a user's set of databases, such as a user's contacts database, with a set of pronunciation guessers. The speech recognition system can use a conventional phonetic dictionary and the extended phonetic dictionary to recognize speech inputs that are user requests to use the contacts database, for example, to make a phone call, etc. The extended phonetic dictionary can be updated in response to changes in the contacts database, and the set of pronunciation guessers can include pronunciation guessers for a plurality of locales, each locale having its own pronunciation guesser.
US09721562B2	Generating representations of acoustic sequences Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating representation of acoustic sequences. One of the methods includes: receiving an acoustic sequence, the acoustic sequence comprising a respective acoustic feature representation at each of a plurality of time steps; processing the acoustic feature representation at an initial time step using an acoustic modeling neural network; for each subsequent time step of the plurality of time steps: receiving an output generated by the acoustic modeling neural network for a preceding time step, generating a modified input from the output generated by the acoustic modeling neural network for the preceding time step and the acoustic representation for the time step, and processing the modified input using the acoustic modeling neural network to generate an output for the time step; and generating a phoneme representation for the utterance from the outputs for each of the time steps.
US09721557B2	System and apparatus for boomless-microphone construction for wireless helmet communicator with siren signal detection and classification capability Boomless-microphones are described for a wireless helmet communicator with siren signal detection and classification capabilities. An acoustic component receives an audio signal and comprises a left acoustic sensor and a right acoustic sensor. The left acoustic sensor is mountable or attachable to the surface of a left wall of a helmet and the right acoustic sensor is mountable or attachable to the surface of a right wall. A speaker component can generate an echoless audio signal via signal inversion of the audio signal, outputs to a left speaker mountable or attachable to a left ear area of the helmet and a right speaker mountable or attachable to a right ear area of the helmet. A signal enhancement component can increase an intensity of the first audio signal associated with an emergency siren based on a determined proximity of an emitting emergency vehicle or emergency object to the device.
US09721556B2	Downlink tone detection and adaptation of a secondary path response model in an adaptive noise canceling system An adaptive noise canceling (ANC) circuit adaptively generates an anti-noise signal from a reference microphone signal that is injected into the speaker or other transducer output to cause cancellation of ambient audio sounds. An error microphone proximate the speaker provides an error signal. A secondary path estimating adaptive filter estimates the electro-acoustical path from the noise canceling circuit through the transducer so that source audio can be removed from the error signal. Tones in the source audio, such as remote ringtones, present in downlink audio during initiation of a telephone call, are detected by a tone detector using accumulated tone persistence and non-silence hangover counting, and adaptation of the secondary path estimating adaptive filter is halted to prevent adapting to the tones. Adaptation of the adaptive filters is then sequenced so any disruption of the secondary path adaptive filter response is removed before allowing the anti-noise generating filter to adapt.
US09721552B2	Floor effect unit A floor effect unit for actuating a musical effect device is provided. The floor effect unit includes a base plate having at least one electrode configured to collect electric charges; a conductive plate having at least one pressable portion configured to collect electric charges having a polarity opposite to the polarity of charges collected on the electrode, pressable portion being configured such that pressing thereon reduces the distance between the at least one pressable portion and the at least one electrode changing thereby the capacitance therebetween; and a spacer disposed between the base plate and the conductive plate and being configured to provide dielectric gap therebetween, a printed circuit board coupled to the at least one electrode and the conductive plate and being configured to generate an output signal for operating the musical effect device in response to a change in the capacitance.
US09721546B2	Musical instrument vibrational energy modification apparatus and system A musical wind instrument, comprising a mouthpiece, key mechanism, body, and an alternative material bridge that is couple a first and second opposite facing tube. There is in an alternative embodiment at least one coupling mechanism affixed to at least one of the opposite facing tubes designed to releasably hold the wood based material bridge against the first and second tubes. Alternatively there is a musical wind instrument made of a predominantly first material, comprising a mouthpiece, key mechanism, and body; at least a first and second tube having a portion thereof being spatially opposite to each other respectively, and a bridge, having a first and second end that are coupled to the first and second tube respectively, wherein the bridge is made of an alternative material that is different from the predominantly first material of the instrument.
US09721545B2	Carrying device for a wind instrument The invention relates to a device for carrying a wind instrument. The device comprises a Y-shaped frame having two arms (2, 2′) extending upward, which are arcuate at the free ends (9) of the arms, and a third arm extending downward, which forms a support (4). The two arms (2, 2′) and the support (4) converge in a connecting element (3) and are connected to each other there. The arms (2, 2′) can be designed as one piece together with the support (4) and the connecting element (3) in order to form a unit, or the arms (2, 2′) can be connected to the connecting element (3) in an insertable or pivotable manner. A retaining element (5) for hanging the wind instrument (17) is provided on the connecting element (3).
US09721544B2	Metal-plated music string A music string for a fretted instrument with extended life of initial tonal characteristics has a central core wire having a wrapped wire wound around it. The wrapped wire is coated with a metal or metal alloy. The metal coating may be nickel or tin or alloys of nickel or tin. The coating may be applied on the wrapped wire by a process of electroplating.
US09721542B2	Guitar conversion system and method A guitar conversion system for the assembly of a guitar in an easy quick manner, from conventional guitar designs to hybrid guitars. The guitar conversion system includes at least one main body portion and at least one side body portion. Preferably a pair of side body portions is provided. The main body portion includes a headstock, machine heads (or pegheads, or tuners), a neck, and pickups in communication with electronic controls located on the side body portion. The main body portion includes left and right edge walls having attachment means for releasably attaching at least one other main body portion or at least one side body portion to the main body. The side body portion includes at least one electrical control integrated therein for electronic communication with the main body portion. The side body portion comprising a top side wall and at least one side attachment portion that is adapted to mate with the attachment means of the main body portion. The guitar conversion system provides the ability to interchange the body portion and/or each of the side body portions to change any resultant guitar thereof ranging from conventional constructs to hybrid constructs.
US09721523B2	Driving device of display device A driving device of a display apparatus includes: a gate driver, a gate on voltage modulator, and a signal controller. The gate driver includes a plurality of gate driving circuits, each of the gate driving circuits being configured to: generate a gate signal according to a gate control signal, and apply the gate signal to at least one gate line. The gate on voltage modulator is configured to: modulate a gate on voltage according to a modulation control signal, and generate a first modulated gate on voltage. The signal controller is configured to generate the modulation control signal and the gate control signal. At least one of the plurality of gate driving circuits includes an amplifier configured to: receive the first modulated gate on voltage, and output a second modulated gate on voltage including substantially the same waveform as the first modulated gate on voltage.
US09721512B2	AMOLED displays with multiple readout circuits The OLED voltage of a selected pixel is extracted from the pixel produced when the pixel is programmed so that the pixel current is a function of the OLED voltage. One method for extracting the OLED voltage is to first program the pixel in a way that the current is not a function of OLED voltage, and then in a way that the current is a function of OLED voltage. During the latter stage, the programming voltage is changed so that the pixel current is the same as the pixel current when the pixel was programmed in a way that the current was not a function of OLED voltage. The difference in the two programming voltages is then used to extract the OLED voltage.
US09721509B2	Reduced off current switching transistor in an organic light-emitting diode display device An active matrix organic light emitting diode (OLED) display device includes an array of pixels, each pixel including an OLED, a driving transistor (DT) coupled to drive current through the OLED, a storage capacitor, and a scanning transistor (ST) coupled to control charge on the storage capacitor corresponding to a data voltage for said pixel. The display device also includes a timing controller configured to control the ST of each pixel to update the charge stored on the storage capacitor of each pixel at a frame rate including at least one frequency within a range of 1-10 Hertz (Hz).
US09721508B2	Pixel circuit and driving method thereof, organic light-emitting display device A pixel circuit, a driving method of a pixel circuit and an organic light-emitting display device are provided. The pixel circuit includes a first transistor having a gate electrode receiving a first light-emitting signal, a first terminal receiving a first reference voltage, and a second terminal connected to a first node; a second transistor having a gate electrode receiving a first scanning signal, a first terminal receiving a second reference voltage, and a second terminal connected to a second node; a third transistor having a gate electrode connected to the second node, a first terminal connected to a third node and a second terminal connected to a fourth node; a fourth transistor having a gate electrode receiving a second scanning signal, a first terminal receiving a data signal, and a second terminal connected to the third node; a fifth transistor having a gate electrode receiving the second scanning signal, a first terminal connected to the fourth node, and a second terminal connected to the second node; a sixth transistor having a gate electrode receiving a second light-emitting signal, a first terminal receiving a first power supply voltage, and a second terminal connected to the third node; a seventh transistor having a gate electrode receiving the second light-emitting signal, a first terminal receiving the first power supply voltage, and a second terminal connected to the first node; an eighth transistor having a gate electrode receiving the second light-emitting signal and a first terminal connected to the fourth node; a light-emitting element having a first terminal connected to the second terminal of the eighth transistor and a second terminal receiving a second power supply voltage; and a first capacitor having a first terminal connected to the first node and a second terminal connected to the second node.
US09721505B2	Pixel circuits for AMOLED displays A system for driving a display that includes a plurality of pixel circuits arranged in an array, each of the pixel circuits including a light emitting device and a driving transistor for conveying a driving current through the light emitting device. Methods of measuring characteristics of circuit elements of pixels sharing a monitor line include the control of biasing to selectively turn off circuit elements or render their response known while measuring other circuit elements of interest.
US09721504B2	Current sensing circuit and organic light emitting diode display including the same Discussed are a current sensing circuit capable of compensating for degradation of an organic light emitting diode by sensing a current of the organic light emitting diode, and an organic light emitting diode display having the same. The current sensing circuit according to an embodiment includes a plurality of sensing modules configured to sense a pixel current from a display panel having an organic light emitting diode on each of a plurality of pixels, and to output a sensing voltage according to a sensing result; and an analog-to-digital converter configured to convert the sensing voltage into an analog-to-digital voltage, and to output sensing data.
US09721500B2	Display device having touch screen A display device comprises: a pixel array substrate comprising first pads; a touch screen substrate comprising second pads; an adhesive film that attaches the pixel array substrate and the touch screen substrate; and a conductive sealant that electrically connects the first pads and the second pads between the pixel array substrate and the touch screen substrate. The adhesive film comprises: an opening with the conductive sealant applied thereto; and an extension portion that surrounds the opening.
US09721498B2	Organic light emitting diode display An OLED pixel includes a switching transistor to transfer a data signal to a driving transistor. The switching transistor includes a first gate coupled to receive a first scan signal and a second gate coupled to receive a second scan signal received before the first scan signal. A storage capacitor is connected to a first terminal of the driving transistor and the first transistor passes a data signal to a second terminal of the driving transistor based on the first and second scan signals. A compensation transistor and an initialization transistor are also included. The compensation transistor includes first and second gates to receive the first scan signal to establish a signal path between the first terminal and a third terminal of the driving transistor. The initialization transistor establishes a signal path between an initialization voltage and the storage capacitor between its two gates.
US09721493B2	Touch-type input device A touch-type input device includes a touch panel. Capacitors are formed at intersections of drive electrodes and sensor electrodes in the touch panel. A controller determines whether the touch panel has been touched from data values, each indicating a change amount in the capacitance from a reference value. When detecting from the data values a change in the capacitance to a reverse polarity differing from the polarity when a human body touches the touch panel, the controller determines that external noise caused the change and stops detecting touching of the touch panel. When the controller detects a change in the capacitance to the reverse polarity, at the same time, the location of where the capacitance of the reverse polarity is detected does not shift, the controller determines that the change in the capacitance is irrelevant to influence of external noise and continues to detect touching of the touch panel.
US09721491B2	Display and method of transmitting signals therein A display includes first pixels, second pixels, a first de-multiplexer and a second de-multiplexer. The first de-multiplexer transmits a first data signal to the first pixels sequentially in response to first control signals. The second de-multiplexer transmits a second data signal to the second pixels sequentially in response to second control signals. The polarity of the first data signal is different from that of the second data signal. Levels of the first control signals are switched between a first voltage level and a zero voltage level, corresponding to the polarity of the first data signal. Levels of the second control signals are switched between a second voltage level and the zero voltage level, corresponding to the polarity of the second data signal. The first voltage level is different from the second voltage level. A method of transmitting signals in a display is also disclosed herein.
US09721485B2	Freight removal regulation apparatus A method and apparatus to regulate the use and removal of freight. The apparatus includes a sensing element, a stoppage element, and at least one actuator. The sensing element is operable to determine the presence of freight. Stoppage element can alternate between a first condition configured to impede freight removal and a second condition configured to permit freight removal. The presence of freight maintains stoppage element in the first condition absent engagement of the at least one actuator and engagement of the at least one actuator switches stoppage element to the second condition when freight is present.
US09721482B2	Pregnant abdominal system and associated devices, systems, and methods Simulated pregnant abdominal systems and associated devices, systems, and methods are provided. The pregnant abdominal systems allow an interactive scenario simulating a routine gestation palpation of a fetal baby, the performance of an external cephalic version as well as the Leopold's Maneuvers. Further, the pregnant abdominal systems can be used as a platform to physically hear the fetus heartbeat using stethoscope, Doppler instrument, or a prenatal monitor. Further, in some implementations the fetus can be visualized using standard ultrasound systems.
US09721477B2	System and method for gating notifications System and methods of gating notifications for content objects of an electronic learning platform are described herein. The notification may be conditioned on whether the content object is available to a user receiving the notification, or the state of the content object, for example.
US09721475B2	Systems and methods for displaying object and/or approaching vehicle data within an airport moving map Systems and methods for displaying object data within an airport moving map (“AMM”) are disclosed. In various embodiments, the systems may comprise an avionics database, a flight management system comprising a processor communicatively coupled to the avionics database, and/or a display communicatively coupled to the processor, the processor configured to receive AMM data from the avionics database, receive object data, and/or display the AMM, the AMM including an image of the object, the AMM further including an image of an area that may be obscured from a field of view of a pilot by the object.
US09721474B2	Method, measuring device and control unit for adaptation of vehicle convoy control A method (400), control device (240) and measuring unit (230) for adapting a control algorithm having at least one driver-dependent parameter, which control algorithm governs the control of a vehicle convoy (200) in which at least a first vehicle 220A with a first driver (210A) and a second vehicle 220B with a second driver (210B) are included. The method includes measurement (401) of at least one physical characteristic of the first driver (210A), determination (402) of the stress level of the driver based on the performed measurement (401), and adaptation (403) of the control algorithm to the determined (402) stress level of the driver.
US09721472B2	Formulating lane level routing plans The present invention extends to methods, systems, and computer program products for formulating lane level routing plans. In general, aspects of the invention are used in motorized vehicles to guide a driver to a terminal vehicle configuration according to a lane level routing plan that balances travel time with routing plan robustness. A lane level routing plan can be based on terminal guidance conditions (e.g., exiting a highway in the correct off ramp lane), statistical patterns of lanes themselves, current vehicle state, and state of the local environment near the vehicle. Lane level routing plans can be communicated to the driver with audio, visual, and/or haptic cues. Lane level routing plans can be revised online and in (essentially) real-time in response to changing conditions in the local environment (e.g., a trailing vehicle in a neighboring lane has decided to increase speed).
US09721471B2	Learning lanes from radar data Systems, methods, and apparatuses are disclosed for determining lane information of a roadway segment from vehicle probe data. Probe data is received from radar sensors of vehicles at a road segment, where the probe data includes an identification of static objects and dynamic objects in proximity to the respective vehicles at the road segment, and geographic locations of the static objects and the dynamic objects. A reference point, such as a road boundary, at the road segment is determined from the identified static objects. Lateral distances between the identified dynamic objects and the reference point are calculated. A number of lanes at the road segment are ascertained from a distribution of the calculated distances of the identified dynamic objects from the reference point.
US09721469B2	Filtering infrastructure description messages A method for filtering infrastructure description messages packed in data packages, the messages being transmitted in a vehicular ad hoc network, along with positional information messages for the localization of individual participating nodes, in order to describe the status of the vehicular ad hoc network and/or a street on which the participating nodes are located. The method includes the following steps: receiving one of the infrastructure description messages at a participating node; evaluating the received infrastructure description message as to whether a response is required; and filtering the evaluated infrastructure description message based on a predetermined criterion for whether a response is required.
US09721465B2	Information-providing system, portable terminal device, server, and program Provided is an information-providing system whereby a variety of information can be provided using a sound to a portable terminal device used by a user. The information-providing system includes a sound output device outputting, as a sound wave, identifying information modulated into a sound signal, an identifying-information resolution server, connected to an information-communication network, for identifying, based on the identifying information, address information for accessing a content server connected to an information-communication network; and a portable terminal device including a sound receiving section for receiving the sound wave outputted by the sound-emitting device, a demodulating section for demodulating the identifying information from the received sound wave, a resolution section for sending the demodulated identifying information to the identifying-information resolution server and acquiring the address information, and an accessing section for accessing the content server using the acquired address information.
US09721464B2	Cleaning, disinfecting, care and/or sterilization device for medical or dental instruments A cleaning, disinfecting, care and/or sterilization device for at least one medical or dental instrument comprising a housing, a treatment chamber for receiving the at least one medical or dental instrument, a media supply for feeding and/or discharging media into the treatment chamber and a control unit operable to control and/or regulate a cleaning, disinfecting, care and/or sterilization process, wherein the control unit comprises a wireless communication device to communicate with remote accessories of the cleaning, disinfecting, care and/or sterilization device and wherein the wireless communication device is capable of creating a wireless local area network allowing the remote accessories to communicate with the control unit of the cleaning, disinfecting, care and/or sterilization device.
US09721463B2	Wireless sensor reader A wireless sensor reader is provided to interface with a wireless sensor. The wireless sensor reader transmits an excitation pulse to cause the wireless sensor to generate a ring signal. The wireless sensor reader receives and amplifies the ring signal and sends the signal to a phase-locked loop. A voltage-controlled oscillator in the phase-locked loop locks onto the ring signal frequency and generates a count signal at a frequency related to the ring signal frequency. The voltage-controlled oscillator is placed into a hold mode where the control voltage is maintained constant to allow the count signal frequency to be determined.
US09721462B2	Terminal device and remote control method A terminal device and a remote control method having high usability are provided. In a terminal device having a function for remote control of electric equipments, the current position and the current height of the terminal device are detected. In addition, an azimuth and an inclination toward which the terminal device is placed are detected. Furthermore, position information and height information of electric equipments to be controlled are stored, an electric equipment having the azimuth and the inclination toward which the terminal device is placed within predetermined ranges is selected by referring to information of the position, the height, the azimuth, and the inclination of the terminal device and information of the position and the height of the electric equipments, and the selected electric equipment is remotely controlled.
US09721459B2	Live paging system and methods of using the same Systems, methods, and devices for live paging from a mobile device in operable communication with a fire control panel are provided. Upon an occurrence of a stimulus activity at a fire control panel, e.g., an emergency event, an operator, remote from the fire control panel, may launch a control application from the mobile device. Upon launching the control application, a connection between the mobile device and the fire control panel may be established, and a microphone coupled to the mobile device may be activated for the operator to begin paging. The page may then be broadcasted in real-time via one or more annunciators operably connected to the fire control panel, or, as a recorded message.
US09721458B2	Distributed sensor network Distributed sensing is provided. A first node of a plurality of nodes receives a fire status message from a second node of the plurality of nodes. The fire status message indicates a determination by the second node that an environmental condition exceeds a predetermined threshold. Each node of the plurality of nodes is a computing device. The first node estimates an arrival time of a fire based, at least in part, on the fire status message and a geographic location of the second node. The arrival time is a time until the fire arrives at a predetermined geographic location.
US09721451B1	Location-based warning notification using wireless devices A method and system for generating warning notifications using wireless indoor navigation technology is disclosed. The method comprises determining a location for an individual and a transportation device by receiving device identifiers (e.g., distinctive combination of numbers and/or characters uniquely identifying receiving devices associated with the individual and the transportation device) and location information, received from one or more beacons, from the receiving devices. The method comprises determining a location associated with the individual and the transportation device based on the location information and/or the device identifiers. The method also comprises receiving a destination location and determining an intended path for the transportation device. The method comprises warning the individual upon determining that the location associated with the individual is within a predetermined proximity to the transportation device or its intended path.
US09721449B2	Vehicle keyfob locator system A vehicle keyfob locator system includes a keyfob locator control panel, a display, a plurality of keyfob locator antennas and a controller. The keyfob locator control panel and the display are located within a passenger compartment of a vehicle. The plurality of keyfob locator antennas are installed at predetermined positions of a vehicle body structure of the vehicle. The controller is operably connected to the keyfob locator control panel and each of the keyfob locator antennas. The controller is configured to operate the keyfob locator antennas and determine a location of a keyfob within the vehicle body structure in response to activation of the keyfob locator control panel and further configured to display an approximate location of the keyfob on the display in response to determining the location of the keyfob within the vehicle body structure.
US09721444B2	Theft alarm system A theft alarm system includes a personal article that may be carried. The personal article has a closure that is positionable in an open position. An alarm unit is coupled to the personal article. The alarm unit is in communication with the closure such that the alarm detects when the closure is manipulated into the open position. A base unit is configured to be carried and the base unit is in communication with the alarm unit. The base unit selectively emits an audible alarm when the personal article has been opened. The base unit selectively actuates the alarm unit to emit an audible alarm thereby facilitating the personal article to be located. An electronic device is provided and the electronic device may be carried. The electronic device is in wireless communication with the alarm unit. The electronic device emits an audible alarm when the personal article is opened.
US09721443B2	Processing security-related messages Methods and systems for processing messages received from a security device are presented. In some embodiments, a server may receive one or more messages from a security console and subsequently may determine the location of the security console. The server then may identify one or more other devices that are grouped, e.g., located within a predetermined distance, with the security console. Thereafter, the server may send one or more alert messages to the identified devices.
US09721441B2	System and method for transmitting messages related to operations of electronic devices A system and method are provided for transmitting messages related to operations of electronic devices. A management apparatus is notified of an event that occurred in a specific one of a plurality of electronic devices. The management apparatus determines one or more target devices in response to notification of the event that occurred in the specific electronic device. An event message corresponding to the event that occurred in the specific electronic device is created. The management apparatus transmits the event message to the one or more target devices. The one or more target devices output the received event message.
US09721440B1	Point-of-sale system with replaceable printer A point-of-sale system with a replaceable printer is provided. The point-of-sale system includes a main body and the printer. The main body is electrically connected with a display device. The main body includes a main circuit board, an accommodation member and a positioning structure. The printer includes a detaching element and a position-limiting element, which are connected with each other. The printer is disposed within the accommodation member of the main body and electrically connected with the main circuit board. The position-limiting element of the printer is aligned with the positioning structure of the main body to limit the position of the printer in the accommodation member of the main body. The printer is detached from the main body through the detaching element. Consequently, the printer can be easily detached from the main body through a single keypress action.
US09721439B2	Docking device, transaction processing system, and notification method There is provided a transaction terminal device including: a housing; a frame panel that is attached to the housing; a plurality of electrodes that is provided on a board disposed within the housing; a switch member that is inserted into a penetrating hole formed in the housing, and includes a conductor which electrically connects the plurality of electrodes and an elastic deformer which maintains an electrically connected state in which the conductor is in contact with the electrodes by urging force due to elastic deformation in a state in which the frame panel is attached to the housing; and a tamper detector that detects tampering through the releasing of the electrically connected state of the plurality of electrodes due to the detachment of the frame panel from the housing. A waterproof portion that prevents water from infiltrating into the penetrating hole is provided at the switch member.
US09721437B2	Slot machine with secondary game content A gaming apparatus has both a base wagering game apparatus with a processor, symbol display component and player input controls, and a secondary game element visible from the base wagering game. The secondary game element has a see-through container that is liquid proof, a fluid source and a pump to move fluid into and out of the see-through container. Winning outcomes in the base wagering game cause the pump in the secondary game element to change a visible volume of liquid within the container so that a changed level of liquid within the container can be seen. When a predetermined level of liquid is attained within the container, a bonus payment or bonus game is initiated as a resolution of wagers placed through the player input controls.
US09721436B2	Gaming machine executing free game shifted from normal game and method of controlling same When a normal game is executed and a benefit awarded as a result of the game is the right to execute a free game, video reel groups of types A to E are randomly associated with first to fifth video reels 3a to 3e, respectively, a player selects one of the first to fifth video reels 3a to 3e, the type of the video reel group associated with the selected video reel is set as a video reel 3 used in the free game, and the free game is executed by using the selected video reel 3. After the free game is executed 6 times, whether to award the right to execute the free game again is randomly determined, and the right to execute the free game 6 times is awarded if it is determined that the right to execute the free game is awarded.
US09721435B2	Gaming system having exchangeable bonus token accumulation-redemption feature A gaming terminal is utilized for playing a wagering game. The gaming terminal includes a wager-input device and a display for displaying the wagering game. The wagering game includes a randomly-selected outcome selected from a plurality of outcomes in response to a wager input received via the wager-input device. The plurality of outcomes include at least one outcome that awards standard credits and bonus tokens. A credit output device outputs a value of the standard credits and the bonus tokens in response to achieving the at least one outcome. The bonus tokens are exchangeable for a special event on a second gaming terminal.
US09721434B2	Multi-card bingo game features After the main ball drop of a bingo game, a player may be given a free extra bingo number. A probability of awarding a free ball may be determined, at least in part, according to a desired paytable percentage for the bingo game. In some implementations providing multi-card bingo games, a player is required to hit a predetermined pattern on more than one bingo card in order to obtain a progressive award. The number of hits in the pattern(s) and/or the number of bingo cards involved may be determined according to a desired progressive award size and/or a desired probability of obtaining the progressive award. Players may have an opportunity to purchase an additional bingo number or a block of a plurality of additional bingo numbers after the main ball drop. The block may be offered at a discount compared to the price of an individual additional bingo number.
US09721432B2	Gaming methods, systems, and devices for implementing dice game having re-roll feature Embodiments of the present invention set forth systems, apparatuses and methods for implementing a dice game having a re-roll feature on a gaming device. Accordingly, a gaming device can be configured to roll multiple virtual dice on a game display and determine if the result of the dice roll satisfies a predefined criterion. When the result of the initial dice roll satisfies the predefined criterion, one or more of the multiple virtual dice is re-rolled. The gaming device then evaluates a game result after the re-roll, where the combination of the displayed faces from any initially rolled dice that were not re-rolled and the displayed faces from the re-rolled dice are used in the evaluation.
US09721431B2	System and method for dynamically adjusting prizes or awards based on a platform One aspect of the disclosure relates to implementing a system to encourage cross platform operation in an online game. The online game may provide the ability to provide incentives for participating in cross platform game play. The system may monitor the player's performance on a particular console and provide incentives to accomplish tasks through game play on a different platform than the player is currently operating to play the game.
US09721430B2	Systems and methods for poker gameplay funding Systems and methods for poker gameplay funding are disclosed through the crediting gaming accounts and the debiting of a stored value account. The stored value account can be linked to a stored value payment vehicle issued to a player. Funds held by the stored value account can be used for tournament poker play and cash game buy-in in virtual poker rooms and brick-and-mortar poker rooms. At the conclusion of gameplay, the gaming account can be debited and the stored value account credit to reflect poker winnings.
US09721429B2	Optimizing drawing prize awards A promotional game is conducted over participants' cell phones. During a play period, a participant advances on a virtual game board using cell phone commands. During the player period drawing entries are generated proportional to play on electronic gaming devices, play of the promotional game, or retail purchases. Some players receive a multiplier for their drawing entries to enhance chances of winning the promotional game. In one embodiment, the multiplier is removed for a player after a cutoff threshold for prizes awarded to that player is reached.
US09721428B1	Delayed, game-triggered online game platform registration This disclosure relates to enabling a user to access a game hosted on a game platform without registering a platform account. In implementations, a game provider may set a game trigger based on an instance of a game. In response to a determination that the game trigger is met, instructions effectuating presentation of a platform registration request to a user may be transmitted to a platform provider.
US09721423B2	Event-based gaming operation for gaming device Embodiments of the present invention are directed to gaming devices and gaming systems that are configured to implement event-based gaming operations. Here, a gaming device includes a game event list that has game outcomes associated with each entry in the game event list. The game event list is generated before game play on the gaming device by selecting general game outcome types or specific game outcomes for each of the entries in the game event list. During game play, a game counter is incremented to a next entry in the game event list and an associated game outcome is displayed on the gaming device during the gaming event.
US09721421B2	Electronic gaming system with physical gaming chips and wager display A table system assists in determining wagering events. The system has a gaming surface; at least one player position on the gaming surface; and at least one area is designated at the at least one player position for placement of wagers in the form of chips. A scale is positioned beneath the at least one area configured to provide electrical signals indicating weight placed in the at least one designated area. A processor is configured to receive the electrical signals and execute code to identify numbers of chips placed in the at least one designated area. The processor is further configured to provide signals indicating the identified number of chips to a display on the gaming table surface at the player position. The display is configured to provide a visual indication of at least the number of chips or the value of chips.
US09721418B2	Vending machine container labeling and dispensing method A vending machine, in communication with a remote station, delivers a labeled container to a user from storage holding containers of different sizes and shapes and containing different products such as medicaments. A control system is operable to select a specific unlabeled container from among the other containers in storage, and to move the selected unlabeled container to a labeling module where a label is applied after the position of the label and/or the selected unlabeled container are/is adjusted so as to result in the label being applied at a desired position and angular orientation with respect to the selected unlabeled container. The control system is further operable to move the labeled container to a delivery zone accessible to the user.
US09721417B2	Paper sheet insertion apparatus, paper sheet handling machine, and paper sheet insertion method A paper sheet insertion apparatus (for example, depositing and dispensing unit 20) includes: an imaging unit (for example, camera 60) configured to take an image of a side edge portion, on a placement member 23a side, of paper sheets placed in a placement unit 22, or a side edge portion, on a side opposite to the placement member 23a side, of the paper sheets placed in the placement unit 22, to obtain image data; and a control unit (for example, depositing and dispensing unit control unit 72) configured to determine, based on the image data obtained by the imaging unit, whether or not a plurality of the paper sheets placed in the placement unit are bundled by a bundling member.
US09721414B2	Document cassette displacement actuator for document acceptor A document acceptor for authenticating and storing documents includes a document validator, a document cassette and a displacement actuator. The document validator is for authenticating received documents. The document cassette is for storing the documents received by the document validator. The displacement actuator is adapted to change a position of the document cassette from a first position to a second position to mate the document cassette with the document validator. Related apparatus, systems, techniques, and articles are also described.
US09721413B2	Wireless access control system operating in automatic calibration mode and including door position based lock switching and related methods A wireless access control system may include a remote access device and a lock assembly. The lock assembly may include a lock, a door position sensor, interior and exterior directional antennas, wireless communications circuitry, a touch sensor, and a lock controller. The lock controller may unlock the lock based upon the touch sensor, determine when the door is closed after being opened based upon the door position sensor, and determine whether the remote access device is in an interior or exterior based upon the directional antennas. The lock controller may also lock the lock when the door is closed and when the remote device is in the interior. The controller may operate in an automatic calibration mode to generate adjusted interior and exterior received signal values and, based upon the adjusted received signal values, enable and disable unlocking when the remote access device is in the exterior and interior, respectively.
US09721410B2	Authentication system, authentication apparatus, and authentication method An authentication system includes a plurality of authentication apparatuses, each of which includes first biological information of a same set of users; a crosschecking unit for crosschecking input biological information with a part of the first biological information; a transmitter for assigning second biological information included in the first biological information other than the part of the first biological information to the other authentication apparatuses without assigning same information in the second biological information to other authentication apparatuses, and to request the other authentication apparatuses to crosscheck the input biological information with the assigned second biological information; and a receiver for receiving, from the one or more other authentication apparatuses, one or more results of crosschecking the input biological information with the assigned second biological information by the one or more other authentication apparatuses in response to the requesting.
US09721408B2	Control apparatus for vehicle opening/closing body A control apparatus for a vehicle opening/closing member that operates the opening/closing member provided in the vehicle in response to a physical expression of a user, having a user authentication unit that authenticates a user whose physical expression is to be detected, a physical expression detecting unit that detects the physical expression of the user, an operation determining unit that determines an operating state of at least one of the user authentication unit and the physical expression detecting unit, and a notification unit that sends notification that, in accordance with a determination result of the operating state determined by the operation determining unit, the user has been authenticated, the detection of the physical expression has been completed, or the detection of the physical expression has failed.
US09721405B1	Secure ID badge system A method, a computer program product, and a computer system for displaying and erasing an ID badge image on an ID badge. An entry terminal device of a target area receives from an ID badge a transmission of an ID number and confirms the ID numbers. In response to determining that the ID number is confirmed, the entry terminal device obtains an ID badge image for the ID number. The entry terminal device transmits the ID badge image to the ID badge, wherein the ID badge image is displayed on the ID badge when the ID badge is carried into the target area. An exit terminal device of the target area transmits an instruction of erasing a display of the ID badge image on the ID badge, wherein the ID badge image is erased from the ID badge when the ID badge is carried out of the target area.
US09721403B2	Safety system for a motor vehicle door, comprising at least two sensors The invention relates to a safety system for a door in a motor vehicle, comprising an electronic unit that includes at least one first and a second sensor. Each sensor has its own monitoring zone on the motor vehicle door. The safety system further comprises a lock which is arranged on the motor vehicle door and can be switched between a locked position and an unlocked position, as well as a user-held identifier which can be brought into data communication with a transceiver unit in the motor vehicle for authentication purposes. The electronic unit is designed in such a way as to be able to generate a trigger signal by having the user execute at least one defined movement pattern within the monitoring zones, thus allowing the position of the lock to be switched.
US09721399B2	Vehicle diagnosing apparatus, vehicle diagnosing system, and diagnosing method A vehicle diagnosing apparatus, a vehicle diagnosing system, and a diagnosing method enable the determination of completion of a repair or part replacement on a vehicle while adapting to changes in environment and overcoming temporal or spatial restrictions. The vehicle diagnosing apparatus reads diagnostic information from an on-board diagnosing unit on the vehicle that detects an abnormality in an on-board device. A result of a maintenance work performed on the on-board device is finalized by a maintenance result finalizing unit. A determination unit determines the appropriateness of the finalized maintenance work result with reference to determination information stored in a database that is continuously updated. The result of the determination is indicated by a notifying unit. Analogy is used to obtain the diagnostic information when the on-board device requires a long time or a certain condition to provide accurate diagnostic information.
US09721394B2	Augmented reality virtual content platform apparatuses, methods and systems The AUGMENTED REALITY VIRTUAL CONTENT PLATFORM APPARATUSES, METHODS AND SYSTEMS (“ARV”) provides a photo driven ad-platform that transforms digital media placements into immersive and immediately shareable brand-consumer engagements via GPS-linked virtual photo components instantiated on a user mobile device. Within embodiments, users may create and share photographs augmented with brands or other images and accompanying messages on various social networks using their Smartphones or tablets to earn rewards. In one implementation, merchants and/or advertisers may populate the mobile augmented reality space as fans and consumers may share their photos on social networks and spread the word virally.
US09721393B1	Method for processing and delivering virtual reality content to a user Aspects of the present disclosure include a process for the delivery of virtual reality content that enables a more immersive experience to the user by implementing resolution-defined projections. The resolution-defined projections are two-dimensional and virtual reality content agnostic. According to some aspects, the projections can be used to generate virtual reality content images and video that can be encoded and/or compressed for processing and transmission with lower or without increasing bandwidth requirements, and to be perceived of a higher resolution. Additional aspects include, the adaptive focus via the resolution-defined projections using the user's viewing direction, optimization data from a feedback loop and/or crowdsourcing data.
US09721392B2	Server, client terminal, system, and program for presenting landscapes There is provided a server including a reception unit configured to receive, from a client terminal, position information indicating a position of the client terminal, and direction information indicating a direction in which the client terminal is directed, and a search unit configured to search for image data provided with position information indicating an opposite position across a target object present in the direction indicated by the direction information with respect to the position of the client terminal based on the position information.
US09721391B2	Positioning of projected augmented reality content A method of displaying augmented reality content on a physical surface is disclosed. A surface complexity measure is determined for the physical surface from a captured image of the physical surface. A content complexity measure is determined for the augmented reality content to be applied to the physical surface. The content complexity measure represents an amount of fine detail in the augmented reality content. The method determines if the amount of fine detail in the augmented reality content is to be modified, based on a function of the surface complexity measure and said content complexity measure. A display attribute of the augmented reality content is adjusted to modify the fine detail in the augmented reality content. The modified augmented reality content is displayed on the physical surface.
US09721389B2	3-dimensional augmented reality markers In one embodiment, a first perspective of a three-dimensional marker may be detected, where the three-dimensional marker has a shape that presents a different appearance from every angle. A first three-dimensional virtual overlay corresponding to the first perspective of the three-dimensional marker may be identified or generated. The first three-dimensional virtual overlay corresponding to the first perspective of the three-dimensional marker may be projected or displayed such that the first three-dimensional virtual overlay substantially covers the first perspective of the three-dimensional marker.
US09721388B2	Individual identification character display system, terminal device, individual identification character display method, and computer program A terminal device retains a character image of an own terminal user and a character image of a second terminal user acquired from an AR database server (or second terminal devices) as a character definition in an AR control unit. The terminal device can acquire the position of the second terminal device and a direction in which a camera unit is oriented. The terminal device of a photographer determines whether the user of the second terminal device which is being searched for is present in the acquired direction by causing image recognition unit to identify a face image of a specific user of the second terminal device. When the specific user of the second terminal device is present, the character image of the specific user of the second terminal device is combined in the vicinity of a face image region of the image obtained by the camera unit and is displayed.
US09721386B1	Integrated augmented reality environment Augmented reality environments allow users in their physical environment to interact with virtual objects and information. Augmented reality applications are developed and configured to utilize local as well as cloud resources. Application management allows control over distribution of applications to select groups or all users. An application programming interface allows simplified control and distribution of tasks between local and cloud resources during development and post-development operation. This integration between local and cloud resources along with the control afforded by application management allows rapid development, testing, deployment, and updating of augmented reality applications.
US09721384B1	Systems and methods for fitting products to users Systems and methods are disclosed for best fitting a subject to a one of a plurality of object variations by capturing images of a user anatomical portion and a reference object from a plurality of angles using a mobile camera; creating a model of the user anatomical portion from the images with dimensions based on dimensions of the reference object; and selecting a best-fit physical object from the plurality of object variations based on the model.
US09721381B2	System, method, and computer program product for discarding pixel samples A system, method, and computer program product are provided for discarding pixel samples. The method includes the steps of completing shading operations for a pixel set including one or more pixels to generate per-sample shaded attributes according to a shader program executed by a processing pipeline. Discard information for the pixel set is evaluated and one or more per-sample shaded attributes for at least one pixel in the pixel set are discarded based on the evaluated discard information.
US09721377B2	Method of characterizing creped materials Methods of characterizing the topography of a surface of a creped material, devices for characterizing surface topography of a creped material, computer systems for characterizing surface topography of a creped material, and the like, are disclosed.
US09721376B2	Elimination of minimal use threads via quad merging Fragment merging is performed on a draw call basis. One application is for quad merging. Primitives of the same draw call have many common attributes, such as a graphics state, which facilitates merging of quad fragments. Partially covered quad fragments of the same draw call are considered for possible merging and at least one merge test performed. The merge test may include error tests such as a level of detail error test, interpolated depth, and an interpolation error test.
US09721375B1	Systems and methods for displaying representative images A system, method, and computer program product for displaying representative images within one or more subpanels of a user interface is disclosed. The method comprises configuring, by a processor unit, an adjacent relationship between a visible subpanel of the one or more subpanels and at least one not-visible subpanel of the one or more subpanels. Next, a second relationship is configured between each of two or more representative images and an associated subpanel of the one or more subpanels, wherein the second relationship defines a location on the associated subpanel where each of the two or more representative images is displayed. Additionally, a notification is received indicating a new orientation for at least one of the one or more subpanels. In response to the new orientation, an in-place rotation animation is generated for the two or more representative images based on the adjacent relationship and the second relationship. Additional systems, methods, and computer program products are also presented.
US09721368B2	Method for eliminating artifact by detecting fracture of the brain in the computed tomography image and the computed tomography apparatus thereof A method for eliminating an artifact of a computed tomography image is provided. The method includes eliminating a machine artifact from a cross-sectional computed tomography scans of the brain; setting boundary points positioned on a horizontal axis and a vertical axis in the computed tomography image, from which the machine artifact has been eliminated; resetting a boundary point positioned at a boundary between the skull of the brain and the brain tissue based on the boundary points; detecting a position of a fracture of the brain in the computed tomography image, in which the boundary point has been reset, and overlaying a fracture region with a skull pixel; and eliminating an artifact from the computed tomography image, which has been overlaid with the skull pixel.
US09721366B2	Data interpretation overlay mechanism In an approach to displaying data, one or more computer processors receive a plurality of coordinates of an overlay on a graphical data display, such that the plurality of coordinates indicate a position and a size of the overlay. The one or more computer processors retrieve one or more data points from the graphical data display. The one or more computer processors de-emphasize at least a portion of the one or more retrieved data points. The one or more computer processors display, in the overlay, one or more retrieved data points of the graphical data display that reside within the plurality of coordinates of the overlay.
US09721362B2	Auto-completion of partial line pattern Auto-completion of an input partial line pattern. Upon detecting that the user has input the partial line pattern, the scope of the input partial line pattern is matched against corresponding line patterns from a collection of line pattern representations to form a scoped match set of line pattern representations. For one or more of the line pattern representations in the scoped match set, a visualization of completion options is then provided. For example, the corresponding line pattern representation might be displayed in a distinct portion of the display as compared to the input partial line pattern, or perhaps in the same portion in which case, in which case the remaining portion of the line pattern representation might extend off of the input partial line pattern representation.
US09721355B2	Methods and systems for defining a VOI in an ultrasound imaging space An ultrasound imaging system provides for defining a VOI in an ultrasound imaging space. The system defines an initial frame of the VOI in the ultrasound imaging space, receives a selection of at least one reference point at an arbitrary location in the ultrasound imaging space, creates at least one curved surface using at least one element of the initial frame and the at least one reference point, and then creates VOI based on the curved surface in the ultrasound imaging space.
US09721354B2	Stop weighted waveform A waveform monitor includes a brightness measuring system to generate brightness values that are then converted to stop equivalents. The conversion may be performed using a Look Up Table. The output is generated as a stop vs. time waveform. Methods of generating the stop vs. time waveform are also described.
US09721351B2	Methods and systems for corneal topography, blink detection and laser eye surgery A method of blink detection in a laser eye surgical system includes providing a topography measurement structure having a geometric marker. The method includes bringing the topography measurement structure into a position proximal to an eye such that light traveling from the geometric marker is capable of reflecting off a refractive structure of the eye of the patient, and also detecting the light reflected from the structure of the eye for a predetermined time period while the topography measurement structure is at the proximal position. The method further includes converting the light reflected from the surface of the eye into image data and analyzing the image data to determine whether light reflected from the geometric marker is present is in the reflected light, wherein if the geometric marker is determined not to be present, the patient is identified as having blinked during the predetermined time.
US09721349B2	Method and system for automatically counting physical objects within a periphery band and an excluded region A periphery band is around an excluded region. For automatically counting physical objects within the periphery band and the excluded region, an imaging sensor captures: a first image of the periphery band and the excluded region; and a second image of the periphery band and the excluded region. In response to the first image, a first number is counted of physical objects within the periphery band and the excluded region. Relevant motion is automatically detected within the periphery band, while ignoring motion within the excluded region. In response to the second image, a second number is counted of physical objects within the periphery band and the excluded region. In response to determining that a discrepancy exists between the detected relevant motion and the second number, the discrepancy is handled.
US09721347B2	3D model updates using crowdsourced video An exemplary method includes prompting a user to capture video data at a location. The location is associated with navigation directions for the user. Information representing visual orientation and positioning information associated with the captured video data is received by one or more computing devices, and a stored data model representing a 3D geometry depicting objects associated with the location is accessed. Between corresponding images from the captured video data and projections of the 3D geometry, one or more candidate change regions are detected. Each candidate change region indicates an area of visual difference between the captured video data and projections. When it is detected that a count of the one or more candidate change regions is below a threshold, the stored model data is updated with at least part of the captured video data based on the visual orientation and positioning information associated with the captured video data.
US09721346B2	Image assessment device, method, and computer readable medium for 3-dimensional measuring and capturing of image pair range The present invention provides an image assessment device capable of accurately and promptly assessing an image pair used for 3D measurement from plural captured images. An image assessment device according to the invention includes first captured image selection device, first captured image information acquisition device, object distance to-be-measured acquisition device, object position to-be-measured calculation device, second captured image selection device, second captured image information acquisition device, imaging range calculation device, and assessment device that determines whether or not a calculated object position to be measured is within a calculated imaging range, and assesses that a first captured image and a second captured image are of an image pair if determining that the calculated object position to be measured is within the calculated imaging range.
US09721343B2	Method and system for gesture identification based on object tracing A method and system provide light to project to an operation space so that a received image from the operation space will include, if an object is in the operation space, a bright region due to the reflection of light by the object, and identify a gesture according to the variation of a barycenter position, an average brightness, or an area of the bright region in successive images, for generating a corresponding command. Only simple operation and calculation is required to detect the motion of an object moving in the X, Y, or Z axis of an image, for identifying a gesture represented by the motion of the object.
US09721338B2	Method and apparatus for segmentation and registration of longitudinal images The described invention provides systems and methods for detecting and segmenting a lesion from longitudinal, time series, or multi-parametric imaging by utilizing spectral embedding-based active contour (SEAC). In addition, the described invention further provides systems and methods for registering time series data by utilizing reduced-dimension eigenvectors derived from spectral embedding (SE) of feature scenes (SERg).
US09721335B2	Method and system for determining quality of markings applied to food products The present disclosure includes a method and system for monitoring food product processing operations and facilities. The food products are examined and/or analyzed with respect to the quality and integrity of the processing thereof, any markings applied thereto, and compliance with commercial, regulatory, or customer requirements. The present disclosure provides a machine vision system that is used in connection with the food processing operations to examine and analyze the eggs being processed. In a preferred embodiment, the machine vision system includes at least one imaging sensor for capturing images of the processing thereof and is positioned above the path along which the food products are conveyed.
US09721332B2	Spike domain convolution circuit A convolution circuit includes: a plurality of input oscillators, each configured to: receive a corresponding analog input signal of a plurality of analog input signals; and output a corresponding spiking signal of a plurality of spiking signals, the corresponding spiking signal having a spiking rate in accordance with a magnitude of the corresponding analog input signal; a plurality of 1-bit DACs, each of the 1-bit DACs being configured to: receive the corresponding spiking signal of the plurality of spiking signals from a corresponding one of the input oscillators; and receive a corresponding weight of a convolution kernel comprising a plurality of weights; output a corresponding weighted output of a plurality of weighted outputs in accordance with the corresponding spiking signal and the corresponding weight; and an output oscillator configured to generate an output spike signal in accordance with the plurality of weighted outputs from the plurality of 1-bit DACs.
US09721331B2	Digital filter, and image generating, superhybrid image generating, electronic medium manufacturing, and letter-row tilt illusion generating apparatus, method and program In the present invention, subband signals are obtained by performing multiresolution decomposition on image data by using a broad-sense pinwheel framelet that is a set of an approximate filter with no orientation and a plurality of detail filters with respective orientations, and that has a degree. When an image is reconstructed by summing the obtained subband signals, the reconstructed image data is generated by attenuating or amplifying a subband signal corresponding to at least one of filters that have predetermined frequency characteristics and/or a predetermined orientation among the filters.
US09721329B2	Image de-noising method A multi-scale detail representation of an image is computed as a weighted sum of translation difference images. A denoising operator is applied to the translation difference images so that translation differences are modified as a function of an estimated local signal-to-noise ratio and at least one denoised center difference image at a specific scale is computed by combining denoised translation difference images at scale s or a finer scale. A denoised image is computed by applying a reconstruction algorithm to the denoised center difference images.
US09721324B2	Thumbnail zoom File exploration is facilitated by enabling zoom with respect to a thumbnail as a function of an identified point of interest. More particularly, a scaled thumbnail of the same size as a thumbnail can be presented as a function of an identified point of interest. Furthermore, navigation, among other things, is enabled to allow panning with respect to a scaled thumbnail, for instance.
US09721320B2	Fully parallel in-place construction of 3D acceleration structures and bounding volume hierarchies in a graphics processing unit A non-transitory computer-readable storage medium having computer-executable instructions for causing a computer system to perform a method for constructing bounding volume hierarchies from binary trees is disclosed. The method includes providing a binary tree including a plurality of leaf nodes and a plurality of internal nodes. Each of the plurality of internal nodes is uniquely associated with two child nodes, wherein each child node comprises either an internal node or leaf node. The method also includes determining a plurality of bounding volumes for nodes in the binary tree by traversing the binary tree from the plurality of leaf nodes upwards toward a root node, wherein each parent node is processed once by a later arriving corresponding child node.
US09721316B2	Change convergence risk mapping Disclosed is a change convergence risk mapping system. The change convergence risk mapping system typically includes a processor, a memory, and a risk aggregation module stored in the memory. The change convergence risk mapping system is typically configured for: determining an event risk score for each of a plurality of events; aggregating the event risk scores of the plurality of events and determining a first aggregated risk score associated with a first time period; determining if the first aggregated risk score exceeds a first predefined aggregated risk score threshold or if a first predefined number of events associated with the first time period have an event risk score exceeding a first predefined event risk score threshold; determining a risk level for the first time period; and graphically presenting a first indicator to a user computing system of the risk level associated with the first time period.
US09721313B2	Method and device for identifying feasibility of transmission interface constraint in online rolling dispatching A method and a device for identifying a feasibility of a transmission interface constraint in an online rolling dispatching are provided. The method comprises: S1, establishing an online rolling dispatching model including a transmission interface constraint; S2, establishing a Lagrangian relaxation dual problem of the online rolling dispatching model; and S3, identifying a feasibility of the transmission interface constraint by solving the Lagrangian relaxation dual problem.
US09721311B2	Web based data management Approaches are provided for assessing and displaying data. An approach includes determining one or more aggregate measures of data quality for data. The approach further includes assessing an overall data quality for the data based on the determined one or more aggregate measures of data quality. The approach further includes displaying the data, the determined one or more aggregate measures of data quality, and the assessed overall data quality.
US09721310B2	Facet-based filtering of social network update data A network update interface is presented to a user on a network to display network updates from other users of a mutual social-networking site. The network updates shared by the other users are gathered in a stream and supplied to a facet-filtering system including a network update interface. The user controls the display of certain network update items according to facet-filter characteristics enabled in facet-filter selection panels in the network update interface. The facet-filter characteristics are used by a facet filter to select certain network updates for display to the user in the network update interface. Trending links to further articles with content corresponding to the facet-filter characteristics are displayed to the user according to greatest popularity among the other users. Links to the profiles of the users sharing the articles are also provided in the network update interface.
US09721309B2	Ranking of discussion threads in a question-and-answer forum A system for scoring a discussion thread having posts in a question-and-answer form is provided. The system receives a query and then identifies features of the discussion thread that may include one or more term features and one or more non-term features. A term feature may be a combined post feature that combines the terms of multiple posts to treat them as a single document. A term feature may be a question feature that contains the question of the discussion thread. A term feature may also be a question post feature that contains the terms of the post that relate to the question of the post. The system then generates a feature score for each feature and combines the feature scores into a relevance score indicating the relevance of the discussion thread to the query. The system may also use the relevance score when ranking discussion threads.
US09721305B2	Mobile device distance tracking In an example, the present invention provides a method for capturing vehicle mileage information. The method includes initiating an application program configured on the mobile wireless device without any user input required to start tracking a drive. The method includes initiating movement of the mobile wireless device. The method includes using a mapping module to track a start point of a route for the mobile wireless device. The method includes moving the mobile wireless device from the start point through one or more legs. The method includes using algorithms or traffic data to identify one or more of the legs as a route or drive.
US09721301B2	Vehicle repair cost estimate acquisition system and method A computer-based method for obtaining repair estimates for a vehicle, and a related network server, are provided. The method comprises receiving a vehicle identification number (VIN) over a network from a customer computer, retrieving vehicle information, associated with the VIN, from a database, sending the vehicle information and a graphical representation of the vehicle, including a plurality of selectable vehicle damage locations, over the network to the customer computer, receiving a selection of at least one vehicle damage location over the network from the customer computer, receiving at least one image of the vehicle over the network from the customer computer, storing the vehicle information, the selected damage location and the vehicle image as a repair job in a non-volatile memory or the database, and sending a notification, indicating that the new repair job is available for review, over the network to at least one repair provider computer.
US09721299B2	Generating market information based on causally linked events Certain embodiments provide systems, apparatus, and methods to analyze incoming data messages and create market information constructs. An example method includes receiving a data message including an instruction to initiate a market event. The example method includes evaluating the instruction to determine whether it is associated with two or more causally linked market events. The example method also includes classifying the instruction based on the evaluating as part of a sequence of causally linked market events or as a single market event. The example method includes queuing the sequence of causally linked market events. The example method further includes detecting an end of the sequence of causally linked market events. The example method includes constructing a logically reduced market data message construct descriptive of the one or more market events represented by the queued sequence of causally linked events.
US09721297B2	Systems and methods for providing a trading interface with advanced features Systems and methods for a trading interface with advanced features are provided. Using these systems and methods, a user may create orders, manipulate orders, cancel orders, configure alternative keyboard settings, and/or obtain additional information on transactions. When a user clicks on a bid and/or offer, a dialog box may pop-up, thereby providing the user with multiple options. To enable customization of the keyboard settings to a user's preference, a keyboard settings feature is provided. Users may also be provided with additional information relating to the user's wish to transact.
US09721293B2	Systems and methods for facilitating media playback in online auctions Systems and methods are provided for facilitating media playback in online auctions. A method may include detecting an indication of an auction event associated with an online vehicle auction for a first vehicle. The method may also include determining current auction information associated with the online vehicle auction. The method may further include determining auction event information associated with the auction event. Additionally, the method may include identifying, based at least in part on the current auction information and the auction event information, one or more media files for playback on a bidder device. The method may also include transmitting, to the bidder device in response to the indication of the auction event, the one or more media files for playback on the bidder device according to a determined sequence, which may result in acoustic output of one or more auctioneer phrases.
US09721290B2	On-line payment transactions A computer-implemented method includes generating on a user terminal a merchant web site associated with a merchant with code for a merchant web page, transmitting a product selection request for the user to a remote open payment system that is separate from the merchant, and displaying purchase information responsive to the product selection request using the code for the merchant web page.
US09721289B2	System and methods thereof for financing a purchase order over the web A method for financing a purchase order includes receiving a purchase order from a customer node communicatively connected to a server, wherein the purchase order includes information regarding a customer associated with the customer node, a supplier of goods, at least one item to be purchased, a cost of the purchase order and a preferable loan term; collecting metadata related to the customer associated with the customer node; analyzing the purchase order and the collected metadata to compute a credit standing for the customer; determining whether the credit standing crosses a predetermined threshold, wherein the predetermined threshold is set respective of the purchase order; requesting from a supplier node communicatively connected to the server an electronic authentication respective of the purchase order, when the credit standing crosses the predetermined threshold; and sending an electronic guarantee to finance the purchase order to the supplier node, upon reception of the electronic authentication.
US09721288B2	Credibility enhancement for online comments and recommendations One embodiment provides a method for determining credibility of a user in recommending an object. The method comprises monitoring activity relating to an object in an online network, and determining a baseline of activity for the object based on the activity monitored. In response to detecting a user interaction by a first user with the object, information relating to the user interaction is recorded. An analysis of the information recorded is performed in view of information relating to one or more other user interactions by one or more other users with the object. Based on the analysis, a credibility score for the first user is determined. The credibility score represents a degree of confidence in reliability of the first user to recommend the object. Presentation of user recommendations for objects is controlled based on credibility scores to decrease impact of astroturfing, crowdturfing and spamming on the presentation.
US09721280B2	Construction payment management system and method with sub-tier document exchange and approval features Systems and methods for managing a construction payment process wherein a higher degree of functionality is provided to primary users and only a limited subset of functionality is provided to sub-tier contractors. One construction of the system is configured to receive an electronically signed document and a request for payment from the sub-tier contractor. The request for payment is presented to a first primary user who is a contractual parent of the sub-tier contractor. When approval of the request for payment is received, a payment is initiated from a project payor to the sub-tier contractor. In some embodiments, the project payor is a contractual grandparent of the sub-tier contractor and a contractual parent of the first primary user.
US09721278B2	Method, system and computer program product for dynamically pricing perishable goods Techniques for dynamically pricing perishable goods. The objective is to sell all items before any remaining items become worthless. The method comprises: monitoring a time parameter T corresponding to period T0 to Tn; if T
US09721277B2	System and methods for providing financial account information over a network A system and method for providing financial account messages to customers while accessing web sites is disclosed. Methods, systems and articles of manufacture consistent with the present invention enable a financial account issuer to provide an application to customer's computer system over a network. The application may be configured to provide various messages associated with the customer's financial account provided by the financial account issuer while the customer browses web sites. The financial account messages may be configured to provide interactive and dynamically changing account status information based on attempted purchases of goods and/or services by the customer at merchants' web sites. The application may also be configured to provide rating information associated with web sites accessed by the customer.
US09721276B2	Real-time social group based bidding system There are provided a system, a method and a computer program product for creating the social group whose participants are involved in an online conversation. The system aggregates data associated with the online conversation and a group profile, of the social group. The system determines, based on the online conversation data and the group profile, a context of the online conversation and a goal of the social group. The system receives, based on the determined context and the goal, a first bidding from each provider, the first bidding associated with the determined context and the goal, the each provider providing one or more of: goods, services or discounts associated with the context and the goal.
US09721275B1	Broadcast feeds for order transactions The use of a broadcast feed to enable customers to pay for order may enable merchants to increase their online visibility and sales. An order for one or more items that is initiated by a customer may be received. The order may be transmitted to a broadcast feed provider to be presented as a message post in a broadcast feed page. Subsequently, an electronic payment for the order that is initiated by the customer through a link embedded in the message post may be received.
US09721273B2	System and method for aggregating and providing audio and visual presentations via a computer network A method for providing content via a computer network and computing device, which may include: storing data associated with and indicative of a plurality of presentations; receiving a request to host an audio presentation; receiving and storing data associated with the requested audio presentation; initiating and recording one or more telephone calls; and, presenting at least a portion of the stored data for selection by the computing device; wherein, selection causes the stored data indicative of the selected audio/visual or audio presentation to be provided to the computing device for playback thereby via the computer network. The method may include storing data associated with and indicative of a first plurality of presentations; storing data associated with a plurality of second presentation feeds: automatically and periodically accessing each of the feeds; and aggregating each of the presentations for delivery via the computer network.
US09721269B2	System and method for toy adoption and marketing Interacting with a virtual presentation includes: entering a first registration code associated with a first product for registering the first product on a website via a user account; accessing a restricted portion of the website that was not accessible prior to registering the first product; displaying a virtual character that is controllable on the website; registering a second product by entering a second registration code provided to the product, wherein the second product is different than the first product, the second character also accessed via the user account; receiving content for displaying a second virtual character that is controllable on the website; and gaining access to additional content, beyond a chat function, for the first product in response to registration of the second product with the user account, wherein the additional content comprises additional resources of the website beyond the resources provided after registration of the first product.
US09721264B2	Method and system for property damage analysis A system and method for combining CAD, inspection, and building guideline data for analyzing repair decisions and selecting waste containers is described. One embodiment includes receiving digital building facet data for a first building facet of a set of one or more building facets; receiving digital inspection data for the first building facet; determining an amount of building material required to repair damage to an area of the first building facet, including determining a first amount of waste building material; determining a repair indicator for the first building facet, the determining a repair indicator based at least in part upon the digital facet data for the first building facet and the inspection data for the first building facet; determining an appropriate waste container based upon the first amount of waste material; and displaying an electronic image of the set of one or more building facets.
US09721263B2	Continuously evolving symmetrical object profiles for online advertisement targeting A system is described that implements symmetrical object profiles across one or more objects, wherein an object profile is influenced by other object profiles with which it interacts. In particular, the system includes a configuration for a first object profile that is associated with a first object, wherein the first object profile comprises a set of attributes having a first set of valuations. The system includes a configuration for a second object profile that is associated with a second object, wherein the second object profile comprises said set of attributes having a second set of valuations. The system includes a profile updater for managing the first object profile and the second object profile, wherein in a transaction involving the first and second objects, corresponding object profiles are updated based on valuations in the first and second set of valuations.
US09721259B2	Rules-based selection of counterfeit detection techniques A counterfeit detection system may include a memory storing a module comprising machine readable instructions to determine a X-identification (XID) associated with a product. The XID may include an unencrypted component and/or an encrypted component associated with a parameter associated with the product. The machine readable instructions may further include selecting one or more validation rules, from a plurality of validation rules, to select one or more validation techniques from a plurality of validation techniques used to determine an authenticity of the product. The machine readable instructions may further include using the one or more selected validation techniques to determine the authenticity of the product based on the XID associated with the product. The counterfeit detection system may include a processor to implement the module.
US09721254B2	Method and apparatus for providing streaming media programs and targeted advertisements using multiple advertisement version segments A method, apparatus, article of manufacture, and a memory structure for providing advertisements with a media program transmitted to a user device are described. Different versions of a media program and advertisements are generated and segmented, and transmitted to a media player individually, allowing different advertisements to be selected for presentation to users according to user demographics and other factors.
US09721252B2	User authentication method and device for credentials back-up service to mobile devices Back-up credentials data is stored for a user. A communication channel is established with a mobile device. A cryptogram is received from the mobile device, such that the cryptogram is relayed by the mobile device from an authentication device that interacted with the mobile device. The authentication device is associated with the user. The cryptogram is verified. In response to the verification of the cryptogram, the stored back-up credentials data is made accessible to the mobile device.
US09721244B2	Authentication system A two way authentication method, including receiving by an authentication server first encrypted data from a merchant computing device, receiving by the authentication server second encrypted data from a customer computing device, determining by the authentication server if the first encrypted data matches the second encrypted data, if the first encrypted data matches the second encrypted data, authenticating the customer computing device, if the first encrypted data does not matches the second encrypted data, not authenticating the customer computing device.
US09721242B2	Payment terminal operation method and system therefor A method of payment terminal operation, including: receiving a payment collection request for a payment from an application, generating a payment initiation request for the payment, sending the payment initiation request to a secure processing system, switching the secure processing system from operation in an unsecured mode to operation in a secured mode in response to receipt of the payment initiation request, facilitating payment information entry, and receiving a payment response notification, generated based on the payment information, at the main processor.
US09721239B1	Content access management in a social network using permission-value avatars A system and method for managing content between a plurality of user devices an online communication environment through the use of a permission-value avatar comprising, at least, a unit database. A social network provides the plurality of users a communication environment to connect with other user devices. Content access and engagement permissions between unconnected user devices are released upon a transfer of units associated to a permission-value avatar consisting of a thematic representation, mutual content-access permissions, and a unit amount. Through the content access management system and permission-value avatar method, user incentives are aligned through the reward of content-access permissions in exchange for social network activity and unit exchange.
US09721237B2	Animated two-dimensional barcode checks Systems and methods are disclosed to provide an animated 2D barcode check that is used to securely and efficiently transmit financial information between mobile devices. The financial information includes a check written by a payer and transmitted to a merchant. The check includes account information of the payer and of the merchant with a payment service provider, a payment amount, and a cryptographic signature that has been certified by the payment service provider. The payer's mobile device encodes the check into a sequence of 2D barcodes and displays the sequence of 2D barcodes in a loop that is scanned by a camera on the merchant's mobile device. The merchant uses the cryptographic signature to verify the validity of the signature on the check without having Internet connectivity to the payment service provider. The merchant may later present the check to the payment service provider to receive payment.
US09721225B1	Systems and methods facilitating shipping services rate resale Systems and methods which provide a shipping service resale platform enabling single shipper account access to multiple shipping service rate schedules are disclosed. Shipping service rate optimization is facilitated for a shipper using a single shipper account of embodiments of the invention, whereby the shipper is enabled to utilize rates available from various rate schedules, such as may include reseller negotiated rates, shipping service provider published rates, etc., according to embodiments. The shipper is enabled to establish, manage, and maintain a single shipper account for use in purchase and payment of shipping services which implicate different shipping service provider payment mechanisms, different shipping service resellers, and/or different shipping service providers.
US09721221B2	Skill estimation method in machine-human hybrid crowdsourcing In one embodiment, a computer-implemented method for estimating an ability of a worker in a process for integrating work results of multiple workers for the same task includes acquiring, for each of one or more tasks, a work result of a preceding-stage worker and a work result of a succeeding-stage worker that works based on the work result of the preceding-stage worker. The method also includes estimating multiple parameters of a probability model in which an ability of the succeeding-stage worker conditioned by a quality of the work result of the preceding-stage worker is introduced as a conditioned ability parameter, based on the multiple work results obtained for each of the one or more tasks.
US09721220B2	Environmental performance estimation A method of assessing environmental performance includes: receiving, by a processing device, input data related to aspects of an energy industry operation; estimating a first environmental impact of the operation based on the input data; selecting an alternative implementation of the operation; estimating a second environmental impact of the alternative implementation; comparing the first environmental impact and the second environmental impact; and generating an output based on the comparison, the output indicating a change in environmental impact associated with replacing the operation with the alternative implementation.
US09721218B2	Determining the user-specific relevance of applications The subject matter disclosed herein provides methods for determining the user-specific relevance of various applications and displaying a graphical representation of these relevance values. The method may receive information from one or more applications installed on a device. This information may include importance parameters, importance parameter values, urgency parameters, and urgency parameter values associated with each application. A composite importance value and a composite urgency value may be determined for each application. A relevance value may be determined for each application based on the composite importance value and composite urgency value. A graphical representation of the relevance of each application may be displayed on the device. Related apparatus, systems, techniques, and articles are also described.
US09721217B2	Methods and systems for business development and licensing and competitive intelligence Systems and method for making intelligent business development and licensing decisions are disclosed. The present invention generally relates to an analytical tool that combines multiple data and content sets based on user selected factors and presents the data in the form of manipulatable visualizations to facilitate decision making to address a specific business problem. More specifically, this invention relates to providing a single portal for access to a decision support system that enables the visualization of data from multiple content and data sets to facilitate decision making related to opportunities analysis, asset acquisition, and intellectual property licensing.
US09721216B2	Solution that automatically recommends design assets when making architectural design decisions for information services The present invention discloses a system that provides automated guidance for making architectural decisions when designing information services in a service-oriented architecture (SOA). Such a system can include a requirements manager, a reusable asset repository, and an asset advisory tool. The requirements manager can be configured to capture non-functional requirements for information services. The reusable asset repository can be configured to store design assets. The design assets can be stored according to a unique data model that associates each design asset with a non-functional requirement. The asset advisory tool can be configured to determine a list of recommended design assets for a user-selected non-functional requirement and document the architectural decision made from the list of recommended design assets.
US09721213B2	Information matching apparatus, method of matching information, and computer readable storage medium having stored information matching program The information matching apparatus includes: a training data setting unit that sets supervised data in a machine learning device of supervised learning that learns judgment criteria used for a judgment of identicalness, similarity, and relevance between a plurality of records by matching the records configured by sets of values corresponding to items; a check point setting unit that sets a check point configured by one set of two records used for evaluating the set supervised data; and a learning result evaluation unit, for the set check point, acquires a change between a judgment result using judgment criteria derived as a result of learning based on set first supervised data and a judgment result using judgment criteria derived as a result of learning based on set second supervised data set and evaluates the supervised data based on the acquired change.
US09721211B2	System and method for sensor data processing to determine position of a vehicle A method and apparatus for processing data, the data including a set of one or more system inputs; and a set of one or more system outputs; wherein each system output corresponds to a respective system input. Each system input can include a plurality of data points, such that at least one of these data points is from a different data source to at least one other of those data points. The method includes performing a kernel function on a given system input from the data and a further system input to provide kernelized data; and inferring a value indicative of a significance of data from a particular data source; wherein the inferring includes applying a regression technique to the kernelized data.
US09721209B2	Method and system for efficient decomposition of single-qubit quantum gates into Fibonacci anyon braid circuits Methods for compiling single-qubit quantum gates into braid representations for non-Abelian quasiparticles described by the Fibonacci anyon model are based on a probabilistically polynomial algorithm that, given a single-qubit unitary gate and a desired target precision, outputs a braid pattern that approximates the unitary to desired precision and has a length that is asymptotically optimal (for a circuit with such property). Single-qubit unitaries that can be implemented exactly by a Fibonacci anyon braid pattern are classified, and associated braid patterns are obtained using an iterative procedure. Target unitary gates that are not exactly representable as braid patterns are first approximated to a desired precision by a unitary that is exactly representable, then a braid pattern associated with the latter is obtained.
US09721207B2	Generating written content from knowledge management systems The disclosure is directed to written content generation. A method for generating written content in an application in accordance with an embodiment includes: receiving a query from a user; importing data from at least one data source in response to the query; ranking the imported data based on a plurality of ranking factors to determine a relevance of the imported data; automatically generating written content using at least a portion of the imported data based on the determined relevance of the imported data; and automatically customizing the written content based on a file format of the application.
US09721205B2	Clarification of submitted questions in a question and answer system Mechanisms for clarifying an input question are provided. A question is received for generation of an answer. A set of candidate answers is generated based on an analysis of a corpus of information. Each candidate answer has an evidence passage supporting the candidate answer. Based on the set of candidate answers, a determination is made as to whether clarification of the question is required. In response to a determination that clarification of the question is required, a request is sent for user input to clarify the question. User input is received from the computing device in response to the request and at least one candidate answer in the set of candidate answers is selected as an answer for the question based on the user input.
US09721204B2	Evaluation of a system including separable sub-systems over a multidimensional range An artificial neural network may be configured to test the impact of certain input parameters. To improve testing efficiency and to avoid test runs that may not alter system performance, the effect of input parameters on neurons or groups of neurons may be determined to classify the neurons into groups based on the impact of certain parameters on those groups. Groups may be ordered serially and/or in parallel based on the interconnected nature of the groups and whether the output of neurons in one group may affect the operation of another. Parameters not affecting group performance may be pruned as inputs to that particular group prior to running system tests, thereby conserving processing resources during testing.
US09721202B2	Non-negative matrix factorization regularized by recurrent neural networks for audio processing Sound processing techniques using recurrent neural networks are described. In one or more implementations, temporal dependencies are captured in sound data that are modeled through use of a recurrent neural network (RNN). The captured temporal dependencies are employed as part of feature extraction performed using nonnegative matrix factorization (NMF). One or more sound processing techniques are performed on the sound data based at least in part on the feature extraction.
US09721196B2	Short term job canceling in ESU model printer Systems and methods for performing print job cancellation in an ESU model printer are provided. An embodiment can involve receiving, at an ESU of a printing device, a print job, wherein the print job includes a first portion. The first portion can be transmitted from the ESU to a main unit. The main unit can receive a print job cancel command corresponding to the received print job, wherein the cancel command is received after the first portion is transmitted to the main unit, but before the full print job has been transmitted. The main unit can then transmit a notification of the received cancel command to the ESU. The ESU can receive the notification of the received cancel command, and responsive to receiving the notification, terminate the transmission of the print job from the ESU to the main unit.
US09721189B2	Image processing apparatus, image processing method, and recording medium In the image processing apparatus, the theme determiner determines a theme of the image group based on the image analysis information, and the preference analyzer analyzes a preference of the user based on the theme of the image group. The composite image generator uses a certain number of images corresponding to the preference of the user selected, respectively, from among the plurality of images to generate composite images of a plurality of patterns. The display controller performs control such that one composite image is displayed on the image monitor and, the one composite image displayed on the image monitor is replaced with one composite image designated by the instruction from among the composite images of the plurality of patterns to display the one composite image designated on the image monitor.
US09721184B2	Apparatus and method for picking up article randomly piled using robot An article pickup apparatus configured so as to measure surface positions of articles randomly piled on the three-dimensional space using a three-dimensional measurement instrument to acquire position information of three-dimensional points, determine a connected set made by connecting three-dimensional points present in the vicinity of each other among the three-dimensional points, and identify a position and posture of an article based on the position information of three-dimensional points belonging to the connected set. The posture of the article is identified by calculating a main component direction of the connected set by applying main component analysis to the three-dimensional points belonging to the connected set and identifying the posture of the article based on the main component direction.
US09721182B2	Method and system for matching an image using normalized feature vectors A method, system and computer program product for encoding an image is provided. The image that needs to be represented is represented in the form of a Gaussian pyramid which is a scale-space representation of the image and includes several pyramid images. The feature points in the pyramid images are identified and a specified number of feature points are selected. The orientations of the selected feature points are obtained by using a set of orientation calculating algorithms. A patch is extracted around the feature point in the pyramid images based on the orientations of the feature point and the sampling factor of the pyramid image. The boundary patches in the pyramid images are extracted by padding the pyramid images with extra pixels. The feature vectors of the extracted patches are defined. These feature vectors are normalized so that the components in the feature vectors are less than a threshold.
US09721180B2	Estimating respiratory phase from a video of a subject A video is received of a region of a subject where a signal corresponding to respiratory function can be registered by a video device. Pixels in the region in each of the image frames are processed to identify a respiratory pattern with peak/valley pairs. A peak/valley pair of interest is selected. An array of optical flow vectors is determined between a window of groups of pixel locations in a reference image frame corresponding to a peak of the pair/valley pair and a window in each of a number of image frames corresponding to the respiratory signal between the peak and ending at a valley point. Optical flow vectors have a direction and a magnitude. A ratio is determined between upwardly pointing optical flow vectors and downwardly pointing optical flow vectors. Based on the ratio, a determination is made whether the respiration phase for that peak/valley pair is inspiration or expiration.
US09721179B2	Line segment and arc detection apparatus An apparatus and method to detect a line segment or arc using Hough transform. A Hough transform unit performs contour extraction on brightness image data to generate contour image data, with pixels having a pixel value of 0 to 255, performs the Hough transform on points in the contour image data, and counts additional values represented by pixel values of points in the contour image data in a Hough table. The Hough transform unit performs contour extraction on first to third component data to generate first to third contour data with pixels having a pixel value of 0 to 255, performs the Hough transform on points in the first to third contour data, and counts additional values represented by pixel values of points in the first to third contour data in the Hough table. The detection unit comprehensively evaluates the counts to detect a line segment or arc.
US09721177B2	Image acquisition using a level-indication icon During an information-extraction technique, visual suitability indicators may be displayed to a user of the electronic device to assist the user in acquiring an image of a document that is suitable for subsequent extraction of textual information. For example, an imaging application executed by the electronic device may display, in a window associated with the imaging application, a visual suitability indicator of a tilt orientation of the electronic device relative to a plane of the document. When the tilt orientation falls within a predefined range, the electronic device may modify the visual suitability indicators to provide visual feedback to the user. Then, the electronic device may acquire the image of the document using an imaging device, which is integrated into the electronic device. Next, the electronic device may extract the textual information from the image of the document using optical character recognition.
US09721169B2	Image processing device for detecting vehicle in consideration of sun position An image processing device includes: an image acquisition unit that obtains a photographic image of an area outside of a vehicle captured and output by a camera; a sun decision unit that calculates a sun position which indicates, at least, a solar elevation and makes a decision as to whether or not the solar elevation is equal to or lower than a predetermined elevation; an opacity detection unit that detects clouding of a lens surface of the camera; a vehicle detection unit that detects another vehicle, different from the vehicle, based upon image information of a first image area in the photographic image; and a control unit that suspends detection of the other vehicle by the vehicle detection unit if the opacity detection unit detects opacity in, at least, the first image area and the sun decision unit decides that the solar elevation is equal to or lower than the predetermined elevation.
US09721165B1	Video microsummarization A system and method for generating a short video summary from video data. For example, the system may receive input video data including video clips and may select snippets from each video clip to include in the short video summary. To select a snippet, the system may calculate a priority metric for individual frames in a video clip, may generate a priority metric graph for the video clip and may select a portion of the video clip associated with a peak of the priority metric graph. Thus, the snippets may include a short duration of time (e.g., 1-4 seconds) corresponding to the peak of the priority metric graph. The system may reorder the snippets based on characteristics of content represented in the snippet.
US09721163B2	Image processing apparatus, image processing method, and recording medium In an image processing apparatus, a degree-of-relevance calculation unit calculates a degree of relevance between each of a plurality of images on the basis of a person's face, determination results of scenes and objects, GPS information, and a degree of similarity. An important image extraction unit extracts images captured over a certain period of time including a reference date for determining a degree of importance of the image, and images captured over a certain period of time including a relevant date relevant to the reference date, as important image, from the plurality of images. A relevant image extraction unit extracts a certain number of images as relevant images from important images in which the degree of relevance for a selected image selected from the plurality of images by an instruction which is input through an instruction input unit is equal to or greater than a threshold.
US09721162B2	Fusion-based object-recognition An object-recognition method and system employing Bayesian fusion algorithm to reiteratively improve probability of correspondence between captured object images and database object images by fusing probability data associated with each of plurality of object image captures.
US09721161B2	Dynamic adjustment of imaging parameters Representative implementations of devices and techniques provide adjustable parameters for imaging devices and systems. Dynamic adjustments to one or more parameters of an imaging component may be performed based on changes to the relative velocity of the imaging component or to the proximity of an object to the imaging component.
US09721154B2	Object detection apparatus, object detection method, and object detection system An object detection apparatus is capable of estimating the size of a moving object easily based on images. An object detection apparatus (5) of an object detection system (1) includes an object detection/determination unit (7) configured to analyze a period of motion of the object based on the images to estimate a size of the object based on the period of motion of the object.
US09721152B1	Athletic training method and system A method and system for athletic training includes a plurality of devices including receiver circuitry and processors to receive signals from at least one body-worn beacon. The signals are distance limited such that proper reception indicates arrival in proximity to a device from the plurality of devices. The arrival is sensed by a device and relayed to other devices to actuate indicators on such devices to guide a user wearing the beacon in the direction of such actuated indicator. The times of arrival and departure from the vicinity of each such device from the plurality of devices is reported to an application that is used to measure an athlete's performance when traversing a course defined by such devices in the form of cones.
US09721151B2	Method and apparatus for detecting interfacing region in depth image An apparatus for detecting an interfacing region in a depth image detects the interfacing region based on a depth of a first region and a depth of a second region which is an external region of the first region in a depth image.
US09721150B2	Image enhancement and feature extraction for ocular-vascular and facial recognition Biometric enrollment and verification techniques for ocular-vascular, periocular, and facial regions are described. Periocular image regions can be defined based on the dimensions of an ocular region identified in an image of a facial region. Feature descriptors can be generated for interest points in the ocular and periocular regions using a combination of patterned histogram feature descriptors. Quality metrics for the regions can be determined based on region value scores calculated based on texture surrounding the interest points. A biometric matching process for calculating a match score based on the ocular and periocular regions can progressively include additional periocular regions to obtain a greater match confidence.
US09721143B2	Modification of visual depictions Modifying a visual depiction is provided. A processor identifies a first depiction of a first member of an online social network. The processor determines a first date value representing a date corresponding to the first depiction. The processor determines a relationship between the first member and a second member of the online social network. The processor identifies a second date value based, at least in part, on the relationship between the first member and the second member. The processor determines a region of the first depiction by performing facial recognition based, at least in part, on the first depiction. The processor generates a second depiction by applying one or more operations to the region of the first depiction based, at least in part, on the second date value, wherein the second depiction allows identification of the first member based, at least in part, on the second date value.
US09721140B2	Sensing method of fingerprint sensor and related sensing circuit A sensing method of a fingerprint sensor includes the following steps: (a) applying a first voltage, a second voltage and a third voltage to a first node connected to an electrode plate to be measured, a second node disconnected from the first node, and a conductor adjacent to the electrode plate to be measured, respectively; (b) providing a first finger drive voltage for a finger; (c) stopping applying the first, second and third voltages to the first node, the second node and the conductor, respectively; (d) after step (c), applying a fourth voltage to the conductor, and connecting the first node to the second node; (e) after steps (b) and (c), providing a second finger drive voltage for the finger; and (f) after steps (d) and (e), obtaining a measurement result of the electrode plate to be measured according to a signal on the second node.
US09721137B2	Method and apparatus for fingerprint image reconstruction An apparatus and method for obtaining a biometric image is disclosed, which may comprise: providing a biometric image sensor which may comprise one of a one dimensional swiped sensor array, a two dimensional swiped sensor array and a two dimensional placement sensor array, each of which may comprise a capacitive gap sensor measuring a change in a transmitted signal received as a received signal, based upon changes in the transmitted signal passing through a biometric, the biometric image sensor may be one of mounted on a host device or cooperating with the host device; providing a biometric placement positioning prompt on a display on the host device, which prompt may indicate whether a current positioning of the biometric is proper for initiating biometric imaging by the biometric image sensor, e.g., indicating a current positioning of the biometric and the desired positioning of the biometric.
US09721136B2	Image correction apparatus and image correction method An image correction apparatus includes a correction amount calculating unit which calculates, in response to a position of a hand on an image, a correction amount for placing the hand to face an imaging unit included in an image acquiring unit for generating the image; and a correcting unit which corrects an estimated coordinate representing a position of a point in a real space corresponding to each pixel included in a region in which the hand is captured in the image in accordance with the correction amount, and projects each of the points after the correction on a corrected image to generate the corrected image.
US09721132B2	Reconfigurable sled for a mobile device A reconfigurable sled for a mobile device with camera is provided. The reconfigurable sled may be moved into different configurations in order to facilitate either normal or specialized use. For example, in a first configuration, the mobile device's camera is unobstructed and imaging may proceed normally. In a second configuration, on the other hand, the camera's imaging direction may be repositioned by a reflective element in the camera's optical path. The reflective element provides feedback to the mobile device via visible markings that may be imaged by the camera and detected by the mobile device. If the mobile device determines that the mirror is in the optical path, then the mobile device may respond to accommodate the mirror and enable a function, like reading an indicium.
US09721120B2	Preventing unauthorized calls to a protected function An obfuscated program can be configured to resist attacks in which an attacker directly calls a non-entry function by verifying that an execution path to the function is an authorized execution path. To detect an unauthorized execution order, a secret value is embedded in each function along an authorized execution path. At runtime, the secrets are combined to generate a runtime representation of the execution path, and the runtime representation is verified against an expected value. To perform the verification, a verification polynomial is evaluated using the runtime representation as input. A verification value result of zero means the execution path is an authorized execution path.
US09721119B2	System and method for secure use of messaging systems A system and method for secure use of messaging systems. A mediator may receive an original message, process the original message to produce a processed message, and may forward the processed message to a server or a messaging system. A mediator may receive a processed message from a server or a messaging system, process the received processed message to produce an unprocessed message that may be substantially identical to the original message and may forward the unprocessed message to a destination.
US09721118B2	Securing access to distributed data in an unsecure data network A method, a system, a registry, a repository and a computer program product are disclosed for securely accessing sensitive medical data records stored in a repository. Before accessing security-critical data in the repository, a registration inquiry with a separate registry must be carried out in order to obtain a security token having limited temporary validity, for example in the form of a barcode. A data source and/or a data sink can then use the security token to access the security-critical data in that an index module indexes the data record inquired about on the repository.
US09721116B2	Test sandbox in production systems during productive use Methods and systems are directed to controlling access to data in a production environment. Production data may be stored in a production database and test data may be stored in a test database. A production application may have access only to the data in the production database while a test application may have access to both the production database and the test database. The test application may have read-only access to the production database and read-write access to the test database. Data in the test database may be handled differently than data in the production database. A type of data may be associated with a range of valid values. The values assigned to the elements may differ depending on whether the elements are stored in the production database or the test database.
US09721115B2	Automatic resource ownership assignment system and method A method for automatic folder ownership assignment, including ascertaining which first folders, among a first multiplicity of folders, have at least one of modify and write permissions to non-IT administration entities, adding the first folders to a list of candidates for ownership assignment, defining a second multiplicity of folders which is a subset of the first multiplicity of folders and not including the first folders and descendents and ancestors thereof, ascertaining which second folders among the second multiplicity of folders, have permissions to non-IT administration entities, adding the second folders to the candidates, defining a third multiplicity of folders, which is a subset of the second multiplicity of folders and not including the second folders and descendents and ancestors thereof, ascertaining which third folders among the third multiplicity of folders are topmost folders, adding the third folders to the candidates, and recommending possible assignment of ownership of the candidates.
US09721111B2	Methods of dynamically securing electronic devices and other communications through environmental and system measurements leveraging tailored trustworthy spaces This invention is for a system capable of securing one or more fixed or mobile computing device and connected system. Each device is configured to change its operating posture by allowing, limiting, or disallowing access to applications, application features, devices features, data, and other information based on the current Tailored Trustworthy Space (TTS) definitions and rules which provided for various situationally dependent scenarios. Multiple TTS may be defined for a given deployment, each of which specifies one or more sensors and algorithms for combining sensor data from the device, other connected devices, and/or other data sources from which the current TTS is identified. The device further achieves security by loading digital credentials through a unidirectional multidimensional physical representation process which allows for the device to obtain said credentials without the risk of compromising the credential issuing system through the data transfer process. This secure system methodology may be used to create a Mobile Secure Compartmentalized Information Facility (M-SCIF), among other applications.
US09721110B2	Methods, systems, and devices for securing content Methods, systems, and devices secure content in memory. The content includes a lock that prohibits reading the content from memory. Prior to expiration of the lock the content cannot be read from memory. However, a preview option allows at least a portion of the content to be accessed. The preview option provides a preview of the content. At expiration, the content is readable.
US09721109B2	Privacy screen-based security A system for privacy screen-based security comprises an input interface and a processor. The input interface is configured to receive authentication information. The processor is configured to, in the event authentication is determined to be successful, provide a privacy access screen, wherein the privacy access screen provides access to a set of applications or data, and determine whether to automatically transition to a new privacy screen, wherein the transition to the new privacy screen is automatic under a specific set of circumstances.
US09721105B2	Method and apparatus for generating privacy ratings for applications An approach is provided for generating privacy ratings for applications. A privacy ratings platform determines use information associated with one or more applications executing on one or more devices. By way of example, the use information is determined based, at least in part, on usage data associated with one or more input sources, one or more components, one or more categories of personal information, or a combination thereof associated with the one or more devices. The privacy ratings platform then processes and/or facilitates a processing of the use information to determine one or more privacy ratings for the one or more applications.
US09721104B2	CPU-based measured boot A measured boot process for an electronic device includes taking a measurement of the early system start up instructions of the electronic device upon a reboot or start-up of the device. A representation of the measurement is stored in a trusted platform module of the electronic device prior to initialization of the trusted platform module. Access is granted to the representation of the measurement stored in the trusted platform module prior to initialization of the trusted platform module thereby enabling the representation of the measurement to serve as the core root of trust for measurement.
US09721102B2	Boot mechanisms for bring your own management The present invention is notably directed to a user portable device (10), preferably a secure tamper-proof device, comprising: a connection interface (12) enabling connection (S2) with a computer (101); a persistent memory (14); and a bootloader (16) stored on said persistent memory (14), preferably on a secure memory (141) of the device, wherein the bootloader (16): is detectable (S3) by a firmware (122) of the computer (101) upon connection (S2) of the device (10) with said computer (101) via said connection interface; and comprises instructions for said firmware (122) to load (S4) the bootloader (16) into a memory (121) of the computer (101) for subsequent execution (S5); and to interact with the firmware, upon execution at the computer (101), to: determine, in a physical storage medium (120) of said computer (101) storing a first host operating system (111-1) and a second host operating system (111-2) respectively on a first portion (120-1) and a second portion (120-2) thereof, said second portion (120-2), from partition information (111-1p) of said physical storage medium, which partition information acknowledges the first host operating system but does not acknowledge the second host operating system; locate a part (BI) of the second host operating system (111-2) in the second portion (120-2); and execute said part (BI), whereby only the second one of the host operating systems can boot (S6-S8) from the user portable device (10). The present invention is further directed to related systems and methods.
US09721096B2	Dynamically optimizing performance of a security appliance A device may identify a set of features associated with the unknown object. The device may determine, based on inputting the set of features into a threat prediction model associated with a set of security functions, a set of predicted threat scores. The device may determine, based on the set of predicted threat scores, a set of predicted utility values. The device may determine a set of costs corresponding to the set of security functions. The device may determine a set of predicted efficiencies, associated with the set of security functions, based on the set of predicted utility values and the set of costs. The device may identify, based on the set of predicted efficiencies, a particular security function, and may cause the particular security function to be executed on the unknown object. The device may determine whether another security function is to be executed on the unknown object.
US09721095B2	Preventing re-patching by malware on a computer Preventing re-patching by malware on a computer by detecting a request to modify a write-protection attribute of a memory location within a memory of a computer to allow the memory location to be written to, where the detecting is performed subsequent to the detection of activity identified as malware-related activity involving the memory location, and preventing modification of the write-protection attribute of the memory location.
US09721092B2	Monitoring an application in a process virtual machine An application that runs in a process virtual machine is monitored by injecting listening code into a target class of the application. The listening code collects and forwards data to a monitoring agent. The target class is configured for monitoring according to alternative embodiments. In response to the process virtual machine providing notification of an event, such a loading the target class, the listening code may be injected into the target class. In another embodiment, the process virtual machine is configured to load a first mirror class containing a mirror entry point to the application. A mirror target class is loaded in response to a request to load the target class. The mirror target class contains a mirror entry point to the target class and the listening code. In another embodiment, listening code may be added to the target class before running the application.
US09721091B2	Guest-driven host execution A system and method by which a host computer system can run executables on behalf of a virtual machine (VM) are disclosed. In accordance with one embodiment, an executable of a guest application of a virtual machine is received by a hypervisor and is run via the host operating system on behalf of the virtual machine.
US09721087B1	User authentication Disclosed herein are techniques for use in user authentication. In one embodiment, the technique comprises collecting information in connection with a plurality of authentication methods. The technique also comprises determining a score for each authentication method based on the collected information. The technique further comprises selecting an authentication method from the plurality of authentication methods based on the determined score.
US09721085B1	Method and battery pack device with antenna and diode A device and system are described that include an authentication device having a battery, at least one battery contact, an antenna, at least one antenna contact, a ferrite material barrier, a diode electrically coupled to a battery contact and an antenna contact, and an authenticator coupled to the diode, a battery contact, and an antenna contact. A system includes the device with an authentication device, a transceiver electrically coupled to a near field communication contact, a switch electrically coupled to the transceiver and an antenna contact, and a communication system electrically coupled to the switch.
US09721079B2	Image authenticity verification using speech Verifying the identity of a person claiming to be represented by a picture by way of providing a string of text (randomly generated or generated by another person seeking verification of same) to be recited by the claimant. The string of text is recited in a video which is received by an intermediary server at a network node, or by a person seeking such verification. Automated processes may be utilized to compare the audio and video received to the picture and string of text sent. Further, comparisons to previously received audio, video, and strings of text, as well as the same available from third parties, may be used to determine fraud attempts. Viewers of the person's profile may also vote on the authenticity of a profile, thereby raising or lowering a certification confidence level, with their votes weighted more heavily towards those who have high confidence levels.
US09721067B2	Accelerated progression relapse test An Accelerated Progression Relapse Test (APRT) and method is provided for use in the prognosis of a patient having an ER+ breast cancer. The APRT provides a determination of when a patient in a particular diseased state is likely to benefit from further disease treatment, or does not have a high probability of benefit with additional treatment. Four genetic probes are disclosed that target the MKI67, CDC6 and SPAG5 gene and gene products. The ER+ breast cancer patient population is stratified into two groups, with the low gene expression group identifying the patient/patient group that is less likely to benefit from additional treatment measures, and a high gene expression group identifying the patient group that is more likely to benefit from additional treatment measures.
US09721066B1	Smart fitness tracker Methods, systems, and apparatus, including computer programs encoded on computer storage media, for monitoring a user's health data. A wearable fitness tracking device may include a heart-rate sensor, a steps taken sensor, a display, and perform operations including: receiving, from the heart-rate sensor, data representing the user's heart rate during a time period, receiving, from the steps taken sensor, data representing the number of steps taken by the user during the time period, determining a risk score for the user using the data representing the user's heart rate during the time period and the data representing the number of steps taken by the user during the time period, comparing the risk score to a threshold risk score, determining a risk profile using a result of comparing the risk score to the threshold risk score, and presenting data for the risk profile on the display.
US09721062B2	BamBam: parallel comparative analysis of high-throughput sequencing data The present invention relates to methods for evaluating and/or predicting the outcome of a clinical condition, such as cancer, metastasis, AIDS, autism, Alzheimer's, and/or Parkinson's disorder. The methods can also be used to monitor and track changes in a patient's DNA and/or RNA during and following a clinical treatment regime. The methods may also be used to evaluate protein and/or metabolite levels that correlate with such clinical conditions. The methods are also of use to ascertain the probability outcome for a patient's particular prognosis.
US09721058B2	System and method for reactive initialization based formal verification of electronic logic design A system and method use reactive initialization to facilitate formal verification of an electronic logic design. The system verifies that a part of the logic design correctly transitions through a sequence of states by automatically assigning an initial state value. The system interacts with a correction-unit to provide meaningful feedback of verification failures, making it possible for the correction-unit to correct the failures or add new constraints that allow the verification to complete. Assigning an initial state simplifies the verification of the validity of the remaining states in the sequence, thus making it more likely to reach a conclusive result and consuming less computing resources.
US09721057B2	System and method for netlist clock domain crossing verification A system and method for netlist clock domain crossing verification leverages RTL clock domain crossing (CDC) verification data and results. The netlist clock domain crossing verification system (NCDC) migrates RTL-level constraints and waivers to the netlist design so that the user does not have to re-enter them. The NCDC checks the netlist and generates a report that compares RTL-level CDC checking results to the netlist-level CDC checking results to make it easy to see new issues. The NCDC receives and stores netlist corrections from user input or automatically corrects certain CDC violations, in the netlist.
US09721055B2	Measurement model optimization based on parameter variations across a wafer An optimized measurement model is determined based a model of parameter variations across a semiconductor wafer. A global, cross-wafer model characterizes a structural parameter as a function of location on the wafer. A measurement model is optimized by constraining the measurement model with the cross-wafer model of process variations. In some examples, the cross-wafer model is itself a parameterized model. However, the cross-wafer model characterizes the values of a structural parameter at any location on the wafer with far fewer parameters than a measurement model that treats the structural parameter as unknown at every location. In some examples, the cross-wafer model gives rise to constraints among unknown structural parameter values based on location on the wafer. In one example, the cross-wafer model relates the values of structural parameters associated with groups of measurement sites based on their location on the wafer.
US09721050B2	Structure for reducing pre-charge voltage for static random-access memory arrays A memory cell arrangement of SRAM cell groups may be provided in which in each of the groups multiple SRAM cells are connected to an input of a local read amplifier by at least one common local bit-line. Outputs of the amplifiers are connected to a shared global bit-line. The global bit-line is connected to a pre-charge circuit, and the pre-charge circuit is adapted for pre-charging the global bit-line with a programmable pre-charge voltage before reading data. The pre-charge circuit comprises a limiter circuit which comprises a pre-charge regulator circuit connected to the global bit-line to pre-charge the global bit-line with the programmable pre-charge voltage, and an evaluation and translation circuit connected to the pre-charge regulator circuit and the global bit-line to compensate leakage current of the global bit-line without changing its voltage level.
US09721049B2	Structure for reducing pre-charge voltage for static random-access memory arrays A memory cell arrangement of SRAM cell groups may be provided in which in each of the groups multiple SRAM cells are connected to an input of a local read amplifier by at least one common local bit-line. Outputs of the amplifiers are connected to a shared global bit-line. The global bit-line is connected to a pre-charge circuit, and the pre-charge circuit is adapted for pre-charging the global bit-line with a programmable pre-charge voltage before reading data. The pre-charge circuit comprises a limiter circuit which comprises a pre-charge regulator circuit connected to the global bit-line to pre-charge the global bit-line with the programmable pre-charge voltage, and an evaluation and translation circuit connected to the pre-charge regulator circuit and the global bit-line to compensate leakage current of the global bit-line without changing its voltage level.
US09721048B1	Multiprocessing subsystem with FIFO/buffer modes for flexible input/output processing in an emulation system In a system and method for emulating a circuit design, an emulation system receives input instructions from a host device executing the emulation. Channels of multiple buffers and associated processors provide implement read and write instructions received at the interface. Multiple access modes are provided to read and write to system memory and to store sequences of commands in the provided buffers and to execute those stored sequences using an associated processor. By writing a sequence of commands and/or data blocks to the channel buffers, the associated processors can execute programs of varying complexity that may have been written or modified in real time or preconfigured.
US09721045B2	Operation in an immersive virtual environment It is provided a computer-implemented method of three-dimensional design in an immersive virtual environment. The method comprises the steps of determining a position of an instantiation of a physical designer in the virtual environment; instantiating an object via an interaction of the instantiation of the physical designer with a stocking zone attached to its position, the interaction being controlled by a body configuration of the physical designer; and performing a design operation with the object. Such a method improves the design of an object.
US09721043B2	Computer-implemented land planning system and method with GIS integration A computer-implemented land planning system is designed to generate at least one conceptual fit solution to a user-defined land development problem. The system employs a computer readable medium and a computer program encoded on the medium. The computer program is operable, when executed on a computer, for electronically creating at least one candidate solution to the land development problem. The candidate solution incorporates a plurality of engineering measurements applicable in development of an undeveloped land site. Existing GIS data is collected for the selected undeveloped land site. A fitness function quantitatively evaluates the candidate solution based on its cost. A heuristic problem-solving strategy manipulates the engineering measurements of the candidate solution to achieve a more quantitatively fit solution to the land development problem. Documentation illustrating the fit solution to the land development problem is delivered to the user.
US09721042B2	System and method for use of function-based mechatronic objects A system, method, and computer readable medium. A method includes receiving a selection of a function-based mechatronic object, the function-based mechatronic object including a plurality of linked requirements and functional information. The method includes instantiating the function-based mechatronic object as a product-specific mechatronic object and evaluating a plurality of linked requirements and functional information for the product-specific mechatronic object. The method includes assigning product-specific specifications to the functional information of the product-specific mechatronic object and storing the product-specific mechatronics object, including the linked requirements and functions.
US09721041B2	Configurable data analysis using a configuration model The disclosure generally describes computer-implemented methods, software, and systems, including a method for presenting information. A command is identified from an application, the command associated with a configuration model. The identified command is matched to a step defined within the configuration model, each step in the configuration model associated with a request to a particular backend system, wherein each request is associated with at least one representation, the representation defining a visualization associated with the results returned in response to the request. The requested step is added to an analysis path, the analysis path storing a series of ordered steps performed during execution of the application. The request associated with the added step is executed including sending the request to the particular backend system for execution, and the analysis path is updated. A representation object is generated in response to executing the request.
US09721038B1	Collaborative data visualization Information processing techniques for providing collaborative data visualization in a computing system. For example, a method comprises the following steps. A data visualization asset is obtained. The data visualization asset comprises a data component, an execution context component, and a visual asset component, wherein at least one visual asset of the visual asset component is generated from a data set of the data component by execution of at least one process of the execution context component. Collaborative modification of the data visualization asset by at least a portion of a plurality of users is enabled in accordance with a given policy. Information corresponding to the modification of the data visualization asset is tracked.
US09721036B2	Cooperative web browsing using multiple devices A proxy-based thin-client web browsing framework enables cooperative web browsing of multiple devices. The multiple devices may include devices that are not intended for web browsing and have limited or no web browsers and/or user input capabilities. The proxy-based thin client web browsing framework employs a virtual browser at a proxy server to perform all browser-engine logics, and retrieve, render and encode web pages on behalf of the multiple devices. The multiple devices therefore only need to have limited decoding and display capabilities to perform web browsing. The proxy-based thin client web browsing framework further includes a touch controller as a remote controller for a device that has no or limited user texting or manipulating capabilities.
US09721032B2	Contextual URL suggestions A system and machine-implemented method for providing a suggestion for a uniform resource locator (URL) on an electronic device. One or more URLs are identified within content of at least one document accessed by the electronic device. Each of the identified one or more URLs are added to a list of suggested URLs. A request for a URL suggestion is received in association with an application running on the electronic device. In response to the received request, the URL suggestion is provided based on the list of suggested URLs.
US09721031B1	Anchoring bookmarks to individual words for precise positioning within electronic documents Devices, systems and methods are disclosed for anchoring bookmarks to individual words for precise positioning within electronic documents. The bookmarks may be anchored based on user input selecting particular words, based on gaze tracking identifying most recently read words, or based on estimated reading speed. The bookmarks may be a link used to navigate within the document, may be used as an anchor for a new layout after content reflow or may be automatically saved when the e-reader turns off the display to provide the user with a most recently read passage. If a bookmark isn't anchored to specific words by the user, the device may anchor the bookmark to the beginning of a sentence or a paragraph including the recently read words determined using gaze tracking or estimated reading speed.
US09721028B2	Method and apparatus for providing cloud service A method performed by a cloud service providing apparatus includes receiving a request for execution of an application from a user device, executing the application in response to the request, encoding application execution data generated by the execution of the application into image data and transmitting the encoded image data to the user device, wherein the encoded image data is configured to be displayed on a screen of the user device.
US09721020B2	Search query obfuscation via broadened subqueries and recombining System, method, and computer program product to perform an operation to obfuscate search queries via broadened subqueries and recombining, by referencing an ontology to identify a set of generalized terms corresponding to at least one term of a received query, generating a plurality of subqueries based on the received query and the set of generalized terms, executing each of the plurality of subqueries to retrieve a result set for each respective subquery, and filtering the result sets using the received query to produce a result set responsive to the received query.
US09721010B2	Content reaction annotations Among other things, one or more techniques and/or systems are provided for annotating content based upon user reaction data and/or for maintaining a searchable content repository. That is, a user may request and/or opt-in for user reaction data to be detected while a user is experiencing content (e.g., watching a movie, walking through a park, interacting with a website, participating on a phone conversation, etc.). Metadata associated with the content may be used to determine when and/or what sensors to use to detect the user reaction data (e.g., metadata specifying an emotional part of a movie). The content may be annotated with a reaction annotation corresponding to the user reaction data, which may be used to organize, search, and/or interact with the content. A search interface may allow users to search for content based upon annotation data and/or aggregated annotation data of one or more users who experienced the content.
US09721003B2	Method and apparatus for providing contextual based searches An approach is presented for providing contextual based searches. A contextual query platform processes at least one query to parse one or more terms associated with at least one contextual parameter. The platform further determines one or more values and/or one or more probabilities associated with the one or more values for the at least one contextual parameter based on one or more probabilistic models associated with the at least one contextual parameter. The platform further compares the one or more values and/or the one or more probabilities against at least one threshold criteria. The platform further determines whether to process the at least one query using the one or more values, to generate a recommendation for using the one or more values, to determine one or more alternate values, or a combination thereof based, at least in part, on the comparison.
US09721001B2	Automatic question detection in natural language Systems and methods may provide for separating a sentence into a plurality of clauses and applying a set of question detection rules to each of the plurality of clauses. Additionally, the sentence may be automatically designated as a question if the question detection rules indicate that at least one of the plurality of clauses is a question. In one example, at least one of the question detection rules defines an order of a plurality of parts of speech.
US09720994B2	Replicated database structural change management The various embodiments herein include at least one of systems, methods, and software that operate to replicate structural changes made to a master database to a replicate database. In some such embodiments, changes made to a master database are identified and a representation thereof is provided to a process that implements such changes in the replicate database. The structural changes are then replicated in the replicate database.
US09720992B2	DML replication with logical log shipping Technologies are described for performing replication within a database environment. For example, replication of database data can be performed using data manipulation language (DML) statements and logical logs. A database node can execute a DML statement, create a logical log comprising the DML statement, and insert the logical log into a logical log queue. The logical log can be sent to one or more other database nodes for execution of the DML statement stored within the logical log. Logical logs can be grouped for sending to other nodes. Logical logs can be executed on a first node and one or more other nodes within the same transaction boundary. Execution of DML statements can be decoupled from sending, receiving, grouping, and/or processing of logical logs.
US09720991B2	Seamless data migration across databases Techniques are disclosed for enabling the migration of data with minimized impact on consumers of the data. A data migration agent updates pointers to active data locations and coordinates a migration from a first data resource to a second data resource so that seamless migration may be carried out. A data access layer of a distributed computing environment can take advantage of the pointers and metadata written by the data migration agent to serve requests to resources of the distributed computing environment so that read availability is available regardless of migration status.
US09720990B2	Method, system, and computer program product for simulating an online session A method and system for conducting an offline session simulating an online session between a client and server in a network environment. The client imports data and functional logic from the server prior to going offline. The imported functional logic is embedded into a format or document that is capable of being interpreted and performed by the local interface at the client that is used to interact with server during an online session. Whether offline or online, the user utilizes the same local interface at the client to transmit instructions to the functional logic in order to manipulate the data. In an offline session, such instructions cause the imported and embedded functional logic to execute, thereby manipulating the data that is imported at the client. Known synchronization methods may also be used in order to maintain consistency and coherency between the imported data at the client and the database at the server.
US09720985B2	Visually indicating a calendar event among different time zones A calendared event may be visually indicated. A proposed time for the calendared event can be identified and each of a plurality of event participants can be associated with the calendared event. For each of the participants, a local time of the participant that corresponds to the proposed time for the calendared event can be identified and displayed.
US09720983B1	Extracting mobile application keywords Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for content presentation. In one aspect, a method includes obtaining information associated with a mobile application of interest; determining a plurality of similar applications to the application of interest; determining keywords from the similar applications; and extracting new keywords for the application of interest using a model trained using statistical information for keywords of the plurality of similar applications that overlap with keywords of the application of interest.
US09720979B2	Method and system of identifying relevant content snippets that include additional information In one exemplary aspect, a method includes the step of obtaining a content of a content block. The content is represented as a content vector. A query is received. The query is represented as a query vector. A hierarchical sliding similarity and dissimilarity is determined for matching the content vector and the query vector, this step can include the steps of: determining a similarity measure and a dissimilarity measure for each content vector element with respect to the query vector; identifying a strong match over a sliding window of sub-terms of each content vector element; computing a sub-similarity score and a sub-dissimilarity score for each level of the convent vector element; determining a final similarity score as a combination of the strong match of some sub-vectors at different levels; and determining a final dissimilarity score as a combination of the strong match of some sub-vectors at different levels.
US09720978B1	Fingerprint-based literary works recommendation system A system that recommends literary works to a user based on identified trends of how text in the literary works liked and/or disliked by the user are written and/or structured is provided. For example, the system may analyze the text of a literary work to identify one or more metrics. Based on the identified metrics, the system can generate an analytical summary called a fingerprint for the literary work. The ratings assigned to literary works by the user may be used in conjunction with the generated fingerprints to generate positive and/or negative models for the user. The positive model captures aspects of literary works that the user likes and the negative model captures aspects of literary works that the user dislikes. The system can then compare some or all of the generated fingerprints in a literary works fingerprint database with the positive and/or negative models to select literary works to recommend to the user.
US09720976B2	Extracting method, computer product, extracting system, information generating method, and information contents An extracting method includes storing to a storage device: files that include character units; first index information indicating which file includes at least one character unit in a character unit group having a usage frequency less than a predetermined frequency and among character units having common information in a predetermined portion, the usage frequency indicating the extent of files having a given character unit; second index information indicating which file includes a first character unit having a usage frequency at least equal to the predetermined frequency and among the character units having common information in a predetermined portion; and referring to the first and second index information to extract a file having character units in the first and second index information, when a request is received for extraction of a file having the first character unit and a second character unit that is included in the character unit group.
US09720972B2	Cross-model filtering Presenting data from different data providers in a correlated fashion. The method includes performing a first query on a first data set controlled by a first entity to capture a first set of data results. The method further includes performing a second query on a second data set controlled by a second entity to capture a second set of data results. The method includes receiving a selection of one or more results from the first data set. The method further includes using the one or more selected results, consulting a relationship ontology that correlates data stored in different data stores controlled by different entities, to identify one or more relationships between data in the selected results set and the second data set.
US09720971B2	Discovering transformations applied to a source table to generate a target table Provided are a method, system, and article of manufacture for discovering transformations applied to a source table to generate a target table. Selection is made of a source table comprising a plurality of rows and a target table resulting from a transformation applied to the rows of the source table. A first pre-processing method is applied with respect to columns in the source and target tables to produce first category pre-processing output. The first category pre-processing output is used to determine first category transformation rules with respect to at least one source table column and at least one target table column. For each unpredicted target column in the target table not predicted by the determined first category transformation rules, a second pre-processing method is applied to columns in the source table and unpredicted target columns to produce second category pre-processing output. The second category pre-processing output is used to determine second category transformation rules with respect to at least one source table column and at least one target table column.
US09720968B2	Runtime optimization for multi-index access Optimization of a multi-index database access at runtime. A processor receives a query. A processor determines a plan and a record identifier (RID) results threshold for the plan, wherein the plan includes an access to the index. A processor determines a static risk threshold, a static risk for the access, and whether the static risk exceeds the static risk threshold. Responsive to the static risk exceeding the static risk threshold, a processor determines a risk bound for the access, and links the access to the risk bound. A processor accesses the index with the key. Responsive to the access being linked to a risk bound, a processor determines a dynamic risk for the access. A processor receives one or more RID results during the execution of the plan. A processor aborts the execution of the plan if a quantity of the RID results is less than the RID results threshold.
US09720966B2	Cardinality estimation for optimization of recursive or iterative database queries by databases An execution plan for executing one or more iterations of recursive database queries can be generated in accordance with one aspect of the invention. For example, in accordance with one embodiment of the invention, one or more cardinalities (results or size of results, including intermediate results) associated with one or more iterations can be estimated. This estimation can, for example, by performed by using a sampling or sampling-based algorithm.In addition, a plan generated for execution of one or more iteration of a recursive query can be modified or replaced by comparing the actual cardinality with its estimation. As a result, the first one or more iterations may be executed using a first plan but the subsequent one or more iterations may use a modified or different execution plan.
US09720962B2	Answering superlative questions with a question and answer system Mechanisms are provided for generating an answer to a superlative question. The mechanisms analyze the superlative question to extract a superlative term in the superlative question and a focus. A metric by which to evaluate the superlative term is identified based on one of a clue term in the superlative question or one or more portions of content of a corpus of information including the superlative term and focus. A search of the corpus is executed to identify one or more candidate answers to the superlative question based on evidence passages in the corpus, the superlative term, the focus, and the metric. A final answer to the superlative question is output based on the one or more candidate answers.
US09720961B1	Algebraic data types for database query languages Methods, systems, and apparatus, including computer programs encoded on computer storage media, for implementing algebraic data types in database query languages. One of the methods includes receiving an expression in a database query language, the expression having a programming language construct representing an algebraic data type, wherein the expression specifies two or more alternative subtypes. Respective domain relations are generated using definitions of each of the alternative subtypes within the expression. Unique domain identifiers are assigned among domain tuples belonging to each alternative subtype. A union relation is generated for the algebraic data type. Unique union identifiers are assigned for union tuples belonging to the union relation. Respective injector relations are generated for each of the alternative subtypes.
US09720960B2	Reporting tools for object-relational databases A view schema is generated from a view definition, wherein the view schema includes one or more relational views that are created by translating one or more object queries in the view definition into one or more relational queries. A report design schema is generated from the view definition by: creating one or more report tables that correspond to the one or more relational views of the view schema and extending the one or more report tables with one or more primary key constraints and one or more foreign key constraints. A reporting model is generated by reverse engineering the report design schema, wherein the reporting model includes the one or more primary key constraints and the one or more foreign key constraints. A report is generated using the reporting model, wherein the report includes the one or more primary key constraints and the one or more foreign key constraints.
US09720957B2	Aggregator node, method for aggregating data, and computer program product According to an aspect of the invention, an aggregator node is conceived for use in a network, wherein said aggregator node is arranged to aggregate encrypted data, and wherein said aggregator node comprises a secure element which is arranged to perform the aggregation of the encrypted data in a secure manner.
US09720953B2	Systems and methods for type coercion Systems and methods for converting a data item provided by an external data provider system into a data type specified by a data processing system for a data field of the data item. A data processing system stores a coercion rule for each data field of a first data set provided by the data provider system. Each stored coercion rule identifies at least one data type for the corresponding data field. Responsive to a second data set provided by the data provider system, the data processing system coerces each data item of the second data set into at least one data type specified by the stored coercion rule for the data field of the data item to generate at least one converted data item of the second data set. The data processing system generates information from at least one converted data item, and provides the information to a consuming system.
US09720951B2	Reducing database downtime Embodiments enable reduction of database downtime in a live production environment of an on-demand database service during repair and/or maintenance tasks. A source database and a target database are provided. Data is copied from the source database to the target database to create a mirrored set of data. Access is limited to one or more designated tables in the target database. General traffic is redirected from the source database to the target database, wherein the redirection occurs for a duration of a maintenance period. Data modifications that occur in the target database during the maintenance period are captured and then replicated into the source database. Finally, general traffic is redirected from the target database to the source database.
US09720949B2	Client-side partition-aware batching of records for insert operations Client-side partition-aware batch insert operations are presented. For example, a server generates partition metadata, which is provided to a client. The client uses the partition metadata to determine the database nodes to which to send batch insert requests. For example, the client divides batch insert data, such as records for a partitioned table, among multiple database nodes having partitions of the table. The client issues batch insert requests to the respective database nodes for execution. When executed by the database nodes, batch insert operations can be performed in parallel.
US09720948B2	Fast searching using multidimensional indexing A method and apparatus for performing relatively fast record searching is provided. The design includes providing one alphanumeric key to any record of a plurality of records not including an alphanumeric key, providing one text description comprising at least one word to any record of the plurality of records not including a text description having at least one word, and establishing a multidimensional index, where for each record there is provided in the multidimensional index a pointer pointing from one alphanumeric key to one associated record, a text description pointer pointing from each text description to the one associated record, a first reverse word index pointer pointing from each word to one alphanumeric key, and a second reverse word index pointer pointing from each word to one text description. Records are searched using the multidimensional index.
US09720947B2	Backup operations in a tree-based distributed file system Techniques for cloning, writing to, and reading from file system metadata. Cloning involves identifying a first set of pointers included in a first root node in a file system metadata tree structure that stores file system metadata in leaf nodes of the tree structure, creating a first copy of the first root node that includes the first set of pointers, creating a second copy of the first root node that includes the first set of pointers, associating the first copy with a first view, and associating the second copy with a second view. Reading generally involves traversing the tree structure towards a target leaf node that contains data to be read. Writing generally involves traversing the tree structure in the same manner, but also creating copies of any nodes to be modified if those nodes are deemed to have a different treeID than a particular root node.
US09720945B2	Ingestion plan based on table uniqueness Embodiments of the present invention disclose a method for processing tabular data. In various embodiments, an electronic document is received through a network, along with associated metadata. A plurality of table markers, or tabular data markers, are identified, in response to analyzing the received electronic document for said markers. References and citations associated with the plurality of tabular data markers are identified. A graphical representation of the relationship between identified tabular data markers and the identified references is generated. A uniqueness score is calculated, based on the generated graph and an ingestion plan is generated for the received electronic documents based on the calculated uniqueness score value.
US09720944B2	Method for facet searching and search suggestions Methods for faceted searching within clustered in-memory databases are disclosed. Faceted searching may be used to generate search suggestions. The faceted search engine may be able to use non-literal key algorithms for a partial prefix fuzzy matching and may include a feature disambiguation module. The disclosed search engine may be capable of processing large amounts of unstructured data in real time to generate search suggestions.
US09720943B2	Columnar table data protection Shuffling data stored in columnar tables improves data storage security, particularly when used in conjunction with other security operations, such as tokenization and cryptography. A data table is accessed, and pointer values of at least one column of the accessed table are shuffled, generating a protected table. An index table mapping index values to the shuffled pointer values is generated, allowing a user with access to both the protected table and the index table to generate the original table. Without both tables, users are only able to see either the shuffled data or the index values. Example shuffling methods include, but are not limited to, random shuffling, grouped shuffling, sorting by column value, and sorting by index value.
US09720941B2	Fully automated SQL tuning Techniques are provided for a fully-automated process for tuning database query language statements that selects database query language statements for tuning, tunes the database query language statements and generates tuning recommendations, tests the tuning recommendations, and determines whether to implement the tuning recommendations based on the test results. The fully-automated tuning process may also automatically implement certain tuning recommendations and monitor the performance of the database query language statements for which tuning recommendations have been implemented.
US09720936B2	Biometric matching engine The present disclosure concerns a method of identifying a biometric record of an individual in a database (108), the database comprising at least first and second sets of records, each set comprising at least one record, the method comprising: receiving by a processing device (102) at least first and second input biometric samples of said individual; performing on the records of said first set a first matching process comprising a first filtering operation followed by a second filtering operation, and performing on the records of said second set a second matching process comprising said second filtering operation followed by said first filtering operation, wherein said first filtering operation comprises comparing said first input biometric sample to a first reference biometric sample of each record, and said second filtering operation comprises comparing said second input biometric sample to a second reference biometric sample of each record; and identifying a biometric record of said individual based on results of the first and second matching processes.
US09720934B1	Object recognition of feature-sparse or texture-limited subject matter An object recognition system can be adapted to recognize subject matter having very few features or limited or no texture. A feature-sparse or texture-limited object can be recognized by complementing local features and/or texture features with color, region-based, shape-based, three-dimensional (3D), global, and/or composite features. Machine learning algorithms can be used to classify such objects, and image matching and verification can be adapted to the classification. Further, multiple modes of input can be integrated at various stages of the object recognition processing pipeline. These multi-modal inputs can include user feedback, additional images representing different perspectives of the object or specific regions of the object including a logo or text corresponding to the object, user behavior data, location, among others.
US09720933B2	Indicating location status Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for indicating location status. A computing device can receive a query from a user device, a current time, and a location for the user device. The computing device identifies results responsive to the query, including one or more business results that are each associated with a business location and operating hours. The computing device can select a subset of the business results as open results based on the operating hours of the business results, the current time, and travel times from the device location to the respective business locations. Data can be provided for a search engine results page that designates the subset of the business results as open results.
US09720931B2	Querying spatial data in column stores using grid-order scans A query of spatial data is received by a database comprising a columnar data store storing data in a column-oriented structure. Thereafter, a minimal bounding rectangle associated with the query is identified using a grid order scanning technique. The spatial data set corresponding to the received query is then mapped to physical storage in the database using the identified minimal bounding rectangle so that the spatial data set can be retrieved. Related apparatus, systems, techniques and articles are also described.
US09720926B2	Read operations in a tree-based distributed file system Techniques for cloning, writing to, and reading from file system metadata. Cloning involves identifying a first set of pointers included in a first root node in a file system metadata tree structure that stores file system metadata in leaf nodes of the tree structure, creating a first copy of the first root node that includes the first set of pointers, creating a second copy of the first root node that includes the first set of pointers, associating the first copy with a first view, and associating the second copy with a second view. Reading generally involves traversing the tree structure towards a target leaf node that contains data to be read. Writing generally involves traversing the tree structure in the same manner, but also creating copies of any nodes to be modified if those nodes are deemed to have a different treeID than a particular root node.
US09720920B2	Employing user-context in connection with backup or restore of data The claimed subject matter relates to architectures for facilitating network-accessible or local backup or restore features in a manner that leverages event-oriented contextual information associated with one or more users of the data to be backed up or restored. In particular, a first restore-based architecture can interface with an associated second backup-based architecture that hosts or maintains a backup data store in order to retrieve a version of the data file that is desired by a user. Additionally, the first architecture can obtain a log of contextual event descriptions that can be aggregated by the second architecture or obtained independently from, e.g., a social networking service or a calendar application associated with the user. Thus, in addition to displaying time and date information associated with the desired version, the first architecture can provide the user with a social context of event from the social services feeds to aid the user in distinguishing between multiple versions of the data file.
US09720914B2	Navigational aid for electronic books and documents Systems, methods, and computer storage media are provided for generating rich navigational study aids for electronic books. For a particular section of interest in a document, one or more related sections for providing additional context to the particular section are determined. The related sections are ranked based on a score indicating significance to the particular section. Based on a user's information processing preference, a set of ranked navigational links to each related section is presented to the user for additional context related to the particular section.
US09720913B1	Automatic generation of snippets based on context and user interest A system obtains a document that is responsive to a user query. The system determines an interest of the user based on stored data associated with the user, and determines that a portion of the document relates to the interest of the user. The system generates a first snippet for the document based on the portion of the document that relates to the interest of the user, and provides the first snippet for the document as part of a result list.
US09720908B2	Generating a context for translating strings based on associated application source code and markup An approach to generating a context for translating strings for a graphical user interface. The approach includes a computer receiving a string to be translated and associated source code, the string identified by a unique key within the associated source code and the associated source code is markup language. The computer identifies a first logical section of the associated source code corresponding to a unique key of the string and one or more graphical user interface components within the identified logical section of the associated source code. The computer then creates a mockup image presenting the one or more graphical user interface components and the string. The computer then labels, in the created mockup image, each of the one or more graphical user interface components and the first string of the plurality of strings, and identifies one or more additional graphical user interface components.
US09720902B2	Intention detection in domain-specific information A new information in a language and relating to a subject matter domain is parsed into a constituent set of complete grammatical constructs. In a subset of the complete grammatical constructs, a set of linguistic styles of the language is identified according to a subset of a set of word-style associations related to the language and independent of the subject matter domain. A first weight is assigned to a first linguistic style and a second weight to a second linguistic style from the set of linguistic styles. A first intention information is mapped to the first style using a first style-intention rule, and a second intention information to the second style using a second style-intention rule. A complete grammatical construct in the subset is tagged with the first intention information responsive to a weight associated with the first intention information exceeding an intention selection threshold.
US09720900B2	Automated validation of the appearance of graphical user interfaces According to embodiments of the present invention, a first metadata defining how a user interface associated with an application under test should appear is generated using one or more computer processors. An image of the user interface associated with the application under test that is invoked during a test run is captured using one or more one or more computer processors. The captured image is converted, using one or more computer processors, into one or more of a second metadata and text. The first metadata is compared, using one or more computer processors, to the second metadata and the text. In response to the comparison resulting in a difference between the first metadata and the second metadata, the image is stored, using one or more computer processors, and an assessment request is generated using one or more computer processors.
US09720899B1	Automatic generation of narratives from data using communication goals and narrative analytics The exemplary embodiments described herein are related to techniques for automatically generating narratives about data based on communication goal data structures that are associated with configurable content blocks. The use of such communication goal data structures facilitates modes of operation whereby narratives can be generated in real-time and/or interactive manners.
US09720897B2	Systems and methods for mutations and operational transforms in a collaborative spreadsheet environment Mutations representing spreadsheet edit operations are received at a server from client computers of collaborators and also at a collaborator's client computer from other collaborators and the server. Different mutations may conflict, i.e., provide contradictory instructions on how a spreadsheet is to be edited. Techniques for representing sort operations, cut-and-paste operations, and operations to change cell properties as mutations, and operational transform techniques that can be used to resolve conflicts between such mutations, are disclosed herein. Further disclosed herein are techniques for identifying and processing computationally intensive types of mutations in a calculation thread which operates asynchronously with respect to a UI thread at a collaborator's client computer. The processing may include performing an operational transform on results of the calculation thread based on results obtained in the UI thread.
US09720892B2	Managing file changes made during a review process A method for managing file changes is provided. A file editor is able to view if the file he is submitting for review, is already under review with any reviewer. A reviewer would be informed that another editor has edited the same file and has submitted his changes for review. Editors would be informed of all reviewer comments if there are multiple reviewers on one file.
US09720890B2	System and method for rendering an assessment item Systems and methods are provided for rendering an assessment item. A document encoded in a markup language is received. The document includes data that relates to at least one of an appearance and content of an assessment item, and the document includes a reference to a content file. The content file is retrieved, where the content file includes computer-executable instructions for generating an interactive graphical representation for display on a display device. The interactive graphical representation includes one or more features with which a user interacts to respond to the assessment item. The computer-executable instructions are executed based on the data of the document to generate the interactive graphical representation. Data generated based on user manipulation of the one or more features is received. The data generated from the user manipulation is processed to generate a modified graphical representation responsive to the assessment item.
US09720888B1	Distributed browsing architecture for the delivery of graphics commands to user devices for assembling a plurality of layers of a content page An intermediary system operates as an intermediary between content servers and user devices, and provides services for improving page load times as seen by end users. One such service involves converting all or a portion of a retrieved content page (e.g., web page) into a stream of graphics commands, such as OpenGL commands, that can be executed by the user device's graphics processing unit (GPU). The intermediary system sends these commands to a browser component running on the user device for execution by the GPU.
US09720887B2	Mobile-to-TV deeplinking System and methods for performing a particular action on a second device directed from a first device. In some implementations, the methods include receiving, from a first device, a hyperlink corresponding to associated content, and a user input on the first device enabling the hyperlink; in response to receiving the user input on the first device enabling the hyperlink, parsing the received hyperlink to extract information embedded in the text of the hyperlink; determining, based at least on the extracted information embedded in the text of the hyperlink, and the associated content corresponding to the hyperlink, a particular action to be performed on a second device, wherein the particular action is configured to be viewable to a user providing the user input on the first device; and providing, to the second device, an instruction to perform the particular action on the second device.
US09720877B2	Electronic device, method for controlling display of variable, and recording medium recording variable display controlling program An electronic device includes: a memory; and a processor. The processor causes a display section to display variables and variable values stored in the memory in a list form, causes the display section to display a first variable specified by a user operation as a first part of an expression, causes the display section to display the variables and the variable values after the first variable is displayed, causes the display section to display a second variable specified by a user operation as a second part of the expression, together with the first part, and calculates the expression based on the first part and the second part by referring to a variable value of the first variable and a variable value of the second variable to obtain a calculation result.
US09720876B2	Serial communication circuit, integrated circuit device, physical quantity measuring device, electronic apparatus, moving object, and serial communication method A serial communication circuit includes a receiving unit configured to serially receive input data including a command and a synchronization identification code that is different from the command and a determining unit configured to receive the synchronization identification code from the receiving unit and when the synchronization identification code coincides with a slave selection value, to instruct a start of response processing based on the command.
US09720875B2	Receiver with signal arrival detection capability A receiver includes a phase click detector, a controller, and a comparator. The phase click detector detects phase clicks in an input signal, where a phase click corresponds to a change in phase of at least a first threshold. The controller is coupled to the phase click detector for calculating a number of phase clicks within one or more time periods. The comparator compares the number of phase clicks within the one or more time periods, and provides an arrival signal if the number of phase clicks is less than a second threshold.
US09720874B2	Auto-detection and mode switching for digital interface A method of operating a microphone system includes the steps of monitoring an I/O terminal to detect whether a signal on that terminal achieves a pre-defined logic level during a monitoring period. The I/O terminal and a second I/O terminal are configured to one of a hardware mode or a communications-bus mode depending on whether the pre-defined logic level is detected. A microphone system includes two I/O terminals and an automatic detection and mode switching circuit, as well as a communications bus interface circuit and a hardware control circuit. The mode automatic detection and mode switching circuit couples the two I/O terminals to either the communications bus interface circuit or the hardware control circuit in response to the logic level detected on one of the I/O terminals during a monitoring period.
US09720871B2	Determining cable connections in a multi-cable link A method for determining cable connections identifies a plurality of cables connected to a link included in a first device. The method identifies a first cable connected to the link included in the first device. The method determines that a second cable connected to is connected to a link included in a second device The method further determines that only one of an inbound and an outbound channel of a signaling lane included in the first cable is operable. The method utilizes a second cable to perform one of disabling signal transmission or detecting loss of signal on the operable channel. The method enables and disables signal transmission on the operable channel to determine that the first cable is connected to the link included in the remote device.
US09720870B2	Semiconductor device and memory system A semiconductor device capable of communicating with a host apparatus includes a symbol generation unit, a coding unit, and a transmission unit. The symbol generation unit includes a random number generation circuit and generates a symbol according to a random number generated by the random number generation circuit. The coding unit performs 8b/10b coding for the symbol. The transmission unit transmits the symbol coded by the 8b/10b coding unit to the host apparatus.
US09720867B2	Processing system with interspersed processors with multi-layer interconnection Embodiments of a multi-processor array are disclosed that may include a plurality of processors and configurable communication elements coupled together in a interspersed arrangement. Each configurable communication element may include a local memory and a plurality of routing engines. The local memory may be coupled to a subset of the plurality of processors. Each routing engine may be configured to receive one or more messages from a plurality of sources, assign each received message to a given destination of a plurality of destinations dependent upon configuration information, and forward each message to assigned destination. The plurality of destinations may include the local memory, and routing engines included in a subset of the plurality of configurable communication elements.
US09720865B1	Bus sharing scheme A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.
US09720862B1	Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, interrupt mapping information, where the hypervisor supports operation of a logical partition executing and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the hypervisor, the destination I/O adapter with the interrupt mapping information collected by the hypervisor; placing, by the hypervisor, the destination I/O adapter and the source I/O in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
US09720861B2	Memory access by dual processor systems Methods and apparatus for control access to memory in dual-processor. In particular, there are disclosed methods and apparatus for use where a single memory is shared for instructions for the processors and a data store to reduce conflicts between access requirements.
US09720860B2	System and method for efficient processing of queued read commands in a memory system A solid state drive (SSD) storage system includes a memory controller, host interface, memory channels and solid state memories as storage elements. The completion status of sub-commands of individual read commands is monitored and used to determine an optimal selection for returning data for individual read commands. The completion of a read command may be dependent on the completion of multiple individual memory accesses at various times. The queueing of multiple read commands which may proceed in parallel or out of order causes interleaving of multiple memory accesses from different commands to individual memories. A system and method is disclosed which enables the selection, firstly of completed read commands, independent of the order they were queued and, secondly, of partially completed read commands which are most likely to complete with the least interruption or delay, for data transfer, which in turn improves the efficiency of the data transfer interface.
US09720857B2	Distributed I/O control system, distributed I/O control method, and master station and slave station for distributed I/O control system In a distributed I/O control system updating data through a network between a shared memory of a slave station performing input/output of data with plural input or output devices and a shared memory of the master station corresponding to the slave station's shared memory, the master station sets group information with respect to the input or output devices, and outputs, according to a cycle table, an input request frame specifying the shared memory in the slave station and the group information, and the slave station performs input/output of data with plural input or output devices, and determines whether an input request content specified by an input request frame from the master station is all information in the shared memory in the slave station, or information corresponding to the group information, to thereby transmit output data according to the input request content.
US09720855B2	Virtual device based systems with access to parts other than data storage elements through the virtual device An embodiment includes a system, comprising: a device configured to present a logical device and enable a virtual device in response to a control signal; and a processor coupled to the device and configured to: present the logical device through a first device interface; transmit the control signal to the device to enable the virtual device; and after the virtual device is enabled, present the virtual device through a second device interface.
US09720854B2	Hub-to-hub peripheral discovery Aspects of the disclosure enable location of a wireless peripheral by a computing device even when the wireless peripheral is beyond a communication range of, or otherwise inaccessible by, the computing device. A user gives a command to a first computing device to determine the location of the wireless peripheral. The first computing device requests other networked computing devices to locate the wireless peripheral. At least one of the other networked computing devices establishes communication with the wireless peripheral, obtains location information for the wireless peripheral, and communicates the location information to the first computing device. The first computing device communicates the location of the wireless peripheral to the user.
US09720853B2	Universal serial bus (USB) key functioning as multiple USB keys so as to efficiently configure different types of hardware A method, data storage device and computer program product for efficiently configuring different types of hardware components. A Universal Serial Bus (USB) key is preloaded with multiple profiles, where each profile contains a configuration file(s) associated with a particular type of hardware component. Upon plugging the USB key into a hardware component, the USB key recognizes the type of hardware component based on the properties of the hardware component available on the USB interface. The USB key identifies a profile containing the configuration file(s) associated with the recognized type of hardware component. The USB key then presents the configuration file(s) contained in the identified profile to the connected hardware component. Such a process may be repeated for configuring another type of hardware component. In this manner, the user is able to efficiently configure different types of hardware by having the USB key function as multiple USB keys.
US09720851B2	Method and apparatus for managing access to a memory A method and apparatus for managing access to a memory of a computing system. A controller transforms a plurality of operations that represent a computing job into an operational memory layout that reduces a size of a selected portion of the memory that needs to be accessed to perform the computing job. The controller stores the operational memory layout in a plurality of memory cells within the selected portion of the memory. The controller controls a sequence by which a processor in the computing system accesses the memory to perform the computing job using the operational memory layout. The operational memory layout reduces an amount of energy consumed by the processor to perform the computing job.
US09720847B2	Least recently used (LRU) cache replacement implementation using a FIFO storing indications of whether a way of the cache was most recently accessed A method and apparatus for calculating a victim way that is always the least recently used way. More specifically, in an m-set, n-way set associative cache, each way in a cache set comprises a valid bit that indicates that the way contains valid data. The valid bit is set when a way is written and cleared upon being invalidated, e.g., via a snoop address, The cache system comprises a cache LRU circuit which comprises an LRU logic unit associated with each cache set. The LRU logic unit comprises a FIFO of n-depth (in certain embodiments, the depth corresponds to the number of ways in the cache) and m-width. The FIFO performs push, pop and collapse functions. Each entry in the FIFO contains the encoded way number that was last accessed.
US09720846B2	Memory swap for direct memory access by a device assigned to a guest operating system A hypervisor detects a page fault associated with the request for a device assigned to a guest operating system to perform direct memory access (DMA) of a requested page of memory, invalidates a mapping in a central processing unit (CPU) page table of a guest physical address to a host physical address for a candidate page for being swapped out of host memory, checks a DMA access state of the candidate page to determine whether or not the candidate page can be swapped out from the host memory, and removes the candidate page from the host memory in response to determining that the DMA access state indicates that the candidate page can be swapped out.
US09720845B2	Identifying stale entries in address translation cache A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
US09720840B2	Way lookahead Methods and systems that identify and power up ways for future instructions are provided. A processor includes an n-way set associative cache and an instruction fetch unit. The n-way set associative cache is configured to store instructions. The instruction fetch unit is in communication with the n-way set associative cache and is configured to power up a first way, where a first indication is associated with an instruction and indicates the way where a future instruction is located and where the future instruction is two or more instructions ahead of the current instruction.
US09720834B2	Power saving for reverse directory Embodiments include systems and methods for improving power consumption characteristics of reverse directories in microprocessors. Some embodiments operate in context of multiprocessor semiconductors having cache hierarchies in which multiple higher-level caches share lower-level caches. Lower-level cache is coupled with reverse directories associated with respective ones of the higher-level caches. Each reverse directory can be segregated into two reverse sub-directories, one reverse sub-directory for relatively high-frequency accesses (e.g., updating “valid” and/or “private” information), and the other reverse sub-directories for relatively low-frequency accesses updating “index” and “way” information). During a write mode operation, when the reverse directories are updated, the write operation is performed only on the sub-directories having the entries invoked by the update, such that write operations can frequently consume only a fraction (e.g., halt) of the power of a conventional reverse directory write operation.
US09720833B2	Nested cache coherency protocol in a tiered multi-node computer system A computer system comprising multiple nodes, each node comprising a plurality of processors and a local cache hierarchy, suppresses local cache coherency of a node operations or global cache coherency operations between nodes based on the coherency request being a global or local request, and the state of the cache line at the node.
US09720831B2	Systems and methods for maintaining the coherency of a store coalescing cache and a load cache A method for maintaining the coherency of a store coalescing cache and a load cache is disclosed. As a part of the method, responsive to a write-back of an entry from a level one store coalescing cache to a level two cache, the entry is written into the level two cache and into the level one load cache. The writing of the entry into the level two cache and into the level one load cache is executed at the speed of access of the level two cache.
US09720829B2	Online learning based algorithms to increase retention and reuse of GPU-generated dynamic surfaces in outer-level caches Some implementations disclosed herein provide techniques for caching memory data and for managing cache retention. Different cache retention policies may be applied to different cached data streams such as those of a graphics processing unit. Actual performance of the cache with respect to the data streams may be observed, and the cache retention policies may be varied based on the observed actual performance.
US09720828B2	Electronic device An electronic device includes a first magnetic layer pinned in its magnetization direction, a third magnetic layer pinned in its magnetization direction, a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and changeable in its magnetization direction, a barrier layer interposed between the first magnetic layer and the second magnetic layer, and a dielectric layer interposed between the second magnetic layer and the third magnetic layer, wherein the first magnetic layer has a width 1.5 to 5 times wider than a width of the second magnetic layer.
US09720827B2	Providing multiple memory modes for a processor including internal memory In one embodiment, a processor comprises: at least one core formed on a die to execute instructions; a first memory controller to interface with an in-package memory; a second memory controller to interface with a platform memory to couple to the processor; and the in-package memory located within a package of the processor, where the in-package memory is to be identified as a more distant memory with respect to the at least one core than the platform memory. Other embodiments are described and claimed.
US09720825B2	System and method for performance optimal partial rank/bank interleaving for non-symmetrically populated DIMMs across DDR channels An information handling system includes a processor having a plurality of memory channels. The information handling system also includes a plurality of dual inline memory modules non-symmetrically populated on the memory channels. The dual inline memory modules are divided by bank to create a plurality of interleave groups, and each of the interleave groups spans across all of the memory channels of the processor.
US09720823B2	Free memory trending for detecting out-of-memory events in virtual machines The disclosed embodiments provide a system that detects anomalous events in a virtual machine. During operation, the system obtains time-series virtual machine (VM) data including garbage-collection (GC) data collected during execution of a virtual machine in a computer system. Next, the system computes, by a service processor, a time window for analyzing the time-series VM data based at least in part on a working time scale of high-activity patterns in the time-series GC data. The system then uses a trend-estimation technique to analyze the time-series VM data within the time window to determine an out-of-memory (OOM) risk in the virtual machine. Finally, the system stores an indication of the OOM risk for the virtual machine based at least in part on determining the OOM risk in the virtual machine.
US09720821B2	Adaptive compression data storing method for non-volatile memories and system using the same An adaptive compression data storing method for non-volatile memories and a system using the method are disclosed. The system includes a host interface unit, a data compressor, a padding unit, a buffer, a combining unit, and a mapping table unit. By combining some compressed data in one page, the present invention can settle the problem that space for storing a compressed data that can not be utilized. Further, lifetime of non-volatile memories can be extended.
US09720820B2	Data storage device and flash memory control method A FLASH memory control technique with wear leveling between the different blocks of the FLASH memory. By a controller managing the blocks of a FLASH memory within a data storage device, some of the blocks are pushed into a spare queue waiting to be allocated as data blocks or system blocks. When the number of blocks within the spare queue is lower than a clean threshold and any block within the spare queue has an erase count greater than an overused lower threshold, the controller performs a garbage correction operation with wear leveling between the different blocks.

1 2 3 4 5 6 7 8 9 10