| Document | Document Title |
|---|---|
| US09614690B2 |
Smart home automation systems and methods
A smart home interaction system is presented. It is built on a multi-modal, multithreaded conversational dialog engine. The system provides a natural language user interface for the control of household devices, appliances or household functionality. The smart home automation agent can receive input from users through sensing devices such as a smart phone, a tablet computer or a laptop computer. Users interact with the system from within the household or from remote locations. The smart home system can receive input from sensors or any other machines with which it is interfaced. The system employs interaction guide rules for processing reaction to both user and sensor input and driving the conversational interactions that result from such input. The system adaptively learns based on both user and sensor input and can learn the preferences and practices of its users. |
| US09614688B2 |
Providing image data to a client display device
Providing display information to a client display device communicating with a plurality of servers is disclosed. Each of the servers provides a pre-assigned partial region of an overall image for display on the client display device. The client display device sends a request to each server via a multicast or broadcast communication channel. The request includes an identification of a plurality of partial regions of an image to be displayed on the client display device. The client display device receives image data from each server that is assigned to generate image data for partial regions identified by the client. Each of such servers asynchronously provides the image data for its pre-assigned partial region by sending the image data over one or more respective data communication channels to the client display device, in accordance with the request sent to each server via the communication channel. |
| US09614687B2 |
Dynamic configuration of a conference system with distributed media agents
A conference controller receives access requests to access a conference session from respective callers. Responsive to the requests, the controller sends a conference identifier (ID) and respective agent discovery information to each of the callers. Each caller discovers an appropriate respective media agent based on the respective agent discovery information and sends a join request including the conference ID to that media agent. In turn, the media agents send requests for configuration information to the controller. Responsive to the requests from the media agents, the controller provides configuration information to the media agents that the media agents use to form a media connection with each other for the conference session through which the callers exchange media packets. |
| US09614686B2 |
Protected premises network apparatus and methods
Apparatus and methods for enabling protected premises networking capabilities. In one embodiment, the premises network is a Multimedia over Coaxial Alliance (MoCA) network, and is secured by a requirement that devices use a password or key to access the network. The password may be given only to authorized devices. Information regarding a device may be utilized to associate the device with a particular premises network, and provide a password to authorized devices. The password is unique to the premises in one variant by being derived from a subscriber account. At least one of the devices requesting access to the premises network may comprise a gateway device. A home network utilizing existing coaxial cable in the premises is created between a plurality of authorized devices each receiving the password. |
| US09614684B2 |
External indexing and search for a secure cloud collaboration system
An end-to-end secure cloud-hosted collaboration service is provided with a hybrid cloud/on-premise index and search capability. This approach includes on-premise indexing and search handling, while relying on the cloud for persistent storage and search of the index. The on-premise indexer receives a copy of an encrypted message from the cloud-hosted collaboration service. The encrypted message has been encrypted with a conversation key. The indexer receives the conversation key from an on-premise key management service, and decrypts the encrypted message with the conversation key. A set of tokens are extracted from the decrypted message, and subsequently encrypted with a secret key, different than the conversation key, to generate a first set of encrypted tokens. The first set of encrypted tokens is transmitted for storage in a search index on the cloud-hosted collaboration service. |
| US09614680B2 |
System and method for signature capture
A method of signature capture for a document uses a portable digital media device with a touch responsive screen on which the signer traces his signature. An URL address is sent to the device and opened in the web browser. The URL address is valid for a limited period of time, and the signature is stored at a webpage associated with the URL address. |
| US09614677B2 |
Secure function evaluation of tree circuits
A first circuit representation of a given function is obtained at a first processing device. The given function comprises at least two computer programming switch statement clauses. A second circuit representation is generated at the first processing device from the first circuit representation wherein the at least two computer programming switch statement clauses are respectively represented by at least two tree circuits that are embedded in the second circuit representation such that the second circuit representation is characterized by a given cost (e.g., a minimum cost). The second circuit representation is encrypted at the first processing device, and sent to a second processing device for secure evaluation of the given function by the second processing device. |
| US09614675B2 |
Methods, apparatus, and articles of manufacture to encode auxiliary data into text data and methods, apparatus, and articles of manufacture to obtain encoded data from text data
Methods, apparatus, and articles of manufacture to encode auxiliary data into text data and methods, apparatus, and articles of manufacture to obtain encoded data from text data are disclosed. An example method includes assigning encoded data units to respective ones of a plurality of groups, the encoded data units including text data, identifying a symbol present in a first one of the encoded data units assigned to a first one of the groups, and outputting auxiliary data embedded in the encoded data units based on the symbol and based on the one of the groups of the first one of the encoded data units. |
| US09614673B2 |
Method of managing keys and electronic device adapted to the same
A method of managing keys and an electronic device adapted to the method are provided. The method includes creating a first key, based on information included in a memory space of a processor, creating a second key, based on at least one item of user information, and creating a third key that was created through at least one encryption process, based on the created first key and the created second key. |
| US09614670B1 |
Systems and methods for encryption and provision of information security using platform services
Systems and methods for securing or encrypting data or other information arising from a user's interaction with software and/or hardware, resulting in transformation of original data into ciphertext. Generally, the ciphertext is generated using context-based keys that depend on the environment in which the original data originated and/or was accessed. The ciphertext can be stored in a user's storage device or in an enterprise database (e.g., at-rest encryption) or shared with other users (e.g., cryptographic communication). The system generally allows for secure federation across organizations, including mechanisms to ensure that the system itself and any other actor with pervasive access to the network cannot compromise the confidentially of the protected data. |
| US09614669B1 |
Secure network communications using hardware security barriers
One embodiment includes hardware-based cybersecurity devices that create a physical barrier (“hardware security barrier”) between a computer's (or other device's) processor and a public or private network. Hardware security barriers typically use immutable hardware in accomplishing cybersecurity activities including generating and distributing cryptographically secure numbers, encryption, decryption, source authentication, and packet integrity verification. This hardware security barrier protects against remote threats and guarantees that all exported and received data are strongly encrypted. A hardware security barrier can be included in any computing or networking device that contains a network interface. One embodiment of a hardware security barrier is implemented as part of a network interface, such as, but not limited to being part of a network interface controller, or as a standalone unit between a communications interface of a host system and a connection to a network. |
| US09614667B2 |
Information processing apparatus and method therefor
A plural number M (M≧2) of block cipher encryption units perform, in a block order, either encryption processing or decryption processing for data of a series of blocks each having a predetermined data size and included in a data unit. The plural number of block cipher encryption units perform either encryption of decryption for the data unit by repeating processing in the block order. Every time processing of a data unit starts, a block cipher encryption unit configured to process the data of the nMth (nM |
| US09614662B2 |
Multi-input wireless receiver based on RF sampling techniques
In some aspects, the disclosure is directed to methods and systems of a multi-input receiver. In one or more embodiments, a receiver receives a plurality of signals each via a respective one of a plurality of wireless channels. In one or more embodiments, a processing stage of the receiver combines the received plurality of signals into a combined signal for input to an analog-to-digital converter (ADC) of the receiver. In one or more embodiments, the ADC generates, at a predetermined sampling frequency, samples of the combined signal. In one or more embodiments, the receiver recovers from the generated samples at least one signal component corresponding to at least one of the plurality of signals. |
| US09614656B2 |
Providing in-line services through radio access network resources under control of a mobile packet core in a network environment
A method is provided in one example embodiment and includes sending, by a first entity associated with an access network, a first request message including a session identifier associated with a user session to a second entity associated with a core network. The method further includes establishing a first control channel with the second entity in which the first control channel is associated with the session identifier. The first control channel is an in-band channel between the first entity and the second entity. The method further includes receiving policy information associated with the user session from the second entity using the first control channel. The policy information is indicative of one or more policies to be applied in the access network to user data associated with the user session. |
| US09614654B2 |
Adaptive control channel design for balancing data payload size and decoding time
A method of wireless communication includes allocating transport blocks to a control channel region as a function of the size of the transport block. The user equipment (UE) monitors at least two different control regions in a subframe for control information. The monitored control regions do not overlap in time. The UE receives a subframe including control information in at least one of the two different control regions. |
| US09614651B1 |
Coordinating wireless communication with access nodes
When a first throughput between the wireless device and a first access node meets a threshold, an application requirement of an application running on the wireless device is determined. Measurements are received of a first signal level of the communication link between the wireless device and the first access node and a second signal level of a signal from a second access node received at the wireless device. A first data rate is estimated using a first communication scheme between the wireless device and the first and second access nodes, and a second data rate is estimated using a second communication scheme between the wireless device and the first and second access nodes. One of the communication schemes is selected for use by the wireless device and the first and second access nodes based on the estimated first data rate and the estimated second data rate and the application requirement. |
| US09614646B2 |
Method and system for robust message retransmission
Techniques are disclosed for message retransmission. In one embodiment, an agent in a distributed system that receives and/or relays messages from a master node identifies messages that have not been successfully delivered, and adds a stub for each such message to a message queue. The agent then requests retransmission of missing messages in the message queue and sets flags associated with the message stubs to indicate that retransmission requests have been sent. If one (or more) of the messages cannot be retransmitted, the master node sends acknowledgment message(s) notifying the agent of the master node's inability to retransmit the messages. The agent then resets the flags corresponding to those messages to indicate that retransmission request(s) need to be sent again. |
| US09614640B2 |
Method, device and system for detecting a jamming transmitter
A base station in a cellular radio network and user equipment assigned to a cell are linked by an air interface for communication on a respective communication channel in a communication band. The same communication band is common to at least one of the cells and to the user equipment on the respective communication channel of a cell. A jamming transmitter is detected by decoding a cell, by way of successful reading of control information of the cell, detecting a wideband power parameter representative of the communication band, and detecting a channel power parameter representative for a part of the communication band that is a communication channel. A narrowband jamming transmitter is indicated in the case that decoding of the cell failed, the wideband power parameter is not above a first threshold, and the channel power parameter is above a second threshold. |
| US09614639B2 |
Power control of optical signals having different polarizations
Consistent with an aspect of the present disclosure, an optical communication apparatus is provided that transmits a WDM signal including a plurality of optical channels, wherein each channel has a corresponding one of a plurality of wavelengths. Each of the plurality of optical channels includes optical signals having first (e.g., TE) and second (e.g., TM) polarizations. In one example, each polarized optical signal is modulated in accordance with an identifying tone. The optical channels are combined onto a waveguide, and an optical tap connected or coupled to the waveguide supplies a portion of the WDM signal including a composite of the optical channels to a photodiode. The aggregate power received by the photodiode includes the power associated with each optical channel, and the power of each channel is the sum of the powers of individual polarized optical signals within that channel. The photodiode converts the received WDM portion including the polarized optical signal portions into corresponding electrical signals. A processor circuit demodulates the electrical signals, identifies the tones, and determines a modulation depth for each tone. Based on the modulation depth, a ratio of the optical powers of one polarized optical signal to another can be calculated, and the optical powers of one or both of the polarized optical signals in each channel can be adjusted so that the optical power ratio has a desired value, e.g., a value substantially equal to one. Thus, one tap and one photodiode may be provided to monitor each polarized optical signal within each WDM channel, thereby reducing costs and yielding a simpler system design. |
| US09614638B2 |
Methods and systems for periodic optical filtering to identify tone modulated optical signals
Methods and systems for periodic optical filtering to identify tone modulated optical signals may enable relatively rapid scanning of an optical signal to identify individual optical channels. The optical signal having tone modulated optical channels may be scanned over a free spectral range of a periodic optical filter, such as a comb filter, to generate a filtered signal. Then, center optical frequencies for each of the optical channels in the filtered signal may be determined by demodulation and digital signal processing. |
| US09614625B2 |
Visible light communication system
In a visible light communication system including a transmission device and a receiving device arranged separately in a vertical direction and provided so as to relatively move in a horizontal direction, which transmits data from the transmission device to the receiving device by optical space transmission using visible light, the transmission device includes a first light emitting part outputting visible light, and the first light emitting part has a light source emitting visible light and a correction part correcting the light radiated from the light source so as to uniform a light intensity distribution on a horizontal plane. Even when the transmission device and the receiving device arranged separately in the vertical direction relatively move in a horizontal direction, data can be stably transmitted and received by the optical space transmission using visible light. |
| US09614623B2 |
High bandwidth photodetector current replicator
Methods and systems for replicating high bandwidth current outputs from a photodetector or another current source include using a transimpedance amplifier (TIA) to directly generate a TIA voltage that is linear with optical power at the photodetector. The TIA voltage is used to generate a current that flows to a log amp, which generates a voltage that is linear with the optical power in dB. Additionally, offset cancellation is used at the TIA and at the log amp. |
| US09614621B2 |
Signal generating circuit, optical signal transmitting apparatus, signal receiving circuit, method for establishing optical signal synchronization, and optical signal synchronization system
To enable signal position detection, frequency offset compensation, clock offset compensation, and chromatic dispersion amount estimation in a communication system based on coherent detection using an optical signal, even on a signal having a great offset in an arrival time depending on a frequency due to chromatic dispersion. An optical signal transmitting apparatus generates specific frequency band signals having power concentrated on two or more specific frequencies and transmits a signal including the specific frequency band signals. An optical signal receiving apparatus converts a received signal into a digital signal, detects positions of the specific frequency band signals from the converted digital signal, estimates frequency positions of the detected specific frequency band signals, and detects a frequency offset between an optical signal receiving apparatus and an optical signal transmitting apparatus. Moreover, the optical signal receiving apparatus detects a clock offset between the optical signal receiving apparatus and the optical signal transmitting apparatus from an interval between the estimated frequency positions of the specific frequency band signals. Furthermore, the optical signal receiving apparatus estimates temporal positions of the detected specific frequency band signals and detects a chromatic dispersion amount from a difference between the temporal positions of the specific frequency band signals corresponding to different frequencies. |
| US09614618B2 |
CATV video and data transmission system with hybrid input
Improved systems and methods for delivering CATV content over a fiber optic network from a transmitter. |
| US09614600B2 |
Base station apparatus, user terminal, communication system and communication control method
A base station apparatus, a user terminal, a communication system and a communication control method that can support the diversification of communication is provided. In a base station apparatus, downlink measurement object signals are pre-coded using precoding weights that are specific to a user terminal, and transmitted to the user terminal, and, in the user terminal, the downlink measurement object signals are demodulated using the precoding weights that are specific to the user terminal, and measurement processes are performed based on the demodulated downlink measurement object signals. |
| US09614595B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
A method and an apparatus for receiving broadcast signals thereof are disclosed. The apparatus for receiving broadcast signals, the apparatus comprises a receiver to receive the broadcast signals, a demodulator to demodulate the received broadcast signals by an OFDM (Orthogonal Frequency Division Multiplex) scheme, a frame parser to parse a signal frame from the demodulated broadcast signals, wherein the signal frame includes service data corresponding to each of a plurality of physical paths, a time deinterleaver to time deinterleave service data in each physical path by a TI (Time Interleaving) block, wherein the time deinterleaver further performs inserting at least one virtual FEC block into at least one TI block of the service data, wherein each TI block includes a variable number of FEC blocks of the service data, wherein a number of the at least one virtual FEC block is defined based on a maximum number of FEC blocks of a TI block and a decoder to decode the time deinterleaved service data. |
| US09614592B2 |
Thin chassis near field communication (NFC) antenna integration
Described herein are techniques related one or more systems, apparatuses, methods, etc. for integrating a near field communications (NFC) coil antenna in a portable device. For example, the NFC antenna is integrated under a metal chassis of the portable device. The metal chassis and a conductive coating—that is integrated underneath the full metal chassis—are designed to include one or more slots to provide high impedance to Eddy current induced in the conductive coating. |
| US09614584B2 |
Simultaneous launching of multiple signal channels in a dielectric waveguide using different electromagnetic modes
A device is configured for transmitting multiple channels of information through a dielectric waveguide (DWG). The device generates at least a first radio frequency signal (RF) and a second RF signal. The first RF signal is launched into the DWG using a launching structure formed within a multilayer substrate to excite a first transmission mode of the DWG. The second RF signal is launched into the DWG using a launching structure formed within the multilayer substrate to excite a second transmission mode of the DWG, in which the second transmission mode is orthogonal to the first transmission mode. |
| US09614577B2 |
Clock synchronization for line differential protection
A method and arrangement are provided for time synchronization between two geographically separated stationary clocks, such as first and second clocks located respectively at first and second ends of an AC power line. A first representation of an oscillating power line quantity is produced by measuring or recording the power line quantity at the first end of the power line, and time-stamping the first representation by the first clock. A second representation of the same oscillating power line quantity is produced by measuring the power line quantity at the second end of the power line, and time-stamping the second representation by the second clock. The first and second representations are compared to determine a clock offset between the first and second clocks. Based on the comparison, one or both of the first and second clocks are adjusted to reduce the determined clock offset. |
| US09614575B2 |
Direct coupled radio frequency (RF) transceiver front end
A method and apparatus is disclosed to couple a transmission amplifier and a reception amplifier to a shared medium. An output of the transmission amplifier is directly coupled to an input of the reception amplifier to form a common connection. The transmission amplifier and the reception amplifier may receive a first amplifier bias via the common connection. In response to the first amplifier bias, the transmission amplifier provides a first communication signal to the shared medium and the reception amplifier does not provide a second communication signal from the shared medium. Alternatively, the transmission amplifier and the reception may receive a second amplifier bias via the common connection. In response to the second amplifier bias, the reception amplifier provides the second communication signal from the shared medium and the transmission amplifier does not provide the first communication signal to the shared medium. |
| US09614572B2 |
Apparatus and method for extending feature selection in a communication system
A method and apparatus for expanding control switch selectivity in a portable communication system is provided. A rotary control switch is remapped based on the presence of two or more switches in the system thereby increasing the number of user selectable switch features, such as user selectable radio channels. The remapping can occur automatically without the need for hardware changes. The improved user interface can extend channel range selection in a portable communication system having a portable radio and radio accessory. |
| US09614571B2 |
Multi-band isolator assembly
An isolator assembly is configured to provide isolation in each of multiple non-overlapping frequency bands and includes a selection network to select one of the multiple non-overlapping frequency bands for an isolation operation. During the isolation operation, the isolator assembly prevents signal coupling between antennas that are positioned on opposite sides of the isolator assembly. |
| US09614569B2 |
Waterproof casing with exposed display surface
A protective case for housing a mobile device is provided. The protective case comprises a top shell that seals against a top surface of a device and a bottom shell that cradles the bottom of the device. The top shell provides a downward extension along its perimeter that fits within a trench or pocket formed around at least a portion of the perimeter of the bottom shell. An underside of the top shell includes a permanently chemically bonded compressible and waterproof film layer. The waterproof film layer is configured to seal directly against the top surface of the mobile device. |
| US09614566B2 |
Method and apparatus for variable header repetition in a wireless OFDM network with multiple overlapped frequency bands
Method and apparatus for use within a wireless OFDM network that transmits and receives first and second packets each having header bits and utilizing variable header repetition. The header bits in the first packet are communicated on multiple OFDM symbols and repeated on a plurality of OFDM subcarriers in a first frequency band. The header bits in a second packet are communicated on fewer OFDM symbols and in a second frequency band that overlaps with and is wider than the first frequency band. |
| US09614563B2 |
Double down-conversion with multiple independent intermediate frequencies for E-band applications
An apparatus includes a first receiver frequency conversion stage and a second receiver frequency conversion stage. The first receiver frequency conversion stage may be configured to generate at least four first intermediate frequency signals in response to a radio frequency (RF) input signal and respective phases of a first local oscillator signal. The second receiver frequency conversion stage may be configured to generate at least four output signals in response to the at least four first intermediate frequency signals and one or more phases of a second local oscillator signal. Each of the at least four output signals is generated in an independent channel in response to a respective one of the at least four first intermediate frequency signals and a respective one of the one or more phases of the second local oscillator signal. |
| US09614561B2 |
Method and apparatus for mitigating radio frequency interference (RFI) in a portable electronic device while conserving battery power
A method and circuit for mitigating RFI in an electronic device that occurs while the device is in a low power mode utilizes one or more antenna elements in the device to receive RF energy. When the RF energy is sufficiently high that it could affect signal states in the device while in the low power mode, the device transitions from the low power mode to an active mode and begins an RFI mitigation process to ensure signal states and other circuit operations in the device are not changed by the RFI. |
| US09614558B2 |
Apparatus and method for phase unwrapping of a burst signal
A device and method for unwrapping phase samples of a burst signal. The device generates a set of vectors including phase samples. A first mean and a first variance of the vectors is computed, and a set of unwrapped phase samples of the burst signal are computed by rotating phase samples of the vector having a smallest first variance by a first rotation amount. The set of vectors is updated based on a new phase sample and a second mean and a second variance of the updated set of vectors is computed. Differences between unwrapped phase samples and a number of phase samples included in the vector having the smallest computed second variance are computed. A next unwrapped phase sample is generated by rotating the new phase sample by a second rotation amount corresponding to a median value of the computed differences. |
| US09614557B1 |
Apparatus and methods for phase synchronization of local oscillators in a transceiver
A method and apparatus for phase adjustment of a RF transceiver is disclosed. Based on a first local oscillator signal and a second local oscillator signal, a beat signal that indicates the frequency and phase relationship between the first and second local oscillator signals can be generated. Using the beat signal, changing phase relationship between the first and second local oscillator signals can be cumulatively taken account for using phase averaging to allow quick restoration to observation of a previously observed channel. |
| US09614555B2 |
AC coupled transmission circuit and system
According to an embodiment, a transmission circuit is configured to transmit a signal to a reception circuit through a transmitting AC coupling element. The transmitting AC coupling element is AC coupled to a receiving AC coupling element. The transmission circuit includes a drive signal generation circuit and a drive circuit. The drive signal generation circuit is configured to generate a drive signal in synchronization with a transmission signal to be transmitted. The drive circuit is configured to cause, in response to the drive signal, a drive current to flow between both ends of the transmitting AC coupling element in synchronization with a rising edge and a falling edge of the transmission signal during a driving period set in advance. The drive circuit is configured to apply an applied voltage to both of the ends of the transmitting AC coupling element after the driving period. |
| US09614553B2 |
Energy self-sufficient radiofrequency transmitter
The energy self-sufficient radiofrequency transmitter has at least one electromechanical transducer with a rectifier circuit connected downstream and with a voltage converter circuit. A logic circuit configuration is connected to the voltage converter circuit. The logic circuit configuration has a sequence controller a memory in which an identification code is stored. The energy self-sufficient radiofrequency transmitter also has a radiofrequency transmission stage that is connected to the logic circuit configuration and a transmission antenna. |
| US09614552B2 |
Millimeter-wave modulation device
Provided is a lower power and high efficiency millimeter-wave modulation apparatus capable of modulating digital data into transmitting signals in a millimeter frequency band, the millimeter-wave modulation apparatus including; a modulation part, which carries out a modulation of a constant envelope attribute, and to which a first local oscillation signal is fixed according to a rate of input data; a phase shifter adopted to shift a phase of an output of the modulation part; a power amplifier adopted to amplify an output of the phase shifter; and an antenna connected to an output of the power amplifier. |
| US09614551B2 |
Device, system and method of configuring a radio transceiver
A device, system and method of configuring a radio transceiver are described. In particular, there is described an RF front-end for transmitting wireless communication signals, the RF front-end comprising a plurality of elements, and wherein the RF front-end is configured to obtain an RF protection class signal and to selectively apply one or more of the plurality of elements to a transmitted signal based on the obtained RF protection class signal. |
| US09614548B1 |
Systems and methods for hybrid message passing and bit flipping decoding of LDPC codes
Systems and methods are provided for iterative data decoding. Decoding circuitry receives a first message from a variable node at a check node. Decoding circuitry generates a second message based at least in part on the first message. Decoding circuitry transmits the second message to the variable node. Decoding circuitry updates a hard decision value of the variable node based at least in part on the first message and the second message. |
| US09614544B2 |
Systems, methods, and apparatuses for decompression using hardware and software
Detailed herein are embodiments of systems, methods, and apparatuses for decompression using hardware and software. For example, in embodiment a hardware apparatus comprises an input buffer to store incoming data from a compressed stream, a selector to select at least one byte stored in the input buffer, a decoder to decode the selected at least one byte and determine if the decoded at least one byte is a literal or a symbol, an overlap condition, a size of a record from the decoded stream, a length value of the data to be retrieved from the decoded stream, and an offset value for the decoded data, and a token format converter to convert the decoded data and data from source and destination offset base registers into a fixed-length token. |
| US09614540B1 |
Asynchronously clocked successive approximation register analog-to-digital converter
The exemplary embodiments relate to an asynchronously clocked successive approximation register analog-to-digital converter (SAR ADC) configured to provide a digital approximation of a sampled input signal as a result of an asynchronous successive approximation operation. The converter includes a regulation circuit configured to determine whether the asynchronous successive approximation operation was performed within a predefined conversion time and to regulate the SAR ADC such that the conversion time of the asynchronous operation is shifted towards the predefined conversion time. The embodiments further relate to a corresponding method and a corresponding design structure. |
| US09614538B1 |
Analog-to-digital conversion based on signal prediction
Methods and apparatuses are described for performing adaptive analog-to-digital conversion and time-to-delay conversion by using signal prediction to adjust reference voltages of adjustable comparators. |
| US09614536B2 |
Phase locked loop with lock detector
A phase locked loop is disclosed comprising: a phase detector, loop filter and a frequency controlled oscillator. The phase detector is configured to determine a phase difference between a reference signal and a feedback signal. The loop filter is configured to perform a filtering operation on a signal derived from the phase difference and to provide a control signal. The frequency controlled oscillator is configured to receive the control signal and provide an output signal with a frequency that varies according to the control signal. The phase locked loop further comprises a lock detector, including: a phase lock detector configured to receive a first signal from the phase locked loop, and to derive a phase lock signal from the first signal; a frequency lock detector configured to receive a second signal from the phase locked loop, and to derive a frequency lock signal from the second signal. An unlock detector may be provided, configured to determine whether the first signal has changed by a predetermined amount during a predetermined period. |
| US09614534B1 |
Digital delay-locked loop and locking method thereof
The digital delay-locked loop includes: a frequency divider, used to perform frequency division processing on a first clock-signal according to frequency division information, and output a second clock-signal; a signal-selector, used to select the first or second clock-signal as a third clock-signal according to the selection signal output; a delay line, used to delay the third clock-signal according to the delay control signal, and output a fourth clock-signal; a phase detector, used to receive the third and fourth clock-signals, perform phase detection processing, and output a phase detection judgment signal; and a state machine connected with the frequency divider, signal-selector, delay line and phase detector, used to adjust and control the frequency division information, the selection signal and the delay control signal output according to the phase detection judgment signal and a set state logic, to achieve that delay time of the fourth clock-signal relative to the first clock-signal. |
| US09614530B2 |
Fast fall and rise time current mode logic buffer
A current mode logic buffer includes a differential pair of input transistors comprising a first input transistor and a second input transistor, a first output load resistor coupled in series with the first input transistor, a second output load resistor coupled in series with the second input transistor, a first output at a first node between the first output load resistor and the first input transistor, a second output at a second node between the second output load resistor and the second input transistor, a first hold capacitor configured to provide a semi-constant voltage source to the first output via a first low-resistance path, and a second hold capacitor configured to provide a semi-constant voltage source to the second output via a second low-resistance path. |
| US09614528B2 |
Reference buffer circuits including a non-linear feedback factor
In an embodiment, an apparatus may include an amplifier circuit including a first input to receive a signal, a second input to receive a feedback signal, and an output. The apparatus may further include a buffer circuit including an input coupled to the output of the amplifier and including an output coupled to an output node. The apparatus may also include a feedback circuit coupled between the output node and the second input of the amplifier circuit. The feedback circuit may include at least one non-linear resistor configured to define a feedback ratio that changes in response to a voltage at the output node. |
| US09614526B1 |
Power-domain assignment
Example apparatus for power-domain assignment, having: a first bus-to-switch interface; a second bus-to-switch interface; a first power-domain bus, coupled to the first bus-to-switch interface; a second power-domain bus, coupled to the second bus-to-switch interface. A set of I/O signal level shifters, coupled between the first and second power-domain buses; a switch including, a set of IP block power coupling outputs; a set of IP block I/O signal paths; and a selection signal input. The switch is coupled to the first and second bus-to-switch interfaces. Wherein, in response to receiving a first signal on the selection signal input, the switch is configure to couple the first power-domain bus to the set of IP block power coupling outputs; and wherein, in response to receiving a second signal on the selection signal input, the switch is configure to couple the second power-domain bus to the set of IP block power coupling outputs. |
| US09614520B2 |
Semiconductor switch
A semiconductor switch includes a plurality of metal-oxide-semiconductor field effect transistors (MOSFETs) and a pad. The MOSFETs are connected in series between a first node and a second node. The pad is provided above one or more of MOSFETs in the plurality without being provided above other MOSFETs in the plurality. The pad is connected to the first node. A value of an off capacitance (as determined without inclusion of any parasitic capacitance between the pad and the MOSFET) for each the MOSFETs under the pad is smaller than a value of an off capacitance of each of MOSFETs not under than the pad. |
| US09614518B2 |
Control of reverse-conducting IGBT
Unique systems, methods, techniques and apparatuses of a reverse-conducting IGBT (RC-IGBT) are disclosed. One exemplary embodiment is a circuit comprising a series connection of controllable switch components where at least one of the controllable switch components is an RC-IGBT. The circuit is operated by applying a pre-trigger pulse to the gate electrode of the RC-IGBT during reverse conduction of the RC-IGBT at a first time instant, the pre-trigger pulse corresponding to a turn-on gate pulse. Next, a turn-on gate pulse is applied at a second time instant to the other controllable switch component of the series connection for controlling the other controllable switch component to a conductive state such that the pre-trigger pulse and the turn-on gate pulse overlap, and ending the pre-trigger pulse after a delay time at the third time instant. The delay time is the time period when the turn-on gate pulse and the pre-trigger pulse overlap. |
| US09614516B2 |
Devices for shielding a signal line over an active region
A multi-path transistor includes an active region including a channel region and an impurity region. A gate is dielectrically separated from the channel region. A signal line is dielectrically separated from the impurity region. A conductive shield is disposed between, and dielectrically separated from, the signal line and the channel region. In some multi-path transistors, the channel region includes an extension-channel region under the conductive shield and the multi-path transistor includes different conduction paths, at least one of the different conduction paths being in the extension-channel region to conduct substantially independent of a voltage on the signal line. In other multi-path transistors, the conductive shield is operably coupled to the impurity region and the multi-path transistor includes different conduction paths, at least one of the different conduction paths being under the conductive shield to conduct substantially independent of a voltage on the signal line. |
| US09614515B2 |
Electrical dual control switch device and the method controlling thereof
The present invention disclosed an electrical dual control switch device and the method of controlling thereof. By applying two electrical switches with connection method of conventional mechanical type dual control switch device. The operating status of the electrical switch could be detected by the AC waveform of the power transmission line of the other electrical switch. Therefore, the objection of electrical controlling the loading device will be realized. The loading device could be remotely control and the usage of the power could also effectively calculate. Further the present invention could also protected against overload, work with touch device and sets a timer for automatically shut down the power. |
| US09614513B2 |
Vibration generation apparatus
In a gyro sensor, a TDC detects a magnitude of vibration of a vibrator. A drive circuit (excluding the TDC) determines a duty ratio of a PWM drive signal in accordance with the magnitude of vibration so that the magnitude of vibration becomes a predetermined magnitude and outputs the PWM drive signal having the determined duty ratio. The drive circuit (excluding the TDC) includes a control circuit and a DCO. The control circuit measures time corresponding to the control value by using a gate delay time, generates the PWM drive signal having a pulse width corresponding to the control value and outputs the PWM drive signal. |
| US09614510B2 |
Input path matching in pipelined continuous-time analog-to-digital converters
System and methods for input path matching in pipelined continuous-time Analog-to Digital Converters (ADCs), including pipelined Continuous-Time Delta Sigma Modulator (CTDSM) based ADCs, includes an input delay circuit disposed in a continuous-time input path from an input of an analog input signal to a first summing circuit of the continuous-time ADC. At least one digital delay line is disposed between an output of an earlier stage sub-ADC (of a plurality of pipelined sub-ADCs) and a sub-digital-to-analog converter (DAC) that is coupled to the first summing circuit, and between the earlier stage sub-ADC and a digital noise cancellation filter. The digital delay line(s) is configured to enable calibration of delay of output of the earlier stage sub-ADC provided to the sub-DAC and the digital noise cancellation filter in accordance with process variations of the input delay match circuit to minimize residue output at first summing circuit. |
| US09614506B1 |
Digital pre-compensation for voltage slewing in a power converter
Control logic for producing a digital input to a digital-to-analog converter (DAC) in a power converter system. The control logic selects from among a plurality of slew rates during a transition of an output voltage in response to a change in the desired setpoint, so that the output voltage transition follows a desired nominal slew rate. In an initial interval of the transition, a steeper slew rate than the nominal slew rate is selected by the control logic for the digital input to the DAC, until the digital input to the DAC exceeds the nominal slew rate by a first parameter value. At that point, a slew clamp is applied to advance the digital input at the nominal slew rate. Upon the digital input approaching the setpoint value to within a second parameter value, a flatter slew rate than nominal is applied. |
| US09614505B1 |
Differential driving circuit including asymmetry compensation circuit
A differential driving circuit according to embodiments of the inventive may include a first driver drives a first pad to a first voltage according to a first driving signal, a second driver drives a second pad to a second voltage according to a second driving signal, a first and second capacitors for receiving a first and second voltage changes of the first and the second pad at one end thereof respectively to transmit the first and the second voltage change to the other end thereof respectively in a transition interval in which voltages of the first and second pads are changed, transition interval voltage adder circuit adds voltages respectively transmitted thereto through the first and second capacitors, and a transition interval asymmetry compensation circuit adjusts a slope of at least one of the first and second driving signals according to the added voltage. |
| US09614504B2 |
Electronic device and clock control method thereof
A user terminal device and a display method thereof are provided. A method for controlling a clock according to an exemplary embodiment includes generating a clock, generating a comparison clock corresponding to a frequency of an external alternating current (AC) power source, counting a number of clock cycles according to the comparison clock, and controlling a generation period of the clock according to the counted number of clock cycles. |
| US09614502B2 |
Accurate sample latch offset compensation scheme
A receiver according to one aspect comprises a latch configured to sample a data signal according to a sampling clock signal, and a plurality of offset-compensation segments, wherein each of the segments is coupled to an internal node of the latch. Each of the segments comprises a compensation transistor, and a step-adjustment transistor coupled in series with the compensation transistor. The receiver further comprises an offset controller configured to selectively turn on one or more of the compensations transistors to reduce an offset voltage of the latch, and a bias circuit configured to apply a bias voltage to a gate of each of one or more of the step-adjustment transistors. |
| US09614500B2 |
Electronic circuit, electronic apparatus, and method for eliminating metastability
An electronic circuit includes a clock control unit having a first input for receiving a first clock signal, a second input for receiving a second clock signal, a first clock output, and a second clock output, a first flip-flop having a first data input, a first clock input connected to the first clock output, and a first output, and a second flip-flop having a second data input, a second clock input connected to the second clock output, and a second data input connected to the first output of the first flip-flop. The clock control unit provides the first clock signal to the first clock input of the first flip-flop through the first clock output and the second clock signal to the clock input of the second flip-flop through the second clock output terminal in a sequential order. |
| US09614497B2 |
Semiconductor device and method for adjusting impedance of output circuit
An impedance adjustment circuit includes a counter circuit outputting a count value thereof as a plurality of first impedance adjustment signals, a mode selection circuit setting a second impedance adjustment signal to be in an active/inactive state irrespective of the count value, and a level fixing circuit fixing a third impedance adjustment signal to be in an active state. A pre-stage circuit generates a plurality of first output control signals, a second output control signal, and a third output control signal in response to the first impedance adjustment signals, the second impedance adjustment signal, and the third impedance adjustment signal, respectively, and a data signal. An output circuit includes a plurality of first transistors, a second transistor, and a third transistor connected in parallel to each other between an output terminal and a first power supply wiring. Control terminals of the first transistors, the second transistor, and the third transistor receive the first output control signals, the second output control signal, and the third output control signal, respectively. |
| US09614496B1 |
Filter circuits with emitter follower transistors and servo loops
Filter circuits with emitter follower transistors and servo loops, and associated methods and apparatuses, are disclosed herein. In some embodiments, a filter circuit may include: a resistor-capacitor network having an input to receive an input signal; an emitter follower transistor, coupled to the resistor-capacitor network, wherein the filter circuit has an output to provide an output signal from the emitter of the emitter follower transistor; a current source to provide a constant reference current; and a current-buffering servo loop circuit, coupled to the emitter follower transistor and the current source, including a current buffer and a controlled current sink to maintain the collector current and the emitter current of the emitter follower transistor equal to the constant reference current. |
| US09614488B2 |
Information processing apparatus, method for processing information, and program
An information processing apparatus includes an audio processing unit that performs a predetermined process for an input audio signal, and a power saving control unit that allows the audio processing unit to transition into a power saving state, depending on the length of a silence section in the audio signal. |
| US09614487B2 |
Wireless communicatoin method and apparatus for reducing reception error by performing automatic gain control (AGC) based on a comparison between the received signal and a reference value
A receiving apparatus includes a variable gain unit to change between a first gain and a smaller second gain, and to amplify a received signal to obtain an amplified signal; a comparator to compare a power of the amplified signal with a reference value; and a controller to set a gain to the first gain while in a standby state, to reset a gain to a third gain between the first and second gains if in a standby state the power of the received signal is larger than the reference value, and then to set a gain to the first gain and return to the standby state if the power is equal to or lower than the reference value, or if not, to a fourth gain between the first and third gains. |
| US09614484B2 |
Systems and methods of RF power transmission, modulation, and amplification, including control functions to transition an output of a MISO device
Embodiments of the present invention include a method and system for control of a multiple-input-single output (MISO) device. For example, the method includes partitioning a waveform constellation space into a plurality of regions, where each region of the plurality of regions is associated with one or more control functions of the MISO device. The method also includes transitioning the MISO device between a plurality of classes of operation based on the one or more control functions. |
| US09614478B2 |
Systems and methods for providing modulation of switchmode RF power amplifiers
Systems and methods are provided for generating an amplitude modulation signal to a switchmode power amplifier. A DC to DC switch is configured to receive a DC input voltage and to provide a DC output voltage. A low dropout regulator is configured to provide the amplitude modulation signal according to a modulation control signal received by the low dropout regulator. A control circuit is configured to establish a nominal operating power level for the power amplifier via the amplitude modulation signal and to maintain a minimum voltage difference between the DC output voltage and the low dropout regulator output. A modulator control circuit is configured to provide the modulation control signal to the low dropout regulator. The modulator control circuit provides the transition from a high amplitude to a low amplitude and a transition from the low amplitude to the high amplitude at configurable first and second slopes, respectively. |
| US09614477B1 |
Envelope tracking supply modulators for multiple power amplifiers
The present disclosure is directed to an envelope tracking supply modulator for multiple PAs. The envelope tracking supply modulator is configured to provide, for each of the multiple PAs, a separate supply voltage that is modulated based on the envelope of the respective RF input signal to the PA. Each of the modulated supply voltages is constructed from a DC component and an alternating current (AC) component. The DC component for each modulated supply voltage is generated by a main switching regulator that is shared by the multiple PAs. In one embodiment, the AC component for each modulated supply voltage is generated by an auxiliary switching regulator that is shared by the multiple PAs and a separate linear regulator for each of the multiple PAs. In another embodiment, the AC component for each modulated supply voltage is generated by a separate buffer. |
| US09614469B2 |
Apparatus and method for controlling electric vehicle
An apparatus and method for controlling an electric vehicle are provided. The apparatus includes a battery that is configured to charge electrical energy and a motor that is configured to generate a driving torque from electrical energy charged in the battery. A controller is configured to determine a driving range of the vehicle, perform maximum efficiency control in which efficiency of the motor is maximized when the driving range of the vehicle is a main driving range, and perform minimum torque ripple control in which torque ripple of the motor is minimized when the driving range of the vehicle is a supplementary driving range. |
| US09614465B2 |
Electric motor clamping system
An electric motor system having a power supply, an electric motor connected to the power supply, an object driven by the motor having a range of motion and a substantially neutral position within the range of motion, a power sensor configured to sense power from the power supply, a position sensor configured to sense position of the object in at least a portion of the range of motion, an energy storage, a controller connected to the power supply and the energy storage, wherein the controller is configured to brake the motor as a function of the position sensor, the neutral position and the power sensor. |
| US09614463B2 |
Piezoelectric device, piezoelectric actuator, hard disk drive, and inkjet printer apparatus
A piezoelectric device is provided with a piezoelectric element including a piezoelectric layer exhibiting a polarizability γ smaller than 1×10−9 (C/(V·m)) in the case where an electric field is applied until polarization is saturated and a circuit having a means to set a minimum value of a drive electric field to become larger than a positive coercive electric field of the above-described piezoelectric layer and a means to set a maximum value of the above-described drive electric field to become smaller than (Pm′(maximum value of polarization)−Pr′(quasi-remanent polarization))/(1×10−9) and, therefore, an object is to drive the piezoelectric element in an electric field range in which maximum piezoelectric characteristics are obtained, improve the characteristics of the piezoelectric device, and enhance the reliability. |
| US09614461B2 |
Bidirectional high frequency variable speed drive for CHP (combined heating and power) and flywheel applications
The present invention provides a bidirectional high frequency speed drive configured to connect to a utility grid and an electrical machine. The bidirectional high frequency variable speed drive comprises a plurality of inductors each configured to connect to respective phase outputs of the electrical machine, a first plurality of power switches connected to the plurality of inductors, a second plurality of power switches connected to the plurality of inductors, and a controller connected to the first and second plurality of power switches. The controller can generate control signals based on an operating status and a predetermined operating status of the electrical machine. The first output of the first plurality of power switches can be interleaved to a second output of the second plurality of power switches. The present invention also provides methods for the bidirectional high frequency speed drive and apparatuses used to perform the methods of the present invention. |
| US09614457B2 |
Modular thyristor-based rectifier circuits
Power conversion apparatus for controllably converting alternating current (AC) to direct current (DC). An example apparatus includes multiple AC sources, galvanically isolated from one another, and multiple bridge rectifier circuits, including one or more controllable bridge rectifier circuits, where each bridge rectifier circuit has respective AC-side terminals and DC-side terminals and each bridge rectifier circuit is connected to a corresponding one of the AC sources via its AC-side terminals. The DC-side terminals are connected so that the outputs of the bridge rectifier circuits are combined in series. A control circuit is configured to individually control each controllable bridge rectifier circuit to selectively operate in a regulator mode, whereby a non-zero voltage less than or equal to the maximum rectifier voltage is provided, and a bypass mode, whereby the controllable bridge rectifier circuit provides a negligible voltage to its DC-side terminals and draws negligible current from its corresponding AC source. |
| US09614445B2 |
Systems and methods for high precision and/or low loss regulation of output currents of power conversion systems
Systems and methods are provided for signal processing. An example error amplifier for processing a reference signal and an input signal associated with a current of a power conversion system includes a first operational amplifier, a second operational amplifier, a first transistor, a second transistor, a current mirror component, a switch, a first resistor and a second resistor. The first operational amplifier includes a first input terminal, a second input terminal and a first output terminal, the first input terminal being configured to receive a reference signal. The first transistor includes a first transistor terminal, a second transistor terminal and a third transistor terminal, the first transistor terminal being configured to receive a first amplified signal from the first output terminal, the third transistor terminal being coupled to the second input terminal. |
| US09614441B2 |
DC-DC converter and organic light emitting display device including the same
a DC-DC converter, including a conversion unit configured to convert a battery voltage input to an input terminal of the DC-DC converter into a first voltage, and to output the first voltage to an output terminal of the DC-DC converter, a feedback voltage generation unit configured to generate a feedback voltage by dividing the first voltage, an error amplifier (AMP) configured to supply, to a pulse width modulation (PWM) control circuit, an error signal indicating a voltage difference between the feedback voltage and a reference voltage, the PWM control circuit being configured to control the conversion unit, corresponding to the error signal, thereby changing the first voltage, and a reference voltage supply unit configured to supply the reference voltage to the error AMP, and to change the reference voltage. |
| US09614440B2 |
Power supply device and semiconductor integrated circuit device
A power supply device includes a linear regulator including an output stage amplifier, a current sensing circuit, and a switching regulator. The current sensing circuit detects an output current of the linear regulator, and is disposed in parallel with the output stage amplifier, in a configuration corresponding to the output stage amplifier. The switching regulator operates in accordance with an output signal of the current sensing circuit. The linear regulator and the switching regulator operate in collaboration with each other to generate an output voltage at an output node. |
| US09614435B1 |
Power optimization device for energy harvesting apparatus and method thereof
A power optimization device and method thereof for energy harvesting apparatus are disclosed. The power optimization device includes a charge pump, a voltage comparator, an output switch, a counter and a frequency control module. By detecting the voltage outputted from the power optimization device under various operating frequencies to obtain a calculation result and increase or decrease an operating frequency of the charge pump according to the calculation result, so as to dynamically adjust the operating frequency to optimize the power outputted from the power optimization device according to the voltage outputted from the energy harvesting apparatus to an electricity storage unit and energy loss caused by the change of the operating frequency. |
| US09614430B2 |
Inverting apparatus and AC power system using the same
An inverting apparatus and an AC power system are provided. The inverting apparatus includes an inverting circuit, a detection circuit, and a control circuit. The inverting circuit receives a DC input voltage and converts the DC input voltage into an AC output voltage. The detection circuit samples the AC output voltage and compares the sampled AC output voltage respectively with a first reference voltage and a second reference voltage so as to generate a first indication signal and a second indication signal. The control circuit controls the operation of the inverting circuit. The control circuit determines whether the amplitude of the AC output voltage is located within an operating voltage range during each driving cycles according to the first and the second indication signals, and decides whether to enable an overvoltage protection or an undervoltage protection to control the power conversion of the inverting circuit according to the determination results. |
| US09614429B2 |
System for converting AC electrical power to DC electrical power and methods
A system includes a first DC rail and a second DC rail, and a rectifier coupled with the first and second DC rails. A multilevel converter is also coupled with the DC rails and operable to limit input current harmonics to the rectifier. Differences between voltage phase and current phase in AC electrical power supplied to the system are compensated via closed loop control of a voltage output of the multilevel converter. |
| US09614425B2 |
Fast-response horizontal vibration micro motor
A fast-response horizontal vibration micro motor that includes a housing, a cover plate, a vibration assembly and coils. The cover plate is installed on the housing; the vibration assembly is suspended in the installation space; the coils are located at positions a certain distance above the vibration assembly; the vibration assembly can perform reciprocating vibration in a direction substantially parallel to the bottom surface of the housing, and also enables the two elastic supporting members located on the two opposite sidewalls to be correspondingly stretched and compressed during vibration; the vibration assembly includes a vibration block, and the vibration block is provided with at least three installation through holes and permanent magnets installed in the installation through holes. The arrangement of the three permanent magnets increases the response speed of the motor, and the arrangement of the two serially-connected coils also increases the response speed of the motor. |
| US09614424B2 |
Linear drive and piston pump arrangement
A linear drive, in particular for a piston pump, includes a first electromagnetic drive device, a second electromagnetic drive device, and a drive piston configured to be moved in an axial direction by the drive devices. The first drive device and the second drive device are each in the form of a reluctance drive device. The reluctance drive devices each have a stator with a stator coil that engages around the drive piston in a circumferential direction. The reluctance drive devices each also have a coil core with a coil receptacle, open in a radial direction toward the drive piston, for the coil winding. A piston pump arrangement includes the linear drive. |
| US09614422B2 |
Electric motor apparatus and method for assembling the same
In an electric motor apparatus including an electric motor (13), a speed-reduction mechanism (14) which transmits motive power of the electric motor (13), a housing (15) which accommodates the speed-reduction mechanism (14) and the electric motor (13), and a yoke (16a) fixed to an outer portion of the housing (15), the housing (15) is provided with a concave portion (21), a holding hole (18a), and an accommodation chamber (15a). A connector unit (25) is moved along the first direction and installed to a concave portion (21). A brush holder (26) is moved along the second direction and installed to the holding hole (18a). The speed-reduction mechanism (14) is moved along the first direction and accommodated in the accommodation chamber (15a). The yoke (16a) is moved along the second direction and fixed to the housing (15). Therefore, no restriction is imposed on the routing of an external connector connected to the connector unit (25). |
| US09614419B2 |
Actuator
An actuator includes a DC motor having two terminals to be fed with DC power, an output gear driven by the DC motor, a potentiometer having an arc resistive element with two ends and an electrically conductive wiper that moves along the resistive element, and two diodes. The wiper rotates with the output gear to provide a signal indicative of the rotational position of the output gear. The anodes of the two diodes are both electrically connected to one end of the resistive element, and the cathodes of the two diodes are electrically connected to the two terminals of the motor respectively. |
| US09614413B2 |
Actuating drive with electric motor and gearing thereof
An actuating drive includes an electric motor and a gearing arranged in a housing which is open on one side and which is closed by a cover. The electric motor is mounted in a recess bulge of the housing which is substantially sealed off from the gearing. The configuration provides a precise positioning of the electric motor relative to a first axle, wherein a first gear of the gearing is assigned to the same and wherein the actuating drive can be manufactured more simply and more cost-effectively than was previously possible. This is achieved in that the electric motor is attached indirectly to the housing by means of an accordingly shaped metal sheet, and is positioned in a predetermined location with no radial or axial play. |
| US09614405B2 |
Wiring structure of stator coil
Electrical insulation properties of winding start ends or terminal ends of insulating coating electric wires of coils wound around polar teeth of a stator core are improved, and creeping and spatial distances for electrical insulation are secured. Wall portions which project toward an interior of a radial direction or an exterior of an axial direction of a stator core and which have electrical insulation properties are formed in an inner peripheral portion of the stator core of a motor, groove portions are formed in the wall portions and winding start ends or terminal ends of insulating coating electric wires of coils are arranged in the groove portions. |
| US09614394B2 |
Vehicle-mounted charging device, and vehicle mounted with same
A vehicle-mounted charging device which begins to charge at an appropriate timing when driving a vehicle. A driver sets the travel distance at which charging begins while charging coil (10) and charging coil (13) are magnetically coupled, then a charge control unit (12) drives a drive circuit (11) once the travel distance of the vehicle becomes equal to or greater than the set value. The drive circuit (11) excites charging coil (10) and supplies power from charging coil (10) by changing the magnetic flux generated by charging coil (10). As a consequence, a portable device (7) begins to be charged. |
| US09614393B2 |
Charging device for biological information measurement device and biological information measurement device charged using same
The present invention has a main body case having a contact face of a biological information measurement device on its surface, and a first non-contact charging portion (7) composed of a charging coil disposed opposite the contact face with the biological information measurement device inside the main body case. In addition, it has a controller (8) that is connected to the first non-contact charging portion (7), and a display section (5) that is connected to the controller (8). Upon completion of the charging of the biological information measurement device via the first non-contact charging portion (7), the controller (8) connected to the display section (5) displays on the display section (5) that the biological information measurement device will be incapable of measurement for a specific length of time. |
| US09614392B2 |
Wireless power transmission apparatus and method
A wireless power transmission apparatus for tracking a charging capacity of each of a plurality of wireless power reception apparatuses in an environment in which the plurality of wireless power reception apparatuses are charged includes a communication unit configured to receive information about either one or both of a charging support power and a requested power from each of the plurality of wireless power reception apparatuses, a controller configured to determine a charging capacity for a wireless power reception apparatus supporting the charging support power among the plurality of wireless power reception apparatuses based on the information about the charging support power, and a power tracker configured to re-track the determined charging capacity based on charging status information received from the plurality of wireless power reception apparatuses. |
| US09614391B2 |
Active charge equilibrium system for lithium battery pack
An active charge equilibrium system for lithium battery pack consists a lithium battery pack composed of connecting multiple cells in series, including a multiplex module, control module and multiple equilibrium control module, which each segment of the cells are connected to the multiplex module in sequence, a voltage signal is converted into a digital signal via the control module to compare the voltages of the cells and select the cell with lower voltage. Further, the control module enables the equilibrium control module corresponding to the cell with the lower voltage to work. A pulse width modulator adjusts the output pulse width according to output current and voltage signal from a signal feedback module for controlling current and voltage to charge the cell. As the voltage of the cell reaches a constant current first and a constant voltage second, the control module turns off said equilibrium control module. |
| US09614388B2 |
Output stage of a charging device, including a transformer, rectifier, converter, capacitor, storage device and a use thereof
An output stage of a charging device includes a first secondary winding of a transformer, a first rectifier which is connected to the first secondary winding, a step-down controller which is connected to the output of the first rectifier, and a first output capacitor. In order to be able to reduce the switching losses in the switch of the step-down controller and to reduce the magnitudes of the inductance, the transformer includes a second secondary winding to which a second rectifier) together with a second output capacitor are connected, wherein the first and second output capacitors are connected in series. |
| US09614386B2 |
Method and apparatus for power switching
Aspects of the disclosure provide a circuit. The circuit includes a switch and a switch controller. The switch is between a first node that receives a first power supply and a second node, and is controlled to couple/decouple the second node with the first node to switch on/off a second power supply at the second node. The switch controller is configured to generate a switch control signal to control a charging current flowing through the switch to switch on the second power supply. |
| US09614384B2 |
Stylus charging case
Embodiments of the present invention relate to a portable charging case that can serve as both a charging base and a protective carrying case for a rechargeable stylus. The portable charging case can enable a quick connect and release of the stylus using magnetic force for magnetic engagement of the stylus to the charging base. The charging base may include a logic board that dynamically changes the polarity of the charge coming in through the charging base charging contacts. Such a dynamic change of polarity can recharge the stylus irrespective of the polarity alignment between the stylus charging terminals and the charging base charging contacts. |
| US09614383B2 |
Self-discharge for high voltage battery packs
A system and method for providing energy management and maintenance of a high energy battery pack through use self-discharge features and processes. A battery pack is configured with self-discharger enabled-components that selectively discharge energy from the battery pack without the battery pack providing operational power. |
| US09614382B2 |
Short-circuit protection device
A short-circuit protection device for limiting a battery current of a battery strand having at least one battery cell and for guiding an output current to a consumer network via a first network terminal and a second network terminal connected to the short-circuit protection device, the short-circuit protection device compring: a first switching element configured to interrupt the battery current to limit the output current; at least one current detection means; a comparison arrangement configured to compare the output current with a predefined target value; at least one inductor arranged series with the switching element; an inductor current regulation arrangement configured to actuate the switching element; and a first bridge device configured to bridge at least one battery cell of the battery strand and limit the predefined target value to a predefined maximum value of a short-circuit current. |
| US09614381B2 |
System for performing recharging and data communication
A system is provided for performing recharging and data communication. The system includes a terminal and a connection device that connects the terminal and an external device, and that selectively provides the terminal with a recharging function, a data communication function, and a recharging and data communication function, according to a type of the connected external device. The terminal determines the type of the connected external device based on a voltage received from the connection device, when the terminal is connected to the connection device, and selectively operates in a recharging mode, a data communication mode, and a recharging and data communication mode based on the type of the connected external device. |
| US09614380B2 |
Hysteretic current mode buck-boost control architecture
A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal. |
| US09614376B2 |
Systems, apparatus, and methods for quantifying power losses due to induction heating in wireless power receivers
Systems, methods and apparatus are disclosed for detecting power losses due to induction heating in wireless power receivers. In one aspect, an apparatus for wireless power transfer comprises a power transfer component configured to transmit wireless power to a wireless power receiver at a power level sufficient to charge or power a load. The apparatus further comprises a communications receiver configured to receive a message from the wireless power receiver, the message comprising a group identifier. The apparatus further comprises a controller circuit operationally coupled to the power transfer component and the communications receiver and configured to determine a power loss value based on the group identifier, the power loss value indicative of power loss due to induction heating presented by one or more wireless power receivers that are members of a group associated with the group identifier. |
| US09614373B2 |
Modular implementation of correlative consumption management systems
Modular consumption management systems provide benefits of adaptability, customization, and progressive investment to electrical utility customers, particularly those with loads and electrical systems capable of curtailment and mitigation. Providing modules based on measurements made and consumption patterns detected in load profiles of individual loads and the site as a whole is described. Control and mitigation capabilities and methods are described in conjunction with identifying correlative modules that will best serve the needs of the site being monitored by a measurement module. Combined measurement and control modules or control and mitigation modules are also described, as well as interchangeable modules that can be put in place when excess consumption patterns at the site change over time. |
| US09614365B2 |
Method and system to prevent bus voltage sagging when an oring-FET in an N+1 redundant power supply configuration is faulty during power up
A system and method for preventing bus voltage sagging when an Oring-FET in an N+1 redundant power supply configuration is faulty during power up. Each redundant power supply includes an Oring-FET and a voltage comparator. The voltage comparator receives and compares an input voltage and an output voltage of the Oring-FET during power up. In the event input voltage is less than the output voltage, the Oring-FET is deemed to be operating properly and provides output to a communicatively coupled system bus in response to the input voltage reaching a predetermined voltage threshold level. In the event the input voltage is approximately equal to the output voltage, the voltage comparator assists in preventing inrush current from flowing from the communicatively coupled system bus and prevents voltage sagging on the communicatively coupled system bus when another redundant power supply configuration is providing power to the communicatively coupled system bus. |
| US09614360B2 |
Lightning protection device and method of producing same
A lightning protection device for placing on a structure for protecting, and including a first coating including at least one layer of conductive paint; and a second coating deposited on the surface coating and including a material that is thermally insulating and electrically conductive. |
| US09614358B2 |
Cable connector and electrical box assembly
A cable connector is provided for coupling to and mounted within the internal cavity of an electrical box for securing an electrical cable passing through an opening in the electrical box. The cable connector includes a body having a first end positioned next to or adjacent the cable opening in the electrical box and a second end spaced from the first end and the cable opening. At least one and typically two retaining members are spring biased from the first end of the body and extend into a cable passage of the body toward the second end. A front wall is provided at the second end of the body with an opening for receiving the wires and forming a stop member to prevent the armor sheathing from passing through the front wall. |
| US09614353B2 |
Spark plug
A spark plug comprises a ground electrode including a chip whose one end has a cylinder shape having a diameter A from 0.8 to 1.2 mm and whose main component is a noble metal, and an electrode base material. In the ground electrode, a portion of the other end of the chip is joined to the electrode base material through a fused portion. The spark plug also comprises a chip-and-base-material interface in which the chip and the electrode base material contact each other and which is surrounded by the fused portion. In a cross section passing through a center axis, a distance between an end point Pa7 located on the chip-and-base-material interface and an end point Pa5 located on an interface between the chip and the fused portion is equal to or greater than 0.7 times the diameter A. |
| US09614352B2 |
Laser element and laser device
The coordinates of an unit configuration region R11 is (X1, Y1), and the coordinates of an unit configuration region Rmn is (Xm, Yn) (m and n are natural numbers). Rotation angles φ with respect to a center of apexes of an isosceles triangle are different according to coordinates, and at least three different rotation angles φ are contained in all of the photonic crystal layer. |
| US09614350B2 |
Semiconductor laser element and near-field light output device using same
A semiconductor laser element is provided with: a substrate formed of a semiconductor; a semiconductor laminated film, which is laminated on the substrate, and which includes an active layer; a first electrode and a second electrode, which are provided on surfaces parallel to the active layer on the side where the semiconductor laminated film is formed on the substrate; and a facet protection film that is provided on both the facets, which are perpendicular to the active layer, and which face each other. In the semiconductor laser element, the facet is used as a fixing surface for the semiconductor laser element, said facet having the facet protection film formed thereon. |
| US09614349B2 |
Method for switching output wavelength of tunable wavelength laser, method for switching wavelength of tunable wavelength laser, and tunable wavelength laser device
A method for switching a wavelength of a tunable wavelength laser, which is provided with a temperature control device for an etalon and a wavelength detecting section for identifying a wavelength of the laser by a front/back ratio of the etalon, the wavelength of the laser being set in a target wavelength on the basis of a detection result of the wavelength detecting section, and the method comprises: driving the laser at a first wavelength; suppressing output of light of the laser in response to a command indicating an optical output at a second wavelength; starting control of the temperature control device towards a second etalon temperature corresponding to the second wavelength; and before the etalon reaches the second etalon temperature, detecting that the etalon reaches a temperature range corresponding to an allowable wavelength range corresponding to the second wavelength, and cancelling the suppression of light in response thereto. |
| US09614344B2 |
Fiber-based output couplers for wavelength beam combining laser systems
In various embodiments, wavelength beam combining laser systems incorporate optical fibers and partially reflective output couplers or partially reflective interfaces or surfaces utilized to establish external lasing cavities. |
| US09614343B2 |
Device for amplifying a laser pulse having improved temporal contrast
A device for amplifying a multi-wavelength pulsed laser beam is provided, which comprises: a solid amplifying medium with two planer faces, a front face and a reflecting rear face; and a device for cooling the amplifying medium by the rear face. The front face of the amplifying medium is tilted relative to its rear face by a first non-zero tilt and the device further comprises a trapezoidal prism, with an input face and an output face which form between them a second non-zero tilt, the first and second tilts being such that the beams of each wavelength are parallel to one another at the output of the prism. |
| US09614339B2 |
Current diverter ring
The current diverter rings and bearing isolators serve to dissipate an electrical charge from a rotating piece of equipment to ground, such as from a motor shaft to a motor housing. One embodiment of the current diverter is substantially arc shaped with a plurality of radial channels extending there through. A conductive assembly may be positioned in each radial channel such that a contact portion of the conductive assembly is positioned adjacent a shaft passing through the center of the current diverter ring. The arc-shaped body may be particularly useful during installation over certain existing shafts. |
| US09614337B2 |
Multiple orientation connectors for medical monitoring systems
A connector for coupling a medical sensor to a medical monitor includes a first pin coupled and a second pin each electrically coupled to a first LED and to a second LED, respectively, of an emitter of the medical sensor. The connector includes a third pin electrically coupled to a cathode and a fourth pin electrically coupled to an anode of a detector of the medical sensor. The first pin and the second pin are arranged to have 180 degree symmetry relative to one another, and the third pin and the fourth pin are arranged to have 180 degree symmetry relative to one another. |
| US09614336B2 |
Pop-up desktop receptacle
A desktop receptacle includes: a housing having a top surface with a receptacle opening formed therein; an electrical receptacle including at least one electrical port and pivotally mounted within the housing adjacent to the receptacle opening, the electrical receptacle having a recessed position where the at least one electrical port is below the top surface of the housing and an exposed position where the at least one electrical port is at least partially exposed above the top surface; and a gas spring connected to the electrical receptacle so as to bias the electrical receptacle toward the exposed position. |
| US09614333B2 |
Electrical receptacle connector
An electrical receptacle connector includes a metallic shell, an insulated housing, a plurality of first receptacle terminals, a plurality of second receptacle terminals, a recess structure, and a passage structure. The insulated housing is received in the receiving cavity. The first receptacle terminals and the second receptacle terminals are respectively disposed at an upper portion and a lower portion of the insulated housing. The recess structure and the passage structure are formed at the rear of the insulated housing, so that a sealing member can be filled in the recess structure and the passage structure to cover and shields the rear of the insulated housing. |
| US09614332B2 |
Military vest and quick release buckle with electrical connectors
The present invention relates to a buckle system including a male subassembly and female subassembly that are designed to mate with one another. The male subassembly also includes a printed circuit board (PCB) that may mate with an electrical connector within the female subassembly, thus completing a circuit for providing power to an electronic device when the subassemblies are mated. The male subassembly is connected to a cable portion that, when pulled with sufficient force, causes the male subassembly and its PCB to disengage the female subassembly and its electrical connector. The PCB and electrical connector may also be connected within standard side-release male and female subassemblies, respectively, for use in standard side-release buckles. |
| US09614325B2 |
Blind-mate integrated connector
The present invention provides a blind-mate integrated connector, including: a first installation plate, a mechanical part, and a second installation plate; a first guiding structure and first connection ends of at least two sub-connectors are installed in the mechanical part; the first installation plate is connected to the mechanical part; the second installation plate is disposed with second connection ends matching the first connection ends of the sub-connectors in the mechanical part, and the second installation plate is further disposed with a second guiding structure matching the first guiding structures. By practicing the present invention, multiple sub-connectors may be flexibly integrated without a need to design a dedicated connector mold, thereby achieving cost savings and shortening a development cycle. |
| US09614321B2 |
Magnetic connector
A magnetic connector has a connector body including a magnet, a plurality of connection terminals that are arranged and fixed on the connector body so as to correspond to a plurality of contact patterns of a connection object, and a plurality of attracted members that are formed of magnetic substance, are arranged and fixed on a support member having a sheet-like shape and flexibility so as to correspond to the plurality of contact patterns of the connection object and are, via the connection object on which the plurality of contact patterns are arranged to face the plurality of connection terminals, attracted toward the connector body due to magnetic force whereby the plurality of contact patterns are pressed against the plurality of connection terminals and thereby connected to the plurality of connection terminals. |
| US09614312B2 |
Terminal and electrical connector
A terminal and an electrical connector are provided. The terminal has a tail, an elastic arm, a contact and a front guiding member. The elastic arm is connected to the tail. The contact is positioned at a distal end of the elastic arm. The contact has a front guiding surface extending forwards and downwards. The front guiding member extends forwards from the elastic arm. The front guiding member has a front guiding portion that extends forwards and downwards. An extending direction of the elastic arm and an extending direction of the front guiding member intersected at an angle. The front guiding portion is positioned in front of the front guiding surface of the contact. |
| US09614311B2 |
Arrangement for electrical contacting and plug type connection comprising such an arrangement and method for joining such an arrangement to a counter-arrangement
The invention relates to an arrangement for electrical contacting and a plug type connection comprising such an arrangement. The invention further relates to a method for joining an arrangement for electrical contacting to a counter-arrangement. An object of the invention is to provide an arrangement for electrical contacting, in which the risk of damage is as small as possible. This object is achieved by an arrangement for electrical contacting which comprises a resiliently redirectable contact arm having a contact face and a counter-element which can be displaced parallel with the contact arm, wherein the counter-element is displaced with respect to a start position (A) in a contact position (K) and the contact arm is thereby resiliently redirected transversely relative to the displacement direction (M) of the counter-element. |
| US09614310B2 |
Standing-type electrical receptacle connector
A standing-type electrical receptacle connector includes a metallic shell, an insulated housing, a plurality of first receptacle terminals, and a plurality of second receptacle terminals. The insulated housing received in the metallic shell is assembled with the first receptacle terminals and the second receptacle terminals. The first receptacle terminals and the second receptacle terminals are respectively held at two sides of the insulated housing along a width direction of the insulated housing, and the length of each of the body portions of the receptacle terminals gradually increases along the width direction of the insulated housing. The tail portions are extending out of the insulated housing and soldered on a circuit board. Accordingly, the standing-type electrical receptacle connector can be assembled to the circuit board in a standing manner. |
| US09614308B2 |
Board-connecting electric connector
A good mating state can be obtained while reducing interference of transmission signals by a simple configuration. A contact portion is provided at a single location on each of mating recessed portions of signal contact members arranged in a multipolar shape, contact portions are provided at a plurality of locations for a mating recessed portion of an integrated power-source contact member, and signal transmission is carried out through the single-location contact portion provided at the single location for each of the mating recessed portions of the signal contact members. As a result, particularly, interference in high-frequency transmission is reduced to obtain good transmission characteristics, while sufficient mating retention force is configured to be obtained by causing the contact portions at the plurality of locations provided on the mating recessed portion of the power-source contact member to be in a state in which the contact portions are in contact with contact portions of a mating counterpart by the plurality of locations. |
| US09614303B2 |
Plug connector housing
Provided is a plug connector housing for protecting a plug connector. The housing has at least one pre-equipped cable outlet for connecting a threaded cable connection and at least one closure for closing the at least one cable outlet. The at least one cable outlet has a thread which forms a screw channel and the plug connector housing has a predetermined breaking point in the transition region to the closure. Also provided is a method for opening a cable outlet of a plug connector housing. |
| US09614302B2 |
Right angle coaxial cable and connector assembly
Coaxial cable-connector assemblies include: a coaxial cable having: an inner conductor having a termination end including a bore; a dielectric layer that overlies the inner conductor; and an outer conductor that overlies the dielectric layer having a termination end; a right angle coaxial connector including: an inner conductor body with a post configured to mate with the inner conductor body of a mating jack, the inner conductor body further including a receptacle that receives the termination end of the inner conductor such that the post is generally perpendicular to the inner conductor; an outer conductor body configured to mate with the outer conductor body of the mating coaxial cable jack and electrically connected with the termination end of the outer conductor; and an expansion member inserted into the bore of the termination end of the inner conductor sized and configured to radially expand the termination end of the inner conductor. |
| US09614299B2 |
Device for attaching and contacting an electrical component and method for manufacturing the device
A device for attaching and contacting an electrical component, e.g., a sensor device, includes: at least two contact points which are electrically contactable via associated busbars, a contact point of the component being connected to the associated busbar via a respective connecting element, which at its respective free first end forms a mounting for the component and establishes the electrical connection to the contact point of the component in the mounting, and which at its respective second end is held on the busbar and is electrically connected thereto. |
| US09614296B2 |
Conductive terminal for electrically connecting a circuit conductor and another connection terminal
A conductive terminal includes: a connection terminal; a cylindrical body; and a contact piece housed in the cylindrical body. The cylindrical body includes a top plate. A pair of holes is opened through the top plate from both sides of a projection of the contact piece. A jig for applying force to the projection can be inserted into the cylindrical body via the pair of holes. The pair of side plates are provided with a catching unit that catches the contact piece, the projection of which is pressed onto the mounting surface to restrain movement thereof. |
| US09614291B2 |
Two-dimensional antenna array, one-dimensional antenna array and single differential feeding antenna
A two-dimensional antenna array has n rows of 1×m one-dimensional array and each one-dimensional array is composed of multiple single differential feeding antennas. Each single differential feeding antenna has a differential feeding structure and a microstrip antenna stripe. A longitudinal length of the microstrip antenna stripe is no longer than one wavelength in a dielectric medium, so the microstrip antenna stripe is not excited to a high-order mode. An angle of inclination of a main beam aligns with the broadside and a width of the main beam is further concentrated at elevation direction. The differential feeding structure can reduce an even mode to enhance an isolation. The one and two-dimensional antenna array is miniature by using the small single differential feeding antennas. Isolation and gain of a dual-antenna system using the two-dimensional or one-dimensional antenna arrays are further enhanced and increased if more feeding antenna arrays are used. |
| US09614289B2 |
Metamaterial
A cell forming a metamaterial, comprises a patch conductor, a conductor layer arranged in parallel with the patch conductor, and a connection conductor configured to electrically connect the patch conductor and the conductor layer. The connection conductor forms a helical electrical path by a plurality of conductor lines and a plurality of vias which connect the conductor lines to the patch conductor and the conductor layer. |
| US09614286B2 |
Dual-band dipole antenna
A dual-band dipole antenna includes a substrate, grounding area, main radiator, grounding point and a feed-in point. The grounding point may be disposed on the substrate. The main radiator may be disposed on the substrate and in the vicinity of the grounding point; the main radiator may comprises a first radiator and a second radiator, wherein the first radiator may be connected to the second radiator, and there may be a groove between the first radiator and the second radiator; besides the size of the main radiator is disproportional to the size of the grounding area. The grounding point may be disposed on the substrate and connected to the grounding area. The feed-in point may be disposed on the substrate and connected to the main radiator; the grounding point may be in the vicinity of the feed-in point. |
| US09614267B1 |
Broadband RF capacitors for coaxial line
Embodiments of a broadband capacitor in a coaxial line are described. A capacitor may be realized in the center conductor of the coaxial line, and this aspect has two different embodiments. One embodiment forms the capacitor between the flat faces of an interrupted inner conductor structure. A second embodiment forms the capacitor between overlapping fingers of the female inner conductor and the male inner conductor, where the fingers can be realized in different ways. In another embodiment, a capacitor is realized in the outer conductor of the coaxial line, between fingers of a female portion of the outer conductor and a male portion of the outer conductor, where the fingers can be realized in different ways. |
| US09614265B2 |
Variable high frequency filter device and assembly
A tunable filter device that changes a central frequency and a bandwidth is provided. The tunable filter device may include a body forming a cavity together with a cover, a resonator attached to or integrally formed on a lower surface of the cavity, a frequency-tuning element including a head and a shaft, the shaft passed through the cover and inserted in the resonator, and a cam disposed on the head to contact the head, wherein an insertion length of the shaft is controlled by the cam. |
| US09614263B2 |
Thermal management systems for energy storage cells having high charge/discharge currents and methods of making and using thereof
Thermal management systems for high energy density batteries, particularly arrays of such batteries, and methods of making and using thereof are described herein. The system includes one or more thermal conductive microfibrous media with one or more phase change materials dispersed within the microfibrous media and one or more active cooling structures. Energy storage packs or arrays which contain a plurality of energy storage cells and the thermal management system are also described. Further described are thermal or infrared shielding blankets or barriers comprising one or more thermal conductive microfibrous media comprising one or more phase change materials dispersed within the microfibrous media. |
| US09614258B2 |
Power storage device and power storage system
To provide a power storage device, an operation condition of which is easily analyzed. A secondary battery includes a sensor that is a measurement unit, a microcontroller unit that is a determination unit, and a memory that is a memory unit. With the sensor, conditions of the secondary battery such as the remaining battery power, the voltage, the current, and the temperature are measured. The microcontroller unit performs arithmetic processing of the measurement results and determines the operation condition of the secondary battery. Further, the microcontroller unit stores the measurement result in the memory in accordance with the operation condition of the secondary battery. |
| US09614257B2 |
Secondary battery cell, battery pack, and power consumption device
Provided is a secondary battery cell capable of reliably preventing an integrated circuit provided to the secondary battery cell from being removed from the secondary battery cell.A secondary battery cell (20) includes an integrated circuit (IC chip) (50) that stores identification information (for example, identification number (ID number) given to the integrated circuit itself). The integrated circuit (50) includes a wiring abnormality detection circuit. When the integrated circuit (50) is removed from the secondary battery cell (20), the wiring abnormality detection circuit detects a wiring abnormality. |
| US09614256B2 |
Lithium ion battery, integrated circuit and method of manufacturing a lithium ion battery
A lithium ion battery includes a first substrate having a first main surface, and a lid including a conductive cover element, the lid being attached to the first main surface. A cavity is formed between the first substrate and the lid. The battery further includes an electrolyte disposed in the cavity. An anode of the battery includes a component made of a semiconductor material and is formed at the first substrate, and a cathode of the battery is formed at the lid. |
| US09614255B2 |
Acid/alkaline hybrid resonance battery device with damping function
An acid/alkaline hybrid resonance battery device with damping function is formed of a plurality of similar battery cells connected in either series or parallel. Every battery cell includes an acid rechargeable cell unit and an alkaline rechargeable cell unit, which are electrically connected in parallel. The acid rechargeable cell unit includes at least one acid rechargeable cell, and the alkaline rechargeable cell unit includes at least two serially connected alkaline rechargeable cells. The acid rechargeable cell unit has an electric potential and a capacity close to or equal to those of the alkaline rechargeable cell unit, so that a resonance damping effect is produced between the acid rechargeable cell unit and the alkaline rechargeable cell unit. |
| US09614252B2 |
Lithium secondary battery electrolytic solution and secondary battery including said electrolytic solution
A new electrolytic solution system for lithium secondary batteries. Provided is a lithium secondary battery electrolytic solution containing a nonaqueous solvent and a lithium salt. The nonaqueous solvent is mixed at an amount of not more than 3 mol with respect to 1 mol of the lithium salt. |
| US09614251B2 |
High-performance rechargeable batteries with nanoparticle active materials, photochemically regenerable active materials, and fast solid-state ion conductors
A high-performance rechargeable battery using ultra-fast ion conductors. In one embodiment the rechargeable battery apparatus includes an enclosure, a first electrode operatively connected to the enclosure, a second electrode operatively connected to the enclosure, a nanomaterial in the enclosure, and a heat transfer unit. |
| US09614250B2 |
Flexible solid state conductors including polymer mixed with protein
Various embodiments of solid-state conductors containing solid polymer electrolytes, electronic devices incorporating the solid-sate conductors, and associated methods of manufacturing are described herein. In one embodiment, a solid-state conductor includes poly(ethylene oxide) having molecules with a molecular weight of about 200 to about 8×106 gram/mol, and a soy protein product mixed with the poly(ethylene oxide), the soy protein product containing glycinin and β-conglycinin and having a fine-stranded network structure. Individual molecules of the poly(ethylene oxide) are entangled in the fine-stranded network structure of the soy protein product, and the poly(ethylene oxide) is at least 50 % amorphous. |
| US09614249B2 |
Separator for non-aqueous electrolyte secondary battery and non-aqueous electrolyte secondary battery
A separator according to the present disclosure is a separator for a non-aqueous electrolyte secondary battery that includes a porous layer that contains cellulose fibers and resin particles. The ratio of the amount of the resin particles to the total amount of the cellulose fibers and the resin particles increases with decreasing distance from one surface of the porous layer. |
| US09614247B2 |
Button cell with winding electrode
A button cell has a winding arranged in the cup-shaped, positive-polarity housing half such that one of the flat end sides points in the direction of the cup base, the circumferential outer side thereof bears against the circumferential cup wall and the outer side together with the cup wall forms a clamping zone in which the first current output conductor is clamped. |
| US09614246B2 |
High-capacity cylindrical lithium ion battery and production method thereof
The invention discloses a high-capacity cylindrical lithium ion battery. Tab-position end face is shaped; a high frequency oscillation and pressure are applied on to make the foil bodies softened in the scope of 0.1-6.5 mm. At the instant of high-frequency oscillation, the rigidity of the foil body is greatly decreased; and the foil bodies are mutually wound and compressed together, so that the weight density of the foil body in unit volume is increased and meanwhile, the rigidity of the compressed foil body at the Tab-position end face is greatly increased, thereby laying a firm foundation for laser welding of the 1 Tab-position end face and a current collector, increasing a laser welding effective area of the Tab-position end face and the current collector, and improving the welding strength. |
| US09614243B2 |
Multilayered structure comprising an enzyme layer
A multilayered structure suitable as an electrode in a power source and a method of producing the same. The structure comprises a conductive laminar layer; and an enzyme layer containing an essentially dry enzyme capable of oxidizing or dehydrogenating carbohydrate material under suitable conditions. Because the enzymatic anode layer and the fuel containing layer are not interacting during the production and since they are kept latent during storage time, the power source will remain stable for extended periods of time, thus increasing the utility of the power source. |
| US09614240B2 |
Cooling system for a fuel cell
The invention relates to a cooling system for a fuel cell (2), comprising a main heat-transfer-fluid circuit including a main circulation pump (6) and a heat exchanger (8) with the exterior, which feed an upstream pipe (12) supplying the fluid to the cells (4) of the fuel cell, said fluid leaving the cells via a downstream pipe (14) in order to return to the main pump. The system is characterised in that a secondary circuit, comprising a secondary circulation device (30) that circulates the fluid in an alternate manner, is connected in parallel with the main circuit to the upstream (12) and downstream (14) pipes and in that one or more controlled valves (10, 16) allow the main circuit and the secondary circuit to operate independently. |
| US09614236B2 |
Method for mitigating cell degradation due to startup and shutdown via cathode re-circulation combined with electrical shorting of stack
A fuel cell system that employs a process for minimizing corrosion in the cathode side of a fuel cell stack in the system by combining cathode re-circulation and stack short-circuiting at system shut-down and start-up. |
| US09614235B2 |
Fuel cell system and method of controlling the system
A fuel cell system is provided in which the concentration increase of discharged fuel gas is inhibited even when abnormality is detected in a discharge unit. A fuel cell system in which a fuel gas discharged from a discharge unit (SV5) is diluted with an oxidizing gas (14) and discharged comprises an abnormality detection unit (205) for detecting an operation abnormality of the discharge unit (SV5), and a change unit (206, 207) for changing the supplied quantity of the oxidizing gas when an abnormality of the discharge unit (SV5) is detected, and the concentration of the diluted (14) and discharged fuel gas is changed and inhibited by changing the supplied quantity of the oxidizing gas. |
| US09614228B2 |
Composite materials
A mixed metal oxide material of tantalumand titanium is provided for use in a fuel cell. The material may comprise between 1 and 20 at. % tantalum. The mixed metal oxide may form the core of a core-shell composite material, used as a catalyst support, in which a catalyst such as platinum forms the shell. The catalyst may be applied as a single monolayer, and is preferably between 6.5 and 9.3 monolayers thick. |
| US09614227B2 |
Fuel cell and method of manufacturing same
The present application relates to a fuel cell and a method of manufacturing the same. |
| US09614218B2 |
Composite carbon particle and lithium-ion secondary cell using same
A composite carbon particle for use in a negative electrode of a lithium-ion secondary battery, the composite carbon particle including a core particle composed of a carbon material obtained by heating, at not higher than 2500° C., petroleum coke having a Hardgrove grindability index (HGI value) of 30 to 60 (defined by ASTM D409), and a covering layer composed of a carbonaceous material obtained by heating an organic compound at 1000° C. to 2000° C. The composite carbon particle has a 50% particle diameter (D50) of 1 μm to 30 μm in a volume-based cumulative particle size distribution as measured by a laser diffraction method. |
| US09614211B2 |
Lithium ion battery having desirable safety performance
Provided is a lithium ion battery including a battery can, a battery core received in the battery can, electrolyte filled in the battery can, and a battery cover assembled to the battery can. The battery can or the battery cover is provided with a pressure relief valve, and the pressure relief valve is coupled with a mesh cover defining a number of through holes therein. According to the present invention, when thermal runaway occurs to the lithium ion battery, the pressure relief valve breaks timely. Only gases and electrolyte vapor can pass through the mesh cover. Solid particles cannot pass through the mesh cover. Therefore, ignition of the flammable gases, the electrolyte vapor and the high temperature solid particles in the surrounding air afar from the pressure relief valve is avoided and the safety performance of the lithium ion battery can be improved remarkably. |
| US09614206B2 |
Middle or large-sized battery pack case providing improved distribution uniformity in coolant flux
Disclosed herein is a middle- or large-sized battery pack case in which a battery module having a plurality of stacked battery cells, which can be charged and discharged, is mounted, wherein the battery pack case is provided with a coolant inlet port and a coolant outlet port, which are disposed such that a coolant for cooling the battery cells can flow from one side to the other side of the battery module in the direction perpendicular to the stacking direction of the battery cells, and the battery pack case is further provided with a flow space (‘inlet duct’) extending from the coolant inlet port to the battery module and another flow space (Outlet duct’) extending from the battery module to the coolant outlet port, the inlet duct having a vertical sectional area less than that of the outlet duct. |
| US09614204B2 |
Battery box structure
A battery box structure includes an enclosure which defines a first receiving groove, a first circuit board, a push button elastically disposed between the enclosure and the first circuit board, and a battery holder. At least one pair of conductive terminals is fastened to the first circuit board. A tail end of each of the conductive terminals is arched downward to form a resilient contact portion. The battery holder includes at least one pair of conductive pads. A bottom end of the push button is buckled with a top end of the battery holder. The battery holder is assembled in the first receiving groove. Each of the conductive pads electrically contacts the resilient contact portion. When the push button is pressed rearward, the bottom end of the push button breaks away from the top end of the battery holder. The battery holder is automatically ejected out of the enclosure. |
| US09614203B2 |
Battery pack for electric power tool
A contact diameter, which is formed by a cell holding portion and receiving-partitioning portions, is configured to be smaller than the diameter of a columnar outer peripheral surface of a battery cell. The cell holding portion comes into contact with the columnar outer peripheral surface of the battery cell so as to hold the columnar outer peripheral surface. The contact diameter formed by the cell holding portion and the receiving-partitioning portions increases when the battery cell is held, and the battery cell is pressed when the battery cell is held. A cell holder is provided with the receiving-partitioning portions that guide the battery cells to be inserted and housed. |
| US09614197B2 |
Onboard battery
An onboard battery includes an accommodation case that has a hollow cross section formed with multiple cavities 9a, and at least one battery module that has at least one battery cell and is accommodated in the accommodation case. At least one disposition depression that communicates with one of the multiple cavities and is opened upward is formed in a portion positioned below the at least one battery module in the accommodation case, and at least one heater that heats the at least one battery cell is disposed in the at least one disposition depression so as not to be in contact with the at least one battery cell. |
| US09614192B2 |
Method for forming thin film and method for fabricating organic light-emitting diode (OLED) display using the same
A method for forming a thin film for fabricating an organic light-emitting diode (OLED) display is disclosed. In one aspect, the method includes forming a plurality of shadow masks on a substrate. The substrate is then bent to form a predetermined curvature in the substrate. A deposition source is placed at a position having an equal angle with respect to central and peripheral portions of the substrate. The method also includes depositing a deposition material from the deposition source on the substrate and the shadow masks to form a thin film. |
| US09614191B2 |
High resolution organic light-emitting diode devices, displays, and related methods
A method of manufacturing an organic-light emitting diode (OLED) display can include providing on a substrate a first electrode associated with a first sub-pixel and a second electrode associated with a second sub-pixel, wherein a gap is formed between the first electrode and the second electrode and wherein the first electrode and the second electrode are positioned in a well having boundaries defined by a confinement structure on the substrate. The method can also include depositing in the well with the electrodes positioned therein, active OLED material to form a substantially continuous layer of active OLED material that spans the boundaries of the well such that a surface of the layer of active OLED material that faces away from the substrate has a non-planar topography. The depositing can be via inkjet printing. |
| US09614190B2 |
Flexible display device and manufacturing method thereof
A method for manufacturing a flexible display device includes forming a heat generator on a carrier substrate, forming a flexible substrate on the heat generator, forming a thin film transistor on the flexible substrate, forming a light emitting element connected to the thin film transistor, and separating the flexible substrate from the heat generator by application of heat to the flexible substrate, the application of heat including generation of heat by the heat generator. |
| US09614185B2 |
Display panel, manufacturing method thereof, and display device
The present invention provides a display panel, a manufacturing method thereof and a display device. The display panel comprises a first substrate, a display component provided on the first substrate, and a packaging structure for packaging the display component on the first substrate, wherein the packaging structure includes at least two first water blocking layers and at least one planarization layer that are stacked alternately above the display component, each first water blocking layer includes a plurality of first areas and a plurality of second areas, and joint lines between the first areas and the second areas in any two first water blocking layers are staggered with each other. |
| US09614179B2 |
Display panel, method of manufacturing the same and display device
The invention discloses a display panel, a method of manufacturing the same and a display device so as to simplify a process of transmitting an electrical signal between a first substrate and a second substrate of the display panel at a lower cost. The display panel includes a first substrate and a second substrate disposed opposite to each other. The first substrate has a concave groove surrounded by a convex section and facing the second substrate. The display panel also includes an electrode layer on the surface of the groove and having at least one first conductive section extending outward from inside of the concave groove to the top end face of the convex section; and at least one second conductive section on the second substrate and electrically connected with the respective first conductive section. |
| US09614177B2 |
OLED package method and OLED package structure
The present invention provides an OLED package method and an OLED package structure. The method comprises steps of: providing a substrate (1) to be packaged, and a package cover plate (2); forming an inorganic protective frame (11) in a round at the edges of the substrate (1); manufacturing an OLED element (12) on the substrate (1) inside the inorganic protective frame (11); pasting a solid glue film (21) on the package cover plate (2); forming an adhesive (22) in a round on the package cover plate (2) corresponding to a location of the inorganic protective frame (11); oppositely attaching the substrate (1) and the package cover plate (2), and the substrate (1) and the package cover plate (2) are affixed together by the solid glue film (21) and the adhesive (22) to accomplish the package to the substrate (1) with the package cover plate (2). |
| US09614170B2 |
Organic electroluminescent element
An organic electroluminescence device includes a pair of electrodes and an organic compound layer interposed therebetween. The organic compound layer includes a plurality of emitting layers at least including a first emitting layer and a second emitting layer. The first emitting layer contains a first host material and a fluorescent first luminescent material. The second emitting layer contains a second luminescent material that is different from the first luminescent material. A difference ΔST(H1) between singlet energy EgS(H1) of the first host material and an energy gap Eg77K(H1) at 77[K] of the first host material satisfies a specific relationship. One of the first luminescent material and the second luminescent material has a main peak wavelength from 400 nm to less than 500 nm and the other of the first luminescent material and the second luminescent material has a main peak wavelength from 500 nm to 700 nm. |
| US09614167B2 |
Organic light emitting diode display and method of manufacturing the same
Disclosed is an organic light emitting diode display including an organic light emitting display panel configured to display an image, and a lower passivation film attached to a bottom of the organic light emitting diode display panel. The lower passivation film includes a support film that is in contact with the organic light emitting diode display panel, and a stress adjustment layer formed beneath the support film and configured to reduce a bending stress to be induced in the organic light emitting display panel when the organic light emitting display panel and the lower passivation film are bent. |
| US09614164B2 |
Organic compound, light-emitting element, light-emitting device, electronic device, and lighting device
A novel substance with which an increase in life and emission efficiency of a light-emitting element can be achieved is provided. A carbazole compound having a structure represented by General Formula (G1) is provided. Note that a substituent which makes the HOMO level and the LUMO level of a compound in which a bond of the substituent is substituted with hydrogen deep and shallow, respectively is used as each of substituents in General Formula (G1) (R1, R2, Ar3, and α3). Further, a substituent which makes the band gap (Bg) and the T1 level of a compound in which a bond of the substituent is substituted with hydrogen wide and high is used as each of the substituents in General Formula (G1) (R1, R2, Ar3, and α3). |
| US09614163B2 |
Light-emitting diode having novel structure and electronic apparatus comprising same
A light-emitting diode includes: a first electrode; a second electrode; a light-emitting layer disposed between the first electrode and the second electrode; a hole transportable layer disposed between the first electrode and the light-emitting layer; and a blocking layer, which is disposed between the hole transportable layer and the light-emitting layer and includes a compound represented by the following Chemical Formula 1. |
| US09614162B2 |
Light-emitting devices comprising emissive layer
Light-emitting devices comprising an fluorescent emissive layer, and three different phosphorescent emissive layers are described herein. |
| US09614161B2 |
Compound and organic electronic element using same
The present specification relates to an organic electronic device in which a new compound, which can improve the life span, the efficiency, the electrochemical stability and the thermal stability of the organic electronic device, is included in an organic material layer. |
| US09614159B2 |
Benzophenanthrene derivative and organic electroluminescence device employing the same
A fused aromatic ring derivative shown by the following formula (1): wherein Ra and Rb are independently a hydrogen atom or a substituent, p is an integer of 1 to 8 and q is an integer of 1 to 11, when p is 2 or more, plural Ras may be independently the same or different and adjacent Ras may form a ring, when q is 2 or more, plural Rbs may be independently the same or different, L1 is a single bond, or a substituted or unsubstituted divalent linking group, and Ar1 is a substituted or unsubstituted aryl group having 6 to 50 ring carbon atoms or a substituted or unsubstituted heteroaryl group having 5 to 50 ring atoms, provided that the substituent of L1, the substituent of Ar1, Ra and Rb contain no substituted or unsubstituted amino group. |
| US09614157B2 |
Organic light emitting diode display having a plurality of data drivers and manufacturing method thereof
An organic light emitting diode (OLED) display includes an OLED display panel having a substrate; a plurality of scan lines formed on the substrate; a plurality of data lines crossing the plurality of scan lines; cover lines covering the data lines; a plurality of switching elements coupled to the plurality of scan lines and the plurality of data lines; and a plurality of organic light emitting diodes coupled to the plurality of switching elements; and upper and lower data drivers respectively located at upper and lower parts of the OLED display panel, wherein the data lines include an upper data line and a lower data line that are separated from each other, and the cover lines include upper and lower cover lines that are separated from each other. |
| US09614155B2 |
Vapor deposition apparatus, vapor deposition method, and method for producing organic electroluminescent element
The vapor deposition apparatus employs scanning vapor deposition, and includes a limiting component including a first plate portion; a second plate portion provided with a space from the first plate portion; and a joint portion combining the first plate portion with the second plate portion, the first plate portion being provided with an first opening, the second plate portion being provided with an second opening that faces the first opening, the vapor deposition apparatus including a first space between the first opening and the second opening, the vapor deposition apparatus including a second space between the first plate portion and the second plate portion, the first space being connected to the second space, the vapor deposition apparatus including a third space that is in the outside of the limiting component, the second space being connected to the third space. |
| US09614154B2 |
Electronic device and method for fabricating the same
An electronic device includes a semiconductor memory. The semiconductor memory includes first lines extending in a first direction; second lines extending in a second direction crossing the first direction; insulating patterns interposed between the first and second lines at first intersections of the first and second lines; and variable resistance patterns interposed between the first and the second lines at second intersections of the first and second lines. A central intersection is defined by respective central lines of the first and second lines and corresponds to a coordinate (0, 0). The first intersections are located on first to (n+1)th virtual lines, the (n+1)th virtual line having a polygonal shape in which vertexes correspond to coordinates (−(k−n), 0), (k−n, 0), (0, k−n) and (0, −(k−n)) where k is a natural number and n is an integer in a range of 0 to (k−1). |
| US09614153B2 |
Methods of selectively doping chalcogenide materials and methods of forming semiconductor devices
Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises forming a chalcogenide material adjacent to and in contact with an insulative material, exposing the chalcogenide material and the insulative material to a transition metal solution, and diffusing transition metal of the transition metal solution into the chalcogenide material while substantially no transition metal diffuses into the insulative material. A method of doping a chalcogenide material of a memory cell with at least one transition metal without using an etch or chemical mechanical planarization process to remove the transition metal from an insulative material of the memory cell is also disclosed, wherein the chalcogenide material is not silver selenide. |
| US09614152B2 |
Phase change material layers
A phase change material layer includes germanium (Ge), antimony (Sb), tellurium (Te) and at least one impurity elements. An atomic concentration of impurity elements ranges from about 0 |
| US09614147B2 |
Hybrid synthetic antiferromagnetic layer for perpendicular magnetic tunnel junction (MTJ)
A magnetic tunnel junction (MTJ) device includes a free layer. The MTJ also includes a barrier layer coupled to the free layer. The MTJ also has a fixed layer, coupled to the barrier layer. The fixed layer includes a first synthetic antiferromagnetic (SAF) multilayer having a first perpendicular magnetic anisotropy (PMA) and a first damping constant. The fixed layer also includes a second SAF multilayer having a second perpendicular magnetic anisotropy (PMA) and a second damping constant lower than the first damping constant. The first SAF multilayer is closer to the barrier layer than the second SAF multilayer. The fixed layer also includes a SAF coupling layer between the first and the second SAF multilayers. |
| US09614146B2 |
Armature-clad MRAM device
A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack. |
| US09614144B1 |
OTP MRAM
Techniques for forming OTP memory elements with reduced breakdown voltage are provided. In one aspect, a method of forming an OTP MRAM element includes the steps of: creating a substrate having surface topology; and forming the OTP MRAM element on the substrate over the surface topology, wherein the OTP MRAM element comprises a first magnetic metal layer and a second metal magnetic layer separated by a tunnel barrier, and wherein by forming the OTP MRAM element over the surface topology the tunnel barrier has both a first thickness T1 and second thickness T2, wherein T1 is greater than T2. A method of forming a device having both MTP MRAM and OTP MRAM elements is provided, as is an MRAM device. |
| US09614142B2 |
Piezoelectric ceramic composition constituted by Ag-segregated sintered body of zirconate-titanate type perovskite composition
A piezoelectric ceramic composition contains a perovskite composition which is represented by (Pba·Rex){Zrb·Tic, ·(Ni1/3Nb2/3)d·(Zn1/3Nb2/3)e}O3 (wherein Re represents La and/or Nd, and a-e and x satisfy the following conditions 0.95≦a≦1.05, 0≦x≦0.05, 0.35≦b≦0.45, 0.35≦c≦0.45, 0 |
| US09614140B2 |
Piezoelectric ceramic, method for making same, piezoelectric element, liquid discharge head, ultrasonic motor, and dust cleaner
A barium titanate piezoelectric ceramic having good piezoelectric properties and mechanical strength and a piezoelectric element that includes the ceramic are provided. A method for making a piezoelectric ceramic includes forming a compact containing barium titanate particles, sintering the compact, and decreasing the temperature of the compact. The sintering includes (A) increasing the temperature of the compact to a temperature range of a shrinking process of the compact; (B) increasing the temperature of the compact to a temperature range of a liquid phase sintering process of the compact; (C) decreasing the temperature of the compact to the temperature range of the shrinking process of the compact; and (D) retaining the third temperature. |
| US09614139B2 |
Flexible lighting device having unobtrusive conductive layers
A flexible lighting element is provided, comprising: a first substrate; first and second conductive elements over the first substrate; a light-emitting element having first and second contacts that are both on a first surface of the light-emitting element, the first and second contacts being electrically connected to the first and second conductive elements, respectively, and the light-emitting element emitting light from a second surface opposite the first surface; a transparent layer located adjacent to the second surface; and a transparent affixing layer located between the first substrate and the transparent layer, wherein the transparent layer and the transparent affixing layer are both sufficiently transparent to visible light that they will not decrease light transmittance below 70%, and the first and second conductive layers are at least partially transparent to visible light, or are 300 μm or smaller in width, or are concealed by a design feature from a viewing direction. |
| US09614138B2 |
Package, light emitting device, and methods of manufacturing the package and the light emitting device
A package for mounting a light emitting element includes a recess; a pair of lead electrodes exposed at a bottom surface of the recess; a plating layer covering a surface of each of the pair of lead electrodes; and a resin molded body retaining the pair of lead electrodes, and forming an area between the pair of lead electrodes at the bottom surface of the recess and a lateral surface of the recess. At least one of the lead electrodes has a front surface protrusion that is linearly formed along the resin molded body at the bottom surface of the recess and along a periphery of the bottom surface of the recess, and a back surface protrusion that is formed at a position at a back surface opposite to a position of the front surface protrusion, and at least a tip of each of the front surface protrusion and the back surface protrusion is exposed outside the plating layer. |
| US09614136B2 |
Optical substrate, semiconductor light-emitting element and method of manufacturing semiconductor light-emitting element
In an optical substrate (1), a concave-convex structure (12) including a plurality of independent convex portions (131 to 134) and concave portions (14) provided between the convex portions (131 to 134) is provided in a surface. The average interval Pave between the adjacent convex portions (131 to 134) in the concave-convex structure (12) satisfies 50 nm≦Pave≦1500 nm, and the convex portion (133) having a convex portion height hn satisfying 0.6 h≧hn≧0 h for the average convex portion height Have is present with a probability Z satisfying 1/10000≦Z≦1/5. When the optical substrate (1) is used in a semiconductor light-emitting element, dislocations in a semiconductor layer are dispersed to reduce the dislocation density, and thus internal quantum efficiency IQE is improved, and a waveguide mode is removed by light scattering and thus the light the extraction efficiency LEE is increased, with the result that the efficiency of light emission of the semiconductor light-emitting element is enhanced. |
| US09614135B2 |
Method for producing light emitting device
A method for producing a light emitting device includes: spraying a resin mixture onto a light emitting element to deposit the resin mixture on the light emitting element, the resin mixture including a thixotropy imparting agent; and curing the resin mixture to form an outermost layer of a light transmissive member and to have an outermost surface having protrusions and recesses on the outermost layer, light emitted from the light emitting element being capable to transmit to an outside of the light emitting device via the light transmissive member. |
| US09614129B2 |
Light emitting device having surface-modified luminophores
A light-emitting device including a light-emitting diode and a surface-modified luminophore. The surface-modified luminophore includes a luminophore including a manganese activator and a fluorine compound fixed to the luminophore. |
| US09614126B2 |
Light emitting device
A light emitting device includes a light emitting element, a p-side and an n-side post electrode. The light emitting element includes a semiconductor body having n-type and p-type semiconductor layers and a peripheral portion, a first edge, and a second edge. The light emitting element further includes an n-side electrode and a p-side electrode disposed on an insulating film having n-side openings and a p-side opening. The n-side electrode includes second n-contact portions electrically connected to the n-type semiconductor layer through the n-side openings. In a plan view, a p-side post electrode and at least one of the second n-contact portions are at the first edge side. An n-side post electrode electrically connected to the second n-contact portions and at least one of the second n-contact portions are at the second edge side. Fewer second n-contact portions are on the first edge side than that on the second edge side. |
| US09614125B2 |
Composite element chip, a semiconductor device and manufacturing method thereof, a printing head, and an image forming apparatus
A composite element chip includes a substrate; and a plurality of semiconductor thin-films disposed on the substrate and arranged in a predetermined direction which is a first direction. Each semiconductor thin-film includes an array of a plurality of light emitting portions which are arranged so that adjacent light emitting portions are displaced from each other by a predetermined distance in a second direction which is perpendicular to the first direction, the plurality of light emitting portions being arranged along an imaginary line. Each semiconductor thin-film has a first end that is parallel to the second direction; and a second end that extends along a pattern in which the plurality of light emitting portions are arranged and is parallel to the imaginary line. A semiconductor device and manufacturing method thereof, a printing head, and an image forming apparatus are also disclosed. |
| US09614123B2 |
Deep ultraviolet LED and method for manufacturing the same
A deep ultraviolet LED with a design wavelength of λ is provided that includes a reflecting electrode layer, a metal layer, a p-type GaN contact layer, and a p-type AlGaN layer that are sequentially stacked from a side opposite to a substrate, the p-type AlGaN layer being transparent to light with the wavelength of λ; and a photonic crystal periodic structure that penetrates at least the p-type GaN contact layer and the p-type AlGaN layer. The photonic crystal periodic structure has a photonic band gap. |
| US09614121B1 |
Method of fabricating semiconductor light emitting device
A method of fabricating a semiconductor light-emitting device is provided that includes forming a first conductivity-type semiconductor layer, forming an active layer by alternately forming a plurality of quantum well layers grown at a first temperature and a plurality of quantum barrier layers grown at a second temperature higher than the first temperature, and forming a second conductivity-type semiconductor layer. |
| US09614119B2 |
Avalanche photodiode with low breakdown voltage
An Si/Ge SACM avalanche photo-diodes (APD) having low breakdown voltage characteristics includes an absorption region and a multiplication region having various layers of particular thicknesses and doping concentrations. An optical waveguide can guide infrared and/or optical signals or energy into the absorption region. The resulting photo-generated carriers are swept into the i-Si layer and/or multiplication region for avalanche multiplication. The APD has a breakdown bias voltage of well less than 12 V and an operating bandwidth of greater than 10 GHz, and is therefore suitable for use in consumer electronic devices, high speed communication networks, and the like. |
| US09614117B2 |
Solar cell manufacturing method
The present invention relates to a method for manufacturing a solar cell having excellent long-term reliability and high efficiency, said method including: a step (7) for applying a paste-like electrode agent to an antireflection film formed on the light receiving surface side of a semiconductor substrate having at least a pn junction, said electrode agent containing a conductive material; and an electrode firing step (9) having local heat treatment (step (9a)) for applying heat such that at least a part of the conductive material is fired by irradiating merely the electrode agent-applied portion with a laser beam, and whole body heat treatment (step (9b)) for heating the whole semiconductor substrate to a temperature below 800° C. |
| US09614112B2 |
Imaging cell array integrated circuit
A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes. |
| US09614110B2 |
Photo detector
Disclosed is a photo detector. The photo detector includes: a conductive substrate; an insulating layer formed on the conductive substrate; a single-layer graphene formed at one part of an upper end of the insulating layer and formed in one layer; a multi-layer graphene formed at the other part of the upper end of the insulating layer and formed in multiple layers; a first electrode formed at an end of the single-layer graphene; and a second electrode formed at an end of the multi-layer graphene. |
| US09614109B2 |
Photodiode and photodiode array
A p− type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p− type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p− type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p− type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed. |
| US09614108B1 |
Optically-thin chalcogenide solar cells
A photovoltaic device comprises a back reflective coating structure to provide back scattering of light that passes through the photovoltaic device, an absorber structure containing chalcogenide materials, and a top scattering antireflective structure deposited on the top subcell. Illustratively, a multi-junction structure comprises a bottom subcell deposited on the back reflective coating structure, the bottom subcell having a lower band gap, higher index material embedded therein, to provide lateral propagation of light that passes through the photovoltaic device, and a top subcell deposited on the bottom subcell. The multi-junction structure can comprise chalcogenide materials, in which case the top subcell is embedded with an intermediate band gap absorber material. |
| US09614105B2 |
Charge-trap NOR with silicon-rich nitride as a charge trap layer
A charge-trapping NOR (CT-NOR) memory device and methods of fabricating a CT-NOR memory device utilizing silicon-rich nitride (SiRN) in a charge-trapping (CT) layer of the CT-NOR memory device. |
| US09614103B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device according to an embodiment includes a first region including an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn), a second region and a third region between which the first region is disposed, at least one of the second region and the third region having a higher indium (In) concentration than the first region and containing at least one metal element from the group consisting of titanium (Ti), tungsten (W), copper (Cu), zinc (Zn), aluminum (Al), lead (Pb), and tin (Sn), an electrode; and an insulating layer disposed between the first region and the electrode. |
| US09614102B2 |
Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption
A method of fabricating MO TFTs includes positioning opaque gate metal on a transparent substrate to define a gate area. Depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Depositing etch stop material on the semiconductor material. Positioning photoresist defining an isolation area in the semiconductor material, the etch stop material and the photoresist being selectively removable. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas. |
| US09614101B2 |
Array substrate and method for manufacturing the same
Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode. |
| US09614099B2 |
Semiconductor device and imaging device
According to one embodiment, a semiconductor device includes a semiconductor layer including a first semiconductor portion and a second semiconductor portion being continuous with the first semiconductor portion, a first gate electrode, a second gate electrode, an insulating film. The first semiconductor portion includes a first portion, a second portion and a third portion provided between the first portion and the second portion. The second semiconductor portion includes a fourth portion separated from the first portion, a fifth portion separated from the second portion, and a sixth portion provided between the forth portion and the fifth portion. The first gate electrode is separated from the third portion. The second gate electrode is separated from the sixth portion. The insulating film is provided at a first position between the first gate electrode and the semiconductor layer and at a second position between the second gate electrode and the semiconductor layer. |
| US09614094B2 |
Semiconductor device including oxide semiconductor layer and method for driving the same
An object is to suppress operation delay caused when a semiconductor device that amplifies and outputs an error between two potentials returns from a standby mode. Electrical connection between an output terminal of a transconductance amplifier and one electrode of a capacitor is controlled by a transistor whose channel is formed in an oxide semiconductor layer. Consequently, turning off the transistor allows the one electrode of the capacitor to hold charge for a long time even if the transconductance amplifier is in the standby mode. Moreover, when the transconductance amplifier returns from the standby mode, turning on the transistor makes it possible to settle charging and discharging of the capacitor in a short time. As a result, the operation of the semiconductor device can enter into a steady state in a short time. |
| US09614090B2 |
Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device includes at least one first gate structure and at least one second gate structure on a semiconductor substrate. The at least one first gate structure has a flat upper surface extending in a first direction and a first width in a second direction perpendicular to the first direction. The at least one second gate structure has a convex upper surface extending in the first direction and a second width in the second direction, the second width being greater than the first width. |
| US09614089B2 |
Structure and formation method of semiconductor device structure
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a protection element over the gate stack. A top of the protection element is wider than a bottom of the protection element. The semiconductor device structure also includes a spacer element over a side surface of the protection element and a sidewall of the gate stack. The semiconductor device structure further includes a conductive contact electrically connected to a conductive feature over the semiconductor substrate. |
| US09614088B2 |
Metal gate structure and manufacturing method thereof
A semiconductor structure includes a substrate including a first active region, a second active region and an isolation disposed between the first active region and the second active region; a plurality of gates disposed over the substrate and including a first gate extended over the first active region, the isolation and the second active region, and a second gate over the first active region and the second active region; and an inter-level dielectric (ILD) disposed over the substrate and surrounding the plurality of gates, wherein the second gate is configured not to conduct current flow and includes a first section disposed over the first active region and a second section disposed over the second active region, a portion of the ILD is disposed between the first section and the second section. |
| US09614085B2 |
Semiconductor structure having enlarged regrowth regions and manufacturing method of the same
The present disclosure provides a semiconductor structure, including: an insulation region including a top surface; a semiconductor fin protruding from the top surface of the insulation region; a gate over the semiconductor fin; and a regrowth region partially positioned in the semiconductor fin, and the regrowth region forming a source/drain region of the semiconductor structure; wherein a profile of the regrowth region taken along a plane perpendicular to a direction of the semiconductor fin and top surfaces of the insulation region includes a girdle, an upper girdle facet facing away from the insulation region, and a lower girdle facet facing toward the insulation region, and an angle between the upper girdle facet and the girdle is greater than about 54.7 degrees. |
| US09614081B2 |
Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same
A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the gate electrode as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source/drain region of the nMOS transistor, whereby the gate electrode is amorphized. Subsequently, a silicon oxide film is provided to cover the gate electrode, at a temperature which is less than the one at which recrystallization of the gate electrode occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode, and high tensile stress is applied to a channel region under the gate electrode. As a result, carrier mobility of the nMOS transistor is enhanced. |
| US09614080B2 |
Semiconductor device having electrically floating body transistor, semiconductor device having both volatile and non-volatile functionality and method of operating
A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell; a first region in electrical contact with said floating body region; a second region in electrical contact with said floating body region and spaced apart from said first region; and a gate positioned between said first and second regions. The cell may be a multi-level cell. Arrays of memory cells are disclosed for making a memory device. Methods of operating memory cells are also provided. |
| US09614075B2 |
Semiconductor device
A semiconductor device includes a fin-shaped silicon layer on a silicon substrate, and a first insulating film around the fin-shaped silicon layer. A pillar-shaped silicon layer is on the fin-shaped silicon layer, where a pillar diameter of the pillar-shaped silicon layer is equal to a fin width of the fin-shaped silicon layer, and where the pillar diameter and the fin width parallel to the surface. A first diffusion layer is in an upper portion of the fin-shaped silicon layer and a lower portion of the pillar-shaped silicon layer, and a second diffusion layer is in an upper portion of the pillar-shaped silicon layer. A gate insulating film is around the pillar-shaped silicon layer and a metal gate electrode is around the gate insulating film. A metal gate wiring is connected to the metal gate electrode and a contact is on the second diffusion layer. |
| US09614066B2 |
Semiconductor device provided with an IE type trench IGBT
A switching loss is prevented from being deteriorated by suppressing increase in a gate capacitance due to a cell shrink of an IE type trench gate IGBT. A cell formation region is configured of a linear active cell region, a linear hole collector cell region, and a linear inactive cell region between them. Then, upper surfaces of the third and fourth linear trench gate electrodes which are formed so as to sandwich both sides of the linear hole collector cell region and electrically connected to an emitter electrode are positioned to be lower than upper surfaces of the first and second linear trench gate electrodes which are formed so as to sandwich both sides of the linear active cell region and electrically connected to a gate electrode. |
| US09614065B2 |
Inhomogeneous power semiconductor devices
A power semiconductor device includes a power transistor including a plurality of transistor cells on a semiconductor die. At least some of the transistor cells are inhomogeneous by design so that the number of current filaments in the transistor cells with reduced local current density increases and fewer transient avalanche oscillations occur in the power transistor during operation. |
| US09614062B2 |
Semiconductor device and method for manufacturing thereof
In a semiconductor device including a transistor using an oxide semiconductor film, stable electric characteristics can be provided and high reliability can be achieved. A structure of the semiconductor device, which achieves high-speed response and high-speed operation, is provided. In a semiconductor device including a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in order and a sidewall insulating layer is provided on the side surface of the gate electrode layer, the sidewall insulating layer has an oxygen-excess regions, which is formed in such a manner that a first insulating film is formed and then is subjected to oxygen doping treatment, a second insulating is formed over the first insulating film, and a stacked layer of the first insulating film and the second insulating film are etched. |
| US09614061B2 |
Semiconductor device having fin structure that includes dummy fins
A semiconductor device includes: a substrate, a fin-shaped structure on the substrate, and a dummy fin-shaped structure on the substrate and adjacent to the fin-shaped structure. Preferably, the fin-shaped structure includes a gate structure thereon and a first epitaxial layer adjacent to two sides of the gate structure, and the dummy fin-shaped structure includes a second epitaxial layer thereon. A contact plug is disposed on the first epitaxial layer and the second epitaxial layer. In addition, the dummy fin-shaped structure includes a curve, in which the curve is omega shaped. |
| US09614060B2 |
Nanowire transistor with underlayer etch stops
A nanowire device of the present description may be produced with the incorporation of at least one underlayer etch stop formed during the fabrication of at least one nanowire transistor in order to assist in protecting source structures and/or drain structures from damage that may result from fabrication processes. The underlayer etch stop may prevent damage to the source structures and/or drain the structures, when the material used in the fabrication of the source structures and/or the drain structures is susceptible to being etched by the processes used in the removal of the sacrificial materials, i.e. low selectively to the source structure and/or the drain structure materials, such that potential shorting between the transistor gate electrodes and contacts formed for the source structures and/or the drain structures may be prevented. |
| US09614058B2 |
Methods of forming low defect replacement fins for a FinFET semiconductor device and the resulting devices
One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a <100> crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure. |
| US09614057B2 |
Enriched, high mobility strained fin having bottom dielectric isolation
Embodiments are directed to a method of enriching and electrically isolating a fin of a FinFET. The method includes forming at least one fin. The method further includes forming under a first set of conditions an enriched upper portion of the at least one fin. The method further includes forming under a second set of conditions an electrically isolated region from a lower portion of the at least one fin, wherein forming under the first set of conditions is spaced in time from forming under the second set of conditions. The method further includes controlling the first set of conditions separately from the second set of conditions. |
| US09614053B2 |
Spacers with rectangular profile and methods of forming the same
A method includes forming a spacer layer on a top surface and sidewalls of a patterned feature, wherein the patterned feature is overlying a base layer, A protection layer is formed to contact a top surface and a sidewall surface of the spacer layer. The horizontal portions of the protection layer are removed, wherein vertical portions of the protect layer remain after the removal. The spacer layer is etched to remove horizontal portions of the spacer layer, wherein vertical portions of the spacer layer remain to form parts of spacers. |
| US09614049B2 |
Fin tunnel field effect transistor (FET)
A fin tunnel field effect transistor includes a seed region and a first type region disposed above the seed region. The first type region includes a first doping. The fin tunnel field effect transistor includes a second type region disposed above the first type region. The second type region includes a second doping that is opposite the first doping. The fin tunnel field effect transistor includes a gate insulator disposed above the second type region and a gate electrode disposed above the gate insulator. A method for forming an example fin tunnel field effect transistor is provided. |
| US09614047B2 |
Gate contact with vertical isolation from source-drain
A method of forming a semiconductor structure includes forming a gate structure having a first conductive material above a semiconductor substrate, gate spacers on opposing sides of the first conductive material, and a first interlevel dielectric (ILD) layer surrounding the gate spacers and the first conductive material. An upper portion of the first conductive material is recessed. The gate spacers are recessed until a height of the gate spacers is less than a height of the gate structure. An isolation liner is deposited above the gate spacers and the first conductive material. A portion of the isolation liner is removed so that a top surface of the first conductive material is exposed. A second conductive material is deposited in a contact hole created above the first conductive material and the gate spacers to form a gate contact. |
| US09614043B2 |
MOSFET termination trench
A method, in one embodiment, can include forming a core trench and a termination trench in a substrate. The termination trench is wider than the core trench. In addition, a first oxide can be deposited that fills the core trench and lines the sidewalls and bottom of the termination trench. A first polysilicon can be deposited into the termination trench. A second oxide can be deposited above the first polysilicon. A mask can be deposited above the second oxide and the termination trench. The first oxide can be removed from the core trench. A third oxide can be deposited that lines the sidewalls and bottom of the core trench. The first oxide within the termination trench is thicker than the third oxide within the core trench. |
| US09614042B2 |
Heterojunction tunnel field effect transistor fabrication using limited lithography steps
A structure and method for fabricating a vertical heterojunction tunnel field effect transistor (TFET) using limited lithography steps is disclosed. The fabrication of a second conductivity type source/drain region may utilize a single lithography step to form a first-type source/drain region, and a metal contact thereon, adjacent to a gate stack having a first conductivity type source/drain region on an opposite side. |
| US09614039B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a plurality of trench gates provided abreast in a semiconductor substrate; an interlayer insulation film having opening from which a part of a front surface of the semiconductor substrate is exposed; and contact plugs provided in the openings. The interlayer insulation film comprises a plurality of first portions, each of which covers a corresponding one of the trench gates, and a plurality of second portions, each of which is provided between adjacent first portions and along a direction intersecting with the first portions. The openings are provided at an area surrounded by the first portions and the second portions, a length of the openings in a direction along the first portions is shorter than a length of the openings in a direction along the second portions intersecting with the first portions. |
| US09614035B2 |
Semiconductor device
A semiconductor device includes a fin protruding from a substrate and extending in a first direction, first and second gate structures intersecting the fin, a recess formed in the fin between the first and second gate structures, a device isolation layer which fills the recess, and which has an upper surface protruded outwardly from the fin and disposed to be coplanar with upper surfaces of the first and second gate structures, a liner formed along a side walls of the device isolation layer protruded outwardly from the fin and a source/drain region disposed at both sides of the recess and spaced apart from the device isolation layer. |
| US09614031B2 |
Methods for forming a high-voltage super junction by trench and epitaxial doping
A high-voltage super junction device is disclosed. The device includes a semiconductor substrate region having a first conductivity type and having neighboring trenches disposed therein. The neighboring trenches each have trench sidewalls and a trench bottom surface. A region having a second conductivity type is disposed in or adjacent to a trench and meets the semiconductor substrate region at a p-n junction. A gate electrode is formed on the semiconductor substrate region and is electrically isolated from the semiconductor substrate region by a gate dielectric. A body region having the second conductivity type is disposed on opposite sides of the gate electrode near a surface of the semiconductor substrate. A source region having the first conductivity type is disposed within in the body region on opposite sides of the gate electrode near the surface of the semiconductor substrate. |
| US09614026B2 |
High mobility transport layer structures for rhombohedral Si/Ge/SiGe devices
An electronic device includes a trigonal crystal substrate defining a (0001) C-plane. The substrate may comprise Sapphire or other suitable material. A plurality of rhombohedrally aligned SiGe (111)-oriented crystals are disposed on the (0001) C-plane of the crystal substrate. A first region of material is disposed on the rhombohedrally aligned SiGe layer. The first region comprises an intrinsic or doped Si, Ge, or SiGe layer. The first region can be layered between two secondary regions comprising n+doped SiGe or n+doped Ge, whereby the first region collects electrons from the two secondary regions. |
| US09614019B2 |
Input device
To provide a novel input device that can be manufactured at low cost or has high reliability. The input device includes a first flexible base material, a second flexible base material, and a sensor circuit that can sense an object such as a finger that is close to or in contact with a surface of the second flexible base material. The sensor circuit includes a transistor portion including a first transistor and a light-emitting element including a second transistor. The first transistor and the second transistor are provided on the first flexible base material side. Connection defects can be less likely to occur, which leads to an increase in the reliability of the input device. |
| US09614017B2 |
AMOLED backplane structure and manufacturing method thereof
The present invention provides an AMOLED backplane structure and a manufacturing method thereof. In each sub-pixel, a TFT substrate (TS) includes a corrugation structure (4) formed in an area corresponding to an opening (71) of a pixel definition layer (7). The corrugation structure (4) includes a plurality of raised sections (41) and a recessed section (42) formed between every two adjacent ones of the raised sections (41). An upper surface of a portion of the planarization layer (5) and a portion of a pixel electrode (6) that correspond to and are located above the corrugation structure (4) include curved surfaces corresponding to the corrugation structure (4). The AMOLED backplane structure helps ensure the planarization layer (5) is smooth and free of abrupt change sites and also makes the pixel electrode (6) in a form of a curved surface to increase an effective displaying surface, extend the lifespan of the OLED, reduce difficulty of manufacturing, and improve resolution. |
| US09614013B2 |
Transparent organic light emitting display devices including solar cell and methods of manufacturing the same
A transparent organic light-emitting display device may include a lower transparent substrate having a pixel region and a boundary region disposed between adjacent pixel regions, a solar cell disposed on the lower transparent substrate, a display structure disposed on the solar cell, and an overcoat layer disposed between the solar cell and the display structure, in which the overcoat layer electrically insulates the display structure from the solar cell. |
| US09614011B2 |
Electroluminescence display device
There is provided an EL display device of a color filter system which obtains sufficient brightness and contrast while making it difficult to generate a color mixture even if pixels become fine. An EL display device 100 according to the present invention includes a first substrate 1, a circuit layer 2 formed on the first substrate 1, a color selection reflection layer 11 formed in an upper layer of the circuit layer 2, lower electrodes 5 formed in an upper layer of the color selection reflection layer 11, a white light emission EL layer 7 formed in an upper layer of the lower electrodes 5, an upper electrode 8 formed in an upper layer of the EL layer 7, and a sealing layer 9 formed in an upper layer of the upper electrode 8. |
| US09614004B2 |
Diode/superionic conductor/polymer memory structure
A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode. |
| US09614003B1 |
Method of forming a memory device structure and memory device structure
The present disclosure provides a memory device structure including a wafer substrate, a magnetic tunnel junction (MTJ) formed by a first magnetic layer, a second magnetic layer, and a thin non-magnetic layer stacked along a first direction perpendicular to an upper surface of the wafer substrate above which the MTJ is formed, the non-magnetic layer being interposed between the first magnetic layer and the second magnetic layer, a first contact electrically coupled to the first magnetic layer, and a second contact electrically coupled to the second magnetic layer. |
| US09614001B2 |
Active matrix substrate including signal terminals additional signal terminals and switching elements for testing the active matrix substrate
An active matrix substrate includes a plurality of bus lines (1, 2) provided in a pixel region, a plurality of signal terminals (5) provided in a connection terminal region (K), connection lines (3), additional signal terminals (11), test lines (8), and switching elements (4). The switching elements (4) are divided into a plurality of groups, and can control connections between the bus lines and the test lines (8) on a group basis, and connection elements (12) that each include a diode or a switching element and connect the signal terminals (5) to each other are provided in the connection terminal region (K). |
| US09614000B2 |
Biased backside illuminated sensor shield structure
Presented herein is a device comprising an image sensor having a plurality of pixels disposed in a substrate and configured to sense light through a back side of the substrate and an RDL disposed on a front side of the substrate and having a plurality of conductive elements disposed in one or more dielectric layers. A sensor shield is disposed over the back side of the substrate and extending over the image sensor. At least one via contacts the sensor shield and extends from the sensor shield through at least a portion of the RDL and contacts at least one of the plurality of conductive elements. |
| US09613996B2 |
Backside structure and methods for BSI image sensors
A back side image sensor and method of manufacture are provided. In an embodiment a bottom anti-reflective coating is formed over a substrate, and a metal shield layer is formed over the bottom anti-reflective coating. The metal shield layer is patterned to form a grid pattern over a sensor array region of the substrate, and a first dielectric layer and a second dielectric layer are formed to at least partially fill in openings within the grid pattern. |
| US09613994B2 |
Capacitance device in a stacked scheme and methods of forming the same
Embodiments of the present disclosure include devices and sensor packages and methods of forming the same. An embodiment is a device including a first semiconductor chip. The first semiconductor chip includes a first substrate, a first conductive pad over the first substrate. The device further includes a second semiconductor chip having a second surface bonded to a first surface of the first semiconductor chip. The second semiconductor chip includes a second substrate and a second conductive pad over the second substrate. The second conductive pad and the first conductive pad form a first capacitor. |
| US09613987B2 |
Display device
A display device including a data line disposed on a substrate; a first pigment layer formed to cover the data line; a second pigment layer disposed by a side of the first pigment layer and formed to have a first region which corresponds to an overlap region of the first and second pigment layers; and common electrodes arranged on second regions in which the first and second pigment layers do not overlap with each other. |
| US09613977B2 |
Differential etch of metal oxide blocking dielectric layer for three-dimensional memory devices
A method of manufacturing a semiconductor structure includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening through the stack, forming an aluminum oxide layer having a horizontal portion at a bottom of the memory opening and a vertical portion at least over a sidewall of the memory opening, where the horizontal portion differs from the vertical portion by at least one of structure or composition, and selectively etching the horizontal portion selective to the vertical portion. |
| US09613976B2 |
Three-dimensional semiconductor memory device
In general, according to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a memory film, a partitioning member, a first interlayer insulating film, and a first plug. The stacked body is provided on the substrate, and including a plurality of electrode films and a plurality of insulating films. The semiconductor pillar is provided in the stacked body. The partitioning member is provided in the stacked body. The first plug is connected to the semiconductor pillar. A central axis of the first plug is shifted from a central axis of the semiconductor pillar so as to approach the nearest partitioning member. |
| US09613975B2 |
Bridge line structure for bit line connection in a three-dimensional semiconductor device
A structure is formed on a substrate, which includes a stack of alternating layers comprising insulating layers and electrically conductive layers and a plurality of memory stack structures extending through the stack. At least one bridge line structure is formed on top surfaces of a respective subset of the plurality of memory stack structures to provide local lateral electrical connection. At least one dielectric material layer is formed over the at least one bridge line structure and the plurality of memory stack structures. A plurality contact via structures is formed through the dielectric material layer. The plurality of contact via structures includes at least one first contact via structure contacting a top surface of a respective bridge line structure, and second contact via structures contacting a top surface of a respective memory stack structure. |
| US09613969B2 |
Semiconductor structure and method of forming the same
The present invention provides a semiconductor structure, including a substrate, a plurality of fin structures, a plurality of gate structures, a dielectric layer and a plurality of contact plugs. The substrate has a memory region. The fin structures are disposed on the substrate in the memory region, each of which stretches along a first direction. The gate structures are disposed on the fin structures, each of which stretches along a second direction. The dielectric layer is disposed on the gate structures and the fin structures. The contact plugs are disposed in the dielectric layer and electrically connected to a source/drain region in the fin structure. From a top view, the contact plug has a trapezoid shape or a pentagon shape. The present invention further provides a method for forming the same. |
| US09613967B1 |
Memory device and method of fabricating the same
A method of fabricating a memory device includes providing a substrate having a first region and a second region. A first dielectric layer is formed on the substrate in the first region. A conductive layer is formed on the substrate in the second region. A top surface of the conductive layer is lower than a top surface of the first dielectric layer. A second dielectric layer is formed on the substrate. A portion of the second dielectric layer and a portion of the conductive layer are removed to form a first opening in the conductive layer and the second dielectric layer in the second region. The first opening exposes a surface of the substrate. A portion of the substrate in the second region is removed to form a trench in the substrate in the second region. A third dielectric layer is formed in the trench and the first opening. |
| US09613959B2 |
Method of forming metal gate to mitigate antenna defect
The present disclosure relates to methods of forming a field effect transistor (FET) over a substrate, and associated integrated circuit device that improve etching back profile and prevent metal gate defect. In some embodiments, a recess is formed through an inter-layer dielectric (ILD) layer along a sidewall spacer and filled with a high-κ dielectric layer and a metal gate. An etch back is performed to lower the high-κ dielectric layer and the metal gate, where an “antenna” shaped residue of the high-κ dielectric material and the metal gate material is left at the boundary region of the high-κ layer and the metal gate, along the sidewall spacer. Then a second etch is performed to the sidewall spacer, removing a top edge portion of the sidewall spacer. Then one more step of etch can be performed to the high-κ layer and the metal gate to planarize and remove the residue. |
| US09613957B1 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a first active region including at least one first recess; a second active region including at least one second recess; an isolation region including a diffusion barrier that laterally surrounds at least any one active region of the first active region and the second active region; a first recess gate filled in the first recess; and a second recess gate filled in the second recess, wherein the diffusion barrier contacts ends of at least any one of the first recess gate and the second recess gate. |
| US09613955B1 |
Hybrid circuit including a tunnel field-effect transistor
The present invention relates generally to integrated circuits and more particularly, to a structure and method of forming a hybrid circuit including a tunnel field-effect transistor (TFET) and a conventional field effect transistor (FET). Embodiments of the present invention include a hybrid amplifier which features a TFET common-source feeding a common-gate conventional FET (e.g. a MOSFET). A TFET gate may be electrically isolated from an output from a conventional FET. Thus, a high impedance input may be received by a TFET with a high-isolation output (i.e. low capacitance) at a conventional FET. A hybrid circuit amplifier including a TFET and a conventional FET may have a very high input impedance and a low miller capacitance. |
| US09613946B2 |
Low voltage triggered silicon controlled rectifier with high holding voltage and small silicon area
A semiconductor device includes a P-type semiconductor substrate, a first N-well, a second N-well, and a P-well adjoining the first and second N-wells, a first doped region having a first conductivity type within the first N-well, a second doped region having a second conductivity type bridging the first N-well and the P-well, a third N+ doped region bridging the second N-well and the P-well, a fourth P+ doped region within the second N-well and spaced apart from the third N+ doped region, and a gate structure formed on the surface of the P-well and between the second doped region and the third N+ doped region. The gate structure, the second doped region, and the third N+ doped region form an NMOS structure. The semiconductor device is a low voltage triggered SCR having a relatively small silicon area and high holding voltage. |
| US09613943B2 |
Semiconductor device having output buffers and voltage path coupled to output buffers
An apparatus includes first and second data pads arranged adjacently to each other in a first direction without an intervention of a pad therebetween, first and second output transistors coupled correspondingly to the first and second data pads and arranged adjacently to each other in the first direction and at least one contact plug through which a voltage is supplied to each of the first and second output transistors. The at least one contact plug is arranged between the first and second output transistors. |
| US09613935B2 |
LED module
An LED module includes a substrate, one or more LED chips supported by a main surface of the substrate, and wirings. The substrate has one or more through holes penetrating from the main surface to a rear surface. The wirings are formed on the substrate and make electrical conduction with the LED chips. The wirings include pads which are formed on the main surface and make electrical conduction with the LED chips, rear surface electrodes which are formed on the rear surface, and through wirings which make electrical conduction between the pads and the rear surface electrodes and are formed on the inner sides of the through holes. |
| US09613933B2 |
Package structure to enhance yield of TMI interconnections
An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound. |
| US09613931B2 |
Fan-out stacked system in package (SIP) having dummy dies and methods of making the same
An embodiment package includes a first fan-out tier, fan-out redistribution layers (RDLs) over the first fan-out tier, and a second fan-out tier over the fan-out RDLs. The first fan-out tier includes one or more first device dies and a first molding compound extending along sidewalls of the one or more first device dies. The second fan-out tier includes one or more second device dies bonded to fan-out RDLs, a dummy die bonded to the fan-out RDLs, and a second molding compound extending along sidewalls of the one or more second device dies and the dummy die. The fan-out RDLs electrically connects the one or more first device dies to the one or more second device dies, and the dummy die is substantially free of any active devices. |
| US09613930B2 |
Semiconductor device and method for manufacturing a semiconductor device
A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip. |
| US09613929B2 |
Power semiconductor chip with a metallic moulded body for contacting thick wires or strips and method for the production thereof
The invention relates to a power semiconductor chip (10) having at least one upper-sided potential surface and contacting thick wires (50) or strips, comprising a connecting layer (I) on the potential surfaces, and at least one metal molded body (24, 25) on the connecting layer(s), the lower flat side thereof facing the potential surface being provided with a coating to be applied to the connecting layer (I) according to a connection method, and the material composition thereof and the thickness of the related thick wires (50) or strips arranged on the upper side of the molded body used according to the method for contacting are selected corresponding to the magnitude. |
| US09613922B2 |
Semiconductor device and manufacturing method thereof
Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8). |
| US09613920B2 |
Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias
A microelectronic package having a first bumpless build-up layer structure adjacent an active surface and sides of a microelectronic device and a second bumpless build-up layer structure adjacent a back surface of the microelectronic device, wherein conductive routes are formed through the first bumpless build-up layer from the microelectronic device active surface to conductive routes in the second bumpless build-up layer structure and wherein through-silicon vias adjacent the microelectronic device back surface and extending into the microelectronic device are electrically connected to the second bumpless build-up layer structure conductive routes. |
| US09613914B2 |
Post-passivation interconnect structure
A semiconductor device includes a passivation layer overlying a semiconductor substrate, and an interconnect structure overlying the passivation layer. The interconnect structure includes a landing pad region and a dummy region electrically separated from each other. A protective layer overlies the interconnect structure and includes a first opening exposing a portion of the landing pad region and a second opening exposing a portion of the dummy region. A metal layer is formed on the exposed portion of landing pad region and the exposed portion of the dummy region. A bump is formed on the metal layer overlying the landing pad region. |
| US09613912B2 |
Method of marking a semiconductor package
A method of making a semiconductor device can include providing a wafer comprising a plurality of semiconductor die, wherein each semiconductor die comprises an active surface and a backside opposite the active surface. A photosensitive layer can be formed over the wafer and on a backside of each of the plurality of semiconductor die within the wafer with a coating machine. An identifying mark can be formed within the photosensitive layer for each of the plurality of semiconductor die with a digital exposure machine and a developer, wherein a thickness of the identifying mark is less than or equal to 50 percent of a thickness of the photosensitive layer. The photosensitive layer can be cured. The wafer can be singulated into a plurality of semiconductor devices. |
| US09613911B2 |
Self-similar and fractal design for stretchable electronics
The present invention provides electronic circuits, devices and device components including one or more stretchable components, such as stretchable electrical interconnects, electrodes and/or semiconductor components. Stretchability of some of the present systems is achieved via a materials level integration of stretchable metallic or semiconducting structures with soft, elastomeric materials in a configuration allowing for elastic deformations to occur in a repeatable and well-defined way. The stretchable device geometries and hard-soft materials integration approaches of the invention provide a combination of advance electronic function and compliant mechanics supporting a broad range of device applications including sensing, actuation, power storage and communications. |
| US09613909B2 |
Methods and devices for metal filling processes
Metal filling processes for semiconductor devices and methods of fabricating semiconductor devices. One method includes, for instance: obtaining a wafer with at least one contact opening; depositing a metal alloy into at least a portion of the at least one contact opening; separating the metal alloy into a first metal layer and a second metal layer; depositing a barrier stack over the wafer; forming at least one trench opening; forming at least one via opening; and depositing at least one metal material into the trench openings and via openings. An intermediate semiconductor device is also disclosed. |
| US09613908B2 |
Ultra-thin dielectric diffusion barrier and etch stop layer for advanced interconnect applications
Implementations described herein generally relate to the formation of a silicon and aluminum containing layer. Methods described herein can include positioning a substrate in a process region of a process chamber; delivering a process gas to the process region, the process gas comprising an aluminum-containing gas and a silicon-containing gas; activating a reactant gas comprising a nitrogen-containing gas, a hydrogen containing gas, or combinations thereof; delivering the reactant gas to the process gas to create a deposition gas that deposits a silicon and aluminum containing layer on the substrate; and purging the process region. The above elements can be performed one or more times to deposit an etch stop stack. |
| US09613903B2 |
Fine line space resolution lithography structure for integrated circuit features using double patterning technology
A hard mask is disposed over a base material, and an I-shaped first opening is disposed in the hard mask. The first opening includes two parallel portions and a connecting portion interconnecting the two parallel portions. Spacers are formed on sidewalls of the first opening. The spacers fill an entirety of the connecting portion, wherein a center portion of each of the two parallel portions is unfilled by the spacers. The hard mask is etched to remove a portion of the hard mask and to form a second opening, wherein the second opening is between the two parallel portions of the first opening. The second opening is spaced apart from the two parallel portions of the first opening by the spacers. The first opening and the second opening are then extended down into the base material. |
| US09613900B2 |
Nanoscale interconnect structure
An interconnect structure includes a first dielectric material having an undercut region located at an upper surface thereof. A first conductive structure is located above a first area of the undercut region. The first conductive structure comprises a first conductive metal portion having a diffusion barrier portion located on one sidewall surface of the first conductive metal portion and having a metal liner located on another sidewall surface and a bottom surface of the first conductive metal portion. A second conductive structure is located above a second area of the undercut region. The second conductive structure comprises a second conductive material portion having a diffusion barrier portion located on one sidewall surface of the second conductive material portion and having a metal liner located on another sidewall surface and a bottom surface of the second conductive metal portion. A gap is located between the first and second conductive structures. |
| US09613899B1 |
Epitaxial semiconductor fuse for FinFET structure
On-chip, doped semiconductor fuses are formed in FinFET structures using epitaxial growth processes. Recesses are formed in selected portions of the fins following dummy gate removal. Semiconductor regions are grown within the recesses on exposed, opposing surfaces of the fins, merging to form an integral structure. Further epitaxial growth on the merged structure completes the semiconductor fuse. The semiconductor fuses are encapsulated by non-functional gate structures or by a dielectric fill. |
| US09613898B2 |
Raised e-fuse
A method of manufacturing a semiconductor device with a fuse is provided including the steps of providing a semiconductor-on-insulator (SOI) structure including an insulating layer and a semiconductor layer formed on the insulating layer, forming a first raised semiconductor region on the semiconductor layer and a second raised semiconductor region on the semiconductor layer adjacent to the first semiconductor region, and performing a silicidation process of the first and second raised semiconductor regions to form a first at least partially silicided raised semiconductor region with a first silicided portion and a second at least partially silicided raised semiconductor region with a second silicided portion. |
| US09613892B2 |
Solid state contactor with improved interconnect structure
A printed circuit board for selectively communicating power from a power source to a use has an input bus for receiving a power supply. A transistor is connected to the input bus and is positioned on one side of the input bus in a first direction. An output bus is connected to the transistor on an opposed side of the transistor relative to the input bus. The transistor is intermediate at the first input and output buses in the first dimension. A power supply system is also disclosed. |
| US09613887B2 |
Semiconductor system, device and structure
An Integrated Circuit device, including: a base wafer including single crystal, the base wafer including a plurality of first transistors; at least one metal layer providing interconnection between at least a portion of the plurality of first transistors; a second layer of less than 2 micron thickness, the second layer including a plurality of second transistors, the second layer overlying the at least one metal layer; and at least one conductive structure constructed to provide power to a portion of the second transistors, where the provide power is controlled by at least one of the transistors. |
| US09613882B2 |
Nanoparticle thermal interface agents for reducing thermal conductance resistance
A thermal interface material (TIM) using high thermal conductivity nano-particles, particularly ones with large aspect ratios, for enhancing thermal transport across boundary or interfacial layers that exist at bulk material interfaces is disclosed. At least one of the interfacial layers is a vertically aligned metal nanowire array. The nanoparticles do not need to be used in a fluid carrier or as filler material within a bonding adhesive to enhance thermal transport, but simply in a dry solid state. The nanoparticles may be equiaxed or acicular in shape with large aspect ratios like nanorods and nanowires. |
| US09613877B2 |
Semiconductor packages and methods for forming semiconductor package
Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package. |
| US09613876B2 |
Thin film transistor substrate including a channel length measuring pattern and display panel having the same
A thin film transistor (TFT) substrate includes a base substrate, a TFT disposed on the base substrate. The TFT includes a gate electrode, a semiconductor layer comprising a channel region, and a source electrode and a drain electrode spaced apart from one another by a length of the channel region. The TFT substrate further includes a gate insulating layer disposed between the gate electrode and the semiconductor layer and a measuring pattern configured to measure a length of the channel region. |
| US09613872B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes forming a first metal containing a first conductivity-type impurity above a substrate provided with a first conductivity-type impurity region containing the first conductivity-type impurity and a second conductivity-type impurity region containing a second conductivity-type impurity; and forming a metal silicide containing the first metal by selectively causing, by thermal treatment, a reaction between the first metal and silicon contained in the substrate in the first conductivity-type impurity region. |
| US09613864B2 |
Low capacitance interconnect structures and associated systems and methods
Semiconductor device interconnect structures having low capacitance and associated systems and methods are disclosed herein. In one embodiment, a method of manufacturing an interconnect structure includes forming an opening in a surface of a semiconductor device and forming an interconnect structure at least within the opening. Forming the interconnect structure includes depositing a first insulator material on both the surface and a sidewall of the opening, selectively removing a first portion of the first insulator material on the surface over a second portion of the first insulator material on the sidewall, depositing a second insulator material on the second portion, and depositing a conductive material on the second insulator material. The method further includes selecting the thickness of the first and second insulators materials based on a threshold level of capacitance between the sidewall and the conductive material. |
| US09613863B2 |
Method for forming electroless metal through via
A method of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface, includes providing a semiconductor substrate (wafer) and depositing poly-silicon on the substrate. The poly-silicon on the substrate surface is patterned by etching away unwanted portions. Then, Ni is selectively deposited on the poly-silicon by an electroless process. A via hole is made through the substrate, wherein the walls in the hole is subjected to the same processing as above. Cu is deposited on the Ni by a plating process. Line widths and spacings <10 μm are provided on both sides of the wafer. |
| US09613846B2 |
Pad design for electrostatic chuck surface
Embodiments are directed to an electrostatic chuck surface having minimum contact area features. More particularly, embodiments of the present invention provide an electrostatic chuck assembly having a pattern of raised, elongated surface features for providing reduced particle generation and reduced wear of substrates and chucking devices. |
| US09613842B2 |
Wafer handler and methods of manufacture
A wafer handler with a removable bow compensating layer and methods of manufacture is disclosed. The method includes forming at least one layer of stressed material on a front side of a wafer handler. The method further includes forming another stressed material on a backside of the wafer handler which counter balances the at least one layer of stressed material on the front side of the wafer handler, thereby decreasing an overall bow of the wafer handler. |
| US09613840B2 |
Apparatus and method for bonding substrates
This invention relates to a method and a device for temporary bonding of a first substrate with a second substrate. The device is comprised of a mounting apparatus for mounting of the first substrate on a mounting contour with an active mounting surface. The mounting apparatus has an outer ring section for controllable fixing of the first substrate. Deformation means are provided for controllable deformation of the first substrate. The deformation means act within the outer ring section. Bonding means are provided for bonding of the first substrate with the second substrate. |
| US09613839B2 |
Control of workpiece temperature via backside gas flow
A system and method for modulating and controlling the localized temperature of a workpiece during processing is disclosed. The system uses a platen having one or more walls, defining a plurality of discrete regions on the top surface of the platen. When a workpiece is disposed on the platen, a plurality of compartments is created, where each compartment is defined by the back side of the workpiece and a respective region of the platen. The pressure of back side gas in each of the compartments can be individually controlled. The pressure of back side gas determines the amount of heat that is transferred from the workpiece to the platen. By locally regulating the pressure of back side gas, different regions of the workpiece can be maintained at different temperatures. In some embodiments, a plurality of valves is used to control the flow rate to the compartments. |
| US09613838B2 |
Batch-type vertical substrate processing apparatus and substrate holder
A batch-type vertical substrate processing apparatus includes a processing chamber into which a substrate holder configured to stack and hold a plurality of target substrates in a height direction is inserted; and a plurality of flanges formed to protrude from an inner wall of the processing chamber toward an internal space of the processing chamber along a planar direction and configured to divide the interior of the processing chamber into a plurality of processing subspaces along the height direction, wherein the flanges include insertion holes through which the substrate holder is inserted, and diameters of the insertion holes are small at an upper side of the processing chamber and become gradually larger toward a lower side of the processing chamber. |
| US09613837B2 |
Substrate processing apparatus and maintenance method thereof
A substrate processing apparatus includes: a first processing chamber; a second processing chamber; a transfer chamber; a frame structure; and an elevating part. Each of the first and the second processing chamber has a main body part and a lid part. The transfer chamber is connected to the first and the second processing chamber and accommodates a transfer unit for transferring the substrate. The frame structure has a pair of column parts and a beam part supported at top portions of the column parts. The elevating part is coupled to the beam part to be moved in a horizontal direction and moves the lid part in the vertical direction. The beam part extends above the first and the second processing chamber and the transfer chamber. |
| US09613834B2 |
Replaceable upper chamber section of plasma processing apparatus
A replaceable upper chamber section of a plasma reaction chamber in which semiconductor substrates can be processed comprises a monolithic metal cylinder having a conical inner surface which is widest at a lower end thereof, an upper flange extending horizontally outward away from the conical inner surface and a lower flange extending horizontally away from the conical inner surface. The cylinder includes an upper annular vacuum sealing surface adapted to seal against a dielectric window of the plasma chamber and a lower annular vacuum sealing surface adapted to seal against a bottom section of the plasma chamber. A thermal mass at an upper portion of the cylinder is effective to provide azimuthal temperature uniformity of the conical inner surface. A thermal choke is located at a lower portion of the cylinder and is effective to minimize transfer of heat across the lower vacuum sealing surface. |
| US09613832B2 |
Mold release film and process for producing semiconductor package
A mold release film to be disposed on a cavity surface of a mold in a method for producing a semiconductor package wherein a semiconductor element is disposed in the mold and encapsulated with a curable resin to form a resin-encapsulation portion, characterized in that it has a first surface to be in contact with the curable resin at the time of forming the resin-encapsulation portion, and a second surface to be in contact with the cavity surface, at least one of the first surface and the second surface has irregularities formed thereon, and the surface having irregularities formed thereon, has an arithmetic mean roughness (Ra) of from 1.3 to 2.5 μm and a peak count (RPc) of from 80 to 200; and a process for producing a semiconductor package by using the mold release film. |
| US09613828B2 |
Method of laser annealing a semiconductor wafer with localized control of ambient oxygen
Laser annealing of a semiconductor wafers using a forming gas for localized control of ambient oxygen gas to reduce the amount of oxidization during laser annealing is disclosed. The forming gas includes hydrogen gas and an inert buffer gas such as nitrogen gas. The localized heating of the oxygen gas and the forming gas in the vicinity of the annealing location on the surface of the semiconductor wafer creates a localized region within which combustion of oxygen gas and hydrogen gas occurs to generate water vapor. This combustion reaction reduces the oxygen gas concentration within the localized region, thereby locally reducing the amount of ambient oxygen gas, which in turn reduces oxidation rate at the surface of the semiconductor wafer during the annealing process. |
| US09613826B2 |
Semiconductor process for treating metal gate
A semiconductor process for treating a metal gate includes the following steps. A metal gate including a main conductive material on a substrate is provided. A H2/N2 plasma treatment process is performed to reduce the main conductive material. |
| US09613821B2 |
Method of forming patterns and method of manufacturing integrated circuit device
Provided are a method of forming patterns and a method of manufacturing an integrated circuit device. In the method of forming patterns, a photoresist pattern having a first opening exposing a first region of a target layer is formed. A capping layer is formed at sidewalls of the photoresist pattern defining the first opening. An insoluble region is formed around the first opening by diffusing acid from the capping layer to the inside of the photoresist pattern. A second opening exposing a second region of the target layer is formed by removing a soluble region spaced apart from the first opening, with the insoluble region being interposed therebetween. The target layer is etched using the insoluble region as an etch mask. |
| US09613814B2 |
Metal adhesion
A solar cell has a metal contact formed to electrically contact a surface of semiconductor material forming a photovoltaic junction. The solar cell includes a surface region or regions of heavily doped material and the contact comprises a contact metallisation formed over the heavily doped regions to make contact thereto. Surface keying features are located in the semiconductor material into which the metallisation extends to assist in attachment of the metallisation to the semiconductor material. |
| US09613810B2 |
Silicon carbide semiconductor devices having nitrogen-doped interface
Methods, systems, and devices are disclosed for implementing high power circuits and semiconductor devices. In one aspect, a method for fabricating a silicon carbide semiconductor device includes forming a thin epitaxial layer of a nitrogen doped SiC material on a SiC epitaxial layer formed on a SiC substrate, and thermally growing an oxide layer to form an insulator material on the nitrogen doped SiC epitaxial layer, in which the thermally grown oxide layer results in at least partially consuming the nitrogen doped SiC epitaxial layer in the oxide layer to produce an interface including nitrogen between the SiC epitaxial layer and the oxide layer. |
| US09613808B1 |
Method of forming multilayer hard mask with treatment for removing impurities and forming dangling bonds
A method of forming a multilayer hard mask includes the following steps. An unpatterned multilayer hard mask is formed on a semiconductor substrate. The unpatterned multilayer hard mask includes a first hard mask layer formed on the semiconductor substrate and a second hard mask layer directly formed on the first hard mask layer. A treatment is performed on a top surface of the first hard mask layer before the step of forming the second hard mask layer, and the treatment is configured to remove impurities on the first hard mask layer and form dangling bonds on the top surface of the first hard mask layer. Defects related to the first hard mask layer and the second hard mask layer may be reduced, and the manufacturing yield may be enhanced accordingly. |
| US09613807B2 |
Methods for fabricating integrated circuits using directed self-assembly chemoepitaxy
Methods for directed self-assembly (DSA) using chemoepitaxy in the design and fabrication of integrated circuits are disclosed herein. An exemplary method includes forming an A or B-block attracting layer over a base semiconductor layer, forming a trench in the A or B-block attracting layer to expose a portion of the base semiconductor layer, and forming a neutral brush or mat or SAMs layer coating within the trench and over the base semiconductor layer. The method further includes forming a block copolymer layer over the neutral layer coating and over the A or B-block attracting layer and annealing the block copolymer layer to form a plurality of vertically-oriented, cylindrical structures within the block copolymer layer. |
| US09613801B2 |
Integration of absorption based heating bake methods into a photolithography track system
A method of patterning a layered substrate is provided that includes forming a layer of a block copolymer on a substrate, annealing the layer of the block copolymer to affect microphase segregation such that self-assembled domains are formed, and annealing the layer of the block copolymer a second time to refine or modify the microphase segregation, where one of the annealing steps uses an absorption based heating method. |
| US09613800B2 |
Methods of manufacturing semiconductor devices including an oxide layer
In a method of forming an oxide layer of a semiconductor process, a preliminary precursor flow is provided on a substrate in a deposition chamber to form a preliminary precursor layer, a precursor flow and a first oxidizing agent flow are provided on the preliminary precursor layer alternately and repeatedly to form precursor layers and first oxidizing agent layers alternately stacked on the preliminary precursor layer, and a second oxidizing agent flow is provided on the precursor layer or the first oxidizing agent layer alternately stacked to form a second oxidizing agent layer. |
| US09613798B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A technique includes forming a film containing a first element, a second element and carbon on a substrate by performing a cycle a predetermined number of times. The cycle includes non-simultaneously performing: forming a first layer containing the first element and carbon by supplying a precursor gas having a chemical bond of the first element and carbon from a first supply part to the substrate in a process chamber, and forming a second layer by supplying a reaction gas containing the second element from a second supply part to the substrate in the process chamber and supplying a plasma-excited inert gas from a third supply part to the substrate in the process chamber to modify the first layer, the third supply part being different from the second supply part. |
| US09613797B2 |
Cleaning device, peeling system, cleaning method and computer-readable storage medium
A cleaning method that peels off an overlapped substrate and cleans a bonding surface of a peeled substrate to be processed, the overlapped substrate including the substrate to be processed and a support substrate bonded together with a protectant, a peeling agent and an adhesive stacked in order therebetween from the substrate to be processed, the cleaning method comprising: removing the protectant by supplying a solvent of the protectant from a solvent supply part to the bonding surface of the substrate to be processed; and removing the peeling agent by absorbing the peeling agent, which has been peeled from the bonding surface of the substrate to be processed, using a peeling agent absorption part. |
| US09613795B2 |
Wafer processing method to remove crystal strains
A wafer is formed by slicing a single crystal ingot and removing crystal strains remaining in a peripheral portion of the wafer. In the crystal strain removing step, a laser beam having such a wavelength as to be transmitted through the wafer is applied to the wafer from one side of the wafer in positions located along the margin of the wafer and spaced a predetermined distance inward from the margin, to cause growth of fine holes and amorphous regions shielding the fine holes, over the range from one side to the other side of the wafer, whereby shield tunnels are formed in an annular pattern. Then, an external force is applied to the wafer along the shield tunnels so as to break the wafer in the region of the shield tunnels, thereby removing the peripheral wafer portion where the crystal strains are remaining. |
| US09613791B2 |
Calcium fluoride optical member, manufacturing method therefor, gas-holding container, and light source device
There is provided a calcium fluoride optical member formed from monocrystalline calcium fluoride and having a tubular shape. A {110} crystal plane or a {111} crystal plane of the monocrystalline calcium fluoride is orthogonal to a center axis of the tube. |
| US09613789B1 |
Compact dual ion composition instrument
A relatively compact dual ion composition instrument and associated methodology for measuring plasma and ion populations in a variety of interplanetary and planetary environments. The unitary device can measure mass and ionic charge state compositions and 3D velocity distributions of 10 eV/q to 40 keV/q plasma and pick-up ions; and (2) mass composition, energy spectra and angular distributions of 30 keV to 10 MeV energetic ions. |
| US09613788B2 |
RF ion guide with axial fields
RF ion guides are configured as an array of elongate electrodes arranged symmetrically about a central axis, to which RF voltages are applied. The RF electrodes include at least a portion of their length that is semi-transparent to electric fields. Auxiliary electrodes are then provided proximal to the RF electrodes distal to the ion guide axis, such that application of DC voltages to the auxiliary electrodes causes an auxiliary electric field to form between the auxiliary electrodes and the ion guide RF electrodes. A portion of this auxiliary electric field penetrates through the semi-transparent portions of the RF electrodes, such that the potentials within the ion guide are modified. The auxiliary electrode structures and voltages can be configured so that a potential gradient develops along the ion guide axis due to this field penetration, which provides an axial motive force for collision damped ions. |
| US09613787B2 |
Time-of-flight mass spectrometer for conducting high resolution mass analysis
A first mass analysis is executed in a condition that gas is not introduced into a loop-flight chamber (4), and a time-of-flight spectrum obtained in a data processor (12) is stored in a storage unit (13). Next, a second mass analysis is executed on the same sample as the one used in the first mass analysis in a condition that a valve (8) is opened and helium gas (He) is introduced into the loop-flight chamber (4), and the time-of-flight spectrum is obtained in the data processor (12). If different kinds of ions having the same m/z value exit, these ions form a single peak in the first time-of-flight spectrum, while these ions appear as separate peaks in the second time-of-flight spectrum even though they have the same m/z value. This is because, in the second mass analysis, the ions collide with the gas and have different times of flight depending on their difference in size. A spectrum comparator (14) judges a change in the position or shape of the peak by comparing the two spectra, and outputs information relating to the difference in the size of the ions (the molecular structure, charge state, or molecular class of the ions), and the like. Accordingly, a wider variety of information than ever before can be provided. |
| US09613776B2 |
Fuse holder and associated method
A holder for receiving fuses is provided. The holder includes a housing and a fuse shuttle. The fuse shuttle is slidably cooperable with the housing in a first portion of the housing and pivotally cooperable with the housing in a second portion of the housing. The fuse shuttle and the housing define a fuse loading position and a fuse operational position. |
| US09613774B2 |
Circuit breakers with common trip cams and related trip cams
Circuit breakers with handles have common trip cams with an integrated spring and trip cam base. The integrated spring directly contacts the armature in lieu of having the trip cam base formed to do so thereby allowing the use of alternative trip cam base configurations and materials from conventional relatively expensive materials. |
| US09613773B2 |
Electrical component and method for establishing contact with an electrical component
An electrical component includes at least one external contact having a first metallization and a second metallization. The metallizations are fired and the second metallization only partly covers the first metallization. Furthermore, an electrical component includes at least one frame-shaped metallization. Furthermore, an electrical component includes a first and second metallization that have a different wettability with solder material. |
| US09613771B2 |
Relay
Disclosed is a relay. The relay includes a first fixed contact connected to a power source, a second fixed contact separated from the first fixed contact, and connected to a load, and a moving contact configured to be brought into contact with or separated from the first fixed contact and the second fixed contact. The moving contact includes a first moving contact configured to be brought into contact with or separated from the first fixed contact and the second fixed contact and a second moving contact separated from the first moving contact, and configured to be brought into contact with or separated from the first fixed contact and the second fixed contact. Accordingly, the moving contact can be prevented from being separated from the fixed contact by an inter-electron repulsion. |
| US09613769B2 |
Vacuum interrupter for a circuit breaker arrangement
An exemplary vacuum interrupter for a circuit breaker arrangement including a cylindrically shaped insulating part, within which a pair of electrical contact parts are coaxially arranged and surrounded concentrically by the insulating part. The electrical contact parts can be configured to initiate a disconnection arc only between corresponding inner contact elements after starting a disconnection process, and corresponding outer contact elements can be configured to commutate the arc from the inner contact elements to the outer contact elements until the disconnection process is completed, wherein each inner electrical contact element is designed as a TMF-like contact element for generating mainly a transverse magnetic field, and each outer electrical contact element is designed as an AMF-like contact element for generating mainly an axial magnetic field. |
| US09613768B2 |
Single pushbutton control device for a plurality of switches
A switch control device includes at least one silicone dome (7) and at least one actuator (5) acting upon the at least one silicone dome (7), which is adapted to close and selectively open electric contacts of at least one switch (6). The actuator (5) is moved by a force exerted via a thrusting element (3). Between the thrusting element (3) and the at least one actuator (5) is at least one elastic element (4) adapted to be compressed by the thrusting element (3) as the at least one silicone dome (7) is compressed, and to extend as the at least one dome (7) collapses towards the switch (6). |
| US09613760B2 |
Energy storage device and methods for making and use
An electrode in an energy storage device, including: an activated carbon, including: a surface area of from 1000 to 1700 m2/g; a pore volume from 0.3 to 0.6 cc/g; a chemically bonded oxygen content of 0.01 to 1.5 wt %; and a pH of from 7.5 to 10. Also disclosed is a method of making the activated carbon, the electrode, and the energy storage device. |
| US09613758B2 |
Fabrication and application of polymer-graphitic material nanocomposites and hybride materials
The present invention describes a nanocomposite and hybride material of functionalized carbon nanotubes and cellulose and associated methods for the fabrication of that nanocomposite or hybride material containing electromagnetically active nanoparticles. The fabrication is fast, environmentally friendly, and economical. These nanocomposites are strong and electrically conducting, and have many materials and electronic applications. |
| US09613755B2 |
Multi layer ceramic capacitor, embedded board using multi layer ceramic capacitor and manufacturing method thereof
A multilayer ceramic capacitor includes a multilayer ceramic sintering body and one or two or more internal electrode units formed to be placed inside the multilayer ceramic sintering body. Each internal electrode unit includes first internal electrodes formed in the multilayer ceramic sintering body in such a way to be spaced apart from each other, one or more of both ends of one side of each of the first internal electrodes being formed to be exposed to the top or bottom surface of the multilayer ceramic sintering body, and second internal electrodes placed between the first internal electrodes, respectively, and formed in the multilayer ceramic sintering body in such a way to be spaced apart from each other, one or more of both ends of the other side of each of the second internal electrodes being formed to be exposed to the top or bottom surface of the sintering body. |
| US09613747B2 |
System and method for efficient data communication and wireless power transfer coexistence
This disclosure provides systems, methods and apparatus for receiving power wirelessly. In one aspect, a receiver comprises an antenna that receives power wirelessly. The receiver further comprises a power circuit that operates according to a first frequency. The receiver further comprises a communication circuit that operates according to a second frequency. The receiver further comprises a circuit coupled between the antenna and the power circuit and the antenna and the communication circuit. The circuit comprises a first resonant network and a second resonant network. The circuit comprises a first path between the antenna and the power circuit via the first resonant network and a second path between the antenna and the communication circuit via the second resonant network. The first path has a higher impedance than the second path at the second frequency and has a lower impedance than the second path at the first frequency. |
| US09613745B2 |
Adjustable integrated combined common mode and differential mode three phase inductors and methods of manufacture and use thereof
In some embodiments, the instant invention can provide an electrical system that at least includes the following: a three-phase inductor, having: a core, having: at least one first core segment, having a first shape; at least one second core segment, having a second shape; at least one third core segment, having a third shape; where the at least one first core segment, the at least one second core segment, and the at least one third core segment are configured to be: separate from each other and adjustable relative to each other; and where the core is configured so that differential mode inductance flux paths during the operation of the three-phase inductor depend on the first shape of the at least one first core segment, the second shape of the at least one second core segment, and the third shape of the at least one third core segment. |
| US09613740B2 |
Electric apparatus with moving magnetic field generating apparatus
A moving magnetic field generating apparatus includes a magnet array including magnets disposed at a first pitch such that N and S poles of adjacent magnets in the magnet array are alternated, and first and second magnetic pole piece arrays extending along the magnet array to interpose the magnet array therebetween with a gap from the magnet array. The first and second magnetic pole piece arrays are disposed with a predetermined phase difference therebetween. The first magnetic pole piece array includes first magnetic pole pieces disposed at a second pitch in an array and each having a length enough to face at least two adjacent magnets in the magnet array. The second magnetic pole piece array is configured similarly to the first magnetic pole piece array. One of the first and second magnetic pole piece arrays and the magnet array is relatively moved to the other at a predetermined speed. |
| US09613738B2 |
Magnet
The present invention relates to a magnet, which comprises a body and a slide arranged to be movable relative to the body between a first and a second position. The slide comprises a permanent magnet, and a cylindrical first pole piece and a second pole piece, which are attached to opposite magnetic pole surfaces of the permanent magnet. The body comprises a first and a second section made of magnetic material and being separated from each other by a third section that is made of non-magnetic material. The first section comprises a cylindrical recess into which the slide is movably arranged so that, at the first position of the slide, the cylindrical first pole piece, the permanent magnet and at least part of the second pole piece are located inside the cylindrical recess, and at the second position of the slide, at least part of the cylindrical first pole piece is located inside the cylindrical recess and the second pole piece is located outside the cylindrical recess. |
| US09613736B1 |
Positive temperature coefficient circuit protection chip device
A method of making a PTC protection chip device includes: preparing an assembly of a PTC polymer material, a spacer unit, and first and second electrode sheets of a metal-plated copper foil, the PTC polymer material and the spacer unit of the assembly being sandwiched between and cooperating with the first and second electrode sheets to form a stack; subjecting the stack to a hot pressing process, so that the first and second electrode sheets contact and are pressed against the PTC polymer material and the spacer unit and so that the PTC polymer material is bonded to and cooperates with the first and second electrode sheets to form a PTC laminate; and cutting the PTC laminate so as to form the PTC circuit protection chip device. |
| US09613731B2 |
Cable having electrical shielding and seal
The invention relates to a cable (1) having at least one electrical line (2), the electrical line (2) being surrounded by an electrically conductive sheath (5), the sheath (5) being formed from an electrically conductive and resilient sealing material. |
| US09613730B2 |
Cable branch structure
A cable branch structure (1) branches, from a main line (30A) to branch lines (30B, 30C), a shielded cable (30) with electric wires (10) covered with a braided wire (20). The braided wire (20) includes: a main line side braided wire (20A) constituting a part corresponding to the main line (30A); and branch line side braided wires (20B, 20C), respectively, constituting parts corresponding to the respective branch lines (30B, 30C). The braided wire (20) includes at least one of a first mounting portion (100; 110) provided at an end portion of the main line side braided wire (20A) for mounting end portions of the branch line side braided wires (20B, 20C) and second mounting portions (100; 120, 130) provided at each of the end portions of the branch line side braided wires (20B, 20C) for mounting the end portion of the main line side braided wire (20A). |
| US09613729B2 |
Mechanical design of multiple zone plates precision alignment apparatus for hard X-ray focusing in twenty-nanometer scale
An enhanced mechanical design of multiple zone plates precision alignment apparatus for hard x-ray focusing in a twenty-nanometer scale is provided. The precision alignment apparatus includes a zone plate alignment base frame; a plurality of zone plates; and a plurality of zone plate holders, each said zone plate holder for mounting and aligning a respective zone plate for hard x-ray focusing. At least one respective positioning stage drives and positions each respective zone plate holder. Each respective positioning stage is mounted on the zone plate alignment base frame. A respective linkage component connects each respective positioning stage and the respective zone plate holder. The zone plate alignment base frame, each zone plate holder and each linkage component is formed of a selected material for providing thermal expansion stability and positioning stability for the precision alignment apparatus. |
| US09613725B2 |
Neutron detection apparatus
A neutron detector detects a neutron flux distribution of the inside of a reactor. The neutron detector includes a thimble guide tube that is inserted inside of the reactor, for inserting the neutron detector. A drive apparatus is connected to the thimble guide tube for inserting or extracting the neutron detector into or out of the thimble guide tube. A vacuum unit controls the vacuum state in the thimble guide tube. A supply unit supplies carbon dioxide gas. A gas purge unit is connected to the supply unit and conducts gas purge in the thimble guide tube. A gate valve is provided between the thimble guide tube and the drive apparatus, and performs an open/close operation. A control apparatus controls the gate valve, the drive apparatus, the vacuum unit, the supply unit, and the gas purge unit. |
| US09613714B1 |
One time programming memory cell and memory array for physically unclonable function technology and associated random code generating method
A one time programming memory cell includes a selecting circuit, a first antifuse storing circuit and a second antifuse storing circuit. The selecting circuit is connected with a bit line and a word line. The first antifuse storing circuit is connected between a first antifuse control line and the selecting circuit. The second antifuse storing circuit is connected between a second antifuse control line and the selecting circuit. |
| US09613713B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes: first and second memory cells; first and second word lines coupled to the first and second memory cells, respectively. When data is read from the first memory cell, first and second voltages are applied to the first word line. A voltage of the second word line varies continuously by a first potential difference with time while the first voltage is applied to the first word line, and the voltage of the first word line varies continuously by a second potential difference with time while the second voltage is applied to the first word line. |
| US09613712B1 |
Negative voltage management module for an address decoder circuit of a non-volatile memory device
An address decoder circuit is designed to address and bias memory cells of a memory array of a non-volatile memory device. The address decoder circuit includes a charge-pump stage configured to generate a boosted negative voltage. A control stage is operatively coupled to the charge-pump stage for controlling switching on/off thereof as a function of a configuration signal that determines the value of the boosted negative voltage. A decoding stage is configured so as to decode address signals received at its input and generate biasing signals for addressing and biasing the memory cells. A negative voltage management module has a regulator stage, designed to receive the boosted negative voltage from the charge-pump stage and generate a regulated negative voltage for the decoding stage, having a lower ripple as compared to the boosted negative voltage generated by the charge-pump stage. |
| US09613711B2 |
Storage device and method of reading a storage device in which reliability verification operation is selectively omitted
A method controlling the execution of a reliability verification operation in a storage device including a nonvolatile memory device includes; determining whether a read count for a designated unit within the nonvolatile memory device exceeds a count value limit, and upon determining that the read count exceeds the count value limit, executing the reliability verification operation directed to the designated unit, wherein the count value limit is based on at least one of read count information, page bitmap information and environment information stored in the storage device. |
| US09613710B2 |
Multiple-time programmable memory
A multiple-time programmable (MTP) structure is provided that can operate using a power supply with a supply voltage of 1.5 V to 5.5 V. When the supply voltage is above a first voltage, a first circuit is configured to induce a second constant voltage at a drain of a second transistor, and to induce the second constant voltage on a terminal in a third circuit. In some embodiments, the third circuit provides a third constant voltage on a gate of a third transistor. When the supply voltage is below the first voltage, a fifth circuit is configured to induce a fourth constant voltage on a terminal in the third circuit. The fourth constant voltage is substantially equal to the second constant voltage. |
| US09613706B2 |
Programming and/or erasing a memory device in response to its program and/or erase history
A method includes sending a number of program/erase cycles from a memory of control logic of a memory device to a counter of the control logic, where the number of program/erase cycles has been previously applied to one or more memory cells of an array of memory cells of the memory device, using the counter to increment the number of program/erase cycles each time an additional program/erase cycle is applied to the one or more memory cells, using compare logic of the control logic to compare the incremented number of program/erase cycles to a numerical value, and using starting-voltage level control logic of the control logic to adjust a program starting voltage level and/or an erase starting voltage level based on the comparison of the incremented number of program/erase cycles to the numerical value. |
| US09613705B1 |
Method for managing programming mode of rewritable non-volatile memory module, and memory storage device and memory control circuit unit using the same
In an exemplary embodiment, the method includes: determining whether a used capacity of first physical units initially configured to be programmed based on a first programming mode reaches a preset capacity and whether specific data stored in the first physical units matches a preset condition; and if the used capacity of the first physical units reaches the preset capacity and the specific data stored in the first physical units matches the preset condition, selecting at least one physical unit from second physical units initially configured to be programmed based on a second programming mode, and programming the selected physical unit based on the first programming mode. Accordingly, the writing speed decreased by the fully written buffer area may be improved. |
| US09613701B2 |
Ternary content addressable memory (TCAM) with programmable resistive elements
A content addressable memory device includes a first memory cell having three programmable resistive elements coupled in parallel. The first terminals of the first, second, and third programmable resistive elements are coupled to a first node, the second terminal of the first programmable resistive element coupled to a first source line voltage, the second terminal of the second programmable resistive element coupled to a second source line voltage, and the second terminal of the third programmable resistive element coupled to a first supply voltage. A first access transistor includes a first current electrode coupled to a bit line; a second current electrode coupled to the first node, and a control electrode coupled to a word line. A match line transistor includes a first current electrode coupled to a match line; a second current electrode coupled to a second supply voltage and a control electrode coupled to the first node. |
| US09613695B2 |
Methods, devices and systems using over-reset state in a memory cell
Memory cells, devices and methods are disclosed, including those that involve applying a waveform to a resistive memory cell to program the memory cell to an over-reset state representing a logic value. |
| US09613687B2 |
Memory, memory controller, memory system, method of memory, memory controller and memory system
In one embodiment, the method includes performing a read operation on a memory, and determining, by a memory controller, whether to perform a reliability verification read operation based on a count value and a reference value. The count value is based on a number of read commands issued by the memory controller to the memory, and the reliability verification read operation is for reading data from at least one memory cell associated with at least one unselected word line in the memory. An unselected word line is a word line not selected during the read operation. The method further includes performing the reliability verification read operation for the at least one unselected word line based on the determining. |
| US09613684B2 |
Systems and methods involving propagating read and write address and data through multi-bank memory circuitry
Multi-bank SRAM devices, systems, methods of operating multi-bank SRAMs, and/or methods of fabricating multi-bank SRAM systems are disclosed. For example, illustrative multi-bank SRAMs and methods may include or involve features for capturing read and write addresses at a particular frequency, splitting and/or combining them via one or more splitting/combining processes, and bussing them to each SRAM bank, where they may be split and/or combined via one or more splitting/combining processes to read and write to a particular bank. Some implementations herein may also involve features for capturing two beats of write data at a particular frequency, splitting and/or combining them via one or more splitting/combining processes, and bussing them to each SRAM bank, where they may be split and/or combined via one or more splitting/combining processes for writing to a particular bank. Reading and writing to banks may occur at less than or equal to half the frequency of capture. |
| US09613682B2 |
FinFET 6T SRAM cell structure
A static memory circuit includes a pull-up transistor, a pull-down transistor, a pass-gate transistor associated with the pull-up and pull-down transistors, and first and second word lines electrically insulated from each other. The pass-gate transistor includes a number of Fins and a gate electrode having a number of first and second gates, each one of the gates is disposed on one of the Fins, the first gates are connected to the first word line, and the second gates are connected to the second word line. During a read operation, one of the first and second word lines is asserted low, so that the beta ratio is greater than or equal to a first predetermined value. During a write operation, one of the first and second word lines is asserted high; so that a gamma ratio is greater than or equal to a second predetermined value. |
| US09613677B1 |
Semiconductor devices and semiconductor systems including the same
A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs an external command and external addresses. The second semiconductor device generates an internal active command in response to the external command, generates active addresses in response to the external addresses, generates a refresh signal and refresh addresses in response to the internal active command, performs an internal operation in response to the internal active command and the active addresses, and performs a refresh operation in response to the refresh signal and the refresh addresses. |
| US09613675B2 |
System and method to perform low power memory operations
A method includes performing a memory operation at a magnetic tunnel junction (MTJ) storage element by, during a single memory clock cycle, reading a first value stored at the MTJ storage element, comparing the first value to a second value to be stored at the MTJ storage element, and selectively writing the second value to the MTJ storage element based on the comparison. |
| US09613672B2 |
Differential current sensing scheme for magnetic random access memory
A circuit includes first and second reference cells and a current sense amplifier. The first and second reference cells are configured to store opposite logic values, respectively. The current sense amplifier is configured with a first node and a second node for currents therethrough to be compared with each other. The current sense amplifier includes a multiplexer configured to couple the first reference cell or the second reference cell to the first node of the current sense amplifier, and couple the second reference cell or the first reference cell to the second node of the current sense amplifier for reading bits stored in the first reference cell and the second reference cell. |
| US09613671B2 |
Nonvolatile random access memory including control circuit configured to receive commands at high and low edges of one clock cycle
According to one embodiment, a memory includes a memory cell array with banks, each bank including rows, a first word lines provided in corresponding to the rows, an address latch circuit which latches a first row address signal, a row decoder which activates one of the first word lines, and a control circuit which is configured to execute a first operation which activates one of the banks based on a bank address signal when a first command is loaded, and a second operation which latches the first row address signal in the address latch circuit, and execute a third operation which activates one of the first word lines by the row decoder based on a second row address signal and the first row address signal latched in the address latch circuit when a second command is loaded after the first command. |
| US09613670B2 |
Memory systems and methods involving high speed local address circuitry
Systems and methods of memory and memory operation are disclosed, such as providing a circuit including a local address driver voltage source for memory decoding. In one exemplary implementation, an illustrative circuit may comprise a first buffer and a capacitor. The first buffer may comprise a power input and a ground input. The capacitor may comprise a first terminal connected to the power input of the first buffer and a second terminal connected to the ground input of the first buffer. When the first buffer draws a current from the power input, at least a portion of the current may be supplied by the capacitor. |
| US09613669B2 |
Matrix transposing circuit
The disclosure provides a matrix transposing circuit for outputting a transposed N×N matrix. The matrix transposing circuit includes: an input resister array with m×N array; a memory having b storage blocks; an output register array with N×m array. N, m, n, b are integer in power of 2, N can be completely divided by m and n, and N=n×m×b. The matrix is divided into multiple sub-matrixes with m×n array to form Y matrix. Each of sub-matrixes is correspondingly stored to the b storage blocks. The input resister array has a first shifting direction to receive entry data and a second shifting direction to output data to the b storage blocks. The output resister array has a first shifting direction to read data from the b storage blocks and a second shifting direction to output the transposed matrix. |
| US09613667B2 |
Data storage device and operating method thereof
A data storage device includes a memory device suitable to perform an internal operation; a processor suitable to generate command generation information to command performance of the internal operation; and a command set processing block suitable to generate a command set, which is provided to the memory device, based on the command generation information, wherein the command set processing block generates a final sequence which configures a pattern included in the command set. |
| US09613666B1 |
Semiconductor devices and semiconductor systems including the same
A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs command/address signals and a plurality of data. The second semiconductor device generates a first mode signal and a second mode signal according to a combination of the command/address signals. The second semiconductor device is suitable for inverting the plurality of data inputted through a pad in response to the first or the second mode signal to store the inverted data suitable for blocking input of the inverted data in response to the second mode signal if a number of bits having a predetermined level in the plurality of data is equal to or greater than a predetermined number. |
| US09613659B2 |
Generating custom audio content for an exercise session
System, apparatuses, and methods can provide customized exercise sessions and customized videos corresponding to the exercise session. Audio clips can be dynamically selected to make custom audio content for an exercise session. The audio clips and metadata can be obtained, where the audio clips correspond to categories. The exercise session can include one or more components. A destination timeline for a component can include one or more first segments that require audio, and one or more second segments that can optionally have audio. Audio clips can be selected for the various segments, where a segment can be designated for a particular category of audio clips. Identification information for the selected audio clips can be saved and used to generate the custom audio content. |
| US09613658B2 |
Contamination reduction head for media
A cleaning head and methods for removing contaminants from a data storage media, the cleaning head having a cleaning surface comprising a self-assembled monolayer, with the cleaning surface leading a read/write transducer. The self-assembled monolayer is selected to have a terminal functional group that has a high affinity to the contaminant(s) desired to be attracted and/or removed. |
| US09613656B2 |
Scalable storage protection
The disclosure is directed to protecting data of a scalable storage system. A scalable storage system includes a plurality of nodes, each of the nodes having directly-attached storage (DAS), such as one or more hard-disk drives and/or solid-state disk drives. The nodes are coupled via an inter-node communication network, and a substantial entirety of the DAS is globally accessible by each of the nodes. The DAS is protected utilizing intra-node protection to keep data stored in the DAS reliable and globally accessible in presence of a failure within one of the nodes. The DAS is further protected utilizing inter-node protection to keep data stored in the DAS reliable and globally accessible if at least one of the nodes fails. |
| US09613654B2 |
Soundtrack for electronic text
A soundtrack creation method and user playback system for soundtracks synchronized to electronic text. Synchronization is achieved by maintaining a reading speed variable indicative of the user's reading speed. The system provides for multiple channels of audio to enable concurrent playback of two or more partially or entirely overlapping audio regions so as to create an audio output having, for example, sound effects, ambience, music or other audio features that are triggered to playback at specific portions in the electronic text to enhance the reading experience. |
| US09613652B2 |
Phase error recovery circuitry and method for a magnetic recording device
A recording head is configured to write and read data sectors to and from a recording medium, such as a heat-assisted recording medium. A read channel is coupled to the recording head. Phase-locked loop (PLL) circuitry of the read channel is configured to detect a change in a phase error at a location of the data sector. The phase error change may be indicative of a mode-hop that occurred while writing the data sector to the medium. The PLL circuitry is configured to determine a phase offset using the phase error. A controller is configured to effect re-reading of the data sector location using the phase offset to recover the data sector location. |
| US09613651B1 |
Bearing apparatus, spindle motor, and disk drive apparatus
This bearing apparatus includes a shaft portion, a sleeve portion, and a fluid arranged between the shaft portion and the sleeve portion. A thrust dynamic pressure portion is filled with the fluid, and a surface of the fluid is defined in a seal portion. The thrust dynamic pressure portion includes a dynamic pressure generation portion including thrust dynamic pressure grooves, an intermediate portion arranged outside of the dynamic pressure generation portion and including an annular groove in the shape of a circular ring, and a discharge portion arranged outside of the annular groove and including discharge grooves. The annular groove is arranged to have a depth smaller than a minimum radial width of the seal portion. This makes it easier for any air bubble in the thrust dynamic pressure portion to travel into the seal portion in accordance with a flow of the fluid caused in the discharge portion to be discharged outward. This reduces the likelihood that any air bubble will stay in the vicinity of the dynamic pressure generation portion. |
| US09613650B2 |
Spindle motor, disk drive apparatus, and method of manufacturing base unit of spindle motor
A method of manufacturing a base unit of a spindle motor includes the steps of: defining a base plate including a support fitting portion; fitting a support to a hole portion passing through the support fitting portion; measuring an inclination of the support fitting portion; calculating a laser irradiation area and a laser irradiation output based on the inclination; irradiating the support fitting portion with a laser beam; and measuring the inclination of the support fitting portion again. The base plate is made of a metal, and is defined by press working, casting, or forging. The support is fitted to the hole portion by crimping, press fitting, or welding. This method reduces the inclination of the support fitting portion, thereby reducing a distortion of the support, which serves as a rotation center of an access portion. |
| US09613648B2 |
Aluminum alloy plate for magnetic disc substrate, method for manufacturing same, and method for manufacturing magnetic disc
An aluminum alloy plate for a magnetic disk substrate with a flat and smooth ground surface, a production method by which the aluminum alloy plate can be produced at low cost and a magnetic disk are shown. An aluminum alloy plate for a magnetic disk substrate which comprises an aluminum alloy containing Mg: 3.0 to 8.0 mass % (hereinafter %), Cu: 0.005 to 0.150%, Zn: 0.05 to 0.60%, Cr: 0.010 to 0.300%, Fe: 0.001 to 0.030%, Si: 0.001 to 0.030%, (Ti+V+Zr): 0.0010 to 0.0100%, B: 0.0001 to 0.0010% with a balance being Al and inevitable impurities, wherein the density of a Ti—V—B—Zr-based inclusion having a maximum diameter exceeding 5 μm is 0 piece/6000 mm2 and the density of a Ti—V—B—Zr-based inclusion having a maximum diameter of 3 to 5 μm is 1 piece/6000 mm2 or less; a production method thereof; and a method for producing a magnetic disk. |
| US09613640B1 |
Speech/music discrimination
A speech/music discrimination method evaluates the standard deviation between envelope peaks, loudness ratio, and smoothed energy difference. The envelope is searched for peaks above a threshold. The standard deviations of the separations between peaks are calculated. Decreased standard deviation is indicative of speech, higher standard deviation is indicative of non-speech. The ratio between minimum and maximum loudness in recent input signal data frames is calculated. If this ratio corresponds to the dynamic range characteristic of speech, it is another indication that the input signal is speech content. Smoothed energies of the frames from the left and right input channels are computed and compared. Similar (e.g., highly correlated) left and right channel smoothed energies is indicative of speech. Dissimilar (e.g., un-correlated content) left and right channel smoothed energies is indicative of non-speech material. The results of the three tests are compared to make a speech/music decision. |
| US09613639B2 |
Communication system and terminal device
A communication system according to the present invention includes a plurality of terminal devices that are able to communicate mutually. Each of the terminal devices includes a voice input conversion device, a voice transmitting device, a voice receiving device, and a voice reproducing device. When there is a plurality of voice signals which has not been completed reproduction, the voice reproducing device reproduces after arranging the voice signals so that respective voices corresponding to the respective voice signals do not overlap. |
| US09613637B2 |
Driving support device
A driving support device for a vehicle uses a right speaker and a left speaker for providing audio information useful for driving to the right ear and left ear of a driver. Among the audio information useful for driving, speech guidance with the use of a voice is provided exclusively from the right speaker to the right ear of the driver. |
| US09613636B2 |
Speaker association with a visual representation of spoken content
Speaker content generated in an audio conference is selectively visually represented. A profile for each audience member who listen to an audio conference is obtained. Speaker content from audio conference participants who speak in the audio conference is monitored. The speaker content from each of the audio conference participants is analyzed. Based on the analyzing and on the profiles for each of the plurality of audience members, visual representations of the speaker content to present to the audience members are identified. Visual representations of the speaker content are generated based on the analyzing. Different visual representations of the speaker content are presented to different audience members based on the analyzing and identifying. |
| US09613632B2 |
Signal processing device, signal processing method and signal processing program
To achieve sufficient noise cancellation when a reference signal cannot be captured in the proximity of a noise source.The present invention is characterized by comprising: a first input means for obtaining a first mixed signal in which a first signal and a second signal are mixed; a second input means for obtaining a second mixed signal in which the first signal and the second signal are mixed in a different ratio from the first mixed signal; a delay means for generating a delayed first mixed signal by delaying the first mixed signal with a delay amount based on transmission distance from a generation source of the second signal to the second input means; a subtracting means for outputting an estimated first signal in which a pseudo second signal is subtracted from the delayed first mixed signal; and an adaptive filtering means for generating the pseudo second signal applying coefficients which are updated based on the estimated first signal to the second mixed signal. |
| US09613631B2 |
Noise suppression system, method and program
Disclosed is a noise suppression system including a unit for calculating a noise mean spectrum from an input signal, a unit for deriving the provisional estimate speech from the input signal and the noise mean spectrum, a reference speech pattern, and a unit for correcting the provisional estimate speech using the reference pattern. |
| US09613630B2 |
Apparatus for processing a signal and method thereof for determining an LPC coding degree based on reduction of a value of LPC residual
An apparatus for processing a signal and method thereof are disclosed. The present invention includes receiving coding mode information indicating a speech coding scheme or an audio coding scheme, linear prediction coding degree information indicating a linear prediction coding degree, and the signal including at least one of a speech signal and an audio signal; decoding the signal according to the speech coding scheme or the audio coding scheme based on the coding mode information; decoding linear prediction coding coefficients of the signal based on the linear prediction coding degree information; and generating an output signal by applying the decoded linear prediction coding coefficients to the decoded signal. In this case, the linear prediction coding degree information is determined based on a variation of a value of an LPC residual generated from performing the linear prediction coding on the signal. It further determines whether or not the said residual decreases by an increase in the linear prediction coding degree, and it determines an appropriate LPC coding degree in each case. |
| US09613626B2 |
Audio device for recognizing key phrases and method thereof
An audio device and a method thereof are provided. The method is adopted by an audio device to detect a voice, wherein the audio device is coupled to a host device. The method includes an acoustic conversion circuit converting an acoustic wave into an analog audio signal; an analog-to-digital converter (ADC) converting the analog audio signal into digital audio data; a first-level voice detection circuit detecting voice activity in the analog audio signal; a second-level voice detection circuit detecting a beginning syllable of a key phrase in the digital audio data when the voice activity is detected in the digital audio data; and a third-level voice detection circuit detecting the key phrase from the digital audio data only when the beginning syllable of the key phrase is detected in the digital audio data. |
| US09613625B2 |
Data input device, data input method, storage medium, and in-vehicle apparatus
A dynamic speech recognition dictionary generating unit extracts, from phrases stored in a speech recognition dictionary, phrases of which heads match a head of a character string inputted through a character string input unit and generates a dynamic speech recognition dictionary that stores difference phrases that are each part of an extracted phrase excluding a common phrase that is common among the extracted phrases. A speech recognition unit carries out recognition of a user utterance by using the dynamic speech recognition dictionary. An input character string confirming unit confirms an input character string candidate that includes a recognized difference phrase as an input character string. |
| US09613621B2 |
Speech recognition method and electronic apparatus
A speech recognition method and an electronic apparatus are provided. The speech recognition method includes the following steps. A plurality of phonetic transcriptions of a speech signal is obtained according to an acoustic model. A phonetic spelling and intonation information matched to the phonetic transcriptions are obtained according to a phonetic transcription sequence and a syllable acoustic lexicon of the invention. According to the phonetic spellings and the intonation information, a plurality of phonetic spelling sequences and a plurality of phonetic spelling sequence probabilities are obtained from a language model. The phonetic spelling sequence corresponding to a largest one among the phonetic spelling sequence probabilities is selected as a recognition result of the speech signal. |
| US09613619B2 |
Predicting recognition quality of a phrase in automatic speech recognition systems
A method for predicting a speech recognition quality of a phrase comprising at least one word includes: receiving, on a computer system including a processor and memory storing instructions, the phrase; computing, on the computer system, a set of features comprising one or more features corresponding to the phrase; providing the phrase to a prediction model on the computer system and receiving a predicted recognition quality value based on the set of features; and returning the predicted recognition quality value. |
| US09613617B1 |
Auditory eigenfunction systems and methods
An “auditory eigenfunction” approach is provided for auditory language design, implementation, and rendering optimized for human auditory perception. The auditory eigenfunctions employed approximate solutions to an eigenfunction equation representing a model of human hearing, wherein the model comprises a frequency domain bandpass operation with a approximating the frequency range of human hearing and a time-limiting operation in the time domain approximating the time duration correlation window of human hearing. The method can be used to implement entirely new auditory languages, or modification to existing auditory languages, which are in various ways performance optimized for human auditory perception, either with or without the constraints of human vocal-tract rendering. The method can also be used, for example, to implement traditional speech synthesis, and can be useful in speech synthesis involving rapid phoneme production. The method could also be used to implement various other types of user machine interfaces. |
| US09613615B2 |
Noise cancellation system, headset and electronic device
The present invention relates to a noise cancellation system, a headset and an electronic device. The noise cancellation system may include a loudspeaker, a first microphone, a second microphone, a housing and a processing unit. The housing may be mounted at an ear of a user, wherein the loudspeaker, the first microphone and the second microphone are installed in the housing. The processing unit may be coupled to the loudspeaker, the first microphone and the second microphone, and may be configured to generate a noise cancelling signal based on at least one of a first audio signal from the first microphone or a second audio signal from the second microphone, wherein the noise cancelling signal, when being output via the loudspeaker, at least partially compensates for environmental noise in the ear of the user. |
| US09613611B2 |
Method and apparatus for noise cancellation in a wireless mobile device using an external headset
A method, system, and apparatus for noise cancelation is disclosed herein, which may be used in a wireless unit (WU) and a headset removably connected to the WU. The WU may include a processor, a memory, a user interface, internal microphones and internal speakers. The headset may include microphones and speakers, and be powered by the WU. The WU may receive an ambient noise at microphone(s), including a headset microphone, which may generate a signal based on the ambient noise. The WU processor may then calculate an estimate of the ambient noise based on the signal, calculate an inverse of the estimated ambient noise based on the estimate of the ambient noise, cancel the estimated ambient noise from an audio output signal based on the application of the inverse of the estimated ambient noise, and send the audio output signal to the speakers of the headset or the WU. |
| US09613608B2 |
Keyboard unit
A keyboard unit includes: a key; a plurality of members which include the key, and each of which has an engaged section for forming an engaged state, the engaged state changed by turning of the key, at least a portion of the engaged section formed of a conductor; a detector which is configured to detect information on the engaged state of the plurality of members by detecting a conduction state between the at least portions of the engaged sections which are in contact with each other; and a determiner which is configured to determine a musical sound parameter based on a detection result of the detector. |
| US09613607B2 |
Keyboard unit
A keyboard unit includes: a key; a displacement member driven directly or indirectly with the key by a pressing operation to be moved; object detection sections including: detection sections, states of which become state change detection state when detecting changes instates of the key and the displacement member; and a generator, in a case that states of all the object detection sections become the state change detection state in the forward stroke of a key pressing operation, obtaining detection results of at least two sets of the detection sections, each set including two object detection sections, selecting at least one of the obtained detection results of the at least two sets of the detection sections, and generating sound generation indication information based on the selected at least one of the detection results. |
| US09613600B2 |
Constant tension device
A support is configured to support and apply a constant or near-constant tension onto a wire or string, such as a musical string of a stringed musical instrument. The wire is attached to a carrier that moves axially. One or more springs operate between the carrier and a point that is fixed relative to the carrier and apply a transverse spring force to the carrier. A spring angle is defined between a line normal to the axis and a line of action of each spring. The transverse spring force can have an axial force component and an axial spring rate that is a function of the spring angle. The carrier can be positioned so that the axial spring rate is zero, negative or positive. A primary spring can apply a primary force directed coaxial with the wire. If the wire changes in length the primary force will correspondingly change, as will the axial force component. The transverse spring can be selected so that the axial force component of the transverse spring approximates the change in the force applied by the primary spring so that the axial force applied to the carrier and wire remains generally constant. |
| US09613599B2 |
Electrophoretic display drive techniques
Techniques for updating an electrophoretic display or other integrating display are provided. A first image data representing the current optical state of the display is combined with a second image data representing the desired next optical state of the display along with a third data representing the charge history of the display to form a compact intermediate representation of the electrical drive signals required to transition the display. Such compact intermediate representations can be provided for each pixel of the display and stored in flash memory. Once determined, these representations of the drive signals can be rapidly replayed from flash memory and further processed to drive the display and affect the desired optical transition from current image to next image while correcting for DC imbalances. |
| US09613598B2 |
Memory management for systems for generating 3-dimensional computer images
A memory management system for generating 3-dimensional computer images is provided. The memory management system includes a device for subdividing an image into a plurality of rectangular areas, a memory for storing object data pertaining to objects in the image which fall in each rectangular area, a device for storing the object data in the memory, a device for deriving image data and shading data for each rectangular area from the object data, a device for supplying object data for each rectangular area from the respective portion of the memory and, if the rectangular area contains objects also falling in at least one other rectangular area, also from the global list, to the deriving device, and a device for storing the image data and shading data derived by the deriving device for display. The memory includes at least one portion allocated to each rectangular area and at least one portion allocated as a global list. |
| US09613584B2 |
Display device, CMOS operational amplifier, and driving method of display device
A display device includes a display unit which has a plurality of pixels and a plurality of driving lines for driving the plurality of pixels; a driving circuit which drives the plurality of pixels through the plurality of driving lines; and a control unit which adjusts a driving capability of the driving circuit according to the number of simultaneous driving lines of the driving circuit. |
| US09613583B2 |
Shift register unit and driving method therefor, shift register, display device
There is provided a shift register unit and driving method for the shift register unit, a shift register and a display device. The shift register unit comprises a first capacitor (C1), an input buffering module (31), a pulling-up module (32), a reset control module (33), a pulling-down module (34) and a pulling-down enhancement module (35); the pulling-down module (34) is configured to reduce the level at the signal output terminal (OUTPUT) and discharge the first capacitor (C1) during a first noise-removal phase; the pulling-down enhancement module (35) is configured to control, in cooperation with the pulling-down module (34), to continuously reduce the level at the signal output terminal (OUTPUT) and continuously discharge the first capacitor (C1) during a second noise-removal phase. Noise in the output signals of the shift register can be reduced and reliability of the shift register can be improved. |
| US09613582B2 |
Gate driver integrated on display panel
Provided is a gate driver including a plurality of stages respectively transferring gate-on voltages to a plurality of gate lines. The stage includes a pull-up driver including a first transistor, the first transistor having a control terminal connected to a first node, an output terminal connected to a output terminal of a present stage and an input terminal connected to a first clock terminal, a first node pull-down portion including a second transistor, the second transistor having an input terminal connected to a buffer node, an output terminal connected to the first node and a control terminal connected to a second node, and a buffer node stabilizer including a third transistor, the third transistor having an input terminal and a control terminal connected to the first node, and an output terminal connected to the buffer node. |
| US09613579B2 |
Liquid crystal display
A liquid crystal display including a first substrate, a first sub-pixel electrode on the first substrate and configured to receive a first voltage, a second sub-pixel electrode on the first substrate and configured to receive a second voltage, an insulating layer between the first sub-pixel electrode and the second sub-pixel electrode, a second substrate facing the first substrate, and a common electrode on the second substrate, wherein the first sub-pixel electrode includes a first sub-region below the insulating layer and a second sub-region above the insulating layer, wherein the second sub-region of the first sub-pixel electrode includes a plurality of first branch electrodes, wherein the second sub-pixel electrode is above the insulating layer, and wherein a difference between the first voltage and a common voltage is greater than a difference between the second voltage and the common voltage. |
| US09613577B2 |
Display device and method of driving the same
Provided is a display device. The display device includes: a plurality of gate lines extending in a first direction; a plurality of data lines extending in a second direction that intersects the first direction; and a plurality of pixels connected to the gate lines and the data lines, wherein the pixels include pixels h-th row pixels (h is a natural number) and (h+1)-th row pixels, which are adjacent to each other in the second direction, with a (k+1)-th gate line (k is a natural number) therebetween among the gate lines; and a first pixel displaying a first color and connected to the (k+1)-th gate line among the h-th row pixels and a second pixel displaying the first color and connected to the (k+1)-th gate line among the (h+1)-th row pixels are spaced apart from each other in the first direction and receive different polarities of data voltages. |
| US09613575B2 |
Liquid crystal display device and method for driving the liquid crystal display device
A method for driving a liquid crystal display (LCD) device includes: A1: one image frame is extracted from a video; A2: the one image frame is divided into one left-eye image and one right-eye image according to different image arrangements, comparing a color data of the left-eye image with a color data of the right-eye image, and calculating a similarity degree between the left-eye image and the right-eye image of the different image arrangements according to the comparison; and A3: the image arrangement having a maximum similarity degree between the left-eye image and the right-eye image is chosen as a film resource format of a three-dimensional (3D) image of the video to drive the LCD device, and the image arrangement having the maximum similarity degree between the left-eye image and the right-eye image is the image arrangement of the one image frame. |
| US09613569B2 |
Pixel unit driving circuit, display substrate, display panel and display device
The invention provides a pixel unit driving circuit, a display substrate, a display panel and a display device. The pixel unit driving circuit is used for driving a plurality of pixel units, wherein each of the pixel units comprises sub-pixels of different colors. The pixel unit driving circuit comprises a plurality of driving powers corresponding to the sub-pixel of different colors, wherein the sub-pixels of a same color are connected with a same driving power, and each of the driving powers is used for supplying a corresponding driving voltage to the sub-pixels of a color corresponding to the driving power. |
| US09613567B2 |
Display device with initialization control and method of driving pixel circuit thereof
A display device includes a pixel circuit having a driving transistor for driving a light-emitting element based on a gradation voltage held by a holding capacitor. The display device performs a first writing of gradation data using a first initialization voltage and a second writing of the gradation data using a second initialization voltage. |
| US09613565B2 |
Light emitting device
An object of the present invention is to provide a light emitting device that is able to suppress power consumption while a balance of white light is kept, without making a configuration of a power source circuit complicated. A power source potential corresponding to each color of a light emitting element is used as a higher electric potential of a video signal and an electric potential of a power source line in the case that a transistor for controlling a supply of electric current to the light emitting element is a p-channel TFT. Conversely, a power source potential corresponding to each color of a light emitting element is used as a lower electric potential of a video signal and an electric potential of a power source line in the case that a transistor for controlling a supply of electric current to the light emitting element is an n-channel TFT. |
| US09613564B2 |
Image displaying method and image display apparatus
The present disclosure relates to an image displaying method and a display apparatus wherein each of raw pixels is divided into a plurality of virtual pixels based on desired image resolution for displaying a frame to be displayed; virtual image information for each of the virtual pixels is determined based on weights of the respective sub-pixels in each of the virtual pixels, weights of the respective sub-pixels in the virtual pixels which are adjacent in rows and the received original image information; thus, each of the virtual pixels displays a color(s) which it lacks itself with the aid of the respective sub-pixels in the virtual pixels which are adjacent in rows, so that the same display function as that of each of the raw pixels may be implemented, and thus the image resolution of the frame to be displayed is increased. |
| US09613563B2 |
Display device and method thereof
A display apparatus includes: a display panel configured to display an image frame; an arithmetic operator configured to divide the image frame into blocks, calculate a pixel gradation value of the pixel blocks, and accumulate the calculated pixel gradation values; and a compensator configured to locally reduce a luminance of a corresponding pixel block, of which a respective accumulated pixel gradation value exceeds a threshold value of among the plurality of pixel blocks, and to compensate for a luminance difference between the corresponding pixel block, for which the luminance has been reduced, and surrounding pixel blocks. Accordingly, it is possible to effectively remove an afterimage. |
| US09613558B2 |
Pixel driving method and associated display device
A pixel driving method comprises the following steps: receiving a display image comprising a plurality of image points, wherein each image point corresponds a display color; producing a first sub-image and a second sub-image according to the display image, wherein the first sub-image displays a part of the image points, while the second sub-image displays the other part of the image points; and displaying at least one of the first sub-image and the second sub-image on the color display panel. |
| US09613555B2 |
Pixel driving circuit including signal splitting circuits, driving method, display panel, and display device
The present disclosure provides a pixel driving circuit, a driving method, a display panel and a display device. The pixel driving circuit comprises a plurality of signal splitting systems which include a scanning signal input interface configured to receive an original scanning signal with a width of MT, an auxiliary control signal input interface configured to receive an auxiliary control signal, and signal output interfaces connected to M rows of gate lines in an one-to-one correspondence manner. The signal splitting system is configured to split the original scanning signal with a width of MT into M gate driving signals with a width of a gate line turn-on time T, and output the gate driving signals to the M rows of gate lines sequentially via the output interfaces. M is not less than 2. |
| US09613553B2 |
Method and device for detecting uniformity of a dark state image of display
A method and device for detecting uniformity of a dark state image of a display is disclosed. After an acquired dark state image of a display panel is divided into a plurality of areas according to a preset rule, RGB values of each area are determined and converted into XYZ values. The L* and C* values in the CIE-LCH standard are calculated and statistical analysis is performed to the L* and C* values of the areas in the dark state image to determine statistical parameters of the display image. A dark state uniformity coefficient of the dark state image is determined based on the determined statistical parameters, and the uniformity of the dark state image of the display panel is determined through the dark state uniformity coefficient. |
| US09613552B2 |
Inspection instrument of liquid crystal display panel
The present invention provides an inspection instrument of a liquid crystal display panel, comprising an inspection equipment and an image generator electrically connected to the inspection equipment, and the inspection equipment comprises a main body, a first test arm and a second test arm which are installed on the main body and electrically connected to the image generator, a plurality of first contact probes and a plurality of second contact probes which are respectively installed on the first test arm and the second test arm, and a first bonding part and a second bonding part which are respectively and slidably installed on the first test arm and the second test arm, and the first contact probes and the second contact probes are electrically connected to the image generator, and first conductors and second conductors are respectively located on the first bonding part and the second bonding part, and the first conductors and the second conductors are electrically connected to the image generator, and the first conductors and the second conductors are positionally adjustable in the direction perpendicular to the liquid crystal display panel. According to the present invention, the switch between the two types of light-on Inspection, Shorting Bar and 1D1G can be done only by adjustment of the position of the conductors of the bonding parts relative to the liquid crystal display panel. The replacement of the test means used in the inspection instrument is not required. |
| US09613550B2 |
Three-dimensional image display device and driving method thereof
A 3-dimensional image display device according to an exemplary embodiment includes: a display panel including a plurality of pixels; a light source unit including a first color light source for supplying a first color light and a second color light source for supplying a second color light to the display panel; and a data driver sequentially applying a first left-eye data voltage, a second left-eye data voltage, a first gray data voltage, a first right-eye data voltage, and a second right-eye data voltage to a pixel, wherein the light source unit supplies the first color light when the first left-eye data voltage and the second right-eye data voltage are applied, the second color light when the second left-eye data voltage and the first right-eye data voltage are applied, and the light source supplies the second color light at a first intensity when the first gray data voltage is applied. |
| US09613546B2 |
Systems and methods for managing and presenting geolocation data
A system for managing and presenting geolocation data. The system includes a plurality of electronic devices and a server in data communication with a plurality of electronic devices. The server has a processor that is configured to receive requests from an electronic device for a map including a feature of interest and the feature having associated location information therewith. The location information is indicative of a geographic location of the feature and comprises information indicative of a precision of the geographic location. The processor provides a precise icon and an imprecise icon for representing a feature on a map, each having a constant size. The processor is also configured to determine whether to use the precise icon or the imprecise icon to represent the feature on the map based upon information indicative of a scale of the map and the precision of the location information associated with the feature. The processor generates the map including the feature being represented by the precise icon or the imprecise icon. |
| US09613544B2 |
Electroactive, actuated dot structures and associated methods
Systems and methods for an electroactive polymer actuated dot structure is disclosed herein. According to an aspect, an actuated dot structure includes a housing. The actuated dot structure also includes a pin configured to move between a first position and a second position with respect to the housing. Further, the actuated dot structure includes a multimorph engaged with the pin and configured to displace the pin between the first and second positions and to latch the pin in the second position. |
| US09613543B2 |
Alert generation and related aircraft operating methods
A method of operating an aircraft during a flight is provided. An onboard monitoring subsystem of the aircraft detects that a flight crew member is fatigued, and an automated flight crew training exercise is activated in response to detecting that the flight crew member is fatigued. The flight crew member is then engaged with the automated flight crew training exercise, including instructions intended to alleviate flight crew fatigue. |
| US09613541B1 |
Method and apparatus for learning to play a stringed instrument
A method and apparatus for learning to play a musical instrument, such as a guitar, by incorporating a markable, erasable surface onto the neck of the instrument such that the student may apply, as needed, removable markings to the instrument that indicate the correct finger positions for playing the instrument. The incorporation of this markable, erasable surface onto the instrument is an improved method of learning because a student is better able to place his or her fingers in the correct positions on the instrument when learning how to play the instrument. |
| US09613540B2 |
Examination support apparatus, and examination support method
The examination support apparatus includes a question database, an answer status database, a question output unit, an answer acquisition unit, a correct/incorrect determination unit, a calculation unit, and a determination unit. The question output unit extracts and outputs examination questions from the question database. The answer acquisition unit acquires an answer to each of the above-described examination questions transmitted from an examinee terminal, and the correct/incorrect determination unit determines whether the answer is correct or incorrect. The calculation unit calculates for the examinee a correct-answer percentage to the examination questions in the same administering section based on a result of the correct/incorrect determination. The determination unit calculates a change in a correct-answer percentage for the examinee from the correct-answer percentage of the examination questions in the particular administering section stored in the answer status database and the correct-answer percentage calculated, and determines the change. |
| US09613537B2 |
Multiple landing threshold aircraft arrival system
A system and method for safe and effective implementation of approach procedures for guiding multiple aircraft of different weights approaching a single runway for landing, whereby lighter incoming aircraft will fly higher than heavier aircraft to avoid the wakes from the heavier aircraft, for the purpose of increasing the landing rate and, in turn, the number of aircraft that can land. |
| US09613534B2 |
Systems and methods for creating a network cloud based system for supporting regional, national and international unmanned aircraft systems
Systems and methods for creating a network cloud based hierarchical architecture for supporting unmanned aircraft are disclosed. A system may include a higher level server, one or more lower level server in direct communication with the higher level server, and one or more control station in direct communication with the lower level server. Each control station may be configured to: control flight operations of an unmanned aircraft; acquire flight information and position information of the unmanned aircraft; and provide updates to the lower level server regarding the flight information and position information of the unmanned aircraft. Each lower level server may be configured to: process the flight information and position information received from the control station; and provide updates to the higher level server regarding the flight information and position information received from the control station. |
| US09613530B1 |
Building smart traffic control
A computer-implemented method and system for vehicular traffic control and vehicle routing includes receiving a request for a best route, at a central system. The request including a current location and a destination from a requesting vehicle. Travel factors from the current location to the destination are determined. The travel factors include road availability, traffic conditions, and real time feedback, using the central system in response to receiving the request. The best route is determined for the requesting vehicle from the current location to the destination based on the travel factors, and real time feedback of the traffic conditions. The method and system includes initiating a plurality of traffic control actions along the route for the requesting vehicle. The traffic control actions are initiated along the route simultaneously and in concert with the requesting vehicle to clear the best route for the requesting vehicle to travel unobstructed to the destination. |
| US09613528B2 |
Vehicle position indexing
A method and apparatus for vehicle position indexing. The method includes: obtaining position information of a vehicle in real time, and monitoring a current road segment where the vehicle is located based on the position information and road segment information divided by road network information; in response to having monitored that the vehicle enters into the current road segment, building a road segment index record that includes identification information of the vehicle, identification information of the current road segment, and a time when the vehicle enters into the current road segment; and in response to having monitored that the vehicle leaves the current road segment, adding the time when the vehicle leaves the current road segment, into the road segment index record. |
| US09613527B2 |
Method and apparatus for providing smaller incremental updates to a navigational database
An approach is provided for determining at least one first cluster set associated with at least one database of one or more navigable links at a first time period and at least one second cluster set associated with the at least one database at a second time period, wherein the at least one first cluster set and the at least one second cluster set include one or more clusters of the one or more navigable links. The approach involves causing, at least in part, a computation of a minimal matching between at least one first cluster set and the at least one second cluster set. The approach also involves causing, at least in part, a renaming of the one or more clusters in the at least one first cluster set, the at least one second cluster set, or a combination thereof based, at least in part, on the minimal matching, wherein the one or more clusters organize the one or more navigable links based, at least in part, on traffic pattern information. |
| US09613525B2 |
Hazard detection unit providing intuitive illumination-based status signaling
Various methods and systems for hazard detectors are presented. Such hazard detectors may include one or more hazard sensors that are configured to detect the presence of one or more types of hazards. Such hazard detectors may include a circular or a ring-shaped light comprising a plurality of lighting elements. Such a ring-shaped light may be configured to illuminate using a plurality of colors and, possibly, a plurality of animation patterns. Such hazard detectors may include a processing system configured to cause the ring-shaped light to illuminate using the plurality of colors and the plurality of animation patterns in response to a plurality of states corresponding to the battery module and the plurality of hazard sensors. |
| US09613522B2 |
Security system
A security system includes a central control and a number of security controllers, each of which includes a removable and replaceable security control module. Each module is interchangeable with other modules. Each controller includes a housing within which the module is contained. Cables from security-controlled components extend into the interior of the housing and are removably connected to the module. Each module includes a first connector for connection in a communication system and a second connector for receiving inputs from and providing outputs to a security component controlled by the controller. Each module further includes a third connector for receiving inputs from or providing outputs to an auxiliary device other than the security component. The auxiliary device provides an input to the controller or receives an output from a controller independent of the security component. Each controller also includes an accelerometer for providing a tamper evident feature. |
| US09613519B2 |
Tracking system for hand hygiene
In accordance with some embodiments of the present disclosure, a system for tracking hand hygiene may comprise a plurality of dispensers, each dispenser configured to detect a hand-hygiene event and wirelessly transmit hand-hygiene event information associated with the hand-hygiene event. The system may also include a room hub configured to wirelessly transmit location information. Further, the system may include a user circuit module configured to wirelessly receive the hand-hygiene event information, wirelessly receive the location information, and store the hand-hygiene event information, a first time stamp associated with the hand-hygiene event information, the location information, and a second time stamp associated with the location information, in a memory. The user circuit module may also be configured to transmit the hand-hygiene event information, the first time stamp, the location information, the second time stamp, and a user identifier to a central server. |
| US09613516B2 |
System and methods for soiled garment detection and notification
Aspects of the present disclosure involve an apparatus, systems, and methods for soiled garment detection and notification. The method may include receiving a measure of odor being released from a garment from a soiled garment detection apparatus. The method may further include determining that the measure of odor exceeds an acceptable odor threshold. A message may then be sent to a user device associated with the garment (e.g. a device of the owner of the garment) in response to determining that the measure of odor exceeds the threshold. The message may include a notification that the garment is soiled, and a suggested course of action to improve the measure of odor released by the garment. |
| US09613514B2 |
Systems and methods for providing a smart notifications system
A system includes one or more sensors to gather information about an environment, a memory device that stores one or more computer executable components, and a processor to execute the computer executable components in the memory, including an event detection component to obtain information from the one or more sensors and identify whether a first level event has occurred based on the obtained information, a coalescence component to consolidate a plurality of events into a hierarchically higher-level, pre-defined coalesced event, and a communication component to send to one or more users a notification of a hierarchically highest level event determined to have occurred during a pre-determined time range. |
| US09613512B2 |
Event trigger on wireless device detection
Messages from wireless devices are intercepted by a controller, such as an access point for a wireless network, a security system controller, a home automation controller, an industrial or business automation controller, or a combination thereof. The controller logs device-identifying information about the devices that sent the messages that that were intercepted. Examples of the device-identifying information include a MAC address, a device name, a brand of the device, an SSID of an AP connected to the device, or a class of device. The intercepted message is used to trigger one or more events, either based solely on intercepting the message or in combination with other parameters. |
| US09613506B2 |
Synchronization of independent output streams
A system determines to use at least two independent renderers to render at least two output streams that are to be synchronized. The independent renderers are provided with a shared synchronization object when instructed to render the respective output stream. A time when all of the independent renderers can render a respective first buffer of the respective output stream is determined from the shared synchronization object. Rendering of the output streams utilizing the independent renderers is begun at the determined time. In this way, rendering of the output streams may be synchronized. |
| US09613502B2 |
Wireless interface for ATM cassette and money transport
In an example embodiment, there is described herein an apparatus comprising a cassette operable to store documents, the cassette having an external surface, an electrophoretic display coupled with the external surface, and a wireless interface coupled with the cassette and operably coupled with the electrophoretic display. In particular embodiments, the electrophoretic display is operable to receive data representative of configuration from a wireless device in data communication with the wireless interface. |
| US09613499B2 |
Gaming machine with history display
A gaming system comprises a history display and a controller. The history display tracks a plurality of past outcomes of a wagering game. The controller awards a bonus if a current outcome of the wagering game has a predetermined association with at least one of the displayed plurality of past outcomes. |
| US09613498B2 |
Systems and methods for peer-to-peer gaming
A system and method for peer-to-peer gaming is described. One embodiment includes a system for peer-to-peer gaming, the system comprising an at least one gaming client, wherein the at least one gaming client is configured to accept a selection of an at least one gaming option from a player, and allow the player to play a game based on the selection of the at least one gaming option; an administration server, wherein the administration server is configured to receive the selection of the at least one gaming option from the at least one gaming client, and initiate the game for the player based on the selection of the at least one gaming option; and an at least one gaming server, wherein the at least one gaming sever is configured to run the game and transmit data about the game to the administration server. |
| US09613495B2 |
Wagering game with episodic feature determined by player
A gaming machine for playing a wagering game includes a game display and a controller. The game display is operable to display a randomly selected outcome of a wagering game in response to receiving a wager from a player. The wagering game has a game-play progression that includes a plurality of game episodes, at least one of the plurality of game episodes having a plurality of episode features. The controller is in communication with the game display and is programmable to cause, in response to a manual selection received from the player, the start of the wagering game from any previously played feature of the plurality of episode features. |
| US09613493B2 |
Gaming machine with visual and audio indicia changed over time
A gaming machine having features for increasing player appeal is set forth. The machine generally includes a processor, a display, and a memory device. The processor randomly selects one of a plurality of outcomes of the gaming machine in response to a wager. The display displays visual elements to be viewed by the player. The memory device is coupled to the processor and stores at least two data sets for producing at least two different types of visual and/or audio elements in the basic game or bonus game, or at least two different types of bonus game formats. The processor selects one of the two data sets in response to the occurrence of a predetermined time, a number of wager inputs by players of the gaming machine, or after determining a favorite play content based on the number of wager inputs by players. |
| US09613488B2 |
Wager recognition system
A gaming table apparatus has a gaming table with a gaming table support surface. At least two token sensors are provided, which are electrically connected in series to a token sensor controller. The at least two token sensor units are physically restrained by the table support surface. The game controller is in communication with the token sensor controller, wherein the game controller is configured to associate player position data with transmitted wager data received from the token sensor controller. |
| US09613486B2 |
Slots-fueled adventure
Methods, systems, and computer programs are provided for executing games, processed by one or mover servers. The one or more servers are provided with access to a network for communication with one or more client computers. One method includes operations for sending an interface for a casino-type game to a client computer, and for starting an online game that is displayed with the interface for the casino-type game. The method further includes operations for detecting a bet placed in the casino-type game, and for determining an outcome of the bet in the casino-type game. A character is moved along a path of the online game, where the amount of movement of the character is based on the outcome of the bet or wager. |
| US09613480B2 |
Method and device for authenticating a tag
A method for authenticating a tag, includes: a step (205) of capturing an image, with a communicating mobile terminal, of at least a portion of a tag having at least a portion of an identifier; a step (210) of transmitting the identifier to a server; a step (215) of reading, from a memory of tag images, the image of a tag having the identifier; a step (220) of transmitting, to the communicating mobile terminal, at least a portion of the image read from the memory; and a step (230) of displaying at least a portion of the transmitted image superimposed on an image captured by the terminal. |
| US09613477B2 |
Collection of information using contactless devices in combination with mobile computing devices
An approach for collecting information in a facility including a plurality of users, wherein each of the plurality of users includes at least one contact-less device for accessing the facility, wherein the contact-less device stores an identifier, and at least one of the plurality of users includes a wireless computing device, is provided. The approach broadcasts an interrogation signal by a selected wireless computing device from at least one of the plurality of users. The approach receives a response signal to the interrogation signal by the selected wireless computing device from each of one or more proximal contact-less devices of one or more contact-less devices within the operating range of the selected wireless computing device. The approach generates a collection message from the selected wireless computing device. The approach transmits the collection message from the selected wireless computing device to a central computing system. |
| US09613473B2 |
Method and apparatus for energy usage display
A computer-implemented method includes displaying a plurality of power consuming and producing vehicle components. The method also includes determining what components are currently consuming power and what components are currently delivering power, and to what magnitude the power is flowing between components. The method additionally includes displaying one or more arrows showing a powerflow from at least one power producing component to at least one power consuming or producing component. The method further includes displaying an indicia indicating the magnitude of the powerflow associated with the one or more arrows. Also, the method includes, for at least one power consuming component, displaying a gauge relating to a level of power being consumed by the at least one power consuming component. |
| US09613471B2 |
Apparatus and method for diagnosing actuators in vehicle
An apparatus and a method for diagnosing actuators in a vehicle can improve accuracy and reliability of a failure diagnosis by allowing a diagnostic control apparatus in a vehicle to measure power data and implementing a fast diagnosis by reducing a separation time and a diagnosis time of a measurement apparatus. |
| US09613469B2 |
Graphical user interface with vehicle scanned function
A graphical user interface is provided that can be used on a diagnostic tool. The graphical user interface allows a technician to operate various functions of the diagnostic tool including searching for additional information on the Internet, receiving weather information that is relevant to certain diagnostic tests, and displaying in certain formats the retrieved vehicle data and when certain vehicles were last scanned or diagnosed. |
| US09613468B2 |
Systems and methods for updating maps based on telematics data
Various embodiments of the present invention are directed to a mapping management computer system. According to various embodiments, the mapping management computer system may be configured for updating geographical maps by assessing map data and operational data including vehicle telematics data to identify portions of a vehicle path that do not correspond to known travel paths. In various embodiments, the system is configured to define these identified portions as new known travel paths corresponding to a public road, private road, parking lot lane, or the like, and update the map data to reflect the new known travel paths. |
| US09613461B2 |
Display control apparatus, display control method, and program
Provided is a display control apparatus including a state detection unit configured to detect a state of a user who observes an image, and a display control unit configured to cause a display to display the image in which a plurality of display content items are superimposed on a photographed image, and to control a behavior of each of the display content items according to the state of the user. |
| US09613460B2 |
Augmenting a digital image
For augmenting a digital image, code identifies a structure image in a digital image. The code further augments the digital image with structure information for the structure image and/or the digital image with structure image removed. |
| US09613459B2 |
System and method for in-vehicle interaction
A system and method for interaction in a vehicle includes establishing a bi-directional interaction session between a first display and a second display via a communication link, wherein each of the first display and the second display are communicatively coupled to the vehicle and the first display is operated by a first user and the second display is operated by a second user. Upon receiving a first interaction input associated generating a first augmented reality object based on the first interaction input and transmitting via the communication link the first augmented reality object to the second display. Upon receiving a second interaction input, generating a second augmented reality object based upon the second interaction input and transmitting via the communication link the second augmented reality object to the first display. |
| US09613457B2 |
Multi-primitive fitting device and operation method thereof
Provided are a multi-primitive fitting method including an acquiring point cloud data by collecting data of each of input points, a obtaining a segment for the points using the point cloud data, and a performing primitive fitting using data of points included in the segment and the point cloud data, and a multi-primitive fitting device that performs the method. |
| US09613453B2 |
Systems and method for performing a three pass rendering of images
System and method for producing an intermediate image in three passes is provided. An initial image and a final image are identified, each image comprising an associated depthmap and corresponding to a respective camera pose from a respective angular heading. An intermediate image corresponding to an intermediate camera pose with an intermediate angular heading is rendered. A first intermediate image is rendered at a first opacity based on the final image and the associated final depthmap, a second intermediate image is rendered at a second opacity based on the initial image and the associated initial depthmap, and a third intermediate image is rendered at a third opacity based on the final image and the associated final depthmap. The rendered first, second, and third intermediate images, each of which correspond to the intermediate camera pose with the intermediate angular heading, are overlaid to produce a combined image for display. |
| US09613452B2 |
Method and system for volume rendering based 3D image filtering and real-time cinematic rendering
A method and apparatus for volume rendering based 3D image filtering and real-time cinematic volume rendering is disclosed. A set of 2D projection images of the 3D volume is generated using cinematic volume rendering. A reconstructed 3D volume is generated from the set of 2D projection images using an inverse linear volumetric ray tracing operator. The reconstructed 3D volume inherits noise suppression and structure enhancement from the projection images generated using cinematic rendering, and is thus non-linearly filtered. Real-time volume rendering can be performed on the reconstructed 3D volume using volumetric ray tracing, and each projected image of the reconstructed 3D volume is an approximation of a cinematic rendered image of the original volume. |
| US09613451B2 |
Jittered coverage accumulation path rendering
One embodiment of the present invention sets forth a technique for rendering anti-aliased paths by first generating an alpha buffer representing coverage data. To generate the alpha buffer, jittered versions of the rendered path are rendered and corresponding stencil buffers indicating sub-pixel samples of the path that should be covered are generated. After each stencil buffer is generated, the jittered path is rasterized to convert the sub-pixel coverage into coverage weights that are stored in the alpha component of a frame buffer. As each jittered path is rasterized, the coverage weights are accumulated. Finally, geometry representing the union of the jittered versions of the path is rendered to shade pixels based on the accumulated coverage weights. The anti-aliased rendered paths may be filled or stroked without tessellating the paths. |
| US09613450B2 |
Photo-realistic synthesis of three dimensional animation with facial features synchronized with speech
Dynamic texture mapping is used to create a photorealistic three dimensional animation of an individual with facial features synchronized with desired speech. Audiovisual data of an individual reading a known script is obtained and stored in an audio library and an image library. The audiovisual data is processed to extract feature vectors used to train a statistical model. An input audio feature vector corresponding to desired speech with which the animation will be synchronized is provided. The statistical model is used to generate a trajectory of visual feature vectors that corresponds to the input audio feature vector. These visual feature vectors are used to identify a matching image sequence from the image library. The resulting sequence of images, concatenated from the image library, provides a photorealistic image sequence with facial features, such as lip movements, synchronized with the desired speech. This image sequence is applied to the three-dimensional model. |
| US09613448B1 |
Augmented display of information in a device view of a display screen
Implementations relate to augmented display of information in a device view of a display screen. In some implementations, a method includes detecting a physical display screen appearing in a field of view of an augmenting device, and detecting an information pattern in output associated with the physical display screen. The method extracts displayable information and screen position information from the information pattern, where the screen position information is associated with the displayable information and indicates a screen position on the physical display screen. The method causes a display of the displayable information overlaid in the field of view of the augmenting device, where the display of the displayable information is based on the screen position information. |
| US09613446B2 |
Obscured relationship data within a graph
Techniques for generating a visual representation of a graph are described herein. The techniques may include determining a metamodel indicating relationships between objects, and determining rules for obscuring data about the objects of the metamodel. A visual representation of a graph is generated, which visual representation illustrates at least some of the data about the objects and their relationships without illustrating the obscured data. |
| US09613440B2 |
Digital breast Tomosynthesis reconstruction using adaptive voxel grid
Some embodiments are associated with generation of a volumetric image representing an imaged object associated with a patient. According to some embodiments, tomosynthesis projection data may be acquired. A computer processor may then automatically generate the volumetric image based on the acquired tomosynthesis projection data. Moreover, distances between voxels in the volumetric image may be spatially varied. |
| US09613438B2 |
X-ray diagnostic apparatus and medical image processing method
An X ray diagnostic apparatus includes an X ray tube generating X rays, a first detector detecting the X rays, at least one second detector arranged in front of a first detection surface of the first detector and including a second detection surface narrower than the first detection surface and indicator points provided on a rear surface of the second detection surface, a projection data generation unit generating first projection data based on an output from the first detector, and a positional shift detection unit detecting a positional shift of the second detector relative to the first detector in accordance with an imaging direction by using the first projection data and a predetermined positional relationship between the points and detection elements in the second detector. |
| US09613435B1 |
Color maps
A computer-implemented method for generating a color map using a color space, the generating including selecting lightness points representing lightness values, generating a lightness plot based on the lightness points, the lightness plot non-linearly increasing from a minimum lightness value to a maximum lightness value, and selecting chromaticity points, where the chromaticity points are represented using a plurality of dimensions, and the chromaticity points representing chromaticity values. The method includes generating a chromaticity plot based on the chromaticity points, and associating chromaticity values along the chromaticity plot with respective lightness values along the lightness plot, the associating specifying a plurality of colors. The method also includes identifying an in-gamut range for an RGB representation of the plurality of colors, the RGB representation provided in an RGB color space, and converting the color map from the color space to the RGB color space. |
| US09613428B2 |
Fingerprint authentication using stitch and cut
The present invention concerns a method, a system, a device of authenticating a user using a body part including biometric information. The method comprises stitching partial enrolment images comprising different views of the user's body part into at least one mosaic and thereby creating an enrolled image, acquiring an authentication image of the body part, wherein the size of the authentication image is a fraction of the enrolled image, determining at least one area of interest in the enrolled image, and matching the authentication image with image data of the determined area of interest in the enrolled image. |
| US09613427B2 |
Information processing method and electronic device
The disclosure provides an information processing method applied to an electronic device. The method comprises: performing edge detection on a first image to obtain edge strength values for respective pixels of the first image; determining, according to the edge strength values of the pixels, a main information region of the first image; cropping, according to the main information region, the first image to obtain a second image which includes the main information region; and setting the second image as a background image for a graphical interactive interface of the electronic device, wherein the graphical interactive interface includes N controls, N being a positive integer. |
| US09613426B2 |
Segmentation and matching of structures in medical imaging data
A medical image processing apparatus for receiving a target phase data set and a reference phase data set at different times, obtaining a segmentation of an elongated structure in the target phase data and the reference phase data set, determining a target phase line along the segmentation of the elongated structure in the target phase data set and a reference phase line along the segmentation of the elongated structure in the reference phase data set, and determining a synthesized target phase line by combining the target phase line and reference phase line. |
| US09613424B2 |
Method of constructing 3D clothing model based on a single image
A method of constructing 3D clothing model based on single image, estimating a 3D model of human body of an inputted image and constructing 3D clothing plane according to the clothing silhouette of the inputted image. The method includes utilizing the 3D clothing plane and the 3D model of human body to generate a smooth 3D clothing model through a deformation algorithm. A decomposition algorithm of intrinsic image is utilized along with a shape-from-shading algorithm to acquire a set of detail information of clothing from the inputted image. A weighted Laplace editing algorithm is utilized to shift the acquired detail information of clothing to the smooth 3D clothing model to yield a final 3D clothing model. A 3D clothing model is used to generate the surface geometry details including folds, wrinkles. |
| US09613422B2 |
Using multispectral satellite data to determine littoral water depths despite varying water turbidity
Satellite data is used to determine water depth by accounting for the changing turbidity of the water over time and without requiring calibration using SONAR measurements. Radiance values at multiple wavelengths sensed at both a first time and a second time are stored in a database. Modeled reflectance values are calculated for a defined surface area on the water based on an assumed depth, assumed water constituents and assumed bottom cover. A plurality of differences between the modeled reflectance values and the reflectances sensed at the two times are calculated. A bathymetry application module minimizes the sum of the differences between the modeled and sensed subsurface reflectances by varying the assumed depth, bottom cover and water constituents. The differences are weighted based on wavelength before being summed. The depth that results in the minimized sum of the differences is the estimated depth, which is displayed on a graphical user interface. |
| US09613417B2 |
Calibration of plenoptic imaging systems using fourier transform
Calibration for a plenoptic imaging system. The plenoptic imaging system includes a detector array that is subdivided into superpixels. A plenoptic image captured by the detector array of the plenoptic imaging system is accessed. For a row of superpixels, a slice is selected through the row, the selected slice having a Fourier transform with a stronger fundamental component compared to other slices through the row. A pitch of the row of superpixels is determined based on a frequency of the fundamental component of the selected slice. A rotation of the row of superpixels is determined based on a rotation of the selected slice. |
| US09613416B1 |
Methods, systems, and devices for automated analysis and management of medical scans
The disclosure herein provides methods, systems, and devices for automated reorientation and/or analysis of medical scans and/or images. The methods, systems, and devices for automated analysis of medical scans can be configured to mark, score, grade, and/other otherwise classify medical scans that are more time-sensitive, severe, and/or the like to allow a medical professional reviewing and/or analyzing medical scans to view and/or analyze such scans more efficiently by using a common image orientation and/or taking into account knowledge of the risk of severity, time-sensitiveness, and/or other priority. |
| US09613412B1 |
Stone slab manufacturing methods and systems
This document describes systems and processes manufacturing and distributing stone slabs, such as including distributing a stone slab and a slab image file associated with the stone slab. The slab image file may include an image and associated information to facilitate one or more operations related to the stone slab. |
| US09613411B2 |
Creating defect classifiers and nuisance filters
Methods and systems for setting up a classifier for defects detected on a wafer are provided. One method includes generating a template for a defect classifier for defects detected on a wafer and applying the template to a training data set. The training data set includes information for defects detected on the wafer or another wafer. The method also includes determining one or more parameters for the defect classifier based on results of the applying step. |
| US09613407B2 |
Display management for high dynamic range video
A display management processor receives an input image with enhanced dynamic range to be displayed on a target display which has a different dynamic range than a reference display. The input image is first transformed into a perceptually-quantized (PQ) color space. A non-linear mapping function generates a tone-mapped intensity image in response to the characteristics of the source and target display and a measure of the intensity of the PQ image. After a detail-preservation step which may generate a filtered tone-mapped intensity image, an image-adaptive intensity and saturation adjustment step generates an intensity adjustment factor and a saturation adjustment factor as functions of the measure of intensity and saturation of the PQ image, which together with the filtered tone-mapped intensity image are used to generate the output image. Examples of the functions to compute the intensity and saturation adjustment factors are provided. |
| US09613405B2 |
Scalable massive parallelization of overlapping patch aggregation
Techniques for enhancing an image using pixel-specific processing are disclosed. An image can be enhanced by updating certain pixels through patch aggregation. Neighboring pixels of a selected pixel are identified. Respective patch values for patches containing the selected pixel are determined. Patch values provide update information for updating the respective pixels in the patch. Relevant patch values for the selected pixel are identified by identifying associated patches of the pixel. Information from the relevant patch values of the selected pixel may be obtained. Using this information, pixel-specific processing may be performed to determine an updated pixel value for the selected pixel or for neighboring pixels of the selected pixel. Pixel-specific processes may be executed for each of the selected or neighboring pixels. These pixel-specific processes can be executed in parallel. Therefore, through the execution of pixel-specific processes, which may be performed concurrently, an enhanced image may be determined. |
| US09613403B2 |
Image processing apparatus and method
An apparatus and method for out-focusing a color image based on a depth image, the method including receiving an input of a depth region of interest (ROI) desired to be in focus for performing out-focusing in the depth image, and applying different blur models to pixels corresponding to the depth ROI, and pixels corresponding to a region, other than the depth ROI, in the color image, thereby performing out-focusing on the depth ROI. |
| US09613402B2 |
Image processing device, endoscope system, image processing method, and computer-readable storage device
An image processing device includes an evaluation value calculation section that calculates an evaluation value that is used to determine whether or not an inter-frame state of an object within a captured image is a stationary state, an estimated noise amount acquisition section that acquires an estimated noise amount of the captured image, a determination section that determines whether or not the inter-frame state of the object is the stationary state based on the evaluation value and the estimated noise amount, and a noise reduction processing section that performs a first noise reduction process (time-direction noise reduction process) when it has been determined that the inter-frame state of the object is the stationary state, and performs a second noise reduction process that includes at least a spatial-direction noise reduction process when it has been determined that the inter-frame state of the object is not the stationary state. |
| US09613401B2 |
Method to obtain 3D images of a flowing region beneath an object using speckle reflections
A method for imaging a flowing media within static regions includes obtaining a plurality of signals using the speckle properties of the flowing media. The plurality of signals are compared to one another such as by subtraction. The static regions are removed from the plurality of signals by the comparison. The remaining signals are combined (such as by summing) to produce an image of the flowing media. |
| US09613397B2 |
Display method and electronic apparatus
A display method and an electronic apparatus include a display unit with various kinds of different display modes, so that when the current display mode of the display unit is the first display mode, the first application in the electronic apparatus is initiated, and then the electronic apparatus detects the first parameter information of the first application, and then determines the correspondence relationship between the first parameter information and the display modes, determines the second display mode corresponding to the first parameter information, and adjusts the display unit from the first display mode displayed currently to the second display mode at last. Determining the display modes according to different applications running in the electronic apparatus increases the display effect of the electronic apparatus and reduces the power consumption of the display of the electronic apparatus. |
| US09613394B2 |
Lossy color compression using adaptive quantization
Techniques related to graphics rendering including techniques for color compression and/or decompression using adaptive quantization are described. |
| US09613391B2 |
Image processing architecture
An inspection system that receives image data corresponding to an image and processes the image data to produce a report corresponding to characteristics of the image. Interface cards receive the image data in a flow, where each interface card receives image data corresponding to a different portion of the image. Process nodes connect to the interface cards, and receive the image data from the interface cards. A host computer is connected to the process nodes, and job managers implemented in the host computer manage the flow of image data to and from the process nodes. The job managers remain operable during a crash of one of the process nodes. Process node programs are implemented in the process nodes, and analyze a portion of the image data and produce the report corresponding to the characteristics of the analyzed portion of the image data. At least one process node program is implemented in each process node. The process node programs rapidly analyze the image. The process node programs are isolated from the job managers so that a crash of a process node program does not crash the job manager. |
| US09613387B2 |
Universal serial bus device applied to webcams and method thereof
A universal serial bus device includes at least two input interfaces, an input interface control unit, and an image input interface. Each input interface of the at least two input interfaces is coupled to an image sensor for receiving images generated by the image sensor and an identification bit corresponding to the image sensor. The input interface control unit is coupled to the at least two input interfaces for controlling the at least two input interfaces to receive images generated by the at least two image sensors and identification bits corresponding to the at least two image sensors in turn when the images generated by the at least two image sensors are used for synthesizing three-dimensional images. The image input interface is used for receiving and transmitting the images generated by the at least two image sensors and the identification bits corresponding to the at least two image sensors. |
| US09613385B2 |
System for analyzing device performance data
A system for analyzing performance data associated with a mail processing device includes a reporting module operable to receive, over a network, first data related to the operation of a mail processing device at one of a plurality of mail processing sites, wherein each of the plurality of mail processing sites is associated with a database accessible over the network, store the first data in a database associated with the mail processing site of the mail processing device, receive, over the network, second data identifying filter criteria for the first data, filter, using a processor, the first data with the second data, generate, using a processor, a report based on the filtered first data, and communicate the report over the network. |
| US09613384B2 |
Personal learning apparatus and method based on wireless communication network
A personal learning apparatus and method using a terminal which supports an electronic book function in a wireless communication network are provided. The personal learning method includes: distributing, by a master device, learning data to the terminal within a wireless communication service area; collecting, by the master device, learning results based on the learning data from the terminal provided with the learning data; and storing, by the master device, the collected learning results. |
| US09613383B2 |
Power plant field monitoring system and method using QR code
Power plant field monitoring system and method using a QR code in which, when a user photographs a QR code attached to a monitoring field and transmits the photographed QR code to a route server, the route server transmits matching information that matches the transmitted QR code, from among process values at the monitoring field which are collected by a main control server, to a user terminal. |
| US09613382B1 |
Systems and methods for automatically synchronizing online communities
A computer-implemented method for automatically synchronizing online communities may comprise identifying login information for a first user account associated with the first online community, accessing the first user account using the login information for the first user account, obtaining information from the first user account, and modifying, based on the information obtained from the first user account, a second user account associated with a second online community. Corresponding systems and computer-readable media are also disclosed. |
| US09613379B2 |
Trader portal system and method
Embodiments of the invention are directed to a computer-implemented trader portal system and method for use within a trading organization supporting multiple traders. The trader portal system integrates available trader related resources from multiple sources for trader viewing and utilization. The trader portal system may include administrative controls for allowing administrative configuration of the trader related resources visible to the multiple traders within the trading organization. The trader portal system may further include a source collection engine for collecting the trader-related resources from the multiple sources and a source integration engine for integrating the collected trader related resources with the trader portal system in accordance with the administrative configuration. The trader portal system may further include multiple modules accessible to the traders through a user interface, each of the multiple modules displaying at least one of the collected trader related resources as determined by the source integration engine. |
| US09613378B2 |
Distributed ranking and matching of messages
Apparatus and methods for managing messages in a computer system are described. A plurality of order/quote messages is received via an input mechanism, and the order/quote messages are ranked based on the at least one ranking value parameter at a first ranking unit. At least one top ranked order/quote message is sent from the first ranking unit to a matching unit, and the top ranked order/quote messages are matched at the matching unit. |
| US09613376B2 |
Apparatus and method for recipient distribution and tracking
An apparatus and method of maintaining beneficiary information are disclosed. The apparatus can be configured to perform the method, which may include obtaining information for one or more recipients of one or more conveyances of property, obtaining one or more digital IDs from the one or more recipients, maintaining the one or more digital IDs from the one or more recipients by periodically sending notifications to the one or more recipients, and distributing assets with the one or more digital IDs to the one or more recipients. |
| US09613374B2 |
Presentation of candidate domain name bundles in a user interface
A system and method for the generation and presentation of candidate domain names are presented. The method includes receiving, by at least one server communicatively coupled to a network, a request to access or purchase access to a software application, the request being received from a user. Keywords associated with at least one of the user, a website of the user, and a business of the user are generated and a candidate domain name relevant to the keywords is generated. A user interface is displayed including the candidate domain name. The user interface enables the user to register the candidate domain name. A plurality of candidate domain names may be generated and organized into carousels or stacks according to a common theme. The candidate domain names may be displayed on a user interface and arranged thereon according to a relevance score of the domain name bundles. |
| US09613372B2 |
System, method, and non-trasitory computer-readable storage media for displaying product information on websites
A system for displaying product information to a customer is described herein. The system includes a processor that is programmed to receive search data in response to a product search request received from the customer and retrieve product records associated with the search data from a database. Each product record is associated with a corresponding product and includes a product description and a plurality of item attributes having corresponding attribute values. The processor selects a set of the item attributes and generates a product summary for each of the products as a function of the selected set of item attributes. Each product summary includes corresponding attribute values associated with the selected set of item attributes. The processor generates and displays product information associated with each of the products being included in the search data. The associated product information includes a corresponding product summary and a corresponding product description. |
| US09613371B2 |
Dynamic taxonomy generation with demand-based product groups
A method of extending an existing product taxonomy for an inventory of products. The existing product taxonomy can include pages having a hierarchical tree structure. The method can include determining a first set of keywords. The first set of keywords can be a prediction of keywords searched above a predetermined threshold during a predetermined time period of one or more external search engines. The method also can include generating dynamic product groups based on the first set of keywords. The method further can include generating a relation graph of the dynamic product groups. The relation graph can include relation links between the dynamic product groups. The method also can include linking the dynamic product groups to pages in the existing product taxonomy to generate an extended product taxonomy. The extended product taxonomy can include the existing product taxonomy, the dynamic product groups, and the relation links of the relation graph between the dynamic product groups. The method further can include presenting to a user information about the dynamic product groups. Other embodiments are provided. |
| US09613370B2 |
Securely and efficiently processing telephone orders
An apparatus for processing telephone orders includes a communications module that establishes a telephonic connection between a customer service representative of a merchant and a customer, and an identification module that receives an identifier linking the customer to a billing profile a billing profile access module that receives electronic access to the billing profile. The billing profile includes billing information of the customer. The apparatus includes a transaction module that processes a sales order using the billing profile of the customer in response to a customer approval of the sales order. The sales order is for a product and/or a service offered by the merchant. The billing information of the billing profile is unavailable for viewing by the customer service representative. |
| US09613368B2 |
Systems and methods for providing and dynamically updating customer-specific shipping information on an on-site server
A commerce system for serving a customer of delivery services using dynamically updated data including platform services, an operations-management server maintained by a vendor, and a local commerce server and a remote computer system maintained by a delivery services company. The operations-management server is positioned at a customer location and operatively connected to the platform services. The commerce server is operatively connected to the operations-management server and operatively connected to the platform services and includes local programs configured for providing services of the delivery services company to the customer. The remote computer system is connected to the local commerce server by a network. The remote computer system includes a message-management system, wherein at least one of the message-management compartments holds update data connected to the local commerce server for updating the commerce data, and includes remote programs. The operations-management and local commerce servers run interactively on the platform services. |
| US09613367B2 |
Assessment of users feedback data to evaluate a software object
In one embodiment, feedback data of a software object is received through a sequence of cascaded GUIs. The cascaded GUIs include an interaction portion to receive the feedback data from users at a plurality of feedback levels. Further, user role weightings of the users, account weightings of enterprises associated with the users and a time weighting corresponding to a life-cycle phase of the software object are retrieved. Furthermore, average rating of the software object corresponding to each feedback level is determined as a function of the user role weightings, the account weightings, the time weighting, the feedback data corresponding to a feedback level and a number of users submitted the feedback data. The determined average ratings and rating distribution corresponding to each feedback level are graphically displayed on the interaction portion associated with a next feedback level. |
| US09613365B2 |
Methods, systems, and computer readable media for secure near field communication of a non-secure memory element payload
According to one aspect, the subject matter described herein includes a method for secure near field communication (NFC) of a non-secure memory element payload. The method includes receiving, at an NFC enabled mobile device and from a content provider, a payload. The method also includes storing the received payload in a non-secure memory element of the NFC enabled mobile device. The method further includes transferring the stored payload from the non-secure memory element of the NFC enabled mobile device to a secure memory element of the NFC enabled mobile device, wherein transferring the stored payload includes loading the stored payload into a secure reloadable payload instance. The method further includes establishing a NFC link between the NFC enabled mobile device and an NFC reader. The method further includes communicating, via the NFC link, the transferred payload from the secure reloadable payload instance to the NFC reader. |
| US09613364B2 |
Method and system of identifying a concept of a good or service for an unmet market potential
A computing device is configured to identify a concept of a good or service for an unmet market potential. A Global User Search Data file (GUSD) comprising information related to a search object is read. A morpheme combination in the search object from the GUSD is identified. The morpheme combination is compared to a first set of pre-existing terms. A first score is assigned to the search object based on the comparison, wherein a higher first score is assigned if the morpheme combination is not found in the first set of pre-existing terms. An un-successfulness of the search object is determined and a second score is assigned, wherein a higher second score is assigned the more un-successful the search object is. An aggregate of all the scores for a search term is compared to a predetermined threshold. If the aggregate score is above the predetermined threshold, the search term is identified as a concept of a good or service for an unmet market potential. |
| US09613358B1 |
System, method, and computer program for capturing a unique identifier for a merchant used in purchase transaction approval requests
A system, method, and computer program are provided for capturing a unique identifier for a merchant used in purchase transaction approval requests. A merchant is able to register with a payment card system via a merchant interface. A payment card number is associated with and provided to the merchant via the interface with instructions to perform a purchase transaction with the payment card number. The system receives requests for approval of payment card transactions, where each request includes a payment card number and a unique identifier for a merchant. For each request, the system determines whether the payment card number includes an indicator that the payment card number is for the purpose of capturing a unique identifier for a merchant. In response to receiving a request with a payment card number that includes the indicator, a unique identifier accompanying the request is automatically associated with the registering merchant. |
| US09613357B2 |
Authorizing the use of a biometric card
Embodiments of the present invention provide a system and method for authorizing the use of a biometric transaction card. Specifically, embodiments of the present invention provide a biometric card having a biometric sensor to determine whether the biometric information (fingerprint) is from human skin. In a typical embodiment, the cardholder approaches a magnetic reader with the card. The user places his/her finger on the SpO2 sensor of the card. The sensor estimates the SpO2 level. Card authorization is based, in part, on the estimated SpO2 level. |
| US09613354B2 |
Device, system and method for reducing an interaction time for a contactless transaction
Methods, devices, and systems are described for sending and receiving messages between a terminal reader and a payment device, such as a credit card. A dynamic signature is calculated on the payment device from an application transaction counter, a terminal unpredictable number, and a transaction amount, and it is sent with an application file locator (AFL) to the reader. The reader then sends a read record command to the payment device to get records associated with the AFL, among other normal processing. While the normal processing is occurring for the transaction, the dynamic signature can be recalculated and compared with that from the payment device in order to assure that nothing has surreptitiously changed the values in the messages. |
| US09613353B1 |
Passcode entry through motion sensing
A method of entering a passcode is disclosed. In one embodiment, the method includes: calculating locations of tactile inputs on the input component to interact with the passcode entry interface based at least partially on the recorded motion readings; and determining the passcode based at least in part on the tactile inputs by mapping the tactile inputs to a geometric layout of interactive elements of the passcode entry interface. |
| US09613351B2 |
Apparatus and method for commercial transactions using a communication device
An apparatus for effecting commercial transactions with a server using a transaction card via a communication device is provided. The apparatus includes a transaction device coupled with the communication device for capturing information from the transaction card and a controller for converting the captured card information into an encrypted audio signal and for transmitting the audio signal to the communication device. The communication device delivers the audio signal to the server for processing the commercial transaction. |
| US09613345B2 |
Wireless service provider system and method for activating and selling a wireless service on a wireless device
A wireless service provider system and associated methods of using the system for the sale and/or activation of wireless services is disclosed. The system includes a communication interface for a wireless device having a unique identifier. A backend system computer of the wireless service provider system can receive a unique identifier corresponding to the wireless device; authorize the activation of the wireless service corresponding to the unique identifier of the wireless device; and record, in a database, the authorized unique identifier to improve a user's experience and ease of activation/provisioning of services for the wireless device. |
| US09613343B2 |
System and method for compositing items and authorizing transactions
A method of executing an electronic financial transaction involving two parties providing information for generating a transaction document and authorizing the document to execute the transaction. The method contemplates the maker electronically transmitting a data record representative of the financial transaction directly to a payee, such as by email. The payee can then convert the data record into a transaction acceptable to a bank of first deposit, such as by printing or imaging the data record into a form acceptable to the bank, such as a standard paper check. |
| US09613342B2 |
Information processing apparatus, information processing system, and information processing method
An information processing apparatus includes an acquiring unit configured to acquire first failure information on failures that have occurred in a first device of a predetermined model of a predetermined customer, and acquire second failure information on failures that have occurred in a second device of the predetermined model; a calculating unit configured to calculate first operation information on the first device by using the first failure information, and calculate second operation information on the second device by using the second failure information; and an output unit configured to output proposal information indicating a proposal based on the first operation information and the second operation information. |
| US09613341B2 |
Calculating trust score on web based platform
A method for calculating trust level of a user on social networking sites, comprising: consolidating information related to users operatively associated with at least a web based social platform; assigning weight to each of the consolidated information; computing aggregated score for at least an information; computing weighted average of the aggregated scores of the information; and calculating trust score based on the weighted average score. It further comprises assigning a trust level to the users based upon the trust. The method enables a user to create web of trust for social contacts or friends on the web based social platform wherein the web of trust comprises of most trusted friends, average trusted friends and least trusted friends. |
| US09613339B2 |
Information exchange in the social network environment
A system and computer program product for improving information exchange in a social network environment. Actions (e.g., copying) being performed on an electronic object (e.g., e-mail) are detected. Furthermore, the entry of the electronic object in a social networking website is detected thereby identifying an association between this electronic object and this social networking website. Rule patterns are identified based on these detected actions and these associations. Indications of these associations are stored in terms of concept nodes in a hierarchical tree using the identified rule patterns. Social networking feeds of interest are then searched using the hierarchical tree as well as a current electronic object of a user (e.g., status message on a social networking feed, e-mail). The user would then be provided an opportunity to repost an information nugget from the current electronic object in one or more of these social networking feeds of interest. |
| US09613338B1 |
Reading station structures
In some examples, a reader system is provided for managing inventory items in an inventory system. The reader system may be configured to read tags associated with items stowed in an inventory holder. The inventory holder may be detachably coupled to a mobile drive unit. The mobile drive unit may move the inventory holder to a first position near an antenna of the reader system and the tags may begin to be read. While reading or at other times in the reading process, the mobile drive unit may move the inventory holder relative to the antenna. The identified tags may be compared to a manifest list of items expected to be stowed in the inventory holder. |
| US09613336B2 |
RFID logic tag
In embodiments of RFID logic tag, a radio-frequency identification (RFID) logic tag can interrogate multiple RFID tags, such as a first RFID tag that monitors the status of a first item, as well as a second RFID tag that monitors the status of a second item. The RFID logic tag receives status data as responses from the respective first and second RFID tags (and optionally, additional RFID tags). The RFID logic tag is implemented to then generate a logic signal based on a logic operation applied to the status data received from the RFID tags. |
| US09613330B2 |
Identity and access management
A computer-implemented process for an endpoint for automated fulfillment, includes: in an Automatic Fulfillment (AF) server: creating an endpoint on the AF server; selecting supported commands; and for each command, defining required and optional parameters and endpoint type specific implementation details; and in a Compliance Manager (CM): running discovery to find new endpoint and create metadata for it in the CM; for each command to be automated, filling in mappings for at least all required parameters; and enabling the command; enabling the endpoint; binding the endpoint to a business source; and ensuring that the business source uses a fulfillment process that uses the AF server. |
| US09613328B2 |
Workflow monitoring and analysis system and method thereof
A method of workflow monitoring and analysis includes: according to an image to generate at least one three-dimensional joint coordinate, and according to the three dimensional joint coordinate to generate at least one task posture information; according to a movement information to generate at least one three-dimensional track information, and according to the three dimensional track to generate at least one task track information; and according to a workpiece posture information, the task posture information, a workpiece movement information and the task track information to generate a task semanticist. |
| US09613323B2 |
Organizational agility determination across multiple computing domains
Embodiments of the present invention provide an approach for determining and/or enhancing an organization's agility across one or more computing domains. Among other things, embodiments of the present invention parse and mine organizational documents for relevant data, calculate and weight business agility scores, optimize domain elements to ensure optimal outcomes for customers, and/or provide organization agility information for transfer to consultants or the like. It is understood that these functions may be used independently or in conjunction with each other depending on the scope of improvement desired for a particular organization. |
| US09613321B2 |
System and method for establishing a dynamic meta-knowledge network
The present disclosure relates to a system and method for establishing a dynamic meta-knowledge network. More particularly, it relates to a computer implemented system and method for charting, mapping, linking, annotating, evaluating, following, broadcasting and publishing scientific, technical, medical and scholarly information, both current and historical. In an embodiment, the present system and method may be embodied in an internet application composed of a database containing scientific publication records, scientific meta-knowledge data, and user profiles. Scientific meta-knowledge stored in the database includes knowledge contexts as well as descriptive and quantitative annotations. Author names and entities within each knowledge context category and annotation category are linked to the appropriate publications. A publication webpage is generated for each publication record, and this is configured to aggregate and present stored data and links that are relevant (and specific) to each publication. |
| US09613320B2 |
Role-based product management system using proxy objects
A method and apparatus for identifying information for a product. User input selecting a proxy object in a product design on a computer system is received. The proxy object refers to a number of product standards used in the product design and is associated with a component in the product design. A role of a user is identified. A request for standards information for the component is sent to an interpreter module. The role of the user is included in the request. The standards information is received in a format based on the role of the operator such that the standards information is displayed in the computer system. |
| US09613318B2 |
Intelligent user interaction experience for mobile computing devices
A system for assessing a user interaction experience of content displayed on a mobile device, implemented by a computing processor, receives an indication of content to be displayed on the mobile device. The indication is received in response to a user attempting to access the content. The system analyzes the content to assess the user interaction experience of the content to be displayed on the mobile device. The analysis is based at least on the mobile device on which the content is to be displayed. The user interaction experience is comprised of the viewing quality of the content to be displayed on the mobile device, and/or a feasibility of user interaction with the content. Based on the user interaction experience, the system presents, on the mobile device on which the content is to be displayed, an indication of the user interaction experience and the indication of the content to be displayed on the mobile device. |
| US09613314B2 |
Fact checking method and system utilizing a bendable screen
An efficient fact checking system analyzes and determines the factual accuracy of information and/or characterizes the information by comparing the information with source information. The efficient fact checking system automatically monitors information, processes the information, fact checks the information efficiently and/or provides a status of the information. |
| US09613313B2 |
System and method for providing a recommendation of a game based on a game-centric relationship graph
One aspect of the present disclosure relates to a system for providing a recommendation for a game based on a game-centric relationship graph. The relationship graph is a graph depicting relationships between game and game users. One or more recommended games may be determined by leveraging the relationship graph. For example, recommended games may be identified based on graph proximities from candidate game nodes to a target user node or a mathematical score calculated from weight metrics of relationship branches. |
| US09613309B1 |
System and method for predicting significant events using a progress curve model
Described is system for predicting significant events using a progress curve model. The system first determines Z-score values for a predetermined period of a time series to generate a Z-score time series. The Z-score time series are partitioned into a plurality of E-periods to define time frames for progress curve model (PCM) fitting. An E-period is defined as a period of escalation and de-escalation. Finally, a future event is predicted based on an absolute Z-score value that is greater than or equal to a predetermined number. |
| US09613292B1 |
Secure multi-dimensional pattern matching for secure search and recognition
Described is a protocol for multi-dimensional secure pattern matching. The protocol is to be evaluated between two parties, P1 (or Client) and P2 (or Server). P1 holds a multi-dimensional pattern, p, and P2 holds a multi-dimensional text T (where both p and T have the same number of dimensions, but where p may be of smaller length in each dimension compared to T). P1 and P2 would then engage in a protocol that allows P1 to find out whether p is present in T or not. The security and privacy requirements are that P2 does not learn any information about the pattern p nor the result of the matching. P1 should also not learn any information about T other than whether p is present in it or not. Upon implementation of the protocol, p matches T if there exists an m× . . . ×m sub-hypermatrix (or sub-array) of T that equals p. |
| US09613289B2 |
X-ray diagnosis apparatus and image processing apparatus
According to an embodiment, in an X-ray diagnosis apparatus, a detector detects a position of a feature point in the sequentially generated X-ray images. A corrector performs a correction process such that an angle of a line segment including the feature point and a single point based on the feature point detected in any one of the sequentially generated X-ray images substantially agree with an angle based on the feature point and a single point based on the feature point detected in a new X-ray image generated after the X-ray image, thereby sequentially generating corrected images in which a position different from the feature point in the images is substantially the same. Every time each of the corrected images is newly generated by the corrector, a controller sequentially generates the corrected images, thereby displaying a moving image on a display unit. |
| US09613287B2 |
Local feature descriptor extracting apparatus, method for extracting local feature descriptor, and program
The size of a feature descriptor is reduced with the accuracy of object identification maintained. A local feature descriptor extracting apparatus includes a feature point detecting unit configured to detect feature points in an image, a local region acquiring unit configured to acquire a local region for each of the feature points, a subregion dividing unit configured to divide each local region into a plurality of subregions, a subregion feature vector generating unit configured to generate a feature vector with a plurality of dimensions for each of the subregions in each local region, and a dimension selecting unit configured to select dimensions from the feature vector in each subregion so as to reduce a correlation between the feature vectors in proximate subregions based on positional relations among the subregions in each local region and output elements of the selected dimensions as a feature descriptor of the local region. |
| US09613286B2 |
Method for correcting user's gaze direction in image, machine-readable storage medium and communication terminal
A method and mobile terminal for correcting a gaze of a user in an image are provided. The method includes detecting first eye outer points that define a first eye region of the user in an original image; setting second eye outer points different from the first eye outer points; and transforming the first eye region inside of the first eye outer points to a second eye region inside of the second eye outer points. |
| US09613283B2 |
System and method for using an image to provide search results
A system and method uses an image manipulating application to define in an object image a plurality of discrete cells. Predefined image information is substituted for image information in selected ones of the plurality of discrete cells to form a translated version of the object image. The translated version of the object image may then be provided to an image recognition capable search engine to obtain search results. |
| US09613281B2 |
Methods for performing biometric recognition of a human eye and corroboration of same
A method of biometric recognition is provided. Multiple images of the face or other non-iris image and iris of an individual are acquired. If the multiple images are determined to form an expected sequence of images, the face and iris images are associated together. A single camera preferably acquires both the iris and face images by changing at least one of the zoom, position, or dynamic range of the camera. The dynamic range can be adjusted by at least one of adjusting the gain settings of the camera, adjusting the exposure time, and/or adjusting the illuminator brightness. The expected sequence determination can be made by determining if the accumulated motion vectors of the multiple images is consistent with an expected set of motion vectors and/or ensuring that the iris remains in the field of view of all of the multiple images. |
| US09613276B2 |
Detection of human actions from video data
A video action detection system uses feature a data extractor to extract feature data from video data at detected spatiotemporal interest points. A feature data quantizer assigns the extracted feature values to bins of a feature vector. Bin values are computed from a sum of contributions of spatiotemporal points of interest that have been assigned to the bin, with a bin dependent adjustment of a size of the sum and/or the contributions. The video action detection system computes a sum of match scores between the feature vector and reference vectors for the predetermined type of action. The bin dependent adjustment of the size of the sum and/or the contributions is adapted in a training step, based on partial match scores for individual bins obtained using an initial action detector. |
| US09613275B2 |
Method and system for a mobile terminal to achieve user interaction by simulating a real scene
A method and a system for a mobile terminal to achieve user interaction by simulating a real scene are disclosed. The method comprises: formulating a scene task for a 3D virtual scene; uploading the information of the 3D virtual scene and the scene task to a server to obtain a shared link; searching for and transmitting the shared link to nearby mobile terminals, sending an invitation and waiting for participation of the nearby mobile terminals; if the invitation is received by the nearby mobile terminals, then reading the information of the 3D virtual scene and the scene task and uploading corresponding personal information by the nearby mobile terminals; and changing locations of user roles in the 3D virtual scene according to positioning information of the mobile terminal, receiving a user operation instruction to make interactions via the user roles, and recording the user behaviors corresponding to the personal information. |
| US09613269B2 |
Identifying and tracking convective weather cells
A method for tracking weather cells from a moving platform includes receiving, from a detection and ranging system, reflectivity data sampled for a volume of space and generating a feature map based on the reflectivity data, wherein the feature map is a representation of the volume of space that indicates locations with significant weather and generating a first segmented feature map based on the feature map that identifies the location and spatial extent of individual weather cells. The method further includes translating the first segmented feature map and a second segmented feature map, generated from data collected at a different point in time and/or space, to a common frame of reference and comparing the first segmented feature map to the second segmented feature map. The method further includes creating one or more track hypotheses based on the comparison of the first segmented feature map and the second segmented feature map. |
| US09613267B2 |
Method and system of extracting label:value data from a document
This disclosure provides an exemplary method and system for extracting structured label and value pairwise textual data from a textual document. According to an exemplary method, initially a layout analysis is performed resulting in one or more alternatives for grouping and ordering the textual elements of interest. Next, textual elements are tagged as including a label term, a value term or a label and value term. Finally, a sequence-based method is applied to the tagged elements to generate one or more sequence listings representative of the label and value pairwise data structure(s) and label:value pairwise data is extracted. |
| US09613266B2 |
Complex background-oriented optical character recognition method and device
A complex background-oriented optical character recognition method and device are provided. The method of the present invention includes: collecting image information to obtain a collected image; according to character characteristics, acquiring a target character region from the collected image, and taking same as a target object; extracting character edge information in the target object using a differential method to obtain an extracted image; superposing the target object and the extracted image to obtain a recovery image; conducting inversion and Gaussian filtration processing on the recovery image to obtain a processed image; searching for a target character location in the processed image; and recognizing the target character location. On this basis, accurate and quick locating and recognition of characters can be realized on the basis of effectively suppressing background noise and highlighting character information. |
| US09613264B2 |
Shape recognition using partial shapes
Shape recognition is performed based on determining whether one or more ink strokes is not part of a shape or a partial shape. Ink strokes are divided into segments and the segments analyzed employing a relative angular distance histogram. The histogram analysis yields stable, incremental, and discriminating featurization results. Neural networks may also be employed along with the histogram analysis to determine complete shapes from partial shape entries and autocomplete suggestions provided to users for conversion of the shape into a known object. |
| US09613263B2 |
Ink stroke grouping based on stroke attributes
One embodiment provides a method including: receiving a plurality of handwriting ink strokes; determining, using a processor, at least one grouping of the plurality of handwriting ink strokes, wherein the grouping is determined using spacing associated with the plurality of handwriting ink strokes and at least one attribute associated with at least one portion of the plurality of handwriting ink strokes; sending the at least one grouping to a recognition engine; receiving machine input from the recognition engine; and displaying, on a display device, the machine input. Other aspects are described and claimed. |
| US09613261B2 |
Inferring spatial object descriptions from spatial gestures
Three-dimensional (3-D) spatial image data may be received that is associated with at least one arm motion of an actor based on free-form movements of at least one hand of the actor, based on natural gesture motions of the at least one hand. A plurality of sequential 3-D spatial representations that each include 3-D spatial map data corresponding to a 3-D posture and position of the hand at sequential instances of time during the free-form movements may be determined, based on the received 3-D spatial image data. An integrated 3-D model may be generated, via a spatial object processor, based on incrementally integrating the 3-D spatial map data included in the determined sequential 3-D spatial representations and comparing a threshold time value with model time values indicating numbers of instances of time spent by the hand occupying a plurality of 3-D spatial regions during the free-form movements. |
| US09613259B2 |
System and method for matching faces
Disclosed herein are systems, computer-implemented methods, and tangible computer-readable media for matching faces. The method includes receiving an image of a face of a first person from a device of a second person, comparing the image of the face of the first person to a database of known faces in a contacts list of the second person, identifying a group of potential matching faces from the database of known faces, and displaying to the second person the group of potential matching faces. In one variation, the method receives input selecting one face from the group of potential matching faces and displays additional information about the selected one face. In a related variation, the method displays additional information about one or more face in the displayed group of potential matching faces without receiving input. |
| US09613258B2 |
Image quality assessment
This disclosure concerns image quality assessment. In particular, there is described a computer implemented method, software, and computer for assessing the quality of an image. For example but not limited to, quality of the image of a face indicates the suitability of the image for use in face recognition. The invention comprises determining (112) a similarity of features of two or more sub-images of the image (608) to a model (412) of the object which is based on multiple training images (612) of multiple different objects of that type. The model (412) is comprised of sub-models (406) and each sub-model (406) corresponds to a sub-image of the image (608). Determining similarity is based on the similarity of features of each sub-image to features modelled by the corresponding sub-model. It is an advantage that no input parameters are required for quality assessment since the quality of the image can be determined from only the similarity between the image and the same, therefore single generic, model. |
| US09613257B2 |
Global identification (ID) and age verification system and method
A multi-process identity and/or age verification process and system for user's connected to a network such as the Internet. The process and system verify the identity of the user by: verifying personal information of the user; verifying identification documentation associated with the user; and conducting an online face-to-face verification of the user over the network. |
| US09613252B1 |
Fingerprint matching method and device
A fingerprint matching method and device are provided. The fingerprint matching method includes the step of capturing a plurality of registered templates, capturing a to-be-recognized data, comparing the to-be-recognized data and the plurality of registered templates, generating a plurality of comparison scores corresponding to the registered templates which overlap the to-be-recognized data, generating a comparison result according to the plurality of comparison scores, and determining whether the to-be-recognized data is verified according to the comparison result. |
| US09613251B2 |
Fingerprint matching algorithm
A method of matching a reference fingerprint image and an input fingerprint image, represented by a first set of minutiae and a second set of minutiae, including: determining a first local neighborhood for each minutia including at least one minutia neighboring the minutia, comparing the first local neighborhoods in the first set with the first local neighborhoods in the second set to determine matched minutiae, filtering the matched minutiae based on a difference between their positions, determining a second local neighborhood for each unmatched minutia including at least one matched minutia neighboring the unmatched minutia, comparing the second local neighborhoods in the first set with the second local neighborhoods in the second set to determine further matched minutiae, filtering the matched minutiae and the further matched minutiae based on a difference between their positions, and determining whether the first and second fingerprint images are the same. |
| US09613249B2 |
Finger sensor including encapsulating layer over sensing area and related methods
A fingerprint sensor may include a substrate, and a finger sensing IC on the substrate and including a finger sensing area on an upper surface thereof for sensing an adjacent finger. The fingerprint sensor may include an encapsulating material on the finger sensing IC and covering the finger sensing area, and a bezel adjacent the finger sensing area and on an uppermost surface of the encapsulating layer. |
| US09613247B2 |
Sensing method and circuit of fingerprint sensor
A sensing method and circuit of fingerprint sensor is disclosed. In a first phase, the sensing method supplies a first to third voltages to an electrode plate to be measured, a read-out circuit of the electrode plate to be measured and a conductor adjacent to the electrode plate to be measured, respectively. In a second phase, the sensing method stops supplying the first to third voltages and supplies voltage to the conductor and connects the electrode plate to be measured to the read-out circuit so the read-out circuit reads out a measurement result of the electrode plate to be measured. According to the sensing method and circuit, the measurement result of the electrode plate to be measured is not affect by capacitors between the electrode plate to be measured and the conductor. |
| US09613246B1 |
Multiple scan element array ultrasonic biometric scanner
An ultrasonic biometric scanner includes an ultrasonic multiple scan element array with multiple scan elements. The array includes piezoelectric material such as lead zirconate titanate or polyvinylidene difluoride with a first electrode on a first surface and a second electrode on a second, opposite surface. At least one of the first electrode or the second electrode include multiple electrodes wherein the number of the multiple electrodes corresponds to a number of the multiple scan elements. A substrate is electrically coupled to the second electrode and/or the first electrode. A cover may be positioned over the first electrode. The cover has an acoustic impedance matching ultrasonic signals emitted by the piezoelectric material. |
| US09613244B2 |
2D indicia pose estimation and consequent grid localization and/or synchronization
Systems and methods of operation for a machine-readable symbol reader for estimating the relative position, orientation and/or distance of a scanned target object or item labeled with two dimensional (2D) indicia, such as a digital watermark. Such estimation information may be provided to a localization process or a decoding process to assist such processes in decoding the 2D indicia from an image of the object labeled with the 2D indicia. The machine-readable symbol reader may include an aiming system which projects a light pattern onto a target object. The reader may capture one or more images of the target object while the light pattern is projected thereon and analyze at least one characteristic of the pattern to estimate position, orientation or distance of the target object relative to the machine-readable symbol reader. Such information may be used to improve decoding of the 2D indicia. |
| US09613242B2 |
Apparatus and method for communicating with an RFID transponder
A system having a UHF RFID transceiver is adapted to communicate exclusively with a single electro-magnetically coupled transponder located in a predetermined confined transponder operating region. The system includes a near field coupling device comprising a plurality of lines connected in parallel with an unmatched load. The near field coupling device may be formed, for example on a printed circuit board with a plurality of electrically interconnected traces and a ground plane. The system establishes, at predetermined transceiver power levels, a mutual electro-magnetic coupling which is selective exclusively for a single transponder located in a defined transponder operating region. Also included are methods for selective communication with the transponder in an apparatus such as a printer-encoder. |
| US09613236B2 |
Methods for recovering RFID data based upon probability using an RFID receiver
RFID data signals from RFID tags may be recovered by determining the probabilities of transitions between data states between a series of a pairs of signal samples using a set of predetermined probabilities related to data, timing, baud rate and/or phase variables affecting the received signal and processing those determined probabilities to determine the sequence of such transitions that has the highest probability of occurrence. A second set of predetermined probabilities related to transitions in the opposite direction may be used to sequence in a reverse direction. The determination of the sequence representing the RFID tag data may be iterated in both directions until further iterations do not change the determined probabilities. |
| US09613231B2 |
Movement monitoring security devices and systems
Motion sensing devices for computer security are provided herein. In one embodiment, a security device includes a sensor for detecting movement of a computing device to which the security device is coupled, a transmitter, a processor, a memory, and instructions that are executed to receive from the sensor messages indicative of the movement of the computing device, determine if the computing device has been moved using the sensor messages, and output a warning message using the transmitter, if the computing device has been moved. |
| US09613230B2 |
Plug part for forming a plug-in connection
The plug part (10) is connectable to a mating part (1), which is used as a connector of a device (50), to form a plug-in connection. The plug part (10) includes at least one non-volatile memory (13), a communication unit (15) and a microprocessor (14). A network having such plug parts (10) can be tested by means of a testing device, which is designed to generate test signals from information stored in the memory (13), which test signals can be laid on the cable wired leading out of the plug part (10) in order to generate measurement signals. The memory (13) preferably contains a list of permissible combinations of hardware and software versions, which can be compared with the current hardware and software combination of the device (50) in order to configure the device (50) and/or authorize the device (50) for normal operation. |
| US09613227B1 |
System and method to anonymize data transmitted to a destination computing device
A method and system for anonymizing data to be transmitted to a destination computing device is disclosed. Anonymization strategy for data anonymization is provided. Data to be transmitted is received from a user computer. Selective anonymization of the data is performed, based on the anonymization strategy, using an anonymization module. The received data includes a plurality of characters encoded in a first encoding scheme, with a first subset of characters assigned to a first language. The first subset of characters are encoded in a second encoding scheme to derive a modified data. The second encoding scheme has number of bits sufficient to encode total number of characters in the first language. The modified data is anonymized to derive an anonymized data. The anonymized data is transmitted to a destination computing device. |
| US09613226B2 |
Secure access to individual information
A facility for accessing information relating to a person is described. In a reader device, the facility accesses first credentials stored in a first storage device, second credentials stored in a second storage device, and third credentials stored in the reader device. In the reader device, the facility uses a combination of the first credentials, second credentials, and third credentials to decrypt information relating to the person stored in the first storage device. |
| US09613224B2 |
Integrating a user's security context in a database for access control
Techniques are provided for integrating application-level user security context with a database. A session manager, in a middle tier that includes an application, obtains the security context of a user and establishes, in the database, a light-weight session (LWS) that reflects the security context. The security context is synchronized between the middle tier and database before application code execution. The database maintains an isolated copy of the LWS for the unit of application code executed as the security context. The database sends to the session manager the identifier of the copy of LWS. Before allowing a request from an application to be sent to the database, the session manager, transparent to the application, inserts an identifier that identifies the LWS. In this way, the database processes an application request in the context of the corresponding user's security context that is the same as the security context in the middle tier. |
| US09613223B2 |
Method for application management, corresponding system, and user device
A method for application management is provided. First, an original application is received. A license code is injected into the original application through a repackaging process to generate a repackaged application. Next, the repackaged application is published for a user device to download and install, wherein the user device executes a client program. When the user device executes the repackaged application, the license code sends a license check request to activate the client program to send a license check response according to license information of the repackaged application. The license check response indicates whether the repackaged application is allowed to be further executed. When the license check response indicates that the repackage application is not allowed to be further executed, the license code terminates the repackaged application. |
| US09613220B2 |
Secure data parser method and system
The present invention provides a method and system for securing sensitive data from unauthorized access or use. The method and system of the present invention is useful in a wide variety of settings, including commercial settings generally available to the public which may be extremely large or small with respect to the number of users. The method and system of the present invention is also useful in a more private setting, such as with a corporation or governmental agency, as well as between corporation, governmental agencies or any other entity. |
| US09613216B2 |
Encryption recommendation method and encryption recommendation device
An encryption recommendation method and an encryption recommendation device are provided. The method includes: scanning user operations on an application in a terminal, and obtaining a frequency of usage of each application; obtaining a set of frequently-used applications from the applications based on the frequency of usage of the each application; and determining, based on privacy weights of the set of frequently-used applications, at least one recommended application to be encrypted from the set of frequently-used applications. |
| US09613213B2 |
Using telemetry to reduce malware definition package size
Clients send telemetry data to a cloud server, where the telemetry data includes security-related information such as file creations, timestamps and malware detected at the clients. The cloud server analyzes the telemetry data to identify malware that is currently spreading among the clients. Based on the analysis of the telemetry data, the cloud server segments malware definitions in a cloud definition database into a set of local malware definitions and a set of cloud malware definitions. The cloud server provides the set of local malware definitions to the clients as a local malware definition update, and replies to cloud definition lookup requests from clients with an indication of whether a file identified in a request contains malware. If the file is malicious, the client remediates the malware using local malware definition update. |
| US09613211B1 |
Systems and methods for identifying suspicious text-messaging applications on mobile devices
A computer-implemented method for identifying suspicious text-messaging applications on mobile devices may include (1) identifying at least one outgoing text message on a mobile device, (2) analyzing at least one attribute of the outgoing text message identified on the mobile device, (3) determining that the outgoing text message is illegitimate based at least in part on analyzing the attribute of the outgoing text message, (4) identifying, in response to the determination, a suspicious text-messaging application that created the illegitimate outgoing text message on the mobile device, and then (5) performing, in response to the determination, at least one security action on the suspicious text-messaging application to prevent the suspicious text-messaging application from creating additional illegitimate text messages on the mobile device. Various other methods, systems, and computer-readable media are also disclosed. |