| Document | Document Title |
|---|---|
| US09614938B2 |
Method and apparatus for indicating a frame type using a preamble
Disclosed are a method and a device for transmitting a data block. The method involves generating and transmitting a physical layer protocol data unit (PPDU) that includes a short training field, a long training field and a signal field. The signal field includes a frame type field that has a length of one bit and indicates whether the PPDU includes a control medium access control (MAC) frame. The device is capable of performing the method. |
| US09614936B2 |
Method and apparatus for processing MPEG media transport protocol packets
Disclosed herein are a method and apparatus for processing MMTP packets. When an MMTP packet is transmitted, the packet processing apparatus calculates a reference value from partial field values of a reference MMTP packet header, and inserts the calculated reference value into the compressed header. By the reference value, MMTP packets may be correctly distinguished and may be correctly referred to when there are two reference MMTP packets in which the lower 5 bits of packet sequence numbers are identical to each other, or even when the number of reference MMTP packets is a multiple of 256. |
| US09614934B2 |
Methods and systems for harvesting comments regarding users on a network-based facility
Systems and methods for harvesting comments regarding users on a network-based facility are described. The method involves presenting a single input interface via a communications network that includes input mechanisms. The input mechanisms include a first input mechanism facilitating user input of comment information that pertains to a first user and a second input mechanism facilitating user input of comment information that pertains to a second user. The method further involves receiving the comment information via the communications network. The comment information is provided through the single input interface and pertains to the first user and the second user. |
| US09614931B2 |
Identifying a resource set require for a requested application and launching the resource set in a container for execution in a host operating system
Methods and systems for providing one or more software applications. The methods and systems involve receiving an application request from a user device identifying, at least, a software application to be provided by a host computer server; providing a resource library for the host computer server that defines the resources required for providing each software application; identifying, from the resource library, a set of resources required for providing the requested software application, the set of resources includes at least one resource required for an application operating system to support the requested software application; and providing the requested software application with the set of resources. The application operating system can be different from a host operating system at the host computer server. The set of resources can be launched as a containerized resource instance, which is operationally isolated from other containerized resource instances provided by the host computer server. |
| US09614926B2 |
Parallel I/O write processing for use in clustered file systems having cache storage
In one embodiment, a method includes using an owner gateway node to write data for a fileset, determining whether to utilize other gateway nodes to handle a portion of write traffic for the fileset, selecting a set of eligible gateway nodes based on: a current internal workload, a network workload, and recent performance history data in regard to workload distribution across the other gateway nodes, assigning and defining a size for one or more write task items for each gateway node in the set based on a current dynamic profile of each gateway node, providing availability to in-memory and/or I/O resources at each gateway node in the set to handle assigned write task items, and distributing workload to the set of eligible gateway nodes according to the size for each of the assigned write task items for each individual gateway node in the set of eligible gateway nodes. |
| US09614925B2 |
Intelligent file pre-fetch based on access patterns
Files and/or file updates can be pre-fetched from a server to reduce file access periods as well as shift network usage from high traffic periods to low traffic periods. For example, a file that was previously expelled from a cache can be pre-fetched from the server prior to a future period in which a client is likely to re-access the file. As another example, a file update for a file that remains stored in the cache can be pre-fetched from the server prior to a future period in which a client is likely to re-access the file. The file update may then be used to update the stored file. The file and/or updated-file can then be provided directly from the cache to the client when the client re-accesses the file. |
| US09614922B2 |
Switching of electronic social presence between devices
A processor implemented method, system, and/or computer program product switches an electronic social presence between a first device and a second device. An electronic signal indicating a signing in to a social presence server by the first device is received. A determination is made as to whether the first device and the second device are physically located farther apart than a predetermined distance. In response to determining that the first device and the second device are physically located farther apart than the predetermined distance, the first device signs out from the social presence server, the second device signs in to the social presence server, and a history associated with the electronic social presence is transferred from the first device to the second device. |
| US09614921B2 |
Facilitating user interactions based on proximity
Techniques are described for providing location-based information and functionality to people and computing devices in various ways. In at least some situations, the techniques include enabling multiple people in a common geographic area to interact in various ways, such as via devices capable of communications (e.g., cellular telephones, computing devices with wired and/or wireless communications capabilities, etc.). In addition, the techniques include enabling the creation and maintenance of location-based virtual groups of users (also referred to as “clouds”), such as for users of mobile and/or fixed-location devices. Such clouds may enable various types of interactions between group members, and may be temporary and/or mobile. |
| US09614910B2 |
Maintenance of a fabric priority among operations in related fibre channel exchanges
Provided are a method, a system, and a computer program that use a Fibre Connection (FICON) protocol, in which a first device that is coupled to a second device receives an outbound exchange from the second device, wherein one or more Fibre Channel frames of the outbound exchange have a priority indicated by the second device. The first device responds to the second device with an inbound exchange, wherein one or more Fibre Channel frames of the inbound exchange have an identical priority to the priority indicated by the second device in the outbound exchange. In additional embodiments, priority is maintained across related exchange pairs. |
| US09614909B2 |
High speed asynchronous remote mirroring
A method for generating remote replicates of a logical volume at a remote site, the method comprises performing a plurality of replication cycles for generating a plurality (N) of points in time replicates of the logical volume at the remote site. Wherein for each positive integer n that ranges between 2 and N, a performing of a n'th replication cycle comprises: calculating in parallel and by multiple computerized resources of a storage system, multiple n'th point in time differences of multiple subsets of the logical volume; wherein n'th point in time differences of different subsets are calculated by different computerized resources; wherein a n'th point in time difference of a subset is a difference between an (n−1)'th point in time content of the subset and an n'th point in time content of the subset; and sending, in parallel, the multiple n'th point in time differences to the remote site. |
| US09614907B2 |
Expediting content retrieval using peer-to-peer networks
A download manger running on a computer system identifies an in-progress download of content by the computer system directly from a content system. The download manager causes the computer system to join a peer-to-peer network in which the content is being shared. The computer system starts to receive data blocks of the content from peer-to-peer network, as it continues the download from the content system. Based on the receipt of the content from the peer-to-peer network and from the content system, the download manager determines whether the computer system should rely primarily on the peer-to-peer network instead of the content system for receiving the content. If a determination is made to rely on the peer-to-peer network instead of the content system, the download manager terminates the download from the content system and continues receiving data blocks of the content from the peer-to-peer network. |
| US09614906B1 |
Application-specific connectivity loss detection for multicast virtual private networks
An egress network device of a point-to-point (P2P) tunnel can receive an LSP Ping message via the P2P tunnel from an ingress network device of the P2P LSP, wherein the LSP Ping message specifies a label that the egress network device associates with a service provided to the egress network device via the P2P tunnel. In response to receiving the LSP Ping message, the egress network device can store an association between the label and the P2P tunnel. The egress network device also uses a fault detection network protocol session over the P2P tunnel to monitor a state of the P2P tunnel. In response to detecting based on the fault detection network protocol session that the state of the P2P tunnel is down, the egress network device determines the service is unavailable from the ingress network device via the P2P tunnel, and selects a new source to provide the service. |
| US09614904B2 |
Cloud processing system and method for synthesizing objects based on vehicle aggregation location
A cloud computing system includes a network interface for interfacing with a wide area network. At least one wireless transceiver engages in bidirectional communication with a plurality of vehicle cloud processing devices within a corresponding plurality of vehicles in at least one vehicle aggregation location. A network control device receives requests for at least one cloud computing service via the wide area network and facilitates the at least one cloud computing service via the bidirectional communication with the plurality of vehicle cloud processing devices. |
| US09614900B1 |
Multi-process architecture for a split browser
A multi-process browser architecture is provided that splits the browser process and the renderer processes. The browser process may run on a user device and the renderer processes may run on a renderer server accessible by the user device. The browser process running on the user device can direct the renderer server to generate a new renderer process each time a user elects to open a new browser window or tab. The renderer process running on the renderer server can determine what content resources are needed to render a page and request the resources. Once the content resources are obtained, the appropriate renderer process can begin generating a layout of the page. The renderer process may transmit the layout to the browser process such that the page can be displayed on the user device. |
| US09614895B2 |
File transfer using XML
A tangible, machine readable storage medium stores instructions and implements a method when the instructions are executed by a processor. A source file is received by a gateway engine. The source file is a binary file. The source file is portioned into multiple parts by a breakdown engine. The multiple parts are transferred by a reliable transfer engine using a single port according to a messaging protocol to transfer messages reliably between nodes in the presence of any of software failures, component failures, system failures, or network failures. The multiple parts are reassembled into a copy of the source file by a reassembly engine. |
| US09614894B1 |
On-the-fly media-tagging, media-uploading and media navigating by tags
A media item on a device may be tagged as belonging to one or more groups. The tagged media item may then be loaded to a Media Server, thereby making the tagged and loaded media item immediately sharable amongst several devices. A container for each tag may be created in the Media Server, which container may comprise references to the media tagged by the user. A user may then be presented or provide such tags as navigation cues for navigation within his or her media library of the Media Server, thereby enabling the user to more easily recall where their media items are stored and to provide ready access thereto. Tagging and the process of applying or associating tags to media items may improve recall when users hunt for their media. |
| US09614893B2 |
Method, apparatus and system for auto-synchronization of compressed content files
An auto-synchronization method, apparatus, and system for synchronizing compressed content file automatically in such a way of tracing the modification history of source files of the compressed content file and synchronizing the modified source files selectively are provided. The portable device includes a radio communication unit configured to connect to the synchronization server to transmit and receive data related to the compressed content file, a storage unit configured to store at least one of the compressed content file, compressed content file information, and source file information related to source files constituting the compressed content file, and a control unit configured to detect a synchronization request signal generated by an event modifying the compressed content file, extract at least one modified first source file from the compressed content file based on the source file information, and synchronize the extracted first source file with a second source file matching among source files stored in a synchronization server. |
| US09614892B2 |
Method and system for measuring display performance of a remote application
This disclosure describes a performance-monitoring system that computes a display performance metric of a remote application. During operation, the system performs a sequence of input events, and receives information which updates a graphical user interface (GUI). The GUI displays a sequence of frames rendered by a remote application in response to the input events. The system then samples colors at a number of pivot points on the GUI, and matches the a respective frame to a previously performed input event based on the sampled colors. The system subsequently computes a display performance metric for the remote application based on the frames and the corresponding input events. |
| US09614890B2 |
Acquiring and correlating web real-time communications (WEBRTC) interactive flow characteristics, and related methods, systems, and computer-readable media
Embodiments include acquiring and correlating Web Real-Time Communications (WebRTC) interactive flow characteristics, and related methods, systems, and computer-readable media. In one embodiment, a method for acquiring and correlating characteristics of WebRTC interactive flows comprises receiving, by an acquisition agent of a WebRTC client executing on a computing device, a peer connection initiation dialog for establishing a WebRTC interactive flow. The method further comprises determining, by the acquisition agent, one or more characteristics of the WebRTC interactive flow based on the peer connection initiation dialog. The method additionally comprises receiving, by a correlation agent, the one or more characteristics of the WebRTC interactive flow from the acquisition agent, and storing the one or more characteristics of the WebRTC interactive flow. The method also comprises correlating, by the correlation agent, one or more stored characteristics, and generating, by the correlation agent, one or more interaction records based on the correlating. |
| US09614889B2 |
Autonomic content load balancing
Techniques are disclosed for providing autonomic content load balancing. A programmatic selection is made from among alternative content versions based upon current conditions. Preferably, the alternative selectable versions specify content to be used in a Web page, and a version is selected responsive to receiving a request for the Web page. The selectable version may comprise the Web page, or a component of a Web page may have selectable versions. Optionally, the Web page may include more than one component with dynamically-selectable content. In this case, the versions may be selectable independently of one another. |
| US09614888B2 |
Picture coding device, picture coding method, and picture coding program, and picture decoding device, picture decoding method, and picture decoding program
A picture coding device partitions differential information between a coding target picture and a prediction target picture into sub blocks and codes the partitioned sub blocks. The device codes significant sub block information that represents whether or not all the values of differential coefficients belonging to the sub block are zero and codes significant differential coefficient information that represents whether or not the value of the differential coefficient is zero. A context index processing unit derives a context used for coding the significant sub block information and a context used for coding the significant differential coefficient information of the differential coefficient that is a coding target based on an addition equation using the significant sub block information of a coded sub block that is horizontally neighboring to the coding target sub block and the significant sub block information of a coded sub block that is vertically neighboring. |
| US09614885B2 |
Operational management solution for media production and distribution
A method for managing tasks and user operations on media using a model of resources management dealing with the complexity of situation which occur in a production/distributions system is provided. The method is based on a workplace infrastructure, a task-oriented user interface and a work package management system. The method optimizes operations in media production/distribution environment through a workflow-based user interface that handles Work packages, Workplaces, Tasks, Assets and Contents. |
| US09614884B2 |
System and method of optimizing digital media processing in a carrier grade web portal environment
A computer implemented method includes storing generated digital media created by each portal server of a plurality of portal servers in a destination accessible by at least one of a plurality of HTTPD servers in response to a request for web content including the generated digital media. Additionally, the method includes determining that a subsequent request for digital media received by an HTTPD server of the plurality of HTTPD servers is for generated digital media created by any of the plurality of portal servers in the destination and accessible by the HTTPD server. Furthermore, the method includes serving the generated digital media from the HTTPD server to a browser. |
| US09614875B2 |
Scaling a trusted computing model in a globally distributed cloud environment
A distributed cloud environment system comprising: a repository; a plurality of cloud managed nodes with a client program interface; a plurality of service management components with a service management component interface; a central trusted computing platform service in communication with the repository, the plurality of cloud managed nodes and the plurality of service management components, comprising: a first interface for communication with the client program interface in each of the plurality of cloud managed nodes through a first single touch point; and a second interface for communication with the service management component interface for the plurality of service management components through a second single touch point. The central trusted computing platform service manages interaction of the plurality of service management components with the plurality of cloud managed nodes, and the interaction of the plurality of cloud managed nodes with the repository. |
| US09614871B2 |
Cloud-based surveillance with intelligent tamper protection
In one embodiment, a security system includes a central communication unit and a first surveillance device. The central communication unit is communicatively connected over a network to cloud storage, by way of a first transmission channel and a second transmission channel. The second transmission channel is redundant with the first transmission channel. The first surveillance device configured to record first surveillance data, and is communicatively connected to the central communication unit by way of a third transmission channel and a fourth transmission channel. The fourth transmission channel is redundant with the third transmission channel. The first surveillance device is configured to transmit the first surveillance data to the central communication unit, and the central communication unit is configured to transmit the first surveillance data to the cloud storage. |
| US09614870B2 |
Method of DDoS and hacking protection for internet-based servers using a private network of internet servers by executing computer-executable instructions stored on a non-transitory computer-readable medium
A method of DDoS and hacking protection for internet-based servers using a private network of internet servers utilizes multiple data streams sent over a network of proxy servers to mitigate malicious attacks and ensure fast connections from a user to a destination server. The destination server is hidden from the user and the redundancy of the proxy network serves to maintain security and connection quality between the user and the destination server. |
| US09614869B2 |
System and server for detecting web page changes
Disclosed embodiments include a distributed system and server for detecting changes to web pages comprises (a) a Web Change Detection (WCD) server connected to the network, and (b) one or more WCD agents stored on the WCD server configured to be executed directly on a web browser to detect web page changes. The WCD comprises (a) an agent storage module configured to store the WCD agents, (b) a WCD repository to store a WCD information regarding the web pages in the server memory, and (c) a WCD changes detector configured for receiving information sent by the WCD agents and detecting changes on the web pages. The WCD system relies on the web users accessing sites to collaboratively detect the changes on the web pages, eliminating the need for crawler estimates of web-page changes. |
| US09614867B2 |
System and method for detection of malware on a user device using corrected antivirus records
Disclose are system, method and computer program product for detection of malware on a user's computing device. An exemplary method comprises: detecting, by an antivirus application executing of the user's computing device, that an antivirus record is activated on the computing device for detecting a maliciousness of a software object, the antivirus record having a selected status indicator indicating at least one of: a working record, a test record, or an inactive record; in response to detecting the antivirus record having working or test status, checking, by the antivirus application, for a correction of the antivirus record with an antivirus server, wherein said correction includes a change in the status of the antivirus record; in response to receiving from the antivirus server the correction of the antivirus record, using by the antivirus application said correction for processing of the software object. |
| US09614864B2 |
Exposure of an apparatus to a technical hazard
Embodiments of the invention are directed to systems, methods and computer program products for determining exposure of an apparatus to a technical hazard and prioritizing technical hazards. An exemplary system is configured to: determine an impact associated with a technical hazard on the apparatus, the impact being initiated by a second apparatus; determine a probability of occurrence of the technical hazard; and determine the exposure of the apparatus based on the impact and the probability. |
| US09614863B2 |
System and method for analyzing mobile cyber incident
A system and method for analyzing mobile cyber incidents that checks whether codes attacking the weaknesses of mobile users are inserted into collected URLs and whether applications are downloaded and automatically executed, without the agreement of users, so that if the mobile cyber incidents are analyzed through the manual analysis of a manager, the applications to be analyzed manually can be reduced. |
| US09614859B2 |
Location based authentication of users to a virtual machine in a computer system
An apparatus and method uses location based authentication of a user accessing a virtual machine (VM) by using the physical location of the virtual machine as a criteria for the authentication. When a user requires a logical partition to run in a known, specified physical location, the user specifies the physical location when the VM is created. The specified physical location is then incorporated into the user authentication process. Users are challenged and must know the physical location in order to be authenticated to the system. When a “disruptive event” in the cloud environment occurs that necessitates moving the VM to another location, the original physical location is stored so the virtualization manager later can automatically relocate the VM back to its original physical location. |
| US09614857B2 |
Supervised online identity
Technologies to facilitate supervision of an online identify include a gateway server to facilitate and monitor access to an online service by a user of a “child” client computer device. The gateway server may include an identity manager to receive a request for access to the online service from the client computing device, retrieve access information to the online service, and facilitate access to the online service for the client computing device using the access information. The access information is kept confidential from the user. The gateway server may also include an activity monitor module to control activity between the client computing device and the online service based on the set of policy rules of a policy database. The gateway server may transmit notifications of such activity to a “parental” client computing device for review and/or approval, which also may be used to update the policy database. |
| US09614856B2 |
Image forming apparatus supporting peer-to-peer connection and access point operation and method of controlling peer-to-peer connection and access point operation thereof
A method of controlling a peer-to-peer (P2P) connection of an image forming apparatus that supports the P2P connection includes: receiving in the image forming apparatus a P2P connection request from an external wireless device; checking a device type of the wireless device by the image forming apparatus; determining whether the device type corresponds to connection restricted device types; and when the device type is the connection restricted device type, blocking a P2P connection to the wireless device by the image forming apparatus, and when the device type is not the connection restricted device type, P2P connecting the image forming apparatus to the wireless device. |
| US09614850B2 |
Disabling prohibited content and identifying repeat offenders in service provider storage systems
Objects in a shared storage system can be marked as including prohibited content. Incidents that result in objects being so marked can be stored in an incident history associated with a user responsible for those objects. The incident history can be processed to identify repeat offenders and modify access privileges of those users. However, when objects are shared by one user with another user, prohibited content is blocked from being shared, while the remainder of the shared objects can be accessed by the other user. Functions that allow sharing of content are implemented so as prevent sharing of prohibited content with another user, while allowing other content to be shared. If a group of files or objects is shared, then the presence of prohibited content in one object in the group results in that prohibited content not being shared, but the remaining files or objects are still shared. |
| US09614846B2 |
Machine-to-machine network assisted bootstrapping
The service layer may leverage the access network infrastructure so that applications on a device may bootstrap with a machine-to-machine server without requiring provisioning beyond what is already required by the access network. |
| US09614845B2 |
Anonymous authentication and remote wireless token access
Provided is a method for operating an authentication server for authenticating a user who is communicating with an enterprise via a network. The method include receiving, via the network, a first authenticator including first information from a low energy wireless device received via a user device wirelessly, and storing the first authenticator. When the authentication service later receives, from the enterprise, a request to authenticate the user, the authentication server transmits an authentication request to the user device via the network requesting that the user read information from the low energy wireless device using the user device. The information received from the low energy wireless device in response to the authentication request is then used authenticate the user by comparing the information received from the low energy wireless device due to the authentication request with the stored first authenticator. |
| US09614844B2 |
Systems and methods to authenticate identity for selective access to information relating to property
Credential and/or location data included in data received by a networked system from a device that communicated the data to the networked system may be processed to determine if the credential data and/or location data validate an identity of a user (e.g., a guest, traveler, patron) and/or a location of the user based on a location of the device when the data is communicated. The data may be review data and the credential and/or location data may be included in review data. The device and/or the networked system may generate a location history database from location data from the device or other system that is periodically logged from multiple locations at different times during an event (e.g., a stay at a vacation rental). Data from the database may be used to determine if a location for a communication is with a threshold of an allowable distance from an allowable location. |
| US09614842B2 |
Device and method of setting or removing security on content
A device for removing security on content using biometric information includes a memory configured to store content on which security has been set based on first biometric information of a user; and a controller configured to obtain second biometric information of the user, which is of a different type than the first biometric information, and remove the security on the content based on the second biometric information, in response to a user input for executing the content. |
| US09614841B2 |
Voice over IP based biometric authentication
A request from a party is received by a receiver from a remote system. The request from the party is received when the party attempts to obtain a service using the remote system. A selective determination is made to request, over a network, authentication of the party by a remote biometric system. A request is sent to the remote system for the party to provide a biometric sample responsive to determining to request authentication of the party. The service is provided contingent upon authentication of the party by the remote biometric system. |
| US09614838B1 |
Taking a picture of a one-time use passcode and using the picture to authenticate
Techniques involve a user taking a picture of a current one-time use passcode (OTP) and using the picture to authenticate. Such techniques alleviate the burden and frustration of the user having to manually type in the current OTP. Additionally, the user will not trigger a lockout via accidental typing errors. Furthermore, the current OTP can be augmented to include more than a string of six or eight alphanumeric characters for stronger security (e.g., by using non-alphanumeric characters, by capturing multi-digit seven-segment LCD display patterns, by using a QR code, by using a randomly selected image, etc.). One technique involves taking a picture of an OTP provided by a user. The particular technique further involves extracting the OTP from the picture and performing an authentication operation based on the OTP extracted from the picture to determine whether the user is authentic. |
| US09614837B2 |
Systems and methods for verifying human interaction with a computer interface
Exemplary methods and systems for verifying human interaction with a computer interface are described herein. An exemplary method includes a human-interaction verification system detecting a request by an access device to access network-based content, providing, for display by the access device, a visually dynamic representation of one or more security images associated with a passcode in response to the access request, receiving, by way of the access device, challenge-response input associated with the visually dynamic representation of the one or more security images, and performing an access operation based at least in part on a comparison of the challenge-response input to the passcode. |
| US09614835B2 |
Automatic provisioning of a device to access an account
A system for bootstrap provisioning of a device is provided. A vouching device is provisioned to access a bootstrap account of a bootstrap account provider and a secondary account of a secondary account provider. The bootstrap account provider stores an indication of the secondary account, and the secondary account provider stores verification data to verify a certification of the vouching device. A target device is provisioned to access the bootstrap account of the bootstrap account provider. The target device receives from the bootstrap account provider an indication that the target device is provisioned with the secondary account provider. The target device directs generation of a certification by the vouching device of target authentication data of the target device. The target device then sends the certification to the secondary account provider to effect the provisioning of the target device to access the secondary account. |
| US09614834B2 |
Permission management method, apparatus, and terminal
A permission management method, apparatus, and terminal. The permission management method includes obtaining an installation package of a first application program, where the installation package carries a first certificate and permission request information of the first application program; next, determining, according to the permission request information, a first permission that the first application program requires during running, where the first permission is a system administrator permission of a system; and then, granting the first permission to the first application program according to the first certificate of the first application program. In this way, the first permission that the first application program requires during running is granted to the first application program. |
| US09614832B1 |
Access control system that detects static electricity
An access control system removes the human element from static protection by detecting a level of static energy when the user attempts to authenticate to the access control system, and when the user's detected level of static energy exceeds a defined threshold, access is denied until the user discharges the static energy. A static energy detection mechanism in a badge reader includes two conductive plates that form a first capacitor, and the space between an electrically conductive badge and one of the conductive plates on the badge reader forms a second capacitor. Using these two capacitors, the level of static energy on the user can be measured by the sum of the voltage across these two capacitors as the user presents the badge to the badge reader. The access control system assures the user is properly grounded before allowing access to an area, equipment, etc. |
| US09614831B2 |
Authentication and secure channel setup for communication handoff scenarios
Persistent communication layer credentials generated on a persistent communication layer at one network may be leveraged to perform authentication on another. For example, the persistent communication layer credentials may include application-layer credentials derived on an application layer. The application-layer credentials may be used to establish authentication credentials for authenticating a mobile device for access to services at a network server. The authentication credentials may be derived from the application-layer credentials of another network to enable a seamless handoff from one network to another. The authentication credentials may be derived from the application-layer credentials using reverse bootstrapping or other key derivation functions. The mobile device and/or network entity to which the mobile device is being authenticated may enable communication of authentication information between the communication layers to enable authentication of a device using multiple communication layers. |
| US09614828B1 |
Native authentication experience with failover
Disclosed are various embodiments for providing a native authentication experience with failover. If a particular authentication approach is supported by a network service, an application authenticates with the network service according to the authentication approach using an authentication factor received via a platform-specific interface. If the particular authentication approach is not supported, code-based linking may be employed to authenticate via another application that is authenticated with the network service. |
| US09614826B1 |
Sensitive data protection
A computer-implemented method for protecting sensitive data is described. In one embodiment, the method includes identifying data stored at a first storage system. The identified data is classified as sensitive data. The method includes copying at least a portion of the identified sensitive data from the first storage system, transferring the copied portion of the identified sensitive data from the first storage system to a file stored at a second storage system, and storing a virtual symbolic link at the first storage system. The virtual symbolic link includes information regarding the file stored at the second storage system. |
| US09614825B2 |
Collaborative computing community role mapping system and method
A role mapping method and system for a collaborative computing environment in provided. A set of permissions defining access to a generic business component for a named permission set is stored in a database. The set of permissions for the named permission set are mapped to an abstract role. Based on these mappings, access permissions to a business component instance within a community can be set. |
| US09614823B2 |
System, method, and computer program product for a pre-deactivation grace period
A system, method, and computer program product are provided for a pre-deactivation grace period on a processing device (e.g., mobile device). In operation, a deactivation request is detected for a deactivation event. Further, the commencement of the deactivation event is delayed for a predetermined time period, in response to the deactivation request. Additionally, the deactivation event is commenced, after the predetermined time period. To return to full functionality of the processing device while in the deactivation grace period all that may be required is entry of a authentication information (e.g., password) that is weaker than a stronger authentication information initially used to log into the processing device. |
| US09614819B2 |
Method and apparatus for securing clock synchronization in a network
Aspects of the disclosure provide a method that includes receiving a first packet through a network at a first device. The first packet includes a first message generated according to a precision time protocol and a first encapsulation that encapsulates one or more fields of the first message. Further, the method includes security-verifying the first packet based on the first message and the first encapsulation, and processing the first message according to the precision time protocol after the first packet is security-verified. |
| US09614818B2 |
Key generation and broadcasting
Embodiments provide techniques generating and managing encryption keys within a computing infrastructure. Embodiments provide a key publisher that generates and maintains key pairs in a list at a configurable interval. In addition, the key publisher publishes the list to other components within the computing infrastructure. Embodiments also provide a key consumer that downloads the list of encrypted key pairs and maintains an active window of keys to can be accepted from client devices that communicate sensitive data to the computing infrastructure. If the key consumer receives a key from a client device that is outside of the active window yet that corresponds to a future key pair in the list, the key consumer advances the active window towards the future key pair. |
| US09614816B2 |
Dynamic encryption for tunneled real-time communications
A system performs tunneling for real-time communications (“RTC”). The system establishes an unencrypted tunnel between a tunneling server and a user equipment (“UE”). Upon establishing the unencrypted tunnel, the UE creates a socket on the unencrypted tunnel. The system determines that the socket requires encrypted RTC, and establishes an encrypted tunnel between the tunneling server and the UE. Upon establishing the encrypted tunnel, the UE moves the socket from the unencrypted tunnel to the encrypted tunnel, and the system performs the encrypted RTC via the socket over the encrypted tunnel. |
| US09614814B2 |
System and method for cascading token generation and data de-identification
A computer-implemented method for de-identifying data by creating tokens through a cascading algorithm includes the steps of processing at least one record comprising a plurality of data elements to identify a subset of data elements comprising data identifying at least one individual; generating, with at least one processor, a first hash by hashing at least one first data element with at least one second data element of the subset of data elements; generating, with at least one processor, a second hash by hashing the first hash with at least one third data element of the subset of data elements; creating at least one token based at least partially on the second hash or a subsequent hash derived from the second hash, wherein the token identifies the at least one individual; and associating at least a portion of a remainder of the data elements with the at least one token. |
| US09614811B1 |
Collective objects management system with improved object data base management
A collective objects data base management system for objects such as documents contained in file folders in drawers of file cabinets. Each file folder has an electrical circuit with a visible indicator mounted on the file folder. Each folder circuit has an object receptacle microcontroller with a unique system address which enables generation of a response signal whenever an incoming address from a source is a match and activation of the visible indicator. An object container microcontroller periodically polls the object receptacle microcontrollers in the cabinet and stores an updated version of the cabinet object data base. The cabinet object data base contents are sent to a host computer, which maintains the system data base. |
| US09614809B2 |
Messaging system and method
A method of cross-platform messaging including receiving, by a messaging system, at least one initial message having a message format, an initial message layout and data indicative of at least one user associated with the at least one initial message, and before delivery to a destination communication device associated with the at least one user, converting, by the messaging system, an initial message into an adapted message, and facilitating, by the messaging system, delivery of the adapted message to the destination communication device. The adapted message is characterized by, at least, an adapted message layout, and the adapted message layout differs from the initial message layout in a characteristic associated with respective message layout such as number of media objects, a graphical image of a media object, a size of a placeholder related to a media object, and a location of a media object within a respective message layout. |
| US09614808B1 |
System and method for managing and displaying data messages
A system and method for managing and displaying data messages includes a computing device configured to receive stream data, assign data messages of the stream data to one or more display columns of a graphical user interface, and display the data messages in the assigned columns. The stream data may be embodied as short data messages such as text messages having predetermined maximum character length. The data messages may be assigned to the display columns based on meta-data associated with the data messages such as the author of the data message, the source of the data message, and/or the type of the data message. |
| US09614806B2 |
Communicating information describing activity of computer system users among computer system users
A computer-implemented method receiving receives information describing a current or future activity from a user of a computing system via a mobile device. The current activity is an activity occurring at a current time when the information is received, while the future activity is an activity occurring at a future time relative to a time when the information is received. The method transmits the information describing the current or future activity to a backend database coupled to the Internet and remote from the mobile device. The information describing the current or future activity is accessible to at least one recipient having access privilege to information associated with the user and describing the current or future activity via the Internet. |
| US09614802B2 |
Sharing content within an evolving content-sharing zone
A user selects a content item that he wishes to send. He then performs a “sending” gesture and specifies an initial “content-sharing zone.” In order to be eligible to receive the selected content item, a receiving device must be located within the content-sharing zone. However, the content-sharing zone can evolve over time. It can grow in size, change shape, or move (e.g., it can remain centered on the sending user as he moves). A potential recipient makes a “receiving” gesture, and, if the location of the receiving device is located within the evolving content-sharing zone, as currently defined, then the content item is sent from the sending device to the receiving device (either directly or via a content server). A maximum size or duration of the evolving content-sharing zone can be specified. Other restrictions can be stated so that, for example, only intended recipients can receive the content item. |
| US09614799B2 |
System and method for operating mesh devices in multi-tree overlapping mesh networks
A method for a first mesh device associated with two mesh networks to serve as a conduit in an overlapping mesh network environment comprises associating with both a first access point over a first mesh network and a second access point over a second network, wherein each access point manages a respective mesh network; responsive to receiving a neighbor information broadcast from a first neighboring mesh device in the first mesh network, updating a neighborhood table; responsive to receiving a neighbor information broadcast from a second neighboring mesh device in the second mesh network, updating the neighborhood table; responsive to a request to transmit a message from a device in the first mesh network to a destination in the second mesh network, determining a next device, wherein the next device is on a path towards the destination in the second mesh network; and transmitting the message to the next device. |
| US09614795B2 |
Persistent format conversions
Methods, systems, and apparatus, including computer programs encoded on a computer-readable storage medium for persistent format conversions. One of the methods includes receiving an original communication to be routed from a first user to a second user, wherein the original communication is received in a first format; converting, based a format conversion rule, the original communication into a second, different format; routing the original communication to the recipient in the second format; receiving a response communication related to the original communication and to be routed from the second user to the first user; and based on determining that the response communication is responsive to the original communication, converting the response communication into the first format prior to routing the communication to the first user. |
| US09614794B2 |
Message consumer orchestration framework
In a decoupled messaging system, a producer device sends produced messages to a message fabric. The message fabric either stores the received message in designated queues, from which consumer devices may retrieve the messages, or broadcasts the messages to consumer devices that subscribe to topics assigned to the messages. A message consumption orchestrator service gathers capabilities information for the message producer, the message fabric, and the message consumer, and configures resources allocated for the message consumer to more fully optimize message throughput. Further, the message consumption orchestrator identifies patterns in changes of the rate of produced messages, i.e., through analysis of historical data and/or received information. The message consumption orchestrator configures resources for the message consumer to account for predicted need based on the identified patterns. |
| US09614792B2 |
Method and apparatus for processing messages in a social network
In one embodiment, the present invention is a method and apparatus for knowledge generation and deployment in a distributed network. In one embodiment, a method for processing messages in a social network includes receiving a new message from a first node in the network, the new message including a query, providing the first node with an answer to the query, if the answer is located in a repository, and initiating generation of the answer, if the answer is not located in the repository. |
| US09614788B2 |
All delivered network switch
Methods and systems for operating a packet switch that communicates packets with error indication, including the steps of: receiving a packet comprising an error detection field; utilizing the error detection field to identify an error in the packet; marking the occurrence of the error in an error propagation field in the packet; updating the value of the error detection field; and forwarding the modified packet, with the updated value of the error detection field and the error propagation field, according to information carried in the packet. |
| US09614785B1 |
I/O data interface for packet processors
Systems and methods to process packets of information use an on-chip information processing system configured to receive, resolve, convert, and/or transmit packets of different packet-types in accordance with different protocols. A first packet-type may use a protocol for wired local-area-networking (LAN) technologies, such as Ethernet. A second packet-type may use a proprietary protocol. The proprietary protocol may be used to exchange information with one or more packet processing engines, such as neural processing engines. |
| US09614782B2 |
Continuous resource pool balancing
The disclosure is related to balancing resources between pools of servers, e.g., by moving servers from a first pool of servers to a second pool of servers. The first pool executes a first version of an application, e.g., a desktop version, and the second pool executes a second version of the application, e.g., a mobile version. The technology moves a number of servers from an “OK” pool to a “not OK” pool. A “not OK” pool is a pool whose performance metric, e.g., response latency of a server, does not satisfy a criterion, and an “OK” pool is a pool whose performance metric satisfies the criterion even if the number of servers are removed from the pool. The number of servers to be moved is determined as a function of the increase in load which the pool can withstand by remaining in OK state even after the servers are removed. |
| US09614781B1 |
Data defined infrastructure
A system for managing the operation of different components within a cloud system to accomplish various tasks, including the implementation of build features within the cloud system to achieve specific operational goals. The system may include a data defined infrastructure (DDI) tool installed within a data defined infrastructure (DDI) to manage certain features or tasks within the cloud system. The DDI may include an environment configuration database (ECDB), an orchestration engine, an automation engine, and/or other hardware and software components within the cloud system, such that the DDI tool installed on the DDI infrastructure may control operation of the ECDB, the orchestration engine, the automation engine, or other hardware and software components within the cloud system based on a set of data that fully describes the operational goal. |
| US09614780B2 |
Predictive delaycast feedback
Systems and methods are described for predictive delaycast feedback in relation to content object queuing and offer and request handling via communications systems. When a subscriber of communications and/or media services requests access to a content object, embodiments can determine where the content object can and/or should be placed in a delaycast queue. The queue can include multiple regions associated with different estimated delivery timeframes. The placement determination can involve determining an appropriate queue location for the requested content object (e.g., an appropriate queue region), and determining an associated promise time for the requested object. |
| US09614778B2 |
Systems and methods for packet scheduling in a photonic switching system
Systems and methods for scheduling data for transmission over photonic switches are described herein. In one embodiment, an apparatus is provided that includes a node having M photonic interfaces. The node is configured to transmit a message having R requests. Each one of the R requests is a request to transmit data from the node to another node. R may be greater than M. Additionally or alternatively, each request may include a queue index corresponding to a respective queue in the node. The value of the queue index may be based on both a queue occupancy of the respective queue and a delay parameter. |
| US09614777B2 |
Flow control in a network
One example provides a network device including a queue to receive frames from a source, a processor, and a memory communicatively coupled to the processor. The memory stores instructions causing the processor, after execution of the instructions by the processor, to determine whether a flow control threshold of the queue has been exceeded, and in response to determining that the flow control threshold of the queue has been exceeded, generate a message to be sent to the source of the frame that exceeded the flow control threshold. The message includes a pause duration for which the source is to stop transmitting frames. |
| US09614772B1 |
System and method for directing network traffic in tunneling applications
A method, apparatus, and system are directed to managing traffic towards a tunnel in a network. The invention enables a network device, to extract data from a received packet. A deep packet inspection is employed that enables examination of the extracted data at virtually any layer of an OSI layered protocol of the packet. If the extracted data does not satisfy the flow criteria, a second packet may be inspected at a deep packet level to determine whether the data of the first and second packet satisfies the flow criteria. If the extracted data satisfies the flow criteria a tunnel is determined based, in part, on the flow criteria. The packet is associated with and forwarded towards the determined tunnel. |
| US09614770B2 |
Network traffic control during limited power situations
In one embodiment, a device in a network detects a power outage event. The device monitors one or more operational properties of the device, in response to detecting the power outage event. The device determines whether to initiate a traffic control mechanism based on the one or more monitored operational properties of the device, according to a power outage traffic control policy. The device causes one or more nodes in the network that send traffic to the device to regulate the traffic sent to the device, in response to a determination that the traffic control mechanism should be initiated. |
| US09614768B2 |
Method for traffic load balancing
According to an example, a stacking device in a distribution layer may monitor traffic in an aggregation link between the stacking device and a core layer. When a traffic unbalance is detected in the aggregation link, the stacking device may find a data flow that causes the traffic unbalance from data flows transferred over the aggregation link and an incoming interface through which the found data flow enters the stacking device. The stacking device may also reallocate a new MAC address to the incoming interface and may send the new MAC address allocated to the incoming interface to a terminal server, so as to enable the traffic unbalance to transit to traffic balance by way of the terminal server sending a data flow with the new MAC address as the destination MAC address. |
| US09614767B2 |
Transmission message generating device and vehicle-mounted communication system
Each ECU transmits a frame to a frame generator. Then, the frame generator decomposes data contained in the received frame and then stores the data into a buffer memory, for each message type. The frame generator generates a message containing data to be transmitted to each ECU, and then transmits the message. Based on the state of a signal indicating the electric power supply status, the frame generator controls the permission or non-permission of transmission processing such that frame transmission is not performed to the ECU to which electric power supply from an electric power supply control device. When any communication part has received an abnormal frame, the frame generator does not include data contained in frames received afterward by the communication part, into a frame generated for other communication parts. |
| US09614766B2 |
System and method to analyze congestion in low latency network
Intelligent packet analysis may be provided to determine congestion problems and lead to fast solutions in low latency networks. Specifically, a congestion analyzer system may allow a user to monitor congestion on a network while using lightweight storage. A sniffer tool may be employed to capture all packets and store associated packet information into a database. |
| US09614764B2 |
System comprising nodes with active and passive ports
A data processing system comprising a plurality of interconnected nodes, each node comprising a media processor and one or more ports, each port connected to a respective media processor. Each port is configured to be active or passive, an active port being arranged, upon receipt of data, to transfer the received data to its output, a passive input port being arranged, upon receipt of data, to retain the received data and to transmit the received data to its output when the received data reaches a specific size, and a passive output port being arranged to trigger the receipt of data when the data capacity of the output port reaches a specific size. |
| US09614763B2 |
Scalable handling of BGP route information in VXLAN with EVPN control plane
A method for programming a MAC address table by a first leaf node in a network comprising a plurality of leaf nodes is provided. Each leaf node comprises one or more Virtual Tunnel End Points (“VTEPs”) and instantiates a plurality of Virtual Routing and Forwarding elements (“VRFs”), with a corresponding Bridge Domain (“BD”) assigned to each VRF. The method includes obtaining information indicating one or more VTEP Affinity Groups (VAGs), each VAG comprising an identification of one VTEP per leaf node, obtaining information indicating assignment of each VRF to one of the VAGs, assigning each VAG to a unique Filtering Identifier (“FID”), thereby generating one or more FIDs, and programming the MAC address table, using FIDs instead of BDs, by populating the MAC address table with a plurality of entries, each entry comprising a unique combination of a FID and a MAC address of a leaf node. |
| US09614760B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
The present invention provides a method of transmitting broadcast signals. The method includes, processing input streams into BB (Base Band) frames of PLPs (Physical Layer Pipes), wherein the input streams include a plurality of input packets, wherein each of the input packets include a packet header including information about synchronization of the input streams, wherein the processing input streams into BB frames further includes compressing the packet headers of the input packets in the input streams, generating the BB frames by using the compressed input packets; encoding data of the PLPs; building at least one signal frame by mapping the encoded data of the PLPs; and modulating data in the built signal frame by OFDM (Orthogonal Frequency Division Multiplexing) method and transmitting the broadcast signals having the modulated data. |
| US09614757B2 |
Method and arrangement for relocating packet processing functions
The invention relates to a method in an arrangement of a communication network, controlling a chain of functions for processing data packets of a flow associated with a device. The method comprises obtaining (610) an indication indicating that information associated with a context of at least one of the functions has been altered. The context is related to the flow and at least one of the communication network, the device, a route of the flow, and a source instance of each of the at least one function. The method further comprises determining (620) to relocate the at least one function for processing the data packets from the respective source instance to a respective target instance based on the obtained indication. The method also comprises relocating (630) the at least one function for processing the data packets to the respective target instance. |
| US09614755B2 |
Combined hardware/software forwarding mechanism and method
A forwarding system comprises a identification engine, a hardware forwarding engine configured to process an ingressing packet, a software forwarding engine configured to process the ingressing packet, and a selection engine. The selection engine is configured to select one of the hardware forwarding engine or the software forwarding engine to process the ingressing packet. The selection is based on at least one of an indication of resource availability or a classification of the ingressing packet based on a priority of a flow as determined by the identification engine. In some embodiments, the selection engine selects different forwarding engines to process different packets of a same flow based on changes in resource availability or classification of the ingressing packet. |
| US09614752B2 |
Multi-threaded multi-path processing
One or more implementations can include methods, systems and computer readable media for multi-threaded multipath processing. In some implementations, the method can include determining that a next hop for a destination includes a first next hop and a second next hop. The method can also include generating a first packet having a first destination address based on a nickname of a remote switch and on an identifier of a first path. The method can further include generating a second packet having a second destination address based on the nickname of the remote switch and on an identifier of a second path. |
| US09614749B2 |
Data processing system and method for changing a transmission table
Provided is a data processing system, including: a plurality of line matching blocks each including a data processor configured to store predefined preliminary transmission tables corresponding to the respective events requiring change of a data path, to determine whether to change a transmission table based on information received through an internal communication device, and to select and activate a preliminary transmission table corresponding to an event from among the preliminary transmission tables, wherein the preliminary transmission tables include destination information on all the physical or logical paths; and a shared bus configured to enable information on an event requiring change of the data path to be transmitted and received between the plurality of line matching blocks. |
| US09614746B2 |
System and method for providing ethernet over network virtual hub scalability in a middleware machine environment
A system and method can support a middleware machine environment that include one or more gateway nodes. One or more gateways that resides on the one or more gateway nodes are provided in a subnet with a plurality of host servers, wherein each host server is associated with one or more virtual network interface cards (vNICs). The middleware machine environment also include a plurality of virtual hubs (vHUB) on the one or more gateways, with each vHUB associated with one or more said vNICs. The gateways are adapted to connect with an external network, and operate to forward a multicast packet to both the external network and the plurality of host servers via the plurality of vHUBs, and prevent multicast packet traffic loops between the subnet and the external network. |
| US09614744B2 |
Method for monitoring, at the correct time, TT Ethernet messages
The invention relates to a method for monitoring, at the correct time, TTEthernet (TT) messages communicated by a TTEthernet switch (TTE switch) in a distributed real-time computer system. According to the invention, the TTE switch has a global time having precision P and accuracy A, and the TTE switch has a plurality of communication channels and one or more monitoring channels, and the TTE switch contains a selection data structure that specifies which TT message classes are to be monitored, and a copy of a TT message which belongs to a TT message class selected for monitoring is formed in the TTE switch and is transmitted by the TTE switch via a monitoring channel to a monitoring node, and the TTE switch subsequently autonomously transmits an ET message containing an identifier and the exact transmission time of the monitored TT message via a monitoring channel to a monitoring node. |
| US09614742B1 |
Anomaly detection in time series data
Described herein are systems, mediums, and methods for detecting blockage of network traffic at a network server. A signal representative of time series data associated with network traffic is received at a processor for analysis. A data segmentation algorithm and an anomaly detection algorithm are applied in series to the received data. The segmentation algorithm detects regime shifts in the data. Data between regime shifts is considered a segment of data. The anomaly detection algorithm analyzes each segment individually to determine whether anomalies exist in the segment. If a cyclic pattern is found in the segment, the cyclic pattern is extracted from the segment leaving a residual data for analysis. A probability distribution of the residual data is determined for analysis. When an anomaly is detected in the segment o based on the probability distribution of the residual data, it is determined that blockage has occurred on the network traffic. |
| US09614739B2 |
Defining service chains in terms of service functions
Presented herein are service-function chaining techniques. In one example, a service controller in a network comprising a plurality of service nodes receives one is configured to identify one or more service-functions hosted by each of the service nodes. The service controller defines a service-function chain in terms of service-functions to be applied to traffic in the network and provides information descriptive of the service-function chain to a classifier node. |
| US09614738B2 |
Managing change in an information technology environment
In a method for managing change in an information technology (IT) environment, in response to an open change ticket, identifying one or more components of the IT environment that are associated with at least one change operation included in the change ticket. The method further includes identifying information associated with the identified one or more components of the IT environment. The method further includes determining a listing of allowable change operations for the identified one or more components of the IT environment in the change ticket based on the identified information associated with the identified one or more components of the IT environment. The method further includes receiving a user requested change operation. The method further includes determining whether the received user requested change operation is included in the determined listing of allowable change operations. |
| US09614733B1 |
Methods and systems for reducing burst usage of a networked computer system
Methods and systems for reducing burst usage of a networked computer system are described herein. In an embodiment, resource requesters can request, within a time window, resources over a computer network before the resources are available. The resources can then be allocated in batch mode when the resources are available. Thus, resource requests do not have to be processed in real-time, and resource requests can be received before the resources are available. |
| US09614728B2 |
Identifying network communication patterns
Examples of the present disclosure include methods, devices, and/or systems. Identifying network communication patterns can include analyzing a distributed computer program of a network, estimating virtual network communication traffic based on the analysis, and mapping the virtual network communication traffic to a physical network link. Identifying network communications patterns can also include identifying the network communication pattern and categorizing the physical communication network link based on an estimated communication intensity of the mapped communication traffic and the network communication pattern. Identifying network communication patterns can further include optimizing an energy used by the network based on the categorization. |
| US09614721B2 |
Fast flooding based fast convergence to recover from network failures
A method in a router for initiating fast flooding based fast convergence to recover from a network failure is disclosed. The method also starts with detecting a network failure. Responsive to the detected network failure, the router floods a layer 2 fast failure notification message out a set of one or more interfaces of the router. The fast failure notification message includes information that identifies the network failure and indicates to a router that receives the fast failure notification message to flood the fast failure notification message out its interfaces that are not blocked by a spanning tree protocol (STP) independently of updating its routing table to reflect the network failure. The method continues with the router updating a routing table to reflect the network failure. |
| US09614717B2 |
Method and system for terminal access and management in cloud computing
The disclosure discloses a method for terminal access and management in cloud computing, including: a terminal with a management and control module accesses a bidirectional data transmission network and acts as a node; the node searches for a first responding control node or agent control node and connects with a network management server via an agent control node connected to the found control node or via the found agent control node; a management and control module of a node at each level collects running information of the terminal and reports the running information level by level, and a nearest super-ordinate node performs a management operation. The disclosure further discloses a system for terminal access and management in cloud computing. With the method and the system, the problems that the system status has to be pre-estimated and a proper node has to be selected when new equipment access an original system can be solved, and after the access, a super-ordinate node can perform actively a control operation on the topological structure. |
| US09614716B2 |
Controller maintenance in a network-attached storage system
Performing maintenance to controllers in a network-attached storage system that includes two or more controllers, each controller including at one or more associated IP address. An online controller in the network-attached storage system to upgrade is identified. The IP addresses of the online controller to upgrade is moved to another controller in the network-attached storage system. Simultaneous with when the other controller is online, the online controller to upgrade is taken offline and upgraded the controller to upgrade. |
| US09614711B2 |
System and method for using semi-orthogonal multiple access in wireless local area networks
A method for operating a transmitting device using semi-orthogonal multiple access (SOMA) in a wireless local area network (WLAN) includes determining a first quadrature amplitude modulation (QAM) bit allocation, a first coding rate, and a first SOMA group for a first receiving device and a second QAM bit allocation, a second coding rate, and a second SOMA group for a second receiving device in accordance with channel information associated with the first receiving device and the second receiving device, generating a frame including indicators of the first and second QAM bit allocations, the first and second coding rates, and the first and second SOMA groups, and sending the frame to the first receiving device and the second receiving device. |
| US09614710B2 |
Method and system for communication digital data on an analog signal
A method for transmitting digital data on an analog signal is disclosed, which may include modulating-amplitude or frequency of the analog signal In a manner that includes representing digital bits of the digital data as combinations of periodic waveforms of low, medium and high levels of amplitude, if modulating the amplitude of the analog signal, or representing digital bits of the data as combinations of periodic waveforms of low, medium and high levels of frequencies. If modulating the frequency of the analog signal. |
| US09614708B1 |
[HEW] spatial modulation technique with different source-encoded data services of the next generation WLAN IEEE 802.11ax
One exemplary embodiment provides an efficient method and architecture that allows the transmission of at least two different data services with different quality of service (QOS) and source encoding for the IEEE 802.11.ax-HEW (and beyond, 802.11ax+) Wi-Fi systems/networks. An exemplary embodiment capitalizes on the behavior of spatial modulation (SM-OFDM) transmission techniques to allow, for example, using different channel encoding rates for each category/service of data. |
| US09614703B2 |
Circuits and methods providing high-speed data link with equalizer
Methods, systems, and circuits for providing reception and capture of data using a mismatched impedance and an equalizer to save power are disclosed. A data receiver in communication with a transmission line, the data receiver having a termination impedance that is mismatched with respect to a characteristic impedance of the transmission line; and an equalizer in communication with the data receiver, the equalizer configured to receive a channel-transmitted data signal from the data receiver and to re-shape the signal to reduce distortion RC attenuation; wherein the circuit is configured to selectably operate in a first mode wherein the termination impedance is matched with respect to the characteristic impedance of the transmission line and a second mode wherein the termination impedance is mismatched with respect to the characteristic impedance of the transmission line and the signal is not recoverable but for the equalizer. |
| US09614697B2 |
High speed receivers circuits and methods
The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided. |
| US09614693B2 |
Self-characterizing, self calibrating and self-measuring impedance tuners
An impedance tuner system, usable in a measurement system including at least one measurement system device, the tuner system comprising the impedance tuner having a signal transmission line, and an impedance-varying system coupled to the transmission line, and responsive to command signals to selectively vary the impedance presented by the impedance tuner. An impedance tuner controller is configured to generate the command signals, and wherein measurement device drivers and at least one of characterization, calibration and measurement algorithms are embedded into the tuner controller, the tuner controller configured to allow a user to control execution of said at least one of the characterization, calibration and measurement algorithms using the tuner controller. |
| US09614689B2 |
Network in-line tester
An in-line tester (10) for testing a telecommunications network. The tester (10) is connectable in line in a communications channel in the network, between network elements or nodes (12), so that all packets within that channel have to flow through it. |
| US09614679B2 |
Information processing apparatus, information processing method, information processing program and information processing system
An information processing apparatus according to the present application includes a first application allowed to access the IC chip, including an IC chip in which predetermined data is recorded, an IC chip reading unit that reads the data recorded in the IC chip, and a signature data generation unit that generates signature data by performing encryption processing on the recorded data read by the IC chip reading unit and a second application not allowed to access the IC chip, including a server access unit that requests acquisition of content from an information providing server by receiving the signature data and the recorded data from the first application and transmitting the signature data and the recorded data to the information providing server that provides predetermined content. |
| US09614674B2 |
Virtual bands concentration for self encrypting drives
An apparatus includes a storage medium with an opaque key storage and a controller. The controller may be coupled to the storage medium. The controller may be configured to (i) receive from a host device an authentication key, a plurality of I/O requests, and respective virtual media encryption keys associated with a number of the I/O requests, (ii) allow the host device to access the opaque key storage in response to the authentication key received from the host device being authenticated, (iii) generate a first media encryption key for a real band based upon the authentication key from the host device and key material stored on the apparatus, and (iv) generate a number of second media encryption keys for the number of I/O requests based on the first media encryption key and each of the respective virtual media encryption keys associated with each of the number of I/O requests. |
| US09614671B2 |
User access control based on a graphical signature
A user inputs a pattern consisting of a plurality of lines. The lines are classified by relative length, overall direction and degree of curvature. Where a line is started from a new position, the direction from the previous starting point is taken into account. The series of lines is then serialized into a key value, which may then be used to decrypt data stored on a device. This enables data to be securely stored since the key is supplied by the user at runtime and is not itself stored on the device. |
| US09614668B1 |
Conversion schemes for cryptography systems
In a general aspect, a conversion scheme is used with a cryptographic system. In some aspects, a pad bit vector is generated based on a size of a message bit vector, and a record bit vector is generated based on the pad bit vector. The record bit vector indicates the size of the pad bit vector. The record bit vector, the message bit vector, and the pad bit vector are combined to yield a first bit vector. A hash function is applied to the first bit vector, and an encryption function is applied to a portion of the first bit vector. A ciphertext is generated based on the output of the hash function and the output of the encryption function. |
| US09614666B2 |
Encryption interface
Encryption interface technologies are described. A processor can include a system agent, an encryption interface, and a memory controller. The system agent can communicate data with a hardware functional block. The encryption interface can be coupled between the system agent and a memory controller. The encryption interface can receive a plaintext request from the system agent, encrypt the plaintext request to obtain an encrypted request, and communicate the encrypted request to the memory controller. The memory controller can communicate the encrypted request to a main memory of the computing device. |
| US09614664B2 |
Wireless communication apparatus and method
A wireless communication apparatus includes multiple antenna devices, a signal generator, a phase shifter, a phase controller, and a quadrature error corrector (phase error corrector and amplitude error corrector). The signal generating circuitry, in operation, generates an IQ signal having an I signal and a Q signal. The plurality of phase shifting circuitry provided for each of the plurality of antenna devices, in operation, generates a plurality of combination signals by combining the I signal and the Q signal based on a predetermined combining scheme. The phase controlling circuitry, in operation, controls the predetermined combining scheme in each of the plurality of phase shifting circuitry. The quadrature error correcting circuitry, in operation, corrects at least one of amplitude combining scheme and phase combining scheme of the predetermined combining scheme in a correction of the predetermined combining scheme. |
| US09614658B2 |
System and method for radio full duplex
In one embodiment, a method for determining self-interference in radio full duplex includes transmitting, by a first radio transmitter and an antenna, a first signal and receiving, by a first radio receiver and the antenna, a reflection of the first signal. The method also includes estimating a channel in accordance with the first signal and the reflection of the first signal to produce an estimated channel and determining a second signal in accordance with the estimated channel. Additionally, the method includes transmitting, by a second radio transmitter, the second signal and removing a self-interference component of the reflection of the first signal to produce a corrected signal. |
| US09614657B2 |
Channelization procedure for implementing persistent ACK/NACK and scheduling request
In one exemplary embodiment, a method includes: configuring a common resource space having a plurality of time-frequency resources and code resources, where the common resource space includes a first portion for a first type of signaling and a second portion for a second type of signaling, where the first type of signaling includes at least one of persistent acknowledgement signaling and scheduling request signaling, where the second type of signaling includes dynamic acknowledgement signaling; and allocating, based on the configured common resource space, resources of the common resource space for the at least one of persistent acknowledgement signaling and scheduling request signaling. |
| US09614655B2 |
Method and apparatus for feeding back channel state information in wireless communication system
The present invention relates to a wireless communication system. The method for transmitting channel state information (CSI) on a plurality of base stations by means of a terminal in a wireless communication system according to one embodiment of the present invention comprises: a step of receiving N-number of CSI configurations for a CSI report; a step of receiving information indicating M-number (wherein, 2≦M≦N) of CSI configurations which use a common CSI among the N-number of CSI configurations; and a step of transmitting the common CSI based on one CSI configuration selected from among the M-number of CSI configurations to transmit the common CSI. |
| US09614653B2 |
Method and apparatus for performing Quasi Co-Location in wireless access system
The present invention relates to various methods for performing quasi co-location (QCL) and apparatuses supporting the same. As an embodiment of the present invention, a method for performing quasi co-location (QCL) for a new carrier type (NCT) by a terminal in a wireless access system may include the steps of: receiving a higher layer signal including a QCL reference CRS information parameter indicating CRS information of a reference carrier; receiving a physical downlink control channel (PDCCH) signal including a PDSCH remapping and quasi co-location indicator (PQI) field; receiving a CSI-RS of a QCLed NCT and a CRS of a reference carrier on the basis of a PQI field and a QCL reference CRS information parameter; and performing frequency tracking of the NCT and the reference carrier on the basis of the CSI-RS of the NCT and the CRS of the reference carrier. |
| US09614652B2 |
Radio base stations and wireless terminal for dual connectivity, methods therein and a system
Embodiments herein relate to a system for enabling communication in the radio communications network (1). The system comprises the first radio base station (12), the second radio base station (13) and the wireless terminal (10). The first radio base station (12) and the second radio base station (13) are configured to serve the wireless terminal (10) simultaneously. The first radio base station (12) is configured to set up to the wireless terminal (10), a first channel for receiving data over from the wireless terminal (10), and a first assisting channel for transmitting feedback data regarding transmissions over the first channel. The second radio base station (13) is configured to set up to the wireless terminal (10), a second channel for transmitting data over to the wireless terminal (10), and a second assisting channel for receiving, from the wireless terminal (10), feedback data regarding transmissions over the second channel. |
| US09614650B2 |
Methods and systems for resource allocation
Various methods and systems are provided for allocating time-frequency resources for downlink (DL) and uplink (UL) communications between base stations and mobile stations. Different forms of resource allocation messages including combinations of bitmaps and bitfields provide additional information about the resources and/or how they are assigned. In some implementations the resource allocation messages enable reduced overhead, which may ultimately improve transmission rates and/or the quality of transmissions. |
| US09614649B2 |
Method for transmitting control information and apparatus for same
A wireless communication system is disclosed. A method for transmitting uplink control information in a wireless communication system supporting carrier aggregation and operating in TDD includes: generating a first HARQ-ACK (hybrid automatic repeat request—acknowledgement) set for a first cell using a value M; generating a second HARQ-ACK set for a second cell using the value M; and transmitting a bit value corresponding to a third HARQ-ACK set including the first HARQ-ACK set and the second HARQ-ACK set in an uplink subframe n, wherein M=max(M1, M2), max(M1, M2) representing a value being equal to or larger than not smaller between M1 and M2, wherein M1 corresponds to the number of downlink subframes corresponding to the uplink subframe n in the first cell, and M2 corresponds to the number of downlink subframes corresponding to the uplink subframe n in the second cell, wherein the first cell and the second cell have different UL-DL configurations. |
| US09614648B2 |
Method and apparatus for controlling energy expanding of sensor network nodes
A method and apparatus for controlling energy expended by sensor network nodes is disclosed. The method comprises steps of acquiring energy information that is indicative of an energy status of a node in the network and adjusting at least one data transmission parameter according to the energy information. In a wireless network where the communication capacity and power energy of sensor nodes are limited, the invention provides the capability of efficiently utilizing the network resources, conserving power consumption of sensor nodes, and prolonging the life of the sensor network. |
| US09614643B2 |
Method for transmitting a downlink control channel by a base station in a wireless communication system, and apparatus therefor
Disclosed in the present application is a method for receiving an ACK/NACK (Acknowledgement/Negative Acknowledgement) signal by a terminal in a wireless communication system. More specifically, the method comprises the steps of: transmitting an uplink data signal to a base station; a blind decoding of downlink control information including an ACK/NACK response signal regarding the uplink data signal so as to acquire a decoded signal; and checking the ACK/NACK response signal, corresponding to the terminal, from among the downlink control information. The downlink control information consists of ACK/NACK response signals corresponding to a plurality of terminals. |
| US09614642B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
A method and an apparatus for receiving broadcast signals thereof are disclosed. The apparatus for receiving broadcast signals, the apparatus comprises a receiver to receive the broadcast signals, a demodulator to demodulate the received broadcast signals by an OFDM (Orthogonal Frequency Division Multiplex) scheme, a frame parser to parse a signal frame from the demodulated broadcast signals, a decoder to decode data in the parsed signal frame and an output-processor to output-process the decoded data. |
| US09614641B2 |
Resource coordination for peer-to-peer groups through distributed negotiation
Techniques for determining resources to use for peer-to-peer (P2P) communication are disclosed. In an aspect, a network entity may receive feedback information (e.g., resource usage information and/or channel state information) from P2P devices and may perform resource partitioning based on the feedback information to allocate some of the available resources for P2P communication. The allocated resources may observe little or no interference from devices engaged in wide area network (WAN) communication. In another aspect, P2P groups may perform resource negotiation via a WAN connection (e.g., with little or no involvement by the WAN) to assign the allocated resources to different P2P groups. In yet another aspect, a device may autonomously determine whether to communicate with another device directly or via a WAN, e.g., whether to initiate P2P communication with another device and whether to terminate P2P communication. In yet another aspect, a network entity may participate in resource negotiation by P2P devices. |
| US09614637B2 |
Optical routing apparatus and method
Optical add and drop switch and aggregator apparatus comprising: N first wavelength selective routing apparatus each configured to split a wavelength multiplexed input signal into L sub-signals; demultiplexers each configured to demultiplex a respective sub-signal into K optical signals; output ports each configured to output a respective output optical signal; add ports configured to receive optical signals to be added; M second wavelength selective routing apparatus each having X outputs, each said apparatus being configured to receive optical signals from a respective add port and to route each received optical signal to a respective one of its outputs; drop ports configured to output optical signals to be dropped; and a switch matrix coupled between the demultiplexers, the output ports, the drop ports and the second wavelength selective routing apparatus, the switch matrix comprising a plurality of optical switches arranged in XM columns and KLN rows. |
| US09614636B2 |
Receiver optical module for wavelength multiplexed signal
A receiver optical module that receives a wavelength multiplexed signal is disclosed. The receiver optical module includes an optical de-multiplexer that generates a plurality of signals contained in the wavelength multiplexed signal depending on wavelengths of the signals. The wavelength de-multiplexer has features that the optical de-multiplexer has a plurality of sub-elements stacked to each other, where each of the sub-elements de-multiplexes a portion of the wavelength multiplexed signal. Or, the optical de-multiplexer has a series of wavelength selective filters each extracting signal components having outermost wavelengths from signal components entering therein. |
| US09614635B2 |
Preamble design and detection for ranging in an optical OFDMA communication network
The invention relates to an optical OFDMA communication network, comprising a plurality of optical network units (ONUs), wherein each one of the ONUs is configured to generate a ranging sequence for upstream synchronization of the ONUs, a receiving unit for receiving signals of the ONUs, the receiving unit being also configured to receive the ranging sequences of the ONUs. The receiving unit comprises a correlator unit in which a plurality of ranging sequences is stored. The receiving unit is configured to perform a ranging detection operation including performing a correlation operation with a plurality of the received ranging sequences using at least one of the stored ranging sequences and to transmit a ranging response to the ONUs depending on the result of the correlation operation. |
| US09614634B2 |
Method and device for cancelling a narrow band interference in a single carrier signal and computer program
The present invention concerns a method for cancelling a narrow band interference in a single carrier signal. The method comprises the steps executed by a receiver of:receiving the single carrier signal and transforming the single carrier signal into received symbols,transforming the received symbols from the time domain to the frequency domain into received symbols in the frequency domain,determining a signal and thermal noise power estimation based on the received symbol powers in the frequency domain,estimating variances of the narrow hand interference from the signal and thermal noise power estimation and the received symbol powers in the frequency domain,equalizing the received symbols in the frequency domain or symbols derived from the received symbols in the frequency domain taking into account the estimate of the variances of the narrow band interference. |
| US09614632B2 |
Devices and methods for processing one or more received radio signals
A method for processing one or more received radio signals is provided. The method may include performing a channel estimation of a transmission channel for at least a portion of the one or more radio signals received, to identify at least one soft channel parameter representing a channel impulse response of the transmission channel, and identifying at least one soft intercarrier interference parameter representing an interference for the one or more radio signals received using a first frequency carrier. The interference is caused by the one or more radio signals received using a second frequency carrier. The method may further include detecting soft data from the one or more radio signals based at least on the at least one soft channel parameter and the at least one soft intercarrier interference parameter. |
| US09614631B2 |
Coordination and signaling in NAICS and interference partitioning
A framework for enabling a user equipment (UE) to apply interference suppression processing during network conditions that are favorable to interference suppression or that are known is provided. The framework includes an interference suppression (IS) time and frequency (time/frequency) zone, which can be scheduled by a serving base station and signaled to the UE. In an embodiment, the serving base station coordinates with the interfering base station(s) to create a network condition favorable to interference suppression at the UE during the IS time/frequency zone. In another embodiment, the serving base station opportunistically schedules the IS time/frequency zone for the UE whenever it determines favorable transmission parameters being used or scheduled for use by the interfering base station(s). The UE applies interference suppression processing within the IS time/frequency zone, thereby improving receiver performance. |
| US09614630B2 |
Network node and a method therein, and a radio base station and a method therein for protecting control channels of a neighbouring radio base station
A network node and a method performed by a network node for protecting control channels of a neighboring RBS, the network node and the RBS being operable in an OFDM based radio communication network are provided. An RBS and a method performed by an RBS for transmitting control channels to UEs currently being associated with the RBS in an OFDM based radio communication network are also provided. The method in the network node comprises determining (220) at least one subframe out of a predetermined number of subframes in which control channels are to be transmitted with reduced transmission power in relation to a nominal transmission power; and informing (230) the RBS which subframe(s) out of the predetermined number of subframes in which control channels are to be transmitted with reduced transmission power. |
| US09614629B2 |
Telecommunication system using multiple Nyquist zone operations
Telecommunication systems using multiple Nyquist zone operations are provided. In one aspect, a telecommunication system can include a first section and a second section. The first section can receive signals from at least one transmitting base station or transmitting terminal device. The received signals have frequencies in multiple frequency bands. The first section can also sample the received signals such that the received signals are aliased. The first section can also combine the aliased signals from the frequency bands into a combined frequency band in a common Nyquist zone. The second section can extract signals from the combined frequency band. The extracted signals are to be transmitted at frequencies in a frequency band from a Nyquist zone that is different than the common Nyquist zone. The second section can also transmit the extracted signals to at least one receiving base station or receiving terminal device. |
| US09614627B2 |
Method and device for testing performance of wireless terminal
A method and a device for testing a performance of a wireless terminal and a computer readable storage medium are provided. The wireless terminal is placed in a first anechoic chamber and comprises m antennas, where m is a positive integer greater than 1. The method comprises steps of: S1, obtaining m pieces of antenna pattern information of the m antennas; S2, obtaining n first testing signals according to the m pieces of antenna pattern information, where n is a positive integer greater than 1; S3, feeding the n first testing signals to n testing antennas in a second anechoic chamber, and transmitting the n first testing signals to the wireless terminal by the n testing antennas; and S4, obtaining a piece of receiving information of the m antennas for the n first testing signals, and obtaining the performance of the wireless terminal according to the piece of receiving information. |
| US09614626B2 |
Millimeter-wave transmitter on a chip, method of calibration thereof and millimeter-wave power sensor on a chip
The present invention relates to a millimeter-wave transmitter on a chip comprising at least one transmit path coupleable to an oscillator, and an on-chip power sensor to measure at least a portion of a transmit power transmitted over the at least one transmit path. The present invention further relates to a method of calibrating a millimeter-wave transmitter on a chip and an on-chip power sensor coupleable to at least one transmit path of a millimeter-wave transmitter. The embodiments of the present invention provide a direct measure of transmit power provided within an individual one of the transmit paths of the millimeter-wave transmitter. |
| US09614624B2 |
Optical power source modulation system
A system for delivering optical power over an optical conduit includes at least one optical power source delivering multiple optical power forms, at least one of the optical power forms being a modulated optical power form. The system includes an optical power receiving device that is directly driven by the at least one modulated optical power form. |
| US09614616B2 |
Optical time domain reflectometer systems and methods using wideband optical signals for suppressing beat noise
A correlation optical time domain reflectometer (OTDR) provides a correlation sequence that is continuously transmitted along a fiber for testing the fiber for anomalies. Such continuous transmission can result in beat noise that degrades the quality of the measured returns. In this regard, each sample is composed of backscatter returns from many points along the fiber that arrive at the OTDR at the same time. When a subset of these returns have frequency differences that appear in the passband of the OTDR receiver, the constructive and destructive interference of these returns at the OTDR receiver can cause significant low-frequency beat noise in the OTDR signal. An optical transmitter is configured to transmit the correlation sequence through the fiber using a wideband optical signal such that the beat noise is suppressed within the passband of the OTDR receiver, thereby improving the quality of the returns measured by the OTDR. |
| US09614615B2 |
Luminaire and visible light communication system using same
A luminaire includes an electric light source, a light source driver configured to turn on the light source, and a controller configured to control the light source driver. The controller is configured to control the light source driver to transmit, with a probability lower than 50% at a prescribed time interval, an optical signal with light of the light source as a medium while the light source is in ON. The prescribed time interval is longer than a time period during which the optical signal is transmitted. |
| US09614614B2 |
Locating a physical connector module
Methods, systems, and computer readable media for locating a physical connector module are disclosed. According to one aspect, the subject matter described herein a method that includes selecting, via a locator beacon activation control function, a physical connector module to be located. The method further includes communicating, from the locator beacon activation control function, a locator beacon activation signal to a locator beacon activation client function included in the selected physical connector module and, in response to receiving the locator beacon activation signal at the locator beacon activation client function, triggering a transmission of a locator beacon from the selected physical connector module. |
| US09614613B2 |
Communication network element and method of mitigating an optical jamming attack against an optical communication system
A communication network element (10) comprising: an optical path (12) for an optical communication signal (14); a monitoring port (16) arranged to output an optical monitoring signal; an optical splitter (20) provided in the optical path, the optical splitter arranged to receive the optical communication signal and to split off a part of the optical communication signal to form the optical monitoring signal; and optical isolation apparatus (22) connected between the optical splitter and the monitoring port, the optical isolation apparatus arranged to transmit the optical monitoring signal propagating towards the monitoring port and arranged to apply an attenuation, IA, to an attacking optical signal (24) propagating from the monitoring port towards the optical splitter to thereby prevent a substantial part of the attacking optical signal being transmitted to the optical path. |
| US09614612B2 |
Fast protection switching method for passive optical network
A fast protection switching method for a Passive Optical Network (PON). When performing protection switching from an operation link (an operation network) to a protection link (a protection network) in a PON, the fast protection switching method enables rapidly updating Equalization Delay (EqD) values, even if the EqD values are different for Optical Network Terminals (ONTs) of varying distances. |
| US09614610B2 |
Method for using a base station to selectively utilize channels to support a plurality of communications
A method for using a code division multiple access (CDMA) subscriber unit to transmit a communication to a base station at a first data rate using at least one communication channel, determine an adjusted data rate desired for support of the communication, and transmit the communication to the base station over a second channel at a second data rate, wherein the first data rate is different than the second data rate. |
| US09614608B2 |
Antenna beam management and gateway design for broadband access using unmanned aerial vehicle (UAV) platforms
Systems and methods for creating beams from a non-terrestrial vehicle (e.g., unmanned aerial vehicle (UAV)) toward user terminals and gateways on the ground. Another aspect of the disclosure includes systems and methods for switching the UAV beams toward the user terminals and gateways as the UAV moves in its orbit. Still another aspect of the disclosure describes systems and methods for routing traffic from user terminals to the internet via multiple gateways. |
| US09614607B2 |
Millimeter-wave relay device with bounded delay and method for retransmission of symbols
Embodiments of a wireless station to operate as a per-symbol relay device and method for retransmission of symbols between client devices and a master device using millimeter-wave links is generally disclosed herein. In some embodiments, the relay device may receive one or more of independent symbol streams from the master device. Each independent symbol stream may comprise packets that include groups of one or more symbols. Each group within a packet may be destined for a different one of the client devices. The relay device may separately decode each symbol or group of symbols to generate an independent stream of symbols for retransmission to the client devices using beamforming. The relay device may be arranged to receive, decode, and retransmit each symbol or group of symbols within a delay that is bounded by the number of symbols in the group. |
| US09614604B2 |
RFID beam forming system
A multi-protocol, multi-band array antenna system may be used in Radio Frequency Identification (RFID) system reader and sensory networks. The antenna array may include array elements with an integrated low noise amplifier. The system may employ digital beam forming techniques for transmission and steering of a beam to a specific sensor tag or group of tags in a cell. The receive beam forming network is optimized for detecting signals from each sensor tag. Narrow and wideband interferences may be excised by an interference nulling algorithm. Space division multiplexing may be used by the antenna system to enhance system processing capacity. |
| US09614603B2 |
Method of TDD precoding
An iterative precoding method for a TDD data transmission system includes a transmitter provided with N transmit antenna(s) (N≧1), and a receiver provided with M receive antennas (M≧2). A series of precoders Ln (n≧0) is defined. Each iteration includes: the transmitter takes account of a predetermined value n=n0 if it is the first iteration, or else a value of n obtained during the preceding iteration; the transmitter sends a triplet of pilot signals precoded with the precoders Ln, Ln+1, and Ln+2 to the receiver; the receiver estimates the triplet (Tn, Tn+1, Tn+2) of total data rates that can be achieved corresponding respectively to (Ln, Ln+1, Ln+2), and deduces therefrom the value of a control command p; the receiver sends a signaling message specifying the value of the control command p; and on receiving the signaling message, the transmitter updates the value of n, by replacing it with the value (n+p). |
| US09614602B2 |
Methods and arrangements for signaling control information in a communication system
The invention relates to devices and methods for signalling control information associated with transmission of data over a wireless channel. A second communication device receives (S2) data from a first communication device, wherein the data comprises an indication of recommended precoders and a recommendation of a first transmission rank to possibly use during transmission. The second communication device determines (S4) a second transmission rank to use for transmitting data, and transmits (S6) a confirmation message to the first communication device. The confirmation message comprises a confirmation that transmission of data from the second communication device is using at least parts of each recommended precoder associated with a frequency resource that falls within the transmission of data and an indicator of the second transmission rank to use. |
| US09614598B2 |
Uplink MIMO transmission from mobile communications devices
Uplink transmission from a mobile device having multiple antennas to a base station having multiple antennas includes transmitting in an open-loop single-user MIMO mode when the mobile device is at high speed, transmitting in a closed-loop single-user MIMO mode when the mobile device is at low speed, and, upon request, transmitting in a multi-user collaborative MIMO mode. The method also includes controlling uplink transmissions in a selected one of the open-loop single-user MIMO, the closed-loop single-user MIMO and the multiuser collaborative MIMO modes. Uplink transmissions from the mobile device may be transmitted using multiple antennas of the mobile device. Upon request, the mobile device may switch to transmitting in multi-user collaborative MIMO mode with a subset of the multiple antennas. |
| US09614597B2 |
Method, device, and system for transmitting MU-MIMO pilot and data
Disclosed are a method, device and system for transmitting a Multi-user Multiple-Input-Multiple-Output (MU-MIMO) pilot and data. The method includes: when at least two terminals transmit a MU-MIMO pilot and data on one same time/frequency resource, constructing a k-stream SU-MIMO pilot and data; based on the configuration mode of the k-stream SU-MIMO pilot, modifying demodulation pilot port parameters of the at least two terminals; and based on the transmission mode of the k-stream SU-MIMO pilot and data, transmitting the k-stream SU-MIMO pilot and data to the at least two terminals, respectively. Further disclosed are a device and system for transmitting a MU-MIMO pilot and data. |
| US09614596B2 |
Communication control device, communication control method, and terminal device
There is provided a communication control device including a control unit configured to regard each of a plurality of communication regions corresponding to individual beams formed by a directional antenna capable of forming the beams in 3-dimensional directions as a virtual cell and perform communication control when the plurality of beams are formed in the different 3-dimensional directions by the directional antenna. |
| US09614591B2 |
NFC device combining components of antenna driver and shunt regulator
Embodiments of the present disclosure can be used to produce smaller, more compact antenna drivers at a reduced cost. Systems and methods for integrating components of an antenna driver with components of a shunt regulator and clamp are provided. By combining these components according to embodiments of the present disclosure, transistor count in an antenna driver can be reduced. This integrated device advantageously allows antenna driver functionality, regulator functionality, and clamp control functionality to be provided at a reduced manufacturing cost and with reduced real estate. |
| US09614588B2 |
Smart appliances
Smart Appliances are defined that assist in reducing energy consumption or cost. The Smart Appliances communicate with Smart Energy sources via the power lines and in particular by injecting communications signals between the live plus neutral power lines on the one hand and the ground line on the other hand, the communications protocol allowing a power source to identify the electrical circuit to which an appliance is connected and thereby to route a selected type of power to the appliance on the correct electrical circuit for that appliance. |
| US09614581B2 |
Control and management of power saving link states in vectored TDD transmission systems
An apparatus comprising a first transceiver unit (TU) for coupling to a first subscriber line, at least one next TU for coupling to at least one next subscriber line, and a processor coupled to the first TU and the at least one next TU, wherein the processor is configured to determine a link state in which data transmission is disabled for the duration of one or more symbols in a superframe, instruct the first TU to operate in the determined link state, and coordinate data transmission by the first TU and the at least one next TU to avoid an increase of crosstalk from the first line to the at least one next subscriber line due to the first TU operating in the determined link state. |
| US09614580B2 |
Network device with frequency hopping sequences for all channel-numbers for channel hopping with blacklisting
Disclosed examples include methods and network devices for communicating in a wireless network, in which the device generates frequency hopping sequence y(j) having a prime number sequence length p, using cyclotomic classes in a field of p or using a baby-step giant-step algorithm, where y(0)=p−1 and the remaining sequence values y(j)=logα(j) mod (p−1). In certain examples, α=2 and the sequence is generated without solving logarithms using one or more algorithms to conserve memory and processing complexity for low power wireless sensors or other IEEE 802.15.4e based networks using Time-Slotted Channel Hopping (TSCH) communications. |
| US09614579B2 |
Techniques for generation of a frequency hopping sequence
A device operated in a network using a channel hopping communication protocol may select a channel for each transmission by first generating and storing a sequence of pseudo-random index numbers. A list of good channels is selected from a plurality of channels. For each channel hop, one of the good channels is selected from the list of good channels for use by a transceiver in the device by using an index number selected from the sequence of pseudo-random index numbers. The list of good channels may be revised periodically and channels may be selected from the list of good channels for use by the transceiver without revising the sequence of pseudo-random index numbers. |
| US09614578B2 |
Orthogonal frequency division multiplexing-code division multiple access system
An orthogonal frequency division multiplexing (OFDM)-code division multiple access (CDMA) system is disclosed. The system includes a transmitter and a receiver. At the transmitter, a spreading and subcarrier mapping unit spreads an input data symbol with a complex quadratic sequence code to generate a plurality of chips and maps each chip to one of a plurality of subcarriers. An inverse discrete Fourier transform is performed on the chips mapped to the subcarriers and a cyclic prefix (CP) is inserted to an OFDM frame. A parallel-to-serial converter converts the time-domain data into a serial data stream for transmission. At the receiver, a serial-to-parallel converter converts received data into multiple received data streams and the CP is removed from the received data. A discrete Fourier transform is performed on the received data streams and equalization is performed. A despreader despreads an output of the equalizer to recover the transmitted data. |
| US09614576B2 |
Low complexity receiver and method for low density signature modulation
Method and apparatus embodiments are provided for low complexity message passing algorithm (MPA) detection with substantially minor or tolerated performance loss compared to the standard MPA. A method includes calculating, at a detector, a plurality of function nodes (FNs) according to a plurality of received multiplexing signals for a one or a plurality of user equipments (UEs) using a plurality of first MPA computations that map a plurality of variable nodes (VNs) corresponding to the UEs to the FNs and using a priori information in an initial vector of probabilities for each of the VNs, excluding from the first MPA computations a plurality of first relatively small multiplication terms, updating the probabilities for the VNs using the last calculated FNs and a plurality of second MPA computations that map the FNs to the VNs, and excluding a plurality of second relatively small multiplication terms from the second MPA calculations. |
| US09614570B2 |
Cellular-phone case having retractable card holding structure
A cellular-phone case having a retractable card holding structure, intended to hold a card in such a way that the card is put into or taken out from the case. The cellular-phone case includes a case body and a card holding means. The case body has a seating space to allow a cellular phone to be seated therein, with an outlet formed at a predetermined position on a back portion of the case body in such a way as to communicate with the seating space. The card holding means includes a support panel fitted into the outlet, the card being disposed on the support panel, and an actuating body provided on a side of the support panel so as to be locked to the outlet. The outlet is provided in the case body, and the card holding means is provided to move into and out of the outlet. |
| US09614567B2 |
Systems and methods for recovering from stalls on a mobile device
Various embodiments provide systems and methods for recovering from a stall on a mobile communication device. A mobile communication device may receive a data block from a network through a communications channel, where the data block has a block sequence number. The mobile communication may determine whether the block sequence number of the data block is within a receive window and increment a stall counter when the block sequence number is outside of the receive window. The mobile communication device may perform an abnormal release from the communications channel when the stall counter reaches a threshold. |
| US09614564B2 |
High speed receivers circuits and methods
The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided. |
| US09614554B2 |
Multicarrier successive predistortion for digital transmission
An approach for improved compensation for nonlinear distortion in multicarrier satellite systems is provided. Source reflecting encoded and modulated sequences of source data symbols are received. Each source signal is predistorted, and a transmit filter is applied to each predistorted source signal. Each filtered signal is translated to a carrier frequency, and the translated signals are combined into a composite signal for transmission via a multicarrier transponder. The final predistorted version of each source signal is generated via an iterative process of a number of stages, wherein, for a given stage and for each source signal, the process comprises: receiving a prior predistorted version of each source signal from a preceding stage; processing each prior predistorted source signal based on all of the received prior predistorted source signals, wherein the processing is performed based on a characterization of one or more characteristics of the multicarrier satellite transponder. |
| US09614549B2 |
Transmitter apparatus and interleaving method thereof
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. |
| US09614543B2 |
Compression of integer data using a common divisor
According to one embodiment of the present invention, a system for compressing data determines a common divisor for a set of values comprising integers. The system divides each value within the set of values by the common divisor to produce reduced values, and represents the set of values in the form of data indicating the common divisor and the reduced values. Embodiments of the present invention further include a method and computer program product for compressing data in substantially the same manners described above. |
| US09614541B2 |
Wireless-transmitter circuits including power digital-to-amplitude converters
Circuits comprising: digital-to-amplitude converter (DAC), comprising: binary weighted switching transistors (BWSTs), each having gate coupled to amplitude control bit ACB, and wherein the drain of each of the BWSTs are connected together and wherein the source of each of the BWSTs are connected together; transistor M1 having gate coupled to input signal and first bias voltage BV1 and source coupled to the drains of the BWSTs; transistor M2 having gate coupled to BV2 and source coupled to the drain of M1; transistor M3 having gate coupled to BV3 and source coupled to the drain of M2; transistor having gate coupled to BV4, source coupled to the drain of M3; and inverter having input coupled to another ACB and having output coupled to the output of the DAC and the drain of M4. |
| US09614539B2 |
Successive-approximation register (SAR) analog-to-digital converter (ADC) with ultra low burst error rate
Systems and methods are provided for a successive approximation register (SAR) analog-to-digital converter (ADC) with an ultra-low burst error rate. Analog-to-digital conversions may be applied via a plurality of successive conversion cycles, with each conversion cycle corresponding to a particular bit in a corresponding digital output. Meta-stability may be detected during each one of the plurality of successive conversion cycles, and for each one of the plurality of successive conversion cycles, a next one of the plurality of successive conversion cycles may be triggered based on a cycle termination event. After completion of all of the plurality of successive conversion cycles, a meta-stability state of each of the plurality of successive conversion cycles may be assessed, and the digital output may be controlled based on the assessment. |
| US09614535B2 |
PLL circuit, method, and electronic apparatus
A PLL circuit includes a frequency divider dividing an oscillation signal to generate a divided signal having a cycle of T/M (M: an integer greater than one); a phase comparator generating M reference signals by sequentially delaying a reference signal having a cycle of T one after another by a predetermined delay time and generating an Exclusive OR calculation result of the M reference signals and the divided signal; a loop filter generating a voltage signal based on the Exclusive OR calculation result input thereto; a voltage-controlled oscillator generating the oscillation signal by oscillating at a frequency in accordance with the voltage signal; and a control circuit adjusting the predetermined delay time to be equal to T/2M based on an Exclusive OR calculation result of at least two of the M reference signals. |
| US09614533B2 |
Digital phase control with programmable tracking slope
Phase compensation in an I/O (input/output) circuit includes variable, programmable slope. A phase compensation circuit can apply phase compensation of one slope and dynamically change the slope of the phase compensation to allow for better tracking of environmental conditions. The phase compensation circuit can generate a linear code to apply phase compensation to lock phase of an I/O signal to a phase of a timing signal. The circuit selectively adjusts the linear code with a variable, programmable slope, where the slope defines how much phase compensation is applied per unit change in the linear code. The circuit applies the adjusted linear code to a lock loop to lock the phase of the I/O signal to the phase of the timing signal. |
| US09614532B1 |
Single-flux-quantum probabilistic digitizer
A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit. |
| US09614519B2 |
Driver for switched capacitor circuits
There is described a driver for a switched capacitor circuit (230, 330), the driver comprising (a) a voltage amplifier (210, 310) comprising a signal input (212, 312), a feedback input (214, 314) and an amplifier output (216, 316), and (b) a feedback network (220) coupled between the amplifier output (216, 316) and the feedback input (214, 314). The feedback network comprises a track-and-hold circuit (222) adapted to mask a voltage dip occurring at the amplifier output (216, 316) at the beginning of a switched capacitor circuit charging phase. There is also described a switched capacitor circuit comprising such a driver, a sensor device, and a method of driving a switched capacitor circuit. |
| US09614511B2 |
Low-power high-swing PAM4/PAM8 fast driver
A driver for performing efficient low-power high-swing modulation, which comprises a first plurality of N controllable switching elements and introducing low impedance between the contacts in response to a low control level and vice versa; a second plurality of N controllable switching elements and introducing high impedance between the contacts in response to a low control level and vice versa; a DC power supply for feeding the driver, the positive port of which is connected to the common contact of the first plurality and the negative port of which is connected to the common contact of the second plurality; a plurality of N voltage dividers, each divider consisting of two serially connected resistors connecting between a free contact of a controllable switching element from the first plurality and a free contact of a controllable switching element from the second plurality, where each two controllable switching elements connected by a voltage divider forming a pair; a plurality of N control inputs, each of which jointly controlling the control inputs of a different pair; and a common output connecting between all N common points of all pairs of serially connected resistors forming the N voltage dividers. |
| US09614509B1 |
Internal/external clock selection circuit and method of operation
A clock circuit includes an amplifier, an electrical supply, a feedback circuit, and a comparator. The amplifier has an input node and an output node that are coupled to a crystal to provide an internal clock signal on the output node at a specified frequency. The electrical supply source provides electrical power to the amplifier at a specified input voltage. The feedback circuit is coupled between the input node and the output node, and forms a low pass filter for attenuating the internally generated clock signal on the input node. The feedback circuit biases the input node at a direct current (DC) voltage level that is biased to be less than the specified input voltage. When an external clock signal is applied at the output node, the comparator generates a digital clock signal according to the external clock signal, and when no external clock signal is applied at the output, the comparator generates the digital clock signal according to the internal clock signal. |
| US09614507B2 |
Programmable delay circuit including hybrid fin field effect transistors (finFETs)
Embodiments relate to programmable delay circuit. An aspect includes a first stage comprising a first hybrid fin field effect transistor (finFET) comprising a first gate corresponding to a first control FET, and a second gate corresponding to a first default FET, and a first plurality of fins, wherein the first gate and the second gate of the first stage each partially control a first shared fin of the first plurality of fins. Another aspect includes a second stage connected in series with the first stage, the second stage comprising a second hybrid finFET comprising a first gate corresponding to a second control FET, and a second gate corresponding to a second default FET, and a second plurality of fins, wherein the first gate and the second gate of the second stage each partially control a second shared fin of the second plurality of fins. |
| US09614501B2 |
Pulse generation circuit, shift register circuit, and display device
A pulse generation circuit is configured with a plurality of transistors of a single conductivity type. The pulse generation circuit includes: an output unit including a current limiting element configured to supply, by a predetermined current, a first voltage from a first power supply line supplied with the first voltage to an output terminal, the output unit being configured to perform a bootstrap operation that outputs the first voltage to the output terminal in response to a received input signal; and an output control unit configured to initiate the bootstrap operation when the output terminal transitions to the first voltage, and after the output terminal transitions to the first voltage, terminate the bootstrap operation and perform control so as to output the first voltage from the current limiting element to the output terminal. |
| US09614498B2 |
Active balun circuit and transformer
An active balun circuit includes a CG transistor having a source terminal thereof connected to an input terminal and a gate terminal thereof grounded, a CS transistor having a gate terminal thereof connected to the input terminal and a source terminal thereof grounded, an asymmetrical transformer, a first output terminal, and a second output terminal. The asymmetrical transformer includes a primary coil and a secondary coil. The primary coil includes a first inductor connected to the CG transistor and a second inductor connected to the CS transistor. The secondary coil includes a third inductor associated with the first inductor and a fourth inductor associated with the second inductor. The first output terminal outputs a first signal generated at the third inductor, and the second output terminal outputs a second signal generated at the fourth inductor. |
| US09614491B2 |
Composite electronic component and board having the same
A composite electronic component includes a composite body containing a capacitor and an inductor coupled to each other, the capacitor including a ceramic body having a plurality of dielectric layers and first and second internal electrodes, and the inductor including a magnetic body including a coil part, an input terminal disposed on a first end surface of the composite body and connected to the coil part, an output terminal including first output terminals disposed on a second end surface of the composite body and connected to the coil part and a second output terminal disposed on a second side surface of the composite body and connected to the first internal electrodes, and a ground terminal disposed on a first side surface of the composite body. The capacitor and the inductor are coupled in a vertical direction, and a magnetic metal layer is provided between the inductor and the capacitor. |
| US09614489B2 |
Sound producing system and audio amplifying method thereof
The invention provides one sound producing system including a speaker, a driving circuit and an audio controller. The speaker is used for producing an audible sound. The driving circuit is connected to the speaker. The audio controller is configured to receive an input audio signal and pre-amplify the input audio signal with an amplify gain to obtain a pre-amplified audio signal; operate a multiband dynamic range control on the pre-amplified audio signal to obtain an output audio signal; convert the output audio signal to a driving voltage; provide the driving voltage to the speaker through the driving circuit; detect over the driving circuit to obtain at least one excursion parameter to determine an estimated excursion of the speaker in response to the driving voltage; and adjust the amplify gain according to the estimated excursion. |
| US09614486B1 |
Adaptive gain control
A gain control system is responsive to a user gain setting and to an effective signal level to calculate and adaptively vary an output gain to avoid output clipping. The effective signal level is calculated by smoothing the energy of an input audio signal in accordance with selected attenuation factors. In times during which fast transient sounds are occurring, attenuation factors corresponding to relatively low levels of attenuation are selected. In times during which fast transient sounds are not detected, attenuation factors corresponding to relatively higher levels of attenuation are selected. The effective signal level is held at a constant level during periods of silence in order to avoid increasing the output gain during these periods. The output gain is calculated based on a comparison of the effective signal level to a compression threshold. |
| US09614485B2 |
Amplifier circuit
An amplifier circuit includes: plural transistors; plural first transmission lines respectively connected between input terminals of the plural transistors; plural second transmission lines respectively connected between output terminals of the plural transistors; an input node connected to the input terminal of a first stage transistor among the plural transistors; an output node connected to the output terminal of a final stage transistor among the plural transistors; and a capacitance connected to the output terminal of the first stage transistor via a third transmission line. |
| US09614483B2 |
Current analog audio amplifier
A current analog audio amplifier having an operational amplifier current-reading and voltage-controlling current source, a voltage gain stage, an output buffer stage, a negative feedback circuit, a high-frequency compensation circuit, and a bias circuit. The operational amplifier current-reading and voltage-controlling current source is connected to the voltage gain stage. The voltage gain stage is connected to the output buffer stage. The negative feedback circuit is connected to the operational amplifier current-reading and voltage-controlling current source. The high-frequency compensation circuit and the bias circuit are connected separately to the operational amplifier current-reading and voltage-controlling current source. |
| US09614482B2 |
Amplifier
An amplifier includes two input terminals to receive a differential, two-tone transmission signal; two output terminals; a coil having terminals connected with the input terminals respectively, and a center tap; a first transistor having the gate connected with one terminal of the coil, and the output terminal connected with one output terminal; a second transistor having the gate connected with the other terminal of the coil, and the output terminal connected with the other output terminal; a diode having a terminal connected with the center tap; and a bias circuit connected with the other terminal of the diode to output a gate voltage to turn on the first and second transistors. The diode adjusts the terminal voltage depending on a signal level of a double harmonic wave of the transmission signal supplied to the terminal of the diode from the center tap. |
| US09614481B2 |
Apparatus and methods for chopping ripple reduction in amplifiers
Apparatus and methods for digitally-assisted feedback offset correction are provided herein. In certain configurations, an amplifier includes amplification circuitry for providing amplification to an input signal and chopping circuitry for compensating for an input offset voltage of the amplifier. Additionally, the amplifier further includes a digitally-assisted feedback offset correction circuit, which includes a chopping ripple detection circuit, a feedback-path chopping circuit, a digital correction control circuit, and an offset correction circuit. The chopping ripple detection circuit generates a detected ripple signal based on detecting an output ripple of the amplifier. Additionally, the feedback-path chopping circuit demodulates the detected ripple signal using the amplifier's chopping clock signal. The digital correction control circuit receives the demodulated ripple signal, which the digital correction control circuit uses to control a value of a digital offset control signal that controls an amount of input offset correction provided by the offset correction circuit. |
| US09614480B2 |
Wide-band multi stage doherty power amplifier
A multi-stage Doherty power amplifier (“PA”) circuit which achieves superior efficiency over broadband range of frequencies is disclosed. Conventional multi-stage amplifiers may offer potential for efficiency enhancement but may suffer from cost penalties and severe bandwidth limitation in practice. Embodiments may employ a driver in the peaking arm which is biased in class C which may alleviate such limitations. The amplifier topology and associated circuitry described in embodiments may achieve high efficiency, smooth PA gain, and enhanced phase characteristics over a 15% fractional bandwidth with reduced costs. |
| US09614476B2 |
Group delay calibration of RF envelope tracking
An RF communications system, which includes an RF power amplifier, an envelope tracking power supply, and supply control circuitry, is disclosed. The RF communications system operates in one of a normal operation mode and a calibration mode. During the calibration mode, the RF power amplifier receives and amplifies an RF input signal to provide an RF transmit signal using an envelope power supply signal, which is provided by the envelope tracking power supply. Further, the supply control circuitry controls the envelope tracking power supply to cause a sharp transition of the envelope power supply signal when a setpoint of the envelope power supply signal transitions through a setpoint threshold of the envelope power supply signal. |
| US09614474B2 |
Periodic disturbance automatic suppression device
In suppression of torque ripple with a periodic disturbance observer, adjustment of a gain portion is determined sequentially during monitoring operation of monitoring an operating condition. Therefore, many adjusting parameters are involved and achievement of correction is dependent on the skill of a person in charge of adjustment or design. The periodic disturbance observer is provided with a model correcting means or section which calculates an error of an identification model by using a time difference quantity by an output of the periodic disturbance observer and a sensed value of a plant and corrects the identification model with the error of the identification model. Finally, the system performs the torque ripple suppression control with an accurately estimated periodic disturbance. |
| US09614472B2 |
System for monitoring temperature inside electric machines
The electric machine comprises at least one winding made of a material having a temperature dependent resistance. The temperature of the winding is monitored using the resistance therein. Temperatures or resistances indicative of a fault can be sensed, and corrective action taken, without the need for dedicated temperature sensors. |
| US09614470B2 |
Motor current controller and method for controlling motor current
A motor current controller includes: an H-bridge circuit that includes a switching element and is connected to a motor coil provided in a motor; and a control unit that drives the switching element every PWM cycle and designates an operation mode from among a plurality of modes including a charge mode, in which a motor current flowing in the motor coil increases, and a decay mode, in which the motor current is decreased for the H-bridge circuit. The control unit operates to select the decay mode as the operation mode with higher priority during a period in which the PWM cycle ends after the maximum duty time elapses from the start of each PWM cycle. |
| US09614468B2 |
Intermediate connecting devices and electronically commutated motors for HVAC systems
Intermediate connecting devices and electronically commutated (ECM) motors for HVAC systems are disclosed, as well as methods for their use within the HVAC systems. An interface component device coupled to a system controller and an ECM motor may be configured to receive a first and second signal, and convert the voltage across the received signals to a lower-value voltage signal compatible with the ECM motor. The converted voltage signal may be transmitted to the ECM motor to cause the motor to operate in one of a plurality of operation modes. An ECM motor that includes a tap detection circuit and a processor may be configured to receive a voltage signal from the interface component and detect at which input port the voltage signal is received. The ECM motor may select the operation mode for the motor based on the detection of which input port received the voltage signal. |
| US09614459B2 |
Modulation of switching signals in power converters
There is provided a method and control system for controlling a switching device in a power converter according to a modulation scheme. The switching device couples a direct current (DC) source to provide an alternating current (AC) output at a particular switching frequency. The method comprises the step of, in each switching period, switching the switching device between active configurations providing a finite voltage at the output and inactive configurations providing a zero voltage at the output. The ratio between the total period of time in which the switching device is in an active configuration and the total period of time in which the switching device is in an inactive configuration is the same for each switching period and is determined according to the desired voltage at the AC output. However, in each switching period, there are at least two time periods in which the switching device is in an inactive configuration, and the ratio between those at least two time periods is changed in dependence on temperature associated with the switching device. |
| US09614458B1 |
Methods for determining maximum power point tracking in power converters
Methods and systems for determining maximum power points in photovoltaic inverters. The present application describes unique PV converter topologies including algorithms embedded in controllers. The algorithms can be a variable step size binary search to adjust the input conductance in order to find the conductance that will produce the maximum power out of a PV array. Due to these special topologies, the PV inverter will often not experience sudden shutoffs when typical low voltage cut-off limit is reached since a low-current cut-off limit is also set. |
| US09614456B2 |
Power conversion apparatus that prevents inrush current and air-conditioning apparatus using the same
A power conversion apparatus includes: a first smoothing capacitor and a second smoothing capacitor connected in parallel to each other, an inrush current preventing circuit connected in series to the first smoothing capacitor, the inrush current preventing circuit including an inrush preventing resistor for suppressing an inrush current and a first relay connected in parallel to the inrush preventing resistor; a second relay connected in series to the second smoothing capacitor; an inverter circuit for converting the output smoothed by the first smoothing capacitor and the second smoothing capacitor into an AC voltage and outputting the AC voltage to a load; and relay controlling means for controlling a switching operation of the first relay and the second relay. |
| US09614455B2 |
High voltage direct current transmission system and control method thereof
A high voltage direct current (HVDC) transmission system is provided. The high voltage direct current (HVDC) transmission system includes: a rectifier converting alternating current (AC) power into DC power; an inverter converting the DC power into the AC power; a DC transmission line transmitting, to the inverter, the DC power obtained through conversion by the rectifier; a first active power measurement unit measuring first active power input to the rectifier; a second active power measurement unit measuring second active power output from the inverter; and a first control unit detecting an abnormal voltage state on the DC transmission line based on the first and second active power measured. |
| US09614452B2 |
LED driving arrangement with reduced current spike
A LED driving arrangement constituted of: a control circuitry; an inductance element having a primary side and a secondary side; the inductance element arranged, responsive to a switching circuit, to receive power at the primary side from a power source, and the inductance element further arranged, responsive to the received power at the primary side, to output at the secondary side a function of the received power; at least LED based luminaire; a parasitic capacitance between the at least one LED based luminaire and a chassis; and an electronically controlled switch coupled between the secondary side of the inductance element and the at least one LED based luminaire, wherein the electronically controlled switch and the secondary side of the inductance element and a discharge path of the parasitic capacitance are coupled in series. |
| US09614451B2 |
Starting an isolated power supply with regulated control power and an internal load
A power apparatus for an external load comprises a transformer, a power coordinating unit, a control unit and an internal load. The transformer is adapted for transforming an input voltage into an output voltage and an auxiliary voltage in response to an operating signal. The transformer comprises a first coil, a second coil and an auxiliary coil electromagnetically coupled to one another. The power coordinating unit comprises a first resistor, a transistor, a second resistor, a diode and a capacitor. The control unit is coupled between the first node and the first coil and configured to selectively generate the operating signal. When the control unit operates in a protective mode, the control unit is configured not to generate the operating signal, the power coordinating unit is configured to generate a coordinating current supplied to the internal load by using a starting voltage of the first node. |
| US09614449B2 |
Flyback power converter with programmable output and control circuit and control method thereof
The present invention provides a flyback power converter with a programmable output and a control circuit and a control method thereof. The flyback power converter converts an input voltage to a programmable output voltage according to a setting signal, wherein the programmable output voltage switches between different levels. The flyback power converter includes: a transformer circuit, a power switch circuit, a current sense circuit, an opto-coupler circuit, and a control circuit. The control circuit adaptively adjusts an operation signal according to a level of the programmable output voltage, to maintain a same or relatively higher operation frequency of the operation signal when the programmable output voltage switches to a relatively lower level, so as to maintain a phase margin while supplying the same output current. |
| US09614446B2 |
Power supply device
A power adaptor to supply power for a portable device has an input circuit (21) for receiving mains input power, a power switch device (25), a power inductance (24) and an output circuit (22) coupled to the power inductance to provide the supply power for the portable device, and a controller (26) for controlling the power switch device according to a supply power requirement of the portable device. The adaptor has a measurement inductance (27) magnetically coupled to the power inductance, and the controller comprises a measurement input (28) for detecting a measurement signal indicative of a magnetic state of the power inductance. The controller detects the supply power requirement based on the magnetic state in response to a controlling of the power switch device via the controller. Advantageously different portable devices can be supplied by appropriate power. |
| US09614437B2 |
Switching regulator and control circuit and control method therefor
Disclosed are a switching regulator and a control circuit and a control method therefor. In one embodiment, a switching control signal with decreasing on time is generated to control a power switch in a second mode so that audio noise can be avoided when the switching regulator operates in a light loaded or unloaded condition. |
| US09614436B2 |
Circuit and method for dynamic switching frequency adjustment in a power converter
A method and a circuit dynamically adjust a frequency of a clock signal that drives the operations of a power converter. The method includes (a) detecting a change from a predetermined value in an output voltage of the power converter; and (b) upon detecting the change, changing the frequency of the clock signal so as to restore the output voltage. The change, such as a load step-up, may be detected by comparing a feedback signal generated from the output voltage and a predetermined threshold voltage. In one implementation, changing the switching frequency is achieved in increasing (e.g., doubling) the frequency of the clock signal, as needed. The frequency of the clock signal need only be changed for a predetermined time period. |
| US09614432B2 |
PFC signal generation circuit, PFC control system using the same, and PFC control method
A PFC signal generation circuit which generates a PFC signal to control a PFC circuit including a first inductor connected to a first switch and a second inductor connected to a second switch includes: a first control signal output circuit that outputs a first PFC signal to turn on the first switch at a zero current detection timing of the first inductor; a timing adjustment circuit that generates a control signal to turn on the second switch after waiting until a target timing, when a zero current detection timing of the second inductor is earlier than the target timing, and to turn on the second switch at a target timing in a subsequent cycle, when it is later than an allowable period from the target timing; and a second control signal output circuit that generates a second PFC signal to turn on the second switch according to a control signal. |
| US09614431B2 |
Control circuit and motor device
A control circuit includes: an input terminal for receiving an input AC voltage; a voltage decreasing unit for decreasing the input AC voltage; an A-D converter for converting the decreasing AC voltage to a DC voltage; a driving unit for receiving the DC voltage and to driving a motor, a detecting unit for detecting the DC voltage; and a current shunt unit configured to be conductive to lower the DC voltage at the output terminal of the A-D converter to a voltage which is less than a threshold voltage when the detecting signal indicates that the detected DC voltage exceeds the threshold value. A motor device includes the control circuit and a motor. |
| US09614427B2 |
Multi-string inverter having input-side EMC filter
An inverter includes a DC/AC converter, a DC intermediate circuit on the direct current input side of the DC/AC converter, multiple DC/DC converters connected in parallel to one another on the output side to the DC intermediate circuit, multiple inputs each coupled to one of the DC/DC converters, and an EMC filter connected between the inputs and the DC/DC converters. The EMC filter includes chokes in all current-carrying lines between the inputs and the DC/DC converters and filter capacitors between the inputs and the DC/DC converters leading from all the current-carrying lines to ground. The chokes in all current-carrying lines from the at least two inputs are formed by means of choke windings on a common core of a current-compensated choke. |
| US09614423B2 |
Method for producing rotating electrical machines
A method for producing rotating electrical machines having a motor coil produced in a cantilevered manner for motors or generators, wherein the coil already surrounds the inner part during the manufacturing process, i.e. is pre-assembled, and this is also used as an aid for coil shaping during the production of the coil, includes a first step, in which the motor coil is wound in a stepwide process between two end faces over the magnetic inner part and completely surrounds the inner part, a second step, in which the shaping of the motor coil is carried out by pressing the winding wires by moving the shaft with the surface of the inner part against the inner side of the motor coil, in particular by eccentrically rolling off of the latter and pressing it against an abutment, and a third step, in which the pressed motor coil is baked by way of applying heat. Also provided is a rotating electrical machine. |
| US09614421B2 |
Motor controller and brushless DC motor comprising the same
A motor controller, including: a control box including an inner wall; a circuit board; a dissipater; an IGBT module; and an insulating piece. The circuit board is disposed inside the controller box. The dissipater is disposed on the inner wall of the control box. The IGBT module is disposed on the dissipater and is in electric connection with the circuit board. The insulating piece is disposed between the dissipater and the controller and prevents the dissipater from contacting with the control box. |
| US09614418B2 |
Electric cylinder and electric cylinder system
An electric cylinder includes: an outer cylinder including, on one end side, a fixing section; a rod configured to be capable of expanding and contracting in an axis direction from an opening on the one end side of the outer cylinder; a bearing provided on the other end side end and on the inside of the outer cylinder; a rotating shaft supported by the bearing and driven to rotate; a screw mechanism configured to convert a rotational motion of the rotating shaft into a linear motion of the rod and transmit the linear motion; and a distortion detecting unit provided on the outer circumference of the outer cylinder. The outer cylinder includes at least two or more division members that can be divided and combined. The distortion detecting unit is provided in one division member among the two or more division members. |
| US09614416B2 |
Drive module for a vehicle
A drive module for a vehicle has a transmission (12) and an electric machine (11) that is coupled to an input shaft (16) of the transmission (12). An air-filled cavity (23) is formed between the electric machine (11) and the transmission (12). The electric machine (11) is an external-rotor motor with a rotor (24) that surrounds the stator (25). A fan impeller (31) rotates with the rotor (24) and draws air out of the air-filled cavity (23) in an axial direction, draws the air through windings (27) of the stator (25) for cooling, and subsequently conveys the air in the radial direction into a housing-side flow duct (34) in which heated air can be accumulated and via which the air can be returned toward the cavity (23). The heated air can be cooled in the region of the flow duct (34) and/or in the region of the cavity (23). |
| US09614410B2 |
Linear motor system
A linear motor system includes a coil assembly and a magnet assembly disposed adjacent to the coil assembly. The coil assembly includes a plurality of coil windings and a sealing material to seal and to prevent moisture and/or chemical ingress into the coil windings. The magnet assembly includes a plurality of magnets, a magnet housing disposed to house, cover and seal the plurality of magnets within the magnet housing, a plate to cover the plurality of magnets, a sealing element disposed between the plate and the magnet housing to seal the magnet assembly, and a groove formed to receive the sealing element between the plate and the magnet housing. |
| US09614409B2 |
Motor with hall sensor cover and waterproof cover
In a motor according to the present invention configured of a stator core having a plurality of teeth formed in a radial shape and an upper insulator and a lower insulator surrounding an upper portion and a lower portion of the stator core, the motor includes a hall sensor cover combined on a top of the teeth of the upper insulator and having a plurality of hall sensors, and a hall sensor resting unit for resting lower end portions of the hall sensors is formed on a top of one end portions of the teeth of the upper insulator. |
| US09614408B2 |
Electric linear actuator
An electric linear actuator has a housing, an electric motor, a speed reduction mechanism, and a ball screw mechanism. The ball screw mechanism has a nut and a screw shaft. Both include a helical screw groove. The nut is supported by rolling bearings mounted on the housing. The screw shaft is coaxially integrated with the drive shaft. The screw shaft is inserted into the nut, via a large number of balls. The housing has a first housing and a second housing. The electric motor is mounted on the first housing. The second housing abuts against an end face of the first housing. At least one of the first and second housings is formed with ribs. The ribs extend from each of securing portions to a containing portion that contains the screw shaft. The securing portions are arranged on the periphery of the housing to receive fastening bolts. |
| US09614407B2 |
Rotary electric machine stator
A rotary electric machine stator includes an electric power distributing apparatus that includes: respective phase busbars that are electrically connected to respective phase coils; a resin holder that is disposed so as to surround the respective phase busbars, and that includes a partitioning wall portion that insulates between adjacent busbars, the resin holder including an opening portion that opens outward in an axial direction of the stator core; and a resin cover that covers the opening portion. A rib that is bent radially is formed on a radially outer edge portion of the opening portion of the resin holder. |
| US09614406B2 |
Wedge for stator having overmolded insulation
A stator for use in an electric motor is disclosed. The stator comprises an annular core, a plurality of wedges, and a plurality of wedge-retaining structures. The core includes a plurality of arcuately spaced apart teeth. Each of the teeth includes a generally radial leg and a head projecting from the leg to present a pair of arcuately spaced apart head ends. A slot opening is defined between the opposed head ends of each adjacent pair of teeth. Each of the wedges is received within a corresponding slot opening. Each wedge-retaining structure is at least in part fixed relative to the core and cooperates with a respective one of the wedges to compressibly retain the respective wedge between the head ends. |
| US09614404B2 |
Stator of rotary electric machine including restricting member for preventing deformation of coil end portions and electric motor including such stator
A stator of a rotary electric machine includes a stator core and coils. The stator core is provided with a plurality of slots extending in an axial direction and being spaced apart from one another in a circumferential direction. The coils are wound around through the slots. The coils include coil end portions which protrude outward in the axial direction from an end surface of the stator core. The stator includes a restricting member situated on an inner side of the coil end portions in the radial direction. The restricting member serves to prevent deformation of the coil end portions inward in the radial direction. |
| US09614403B2 |
Resin molded stator and manufacturing method thereof
A method for manufacturing a resin molded stator may include: preparing a straight winding core in which neighboring partial core backs are coupled by a joint; bending the core at joints and causing distal ends of teeth to face an outer peripheral surface of a core metal to obtain a core metal assembly including a stator mounted on the core metal, arranging the core metal assembly in a mold; injecting resin into the mold, covering windings with resin, curing the resin; and removing the stator from the mold and the core metal. The core metal may include a plurality of ribs projecting outward from the outer peripheral surface, the number of the ribs being between three and the number of the teeth. Each rib may extend parallel to a center axis, and each rib may be located in a gap between the distal ends of adjacent teeth. |
| US09614402B2 |
Power transmission apparatus, power reception apparatus, wireless power feeding system, and control method thereof
There is provided a power transmission apparatus capable of selecting a power transmission apparatus for power feeding easily from among a plurality of power transmission apparatuses. A power transmission apparatus configured to feed power wirelessly to a power reception apparatus includes a communication unit configured to communicate with another power transmission apparatus configured to feed power wirelessly to the power reception apparatus, an acquisition unit configured to acquire individual information about the power transmission apparatus and individual information about the another power transmission apparatus via the communication unit, a transmission unit configured to transmit the individual information about the power transmission apparatus and the individual information about the another power transmission apparatus acquired by the acquisition unit to the power reception apparatus, and a power feeding unit configured to feed power to the power reception apparatus in response to a power feeding request from the power reception apparatus. |
| US09614401B2 |
Control method, control server, and computer-readable recording medium
A control server according to an embodiment sorts a plurality of notebook PCs into a plurality of groups so that the total value of the remaining energy is a value similar to the total value of the remaining energy of the rechargeable batteries of a plurality of notebook PCs included in a different group. The control server according to the embodiment performs local search individually on the sorted groups, and generates a control plan for the individual notebook PCs. |
| US09614400B2 |
DC energy store systems and methods of operating the same
A dc energy store system includes a dc energy store, an AC/DC power converter having ac terminals connected to an ac power supply and dc terminals connected to the dc energy store, and at least one auxiliary unit associated with the dc energy store. The dc energy store system is adapted to be operated in a number of different operating modes including: (i) a first mode to supply power from the ac power supply to the dc energy store; (ii) a second mode to supply power from the dc energy store to the ac power supply; (iii) a third mode to supply power from the ac power supply to the auxiliary unit(s); and (iv) a fault mode where there is a fault in the ac power supply, and power is supplied from the dc energy store to the auxiliary unit(s). |
| US09614398B2 |
Custom wireless retrofitted solar powered public telephone
A public telephone powered by a solar panel system and configured to transmit and receive calls over a cellular network is provided. A solar panel systems and wireless unit are retrofitted to conventional public telephones to convert them to wireless operation and to enable operations independent of the electrical grid and from the local telephone exchange. |
| US09614397B2 |
Battery charging apparatus for vehicle
A battery charging apparatus for a vehicle includes a driver, a position detector, and a controller. The driver includes switching elements to convert three-phase AC power outputted from a winding of each phase of a stator of a three-phase AC generator into DC power to supply the DC power to a battery. The position detector is configured to output a position detection signal indicating a position of a rotor of the three-phase AC generator. The controller is configured to control the switching elements to be switched between an energized state and non-energized state. The controller is configured to have a maintenance period during a period until next input of the position detection signal if the period exceeds an energization period. The switching elements are to be maintained in the maintenance period in the energized state or non-energized state immediately before the period exceeding the energization period. |
| US09614396B1 |
Multi-element portable wireless charging device and method
The multi-element portable wireless charging device includes a transmitter having a DC power source (battery), an oscillator connected to the battery for converting the DC to AC, a power amplifier connected to the AC output of the oscillator, and at least one flat, planar primary coil connected as a load of the power amplifier circuit. The system also includes a receiver (typically installed in the device requiring recharging) that has a flat, planar secondary coil in which an AC current is induced when placed in close proximity (1-3 cm) to the primary coil, a full-wave bridge rectifier to rectify the AC current to DC, and a voltage regulator connected to the rectifier to provide a steady DC voltage required by the charging circuit to charge the mobile device. Power is transmitted from the transmitter to the receiver by magnetic inductive coupling. |
| US09614395B2 |
Wireless charging system and foreign metal object detection method for the system
A wireless charging system includes a wireless charging device and a power-consuming device installed in a charging area. The wireless charging device has a signal conversion module connected to a controller, a transmitter antenna and a power input terminal. The power-consuming device has a receiver coil connected to a rectifier and outputting generated power through a power output terminal. Before or when the wireless charging device charges the power-consuming device, the controller of the wireless charging device can detect a power consumption status, voltage and current information and phase difference information of the transmitter antenna to instantly determine if any foreign metal object enters the charging area, thereby preventing high temperature generated by the foreign metal object from causing equipment damage and danger and enhancing wireless charging safety. |
| US09614390B2 |
Wireless charging apparatus and portable terminal including the same
A wireless charging apparatus provided in an electronic device is provided. The wireless charging apparatus includes a charging resonance unit for wireless charging; a driving circuit unit to which the charging resonance unit is connected and to which an internal circuitry is mounted; a shield member mounted to a rear surface of the charging resonance unit; and a heat dispersion member mounted to the driving circuit unit and the shield member to disperse heat generated by the driving circuit unit. |
| US09614385B2 |
Apparatus and method for full-orientation over-the-air charging in portable electronic devices
An apparatus and method for full-orientation over-the-air charging includes a receiver coil associated with a portable electronic device for wireless charging; and a repeater coil associated with a device selectively configured to engage or support the portable electronic device for wireless charging, wherein the device is one of a cover, holster, or case for the portable electronic device; wherein, when the device is selectively engaged or supporting the portable electronic device, a portion of the repeater coil overlaps a portion of the receiver coil forming a magnetic coupling therebetween and supporting wireless charging of the portable electronic device in a plurality of orientations of the portable electronic device relative to a transmitter coil. |
| US09614378B2 |
Inductive charging interface with magnetic retention for electronic devices and accessories
An inductive charging interface with magnetic retention can be used for charging electronic devices and accessories. For example, a magnetic core of an inductive charging configuration may be divided into two magnetic elements, one element can be housed within a receptacle or receiving connector of housing of an electric device and the other element can be housed within a plug or transmission connector. The poles of the two elements of the magnetic core may create a magnetic field to retain the plug connector in an aligned, mated position with the receptacle connector of the electronic device in addition to directing magnetic flux to flow in a circular path around and between the two elements of the magnetic core, thereby inducing a current for charging the internal battery of a device. |
| US09614377B2 |
Aircraft tire pressure sensor resonant loop link
The aircraft tire pressure resonant loop link assembly electromagnetically couples a magnetic field between a wheel axle electromagnetic adapter transformer primary coil and a tire pressure sensor receiver coil for powering a tire pressure sensor, and includes a pair of spaced apart electrically conductive connecting arms, a single electrically conductive primary loop electrically connected to first ends of the connecting arms mounted adjacent to a secondary tire pressure sensor coil, and a circuit including a resonant tuning capacitor and a secondary coil with one or more electrically conductive loops at second ends of the connecting arms. The tire pressure sensor coil pair includes a transformer core, and secondary resonant coil pair also includes a transformer core. |
| US09614370B2 |
Surge arrester
A surge arrester comprises an electrical insulator (10), which surrounds a cavity (20), a pin electrode (30) and a tube electrode (40), which are arranged in the cavity (20), wherein the pin electrode (30) projects into the tube electrode (40). An ignition strip (50) is applied on an inner surface (S10a) of the insulator facing the cavity (20). An outer metallization (61, 62, 63) is arranged on an outer surface (S10b) of the insulator (10). As a result, an effective reduction of the protection level can be achieved in the case of the surge arrester. |
| US09614369B2 |
ESD protection device
An electrostatic discharge (ESD) device is disclosed having two PNP transistors. During a high-voltage ESD event a parasitic NPN transistor couples to one of the two PNP transistors to provide ESD protection. |
| US09614368B2 |
Area-efficient active-FET ESD protection circuit
An electrostatic discharge (ESD) protection circuit includes a high power supply rail (VDD) and a low power supply rail (VSS). The ESD protection circuit further includes an active shunt transistor coupled between VDD and VSS. The active shunt transistor includes a gate. The ESD protection circuit also includes a sensing transistor connected between an input/output (I/O) pad and the gate of the active shunt transistor. If an ESD stress event occurs on the I/O pad or on a VDD pad, the sensing transistor is caused to be turned ON thereby permitting a voltage on the I/O or VDD pad experiencing the ESD stress event to turn ON the active shunt transistor in turn causing ESD current to flow from the pad experiencing the ESD event, through VDD, and through the active shunt transistor to VSS. |
| US09614367B2 |
Electronic device for ESD protection
A device includes a transistor configured for operating in a hybrid mode, an element configured for generating and injecting a current into the substrate of the transistor in the presence of an ESD pulse, and a thyristor triggerable at least by the element. |
| US09614366B2 |
Protecting circuit and integrated circuit
Described herein are a protecting circuit and an integrated circuit capable of discharging electric current sufficient for an input voltage having a large time variation while suppressing power consumption. The protecting circuit includes: a first shunt circuit including a first shunt pathway connected to an input terminal, the first shunt circuit being configured to have a relatively low discharge capacity of the first shunt pathway and a relatively long response time; a second shunt circuit including a second shunt pathway connected to the input terminal, the second shunt circuit being configured to have a relatively high discharge capacity of the second shunt pathway and a relatively short response time; and a control circuit configured to enable the second shunt pathway to discharge based on a time variation of an input voltage at the input terminal. |
| US09614362B2 |
Overcurrent protection device
An overcurrent protection device satisfactorily detects overcurrent without adding complicated component or occupying large space. Penetration member penetrates board face A having a first wiring circuit and face B with a second one, transmitting heat from face A to B. Connection/disconnection part is inserted into first wiring circuit, switching current to heat generation part for generating heat with current, formed in portion of first circuit, continued with one end of penetration member. Temperature detection member disposed near or abutted against other end of penetration member on face B detects transmitted heat, outputting signal. Control part controls connection/disconnection part on signal. Heat generation part is narrower than width w1 not generating heat in steady state, having width w2 to raise temperature upon overcurrent, and being sandwiched between patterns with width w1. Control part turns off current with heat generation part temperature raised to or above prescribed threshold. |
| US09614361B2 |
Waterproof seal for electrical assemblies
A waterproof seal for electrical assemblies having conductive wires attached to a metal contact and inserted into a connector body. The conductive wires and metal contact are coated with solder to fill the gaps. The space between the soldered wires and the connector body are filled with an epoxy. The wire insulation and connector body are continuously sealed with a bonding agent. A section of wire insulation and the connector body are encased within an outer plastic jacket overmold. |
| US09614359B2 |
Low profile while-in-use electrical box and cover
A while-in-use electrical box including a housing having a front wall, a back wall, a top wall, a bottom wall and two opposed side walls. The housing has a longitudinal axis extending along the length of the box between the two side walls. The housing has a transverse axis extending from the back wall to the front wall. A device plate is disposed within the housing dividing the housing into a first section and a second section. The first section of the housing is enclosed and adapted to house an electrical device and the second section forms an electrical device access area. The device plate has a first panel forming a face plate for receiving a face of the electrical device. The second section is spaced from the first section along the longitudinal axis, and the face plate is in a non-parallel, non- perpendicular alignment with the housing transverse axis. |
| US09614351B1 |
Low-power, direct-drive driver circuit for driving an externally modulated laser (EML), and methods
A low-power, direct-drive EML driver circuit is provided that reduces power consumption by reducing the amount of current needed to create the necessary voltage swing in the drive signal. In addition, the EML driver circuit has an impedance matching network that has reduced complexity and that can be made at reduced costs compared to the impedance matching network of a typical EML driver circuit. |
| US09614345B2 |
Arrayed optical amplifier and optical transmission device
An arrayed optical amplifier includes: at least one first amplifier including a first excitation light source controlled to a first temperature; at least one second amplifier including a second excitation light source controlled to a second temperature different from the first temperature; and a control circuit coupled to the at least one first amplifier and the at least one second amplifiers. |
| US09614342B2 |
Air-cooled carbon-dioxide laser
A carbon dioxide waveguide-laser includes an elongated resonator unit and an elongated power-supply unit. The resonator and power-supply units are spaced by a cooling unit including a plurality of longitudinally extending, spaced-apart fins, with fans arranged to drive air through the spaces between the fins. |
| US09614338B2 |
Power module having multiple power receptacles
A power receptacle module for a work surface having multiple power receptacles includes a mounting frame configured to be received within an aperture in the work surface, a pivoting receptacle assembly pivotally mounted in the mounting frame and configured to pivot between a first orientation and a second orientation, relative to the mounting frame. The pivoting receptacle assembly has a flat face plate and a plurality of power receptacles fixedly mounted below the flat face plate. When the pivoting receptacle assembly is in the first orientation, the flat face plate is flush with a top surface of the work surface, and the plurality of power receptacles are hidden below the work surface. When the pivoting receptacle assembly is in the second orientation, the flat face plate is disposed at an oblique angle relative to the work surface, and the plurality of power receptacles are exposed. |
| US09614331B2 |
Signal referencing for memory
Apparatus, systems, and methods for signal referencing for memory are described. In one embodiment, connector for a memory device comprises a housing having a first panel and a second panel opposite the first panel to be positioned adjacent a circuit board, the first panel and second panel defining a slot to receive a portion of the memory device, a first plurality of electrically conductive pins disposed in the slot and proximate the first panel to establish electrical connections with a plurality of electrical connectors on the memory device, wherein at least one of the first plurality of pins is a ground pin and a layer of conductive material disposed proximate the second surface. The ground pin is electrically coupled to the layer of conductive material. Other embodiments are also disclosed and claimed. |
| US09614322B1 |
Magnetic repulsion-based electrical connector
Electrical connectors use magnetic repulsion for orienting themselves in the right polarity and magnetic attraction for holding together. When inserted into the ends of a conduit, a pair of these electrical connectors can transfer electricity through the conduit. Each electrical connector includes a housing with top and bottom surfaces and a fixed and a movable terminal both of which are recessed below the top surface of their respective, parallel passages. A spring controls terminal movement. Each terminal carries an electrical contact. A torus-shaped magnet surrounds the contact of the contact in the movable terminal so that its magnetic field energizes that contact. The magnets in movable terminals of each electrical connector are oriented in the same way so movable terminals of electrical connectors repel each other but fixed terminals attract movable terminals from their passages and into the passages of the fixed terminals so that two electrical connectors lock together. |
| US09614319B2 |
Reel-in-box jumper cables
A connecting device for connecting runs of communication material having a predetermined length and coupling elements at both ends is provided. The connecting device includes a first end, an opposing second end, and a separating element. The first end couples to a coupling element of a first run of communication material and the second end couples to a coupling element of a second run of communication material. The first run and second run of communication material is separated in response to activation of the separating element. Also provided is a bulk cable packaging system that includes a plurality of runs of communication material, each run having a predetermined length and coupling elements at both ends and a plurality of connecting devices. The runs of communication material are coupled together with the connecting devices is operatively coupled to a reel. The reel is then operatively coupled within a container. |
| US09614316B2 |
Tamper resistant receptacle with propeller shutter
A tamper resistant receptacle having a propeller shutter assembly comprising a propeller shutter comprising a central hub with an annual opening, a pair of radially extending arms, and a wing block disposed on the end of each arm. The shutter assembly also includes an anchor for attaching the propeller to the receptacle body and a spring member to bias the propeller in the “closed” position. The wing blocks are sized to block a respect one of the hot and neutral openings of a standard 15-amp electrical receptacle. The wing blocks each include a ramp or inclined cam surface. These surfaces are juxtaposed such that when a plug blade hit one surface and cams past it to cause rotation of the propeller, the opposite plug blade cams down and past the other surface to cause rotation of the propeller in the same direction. This configuration causes the propeller to translate vertical force from the plug blades into rotational force in a direction and of sufficient force to overcome the spring bias of the spring and rotate the propeller wing block out of the way of the electrical contacts such that the blades can “plug in” to the device's electrical contacts. |
| US09614314B2 |
Connector with a deflectable locking lance exposed on an outer surface of a housing
A connector is miniaturized and while still preventing damage to locking lances. Deflectable first and second locking lances (19, 79) configured to lock first and second terminal fittings (11, 61) are arranged to be exposed on first and second facing surfaces (15, 75) of first and second housings (10, 60). When the first and second housings 10, 60 are assembled, the first and second locking lances (19, 79) are arranged back-to-back with each other. Surfaces of the first and second locking lances (19, 79) facing the first and second cavities (17, 77) on tip parts in a projecting direction are continuous without any step and include locking surfaces (23, 83) configured to lock the first and second terminal fittings (11, 61) on tips in the projecting direction. |
| US09614313B2 |
Electrical connector having a contact with a fixing part press-fitted within a housing
The contact includes a contact protrusion that is inserted into the contact insertion hole protrudes from the optical axis direction partition wall into the camera lens module side, and functions as an electric contact for the camera lens module, a fixing part fixed to the housing, and a connection part that elastically connects the contact protrusion with the fixing part. The connection part includes a connection main body extending in the radial direction so as to recede from the fixing part, and a folding part disposed on the opposite side to the fixing part across the connection main body. The fixing part is disposed on the opposite side to the folding part across the connection protrusion in the radial direction. |
| US09614309B1 |
Electrical connector assembly
An electric connector assembly includes an intermediate connector for connecting the first mating connector to the second mating connector to facilitate connections between two circuit boards, which includes a power supply terminal having a main body portion and a flange portion having a larger width than the main body portion; an outer housing including a first inner housing portion affixed to the outer housing, the first inner housing portion having a first terminal penetrating portion configured to engage with the main body portion of a power supply terminal and latching portions. The intermediate connector also includes a second inner housing portion configured to align with the first inner housing portion that has engaging portions configured to engage the second inner housing portion to the outer housing via the latching portions; and a second terminal penetrating portion, configured to engage with the main body portion of the power supply terminal. |
| US09614307B2 |
Anti-data theft structures and electronic devices with the same
A connector in an electronic device includes a case, a supporting element, and an elastic element. The case defines a through hole and a plurality of latching portions protruding from an inner surface of the case surrounding the through hole. The latching portions include an engaging surface and a guiding surface adjacent to the engaging surface. The supporting element is partially received in the through hole. The supporting element includes terminal recesses and resisting pieces engaging with the engaging surface. The elastic element is partially received in the supporting element and supplied a resilient force. When the supporting element is moved away from the case, the resisting piece is separated from the engaging surface to make contact with the guiding surface under the resilient force. If reassembly of the connector contacts is not in the predetermined order the electronic device will be locked down. |
| US09614306B2 |
Printed circuit board terminal
The invention is a printed circuit board terminal, having a housing which has an inner wall and outer wall, a clamp spring, a contact element arranged inside the housing, and a connector element arranged outside the housing, wherein the contact element and the connector element are conductively connected to each other, and wherein the contact element is arranged flush with the inner wall and the connector element is arranged flush with the outer wall. |
| US09614305B2 |
Connector
A connector including a terminal fitting having a wire connecting portion crimped to an end of a wire and configured to be inserted into a terminal accommodating chamber of a housing. A sleeve is mounted on a rear part of the terminal fitting and retains the terminal fitting by engaged the terminal fitting and a wall surface of the terminal accommodating chamber. A heat shrinkable tube is fitted on an outer periphery of the wire connecting portion while being accommodated in the sleeve and held in close contact with an outer periphery of the terminal fitting by being thermally shrunk. The sleeve includes a lift-up portion for holding the heat shrinkable tube in a fitted state so that a clearance is secured between the heat shrinkable tube and an upper surface of the wire connecting portion by lifting up the heat shrinkable tube before thermal shrinkage in a radial direction. |
| US09614298B2 |
Crimp terminal
A crimp terminal is provided with a core wire crimping part having a bottom part and a caulking piece part that extends from a side of the bottom part. The core wire crimping part crimps a core wire composed of a plurality of strands of an electric wire. A number of triangular serrations are provided on a face of the core wire crimping part to which the core wire is crimped. |
| US09614293B2 |
Multi-band helical antenna system
A multi-use antenna system that can be used in, for example, integrated communications and navigation capability is provided. In an embodiment, an antenna system is provided. The antenna system includes a first antenna having a plurality of radiating elements substantially wrapped around an axis and a second antenna located within the first antenna. The first and second antennas are coupled to the same ground plane and are configured to operate in different frequency bands. |
| US09614283B2 |
Antenna structure and wireless communication device employing same
An antenna structure includes a main portion, a first radiating portion connected to the main portion, a second radiating portion connected to the main portion and opposite to the first radiating portion, and a coupling portion spaced from and coplanar with the main portion and opposite to the second radiating portion. The main portion and the first radiating portion excite a low frequency mode, the main portion, the first radiating portion, the second radiating portion, and the coupling portion excite a high frequency mode, and when the antenna structure is interfered by a user's human body when close to the user's human body, the coupling portion transmits the interference to ground. A wireless communication device employing the antenna structure is also disclosed. |
| US09614282B1 |
Multimode broadband antenna
A compact multimode broadband antenna that supports collocated resonances with very little destructive interference occurring between resonant modes. The antenna comprises a monopole element and a folded loop element that partially share structure, and are fed via a unitary RF feed port. The antenna is well suited for simultaneous dual band WLAN applications and ultra-wideband operations. |
| US09614281B2 |
Phase array antenna having a movable phase shifting element and a dielectric element for changing the relative dielectric constant
Embodiments of the present invention disclose a phase shifting apparatus, including a first conductor section, a first tapping element, a feeder unit, and a dielectric element, where: the feeder unit is electrically connected to the first tapping element; the first tapping element is electrically connected to the first conductor section; the first tapping element is capable of moving along the first conductor section to change a phase of a signal that flows through the feeder unit, the first tapping element, and the first conductor section; and the dielectric element is disposed at a position near the first conductor section. With the phase shifting apparatus in the embodiments of the present invention, the dielectric element is disposed in order to increase an electrical length of a conductor, which correspondingly reduces a physical length of the conductor, so that the size of the phase shifting apparatus is reduced. |
| US09614280B2 |
Optical feed network for phased array antennas
An optical feed network for a phased-array antenna may comprise a phase-based feed network that may include electro-optical phase shifting. |
| US09614275B2 |
Methods and apparatus for wide bandwidth antenna with enhanced connection
Methods and apparatus for a directive, instantaneous wide bandwidth antenna including a ground plane having a recess with a tapered region accessible by an electromagnetic field via a radiating aperture at a forward end of the recess. The dielectric feed can have a tapered portion proximate the tapered region to guide the electromagnetic field into the recess through the radiating aperture and influence pattern directivity. The antenna can further include a conductive plating disposed at least partially about the dielectric feed in a wedge configuration to influence pattern beam width. The dielectric feed can include a conductive portion on a bottom of the wedge coupled to the conductive plating and to a grooved trace. |
| US09614274B2 |
Multi-arm trap antenna
A multi-arm trap antenna for use with a wireless communication device includes at least two arms, each of which includes at least one arm segment; at least one wave trapping assembly, which includes an electrical inductor electrically connecting the arm segments of the arms; a signal feeding element, which electrically connects a radio frequency signal positive to at least one of the arms; and a grounding element, which is electrically connected to a radio frequency signal negative for grounding to form a monopole antenna, or electrically connects the radio frequency signal negative to the arms to which the radio frequency signal positive is electrically connected to form an inverted F-shaped antenna, or electrically connects the radio frequency signal negative to at least one of the arms to form an aperture-coupled antenna. The arms are arranged adjacent to the grounding element in a low-profile bent manner to reduce height. |
| US09614273B1 |
Omnidirectional antenna having constant phase
Various technologies presented herein relate to constructing and/or operating an antenna having an omnidirectional electrical field of constant phase. The antenna comprises an upper plate made up of multiple conductive rings, a lower ground-plane plate, a plurality of grounding posts, a conical feed, and a radio frequency (RF) feed connector. The upper plate has a multi-ring configuration comprising a large outer ring and several smaller rings of equal size located within the outer ring. The large outer ring and the four smaller rings have the same cross-section. The grounding posts ground the upper plate to the lower plate while maintaining a required spacing/parallelism therebetween. |
| US09614271B2 |
Composite module and electronic apparatus including the same
A wireless communication module includes a circuit board, and an antenna and a connection member mounted on a mounting surface of the circuit board. The antenna is mounted in a region along a first end edge of the circuit board, and the connection member is mounted in a region along a second end edge of the circuit board. |
| US09614268B2 |
Anti-lightning combined-stripline-circuit system
An anti-lightning-combined-stripline-circuit system is provided. The anti-lightning-combined-stripline-circuit system includes a stripline board including circuitry, and a metal ground bar attached to the stripline board. The metal ground bar has a geometry configured to function as a ground for the circuitry and simultaneously function as a lightning ground for a linear array of elements driven by the circuitry. |
| US09614262B2 |
Battery temperature raising system and control method thereof
A battery temperature raising system and a control method thereof are provided. The battery temperature raising system includes a power supply that operates a heater attached to a battery module. The heater is configured to increase a battery temperature and a variable resistor mounted on a circuit between the heater and the power supply adjusts a heating value of the heater based on an adjustment state of a resistance value. A heater relay is mounted on the circuit between the heater and the power supply and opens and closes the circuit to selectively turn on/off the heater. A first sensor senses the battery temperature and a second sensor senses a heater temperature. A controller outputs a control signal to operate the heater relay to selectively turn on/off the heater based on temperature information sensed by the sensors and a control signal to adjust the resistance value of the variable resistor. |
| US09614254B2 |
Safety device for preventing overcharge and secondary battery therewith
Disclosed are a safety device and a secondary battery using the same. The safety device includes a voltage sensitive heating device generating heat when a voltage difference between both ends thereof exceeds a predetermined voltage level and a temperature sensitive device having a reversible current ON/OFF function according to a temperature. The temperature sensitive device is coupled with the voltage sensitive heating device such that the temperature sensitive device detects the heat generated from the voltage sensitive heating device. |
| US09614248B2 |
Stack-folding type electrode assembly and method of manufacturing the same
The stack-folding type electrode assembly according to the present disclosure is an electrode assembly including a plurality of stack type unit cells which is stacked on one another with a continuous folding separator sheet interposed between each of the stacked unit cells, wherein the unit cells has a combination of at least two quad cells of a positive electrode/separator/negative electrode/separator/positive electrode/separator/negative electrode structure, and one C-type bicell of a negative electrode/separator/positive electrode/separator/negative electrode structure, and unit cells disposed above and below a central part or a winding start point have an asymmetrical structure each other with the quad cell disposed at the central part, or unit cells disposed above and below a central part or a winding start point have a symmetrical structure each other with the C-type bicell disposed at the central part. |
| US09614244B2 |
Redox and plating electrode systems for an all-iron hybrid flow battery
A system for a flow cell for a hybrid flow battery, comprising: a redox plate comprising a plurality of electrolyte flow channels; conductive inserts attached to the redox plate between adjacent electrolyte flow channels; a redox electrode attached to a surface of the redox plate; a plating electrode, comprising: a plurality of folded fins with an oscillating cross-section, the plurality of folded fins comprising: a first planar surface; a second planar surface, parallel to the first planar surface; a plurality of ridges intersecting the first and second planar surfaces such that the plurality of ridges divide the first planar surface into a first plurality of strips, and divide the second planar surface into a second plurality of strips; and a membrane barrier. In this way, the capacity and performance of hybrid flow batteries may be maximized, through decreasing the reaction kinetics, mass transport and ohmic resistance losses at both electrodes. |
| US09614242B2 |
Polymer electrolyte composition, electrolyte membrane, membrane-electrode assembly and fuel cell
Provided are a polymer electrolyte composition, an electrolyte membrane, a membrane electrolyte assembly, and a fuel cell. The polymer electrolyte composition according to an exemplary embodiment of this application includes a first solvent, a second solvent which is different from the first solvent, and a polymer which is reacted with the first solvent and the second solvent, in which the polymer includes a functional group which reacts with the first solvent by a first reaction energy and with the second solvent by a second reaction energy, and the second reaction energy is smaller than the first reaction energy. |
| US09614239B2 |
Fuel cell and separator
A separator of a fuel cell may have a planer shape, may be provided on one surface of a membrane electrode assembly, and may include a first protrusion formed over a region between a first position which is provided a first distance apart from a first hole being pierced in the separator and a second position which is provided a second distance apart from a second hole being pierced in the separator on a first surface opposed to the membrane electrode assembly, the first protrusion abutting the membrane electrode assembly. The separator further may include a second protrusion formed over a region at least between the first position and the second hole on the first surface, the second protrusion abutting the electrode membrane assembly between the first position and the second position. |
| US09614237B2 |
Device for the transfer of water and heat between two air flows and use thereof for the humidification of fuel cell inlet gas
The invention relates to a device for the transfer of water and heat between a first and a second air flow. The inventive device consists of a stack of at least two transfer sub-assemblies having a lamellar configuration, each sub-assembly comprising a two-layer transfer structure with hydrophilic porous materials (3, 4), which is disposed between a first structure for the distribution of the first air flow (1) and a second structure for the distribution of the second air flow (2). |
| US09614233B2 |
Fuel cell module
A fuel cell module includes a first casing containing the fuel cell stack, and a second casing containing the first casing, an exhaust gas combustor, and a heat exchanger. The exhaust gas combustor has a combustion gas discharge opening opened to a combustion gas chamber formed between the first casing and the second casing. |
| US09614232B2 |
Modular unit fuel cell assembly
A modular unit fuel cell is disclosed, which comprises a membrane electrode assembly (MEA), an anode current collector/porous transport layer (PTL), a bipolar separator plate (BSP), a corrugated or finned spring cooling and transport structure, a cathode current collector/PTL and an anode frame. In this embodiment, air is passed through the finned spring cooling and transport structure and the air acts as both the cathode reactant and as a coolant. |
| US09614231B2 |
High energy density redox flow device
Redox flow devices are described including a positive electrode current collector, a negative electrode current collector, and an ion-permeable membrane separating said positive and negative current collectors, positioned and arranged to define a positive electroactive zone and a negative electroactive zone; wherein at least one of said positive and negative electroactive zone comprises a flowable semi-solid composition comprising ion storage compound particles capable of taking up or releasing said ions during operation of the cell, and wherein the ion storage compound particles have a polydisperse size distribution in which the finest particles present in at least 5 vol % of the total volume, is at least a factor of 5 smaller than the largest particles present in at least 5 vol % of the total volume. |
| US09614230B2 |
Perimeter coupling for planar fuel cell and related methods
The invention relates to methods and articles for coupling a fuel cell layer to a second structure. The fuel cell layer includes a superior fuel cell surface, an inferior fuel cell surface, and a perimeter fuel cell surface. An adhesive structure is adhered to the superior, inferior, and perimeter fuel cell surfaces to form a coupling or seal between the fuel cell layer and the second structure. |
| US09614229B2 |
Functionalized short chain fluorinated polyether based electrolytes for safe lithium batteries and the cells having the same
Non-flammable electrolyte compositions for lithium metal primary batteries and the cells containing these electrolytes are described. The electrolyte compositions comprise one or more partially or fully fluorinated functionalized short chain polyethers with one or more lithium salts, and may include one or more cosolvents, and may have one or more fire retardants added. Said short chain functionalized fluorinated polyethers have much better ionic conductivity than the alkyl terminated fluorinated polyethers or long chain perfluoropolyethers, which provide superior flame resistance without sacrificing overall battery performance. Heat resistant, non-flammable primary lithium cells are also disclosed. |
| US09614226B2 |
Double-shell core lithium nickel manganese cobalt oxides
A lithium transition metal oxide powder for use in a rechargeable battery is disclosed, where the surface of the primary particles of said powder is coated with a first inner and a second outer layer, the second outer layer comprising a fluorine-containing polymer, and the first inner layer consisting of a reaction product of the fluorine-containing polymer and the primary particle surface. An example of this reaction product is LiF, where the lithium originates from the primary particles surface. Also as an example, the fluorine-containing polymer is either one of PVDF, PVDF-HFP or PTFE. |
| US09614223B2 |
Anode active material, sodium ion battery and lithium ion battery
The present invention aims to provide an anode active material which may intend to improve safety of a battery. The object is attained by providing an anode active material being used for a sodium ion battery or a lithium ion battery, wherein the anode active material has an A4Nb6O17 phase (A is at least one kind of H, Na and K). |
| US09614222B2 |
Negative electrode material for secondary battery having lithium-doped silicon-silicon oxide composite, method for manufacturing negative electrode, and lithium secondary battery
The present invention is a negative electrode material for a secondary battery with a non-aqueous electrolyte comprising at least a silicon-silicon oxide composite and a carbon coating formed on a surface of the silicon-silicon oxide composite, wherein at least the silicon-silicon oxide composite is doped with lithium, and a ratio I(SiC)/I(Si) of a peak intensity I(SiC) attributable to SiC of 2θ=35.8±0.2° to a peak intensity I(Si) attributable to Si of 2θ=28.4±0.2° satisfies a relation of I(SiC)/I(Si)≦0.03, when x-ray diffraction using Cu-Kα ray. As a result, there is provided a negative electrode material for a secondary battery with a non-aqueous electrolyte that is superior in first efficiency and cycle durability to a conventional negative electrode material. |
| US09614220B2 |
Doped and island-covered lithium cobaltite oxides
Disclosed is a cathode active material and a method to produce the same at low cost. The cathode powder comprises modified LiCoO2, and possibly a second phase which is LiM′O2 where M′ is Mn, Ni, Co with a stoichiometric ratio Ni:Mn≧1. The modified LiCoO2 is Ni and Mn bearing and has regions of low and high manganese content, where regions with high manganese content are located in islands on the surface. The cathode material has high cycling stability, a very high rate performance and good high temperature storage properties. |
| US09614219B2 |
Composite cathode active material having improved power characteristics, and secondary battery, battery module, and battery pack including the same
Provided is a composite cathode active material including layered lithium manganese oxide and lithium-containing metal oxide. Also, the present invention provides a secondary battery, a battery module, and a battery pack which have improved power characteristics by including the composite cathode active material. |
| US09614217B2 |
Nickel-zinc secondary battery and method for preparing the same
The present invention provides a nickel-zinc secondary battery, including: a battery case; an electrode assembly, disposed in the battery case; and an electrolyte solution, positioned in the battery case, and filled around the electrode assembly, wherein the electrode assembly includes a nickel positive electrode, a zinc negative electrode, and a membrane separator disposed between the nickel positive electrode and the zinc negative electrode; the nickel positive electrode includes: a substrate and positive electrode material coated on the surface of the substrate; the positive electrode material includes: 68 wt %˜69 wt % positive electrode active material, 0.6 wt %˜1 wt % yttrium oxide, 0.2 wt %˜0.6 wt % calcium hydroxide, 3.5 wt %˜4 wt % nickel powder, and a binder in balance; and the positive electrode active material is a spherical nickel hydroxide coated with Co3+. The nickel-zinc secondary battery provided by the present invention can reduce the amount of hydrogen evolved and have good cycling performance while maintaining the battery capacity. The present invention further provides a method for preparing a nickel-zinc secondary battery. |
| US09614215B2 |
Negative electrode material for lithium secondary battery and method for manufacturing the same
A negative electrode material for a lithium secondary battery, having one of iron foil and iron-base alloy foil, wherein the one of iron foil and iron-base alloy foil which has a surface profile having a plurality of concave shaped hollows formed by heat treating with laser beam irradiation and the surface is a surface which contacts with an electrolyte solution for a lithium secondary battery. There is further provided a lithium secondary battery including a negative electrode of the negative electrode material, a positive electrode using a lithium compound as an active material, an electrolyte between the negative electrode and the positive electrode, and a separator dividing the negative electrode and the positive electrode from each other. |
| US09614207B2 |
Battery pack having reliable temperature control
A battery pack includes a plurality of compartments filled with an inert gas and sealed in a thermally conductive casing, a plurality of battery units each comprising rechargeable batteries and each stored in one of the plurality of compartments, internal heat-exchange systems each of which can circulate the inert gas to exchange heat with the rechargeable batteries in the one of the plurality of compartments, and an external heat-exchange system positioned outside the thermally conductive casing which can exchange heat with the thermally conductive casing surrounding the one of the plurality of compartments. |
| US09614202B2 |
Battery well for a medical testing device
An electronic device may include a battery well and a plurality of tabs. The battery well may receive a disk-shaped battery and may include an annular sidewall, an open end, an end wall and a recess. The open end may be disposed at a first end of the sidewall. The end wall may be substantially perpendicular to the sidewall at a second end of the sidewall and axially between the recess and the open end. The recess may be disposed at the second end of the sidewall and adjacent the end wall. The recess may be adapted to receive a portion of the battery therein. The tabs may be disposed at the open end and may extend radially inward from the sidewall to releasably retain the battery in the battery well. The tabs may define a plane that is substantially parallel to the end wall. |
| US09614201B2 |
Sealing element for sealing battery cells of a traction battery, molded bodies for manufacturing the sealing eelement and method for manufacturing the sealing element
A sealing element (10) for sealing battery cells (18) of a battery module (34) for the purely electric drive of a motor vehicle has a first sealing disk (12) for a seal-forming attachment between a housing (32) and a first attachment frame (44), a second sealing disk (14) spaced from the first sealing disk (12) for a seal-forming attachment between the housing (32) and a second attachment frame (46), and receptacle pockets (16), connecting the first and second sealing disks (12, 14) for accommodating battery cells (18) therein. The first and second sealing disks (12, 14) and the receptacle pockets (16) are manufactured in one piece from a common sealing material. Thus, the battery cells (18) can be sealed with respect to a cooling medium that flows through the housing (32) thereby avoiding the risk of electrical short-circuits via the cooling medium. |
| US09614198B2 |
Battery cell shrink-wrap method and assembly
An example battery cell shrink-wrapping method includes covering a side of a battery cell with a section of a shrink-wrap material. The side interfaces with a cold plate when the battery cell is within a battery pack. |
| US09614196B2 |
Middle or large-sized battery pack assembly
Disclosed herein is a battery pack including (a) a module assembly including two or more battery modules, each of which includes a chargeable and dischargeable battery cell, the battery modules being stacked to have a two layer structure including an upper layer and a lower layer while being in contact with each other in a lateral direction, (b) a first upper layer connection member and a second upper layer connection member mounted at the upper layer module assembly, (c) a first lower layer connection member and a second lower layer connection member mounted at the lower layer module assembly, (d) a pair of side support members, (e) insulation members mounted at interfaces between the sides of the upper and lower layer module assemblies and the side support members, and (f) a first lower end support member and a second lower end support member. |
| US09614195B2 |
Energy storage device and manufacturing method of the same
An energy storage device including: a cylindrical case having at least one end closed; and an electrode assembly housed in the case. A reduced-diameter portion, at which an outer diameter of the case is reduced, is formed at the closed end of the case. |
| US09614194B2 |
Battery
According to one embodiment, a battery includes an electrode group, at least one positive electrode current collector tab, at least one negative electrode current collector tab, and a case. The case includes a case portion and an edge portion. The edge portion includes a heat sealed part configured to seal the case portion and a non-sealed part. The electrode group is housed in the case portion while an end portion of at least one of the positive electrode current collector tab and the negative electrode current collector tab is provided in the non-sealed part. |
| US09614193B2 |
Display device and method of manufacturing the same
A method of manufacturing a display device is disclosed. In one aspect, a display device comprises a lower substrate, a light-emitting element formed on the lower substrate and comprising a plurality of pixels, an upper substrate disposed on the light-emitting element with a gap therebetween sealed with a sealant. In addition, the device includes a filler filling the gap between the light-emitting element and the upper substrate, and a light-absorbing material formed between the lower substrate and the upper substrate and selectively absorbing light of a certain wavelength range. |
| US09614187B1 |
Electronic device package and package method thereof
An electronic device package including a substrate, a base film, a first seal, an electronic device and a second seal is provided. The first seal is disposed between the substrate and the base film and partially exposed by the base film. The electronic device is formed on the base film. The second seal disposed on the electronic device includes absorbents. A part of the second seal adheres to a part of the first seal exposed by the base film. The first seal and the second seal encapsulate the base film and the electronic device. The first seal and the second seal are the same host materials. A packaging method of an electronic device package is also provided. |
| US09614183B2 |
Organic light-emitting diode displays with crack detection and crack propagation prevention circuitry
A display may have thin-film transistor (TFT) circuitry on a substrate. An array of organic light-emitting diodes may be formed on the thin-film transistor circuitry. The display may include inorganic brittle layers and organic and metal layers that are ductile and mechanically robust. To help prevent propagation of cracks and other defects along the edge of the display, the display may be provided with crack stop structures and crack detection circuitry. The crack detection circuitry may include one or more loops that are formed along the periphery of the display. The crack stop structures may include TFT/OLED structures formed in a staggered configuration. At least some of the brittle layers can be removed from the panel edge. An additional adhesion layer may also be formed directly on the substrate to help prevent inorganic layers from debonding from the surface of the substrate. |
| US09614178B2 |
Electronic component, process for producing same, sealing material paste, and filler particles
In an electronic component including two substrates at least one of which is transparent, an organic member arranged between these substrates, and a bonding portion located onto respective outer circumferential portions of the two substrates, this bonding portion includes a low-melting glass and filler particles. The low-melting glass includes vanadium oxide. The filler particles include a low thermally-expandable material, and an oxide containing a bivalent transition metal as a constituent element. The oxide is dispersed in the low thermally-expandable material, and the low thermally-expandable material has a thermal expansion coefficient of 5×10−7/° C. or less in a temperature range from 30 to 250° C. This invention makes it possible to heat the filler particles by irradiation with a laser to give the electronic component which is a component having a highly reliable bonding portion. |
| US09614176B2 |
Encapsulation method of OLED and a structure of OLED
The invention provides an encapsulation method of OLED and a structure of OLED, and the method comprises: step 1: providing a glass cover and an encapsulating substrate, and the glass cover comprising a display area and an edge area surrounding the display area; step 2: forming a layer of SiNx on the edge area of the glass cover; step 3: self-arranging a layer of hydrophobic monomer on the display area surface of the glass cover; step 4: coating a circle of glue frame around the display area on the glass cover; step 5: coating desiccant on the layer of hydrophobic monomer on the display area of the glass cover; step 6: attaching the glass cover correspondingly to the substrate in vacuum environment; step 7: illuminating by UV light to cure the glue frame to achieve the glass cover encapsulating the substrate. |
| US09614175B2 |
Organic light-emitting diode device
An OLED device includes: a transparent substrate; a light-emitting stack including an anode layer, a cathode layer, and a functional layer, the anode layer including anode units, each of which has first and second anode elements that extend in a column direction and that are aligned with and spaced apart from each other along a row direction transverse to the column direction; an anode-connecting metallic layer stacked on the light-emitting stack; a cathode-connecting metallic layer stacked on the light-emitting stack; and bridging lines disposed in the light-emitting stack and extending in the row direction such that the first and second anode elements are electrically connected to each other through a respective one of the bridging lines. |
| US09614168B2 |
Flexible display panel with bent substrate
A display may have an array of organic light-emitting diodes that form an active area on a flexible substrate. Metal traces may extend between the active area and an inactive area of the flexible substrate. Display driver circuitry such as a display driver integrated circuit may be coupled to the inactive area. The metal traces may extend across a bend region in the flexible substrate. The flexible substrate may be bent in the bend region. The flexible substrate may be made of a thin flexible material to reduce metal trace bending stress. A coating layer in the bend region may be provided with an enhanced elasticity to allow its thickness to be reduced. The flexible substrate may be bent on itself and secured within an electronic device without using a mandrel. |
| US09614166B2 |
Organic electroluminescent element
Provided is an organic electroluminescent device (organic EL device) that is improved in luminous efficiency, sufficiently secures driving stability, and has a simple construction. The organic electroluminescent device includes, between an anode and cathode laminated on a substrate, a plurality of organic layers. At least one layer of the organic layers contains a carbazole compound represented by the following general formula (1) having two to three structures in each of which a carbazole ring and a dibenzofuran or dibenzothiophene ring are bonded to each other at 1- and 4-positions. In the formula (1), A represents an n-valent aromatic hydrocarbon group or aromatic heterocyclic group, n represents an integer of 2 or 3, and X represents oxygen or sulfur. |
| US09614165B2 |
Photoelectric conversion element, dye-sensitized solar cell, metal complex dye, dye solution, dye-adsorbed electrode and method of producing dye-sensitized solar cell
A photoelectric conversion element including a photoconductor layer, wherein the photoconductor layer contains semiconductor fine particles carrying a metal complex dye of Formula (I); a metal complex dye, a dye solution, a dye-adsorbed electrode, a dye-sensitized solar cell, and a method for producing the solar cell: M(LD)(LA)·(CI) Formula (I) wherein M represents a metal ion; LD represents a tridentate ligand of formulas (DL-1) to (DL-4); LA represents a specific tridentate ligand; and CI represents a counter ion: Y1 and Y2 represent an oxygen, sulfur, nitrogen, or phosphorus atom; AD and BD represent a hydrocarbon or hetero ring; L represents a linking group of formulas (L-1) to (L-4); and Ra and Rb represent a substituent, X represents a nitrogen or carbon atom; CD represents hetero ring; T represents —O—, —S—, —NRL2— or —PRL3; RL1 to RL3 represent a hydrogen atom or a substituent; and Alk represents an alkylene group. |
| US09614160B2 |
Aromatic amine derivatives and organic electroluminescent elements using same
Provided are an organic EL device material that reduce the driving voltage of an organic EL device and increase the lifetime of the device as compared with a conventional organic EL device material. Also provided are organic electroluminescence devices containing the organic EL device material. |
| US09614148B1 |
Magnetic-field and magnetic-field gradient sensors based on lateral SOI bipolar transistors
A lateral bipolar junction transistor (BJT) magnetic field sensor that includes a layout of two or more adjacent lateral BJT devices. Each BJT includes a semiconductor base region of a first conductivity type doping, a semiconductor emitter region of a second conductivity type doping and laterally contacting the base region; and a first semiconductor collector region of a second conductivity type doping contacting said base region on an opposite side thereof. A second collector region of the second conductivity type doping is also formed contacting the base region on the opposite side thereof in spaced apart relation with the first collector region. The first adjacent lateral BJT device includes the emitter, base and first collector region and the second adjacent lateral BJT device includes the emitter, base and second collector region. The sensor induces a detectable difference in collector current amounts in the presence of an external magnetic field transverse to a plane defined by the layout. |
| US09614134B2 |
Light-emitting semiconductor component
An optoelectronic component includes a carrier including a mounting surface, at least one light-emitting element arranged on the mounting surface and electrically conductively connected to the carrier, at least one reinforcing body integrated in the optoelectronic component, a housing consisting of a housing encapsulation compound or a housing molding compound, wherein the light emitting component is arranged in an emitter cavity of the housing, and a reinforcing body cavity in which the reinforcing body is arranged fully or partially encapsulated or encased with a reinforcing body encapsulation compound. |
| US09614127B2 |
Light-emitting device and method of manufacturing thereof
The present disclosure provides a method of manufacturing a light-emitting device, which comprises providing a first substrate and a plurality of semiconductor stacked blocks on the first substrate, and each of the plurality semiconductor stacked blocks comprises a first conductive-type semiconductor layer, a light-emitting layer on the first conductive-type semiconductor layer, and a second conductive-type semiconductor layer on the light-emitting layer; wherein there is a trench separating two adjacent semiconductor stacked blocks on the first substrate, and a width of the trench is less than 10 μm; and conducting a first separating step to separate a first semiconductor stacked block of the plurality of semiconductor stacked blocks from the first substrate and keep a second semiconductor stacked block on the first substrate. |
| US09614122B2 |
Optical tuning of light emitting semiconductor junctions
Light emitting semiconductor junctions are disclosed. An exemplary light emitting junction has a first electrical contact coupled to a first side of the junction. The exemplary junction also has a second electrical contact coupled to a second side of the junction. The exemplary junction also has a region of set straining material that exerts a strain on the junction and alters both: (i) an optical polarization, and (ii) an emission wavelength of the junction. The region of set straining material is not on a current path between said first electrical contact and said second electrical contact. The region of set straining material covers a third side and a fourth side of the light emitting junction along a cross section of the light emitting junction. The light emitting semiconductor junction device comprises a three-five alloy. |
| US09614115B2 |
Semiconductor device and method for manufacturing the same
Provided is a semiconductor device that can suppress a leakage current more than has been achieved before. A semiconductor device 22 includes a first carrier holding layer 48, which is arranged on a lower electrode 47, is in contact with a lower electrode 47 via a first interface 49, and includes majority carriers of one type, and a second carrier holding layer 57, which is arranged on the first carrier holding layer 48, defines a second interface 58 constituting a conduction path to the first carrier holding layer 48, and includes majority carriers of the other type. The first interface 49 has its outline within the outline of the first carrier holding layer 48 when seen in a plan view in a direction that is orthogonal to a surface of the substrate, and the second interface 58 has its outline within the outline of the first carrier holding layer 48 when seen in the plan view. |
| US09614113B2 |
Edge protected barrier assemblies
The present application is directed to an assembly comprising an electronic device, and a multilayer film. The multilayer film comprises a barrier stack adjacent the electronic device; and a weatherable sheet adjacent the barrier stack opposite the electronic device. The assembly additionally comprises a protective layer in contact with the electronic device and the weatherable sheet. The present application allows for the combination of any of the disclosed elements. |
| US09614106B2 |
Semiconductor device
In an IGBT portion, a first gate electrode is provided in a first trench via a first gate insulating film. A thickness of a first gate insulating film lower portion is thicker than a thickness of a first gate insulating film upper portion, whereby a width of a mesa portion between adjacent first trenches is narrower at a portion of a collector side than at an emitter side. In a diode portion, a second gate electrode is provided inside a second trench via second gate insulating film. A width of the second trench is uniform along a depth direction or narrows from the emitter side toward the collector side. Widths of the second trench are narrower than a sum of a width of the first trench lower portion and the thickness of the first gate insulating film lower portion of both side walls of the first trench lower portion. |
| US09614100B2 |
Semiconductor device
The semiconductor device includes a transistor including an oxide semiconductor film having a channel formation region, a gate insulating film, and a gate electrode layer. In the transistor, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the thickness of the gate insulating film is large (equivalent oxide thickness which is obtained by converting into a thickness of silicon oxide containing nitrogen is 5 nm or more and 50 nm or less, preferably 10 nm or more and 40 nm or less). Alternatively, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the resistivity of the source region and the drain region is 1.9×10−5 Ω·m or more and 4.8×10−3 Ω·m or less. |
| US09614097B2 |
Semiconductor device
It is an object to provide a semiconductor device in which power consumption can be reduced. It is another object to provide a highly reliable semiconductor device using a programming cell, such as a programmable logic device (PLD). In accordance with a change in a configuration of connections between basic blocks, power supply voltage furnishing to the basic blocks is changed. That is, when the structure of connections between the basic blocks is such that a basic block does not contribute to a circuit, the supply of the power supply voltage to this basic block is stopped. Further, the supply of the power supply voltage to the basic blocks is controlled using a programming cell formed using a field effect transistor whose channel formation region is formed using an oxide semiconductor, the field effect transistor having extremely low off-state current or extremely low leakage current. |
| US09614096B2 |
Liquid crystal display device
To provide a liquid crystal display device suitable for a thin film transistor which uses an oxide semiconductor. In a liquid crystal display device which includes a thin film transistor including an oxide semiconductor layer, a film having a function of attenuating the intensity of transmitting visible light is used as an interlayer film which covers at least the oxide semiconductor layer. As the film having a function of attenuating the intensity of transmitting visible light, a coloring layer can be used and a light-transmitting chromatic color resin layer is preferably used. An interlayer film which includes a light-transmitting chromatic color resin layer and a light-blocking layer may be formed in order that the light-blocking layer is used as a film having a function of attenuating the intensity of transmitting visible light. |
| US09614087B1 |
Strained vertical field-effect transistor (FET) and method of forming the same
A method for manufacturing a semiconductor device includes forming a first semiconductor layer on a substrate, forming a bottom source/drain region on the first semiconductor layer, forming a second semiconductor layer on the bottom source/drain region, patterning the second semiconductor layer into a plurality of fins extending from the bottom source/drain region vertically with respect to the substrate, forming a gate structure around the plurality of fins, forming a top source/drain region on each of the plurality of fins, oxidizing the first semiconductor layer to form an oxide layer in place of the first semiconductor layer, wherein a volume of the oxide layer is larger than a volume of the first semiconductor layer prior to the oxidation, and producing a strain in each of the plurality of fins due to the larger volume of the oxide layer. |
| US09614086B1 |
Conformal source and drain contacts for multi-gate field effect transistors
A semiconductor device includes a fin having a first semiconductor material. The fin includes a source/drain (S/D) region and a channel region. The S/D region provides a top surface and two sidewall surfaces. A width of the S/D region is smaller than a width of the channel region. The semiconductor device further includes a semiconductor film over the S/D region and having a doped second semiconductor material. The semiconductor film provides a top surface and two sidewall surfaces that are substantially parallel to the top and two sidewall surfaces of the S/D region respectively. The semiconductor device further includes a metal contact over the top and two sidewall surfaces of the semiconductor film and operable to electrically communicate with the S/D region. |
| US09614083B2 |
Field effect transistor with narrow bandgap source and drain regions and method of fabrication
A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film formed in the silicon layer on opposite sides of the gate electrode. |
| US09614082B2 |
Al-poor barrier for InGaAs semiconductor structure
The present disclosure relates to a semiconductor structure and a method of preparation including a silicon monocrystalline substrate, and a III-V structure abutting the silicon monocrystalline substrate. The semiconductor structure includes an InaGabAs structure overlaying the III-V structure, where a is from 0.40 to 1, b from 0 to 0.60, and a+b equal to 1.00. The III-V structure has a top surface facing away from the silicon substrate. The top surface is GagXxPpSbsZz, where X includes one or more group III elements other than Ga and Z is one or more group V elements other than P or Sb. g is from 0.80 to 1.00, x is from 0 to 0.20, z is from 0 to 0.30, p is from 0.10 to 0.55, and s is from 0.50 to 0.80, g+x is equal to 1.00 and p+s+z is equal to 1.00. |
| US09614079B2 |
MOS devices with ultra-high dielectric constants and methods of forming the same
An integrated circuit structure includes a semiconductor substrate, and a gate stack over the semiconductor substrate. The gate stack includes a high-k gate dielectric over the semiconductor substrate, and a magnetic compound over and in contact with the high-k gate dielectric. A source region and a drain region are on opposite sides of the gate stack. The gate stack, the source region, and the drain region are portions of a Metal-Oxide-Semiconductor (MOS) device. |
| US09614078B1 |
Metal-oxide field effect transistor having an oxide region within a lightly doped drain region
A semiconductor device and a method for manufacturing the same are provided. A semiconductor device includes a semiconductor substrate and a gate structure formed on the semiconductor substrate. A source region and a drain region are disposed on opposite sides of the gate structure on the semiconductor substrate. A lightly-doped drain region is adjacent to a side of the drain region close to the gate structure, and a lightly-doped source region is adjacent to a side of the source region close to the gate structure. An oxidation region is disposed in the lightly-doped drain region. A trench extends from the surface of the semiconductor substrate to the drain region. A source electrode is disposed on the source region, and the drain electrode has a first portion disposed on the drain region and a second portion disposed in the trench. |
| US09614076B2 |
Semiconductor device and method for manufacturing the same
There is formed a first concave portion that extends inside a semiconductor substrate from a main surface thereof. An insulating film is formed over the main surface, over a side wall and a bottom wall of the first concave portion so as to cover an element and to form a capped hollow in the first concave portion. A first hole portion is formed in the insulating film so as to reach the hollow in the first concave portion from an upper surface of the insulating film, and to reach the semiconductor substrate on the bottom wall of the first concave portion while leaving the insulating film over the side wall of the first concave portion. There is formed a second hole portion that reaches the conductive portion from the upper surface of the insulating film. The first and second hole portions are formed by the same etching treatment. |
| US09614074B1 |
Partial, self-biased isolation in semiconductor devices
A device includes a semiconductor substrate, a buried doped isolation layer disposed in the semiconductor substrate to isolate the device, a body region disposed in the semiconductor substrate and to which a voltage is applied during operation and in which a channel is formed during operation, and a depletion region disposed in the semiconductor substrate and having a conductivity type in common with the buried doped isolation barrier and the body region. The depletion region reaches a depth in the semiconductor substrate to be in contact with the buried doped isolation layer. The depletion region establishes an electrical link between the buried doped isolation layer and the body region such that the buried doped isolation layer is biased at a voltage level lower than the voltage applied to the body region. |
| US09614064B2 |
Semiconductor device and integrated circuit
A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a body region, and a gate electrode structure adjacent to the body region. The source region and the drain region are disposed along a first direction, the first direction being parallel to the main surface. The body region is disposed between the source region and the drain region. The body region includes an upper body region at the main surface and a lower body region remote from the main surface. A first width of the lower body region is smaller than a second width of the upper body region. The first width and the second width are measured in a direction perpendicular to the first direction. |
| US09614063B2 |
Homoepitaxial tunnel barriers with functionalized graphene-on-graphene and methods of making
This disclosure describes a method of making a tunnel barrier-based electronic device, in which the tunnel barrier and transport channel are made of the same material—graphene. A homoepitaxial tunnel barrier/transport device is created using a monolayer chemically modified graphene sheet as a tunnel barrier on another monolayer graphene sheet. This device displays enhanced spintronic properties over heteroepitaxial devices and is the first to use graphene as both the tunnel barrier and channel. |
| US09614059B2 |
Forming conductive STI liners for FinFETs
An integrated circuit device, and a method of forming, including a semiconductor substrate, isolation regions extending into the semiconductor substrate, a semiconductor strip, and a semiconductor fin overlapping and joined to the semiconductor strip is provided. A first dielectric layer and a second dielectric layer are disposed on opposite sidewalls of the semiconductor strip. The integrated circuit device further includes a first conductive liner and a second conductive liner, wherein the semiconductor strip, the first dielectric layer, and the second dielectric layer are between the first conductive liner and the second conductive line. The first conductive liner and the second conductive liner are between, and in contact with, sidewalls of a first portion and a second portion of the isolation regions. |
| US09614055B2 |
Semiconductor device and method for fabricating the same
A semiconductor device has an FET of a trench-gate structure obtained by disposing a conductive layer, which will be a gate, in a trench extended in the main surface of a semiconductor substrate, wherein the upper surface of the trench-gate conductive layer is formed equal to or higher than the main surface of the semiconductor substrate. The conductive layer of the trench gate is formed to have a substantially flat or concave upper surface and the upper surface is formed equal to or higher than the main surface of the semiconductor substrate. After etching of the semiconductor substrate to form the upper surface of the conductive layer of the trench gate, a channel region and a source region are formed by ion implantation so that the semiconductor device is free from occurrence of a source offset. |
| US09614054B2 |
Method of forming a vertical device
According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer. |
| US09614052B2 |
Copper contact plugs with barrier layers
A device includes a conductive layer including a bottom portion, and a sidewall portion over the bottom portion, wherein the sidewall portion is connected to an end of the bottom portion. An aluminum-containing layer overlaps the bottom portion of the conductive layer, wherein a top surface of the aluminum-containing layer is substantially level with a top edge of the sidewall portion of the conductive layer. An aluminum oxide layer is overlying the aluminum-containing layer. A copper-containing region is over the aluminum oxide layer, and is spaced apart from the aluminum-containing layer by the aluminum oxide layer. The copper-containing region is electrically coupled to the aluminum-containing layer through the top edge of the sidewall portion of the conductive layer. |
| US09614051B2 |
Semiconductor devices and fabrication method thereof
A method for fabricating a semiconductor device includes providing a substrate; and forming at least one dummy gate structure on the substrate. The method also includes forming doping regions in the substrate at both sides of the dummy gate structure; forming an interlayer dielectric layer on the d the dummy gate structure; performing a first step thermal annealing process to increase a density of the interlayer dielectric layer; and activating doping ions for a first time without an excess diffusion of the doping ions in the doping region; and removing the dummy gate structure to expose the surface of the substrate to form a trench in the annealed interlayer dielectric layer. Further, the method also includes forming a gate dielectric layer on the surface of the substrate on bottom of the trench; and performing a second step thermal annealing process to activate the doping ions for a second time. |
| US09614045B2 |
Method of processing a semiconductor device and chip package
In various embodiments, a method of processing a semiconductor device may include providing a semiconductor device comprising a contact pad and a polymer layer; and subjecting at least a part of the contact pad and the polymer layer to a plasma comprising ammonia. |
| US09614036B2 |
Manufacture method of TFT substrate and sturcture thereof
The present invention provides a manufacture method of an oxide semiconductor TFT substrate, and the method comprises steps of: 1, forming a gate (2) on a substrate (1); 2, deposing a gate isolation layer (3); 3, forming an island shaped oxide semiconductor layer (4); 4, forming an island shaped photoresistor layer (6) and an island shaped etching stopper layer (5), and the island shaped etching stopper layer (5) covers a central part (41) of the island shaped oxide semiconductor layer (4) and exposes two side parts (43) of the island shaped oxide semiconductor layer (4); 5, implementing ion implantation process to the two side parts (43) of the island shaped oxide semiconductor layer (4); 6, lifting off the island shaped photoresistor layer (6); 7, forming a source/a drain (7), and the source/the drain (7) contact the two side parts (43) of the island shaped oxide semiconductor layer (4) to establish electrical connections; 8, deposing and patterning a protecting layer (8); 9, deposing and patterning a pixel electrode layer (9); 10, implementing anneal process. |
| US09614034B1 |
Semiconductor structure and method for fabricating the same
The present invention provides a semiconductor structure, including a substrate, having a recess disposed therein, an insulating layer filled in the recess and disposed on a surface of the substrate, and at least one fin structure disposed in the insulating layer, the fin structure consisting of two terminal parts and a central part disposed between two terminal parts. The terminal parts are disposed on the surface of the substrate and directly contact the substrate, and the central part is disposed right above the recess. |
| US09614033B2 |
Semiconductor device including an isolation structure and method of manufacturing a semiconductor device
An embodiment of a semiconductor device comprises a first load terminal contact area at a first side of a semiconductor body. A second load terminal contact area is at a second side of the semiconductor body opposite to the first side. A control terminal contact area is at the second side of the semiconductor body. An isolation structure extends through the semiconductor body between the first and second sides. The isolation structure electrically isolates a first part of the semiconductor body from a second part of the semiconductor body. A first thickness of the first part of the semiconductor body is smaller than a second thickness of the second part of the semiconductor body. |
| US09614028B2 |
Structures and methods with reduced sensitivity to surface charge
The present application provides (in addition to more broadly applicable inventions) improvements which are particularly applicable to two-sided power semiconductor devices which use bipolar conduction. In this class of devices, the inventor has realized that two or three of the four (or more) semiconductor doping components which form the carrier-emission structures and control structures in the active device (array) portion of a two-sided power device can also be used, with surprising advantages, to form field-limiting rings around the active arrays on both surfaces. Most preferably, in some but not necessarily all embodiments, a shallow implant of one conductivity type is used to counterdope the surface of a well having the other conductivity type. This shallow implant, singly or in combination with another shallow implant of the same conductivity type, works to shield the well from the effects of excess charge at or above the surface of the semiconductor material. |
| US09614027B2 |
High voltage transistor with reduced isolation breakdown
Devices and methods for forming a device are disclosed. The device includes a substrate with a device region having a length and a width direction. An isolation region surrounds the device region of which an isolation edge abuts the device region. A transistor is disposed in the device region. The transistor includes a gate disposed between first and second source/drain (S/D) regions. A silicide block is disposed on the transistor. The silicide block covers at least the isolation edge adjacent to the gate. The silicide block prevents formation of a silicide contact at least at the isolation edge adjacent to the gate. |
| US09614023B2 |
Substrate resistor with overlying gate structure
A resistor device includes a resistor body disposed in a substrate and doped with a first type of dopant, an insulating layer disposed above the resistor body, and at least one gate structure disposed above the insulating layer and above the resistor body. A method includes applying a bias voltage to at least a first gate structure disposed above an insulating layer disposed above a resistor body disposed in a substrate and doped with a first type of dopant to affect a resistance of the resistor body. |
| US09614021B2 |
Organic light-emitting display apparatus and manufacturing method thereof
An improved organic light-emitting display apparatus prevents damage of wiring due to a mask during the manufacturing process, and a manufacturing method thereof. An organic light-emitting display apparatus includes a display unit formed on a substrate, a pad unit formed at one outer side of the display unit on the substrate, a wiring unit formed as a multilayer structure on the substrate to couple the display unit to the pad unit, a thin film encapsulating layer covering the display unit, and a protrusion unit that does not overlap the uppermost layer of wiring of the multilayered wiring unit. |
| US09614020B2 |
Oxide semiconductor devices, methods of forming oxide semiconductor devices and organic light emitting display devices including oxide semiconductor devices
An oxide semiconductor device includes a first insulation layer pattern and a second insulation layer pattern disposed on a substrate, an active layer disposed on the first and second insulation layer patterns, the active layer including a source region including the first insulation layer pattern, a drain region including the second insulation layer pattern, and a channel region disposed between the source and drain regions, a source electrode contacting the source region, and a drain electrode contacting the drain region. |
| US09614018B2 |
COA WOLED structure and manufacturing method thereof
The present invention provides a COA WOLED structure and a manufacturing method thereof. The structure includes red/green/blue sub pixel zones and each sub pixel zone includes a substrate, a gate terminal, a gate insulation layer, an oxide semiconductor layer, an etch stop layer, source/drain terminals, a passivation protection layer, a red/green/blue photoresist layer, a planarization layer, a semi-reflection layer, a transparent photoresist layer, an anode layer, a pixel definition layer, a photo spacer, a white light emission layer, a cathode layer, and a packaging lid. The present invention arranges a metal semi-reflection layer on a planarization layer and a transparent photoresist layer on the semi-reflection layer and the thickness of the transparent photoresist layer corresponding to each of red/green/blue photoresist layers is so controlled as to obtain an optimum micro cavity length corresponding to each of different colors of light thereby enhance the light emission efficiency of the three primary colors of red/green/blue transmitting through a color filter by using micro cavity resonance thereby effectively increasing the brightness of a COA WOLED device. |
| US09614016B2 |
Organic light-emitting diode (OLED) display and method of manufacturing the same
An organic light-emitting diode (OLED) display and a method of manufacturing the OLED display are disclosed. In one aspect, the OLED display includes a substrate including a display region and a peripheral region, a first auxiliary electrode formed in the peripheral region, and a protecting electrode. The protecting electrode can be formed in the display region and the peripheral region, wherein at least a portion of the protecting electrode can be formed above the first auxiliary electrode. |
| US09614015B2 |
Method for fabricating display device and display device
A method for fabricating a display device includes forming a thin film transistor on a base substrate, forming a first electrode connected to the thin film transistor, forming a pixel defining layer overlapping a portion of the first electrode, such that the pixel defining layer exposes a portion of the first electrode and partitions pixel areas, forming a block copolymer layer on the first electrode and the pixel defining layer, patterning the block copolymer layer, etching the pixel defining layer by using the patterned block copolymer layer as a mask, such that an uneven pixel defining layer with a plurality of defining layer grooves is formed, and forming a light emitting layer on the first electrode and the uneven pixel defining layer. |
| US09614006B2 |
Semiconductor constructions, and methods of forming cross-point memory arrays
Some embodiments include vertical stacks of memory units, with individual memory units each having a memory element, a wordline, a bitline and at least one diode. The memory units may correspond to cross-point memory, and the diodes may correspond to band-gap engineered diodes containing two or more dielectric layers sandwiched between metal layers. Tunneling properties of the dielectric materials and carrier injection properties of the metals may be tailored to engineer desired properties into the diodes. The diodes may be placed between the bitlines and the memory elements, or may be placed between the wordlines and memory elements. Some embodiments include methods of forming cross-point memory arrays. The memory arrays may contain vertical stacks of memory unit cells, with individual unit cells containing cross-point memory and at least one diode. |
| US09614002B1 |
0T bi-directional memory cell
A bidirectional memory cell includes a write unit and a read unit. The write unit and the read unit each include an MTJ structure having a first and second pinned layers and a free layer. The first and second pinned layers are separated from the free layer by at least one tunnel barrier. The first pinned layer is electrically coupled to a first write line through a first diode. The second pinned layer is electrically connected to a second word line through a second diode. The free layer is electrically coupled to a first bit line. Additionally, the free layer of the read unit is magnetically coupled to the free layer of the write unit. |
| US09613997B2 |
Solid state imaging device and electronic apparatus
A solid state imaging device including: a pixel region that is formed on a light incidence side of a substrate and to which a plurality of pixels that include photoelectric conversion units is arranged; a peripheral circuit unit that is formed in a lower portion in the substrate depth direction of the pixel region and that includes an active element; and a light shielding member that is formed between the pixel region and the peripheral circuit unit and that shields the incidence of light, emitted from an active element, to the photoelectric conversion unit. |
| US09613995B2 |
Method of manufacturing semiconductor device
A semiconductor device including a substrate, at least one sensor, a dielectric layer, at least one light pipe structure, at least one pad, a shielding layer, and a protection layer is provided. The sensor is located in the substrate of a first region. The dielectric layer is located on the substrate. The light pipe structure is located in the dielectric layer of the first region. The light pipe structure corresponds to the sensor. The pad is located in the dielectric layer of a second region. The shielding layer is located on the dielectric layer, wherein the light pipe structure is surrounded by the shielding layer. The protection layer is located on the shielding layer. At least one pad opening is disposed in the dielectric layer, the shielding layer, and the protection layer above the pad. The pad opening exposes a top surface of the corresponding pad. |
| US09613993B2 |
Segmented AC-coupled readout from continuous collection electrodes in semiconductor sensors
Position sensitive radiation detection is provided using a continuous electrode in a semiconductor radiation detector, as opposed to the conventional use of a segmented electrode. Time constants relating to AC coupling between the continuous electrode and segmented contacts to the electrode are selected to provide position resolution from the resulting configurations. The resulting detectors advantageously have a more uniform electric field than conventional detectors having segmented electrodes, and are expected to have much lower cost of production and of integration with readout electronics. |
| US09613986B2 |
Array substrate and its manufacturing method, display device
An array substrate including: a base substrate and a thin film transistor unit provided on the base substrate; the thin film transistor unit comprises: a first gate electrode provided on the base substrate, a gate insulating layer provided on the first gate electrode, a source electrode disposed in a same layer as the first gate electrode, an active layer provided on the source electrode, a drain electrode provided on the active layer, and the gate insulating layer disposed between the first gate electrode and the source electrode. This array substrate reduces a channel length of a conducting channel of the thin film transistor unit, and meanwhile increases an aperture ratio of a pixel. |
| US09613984B2 |
Display device, method of fabricating the same, and method of fabricating image sensor device
Provided are a display device, a method of fabricating the display device, and a method of fabricating an image sensor device. The method of fabricating the display device includes preparing a substrate including a cell array area and a peripheral circuit area, forming a silicon layer on the peripheral circuit area of the substrate, forming oxide layers on the cell array area and the peripheral circuit area of the substrate, forming gate dielectric layers on the silicon layer and the oxide layers, forming the gate electrodes on the gate dielectric layers, wherein the gate electrodes expose both ends of the silicon layer and both ends of the oxide layers, and injecting dopant into both ends of the silicon layer and both ends of the oxide layers at the same time. |
| US09613983B2 |
Display motherboard, display panel and display device
The invention provides a display motherboard, a display panel and a display device for solving the problem of unsmooth cutting of the display motherboard in the prior art during cutting. In the display motherboard, the display panel and the display device provided by the present invention, a cutting area of the display motherboard is provided with a raised portion on one side close to sealant, and the raised portion can make the cutting stress more concentrated when the display motherboard is cut, so that adhesion of the sealant to substrates is reduced and thus the display motherboard is cut more smoothly. |
| US09613971B2 |
Select gates with central open areas
A NAND flash memory array includes a select line having a first edge region containing a first portion of floating gate material and a second edge region containing a second portion of floating gate material, and having a central region between the first edge region and the second edge region where no floating gate material is present. |
| US09613968B2 |
Cross-coupled thyristor SRAM semiconductor structures and methods of fabrication
A memory cell based upon thyristors for an SRAM integrated circuit is described together with a process for fabricating it. The memory cell can be implemented in different combinations of MOS and bipolar select transistors, or without select transistors, with thyristors in a semiconductor substrate with shallow trench isolation. Standard CMOS process technology can be used to manufacture the SRAM. Special circuitry provides lowered power consumption during standby. |
| US09613966B2 |
Semiconductor device
A semiconductor device includes a semiconductor substrate including a plurality of active areas, a bit line crossing the plurality of active areas, a direct contact connecting a first active area of the plurality of active areas with the bit line, an insulating spacer covering a side wall of the bit line and extending at a level lower than a level of an upper surface of the semiconductor substrate, a contact pad connected with a side wall of a second active area of the plurality of active areas, which neighbors the first active area, a first insulating pattern defining a contact hole exposing the insulating spacer and the contact pad, and a buried contact connected with the contact pad and filling the contact hole. |
| US09613962B2 |
Fin liner integration under aggressive pitch
A method of forming a fin liner and the resulting device are provided. Embodiments include forming silicon (Si) fins over negative channel field-effect transistor (nFET) and positive channel field-effect transistor (pFET) regions of a substrate, each of the Si fins having a silicon nitride (SiN) cap; forming a SiN liner over the Si fins and SiN caps; forming a block mask over the pFET region; removing the SiN liner in the nFET region; removing the block mask in the pFET region; forming a diffusion barrier liner over the Si fins; forming a dielectric layer over and between the Si fins; planarizing the dielectric layer down to the SiN caps in the nFET region; and recessing the dielectric layer to expose an upper portion of the Si fins. |
| US09613956B1 |
Self-aligned punchthrough stop doping in bulk finFET by reflowing doped oxide
A technique relates to punchthrough stop (PTS) doping in bulk fin field effect transistors. Fins are formed on a substrate, and each pair of the fins has a fin pitch. Each of the fins has an undoped fin channel and a punchthrough stop doping region underneath the undoped fin channel. A narrow shallow trench isolation trench is formed between the fin pitch of the fins. A wide shallow trench isolation trench is formed at an outside edge of the fins. A doped layer fills the narrow shallow trench isolation trench and the wide shallow trench isolation trench. A vertical thickness of the doped layer in the narrow shallow trench isolation trench is greater than a vertical thickness of the wide shallow trench isolation trench. |
| US09613952B2 |
Semiconductor ESD protection device
A semiconductor device includes high-voltage (HV) and low-voltage (LV) MOS's formed in a substrate. The HV MOS includes a first semiconductor region having a first-type conductivity and a first doping level, a second semiconductor region having the first-type conductivity and a second doping level lower than the first doping level, a third semiconductor region having a second-type conductivity, and a fourth semiconductor region having the first-type conductivity. The first, second, third, and fourth semiconductor regions are arranged along a first direction, and are drain, drift, channel, and source regions, respectively, of the HV MOS. The LV MOS includes the fourth semiconductor region, a fifth semiconductor region having the second-type conductivity, and a sixth semiconductor region having the first-type conductivity. The fourth, fifth, and sixth semiconductor regions are arranged along a second direction different from the first direction, and are drain, channel, and source regions, respectively, of the LV MOS. |
| US09613951B2 |
Semiconductor device with diode
According to one embodiment, a semiconductor device includes a first and second electrode, a first, second, third and fourth semiconductor region, and a first intermediate metal film. The first region is provided above the first electrode and has a first impurity concentration. The second region is provided above the first region and has a second impurity concentration lower than the first impurity concentration. The third region is provided above the second region and has a third impurity concentration. The fourth region is provided above the second region and has a fourth impurity concentration lower than the third impurity concentration. The second electrode is provided above the third region and the fourth region and is in ohmic contact with the third region. The intermediate metal film is provided between the second electrode and the fourth region. The intermediate metal film forms Schottky junction with the fourth region. |
| US09613945B1 |
Semiconductor device and method of manufacturing semiconductor device
A diffusion diode including a p+ diffusion region, a p-type diffusion region, and an n+ diffusion region is formed in the front surface of a semiconductor substrate. A polysilicon diode including a p+ layer and an n+ layer is formed on top of a local insulating film formed on the front surface of the semiconductor substrate and faces the diffusion diode in the depth direction. The diffusion diode and the polysilicon diode are reverse-connected by electrically connecting the n+ diffusion region to the n+ layer, thereby forming a lateral protection device. The p+ layer and p+ diffusion region are respectively electrically connected to a high voltage first terminal and a low voltage second terminal of the lateral protection device. The polysilicon diode blocks a forward current generated in the diffusion diode when the electric potential of the first terminal becomes lower than the electric potential of the second terminal. |
| US09613936B2 |
LED module including an LED
An LED module includes a carrier plate having an arrangement face and a wall on the upper side of the plate, the wall running peripherally around the arrangement face and being raised upwards with respect to said arrangement face; an LED arranged on the face; a contact element, to which the LED is connected; and an at least partially transparent potted body covering the arrangement face and the LED towards the top and laterally adjoins an inner face of the wall. The wall is formed monolithically with the remaining carrier plate and is interrupted over its periphery, and the potted body does not adjoin the inner wall face of the wall. The contact element extends away from the arrangement face along the upper side of the carrier plate in the interruption region so that electrical contact can be made with the LED via the contact element from outside the body. |
| US09613932B2 |
Integrated circuit package and method of making same
A chip package includes a first die with an active surface having at least one die pad positioned thereon; a first adhesive layer having a first surface coupled to the active surface of the first die and a second surface opposite the first surface; and a first dielectric layer having a top surface. A first portion of the top surface of the first dielectric layer is coupled to the second surface of the first adhesive layer. A second portion of the top surface of the first dielectric layer, distinct from the first portion, is substantially free of adhesive. |
| US09613927B2 |
Semiconductor device and method for manufacturing semiconductor device
A method includes the steps of: preparing a lead frame including a plurality of die pads, and preparing a plurality of semiconductor chips; disposing each of the semiconductor chips on a respective one of the die pads; forming a sealing resin to cover the die pads and the semiconductor chips; and attaching a heat dissipation plate to the die pads by pressing the heat dissipation plate against the die pads via a resin sheet which is an adhesive layer after the sealing resin is formed. |
| US09613925B2 |
Method for bonding semiconductor devices on sustrate and bonding structure formed using the same
The present invention provides a bonding method in semiconductor manufacturing process and a bonding structure formed using the same, which can achieve wafer-level bonding under a condition of normal temperature and low pressure. The bonding method comprises generating bonding structures capable of being mutually mechanical interlocked, wherein the frictional heat generated by the bonding structures capable of being mutually mechanical interlocked is higher than the bonding energy therebetween, and utilizing the frictional heat generated by the bonding structures capable of being mutually mechanical interlocked to bond the bonding structures capable of being mutually mechanical interlocked. |
| US09613919B2 |
Chip package and method for forming the same
A chip package is provided. The chip package includes a substrate having a first surface and a second surface opposite thereto. A dielectric layer is disposed on the first surface of the substrate and includes a conducting pad structure. A first opening penetrates the substrate and exposes a surface of the conducting pad structure. A second opening is communication with the first opening and penetrates the conducting pad structure. A redistribution layer is conformally disposed on a sidewall of the first opening and the surface of the conducting pad structure and is filled into the second opening. A method for forming the chip package is also provided. |
| US09613918B1 |
RF power multi-chip module package
High power multi-chip module packages for packaging semiconductor dice are disclosed. The disclosed packages have an output power of at least 1 kilowatt (kW) and can have an operating signal frequency in a range of hundreds of MHz. The high power multi-chip module packages have base plates with multiple planes or layers that can be conductive and may be thin metal layers in some examples. The multiple planes are formed and overlaid in such a way that they help reduce stray inductance values caused by the packaging itself, which improves overall device operation and efficiency. Current loops created when one of the multi-chip modules is in a turn-on condition are balanced and opposed and generate a minimized B-Field that is restricted by the manner in which the multiples planes of the base plate are overlaid, thus reducing the stray inductance values and improving device operation. |
| US09613915B2 |
Reduced-warpage laminate structure
A laminate structure includes a conductive layer and a dielectric layer in contact with the conductive layer, the dielectric layer comprises a selectively patterned high-modulus dielectric material that balances a differential stress between the conductive layer and the dielectric layer to mechanically stiffen the laminate structure and reduce warpage. |
| US09613913B2 |
Method of forming electromagnetic interference shielding layer of ball grid array semiconductor package and base tape for the method
Provided are a method of forming an electromagnetic interference (EMI) shielding layer of a ball grid array (BGA) semiconductor package, and a base tape used in the method, and more particularly, a method of forming a shielding layer for blocking EMI, on an upper surface and lateral surfaces of a BGA semiconductor package having a lower surface, on which a plurality of solder balls are formed, and a base tape used in the method.According to the method of forming an EMI shielding layer of a BGA semiconductor package, the EMI shielding layer may be formed on the BGA semiconductor package quickly, easily, and effectively by using the base tape, thereby not only improving process productivity but also remarkably reducing the manufacturing costs. |
| US09613910B2 |
Anti-fuse on and/or in package
A package structure includes an integrated circuit die, a redistribution structure, an anti-fuse, and external connectors. The integrated circuit die is embedded in an encapsulant. The redistribution structure is on the encapsulant and is electrically coupled to the integrated circuit die. The anti-fuse is external to the integrated circuit die and the redistribution structure. The anti-fuse is mechanically and electrically coupled to the redistribution structure. The external connectors are on the redistribution structure, and the redistribution structure is disposed between the external connectors and the encapsulant. |
| US09613902B2 |
Connections for memory electrode lines
Subject matter disclosed herein may relate to word line electrodes and/or digit line electrodes in a cross-point array memory device. One or more word line electrodes may be configured to form a socket area to provide connection points to drivers and/or other circuitry that may be located within a footprint of an array of memory cells. |
| US09613896B2 |
Semiconductor memory device with conductive columnar body
A semiconductor memory device according to an embodiment comprises: when three directions intersecting each other are assumed to be first through third directions, and two directions intersecting each other in a plane extending in the first and second directions are assumed to be fourth and fifth directions, a memory cell array including: a conductive layer stacked in the third direction above a semiconductor substrate and having a first region; and a first columnar body penetrating the first region of the conductive layer in the third direction and including a semiconductor film, the first columnar body having a cross-section along the first and second directions in which, at a first position which is a certain position in the third direction, a length in the fourth direction is shorter than a length in the fifth direction. |
| US09613895B1 |
Semiconductor package with double side molding
A semiconductor package includes an RDL interposer having a first side, a second side, and a vertical sidewall extending between the first side and the second side; at least one semiconductor die mounted on the first side of the RDL interposer; a first molding compound disposed on the first side covering the at least one semiconductor die; a plurality of solder bumps or solder balls mounted on the second side; and a second molding compound disposed on the second side surrounding the plurality of solder bumps or solder balls and covering the vertical sidewall of the RDL interposer. |
| US09613894B2 |
Electronic package
An electronic package is provided. The electronic package includes an insulator having a recessed portion formed therein; an electronic element embedded in the recessed portion and having a sensing region exposed from the insulator; and a conductive structure disposed on the insulator and electrically connected with the electronic element. The overall thickness of the electronic package is reduced by embedding the electronic element which is embedded in the recessed portion. |
| US09613893B2 |
Wiring substrate and method for manufacturing the same
A wiring substrate includes a first outermost conductor layer, a first outermost insulating layer covering the first conductor layer, a second outermost conductor layer formed on opposite side of the first conductor layer, and a second outermost insulating layer covering the second conductor layer. The first insulating layer has first openings such that the first openings are exposing first conductor pads including portions of the first conductor layer, the second insulating layer has second openings such that the second openings are exposing second conductor pads including portions of the second conductor layer, each of the first conductor pads has a first plating layer recessed with respect to outer surface of the first insulating layer, and each of the second conductor pads has a second plating layer formed flush with outer surface of the second insulating layer or having bump shape protruding from the outer surface of the second insulating layer. |
| US09613890B2 |
Semiconductor device
A semiconductor device includes a resin package, a semiconductor chip sealed in the package and having first and second pads on a front surface. An island of the device has a projecting terminal sealed in the package, to one surface of which a back surface of the chip is bonded, and the other surface of which is partially exposed from a bottom surface of the package as a first terminal. A lead separate from the island is sealed in the package and has one surface electrically connected with the second pad, and another surface exposed from the package bottom surface as a second terminal capable of electrical connection between the second pad and outside. A mass center of the chip is away from a center of the package, the projecting terminal is as large as the lead, and solder under the device spreads to the island projecting terminal. |
| US09613889B2 |
Packaged circuit with a lead frame and laminate substrate
Embodiments of the subject application provide for a circuit comprising: a lead frame having a first plurality of exposed terminals, the lead frame defining a plane; a laminate substrate in the plane defined by the lead frame, adjacent to the lead frame, and electrically coupled to the lead frame, the laminate substrate having a first surface including a second plurality of exposed terminals and a second surface opposite the first surface; a first one or more dies mounted on the lead frame and electrically coupled to the lead frame; and a second one or more dies mounted on the second surface of the laminate substrate and electrically coupled to the laminate substrate. |
| US09613885B2 |
Plastic cooler for semiconductor modules
A cooling apparatus includes a plurality of discrete modules and a plastic housing. Each module includes a semiconductor die encapsulated by a mold compound, a plurality of leads electrically connected to the semiconductor die and protruding out of the mold compound and a first cooling plate at least partly uncovered by the mold compound. The plastic housing surrounds the periphery of each module to form a multi-die module. The plastic housing includes a first singular plastic part which receives the modules and a second singular plastic part attached to a periphery of the first plastic part. The second plastic part has cutouts which expose the first cooling plates and a sealing structure containing a sealing material which forms a water-tight seal around the periphery of each module at a side of the modules with the first cooling plates. |
| US09613883B2 |
Semiconductor device
[Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution]A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753. |
| US09613881B2 |
Semiconductor device having improved heat-dissipation characteristics
A semiconductor device having improved heat-dissipation characteristics is capable effectively discharging heat that is generated inside the semiconductor device of a three-dimensional laminated structure, to the outside of the semiconductor device by utilizing an internal connector used during bonding. |
| US09613875B2 |
Method and system for manufacturing semiconductor epitaxy structure
A system for manufacturing semiconductor epitaxy structure includes a deposition apparatus, a curvature monitor system and a control unit. The deposition apparatus is configured for sequentially depositing a buffer layer, a first epitaxy layer, an insertion layer, a second epitaxy layer on a substrate. The curvature monitor system is configured for monitoring a curvature value of the semiconductor epitaxy structure. The control unit is configured for controlling the deposition apparatus to stop depositing the buffer layer, the first epitaxy layer, the insertion layer and the second epitaxy layer according to the curvature value of the semiconductor epitaxy structure measured by the curvature monitor system. The above-mentioned system for manufacturing semiconductor epitaxy structure is able to effectively control the strain of the semiconductor epitaxy structure during growth. A method for manufacturing semiconductor epitaxy structure is also disclosed. |
| US09613873B1 |
Nanowire semiconductor device
A method for forming a nanowire device comprises depositing a hard mask on portions of a silicon substrate having a <110> orientation wherein the hard mask is oriented in the <112> direction, etching the silicon substrate to form a mandrel having (111) faceted sidewalls; forming a layer of insulator material on the substrate; forming a sacrificial stack comprising alternating layers of sacrificial material and dielectric material disposed on the layer of insulator material and adjacent to the mandrel; patterning and etching the sacrificial stack to form a modified sacrificial stack adjacent to the mandrel and extending from the mandrel; removing the sacrificial material from the modified sacrificial stack to form growth channels; epitaxially forming semiconductor in the growth channels; and etching the semiconductor to align with the end of the growth channels and form a semiconductor stack comprising alternating layers of dielectric material and semiconductor material. |
| US09613870B2 |
Gate stack formed with interrupted deposition processes and laser annealing
Semiconductor structures and methods of fabricating the same using interrupted deposition processes and multiple laser anneals are provided. The structure includes a high-k gate stack with a high-k bilayer or nanolaminate where a bottom portion of the bilayer is crystallized while a top portion of the bilayer is amorphous. |
| US09613869B2 |
FinFET devices
FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in finFET devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material. The method further includes forming a second set of trenches in the semiconductor material, alternating with the first set of trenches that are filled. The second set of trenches form semiconductor structures which have a dimension of fin structures. The method further includes filling the second set of trenches with insulator material. The method further includes recessing the insulator material within the first set of trenches and the second set of trenches to form the fin structures. |
| US09613861B2 |
Damascene wires with top via structures
Damascene wires with top via structures and methods of manufacture are provided. The semiconductor structure includes a damascene wiring structure with an integrally formed top via structure in self-alignment with the damascene wiring structure which is underneath the integrally formed top via structure. |
| US09613860B2 |
Method of manufacturing thin-film transistor
According to one embodiment, a method of manufacturing a thin-film transistor includes forming a semiconductor layer on a gate electrode with an insulating layer 12 being interposed, forming interconnect formation layers on the semiconductor layer, forming a plurality of interconnects and electrodes by patterning the interconnect formation layers through etching, patterning the semiconductor layer in an island shape through etching after forming the electrodes, exposing a channel region of the semiconductor layer by etching a part of the electrodes on the semiconductor layer, and forming a protective layer so as to overlap the interconnects, the electrodes and the semiconductor layer having the island shape. |
| US09613859B2 |
Direct deposition of nickel silicide nanowire
Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire. |
| US09613858B2 |
Method and composition for electrodeposition of copper in microelectronics with dipyridyl-based levelers
A method and composition for metallizing a via feature in a semiconductor integrated circuit device substrate, using a leveler compound which is a dipyridyl compound. |
| US09613857B2 |
Electrostatic discharge protection structure and method
A semiconductor package comprises a top package and a bottom package with a plurality of fan-out interconnect structures. A plurality of inter-package connectors are formed inside a gap between the top package and the bottom package. A conductive protection layer is formed over the semiconductor package, wherein the conductive protection layer seals the gap around its perimeter, wherein the conductive protection layer covers an upper surface and a side wall of the top package, and wherein the conductive protection layer covers portions of an upper surface of the bottom package that extend beyond a boundary of the top package and a top portion of a side wall of the bottom package. |
| US09613856B1 |
Method of forming metal interconnection
A method of fabricating a semiconductor device is disclosed. The method includes forming a first conductive feature over a substrate, forming a dielectric layer over the first conductive feature, forming a trench in the dielectric layer, forming a first barrier layer in the trench, applying a thermal treatment to convert a first portion of the barrier layer to a second barrier layer, exposing the first conductive feature in the trench while a portion of the second barrier layer is disposed over the dielectric layer and forming a second conductive feature in the trench. |
| US09613854B2 |
Method and apparatus for back end of line semiconductor device processing
A method of forming a device may include: forming an opening through a dielectric layer and an underlying etching stop layer to expose a metal line. The method may further include the step of catalytically growing a graphene layer on an exposed surface of the metal line, and depositing an amorphous carbon layer on sidewalls of the opening. The steps of catalytically growing the graphene layer and depositing the amorphous carbon layer may be performed simultaneously. |
| US09613851B2 |
Method for manufacturing interconnect structures incorporating air gap spacers
A dual damascene article of manufacture comprises a trench containing a conductive metal column where the trench and the conductive metal column extend down into and are contiguous with a via. The trench and the conductive metal column and the via have a common axis. These articles comprise interconnect structures incorporating air-gap spacers containing metal/insulator structures for Very Large Scale Integrated (VLSI) and Ultra Large Scale Integrated (ULSI) devices and packaging. The trench in this regard comprises a sidewall air-gap immediately adjacent the side walls of the trench and the conductive metal column, the sidewall air-gap extending down to the via to a depth below a line fixed by the bottom of the trench, and continues downward in the via for a distance of from about 1 Angstrom below the line to the full depth of the via. In another aspect, the article of manufacture comprises a capped dual damascene structure. |
| US09613849B2 |
Composite substrate manufacturing method, and composite substrate
Disclosed is a composite substrate manufacturing method whereby, after bonding a semiconductor substrate (1) and a supporting substrate (3) to each other, the semiconductor substrate (1) is thinned, and a composite substrate (8) having a semiconductor layer (6) on the supporting substrate (3) is obtained. On the supporting substrate (3) surface to be bonded, a coating film (4a) containing polysilazane is formed, a silicon-containing insulating film (4) is formed by performing firing by heating the coating film (4a) to 600-1,200° C., then, the semiconductor substrate (1) and the supporting substrate (3) are bonded to each other with the insulating film (4) therebetween, thereby suppressing bonding failures due to surface roughness and defects of the supporting substrate, and easily obtaining the composite substrate. |
| US09613844B2 |
3D semiconductor device having two layers of transistors
A 3D semiconductor device, including: a first layer including first transistors; a first interconnection layer interconnecting the first transistors and overlying the first layer; and a second layer including second transistors, where the second layer thickness is less than 2 microns and greater than 5 nm, where the second layer is overlying the first interconnection layer, and where the second layer includes dice lines formed by an etch step. |
| US09613841B2 |
Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection
An area array integrated circuit (IC) package for an IC device. The IC package includes a first substrate with conductive traces electrically coupled to the IC device. An interconnect assembly having a first surface is mechanically coupled to the first substrate. The interconnect assembly includes a plurality of contact members electrically coupled to the conductive traces on the first substrate. A second substrate is mechanically coupled to a second surface of the interconnect assembly so that the first substrate, the interconnect assembly, and the second substrate substantially surround the IC device. The second substrate includes conductive traces that are electrically coupled to the contact members in the interconnect assembly. |
| US09613836B2 |
Coating film forming apparatus, coating film forming method, and recording medium
A coating film forming apparatus includes: a substrate holding unit to horizontally hold a substrate; a rotating mechanism to rotate the substrate held by the substrate holding unit; a coating liquid supplying mechanism to supply coating liquid to form a coating film on the substrate; an annular member to rectify a gas stream above a periphery of the substrate when liquid film of the coating liquid is dried by rotation of the substrate, the annular member being provided above the periphery of the substrate and along a circumferential direction of the substrate so as to cover the periphery of the substrate; and a protrusion provided on an inner periphery of the annular member along circumferential direction of the annular member so as to protrude upward to reduce component of the gas stream flowing directly downward near an inner peripheral edge of the annular member. |
| US09613831B2 |
Encapsulated dies with enhanced thermal performance
The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module. |
| US09613827B2 |
SGT-including semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming an SGT in a semiconductor pillar on a semiconductor substrate and forming a wiring semiconductor layer so as to contact a side surface of an impurity region present in a center portion of the semiconductor pillar or a side surface of a gate conductor layer. A first alloy layer formed in a side surface of the wiring semiconductor layer is directly connected to the impurity region and the gate conductor layer and is connected to an output wiring metal layer through a contact hole formed on an upper surface of a second alloy layer formed in an upper surface and the side surface of the wiring semiconductor layer. |
| US09613823B2 |
Etching method and storage medium
An etching method includes disposing a target substrate within a chamber. The target substrate has a first silicon oxide film formed on a surface of the target substrate by a chemical vapor deposition method or an atomic layer deposition method, a second silicon oxide film that includes a thermally-oxidized film and a silicon nitride film. The second silicon oxide film and the silicon nitride are formed adjacent to the first silicon oxide film. The etching method further includes supplying an HF gas and an alcohol gas or water vapor into the chamber to selectively etch the first silicon oxide film with respect to the second silicon oxide film and the silicon nitride film. |
| US09613819B2 |
Process chamber, method of preparing a process chamber, and method of operating a process chamber
Process chambers and methods of preparing and operating a process chamber are disclosed. In some embodiments, a method of preparing a process chamber for processing a substrate includes: forming a first barrier layer over an element disposed within a cavity of the process chamber, the element comprising an outgassing material; and forming, within the process chamber, a second barrier layer over the first barrier layer. |
| US09613818B2 |
Deposition of low fluorine tungsten by sequential CVD process
Provided herein are methods of depositing bulk tungsten by sequential CVD pulses, such as by alternately pulsing tungsten hexafluoride and hydrogen gas in cycles of temporally separated pulses. Some methods include depositing a tungsten nucleation layer at low pressure followed by deposition of bulk tungsten by sequential CVD to form low stress tungsten films with low fluorine content. Methods described herein may also be performed in combination with non-sequential CVD deposition and fluorine-free tungsten deposition techniques. |
| US09613817B1 |
Method of enhancing surface doping concentration of source/drain regions
A method of enhancing surface diffusion species concentration in source/drain regions includes providing a substrate for an integrated circuit. One of an n-type and a p-type S/D region for a semiconductor device is formed on a surface of the substrate. A top surface of the S/D region is exposed. A diffusion layer is deposited over the top surface of the S/D region, the diffusion layer having a concentration of a diffusion species. The diffusion layer is heated to diffuse the diffusion species into the S/D region to enhance a concentration of the diffusion species proximate the top surface of the S/D region. The diffusion layer is removed from the top surface of the S/D region. A metal layer is deposited over the top surface of the S/D region immediately after removing the diffusion layer. Electrical contacts are formed over the top surface of the S/D region from the metal layer. |
| US09613816B2 |
Advanced process control method for controlling width of spacer and dummy sidewall in semiconductor device
An advanced process control (APC) method for controlling a width of a spacer in a semiconductor device includes: providing a semiconductor substrate; providing a target width of a gate; forming the gate on the semiconductor substrate, in which the gate has a measured width; depositing a dielectric layer covering the gate, in which the dielectric layer has a measured thickness; providing a target width of the spacer; determining a trim time of the dielectric layer based on the target width of the gate, the measured width of the gate, the target width of the spacer, and the measured thickness of the dielectric layer; and performing a trimming process on the dielectric layer for the determined trim time to form the spacer. |
| US09613815B2 |
High-efficiency line-forming optical systems and methods for defect annealing and dopant activation
High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line image that can scan with the first line image to locally raise the wafer surface temperature from the defect anneal temperature to a spike anneal temperature. Use of the visible wavelength for the spike annealing reduces adverse pattern effects and improves temperature uniformity and thus annealing uniformity. |
| US09613813B2 |
Method for improving critical dimension variability by implanting argon or silicon ions into a patterned mask
Methods of processing a workpiece are disclosed. Variability of the critical dimension of semiconductor structures may be affected by the critical dimension of the patterned mask. Ions may be implanted into the patterned mask to change the critical dimension. The ions may be implanted in accordance with an ion implant map, which determines an appropriate dose, energy and type based on the measured critical dimension of the patterned mask at a plurality of locations. |
| US09613812B2 |
Method for processing a carrier, a carrier, an electronic device and a lithographic mask
Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles. |
| US09613811B2 |
Methods of manufacturing semiconductor devices
A first protective layer, a mask layer, a second protective layer and a photoresist layer are sequentially formed on a substrate. A photoresist pattern is formed by partially removing the photoresist layer. An ion implantation mask is formed by sequentially etching the second protective layer, the mask layer and the first protective layer using the photoresist pattern. The ion implantation mask exposes the substrate. Impurities are implanted in an upper portion of the substrate exposed by the ion implantation mask. |
| US09613806B2 |
Triple patterning NAND flash memory
A NAND flash memory array is initially patterned by forming a plurality of sidewall spacers according along sides of patterned portions of material. The pattern of sidewall spacers is then used to form a second pattern of hard mask portions including first hard mask portions defined on both sides by sidewall spacers and second hard mask portions defined on only one side by sidewall spacers. |
| US09613803B2 |
Low defect relaxed SiGe/strained Si structures on implant anneal buffer/strain relaxed buffer layers with epitaxial rare earth oxide interlayers and methods to fabricate same
A method provides a substrate having a top surface; forming a first semiconductor layer on the top surface, the first semiconductor layer having a first unit cell geometry; epitaxially depositing a layer of a metal-containing oxide on the first semiconductor layer, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry; ion implanting the first semiconductor layer through the layer of metal-containing oxide; annealing the ion implanted first semiconductor layer; and forming a second semiconductor layer on the layer of metal-containing oxide, the second semiconductor layer having the first unit cell geometry. The layer of metal-containing oxide functions to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer. A structure formed by the method is also disclosed. |
| US09613802B2 |
Method for making epitaxial structure
A method for making an epitaxial structure includes the following steps. A substrate having an epitaxial growth surface is provided. A buffer layer is formed on the epitaxial growth surface. A carbon nanotube layer is placed on the buffer layer. A first epitaxial layer is epitaxially grown on the buffer layer. The substrate and the buffer layer are removed to expose a second epitaxial growth surface. A second epitaxial layer is epitaxially grown on the second epitaxial growth surface. |
| US09613799B2 |
Methods for depositing films with organoaminodisilane precursors
Described herein are precursors and methods for forming silicon-containing films. In one aspect, there is provided a precursor of Formula I: wherein R1 is selected from linear or branched C3 to C10 alkyl group, linear or branched C3 to C10 alkenyl group, linear or branched C3 to C10 alkynyl group, C1 to C6 dialkylamino group, electron withdrawing group, and C6 to C10 aryl group; R2 is selected from hydrogen, linear or branched C1 to C10 alkyl group, linear or branched C3 to C6 alkenyl group, linear or branched C3 to C6 alkynyl group, C1 to C6 dialkylamino group, C6 to C10 aryl group, linear or branched C1 to C6 fluorinated alkyl group, electron withdrawing group, and C4 to C10 aryl group; optionally wherein R1 and R2 are linked together to form ring selected from substituted or unsubstituted aromatic ring or substituted or unsubstituted aliphatic ring; and n=1 or 2. |
| US09613793B2 |
Automotive front lighting lamp with baffle
A lamp for automotive vehicle front lighting is described. The lamp 10 comprises a base 12 for mechanical and electrical connection to an automotive headlight 50 and a burner 14 fixed to the base 12. The burner 14 comprises an enclosed transparent vessel 22. A first and a second filament 34, 36 are arranged within the vessel 22. A baffle 40 is arranged proximate to the first filament 34 to shield the second filament 36 from the first filament 34. The baffle 40 is of concave shape and includes a bottom surface 41 and side surfaces 45 terminating in side edges 48. The baffle 40 further includes a front surface 43 arranged between the first and second filaments 34, 36 to shield the second filament 36 from light emitted from the first filament 34. The side edges 48 each comprise a central portion 54 extending, in side view, straight and in parallel to the longitudinal axis X. The straight central portions 54 have an axial length of at least 3.5 mm. An edge height HE is defined as a distance between the bottom surface 41 and the plane defined between the central portions 54 of the side edges 48. The edge height is more than 2.8 mm. |
| US09613790B2 |
Electron spectrometer and measurement method
An electron spectrometer includes: an energy analyzer section that energy-analyzes electrons emitted from a specimen; a micro-channel plate that amplifies the electrons analyzed by the energy analyzer section; a fluorescent screen that converts the electrons amplified by the micro-channel plate into light; a camera that photographs the fluorescent screen; and an effective range calculation section that calculates an effective range of the fluorescent screen within a camera image photographed by the camera, the effective range calculation section performing a process that acquires a plurality of the camera images photographed while causing the energy analyzer section to analyze the electrons with a different center energy, a process that converts the plurality of camera images respectively into a plurality of spectra, and a process that calculates the effective range of the fluorescent screen within the camera image based on the plurality of spectra. |
| US09613785B2 |
Method of mass spectrometry and a mass spectrometer
The present invention relates to a method of mass spectrometry, an apparatus adapted to perform the method and a mass spectrometer. More particularly, but not exclusively, the present invention relates to a method of mass spectrometry comprising the step of associating parent and fragmentation ions from a sample by measuring the parent and fragmentation ions from two or more different areas of the sample and identifying changes in the number of parent ions between the areas in the sample, and corresponding changes in the number of fragmentation ions between the two areas. |
| US09613784B2 |
Sputtering system and method including an arc detection
A sputtering system that includes a sputtering chamber having a target material serving as a cathode, and an anode and a work piece. A direct current (DC) power supply supplies electrical power to the anode and the cathode sufficient to generate a plasma within the sputtering chamber. A detection module detects the occurrence of an arc in the sputtering chamber by monitoring an electrical characteristic of the plasma. In one embodiment the electrical characteristic monitored is the impedance of the plasma. In another embodiment the electrical characteristic is the conductance of the plasma. |
| US09613783B2 |
Method and apparatus for controlling a magnetic field in a plasma chamber
Methods and apparatus for controlling a magnetic field in a plasma chamber are provided herein. In some embodiments, a process chamber liner may include a cylindrical body, an inner electromagnetic cosine-theta (cos θ) coil ring including a first plurality of inner coils embedded in the body and configured to generate a magnetic field in a first direction, and an outer electromagnetic cosine-theta (cos θ) coil ring including a second plurality of outer coils embedded in the body and configured to generate a magnetic field in a second direction orthogonal to the first direction, wherein the outer electromagnetic cos θ coil ring is disposed concentrically about the inner electromagnetic cos θ coil ring. |
| US09613781B2 |
Scanning electron microscope
An embodiment of the invention relates to a SEM enabling a surface analysis of a sample at a high throughput. The SEM has an electron gun, an irradiation unit, and a detector. The detector, as a first structure, includes an MCP, an anode, and a dynode. The dynode is set at a potential higher than a potential of an output face of the MCP and the anode is set at a potential higher than that of the dynode. The anode is disposed on the dynode side with respect to an intermediate position between the output face of the MCP and the dynode. The anode has an aperture for letting electrons from the output face of the MCP pass toward the dynode. |
| US09613780B2 |
Method of fabricating sample support membrane
A method of fabricating a sample support membrane used to support an electron microscope sample starts with forming a first layer on a first layer of a substrate (S100). A second surface of the substrate that faces away from the first surface is etched to form an opening that exposes the first layer (S102). A second layer is formed on the first layer (S104). The region of the first layer that overlaps the opening as viewed within a plane is removed to expose the second layer (S106). |
| US09613778B1 |
Connector for process chamber electrostatic elements
Provided herein are approaches for securing electrostatic elements within a lens component. In one approach, a connector includes a flexible coupling secured at a first end to an electrostatic element of a plurality of electrostatic elements, the plurality of electrostatic elements extending between a set of sidewalls of the lens component. The connector further includes a stub protruding from a feedthrough component provided through the set of sidewalls, the stub secured to the flexible coupling at a second end of the flexible coupling. |
| US09613777B2 |
Uniformity control using adjustable internal antennas
A plasma chamber having improved plasma density is disclosed. The plasma chamber utilizes internal antennas. These internal antennas can be manipulated in a variety of ways to control the uniformity of the plasma density. In some embodiments, the conductive coil within the antenna is translated from a first location to a second location. For example, the entirety of the internal antennas may be translated within the plasma chamber. In another embodiment, the conductive coil disposed within the outer tube is translated relative to its outer tube. In another embodiment, the conductive coil within the outer tube may be bent and may be rotated within the outer tube. In another embodiment, the outer tube may also be bent and rotated. In other embodiments, ferromagnetic segments may be disposed in the outer tube to focus or block the electromagnetic energy emitted from the conductive coil. |
| US09613775B2 |
Blade fuse
Disclosed is a highly durable blade fuse for which a fused site in a narrow section and the rated current are determined in conformity with its design and the temperature of which does not increase greatly when a current flows through it. A blade fuse according to the present invention includes terminal sections (A, B) and a connection section (1), which are made of the same metal base material that is zinc or a zinc alloy. Furthermore, a low-melting-point metal piece (3), made of tin, which has an outer size identical or similar to a width of the connection section (1) is melted and stuck on at least one surface of the connection section (1) outside the fused section (2), and is positioned to partially traverse an edge of the fused section (2) or not to traverse the edge but to be adjacent to the edge. |
| US09613772B2 |
Contact device
The contact device includes an armature, a driver, a fixed contact, a movable contact, a contact spring, a card, a case, and a positioning member. The driver is for driving the armature. The movable contact is to be in contact with and separate from the fixed contact. The contact spring is for holding the movable contact so as to allow movement of the movable contact. The card interconnects the armature and the contact spring. The case is a synthetic resin molded product. The positioning member is provided as a separate part from the case. The positioning member is for determining a positional relationship between the armature, the driver, the fixed contact, the movable contact, the contact spring, and the card, and is accommodated in the case. |
| US09613765B2 |
Electric switch with an actuator
An electric switch has a housing with an upper surface through which a actuating plunger extends at a position close to a side surface. The actuating plunger is arranged to operate a switching element disposed inside the housing. An actuating lever is fixed to the side surface adjacent the plunger such that the actuating lever extends over and beyond the upper surface of the housing. A stop for the actuating plunger is arranged inside the housing. With this switch the actuating travel is extended solely in relation to the switch. Furthermore a long over-travel exists following switching, wherein any forces which might occur through improper use in relation to the switch do not cause any damaging effects to the switching element. |
| US09613762B2 |
Power switchgear
Disclosed is a power switch gear that includes: a fixed electrode and a movable electrode disposed opposite to each other in a tank filled with insulting gas; and a movable conductor electrically connecting the fixed electrode and the movable electrode together. The fixed electrode and the movable electrode have a contactor through which current flows to the movable conductor. At least one of the fixed electrode and the movable electrode has ring-shaped sliding members, the ring-shaped sliding members being disposed, on both sides of the contactor. At least one grease pool is provided between the contactor and the sliding members. |
| US09613761B2 |
Contact element
A contact element which, on account of its low installation depth, is suitable for use in switch panels of low overall height and can be combined with various keys. The contact element has a main body, two connection terminals, which are obliquely mounted in the main body, for electrical conductors, two busbars which are in each case electrically connected to one of the connection terminals and run from the respective connection terminal to a bearing arranged centrally in the main body. A tappet which is spring-mounted in the central bearing can be moved between a first and a second position and is fitted with a contact bridge which electrically short-circuits the two busbars in one of the two positions, wherein a portion of the tappet, which portion projects out of the main body, is designed to be coupled to a key. |
| US09613759B2 |
Method for preparing fluorine/nitrogen co-doped graphitized carbon microspheres with high volumetric specific capacitance
The present invention provides a method for preparing fluorine/nitrogen co-doped graphitized carbon microspheres with high volumetric specific capacitance, which is a simple process with moderate reaction conditions, high reproducibility, and low costs. The fluorine/nitrogen co-doped graphitized carbon microspheres prepared according to the present invention have a very high density, exhibit good electrochemical properties in an alkaline environment, as well as very high volumetric specific capacitance and good cyclic stability, and is of great importance in improving the properties of the electrode material for a capacitor. |
| US09613757B2 |
Conductive polymer composite and preparation and use thereof
The invention pertains to a conductive polymer composite comprising: (a) a conductive polymer and (b) a polyanion, wherein the conductive polymer comprises polymerized units derived from a monomer of formula (I): wherein: A is a C1-C4 alkylene group substituted with (R)p; X is O or S; R is H, an unsubstituted or substituted C1-C20 alkyl or alkoxy, or an unsubstituted or substituted C6-C20 aryl; and p is 0, 1, or 2, and the conductive polymer has a weight average molecular weight ranging from 3,000 to 30,000. A process for preparing the conductive polymer composite is also provided. |
| US09613756B2 |
Laminated ceramic capacitor
As a dielectric ceramic constituting dielectric layers of a laminated ceramic capacitor, a dielectric ceramic is used which contains, as its main constituent, a perovskite-type compound containing Ca and Zr and optionally containing Sr, Ba, and Ti, and further contains Si, Mn, and Al, and when the total content of Zr and Ti is regarded as 100 parts by mol, the total content (100×m) of Ca, Sr, and Ba meets 1.002≦m≦1.100 in terms of parts by mol, the Si content n meets 0.5≦n≦10 in terms of parts by mol, the Mn content u meets 0.5≦u≦10 in terms of parts by mol, and the Al content w meets 0.02≦w≦4 in terms of parts by mol, m and n satisfying −0.4≦100(m−1)−n≦3.9. |
| US09613751B2 |
Coil support members
A method of manufacturing a coil support member in which a thermosetting or thermoplastic material is introduced into a mold cavity and hardened, wherein one or more components are positioned within the mold cavity during the manufacturing process before the thermosetting or thermoplastic material is introduced, the components are then embedded in the thermosetting or thermoplastic material and form an integral part of the coil support member, and one or more functional filler materials are added to the thermosetting or thermoplastic material to improve the thermal matching between the integral components and the thermosetting or thermoplastic material. |
| US09613750B2 |
Segmented-coil manufacturing method and apparatus
In a segment coil manufacturing method for manufacturing a segmented coil by bending a flat rectangular conductor using a forming die so that the segmented coil has a circular arc section, a crank section, and a protrusion-shaped section, the forming die includes an outer peripheral surface forming upper die, an inner peripheral surface forming upper die, an inner peripheral surface forming lower die, and an outer peripheral surface forming lower die, and the method includes forming the circular arc section, the crank section, and the protrusion-shaped section while holding at least two surfaces of the outer peripheral surfaces of the flat rectangular conductor by the outer peripheral surface forming upper die, the inner peripheral surface forming upper die, the inner peripheral surface forming lower die, and the outer peripheral surface forming lower die. |
| US09613749B2 |
Manufacturing device for field pole magnet body and manufacturing method for same
A manufacturing device for a field pole magnet body includes a reference jig having reference surfaces in the lengthwise direction, width direction, and thickness direction for positioning a plurality of cleaved and divided magnet fragments in an aligned state. The manufacturing device further includes a first pressing means that presses the plurality of magnet fragments to the thickness direction reference surface from the thickness direction of a magnet body to align them in the thickness direction, and a second pressing means that presses the plurality of magnet fragments to the width direction reference surface from the width direction of the magnet body to align them in the width direction. An operational axis line of a pressing part of at least one of the first and second pressing means is arranged to be tilted such that it approaches the lengthwise direction reference surface at the side that abuts the magnet fragments. |
| US09613748B2 |
RH diffusion source, and method for producing R-T-B-based sintered magnet using same
A method for producing a sintered R-T-B based magnet includes providing a sintered R-T-B based magnet body, where T is mostly Fe; providing an RH diffusion source that includes 0.2 mass % to 18 mass % of a light rare-earth element RL; 40 mass % to 70 mass % of Fe; and a heavy rare-earth element RH as the balance; and performing an RH diffusion process by loading the sintered R-T-B based magnet body, a stirring aid member, and the RH diffusion source into a chamber, and by heating the sintered R-T-B based magnet body, the stirring aid member, and the RH diffusion source to a temperature of 700° C. to 1000° C. while rotating or rocking the chamber. The Fe/RH ratio is within a range from two to seven and is defined by a mass fraction of Fe when a mass fraction of the heavy rare-earth element RH in the RH diffusion sources is three. |
| US09613742B2 |
Electronic component
To restrict a phenomenon that the direct-current resistance value after firing is larger than the direct-current resistance value before firing in an electronic component in which a conductor formed of a wire rod is embedded in a ceramic sintered compact. An electronic component 10 includes a ceramic sintered compact 12 and an inner conductor 30. The inner conductor 30 configures a circuit element, and is formed of a wire rod having nickel added thereto and containing copper as a major constituent. |
| US09613739B2 |
Electromagnetic mating interface
Methods and apparatus for automatically coupling stackable modular devices are described. The modular devices may be coupled using electromagnetic forces generated by precisely-timed pulses of electric current through electromagnetic materials that cause a first modular device to screw itself into a second modular device. The modular devices may exchange data through electrical or optical connections after coupling. A method includes detecting that a second modular device is proximately and coaxially located to a first modular device, activating a plurality of electromagnetic elements in an annular electromagnetic array according to a timed sequence, each electromagnetic element being activated at a different time than the other electromagnetic elements in the plurality of electromagnetic elements, detecting that the second modular device is communicatively coupled with the first modular device, and deactivating the plurality of electromagnetic elements after detecting that the second modular device is communicatively coupled with the first modular device. |
| US09613735B2 |
Apparatuses for joining pairs of electric cables
An apparatus for applying an elastic tubular sleeve onto a splicing region between at least one pair of cables, wherein the tubular sleeve is supported in a radially expanded condition on at least one supporting element, may include axial-movement devices configured to axially move the at least one supporting element relative to the tubular sleeve at an adjustable speed, so as to cause a radial elastic shrinkage of the tubular sleeve capable of inducing an axial ejection thrust on the at least one supporting element, and counter devices configured to counteract the axial ejection thrust induced by the elastic shrinkage of the tubular sleeve. |
| US09613732B2 |
Wire harness, wire harness manufacturing method and wire harness manufacturing apparatus
A wire harness manufacturing method prevents inadvertent deformation of thermoplastic material and separation of thermoplastic material. A predetermined part of an electric wire 91 is accommodated in a through hole of a tubular body formed by connection between a first and second nest members (123, 124) of a nozzle (12), by integrally connecting first and second case body members (121, 122) of the nozzle (12), with the predetermined part of the electric wire 91 therebetween. An approximately tubular covering member (92) covering the predetermined part of the electric wire (91) is molded integrally with the thermoplastic material, by discharging thermoplastic material plasticized by a material plasticizing unit (11) from thermoplastic material discharge orifices (1213) and (1223) in the nozzle (12) to the outer periphery of the electric wire (91), while moving the electric wire (91) and the nozzle (12) relatively to each other. |
| US09613723B2 |
Compact nuclear power generation system
A compact nuclear power generation system includes a reactor (3) comprising a core (2) which uses metal fuel containing either or both of uranium-235/238 and plutonium-239. A reactor vessel (1) houses the core (2). Metal sodium primary coolant (8) is heated by the core (2). A neutron reflector (9) maintains the effective multiplication factor of neutrons emitted from the core (2) at approximately one or more to bring the core into a critical state. The neutron reflector is movable from a lower part towards an upper part of the core. The heated metal sodium is supplied to a main heat exchanger (15) which is located outside the reactor. A secondary coolant of supercritical carbon dioxide, which circulates through the main heat exchanger, is in heat exchange with the heated metal sodium. The heated secondary coolant drives a turbine (20). A power generator (21) can be operated by the driven turbine. |
| US09613722B2 |
Method and apparatus for reverse memory sparing
An apparatus and method are described for performing forward and reverse memory sparing operations. For example, one embodiment of a processor comprises memory sparing logic to perform a first forward memory sparing operation at a first level of granularity in response to detecting a memory failure; the memory sparing logic to perform a reverse memory sparing operation in response to a determination of an improved sparing state having a second level of granularity; and the memory sparing logic to responsively perform a second forward memory sparing operation at the second level of granularity. |
| US09613719B1 |
Multi-chip non-volatile semiconductor memory package including heater and sensor elements
A method of healing a plurality of non-volatile semiconductor memory devices on a multi-chip package is disclosed. The multi-chip package can be heated to a temperature range having a temperature range upper limit value and a temperature range lower limit value. The temperature of the multi-chip package can be kept essentially within the temperature range for a predetermined time period by monitoring a thermal sensing element with a sensing circuit outside of the multi-chip package. The thermal sensing element may be located near the components with the lowest failure temperature to ensure the multi-chip package is not damaged during the healing process. |
| US09613717B2 |
Error correction circuit and semiconductor memory device including the same
An error correction circuit includes: a failure detection unit suitable for detecting failed data among a plurality of data; a data output control unit suitable for selectively outputting test data corresponding to a predetermined amount of data excluding the failed data; and an error correction unit suitable for performing a unit ECC operation on the test data. |
| US09613704B2 |
2D/3D NAND memory array with bit-line hierarchical structure for multi-page concurrent SLC/MLC program and program-verify
This invention discloses 2D or 3D NAND flash array in two-level BL-hierarchical structure with flexible multi-page or random-page-based concurrent, mixed SLC and MLC Read, Program or Program-Verify operations including bit-flipping for each program state or any combinations of above operations. Tracking techniques of self-timed control and algorithm of programming, read and local-bit line (LBL) voltage generations are proposed for enhancing automatic controls over charging and discharging of a plurality of WLs and LBLs in one or more randomly selected Blocks in one or more Segments of one or more Groups in a NAND plane for m-page concurrent operations using Vdd/Vss to Vinh/Vss Program page data conversion, multiple pseudo CACHEs based on LBL capacitors for storing raw SLC and MSB/LSB loaded page data, writing back or reading from Sense-Amplifier, Program/Read Buffer, real CHCHE, and multiple pseudo CACHEs with M-fold reduction in latency and power consumption. |
| US09613697B2 |
Resistive memory device
A resistive memory device includes a memory cell array having a plurality of memory cells respectively connected to a plurality of first signal lines and a plurality of second signal lines crossing each other. A first write driver is configured to provide a write voltage to write data to the memory cells. A second write driver is configured to be disposed between the memory cell array and the first write driver and provide a write current generated based on the write voltage to a first signal line selected from among the plurality of first signal lines. |
| US09613693B1 |
Methods for setting a resistance of programmable resistance memory cells and devices including the same
A method can include applying a first electric field to a plurality of memory elements that are programmable between at least two different resistance states; verifying whether the memory elements have a resistance outside of a first limit; for memory elements that are not outside of the first limit, applying a second electric field of a same direction as the first electric field, and not applying the second electric field to those memory elements that are outside the first limit; and verifying whether the memory elements receiving the second electric field have a resistance outside of a second limit; wherein the second limit is between the first limit and a read limit, where a memory element having a resistance below the read limit is determined to store one data value, and a memory element having a resistance above the read limit is determined to store another data value. |
| US09613692B1 |
Sense amplifier for non-volatile memory devices and related methods
A memory device includes an array of phase-change memory (PCM) cells and complementary PCM cells. A column decoder is coupled to the array of PCM cells and complementary PCM cells, and a sense amplifier is coupled to the column decoder. The sense amplifier includes a current integrator configured to receive first and second currents of a given PCM cell and complementary PCM cell, respectively. A current-to-voltage converter is coupled to the current integrator and is configured to receive the first and second currents, and to provide first and second voltages of the given PCM cell and complementary PCM cell to first and second nodes, respectively. A logic circuit is coupled to the first and second nodes and is configured to disable the column decoder and to discharge the bitline and complementary bitline voltages in response to the first and second voltages. |
| US09613690B2 |
Resistive memory device and operation method thereof
A resistive memory device includes a memory cell array including a unit memory cell coupled between a word line and a bit line, wherein the unit memory cell includes a data storage material and a non-silicon-substrate-based type bidirectional access device coupled in series, a path setting circuit coupled between the bit line and the word line, suitable for providing a program pulse toward the bit line or the word line based on a path control signal, a forward write command, and a reverse write command, and a control unit suitable for providing a write path control signal, a forward program command, and a reverse program command based on an external command signal. |
| US09613689B1 |
Self-selecting local bit line for a three-dimensional memory array
A three-dimensional memory device includes an alternating stack of word lines and insulating layers, a plurality of gate lines, a plurality of global bit lines, and a plurality of local bit lines contacting a respective gate line and global bit line. A plurality of memory elements is located at each overlap region between the word lines and the local bit lines. A plurality of diodes located in electrical series between each of the local bit lines and the respective one of the plurality of gate lines. A plurality of selector elements located in electrical series between each of the local bit lines and the respective one of the plurality of global bit lines. The plurality of selector elements includes a material that provides a conductivity change of at least one order of magnitude upon application of a voltage. |
| US09613686B2 |
Management of data storage in memory cells using a non-integer number of bits per cell
A method for data storage includes storing data in a group of memory cells, by encoding the data using at least an outer code and an inner code, and optionally inverting the encoded data prior to storing the encoded data in the memory cells. The encoded data is read from the memory cells, and inner code decoding is applied to the read encoded data to produce a decoding result. At least part of the read data is conditionally inverted, depending on the decoding result of the inner code. |
| US09613681B2 |
Voltage generation circuit
A voltage generation circuit may include: a main code table suitable for outputting a main code based on an operation signal; a main voltage generator suitable for generating a main voltage corresponding to the main code; a trimming module suitable for comparing the main voltage with a target voltage to output a trimming signal; a trimming code table suitable for outputting a trimming code corresponding to the trimming signal; a code determination module suitable for outputting the main code and the trimming code when the trimming code is determined to be valid, and outputting the main code and a output code when the trimming code is determined to be invalid; and an operation voltage generator suitable for outputting an operation voltage based on the main code and a code selected from the trimming code and the substitute code. |
| US09613680B2 |
Semiconductor device with improved sense margin of sense amplifier
Semiconductor devices capable of a sensing margin of a semiconductor device are described. A semiconductor device may include a plurality of mats, a plurality of sensing circuits, a plurality of connecting circuits, and a plurality of mat dividing circuits. The mats are divided into upper regions and lower regions and activated by word lines. The sensing circuits are arranged in regions among the plurality of mats and are configured to sense/amplify data applied from the plurality of mats. The connecting circuits are configured to control connections between the mats and the sensing circuits in correspondence to a plurality of bit line selection signals. The mat dividing circuits are configured to selectively connect bit lines of the upper regions and the lower regions to each other in correspondence to a plurality of mat selection signals. |
| US09613678B2 |
Semiconductor apparatus including multichip package
A semiconductor apparatus including a multichip package is disclosed. The semiconductor apparatus includes a slave chip having a slave region and a master region. The slave region is configured to have a first threshold voltage smaller than an operation voltage and the master region is configured to have a second threshold voltage greater than the operation voltage. |
| US09613676B1 |
Writing to cross-point non-volatile memory
Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may, for example, have a polarity opposite to the access voltage. In other examples, a delay may be instituted between access attempts in order to discharge the untargeted memory cells. |
| US09613674B2 |
Mismatch and noise insensitive sense amplifier circuit for STT MRAM
A technique for sensing a data state of a data cell. A comparator has a first input at a node A and a second input at a node B. A first n-channel transistor is connected to a first p-channel transistor at the node A. A second n-channel transistor is connected to a second p-channel transistor at the node B. A multiplexer is configured to selectively connect a first reference cell or the data cell to the first n-channel transistor and configured to selectively connect the data cell or a second reference cell to the second n-channel transistor. The comparator outputs the data state of the data cell based on input of a node A voltage at the node A and a node B voltage at the node B. |
| US09613668B2 |
Semiconductor memory and memory system
A semiconductor memory includes: a plurality of input/output terminals that can be switched between being a plurality of common input/output terminals capable of bidirectionally transmitting data and a plurality of separate input/output terminals including a plurality of dedicated input terminals that receives data and a plurality of dedicated output terminals that outputs data; and a control circuit that switches the common input/output terminals and the separate input/output terminals based on input/output terminal setting information issued with each access command that controls reading from a memory cell or writing to the memory cell, the switched terminals being used to transmit data read out from the memory cell or data written to the memory cell according to the access command. |
| US09613665B2 |
Method for performing memory interface control of an electronic device, and associated apparatus
A method for performing memory interface control of an electronic device and an associated apparatus are provided, where the method includes the steps of: when it is detected that a phase difference between a data signal and a clock signal reaches a predetermined value, controlling the clock signal to switch from a first frequency to a second frequency, wherein both of the clock signal and the data signal are signals of a memory interface circuit of the electronic device, and the memory interface circuit is arranged for controlling a random access memory (RAM) of the electronic device; applying at least one phase shift to the data signal until a condition is satisfied; and controlling the clock signal to switch from the second frequency to the first frequency; wherein the memory interface circuit is calibrated with aid of the at least one phase shift. |
| US09613664B2 |
Method of operating memory device including multi-level memory cells
A method of operating a memory device is provided. The memory device includes a plurality of multi-level memory cells of which each memory cell includes L levels. Data which is expressed in a binary number is received. A P-length string is generated from the data. The P-length string is converted to a Q-length string. The Q-length string is distributed using I levels by eliminating at least one level from the L levels. P and Q represent binary bit lengths of the P-length string and the Q-length string. Q is greater than P. L represents a maximum number of levels which each multi-level memory cell has. I is smaller than L. The Q-length string is programmed into the plurality of memory cells. |
| US09613663B2 |
Array structure of single-ploy nonvolatile memory
An array structure of a single-poly nonvolatile memory includes a first MTP section, a first OTP section and a ROM section. The first MTP section includes a plurality of MTP cells, the first OTP section includes a plurality of OTP cells and the first ROM section includes a plurality of ROM cells. The first MTP is connected to a first word line, a first source line, a first erase line and a plurality of bit lines. The first OTP section is connected to a second word line, a second source line and the plurality of bit lines shared with the first MTP section. The first ROM section is connected to a third word line, a third source line and the plurality of bit lines shared with the first MTP section. |
| US09613660B2 |
Layered audio reconstruction system
A computing device may receive or otherwise access a base audio layer and one or more enhancement audio layers. The computing device can reconstruct the retrieved base layer and/or enhancement layers into a single data stream or audio file. The local computing device may process audio frames in a highest enhancement layer retrieved in which the data can be validated (or a lower layer if the data in audio frames in the enhancement layer(s) cannot be validated) and build a stream or audio file based on the audio frames in that layer. |
| US09613649B1 |
Changer apparatus for data library apparatus capable of moving recording media between storing position, and recorder and player apparatus
The controller selects one command of the plurality of commands included in the command list. The controller selects one magazine that stores therein one recording medium designated by the one selected command, based on the magazine information, the controller moves the one selected magazine between the storing position of the one selected magazine and the plurality of recorder and player apparatuses using the carrier mechanism. The controller extracts all commands designating recording media stored in the one selected magazine, from the command list, based on the magazine information. The controller moves all the recording media designated by the extracted commands between the one selected magazine and the plurality of recorder and player apparatuses using the carrier mechanism. |
| US09613647B2 |
Method using epitaxial transfer to integrate HAMR photonic integrated circuit (PIC) into recording head wafer
Embodiments of the present invention generally relate to a method for forming a HAMR device having a photonic integrated circuit that includes an optical detector, an optical emitter, and an optical element distinct from the optical detector and the optical emitter, where the elements of the photonic integrated circuit are aligned with a near field transducer. The method includes forming one or more layers on a substrate, bonding the layers to a partially fabricated recording head, removing the substrate using epitaxial lift-off, and forming the optical elements on the partially fabricated recording head. |
| US09613642B1 |
Read/write head with a switching element coupled to read or write transducers
A read/write head includes two or more first transducers of a first type, the first type selected from a magnetic read transducer and a magnetic write transducer. The read/write head includes one or more switching elements coupled to the two or more first transducers. The switching elements are configured to, in response to a control signal, couple a selected one of the two or more first transducers to a preamplifier circuit and decouple others of the two or more first transducers from the preamplifier circuit. |
| US09613635B2 |
Automated performance technology using audio waveform data
In order to play waveform data back at a variable performance tempo by using waveform data which complies with a desired reference tempo, the present invention performs a timeline-expansion/contraction control on the waveform data to be played back, according to the relationship between the performance tempo and the reference tempo. The present invention also determines whether to limit the playback of the waveform data according to the relationship between the performance tempo and the reference tempo. In the case that playback is to be limited, the present invention stops playback of the waveform data, or reduces the resolution of playback processing and continues playback of the waveform data. The present invention stops playback of the waveform data when, for example, the relationship between the performance tempo and the reference tempo is a relationship in which the waveform data would be played back at a performance tempo which would cause a processing delay or a deterioration of sound quality. As a result, it is possible to preemptively prevent a system freeze and solve problems such as the generation of music which has a slower tempo than the desired performance tempo, or the generation of music which includes the intermittent cutting out of sound due to noise, or a significant reduction to sound quality. |
| US09613634B2 |
Control of acoustic echo canceller adaptive filter for speech enhancement
A method for cancelling/reducing acoustic echoes in speech/audio signal enhancement processing comprises using a received reference signal to excite an adaptive filter wherein the output of the adaptive filter forms a replica signal of acoustic echo; an adaptation step size is controlled for updating the coefficients of the adaptive filter; the adaptation step size is initialized by using an open-loop approach and optimized by using a closed-loop approach; one of the most important parameters with the open-loop approach is an energy ratio between an energy of a returned echo signal in an input microphone signal and an energy of the received reference signal; one of the most important parameters with the closed-loop approach is a normalized correlation or a square of the normalized correlation between the input microphone signal and the replica signal of acoustic echo; the replica signal of acoustic echo is subtracted from the microphone input signal to suppress the acoustic echo in the microphone input signal. |
| US09613633B2 |
Speech enhancement
A speech signal processing system is described for use with automatic speech recognition and hands free speech communication. A signal pre-processor module transforms an input microphone signal into corresponding speech component signals. A noise suppression module applies noise reduction to the speech component signals to generate noise reduced speech component signals. A speech reconstruction module produces corresponding synthesized speech component signals for distorted speech component signals. A signal combination block adaptively combines the noise reduced speech component signals and the synthesized speech component signals based on signal to noise conditions to generate enhanced speech component signals for automatic speech recognition and hands free speech communication. |
| US09613624B1 |
Dynamic pruning in speech recognition
In a dynamic automatic speech recognition (ASR) processing system, ASR processing may be configured to estimate a latency of returning speech results to a user based on work being done by an ASR processor. The ASR processing system may measure work done by an ASR processor by measuring one or more time independent metrics and comparing the metrics to threshold values. If the metrics exceed the thresholds, the ASR system may take steps to reduce latency associated with processing the utterance, including adjusting a speech recognition parameter. |
| US09613618B2 |
Apparatus and method for recognizing voice and text
A method for recognizing a voice includes receiving, as an input, a voice involving multiple languages, recognizing a first voice of the voice by using a voice recognition algorithm matched to a preset primary language, identifying the preset primary language and a non-primary language different from the preset primary language, which are included in the multiple languages, determining a type of the non-primary language based on context information, recognizing a second voice of the voice in the non-primary language by applying a voice recognition algorithm, which is matched to the non-primary language of the determined type, to the second voice, and outputting a result of recognizing the voice which is based on a result of recognizing the first voice and a result of recognizing the second voice. |
| US09613614B2 |
Noise-reducing headphone
A noise-reducing headphone includes a headphone housing, a speaker unit, and a microphone. The headphone housing includes an accommodating space and a sound output hole. The accommodating space is communicated with the sound output hole. The speaker unit is positioned in the accommodating space. The speaker unit includes a speaker unit housing and a diaphragm disposed on the speaker unit housing. The diaphragm faces toward the sound output hole and includes a central through hole and an annular vibrating portion around the central through hole. The diaphragm produces sound waves toward the sound output hole by vibrations of the annular vibrating portion. The microphone is disposed on the speaker unit housing and is positioned in the central through hole. The microphone is coaxial to the central through hole. One face of the microphone faces toward the sound output hole and the other faces toward the inner of the headphone housing. |
| US09613613B2 |
Method for active narrow-band acoustic control with variable transfer function(s), and corresponding system
An active acoustic control method for attenuating disturbing narrow-band noise with at least one counter-noise loudspeaker and at least one error microphone in a space forming a material electroacoustic system, the method implementing, in a computing element, a control law with an internal model and disturbance observer with a model of the electroacoustic system, previously obtained by an identification method. The current configuration of the electroacoustic system can vary over time, a nominal configuration of the electroacoustic system is previously determined, a corresponding nominal model Mo(q−1) or Mo(k) previously identified, the control law with an internal model and disturbance observer is implemented in real time, a modifier block Δ(q−1) or Δ(k) is applied to and associated with the nominal model, and the nominal model remains the same during the variations of the current configuration of the electroacoustic system, and the modifier block is varied in real time during these variations. |
| US09613610B2 |
Directional sound masking
The invention relates to a system for masking a sound incident on a person. The system comprises a microphone sub-system for capturing the sound. The system further comprises a spectrum-analyzer for determining a power attribute of the sound captured by the multiple microphone sub-system, and a spatial analyzer for determining a directional attribute of the captured sound representative of a direction of incidence on the person. The system further comprises a generator sub-system for generating a masking sound under combined control of the power attribute and the spatial attribute, for masking the incident sound. |
| US09613601B1 |
Minawi straw
Minawi Straw is invented by a Musician/Music Teacher/Composer Mr. Hasan Ahmad Minawi. It is a unique Musical Instrument, made of simple and inexpensive plastic materials, and it is characterized with a new unique musical sound that has accurate music dimensions according to Music Industry Notes, compatible with other music instruments, as it produces unique different sounds when using a special way of inflation (FIG. 5).The Minawi Straw is made up of one plastic tube of 19.60 centimeters in length equal to 7.72 inches, and the length can be adjusted longer as needed. It has 8 Sound holes—7 Sound holes on the front side and 1 Sound hole which is Opening 8 on the Upper Rear side (described in the drawing (FIGS. 1 and 2) as openings 1-8). It can be adjusted up to 10 Sound holes, as needed by Player. |
| US09613597B2 |
Apparatus and method for image compositing based on detected presence or absence of base image
An image compositing apparatus of the present invention includes first overlay image processing circuitry that stores the position and size of an area in which a first overlay image is displayed and, according thereto, changes the position and size of the first overlay image, second overlay image processing circuitry that processes a second overlay image similarly to the first overlay image processing circuitry, a circuit for detecting the absence of base image that decides the presence or absence of a base image, and a chromakey decision circuitry that decides a chromakey color portion of the base image. In a case where the circuit for detecting the absence of base image decides the absence of a base image, the image compositing apparatus outputs the first and second overlay images processed by the first overlay image processing circuitry and the second overlay image processing circuitry, respectively. |
| US09613595B2 |
Shift register
A driving circuit comprises a plurality of shift register (SR). An ith SR among the plurality SR's comprises a resetting circuit, an input switch, a capacitor, and an output circuit. The resetting circuit is used for adjusting a resetting voltage according to a control voltage. The input switch is used for adjusting the control voltage according to an (i−2)th driving signal from an (i−2)th SR among the plurality of SR's, selectively. The capacitor is used for adding a voltage variation of a boosting signal to the control voltage. The output circuit is used for taking an ith input signal as an ith output signal according to the control voltage and the resetting voltage, selectively. The positive edge of the boosting voltage leads the negative edge of the ith input signal. |
| US09613594B2 |
Driving circuit and driving method for a display device
A driving circuit includes first and second source driving circuits, and first and second control units. Each of the first and second control units includes multiple first control subunits. Each of the first control subunits includes a control end, an input end, and an output end. The control end receives a control signal to turn on or off the first control subunit. The input end receives a clock signal. The output end is connected with the associated source driving circuit. The first and second control units enable switching between the unilateral driving mode and the bilateral driving mode for the clock signal. |
| US09613592B2 |
Head mounted display device and control method for head mounted display device
A transmission type head mounted display device includes an image display unit including an image-light generating unit configured to generate image light on the basis of image data and emit the image light, the image display unit causing a user to visually recognize the image light as a virtual image and transmitting an outside scene in a state in which the image display unit is worn on the head of the user, and a control unit configured to set, as the image light that the control unit causes the user to visually recognize using the image display unit, specific image light generated on the basis of set specific image data and changing according to elapse of time. |
| US09613585B2 |
Display device and method for driving the same
Provided is a display device capable of switching a refresh rate while suppressing deterioration in display quality and degradation in liquid crystal. In the case of switching the refresh rate from 60 Hz to 7.5 Hz, a transition period for gradually changing the refresh rate from 60 Hz to 7.5 Hz is provided between a 60-Hz period and a 7.5-Hz period. This transition period is configured by sequentially arraying a 30-Hz period, a 20-Hz period, a 15-Hz period, a 12-Hz period and a 10-Hz period from a start point of the transition period. Hence the refresh rate gradually changes from 60 Hz to 7.5 Hz sequentially through 30 Hz, 20 Hz, 15 Hz, 12 Hz and 10 Hz. The number of positive-polarity frames and the number of negative-polarity frames are respectively 20 in the whole of the transition period, and are equal to each other. |
| US09613581B2 |
Driving circuit and liquid crystal display apparatus having the same
A driving circuit and a liquid crystal display apparatus having the same are disclosed. The driving circuit includes a first clock-signal driving circuit, a second clock-signal driving circuit, a data-line driving circuit, and a scanning-line driving circuit. The driving circuit and the liquid crystal display apparatus having the same prevent the delay of primary scanning signals so as to solve a technical problem where conventional liquid crystal display apparatus display images with a low display quality due to the delay of primary scanning signals. |
| US09613580B2 |
Display device, timing controller, and image displaying method
Aspects of the present invention relate to a display device, a timing controller, and an image display method. When a frame of an input image signal including an odd-field signal and an even-field signal is received, a timing controller outputs a gate scanning clock (GCK) signal and an output enable (OE) signal in an interlaced scanning manner, to separately scan the odd-field image and the even-field image in the interlaced scanning manner in real time. The interlaced scanning manner is used for the interlaced signal, thereby saving a storage equipped in a converter. |
| US09613578B2 |
Shift register unit, gate driving circuit and display device
The shift register unit according to the present disclosure may include a latch module, and at least two levels of output control modules connected with the latch module. Input ends of the latch module may be connected with a start signal and a clock signal respectively, an output end of the latch module may be connected with input ends of the at least two levels of output control modules, and the latch module may be configured to latch the start signal according to the clock signal inputted. Input ends of the output control modules may be connected with clock signals, the output control modules may be configured to output gate line driving signals according to the clock signals. All the clock signals may be inputted sequentially to the latch module and each level of output control modules in accordance with a timing sequence. |
| US09613574B2 |
Switch circuit to control the flow of charges in the parasitic capacitance of a TFT in the pixel of a display
The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes: a plurality of data lines and a plurality of gate lines configured to divide a display region into a plurality of display sub-regions; a pixel electrode arranged at each display sub-region; and a TFT arranged at each display sub-region, a source electrode of the TFT being electrically connected to the data line, a drain electrode thereof being electrically connected to the pixel electrode and a gate electrode thereof being electrically connected to the gate line, wherein a parasitic capacitor is formed between the gate electrode and the drain electrode of the TFT. The array substrate further includes a switch circuit configured to enable both ends of the parasitic capacitor to be electrically connected when a gate driving signal of the TFT is changed from a high level to a low level. |
| US09613573B2 |
Light modulating backplane with configurable multi-electrode pixels
A light modulating Backplane with configurable multi-electrode pixels is disclosed. The configurable multi-electrode pixel includes a first set of dot electrodes in a first field and a second set of dot electrodes in a second field. Generally, dot electrode is included in both the first set of dot electrodes and the second set of dot electrodes. For example, a pixel control circuit coupled to a dedicated dot electrode. A first dot electrode is coupled to the pixel control circuit by a first dot electrode connection circuit and a second dot electrode is coupled to the pixel control circuit by a second dot electrode connection circuit. During the first field the first dot electrode connection circuit is active while the second dot electrode connection circuit is inactive. During the second field, the first dot electrode connection circuit is inactive while the second dot electrode connection circuit is active. |
| US09613572B2 |
Controller and method for dimming light-emitting diodes
A controller for dimming light-emitting diodes includes a pulse width modulation pin, a low-pass filter, a frequency detection unit, and a control signal generation module. The low-pass filter generates a direct current signal according to a pulse width modulation signal generated by a micro-controller. The frequency detection unit generates a logic value according to a threshold and the pulse width modulation signal. The control signal generation module generates a switch control signal to a first switch connected to the light-emitting diodes in series according to the direct current signal, the logic value, a reference voltage, and the pulse width modulation signal. When a frequency of the pulse width modulation signal is lower than the threshold, the controller enters a digital dimming mode; and when the frequency of the pulse width modulation signal is higher than the threshold, the controller enters an analog dimming mode. |
| US09613568B2 |
Semiconductor device and driving method thereof
There has been a problem that power consumption is increased if a potential of a signal line changes every time a video signal is applied to a driving transistor from the signal line, since the parasitic capacitance of the signal line stores and releases electric charges. In a configuration of a display portion provided with a gate signal line for selecting an input of a video signal to a pixel and a source signal line for inputting a video signal to the pixel, a switch is connected in series with the source signal line, the switch being controlled to be in on state when the pixel is not selected by the gate signal line, and in off state when the pixel is selected by the gate signal line. Accordingly, the parasitic capacitance of the source signal line which stores and releases electric charges affects only pixels between an output side of a source driver up to and including the pixel selected to be written with a video signal. Consequently, power consumed by the charging and discharging of the source signal line can be reduced, and thus low power consumption can be achieved. |
| US09613566B2 |
Driving device and driving method of AMOLED
An AMOLED driving device includes a control module, a voltage module, and a display panel. The control module includes a timing control unit, a data output unit, a black screen output unit, and a data output selection unit. The voltage module includes a Gamma constant voltage unit and an OLED driving voltage unit. The timing control unit generates a frame control signal (Frame_ctr) that controls the data output selection unit (14) and the OLED driving voltage unit so that a normal image is output in one frame, while a black screen is output in another frame. During the period of outputting of the black screen, a preset positive potential is switched to connect to a power supply negative potential so as to prevent the occurrence of a display defect of residual image and effectively suppress threshold voltage shifting of a second transistor. |
| US09613562B2 |
Display device and method for driving the same
A display device includes a light sensor, a controller, a data driver, and a scan driver. The controller is configured to correct an input image signal based on an electrical signal output by the light sensor and an input image signal, the controller includes: a first color coordinate calculation unit configured to calculate a color coordinate of reflected light; a second color coordinate calculation unit configured to calculate a color coordinate of dark room output light for at least two grayscale value sections; a combination unit configured to combine the reflected light color coordinate and the dark room output light color coordinate together; and a gamma value setting unit configured to set a gamma value based on a deviation between the combination light color coordinate output by the combination unit and a reference color coordinate. |
| US09613561B2 |
Display apparatus and method for controlling display apparatus
A display device includes a plurality of common lines, a plurality of drive lines, a plurality of light emitting elements, a source driver, and a sink driver. At least one charging device is connected to at least one of the common lines and configured to increase a voltage of the common lines to a predetermined value when the voltage of the common lines is lower than the predetermined value during a period while the source driver does not apply the voltage. At least one discharging device is connected to at least one of the plurality of common lines and configured to decrease the voltage of the common lines to the predetermined value when the voltage of the common lines is higher than the predetermined value during the period while the source driver does not apply the voltage. |
| US09613560B2 |
Backlight driving method, backlight driving device, and display device
The invention discloses a backlight driving method, a backlight driving device, and a display device. The method comprises steps of: acquiring turn-on timings of respective areas of a backlight source of a display device and an opening timing of a 3D glasses; adjusting driving signals for the respective areas of the backlight source based on each length of overlapping time between the opening timing of the 3D glasses and each of the turn-on timings of the respective areas of the backlight source, thus making brightness of light from pictures corresponding to the respective areas of the backlight source in the display device be the same, said light being received through the 3D glasses; and driving the corresponding areas in the backlight source to be turned on by using the adjusted driving signals for the respective areas of the backlight source. |
| US09613557B2 |
Display device and method of driving the display device
A display device includes a display panel including a plurality of pixels arranged in a pentile pattern, the plurality of pixels having at least a first pixel and a second pixel adjacent to the first pixel, and the display panel being configured to display colors corresponding to respective output color data of the first and second pixels, and a color data converter configured to convert input color data to generate the output color data, the color data converter including a determiner configured to receive the input color data, to determine whether the first pixel displays a white color and the second pixel displays a black color, and to generate a first determination signal based on a result of the determination, and an adjustment unit configured to adjust the output color data of the first or second pixel based on the first determination signal. |
| US09613556B2 |
Electronic device resistant to radio-frequency display interference
An electronic device may be provided with wireless circuitry and a display. A display driver integrated circuit in the display may have a spectrum analyzer circuit. An antenna may monitor for wireless signals. The display driver integrated circuit may use the spectrum analyzer circuit to analyze the wireless signals and determine whether there is a potential for visible display artifacts. In the presence of conditions that can lead to display artifacts, the display driver integrated circuit may adjust a gate driver control signal. Adjustments to the gate driver control signal may be made using adjustable signal dividers. The adjustments to the gate driver control signal eliminate the visible display artifacts. |
| US09613554B2 |
Display driving method and integrated driving apparatus thereof
A driving method of a display device includes: determining each of a plurality of pixel rows of the display device as one of a motion picture display pixel row and a still image display pixel row by comparing image data of each of the pixel rows in a current frame and in a previous frame; and driving the motion picture display pixel row with a motion picture frequency and driving the still image display pixel row with a still image display frequency, which is lower than or equal to the motion picture frequency, where a plurality of still image display pixel rows are driven with at least two still image display frequencies. |
| US09613551B2 |
Organic light emitting diode display apparatus and method and apparatus for inspecting the same
An organic light emitting diode display apparatus and a method and apparatus for easily inspecting the organic light emitting diode display apparatus to determine whether an electrical failure occurs. The organic light emitting diode display apparatus comprises a plurality of pixels each comprising a pixel electrode, an intermediate layer including an organic emission layer, and an opposite electrode; scan lines and data lines corresponding to the plurality of pixels; first power supply lines connected to the plurality of pixels and extending in a first direction; second power supply lines connected to the first power supply lines; and a control line unit for simultaneously supplying control signals to the plurality of pixels, the control line unit including a plurality of control lines extending in one direction and two common lines being respectively connected to both ends of each of the plurality of control lines. |
| US09613548B2 |
Advanced cooling system for electronic display
Exemplary embodiments provide an advanced cooling system for an electronic display having a plurality of open loop fluid flow paths as well as a closed loop fluid flow path. The open loop divides a fluid, such as ambient air, among a series of sub-paths including front and rear open loop layers and a heat exchanger. The first and second open loop layers may comprise a corrugated element, forming peaks and valleys. The peaks and valleys of the front and rear layers may be arranged such that they do not align. A section of the rear open loop layer may be sealed from open loop flow. The closed loop preferably passes through an electronics compartment and the heat exchanger, also passing in front of the electronic display. |
| US09613547B2 |
Dual-faced labelling systems
An illustrative apparatus includes a first substrate and a second substrate. The first substrate includes a first adhesive-receiving face. The first adhesive-receiving face includes a first adhesive-coated region and a first release region. The first substrate also includes a first print receiving face opposite the first adhesive-receiving face. The second substrate includes a second adhesive-receiving face. The second adhesive-receiving face includes a second adhesive-coated region and a second release region. The second substrate also includes a second print receiving face opposite the second adhesive-receiving face. The first adhesive-coated region is releasably adhered the second release region and the second adhesive-coated region is releasably adhered to the first release region. |
| US09613542B2 |
Sound source evaluation method, performance information analysis method and recording medium used therein, and sound source evaluation apparatus using same
A method and an apparatus for recording and evaluating a sound source are provided. The sound source evaluation method calculates a creativity index, which indicates a difference of a sound source property of test performance information with respect to a sound source property of reference performance information at a specific performing time, by comparing the test performance information, which is acquired by quantifying, according to passage of the performing time, a sound source property in a provided test sound source, with the reference performance information, which is acquired by extracting a sound source property and a sound source property having the same attribute according to passage of the performing time from a plurality of verified sound sources and then through a statistical analysis of the extracted properties. |
| US09613539B1 |
Damage avoidance system for unmanned aerial vehicle
This disclosure describes an unmanned aerial vehicle (“UAV”) and system that may perform one or more techniques for protecting objects from damage resulting from an unintended or uncontrolled impact by a UAV. As described herein, various implementations utilize a damage avoidance system that detects a risk of damage to an object caused by an impact from a UAV that has lost control and takes steps to reduce or eliminate that risk. For example, the damage avoidance system may detect that the UAV has lost power and/or is falling at a rapid rate of descent such that, upon impact, there is a risk of damage to an object with which the UAV may collide. Upon detecting the risk of damage and prior to impact, the damage avoidance system activates a damage avoidance system having one or more protection elements that work in concert to reduce or prevent damage to the object upon impact by the UAV. |
| US09613538B1 |
Unmanned aerial vehicle rooftop inspection system
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for an unmanned aerial system inspection system. One of the methods is performed by a UAV and includes receiving, by the UAV, flight information describing a job to perform an inspection of a rooftop. A particular altitude is ascended to, and an inspection of the rooftop is performed including obtaining sensor information describing the rooftop. Location information identifying a damaged area of the rooftop is received. The damaged area of the rooftop is traveled to. An inspection of the damaged area of the rooftop is performed including obtaining detailed sensor information describing the damaged area. A safe landing location is traveled to. |
| US09613536B1 |
Distributed flight management system
A method for operating a distributed flight management system. The method includes operating a control station instance of the distributed flight management system. The method includes receiving flight management system data from a remotely accessed vehicle. The method includes receiving time-space-position information of the remotely accessed vehicle from the remotely accessed vehicle. The method includes updating the control station instance of the distributed flight management system based at least on the received flight management system data and the time-space-position information of the remotely accessed vehicle. The method includes outputting updated flight management system data for transmission to the remotely accessed vehicle to synchronize a remotely accessed vehicle instance of the distributed flight management system with the control station instance of the distributed flight management system. |
| US09613535B2 |
Method for allowing missions of unmanned aerial vehicles, in particular in non-segregated air spaces
A method for allowing missions of unmanned aerial vehicles (UAV), in particular in non-segregated air space, includes the steps of: prearranging a flight plan by an operator of an unmanned aerial vehicle; verifying, by a management and control body, that the flight plan is compatible with other flight plans of other aerial vehicles, and, if necessary, modifying the flight plan so as to prevent any collisions with the other aerial vehicles, wherein the following steps are carried out: encrypting the flight plan, by the management and control body, with a private key of the management and control body, so as to obtain an encrypted flight plan; encoding the encrypted flight plan with a public key of the unmanned aerial vehicle for which the flight plan is intended, so as to obtain an encrypted and encoded flight plan. |
| US09613533B2 |
Parking space detector
Provided is a parking space detector designed so as not to erroneously detect an inter-vehicle distance as a parking space, the inter-vehicle distance being the distance between oncoming vehicles continuously passing by. The invention is provided with a parking space presence determination part for determining whether or not a parking space for a vehicle is present. The parking space presence determination part is designed so as to determine whether or not oncoming vehicles are stationary on the basis of the vehicle speed and the relative speed of the oncoming vehicles, therefore preventing the space (inter-vehicle distance) between two other oncoming vehicles being erroneously detected as a parking space, the oncoming vehicles being vehicles traveling toward the vehicle and continuously passing by. |
| US09613532B2 |
Computer-implemented system and method for providing directions to available parking spaces via dynamic signs
A computer-implemented system and method for providing directions to available parking spaces via dynamic signs is provided. A plurality of available parking spaces is determined. Two or more parking signs in a proximate location are identified. One sign is located prior to the other sign. At least one of the available parking spaces is selected from the plurality of parking spaces for providing directions via the identified signs. A direction of the available parking space is determined for each of the parking signs in relation to that parking sign. The direction of the available parking space from each parking sign is displayed on that parking sign. |
| US09613529B2 |
Predictive incident aggregation
In one embodiment, an incident report including a path segment identifier and an incident identifier is received at a computing device. The incident identifier is sent to a traffic prediction model. The traffic prediction model returns a traffic distribution value. The traffic distribution value identifies a portion of a traffic prediction distribution derived from historical data. The computing device accesses a lookup table according to traffic distribution value and the path segment identifier to receive a speed prediction. |
| US09613524B1 |
Reduced false alarm security system
Embodiments of a central security monitoring device for reducing incidences of false alarms in a security system is disclosed. In one embodiment, a method is described, comprising receiving an alarm signal from an occupancy sensor via a receiver, receiving a second alarm signal from a barrier alarm device after receiving the alarm signal, determining an elapsed time from when the alarm signal from the occupancy sensor was received to when the second alarm signal from the barrier alarm device was received, performing one or more actions when the elapsed time is greater than the predetermined time, and refraining from performing the one or more actions when the elapsed time is less than the predetermined time. |
| US09613523B2 |
Integrated hazard risk management and mitigation system
A system for hazard mitigation in a structure including a subsystem coupled to a circuit of an electrical distribution system and set of nodes. The nodes monitor operating conditions of the circuit and generate data in response. A data processing system is operable to process the data generated by the set of nodes and in response identify a trigger representing a condition requiring that an action be taken. The data processing system processes the trigger in accordance with a predetermined policy to initiate an action by the subsystem. |
| US09613520B2 |
Real-time event communication and management system, method and computer program product
A real time medical communication system for sending Notifications of medical Alerts includes a data translation layer for receiving real time medical data from one or more sources via a network and an Alerts engine. The Alerts engine may include a message processing module including an entity extraction module configured to extract entities from the real time medical data; and a fragment generation module configured to define fragments comprising events of interest for defining one or more medical Alerts. The Alerts engine may further include an Alert generation module that may include fragment query and evaluation modules for analyzing received real time medical data for defined fragments and generating one or more medical Alerts therefrom. A Notification module may also be provided for sending Notifications of Alerts to users. |
| US09613517B1 |
Personal object location manager
A method, computer program product, and system for object location managing. The method including generating a first list including one or more personal objects based on a personal schedule of a user, generating a second list including one or more personal objects physically located within a predefined range of a checkpoint, comparing the first list to the second list to determine which personal objects are on both lists and which personal objects are missing, if any, from the second list, and notifying the user with the results of the comparison between the first list and the second list by activating an alarm. |
| US09613515B2 |
Method and apparatus for occupant customized wellness monitoring
A system includes a processor configured to wirelessly connect to a wearable device. The processor is also configured to determine a device-wearer identity. Further, the processor is configured to receive a biometric value from the wearable device. The processor is additionally configured to compare the biometric value to thresholds associated with a user profile selected based on the device-wearer identity and, in response to the biometric value exceeding a threshold, engage in a predefined response associated with the threshold. |
| US09613513B2 |
Window blind pull-string alarm apparatus, systems, and methods of making and using the same
The present invention relates to an alarm for detecting and alerting a person of an event where a device is pulled on for an extended period of time. Specifically, the present invention relates to an alarm implemented on a pull-string. Even more specifically, the present invention relates to an apparatus, system, and method of using the same that alerts a person when something becomes tangled or is otherwise caught up in the pull-string of window blinds, shades, or other light blocking devices. |
| US09613510B2 |
Apparatus and method for rapid human detection with pet immunity
A method and apparatus are provided, wherein the apparatus performs the steps of detecting a moving object within a secured area, determining a size of the moving object, determining that the size exceeds a predetermined size threshold value associated with an animal, determining an aspect ratio of the moving object, determining that the aspect ratio meets a predetermined aspect ratio threshold value associated with an animal or crawling human, but not an upright human, retrieving an indicator from memory that establishes whether an animal is present or not present within the secured area, and setting an alarm upon detecting that the moving object exceeds the predetermined size threshold value, that the determined aspect ratio meets the predetermined aspect ratio threshold value of an animal or crawling human, and that the indicator establishes that there is no animal present in the secured area. |
| US09613509B2 |
Mobile electronic device and method for crime prevention
According to an aspect, a mobile electronic device includes a light-emitting unit and a control unit. The light-emitting unit emits light. The control unit performs control such that a predetermined operation is executed when a variation between first information and second information is greater than a threshold. The first information and the second information are obtained with respect to an area to which the light-emitting unit emits the light. |
| US09613507B2 |
Alarm system and method
An alarm system includes a detector positioned to detect when an object experiences an unauthorized removal and which produces an alarm signal when the object experiences an unauthorized removal. The alarm system includes a cell phone with global positioning system (GPS) in communication with the detector which transmits wirelessly an alarm alert signal with coordinates of the cell phones location when the cell phone receives the alarm signal. The alarm system includes a power supply control portion in communication with the cell phone which controls power to the cell phone. A method for protecting an object. |
| US09613503B2 |
Occupancy based volume adjustment
Systems and techniques are provided for occupancy based volume adjustment. A signal including detected locations for several persons may be received. An occupancy model may be generated based on the detected locations. A volume adjustment for a speaker may be generated based on the occupancy model and a target sound level range for each of the detected locations. The volume of the speaker may be adjusted based on the volume adjustment. A signal including a detected location of one other person may be received. A location of other speakers may be received. The occupancy model may be generated based on the detected location of the one other person. The speaker may be determined to be closer to the one other person than any of the other speakers. The volume adjustment for the speaker may be generated based in part on the location of the one other person. |
| US09613500B2 |
Game system and method with adjustable eligibility for bonus features
A method and a gaming system for adjusting eligibility rules for wager-dependent bonus features in a wagering game, the game including one or more rule-adjusting activities related to randomly generated outcomes of the game. Rule-adjusting activities achieved by a player can be assessed according a qualification scheme, and can qualify the player for the wager-dependent bonus award even though the player made a non-eligible wager. |
| US09613496B2 |
Trajectory-based 3-D games of chance for video gaming machines
Trajectory-based games of chance are described that may be implemented on a video gaming machine. In a trajectory-based game of chance, a trajectory of a game object may be generated in a 3-D gaming environment. A wager may be made on an aspect of the game object's trajectory in the gaming environment such as a termination location for the trajectory of the game object. The aspect of the game object's trajectory may occur according to a known probability. Hence, an award for the trajectory-based game of chance may be proportional to the probability of the aspect of the game object's trajectory occurring. |
| US09613494B2 |
Gaming system and method having player accumulated points and determining each player's chances of winning an award based on the accumulated points
The gaming system and method disclosed herein provides and tracks bonus event eligibility points accumulated by players playing the gaming devices in the gaming system. Upon a triggering of a bonus event, the gaming system generates, for each bonus event eligibility point accumulated for each player, a random number from a predefined range of numbers. The gaming system determines which one of the accumulated bonus event eligibility points is the designated bonus event eligibility point, such as by determining which bonus event eligibility point is associated with the highest valued random number generated. The gaming system then enables the player that accumulated the designated bonus event eligibility point to participate in the bonus event. In the bonus event, one or more awards are provided to the player that accumulated the designated bonus event eligibility point. |
| US09613492B2 |
Gaming system having system wide tournament features
Disclosed is a multi-mode gaming terminal that utilizes at least one controller to detect a selection between a cash mode of operation and a tournament mode of operation. If the cash mode is selected, the terminal executes a wagering game with a first payback return. If the tournament mode is selected, the terminal executes the wagering game with a second payback return and a tournament return. In tournament mode, for each tournament eligible play of the wagering game resulting in a winning outcome, a predetermined number of tournament points are added to a tournament entry and, upon the occurrence of a triggering event, the tournament entry is entered into a tournament. |
| US09613490B2 |
Adaptive environmental effects
An establishment can coordinate devices (e.g., lights, speakers, displays) to enhance a game playing environment based on events detected in a network of wagering game machines. A system can be implemented that determines an environmental effect based on an event of a wagering game (e.g., a near win event), regardless of the particular wagering game developer/manufacturer. The system can then determine that the environmental effect should be modified based on current circumstances of the area to be impacted and/or the player, for example. The system modifies the environment effect as indicated for the current circumstances and causes the modified environmental effect to be produced. |
| US09613489B2 |
Universal overlay games in an electronic gaming environment
A system is disclosed herein for displaying winning and non-winning game results in a traditional gaming environment. The system uses an overlay game to present an entertaining display to a player upon the occurrence of a win or trigger event. An overlay game has limited capabilities and additionally is engineered to be usable on a variety of gaming machines. To be usable on a variety of gaming machines, the overlay game is intentionally kept simple; in one case, it comprises a visual display that is shown to a player upon the occurrence of a trigger event. In another embodiment, it requires a simple button press to start the overlay game. The overlay games are downloaded on an as-needed basis, run on the gaming machine, and then discarded. |
| US09613487B2 |
Game related systems, methods, and articles that combine virtual and physical elements
Physical objects may be employed with a virtual game layout to enhance wager and non-wagered based gaming. Displays subsystems may provide a changeable or selectable virtual game layout with demarcations appropriate to a selected game. A sensor subsystem may detect physical aspects of game related pieces (e.g., playing cards, chips, markers, dice, spinners, tokens, tiles) as well as media (e.g., identity media, financial media). All gaming functions may occur through interaction with a playing surface, as well as functions such as order food, beverages and services. Automated tracking of players, dealers and games may be realized along with bonusing and promotions. |
| US09613485B2 |
Wheel-spinning wagering method and apparatus for sequential outcomes on multiple wheels
An apparatus and method uses three sequential wheel random event generators and is configured to receive wagers that are resolved on a basis of selection of correct orders of wheels with same symbols on the sequence of wheel random event generators. |
| US09613483B2 |
Personal digital key and receiver/decoder circuit system and method
The present invention enables automatic authentication of a personal digital key based upon proximity of the key which is associated with a person. The system enables linking of the personal digital key to an account based upon the automatic authentication. The personal digital key includes encrypted digital data unique thereto, which enables automatic authentication based upon proximity thereof to a receiver and the account linking system. The system further includes an account linking system based upon automatic authentication of the personal digital key. The account linking system comprises a receiver/decoder circuit, which is able to automatically authenticate the personal digital key, whereby the personal digital key is able to be linked to and associated with an account. |
| US09613475B2 |
Communications with interaction detection
Aspects of the disclosure are directed to detecting interactions with signals, such as by an attacker attempting to gain access to a vehicle. Signal waveforms used for authentication are evaluated, for communications between respective circuits. Possible interaction by a third circuit is analyzed by detecting variations in characteristics of a leading portion of a data symbol relative to known characteristics of the leading portion of the data signal. A condition indicative of whether the signal waveform has been interacted with and retransmitted is determined, based on the detected variations. For instance, if the variations are indicative of a known type of variation induced by interaction and retransmission, such interaction and transmission can be detected. Where the determined condition is not deemed an attack, an output signal that provides vehicle access is generated based on the determined condition. |
| US09613474B2 |
Wireless communication apparatus, authentication apparatus, wireless communication method and authentication method
According to one embodiment, when a control unit is notified of information in at least one second signal received by one of first and second wireless communication units after the control unit provides the second wireless communication unit with a command to transmit a first signal containing first address information and before a waiting time elapses and when the at least one second signal contains second address information assigned to an authentication apparatus having received the first signal, then the control unit provides the first wireless communication unit with a command to transmit a third signal for a connection request with the second address information set in a destination address. |
| US09613472B2 |
System and method for data collection and messaging
A system for diagnosing vehicle problems that may include a client device and central device. The client device may include a connector to connect to a vehicle and a vehicle interface to send and receive information from the vehicle. The client may also include an input/output system, a processor, and a communication system to communicate with the central device. The client device may capture a vehicle identification number (VIN) and may transmit the captured VIN along with geographic information to the central device. In response to received instructions from the central device, the client device may passively capture diagnostic information from the vehicle and transmit the diagnostic information to the central device. In response to the diagnostic information, the central device may transmit further instructions to the client device. |
| US09613470B2 |
Systems and methods for forecasting travel delays
Various embodiments of the present invention are directed to a fleet management computer system configured for forecasting travel delays within a geographic area. According to various embodiments, the fleet management computer system is configured to assess operational data, including vehicle telematics data. In various embodiments, the fleet management computer system is further configured to determine, based on the operational data, a value indicative of the average amount of travel delay time per unit of distance within the geographic area, such as the average amount of idle time second per mile of travel with the geographic area. |
| US09613467B2 |
Method of updating and configuring a scan tool
A software and method for updating a scan tool with limited memory are provided. An available diagnostic software database is located remotely from the scan tool. The diagnostic software database is vastly larger than the available memory on the scan tool. The technician can access the database and download the software modules he needs based on the vehicle or vehicles he is servicing and the available scan tool memory. |
| US09613466B1 |
Systems and methods for driver improvement
Disclosed are systems and methods for driver performance assessment and improvement. The systems and methods may be: active for warning purposes only; passive for monitoring purposes only; and active and passive. Any of the foregoing system and methods may be cooperative as well. |
| US09613458B2 |
Self drawing tool for a computer-implemented automated design, modeling and manufacturing system
A method and system for automatically generating a co-ordination drawing of a project is disclosed. In one embodiment, a method includes inputting parametric information, and accessing a file associated with a schematic drawing of a project and identifying a plurality of elements in the schematic drawing from the file. The method further includes obtaining geometrical and connectivity information associated with each of the plurality of elements by analyzing each of the plurality of elements. Additionally, the method includes selecting one or more predefined objects from a spatial database based on the geometrical and connectivity information associated with each of the plurality of elements and the inputted parametric information. The method further includes automatically generating a co-ordination drawing of the project using the one or more predefined objects, wherein the co-ordination drawing provides routing information of the plurality of elements in the project. |
| US09613449B2 |
Method and apparatus for simulating stiff stacks
A computer implemented method of simulating a stack of objects represented as data within memory of a computer system is disclosed. The method comprises modeling the stack within a computer simulation as a set of associated primitives with associated constraints thereto in the memory, wherein the stack comprises a plurality of layers and wherein each layer comprises at least one primitive. The method further comprises estimating a height for each of the primitives in the stack and determining a respective scaling factor for each of the primitives in parallel, wherein each scaling factor is operable to adjust a mass value of each of the primitives. Also, the method comprises scaling a mass value of each of the primitives in accordance with a respective scaling factor in parallel. Finally, the method comprises solving over a plurality of constraints iteratively using a scaled mass value for each of the primitives. |
| US09613444B2 |
Information input display device and information input display method
An information input/display device including: a sensor detecting contact and outputting contact positions; a display unit displaying video signals each corresponding to one screen; a first drawing unit generating first video signals each corresponding to one screen, when displayed, that includes an image of a drawing of a continuous line formed by the contact positions; a second drawing unit generating second video signals each corresponding to an image of the drawing of the continuous line, the second drawing unit generating images of the drawing of the continuous line at a higher speed than the first drawing unit; and an adding unit adding each of the second video signals to a corresponding one of the first video signals. Images of the drawing of the continuous line generated by at least one of the first drawing unit and the second drawing unit change as time elapses in drawing processing. |