| Document | Document Title |
|---|---|
| US09590880B2 |
Dynamic collection analysis and reporting of telemetry data
Technologies are generally described for collecting, analyzing and reporting telemetry data. A telemetry engine is built into a client application installed on a client device, and the telemetry engine is configured to collect and analyze application data at the client device and report the analyzed data to a service provider associated with the application. The telemetry application includes a specialized set of components, such as a telemetry transport component configured to communicate with the service provider, a data collection module configured to retrieve data from the application, and a rule manager and analyzer configured to analyze collected data according to a set of data collection rules provided by the service provider. The telemetry engine enables collection and analysis of telemetry data from multiple distributed client devices. The client devices dynamically change over time to ensure that current and important information is reported to the service provider. |
| US09590876B2 |
Centralized dashboard for monitoring and controlling various application specific network components across data centers
A computer implemented method for monitoring and controlling a one or more networking components in a one or more datacenters is provided. The computer implemented method includes (i) receiving, at a monitoring module, a performance data from each of the one or more networking components, (ii) storing, at a database, the performance data received from each of the one or more networking components, (iii) displaying, using a dashboard module, a dashboard that includes (a) a first traffic level managed by a first datacenter, and (b) a second traffic level managed by a second datacenter, (iv) receiving a first input includes a modification of at least one of the first traffic level and the second traffic level displayed in the dashboard, and (v) configuring, at a traffic management module, the one or more networking components in the first datacenter and the second datacenter based on the first input. |
| US09590875B2 |
Content delivery infrastructure with non-intentional feedback parameter provisioning
A shared resource system, method of managing shared resources and services and a computer program product therefor. Service provider computers (e.g., cloud computers) including a resource management system, selectively make resource capacity available to networked client devices. Stored resource configuration parameters are collected from non-intentional haptic input to mobile client devices. The resource management system provisions resources for mobile clients based on resource configuration parameters. Non-intentional haptic input is provided as non-intentional gesture feedback, and evaluated to selectively update stored resource configuration parameters. |
| US09590872B1 |
Automated cloud IT services delivery solution model
A system, apparatus, method, and computer program product that provide a flexible and modular cloud IT service delivery solution model. The apparatus comprises a processor and computer-readable program code that defines a plurality of common capabilities that comprise operations. Those operations are configured to be invoked by a plurality of different processes on a plurality of different containers, and the plurality of common capabilities comprise a service delivery solution when invoked by a process from among the plurality of different processes. Further, the is processor configured to execute the computer-readable program code and to invoke the plurality of common capabilities with each of the plurality of different processes on the plurality of different containers. Accordingly, the apparatus may utilize different containers interchangeably in a plurality of different service delivery solutions and may expand and contract each of the plurality of different service delivery solutions by invoking greater or fewer processes on greater or fewer containers. |
| US09590871B2 |
Layered request processing in a content delivery network (CDN)
In a content delivery network (CDN a method includes: receiving a request for a CDN service of a particular type, wherein a CDN service of said particular type defines a fixed number of configurable layers of request processing, sequentially from a first layer to a last layer; and processing said request, starting at said first layer, said processing being based on a modifiable runtime environment, said processing continuing conditionally through each of said layers in turn until either said request is terminated by one of said layers or said last layer processes said request. The CDN service may be selected from: delivery services, collector services, reducer services, rendezvous services, configuration services, and control services. |
| US09590868B2 |
Framework supporting content delivery with hybrid content delivery services
A framework supporting content delivery includes a plurality of devices, each device configured to run at least one content delivery (CD) service of a plurality of CD services. The plurality of CD services include hybrid CD services. |
| US09590867B2 |
Framework supporting content delivery with collector services network
A framework supporting content delivery includes a plurality of devices, each device configured to run at least one content delivery (CD) service of a plurality of CD services. The plurality of CD services include collector services forming one or more collector service networks. |
| US09590865B2 |
Control device and communication device
A control device is a control device that manages a network including a plurality of communication devices. The control device includes: a mode transition unit that makes transition to a leave mode for disconnecting a communication device from the network; an initialization-reset transmitting unit that transmits, when a notification is accepted from at least one communication device of the plurality of communication devices during the leave mode, an instruction for setting a flag and a reset order to the communication device from which the notification is accepted, the flag defining to bring the communication device back to an initial state; and a deleting unit that determines whether or not the instruction for setting the flag and the reset order are received and that deletes information about the communication device connected to the network when it is determined that the instruction for setting the flag and the reset order are received. |
| US09590862B2 |
Group management and graphical user interface for associated electronic devices
Methods and systems are provided for managing a group of portable communication devices. In accordance with one implementation, a computer-implemented method is provided for managing a group of portable communication devices on an individual basis or an aggregate basis, the method comprising the steps of providing a list of the portable communication devices in the group, selecting a target portable communication device, determining the location of the target portable communication device, and presenting the location of the target portable communication device. The method may further comprise the step of determining whether the group has sufficient credit for acquiring the location of the portable communication devices in the group. |
| US09590861B2 |
Communication endpoint call log notification
A communication processor receives a call request to establish a communication session from a first communication endpoint to a second communication endpoint. The communication processor changes the intent of the call request. For example, the call request can be changed by automatically forwarding the call request, automatically forking the call request, automatically rejecting the call request based on the second communication endpoint being busy, and/or changing a first type of medium of the communication session to a second type of medium of the communication session. A call log manager conveys status information regarding the changed intent of the call to a call log of the second communication endpoint based on changing the intent of the call request. |
| US09590860B2 |
Fiber optic network design method
A computer-implemented method and system for designing a fiber optic network for a plurality of premises in a geographic area that has existing infrastructure. The system includes an input module arranged to electronically receive design outputs comprising geographic locations of nodes in the fiber optic network and arcs extending between the nodes, relative to at least elements of existing infrastructure used as geographic locations for the nodes and the arcs, the elements of the existing infrastructure being associated with characterizing data that characterizes the elements of existing infrastructure; the input module is further arranged to electronically receive validation data corresponding to the elements of the existing infrastructure, the validation data being indicative of validity of the characterizing data. The system includes an optimizer arranged to electronically generate new design outputs by optimizing geographic locations of the nodes and the arcs in the fiber optic network. |
| US09590850B2 |
Discovery of connectivity and compatibility in a communication network
In one embodiment, a method includes receiving at a node in a first network, information identifying a spare interface between a first network device in the first network and a second network device in a second network, and using the spare interface to create a path in the first network if the spare interface is compatible. The spare interface information includes connectivity and compatibility information. |
| US09590849B2 |
System and method for managing a computing cluster
A method and system for managing a computing cluster including hosting a plurality of machines in a networked computing cluster, wherein the plurality of machines include service instances running on hosts, where the services have configured machine state; and wherein machine state includes configuration data and software of the machine; integrating the plurality of machines of the cluster with at least one configuration controller component; and the at least one configuration controller component, altering the machine state of at least one service instance. |
| US09590845B1 |
Inter-area LDP node protection
Techniques are described for providing fast reroute inter-area node protection for label switched paths (LSPs) using label distribution protocol (LDP). In one example, a network device may be configured to determine that a protected node is an area border router, and use network topology information, obtained by an Interior Gateway Protocol (IGP) executing on the network device, to identify a second area border router in the same IGP area as the protected node, to which to automatically establish a bypass LSP and a targeted LDP session. |
| US09590842B2 |
Method and node for service to occupy protected resource in shared protection
Disclosed are a method and node for a service to occupy protection resources in shared protection, including: when receiving a command or service state information, a node responding to the command or service state and allocating protection resources to a corresponding service in accordance with a priority order of a first-level manual command, a service signal failure, a service signal degradation and a second-level manual command. By integrating priorities of the manual command and the service state, the embodiments of the present document formulate a set of unified priority rules, reducing the information stored on nodes in a mesh network, and simplifying the processing procedure of the mesh network. |
| US09590837B2 |
Interaction of user devices and servers in an environment
In an environment where video display devices are available for simultaneous viewing, servers provide audio streams to user devices for listening. People may, thus, listen to the audio streams through their user devices while watching the video display devices. An application on the user devices determines which audio streams are available, and the servers may indicate which audio streams are available. The application sends a request to a server to transmit a selected audio stream. The server transmits the selected audio stream, e.g. over a wireless network in the environment. A variety of additional features are enabled by the interaction of the application and the servers. |
| US09590833B2 |
Reception of 2-subcarriers coherent orthogonal frequency division multiplexed signals
A dual-polarization, 2-subcarriers code orthogonal, orthogonal frequency division multiplexed signal carrying information bits is transmitted in an optical communication network without transmitting a corresponding pilot tone or training sequence. A receiver receives the transmitted signal and recovers information bits using a blind equalization technique and by equalizing the 2-subcarriers OFDM signal as a 9-QAM signal in time domain with a CMMA (constant multi modulus algorithm) equalization method. |
| US09590832B1 |
Sub-carrier adaptation in multi-carrier communication systems
Methods an apparatus for performing sub-carrier adaptation in multi-carrier communication systems. In one embodiment, a method includes receiving, via a reverse communication channel, a first data unit via multiple subcarriers. The method further includes determining an estimate of a forward communication channel based on the received first data unit. The method further includes determining different bit rates for the multiple subcarriers based on the estimate of the forward channel. The method further includes transmitting a second data unit via the multiple subcarriers, where bits in the second data unit are allocated across the multiple subcarriers based on the determined bit rates for the multiple subcarriers. |
| US09590823B2 |
Flow to port affinity management for link aggregation in a fabric switch
Implementations of the present disclosure involve an apparatus, device, component, and/or method for a hardware efficient flow to port affinity management table for link aggregation for a network fabric switch with Ethernet Gateway functionality. Rather than maintaining a state per traffic flow list, the present disclosure utilizes a handle or hash value derived from the traffic flow and associates an output port state to the hash value. The output port state for the hash value is further associated with a portlist that is based on at least a traffic flow policy of the server or group of servers associated with the traffic flow. In addition, the management table may be adjusted based on state changes to one or more of the output ports such that, if a port becomes unavailable, the management table may be adjusted to account for the unavailability of the port. |
| US09590815B2 |
Relay system and switching device
A first redundancy device and a second redundancy device connected to the first redundancy device are provided. A third switching device has a first link with a first port group of the first switching device and has no link with the second switching device. A fourth switching device has a second link with a first port group of the second switching device and has no link with the first switching device. Here, a communication between the first redundancy device and the second redundancy device is performed through the first link when the first link has no fault, and the communication is performed through the second link when the first link has a fault and the second link has no fault. |
| US09590814B2 |
Method and apparatus for transport of dynamic adaptive streaming over HTTP (DASH) initialization segment description fragments as user service description fragments
A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus establishes a file delivery session with a server in a broadcast network for system information. The apparatus also receives a plurality of metadata fragments in the file delivery session. The plurality of metadata fragments including at least one initialization segment description fragment, wherein the at least one initialization segment description fragment is associated with at least one media segment transmitted in another file delivery session. |
| US09590812B2 |
Method and device for charging local traffic on wireless side
The embodiment of the present document discloses a method and apparatus for charging local traffic on a wireless side, which relate to the communication field. The method comprises: a wireless-side network element collecting data traffic and a corresponding IP address of user equipment (UE), searching for UE identification information matching the IP address, and updating the data traffic to a charging data record (CDR) of the corresponding UE, and sending to a charging gateway (CG). The embodiment of the present document can support charging on a wireless access side. |
| US09590808B2 |
Obfuscated passwords
A method for obfuscating an electronic password can include receiving at least a first symbol of a first password, wherein the first password has a plurality of symbols. Next, a second password (the obfuscated password) can be generated, the second password being derived from the first password using an obfuscation rule, wherein the second password includes the symbols of the first password and at least one obfuscating symbol generated from a first symbol of the first password (generating symbol) and the obfuscation rule. It can then be determined whether to provide a feedback indicator. A feedback indicator can be provided, in response to determining to provide the feedback indicator, wherein the feedback indicator corresponds with an instruction to enter an obfuscating symbol according to the obfuscating rule, the obfuscating symbol being from the second password. Finally, access can be granted to a session in response to receiving the second password. |
| US09590805B1 |
Ladder-based cryptographic techniques using pre-computed points
A method includes receiving a first input value and a second input value, and obtaining a set of pre-computed values, wherein each pre-computed value is computed as the first input value multiplied by a given multiple in a set of multiples comprising powers of 2. A cryptographic process is performed to generate a cryptographic value based on the first and second input values, and one or more of the pre-computed values, wherein the cryptographic value that is generated is usable to generate a secure message or digital signature. The cryptographic process includes performing an iterative scalar multiplication process in which each step of the iterative scalar multiplication process is performed using a single point add operation to multiply a bit of the second input value with one of the pre-computed values in the set of pre-computed values. |
| US09590794B2 |
Enhancing isolation and impedance matching in hybrid-based cancellation networks and duplexers
Multi-port hybrid-based cancellation networks may be used to enable simultaneous transmit and receive in one or more co-existent communication systems. A multi-port hybrid-based cancellation network may include a first and second quadrature hybrid, a first and second two-port network, and other circuitry components. The second quadrature hybrid may be distinct from the first quadrature hybrid. The first two-port network may include a first filter or a first amplifier connected between the first and the second quadrature hybrids. The second two-port network may include a second filter or a second amplifier that is distinct from but essentially the same as the first filter or the first amplifier connected between the first and the second quadrature hybrids. The other circuitry components may be connected between or connected to a connection between one of the quadrature hybrids and one of the two-port networks. These other circuitry components may have a configuration that minimizes signal return loss at least one of the ports of the multi-port hybrid-based cancellation network. They may in addition or instead have a configuration that maximizes signal isolation between at least two of the ports of the multi-port hybrid-based cancellation network. |
| US09590793B2 |
Apparatus and method for signal aggregation in an information handling system
An information handling system includes a first subsystem having a first data module configured to provide a first signal, a second data module configured to provide a second signal, the first signal and the second signal are different types of signals, and a first aggregator unit coupled to the first data module and the second data module, and a second subsystem coupled to the first aggregator unit via a first aggregated signal line. The first aggregator unit receives the first signal from the first data module and the second signal from the second data module, aggregates, based upon a first aggregation algorithm, the first and second signals to create a first aggregated signal. The first aggregation algorithm aggregates the first signal and the second signal based on a specific type of each signal and provides the first aggregated signal to the second subsystem via the first aggregated signal line. |
| US09590791B2 |
Uplink transmission for carrier aggregation via multiple nodes
Uplink control channel management is disclosed in which a user equipment receives a configuration for multiple uplink control channels for transmission to multiple nodes in multiflow communication with the UE. The UE generates the uplink control channels based on the configuration, wherein each of the uplink control channels is generated for a corresponding one of the nodes. The UE then transmits each of the uplink control channels to the corresponding node. For UEs capable of multiple uplink transmissions, in which the UE communicates with at least one of the nodes over multiple component carriers (CCs), the configuration may designate with of the multiple CCs the UE should transmit the uplink control channel for that node. For UEs capable of only single uplink transmissions, the configuration may designate the transmission of the uplink control channels in either frequency division multiplex (FDM) or time division multiplex (TDM) schemes. |
| US09590790B2 |
Optimizing throughput of data frames in orthogonal frequency division multiplexing (OFDM) communication networks
In one embodiment, a device maintains a predetermined number of high-priority subcarriers for use in communicating high-priority data frames and a predetermined number of low-priority subcarriers for use in communicating low-priority data frames. A data frame is received and a data frame priority is determined for the data frame. If the data frame is determined to be a low-priority data frame, a minimum number of subcarriers, from the low-priority subcarriers, required for communication of the data frame is determined and the data frame is communicated using the minimum number of subcarriers. If the data frame is determined to be a high-priority data frame, a maximum number of subcarriers available, including the high-priority subcarriers and the low-priority subcarriers, is determined and the data frame is communicated using the maximum number of subcarriers. |
| US09590789B2 |
Techniques for reducing communication errors in a wireless communication system
A technique for operating a wireless communication device includes transmitting a scheduling request from the wireless communication device and receiving, following the scheduling request, an uplink grant that assigns an uplink channel to the wireless communication device. A time period between the scheduling request and the uplink grant is determined. Only channel quality information is transmitted in the uplink channel when the uplink grant requests the channel quality information and the time period is less than a predetermined time period. |
| US09590788B2 |
Method and apparatus for feeding back information, and terminal
A method for feeding back information includes: measuring a CQI of a link between each coordinated transmitting node in a coordinated transmitting node set and a terminal; using the CQI of and an RI value corresponding to the link between each coordinated transmitting node and the terminal as parameters of a spectral efficiency calculation function, and obtaining a spectral efficiency value corresponding to the link between each coordinated transmitting node and the terminal; when a value of the selection criterion function is less than or equal to a preconfigured comparison threshold value, selecting a corresponding coordinated transmitting node as a preferred coordinated transmitting node; and sending information of the preferred coordinated transmitting node to a transmitting end for selection. This may reduce uplink feedback overheads and enable the transmitting end to quickly determine the preferred coordinated transmitting node. |
| US09590784B2 |
Method and device for controlling the transception of multiple pieces of control information in a wireless communication system
The present invention relates to a method and device for dynamically controlling the multiple transmission of control information in a wireless communication system. The method for controlling the transception of multiple physical uplink control channels (PUCCHs) in a wireless communication system comprises: a base station transmitting instruction information, which controls the transmission of multiple PUCCHs, to a user terminal that performs the transmission of multiple PUCCHs through either a physical downlink control channel (PDCCH), a medium access control (MAC) layer, or radio resource control (RRC) signaling; and receiving multiple PUCCHs from said user terminal according to a multiple transmission instruction in said instruction information. Said instruction information transmitted through said physical channel is characterized by being either a field corresponding to 1- or 2-bit information constituting a physical downlink control channel (PDCCH) signal, or a field constituting a PDCCH signal scrambled using a PUCCH cell radio network temporary identifier (C-RNTI). |
| US09590780B2 |
Method and apparatus for transmitting and receiving downlink signals in wireless communication systems
The present invention relates to a method for a base station to transmit a downlink signal in a wireless communication system, including the step of transmitting information related to a downlink subframe, wherein the information related to the downlink subframe is a subframe set for uplink transmission. |
| US09590779B2 |
Modulation and equalization in an orthonormal time-frequency shifting communications system
A system and method of providing a modulated signal useable in a signal transmission system. The method includes transforming, perhaps with respect to both time and frequency, a data frame including a plurality of data elements into a transformed data matrix. The transformed data matrix includes a plurality of transformed data elements where each of the plurality of transformed data elements is based upon each of the plurality of data elements. The method further includes generating the modulated signal in accordance with the transformed data elements of the transformed data matrix. |
| US09590776B2 |
Method, system and device for calibrating deviation among multiple access points
The embodiment of the present invention discloses a method, a system and an apparatus for calibrating deviation among multiple access points, which are used for solving a problem that information received by a user equipment (UE) is not synchronous, caused when different access points send data to the UE at the same time, and improving system performance and frequency spectrum efficiency. The method for calibrating deviation among multiple access points comprises the following steps: in step A: a base station sending to a UE a message instructing the UE to perform measurement and return deviation calibration information among the multiple access points (S101); and in step B: the base station calibrating the deviation among the multiple access points based on the deviation calibration information among the multiple access points returned by the UE (S102). |
| US09590765B2 |
Methods and apparatus to improve performance and enable fast decoding of transmissions with multiple code blocks
Resource elements from multiple code blocks are separated into different groups, and the code bits of the resource elements within each group are decoded without waiting for a completed reception of a transport block to start decoding. Coded bits from multiple code blocks are similarly separated into different groups, and code blocks containing coded bits within each group are decoded. A first CRC is attached to the transport block and a second CRC is attached to at least one code block from the transport block. An improved channel interleaver maps coded bits of different code blocks to modulation symbols, and maps modulation symbols to time, frequency, and spatial resources, to make sure each code block receives approximately the same level of protection. |
| US09590762B2 |
Concurrent on-channel servicing of wireless client traffic and off-channel pre-scanning for radar in a wireless access point
An access point (AP) includes a transceiver to service wireless client traffic on wireless channels within a channel bandwidth. The AP services wireless client traffic in a first channel bandwidth and sets a receiver bandwidth to include the first channel bandwidth and a second channel bandwidth initially not available for servicing wireless client traffic. Concurrent with servicing the wireless client traffic in the first channel bandwidth, the AP searches the second channel bandwidth for any interference signal. If no interference signal is found in the second channel bandwidth, the AP declares the second channel bandwidth free of interference. |
| US09590761B2 |
Detective passive RF components using radio frequency identification tags
Systems and methods are provided for automatically detecting passive components in communications systems using radio frequency identification (“RFID”) tags. A coupling circuit is provided in a system between a communications network and an RFID tag. The RFID tag is associated with a passive element of a distributed antenna system (“DAS”). The coupling circuit can allow an RFID signal received from an RFID transmitter over the communications network to be transported to the RFID tag. The coupling circuit can substantially prevent mobile communication signals on the communications network from being transported to the RFID tag. |
| US09590758B2 |
Transmitting apparatus and mapping method thereof
A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. |
| US09590756B2 |
Mapping a plurality of signals to generate a combined signal comprising a higher data rate than a data rate associated with the plurality of signals
Various aspects provide for mapping a plurality of signals to generate a combined signal. An aggregation component is configured for generating a combined signal that comprises a higher data rate than a data rate associated with a plurality of signals based on mapped data associated with the plurality of signals. The aggregation component comprises a mapper component. The mapper component is configured for generating the mapped data based on a mapping distribution pattern associated with a generic mapping procedure. In an aspect, a de-aggregation component is configured for recovering the plurality of signals from a pseudo signal transmitted at a data rate of the combined signal. In another aspect, the de-aggregation component comprises a de-mapper component configured for de-mapping the mapped data based on the mapping distribution pattern associated with the generic mapping procedure. |
| US09590755B2 |
Efficient apparatus and method for audio signature generation using audio threshold
An automatic content recognition system that includes a user device for the purpose of capturing audio and generating an audio signature. The user device may be a smartphone or tablet. The system is also capable of determining sound level at a user device and refraining from audio monitoring and/or generating audio signatures when the sound level is below a threshold. Sound level may also be used to reduce the frequency of audio monitoring and/or signature generation. The system may have a database within the user device or the user device may communicate with a server having a database that contains reference audio signatures. |
| US09590750B2 |
Fading simulator and method of producing fading signal
According to one embodiment, a fading simulator which conducts a fading test on a mobile communications terminal configured to receive radio signals containing respective baseband signals, includes reception modules which receive the radio signals, convert frequencies of the radio signals, and extract the baseband signals from the radio signals, respectively, reproduction processing modules which perform reproduction processing on the baseband signals extracted by the reception modules, respectively, to produce new baseband signals, a fading arithmetic module which perform fading processing on the new baseband signals produced by the reproduction processing modules individually to produce fading signals, and transmission modules which convert the fading signals produced by the fading arithmetic module into radio signals, respectively, and output the radio signals as test signals to the mobile communications terminal. |
| US09590744B2 |
Method and apparatus for beamforming
An example method of tactical communication is provided. The method includes receiving information indicating a tactical situation associated with a target area. The tactical situation is one of a missile in-flight, an eavesdropper, a signal jammer, and a transceiver located in a zone of interest. The method further includes performing a beamforming process including instructing transmission of a plurality of signaling beams from one or more transmitters toward the target area. The tactical situation may be associated with a foe and the plurality of signaling beams generate interference inhibiting communication with by the foe. The tactical situation may be associated with a friend and the plurality of signaling beams generate decodable signal for enhancing communication with the friend. |
| US09590735B2 |
Scalable optical broadcast interconnect
A modular interconnect includes an mn-by-mn fully connected, direct broadcast, point-to-point, all-to-all interconnect fabric, wherein the mn-by-mn fully connected, direct broadcast, point-to-point, all-to-all interconnect fabric is non-blocking and congestion free, and wherein m is an integer≧2 and n is an integer≧2. Operating the modular interconnect includes distributing each of mn inputs to each and every one of mn outputs. |
| US09590733B2 |
Location tracking using fiber optic array cables and related systems and methods
Fiber optic array cables and related systems and methods to determine and/or track locations of objects are disclosed. The fiber optic array cables can be employed in an optical-fiber-based communication system, including a centralized optical-fiber based communication system. In one embodiment, the fiber optic array cable is configured to carry optical RF or radio-over-fiber (RoF) signals to establish communications with objects. The fiber optic array cable includes multiple reference units along the length of the cable. The reference units can be configured to convert received optical RF signals into electrical RF signals to establish RF communications with objects capable of receiving electrical RF signals. The reference units are also configured to convert received electrical RF signals from the objects into optical RF signals, which are then used to determine the location of the object. Having the availability of the multiple reference units on one or more the fiber optic array cables can provide enhanced reliability in tracking objects. |
| US09590731B2 |
Signal equalizer in a coherent optical receiver
A signal equalizer for compensating impairments of an optical signal received through a link of a high speed optical communications network. At least one set of compensation vectors are computed for compensating at least two distinct types of impairments. A frequency domain processor is coupled to receive respective raw multi-bit in-phase (I) and quadrature (Q) sample streams of each received polarization of the optical signal. The frequency domain processor operates to digitally process the multi-bit sample streams, using the compensation vectors, to generate multi-bit estimates of symbols modulated onto each transmitted polarization of the optical signal. The frequency domain processor exhibits respective different responses to each one of the at least two distinct types of impairments. |
| US09590730B2 |
Optical transmitter with optical receiver-specific dispersion pre-compensation
An apparatus comprising a digital signal processor (DSP) unit configured to perform fiber dispersion pre-compensation on a digital signal sequence based on a dispersion value to produce a pre-compensated signal, wherein the dispersion value is associated with a remote optical receiver, a plurality of digital-to-analog converters (DACs) coupled to the DSP unit and configured to convert the pre-compensated signal into analog electrical signals, and a frontend coupled to the DACs and configured to convert the analog electrical signals into a first optical signal, adding a constant optical electric (E)-field to the first optical signal to produce a second optical signal, and transmit the second optical signal to the remote optical receiver. |
| US09590729B2 |
Visible light communication system
A controller is configured, by decreasing light quantity in only a first slot that is any one of a plurality of slots into which a unit time is divided equally, and increasing light quantity in all the remaining slots except the first slot of the plurality of slots, to assign information to the first slot of the plurality of slots. The controller is furthermore configured to decrease light quantity in second slots that are three or more continuous slots starting from a head of a preamble, which indicates a frame start point, of a frame of an optical-communication signal and to increase light quantity in a slot immediately before the preamble. |
| US09590728B2 |
Integrated photogrammetric light communications positioning and inertial navigation system positioning
A mobile device includes an inertial navigation system (INS) to measure inertial quantities associated with movement of the device, and estimate a kinematic state associated with the movement based on the measured inertial quantities. The device includes a light receiver to record light beams originating from lights at respective image positions in a sequence of images. The device photogrammetrically determines its position relative to the originating lights based on predetermined real-world positions and corresponding image positions of the lights. The device corrects the estimated kinematic state based on the photogrammetrically determined position, to produce a corrected estimated kinematic state. |
| US09590726B2 |
Monitoring energy consumption in optical access networks
An optical access network comprises optical network units connected to a node. A monitoring unit determines information indicative of energy consumption at the optical network unit over a period of time. An optical network unit can operate in operating states/modes which differ in their energy consumption. Monitoring unit can determine the information by determining a time that an optical network unit spends in the different operating states/modes. Monitoring unit can use a state machine at the node which represents the optical network unit. An optical network unit can locally record time spent in states/modes and forward this to the monitoring unit. An optical network unit can locally monitor energy consumption and forward this to the monitoring unit. An operational parameters of the access network can be modified based on the information determined by the monitoring unit. |
| US09590725B2 |
Multi-failure resolution optical node, optical communication system using same, and wavelength path switching method
A multi-failure resolution optical node includes an operating system wavelength path and two or more standby system wavelength paths which are assigned to the operating system wavelength path and have been assigned a ranking. It further includes a node control unit that can separately operate the operating system wavelength path and the standby system wavelength paths in a normal power consumption mode or a reduced power consumption mode. Thus, it is possible to provide an optical node with which power consumption is reduced and with which switching to a standby system wavelength path can be performed quickly in response to a failure in the operating system wavelength path. |
| US09590717B2 |
Signal receiving method and electronic device
An electronic device including a first transceiver configured to process a first carrier, a second transceiver configured to process a second carrier, a switch, a baseband processor configured to process a first baseband signal and a second baseband signal, which are processed respectively by the first transceiver and the second transceiver, an antenna connected through the switch in association with some of a plurality of reception paths with respect to the first carrier, and a reception path configured to provide the second transceiver with the first carrier received via the antenna connected through the switch to the second transceiver. |
| US09590714B2 |
Method and apparatus for PCI signaling design
Apparatus and method for wireless communication in a wireless communication network includes mapping a PCI command to different symbols across a plurality of slots, allocating the PCI command to the plurality of slots, and transmitting the PCI command across the plurality of slots on an Fractional Transmit Precoding Information Channel (F-TPICH) from a network device to a user equipment (UE). |
| US09590709B2 |
Methods, apparatuses, and computer-readable storage media for performing multidimensional beamforming
Methods, apparatuses and computer-readable storage media perform phasing of a first array including one or more antenna elements and phasing of a second array including one or more antenna elements to provide a combined radiation pattern for the first and second arrays, the first array having a first radiation pattern and the second array having a second radiation pattern, wherein the first radiation pattern is substantially orthogonal to the second radiation pattern. The combined radiation pattern is controlled in a first dimension based upon an uplink channel measurement. The combined radiation pattern is controlled in a second dimension based upon a precoding feedback from a user equipment (UE). |
| US09590706B1 |
Method and apparatus for equal energy codebooks for antenna arrays with mutual coupling
A method and apparatus provide equal energy codebooks for antenna arrays with mutual coupling. A plurality of precoders can be received from a codebook in a transmitter having an antenna array. Each precoder of the plurality of precoders can be transformed using a transformation that maps each precoder to equal radiated power to generate transformed precoders. A transformation matrix for the transformation can be a matrix with column vectors equal to the eigenvectors of a Hermitian and non-negative definite matrix multiplied by a diagonal matrix with the value of each diagonal element equal to the inverse of the positive square root of the eigenvalue of the corresponding eigenvector. A signal can be received for transmission. A transformed precoder of the plurality of transformed precoders can be applied to the signal to generate a precoded signal for transmission over a physical channel. The precoded signal can be transmitted. |
| US09590705B2 |
Method and device for transmitting and receiving channel state information in wireless communication system
The present invention relates to a wireless communication system. A method by which a user equipment reports a channel state information (CSI) in a wireless communication system, according to one embodiment of the present invention, can comprise the steps of: setting up a first CSI process in which a subframe pattern for a first subframe set, which uses an almost blank subframe (ABS), and a second subframe set, which does not use the ABS, is set; setting up a second CSI process in which the subframe pattern is not set; setting a second rank indicator (RI) of the second CSI process to be the same as a first RI corresponding to the second subframe set when the second CSI process is established so as to have the same RI as the first CSI process; and transmitting the CSI on the basis of the first CSI process and/or the second CSI process. |
| US09590702B2 |
Short range wireless communication using scattering from single wire transmission line
The various embodiments herein provide a system and method for providing short range wireless communication. The system comprises a transmitting end, a first electrical circuitry provided at the transmitting end to generate a propagating EM wave on a connected wire according to an input data signal, a transmitting antenna provided at the transmitting end designed to maximize scattering of the propagating EM wave, a receiving end, a receiving antenna provided at the receiving end to detect the scattered EM wave and a second electrical circuitry provided at the receiving end to recover the input data signal from the signal received by the receiving antenna. Here a wireless link is established by means of the scattered EM waves generated by near field emissions from a surface of the transmitting antenna. |
| US09590697B2 |
Device environment determination
Embodiments include systems of and methods for an electronic device having a radio communication processor connected to one or more transmission antennas, wherein each of the one or more transmission antennas are configured to transmit a signal; a receiving antenna connected to the radio communication processor and configured to receive the signal transmitted from the one or more transmission antennas; an attenuation measuring device configured to measure attenuation of the transmitted signal based on the signal received by the receiving antenna; and a controller configured by circuitry to determine a surrounding air or water environment of the electronic device based on the measured attenuation. |
| US09590694B2 |
Configurable audio transmitter circuitry
Audio transmitter circuitry is disclosed that is configurable into different modes by the user, and can output either a differential or single-ended audio signal on two signal wires. Depending on the mode, the transmitter deals with noise on the signal wires by adjusting the input resistance that such noise sees looking into the transmitter. If the transmitter is configured in a differential mode, the input resistance looking back into the transmitter from the perspective of the noise on both signal wires is relatively high. If the transmitter is configured in a single ended mode, the input resistance of noise looking back from the active signal wire into the transmitter is relatively low, to in effect ground such noise back into the transmitter, without significantly presenting such noise to the receiver. |
| US09590691B2 |
Breaking up symbols for spectral widening
A technique for spectral widening in a communication system may divide respective symbols of a block of symbols into symbol pieces of shorter duration than a symbol. The symbol pieces may be scrambled. The resulting scrambled symbol pieces may optionally be further spread using direct-sequence spreading prior to transmission. Error-control coding may also be used prior to dividing the symbols into symbol pieces and scrambling the symbol pieces. Additionally, the number of symbol pieces per symbol may be adjustable, based on channel characteristics, performance, or both. |
| US09590690B2 |
Methods and systems for canceling a blocking signal to obtain a desired signal
Disclosed herein are methods and systems for canceling a blocking signal to obtain a desired signal. An example process includes receiving both a blocking signal and a set of blocking bits corresponding to a demodulation of the blocking signal. A remodulated blocking signal is generated by modulating the received set of blocking bits. The remodulated blocking signal is passed through a blocking-band bandpass filter to generate an estimated blocking signal, and is also passed through a desired-band bandpass filter to generate an unconditioned reference signal. One or more signal-parameter differences between the blocking signal and the estimated blocking signal are identified, and one or more signal compensations are accordingly applied to the unconditioned reference signal to generate a conditioned reference signal, which is then output to a blocking-signal-canceling system. |
| US09590688B2 |
Cascading radio frequency circuits
Cellular processors are cascaded to provide different configurations, which result in higher-capacity base stations, increased numbers of simultaneous users over one frequency band, and/or aggregation of several carriers while still using only one radiofrequency (RF) chipset. The processors are aligned in both time and frequency, with each processor having a data port that allows data exchange with the other processors. The data alignment and exchange allow the processors, in the aggregate, to act as a single unit, resulting in a scalable architecture that can accommodate different system configurations. |
| US09590686B2 |
Maintaining a capacitor dielectric under strain to reduce capacitance variation due to time variant hysterisis effect
A method of pre-stressing the variable capacitor device that experiences a temporary time variant hysteresis effect is provided for electronic circuitry, which may include a mobile communication device. The method includes providing a periodic bias voltage to the variable capacitor such that the variable capacitor is maintained at least at a target stress level such that the capacitance of the variable capacitor when subject to a target bias voltage is predictable due to the time variant hysteresis effect being reduced. |
| US09590681B2 |
Cellular phone mounting assembly
A cellular phone mounting assembly includes a panel that has a front side, a back side, an upper edge, a lower edge, a first side edge and a second side edge. A foot is attached to and extends forward of the lower edge. A shoulder is attached to and extends rearwardly from the upper edge to form an obtuse angle with the panel. A support is attached to and extends downwardly from the shoulder. A clip is removably attached to and extends rearwardly from the support. The clip engages an automobile console. |
| US09590677B2 |
Variable capacitance device and antenna apparatus
A variable capacitance device includes: a first and second terminal for signals; a plural, even number of variable capacitance elements connected in-series between the first and second terminal; a third and fourth terminal for receiving a same voltage; a fifth and sixth terminal for grounding; a plurality of first resistors connected to either the third or fourth terminal on one end; and a plurality of second resistors connected to either the fifth or sixth terminal on one end. With respect to a series of successive nodes beginning with the first terminal and ending with the second terminal, respective other ends of a pair of the first resistors are connected to every other node, and respective other ends of a pair of the second resistors are connected to the remaining every other node, such that the pairs of first and second resistors are alternately connected to the series of successive nodes. |
| US09590666B2 |
Transmit noise and impedance change mitigation in wired communication system
Methods and systems are provided for mitigating noise and/or impedance effects in transmitters. The mitigation comprises, when transmitter is in a non-active mode, decoupling at least a portion of the transmitter and coupling an auxiliary component to a remaining portion of the transmitter. When the transmitter is in an active mode, the auxiliary component is decoupled from the remaining portion of the transmitter, and the at least a portion of the transmitter is coupled to the remaining portion of the transmitter. The auxiliary component comprises one or more of: a resistive element, a capacitive element, and a reactive component. The auxiliary component is configured such that it may achieve a small mismatching error. |
| US09590665B2 |
Apparatus and method for removing noise of power amplifier in mobile communication system
A transmitter in a wireless communication system is provided. The transmitter includes a baseband signal processor for detecting an envelope signal, a supply modulator (SM) for producing power to be supplied to a power amplifier using the detected envelope signal, and the power amplifier for receiving voltage from the SM and for amplifying power of a transmit signal. The SM generates a compensation signal corresponding to switching noise generated via switching amplification, and adds the compensation signal and the switching noise. The amplifier of the wireless communication system can produce low switching noise, and the envelope tracking power amplifier can prevent reception degradation due to the noise of the supply modulator. |
| US09590663B2 |
Radio apparatus
A radio apparatus includes a baseband signal generator to generate a baseband signal; a sine wave substituting device to substitute a transition part of the baseband signal in which a logic level switches from “0” to “1” or “1” to “0” with a sine wave represented with multi-values; and a delta sigma modulator to modulate the signal represented in the multi-values into a binary signal. |
| US09590662B2 |
Integrated antenna and sensor element apparatus for a portable wireless terminal
An apparatus interworking with a metal member used both as an antenna and a sensor element in a portable terminal is disclosed. The apparatus includes the metal member, responsive to a sensed body, and for transmitting and receiving a signal in at least one or more communication service bands, and a main board having a communication module for processing a signal transmitted and received by the metal member and a sensor module for obtaining information in response to the approach of a sensed body. |
| US09590660B2 |
Reconstructive error recovery procedure (ERP) using reserved buffer
According to one embodiment, a method for reading data includes reading a data set repeatedly using different settings until either: a reconstructed data set is sent to a host and/or stored, or a maximum number of rereads has been reached, after each reading of the data set, storing each row to a reserved data buffer that has no errors or errors in the row are correctable using C1-error correction code (ECC) unless a matching row already exists in the reserved data buffer that has fewer corrected errors therein, assembling the data set from the rows stored in the reserved data buffer to form an assembled data set, correcting any remaining errors in the assembled data set using C2-ECC to form the reconstructed data set, and sending the reconstructed data set to the host and/or storing the reconstructed data set. |
| US09590658B1 |
High-speed low-power LDPC decoder design
Decoding an LDPC encoded codeword is disclosed. Variable nodes corresponding to a parity check matrix of the LDPC encoded codeword have been divided into a plurality of groups. A selected group of variable nodes from the plurality of groups of variable nodes is updated. Check nodes are updated using a min-sum update. A selected input value provided from a variable node of the selected group of variable nodes and provided to a certain check node of the check nodes is discarded to be not available for use in a future min-sum update. |
| US09590654B2 |
Signal modulation circuit
Provided is a circuit which can correct an output state in real time and reduce influences of distortion/noise components generated by a delay device. A signal modulation circuit includes a subtractor, an integrator, a phase inverting circuit, a DFF for while inserting a zero level at timing synchronous with the clock signal, delaying and quantizing the signal, a ternary signal generating circuit for generating a ternary signal for selectively driving a load connected to a single power supply into ternary conductive states including a positive current on-state, a negative current on-state, and an off-state, a driver circuit for generating a driving signal for driving a load, and a feedback circuit for feeding back the driving signal from the driver circuit to the input signal. |
| US09590653B2 |
Method and device for use in analog-to-digital conversion
Disclosed herein are embodiments of a precharge sample-and-hold circuit. The circuit has an input terminal, a reference voltage terminal and an output terminal. Further, the circuit has a sampling capacitance coupled between the input terminal and the reference voltage terminal and configured to provide the sample voltage when said sample-and-hold circuit is in a holding mode and a cancellation capacitance. Implementations of a precharge sample-and-hold circuit and of methods to operate a precharge sample-and-hold circuit in an analog/digital converter are also disclosed. |
| US09590651B2 |
Successive comparison type analog/digital converter, physical quantity sensor, electronic device, moving object, and successive comparison type analog/digital conversion method
A successive approximation type AD converter includes a charge redistribution type DA conversion circuit, a comparator, and a control circuit. The charge redistribution type DA conversion circuit is configured such that each of k unit elements connects a switch and a unit capacitance in series and includes a unit capacitor array that is connected to a common output line in parallel and a selector that selects one voltage supplied to one input terminal, through m voltage supply lines, among at least three input terminals of switches included in j unit elements which are the targets for dynamic element matching (DEM) in k unit elements based on the DEM. |
| US09590649B2 |
Analog-to-digital conversion with micro-coded sequencer
A micro-coded sequencer controls complex conversion sequences independent of a central processing unit (CPU). Micro-coding provides for easily adding new process steps and/or updating existing process steps. Such a programmable sequencer in combination with an analog-to-digital conversion module such as an analog-to-digital converter (ADC) or a charge time measurement unit (CTMU), and digital processing circuits may be configured to work independently of the CPU in combination with the micro-coded sequencer. Thereby providing self-sufficient operation in low power modes when the CPU and other high power modules are in a low power sleep mode. Such a peripheral can execute data collection and processing thereof, then wake the CPU only when needed, thereby saving power. Furthermore, this peripheral does not require CPU processing so that time critical applications that do require control by the CPU can operate more efficiently and with less operating overhead burden. |
| US09590643B2 |
Phase error detection in phase lock loop and delay lock loop devices
A device includes a lock detect circuit that is structured and arranged to: convert a reference clock to a reference triangle wave; convert a feedback clock to a feedback triangle wave; determine whether the feedback triangle wave is within a tolerance margin that is defined relative to the reference triangle wave; and generate a determiner output that is a first value when the feedback triangle wave is not within the tolerance margin, and a second value when the feedback triangle wave is within the tolerance margin. |
| US09590641B2 |
Semiconductor apparatus and regulation circuit thereof
A regulation circuit of a semiconductor apparatus includes a control block configured to generate control signals in response to a reference clock signal and a feedback clock signal; and a noise compensation block configured to compensate for a variation in a level of power in response to the control signals. |
| US09590638B2 |
Low power clock source
An ultra-low power clock source includes a compensated oscillator and an uncompensated oscillator coupled by a comparator circuit. In an example, the compensated oscillator is more stable than the uncompensated oscillator with respect to changes in one or more of temperature, voltage, age, or other environmental parameters. The uncompensated oscillator includes a configuration input configured to adjust an operating characteristic of the uncompensated oscillator. In an example, the uncompensated oscillator is adjusted using information from the comparator circuit about a comparison of output signals from the compensated oscillator and the uncompensated oscillator. |
| US09590637B1 |
High-speed programmable frequency divider with 50% output duty cycle
A frequency divider includes a multiplexer having a first input terminal coupled to receive a first value M and a second input terminal for receiving a second value that is M+LSB, the multiplexer is configured to alternately output the first value M and the second value. The frequency divider includes a multi-modulus divider coupled to the multiplexer for receiving the output of the multiplexer, the multi-modulus divider operable to alternately generate an output pulse at M input clock cycles and at M+LSB clock cycles. A divide-by-two counter having an input coupled to the output of the multi-modulus divider, is operable to divide the output of the multi-modulus divider to generate a divided clock signal having a frequency of N, where N is equal to 2M+LSB. Duty cycle correction logic is coupled to the output of the divide-by-two counter and is configured to correct the duty cycle of the divided clock signal to a fifty percent duty cycle when N is odd. |
| US09590635B1 |
Partial reconfiguration of programmable devices
Techniques and mechanisms disclosed herein provide a partial reconfiguration bitstream for a region of configurable logic of a programmable logic device over a communications interface such as the Peripheral Component Interconnect Express (PCIe) protocol. |
| US09590630B2 |
Apparatus for mixed signal interface circuitry and associated methods
An integrated circuit (IC) includes a plurality of pads adapted to send or receive signals, and a plurality of mixed signal interface blocks, each of which is coupled to a corresponding pad in the plurality of pads. Furthermore, each mixed signal interface block in the plurality of mixed signal interface blocks is adapted to be configurable to provide selected functionality independently of the other mixed signal interface blocks. |
| US09590629B2 |
Logical elements with switchable connections
Clusters of logical elements are interconnected by a switching fabric. Each cluster contains processing elements, storage elements, and switching elements. A circular buffer within a cluster contains multiple switching instructions to control the flow of data throughout the switching fabric. The circular buffer provides a pipelined execution of switching instructions. Each cluster contains multiple processing elements, and each cluster further comprises an additional circular buffer for each processing element. Logical operations are controlled by the circular buffers. |
| US09590628B2 |
Reference voltage training device and method thereof
Provided are a reference voltage training device and a method thereof. The reference voltage training device includes a comparator configured to compare a toggle signal with a reference voltage and output a comparison signal, a duty cycle detector configured to check a duty ratio of the comparison signal, and a reference voltage level changing unit configured to fix the reference voltage when the duty ratio meets a predetermined condition and to change a level of the reference voltage when the duty ratio does not meet the predetermined condition. The comparator outputs a changed comparison signal using the changed reference voltage. |
| US09590626B1 |
Physically unclonable functions with enhanced margin testing
Apparatus for identifying stable physically unclonable function (PUF) cells includes an array of PUF cells, a bias control circuit, and a selector circuit. The bias control circuit has a plurality of bias control lines that apply one or more bias control signals to each PUF cell in the array of PUF cells. The selector circuit selects a subset of the PUF cells in the array of PUF cells based on whether outputs of the PUF cells in the array of PUF cells change in response to application of the bias control signals. A corresponding method is also disclosed. |
| US09590624B2 |
Input apparatus
An input apparatus capable of preventing a user's unintentional input by notifying the user of a change in a pressure load is provided.The input apparatus has a touch face configured to receive a touch operation, a load detection unit configured to detect a pressure load of the touch operation to the touch panel, a vibration unit configured to vibrate the touch face, and a control unit, when the load detection unit detects a pressure load satisfying a standard load to receive an input, configured to perform a control to receive the input by the touch operation. When the load detection unit detects a pressure load satisfying a standard load, lower than the standard load to receive an input, the control unit controls the vibration unit to vibrate. |
| US09590623B2 |
Touch panel and method of detecting position
A touch panel includes a first conductive film having separate areas, each of which has a strip shape with a length direction thereof extending in a first direction, a second conductive film having separate areas, each of which has a strip shape with a length direction thereof extending in a second direction substantially perpendicular to the first direction, and a third conductive film, wherein the separate areas of the first conductive film are arranged side by side in the second direction, and the separate areas of the second conductive film are arranged side by side in the first direction, wherein position detection based on a capacitive method is performed by using the first conductive film and the second conductive film, and wherein a potential of a position of contact between the second conductive film and the third conductive film is detected to detect the position of the contact. |
| US09590614B2 |
Non-linearity compensation in radio frequency switches and devices
Radio frequency (RF) switches and devices provide improved switching performance. An RF switch includes at least one field-effect transistor (FET) disposed between a first node and a second node, each of the at least one FET having a respective source, drain, gate, and body, and a compensation circuit connected to the respective drain of the at least one FET that compensates a non-linearity effect generated by the at least one FET. |
| US09590612B2 |
Drive circuit of voltage-controlled device
A drive circuit includes: a constant current circuit configured to supply a constant current to a gate of the voltage-controlled device, and to turn on the voltage-controlled device; a discharge circuit configured to supply a discharge current between the gate and an emitter of the voltage-controlled device, and to turn off the voltage-controlled device; a switch circuit configured to operate one of the constant current circuit or the discharge circuit depending on a drive signal, and to turn on or turn off the voltage-controlled device; a current instruction value generation circuit configured to generate and output at least a current instruction value that sets an output current from the constant current circuit; and a current control circuit configured to control the output current from the constant current circuit based on the current instruction value generated by the current instruction value generation circuit. |
| US09590602B2 |
System and method for a pulse generator
According to an embodiment, a method of generating a clock pulse includes receiving a leading edge at a clock input at a time when an enable signal is active, generating an edge at a clock output based on the received leading edge at the clock input, latching a logic value corresponding to the edge at the clock output, preventing changes at the clock input from affecting the latched logic value after the logic value is latched, resetting the latched logic value after a first delay time, and maintaining the reset logic value until a second edge is received at the clock input. The second edge at the clock input matches the leading edge at the clock input. |
| US09590599B1 |
Clock distribution for flip-flop circuits
An apparatus is disclosed that includes a clock distribution circuit configured to shift a first clock signal in the first voltage domain to a second voltage domain to produce the second clock signal. The second voltage domain extends outside of the first voltage domain. A set of flip-flops operating in the first voltage domain, each including a master latch, a slave latch, and a clock node is coupled to receive the second clock signal. Each flip-flop includes a master pass transistor configured to pass a value from an input of the flip-flop to an input of the master latch when the second clock node is set to a first value. Each flip-flop also includes a master pass transistor configured to pass the value from an output of the master latch to an input of the slave latch when the second clock node is set to a second value. |
| US09590590B2 |
Delta-sigma modulator having transconductor network for dynamically tuning loop filter coefficients
A dynamically tunable transconductor includes a voltage-to-current converter stage for generating a current signal based on a voltage signal; and a current scaling stage for scaling the current signal by a scaling factor to achieve a particular transconductance. Current scaling stage includes a coarse tune mechanism having an associated coarse tune step and a fine tune mechanism having an associated fine tune step, where the scaling factor is a ratio of the coarse tune step to the fine tune step. A delta-sigma modulator can implement the transconductor to generate loop filter coefficients by dynamically tuning the transconductance to achieve a particular resistance. |
| US09590586B2 |
Electronic component module
A method for producing an electronic component module prevents a space from collapsing. The method includes a step of preparing an electronic component including an element substrate, a drive device formed on a principal surface of the element substrate, and a protection device covering the drive device so as to form a space around the drive device; a step of fixing the electronic component on a common substrate such that a principal surface of the common substrate and another principal surface of the element substrate face each other; a step of fixing a reinforcing plate on the protection device of the electronic component; and a step of forming a resin layer on the principal surface of the common substrate such that the electronic component is contained therein. |
| US09590581B2 |
System and method for reduction of signal distortion
A system for suppressing signal harmonic distortion caused by a main signal processing device provides processing for an electrical signal containing sine components of multiple frequencies. A post-processor reduces the amplitude of each frequency, relative to other frequencies, as the frequency increases, thus suppressing harmonics, which have higher frequencies than their respective elementary signals. To compensate for frequency distortion caused by the differential frequency suppression in the post-processing stage, a pre-processor provided upstream of the main signal processing device provides frequency-dependent signal processing having a generally opposite effect to that of the post-processor, increasing the amplitude of each frequency of the signal passing through the pre-processor, relative to other frequencies, as the frequency increases. The resulting output signal thus has substantially the same frequency spectrum as the original signal while distortion-causing harmonics are reduced or eliminated. |
| US09590573B2 |
System and method to remove heat from a power amplifier
In one aspect a satellite comprises a body, a solid state power amplifier, a heat acquisition and transfer device positioned proximate at least one heat generating element on the solid state power amplifier, and a heat rejection device in thermal communication with the heat acquisition and transfer device to reject heat acquired from the solid state power amplifier. Other aspects may be described. |
| US09590572B2 |
Logarithmic detector amplifier system for use as high sensitivity selective receiver without frequency conversion
A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency. |
| US09590569B2 |
Systems, circuits and methods related to low power efficiency improvement in multi-mode multi-band power amplifiers
Systems, circuits and methods related to low power efficiency improvement in multi-mode multi-band power amplifiers. In some embodiments, a power-amplifier (PA) system can include a first amplification path having one or more PAs configured to generate a high power radio-frequency (RF) signal from an input RF signal when in a high power mode. The PA system can further include a second amplification path having one or more PAs configured to generate a low power RF signal from the input RF signal when in a low power mode. The PA system can further include a switching circuit coupled to the first amplification path and the second amplification path. The switching circuit can be configured to allow amplification of the input RF signal through the first amplification path in the high power mode or the second amplification path in the low power mode. |
| US09590568B2 |
Power amplifier
A power amplifier includes a class D amplification section and a load current feedback circuit. The class D amplification section includes an input section and a switching section serving as an output stage and switched depending on a signal input to the input section, and outputs current from a power source to a load via the switching section. The load current feedback circuit negatively feeds back the current flowing in the load to the input section of the class D amplification section. |
| US09590567B2 |
Moving mean and magnitude dual path digital predistortion
An apparatus relates generally to preconditioning an input signal. In this apparatus, a first digital predistortion module and a second digital predistortion module are for receiving the input signal for respectively providing a first predistorted signal and a second predistorted signal. A combiner is for combining the first predistorted signal and the second predistorted signal for providing an output signal. The first digital predistortion module includes a moving mean block for receiving the input signal for providing a moving mean signal. The first digital predistortion module further includes a digital predistorter for receiving the input signal and the moving mean signal for providing the first predistorted signal. |
| US09590566B2 |
Pre-distortion based power control
An apparatus comprises an amplifier and a pre-distortion circuit coupled to an input of the amplifier. A saturation value of an input signal corresponds to a maximum output power of an output signal of the amplifier. An input target value of the input signal is determined according to the saturation value. The input target value is determined by subtracting an offset from the saturation value or by multiplying a ratio by the saturation value. An average value or an RMS value of the input signal is controlled to be substantially equal to the input target value. A method comprises determining an input target value according to a saturation value, and controlling an input signal according to the input target value. |
| US09590565B2 |
Class-D amplifier
In a class-D amplifier, oscillation phenomenon is suppressed in a high RF range and surge voltage is reduced. An oscillation absorption circuit is connected on the power supply side of the class-D amplifier circuit, and the class-D amplifier circuit and thus connected oscillation absorption circuit equivalently configure an oscillation circuit. Resistance provided in the oscillation absorption circuit is assumed as damping resistance of the oscillation circuit, thereby suppressing the oscillation phenomenon and reducing the surge voltage. The oscillation absorption circuit is made up of the RL parallel circuit of resistance and inductance. The oscillation absorption circuit and the class-D amplifier circuit constitute the oscillation circuit, and the resistance of the oscillation absorption circuit constitutes the damping resistance of the oscillation circuit in the high RF range. |
| US09590558B2 |
Solar module
A solar module comprising at least a plurality of lamellar solar panels, which are mounted pivotably, about a common axis, on an elongate support and can be and which can be moved between a first position, in which they are disposed on top of each other substantially congruently and parallel to the support, and a second position, in which they lie substantially next to each other in a fanned out manner about the aforementioned axis, wherein the support can be pivoted out of a housing, which accommodates the support together with the solar panels in the first position of the panels, characterized in that the solar module comprises two supports of the aforementioned type equipped with solar panels in the manner described, wherein the two supports are pivotably hinged at the diametrical longitudinal ends of an elongate base support, which is mounted rotatably, about an approximately vertical axis, in the housing. |
| US09590557B2 |
Photovoltaic-clad masonry unit
A masonry unit including a photovoltaic cell for generation of electricity is described herein. More particularly a photovoltaic-clad concrete block that combines the structural attributes of concrete block (or other masonry unit) and the energy production of solar photovoltaics is described herein. Methods for manufacturing, installing, and electrically connecting such photovoltaic-clad concrete blocks are also described herein. |
| US09590551B2 |
Control apparatus for AC motor
A control apparatus includes an inverter for driving a three-phase AC motor when connected to a DC power source, a smoothing capacitor interposed between the DC power source and an input side of the inverter and connected in parallel to the DC power source, a current sensor for detecting a current of one phase of the motor, and a controller for controlling the motor through the inverter. The controller performs a discharge process to discharge the capacitor, when the DC power source is disconnected from the capacitor. The controller calculates a d-axis voltage command reference value based on d-axis and q-axis current command values. The controller sets a q-axis voltage command reference value to zero. The controller generates d-axis and q-axis voltage command values by correcting at least the d-axis voltage command reference value and outputs the d-axis and q-axis voltage command values to the inverter. |
| US09590549B2 |
Torque control for a wind turbine generator in case of fault
A method and controller for controlling the torque in a wind turbine is described wherein the wind turbine is configured to deliver power via a converter to a public grid. The method comprises the steps of: receiving a fault signal; and, in response to said fault signal, a converter controller controllably ramping down the torque of said turbine from a nominal torque value to a predetermined low torque value within a predetermined time window selected from 0.2-2 seconds, preferably 0.5-1.5 seconds. |
| US09590546B2 |
Power dissipating arrangement in a wind turbine
A power dissipating arrangement for dissipating power from a generator in a wind turbine is provided. The generator comprises a plurality of output terminals corresponding to a multi-phase output. The power dissipating arrangement comprises a plurality of dissipating units, a plurality of semiconductor switches, a trigger circuit for switching the semiconductor switches and a control unit for controlling the operation of the trigger circuit, thereby controlling the switching of the semiconductor switches. |
| US09590543B2 |
Sensorless drive device and control method thereof
The purpose of the present invention is to reduce noise by controlling vibration due to rotation fluctuation, and to consume only current required for maintaining the rotation by bringing the current for driving a motor closer to a state of synchronization. A drive means drives a sensorless brushless DC motor by switching an energization pattern at a constant frequency to determine the rotation position of the rotor of the sensorless brushless DC motor. A detection means detects a zero-cross signal representing the switching of the phase of the rotor. A calculation means calculates a synchronization determination rate representing a percentage of the number of detected zero-cross signals. A pulse width control means controls the pulse width of a PWM drive duty in the drive means so that the calculated synchronization determination rate falls within a target range. |
| US09590542B2 |
Brushless motor and control method thereof
A brushless motor includes a rotor, a plurality of sets of stator windings, a position detection assembly, a MOSFET assembly, an inductance detection module and a main control module that controls them. The position detection assembly has a plurality of detection elements for detecting a position of the rotor and a position detection module for receiving signals fed back from the detection elements with the position detection module being electrically connected to the main control module and feeding back the positional information of the rotor thereto. The main control module alternatively switches between the position detection assembly and the inductance detection module to detect the position of the rotor. When the motor runs at a low speed, the system may effectively judge the position of the rotor to enable the machine to start with a load and, when the motor runs at a high speed, the system may accurately judge the position of the rotor, correctly drive the motor to run, eliminate errors caused by assembly, and prolong the service life of the motor. |
| US09590538B2 |
Braking device for a universal motor
An electrodynamic braking device for a universal motor includes a field winding configured to be fed from a grid during a braking operation, and an armature that is configured to be directly short-circuited. A braking process is performed by means of control electronics. Good braking is achieved with relatively low brush wear. Such an electrodynamic braking device can be used effectively for a power tool. |
| US09590537B2 |
Method of controlling a pump and motor
Embodiments of the invention provide a variable frequency drive system and a method of detecting a ground in a system having a pump driven by a motor. The drive system and method can provide one or more of the following: a sleep mode, pipe break detection, a line fill mode, an automatic start mode, dry run protection, an electromagnetic interference filter compatible with a ground fault circuit interrupter, two-wire and three-wire and three-phase motor compatibility, a simple start-up process, automatic password protection, a pump out mode, digital input/output terminals, and removable input and output power terminal blocks. |
| US09590536B2 |
Two-step connection of electric motors by means of electromagnetic switches
A method and apparatus using electromagnetic switching in a two-step connection process is provided to minimize surge currents and torque oscillations in three-phase motors during starts. |
| US09590533B2 |
Piezoelectric vibrational energy harvester
A vibrational energy harvester having a base and a piezoelectric transducer formed from a layer of piezoelectric material and extending between a first end at the base and a second end. At least a portion of the piezoelectric transducer is arranged in a back and forth pattern between the first and second ends. A magnetic component provides a magnetic field within which at least a portion of the piezoelectric transducer operates so that it exhibits nonlinear behavior. A biomedical implantable device using the vibration energy harvester can extract energy from heartbeat waveforms (heartbeats) to thereby power a device within the body. |
| US09590524B1 |
Apparatus and method for a power converter and system having foldback current limit
A power converter system configured to supply DC power to a load is provided, comprising a power converter device responsive to an AC input voltage and configured to provide an output DC voltage; an output voltage loop controller in operable communication with the power converter; an output current loop controller in operable communication with the power converter; an output power loop controller in operable communication with the power converter; and a foldback controller in operable communication with the power converter. The output voltage loop controller, the output current loop controller, the output power loop controller, and the foldback controller together control the power converter to provide a multi-sloped output characteristic, including constant output voltage in voltage mode, increased output current in a first constant power mode, decreased output current and voltage in a foldback mode, and increasing output current and decreasing output voltage in a second constant power mode. |
| US09590518B2 |
Power converter and controlling method thereof
The present application discloses a power converter and a controlling method thereof. The power converter at least comprises an inductor, a parasitic capacitor, an energy storage switch and a free-wheeling switch, and the controlling method is used for enabling the energy storage switch to maintain zero-voltage turn-on during the normal operation of the power converter. The controlling method comprising: within a switching period, the free-wheeling switch is turned on again for a preset time after the free-wheeling switch is turned on and turned off for the first time and after the inductor and the parasitic capacitor resonate, so that a voltage between two terminals of the energy storage switch can decline to zero, and when the voltage between two terminals of the energy storage switch declines to zero, the energy storage switch is turned on, thereby entering the next switching period of the power converter. |
| US09590515B2 |
Electric power conversion apparatus and electric power conversion method
There is provided a electric power conversion method of an electric power conversion apparatus comprising: charging the capacitor by transmitting the electric power from the primary circuit to the secondary circuit; and determining whether a voltage across the capacitor is equal to or greater than a predetermined value; the electric power conversion method further comprising, upon determining that the voltage across the capacitor is greater than or equal to the predetermined value, stopping to drive the primary circuit; driving the first secondary upper arm or the second secondary upper arm; and detecting whether a short-circuiting failure occurs in the first secondary lower arm or in the second secondary lower arm based on a presence or absence of change in a voltage at the secondary port in response to driving the first secondary upper arm or the second secondary upper arm. |
| US09590511B2 |
Insulation type switching power source apparatus
A power source apparatus comprises: a transformer that insulates a primary system and a secondary system and uses primary/secondary windings to transform an input voltage into an output voltage; a switching control device that is disposed in the primary system to drive the primary winding, and an output monitor device that is disposed in the secondary system to monitor the output voltage. The transformer includes a first auxiliary winding disposed in the primary system and a second auxiliary winding disposed in the secondary system. The output monitor device drives the second auxiliary winding to generate an induced voltage in the first auxiliary winding when the output voltage becomes smaller than a predetermined threshold voltage. The switching control device temporarily stops driving of the first winding upon detecting a light load state and resumes the driving of the first winding upon detecting the induced voltage in the first auxiliary winding. |
| US09590504B2 |
Flipped gate current reference and method of using
A current reference includes a tracking voltage generator. The tracking voltage generator includes a flipped gate transistor and a first transistor, the first transistor having a first leakage current, wherein the first transistor is connected with the flipped gate transistor in a Vgs subtractive arrangement. The tracking voltage generator further includes an output node configured to output a tracking voltage; and a second transistor connected to the output node, the second transistor having a second leakage current. The current reference further includes an amplifier configured to receive the tracking voltage and to output an amplified signal. The current reference further includes a control transistor configured to receive the amplified signal and to conduct a reference current therethrough. The current reference further includes a control resistor connected in series with the control transistor. |
| US09590503B2 |
Switching converter and associated discharge method
A switching converter has an input port for receiving an input voltage and an output port for providing an output voltage. The switching converter has a power stage, an energy stored circuit, a power conversion circuit and a control circuit. The power stage has an input terminal coupled to the input port and an output terminal coupled to the output port. The energy stored circuit is charged by the input voltage and provides a first bias voltage which maintains a predetermined time period after the input voltage is less than a predetermined voltage level. The power conversion circuit provides a second bias voltage. The control circuit provides a control signal to control the power stage and discharges the output voltage based on a discharge control signal, wherein the control circuit is powered by either the first bias voltage or the second bias voltage. |
| US09590501B2 |
Fast load transient response power supply system using dynamic reference generation
The present disclosure is directed to a fast load transient response power supply system using dynamic reference voltage generation. A system may comprise, for example, at least power supply circuitry, voltage reference circuitry and dynamic reference generation circuitry. The power supply circuitry may be configured to generate an output voltage (e.g., for driving a load) based on a power supply input voltage. The voltage reference circuitry may be configured to generate a reference voltage for use in controlling the generation of the output voltage. The dynamic reference generation circuitry may be configured to generate a dynamic reference voltage as the input voltage for the power supply circuitry based on the reference voltage and the output voltage. |
| US09590494B1 |
Bridgeless power factor correction circuits
A power factor correction circuit comprises a pair of III-N based switches coupled to a first reference ground, and an inductive component connected in series with a current sensing resistor. A first side of the current sensing resistor is coupled to a second reference ground which is electrically isolated from the first reference ground, and a second side of the current sensing resistor is coupled to a control circuit. The control circuit is also coupled to the second reference ground and is configured to measure current flowing through the inductive component during operation of the power factor correction circuit. |
| US09590493B2 |
Startup Circuit for a Power Supply
An example apparatus may include a power supply circuit comprising a first stage, the first stage comprising a current-fed topology and a transformer for isolating a primary side of the first stage from a secondary side of the first stage; a control module configured to provide control signals to one or more switches of the power supply circuit and to perform startup operations comprising: determining a peak line voltage value of an AC input voltage to the power supply circuit; initiating, when the power supply circuit is started, a hard-switching method; determining a center tap voltage of the transformer; stopping the hard-switching method, when the center tap voltage crosses a fraction of the peak line voltage value; and initiating, when the hard-switching method stops, a zero-voltage switching method with peak current mode control. |
| US09590491B2 |
Resonant current limiting device
A resonant current limiting device, for a resonant current passage having a loop shape including at least one capacitor and a wiring passage with at least one inductor or inductance component, includes: an electric storage element connected in series with the capacitor; a driving power source; and a voltage controller that charges and discharges an electric charge in the electric storage element, which is supplied from the driving power source, controls a terminal voltage of the electric storage element to be a predetermined instruction voltage, and restricts a resonant current component flowing through the wiring passage. |
| US09590490B2 |
Inrush current suppression circuit
The present invention provides an inrush current suppression circuit that is provided in an electric power conversion apparatus and suppresses inrush current that occurs when power is turned on, the electric power conversion apparatus including an inverter circuit and a drive power circuit that generates direct voltages of two levels as drive voltages, wherein the inrush current suppression circuit includes: an inrush current prevention resistor disposed between a converter circuit that generates DC power to be supplied to the inverter circuit and a smoothing circuit; a relay connected in parallel to the inrush current prevention resistor; and a relay control circuit that applies to the relay a higher direct voltage to shift the relay to a closed state, and after the relay is set to the closed state, applies to the relay a lower direct voltage to retain the closed state. |
| US09590487B2 |
Method and circuit for reducing ripple of current output by current source
Disclosed are a method and circuit for reducing a ripple of a current output by a current source. The circuit for reducing a ripple of a current output by a current source comprises a tube with adjustable impedance and a control circuit. The control circuit detects a direct current output by the current source to obtain a first signal which is in proportion to the direct current, and by comparing an instantaneous value of the first signal with an amplitude value of a set signal, controlling the increase of the impedance of the tube with adjustable impedance when the instantaneous value of the first signal is greater than the amplitude value of the set signal, so as to enable the amplitude value of the first signal to not exceed the amplitude value of the set signal and then enable the amplitude value of the current output by the current source to not exceed the amplitude value of the set current of the set signal, so that the purpose of reducing the ripple of the direct current output by the current source is finally achieved. |
| US09590486B2 |
Distributed gap inductor filter apparatus and method of use thereof
The invention comprises a high frequency inductor filter apparatus and method of use thereof. In one embodiment, an inductor is used to filter/convert power, where the inductor comprises a distributed gap core and/or a powdered core material. The inductor core is wound with one or more turns, where multiple turns are optionally electrically wired in parallel. In one example, the minimum carrier frequency is above that usable by an iron-steel inductor, such as greater than ten kiloHertz at fifty or more amperes. The core is optionally an annular core, solid rod core, or a core used for multiple phases, such as a ‘C’ or ‘E’ core. Optionally, the inductor is used in an inductor/converter apparatus, where output power has a carrier frequency, modulated by a fundamental frequency, and a set of harmonic frequencies, in conjunction with one or more of a silicon carbide, gallium arsenide, and/or gallium nitride based transistor. |
| US09590482B2 |
Magnetic levitation power device
A magnetic levitation power device is revealed. The magnetic levitation power device includes at least two sets of power devices, a motor, and a power generator. The magnetic levitation power device features on the power devices each of which consists of a first seat, a second seat and a transmission set. A first sleeve is set on the first seat and a second sleeve is arranged at the second seat. The transmission set is composed of a shaft, a large gear and a small gear. Each of two ends of the shaft are disposed with two magnetic bodies respectively and are mounted in a sleeve. The magnetic bodies are arranged with like poles repel each other so that the transmission set is suspended and friction coefficient of the shaft is reduced. Therefore high speed transmission is achieved by low power to get high power. |
| US09590476B2 |
System for protecting against heating for a rotating electric machine, in particular a starter
A rotating electric machine including at least a first terminal and a second terminal, and an electric circuit connected to said two terminals, the electric circuit including a field winding. The rotating electric machine also includes a thermal protection device (7) arranged in the electric machine. The thermal protection device (7) includes a first electric conductor (71) electrically connected to the second terminal, and a heat-sensitive member (8) arranged so as to deform above a predetermined temperature, wherein, above a predetermined temperature, the deformation of the heat-sensitive member (8) actuates a connection means (72) of the thermal protection device in order to electrically connect the first conductor to a second conductor of the electric circuit having a different electric potential than that of the second terminal. |
| US09590474B2 |
Miniature electrical generators and power sources
A power source for generating electrical power. The power source including: a shaft rotatably disposed relative to a structure; an elastic element having one end attached to the shaft and another end attached to the structure for storing potential energy upon rotation of the shaft in a first angular direction; a generator operatively coupled relative to the shaft; and a retaining mechanism movable between an engaged position for retaining the shaft from rotating in a second angular direction opposite to the first angular direction and a power generating position permitting the shaft to rotate in the second angular direction. Wherein, when the retaining mechanism is moved to the power generating position, the stored potential energy in the elastic element is converted to kinetic energy to rotate the shaft which in turn rotates the generator coupled to the shaft so as to produce electrical power. |
| US09590468B2 |
Electrical machines such as generators and motors
An electric machine may employ a distributed bearing, for example spaced radially outwardly of a longitudinal center of a rotor and stator assembly. The distributed bearing may take the form of a wire race bearing, which positions a rotor assembly relative to a stator assembly to maintain an air gap therebetween. The rotor assembly may be concentrically located within the stator assembly. Electrically insulative fasteners may couple a race assembly to the stator or rotor assembly. Compensation fastener assemblies may couple the wire race assembly to the rotor or stator assembly, to compensate for differential expansion for instance thermal differential expansion along a longitudinal axis of the electric machine. The electric machines may be arranged in series, for example with drive shafts arranged along a common axis, and may be coupled to the same source of motion (e.g., propeller of wind turbine, without or with a gear box). |
| US09590465B2 |
Drive system having a linear actuator and item of furniture having such a drive system
A drive system includes a linear actuator for transmitting a linear movement, the linear actuator having a spindle and a nut which co-operates therewith and an electric motor for driving the spindle. The drive system has a fixed frame and at least one frame movable relative thereto, the linear actuator secured to the fixed frame and the movable frame being coupled to the nut in an articulated manner by at least one actuation rod. Movement of the nut along the spindle brings about a movement of the movable frame relative to the fixed frame. The nut further has at least one stud and the actuation rod is provided with a corresponding recess for fitting the actuation rod onto the stud, or vice versa, and the fitted actuation rod is secured to the stud by a securing element, in particular a clip. |
| US09590461B2 |
Rotary electric machine
A rotating electric machine includes a rotor, and a stator that has a stator core and a stator winding. The stator core has a plurality of slots. The stator winding is wound around the stator core as a plurality of electrical conductors is aligned in the radial direction in the slots. The stator has an insulating sheet member that is bent in a rectangular cylindrical shape, and is intervened between the electrical conductor and an inner wall surface of the slot. A length of a bend line formed extending in the axial direction on the insulating sheet member from a reference position in a central section of the insulating sheet member in the axial direction to a tip in the axial direction is configured shorter than a length from the reference position to an end in the axial direction of the sheet member. |
| US09590460B2 |
Electric machine with a slot liner
An electrical machine includes a rotor, a stator having a slot liner including an electrical insulator which extends beyond the stator ends, and a strengthening element provided at each of the slot liner ends, wherein the strengthening strip reduces the splitting of the corresponding slot liner end. |
| US09590458B2 |
Electrical machine with circumferentially skewed rotor poles or stator coils
A rotor for an electrical machine including a plurality of pole sections with adjacent poles within each of the pole sections being distanced by a first uniform pole pitch. Adjacent poles belonging to different pole sections are distanced by a second (smaller) pole pitch at one end of each pole section, and by a third (larger) pole pitch at the other end of each pole section. Alternatively, a corresponding adjustment of coil pitches can be done in a stator of an electrical machine. |
| US09590455B2 |
Wireless charging system
A wireless power transmission system includes a first power transmitter configured to transmit a first electromagnetic field, a first power receiver configured to generate electrical energy using the first transmitted electromagnetic field, a first occupancy sensor configured to indicate a first presence of a first individual within a first sensed area, and a control unit configured to control the first power transmitter based upon the indicated first presence. |
| US09590450B2 |
Integrated circuit for wireless charging and operating method thereof
An integrated circuit for wireless charging and a method for wireless charging by an integrated circuit are provided. The integrated circuit includes a first wireless communication unit configured to support a first wireless communication method; a first route selection unit configured to perform a selection from among a first power input from a battery and a second power input according to wireless charging to be allowed as input; a power block configured to receive the selected power from the first route selection unit, and provide the received power to the first wireless communication unit; and a controller configured to control an operation of the first route selection unit. |
| US09590448B2 |
Power transmitting apparatus, power receiving apparatus, and methods thereof
A power transmitting apparatus, a power receiving apparatus, and methods thereof are provided, which can make a certain amount of power, that is set by the transmitting apparatus or the receiving apparatus, be transmitted and received in transmitting and receiving the power by wire or wirelessly between the apparatuses. The power transmitting apparatus includes a power transmitting unit configured to transmit power of a provided battery to a power receiving apparatus; a confirmation unit configured to confirm at least one of a residual amount of the battery, a transmitted amount of the power, an amount of power that is received by the power receiving apparatus, a charge amount of the power receiving apparatus, and an accumulated time for which the power is being transmitted; and a control unit configured to control transmission of the power through comparison of the result of the confirmation with a predetermined threshold value. |
| US09590444B2 |
Device with integrated wireless power receiver configured to make a charging determination based on a level of battery life and charging efficiency
A device includes an integrated power receive circuit, a battery charger, a battery, a processing module, one or more input/output modules, and one or more circuit modules. The integrated power receive circuit is operable to generate a DC voltage from a received magnetic field in accordance with a control signal. The battery charger is operable to convert the DC voltage into a battery charge voltage. The battery is coupled to the battery charger in a first mode and is coupled to supply power in a second mode. The processing module is operable to: generate the control signal based on desired electromagnetic properties of at least one of the received magnetic field and the integrated power receive circuit; process outbound data to produce processed outbound data; and process inbound data to produce processed inbound data. |
| US09590442B2 |
Control circuitry and method for controlling a bi-directional switch system, a bi-directional switch, a switching matrix and a medical stimulator
A control circuitry (134) and a method for controlling a bi-directional switch (132) is provided. The bi-directional switch (132) having a control terminal (130) for receiving a control voltage (124) to control an on state and an off state of the bi-directional switch (132) and at least one semiconductor switch in a bi-directional main current path. The control circuitry (134) comprises an energy storage element (102), a coupling means (101) to couple the energy storage element (102) to a supply voltage to charge the energy storage element (102), and a control circuit (108) configured to receive power from the energy storage element (102) and pendent of the supply voltage when the emergency storage element (102) is not coupled to the supply voltage. The coupling means (101) is configured for only coupling the energy storage element (102) to the supply voltage when the bi-directional switch (132) is in the off state. |
| US09590440B2 |
Mobile electronic device and charge control method
A mobile electronic device includes a first charging terminal that is to be brought into contact with a second charging terminal of a battery charger, a battery that is charged by electric power that is supplied from an external power supply via the first charging terminal, a resistor that is arranged between the first charging terminal and the battery, and a processor that measures voltage values of both ends of the resistor, that calculates, on the basis of the voltage values of the both ends, a terminal voltage value of the second charging terminal, and a resistance value of the resistor, an electric power consumption value of a contact portion in which the first charging terminal is brought into contact with the second charging terminal, and that stops charging the battery when the electric power consumption value is equal to or greater than a threshold. |
| US09590437B2 |
Wall charger
A wall charger for connection to an AC outlet. The wall charger includes a pair of pivotal AC prongs which engage within the electrical outlet to provide electrical connection to the wall charger. The wall charger includes one or two USB ports for electrical charging of a device from the connection to the AC outlet. The wall charger includes a cylindrical compartment for housing a bullet charger in a concealed manner. The bullet charger may be maintained within the housing for storage purposes. |
| US09590433B2 |
Terminal and electronic water-resistance method
A terminal and electrical water-resistance method, the terminal includes: a circuit board, a battery providing a power source for the circuit board, a housing provided with a transparent medium used for reflecting light; the circuit board includes: a detection module, configured to: emit light towards the transparent medium, receive the light reflected by the transparent medium to convert into electric signal data to send to a control module; the control module, configured to: receive the electric signal data to compare with preset data, trigger the power-off switch when a difference value between the electric signal data and the preset data reaches a preset threshold which is preset according to the light and the transparent medium, wherein, the preset data are electric signal data when the light is totally reflected by the transparent medium; a power-off switch configured to: disconnect a connection between the circuit board and the battery after triggering. |
| US09590431B2 |
Battery controller, battery system
A battery controller that performs current limitation in consideration of limitation on other components than a battery main body and the state of health of a battery is provided. A battery controller limits a battery current using allowable average current information describing current average values respectively allowed for a plurality of time windows. When the battery is deteriorated, an allowable average current obtained by subtraction in response to the state of health is used. Further, when the battery current exceeds an upper limit value stored in advance, the battery current is controlled with the upper limit reduced by the excessive amount. |
| US09590430B2 |
Terminal device, control device, charge and discharge control system, charge and discharge control adjustment method, charge and discharge control method, and program thereof
A terminal device includes: a tilt sensor that detects a tilt; a communication unit that transmits a signal according to the tilt detected by the tilt sensor; and a display unit that displays a status of charging performed according to the tilt detected by the tilt sensor. |
| US09590428B2 |
Electric power receiving device and method of receiving electric power
An electric power receiving device in one aspect of embodiments of the present disclosure comprises an electric power receiving section and a converting section. The converting section comprises a compensation voltage generating section. The compensation voltage generating section generates a compensation voltage capable of canceling out a reactance component in the electric power receiving section, and applies the compensation voltage to the electric power receiving section. The compensation voltage generating section comprises a phase changing section, a physical quantity detecting section, and a searching section. The searching section searches a target phase of the compensation voltage that brings the electric power receiving device into a substantially resonant state, based on a physical quantity detected by the physical quantity detecting section. The compensation voltage generating section determines the compensation voltage having the target phase as the compensation voltage to be applied to the electric power receiving section. |
| US09590426B2 |
System and method for managing a power distribution system
Disclosed herein is a system and method for managing a power distribution system in which has an improved system protection and fault section determination structure in consideration of distributed power supplies, has an improved server and communication structure for one-to-one synchronization measurement, and conducts real time system management and control. The system for managing the power distribution system uses field measurement data and an event signal to detect a protection coordination correction value of a protective device for protection of the system and a fault section of the power distribution system, performs real time system analysis using the field measurement data, and transmits control information including at least one of the protection coordination correction value, the fault section and the system analysis information to a DCP server. |
| US09590425B2 |
Parking lot shade for generating electricity having a photovoltaic system that tracks a maximum power point
A system and a method provide a photovoltaic system which regenerates the output characteristics of the photovoltaic at different ambient condition with high precision under all environmental conditions. The photovoltaic system includes a photovoltaic array, a buck/boost converter, a DC link capacitor to connect the buck/booster converter to a load/inverter, an adaptive network-based fuzzy inference maximum power point tracking controller, a voltage control loop, a proportional integral controller to maintain the output voltage of the photovoltaic array to the reference voltage by adjusting the duty ratio of buck/boost converter. |
| US09590421B2 |
Dynamic power flow controllers
Dynamic power flow controllers are provided. A dynamic power flow controller may comprise a transformer and a power converter. The power converter is subject to low voltage stresses and not floated at line voltage. In addition, the power converter is rated at a fraction of the total power controlled. A dynamic power flow controller controls both the real and the reactive power flow between two AC sources having the same frequency. A dynamic power flow controller inserts a voltage with controllable magnitude and phase between two AC sources; thereby effecting control of active and reactive power flows between two AC sources. |
| US09590418B2 |
Apparatus for checking damage to surge protector and automatically changing surge protector
An apparatus for checking damage to a surge protector and automatically changing a surge protector includes a casing, a current inflow unit supplied with an external current, a current discharge unit configured to supply an inflow current to an external electronic device, surge protectors placed between the current inflow unit and the current discharge unit in parallel, selectively connected to the current inflow unit, and supplied with an electric current, a relay placed between the current inflow unit and the surge protectors and configured to selectively connect the surge protectors to the current inflow unit, and a surge protector damage check unit configured to check whether a surge protector connected to the current inflow unit has been damaged by applying a voltage between the current inflow unit and the current discharge unit. |
| US09590415B2 |
Output short circuit protecting device
An output short circuit protecting device electrically connected to a power supplying device includes a first output short circuit protecting unit. The first output short circuit protecting unit includes a sensing unit, a comparing unit, a judging element, and a latching unit. The sensing unit is electrically connected to a switching unit, a first outputting resistor, and a second outputting resistor of the power supplying device. The comparing unit is electrically connected to the sensing unit. The judging element is electrically connected to the comparing unit, and a controller and a signal-controlling terminal of the power supplying device. The latching unit is electrically connected to the judging element and the signal-controlling terminal. |
| US09590414B2 |
Current controller and protection circuit
A current controller for generating a control signal which controls supply current flowing from a power source to a load includes an interface circuit which sets a threshold based on an instruction from an outside of the current controller, a threshold setting circuit which stores and outputs the threshold, a sensing circuit which determines a current or a temperature of a sensing element, and outputs a signal indicating that the supply current should be interrupted as the control signal if a determined current or a determined temperature exceeds the threshold, and a sensing control circuit which generates a clock signal including pulses with a predetermined period. The sensing circuit determines the current or the temperature of the sensing element during an active period of the clock signal. |
| US09590409B2 |
Underground modular high-voltage direct current electric power transmission system
High capacity (10 GW, for example) passively cooled non-superconducting underground high voltage direct current electric power transmission lines (100) of very low loss (1% per 1,000 km, for example) and competitive cost. The transmission lines (100) include segment modules (101) linked together with compliant splice modules (102) between the segments (101), typically installed in a protective conduit (103). The segment modules (101) include relatively rigid pipe-shaped conductors (117) insulated by pipe-like solid insulating layers (131) to form segment modules (101) that resemble pipe. The segment modules (101) are linked together through radially and axially compliant splice modules (102) to form the transmission line (100). There are preferably wheels (300) deployed to ease insertion and removal of the assembled segment modules (101) and splice modules (102) into the conduit (103), to center each segment module (101) within the conduit (103), and/or to provide motive force and/or braking to allow the assembled segment modules (101) and splice modules (102) to be installed on a slope. |
| US09590408B2 |
Device for grounding
A device for establishing grounding of an installation of different types includes one or more cables, wherein a ground rail or a ground conductor, ground rails or ground conductors, or a ground point or ground points are grounded by the one or more cables including a combination of electrically conductive wires or conductors in at least one inner core and at least one outer layer which surrounds the inner core wholly or partly, and a bore extending, in at least one of ground and a rock, with a depth of more than 100 m. The one or more cables are laid in the bore. The electrically conductive wires or conductors in the at least one inner core include hundreds of thin conductors surrounded by the at least one outer layer that includes coarse conductors having a diameter at least two times more than a diameter of the thin conductors. |
| US09590407B2 |
Device for removing ice and snow from power transmission line
A device for removing ice and snow from a power transmission line includes a support member installed on the power transmission line, and a vibrator that is provided for the support member and applies vibrations to the power transmission line so as to remove the ice and the snow attached to the power transmission line. |
| US09590404B2 |
High capacity power distribution panel for a modular data center
A power distribution network includes a first busway, a second busway situated between the first busway and a load, a first bus plug, and a second bus plug. The first and second bus plugs are configured to span across the first busway and the second busway. The first bus plug is further configured to provide power from the first busway to the load via an exit from the first bus plug that is adjacent to the load. The second bus plug is further configured to provide power from the second busway to the load via an exit from the second bus plug that is adjacent to the first load. |
| US09590391B2 |
Reflector, surface-emitting laser, solid-state laser device, optoacoustic system, and image-forming apparatus
In a reflector including an AlGaN layer, an InGaN layer, and a GaN layer placed therebetween, high reflectivity and a wide reflection band are achieved. A reflector includes a substrate containing GaN; first layers containing AlxGa1-xN; second layers containing InyGa1-yN; and a third layer containing GaN, the first, second, and third layers being stacked on the substrate. The first and second layers are alternately stacked, the third layer is placed between one of the first layers and one of the second layers, x and y satisfy a specific formula, the first layers have a thickness less than the thickness of the second layers, and the second layers have an optical thickness of λ/8 to 3λ/8, where λ is the central wavelength of the reflection. band of the reflector. |
| US09590387B2 |
Non-regenerative optical ultrashortpulse amplifier
Non-regenerative optical amplifier has a first optical amplifying medium and at least one second optical amplifying medium. The non-regenerative optical amplifier may be an ultrashort pulse amplifier. The material properties of the first amplifying medium differ at least partially from the material properties of the second amplifying medium. The emission spectra of the amplifying media overlap partially, and the amplifying media are solid-state bulk crystals. |
| US09590386B2 |
Yb: and Nd: mode-locked oscillators and fiber systems incorporated in solid-state short pulse laser systems
The invention describes classes of robust fiber laser systems usable as pulse sources for Nd: or Yb: based regenerative amplifiers intended for industrial settings. The invention modifies adapts and incorporates several recent advances in FCPA systems to use as the input source for this new class of regenerative amplifier. |
| US09590384B2 |
Absorber for wakefield interference management at the entrance of the wiggler of a free electron laser
A method for managing the broad band microwave and TeraHertz (THz) radiation in a free electron laser (FEL) having a wiggler producing power in the electromagnetic spectrum. The method includes placement of broadband microwave and TeraHertz (THz) radiation absorbers on the upstream end of the wiggler. The absorbers dampen the bounced back, broad band microwave and THz radiation returning from the surfaces outside the nose of the cookie-cutter and thus preventing broadening of the electron beam pulse's narrow longitudinal energy distribution. Broadening diminishes the ultimate laser power from the wiggler. The broadband microwave and THz radiation absorbers are placed on either side of the slot in the cookie-cutter that shapes the wake field wave of the electron pulse to the slot shape of the wiggler chamber aperture. The broad band microwave and THz radiation absorber is preferably a non-porous pyrolytic grade of graphite with small grain size. |
| US09590379B2 |
Gas laser oscillation device
A gas laser oscillation device includes a discharge part, a blower part, and a laser gas path. The discharge part excites a laser gas medium and the blower part blows the laser gas. The laser gas path forms the circulation path of the laser gas between the discharge part and the blower part. The blower part includes an impeller section, a drive section, and an intermediate chamber disposed between the impeller section and the drive section. In the impeller section, a rotating blade to be rotated by a drive section via a rotating shaft is disposed. In the intermediate chamber, a main space and a gas damper space are partially partitioned by a gas shielding member. |
| US09590375B2 |
Brush holder apparatus, brush assembly, and method
Devices and methods of use for brush holder assemblies are disclosed. Brush holder assemblies including a mounting block and a brush holder are disclosed. Also illustrated is a brush holder assembly including a first portion in sliding engagement with a second portion. In some embodiments the brush holder includes a channel, such that at least a portion of the mounting block is disposed within the channel of the brush holder. |
| US09590371B2 |
Assemblies for selectable mounting of power input cables and related systems and methods
An electrical device assembly includes an electrical device and a power input member. The electrical device includes an end portion having a cavity with a mounting surface at a distal portion of the cavity. The power input member includes a body and a power input cable extending from the body. The body has a plurality of faces including first and second mounting faces. The cavity is sized and configured to receive the power input member body: in a first position with the first mounting face facing the mounting surface and with the power input cable extending away from the electrical device in a first direction; and in a second position with the second mounting face facing the mounting surface and with the power input cable extending away from the electrical device in a second direction that is different from the first direction. |
| US09590370B1 |
Carrier module and connector module
A carrier module detachably connected to a busbar is provided, including a main body, an electronic connector, and an elastic member, wherein the elastic member includes at least one elastic portion disposed between the main body and the electronic connector. When a first force is applied on the carrier module along a first direction, the electronic connector is engaged with the busbar in a first position. When a second force is applied on the carrier module along the first direction, the electronic connector moves from the first position along a second direction to a second position relative to the main body and compresses the elastic portion. |
| US09590368B2 |
Chassis for modular electronics assembly
A platform comprises an array of slots for mounting electronic modules. Side rails are mounted on the platform. A side rail defines at least one outer edge of a slot. A central structure mechanically supports corresponding first electrical connectors for the slots. In a slot, a tray holds an electronic module. The tray comprises a second electrical connector supported at or near an interior end of the tray. The tray is secured laterally by at least one of the side rails. The tray is secured at or near the interior end by the second electrical connector that engages the first electrical connector. The tray is secured at or near an exterior end by an outer fastener associated with a floor of the platform. |
| US09590366B1 |
Cable assembly and communication system configured to receive the cable assembly
Cable assembly including a mating connector having a plurality of communication terminals. The mating connector is configured to mate with a system connector of a communication system during a loading operation. The cable assembly includes a trailing sub-assembly having an intermediate connector and an external cable that is terminated to the intermediate connector. The cable assembly also includes a flexible cable extension having signal pathways that are terminated to and extend from the intermediate connector to the mating connector. The intermediate connector communicatively interconnects the signal pathways and the external cable. The mating connector is configured to engage a guide track when inserted into the communication system and slide along the guide track toward the system connector along a non-linear path. The flexible cable extension permits the signal pathways to bend while transferring an operative force for mating the system connector and the mating connector. |
| US09590363B2 |
Cable connector assembly with an improved cable
A cable connector assembly includes an electrical connector (100) and cable (300) connected with the electrical connector. The cable has a plurality of core wires (31) including a plurality of first wires (34) and second wires (35), an outer jacket (32) enclosing on the core wires, and a shielding layer (33) enclosing the second wires. The first wires having a power wire (341) for power transmission and a plurality of coaxial wires (342) for high speed signal transmission, wherein the second wires have a detective wire (351) for detection signal transmission, a pair of ground-wires (352), a twisted pair wire (353) for USB 2.0 signal transmission an spare wire (354). Each of the first wires has a larger diameter than that of second wires, and the first wires are located between the shielding layer and outer jacket, the second wires are enclosed in the shielding layer. |
| US09590362B2 |
Connector having a conductive elastic sheet riveted to a conductive housing
A connector is disclosed. The connector includes a conductive housing having a port and a peripheral wall surrounding the port, a conductive elastic sheet riveted on the peripheral wall of the port of the housing by a plurality of rivets, and a plurality of contact spots formed on at least one of the housing and the elastic sheet. The housing and elastic sheets are electrically connected by the plurality of contact spots when the elastic sheet is riveted on the housing. |
| US09590359B1 |
Coaxial electrical interconnect
A coaxial electrical interconnect is disclosed. The coaxial electrical interconnect can include an inner conductor including an electrically conductive spring probe. The coaxial electrical interconnect can also include an outer conductor including a plurality of electrically conductive spring probes disposed about the inner conductor. Each spring probe can have a barrel and a plunger biased out of the barrel. The plunger can have a first plunger portion external to the barrel and a second plunger portion disposed partially in the barrel. The first and second plunger portions can have different diameters. A barrel of the spring probe of the inner conductor can be located proximate a plunger of at least one of the spring probes of the outer conductor. |
| US09590358B2 |
Electrical connector having staggered pins
An electric connector includes a first pair of differential signal terminals, a second pair of differential signal terminals, a first ground terminal, a second ground terminal and a third ground terminal. The first signal terminal and the second signal terminal of the first pair of differential signal terminals and the third signal terminal and the fourth signal terminal of the second pair of differential signal terminals are arranged in a first direction in sequence. The pins of the first pair of differential signal terminals are staggered in a second direction transverse to the first direction and the second pair of differential signal terminals are staggered in a second direction transverse to the first direction. The electric connector according to the disclosure can reduce electromagnetic radiation. |
| US09590345B2 |
Contact element for transmitting high-frequency signals between two circuit boards
A contact element for electrically conductive collection of components, the contact element having contact points for contacting contact regions of the components and having a first section, formed at least primarily in the shape of a spring tab, that electrically collects the contact points, and having a second section that electrically connects the contact points, wherein the collecting path formed by the second section is shorter than that of the first section. |
| US09590342B1 |
Receptacle assemblies
A receptacle assembly includes a receptacle housing, a housing opening, a first receptacle connector, and a second receptacle connector. The receptacle housing includes a first cavity that extends from a first end to a central structure. The housing opening is defined at the first end. The first cavity and the housing opening are sized and shaped to enable insertion of a plug assembly constructed to comply with the Society of Automotive Engineers J2863 standard. The first receptacle connector includes a first portion that extends from the central structure into the first cavity. The second receptacle connector includes a second portion that extends from the central structure into the first cavity. The first and the second receptacle connectors are sized and are disposed such that they are configured to both be inserted into a single connector cavity of the plug assembly and such that they are electrically insulated from one another. |
| US09590336B2 |
Electrical receptacle connector
An electrical receptacle connector includes a metallic shell, an insulated housing, a plurality of first receptacle terminals, a plurality of second receptacle terminals, and a rear cover plate. The insulated housing is received in the receiving cavity. The first receptacle terminals and the second receptacle terminals are respectively disposed at an upper portion and a lower portion of the insulated housing. The rear cover plate includes a baffle plate and one or more hole. The hole is formed on the surface of the baffle plate for checking tail portions of the second receptacle terminals which are formed as SMT (surface mount technology) legs. Accordingly, the soldering condition between the tail portions of the second receptacle terminals and contacts of a circuit board can be checked from the hole. |
| US09590333B1 |
Low profile, integrated circuit test socket
A test socket has a housing structure that holds conductor pins which provide mechanical and electrical connections between vertically aligned contacts of a device under test and a PCB. The housing structure comprises a top housing and a bottom housing. The top housing has counterbore holes to receive and vertically constrain top ends of the conductor pins. The bottom housing comprises a sheet and an optionally attached supporting frame. The sheet has through-holes that are vertically aligned with the counterbore holes of the top housing to receive and vertically constrain bottom ends of the conductor pins when the top and bottom housings are attached to each other. |
| US09590330B2 |
Electrical connector
An electrical connector socket includes an insulative housing forming a plurality of passageways extending through the opposite top and bottom surfaces of the housing. A plurality of contacts are disposed in the corresponding passageways, respectively. Each of the contacts includes opposite upper and lower contacting sections extending beyond the top surface and the bottom surface respectively. First and second upper posts extend upwardly from the top surface around two opposite corners and are different and spaced from each other diagonally. First and second lower posts extend downward from the bottom surface around the same two opposite corners and are different and spaced from each other diagonally. |
| US09590327B2 |
Reinforcing metal fitting and a connector having the reinforcing metal fitting
A connector is provided which includes a connector main body, terminals mounted in the connector main body, and a reinforcing metal fitting mounted in the connector main body. The connector main body includes mating guide portions formed at both ends longitudinally. The mating guide portions configured to mate with mating guide portions of another connector. The reinforcing metal fitting including an engaging protruding portion whose leading end portion is configured to engage with an engaging portion on the other connector. A portion of the reinforcing metal fitting, which portion includes at least the leading end portion of the engaging protruding portion, protrudes from a wall surface of one of the mating guide portions. |
| US09590323B2 |
Electric motor, in particular a radiator fan motor, and a contact
An electric motor, in particular a radiator fan motor of a motor vehicle, has a stator which is fitted with a rotating-field winding, and a rotor which is mounted such that it can rotate in relation to the stator. A converter electronics system is provided, wherein a number of contact elements for insulation-free or enamel-insulated connection contacts of at least one component of the converter electronics system and/or for enamel-insulated winding ends of the rotating-field winding are mounted on a printed circuit board. The contact elements are in the form of clamping contacts or insulation-displacement terminal contacts. |
| US09590318B2 |
Modular design of a high power, low passive intermodulation, active universal distributed antenna system interface tray
A modular high power, low passive intermodulation, active, universal, distributed antenna system interface tray that includes one or more front-end RF frequency duplexers instead of a high power, low passive intermodulation attenuator to achieve superior FIM performance. A cable switch matrix allows for the use of the system among varying power levels* and accomplishes the above in a modular architecture. |
| US09590310B1 |
Shaped antenna of planar conducting material
Typical consumer-grade terrestrial television antennas use simple flat plates in a dipole configuration. Reception is enhanced by elevating the antenna for better line of sight to the broadcast antenna, which often necessitates locating the antenna in the attic of a building or on the roof in the where it is exposed to the weather. The antenna disclosed is uses antenna elements that are substantially planar, have a unique shape that improves reception, and allows for compact packaging in a weatherproof case. |
| US09590309B2 |
Aperture-coupled microstrip antenna and manufacturing method thereof
An aperture-coupled microstrip antenna and a manufacturing method thereof are provided. The aperture-coupled microstrip antenna includes a radiating patch including an aperture, and a ground plane disposed below the radiating patch. The aperture-coupled microstrip antenna further includes a shorting wall connecting the radiating patch with the ground plane, and a microstrip feeder configured to apply electromagnetic waves to the aperture. |
| US09590308B2 |
Reduced surface area antenna apparatus and mobile communications devices incorporating the same
Space- and cost-efficient antenna apparatus and methods of making and using the same. Antenna may comprise one or more planar radiator elements fabricated from an electrically conductive material. Surface area of the antenna radiator metallized portion may be reduced by utilizing a crosshatch pattern. The pattern may comprise of one or more metal-free elements disposed within the outline of the radiator. The elements may be interconnected by conductive crosslinks. The antenna may be coupled to radio electronics at one or more connection points. At least one of a size and/or a placement of the crosslinks may be configured based on distance from the connecting points. Crosslink size and/or placement may be configured to provide a prescribed current flow within the antenna. Reducing surface area of the antenna radiator may reduce manufacturing time and/or cost compared with prior art antenna design approaches. |
| US09590307B2 |
Antenna apparatus
An antenna apparatus includes a ground plane, a first dielectric layer disposed on the ground plane, a conductive line having a feeding point and an open end or a short end and disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a plurality of first conductive elements disposed on the second dielectric layer so that the first conductive elements intersect with the conductive line at a plurality of first positions corresponding to nodes of a standing wave of current flowing through the conductive line, and one or more second conductive elements disposed on the second dielectric layer so that the one or more second conductive elements intersect with the conductive line at second positions corresponding to antinodes of the standing wave between the second end and the first position closest to the second end among the the first positions. |
| US09590304B2 |
Broadband antenna
A broadband antenna includes a substrate; a grounding unit; a first radiating element, including a first segment and a second segment substantially perpendicular to each other, wherein the first segment is electrically connected to the grounding unit and the second segment extends toward a direction; a second radiating element, coupled to the first radiating element; a third radiating element having a terminal coupled to or electrically connected to the second radiating element and another terminal electrically connected to the grounding unit; and a signal feed-in element electrically connected to the third radiating element for transmitting or receiving a radio signal; where the first, the second and the third radiating elements are disposed on the substrate along the direction defined by an order of the first segment of the first radiating element, the second radiating element and the third radiating element. |
| US09590301B2 |
Calibration of active antenna arrays for mobile telecommunications
In order to calibrate in amplitude and phase the individual transceiver elements (4) of an active antenna array for a mobile telecommunications network, each transceiver element including a transmit and a receive path (8, 10) coupled to an antenna element (12), each transceiver element includes a comparator (100) for comparing phase and amplitude of transmitted or received signals with reference signals in order to adjust the characteristics of the antenna beam. In order to provide an accurate means of reference signal distribution, a feed arrangement distributes the reference signals and includes a waveguide (50) of a predetermined length which is terminated at one end (52) in order to set up a standing wave system along its length, and a plurality of coupling points (56) at predetermined points along the length of the waveguide, which are each coupled to a comparator of a respective transceiver element. |
| US09590297B2 |
Multi-input multi-output antenna system
The present invention discloses a multi-input multi-output antenna system comprising a first radiation unit, a second radiation unit, a radiation floor, a dielectric plate and a parasitic element. The first radiation unit, the second radiation unit and the parasitic element are printed on an upper surface of the dielectric plate, and the radiation floor is printed on a lower surface of the dielectric plate. The first radiation unit and the second radiation unit are planar monopole antennas, and the parasitic element is positioned between the first radiation unit and the second radiation unit. The system in accordance with the present invention can implement miniaturization of the antennas, and ensure two ports of an antenna have high isolation while maintaining good radiation performance. |
| US09590286B2 |
Printed diplexer
A printed diplexer is printed on a PCB, having at least two input terminals respectively connected to at least two end portions thereof, having the output terminal connected at a center portion thereof, and configured to output a signal inputted from the at least two input terminals to the output terminal. |
| US09590284B1 |
Self-limiting filters for band-selective interferer rejection or cognitive receiver protection
The present invention related to self-limiting filters, arrays of such filters, and methods thereof. In particular embodiments, the filters include a metal transition film (e.g., a VO2 film) capable of undergoing a phase transition that modifies the film's resistivity. Arrays of such filters could allow for band-selective interferer rejection, while permitting transmission of non-interferer signals. |
| US09590280B2 |
Battery pack
A battery pack includes a plurality of bare cells electrically connected to one another and a housing that accommodates the bare cells therein. The housing includes a frame portion and a pair of side portions respectively connected to one end and the other end of the frame portion. The housing includes a guide portion to guide a flow of fluid, the guide portion being located where the one end of the frame portion and one side portion of the pair of side portions are adjacent to each other. |
| US09590279B2 |
Polymerized lithium ion battery cells and modules with thermal management features
A lithium ion (Li-ion) battery module includes a container with one or more partitions that define compartments within the container. Each of the compartments is configured to receive and hold a prismatic Li-ion electrochemical cell element, and a cover is configured to be disposed over the container to close the compartments. The container includes a polymer blend including a base polymer and one or more additives blended into the base polymer. The base polymer is electrically nonconductive and the one or more additives are configured to increase a thermal conductivity of the container to promote transfer of heat generated from the electrochemical cell elements through the container. |
| US09590277B2 |
Power storage device and manufacturing method thereof
A power storage device having a small thickness is manufactured. A manufacturing method of the power storage device includes: forming a first layer and a second layer over a first substrate; forming a first insulating layer, a positive electrode and a negative electrode over the second layer; forming a solid electrolyte layer over the first insulating layer, the positive electrode, and the negative electrode; forming a sealing layer to cover the solid electrolyte layer; forming a planarization film and a support over the sealing layer; separating the first layer and the second layer from each other so that the second layer, the positive electrode, the negative electrode, the solid electrolyte layer, the sealing layer, the planarization film, and the support are separated from the first substrate; attaching the separated structure to a second substrate which is flexible; and separating the support from the planarization film. |
| US09590275B2 |
Electrolyte for lithium battery and lithium battery including the same
An electrolyte for a lithium battery and a lithium battery including the electrolyte. The electrolyte is employed in the lithium battery so as to improve cycle characteristics of the lithium battery that is operable at high voltages. |
| US09590273B2 |
Non-aqueous electrolyte solution and lithium secondary battery including the same
Provided are a non-aqueous electrolyte solution which includes a lithium salt including lithium bis(fluorosulfonyl)imide (LiFSI) and an additive including a vinylene carbonate-based compound and a sultone-based compound, and a lithium secondary battery including the non-aqueous electrolyte solution. The lithium secondary battery including the non-aqueous electrolyte solution of the present invention may improve low-temperature output characteristics, high-temperature cycle characteristics, output characteristics after high-temperature storage, and capacity characteristics. |
| US09590271B2 |
Electrolyte for a lithium battery and a lithium battery comprising the same
The present invention relates to an electrolyte for a lithium battery and a lithium battery comprising the same. The electrolyte includes a non-aqueous organic solvent, a lithium salt, and a first additive capable of forming a chelating complex with a transition metal and which is stable at voltages ranging from about 2.5 to about 4.8 V. |
| US09590262B2 |
Reversible fuel cell and reversible fuel cell system
A reversible fuel cell includes a positive electrode containing manganese dioxide, a negative electrode containing a hydrogen storage material, a separator disposed between the positive electrode and the negative electrode, and an electrolyte. Each of the negative electrode and the positive electrode is an electrode for power generation and is also an electrode that applies electrolysis to the electrolyte using electric current to be fed from the outside. This cell is capable of storing electric energy to be supplied at the time of overcharge by converting the electric energy into gas, and is also capable of reconverting the gas into electric energy in order to utilize the electric energy. Accordingly, there are provided a reversible fuel cell and a reversible fuel cell system each of which is excellent in energy utilization efficiency, energy density and load following capability. |
| US09590260B2 |
Integral reactor system and method for fuel cells
A reactor system is integrated internally within an anode-side cavity of a fuel cell. The reactor system is configured to convert higher hydrocarbons to smaller species while mitigating the lower production of solid carbon. The reactor system may incorporate one or more of a pre-reforming section, an anode exhaust gas recirculation device, and a reforming section. |
| US09590258B2 |
Apparatus and method for managing fuel cell vehicle system
Provided are an apparatus and a method for managing a fuel cell vehicle system, and more particularly, an apparatus and a method for managing a fuel cell vehicle system capable of optimally maintaining a driving method based on environmental information and product information. |
| US09590255B2 |
Fuel cell including separator with elliptical shaped embossed portions in gas inlet and outlet portions
A fuel cell includes a separator having an uneven shape integrally formed on the front and the back surfaces thereof, so that gas can flow in a recessed portion of one surface and cooling water can flow in a recessed portion of the other surface. The separator has a gas passage portion connected to a manifold via a gas outlet/inlet portion. A first continuous portion that connects the gas outlet/inlet portion to the manifold is different from a second continuous portion that connects the gas outlet/inlet portion to the gas passage in communicating width. The gas outlet/inlet portion has an elliptical embossed portion that protrudes toward the gas passage side. A major axis direction of the embossed portion inclines relative to a straight axis connecting one end of the first continuous portion and one end of the second continuous portion toward a straight axis connecting the other ends of the first and second continuous portions. |
| US09590254B2 |
Fuel cell stack
In a power generation unit of a fuel cell stack, bosses of a first metal separator and bosses of a second metal separator are provided to sandwich a first membrane electrode assembly at first sandwiching positions on both sides of the first membrane electrode assembly, oppositely to each other in a stacking direction. Bosses of a second metal separator and bosses of a third metal separator are provided to sandwich a second membrane electrode assembly at second sandwiching positions on both sides of the second membrane electrode assembly, oppositely to each other in the stacking direction. Bosses of the first metal separator and bosses of the third metal separator protrude toward a coolant flow field, and contact each other at positions offset from the first and second sandwiching positions. |
| US09590251B2 |
Binder for storage battery device
To provide a binder for a storage battery device whereby favorable adhesion is obtainable and swelling by an electrolytic solution can favorably be suppressed. A binder for a storage battery device, which is made of a fluorinated copolymer comprising structural units (A), structural units (B) and structural units (C), wherein the molar ratio of the structural units (C) to the total of all the structural units excluding the structural units (C) is from 0.01/100 to 3/100: structural units (A): structural units derived from a monomer selected from the group consisting of tetrafluoroethylene, hexafluoropropylene, vinylidene fluoride and chlorotrifluoroethylene; structural units (B): structural units derived from ethylene or propylene; and structural units (C): structural units derived from a C5-30 organic compound having at least two double bonds and at least one of the double bonds being a double bond of a vinyl ether group or a double bond of a vinyl ester group. |
| US09590249B2 |
Electricity storage device
An object is to improve characteristics of a power storage device. The present invention relates to an electricity storage device comprising a current collector and a negative electrode-active material layer formed over the current collector. The negative electrode-active material layer includes a negative electrode comprising a first negative electrode layer in contact with the current collector; a second negative electrode layer in contact with the first negative electrode layer, having a smaller capacitance than the first negative electrode layer and containing one material selected from a nitride of lithium and a transition metal represented by LiaMbNz (M is a transition metal, 0.1≦a≦2.8, 0.2≦b≦1 and 0.6≦z≦1.4), a silicon material, and lithium titanate; a positive electrode that is paired with the negative electrode; and a solid electrolyte interposed between the positive electrode and the negative electrode. |
| US09590248B2 |
Porous graphene nanocages for battery applications
An active material composition includes a porous graphene nanocage and a source material. The source material may be a sulfur material. The source material may be an anodic material. A lithium-sulfur battery is provided that includes a cathode, an anode, a lithium salt, and an electrolyte, where the cathode of the lithium-sulfur battery includes a porous graphene nanocage and a sulfur material and at least a portion of the sulfur material is entrapped within the porous graphene nanocage. Also provided is a lithium-air battery that includes a cathode, an anode, a lithium salt, and an electrolyte, where the cathode includes a porous graphene nanocage and where the cathode may be free of a cathodic metal catalyst. |
| US09590244B2 |
Ni—Mn composite oxalate powder, lithium transition metal composite oxide powder and lithium ion secondary battery
The disclosure provides a Ni—Mn composite oxalate powder, including a plurality of biwedge octahedron particles represented by the general formula: NiqMnxCoyMzC2O4.nH2O, wherein q+x+y+z=1, 0 |
| US09590242B2 |
Precursor particles of lithium composite transition metal oxide for lithium secondary battery and cathode active material comprising the same
Disclosed are precursor particles of a lithium composite transition metal oxide for lithium secondary batteries, wherein the precursor particles of a lithium composite transition metal oxide are composite transition metal hydroxide particles including at least two transition metals and having an average diameter of 1 μm to 8 μm, wherein the composite transition metal hydroxide particles exhibit monodisperse particle size distribution and have a coefficient of variation of 0.2 to 0.7, and a cathode active material including the same. |
| US09590239B2 |
Negative electrode for nonaqueous secondary battery, method for producing the same, and nonaqueous secondary battery
Provided is a negative electrode for a nonaqueous secondary battery which achieves both suppression of reductive decomposition of an electrolyte or an electrolytic solution and suppression of an increase in resistance. Also provided are a method for producing such a negative electrode and a nonaqueous secondary battery employing such a negative electrode. A polymer coating layer is formed so as to coat at least part of surfaces of negative electrode active material particles containing silicon oxide (SiOx; 0.5≦x≦1.6). The polymer coating layer contains a cationic polymer having a positive zeta potential under neutral conditions. Since silicon oxide has a negative zeta potential, a thin uniform coating layer can be formed owing to Coulomb's force. |
| US09590238B2 |
Composite for anode active material and method of preparing the same
Provided are a composite for an anode active material and a method of preparing the same. More particularly, the present invention provides a composite for an anode active material including a (semi) metal oxide and an amorphous carbon layer on a surface of the (semi) metal oxide, wherein the amorphous carbon layer comprises a conductive agent, and a method of preparing the composite. |
| US09590234B2 |
Nonaqueous electrolyte secondary battery
The present invention has an object to provide a nonaqueous electrolyte secondary battery having high capacity and excellent cycle characteristics. A nonaqueous electrolyte secondary battery according to an embodiment of the present invention includes a positive electrode plate containing a lithium-cobalt composite oxide and a lithium-nickel-cobalt-manganese composite oxide (LiaNibCocMn1-b-cO, 0.9 |
| US09590233B2 |
Method of making a cathode
A battery cathode is made by mixing electrochemically active cathode material, graphite, water and an aqueous based binder to provide a mixture. The mixture is extruded continuously into a cathode. Water is then removed from the cathode. The cathode is cut into individual pieces. |
| US09590221B2 |
Battery cell connector
A battery cell connector includes a plurality of segments. Each segment defines a respective plane and has a respective longitudinal axis. The battery cell connector further includes a plurality of bends coupling the plurality of segments together into a 3-D object, each bend located between a unique pair of adjacent segments of the plurality of segments, where the unique pair of adjacent segments define two distinct respective planes. A first segment of the plurality of segments includes one or more first connecting elements for a battery pole of a first battery cell and a second segment of the plurality of segments includes one or more second connecting elements for a battery pole of a second battery cell. The one or more first connecting elements are electrically coupled with the one or more second connecting elements. |
| US09590217B2 |
Structure for mounting battery on vehicle
A vehicle battery mounting structure is provided for mounting a battery on a vehicle. The vehicle battery mounting structure has a sling is used which is mounted to move a battery and which is removed after the battery is moved to a position for assembly onto the vehicle body. In this structure for mounting a battery on a vehicle, the battery includes a gas discharge hose as an attached component which is assembled onto the vehicle body after the battery is mounted. The sling is provided with a hose holding opening for holding the gas discharge hose. The hose holding opening includes a hose opening for removing the gas discharge hose being held, the hose opening being set on the worker side. |
| US09590216B2 |
Electric vehicle battery assembly enclosure
An example battery assembly enclosure includes a tray and a lid secured to the tray to provide an interior therebetween. A plurality of molded retention features secure a battery assembly received in the interior. |
| US09590208B2 |
Light-emitting element, light-emitting device, electronic device, and lighting device
A light-emitting element having high external quantum efficiency is provided. A light-emitting element having a long lifetime is provided. A light-emitting element includes a light-emitting layer between a pair of electrodes. The light-emitting layer contains at least a phosphorescent compound, a first organic compound (host material) having an electron-transport property, and a second organic compound (assist material) having a hole-transport property. The light-emitting layer has a stacked-layer structure including a first light-emitting layer and a second light-emitting layer, and the first light-emitting layer contains a higher proportion of the second organic compound than the second light-emitting layer. In the light-emitting layer (the first light-emitting layer and the second light-emitting layer), a combination of the first organic compound and the second organic compound forms an exciplex. |
| US09590205B2 |
Organic electroluminescent display device
An organic EL display device of active matrix type wherein insulated-gate field effect transistors formed on a single-crystal semiconductor substrate are overlaid with an organic EL layer; characterized in that the single-crystal semiconductor substrate (413 in FIG. 4) is held in a vacant space (414) which is defined by a bed plate (401) and a cover plate (405) formed of an insulating material, and a packing material (404) for bonding the bed and cover plates; and that the vacant space (414) is filled with an inert gas and a drying agent, whereby the organic EL layer is prevented from oxidizing. |
| US09590201B2 |
Organic light emitting diode display
An organic light emitting diode display has uniform light emission efficiency over the entire pixel area. The organic light emitting diode display comprises: a substrate having a red pixel area, a green pixel area, and a blue pixel area arrayed in a matrix; an anode electrode in the red, green, and blue pixel areas; a hole injection layer including an organic material with an extinction coefficient less than about 0.13 and on the anode electrode covering a whole surface of the substrate; an emission layer on the hole injection layer; an electron injection layer on a whole surface of the emission layer; and a cathode electrode on a whole surface of the electron injection layer. |
| US09590199B2 |
Organic compound, organic light emitting device, and image display device
To provide a novel organic compound suitable for an organic light emitting device. This invention provides an organic compound having the skeleton represented by Formula (1). |
| US09590198B2 |
Integrated conductive substrate, and electronic device employing same
Provided are an integrated conductive substrate simultaneously serving as a substrate and an electrode, and an electronic device using the same. The integrated conductive substrate includes a conductive layer containing iron, which has a first surface having a first root mean square roughness, and a semiconductor layer containing a semiconductor material, which has a second surface having a second root mean square roughness and is formed on the first surface. Here, the semiconductor layer includes a semiconductor-type planarization layer formed by a solution process using at least one of the semiconductor material and a precursor of the semiconductor material to planarize the first surface of the conductive layer, and the second root mean square roughness is smaller than the first root mean square roughness. |
| US09590193B2 |
Polymer diode
The present invention provides flexible polymer diodes in the form of a printable polymer sandwich configuration similar to that found in electroactive polymer transducers. The inventive flexible polymer diodes comprise a dielectric layer sandwiched between a pair of electrodes. With appropriate optional additives introduced in the electrode formulation and the proper electrical properties in the electrode, a device may be constructed which allows current to pass through for only one polarity of applied voltage. |
| US09590190B2 |
Terminally activated delayed fluorescence material, a method of synthesizing the same and an OLED device using the same
The present invention provides a thermally activated delayed fluorescence material, a method of synthesizing the same and an OLED device using the same. The thermally activated delayed fluorescence material includes a structure formula 1 as wherein the group Ar1 is identical to or different from the group Ar2, and the group Ar1 and the group Ar2 are consisted of carbazole and/or phenothiazine. The thermally activated delayed fluorescence material has a higher glass transition temperature, high thermal stability and excellent luminous efficiency. The method of synthesizing the same has simplified steps, easily purified product, high yield, and luminous and thermal properties of the product can be adjusted by connecting to differentiated functional groups. The OLED device using the same has a light emitting layer of high fluorescence efficiency and long-term stability, so that luminous efficiency and service life of the OLED device can meet practical demand. |
| US09590189B2 |
Host material for blue phosphor, and organic thin film and organic light-emitting device including same
Provided are a host material for a blue phosphor, and an organic thin film and an organic light-emitting device including the same. The host material for a blue phosphor is such that a carbazole compound is bonded around a central atom, wherein the central atom is a Group 14 element, and the carbazole compound bonded around the central atom is 3 or 4, wherein the carbazole compound. includes carbazole in which an alkyl group is substituted The host material for a blue phosphor has high triplet energy (ET) and excellent electrical mobility and thermal stability. As a result, the organic thin film, which includes the host material, and the organic light-emitting device, which includes the organic thin film, implement a deep blue color and have excellent luminous efficiency. |
| US09590185B2 |
Amine-based compound and organic light-emitting diode including the same
Provided are an amine-based compound and an organic light-emitting diode including the same. The amine-based compound is represented by Formula 1 or Formula 2 below: |
| US09590184B2 |
Organic light-emitting diode
An organic light-emitting diode (OLED) is provided. The OLED comprises a substrate, a first electrode on the substrate, a second electrode disposed opposite to the first electrode, an emission layer disposed between the first electrode and the second electrode, a hole migration region disposed between the first electrode and the emission layer, and an electron migration region disposed between the emission layer and the second electrode. The hole migration region comprises a tertiary amine having one N-substituent comprising a substituted or unsubstituted carbazole moiety and another N-substituent comprising a substituted or unsubstituted fluorene moiety. At least one of the hole migration region and the emission layer comprises a substituted or unsubstituted compound comprising at least two carbazole moieties. |
| US09590173B2 |
Magnetic memory and method for manufacturing the same
According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate and an underlying layer provided on the substrate. The underlying layer includes a first underlying layer and a second underlying layer surrounding the first underlying layer. The first and second underlying layers contain a metal of a same type. The first underlying layer includes a lower part which is greater than the upper part in width. The magnetic memory further includes a magnetoresistive element provided on the underlying layer. |
| US09590172B2 |
Sensing device
A sensing device is provided. The sensing device includes a semiconductor layer, a first electrode and a second electrode, a first detection electrode and a second detection electrode, and at least one conductive pattern. The first electrode and the second electrode are disposed at opposite ends of the semiconductor layer. The first detection electrode and the second detection electrode are disposed at the other opposite ends of the semiconductor layer, wherein a virtual connection line is provided through the first detection electrode and the second detection electrode. The at least one conductive pattern is disposed on the semiconductor layer, wherein the conductive pattern does not overlap with the virtual connection line. |
| US09590168B2 |
Alkali niobate-based piezoelectric material and a method for making the same
An alkali niobate-based piezoelectric material having the general formula {(K1-aNaa)1-bLib}(Nb1-c-dTacSbd)O3+x mol % BanTiO3+y mol % CuO, where 0≦a≦0.9, 0≦b≦0.3, 0 |
| US09590167B2 |
Low voltage transistor and logic devices with multiple, stacked piezoelectronic layers
A piezoelectronic transistor device includes a first piezoelectric (PE) layer, a second PE layer, and a piezoresistive (PR) layer arranged in a stacked configuration, wherein an electrical resistance of the PR layer is dependent upon an applied voltage across the first and second PE layers by an applied pressure to the PR layer by the first and second PE layers. A piezoelectronic logic device includes a first and second piezoelectric transistor (PET), wherein the first and second PE layers of the first PET have a smaller cross sectional area than those of the second PET, such that a voltage drop across the PE layers of the first PET creates a first pressure in the PR layer of the first PET that is smaller than a second pressure in the PR layer of the second PET created by the same voltage drop across the PE layers of the second PET. |
| US09590162B2 |
Piezoelectric vibration component and portable terminal
A piezoelectric vibration component and a portable terminal each include a piezoelectric vibration element 14 and a power supply line 51. The piezoelectric vibration element 14 includes at least: a layered structure 20 in which a plurality of internal electrodes and piezoelectric layers are layered in a first direction; and surface electrodes 33 and 31 electrically connected to the internal electrodes. The piezoelectric vibration element 14 bends and vibrates, and its amplitude changes in a second direction perpendicular to the first direction. The power supply line 51 includes at least: a conductive path 53 including a connection part 56 bonded to a surface electrode 33; and a conductive path 52 including a connection part 57 bonded to a surface electrode 31. The connection part 56 has a plurality of partial electrodes 56a and 56b that extend in a third direction perpendicular to both the first direction and the second direction. |
| US09590160B2 |
Thermoelectric power generation device
The invention relates to a thermoelectric-based power generation system designed to be clamped onto the outer wall of a steam pipe or other heating pipe. The system can include a number of assemblies mounted on the sides of a pipe. Each assembly can include a hot block, an array of thermoelectric modules, and a cold block system. The hot block can create a thermal channel to the hot plates of the modules. The cold block can include a heat pipe onto which fins are attached. |
| US09590158B2 |
Light emitting device
A light emitting device, includes: a package equipped with a lead having an upper surface and a lower surface, and a metal board and a plating layer, the upper surface including a mounting portion, the metal board whose main component is copper, the plating layer including a first plating layer and a second plating layer which are provided on the lower surface of the metal board, the first plating layer containing silver and nickel and being formed on the edge of the metal board, and the second plating layer containing no nickel and being formed on at least part of a region below the mounting portion, a molded resin that holds the lead so that the lower face of the lead is exposed to the outside; a light emitting element mounted on the mounting portion; and a sealing member that seals the light emitting element. |
| US09590157B2 |
Efficient dual metal contact formation for a semiconductor device
A method of forming contacts to an n-type layer and a p-type layer of a semiconductor device includes depositing a dielectric layer on the n-type layer and the p-type layer. A pattern is formed in the dielectric layer, the pattern having a plurality of metal contact patterns for the semiconductor device. A first metal layer is deposited into the plurality of metal contact patterns, and a second metal layer is deposited directly on the first metal layer. External contacts for the semiconductor device are formed, where the external contacts include the second metal layer. |
| US09590155B2 |
Light emitting devices and substrates with improved plating
Light emitting devices and substrates are provided with improved plating. In one embodiment, a light emitting device can include a submount and one or more light emitting diodes (LED) chips disposed over the submount. In one embodiment, the submount can include a copper (Cu) substrate, a first metallic layer of material that is highly reflective disposed over the Cu substrate for increased brightness of the device, and a second metallic layer disposed between the Cu substrate and the first metallic layer for forming a barrier therebetween. |
| US09590154B2 |
Wiring substrate and light emitting device
A wiring substrate includes an insulation layer, separated wires formed on a first surface of the insulation layer, a first plating layer formed on a first surface of each of the wires, a reflection layer including a first opening that exposes at least a portion of the first plating layer as a connection pad, and an electronic component mounted on a second surface of each of the wires, which is located on an opposite side of the first surface of each of the wires. The electronic component is embedded in the insulation layer. |
| US09590152B2 |
Light emitting device
A light emitting device includes a substrate, a light emitting device and a sealing resin member. The substrate includes a flexible base, a plurality of wiring portions, a groove portion and a pair of terminal portions. The flexible base extends in a first direction corresponding to a longitudinal direction of the substrate and the plurality of wiring portions are arranged on the flexible base. The groove portion is formed between the plurality of wiring portions spaced apart from each other. The pair of terminal portions is arranged along the first direction at the both sides of the plurality of wiring portions. The light emitting element is disposed on the substrate and electrically connected to the plurality of wiring portions. The sealing resin member seals the light emitting element and a part of the substrate. The light emitting element is mounted on the substrate in a flip-chip manner. |
| US09590151B2 |
Method for producing a plurality of radiation-emitting semiconductor chips
A method is provided for producing a plurality of radiation-emitting semiconductor chips, having the following steps: providing a plurality of semiconductor bodies (1) which are suitable for emitting electromagnetic radiation from a radiation exit face (3), applying the semiconductor bodies (1) to a carrier (2), applying a first mask layer (4) to regions of the carrier (2) between the semiconductor bodies (1), applying a conversion layer (5) to the entire surface of the semiconductor bodies (1) and the first mask layer (4) using a spray coating method, and removing the first mask layer (4), such that in each case a conversion layer (5) arises on the radiation exit faces (3) of the semiconductor bodies (1). |
| US09590150B2 |
Light-emitting device
In order to provide a light-emitting device having improved color rendering properties, a light-emitting device which uses a SiC fluorescent material comprises a first SiC fluorescent portion in which a donor impurity and an acceptor impurity are added and which is formed of a SiC crystal; a second SiC fluorescent portion which is formed of a SiC crystal in which the same donor impurity as the first SiC fluorescent portion and the same acceptor impurity as the first SiC fluorescent portion are added, and in which a concentration of the acceptor impurity is higher than the concentration of the acceptor impurity in the first SiC fluorescent portion and an emission wavelength is longer than that of the first SiC fluorescent portion; and a light-emitting portion that emits excitation light that excites the first SiC fluorescent portion and the second SiC fluorescent portion. The color rendering property of the SiC fluorescent material is improved and it becomes easy to adjust the color temperature and the color rendering index of the light-emitting device which uses the SiC fluorescent material. |
| US09590148B2 |
Encapsulant modification in heavily phosphor loaded LED packages for improved stability
Heavily phosphor loaded LED packages having higher stability and a method for increasing the stability of heavily phosphor loaded LED packages. The silicone content of the packages is increased by decreasing the amount of one phosphor of the blend or by increasing the thickness of the silicone phosphor blend layer. |
| US09590137B2 |
Light-emitting diode
A light-emitting diode (LED) includes a first type semiconductor layer, a second type semiconductor layer, a current controlling structure, a first electrode, and a second electrode. The second type semiconductor layer is joined with the first type semiconductor layer. The current controlling structure is joined with the first type semiconductor layer, and the current controlling structure has at least one current-injecting zone therein. The first electrode is electrically coupled with the first type semiconductor layer through the current-injecting zone of the current controlling structure. The second electrode is electrically coupled with the second type semiconductor layer. |
| US09590135B2 |
Superluminescent diode and method for implementing the same
A superluminescent diode and a method for implementing the same, wherein the method includes growing a first epi layer on top of an SI (semi-insulating substrate); re-growing a butt based on the first epi layer; forming a tapered SSC (spot size converter) on the re-grown butt layer; forming an optical waveguide on an active area that is based on the first epi layer and on an SSC area that is based on the tapered SSC; forming an RWG on the optical waveguide; and forming a p-type electrode and an n-type electrode. |
| US09590130B2 |
Thin film solder bond
A device, system, and method for solar cell construction and bonding/layer transfer are disclosed herein. An exemplary structure of solar cell construction involves providing a monocrystalline donor layer. A solder bonding layer bonds the donor layer to a carrier substrate. A porous layer may be used to separate the donor layer. |
| US09590122B2 |
Fish eye lens analyzer
An imaging device is disclosed. The imaging device has a housing, a detector positioned within the housing and has a field of view encompassing one or more target area within the housing to be imaged, a wide-angle lens operatively coupled to the detector, and a support positioned at the target area and configured to receive one or more test component. The wide-angle lens is operatively coupled to the detector such that the detector receives image data of the target area through the wide-angle lens. |
| US09590121B2 |
Optoelectronic device, and image sensor and electronic device including the same
An optoelectronic device includes a first electrode and a second electrode facing each other, a photoelectric conversion layer between the first electrode and the second electrode, and a buffer layer between at least one of the photoelectric conversion layer and the first electrode, and the photoelectric conversion layer and the second electrode, the buffer layer including one of MoOx1 (2.58≦x1<3.0), ZnOx2 (1.0≦x2<2.0), TiOx3 (1.5≦x3<2.0), VOx4 (1.5≦x4<2.0), TaOx5 (1.0≦x5<2.5), WOx6 (2.0 |
| US09590120B2 |
MOS capacitors structures for variable capacitor arrays and methods of forming the same
A capacitor structure is described. A capacitor structure including a substrate; a source/drain region formed in the substrate to form an active area having an active area width; and a plurality of gates formed above the substrate. The source/drain region having a reflection symmetry. Each of the plurality of gates having a gate width. The gate width is configured to be less than said active area width. And, the plurality of gates are formed to have reflection symmetry. |
| US09590119B2 |
Decoupling capacitor and method of making same
A device comprises a semiconductor substrate having first and second implant regions and an electrode above and between the first and second implant regions of a first dopant type. A contact structure is in direct contact with the first and second implant regions and the electrode. A third implant region has a second dopant type different from the first dopant type. A bulk contact is provided on the third implant. |
| US09590118B1 |
Wafer with SOI structure having a buried insulating multilayer structure and semiconductor device structure
The present disclosure provides, in a first aspect, a semiconductor device structure, including an SOI substrate comprising a semiconductor base substrate, a buried insulating structure formed on the semiconductor base substrate and a semiconductor film formed on the buried insulating structure, wherein the buried insulating structure comprises a multilayer stack having a nitride layer interposed between two oxide layers. The semiconductor device structure further includes a semiconductor device formed in and above an active region of the SOI substrate, and a back bias contact which is electrically connected to the semiconductor base substrate below the semiconductor device. |
| US09590113B2 |
Multilayer passivation or etch stop TFT
The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition. |
| US09590111B2 |
Semiconductor device and display device including the semiconductor device
A highly reliable semiconductor device including an oxide semiconductor is provided. The concentration of impurities contained in an oxide semiconductor of a semiconductor device including the oxide semiconductor is reduced. Electrical characteristics of a semiconductor device including an oxide semiconductor are improved. The semiconductor device includes an oxide semiconductor film; a gate electrode layer overlapping with the oxide semiconductor film; a gate insulating film between the oxide semiconductor film and the gate electrode layer; a metal oxide film overlapping with the gate insulating film with the oxide semiconductor film positioned therebetween; and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor film. The metal oxide film covers at least a channel region and a side surface of the oxide semiconductor film. |
| US09590103B2 |
Semiconductor devices having multiple gate structures and methods of manufacturing such devices
A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer. |
| US09590102B2 |
Semiconductor device and manufacturing method thereof
A method for manufacturing a semiconductor device includes forming a fin structure including a well layer, an oxide layer disposed over the well layer and a channel layer disposed over the oxide layer. An isolation insulating layer is formed so that the channel layer of the fin structure protrudes from the isolation insulating layer and a part of or an entirety of the oxide layer is embedded in the isolation insulating layer. A gate structure is formed over the fin structure. A recessed portion is formed by etching a part of the fin structure not covered by the gate structure such that the oxide layer is exposed. A recess is formed in the exposed oxide layer. An epitaxial seed layer in the recess in the oxide layer. An epitaxial layer is formed in and above the recessed portion. The epitaxial layer is in contact with the epitaxial seed layer. |
| US09590094B2 |
Semiconductor device with power transistor cells and lateral transistors and method of manufacturing
By thermal oxidation a field oxide layer is formed that lines first and second trenches that extend from a main surface into a semiconductor layer. After the thermal oxidation, field electrodes and trench gate electrodes of power transistor cells are formed in the first and second trenches. A protection cover including a silicon nitride layer is formed that covers a cell area with the first and second trenches. With the protection cover covering the cell area, planar gate electrodes of lateral transistors are formed in a support area of the semiconductor layer. |
| US09590091B2 |
Minority carrier conversion structure
According to an embodiment of a semiconductor device, the semiconductor device includes a power device well in a semiconductor substrate, a logic device well in the substrate and spaced apart from the power device well by a separation region of the substrate, and a minority carrier conversion structure including a first doped region of a first conductivity type in the separation region, a second doped region of a second conductivity type in the separation region and a conducting layer connecting the first and second doped regions. The second doped region includes a first part interposed between the first doped region and the power device well and a second part interposed between the first doped region and the logic device well. |
| US09590090B2 |
Method of forming channel of gate structure
A method of forming a channel of a gate structure is provided. A first epitaxial channel layer is formed within a first trench of the gate structure. A dry etching process is performed on the first epitaxial channel layer to form a second trench. A second epitaxial channel layer is formed within the second trench. |
| US09590085B2 |
Method and structure for III-V FinFET
A method for fabricating a semiconductor device comprises forming a fin in a layer of III-V compound semiconductor material on a silicon-on-insulator substrate; forming a semiconductor extension on the fin, the semiconductor extension comprising a III-V compound semiconductor material that is different from a material forming the fin in the III-V compound semiconductor layer; forming a dummy gate structure and a spacer across and perpendicular to the fin; forming a source/drain layer on a top surface of the substrate adjacent to the dummy gate structure; planarizing the source/drain layer; removing the dummy gate structure to expose a portion of the semiconductor extension on the fin; removing the exposed portion of the semiconductor extension; etching the semiconductor extension to undercut the spacer; and forming a replacement gate structure in place of the removed dummy gate structure and removed exposed portion of the semiconductor extension. |
| US09590084B2 |
Graded heterojunction nanowire device
A device includes a source region, a drain region, and a semiconductor channel connecting the source region to the drain region. The semiconductor channel includes a source-side channel portion adjoining the source region, wherein the source-side channel portion has a first bandgap, and a drain-side channel portion adjoining the drain region. The drain-side channel portion has a second bandgap different from the first bandgap. |
| US09590081B2 |
Method of making a graphene base transistor with reduced collector area
A method of making a graphene base transistor with reduced collector area comprising forming a graphene material layer, forming a collector material, depositing a dielectric, planarizing the dielectric, cleaning and removing the native oxide, transferring a base graphene material layer to the top surface of the graphene material layer, bonding the base graphene material layer, and photostepping and defining a second graphene material layer. A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region. A graphene base transistor with reduced collector area comprising an electron emitter region, an electron collection region, and a base region. |
| US09590076B1 |
Method for manufacturing a FinFET device
A method for manufacturing a FinFET device, including providing a substrate; implementing a source/drain doping on the substrate; etching the doped substrate to form a source region and a drain region; forming a fin channel between the source region and the drain region; and forming a gate on the Fin channel. The fin and the gate are formed after the source/drain doping is implemented on the substrate, so that the source/drain doping is done as a doping for a planar device, which ensures the quality of the source/drain coping and improves the property of the FinFET device. |
| US09590075B2 |
Semiconductor device
A semiconductor device includes a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed thereon. The semiconductor device also includes a body layer extending a first predetermined distance into the semiconductor layer of the second conductivity type and a pair of trenches extending a second predetermined distance into the semiconductor layer of the second conductivity type. Each of the pair of trenches consists essentially of a dielectric material disposed therein and a concentration of doping impurities present in the semiconductor layer of the second conductivity type and a distance between the pair of trenches define an electrical characteristic of the semiconductor device. The semiconductor device further includes a control gate coupled to the semiconductor layer of the second conductivity type and a source region coupled to the semiconductor layer of the second conductivity type. |
| US09590074B1 |
Method to prevent lateral epitaxial growth in semiconductor devices
The method for preventing epitaxial growth in a semiconductor device begins with patterning a photoresist layer over a semiconductor structure having a set of fin ends on a set of fins of a FinFET structure. The set of fins are isolated from one another by a first dielectric material. The photoresist is patterned over the set of fin ends so that it differs from the photoresist pattern over other areas of the FinFET structure. A set of dielectric blocks is formed on the set of fin ends using the photoresist pattern. The set of dielectric blocks prevents epitaxial growth at the set of fin ends in a subsequent epitaxial growth step. In another aspect of the invention, a semiconductor device includes a set of fin structures having a set of fin ends at a respective vertical surface of a fin structure and is separated by a set of trenches from other fin structures. Each of the fin structures has a top surface which is higher than a top surface of a dielectric material in the set of trenches. A set of dielectric blocks is disposed at the set of fin ends, the dielectric blocks having a top surface level with or above the top surfaces of the fin structures which inhibit excessive epitaxial growth at the fin ends. |
| US09590061B2 |
Semiconductor device with voltage resistant structure
A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion. |
| US09590059B2 |
Interdigitated capacitor to integrate with flash memory
Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate including a flash memory region and a capacitor region. A flash memory cell is arranged over the flash memory region and includes a polysilicon select gate arranged between first and second source/drain regions of the flash memory cell. The flash memory cell also includes a control gate arranged alongside the select gate and separated from the select gate by a control gate dielectric layer. A capacitor is arranged over the capacitor region and includes: a polysilicon first capacitor plate and polysilicon second capacitor plate, which are inter-digitated with one another and separated from one another by a capacitor dielectric layer. The capacitor dielectric layer and control gate dielectric layer are made of the same material. |
| US09590056B2 |
Semiconductor device comprising contact structures with protection layers formed on sidewalls of contact etch stop layers
A semiconductor device includes a silicide contact region positioned at least partially in a semiconductor layer, an etch stop layer positioned above the semiconductor layer, and a dielectric layer positioned above the etch stop layer. A contact structure that includes a conductive contact material extends through at least a portion of the dielectric layer and through an entirety of the etch stop layer to the silicide contact region, and a silicide protection layer is positioned between sidewalls of the etch stop layer and sidewalls of the contact structure. |
| US09590055B2 |
Thin film transistor, method for manufacturing the same, array substrate, and display device
The present disclosure provides a thin film transistor and its manufacturing method, an array substrate, a display device. The thin film transistor includes a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode. The source electrode and the drain electrode are formed above the active layer and located at a first end and a second end of the active layer which are opposite to each other, respectively. The drain electrode completely covers the second end of the active layer. |
| US09590054B2 |
Low temperature spacer for advanced semiconductor devices
Embodiments of the present invention provide semiconductor structures and methods for making the same that include a boron nitride (BN) spacer on a gate stack, such as a gate stack of a planar FET or FinFET. The boron nitride spacer is fabricated using atomic layer deposition (ALD) and/or plasma enhanced atomic layer deposition (PEALD) techniques to produce a boron nitride spacer at relatively low temperatures that are conducive to devices made from materials such as silicon (Si), silicon germanium (SiGe), germanium (Ge), and/or III-V compounds. Furthermore, the boron nitride spacer may be fabricated to have various desirable properties, including a hexagonal textured structure. |
| US09590052B2 |
High-voltage transistor having shielding gate
A semiconductor device includes a plurality of high-voltage insulated-gate field-effect transistors arranged in a matrix form on the main surface of a semiconductor substrate and each having a gate electrode, a gate electrode contact formed on the gate electrode, and a wiring layer which is formed on the gate electrode contacts adjacent in a gate-width direction to electrically connect the gate electrodes arranged in the gate-width direction. And the device includes shielding gates provided on portions of an element isolation region which lie between the transistors adjacent in the gate-width direction and gate-length direction and used to apply reference potential or potential of a polarity different from that of potential applied to the gate of the transistor to turn on the current path of the transistor to the element isolation region. |
| US09590051B2 |
Heterogeneous layer device
An embodiment includes an apparatus comprising: an N layer comprising an NMOS device having a N channel, source, and drain that are all intersected by a first horizontal axis that is parallel to a substrate; a P layer comprising a PMOS device having a P channel, source, and drain that are all intersected by a second horizontal axis that is parallel to the substrate; a first gate, corresponding to the N channel, which intersects the second horizontal axis; and a second gate, corresponding to the P channel, which intersects the first horizontal axis. Other embodiments are described herein. |
| US09590048B2 |
Electronic device
In an embodiment, an electronic device includes a semiconductor layer having a surface, a gate and a first current electrode on the surface and a dielectric layer extending between the gate and the first current electrode and including charged ions having a predetermined charge profile. |
| US09590047B2 |
SiC bipolar junction transistor with reduced carrier lifetime in collector and a defect termination layer
A method of manufacturing a silicon carbide (SiC) bipolar junction transistor (BJT) and a SiC BJT (100) are provided. The SiC BJT comprises an emitter region (150), a base region (140) and a collector region (120). The collector region is arranged on a substrate (110) having an off-axis orientation of about 8 degrees or lower. A defect termination layer (DTL, 130) for terminating dislocations originating from the substrate is arranged between the substrate and the collector region. The collector region includes a zone (125) in which the life time of the minority charge carriers is shorter than in the base region. The present invention is advantageous in terms of improved stability of the SiC BJTs. |
| US09590046B2 |
Monocrystalline SiC substrate with a non-homogeneous lattice plane course
A method is used for producing an SiC volume monocrystal by sublimation growth. During growth, by sublimation of a powdery SiC source material and by transport of the sublimated gaseous components into the crystal growth region, an SiC growth gas phase is produced there. The SiC volume monocrystal grows by deposition from the SiC growth gas phase on the SiC seed crystal. The SiC seed crystal is bent during a heating phase before such that an SiC crystal structure with a non-homogeneous course of lattice planes is adjusted, the lattice planes at each point have an angle of inclination relative to the direction of the center longitudinal axis and peripheral angles of inclination at a radial edge of the SiC seed crystal differ in terms of amount by at least 0.05° and at most by 0.2° from a central angle of inclination at the site of the center longitudinal axis. |
| US09590043B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate, and a P-well and an N-type drift region disposed in the semiconductor substrate. The P-well includes a lower well region and an upper well region disposed above the lower well region. The lower well region includes a first surface that is near the N-type drift region, and the upper well region includes a second surface that is near the N-type drift region. A distance from the first surface of the lower well region to the N-type drift region is greater than a distance from the second surface of the upper well region to the N-type drift region. |
| US09590039B2 |
Semiconductor structure and method for forming the same
A semiconductor structure and a method for forming same are provided. The semiconductor structure includes a bipolar transistor. The bipolar transistor includes a base doped contact, an emitter doped contact, a collector doped contact, and well regions. The base doped contact, the emitter doped contact and the collector doped contact are formed in the different well regions having different dopant conditions from each other. |
| US09590038B1 |
Semiconductor device having nanowire channel
A semiconductor device is provided as follows. A fin-type pattern includes first and second oxide regions in an upper portion of the fin-type pattern. The fin-type pattern is extended in a first direction. A first nanowire is extended in the first direction and spaced apart from the fin-type pattern. A gate electrode surrounds a periphery of the first nanowire, extending in a second direction intersecting the first direction. The gate electrode is disposed on a region of the fin-type pattern. The region is positioned between the first and the second oxide regions. A first source/drain is disposed on the first oxide region and connected with an end portion of the first nanowire. |
| US09590035B2 |
Three-dimensional semiconductor template for making high efficiency solar cells
A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template. |
| US09590031B2 |
Fin-type field effect transistor and manufacturing method thereof
A fin-type field effect transistor includes a semiconductor body formed on a substrate, the semiconductor body having a top surface and a pair of laterally opposite sidewalls, and a gate electrode formed above the sidewalls and the top surface of the semiconductor body. The semiconductor body further includes a source region formed on an end portion of the semiconductor body, a drain region formed on another end portion of the semiconductor body, and a channel region formed between the source region and the drain region and surrounded by the gate electrode, wherein a doping concentration of the channel region decreases with increasing distance from the top surface and the sidewalls. |
| US09590027B2 |
Method for fabricating an integrated-passives device with a MIM capacitor and a high-accuracy resistor on top
The present invention relates to a method for fabricating an electronic component, comprising fabricating, on a substrate (102) at least one integrated MIM capacitor (114) having a top capacitor electrode (118) and a bottom capacitor electrode (112) at a smaller distance from the substrate than the top capacitor electrode; fabricating an electrically insulating first cover layer (120) on the top capacitor electrode, which first cover layer partly or fully covers the top capacitor electrode and is made of a lead-containing dielectric material; thinning the first cover layer; fabricating an electrically insulating second cover layer (124) on the first cover layer, which second cover layer partly or fully covers the first cover layer and has a dielectric permittivity smaller than that of the first cover layer; and fabricating an electrically conductive resistor layer (126) on the second cover layer, which resistor layer has a defined ohmic resistance. |
| US09590017B2 |
High resolution low power consumption OLED display with extended lifetime
Arrangements of pixel components that allow for full-color devices, while using emissive devices that use blue color altering layers in conjunction with blue emissive regions, that emit at not more than two colors, and/or that use limited number of color altering layers, are provided. Devices disclosed herein also may be achieved using simplified fabrication techniques compared to conventional side-by-side arrangements, because fewer masking steps may be required. |
| US09590005B1 |
High dynamic range image sensor with reduced sensitivity to high intensity light
An image sensor includes first and second pluralities of photodiodes interspersed among each other in a semiconductor substrate. Incident light is to be directed through a surface of the semiconductor substrate into the first and second pluralities of photodiodes. The first plurality of photodiodes has greater sensitivity to the incident light than the second plurality of photodiodes. A metal film layer is disposed over the surface of the semiconductor substrate over the second plurality of photodiodes and not over the first plurality of photodiodes. A metal grid is disposed over the surface of the semiconductor substrate, and includes a first plurality of openings through which the incident light is directed into the first plurality of photodiodes. The metal grid further includes a second plurality of openings through which the incident light is directed through the metal film layer into the second plurality of photodiodes. |
| US09590003B2 |
Solid-state imaging element, method of manufacturing the same, and imaging device
In pixels that are two-dimensionally arranged in a matrix fashion in the pixel array unit of a solid-state imaging element, a photoelectric conversion film having a light shielding film buried therein is formed and stacked on the light incident side of the photodiode. The present technique can be applied to a CMOS image sensor compatible with the global shutter system, for example. |
| US09589994B2 |
Display panel
A display panel whose TFT substrate comprises a substrate, a gate layer, a gate dielectric layer, a semiconductor layer, a first electrode layer, a first passivation layer, a second passivation layer, a via and a second electrode layer is provided. The gate layer is disposed on the substrate. The gate dielectric layer is disposed on the gate layer. The semiconductor layer is disposed on the gate dielectric layer. The first electrode layer is disposed on the semiconductor layer. The first and second passivation layers are sequentially disposed on the first electrode layer. The via penetrates the passivation layers to expose the first electrode layer. The second electrode layer is electrically connected to the first electrode layer through the via. The first and second passivation layers have first and second taper angles respectively. The difference between the first and second taper angles is below 30°. |
| US09589992B2 |
Display panel including static electricity preventing pattern and display device having the same
The present invention relates to a display panel including a static electricity preventing pattern and a display device having the same. An aspect of the present invention provides a display device or a display panel in which a dummy pattern having a pattern identical to or similar to a line of a signal area is positioned between the signal area and a non-signal area, in a pad including the signal area and the non-signal area. |
| US09589990B2 |
Thin-film transistor array substrate, manufacturing method therefor and display device thereof
A thin-film transistor array substrate is disclosed. The array substrate includes a support substrate, a plurality of scan lines on the support substrate, and a plurality of data lines on the support substrate, where the plurality of scan lines are insulated and intersect with the plurality of data lines. The array substrate also includes a plurality of pixel units located near intersections of the scan lines and the data lines, a first metal layer on the support substrate, and an insulating layer on the first metal layer, where the insulating layer includes a plurality of via holes, each exposing a portion of the first metal layer. The array substrate also includes a semiconductor layer on the insulating layer and electrically connected to the first metal layer, and a second metal layer on the semiconductor layer and electrically connected to the semiconductor layer. |
| US09589986B2 |
Array substrate, display device and method for fabricating array substrate
The invention provides an array substrate, a method therefor and a display device. The array substrate includes: a substrate, and a thin film transistor (TFT) and a pull-down capacitor disposed on the substrate. The TFT includes: a gate, a gate insulating layer, a channel layer, a source, a drain and a passivation layer. The passivation layer is disposed with a via hole corresponding to the drain, a pixel electrode is connected to the drain through the via hole. The pull-down capacitor includes: a first conductive layer, a first spacer layer, a filling layer, a second spacer layer and a second conductive layer successively stacked on the substrate. The sum of thicknesses of the filling layer and the first spacer layer is greater than the sum of thicknesses of the drain and the channel layer, to make the second conductive layer and the pixel electrode be located at different levels. |
| US09589982B1 |
Structure and method of operation for improved gate capacity for 3D NOR flash memory
Embodiments of the present invention provide improved three-dimensional memory cells, arrays, devices, and/or the like and associated methods. In one embodiment, a three-dimensional memory cell is provided. The three-dimensional memory cell comprises a first conductive layer; a third conductive layer spaced apart from the first conductive layer; a channel conductive layer connecting the first conductive layer and the third conductive layer to form an opening having internal surfaces; a dielectric layer disposed along the internal surfaces of the opening surrounded by the first conductive layer, the channel conductive layer and the third conductive layer; and a second conductive layer interposed and substantially filling a remaining open portion formed by the dielectric layer. The first conductive layer, the dielectric layer, and the second conductive layer are configured to form a staircase structure. |
| US09589981B2 |
Passive devices for integration with three-dimensional memory devices
A three dimensional memory device includes a memory device region containing a plurality of non-volatile memory devices, a peripheral device region containing active driver circuit devices, and a stepped surface region between the peripheral device region and the memory device region containing a plurality of passive driver circuit devices. |
| US09589979B2 |
Vertical and 3D memory devices and methods of manufacturing the same
A memory device is described, which includes a block of memory cells comprising a plurality of stacks of horizontal active lines such as NAND string channel lines, with a plurality of vertical slices penetrated by, and surrounding, the horizontal active lines to provide a gate-all-around structure. A memory film is disposed between the horizontal active lines in the plurality of stacks and the vertical slices in the plurality of vertical slices. A 3D, horizontal channel, gate-all-around NAND flash memory is provided. A method for manufacturing a memory involves a buttress process. The buttress process enables horizontal channel, gate-all-around structures. |
| US09589972B2 |
Ultraviolet-erasable nonvolatile semiconductor device
An ultraviolet-erasable nonvolatile semiconductor device has a protective film comprised of a silicon nitride film on which is laminated a silicon oxynitride film. The silicon nitride film has a thickness of 1000 Å or more and 2000 Å or less and the silicon oxynitride film has a thickness of about 7000 Å or more. The silicon nitride film and the silicon oxynitride film cooperate to prevent moisture from penetrating into the ultraviolet-erasable nonvolatile semiconductor device. The thickness of the silicon nitride film is set so that the time for erasing data in a nonvolatile semiconductor storage element through irradiation with ultraviolet rays is not increased. |
| US09589964B1 |
Methods of fabricating semiconductor devices
A method of fabricating a semiconductor device with conductive patterns comprises sequentially forming an etch-target layer and a middle mold layer on a substrate, forming a first upper mold pattern and a second upper mold pattern on the middle mold layer to have top surfaces at different levels, etching the middle mold layer using the first and second upper mold patterns as an etch mask to form first and second middle mold patterns, respectively, forming a third middle mold pattern between the first and second middle mold patterns, and etching the etch-target layer using the first to third middle mold patterns as an etch mask to form conductive patterns. |
| US09589963B2 |
Dual-port semiconductor memory and first in first out (FIFO) memory having electrically floating body transistor
Multi-port semiconductor memory cells including a common floating body region configured to be charged to a level indicative of a memory state of the memory cell. The multi-port semiconductor memory cells include a plurality of gates and conductive regions interfacing with said floating body region. Arrays of memory cells and method of operating said memory arrays are disclosed for making a memory device. |
| US09589961B2 |
Semiconductor device including write access transistor having channel region including oxide semiconductor
Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory cell and driving a second signal line and a word line; a driver circuit selecting any of writing potentials and outputting it to a first signal line; a reading circuit comparing a potential of a bit line and a reference potential; and a potential generating circuit generating the writing potential and the reference potential. One of the memory cells includes: a first transistor connected to the bit line and a source line; a second transistor connected to the first and second signal line; and a third transistor connected to the word line, bit line, and source line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor is connected to one of source and drain electrodes of the second transistor. |
| US09589958B1 |
Pitch scalable active area patterning structure and process for multi-channel finFET technologies
A method is disclosed which cuts hard mask fins thinner than the target fin critical dimension and then enlarges the dimension of the fin hard mask critical dimension to meet the target fin critical dimension. |
| US09589957B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device comprises forming an interlayer insulating film on a semiconductor substrate, the interlayer insulating film including a trench, forming a work function metal layer in the trench, forming an insulating film on the work function metal layer, forming a sacrificial film on the insulating film and filling the trench, forming a sacrificial film pattern with a top surface disposed in the trench by etching the sacrificial film, forming an insulating film pattern by selectively etching a portion of the insulating film which is formed higher than the sacrificial film pattern, and forming a work function metal pattern with a top surface disposed in the trench by selectively etching a portion of the work function metal layer which is formed higher than the insulating film pattern. |
| US09589953B2 |
Reverse bipolar junction transistor integrated circuit
A Reverse Bipolar Junction Transistor (RBJT) integrated circuit comprises a bipolar transistor and a parallel-connected distributed diode, where the base region is connected neither to the collector electrode nor to the emitter electrode. The bipolar transistor has unusually high emitter-to-base and emitter-to-collector reverse breakdown voltages. In the case of a PNP-type RBJT, an N base region extends into a P− epitaxial layer, and a plurality of P++ collector regions extend into the base region. Each collector region is annular, and rings a corresponding diode cathode region. Parts of the epitaxial layer serve as the emitter, and other parts serve as the diode anode. Insulation features separate metal of the collector electrode from the base region, and from P− type silicon of the epitaxial layer, so that the diode cathode is separated from the base region. This separation prevents base current leakage and reduces power dissipation during steady state on operation. |
| US09589949B1 |
Electro-static discharge protection in integrated circuit based amplifiers
An apparatus having a plurality of power pads of an integrated circuit, a plurality of transistors, and one or more diodes is disclosed. Each transistors may have a drain that forms a junction with a conductive layer of the integrated circuit. The diodes may be coupled between two of the power pads. A first portion less than all of an electro-static discharge that passes through a first of the two power pads and the conductive layer may be transferred through a first of the drains in a first of the transistors. A second portion less than all of the electro-static discharge may be transferred sequentially through (a) at least one of the diodes and (b) a second of the drains in a second of the transistors. |
| US09589948B2 |
Semiconductor device
A semiconductor device has first and second NMOS transistors and an internal circuit, all formed in the same semiconductor substrate. The first NMOS transistor has a gate connected to a power supply terminal configured for connection to a power supply, a source and a back gate connected to an internal ground node, and a drain connected to a ground terminal configured for connection to the power supply. The second NMOS transistor has a gate connected to the ground terminal, a source and a back gate connected to the internal ground node, and a drain connected to the power supply terminal. The internal circuit is configured to operate with a voltage between the power supply terminal and the internal ground node. During a normal connection state in which the power supply is normally connected to the semiconductor device, current flows through the internal circuit and the second NMOS transistor. |
| US09589947B2 |
Semiconductor packages and methods of manufacturing the same
Provided are semiconductor devices and methods of manufacturing the same. The semiconductor package includes a substrate, a first semiconductor chip mounted on the circuit substrate and having a first width, a second semiconductor chip overlying the first semiconductor chip and having a second width greater than the first width, and a first under filler disposed between the first and second semiconductor chips, covering a side surface of the first semiconductor chip and having an inclined side surface. |
| US09589940B2 |
Light emitting device
A light emitting device includes a substrate, a first light emitting element, a second light emitting element, a first conductive pattern, and a second conductive pattern. The first conductive pattern is provided on the substrate and includes a first element mounting portion and a first wire connecting portion. The second conductive pattern is provided on the substrate to form a first wiring gap between the first conductive pattern and the second conductive pattern. A first recess is provided between the first element mounting portion and the first wire connecting portion and is in communication with the first wiring gap. At least a part of an outer shape of the first element mounting portion is defined by the first wiring gap and the first recess on a third side of the first element mounting portion adjacent to the second conductive pattern. |
| US09589932B2 |
Interconnect structures for wafer level package and methods of forming same
Representative methods are disclosed for fabricating device packages having a plurality of dies, a molding compound extending along sidewalls of the plurality of dies, and a polymer layer over and contacting the molding compound. The molding compound comprises a non-planar top surface, and a total thickness variation (TTV) of a top surface of the polymer layer is less than a TTV of the non-planar top surface of the molding compound. The device package further includes a conductive feature on the polymer layer, wherein the conductive feature is electrically connected at least one of the plurality of dies. |
| US09589929B2 |
Method for fabricating stack die package
In one embodiment, a method can include coupling a gate and a source of a first die to a lead frame. The first die can include the gate and the source that are located on a first surface of the first die and a drain that is located on a second surface of the first die that is opposite the first surface. In addition, the method can include coupling a source of a second die to the drain of the first die. The second die can include a gate and a drain that are located on a first surface of the second die and the source that is located on a second surface of the second die that is opposite the first surface. |
| US09589923B2 |
Method of manufacturing semiconductor device
Provided is a semiconductor device having improved reliability. In the semiconductor device in an embodiment, a mark is provided correspondingly to the bonding area of a belt-like wiring exposed from an opening provided in a solder resist. As a result, in an alignment step for the wire bonding area, the coordinate position of the wire bonding area can be adjusted using not the end portion of the opening formed in the solder resist, but the mark formed correspondingly to the wire bonding area as a reference. Also, in the semiconductor device in the embodiment, the mark serving as a characteristic pattern is formed. This allows the wire bonding area to be adjusted based on camera recognition. |
| US09589922B2 |
Electronic module and method of manufacturing the same
An electronic module is provided, which comprises a first carrier; an electronic chip comprising at least one electronic component and arranged on the first carrier; a spacing element comprising a surface arranged on the electronic chip and being in thermal conductive connection with the at least one electronic component; a second carrier arranged on the spacing element; and a mold compound enclosing the electronic chip and the spacing element at least partially; wherein the spacing element comprises a material having a CTE value being matched with at least one other CTE. |
| US09589918B2 |
Memory device structure
A memory device structure includes circuitry formed over a substrate and at least one insulating portion formed over said circuitry, each of which includes a plurality of openings. The memory device also includes a plurality of electrical connections formed in respective openings of the plurality of openings of the at least one insulating portion, at least one bond pad formed within at least one of the at least one insulating portion, and a cap formed over the at least one bond pad. |
| US09589917B1 |
Microwave monolithic integrated circuit (MMIC) having integrated high power thermal dissipating load
A Microwave Monolithic Integrated Circuit (MMIC) having an integrated high power load. The MMIC includes a microwave transmission line and a resistive load coupled to a terminating end of the microwave transmission line. The resistive load comprises a hollow resistive material disposed on sidewalls of a via passing through a substrate, the resistive material having an upper portion electrically connected to a terminating end of a strip conductor of the microwave transmission line strip conductor and a lower portion electrically connected to the ground plane. |
| US09589911B1 |
Integrated circuit structure with metal crack stop and methods of forming same
Embodiments of the present disclosure provide an integrated circuit (IC) structure with a metal crack stop and methods of forming the same. An IC structure according to embodiments of the present disclosure can include an insulator positioned over a substrate; a barrier film positioned over the insulator; an interlayer dielectric positioned over the barrier film; and a metal crack stop positioned over the substrate and laterally adjacent to each of the insulator, the barrier film, and the interlayer dielectric, wherein the metal crack stop includes a sidewall having a first recess therein, and wherein a horizontal interface between the barrier film and the interlayer dielectric intersects the sidewall of the metal crack stop. |
| US09589908B1 |
Methods to improve BGA package isolation in radio frequency and millimeter wave products
A method and apparatus are provided for manufacturing a packaged electronic device (200) which includes a carrier substrate (120) in which conductive interconnect paths (122) extend between first and second opposed surfaces, an integrated circuit die (125) affixed to the first surface of the carrier substrate for electrical connection to the plurality of conductive interconnect paths, and an array of conductors (110), such as BGA, LGA, PGA, C4 bump or flip chip conductors, affixed to the second surface of the carrier substrate for electrical connection to the plurality of conductive interconnect paths, where the array comprising a signal feed ball (112) and an array of shielding ground balls (111) surrounding the signal feed ball. |
| US09589906B2 |
Semiconductor device package and method of manufacturing the same
The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor package comprises a die pad, a row of leads, a component, a package body, and a conformal shield. The die pad has a top surface. The row of leads comprises a first lead and a second lead, and the row of leads is arranged along a side of the die pad. The first lead has a first lateral surface, and the second lead has a second lateral surface. The component is disposed on the top surface of the die pad. The package body encapsulates the component, the die pad, the first lead, and the second lead, exposes the first lateral surface of the first lead, and covers the second lateral surface of the second lead. The conformal shield covers the package body and connects to the first lateral surface of the first lead. |
| US09589905B2 |
EMI shielding in semiconductor packages
A semiconductor package includes a substrate, a chip disposed over a top surface of the substrate, an electromagnetic interference (EMI) shielding layer disposed over the substrate such that the EMI shielding layer surrounds the chip, a ground pad disposed in the substrate to contact a bottom surface of the substrate, and a test pad disposed in the substrate to contact the bottom surface of the substrate and spaced apart from the ground pad. A method of testing the semiconductor package is performed using a loop circuit to which a current is applied, the loop circuit being formed by electrically coupling the ground pad, the EMI shielding layer, and the test pad. |
| US09589899B2 |
Semiconductor device having a gate cutting region and a cross-coupling pattern between gate structures
In a semiconductor device, a first gate structure having a first end portion is formed on a substrate. A second gate structure is formed on the substrate, and has a second end portion opposite to the first end portion of the first gate structure in a diagonal direction. A cross-coupling pattern is formed between the first and second gate structure, and electrically connects the first and second gate structures to each other. A first contact plug directly contacts an upper portion of the first end portion of the first gate structure and a first upper sidewall of the cross-coupling pattern. A second contact plug directly contacts an upper portion of the second end portion of the second gate structure and a second upper sidewall of the cross-coupling pattern. In the semiconductor device, a parasitic capacitance due to the cross-coupling structure may decrease. |
| US09589898B2 |
Semiconductor device having air-gap and method for manufacturing the same
A semiconductor device in which an air-gap located at a side of a bit line stack is extended to an upper part of the bit line stack is disclosed. An embodiment includes: a bit line stack; a plurality of storage node contacts located at both sides of the bit line stack; and an air-gap located between the bit line stack and the storage node contacts, and extended above the bit line stack. |
| US09589896B2 |
Electroless metal deposition on a manganese or manganese nitride barrier
An electronic circuit structure comprising a substrate, a dielectric layer on top of the substrate and comprising a cavity having side-walls, a manganese or manganese nitride layer covering the side-walls, and a self-assembled monolayer, comprising an organic compound of formula Z-L-A, covering the manganese or manganese nitride layer, wherein Z is selected from the list consisting of a primary amino group, a carboxylic acid group, a thiol group, a selenol group and a heterocyclic group having an unsubstituted tertiary amine in the cycle, wherein L is an organic linker comprising from 1 to 12 carbon atoms and from 0 to 3 heteroatoms, and wherein A is a group attaching the linker to the manganese or manganese nitride layer. |
| US09589886B2 |
Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus
A semiconductor device is provided having a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings. |
| US09589885B2 |
Device having multiple-layer pins in memory MUX1 layout
An integrated circuit (IC) memory device includes a first conductive layer. The IC memory device also includes a second conductive layer over the first conductive layer. The IC memory device further includes a first-type pin box electrically coupled with the first conductive layer. The IC memory device additionally includes a second-type pin box, different from the first-type pin box, electrically coupled with the second conductive layer. |
| US09589880B2 |
Method for processing a wafer and wafer structure
A method for processing a wafer in accordance with various embodiments may include: removing wafer material from an inner portion of the wafer to form a structure at an edge region of the wafer to at least partially surround the inner portion of the wafer, and printing material into the inner portion of the wafer using the structure as a printing mask. A method for processing a wafer in accordance with various embodiments may include: providing a carrier and a wafer, the wafer having a first side and a second side opposite the first side, the first side of the wafer being attached to the carrier, the second side having a structure at an edge region of the wafer, the structure at least partially surrounding an inner portion of the wafer; and printing material onto at least a portion of the second side of the wafer. |
| US09589876B2 |
Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection
A semiconductor device is made by forming solder bumps over a copper carrier. Solder capture indentations are formed in the copper carrier to receive the solder bumps. A semiconductor die is mounted to the copper carrier using a die attach adhesive. The semiconductor die has contact pads formed over its active surface. An encapsulant is deposited over the copper carrier, solder bumps, and semiconductor die. A portion of the encapsulant is removed to expose the solder bumps and contact pads. A conductive layer is formed over the encapsulant to connect the solder bumps and contact pads. The conductive layer operates as a redistribution layer to route electrical signals from the solder bumps to the contact pads. The copper carrier is removed. An insulating layer is formed over the conductive layer and encapsulant. A plurality of semiconductor devices can be stacked and electrically connected through the solder bumps. |
| US09589874B2 |
Assembly of an integrated circuit chip and of a plate
An assembly is made of an integrated circuit chip and a plate. At least one channel is arranged between the chip and the plate. The channel is delimited by metal sidewalls at least partially extending from one surface of the chip to an opposite surface of the plate. The assembly is encapsulated in a body that includes an opening extending to reach the channel. The plate may be one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate. |
| US09589870B2 |
Semiconductor device and lead frame used for the same
A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame. |
| US09589868B2 |
Packaging solutions for devices and systems comprising lateral GaN power transistors
Packaging solutions for large area, GaN die comprising one or more lateral GaN power transistor devices and systems are disclosed. Packaging assemblies comprise an interposer sub-assembly comprising the lateral GaN die and a leadframe. The GaN die is electrically connected to the leadframe using bump or post interconnections, silver sintering, or other low inductance interconnections. Then, attachment of the GaN die to the substrate and the electrical connections of the leadframe to contacts on the substrate are made in a single process step. The sub-assembly may be mounted in a standard power module, or alternatively on a substrate, such as a printed circuit board. For high current applications, the sub-assembly also comprises a ceramic substrate for heat dissipation. This packaging scheme provides interconnections with lower inductance and higher current capacity, simplifies fabrication, and enables improved thermal matching of components, compared with conventional wirebonded power modules. |
| US09589867B2 |
Semiconductor device
A semiconductor device includes: a semiconductor element having a gate and source electrodes; an insulating substrate which is provided with an insulating plate, a first circuit plate and a second circuit plate, the first circuit plate provided in a main surface of the insulating plate to be electrically connected to the gate electrode, the second circuit plate provided in the main surface to surround the first circuit plate and to be electrically connected to the source electrode; a first terminal, being column-shaped and electrically and mechanically connected to the first circuit plate; and a second terminal which is provided with a cylindrical body portion and support portions, the body portion has a through hole into which the first terminal is inserted with a gap, the support portions disposed in end portions of the body portion and electrically and mechanically connected to the second circuit plate. |
| US09589866B2 |
Bridge interconnect with air gap in package assembly
Embodiments of the present disclosure are directed towards techniques and configurations for a bridge interconnect assembly that can be embedded in a package assembly. In one embodiment, a package assembly includes a package substrate configured to route electrical signals between a first die and a second die and a bridge embedded in the package substrate and configured to route the electrical signals between the first die and the second die, the bridge including a bridge substrate, one or more through-hole vias (THVs) formed through the bridge substrate, and one or more traces disposed on a surface of the bridge substrate to route the electrical signals between the first die and the second die. Routing features including traces and a ground plane of the bridge interconnect assembly may be separated by an air gap. Other embodiments may be described and/or claimed. |
| US09589865B2 |
Power amplifier die having multiple amplifiers
An apparatus, a semiconductor package including the apparatus and a method are disclosed. The apparatus includes a semiconductor die having second stages of power amplifier disposed over a module substrate. The module substrate includes a plurality of layers, pluralities of vias, and pluralities of routing layers for heat dissipation and electrical connections. |
| US09589857B2 |
Interposer test structures and methods
An embodiment of the disclosure is a structure comprising an interposer. The interposer has a test structure extending along a periphery of the interposer, and at least a portion of the test structure is in a first redistribution element. The first redistribution element is on a first surface of a substrate of the interposer. The test structure is intermediate and electrically coupled to at least two probe pads. |
| US09589856B2 |
Automatically adjusting baking process for low-k dielectric material
A method includes etching a low-k dielectric layer on a wafer to form an opening in the low-k dielectric layer. An amount of a detrimental substance in the wafer is measured to obtain a measurement result. Process conditions for baking the wafer are determined in response to the measurement result. The wafer is baked using the determined process conditions. |
| US09589854B2 |
Alignment monitoring structure and alignment monitoring method for semiconductor devices
The present disclosure provides in various aspects an alignment monitoring structure and method for monitoring the alignment between a target gate conductor and the corresponding target contact in a semiconductor device, for example, in a CMOS. In accordance with some illustrative embodiments herein, a structure with a plurality of gate conductors disposed over the substrate so as to define a row of parallel gate conductors and a plurality of first contacts is provided, wherein each of the first contacts is disposed between two adjacent gate conductors so as to define a first lateral distance between a first gate conductor and the first contact and a second lateral distance between the first contact and a second gate conductor, and wherein the first lateral distance and the second lateral distance vary systematically along the row of parallel gate conductors. |
| US09589853B2 |
Method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber
A method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber comprises supporting the substrate on a support surface of a substrate support assembly that includes an array of independently controlled thermal control elements therein which are operable to control the spatial and temporal temperature of the support surface of the substrate support assembly to form independently controllable heater zones which are formed to correspond to a desired temperature profile across the upper surface of the semiconductor substrate. The etch rate across the upper surface of the semiconductor substrate during plasma etching depends on a localized temperature thereof wherein the desired temperature profile is determined such that the upper surface of the semiconductor substrate is planarized within a predetermined time. The substrate is plasma etched for the predetermined time thereby planarizing the upper surface of the substrate. |
| US09589851B2 |
Dipole-based contact structure to reduce metal-semiconductor contact resistance in MOSFETs
A transistor device includes a substrate; a source region and a drain region formed over the substrate; and a source/drain contact formed in contact with at least one of the source region and the drain region, the source/drain contact including a conductive metal and a bilayer disposed between the conductive metal and the at least one of the source and drain region, the bilayer including a metal oxide layer in contact with the conductive metal, and a silicon dioxide layer in contact with the at least one of the source and drain region. |
| US09589850B1 |
Method for controlled recessing of materials in cavities in IC devices
Controlled recessing of materials in cavities and resulting devices are disclosed. Embodiments include providing a dielectric layer over first-type and second-type transistor regions, and long and short channel-cavities in the dielectric in each transistor region; conformally forming a gate dielectric layer in the long and short channel-cavities, and on an upper surface of the dielectric; conformally forming a first-type work-function metal layer on the gate dielectric; forming a block-mask over the first-type transistor region; removing the first-type work-function metal from the second-type transistor region; removing the block-mask; conformally forming a second-type work-function metal on all exposed surfaces; forming a metal barrier layer on exposed surfaces and filling the short channel-cavities; filling the long channel-cavities with a conductive material; planarizing all layers down to the upper surface of the dielectric; and applying a tilted ion beam to recess the gate dielectric, first and second type work-function metal, and metal barrier layers. |
| US09589849B2 |
Methods of modulating strain in PFET and NFET FinFET semiconductor devices
One illustrative method disclosed herein includes, among other things, forming a plurality of initial fins that have the same initial axial length and the same initial strain above a substrate, performing at least one etching process so as to cut a first fin to a first axial length and to cut a second fin to a second axial length that is less than the first axial length, wherein the cut first fin retains a first amount of the initial strain and the cut second fin retains about zero of the initial strain or a second amount of the initial strain that is less than the first amount, and forming gate structures around the first and second cut fins to form FinFET devices. |
| US09589840B2 |
Semiconductor package and manufacturing method thereof
The present disclosure relates to a semiconductor package and a manufacturing method thereof. The semiconductor package includes a semiconductor element including a main body, a plurality of conductive vias, and at least one filler. The conductive vias penetrate through the main body. The filler is located in the main body, and a coefficient of thermal expansion (CTE) of the filler is different from that of the main body and the conductive vias. Thus, the CTE of the overall semiconductor element can be adjusted, so as to reduce warpage. |
| US09589839B1 |
Method of reducing control gate electrode curvature in three-dimensional memory devices
Corner rounding of electrically conductive layers in a replacement electrode integration scheme can be alleviated by employing compositionally modulated sacrificial material layers. An alternating stack of insulating layers and compositionally modulated sacrificial material layers can be formed over a substrate. Each of the compositionally modulated sacrificial material layers has a vertical modulation of material composition such that each compositionally modulated sacrificial material layer provides greater resistance to conversion into a silicon-oxide-containing material at upper and lower portions thereof than at a middle portion thereof during a subsequent oxidation process. Bird's beak features can be formed with lesser dimensions, and electrically conductive layers formed by replacement of remaining portions of the sacrificial material layers with a conductive material can have less corner rounding. Reduction in corner rounding can increase effectiveness of the control gates for a three-dimensional memory device. |
| US09589838B2 |
Contact structure of semiconductor device
The invention relates to a contact structure of a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate; an inter-layer dielectric (ILD) layer having an opening over the strained material, wherein the opening comprises dielectric sidewalls and a strained material bottom; a dielectric layer coating the sidewalls and bottom of the opening, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; and a metal layer filling a coated opening of the dielectric layer. |
| US09589832B2 |
Maintaining mask integrity to form openings in wafers
One or more openings in an organic mask layer deposited on a first insulating layer over a substrate are formed. One or more openings in the first insulating layer are formed through the openings in the organic mask using a first iodine containing gas. An antireflective layer can be deposited on the organic mask layer. One or more openings in the antireflective layer are formed down to the organic mask layer using a second iodine containing gas. The first insulating layer can be deposited on a second insulating layer over the substrate. One or more openings in the second insulating layer can be formed using a third iodine containing gas. |
| US09589829B1 |
FinFET device including silicon oxycarbon isolation structure
A method includes forming a plurality of fins on a semiconductor substrate by defining a plurality of trenches in the substrate. A first insulating material layer comprising silicon, oxygen and carbon is formed in the trenches between the plurality of fins. The first insulating material layer has an upper surface that is at a level that is below an upper surface of the fins. A second insulating material layer is formed above the first insulating material layer. The second insulating material layer is planarized to expose a top surface of the plurality of fins. The second insulating material layer is removed to expose the first insulating material layer. |
| US09589826B2 |
Sample holder
A sample holder includes a substrate composed of ceramics, having a sample holding surface provided in an upper face thereof; a supporting member composed of metal, an upper face of the supporting member covering a lower face of the substrate; and a joining layer composed of indium or an indium alloy, the substrate and the supporting member being joined to each other via the joining layer. The joining layer has a layer region in at least one of a joining surface to the substrate and a joining surface to the supporting member, a content percentage of indium oxides of the layer region being higher than that of an intermediate region in a thickness direction of the joining layer. |
| US09589820B2 |
Semiconductor apparatus and adjustment method
A semiconductor apparatus is provided. The semiconductor apparatus includes a wafer chuck configured to hold a wafer, and a first nozzle configured to dispense first chemical liquid onto the wafer. The semiconductor apparatus also includes a second nozzle configured to dispense second chemical liquid onto the wafer at a first dispensing time after the first nozzle stops dispensing the first chemical liquid. The semiconductor apparatus also includes an image device configured to take images of the first nozzle and the second nozzle in sequence, and a processing module configured to analyze the images. The processing module adjusts the first dispensing time when a first defect image shows the first chemical liquid and the second chemical liquid existing in a space close to the first and the second nozzles and flowing to the wafer. |
| US09589817B2 |
Dryer
A dryer comprising an enclosure and a transporter for transporting one or more components therethrough between a first and a second opening. The dryer includes one or more heating elements and a first and a second duct within the enclosure. The first and said second duct each include a plurality of openings configured for discharging heated air towards the one or more components. An exhaust stack in fluid communication with an interior of the enclosure includes an exhaust blower for extracting fluid from within the enclosure, and one or more heating elements for oxidizing the vaporized compounds. The supply and the exhaust blowers cooperatively operate to induce infiltration of air through the first and the second opening. A method for operating the dryer is also provided. |
| US09589815B2 |
Semiconductor IC packaging methods and structures
An IC packaging method is provided. The method includes providing a semiconductor substrate. The semiconductor substrate has a metal pad and an insulating layer and the insulating layer has an opening to expose the meal pad. The method also includes forming an under-the-ball meal electrode on the exposed metal pad. The under-the-ball metal electrode has an electrode body and an electrode tail, the electrode body is located at a bottom portion of the under-the-ball metal electrode and is in contact with the metal pad, and the electrode tail is located at a top portion of the under-the-ball meal electrode. Further, the method includes forming a solder ball on the under-the-ball metal electrode. |
| US09589814B2 |
Semiconductor device packages and methods of manufacturing the same
A semiconductor device package may include: a semiconductor chip element; and a supporting structure on which the semiconductor chip element is mounted and including an electrical connection element for connecting the semiconductor chip element to an external terminal. The supporting structure may include: a first lead frame including a heat dissipation element; a second lead frame coupled to the first lead frame; and/or an insulator configured to electrically insulate the first and second lead frames from each other. Each of the first and second lead frames may include a mounting region on which the semiconductor chip element is mounted. The first lead frame may include: a first portion; and/or a second portion formed on the first portion and having a smaller width than that of the first portion. The insulator may be on the first portion around the second portion. The second lead frame may be on the insulator. |
| US09589811B2 |
FinFET spacer etch with no fin recess and no gate-spacer pull-down
A method may include providing a patterned feature extending from a substrate plane of a substrate, the patterned feature including a semiconductor portion and a coating in an unhardened state extending along a top region and along sidewall regions of the semiconductor portion; implanting first ions into the coating, the first ions having a first trajectory along a perpendicular to the substrate plane, wherein the first ions form a etch-hardened portion comprising a hardened state disposed along the top region; and directing a reactive etch using second ions at the coating, the second ions having a second trajectory forming a non-zero angle with respect to the perpendicular, wherein the reactive etch removes the etch-hardened portion at a first etch rate, wherein the first etch rate is less than a second etch rate when the second ions are directed in the reactive etch to the top portion in the unhardened state. |
| US09589810B2 |
Manufacturing method of power MOSFET using a hard mask as a CMP stop layer between sequential CMP steps
A manufacturing method of a power MOSFET employs a hard mask film over a portion of the wafer surface as a polishing stopper, between two successive polishing steps. After embedded epitaxial growth is performed in a state where a hard mask film for forming trenches is present in at least a scribe region of a wafer, primary polishing is performed by using the hard mask film as a stopper, and secondary polishing is then performed after the hard mask film is removed. |
| US09589809B2 |
Method of depositing tungsten layer with improved adhesion and filling behavior
A method of depositing a tungsten (W) layer is disclosed. In one aspect, the method includes depositing a SiH4 base W film on a surface of a substrate to preprocess the surface. The method includes depositing a B2H6 base W layer on the preprocessed surface. The SiH4 base W film may be several atom layers thick. The film and base W layer may be deposited in a single ALD process, include reactive gas soak, reactive gas introduction, and main deposition operations. Forming the film may include introducing SiH4 gas into a reactive cavity during the gas soak operation, and introducing SiH4 and WF6 gas into the cavity during the gas introduction operation. The SiH4 and WF6 gases may be alternately introduced, for a number of cycles depending on the thickness of the tungsten layer to be deposited. |
| US09589808B2 |
Method for depositing extremely low resistivity tungsten
Methods for depositing extremely low resistivity tungsten in semiconductor processing are disclosed herein. Methods involve annealing the substrate at various times during the tungsten deposition process to achieve uniform tungsten layers with substantially lower resistivity. |
| US09589806B1 |
Integrated circuit with replacement gate stacks and method of forming same
An IC structure including: a first replacement gate stack for the pFET, the first replacement gate stack including: an interfacial layer in a first opening in the dielectric layer; a high-k layer over the interfacial layer in the first opening; a pFET work function metal layer over the high-k layer in the first opening; and a first gate electrode layer over the pFET work function metal layer and substantially filling the first opening; and a second replacement gate stack for the nFET, the second gate stack laterally adjacent to the first gate stack and including: the interfacial layer in a second opening in the dielectric layer; the high-k layer over the interfacial layer in the second opening; a nFET work function metal layer over the high-k layer in the second opening; and a second gate electrode layer over the nFET work function metal layer and substantially filling the second opening. |
| US09589804B2 |
Method of forming finFET gate oxide
A semiconductor device includes a semiconductor fin, a lining oxide layer, a silicon nitride based layer and a gate oxide layer. The semiconductor fin has a top surface, a first side surface adjacent to the top surface, and a second side surface which is disposed under and adjacent to the first side surface. The lining oxide layer peripherally encloses the second side surface of the semiconductor fin. The silicon nitride based layer is disposed conformal to the lining oxide layer. The gate oxide layer is disposed conformal to the top surface and the first side surface. |
| US09589799B2 |
High selectivity and low stress carbon hardmask by pulsed low frequency RF power
Methods of forming high etch selectivity, low stress ashable hard masks using plasma enhanced chemical vapor deposition are provided. In certain embodiments, the methods involve pulsing low frequency radio frequency power while keeping high frequency radio frequency power constant during deposition of the ashable hard mask using a dual radio frequency plasma source. According to various embodiments, the low frequency radio frequency power can be pulsed between non-zero levels or by switching the power on and off. The resulting deposited highly selective ashable hard mask may have decreased stress due to one or more factors including decreased ion and atom impinging on the ashable hard mask and lower levels of hydrogen trapped in the ashable hard mask. |
| US09589794B2 |
Hot-wire method for depositing semiconductor material on a substrate and device for performing the method
A hot wire device and method for depositing semiconductor material onto a substrate in a deposition chamber in which the ends of at least two filaments are clamped into a filament holder and heated by supplying current, wherein a voltage for generating an electrical current is applied in temporal succession to filaments made of differing materials so that a number of differing semiconductors corresponding to the number of consecutively heated filament materials can be consecutively deposited onto the substrate without opening the chamber. |
| US09589789B2 |
Compositions of low-K dielectric sols containing nonmetallic catalysts
A sol composition for producing a porous low-k dielectric material is provided. The composition can include at least one silicate ester, a polar solvent, water, an acid catalyst for silicate ester hydrolysis, an amphiphilic block copolymer surfactant, and a nonmetallic catalyst that reduces dielectric constant in the produced material. The composition can further include a metallic ion at a lower parts-per-million concentration than the nonmetallic catalyst, and/or the composition can further include a cosolvent. A method of preparing a thin film on a substrate using the sol composition is also provided. |
| US09589788B2 |
Polymer with a good heat resistance and storage stability, underlayer film composition containing the polymer and process for forming underlayer film using the composition
Provided are a polymer for an underlayer film, used in semiconductor and display manufacturing processes, an underlayer film composition for semiconductor and display manufacturing processes, containing the same, and a method for forming an underlayer film for semiconductor and display manufacturing processes using the underlayer film composition. The polymer according to the present invention is a polymer including a repeating unit represented by the following Chemical Formula 1: in Chemical Formula 1, Ar, R1 to R6, L, and R′ and R″ are the same as those in the detailed description of the present invention. |
| US09589786B2 |
Method for polishing a polymer surface
A method for polishing a polymer surface is provided by an embodiment of the present invention. The method includes: curing the polymer surface; polishing the polymer surface cured through a CMP process. By using the method for polishing a polymer surface provided by embodiments of the present invention, the mentioned problems in the prior art are solved. The uniformity of the polymer surface can be improved to <1% through a CMP process, which can meet the requirements of high density and small linewidth integration. |
| US09589784B2 |
Illuminant and operating method therefor
The invention relates to an illuminant having a gas volume and a coaxial HF energy coupling device for the excitation thereof using surface waves. It is provided in this case that the coaxial HF energy coupling device (3) has a central conductor (4) guided in the gas volume (2). |
| US09589782B2 |
Charged droplets generating apparatus including a gas conduit for laminarization of gas flows
Techniques are provided for generating charged droplets of liquid entrained within a gas flow within a vacuum chamber and for controlling the gas flow. The gas flow with the entrained charged droplets of liquid is jetted into the vacuum chamber along a predetermined jetting axis. The gas jet is received within a gas conduit housed within the vacuum chamber and having a conduit bore coaxial with the predetermined jetting axis. The received gas jet is caused to be restrained to form a laminar gas flow entrained with charged droplets inside of the gas conduit for guiding the entrained charged droplets therealong. |
| US09589778B2 |
Multi-dopant permeation tube with two chambers for introducing dopants into a spectrometry system
Aspects and embodiments of the present invention are directed to spectrometry systems and for apparatus and methods for delivering dopants to same. In one example, there is provided a dopant delivery device configured to supply dopants to a spectrometry system comprising a tube including a first chamber and a second chamber, a first dopant source included in the first chamber, and a second dopant source included in the second chamber. |
| US09589776B2 |
Ruggedized advanced identification mass spectrometer
A dual-ionization mass spectrometer includes a first mass spectrometer module forming a hard ionization mass spectrometer, a second mass spectrometer forming a soft ionization mass spectrometer, a vacuum ultraviolet light source positioned between the first and second modules, a housing encompassing the first and second sets of plates and the light source, and an inlet positioned to receive a sample of an analyte and provide it to at least one of the sets of plates. A method of detecting a substance includes receiving a sample of an analyte into a housing through an inlet, performing soft ionization mass spectrometry on the sample with a soft ionization mass spectrometer in the housing, performing hard ionization spectrometry on the sample with a hard ionization spectrometer in the housing if needed, and generating a detection result from at least one of the soft ionization spectrometry and the hard ionization spectrometry. |
| US09589773B2 |
In-situ etch rate determination for chamber clean endpoint
Embodiments described herein relate to methods for determining a cleaning endpoint. A first plasma cleaning process may be performed in a clean chamber environment to determine a clean time function defined by a first slope. A second plasma cleaning process may be performed in an unclean chamber environment to determine a clean time function defined by a second slope. The first and second slope may be compared to determine a clean endpoint time. |
| US09589771B2 |
Plasma processing apparatus
Disclosed is a plasma processing apparatus capable of more accurately controlling plasma. The plasma processing apparatus includes a shower head provided within a processing chamber, in which a substrate accommodated therein is processed, to be faced to a mounting table for mounting the substrate and supply gas from a plurality of gas discharging holes provided on a facing surface that faces the mounting table toward a substrate in a shower pattern; a plurality of exhaust holes that passes through a surface located at an opposite side to the facing surface of the shower head; a circular plate-like body that is disposed parallel to the opposite surface in a exhaust space that communicates with the exhaust holes distributed at the opposite surface and made of a conductive material; and a moving unit configured to move the plate-like body to change a distance between the exhaust holes and the plate-like body. |
| US09589769B2 |
Apparatus and method for efficient materials use during substrate processing
A processing apparatus may include a plasma chamber to house a plasma; and an extraction assembly disposed along a side of the plasma chamber. The extraction assembly may be configured to direct ions from the plasma to a substrate, wherein the ions generate etched species comprising material that is etched from the substrate; and wherein the extraction assembly comprises at least one component having a recess that faces the substrate and is configured to intercept and retain the etched species. |
| US09589768B2 |
Method and apparatus for producing a reflection-reducing layer on a substrate
The invention relates to an apparatus (1) for producing a reflection-reducing layer on a surface (21) of a plastics substrate (20). The apparatus comprises a first sputtering device (3) for applying a base layer (22) to the surface (21) of the plastics substrate (20), a plasma source (4) for plasma-etching the coated substrate surface (21), and a second sputtering device (5) for applying a protective layer (24) to the substrate surface (21). These processing devices (3, 4, 5) are arranged jointly in a vacuum chamber (2), which has inlets (8) for processing gases. In order to move the substrate (20) between the processing devices (3, 4, 5) in the interior of the vacuum chamber (2), a conveying apparatus (10) is provided which is preferably in the form of a rotary table (11). Furthermore, the invention relates to a method for producing such a reflection-reducing layer on the surface (21) of the plastics substrate (20). |
| US09589762B2 |
Deflection plate and deflection device for deflecting charged particles
A deflection plate for deflecting charged particles, the plate comprising a recess is provided. |
| US09589760B2 |
X-ray generator
An object of the invention is to provide an X-ray generator having a simple configuration where heat generated in the irradiation window can be prevented from conducting to a desired portion in accordance with the purpose of use, the method of use or the structure of the X-ray tube. In an X-ray generator for releasing X-rays generated by irradiating a target placed in a vacuumed atmosphere within an X-ray tube with an electron beam from an electron source through an irradiation window of the X-ray tube, the irradiation window has thermal anisotropy where the thermal conductivity is different between the direction in which the irradiation window spreads and the direction of the thickness of the irradiation window, and therefore, the thermal conductivity in the direction in which the heat from the irradiation window is desired not to conduct is made relatively smaller. |
| US09589758B2 |
Vacuum tube
An object of the present invention is to provide a vacuum tube with a structure close to that of an inexpensive and easily available vacuum fluorescent display which easily operates as an analog amplifier. A vacuum tube subject to the present invention comprises: a filament which is tensioned linearly and emits thermoelectrons, an anode arranged parallel to the filament, and a grid arranged between the filament and the anode such that the grid faces the anode. The present invention is characterized in that a distance between the filament and the grid is between 0.2 mm and 0.6 mm, including 0.2 mm and 0.6 mm. |
| US09589754B2 |
Electric contactor and control method of one such contactor
The electrical contactor (100) according to the invention comprises at least one first switch (104) that includes a first moving contact (112) and several second switches (106) that include a second moving contact (116). The contactor further comprises at least one control device for controlling the movement of the or each first (112), second (116) moving contact, respectively. The control device is capable of controlling the movement of the or each first moving contact (112) into the open position before that of each second moving contact (116) into the open position, and when the or each first moving contact (112) is in the closed position, the second switches (106) are connected in parallel, whereas when the or each first moving contact (112) is in the open position, the second switches (106) are connected in series. |
| US09589748B2 |
Cycle selector knob to rotary encoder user interface
A cycle selector knob to rotary encoder user interface for the operation of an appliance has a knob for rotating a shaft of a rotary encoder wherein the shaft is received by a control panel barrel to provide radial and thrust bearing surfaces. The knob has an axial boss dimensioned to affix to the shaft and bear against the radial bearing surface of the barrel and a shoulder to bear against the thrust bearing surface of the barrel. The control panel is secured to a console so that radial and thrust forces of the knob are directed via the radial and thrust bearing surfaces only to the console through the control panel. |
| US09589747B2 |
Operating device
An operating device includes an operation member to be push-operated by an operator, a body mounting the operation member so as to be push-operated by the operator, a columnar portion protruding from a surface of the body opposite the operation member; and a resiliently deformable click member disposed between the columnar portion and the operation member to impart a click feeling to the operator. The click member includes a first member located on a side of the operation member and a second member located on a side of the columnar portion and having a smaller external size than the first member. |
| US09589744B2 |
Spring control device for a circuit breaker
For application to medium- and high-voltage circuit breakers, the control device makes it possible to actuate opening of the circuit breakers used in the medium- and high-voltage networks very quickly. The spring used in the control device is a spring of the composite type, having a curved C- or Ω-shape. The spring has a stationary first end and a movable second end that is pivotally connected to the end of a lever device, that is itself constrained to rotate with the drive shaft of the control device. |
| US09589736B2 |
Dye-sensitized solar cell element
A dye-sensitized solar cell (DSC) element includes at least one DSC, and the DSC includes a first electrode, a second electrode facing the first electrode, and an oxide semiconductor layer provided on the first electrode. The oxide semiconductor layer includes a light absorbing layer provided on the first electrode and a reflecting layer as a layer contacting a portion of a first surface of a side opposite to the first electrode among surfaces of the light absorbing layer and being arranged at a position farthest from the first electrode. The first surface of the light absorbing layer includes a second surface contacting the reflecting layer, and a surface area S1 of the first surface and a surface area S2 of the second surface satisfy the following formula: 0.7≦S2/S1<1 The reflecting layer is arranged in an inner side of the first surface of the light absorbing layer. |
| US09589735B2 |
Materials that include conch shell structures, methods of making conch shell structures, and devices for storing energy
Embodiments of the present disclosure provide for materials that include conch shell structures, methods of making conch shell slices, devices for storing energy, and the like. |
| US09589733B2 |
Stable solid electrolytic capacitor containing a nanocomposite
A solid electrolytic capacitor that includes an anode body, dielectric overlying the anode body, and solid electrolyte that overlies the dielectric is provided. The solid electrolyte includes a nanocomposite that contains a plurality of nanofibrils dispersed within a conductive polymer matrix. The nanofibrils have a relatively small size and high aspect ratio, which the present inventors have discovered can dramatically improve the thermal-mechanical stability and robustness of the resulting capacitor. |
| US09589731B2 |
MEMS variable capacitor with enhanced RF performance
In a MEMS device, the manner in which the membrane lands over the RF electrode can affect device performance. Bumps or stoppers placed over the RF electrode can be used to control the landing of the membrane and thus, the capacitance of the MEMS device. The shape and location of the bumps or stoppers can be tailored to ensure proper landing of the membrane, even when over-voltage is applied. Additionally, bumps or stoppers may be applied on the membrane itself to control the landing of the membrane on the roof or top electrode of the MEMS device. |
| US09589726B2 |
Magnetically enhanced energy storage systems and methods
In one embodiment, a system, comprising: a first non-magnetic conductive electrode; a second non-magnetic conductive electrode; a dielectric layer disposed between the first and second electrodes, the dielectric layer extending between the first and second electrodes; and first and second layers comprising plural pairs of magnetically coupled pairings of discrete magnets, the first and second layers separated by a non-magnetic material, wherein the magnets of at least the first layer are conductively connected to the first non-magnetic conductive electrode. |
| US09589720B2 |
Signal transmission device and switching power supply
A signal transmission device of aspects of the invention can include a master circuit connected to the primary sides of first and second transformers and a slave circuit connected to the secondary sides of the first and second transformers. The master circuit sets one of first and second transmitting/receiving circuits for transmitting operation and the other for receiving operation according to a control signal, and detecting a leading edge and a falling edge of the control signal, transmits a pulse signal with the pulse interval changing after a predetermined period of time. The slave circuit detects the change of the pulse interval of the signal received through third and fourth transmitting/receiving circuits and according to the detection result, sets one of the third and fourth transmitting/receiving circuits for receiving operation and the other for transmitting operation. |
| US09589715B2 |
Magnetic substance holding device
A magnetic substance holding device includes: a first pole piece assembly including a first N-pole piece, a first S-pole piece, and a first permanent magnet; a second pole piece assembly including a second N-pole piece, a second S-pole piece, and a second permanent magnet; at least one first coil; at least one second coil; and a control device controlling current applied to the first coil and the second coil so as to control magnetic fluxes passing through the first coil and the second coil, thereby allowing the first pole piece assembly and the second pole piece assembly to switch between the first arrangement and the second arrangement, to control magnetic fluxes passing through the holding faces of the first pole piece assembly and the second pole piece assembly. |
| US09589712B2 |
Iron-based soft magnetic powder and production method thereof
Disclosed is an iron-based soft magnetic powder obtained by preparing an iron-oxide-based soft magnetic powder through water atomization, and thermally reducing the iron-oxide-based soft magnetic powder. The iron-based soft magnetic powder has an average particle size of 100 μm or more and has an interface density of more than 0 μm−1 and less than or equal to 2.6×10−2 μm−1, where the interface density is determined from a cross-sectional area (μm2) and a cross-sectional circumference (μm) of the iron-based soft magnetic powder. The iron-based soft magnetic powder obtained by preparing an iron-oxide-based soft magnetic powder through water atomization and thermally reducing the iron-oxide-based soft magnetic powder, when used for the production of a dust core, can give a dust core having a low coercive force. Also disclosed is a duct core having a low coercive force and exhibiting superior magnetic properties. |
| US09589709B2 |
Method for manufacturing string-like object covered with embroidery material
A method for manufacturing a covered string-like object, the method comprising a placement step of placing a string-like object on a sheet-like flexible backing, a sewing step of sewing the string-like object to the backing with an embroidery material, and a separation step of separating the backing from the string-like object. According to the method for manufacturing a string-like object, a string-like object can be easily and reliably covered with an embroidery material. |
| US09589705B2 |
Cooled power connector with shut off valve, induction heating system, and cable for use with connector
A connector for simultaneously connecting and disconnecting electrical and fluid paths includes an internal valve which activates fluid flow when the two sides of the connector are connected together to provide an electrical connection and deactivates the fluid flow when the connectors are disconnected. The connector bodies can be constructed of metal or other conductive materials providing an electrical connection, and can include holes or apertures to provide fluid paths through the connector bodies. Valves can be included in both mating connectors to prevent or allow fluid flow from both sides of the flow path. |
| US09589704B2 |
Low R, L, and C cable
A cable having low values for resistance, inductance, and capacitance. The cable includes a plurality of conductors for each signal or leg, which may be configured as a braid of three subsets of braids of bonded pairs of insulated conductors. The bonded pairs may be twisted or untwisted, in close proximity such that inductance is reduced via magnetic field cancellation. Each leg may be separate and parallel, rather than interwoven or braided together, increasing the distance between the two signals and reducing capacitance. The legs may be positioned close to each other, such that their magnetic fields cancel to further reduce inductance. |
| US09589701B2 |
Dual axial cable
A dual axial cable may include two substantially parallel and substantially adjacent wires, each wire formed from an electrical conductor surrounded throughout its length by a bifurcated electrical insulator. Each bifurcated electrical insulator may include a first portion of electrically insulative material and a second portion of electrically insulative material having a dielectric constant substantially higher than a dielectric constant of the first portion, such that a cross-section of each wire includes its respective first portion and respective second portion. The cable may be configured such that throughout the length of the cable, the second portions of each of the two wires are substantially adjacent to each other. |
| US09589698B2 |
Conductive polymer material, use of same, and a method for the production of same
The invention relates to a conductive elastomer provided and formed from a base elastomer and conductive solid particles that are distributed therein. The conductive particles used are: a) platelet-shaped conductive particles and/or b) dendritic conductive particles and/or c) other elongated conductive particles with a length:width ratio of greater than or equal to two. It has been seen that a combination of ball-shaped and platelet-shaped conductive particles is particularly advantageous. The particles can additionally be aligned by the pouring, application using a doctor blade, or drawing of the dissolved or not-yet cured mixture. The polymer is particularly suitable for medical electrodes for capturing and emitting signals. The material rennulus elastic, and conductive when stretched or bent. |
| US09589695B2 |
Indium oxide transparent conductive film
An indium oxide sintered compact containing zirconium as an additive, wherein the ratio of atomic concentration of zirconium to the sum of the atomic concentration of indium and the atomic concentration of zirconium is in the range of 0.5 to 4%, the relative density is 99.3% or higher, and the bulk resistance is 0.5 mΩ·cm or less. An indium oxide transparent conductive film of high transmittance in the visible light region and the infrared region, with low film resistivity, and in which the crystallization temperature can be controlled, as well as the manufacturing method thereof, and an oxide sintered compact for use in producing such transparent conductive film are provided. |
| US09589692B2 |
Interdigitated electrode device
An electrode structure has a layer of at least two interdigitated materials, a first material being an electrically conductive material and a second material being an ionically conductive material, the materials residing co-planarly on a membrane in fluid form, at least one of the interdigitated materials forming a feature having an aspect ratio greater than one. A method of forming an electrode structure includes merging flows of an electrically conductive material and a second material in a first direction into a first combined flow, dividing the first combined flow in a second direction to produce at least two separate flows, each separate flow including flows of the electrically conductive material and the second material, merging the two separate flows into a second combined flow, repeating the merging and dividing flow as desired to produce a final combined flow, and depositing the final combined flow as an interdigitated structure in fluid form onto a substrate such that at least one of the materials forms a feature in the structure having an aspect ratio greater than one. |
| US09589689B2 |
Installation comprising a glove box and a glove change device incorporating monitoring of the glove change
Installation comprising at least one glove box (2) provided with a box ring (8) comprising an RFID chip (28), a glove change device (22) provided with an RFID reader (34) and an electronic board (36), a used glove (10, comprising an RFID chip (32) in the box ring (8) and a new glove (110) comprising an RFID chip (132) in the glove change device (22) for the purposes of replacing the used glove (10), a computer (46) intended to gather and process the information read by the RFID reader (34) and stored temporarily in the electronic board (36). |
| US09589684B2 |
Apparatuses and methods for controlling movement of components
An apparatus for controlling movement of a first component integrated with a second component may include a first clamp configured to engage the first component, a second clamp configured to engage the second component, and a plurality of connectors configured to connect the first and second clamps. The connectors may allow movement of the first clamp relative to the second clamp in a first direction between the first and second clamps. The connectors may limit movement of the first clamp relative to the second clamp in a second direction perpendicular to the first direction. |
| US09589683B2 |
Reactor shutdown system
A reactor shutdown system includes a reactor, a control-rod drive unit that can drive a control rod in pulling and inserting directions with respect to a fuel assembly, a power source that can supply power to the control-rod drive unit, and a power converter that is provided between the control-rod drive unit and the power source, in which when power supply is cut off, the control-rod drive unit inserts the control rod into the fuel assembly to stop nuclear reaction in the reactor, and the reactor shutdown system includes a reactor trip breaker provided between the power converter and the control-rod drive unit, a safety protection-system device that controls the reactor trip breaker to cut off power supply to the control-rod drive unit, and a CCF device that controls the power converter to cut off power supply to the control-rod drive unit. |
| US09589681B2 |
Nuclear fuel assembly body and a nuclear fuel assembly with such a body
A nuclear fuel assembly body with a lengthways axis includes first and second tubular segments made from a metal material forming the lengthways ends of the assembly body. A frame made from a metal material connects the first and second segments. The frame is openworked. A ceramic tubular internal structure is positioned between the first and second segments inside the frame. |
| US09589680B2 |
Nuclear fuel rod for fast reactors including metallic fuel slug coated with protective coating layer and fabrication method thereof
A nuclear fuel rod for fast reactors includes a metallic fuel slug coated with a protective coating layer. In embodiments, a nuclear fuel rod for fast reactors includes a uranium and zirconium fuel slug having a single protective coating which is an oxide layer having a thickness in the range of 0.5 μm to 100 μm, and the protective coating layer may be configured to (i) prevent interdiffusion between the fuel slug and a cladding tube during fast reactor operation, and (ii) prevent a cladding tube from thinning during fission operation in a fast reactor. |
| US09589674B2 |
Method of operating memory device and methods of writing and reading data in memory device
In a method of operating a memory device, a command and a first address from a memory controller are received. A read code word including a first set of data corresponding to the first address, a second set of data corresponding to a second address and a read parity data is read from a memory cell array of the memory device. Corrected data are generated by operating error checking and correction (ECC) using an ECC circuit based on the read cord word. |
| US09589672B2 |
Power-aware memory self-test unit
Techniques are disclosed relating to testing logic in integrated circuits based on power being received by the integrated circuit. In one embodiment, an integrated circuit includes a memory and a self-test unit. The self-test unit is configured to receive an indication that identifies a memory block as being in a low-power state and to determine whether to disregard test data read from the one or more memory banks. In some embodiments, the self-test unit may be configured to mask a portion of test result related to the test data that the self-test unit has determined to disregard. The self-test unit may include an error validation logic configured to determine a validity of test data received from a memory based on a power activation status (e.g., whether the memory is powered on or off) associated with the memory. |
| US09589667B2 |
Gate drive circuit and drive method for the same
A gate drive circuit is disclosed. The drive circuit includes M cascaded shift registers, where M is a natural number, and a clock controller configured to generate two reverse-phase clock signals. The drive circuit also includes a high level controller configured to generate a high level signal, and a low level controller configured to generate a low level signal, where one of the high level controller and the low level controller is configured to generate an initial pulse signal during an initial stage. The drive circuit also includes a start unit cascaded with the M shift registers, where the start unit is configured to provide a start signal to the shift registers. |
| US09589666B2 |
Amorphous silicon gate driving circuit, flat panel sensor and display device
An amorphous silicon gate driving circuit includes multiple cascaded shift registers. Each of the shift registers includes a shift register unit, which contains multiple TFTs and multiple capacitors, an N-th output terminal GN, an (N+1)-th output terminal GN+1, a high voltage signal terminal Vgh and a low voltage signal terminal Vgl; and an output control unit having an N-th additional output terminal. The output control unit is configured to control a time period during which the N-th additional output terminal outputs a high voltage level to be within a time period during which the N-th output terminal outputs the high voltage level, where a signal falling edge for turning off TFTs at a former one of two adjacent rows of pixel units is completely separated from a signal rising edge for turning on TFTs at a latter one. |
| US09589664B2 |
Gate driver, array substrate, display panel and display device
The present disclosure discloses a gate driver, an array substrate, a display panel and a display device so as to address problems in the gate driver that some shift register units become abnormal so that a succeeding shift register unit depending upon the shift register unit may not be triggered and consequently the entire GOA circuit may operate improperly and even become inoperative. The gate driver includes N shift register units, each of which is connected with respective one of N gate lines of a display panel, and a plurality of gate units. While a gate unit is enabled, the gate unit is configured to provide a current gate line with an output signal of a corresponding shift register unit connected to a preceding gate line and/or a corresponding shift register unit connected to a succeeding gate line. |
| US09589657B2 |
Internal power supply voltage auxiliary circuit, semiconductor memory device and semiconductor device
The disclosure provides an internal power supply voltage auxiliary circuit for an internal power supply voltage generating circuit, wherein the internal power supply voltage generating circuit includes: a differential amplifier, comparing an internal power voltage supplied to a loading circuit with a predetermined reference voltage, and outputting a control voltage from an output terminal; and a driving transistor, driving an external power voltage according to the control voltage. The internal power supply voltage auxiliary circuit includes: a time sequence detecting circuit, detecting a transition of a data signal, generating and outputting a detecting signal; and an internal power voltage auxiliary supplying circuit, auxiliary supplying a current for the loading circuit based on the detecting signal. Therefore, it is possible to output an internal power voltage stably, while power consumption would not increase greatly, even when being used in the semiconductor memory device with the DDR. |
| US09589655B1 |
Fast soft data by detecting leakage current and sensing time
Systems and methods for low latency acquisition of soft data from a memory cell based on a sensing time and/or a leakage current are described. In one embodiment, the systems and methods may include applying a first read voltage to a word line of a page of memory cells selected by a processor of a flash memory device for a read operation, applying a pass voltage to word lines associated with one or more different pages of memory cells of the memory block, upon applying the first read voltage sensing whether a bit line of a memory cell in the selected page conducts, measuring a side effect associated with sensing whether the bit line of the memory cell in the selected page conducts, and assigning a LLR value to the memory cell as a soft LDPC input based at least in part on the measured side effect. |
| US09589652B1 |
Asymmetric pass field-effect transistor for non-volatile memory
A method of performing an operation on a non-volatile memory (NVM) cell of a memory device is disclosed. The pass transistor of the NVM cell is an asymmetric transistor including a source with a halo implant. The source of the pass transistor is coupled to a common source line (CSL) that is shared among NVM cells of a sector of NVM cells. The operation may be performed by applying a first signal to a word line (WLS) coupled to a gate of a memory transistor of the NVM cell and applying a second signal to a bit line (BL) coupled to a drain of the memory transistor of the NVM cell. |
| US09589648B1 |
Semiconductor memory device
A semiconductor memory device includes a memory string on a well, the memory string including a memory cell connected in series between first and second select transistors, a bit line and a source line respectively connected to the first and second select transistors, a well line connected to the well, first and second select lines respectively connected to gates of the first and second select transistors, a word line connected to a gate of the memory cell transistor, and a control circuit that performs a write operation on the first select transistor, the write operation including a pre-charge operation of the bit line, in which a first voltage is applied to the word line and the second select line, a second voltage higher than the first voltage to the source line and the well line, and a third voltage higher than the first voltage to the first select line. |
| US09589645B2 |
Block refresh to adapt to new die trim settings
Systems, apparatuses, and methods may be provided that adapt to trim set advancement. Trim set advancement may be a change in trim sets over time. A cell of a semiconductor memory may have a first charge level and be programmed with a first trim set. The cell may be reprogrammed by raising the first charge level to a second charge level that corresponds to the cell programmed with a second trim set. |
| US09589644B2 |
Reducing programming disturbance in memory devices
Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a block of memory cells to a precharge voltage during a first portion of a programming operation. A programming voltage can then be applied to a selected memory cell in a selected sub-block of the block of memory cells during a second portion of the programming operation. The selected memory cell is coupled to a same access line as an unselected memory cell in the unselected sub-block. Additional methods and apparatus are disclosed. |
| US09589640B2 |
Data storage device including nonvolatile memory device and operating method thereof
A method of a operating a data storage device including a nonvolatile memory device and a memory controller is provided. The method includes reading a first selection transistors connected to a first selection line from among a plurality of selection lines with a reference voltage, determining whether a first number of selection transistors, from among the first selection transistors, which have a threshold voltage less than the reference voltage is larger than a first reference value, and if the first number is larger than the first reference value, programming the first selection transistors to have threshold voltage larger than or equal to a target voltage. |
| US09589627B1 |
Methods and devices for a DDR memory driver using a voltage translation capacitor
Embodiments relate to systems, methods and computer readable media to enable design and creation of memory driver circuitry using a voltage translation capacitor. One embodiment is high speed level translation memory driver apparatus comprising a plurality of field effect transistors (FETs), complementary metal oxide semiconductor (CMOS) logic gates to drive the FETs, and a voltage translation capacitor with a first terminal of the voltage translation capacitor connected to an output of a second CMOS logic gate and a second terminal of the voltage translation capacitor connected to a gate terminal of a first P-type FET. Additional embodiments including other circuitry, associated methods, and media comprising instructions associated with generation of circuit design files are also described. |
| US09589620B1 |
Destructive reads from spin transfer torque memory under read-write conditions
Systems, apparatuses and methods may provide for detecting a read-write condition in which a read operation from a location in magnetoresistive memory such as spin transfer torque (STT) memory is to be followed by a write operation to the location. Additionally, a current level associated with the read operation may be increased, wherein the read operation is conducted from the location at the increased current level. In one example, the increased current level causes a reset of all bits in the location. |
| US09589619B2 |
Spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy
Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example, disclosed is a three-terminal magnetic tunnel junction (MTJ) storage element that is programmed via a combination of voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT) techniques. Also disclosed is a memory controller configured to program the three-terminal MTJ storage element via VCMA and SOT techniques. The disclosed devices improve efficiency over conventional devices by using less write energy, while having a design that is simpler and more scalable than conventional devices. The disclosed devices also have increased thermal stability without increasing required switching current, as critical switching current between states is essentially the same. |
| US09589612B1 |
Integrated circuit device with embedded programmable logic
Systems and methods are provided to enhance the functionality of an integrated circuit. Such an integrated circuit may include a primary circuitry and an embedded programmable logic programmable to adjust the functionality of the primary circuitry. Specifically, the embedded programmable logic may be programmed to adjust the functionality of the primary circuitry to complement and/or support the functionality of another integrated circuit. Accordingly, the embedded programmable logic may be programmed with functions such as data/address manipulation functions, configuration/testing functions, computational functions, or the like. |
| US09589611B2 |
Memory device, semiconductor device, and electronic device
A column driver includes an amplifier circuit for amplifying data of a read bit line and a latch circuit for retaining the amplified data. The latch circuit includes a pair of nodes Q and QB for retaining complementary data. Data is read from a memory cell in each write target row to a read bit line, and amplified by the amplifier circuit. The amplified data is written to the node Q (or QB) of the latch circuit. In a write target column, write data is input to the latch circuit through the node Q (or QB) to update data of the latch circuit. Then, in each column, data of the latch circuit is written to a write bit line, and the data of the write bit line is written to the memory cell. |
| US09589610B1 |
Memory circuit including pre-charging unit, sensing unit, and sink unit and method for operating same
A memory circuit includes a pre-charging unit configured to charge a metal bit line during a pre-charging period, a sensing unit configured to sense a status of a memory cell coupled to the metal bit line during the pre-charging period, and a sink circuit configured to provide a sink current during the pre-charging period based on the status of the memory cell sensed by the sensing unit. |
| US09589608B2 |
Semiconductor memory device
In a semiconductor memory device storing a resistance difference as information, a long time is taken so as to charge and/or discharge a selected cell by an equalizer circuit, which results in a difficulty of a high speed operation. A selection circuit puts, in a selected state, at least three bit lines which includes a selected bit line connected to a selected memory cell together with unselected bit lines adjacent to the selected bit line on both sides of the selected bit line. The selected and the unselected bit lines are coupled to sense amplifiers through an equalizer circuit. The equalizer circuit puts both the selected and the unselected bit lines into charging states and thereafter puts only the selected bit line into a discharging state to perform a sensing operation. On the other hand, the unselected bit lines are continuously kept at the charging states during the sensing operation. This makes it possible to perform the sensing operation at a high speed with a rare malfunction. |
| US09589605B1 |
Semiconductor memory device with input/output line
Various embodiments relate to a semiconductor device. The semiconductor device may include a plurality of mats configured to input and output the data of memory cells through a plurality of mat input/output lines. The semiconductor device may include a plurality of input/output lines coupled to the plurality of mat input/output lines and configured to input and output data. The semiconductor device may include mat control units disposed between the plurality of mats and configured to control the operations of the mats. The plurality of mat input/output lines may be grouped into a plurality of data line groups having the same characteristic, and some of the plurality of data line groups may be disposed to overlap with the mat control units. |
| US09589604B1 |
Single ended bitline current sense amplifier for SRAM applications
Single ended bitline current sense amplifier for SRAM applications. The present disclosure relates to current sense read amplifier for use as a read amplifier in a memory arrangement of memory cell groups, wherein in each of the memory cell groups cells includes at least one read port connected to a read amplifier by a bitline, and wherein said read amplifiers are connected to a data output. The current sense read amplifier includes a voltage regulator to keep a bitline voltage at a constant voltage level below a power supply voltage and above a ground, a measurement circuit to detect a high current value and a low current value in a input signal, and a generator to generate a high voltage level output signal when the high current value input is detected and to generate a low voltage level output signal when the low current level value is detected. |
| US09589601B2 |
Integrated circuit using topology configurations
Various implementations described herein may refer to and may be directed to circuitry for an integrated circuit using topology configurations. For instance, in one implementation, such circuitry may include a memory array having a plurality of memory cells. Such circuitry may also include one or more reconfigurable sense amplifier devices coupled to the memory array and configured to amplify differential voltage levels received from the memory array. The reconfigurable sense amplifier devices may include a plurality of sense amplifier circuits configured to be arranged in one of a plurality of topology configurations, where the topology configurations include a parallel configuration and a cross parallel configuration. The reconfigurable sense amplifier devices may also include one or more switches configured to set the plurality of sense amplifier circuits into the plurality of topological configurations based on one or more control bits. |
| US09589584B2 |
Magnetic powder for magnetic recording, magnetic recording medium, and method of manufacturing magnetic powder for magnetic recording
An aspect of the present invention relates to magnetic powder, which is magnetoplumbite hexagonal strontium ferrite magnetic powder comprising 1 atomic percent to 5 atomic percent of Ba per 100 atomic percent of Fe, the average particle size of which ranges from 10 nm to 25 nm, and which is magnetic powder for magnetic recording. |
| US09589581B2 |
Microwave-assisted magnetic recording head and magnetic recording apparatus including the same
A microwave-assisted magnetic recording head according to an embodiment includes: a magnetic pole; a magnetic shield including a first portion and a second portion connecting to the first portion, a gap being present between the first portion and the magnetic pole; a recording coil disposed to at least one of the magnetic pole and the magnetic shield; and a spin torque oscillator including a nonmagnetic intermediate layer extending within and outside the gap, an oscillation layer disposed on a portion of the nonmagnetic intermediate layer in the gap, and a spin injection layer in which a magnetization direction is pinned and which is disposed on a portion of the nonmagnetic intermediate layer outside the gap so as to be separated from the oscillation layer. |
| US09589577B2 |
Speech recognition apparatus and speech recognition method
A speech recognition apparatus and a speech recognition method are provided. In the invention, whether an original voice sampling signal corresponding to a target voice frame is a consonant signal is determined according to at least one of a ratio of an energy of a low-pass sampling signal to an energy of the original voice sampling signal and a ratio value of an energy of a second consonant frequency band signal. |
| US09589575B1 |
Asynchronous clock frequency domain acoustic echo canceller
An echo cancellation system that detects and compensates for differences in sample rates between the echo cancellation system and a set of wireless speakers based on a frequency-domain analysis. The system generates Fourier transforms for a microphone signal and a reference signal and determines a series of angles for individual frames. For each tone in the Fourier transforms, the system determines the angles and uses linear regression to determine an individual frequency offset associated with the tone. Using the individual frequency offsets associated with the tones, the system uses linear regression to determine an overall frequency offset between the audio sent to the speakers and the audio received from a microphone. Based on the overall frequency offset, samples of the audio are added or dropped when echo cancellation is performed, compensating for the frequency offset. |
| US09589566B2 |
Fraud detection database
Embodiments of techniques or systems for fraud detection are provided herein. A communication may be received where the communication includes one or more voice signals from an individual. Frequency responses associated with these voice signals may be determined and analyzed and utilized to determine whether or not potential fraudulent activity is occurring. For example, if a frequency response is greater than a frequency threshold, potential fraudulent activity may be determined. Further, frequency responses may be cross referenced with voice biometrics, voice printing, or fraud pathway detection results. In this way, voice stress or frequency responses may be utilized to build other databases related to other types of fraud detection, thereby enhancing one or more aspects of fraud detection. For example, a database may include a voice library, a pathway library, or a frequency library which include characteristics associated with fraudulent activity, thereby facilitating identification of such activity. |
| US09589560B1 |
Estimating false rejection rate in a detection system
Features are disclosed for estimating a false rejection rate in a detection system. The false rejection rate can be estimated by fitting a model to a distribution of detection confidence scores. An estimated false rejection rate can then be computed for confidence scores that fall below a threshold. The false rejection rate and model can be verified once the detection system has been deployed by obtaining additional data with confidence scores falling below the threshold. Adjustments to the model or other operational parameters can be implemented based on the verified false rejection rate, model, or additional data. |
| US09589558B2 |
Motor vehicle noise management
A device and method that is configured to control the operation of a motor vehicle cabin active sound management (ASM) system that uses an ASM controller to control operation of one or more sound transducers that transmit audio signals in the cabin so as to alter vehicle powertrain-related sounds in the cabin, wherein the motor vehicle further comprises a mobile telephone system that is configured to receive incoming mobile telephone calls and transmit outgoing mobile telephone calls. The device can include a controller that is configured to receive from the mobile telephone system an indication that a mobile telephone call is incoming or an outgoing call is being initiated. After receiving the indication, the subject controller commands the ASM controller to cause operation of one or more sound transducers such that the level of vehicle powertrain-related sounds in the cabin is reduced. |
| US09589555B2 |
Cabinet structure, electronic equipment, and image forming apparatus
A cabinet structure includes multiple cover members configured to spatially partition an inside from an outside of a cabinet, and a clearance communicating between the inside and the outside of the cabinet is left between two cover members, the two cover members being adjacent to each other, of the cover members, and a passage defined by the clearance and leading from the inside to the outside of the cabinet through the clearance has a shape with multiple bends. |
| US09589552B1 |
Percussion instrument and cajon
Provided is a percussion instrument capable of enhancing the expressiveness of performance. A struck surface plate that vibrates to produce a musical sound when struck is disposed on a case, and a sound emission hole is formed to penetrate the struck surface plate. A musical signal is generated by a sound source device according to detection results of percussion sensors that detect the vibration caused by the striking on the struck surface plate. A sounding body produces an electronic musical sound based on the musical signal generated by the sound source device. Because the sounding body is disposed in the case, the musical sound produced by the vibration of the case and the electronic musical sound can be produced from the one case. Accordingly, the expressiveness of the performance using the percussion instrument can be enhanced. |
| US09589543B2 |
Static frame image quality improvement for sink displays
One or more system, apparatus, method, and computer readable media is described for improving the quality of static image frames having a relatively long residence time in a frame buffer on a sink device. Where a compressed data channel links a source and sink, the source may encode additional frame data to improve the quality of a static frame presented by a sink display. A display source may encode frame data at a nominal quality and transmit a packetized stream of the compressed frame data. In the absence of a timely frame buffer update, the display source encodes additional information to improve the image quality of the representation of the now static frame. A display sink device presents a first representation of the frame at the nominal image quality, and presents a second representation of the frame at the improved image quality upon subsequently receiving the frame quality improvement data. |
| US09589541B2 |
Location-based display of pixel history
A pixel history machine may receive a location for a portion of a screen. The pixel history machine may present a first screen with a first portion and store the first portion. The pixel history machine is configured to present a second screen with a second portion of the second screen. The pixel history machine is configured to receive a request that the first portion of the first screen be presented within the second screen. This request may take the form of a gesture being detected by the pixel history machine. In response to this request, the pixel history machine presents the first portion of the first screen within the second screen. |
| US09589540B2 |
Adaptive control of display refresh rate based on video frame rate and power efficiency
A battery operated device, having a display with two or more available refresh rates, has its refresh rate selected so as to match the video frame rate of video data played back on the display. This selection is made by coordinating the resources in the device that are used to process the video from its reception through to its display. |
| US09589539B2 |
Electronic device, method, and computer program product
An electronic device according to an embodiment including: a sensor to detect a contact position of a touch operation on a screen of a display; a display controller to display, on the screen, first information indicative of a first process to be performed, and to display, on the screen, second information in place of the first information when a moving distance of a contact position of the touch operation exceeds a first value, the second information indicative of a second process to be performed; and a processor to perform the first process when the touch operation finishes while the first information is displayed on the screen and to perform the second process when the touch operation finishes while the second information is displayed on the screen. |
| US09589535B2 |
Social mobile game for recommending items
Disclosed is a social dress up game that may be a fun mobile app that may be played collaboratively with friends, using the photo capability of a mobile phone or smart mobile device. One player will separately take a picture of a friend, and then invite two friends to join. Each player will dress up one part or component of the whole body of the photo—head, body or legs. In the end, the three different parts will be merged into an interesting and unique image of their friend that they can also share with the game players. Since each game player would have worked on only that player's component, the resulting merged image will be a surprise to all players. |
| US09589525B2 |
Method of driving display panel and display apparatus for performing the same
A method of driving a display panel is disclosed. In one aspect, the display panel includes a plurality of pixels arranged in odd and even rows and a plurality of odd and even gate lines respectively connected to the pixels of the corresponding odd and even rows. The method includes outputting odd gate signals to the odd numbered gate lines during two consecutive subframes and outputting even gate signals to the even numbered gate lines during two consecutive subframes. A frame is divided into two subframes. |
| US09589524B2 |
Display device and method for driving the same
A display device includes a source driver integrated circuit (IC) including an equalizer for boosting a data signal received through a pair of signal lines depending on an equalization (EQ) setting value and a clock recovery circuit recovering a clock of the data signal, and a timing controller, which is connected to the source driver IC through the signal line pair and transmits the data signal to the source driver IC. The source driver IC samples the data signal in conformity with a timing of an internal clock output when the clock recovery circuit is in a lock state. The source driver IC further includes an equalizer control circuit for initializing the equalizer when the clock recovery circuit is in an unlock state and the EQ setting value is changed. |
| US09589522B2 |
Method of driving a display panel, display panel driving apparatus for performing the method and display apparatus having the display panel driving apparatus
A method of driving a display panel includes applying a gate signal to a gate line of a display panel to drive the gate line, and driving a data line of the display panel by applying a data signal to the data line, where the driving the data line of the display panel includes over-driving the data line based on a data load signal and a polarity control signal. |
| US09589521B2 |
Liquid crystal display apparatus having wire-on-array structure
A liquid crystal display apparatus having a wire-on-array structure is disclosed. The liquid crystal display apparatus has a plurality of driving IC units, a plurality of first conductive-wire sets and second conductive-wire sets. The driving IC units are arranged at intervals in a peripheral circuit area around the active area of the liquid crystal display apparatus. The first conductive-wire sets and the second conductive-wire sets are connected alternately between every two of the plurality of driving IC units. Each first conductive-wire set has a conducting structure for connecting to a common electrode. The arrangement of the first conductive-wire sets and the second conductive-wire sets facilitates achievement of thin bezel design. |
| US09589518B2 |
Display device
A display device includes a display portion comprising pixels including a first pixel and a second pixel, a source driver for applying a pixel voltage to pixels through signal lines, and a control portion for controlling the source driver. The first and second pixels each include a first sub-pixel and a second sub-pixel. The first sub-pixel includes a light exit portion and a color filter for a first hue. The second sub-pixel includes a light exit portion and a color filter for a second hue. An area of the light exit portion of the first sub-pixel of the first pixel is smaller than that of the first sub-pixel of the second pixel. The control portion converts the video signal for the first sub-pixel into a brighter one. The source driver applies the pixel voltage to the first sub-pixel of the first pixel based on the video signal after conversion. |
| US09589515B2 |
Display panel and display device
A display panel and a display device are provided. The display panel includes a substrate, multiple data line groups which are arranged on the substrate sequentially and adjacently, and multiple gate line groups which are arranged on the substrate sequentially and adjacently. The display panel further includes multiple pixel electrode array units which are arranged in an array on the substrate. The pixel electrodes in the pixel electrode array unit are electrically connected with the data lines and the gate lines via switch elements. Data driving signals received by any two adjacent pixel electrodes in a same column have opposite polarities. The pixel electrode array unit includes a first pixel electrode, a second pixel electrode, a third pixel electrode, and a fourth pixel electrode. Data driving signals received by any two adjacent pixel electrodes of a same type in the same row have opposite polarities. |
| US09589510B2 |
Power supply device and organic light emitting display apparatus including the same
A power supply device includes: a feedback controller configured to detect a feedback voltage based on an output voltage of a power output line connected to a power input line to which a power supply voltage is supplied; a voltage controller configured to detect a level change of the power supply voltage based on the feedback voltage; and a voltage generator configured to adjust the power supply voltage according to the detected level change. |
| US09589509B2 |
Light emission control driver, light emission control and scan driver and display device
The present application relates to a light emission control and scan driver and a display device having the drivers. A light emission control and scan driver includes a plurality of driver stages for outputting light emission control signals and scan signals, each of which including: a light emission control driving unit for providing control signals to the scan units and a scan driving unit. Control signals may be light emission control signals. The light emission control driving unit has a first input signal terminal, a first clock terminal, a second clock terminal and a light emission control output terminal, and outputs light emission control signals at the light emission control output terminal based on input signals input at the first input signal terminal, light emission timing control signals input at the first clock terminal and inverted light emission timing control signals input at the second clock terminal. |
| US09589504B2 |
OLED AC driving circuit, driving method and display device
An OLED AC driving circuit, a driving method and a display device are disclosed in the present disclosure. The OLED AC driving circuit includes a light-emitting control unit, a charging unit, a driving unit, a first storage unit, a second storage unit, a first light-emitting unit, a second light-emitting unit, a first voltage control unit and a second voltage control unit. The present disclosure employs the first light-emitting unit and the second light-emitting unit which are connected reversely with each other to make the first light-emitting unit and the second light-emitting unit emit light alternately during two adjacent frames. In one frame, only one light-emitting unit emits light for display while the other one is reversely biased. When the next frame comes, the two units exchange their operating states. The AC driving of the light-emitting units is realized, thus improving the energy utilization efficiency. The cause of the aging of the light-emitting unit is removed completely, and the lifespan of the light-emitting unit is extended largely. The influence of the internal resistance of the lines on the light-emitting current is eliminated, and the display quality of pictures is improved. |
| US09589496B2 |
Temporal dithering technique used in accumulative data compression
A method of accumulating data by a processor in a nonvolatile memory to track use of a device. The method includes: retrieving by the processor a next datum for accumulation into a first accumulation stored in the memory, the next datum representing a next use of the device; generating by the processor a next dither offset; adding by the processor the next dither offset to the next datum to produce a first sum; dividing by the processor the first sum by a scale factor to produce a quantized datum; and adding by the processor the quantized datum to the first accumulation. The first accumulation tracks the use of the device. |
| US09589493B2 |
Organic electroluminescent display device, driving method thereof and display device
An organic electroluminescent display device, a driving method thereof and a display device are provided. The organic electroluminescent display device comprises: a plurality of pixel units arranged in matrix, each of the pixel units comprising a plurality of sub-pixel units for displaying different colors, and in each row of the pixel units, two adjacent pixel units constituting a pixel unit group; and a sub-pixel unit for displaying white between the two adjacent pixel units in each pixel unit group. The area occupied by the sub-pixel unit for displaying white is greater than that occupied by any one sub-pixel unit in the pixel unit. The sub-pixel unit for displaying white is configured such that the luminance of emitted light thereof replaces the luminance of light emitted by one pixel unit of two adjacent pixel units in a frame according to a preset condition. |
| US09589491B2 |
Power supply device and method for driving power supply device
A power supply device for a display device and method for driving the power supply device are disclosed. In one aspect the device includes a power voltage selector configured to select at least one of a plurality of predetermined voltage values according to a power voltage control signal and output the selected predetermined voltage value. The device also includes a power voltage supplier configured to supply a power voltage corresponding to the selected predetermined voltage value to a display data processor and a controller configured to generate the power voltage control signal based at least in part on a change in a number of switched data bits defined as a data change degree. The controller is also configured to transmit the power voltage control signal to the power voltage selector. The data bits are configured to be switched substantially synchronously with a clock signal. |
| US09589489B2 |
Probe frame for array substrate detecting apparatus and detecting apparatus having the same
The present invention discloses a probe frame for an array substrate detecting apparatus, the probe frame including a frame body and a signal distribution circuit board provided to the frame body, wherein the probe frame further includes: a circuit board provided to the frame body, the circuit board being provided with through holes, and the circuit board being provided therein with a plurality of signal transmission wires in a one to one correspondence with the through holes, one end of each signal transmission wire is inserted into its respective through hole and the other end thereof is electrically connected with an output end of the signal distribution circuit board; and a plurality of probes in a one to one correspondence with the through holes, wherein for each pair of the probe and the through hole, one end of the probe is inserted into the through hole so as to be electrically connected with the signal transmission wire within the through hole. Electrical connection between respective probes and the signal distribution circuit board are achieved through signal transmission wires in the circuit board, wiring on the probe frame is simple, and stability in signal connections between probes and the signal distribution circuit board can be improved. The present invention further provides an array substrate detecting apparatus including the above probe frame. |
| US09589485B2 |
Interactive brake display system
An interactive physical display is provided. The display provides specific components of a system, such as a braking system, devoid of certain conventional features such that system operations are visible. An actuator for communication with a user is provided, the actuator allowing a user to activate features of the system. |
| US09589481B2 |
Welding software for detection and control of devices and for analysis of data
A method used in a welding system includes detecting multiple markers on a welding torch. The markers are detected using one or more cameras. The method also includes blocking live welding using the welding torch while the one or more cameras are unable to detect at least one of the multiple markers on the welding torch. |
| US09589480B2 |
Health monitoring systems and methods
In one embodiment, a method of providing a health coaching message to a user of a portable electronic coaching system includes receiving first data corresponding to a nutritional consumption of the user from the portable electronic coaching system of the user, receiving second data corresponding to a nutritional expenditure of the user from the portable electronic coaching system of the user, calculating, via a processor of the portable electronic coaching system, a nutritional value based on the first and second data, and receiving an electronic coaching message based on a comparison of the nutritional value to a predetermined value. |
| US09589476B2 |
Systems and methods for flight simulation
Systems and methods are provided for training a user to control an unmanned aerial vehicle (UAV) in an environment. The systems and methods provide a simulation environment to control a UAV in a virtual environment. The virtual environment closely resembles a real flight environment. The controller used to transmit flight commands and receive flight state data can be used in both simulation and flight modes of operation. |
| US09589466B2 |
System and device for parking management
The present disclosure provides a system for parking management comprises at least one locating device configured to broadcast a location information to an electronic device and to receive a determined location which is broadcasted by the electronic device; and a management server configured to receive the determined location from the at least one locating device, wherein the management server is configured to provide a vacancy information to the electronic device according to the received determined location, wherein the determined location is determined by the electronic device according to the location information broadcasted by the at least one locating device. |
| US09589465B2 |
Vehicle presence detection system
A vehicle presence detection system for effectively detecting the presence of a vehicle in a location based upon a measured radio wave signal strength by a receiver. The vehicle presence detection system generally includes a main receiver adapted for receiving a radio wave signal from a transmitter and a control unit in communication with the main receiver that determines a signal strength of the radio wave signal received by the main receiver. The control unit determines that a vehicle is near the transmitter or the main receiver when the signal strength of the radio wave signal is reduced by a threshold loss. |
| US09589463B2 |
Methods and systems for determining information relating to the operation of traffic control signals
A method of obtaining data relating to the timing of a transition between phases of a traffic control signal. The method involves obtaining live probe data relating to the travel of vehicles in the region of the traffic control signal, and using the data to determine times at which a given transition of the signal has occurred. This is carried out by consideration of the distance from the traffic signal at which a vehicle waits when stopped at the signal, and a time of passing the signal, as determined using the probe data. Different transition time pairs are analyzed to obtain time differences between the transition times. A cycle time which best fits the time difference data is determined, and used with the transition time data to predict future transition times of the traffic control signal. |
| US09589460B2 |
Systems and methods for implementation of a smart energy profile using data-interchange encoding
Embodiments of the disclosure can provide systems and methods for implementation of a smart energy profile using data-interchange encoding. According to one embodiment of the disclosure, a system can be provided. The system can include at least one memory that stores computer-executable instructions. The system can include at least one processor configured to access the at least one memory, wherein the at least one processor is configured to execute the computer-executable instructions to receive, by the at least one processor, a control instruction for a home area network (HAN) device. The at least one processor can be configured to convert the control instruction to a JSON object and transmit the JSON object to the HAN device. |
| US09589458B2 |
Methods and apparatus for leveraging a mobile phone or mobile computing device for use in controlling model vehicles
Methods and systems for utilizing a mobile computing device (e.g., such as a mobile phone) for use in controlling a model vehicle are described. Consistent with some embodiments, a mobile computing device provides various user controls for generating signals that are communicated to a radio transmitter device coupled with the mobile computing device, and ultimately broadcast to a receiver residing at a model vehicle. With some embodiments, the mobile computing device may be integrated with a controller housing which provides separate user controls, such that a combination of user controls present on the mobile computing device and the controller housing can be used to control a model vehicle. |
| US09589457B1 |
Remote control systems and methods
A remote control system can comprise a first remote control having a front side, a backside, and a first battery configured to provide a first electrical power to the first remote control. The front side can comprise at least a first button configured to wirelessly control a first device. The backside can comprise a battery access opening configured to enable replacing the first battery. As well, the remote control system can include a second battery cover that can block the battery access opening. The second battery cover can include a second remote control having a second battery configured to provide a second electrical power to the second remote control. The second remote control can be configured to wirelessly control a second device. |
| US09589452B2 |
Lockdown apparatus for initiation of lockdown procedures at a facility during an emergency including subsequent lockdown status communications
Some embodiments are directed to a lockdown apparatus for facilitating initiation of lockdown procedures at a facility. The lockdown apparatus can include a manually operated actuator disposed at the facility and configured to transmit a lockdown initiation signal upon being manually actuated. The actuator can be configured to be recognizably distinguishable from a fire alarm actuator. The lockdown apparatus can also include a lockdown communicator configured to produce a lockdown communication for communicating initiation of lockdown procedures to the facility occupants and individuals not disposed proximate the facility upon transmission of the lockdown initiation signal, the lockdown communication being recognizably distinguishable from the fire alarm communication. The lockdown communicator can include an annunciator that communicates an audible annunciation to facility occupants upon transmission of the lockdown initiation signal, and that ceases to communicate the audible annunciation subsequent to a predetermined number of alarm cycles. |
| US09589445B2 |
Activity recognition with activity reminders
An athletic performance monitoring system, for motivating a user to reach a goal level of athletic activity. The system may motivate the user by calculation a deficit between a current total level of activity and the goal level of athletic activity, and suggesting activity types that the user may carry out an order to reach the goal level, wherein the suggested activity types may be based on activities that are geographically close to the user, or sporting equipment worn by, or in possession of, the user. |
| US09589440B2 |
Lamp tube and lamp fixture with sensing capability
A lamp tube and a lamp fixture with sensing capability are disclosed. The lamp tube with sensing capability includes a lamp tube body, and the lamp tube body includes a power converting unit, an LED strip and a sensing unit. The power converting unit is for receiving AC power and outputting DC power for driving the LED strip and the sensing unit. The sensing unit will timely output a fire alarm signal to notify the firemen and the people nearby when a fire occurs. The shape of the lamp tube with sensing capability is the same as a normal lamp tube, so both of them can be installed in the same lamp fixture. One normal lamp tube is replaced by the lamp tube with sensing capability to include a fire sensing function. The safety is enhanced and the installation is convenient. |
| US09589439B2 |
Multi sensor detection, stall to stop and lock disabling system
A multi sensor detection and disabling lock system includes detector cases for holding interchangeable detectors that sample for chemical, biological and radiological compounds, agents and elements, with each detector case disposed in or upon the monitored product. The detector case transmits detection information to a monitoring computer terminal and transmits a signal to a lock disabler engaged to the product to lock or disable the product's lock thereby preventing untrained, unauthorized and unequipped individual's from gaining access and entry to the product, and also preventing further contamination of the area. The detection system can be interconnected to surveillance towers scanning detector cases disposed at seaport docks, freight depots and rail terminals for monitoring containers being prepared for shipment or sitting on docks for long periods of time. |
| US09589436B2 |
Systems and methods for announcing location of unauthorized party
A security system includes a plurality of sensors to detect entry into a premises by an unauthorized party and to detect a location of the unauthorized party through at least a portion of the premises, a storage component to store a log of the detected location of the unauthorized party, an audio component to audibly announce the detected location of the unauthorized party, and a processor to control the audio component to announce the detected location at predetermined intervals or upon a change in the detected location of the unauthorized party. |
| US09589435B2 |
Providing alerts, vouchers, or coupons once a plurality of geo-fences have been breached a number of times
The disclosure is directed to providing a notification based on breaching a plurality of geo-fence perimeters. An embodiment detects a breach related to the plurality of geo-fence perimeters, the breach corresponding to a breach of one of the plurality of geo-fence perimeters, records the breach as one of a plurality of breaches, determines whether the plurality of breaches meet one or more conditions, and if the plurality of breaches meet the condition, issues a notification. |
| US09589434B2 |
Wireless network camera systems
Apparatus, systems and techniques associated with battery powered wireless camera systems. One aspect of the subject matter described in this specification can be embodied in a system that includes a battery powered wireless camera including an internal battery to provide energy and a burst transmission unit to transmit information during burst periods. The system includes a base station, separated from the battery powered wireless camera, in wireless communication with the battery powered wireless camera to receive information from the battery powered wireless camera. The base station is configured to process the received information and includes a web server to transmit the processed information to a client. Other embodiments of this aspect include corresponding systems, apparatus, and computer program products. |
| US09589431B2 |
Dynamic information projection for a wall sensor
An implementation of a system, device and method for projecting a visual indicator against a surface is provided. A display projection system in a handheld sensor device (e.g. a handheld wall scanner) projects a static or computer-controlled dynamic pattern of light onto a surface being scanned to indicate a specific feature, such as existence of solid structures of wood, metal or plastic, electric or magnetic fields, or a disturbance of a field. The projected light may be controlled by a computer via an aperture to allow flexibility in what is projected, such as icons, lines, graphics, characters and colors. |
| US09589430B2 |
Systems and methods for home automation integration with a doorbell
Various doorbell monitoring devices and methods are presented herein. Such arrangements may be configured to be integrated with a previously-installed doorbell and a previously-installed chime unit. A first power source may be configured to power the doorbell monitor device separate from the previously-installed doorbell and the previously-installed chime unit. A plurality of electrical connectors may be present and may be configured to be attached with preexisting terminals of the previously-installed chime unit. An actuation sensor may be present and configured to detect an actuation of the previously-installed doorbell via the two or more electrical connectors. A communication module may also be present and configured to transmit a wireless signal indicative of the ring to a receiver device. |
| US09589429B2 |
Alarm detector
An alarm sounder and at least one sound amplification component having at least one horn shaped channel form an alarm detector. The at least one horn shaped channel has a throat end and an outlet end, the throat end being disposed corresponding to a sound-making end of the alarm sounder. The sound intensity of the alarm detector can meet the regulations of the industry standards. |
| US09589428B2 |
Point-of-sale system
A point-of-sale system includes a stand that supports a tablet computer. The tablet computer can run a merchant application to provide the typical functionality for a point-of-sale system. The stand can be rotatable to face either the merchant or the customer. The stand can incorporate a card reader. The tablet computer can be connected through a hub to other peripheral components, such as a controllable cash drawer, a printer and/or a bar code reader. The cash drawer can include a slidable drawer having sliding rails that are hidden from a top view of the drawer. |
| US09589427B1 |
Anti-skimming card reader
Methods and devices are provided for reading both chip and magnetic stripe cards, and in particular for preventing use of a magnetic stripe when a chip is present, in various settings such as fuel dispensers, ATMs, and retail settings. For example, a card reading device is provided that includes a housing and at least one card slot. A smart card reader and a magnetic stripe card reader are disposed within the housing. In one embodiment, a gate is configured to prevent insertion of a card into a rear portion of the card slot when a chip is detected to prevent the magnetic stripe card reader from reading a magnetic stripe. In another embodiment, a first card slot has a first depth that prevents insertion of a magnetic stripe but allows reading of a chip, and a second slot has a depth that allows insertion of a magnetic stripe. |
| US09589425B2 |
Slot machine including a plurality of video reel strips
Provided is a slot machine capable of reducing unfairness which may result between a player who has made an investment and a player who has not made an investment and allowing a player to proceed with a game by making an investment in expectation of a jackpot at ease. Each money amount which is constant is accumulated independently of a number of bets each time betting is conducted, and upon winning a jackpot, a money amount calculated by multiplying a money amount accumulated until then by a multiplying factor based on the number of bets is provided. |
| US09589423B2 |
Method and system for pre-revealed electronic sweepstakes
A system and method that generates a finite number of sweepstakes entries for a sweepstakes, facilitates a selection of one or more sweepstakes entries from the finite number of entries, determines the result of each selected sweepstakes entry, allocates each nonzero result to the user, and provides the user with at least one of the selected sweepstakes entries, the result of each selected sweepstakes entry, the sum of all nonzero results from the selected sweepstakes entries, a code that is associated with the selected sweepstakes entries, and a program that is configured to cause a computer to interactively display to the results associated with the selected sweepstakes entries to the user. The results of the selected sweepstakes entries may be viewed in the form of a simulated game, or the user may log into an account associated with the user to view the total amount won. |
| US09589422B2 |
System and method for conducting on-line tournament contest
Systems and methods for conducting on-line tournaments, and in particular such tournaments as permit participants to receive prizes without having to place wagers. Participants are permitted to enroll in an on-line tournament pool and submit tokens. The tokens act as each respective participant's prediction regarding the outcome of one or more events associated with a sporting event or other contest. Tokens may be completed “brackets” representing a participant's prediction of winners of all games in various rounds of a sporting event, or partially completed brackets representing the participant's prediction of winners of only some games thereof. Cash prizes are awarded for top scoring participants but no wagers or entry fees of any kind are accepted from or required to be paid by the participants. |
| US09589421B2 |
Head to head systems
Systems in accordance with embodiments of the invention include: a real world controller connected to a game world controller, and constructed to: accept a gambling game trigger; provide a randomly generated payout of credits; the game world controller connected to the real world controller and connected by a network to an entertainment software controller executing a multiplayer entertainment game, the game world controller constructed to: receive a plurality of players' actions taken; and trigger the wager in the gambling game based on the actions, the game world controller utilizing a head to head gambling controller constructed to: detect a latch event and enter the plurality of players into a gambling session; parameterize wager terms of the wager made; trigger the wager in the gambling game during the session; distribute the payout of credits; determine the payout of resources utilized by the plurality of players; and distribute the payout of resources. |
| US09589419B2 |
Gaming machine capable of repeatedly execute a unitary game
The present invention provides a gaming machine which is capable of realizing an appropriate balance between players' profits and slot machine providers' profits. When a first number of bets have been selected, a control device executes a first basic unitary game which completes when a first time interval has elapsed after starting the game. When a second number of bets have been selected, the control device executes a second basic unitary game which completes when a second time interval shorter than the first time interval has elapsed after starting the game. On the basis of the fact that the first basic unitary game has been executed, the control device executes a first progressive game in which a first payout rate can be realized. On the basis of the fact that the second basic unitary game has been executed, the control device executes a second progressive game in which a second payout rate higher than the first payout rate can be realized. When a second number of bets have been selected, information relating to the second payout rate is displayed. |
| US09589411B2 |
Systems, methods, and apparatus for facilitating module-based vending
Systems, apparatus, methods, and articles of manufacture provide for modular vending systems utilizing reloadable product dispensing modules, including, but not limited to, vertical product dispensing modules comprising a vertical conveyor and a mounting structure for releasably engaging with module holder structures of modular vending machines, and a central controller device for communicating with a plurality of modular vending machines. |
| US09589407B2 |
Apparatus for receiving and sorting disks
An apparatus for receiving and sorting disks includes a wheel having at least one well for receiving a disk, a motor coupled to the wheel, a collecting device positioned relative to the wheel, a disk sensor, an ejector, and a controller. The collecting device has at least a first collector and a second collector configured for receiving disks. The disk sensor is configured to detect a value of a parameter of a disk received in the well and generate a parameter value signal. The ejector is coupled to the wheel proximate the well and configured to eject a disk from the well in a plane parallel to a bottom surface of the wheel in response to an eject signal. The controller is operably coupled with the disk sensor and the ejector. |
| US09589406B2 |
Key device and associated method, computer program and computer program product
It is presented a key device comprising: a mechanical interface for mechanically maneuvering a lock device upon successful access control. The mechanical interface comprises a connector for powering the lock device and for communication with the lock device such that the lock device is able to perform electronic access control using the key device. The key device further comprises a clock; a memory; a radio communication module; and a controller arranged to, using the radio communication module communicate online with an access control device and use the memory as temporary storage for offline communication between the access control device and one or more lock devices. A corresponding method, computer program and computer program product are also presented. |
| US09589401B2 |
Method for securely delivering indoor positioning data and applications
Methods and devices are described for providing localized secure navigation in conjunction with near field communication access control systems. In one potential embodiment, a mobile device such as a cell phone may communicate with a door access control point using near field communication to receive location access system information. The mobile device may then authorize download and execution of a local secure navigation module from a location access system using the location access system information for use in receiving location assistance data, based on an authentication level associated with the mobile device. Such location assistance data may be used by the local secure navigation module to provide location assistance when the mobile device is in a secure location. The location of the mobile device may then be tracked using at least the location assistance data and the communication with the door access control point. |
| US09589398B2 |
Distribution of premises access information
Premises access information can be distributed using a system having a ticket server coupled to a remotely located premises server. The ticket server receives a ticket request from a host device. After interacting with the premises server, the ticket server sends access-related information to a visitor device. The visitor device can later use the access-related information to gain access to a premises. |
| US09589389B2 |
Sample points of 3D curves sketched by a user
The invention notably relates to a computer-implemented method for designing a three-dimensional modeled object comprising providing sample points of 3D curves sketched by a user; determining a volumetric function, within a predetermined class of volumetric functions, as the optimum of an optimization program that explores orientation vectors defined at the sample points under the constraint that the explored orientation vectors be normal to the 3D curves and respect a minimal rotation propagation condition over each 3D curve, wherein the optimization program penalizes a distance from the explored orientation vectors; and fitting the sample points with an isovalue surface of the volumetric function. |
| US09589387B2 |
Image processing apparatus and image processing method
Disclosed herein are an image processing apparatus and an image processing method for realistically expressing an object. The image processing apparatus includes a volume data generator configured to generate volume data using received signals of an object, and a volume rendering unit configured to perform volume rendering using the volume data to acquire a projection image, and apply a subsurface scattering effect according to virtual lighting information, to the projection image with respect to a user's viewpoint to produce a final image. |
| US09589386B2 |
System and method for display of a repeating texture stored in a texture atlas
In one embodiment, a method for generating textured graphics includes identifying border colors of pixels around two texture images and generating arrangements of border texels from the border colors that are positioned next to the two images in a texture atlas. The method includes generating mip-maps of the texture atlas with texels in the jump level assigned with the border color of the corresponding textures in the full-resolution texture atlas instead of the averaged color of the textures that would be assigned using a traditional mip-map process. The method includes storing the texture atlas including the two texture images and the border texels in a memory for use in generating repeated textures on an object in a virtual environment using at least one of the texture images with a mip-map without seam artifacts between the repeated textures. |
| US09589384B1 |
Perspective-enabled linear entertainment content
Techniques and systems are provided for providing linear entertainment content for perspective-shiftable displays. Some of the provided techniques and systems allow for pre-existing three-dimensional assets, such as models, scene definitions, virtual lights and cameras, motion paths, etc., that were used to create an original animated piece of linear entertainment content may be re-used and mapped, if necessary, into a format that is compatible with a perspective-shiftable display in order to re-create that same entertainment content in a perspective-shiftable format. In some instances where such pre-existing content is used, the technique may also include inserting additional content in locations that are only visible to the viewer when viewed from a perspective other than the perspectives used in creating the original animated piece of linear entertainment content. |
| US09589383B2 |
Unified position based solver for visual effects
A method for simulating visual effects is disclosed. The method comprises modeling each visual effect within a simulation as a set of associated particles with associated constraints applicable thereto. It also comprises predicting first velocities and first positions of a plurality of particles being used to simulate a visual effect based on an external force applied to the plurality of particles. Next, it comprises identifying a set of neighboring particles for each of the plurality of particles. The method also comprises solving a plurality of constraints related to the visual effect, wherein each of the plurality of constraints is solved for the plurality of particles in parallel. Lastly, responsive to the solving, the method comprises determining second velocities and second positions for the plurality of particles. |
| US09589379B2 |
System and method for visualization of cardiac changes under various pacing conditions
A system and method for visualization of cardiac changes under various pacing conditions for intervention planning and guidance is disclosed. A patient-specific anatomical heart model is generated based on medical image data of a patient. A patient-specific computational model of heart function is generated based on patient-specific anatomical heart model. A virtual intervention is performed at each of a plurality of positions on the patient-specific anatomical heart model using the patient-specific computational model of heart function to calculate one or more cardiac parameters resulting from the virtual intervention performed at each of the plurality of positions. One or more outcome maps are generated visualizing, at each of the plurality of positions on the patient-specific anatomical heart model, optimal values for the one or more cardiac parameters resulting from the virtual intervention performed at the that position on the patient-specific anatomical heart model. |
| US09589378B2 |
Particle based visualizations of abstract information
Multivariate data that includes data records may be obtained, each of the data records represented as data values of data attribute variables. A cardinality of the data records is substantially large. A display layout template representing a collectivized visualization of dataset points is obtained, the collectivized visualization logically associated with a set of the data attribute variables, from a perspective of a user viewer. An individualized particulate display representation for each of the data records is determined, based on a portion of the data values associated with each respective data record. The individualized particulate display representation includes a discrete, individually selectable particulate shape and a display location relative to geometric bounds logically associated with the template. Display of the individualized particulate display representations is initiated in accordance with the template. |
| US09589376B2 |
Manipulation of splines based on a summary spline
A summary spline curve can be constructed from multiple animation spline curves. Control points for each of the animation spline curves can be included to form a combined set of control points for the summary spline curve. Each of the animation spline curves can then be divided into spline curve segments between each neighboring pair of control points in the combined set of control points. For each neighboring pair, the spline curve segments can be normalized and averaged to determine a summary spline curve segment. These summary spline curve segments are combined to determine a summary spline curve. The summary spline curve can then be displayed and/or modified. Modifications to the summary spline curve can result in modifications to the animation spline curves. |
| US09589374B1 |
Computer-aided diagnosis system for medical images using deep convolutional neural networks
Described are systems, media, and methods for applying deep convolutional neural networks to medical images to generate a real-time or near real-time diagnosis. |
| US09589372B1 |
Augmented reality overlays based on an optically zoomed input
A method for managing a content overlay. The method included a processor identifying a first image and a second image from an augmented reality (AR) device. The method further includes identifying a first element of interest within the first image. The method further includes associating a corresponding first AR content overlay for the first element of interest. The method further includes determining one or more differences between the first image and the second image, wherein the second image includes at least the first element of interest. The method further includes modifying a position of at least the first AR content overlay based, at least in part, on the one or more differences between the first image and the second image. |
| US09589367B2 |
Reconstruction of missing data point from sparse samples during graphics processing using cubic spline polynomials
A graphics system includes a reconstruction unit that utilizes higher order polynomials, such as cubic splines, to reconstruct missing pixel data. The computational work to perform interpolation with higher order polynomials, such as cubic splines, is reduced by pre-calculating weights for each sparse sample pattern. The pre-calculated weights may be stored as stencils and used during runtime to perform interpolation. |
| US09589363B2 |
Object tracking in encoded video streams
Techniques are provided for tracking objects in an encoded video stream based on data directly extracted from the video stream, thus eliminating any need for the stream to be fully or partially decoded. Extracted motion vector and DC coefficient data can be used to provide a rough estimation of which macro-blocks are be associated with a background motion model and which macro-blocks correspond to a foreground object which is moving with respect to the background motion model. Macro-blocks which are associated with a moving foreground object can be grouped based on connectivity and a similarity measure derived from the extracted DC coefficient data. The grouped macro-blocks can be tracked from frame to frame to identify and eliminate groups having only negligible motion. The resulting validated macro-block groups will correspond to a rough object mask associated with a moving region in the analyzed frame. |
| US09589360B2 |
Biological unit segmentation with ranking based on similarity applying a geometric shape and scale model
Embodiments of the disclosure are directed to segmenting a digital image of biological tissue into biological units, such as cells. A first weak or data driven segmentation is generated using image data representing the digital image to segment the digital image into a first set of biological units. Applying a geometric model, each unit in the first set of biological units is ranked based on a similarity in shape and scale between the unit and one or more other units in the image. A subset of units from the first set of biological units is selected based on the rank of each biological unit relative to a predetermined threshold rank. A second weak or data driven segmentation may then be generated using image data including the subset of biological units to segment that portion of the digital image into a second set of biological units. |
| US09589359B2 |
Structured stereo
An apparatus, system, and method are described herein. The apparatus includes an emitter and a plurality of sensors. The emitter and the sensors are asymmetrically placed in the system with respect to the emitter. Data from the emitter and sensors is used to generate a high accuracy depth map and a dense depth map. A high resolution and dense depth map is calculated using the high accuracy depth map and the dense depth map. |
| US09589357B2 |
Avatar-based video encoding
Techniques are disclosed for performing avatar-based video encoding. In some embodiments, a video recording of an individual may be encoded utilizing an avatar that is driven by the facial expression(s) of the individual. In some such cases, the resultant avatar animation may accurately mimic facial expression(s) of the recorded individual. Some embodiments can be used, for example, in video sharing via social media and networking websites. Some embodiments can be used, for example, in video-based communications (e.g., peer-to-peer video calls; videoconferencing). In some instances, use to the disclosed techniques may help to reduce communications bandwidth use, preserve the individual's anonymity, and/or provide enhanced entertainment value (e.g., amusement) for the individual, for example. |
| US09589356B2 |
Method and system for determining a number of transfer objects which move within an observed region
The invention proposes a method for determining a number (13) of transfer objects which are moving from a first subregion (8) of an observed region (5) into a second subregion (9) of the observed region (5), wherein a succession of images of the observed region (5) is recorded which identify objects (1; 2; 3; 4) and determine positions (1b, 1c; 2a, 2b, 2c; 3a, 3b, 3c; 4a, 4b) for the objects (1; 2; 3; 4), respectively, the objects (1; 2; 3; 4) are each associated either with the first subregion (8) or with the second subregion (9) on the basis of the positions (1b, 1c; 2a, 2b, 2c; 3a, 3b, 3c; 4a, 4b) of said objects, and multiple transfers of the same object between the first subregion (8) and the second subregion (9) are taken into account when determining the number (13) of transfer objects. The invention likewise proposes an appropriate system which can be used to carry out the method, said system comprising a sensor arrangement and a computation unit connected to the sensor arrangement. |
| US09589353B2 |
Method for detecting objects in a warehouse and/or for spatial orientation in a warehouse
A method for detecting objects in a warehouse and/or for spatial orientation in a warehouse includes: acquiring image data with a 3-D camera which is fastened to an industrial truck so that a viewing direction of the 3-D camera has a defined horizontal angle, wherein the 3-D camera has an image sensor with sensor elements arranged matrix-like and the image data comprises a plurality of pixels, wherein distance information is assigned to each pixel, calculating angle information for a plurality of image elements, which each specify an angle between a surface represented by the image element and a vertical reference plane, determining a predominant direction based on the frequency of the calculated angle information, calculating the positions of the of the acquired pixels along the predominant direction, detecting at least one main plane of the warehouse based on a frequency distribution of the calculated positions. |
| US09589349B2 |
Systems and methods for controlling user repeatability and reproducibility of automated image annotation correction
Systems and methods are disclosed for controlling image annotation. One method includes acquiring a digital representation of image data and generating a set of image annotations for the digital representation of the image data. The method also may include determining an association between members of the set of image annotations and generating one or more groups of members based on the association. A representative annotation from the one or more groups may also be determined, presented for selection, and the selection may be recorded in memory. |
| US09589348B1 |
Camera calibration system
An optical calibration system is configured to determine camera calibration information of a virtual reality camera. The optical calibration system comprises a light source, a first and a second planar grid, and an optical calibration controller. The light source is configured to backlight the first and the second planar grids. Each planar grid includes a plurality of fiducial markers that are backlit by the light source. The optical calibration controller determines camera calibration information of a virtual reality camera selecting and analyzing a plurality of captured images that include a portion of the first or the second planar grid with fiducial markers backlit. |
| US09589347B2 |
Computer implemented method for assessing vascular networks from medical images and uses thereof
The method comprising acquiring and analyzing by computer means image information of video sequences of two or more dimensions obtained from contrast-enhanced signals, for example ultrasound, coherence tomography, fluorescence images, or Magnetic Resonance Imaging, of a body part or tissue, for example of an organ, of a living subject; detecting events from said information of video sequences; selecting a Region of Interest of said body part or tissue; computing a first graph representative of a local vascular network of said image information of video sequences in which the edges of the graph are estimated by the temporal relationship among spatially remote signals of said image information of video sequences within a set of video sequences; and using said graph for assessment of vascular networks. |
| US09589342B2 |
Method of inspecting images of connectors of optical cables by using live, still or stored images
A method for inspecting connectors of multi-fiber optical cables is disclosed. The method may include receiving a plurality of images of a plurality of areas of a connector and determining, via at least a processor, matching features in two or more images according to unique visual characteristics of the images. The method further may include aligning the images, according to unique matching features of the images, and combining the images such as to obtain a combined-image of the full connector or a desired area of the connector. The combined-image of the connector may be displayed on a monitor or a display. |
| US09589341B2 |
Information processor, information processing method, and program
An information processor includes a detection unit detecting a photographic subject region of an image, a characteristic amount generation unit generating a characteristic amount including at least positional information of the photographic subject region for each of the detected photographic subject region, a combined characteristic amount generation unit generating a combined characteristic amount corresponding to the image by combining the characteristic amount generated for each of the photographic subject region, and an identification unit identifying a label corresponding to a combination of a photographic subject appearing in the image based on the generated combined characteristic amount. |
| US09589340B2 |
Method and device for preparing a spectacle frame
A method for preparing a spectacle frame (1) adapted to a face, the spectacle frame (1) having a bridge (11) between two optical lenses (9-10) and a surface (2) having end pieces (5-6) to which temples (3-4) are connected. The method includes providing an image of the face; identifying the characteristic points on the image of the face; identifying shape points on the image of the face; identifying the shape of the face from among predefined characteristic shapes using the shape points; determining from the characteristic points a frame of reference for receiving the surface of the spectacle frame; and determining the height position and width of the end pieces relative to the surface of the spectacle frame depending on the face shape identified. |
| US09589338B2 |
Image processing apparatus, image processing system, image processing method, and non-transitory computer readable medium for varied luminance adjustment in different image regions
An image processing apparatus includes a component acquisition unit that acquires a chromaticity component and a luminance component from each of a process target image and a reference image, a feature quantity extraction unit that extracts a feature quantity from the chromaticity component and the luminance component of each of the process target image and the reference image, a chromaticity component adjustment unit that matches the chromaticity component of the process target image to the chromaticity component of the reference image using the feature quantity of the chromaticity component, and a luminance component adjustment unit that matches the luminance component of the process target image to the luminance component of the reference image in a non-dark region other than a dark region, and reduces an amount of adjustment in the adjustment of the dark region to be smaller than an amount of adjustment applied to the non-dark region. |
| US09589336B2 |
Reconstruction of image data by means of contour data
A method is based on first projection data, recorded during a relative rotational movement between an x-ray source of a CT device and at least one examination object lying partly outside the field of view of the CT device. Contour data of the surface of the examination object is useable to enhance the reconstruction of the incomplete first projection data. The spatial correlation between the first projection data and the contour data is known. The first projection data is expanded by way of the contour data to modified projection data, so that the modified projection data includes information about the contour of the examination object lying outside the field of view of the CT device. In an embodiment of the inventive reconstruction of image data by way of the modified projection data, fewer or no artifacts occur by comparison with reconstruction of image data from just the first image data. |
| US09589333B2 |
Image correction apparatus for correcting distortion of an image
An image correction apparatus for correcting distortion of an image, the image being obtained by photographing a subject, which is provided with a specifying unit for specifying a relationship in position between points on the subject in a three-dimensional space based on both a relationship in position between the points on the subject in the image in a two-dimensional space and a photographing angle relative to a surface of the subject, an obtaining unit for obtaining information of distortion of the image that is reflected by the relationship in position between the points on the subject in the three-dimensional space, specified by the specifying unit, and a correcting unit for correcting the distortion of the image based on the information of distortion of the image obtained by the obtaining unit. |
| US09589330B2 |
Image processing apparatus and image processing method with data modification based on changes in data ranges
An image processing apparatus includes a processing unit configured to execute image processing on an image signal; a filtering unit configured to execute filtering processing; and a changing unit configured to, in a case where a range of a value which a predetermined color component of the image signal can take is changed from a first range to a second range narrower than the first range by the image processing, change the value of the predetermined color component of the filtered image signal based on the first range and the second range. |
| US09589329B2 |
Motion compensation in a three dimensional scan
The present disclosure provides computing device implemented methods, computing device readable media, and systems for motion compensation in a three dimensional scan. Motion compensation can include receiving three-dimensional (3D) scans of a dentition, estimating a motion trajectory from one scan to another, and calculating a corrected scan by compensating for the motion trajectory. Estimating the motion trajectory can include one or more of: registering a scan to another scan and determining whether an amount of movement between the scans is within a registration threshold; determining an optical flow based on local motion between consecutive two-dimensional (2D) images taken during the scan, estimating and improving a motion trajectory of a point in the scan using the optical flow; and estimating an amount of motion of a 3D scanner during the scan as a rigid body transformation based on input from a position tracking device. |
| US09589325B2 |
Method for determining display mode of screen, and terminal device
A method includes determining a connection line between two eyes in each piece of profile picture information by identifying profile picture information of each viewer of at least two viewers, and determining a positive direction of each connection line according to the connection line between the two eyes in each piece of profile picture information and a preset positive direction determining rule. When the positive directions of all the connection lines are the same, calculating an included angle between the positive direction of each connection line and a positive direction of a reference line, and performing averaging on all the included angles to obtain a first included angle; and determining a display mode of a screen according to the first included angle. |
| US09589321B2 |
Systems and methods for animating a view of a composite image
Techniques for animating a view of a composite image based on metadata related to the capture of the underlying source images. According to certain implementations, the metadata may include timing or sensor data collected or generated during capture of the component source images. For example, the timing data may indicate an order or sequence in which the source images were captured. Accordingly, the corresponding regions of the composite panoramic image may be panned to in sequence, for example, using the Ken Burns Effect. In another example, sensor data from gyroscopes or accelerometers may be used to simulate the movement of the image capture device used to generate the source images. In another implementation, the source images may be associated with varying focal lengths or zoom levels. Accordingly, certain implementations may vary a level zoom, based on the metadata, while panning between source photos. |
| US09589320B2 |
Image-pickup unit, image-pickup apparatus, and image processing system
An image-pickup unit includes an image sensor and a color filter. Each filter segment of the color filter corresponds to one of a plurality of pixels of the image sensor, and the plurality of filter segments include first to Z-th (2L−1≦Z≦2L, where L is an integer equal to or larger than four) filter segments having spectral transmittances for transmitted wavelength bands different from each other among light from an object. Each pixel of the image sensor receives light of a plurality of wavelength bands. The plurality of filter segments are irregularly disposed. |
| US09589317B2 |
Image processing apparatus, image processing method, and program
There is provided an image processing apparatus including a movement amount deciding unit configured to decide a movement amount for moving a target object that is a movement target among objects included in a plurality of captured images imaged by an imaging device including optical units that have imaging ranges overlapping with each other in part on the basis of a distance from the imaging device to the target object and an angle from a reference line at a reference position of the imaging device to the target object in a manner that the plurality of captured images look like images imaged from the reference position, the imaging device using all directions as an imaging range, the plurality of captured images corresponding to the respective optical units. |
| US09589315B2 |
Vertex data compression method and apparatus for compressing vertex data through analyzing channel properties and related vertex data decompression method and apparatus
A vertex data compression method includes: collecting a plurality of vertices as a vertex block; extracting at least one data unit array from the vertex block, wherein each data unit array is composed of data units selected from vertex components of the vertices respectively, the data units correspond to a same channel, and each data unit is smaller than one byte; and for each data unit array, checking the data units of the data unit array to select a compression algorithm, and compressing the data units of the data unit array according to the selected compression algorithm. |
| US09589311B2 |
Independent thread saturation of graphics processing units
Techniques to saturate a graphics processing unit (GPU) with independent threads from multiple kernels are described. An apparatus may include a graphics processing unit driver for a graphics processing unit having a first partition including a first plurality of execution units and a second partition including a second plurality of execution units, the graphics processing unit driver to dispatch one or more threads of a first kernel to the first partition and to dispatch one or more threads of a second kernel to the second partition to increase a utilization of the plurality of execution units and avoid hardware resource competition. |
| US09589309B2 |
Apparatus and method for embedding searchable information, encryption, transmission, storage and retrieval
A cell phone is disclosed for acquiring information to be transmitted to a receiving facility and for transmitting such thereto. A capture device captures information from an external source. A processor is provided for associating with the captured information a representation of the date and time of the capture of the information, such that the representation of the date and time information in association with the captured information forms augmented captured information. The processor also places the augmented captured information in association with subscriber information in a transmission of the augmented captured information to a receiving facility requiring such subscriber information. A transmitter transmits the transmission including the augmented captured information and the subscriber information to the receiving facility. An encryptor encrypts the augmented captured information with a symmetrical encryption algorithm to provide encrypted augmented captured information in the transmission with the subscriber information. |
| US09589308B2 |
Methods and apparatus for reproducing the appearance of a photographic print on a display device
Methods and apparatus for reproducing the appearance of a photographic print on a display device are disclosed. An environment model is built from received light conditions at a light sensor attached to a display surface. The environment model and a surface model are applied to an input image to generate an output image. The surface model represents reflective characteristics of a simulated surface on which display of the input image is simulated. The output image simulates an effect of the received light conditions on the input image as simulated on the surface. |
| US09589300B2 |
Enhanced transaction resolution techniques
A method for completing a transaction is presented. The method comprises establishing network communications between a user and a server, receiving information, at the server, regarding the transaction, seeking available information pertinent to the transaction from at least one source external to the server and the user, processing data from the available information using a rules based engine including rules established on behalf of a party to the transaction located at the server, and presenting an offer set to the user based on at least one decision made by the rules based engine. The transaction may be one according to a variety of scenarios, and the user may be an appropriate party to the transaction. The user may employ various devices to contact the server and seek to complete the transaction. |
| US09589299B2 |
Systems and user interfaces for dynamic and interactive investigation of bad actor behavior based on automatic clustering of related data in various data structures
Embodiments of the present disclosure relate to a data analysis system that may automatically generate memory-efficient clustered data structures, automatically analyze those clustered data structures, automatically tag and group those clustered data structures, and provide results of the automated analysis and grouping in an optimized way to an analyst. The automated analysis of the clustered data structures (also referred to herein as data clusters) may include an automated application of various criteria or rules so as to generate a tiled display of the groups of related data clusters such that the analyst may quickly and efficiently evaluate the groups of data clusters. In particular, the groups of data clusters may be dynamically re-grouped and/or filtered in an interactive user interface so as to enable an analyst to quickly navigate among information associated with various groups of data clusters and efficiently evaluate those data clusters in the context of, for example, a fraud investigation. |
| US09589297B2 |
Preventing conflicts among bid curves used with transactive controllers in a market-based resource allocation system
Disclosed herein are representative embodiments of methods, apparatus, and systems for distributing a resource (such as electricity) using a resource allocation system. One of the disclosed embodiments is a method for operating a transactive thermostatic controller configured to submit bids to a market-based resource allocation system. According to the exemplary method, a first bid curve is determined, the first bid curve indicating a first set of bid prices for corresponding temperatures and being associated with a cooling mode of operation for a heating and cooling system. A second bid curve is also determined, the second bid curve indicating a second set of bid prices for corresponding temperatures and being associated with a heating mode of operation for a heating and cooling system. In this embodiment, the first bid curve, the second bid curve, or both the first bid curve and the second bid curve are modified to prevent overlap of any portion of the first bid curve and the second bid curve. |
| US09589296B1 |
Managing information for items referenced in media content
Various embodiments enable a media playback device to present a user with the option to add items referenced in a media object, such as a movie, ebook, song, game, or application, to a wishlist for later purchase or sharing. An example system performs content analysis of the media object to determine which items are referenced in the media object and where they are located within the media object. Further, the system can query an electronic marketplace for more information about which specific types, sizes, colors, or other variations of the item are available, as well as information such as price, shipping cost, shipping time, and so forth. In a video media object, for example, the system can present a custom miniature storefront for various scenes or frames in the video that represents items present or referred to in the scenes or frames. |
| US09589285B2 |
Representation manipulation language
Receiving data from a client machine, the data representing selection of a subset of components of a set of components of a fixed query response representation; performing a map/reduce function on the data to retrieve the subset of components; and transmitting the subset of components to the client machine. The data may include an Xpath expression that is created at the client machine or at a server and the map/reduce function may be performed according to a design pattern that designates the pattern of components in a fixed query response representation designated by the client machine. |
| US09589282B2 |
Systems and methods for billing content providers for designated select content delivered over a data network
Some embodiments provide multi-tenant billing systems and methods whereby data network usage fees that are associated with delivering select content of different content providers over a data network are passed to the content provider that originates or is the source for that select content instead of the end users that request and receive the select content. A deep packet inspection server or a billing server may be configured with a list of identifiers to distinguish between the network usage that is related to the delivery of the designated free content from the network usage that is not related to the delivery of the designated free content. The network usage can be distinguished by filtering or processing usage logs that track the network usage using the configured list of identifiers. Such filtering or processing can be done in real-time or in a delayed manner in a standalone or integrated system. |
| US09589281B2 |
Obtaining data from incomplete electronic forms
Visitors that abandon electronic or computer-generated forms before completing and submitting the form are lost to business entities. Data obtained from abandoned electronic or computer-generated forms is used to identify these lost visitors. Sometimes a unique script embedded on the webpages scrapes the data from the forms. The obtained data is further utilized to market or remarket to the lost consumers by sending personalized messages via a preferred communication medium. |
| US09589272B2 |
System, method, and device for organizing and presenting digital flyers
A system, method and communication device are disclosed for organizing and presenting a plurality of digital flyers. Using flyer stack information, which organizes the plurality of digital flyers into at least one flyer stack, the plurality of digital flyers are presented to allow for inter-flyer and intra-flyer navigation. Moreover, the flyer stack information may be used to allow the inter-flyer and intra-flyer content to be searched. This is achieved by providing a method and communication device that receives the flyer stack information from a server, and presents the flyer stack information in a flyer navigation interface. The flyer navigation interface displays the at least one flyer stack, selects the flyer stack from the at least one flyer stack, and displays a digital flyer from the selected flyer stack in the flyer navigation interface as a current digital flyer, including displaying an indication of a next digital flyer in the selected flyer stack, the next digital flyer being accessible by navigating to the indication. |
| US09589270B2 |
Electronically capturing consumer location data for analyzing consumer behavior
In embodiments, methods and systems for electronically capturing consumer location data for consumer behavior analysis may be provided. The location data may be gathered for one or more consumers from any suitable source. In some cases, the location data may be gathered using electronic devices associated with consumers, such as mobile phones. The gathered data may be analyzed to determine behavior patterns or other characteristics of the one or more consumers. Further, inferences or predictions about consumers may be derived based on the characteristics. The inferences and predictions may be the basis of consumer analytics supplied to a business or other entity. |