| Document | Document Title |
|---|---|
| US09590319B2 |
Circularly polarized antenna and feeding network
An antenna for transmitting and/or receiving electromagnetic waves having a flat ground plane, and an array of radiating and/or receiving elements. The radiating and/or receiving element has a planar conductor which is arranged in parallel to the ground plane. An L-shaped slot is arranged in the planar conductor. |
| US09590317B2 |
Modular type cellular antenna assembly
A individually formed radiating unit, an antenna array, and an antenna assembly are provided. The individually formed radiating unit includes a reflector, at least one radiating element integrated into a first side of the reflector, and a housing disposed on a second side of the reflector. The housing forms a chamber for housing a feed network. |
| US09590314B2 |
Circularly polarized connected-slot antenna
A connected-slot antenna includes a dielectric substrate, a circular patch overlying the dielectric substrate, and a first conductive ring surrounding the circular patch and overlying the dielectric substrate. The first conductive ring is isolated from the circular patch by a first connected slot. At least four feeds are coupled to the circular patch. Each of the at least four feeds are spaced from adjacent ones of the at least four feeds by approximately equal angular intervals. A metamaterial ground plane includes a plurality of conductive patches and a ground plane. The plurality of conductive patches are separated from the circular patch and the first conductive ring by at least the dielectric substrate. The ground plane is electrically coupled to at least a first portion of the plurality of conductive patches. One or more of the plurality of conductive patches and the ground plane are coupled to ground. |
| US09590313B2 |
Planar dual polarization antenna
A planar dual polarization antenna for receiving and transmitting radio signals includes a feeding transmission line layer, a first dielectric layer formed on the feeding transmission line layer, a metal grounding plate, a second dielectric layer formed on the metal grounding plate, and a first patch plate formed on the second dielectric layer with a shape substantially conforming to a cross pattern. A first slot and a second slot of the metal grounding plate are electrically coupled to a first feeding transmission line and a second feeding transmission line of the feeding transmission line layer respectively, to increase bandwidth of the planar dual polarization antenna. |
| US09590300B2 |
Electronically beam-steerable antenna device
An electronically beam-steerable antenna device comprises a dielectric lens having at least one flat surface, a high frequency dielectric board, a plurality of at least one primary antenna element with at least one transmission line formed on the high frequency dielectric board, and a switching network electrically connected to the said plurality of at least one primary antenna element and at least one transmission line and adapted to apply electric power to the at least one primary antenna element. The switching network is a semiconductor integrated circuit mounted in or on the high frequency dielectric board, and the high frequency dielectric board with the plurality of at least one antenna element and at least one transmission line formed thereon is adjacent to the flat surface of the dielectric lens.The electronically beam steerable antenna device according to the present invention allows for electronic beam steering in a continuous angle sector while increasing radiation efficiency. The antenna device according to the present invention may be used for providing high data rate point-to-point millimeter-wave communications in radio relay station applications. |
| US09590296B2 |
Antenna structure and method for assembling an RFID device
An antenna structure is disclosed. In the embodiment, the antenna structure includes a substrate and an antenna that is formed on the substrate, the antenna having a first end and a second end that are separated. The antenna structure also includes a heating element formed on the substrate with at least a portion of the heating element being located in the separation between the first and second ends of the antenna, with the heating element being electrically separate from the antenna. |
| US09590295B2 |
Antenna apparatus
An antenna apparatus includes an antenna element connected to a power feed point, a parasitic element disposed to overlap the antenna element as viewed from above and configured to be coupled to the antenna element, and a switch connected to the parasitic element and configured to switch connections to connect the parasitic element either to a given potential point or to a test-purpose terminal. |
| US09590294B2 |
Vehicle-mounted antenna device
A vehicle-mounted antenna device includes a base, a board, a circuit section, and a housing. The base is mountable on a roof of a vehicle. The board has an antenna element section and is stood on a surface of the base. The circuit section serves as at least part of a wireless communication circuit electrically connected to the antenna element section. The housing is made of a resin material and forms a projection of a vehicle outer shape. The board and the circuit section are located in space formed by the base and the housing. The board is stood on the surface of the base so that a first direction perpendicular to the surface of the base differs from a second direction equal to a thickness direction of the board. The circuit section implemented on the board at a position away from the base in the first direction. |
| US09590293B2 |
GPS/WiFi battery antenna
A dipole antenna assembly for an electronic device includes a rear mount having electronic components exposed at one of its surfaces, an antenna, a printed circuit board, and a battery. The antenna may be adjacent the rear flexible mount. The antenna includes a first portion and a second portion. The second portion comprises a transmission line. The printed circuit board can be connected to the antenna and the battery can be connected to a portion of the rear flexible mount and the printed circuit board. A positive arm of the dipole antenna assembly can include the battery, and a negative arm of the dipole antenna assembly can include the outside surface of the transmission line. |
| US09590290B2 |
Multiple band chassis antenna
A wireless device including a conductive chassis and a conductive coupling element is provided. The conductive coupling element may be connected to the conductive chassis and may cooperate with the conductive chassis to form a slit. An elongate feed element may be disposed within the slit. The coupling element may be configured to activate at least a portion of the conductive chassis to enable the chassis to operate as an antenna. |
| US09590288B2 |
Multilayer circuit substrate
A multilayer circuit substrate includes: a first signal line and a first ground conductor formed in a first conductive layer; and a second signal line and a second ground conductor formed in a second conductive layer, the second conductive layer facing the first conductive layer across an insulating layer. The first signal line intersects with the second signal line in a plan view of the multilayer circuit substrate, a space between the first ground conductor and first signal line is smaller in an intersection area of the first and second signal lines than a space in a non-intersection area, a space between the second ground conductor and second signal line is smaller in the intersection area than a space in the non-intersection area, and the first signal line is formed at a smaller line width in the intersection area than in the non-intersection area. |
| US09590287B2 |
Surge protected coaxial termination
A surge-protected coaxial termination includes a metallic outer body, a center conductor extending through a central bore of the outer body, and a spark gap created therebetween to discharge high-voltage power surges. A plurality of dielectric insulators surrounds the center conductor on opposite sides of the spark gap. High impedance inductive zones surround the spark gap to form a T-network low pass filter that nullifies the additional capacitance of the spark gap. An enlarged portion of a center conductor mitigates deleterious effects of arcing. An axial, carbon composition resistor is disposed inside the outer body, and inside the dielectric insulator to absorb the RF signal, and prevent its reflection. |
| US09590283B2 |
Tape-shaped electrode, metal-air battery employing same, and used tape-shaped electrode reducing device
Provided is a tape-shaped electrode that can effectively perform discharging and recharging even if the size thereof is increased. The tape-shaped electrode includes a plurality of conductive plates, and insulating coupling members that separably couple the plurality of conductive plates arranged in one direction in an insulating state. |
| US09590276B2 |
Non-aqueous electrolyte and electrochemical device with an improved safety
Disclosed is an electrochemical device comprising a cathode having a complex formed between a surface of a cathode active material and an aliphatic di-nitrile compound; and a non-aqueous electrolyte containing 1-10 wt % of a compound of Formula 1 or its decomposition product based on the weight of the electrolyte. |
| US09590274B2 |
Impact resistant electrolytes
A passively impact resistant composite electrolyte composition includes an electrolyte solvent, up to 2M of an electrolyte salt, and shear thickening ceramic particles having a polydispersity index of no greater than 0.1, an average particle size of in a range of 50 nm to 1 μm, and an absolute zeta potential of greater than ±40 mV. |
| US09590272B2 |
Non-aqueous electrolyte and lithium secondary battery using the same
The present invention relates to a non-aqueous electrolyte solution for a lithium secondary battery, comprising a sulfolane-based additive; and a lithium secondary battery using the same. The non-aqueous electrolyte solution for a lithium secondary battery according to the present invention comprises an ionizable lithium salt; an organic solvent; and a sulfolane compound of formula (I), the sulfolane compound being present in an amount of 0.1 to 5 parts by weight based on 100 parts by weight of the total weight of the lithium salt and the organic solvent. The non-aqueous electrolyte solution for a lithium secondary battery according to the present invention can exhibit superior storage characteristic and life cycle at a high temperature, with maintaining good output characteristic at a low temperature. |
| US09590269B2 |
Polyelectrolyte and energy storage device
A polyelectrolyte includes a first segment and a second segment, wherein the structure of the first segment is at least one of formula (1) and formula (2); the structure of the second segment is at least one of formula (3) and formula (4). The polyelectrolyte undergoes microphase separation to form a nanoscale ordered self-assembled microstructure. |
| US09590266B2 |
Electrolyte for lithium secondary battery and lithium secondary battery including the same
An electrolyte for a lithium secondary battery, the electrolyte including a lithium salt, a non-aqueous organic solvent, and a polar additive based on a substituted hetero-bicyclic compound. Oxidation of the electrolyte is prevented by formation of a polar thin film on a surface portion of the positive electrode, which facilitates transfer of lithium ions. The lithium secondary batteries using the electrolyte have excellent high temperature life characteristics and high temperature conservation characteristics. |
| US09590265B2 |
Cable-type secondary battery
The present invention relates to a cable-type secondary battery having a horizontal cross section of a predetermined shape and extending longitudinally, comprising: an inner electrode having an inner current collector and an inner electrode active material layer surrounding the outer surface of the inner current collector; a separation layer surrounding the outer surface of the inner electrode to prevent a short circuit between electrodes; and an outer electrode surrounding the outer surface of the separation layer and having an outer electrode active material layer and an open-structured outer current collector. |
| US09590261B2 |
Solid electrolyte, solid electrolyte membrane, fuel battery cell, and fuel battery
Provided is solid electrolyte utilizing a composite oxide of a RP-type structure, that is useful for achieving strong electromotive force and enhanced current-voltage characteristics of a fuel battery, has enhanced ion conductivity and sufficiently inhibited electronic conductivity, and is capable of intercalation of a large amount of water or hydrogen groups, as well as a solid electrolyte membrane, a fuel battery cell, and a fuel battery. The solid electrolyte and the solid electrolyte membrane of the present invention has been obtained by subjecting a particular composite oxide of a RP-type structure or a membrane thereof to a treatment of at least one of hydroxylation and hydration, and has a property that the mass determined by TG measurement at 400° C. is less than that at 250° C. by not less than 4.0%. |
| US09590259B2 |
Fuel cell system with high-potential avoidance control
A fuel cell system comprises: noise detection means for detecting the magnitude of noise in a driver's cabin of a fuel cell vehicle in which the fuel cell system is installed; and a control apparatus for controlling the operation of auxiliary machines. The control apparatus performs high-potential avoidance control to increase electric power consumed by the auxiliary machines so that a power-generation voltage of a fuel cell 1 becomes equal to or lower than a predetermined value, based on noise detected by the noise detection means. |
| US09590256B2 |
Gasket structure of fuel cell separator with improved air tight seal
Disclosed is a gasket structure for a fuel cell separator with an improved air tight seal/sealability. The gasket structure includes first and second main lines and a plurality of sub lines. The first and second main lines are disposed in a horizontal direction in the separator on different lines of a reaction surface and a cooling surface of the separator, respectively. The plurality of sub lines are disposed in a vertical direction of the separator on both surfaces at a uniform interval. Here, the first and second main lines and the plurality of sub lines integrally form a gate for reactance gases and cooling water, and a plurality of vacant spaces are formed to have a uniform size on the first and second main lines. |
| US09590250B2 |
Layer system, energy store, and method for manufacturing an energy store
A layer system includes at least three layers, the three layers including a top electrode layer, a bottom electrode layer, and an electrolyte layer situated between the top electrode layer and the bottom electrode layer. The electrolyte layer has a solid-state electrolyte, and at least one of the top and bottom electrode layers includes a paste-like composite layer. A layer system of this type may be used to manufacture in particular energy stores, such as rechargeable lithium-ion accumulators, having an enhanced capacity. Moreover, a method for producing a layer system or an energy store is described. |
| US09590245B2 |
Method for producing inorganic compounds
The present arrangement provides compounds (I) AaMm(YO4)yZz(I) that are obtained from precursors of the constituent elements by a method having steps that can include dispersion of the precursors in a liquid support having one or more ionic liquids made up of a cation and an anion the electric charges of which balance out to give a suspension of the precursors in the liquid. The suspension is heated to a temperature of 25 to 380° C. and the ionic liquid and the inorganic oxide of formula (I) are separated from the reaction of the precursors. |
| US09590241B2 |
Electrode for secondary battery, secondary battery and cable-type secondary battery comprising the same
The present invention provides an electrode for a secondary battery, more specifically an electrode for a secondary battery, comprising a current collector; an electrode active material layer formed on at least one surface or the whole outer surface of the current collector; a conductive material-coating layer formed on the top surface of the electrode active material layer and comprising a conductive material and a first polymer binder; and a porous coating layer formed on the top surface of the conductive material-coating layer and comprising a second polymer binder. Also, the present invention provides a secondary battery and a cable-type secondary battery comprising the electrode. |
| US09590235B2 |
Material for lithium secondary battery of high performance
Provided is a lithium mixed transition metal oxide having a composition represented by Formula I of LixMyO2 (M, x and y are as defined in the specification) having mixed transition metal oxide layers (“MO layers”) comprising Ni ions and lithium ions, wherein lithium ions intercalate into and deintercalate from the MO layers and a portion of MO layer-derived Ni ions are inserted into intercalation/deintercalation layers of lithium ions (“reversible lithium layers”) thereby resulting in the interconnection between the MO layers. The lithium mixed transition metal oxide of the present invention has a stable layered structure and therefore exhibits improved stability of the crystal structure upon charge/discharge. In addition, a battery comprising such a cathode active material can exhibit a high capacity and a high cycle stability. Further, such a lithium mixed transition metal oxide is substantially free of water-soluble bases, and thereby can provide excellent storage stability, decreased gas evolution and consequently superior high-temperature stability with the feasibility of low-cost mass production. |
| US09590231B2 |
Method of manufacturing 3D barrier substrate
An embodiment of the present invention discloses a 3D barrier substrate and a method for manufacturing the same, and a display device in order to improve the utilization of facilities, increase the production efficiency, and decrease the cost of production. The method of manufacturing 3D barrier substrate comprises: forming a transparent electrode thin film on a substrate, and forming a passivation layer on the transparent electrode thin film; forming an transparent electrode and a passivation layer via hole by a patterning process, wherein the via hole is used for coupling the transparent electrode to the signal line; and forming a signal line, wherein the signal line is coupled to the transparent electrode through the via hole. |
| US09590220B2 |
Rotation preventing structure of terminal bus bar of battery connector
A rotation preventing structure of a terminal bus bar of a battery connector includes a battery pack that includes a pack case in which a battery assembly having arranged batteries is accommodated, a battery connector that is mounted to the battery pack, a terminal bus bar that is formed on the battery connector and has a configuration where an external connection bus bar is fastened to a bolt fixed to one end portion of the terminal bus bar and an electrode of the battery at one end of the arranged batteries is fastened to the other end portion of the terminal bus bar, opposing wall parts that are formed on a case of the battery connector and hold the terminal bus bar, and a pair of support projections that is formed on an end plate of the pack case and holds the opposing wall parts. |
| US09590219B2 |
Electrode assembly and secondary battery having the same
An electrode assembly and a secondary battery including the same, the electrode assembly including a first electrode plate, the first electrode plate including a first electrode collector on which a first active material is coated, and a first electrode tab protruding in parallel with a lengthwise direction of the first electrode collector; a second electrode plate, the second electrode plate including a second electrode collector on which a second active material is coated, and a second electrode tab protruding in parallel with a lengthwise direction of the second electrode collector; a first separator between the first and second electrode plates; and a second separator at an outside of the second electrode plate, wherein the first and second electrode tabs protrude in directions opposite to each other perpendicular to a winding axis. |
| US09590215B2 |
Power control module and battery pack including the same
Disclosed are a power control module and a battery pack having the same. The battery pack includes a housing, a battery cell received in the housing and including a power terminal, a power control module provided at one side thereof with a first connection terminal, provided at an opposite side thereof with a battery connection terminal connected with the power terminal, and having a structure in which chip parts are packaged, and a cell cover coupled with an upper portion of the housing. |
| US09590214B2 |
Secondary battery structure
The present invention relates to a secondary battery structure. The secondary battery structure includes: a can; an electrode assembly accommodated in the can, the electrode assembly including a cathode tab and an anode tab; a cap plate sealing an opened upper end of the can; and an upper insulator disposed between the can and the cap plate, the upper insulator having a cathode tab hole for the cathode tab, an anode tab hole for the anode tab, and an injection/impregnation hole for injecting and impregnating, wherein each of the cathode tab hole, the anode tab hole, and the injection/impregnation hole extends in a length or width direction of the upper insulator and is symmetrical with respect to at least one of a line (a) that equally divides the upper insulator in a width direction and a line (b) that equally divides the upper insulator in a length direction. |
| US09590213B2 |
Organic light-emitting display device, method of manufacturing the same, and donor substrate and donor substrate set used to manufacture the organic light-emitting display device
An organic light-emitting display device, a method of manufacturing the same, and a donor substrate and a donor substrate set used to manufacture the organic light-emitting display device. According to an aspect of the present invention, there is provided an organic light-emitting display device comprising a substrate which comprises a green region and a red region, a plurality of first electrodes which are formed on the green region and the red region of the substrate, respectively, a plurality of light-emitting layers which are formed on the first electrodes and comprise a green light-emitting layer formed on the green region and a red light-emitting layer formed on the red region, and a second electrode which is formed on the light-emitting layers, wherein the green light-emitting layer comprises a first light-emitting layer which comprises a first host material and a first dopant material and a first buffer layer which is formed on the first light-emitting layer and comprises the first host material, and the red light-emitting layer comprises a second light-emitting layer which comprises a second host material and a second dopant material and a second buffer layer which is formed on the second light-emitting layer and comprises the first host material. |
| US09590212B2 |
Organic EL display device and method for manufacturing the organic EL display device
An organic EL display device includes a first organic layer that is arranged between lower electrodes and an upper electrode, and formed of a plurality of layers including a light emitting layer, a laminated auxiliary line that has a first auxiliary line and a second auxiliary line, and laminated on each other in order, and extend in one direction between two of pixels adjoining each other, and a second organic layer that is formed of a plurality of the same layers as the first organic layer, and arranged in contact with the first auxiliary line in a connection hole opened in the second auxiliary line so as to come out of contact with the first organic layer, in which the upper electrode is arranged in contact with the first auxiliary line around the second organic layer so as to embed the connection hole. |
| US09590207B2 |
Deposition apparatus, method for forming thin film using the same, organic light emitting display apparatus and method for manufacturing the same
A deposition apparatus is configured to form a deposition layer on a substrate. The deposition apparatus includes a deposition source configured to face a first side of the substrate and to spray one or more depositing materials toward the substrate, a cooling stage configured to support a second side of the substrate that is opposite from the first side of the substrate, and a hardening unit configured to harden the one or more depositing materials sprayed from the deposition source and that have reached the substrate. A method of forming a thin film deposition layer on a substrate by using a deposition apparatus is also provided. The method includes spraying one or more depositing materials toward the substrate by using a deposition source of the deposition apparatus while the substrate is on a cooling stage of the deposition apparatus. |
| US09590206B2 |
OLED package device and package method of OLED panel
The present invention provides an OLED package device and a package method of an OLED panel. The package device comprises: a base body (10), a lower stage (30) installed on the base body (10) and a heating device (50) installed between the base body (10) and the lower stage (30), and the lower stage (30) is employed to load a package plate, and the heating device (50) can heat the lower stage (30), and the lower stage (30) passes heat to the package plate for heating up the package plate. Using the device, it is capable of solving issue of existing bubbles in underfill which is under filled as implementing Dam & Fill package, and accordingly to improve the package result, to raise the performance of the OLED elements, and to extend the lifetime of the OLED elements. |
| US09590202B2 |
Organic light emitting display device and method of manufacturing the same
An organic light emitting display device includes a first substrate, a first electrode layer including a plurality of first electrodes and an auxiliary electrode on the first substrate, the auxiliary electrode being spaced apart from the first electrodes in a plan view, an organic layer on the first electrode layer, the organic layer overlapping the first electrodes of the first electrode layer, a second electrode layer on the first electrode layer, the second electrode layer overlapping the first electrodes and the auxiliary electrode of the first electrode layer, a second substrate on the second electrode layer, and a connection member penetrating through the second electrode layer and through the organic layer to electrically connect the second electrode layer and the auxiliary electrode, the connection member contacting the second substrate. |
| US09590200B2 |
Organic light emitting device, method of manufacturing the same, and organic light emitting display apparatus using the same
Disclosed are an organic light emitting device, a method of manufacturing the same, and an organic light emitting display apparatus using the same. In the organic light emitting device, an electron transporting layer is not provided between an emission layer and an electron injecting layer. Instead, the emission layer includes a first emission layer on a hole transporting layer, and a second emission layer on the first emission layer. The second emission layer includes a same material as a material of the first emission layer and further includes an n-type dopant material. |
| US09590197B2 |
Substrate for organic electronic device
Provided are a substrate for an organic electronic device (OED), an OED, and lighting. The substrate capable of forming an OED may have excellent performances including light extraction efficiency and prevent penetration of moisture or a gas from an external environment, and thus an OED having excellent performance and durability may be provided. |
| US09590196B2 |
Dinuclear metal complexes comprising carbene ligands and the use thereof in OLEDs
The present invention relates to dinuclear metal-carbene complexes comprising a central atom selected from platinum and palladium, where both metal atoms are cyclometalated to the same aromatic group, to OLEDs (Organic Light-Emitting Diodes) which comprise such complexes, to a device selected from the group consisting of illuminating elements, stationary visual display units and mobile visual display units comprising such an OLED, to the use of such a metal-carbene complex in OLEDs, for example as emitter, matrix material, charge transport material and/or charge or exciton blocker. |
| US09590191B2 |
Organic compound and organic light emitting diode using the same
Discussed is an organic electroluminescent device including a first charge carrying layer being disposed adjacent to a first electrode; and a second charge carrying layer disposed adjacent to a second electrode, wherein the first charge carrying layer includes an emitting part, a hole injection part and a hole transporting part between the hole injection part and the emitting part, wherein at least one of the hole injection part, the hole transporting part and the emitting part includes a host material having an organic compound of Formula: wherein R is substituted or non-substituted C1 to C12 alkyl, and A and B are symmetrically or asymmetrically positioned in 2-position or 7-position of the fluorene core, and wherein each of A and B is independently selected from substituted or non-substituted aromatic group or substituted or non-substituted heterocyclic group. |
| US09590186B2 |
Material for organic electroluminescent device and organic electroluminescent device including the same
A material for an organic electroluminescent device having high emission efficiency and long life and an organic electroluminescent device including the same. The material for an organic electroluminescent device is represented by the following Formula 5. |
| US09590182B2 |
Benzofluorene compound, material for luminescent layer using said compound and organic electroluminescent device
The present invention is capable of providing a light emitting device with excellent device lifetime while maintaining low driving voltage and good color purity by using a benzofluorene compound which is substituted with a diaryl amino group having a naphthyl and a phenyl or a heteroaryl and which is represented by general formula (1) as a material for luminescent layers of an organic electroluminescent device, for example. (In the formula, Ar is a phenyl, a heteroaryl, etc., R1 and R2 are fluorine or a substituted silyl, etc., n1 and n2 are an integer of 0-5, and R3 is an alkyl, etc.) |
| US09590181B2 |
Triptycene derivatives having symmetric or asymmetric substituents and organic light emitting diode using the same
Triptycene derivatives having symmetric or asymmetric substituents are provided. The triptycene derivatives of the present invention may be applied in phosphorescent lighting devices ranging from deep blue to red and may be applied as a host material, an electron transporting material or a hole transporting material. An OLED device is also herein disclosed. |
| US09590177B2 |
Organic light-emitting display panel and fabrication method thereof
An organic light-emitting display panel and a fabrication method thereof include using an inkjet printing process to form the organic emission material of the display panel and providing a specific design of the relative position of the spacer and the planarization layer with ink-repellent material such that the spacer can be effectively fixed on the array substrate without falling from the planarization layer. |
| US09590175B2 |
Method for producing a semiconductor device
A semiconductor device includes four or more memory cells arranged on a row, the memory cells each including a first pillar-shaped semiconductor layer, a first gate insulating film around the semiconductor layer, a first gate line around the first gate insulating film, a third gate insulating film around an upper portion of the semiconductor layer, a first contact electrode around the third gate insulating film, a second contact electrode connecting upper portions of the semiconductor layer and the first contact electrode, and a magnetic tunnel junction storage element on the second contact electrode, a first source line connecting lower portions of the semiconductor layers to each other, a first bit line extending in a direction perpendicular to a direction of the first gate line and connected to an upper portion of the storage element, and a second source line extending in a direction perpendicular to the first source line. |
| US09590169B2 |
Drive device, lens module, and image pickup unit
There are provided a drive device and the like that are capable of suppressing characteristic degradation according to ambient environment. The drive device includes one or a plurality of polymer actuator devices each configured using an ion-exchange resin, and the ion-exchange resin contains operating ions that have activation energy equal to or smaller than a predetermined threshold. Degradation in ion conductivity in the ion-exchange resin is suppressed even in environment with low humidity, high temperature, and the like. |
| US09590166B2 |
Vibrator equipped with piezoelectric element
A vibrator equipped with a piezoelectric element includes a vibrating member which is formed into a flat type and of which both ends are coupled to an object; a piezoelectric element which is coupled to an upper or lower surface of the vibrating member; and a power supply part which supplies power to the piezoelectric element, wherein the vibrating member includes an operating part including a first operating surface which is disposed horizontally and a second operating surface which is bent down and extended from both ends of the first operating surface; and a fixing part which is extended from the both ends of the operating so as to be coupled to the object. |
| US09590165B2 |
Acoustic resonator comprising aluminum scandium nitride and temperature compensation feature
An acoustic resonator structure comprises a first electrode disposed on a substrate, a piezoelectric layer disposed on the first electrode and comprising aluminum scandium nitride, a second electrode disposed on the piezoelectric layer, and a temperature compensation feature having a temperature coefficient offsetting at least a portion of a temperature coefficient of the piezoelectric layer, the first electrode, and the second electrode. |
| US09590161B2 |
Laser processing of superconductor layers
A method of forming a superconductor includes exposing a layer disposed on a substrate to an oxygen ambient, and selectively annealing a portion of the layer to form a superconducting region within the layer. |
| US09590159B2 |
Thermoelectric power generation from power feeder
Apparatuses, methods, and systems are disclosed to use thermoelectric generating (TEG) devices to generate electricity from heat generated by a power cable. An apparatus includes multiple thermoelectric generating (TEG) devices. Each of the TEG devices has a first surface configured to be positioned in thermal communication with an outer surface of the power cable and a second surface configured to be positioned proximate to an ambient environment around the power cable. The apparatus also includes a set of terminals electrically coupled to the TEG devices. When a temperature differential exists between the first surface and the second surface, the TEG devices convert heat into electricity presented at the set of terminals. |
| US09590156B2 |
Light-emitting device package and method of manufacturing thereof
The present invention provides a light-emitting diode (LED) package including: a substrate on which a set of bonding pads are formed; an LED element configured to provide light of a predetermined wavelength region, having a set of chip pads formed on a top surface thereof and being attached on a top surface of the substrate; a set of gold wires connecting the bonding pads of the substrate with the chip pads of the LED element; a phosphor layer formed in a cap shape having side and top portions of a uniform thickness and being configured to surround sides and a top surface of the LED element while being spaced apart therefrom; and a filler disposed to fill a space formed between the phosphor layer and the LED element, wherein the LED element, the gold wires, and the bonding pads of the substrate are under the phosphor layer cap. |
| US09590149B2 |
Lighting emitting device
A light emitting device is disclosed. The light emitting device includes: a light emitting diode emitting light having a peak wavelength in the range of 415 nm to 435 nm; and a wavelength conversion unit disposed on the light emitting diode, wherein the wavelength conversion unit includes cyan phosphors emitting light having a peak wavelength in a cyan light wavelength band and red phosphors emitting light having a peak wavelength in a red light wavelength band, and a ratio of an output of light having a wavelength in the range of 435 nm to 465 nm to a total output of light emitted from the light emitting device is approximately equal to or less than 3%. |
| US09590147B2 |
Conversion element for light-emitting diodes and production method
A method of producing a conversion element includes forming a preform from a glass, reshaping the preform into a structured glass fiber using a structuring element, and dividing the glass fiber into conversion elements. |
| US09590146B2 |
Method for fabrication of a luminescent structure
A method for fabricating an LED/phosphor structure is described where an array of blue light emitting diode (LED) dies are mounted on a submount wafer. A phosphor powder is mixed with an organic polymer binder, such as an acrylate or nitrocellulose. The liquid or paste mixture is then deposited over the LED dies or other substrate as a substantially uniform layer. The organic binder is then removed by being burned away in air, or being subject to an O2 plasma process, or dissolved, leaving a porous layer of phosphor grains sintered together. The porous phosphor layer is impregnated with a sol-gel (e.g., a sol-gel of TEOS or MTMS) or liquid glass (e.g., sodium silicate or potassium silicate), also known as water glass, which saturates the porous structure. The structure is then heated to cure the inorganic glass binder, leaving a robust glass binder that resists yellowing, among other desirable properties. |
| US09590144B2 |
Light emitting device having wide beam angle and method of fabricating the same
A light emitting device including a light emitting structure disposed on one surface of a substrate and a transflective portion disposed on the other surface of the substrate. The transflective portion and the substrate have different indexes of refraction from one another. |
| US09590142B2 |
Light emitting diode having magnetic structure and method of fabricating the same
A light emitting diode including a magnetic structure and a method of fabricating the same are disclosed. The magnetic structure composed of passivation layers and a magnetic layer is disposed inside a luminous structure composed of an active layer and a semiconductor layer. In the light emitting diode, the magnetic structure including the magnetic layer is disposed on a side surface of the active layer to improve recombination rate of charge carriers for light emission by increasing influence of a magnetic field applied to the active layer. In addition, the light emitting diode according to the present invention allows change in position of the magnetic structure including the magnetic layer depending upon an etched shape of the luminous structure, thereby realizing various magnetic field distributions. |
| US09590139B1 |
Light emitting module
A light emitting module including a driving unit and a light emitting diode is provided. The light emitting diode is electrically connected to the driving unit and the driving unit provides an operating current to make the light emitting diode emit light. The light emitting diode includes an n-type semiconductor layer, a light-emitting layer, an electron-blocking layer, and a p-type semiconductor layer. The electron-blocking layer has a thickness, and the thickness is smaller than or equal to 30 nm or is larger than or equal to 80 nm. The light-emitting layer is located between the electron-blocking layer and the n-type semiconductor layer. The electron-blocking layer is located between the p-type semiconductor layer and the light-emitting layer. A ratio of current density of the light emitting diode to the thickness is larger than 0 and is smaller than or equal to 2. |
| US09590131B2 |
Systems and methods for advanced ultra-high-performance InP solar cells
Systems and Methods for Advanced Ultra-High-Performance InP Solar Cells are provided. In one embodiment, an InP photovoltaic device comprises: a p-n junction absorber layer comprising at least one InP layer; a front surface confinement layer; and a back surface confinement layer; wherein either the front surface confinement layer or the back surface confinement layer forms part of a High-Low (HL) doping architecture; and wherein either the front surface confinement layer or the back surface confinement layer forms part of a heterointerface system architecture. |
| US09590127B2 |
Dual conversion gain image sensor cell
An image sensor cell formed inside and on top of a substrate of a first conductivity type, including: a read region of the second conductivity type; and, adjacent to the read region, a storage region of the first conductivity type topped with a first insulated gate electrode. The first electrode is arranged to receive, in a first operating mode, a first voltage causing the inversion of the conductivity type of the storage region, so that the storage region behaves as an extension of the read region, and, in a second operating mode, a second voltage causing no inversion of the storage region. |
| US09590117B2 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes a charge storage layer on a first insulating film, a second insulating film which is provided on the charge storage layer, formed of layers, and a control gate electrode on the second insulating film. The second insulating film includes a bottom layer (A) provided just above the charge storage layer, a top layer (C) provided just below the control gate electrode, and a middle layer (B) provided between the bottom layer (A) and the top layer (C). The middle layer (B) has higher barrier height and lower dielectric constant than both the bottom layer (A) and the top layer (C). The average coordination number of the middle layer (B) is smaller than both the average coordination number of the top layer (C) and the average coordination number of the bottom layer (A). |
| US09590115B2 |
Semiconductor device
A semiconductor device includes a first conductor, a second conductor, a first insulator, a second insulator, a third insulator, a semiconductor, and an electron trap layer. The semiconductor includes a channel formation region. The electron trap layer overlaps with the channel formation region with the second insulator interposed therebetween. The first conductor overlaps with the channel formation region with the first insulator interposed therebetween. The second conductor overlaps with the electron trap layer with the third insulator interposed therebetween. The second conductor does not overlap with the channel formation region. |
| US09590114B1 |
Semiconductor device and method of manufacturing the same
A semiconductor device is provided, comprising a substrate with a first insulating film formed thereon, and a transistor formed on the first insulating film. The transistor at least comprises an oxide semiconductor layer formed on the first insulating film, a first gate insulation film formed on the oxide semiconductor layer, a gate electrode formed above the first gate insulation film, and spacers formed on the oxide semiconductor layer. The spacers at least cover the sidewalls of the first gate insulation film and the sidewalls of the gate electrode. The gate electrode has a gate width and the first gate insulation film has a first width, wherein the gate width is different from the first width. |
| US09590108B2 |
Gate-all-around fin device
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type. |
| US09590106B1 |
Semiconductor device including epitaxially formed buried channel region
A semiconductor device includes at least one semiconductor fin on an upper surface of a substrate. The at least one semiconductor fin includes a channel region interposed between opposing source/drain regions. A gate stack is on the upper surface of the substrate and wraps around sidewalls and an upper surface of only the channel region. The channel region is a dual channel region including a buried channel portion and a surface channel portion that completely surrounds the buried channel. |
| US09590104B2 |
Gate device over strained fin structure
A method for forming a semiconductor device includes forming a fin structure on a substrate, forming a shallow trench isolation region adjacent the fin structure so that an upper portion of the fin structure is exposed, forming a dummy gate over the exposed fin structure, forming an interlayer dielectric layer around the dummy gate, removing the dummy gate to expose the fin structure, and after removing the dummy gate, introducing a strain into a crystalline structure of the exposed fin structure. |
| US09590100B2 |
Semiconductor devices containing an epitaxial perovskite/doped strontium titanate structure
Semiconductor devices are provided such as, ferroelectric transistors and floating gate transistors, that include an epitaxial perovskite/doped strontium titanate structure formed above a surface of a semiconductor substrate. The epitaxial perovskite/doped strontium titanate structure includes a stack of, in any order, a doped strontium titanate and a perovskite type oxide. |
| US09590099B2 |
Semiconductor devices having gate structures and methods of manufacturing the same
Semiconductor devices are provided including an active layer, a gate structure, a spacer, and a source/drain layer. The active layer is on the substrate and includes germanium. The active layer includes a first region having a first germanium concentration, and a second region on both sides of the first region. The second region has a top surface getting higher from a first portion of the second region adjacent to the first region toward a second portion of the second region far from the first region, and has a second germanium concentration less than the first germanium concentration. The gate structure is formed on the first region of the active layer. The spacer is formed on the second region of the active layer, and contacts a sidewall of the gate structure. The source/drain layer is adjacent to the second region of the active layer. |
| US09590098B2 |
Method for producing semiconductor device and semiconductor device
A method for producing a semiconductor device includes a first step of forming a first insulating film around the fin-shaped semiconductor layer; a second step of forming a pillar-shaped semiconductor layer and a first dummy gate formed of a first polysilicon; a third step of forming a second dummy gate on sidewalls of the first dummy gate and the pillar-shaped semiconductor layer; a fourth step of forming a fifth insulating film left as a sidewall around the second dummy gate, forming a second diffusion layer in an upper portion of the fin-shaped semiconductor layer and a lower portion of the pillar-shaped semiconductor layer, and forming a metal-semiconductor compound on the second diffusion layer; a fifth step of forming a gate electrode and a gate line; and a sixth step of depositing a second gate insulating film around the pillar-shaped semiconductor layer and on the gate electrode and the gate line, removing a portion of the second gate insulating film on the gate line, depositing a second metal, etching back the second metal, removing the second gate insulating film on the pillar-shaped semiconductor layer, depositing a third metal, and etching a portion of the third metal and a portion of the second metal to form a first contact in which the second metal surrounds a sidewall of an upper portion of the pillar-shaped semiconductor layer, a second contact that connects an upper portion of the first contact and an upper portion of the pillar-shaped semiconductor layer, and a third contact made of the second metal and the third metal and formed on the gate line. |
| US09590097B2 |
Semiconductor devices and related fabrication methods
Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a body region of semiconductor material having a first conductivity type, a source region of semiconductor material having a second conductivity type within the body region, a junction isolation region of semiconductor material having the second conductivity type, a drain region of semiconductor material having the second conductivity type, and first and second drift regions of semiconductor material having the second conductivity type. The first drift region resides laterally between the drain region and the junction isolation region, the junction isolation region resides laterally between the first drift region and the second drift region, and the second drift region resides laterally between the body region and the junction isolation region. |
| US09590096B2 |
Vertical FET having reduced on-resistance
In one implementation, a vertical field-effect transistor (FET) includes a substrate having a drift region situated over a drain, a body region situated over the drift region and having source diffusions formed therein, a gate trench extending through the body region, and channel regions adjacent the gate trench. The channel regions are spaced apart along the gate trench by respective deep body implants. Each of the deep body implants is situated approximately under at least one of the source diffusions, and has a depth greater than a depth of the gate trench. |
| US09590095B2 |
Semiconductor device with field electrode structures in a cell area and termination structures in an edge area
A semiconductor device includes field electrode structures regularly arranged in lines in a cell area and forming a first portion of a regular pattern. Termination structures are formed in an inner edge area surrounding the cell area, wherein at least portions of the termination structures form a second portion of the regular pattern. Cell mesas separate neighboring ones of the field electrode structures from each other in the cell area and include first portions of a drift zone, wherein a voltage applied to a gate electrode controls a current flow through the cell mesas. At least one doped region forms a homojunction with the drift zone in the inner edge area. |
| US09590093B2 |
Semiconductor device
In general, according to one embodiment, a semiconductor device includes, a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, a fourth semiconductor region, a fifth semiconductor region, and a gate electrode. The third semiconductor region includes a first portion and a second portion. The first portion is provided between the second semiconductor regions adjacent to each other. An amount of impurity of the second conductivity type in the first portion is greater than an amount of impurity of the first conductivity type in the second semiconductor region contiguous to the first portion. The second portion is arranged with a part of the first semiconductor region. An amount of impurity of the second conductivity type in the second portion is smaller than an amount of impurity of the first conductivity type in the part of the first semiconductor region. |
| US09590089B2 |
Variable gate width for gate all-around transistors
Nanowire-based gate all-around transistor devices having one or more active nanowires and one or more inactive nanowires are described herein. Methods to fabricate such devices are also described. One or more embodiments of the present invention are directed at approaches for varying the gate width of a transistor structure comprising a nanowire stack having a distinct number of nanowires. The approaches include rendering a certain number of nanowires inactive (i.e. so that current does not flow through the nanowire), by severing the channel region, burying the source and drain regions, or both. Overall, the gate width of nanowire-based structures having a plurality of nanowires may be varied by rendering a certain number of nanowires inactive, while maintaining other nanowires as active. |
| US09590087B2 |
Compound gated semiconductor device having semiconductor field plate
A transistor includes a source, a drain spaced apart from the source, and a heterostructure body having a two-dimensional charge carrier gas channel for connecting the source and the drain. The transistor further includes a semiconductor field plate disposed between the source and the drain. The semiconductor field plate is configured to at least partly counterbalance charges in the drain when the transistor is in an off state in which the channel is interrupted and a blocking voltage is applied to the drain. The counterbalance charge provided by the semiconductor field plate is evenly distributed over a plane or volume of the semiconductor field plate. Various semiconductor field plate configurations and corresponding manufacturing methods are described herein. |
| US09590086B2 |
Buffer stack for group IIIA-N devices
A method of fabricating a multi-layer epitaxial buffer layer stack for transistors includes depositing a buffer stack on a substrate. A first voided Group IIIA-N layer is deposited on the substrate, and a first essentially void-free Group IIIA-N layer is then deposited on the first voided Group IIIA-N layer. A first high roughness Group IIIA-N layer is deposited on the first essentially void-free Group IIIA-N layer, and a first essentially smooth Group IIIA-N layer is deposited on the first high roughness Group IIIA-N layer. At least one Group IIIA-N surface layer is then deposited on the first essentially smooth Group IIIA-N layer. |
| US09590072B1 |
Method of forming semiconductor device
The present invention provides a method of forming a semiconductor device including following steps. Firstly, a fin shaped structure is formed on a substrate, and a gate structure is formed to be across the fin shaped structure. Next, a dielectric layer is formed on the substrate, covering the gate structure, and a gate electrode of the gate structure is removed, to form a first gate trench. Then, a threshold voltage implantation process and a compensated threshold voltage implantation process are sequentially performed in the first gate trench, to implant compensated two dopants respectively. Following these, a work function layer and a conductive layer are formed to fill the first gate trench. |
| US09590068B2 |
High-mobility multiple-gate transistor with improved on-to-off current ratio
A multi-gate transistor includes a semiconductor fin over a substrate. The semiconductor fin includes a central fin formed of a first semiconductor material; and a semiconductor layer having a first portion and a second portion on opposite sidewalls of the central fin. The semiconductor layer includes a second semiconductor material different from the first semiconductor material. The multi-gate transistor further includes a gate electrode wrapping around sidewalls of the semiconductor fin; and a source region and a drain region on opposite ends of the semiconductor fin. Each of the central fin and the semiconductor layer extends from the source region to the drain region. |
| US09590065B2 |
Semiconductor device with metal gate structure comprising work-function metal layer and work-fuction adjustment layer
The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate structure formed in an opening of an insulating layer. The metal gate structure includes a gate dielectric layer, a barrier layer, a work-function meta layer between the gate dielectric layer and the barrier layer and a work-function adjustment layer over the barrier layer, wherein the work-function metal has an ordered grain orientation. The present disclosure also provides a method of making a semiconductor device with a profiled work-function metal gate electrode. |
| US09590064B2 |
Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit
An integrated circuit includes an active zone lying above a semiconductor substrate. A cavity borders the active zone and extends, in an insulating zone, as far as into the vicinity of a semiconductor region. An insulating multilayer is provided and an electrically conductive contact extends within the insulating multilayer to emerging onto the active zone and into the cavity. The insulating multilayer includes a first insulating layer covering the active zone outside the contact and lining the walls of the cavity. An additional insulating layer covers the portion of the first insulating layer lining the walls of the cavity. The contact reaches the additional insulating layer in the cavity. An insulating region lies on top of the first insulating layer and the additional insulating layer made from insulating material around the contact. |
| US09590063B2 |
Method and structure for a large-grain high-K dielectric
A method of forming a semiconductor device (100) includes depositing a metal oxide (104) over the substrate (102). The depositing includes combining a first metal and oxygen to form the metal oxide having grains and further adding a catalyst during the combining. The catalyst causes the grains to be bigger than would occur in the absence of the catalyst. A conductive layer (202) is formed over the metal oxide. |
| US09590057B2 |
Reduced parasitic capacitance with slotted contact
A FET device fabricated by providing a first conductor on a substrate, the first conductor having a first top surface with a first height above the substrate. A second conductor is provided adjacent the first conductor, the second conductor having a second top surface with a second height above the substrate. A portion of the second conductor is removed to provide a slot, wherein the slot is defined by opposing interior sidewalls and a bottom portion, such that the bottom portion of the slot is below the first height of the first conductor. An insulating material is deposited in the slot, the insulating material having a third top surface with a third height above the substrate, the third height being below the second height of the second conductor to provide space within the slot for a third conductor. The space within the slot is then filled with the third conductor. |
| US09590053B2 |
Methodology and structure for field plate design
The present disclosure relates to a high voltage transistor device having a field plate, and a method of formation. In some embodiments, the high voltage transistor device has a gate electrode disposed over a substrate between a source region and a drain region located within the substrate. A dielectric layer laterally extends from over the gate electrode to a drift region arranged between the gate electrode and the drain region. A field plate is located within a first inter-level dielectric layer overlying the substrate. The field plate laterally extends from over the gate electrode to over the drift region and vertically extends from the dielectric layer to a top surface of the first ILD layer. A plurality of metal contacts, having a same material as the field plate, vertically extend from a bottom surface of the first ILD layer to a top surface of the first ILD layer. |
| US09590040B2 |
Methods of forming fins for a FinFET device by forming and replacing sacrificial fin structures with alternative materials
One illustrative method disclosed herein includes, among other things, forming a sacrificial fin structure above a semiconductor substrate, forming a layer of insulating material around the sacrificial fin structure, removing the sacrificial fin structure so as to define a replacement fin cavity in the layer of insulating material that exposes an upper surface of the substrate, forming a replacement fin in the replacement fin cavity on the exposed upper surface of the substrate, recessing the layer of insulating material, and forming a gate structure around at least a portion of the replacement fin exposed above the recessed layer of insulating material. |
| US09590037B2 |
p-FET with strained silicon-germanium channel
A method of forming a semiconductor structure includes forming a dummy gate above a semiconductor substrate. The dummy gate defines a source-drain region adjacent to the dummy gate and a channel region below the dummy gate. A silicon-germanium layer is epitaxially grown above the source-drain region with a target concentration of germanium atoms. The semiconductor structure is annealed to diffuse the germanium atoms from the silicon-germanium layer into the channel region to form a silicon-germanium channel region. |
| US09590032B2 |
Fin-FET device and manufacturing method thereof
A fin-like field-effect transistor (Fin-FET) device includes a substrate, a fin structure disposed on the substrate, and an isolation structure disposed adjacent to the fin structure. The fin structure includes a recessed structure, which a bottom of the recessed structure is below a top surface of the isolation structure. |
| US09590030B2 |
Semiconductor device having diode characteristic
According to one embodiment, a semiconductor device is provided. The semiconductor device has a first region formed of semiconductor and a second region formed of semiconductor which borders the first region. An electrode is formed to be in ohmic-connection with the first region. A third region is formed to sandwich the first region. A first potential difference is produced between the first and the second regions in a thermal equilibrium state, according to a second potential difference between the third region and the first region. |
| US09590029B2 |
Method for manufacturing insulated gate bipolar transistor
A method for manufacturing an insulated gate bipolar transistor (100) comprises: providing a substrate (10), forming a field oxide layer (20) on a front surface of the substrate (10), and forming a terminal protection ring (23); performing photoetching and etching on the active region field oxide layer (20) by using an active region photomask, introducing N-type ions into the substrate (10) by using a photoresist as a mask film; depositing and forming a polysilicon gate (31) on the etched substrate (10) of the field oxide layer (20), and forming a protection layer on the polysilicon gate (31); performing junction pushing on an introduction region of the N-type ions, and then forming a carrier enhancement region (41); performing photoetching by using a P well photomask, introducing P-type ions into the carrier enhancement region (41), and performing junction pushing and then forming a P-body region; performing, by means of the polysilicon gate, self-alignment introduction of N-type ions into the P-body region, and performing junction pushing and then forming an N-type heavily doped region; forming sidewalls on two sides of the polysilicon gate, introducing P-type ions into the N-type heavily doped region, and performing junction pushing and then forming a P-type heavily doped region; and removing the protection layer, and then performing introduction and doping of the polysilicon gate. The method reduces a forward voltage drop disposing the carrier enhancement region. |
| US09590028B2 |
Method and device for an integrated trench capacitor
A methodology for forming trench capacitors on an interposer wafer by an integrated process that provides high-capacitance, ultra-low profile capacitor structures and the resulting device are disclosed. Embodiments include forming a polymer block on a front side of an interposer wafer, patterning and etching the polymer block to form one or more trenches, and forming a capacitor on an upper surface of the polymer block and in the one or more trenches. |
| US09590026B2 |
High resistivity iron-based, thermally stable magnetic material for on-chip integrated inductors
An on-chip magnetic structure includes a palladium activated seed layer and a substantially amorphous magnetic material disposed onto the palladium activated seed layer. The substantially amorphous magnetic material includes nickel in a range from about 50 to about 80 atomic % (at. %) based on the total number of atoms of the magnetic material, iron in a range from about 10 to about 50 at. % based on the total number of atoms of the magnetic material, and phosphorous in a range from about 0.1 to about 30 at. % based on the total number of atoms of the magnetic material. The magnetic material can include boron in a range from about 0.1 to about 5 at. % based on the total number of atoms of the magnetic material. |
| US09590023B2 |
Organic light-emitting display apparatus and method of repairing the same
An organic light-emitting display apparatus includes: a plurality of dummy pixels including a dummy pixel circuit; a plurality of pixels including a first pixel including: a light-emitting element configured to emit light in response to a driving current supplied from the dummy pixel circuit; and a pixel circuit separated from the light-emitting element; a plurality of voltage lines configured to apply a power voltage to a power node of a second pixel; and a plurality of repair lines including: a first repair line coupling the dummy pixel circuit and the light-emitting element and configured to transfer to the light-emitting element the driving current supplied from the dummy pixel circuit; and a second repair line coupling the dummy pixel circuit and the power node of the second pixel and configured to apply to the dummy pixel circuit the power voltage that is applied to the power node. |
| US09590022B2 |
Dual emitting device for active matrix organic electroluminescence
An organic electroluminescence (EL) device is provided, including a transparent substrate and an array of pixels over the transparent substrate. Each of the pixels includes at least one first sub-pixel and at least one second sub-pixel, wherein the at least one first sub-pixel each includes a first organic light emitting diode for providing light in a first direction, and the second sub-pixel each includes a second organic light emitting diode for providing light in a second direction substantially opposite to the first direction. |
| US09590021B2 |
Thin-film transistor, array substrate, and display device
A thin-film transistor includes a gate, a first source, a second source, a first drain, a second drain, a first semiconductor layer, a second semiconductor layer, a first insulation layer, and a second insulation layer. The gate includes a first surface and a second surface that are opposite to each other. The first insulation layer is formed on the first surface and covers the first surface. The first semiconductor layer is formed on the first insulation layer. The first drain and the first source are formed on the first semiconductor layer in a spaced manner. The second insulation layer is formed on the second surface and covers the second surface. The second semiconductor layer is formed on the second insulation layer. The second drain and the second source re formed on the second semiconductor layer in a spaced manner. Also disclosed are an array substrate and a display device. |
| US09590019B2 |
Display apparatus capable of controlling light transmittance
A display apparatus capable of controlling light transmittance includes: a transparent organic light emitting device comprising a first region including an emission region capable of emitting light and a second region adjacent to the first region in a horizontal direction and including a transmission region capable of transmitting external light therethrough; and a light transmission control device coupled to and facing the transparent organic light emitting device, the light transmission control device comprising a third region formed at a location corresponding to the first region and a fourth region adjacent to the third region in the horizontal direction and positioned to correspond to the second region, wherein the fourth region comprises a sealed cavity having a transmission control material layer therein, and the transmission control material layer is configured to be selectively driven by the light transmission control device. |
| US09590018B2 |
Organic light emitting display device
An organic light emitting display device including an organic light emitting element disposed on an insulation substrate, and an ambient light reflection preventing unit disposed on the organic light emitting element, the ambient light reflection preventing unit including a first metal layer, a first dielectric layer disposed on the first metal layer, the first metal layer and the first dielectric layer contacting each other, and a photovoltaic unit including the first metal layer as a first electrode. |
| US09590015B2 |
Multifunctional zinc oxide nano-structure-based circuit building blocks for re-configurable electronics and optoelectronics
A vertically integrated reconfigurable and programmable diode/memory resistor (1D1R) and thin film transistor/memory resistor (1T1R) structures built on substrates are disclosed. |
| US09590013B2 |
Device switching using layered device structure
A resistive switching device. The device includes a first electrode comprising a first metal material overlying the first dielectric material and a switching material comprising an amorphous silicon material. The device includes a second electrode comprising at least a second metal material. In a specific embodiment, the device includes a buffer material disposed between the first electrode and the switching material. The buffer material provides a blocking region between the switching material and the first electrode so that the blocking region is substantially free from metal particles from the second metal material when a first voltage is applied to the second electrode. |
| US09590012B2 |
Self-aligned cross-point phase change memory-switch array
Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same. |
| US09590011B2 |
Semiconductor device and method for producing semiconductor device
A semiconductor device includes a pillar-shaped resistance-changing layer and a reset gate insulating film that surrounds the pillar-shaped resistance-changing layer. A reset gate surrounds the reset gate insulating film, and the reset gate is electrically insulated from the pillar-shaped resistance-changing layer. |
| US09590010B1 |
Perpendicular magnetic tunnel junction (pMTJ) devices employing a thin pinned layer stack and providing a transitioning start to a body-centered cubic (BCC) crystalline / amorphous structure below an upper anti-parallel (AP) layer
Perpendicular magnetic tunnel junction (pMTJ) devices employing a pinned layer stack with a thin top anti-parallel (AP2) layer and having a transitioning layer providing a transitioning start to a body-centered cubic (BCC) crystalline/amorphous structure below the top anti-parallel (AP2) layer, to promote a high tunnel magnetoresistance ratio (TMR) with reduced pinned layer thickness are disclosed. A first anti-parallel (AP) ferromagnetic (AP1) layer in a pinned layer has a face-centered cubic (FCC) or hexagonal closed packed (HCP) crystalline structure. A transitioning material (e.g., Iron (Fe)) is provided in a transitioning layer between the AP1 layer and an AFC layer (e.g., Chromium (Cr)) that starts a transition from a FCC or HCP crystalline structure, to a BCC crystalline/amorphous structure. In this manner, a second AP ferromagnetic (AP2) layer disposed on the AFC layer can be provided in a reduced thickness BCC crystalline or amorphous structure to provide a high TMR with a reduced pinned layer thickness. |
| US09590008B2 |
Radiation-emitting semiconductor chip
A radiation-emitting semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, wherein an emission region and a protective diode region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region that generates radiation and is arranged between a first semiconductor layer and a second semiconductor layer; the first semiconductor layer is arranged on a side of the active region facing away from the carrier; the emission region has a recess extending through the active region; the first semiconductor layer, in the emission region, electrically conductively connects to a first connection layer, wherein the first connection layer extends in the recess from the first semiconductor layer toward the carrier; the second semiconductor layer, in the emission region, electrically conductively connects to a second connection layer. |
| US09590001B2 |
CMOS protection during germanium photodetector processing
A method of protecting a CMOS device within an integrated photonic semiconductor structure is provided. The method may include depositing a conformal layer of germanium over the CMOS device and an adjacent area to the CMOS device, depositing a conformal layer of dielectric hardmask over the germanium, and forming, using a mask level, a patterned layer of photoresist for covering the CMOS device and a photonic device formation region within the adjacent area. Openings are etched into areas of the deposited layer of silicon nitride not covered by the patterned photoresist, such that the areas are adjacent to the photonic device formation region. The germanium material is then etched from the conformal layer of germanium at a location underlying the etched openings for forming the photonic device at the photonic device formation region. The conformal layer of germanium deposited over the CMOS device protects the CMOS device. |
| US09590000B2 |
Laser daylight designation and pointing
A laser designator system using modulated CW laser diodes and a conventional high pixel count image sensor array, such as CCD or CMOS array. These two technologies, diode lasers and imaging sensor arrays are reliable, widely used and inexpensive technologies, as compared with prior art pulsed laser systems. These systems are distinguished from the prior art systems in that they filter the laser signal spatially, by collecting light over a comparatively long period of time from a very few pixels out of the entire field of view of the image sensor array. This is in contrast to the prior art systems where the laser signal is filtered temporarily, over a very short time span, but over a large fraction of the field of view. By spatially filtering the signal outputs of the individual pixels, it becomes possible to subtract the background illumination from the illuminated laser spot. |
| US09589993B2 |
Thin film transistor array panel and manufacturing method thereof
A thin film transistor array panel includes a substrate, a first gate electrode disposed on the substrate, a voltage wire disposed on the substrate, a gate insulating layer disposed on the first gate electrode and the voltage wire, a semiconductor pattern including an oxide semiconductor material disposed on the gate insulating layer, a source electrode and a drain electrode disposed at a distance from each other on the semiconductor pattern, a first passivation layer disposed on the source electrode and the drain electrode, and a first electrode disposed on the first passivation layer and connected with the voltage wire. |
| US09589989B2 |
Liquid crystal display device having a contact hole having an undercut shape
An array substrate for a liquid crystal display (LCD) device include: a substrate; a gate line formed in one direction on one surface of the substrate; a data line crossing the gate line to define a pixel area; a thin film transistor (TFT) configured at a crossing of the gate line and the data line; a pixel electrode formed at a pixel region of the substrate; an insulating film formed on the entire surface of the substrate including the pixel electrode and the TFT, including a first insulating film formed of a high temperature silicon nitride film and a second insulating film formed of a low temperature silicon nitride film, and having a contact hole having an undercut shape exposing the pixel electrode; a pixel electrode connection pattern formed within the contact hole having an undercut shape and connected with the pixel electrode and the TFT; and a plurality of common electrodes separately formed on the insulating film. |
| US09589988B2 |
Display device and method for manufacturing the same
With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. The increase in the numbers of gate lines and signal lines makes it difficult to mount an IC chip having a driver circuit for driving the gate line and the signal line by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit driving the pixel portion are provided over the same substrate. The pixel portion and at least a part of the driver circuit are formed using thin film transistors in each of which an oxide semiconductor is used. Both the pixel portion and the driver circuit are provided over the same substrate, whereby manufacturing costs are reduced. |
| US09589985B2 |
LTPS TFT substrate structure and method of forming the same
A method of forming an LTPS TFT substrate includes: Step 1: providing a substrate (1) and depositing a buffer layer (2); Step 2: depositing an a-Si layer (3); Step 3: depositing and patterning a silicon oxide layer (4); Step 4: taking the silicon oxide layer (4) as a photomask and annealing the a-Si layer (3) with excimer laser, so that the a-Si layer crystalizes and turns into a poly-Si layer; Step 5: forming a first poly-Si region (31) and a second poly-Si region (32); Step 6: defining a heavily N-doped area and a lightly N-doped area on the first and second poly-Si regions (31) and (32), and forming an LDD area; Step 7: depositing and patterning a gate insulating layer (5); Step 8: forming a first gate (61) and a second gate (62); Step 9: forming via holes (70); and Step 10: forming a first source/drain (81) and a second source/drain (82). |
| US09589984B2 |
Display apparatus, display module and pixel structure thereof
A pixel structure located on a periphery of a display module includes a substrate, a flexible circuit board and a plurality of LED chips. The substrate has at least one scribing tolerance reserving zone and a display unit mounting zone. The flexible circuit board is disposed on the display unit mounting zone of the substrate. The LED chips are mounted on the flexible circuit board. |
| US09589983B2 |
Efficient buried oxide layer interconnect scheme
An integrated circuit has a buried interconnect in the buried oxide layer connecting a body of a MOS transistor to a through-substrate via (TSV). The buried interconnect extends laterally past the TSV. The integrated circuit is formed by starting with a substrate, forming the buried oxide layer with the buried interconnect at a top surface of the substrate, and forming a semiconductor device layer over the buried oxide layer. The MOS transistor is formed in the semiconductor device layer so that the body makes an electrical connection to the buried interconnect. Subsequently, the TSV is formed through a bottom surface of the substrate so as to make an electrical connection to the buried interconnect in the buried oxide layer. A body of a transistor is electrically coupled to the TSV through the buried interconnect. |
| US09589973B2 |
Pillar-shaped semiconductor memory device and method for producing the same
A pillar-shaped semiconductor memory device includes a silicon pillar, and a tunnel insulating layer, a data charge storage insulating layer, a first interlayer insulating layer, and a first conductor layer, which surround an outer periphery of the silicon pillar in that order, and a second interlayer insulating layer that is in contact with an upper surface or a lower surface of the first conductor layer. A side surface of the second interlayer insulating layer facing a side surface of the first interlayer insulating layer is separated from the side surface of the first interlayer insulating layer with a distance therebetween, the distance being larger than a distance from the side surface of the first interlayer insulating layer to a side surface of the first conductor layer facing the side surface of the first interlayer insulating layer. |
| US09589971B1 |
Anti-fuse one-time programmable memory cell and anti-fuse one-time programmable memory array
An anti-fuse memory cell is provided. The anti-fuse memory cell includes a programmable transistor and a selection transistor. The programmable transistor includes a gate structure, a first doped region and a lightly doped region. The first doped region is divided into a first portion doped region, a second portion doped region and a third portion doped region. The first and second portion doped regions are respectively a source and a drain of the programmable transistor, and the third portion doped region is disposed between the first and second portion doped regions. The lightly doped region is distributed around a channel region of the programmable transistor, and adjacent to the first, second and third portion doped regions. The selection transistor includes a gate structure and a second doped region, and connected in series to the programmable transistor through the first portion doped region. |
| US09589969B1 |
Semiconductor device and manufacturing method of the same
Semiconductor devices and manufacturing methods of the same are disclosed. The semiconductor device includes a die, a conductive structure, a bonding pad and a passivation layer. The conductive structure is over and electrically connected to the die. The bonding pad is over and electrically connected to the conductive structure. The passivation layer is over the bonding pad, wherein the passivation layer includes a nitride-based layer with a refractive index of about 2.16 to 2.18. |
| US09589959B2 |
Compensated well ESD diodes with reduced capacitance
An integrated circuit with a shallow trench isolated, low capacitance, ESD protection diode. An integrated circuit with a gate space isolated, low capacitance, ESD protection diode. An integrated circuit with a gate space isolated, low capacitance, ESD protection diode in parallel with a shallow trench isolated, low capacitance, ESD protection diode. |
| US09589955B2 |
System on chip
Systems on chips are provided. A system on chip (SoC) includes a first gate line, a second gate line and a third gate line extending in a first direction, a gate isolation region cutting the first gate line, the second gate line and the third gate line and extending in a second direction across the first direction, a first gate contact formed on the second gate line arranged between the first gate line and the third gate line, and electrically connecting the cut second gate line, a second gate contact formed on the first gate line, a third gate contact formed on the third gate line, a first metal line electrically connecting the second gate contact and the third gate contact, and a second metal line electrically connected to the first gate contact. |
| US09589946B2 |
Chip with a bump connected to a plurality of wirings
According to one embodiment, a semiconductor device includes a first semiconductor chip; a first wiring and a second wiring which are provided above a first surface of the first semiconductor chip; a first terminal connected to one end of the first wiring and one end of the second wiring, and connected to an outside; a second terminal connected to the other end of the first wiring; and a third terminal connected to the other end of the second wiring, and connected to the second terminal. |
| US09589945B2 |
Semiconductor package having stacked semiconductor chips
A semiconductor package includes a package base substrate, at least one first semiconductor chip disposed on the package base substrate, and at least one stacked semiconductor chip structure disposed on the package base substrate adjacent to the at least one first semiconductor chip. The at least one stacked semiconductor chip includes a plurality of second semiconductor chips. A penetrating electrode region including a plurality of penetrating electrodes is disposed adjacent to an edge of the at least one stacked semiconductor chip structure. |
| US09589944B2 |
Method and structure for receiving a micro device
A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material. |
| US09589942B2 |
Package structure and manufacturing method thereof
A package structure includes a first substrate, a patterned solder mask, first thermal-conductive posts, a chip and a second substrate. The first substrate includes a first patterned metal layer, a second patterned metal layer, a first surface and a second surface. The first and second patterned metal layers are disposed on the first and second surfaces. The patterned solder mask disposed on the first and second patterned metal layers exposes part of the first and second patterned metal layers. The first thermal-conductive posts are disposed on the exposed first patterned metal layer and thermally coupled thereto. The chip is disposed on the first surface. The chip electrically connected to the first patterned metal layer is thermally coupled to the first thermal-conductive posts. Two opposite ends of each first thermal-conductive post are connected to the first and second substrates, and the first thermal-conductive posts are thermally coupled to the second substrate. |
| US09589939B2 |
Optoelectronic semiconductor chip
An optoelectronic semiconductor chip includes an interconnection layer with a first electrically conductive contact layer, a second electrically conductive contact layer and an insulation layer, which is formed of an electrically insulating material. Further, the optoelectronic semiconductor chip includes two optoelectronic semiconductor bodies, each of which include an active region that is intended to generate radiation. The insulation layer is arranged on a top of the second electrically conductive contact layer facing the optoelectronic semiconductor bodies. The first electrically conductive contact layer is arranged on a top of the insulation layer remote from the second electrically conductive contact layer. The optoelectronic semiconductor bodies are interconnected electrically in parallel by the interconnection layer. |
| US09589937B2 |
Semiconductor cooling method and method of heat dissipation
The invention provides a semiconductor cooling method that comprises: providing two wafers which require to be treated by a mixed bonding process, wherein each of the wafers being provided with several metallic device structure layers therein. A heat dissipation layer is set in at least one of the wafers and arranged in the free area above at least one of the metallic device structure layers, and the heat dissipation layer connects to the adjacent metallic device structure layer and the invention provides a method of heat dissipation that comprises providing at least two wafers to be bonded; and arranging some conducting wires on a surface of wafers. In addition, the method includes the steps of performing a bonding process to form a device with bonded wafers, wherein one end of the conducting wires locates in the region where the wafers generate heat, and another end extends to an external of wafers. |
| US09589936B2 |
3D integration of fanout wafer level packages
Fanout wafer level packages (FOWLPs) and methods of formation are described. In an embodiment, a package includes a first routing layer, a first die on a top side of the first routing layer, and a first molding compound encapsulating the first die on the first routing layer. A first plurality of conductive pillars extends from a bottom side of the first routing layer. A second die is on a top side of a second routing layer, and the first plurality of conductive pillars is on the top side of the routing layer. A second molding compound encapsulates the first molding compound, the first routing layer, the first plurality of conductive pillars, and the second die on the second routing layer. In an embodiment, a plurality of conductive bumps (e.g. solder balls) extends from a bottom side of the second routing layer. |
| US09589935B2 |
Package apparatus and manufacturing method thereof
A package apparatus includes a first package module, a second package module and multiple conductive elements. The first package module includes a first molding compound layer, a first conductive pillar layer disposed in the first molding compound layer, a first internal component, and a first protection layer. The first internal component electrically connects to the first conductive pillar layer and disposed in the first molding compound layer. The first protection layer is disposed on the first molding compound layer and the first conductive pillar layer. The second package module includes a second molding compound layer, a second conductive pillar layer disposed in the second molding compound layer, and a second internal component. The second internal component electrically connects to the second conductive pillar layer and disposed in the second molding compound layer. The conductive elements are disposed between the first and the second conductive pillar layers. |
| US09589934B2 |
Method for interconnecting stacked semiconductor devices
A method for making a semiconductor device includes forming rims on first and second dice. The rims extend laterally away from the first and second dice. The second die is stacked over the first die, and one or more vias are drilled through the rims after stacking. The semiconductor device includes redistribution layers extending over at least one of the respective first and second dice and the corresponding rims. The one or more vias extend through the corresponding rims, and the one or more vias are in communication with the first and second dice through the rims. |
| US09589933B2 |
Methods of processing wafer-level assemblies to reduce warpage, and related assemblies
Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in streets and at least surrounding stacks of semiconductor dice located on a wafer. Wafer-level methods of preparing semiconductor devices may involve attaching a wafer to a carrier substrate and forming stacks of laterally spaced semiconductor dice on die locations of the wafer. Molding material may be disposed over the die stacks on a surface of the wafer to at least surround the stacks of semiconductor dice with the molding material. Grooves may be formed in the molding material by partially cutting through the molding material between at least some of the stacks of semiconductor dice along streets between the die stacks. The resulting wafer-level assembly may then, when exposed to elevated temperatures during, for example, debonding the wafer from a carrier, exhibit reduced propensity for warping. |
| US09589928B2 |
Combined QFN and QFP semiconductor package
A semiconductor package includes a first lead frame type having a first type of package leads and a pre-molded portion, and a second lead frame type having a second type of package leads that surround a die pad and are supported by the pre-molded portion. An integrated circuit is attached to the die pad and electrically connected to the first and second types of leads with bond wires. A mold compound, which forms a mold cap, covers the first and second lead frame types, the integrated circuit and the bond wires. The first lead frame type may be a QFP type and the second lead frame type may be a QFN type. |
| US09589927B2 |
Packaged RF amplifier devices with grounded isolation structures and methods of manufacture thereof
An embodiment of a packaged RF amplifier device includes a device substrate, a transistor die coupled to the device substrate, and an isolation structure coupled to the transistor die. The transistor die has a top die surface, a bottom die surface, a semiconductor substrate, first and second transistors formed in the semiconductor substrate, a conductive structure at the top die surface and positioned between the first and second transistors, and a low resistance path that extends vertically through the semiconductor substrate between the conductive structure and the bottom die surface. The isolation structure is coupled to the conductive structure and extends into an area above the top die surface between the first and second transistors. The isolation structure may be a wirebond fence, a conductive wall, conductive pillars or vias, or a plated trench that extends vertically upward from the conductive structure. The device may be encapsulated with molding compound. |
| US09589924B2 |
Semiconductor structure and method of manufacturing the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate comprising a recess portion filled with a conductive material; a conductive trace overlying and contacting the conductive material; a conductive pillar disposed on the conductive trace and over the recess portion of the substrate; and a semiconductor chip disposed on the conductive pillar, wherein the conductive trace comprises a width WT and a thickness TT, the recess portion of the substrate comprises a width WR in the width direction of the conductive trace and a depth DR, and the ratio of WR to WT ranges from about 0.25 to about 1.8 and the ratio of DR to TT ranges from about 0.1 to about 3. |
| US09589921B2 |
Semiconductor device
In one semiconductor device, a semiconductor chip has first and second pad electrodes disposed on the main surface thereof, insulating films that cover the main surface of the semiconductor chip, a rewiring layer that is disposed between the insulating films, and a plurality of external terminals disposed on the top of the insulating film. The plane size of the first pad electrode and the second pad electrode differ from one another, and the first pad electrode and the second pad electrode are connected to any of the plurality of external terminals via the rewiring layer. |
| US09589920B2 |
Chip package
An embedded die package and method of manufacture, the die package comprising a die having I/O contact pads in a passivation layer wherein the die contact pads are coupled to a first side of a feature layer by an adhesion/barrier layer, and a layer of pillars extends from a second side of the feature layer, the die, feature layer and the layer of pillars being encapsulated by a dielectric material and wherein the feature layer comprises routing lines that are individually drawn by laser exposure of photoresist under guidance of an optical imaging system for good alignment with both the I/O contact pads of the die and with the subsequently to be deposited pillars that are positioned with respect to the package edges. |
| US09589919B2 |
Interconnect arrangement for hexagonal attachment configurations
The present description relates to the field of fabricating microelectronic devices, wherein a microelectronic device may have a hexagonal confirmation for signal nodes and ground nodes which utilizes the cross-talk reduction by cancellation property of geometrically symmetry and orthogonality to reduce signal node to ground node ratio for increasing signaling density. |
| US09589915B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate defined with a seal ring region and a circuit region, the substrate includes a seal ring structure and an integrated circuit structure, the seal ring structure is disposed in the seal ring region and includes a plurality of stacked conductive layers interconnected by a plurality of via layers, the integrated circuit structure is disposed in the circuit region and includes an active or a passive device; a metal pad disposed over the seal ring region and contacted with the seal ring structure; a passivation layer disposed over the substrate and covering the metal pad; a polymeric layer disposed over the passivation layer and the circuit region; and a molding disposed over the passivation layer and the polymeric layer, wherein the seal ring structure is covered by the molding. |
| US09589914B2 |
Semiconductor chip
According to various embodiments, a semiconductor chip may include: a semiconductor body region including a first surface and a second surface opposite the first surface; a capacitive structure for detecting crack propagation into the semiconductor body region; wherein the capacitive structure may include a first electrode region at least partially surrounding the semiconductor body region and at least substantially extending from the first surface to the second surface; wherein the capacitive structure further may include a second electrode region disposed next to the first electrode region and an electrically insulating region extending between the first electrode region and the second electrode region. |
| US09589910B2 |
Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die
A semiconductor device has a base substrate with first and second opposing surfaces. A first etch-resistant conductive layer is formed over the first surface of the base substrate. A second etch-resistant conductive layer is formed over the second surface of the base substrate. A first semiconductor die has bumps formed over contact pads on an active surface of the first die. The first die is mounted over a first surface of the first conductive layer. An encapsulant is deposited over the first die and base substrate. A portion of the base substrate is removed to form electrically isolated base leads between opposing portions of the first and second conductive layers. A second semiconductor die is mounted over the encapsulant and a second surface of the first conductive layer between the base leads. A height of the base leads is greater than a thickness of the second die. |
| US09589909B1 |
Radio frequency and electromagnetic interference shielding in wafer level packaging using redistribution layers
Radio frequency/electromagnetic interference (RF/EMI) shielding within redistribution layers of a fan-out wafer level package is provided. By using RDL metal layers to provide the shielding, additional process steps are avoided (e.g., incorporating a shielding lid or applying conformal paint on the package back side). Embodiments use metal filled trench vias in the RDL dielectric layers to provide metal “walls” around the RF sensitive signal lines through the dielectric layer regions of the RDL. These walls are coupled to ground, which isolates the signal lines from interference or noise generated outside the walls. |
| US09589907B2 |
Apparatus and method for electrostatic spraying or electrostatic coating of a thin film
Provided is a resist film forming device which uses an electrostatic spray device which is capable of forming a thin film with a uniform thickness on a workpiece. A resist film forming device (100), which forms a resist film (108) on a substrate by electrostatic spraying, comprises: a nozzle (102) which, upon application of a prescribed voltage, sprays liquid particles which form the raw material for a resist film (108) toward a substrate (105) having stepped portions (105a); a driving means (111) for causing relative movement of the substrate (105) or the nozzle (102); and a control means (110) for controlling such that the resist film (108) is formed on the substrate (105) having the stepped portions (105a) by the liquid particles. |
| US09589904B2 |
Semiconductor device with bypass functionality and method thereof
A device includes a semiconductor chip and a bypass layer electrically coupled to a contact region of the semiconductor chip. The bypass layer is configured to change from behaving as an insulator to behaving as a conductor in response to a condition of the semiconductor chip. |
| US09589903B2 |
Eliminate sawing-induced peeling through forming trenches
A package includes a device die, a molding material encircling the device die, wherein a top surface of the molding material is substantially level with a top surface of the device die, and a bottom dielectric layer over the device die and the molding material. A plurality of redistribution lines (RDLs) extends into the bottom dielectric layer and electrically coupling to the device die. A top polymer layer is over the bottom dielectric layer, with a trench ring penetrating through the top polymer layer. The trench ring is adjacent to edges of the package. The package further includes Under-Bump Metallurgies (UBMs) extending into the top polymer layer. |
| US09589901B2 |
Semiconductor wafers including indications of crystal orientation and methods of forming the same
A wafer can be provided to include a single crystalline semiconductor material with a predetermined crystal orientation. The wafer can include a laser mark at a determined position on a front surface or on a back surface of the wafer, where the determined position is configured to indicate the predetermined crystal orientation of the single crystalline semiconductor material. |
| US09589895B2 |
Whole wafer edge seal
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of creating a non-permeable edge seal around a whole wafer. The edge seal may be located between an inner region of a wafer comprising product chips and an outer edge of the wafer. The edge seal may comprise a fillet region adjacent the inner region, and a dielectric extension adjacent the fillet region. The dielectric extension region may be impermeable to moisture and composed of a dielectric layer on the wafer and a capping layer on the dielectric layer. The fillet region may comprise a lower metal fillet directly on the wafer, a dielectric layer on the lower metal fillet, an upper metal fillet on the dielectric layer, and a capping layer on the upper metal fillet. The fillet region may be adjacent to and in contact with a permeable layer formed on the product region. |
| US09589894B2 |
Copper interconnect structure and its formation
A structure with improved electromigration resistance and methods for making the same. A structure having improved electromigration resistance includes a bulk interconnect having a dual layer cap and a dielectric capping layer. The dual layer cap includes a bottom metallic portion and a top metal oxide portion. Preferably the metal oxide portion is MnO or MnSiO and the metallic portion is Mn or CuMn. The structure is created by doping the interconnect with an impurity (Mn in the preferred embodiment), and then creating lattice defects at a top portion of the interconnect. The defects drive increased impurity migration to the top surface of the interconnect. When the dielectric capping layer is formed, a portion reacts with the segregated impurities, thus forming the dual layer cap on the interconnect. Lattice defects at the Cu surface can be created by plasma treatment, ion implantation, a compressive film, or other means. |
| US09589893B2 |
Semiconductor device, semiconductor device design method, semiconductor device design apparatus, and program
A semiconductor device includes a semiconductor chip, which includes a substrate, a multilayer interconnect layer formed over the substrate, a first cell column disposed along an edge of the substrate in a plan view, the first cell column having a first I/O cell and a first power supply cell, second cell column disposed along the first cell column in plan view, the second cell column having a second I/O cell, a first pad supplying a first supply voltage to the first power supply cell, a first voltage supply wire disposed over the first cell column, a second voltage supply wire disposed over the second cell column, and a first connection wire crossing the first voltage supply wire and the second voltage supply wire. |
| US09589891B2 |
Contact pad for semiconductor devices
Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer and/or polymer layer disposed over the substrate and a portion of the contact pad. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to an exposed portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element includes line having a width greater than the PPI line. |
| US09589890B2 |
Method for interconnect scheme
A method of fabricating a semiconductor device is disclosed. The method includes forming a first dielectric layer over a substrate, forming a first trench in the first dielectric layer, forming a metal line in the first trench, removing a first portion of the metal line to form a second trench and removing a second portion of the metal line to form a third trench. A third portion of the metal line is disposed between the second and third trenches. The method also includes forming a second dielectric layer in the second and third trenches. |
| US09589889B2 |
Device architecture and method for precision enhancement of vertical semiconductor devices
Improvement of key electrical specifications of vertical semiconductor devices, usually found in the class of devices known as discrete semiconductors, has a direct impact on the performance achievement and power efficiency of the systems in which these devices are used. Imprecise vertical device specifications cause system builders to either screen incoming devices for their required specification targets or to design their system with lower performance or lower efficiency than desired. Disclosed is an architecture and method for achieving a desired target specification for a vertical semiconductor device. Precise trimming of threshold voltage improves targeting of both on-resistance and switching time. Precise trimming of gate resistance also improves targeting of switching time. Precise trimming of a device's effective width improves targeting of both on-resistance and current-carrying capability. Device parametrics are trimmed to improve a single device, or a parametric specification is targeted to match specifications on two or more devices. |
| US09589888B2 |
Storage devices, flash memories, and methods of operating storage devices
A storage device is provided including a flash memory, and a controller programming first bit data and second bit data into the flash memory and not backing up the first bit data when programming the first bit data and the second bit data in the same transaction and backing up the first bit data when programming the first bit data and the second bit data in different transactions, wherein the first bit data is less significant bit data than the second bit data, and each of the transactions is determined using a sync signal transmitted from a host. |
| US09589882B2 |
Semiconductor device
The semiconductor device includes a wiring substrate having a plurality of ball lands formed on a lower surface of a core layer, a solder resist film covering the lower surface of the core layer, a via conductor layer penetrating the core layer and connected to the ball lands, and an upper surface wiring formed on the upper surface of the core layer, the upper surface wiring having one end formed as a bonding land and the other end connected to the via conductor layer. The semiconductor device further includes a semiconductor chip arranged on the wiring substrate, a solder ball connected to the ball lands. The solder resist film has an eliminating portion that exposes the lower surface of the core layer, and the upper surface wiring has a thin-wire portion and a thick-wire portion, and when seen in a plan view, the thick-wire portion overlaps the eliminating portion. |
| US09589881B2 |
Driving chip package and display device including the same
A display device includes a display panel and a chip-on-film (COF) bonded to the display panel. The chip-on-film includes a film on which a driving chip is mounted, a plurality of film lines on the film, and at least one dummy pattern on the film between an adjacent pair of films in the plurality of film lines. |
| US09589877B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes an expanded semiconductor chip having a first semiconductor chip and an expanded portion extending outward from a side surface of the first semiconductor chip, a second semiconductor chip provided so as to be connected to the expanded semiconductor chip via a plurality of first bumps, and a base provided so as to be connected to the expanded semiconductor chip via a plurality of second bumps. The first bumps are provided between the first semiconductor chip and the second semiconductor chip. The second bumps are provided between the expanded portion and the base. |
| US09589873B2 |
Leadless chip carrier
A leadless chip carrier comprises a thermal pad for attaching to a printed circuit board (PCB) and an integrated circuit electrically connected to a plurality of electrical lead frame pads for connection to a plurality of corresponding pads on the PCB. The leadless chip carrier further comprises a non-collapsible conductive shim bonded to a first surface of the thermal pad and each of the plurality of electrical lead frame pads is attached to a volume of solder. The conductive shim provides a stand-off between the thermal pad and the PCB and improves the integrity of a joint between the thermal pad and the PCB. |
| US09589872B2 |
Integrated dual power converter package having internal driver IC
An integrated dual power converter package is disclosed. The package includes a leadframe having a first control FET paddle configured to support a drain of a first control FET, and a second control FET paddle configured to support a drain of a second control FET. The leadframe further includes a sync FET paddle configured to support a source of a first sync FET and a source of a second sync FET, and a driver integrated circuit (IC) paddle configured to support a driver IC for controlling each of the control FETs and each of the sync FETs. The leadframe may additionally include first and second switched nodes, configured for electrical connection to the first control FET and the first sync FET via a first clip, and to the second control FET and the second sync FET via a second clip, respectively. |
| US09589869B2 |
Packaging solutions for devices and systems comprising lateral GaN power transistors
Packaging solutions for devices and systems comprising lateral GaN power transistors are disclosed, including components of a packaging assembly, a semiconductor device structure, and a method of fabrication thereof. In the packaging assembly, a GaN die, comprising one or more lateral GaN power transistors, is sandwiched between first and second leadframe layers, and interconnected using low inductance interconnections, without wirebonding. For thermal dissipation, the dual leadframe package assembly can be configured for either front-side or back-side cooling. Preferred embodiments facilitate alignment and registration of high current/low inductance interconnects for lateral GaN devices, in which contact areas or pads for source, drain and gate contacts are provided on the front-side of the GaN die. By eliminating wirebonding, and using low inductance interconnections with high electrical and thermal conductivity, PQFN technology can be adapted for packaging GaN die comprising one or more lateral GaN power transistors. |
| US09589864B2 |
Substrate with embedded sintered heat spreader and process for making the same
The present disclosure relates to a substrate with an embedded sintered heat spreader and a process for making the same. According to an exemplary process, at least one cavity is created through the substrate. Sinterable paste including metal particulates and binder material is then dispensed into the at least one cavity. Next, the sinterable paste is sintered to create a sintered heat spreader, which is characterized by high thermal conductivity. The sintered heat spreader adheres to the inside walls of the at least one cavity, enhancing the overall thermal conductivity of the substrate. |
| US09589862B2 |
Interconnect structures and methods of forming same
Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is a method of forming an interconnect structure, the method including forming a first post-passivation interconnect (PPI) over a first substrate, forming a second PPI over the first substrate, and forming a first conductive connector on the first PPI. The method further includes forming a second conductive connector on the second PPI, and forming a molding compound on top surfaces of the first and second PPIs and surrounding portions of the first and second connectors, a first section of molding compound being laterally between the first and second connectors, the first section of molding compound having a curved top surface. |
| US09589861B2 |
Semiconductor packaging having warpage control and methods of forming same
An embodiment method for forming a semiconductor device package comprises bonding a first die to a package substrate and forming a molding compound over the package substrate and around the first die. A surface of the first die opposing the package substrate is exposed after forming the molding compound. The method further comprises bonding a plurality of second dies to the surface of the first die opposing the package substrate after forming the molding compound. |
| US09589859B2 |
Semiconductor arrangement, method for producing a number of chip assemblies and method for producing a semiconductor arrangement
A semiconductor arrangement includes a plurality of chip assemblies, each of which includes a semiconductor chip having a semiconductor body with a top side and an underside, a top main electrode arranged on the top side, a bottom main electrode arranged on the underside, an electrically conductive top compensation lamina arranged on a side of the top main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the top main electrode, an electrically conductive bottom compensation lamina arranged on a side of the bottom main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the bottom main electrode, and a dielectric embedding compound enclosing the semiconductor chip laterally circumferentially in a ring-shaped fashion such that the side of the compensation laminae facing away from the semiconductor body are at least not completely covered by the embedding compound. |
| US09589852B2 |
Electrostatic phosphor coating systems and methods for light emitting structures and packaged light emitting diodes including phosphor coating
Methods are disclosed including applying a layer of binder material onto an LED structure. A luminescent solution including an optical material suspended in a solution is atomized using a flow of pressurized gas, and the atomized luminescent solution is sprayed onto the LED structure including the layer of binder material using the flow of pressurized gas. |
| US09589848B2 |
FinFET structures having silicon germanium and silicon channels
Silicon and silicon germanium fins are formed on a semiconductor wafer or other substrate in a manner that facilitates production of closely spaced nFET and pFET devices. A patterned mandrel layer is employed for forming one or more recesses in the wafer prior to the epitaxial growth of a silicon germanium layer that fills the recess. Spacers are formed on the side walls of the patterned mandrel layer followed by removal of the mandrel layer. The exposed areas of the wafer and silicon germanium layer between the spacers are etched to form fins usable for nFET devices from the wafer and fins usable for pFET devices from the silicon germanium layer. |
| US09589846B1 |
Method of forming semiconductor device
A method for forming a semiconductor device is provided. First, a dielectric layer is provided on a substrate, wherein a first recess and a second recess are formed in the dielectric layer. After a mask layer is filled into the first recess and the second recess, the mask layer in the second recess is removed away, thereby forming a patterned mask layer. Subsequently, a nitride treatment is performed to remove unwanted residue of the mask layer in the second recess. |
| US09589843B2 |
Method for manufacturing a semiconductor device
The manufacturing efficiency of a semiconductor device is improved. A method for manufacturing a semiconductor device includes a step of sealing a semiconductor chip using a mold die having a cavity, a gate part communicating with the cavity, and a vent part provided opposite to the gate part via the cavity, and extending in a first direction in a sealing step. Further, a lead frame has a first through hole provided at a position overlapping the cavity in the sealing step, and a second through hole provided outside the first through hole, and provided at a position overlapping the vent part in the sealing step. Whereas, in a second direction crossing with the first direction, the length of the second through hole is larger than the length (groove width) of the vent part. |
| US09589842B2 |
Semiconductor package and method of fabricating the same
A method of fabricating a semiconductor package is disclosed. The method includes disposing semiconductor chips on a support substrate, forming a protection layer covering top surfaces of the semiconductor chips, forming a molding layer covering the support substrate and the protection layer, and etching the molding layer to expose the protection layer. |
| US09589841B2 |
Electronic package and fabrication method thereof
A method for fabricating an electronic package is provided, including the steps of: providing at least a packaging structure, wherein the packaging structure has a packaging substrate having opposite first and second sides, an electronic element disposed on the first side of the packaging substrate and a plurality of conductors formed on the first side of the packaging substrate; encapsulating the packaging structure with an insulating layer, wherein the insulating layer covers the packaging substrate; and forming an RDL (Redistribution Layer) structure on the insulating layer, wherein the RDL structure is electrically connected to the conductors. Therefore, the area of the insulating layer is not required to correspond to the area of the packaging substrate, thus allowing the area of the packaging substrate to be reduced according to the practical need so as to reduce the width of the electronic package. |
| US09589837B2 |
Electrode manufacturing method, fuse device and manufacturing method therefor
The present disclosure relates to an electrode manufacturing method, and a fuse device and manufacturing method therefor. The fuse device includes a fuse element including a phase change material, and a first electrode formed in contact with the fuse element. The phase change material may include doped or undoped chalcogenide. The first electrode may have a sublithographic dimension at a portion where the first electrode contacts the fuse element. When the phase change material has a layer thickness less than or equal to about 30 nm, and a pulse current less than or equal to about 3 mA is applied to the fuse element via the first electrode, the fuse element may undergo a phase change, so as to convert the fuse device into a blow-out state. |
| US09589836B1 |
Methods of forming ruthenium conductive structures in a metallization layer
One illustrative method disclosed herein includes, among other things, forming a first conductive structure and a second conductive structure that is conductively coupled to the first conductive structure. In this example, forming the second conductive structure includes forming a ruthenium cap layer on and in contact with an upper surface of the first conductive structure, with the ruthenium cap layer in position, forming a liner layer comprising manganese on and in contact with at least the surfaces of the second layer of insulating material, wherein an upper surface of the ruthenium cap layer is substantially free of the liner layer, and forming a bulk ruthenium material on and in contact with the liner layer, wherein a bottom surface of the bulk ruthenium material contacts the upper surface of the ruthenium cap layer. |
| US09589834B2 |
Array substrate and manufacturing method thereof, and display device
An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a thin film transistor on a base substrate, and an electrode structure on the thin film transistor, and the electrode structure includes a pixel electrode and a common electrode insulated from each other. The array substrate further includes: a black matrix disposed on the thin film transistor, an orthographic projection of the thin film transistor on the base substrate is located within an orthographic projection of the black matrix on the base substrate, and the black matrix is electrically connected with the common electrode for providing common electrode signals to the common electrode. |
| US09589830B2 |
Method for transferring a useful layer
A method for transferring a useful layer onto a support includes the following processes: formation of a fragilization plane through the implantation of light species into a first substrate in such a way as to form a useful layer between this plane and a surface of the first substrate; application of the support onto the surface of the first substrate to form an assembly to be fractured having two exposed sides; thermal fragilization treatment of the assembly to be fractured; and initiation and self-sustained propagation of a fracture wave in the first substrate along the fragilization plane. At least one of the sides of the assembly to be fractured is in close contact, over a contact zone, with an absorbent element suitable for capturing and dissipating acoustic vibrations emitted during the initiation and/or propagation of the fracture wave. |
| US09589828B2 |
Method for photolithography-free self-aligned reverse active etch
A layer of partially planarized organosilicate (DUO) is spin-coated onto a layer of high density plasma (HDP) oxide on a silicon wafer after the shallow trench isolation (STI) is filled with the HDP oxide. Then the DUO layer is etched using a specialized process specifically tuned to etch the DUO and high density plasma (HDP) oxide at a certain selectivity. The higher areas of the wafer topography (active Si areas) have thinner DUO and as the etch process proceeds it starts to etch through the HDP oxide in these areas (active Si areas). The etch process is stopped after a certain depth is reached and before touching down on the silicon nitride oxidation layer. The DUO is removed and a standard chemical-mechanical polish (CMP) is performed on the silicon wafer. After the CMP step the silicon nitride is removed, exposing the silicon substrate between the field oxides. |
| US09589827B2 |
Shallow trench isolation regions made from crystalline oxides
A method of manufacturing a semiconductor device that involves etching a trench in a semiconductor substrate, epitaxially growing a crystalline structure in the trench and forming semiconductor structures on either side of the crystalline structure. Crystalline oxides may include rare earth oxides, aluminum oxides or Perovskites. |
| US09589824B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device is provided. The method includes a process of applying liquid to one surface of a support substrate; a process of warping the support substrate by a volume change due to a phase transition of the liquid by solidifying the liquid; a process of attaching a semiconductor substrate having a linear expansion coefficient different from that of the support substrate to the support substrate in a heated state; and a process of warping the support substrate due to a linear expansion coefficient difference between the semiconductor substrate and the support substrate by cooling the support substrate to which the semiconductor substrate is attached. A warping direction due to the phase transition is opposite to a warping direction due to the linear expansion coefficient difference. |
| US09589821B2 |
Article transport facility and maintenance operation method of article transport facility
A supporting portion of an article transport device supports a position detection device for detecting the position of a detection target object. A control device executes an update control to update target position information in accordance with an update instruction issued through a manual operation performed by an operator during a maintenance operation performed at an interval longer than a set period, and executes the update control on condition that an elapsed time since issuance of the update instruction has reached an automatic updating time that is a time shorter than the set period. |
| US09589819B1 |
Substrate processing apparatus
A substrate processing apparatus includes a robot having: an end effector, a first link structure including a fixing portion having a front end to which the end effector is fixed, a support portion, and a first hole formed in the support portion, a second link structure including a second hole, and a shaft inserted into the first and second holes, the shaft including an upper end having a height equal to or smaller than a height of the substrate mounted on the end effector; a vacuum transfer chamber, wherein the robot is installed in the vacuum transfer chamber; at least one process chamber disposed adjacent to the vacuum transfer chamber and configured to thermally process the substrate transferred from the vacuum transfer chamber by the robot; a module including one or more process chambers; and a cooling mechanism installed above the first link structure or the shaft. |
| US09589818B2 |
Apparatus for liquid treatment of wafer shaped articles and liquid control ring for use in same
An apparatus for treating a wafer-shaped article includes a rotary chuck configured to hold a wafer-shaped article of a predetermined diameter such that a surface of the wafer-shaped article facing the rotary chuck is spaced from an upper surface of the rotary chuck. A ring is mounted on the rotary chuck, and includes a first upper surface overlapping an outer peripheral edge of a wafer-shaped article when positioned on the rotary chuck and a second upper surface positioned radially inwardly of the first surface. The second upper surface is elevated relative to the first upper surface, to define an annular gap between the second upper surface and a wafer-shaped article when positioned on the spin chuck that is smaller than a distance between the first upper surface and a wafer-shaped article when positioned on the rotary chuck. |
| US09589813B2 |
Stage unit and laser annealing apparatus including the same
A stage unit may include a frame, a first guide device, a stage, a second guide device and a pad. The first guide device may be arranged over an upper surface of the frame and configured to guide the stage in a first direction. The stage may be movably connected to the first guide device. The second guide device may be arranged over an upper surface of the stage and configured to guide the pad in a second direction substantially perpendicular to the first direction. The pad may be movably connected to the second guide device and configured to support a substrate. Therefore, the substrate may be supported by and uniformly floated by the frame, the stage and the pad. |
| US09589805B2 |
Split-gate semiconductor device with L-shaped gate
A semiconductor device having a substrate, a dielectric layer over the substrate, a first gate conductor, an inter-gate dielectric structure and a second gate conductor is disclosed. A gate dielectric structure is disposed between the first gate conductor and the dielectric layer, and may include two or more dielectric films disposed in an alternating manner. The inter-gate dielectric structure may be disposed between the first gate conductor and the second gate conductor, and may include two or more dielectric films disposed in an alternating manner. The second gate conductor is formed in an L shape such that the second gate has a relatively low aspect ratio, which allows for a reduction in spacing between adjacent gates, while maintaining the required electrical isolation between the gates and contacts that may subsequently be formed. |
| US09589802B1 |
Damage free enhancement of dopant diffusion into a substrate
A method of doping a substrate. The method may include implanting a dose of a helium species into the substrate through a surface of the substrate at an implant temperature of 300° C. or greater. The method may further include depositing a doping layer containing a dopant on the surface of the substrate, and annealing the substrate at an anneal temperature, the anneal temperature being greater than the implant temperature. |
| US09589800B2 |
Method for integrated circuit patterning
A method of forming a target pattern includes forming a plurality of lines over a substrate and forming spacer features on sidewalls of the lines. The method further includes shrinking the spacer features using a wet process. After the shrinking of the spacer features, the method further includes removing the lines thereby providing the shrunk spacer features over the substrate. |
| US09589797B2 |
Tools and methods for producing nanoantenna electronic devices
The present disclosure advances the art by providing a method and system for forming electronic devices. In particular, and by example only, methods are described for forming devices for harvesting energy in the terahertz frequency range on flexible substrates, wherein the methods provide favorable accuracy in registration of the various device elements and facilitate low-cost R2R manufacturing. |
| US09589796B2 |
Method of defining poly-silicon growth direction
The present invention relates to a method of defining poly-silicon growth direction. The method of defining poly-silicon growth direction comprises Step 1, forming a buffer layer on a substrate; Step 2, forming an amorphous silicon thin film on the buffer layer; Step 3, forming regular amorphous silicon convex portions on the amorphous silicon thin film; and Step 4, transferring the amorphous silicon thin film into poly-silicon with an excimer laser anneal process. The growth direction of the poly-silicon as being formed can be controlled according to the present method of defining poly-silicon growth direction. Accordingly, the grain size of the poly-silicon can be raised. |
| US09589795B2 |
Method of forming an epitaxial layer on a substrate, and apparatus and system for performing the same
In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution. |
| US09589793B2 |
Laterally varying II-VI alloys and uses thereof
Described herein are semiconductor structures comprising laterally varying II-VI alloy layer formed over a surface of a substrate. Further, methods are provided for preparing laterally varying II-VI alloy layers over at least a portion of a surface of a substrate comprising contacting at least a portion of a surface of a substrate within a reaction zone with a chemical vapor under suitable reaction conditions to form a laterally varying II-VI alloy layer over the portion of the surface of the substrate, wherein the chemical vapor is generated by heating at least two II-VI binary compounds; and the reaction zone has a temperature gradient of at least 50-100° C. along an extent of the reaction zone. Also described here are devices such as lasers, light emitting diodes, detectors, or solar cells that can use such semiconductor structures. In the case of lasers, spatially varying wavelength can be realized while in the case of solar cells and detectors multiple solar cells can be achieved laterally where each cell absorbs solar energy of a given wavelength range such that entire solar spectrum can be covered by the said solar cell structure. For LED applications, spatial variation of alloy composition can be used to engineer colors of light emission. |
| US09589792B2 |
High quality group-III metal nitride crystals, methods of making, and methods of use
High quality ammonothermal group III metal nitride crystals having a pattern of locally-approximately-linear arrays of threading dislocations, methods of manufacturing high quality ammonothermal group III metal nitride crystals, and methods of using such crystals are disclosed. The crystals are useful for seed bulk crystal growth and as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and for photoelectrochemical water splitting for hydrogen generation devices. |
| US09589787B2 |
Manufacturing method of semiconductor device
The present invention makes it possible to increase the reliability of a semiconductor device. A manufacturing method of a semiconductor device according to the present invention includes a step of removing a patterned resist film and the step of removing a patterned resist film includes the steps of: (A) introducing at least a gas containing oxygen into a processing room; (B) starting electric discharge for transforming the gas containing oxygen into plasma; and (C) introducing a water vapor or an alcohol vapor into the processing room. On this occasion, the step (C) is applied either simultaneously with or after the step (B). |
| US09589785B2 |
Cleaning method and composition in photolithography
The present disclosure provides one embodiment of a method. The method includes applying a first cleaning fluid to a substrate, thereby cleaning the substrate and forming a protection layer on the substrate; and applying a removing process to the substrate, thereby removing the protection layer from the substrate. The first cleaning fluid includes a cleaning chemical, a protection additive and a solvent. |
| US09589780B2 |
Systems and methods of suppressing unwanted ions
Certain embodiments described herein are directed to systems including a cell downstream of a mass analyzer. In some instances, the cell is configured as a reaction cell, a collision cell or a reaction/collision cell. The system can be used to suppress unwanted ions and/or remove interfering ions from a stream comprising a plurality of ions. |
| US09589777B2 |
Control of ions
A guide apparatus includes a vacuum compartment provided at a background pressure and having a gas inlet opening arranged for jetting a gas in the form of a free jet stream containing entrained ions into a vacuum chamber along a predetermined jetting axis. At least one duct housed within the vacuum chamber has a guide bore positioned coaxially with the jetting axis for receiving the free jet stream such that a supersonic free jet is formed in the duct with a jet pressure ratio P1/P2 restrained to a value that does not exceed (A/a)3 to form a subsonic laminar gas flow inside of the duct for guiding the entrained ions, where P1 is the pressure at an exit end of the gas inlet opening, P2 is the background pressure, A is the cross sectional area of the bore, and a is the cross sectional area of the gas inlet opening. |
| US09589775B2 |
Plasma cleaning for mass spectrometers
A mass spectrometry (MS) system may be cleaned by generating plasma and contacting an internal surface of the system to be cleaned with the plasma. The system may be switched between operating in an analytical mode and in a cleaning mode. In the analytical mode a sample is analyzed, and plasma may or may not be actively generated. In the cleaning mode the plasma is actively generated, and the sample may or may not be analyzed. |
| US09589765B2 |
Sample supporting member for observing scanning electron microscopic image and method for observing scanning electron microscopic image
When injection of electrons into a sample supporting member causes a potential gradient between an insulative thin film and a conductive thin film at a site of electron beam injection, the potential barrier of the surface of the insulative thin film becomes thin, and an electron emission phenomenon is caused by tunnel effects. Secondary electrons caused in the insulative thin film tunnel to the conductive thin film along the potential gradient. The secondary electrons, having tunneled, reach a sample while diffusing in the conductive thin film. In the case where the sample is a sample with a high electron transmittance, such as a biological sample, the secondary electrons also tunnel through the interior of the sample. The secondary electrons are detected to acquire an SEM image in which the inner structure of the sample is reflected. |
| US09589763B1 |
Method for detecting signal charged particles in a charged particle beam device, and charged particle beam device
The present disclosure provides a method for detecting signal charged particles in a charged particle beam device. The method includes emitting a primary charged particle beam, illuminating a specimen with the primary charged particle beam, wherein the primary charged particle beam has a landing energy on the specimen of less than 40 keV, wherein signal charged particles with a first energy spectrum are generated, energy filtering the signal charged particles such that signal charged particles in an energy range from an energy of 85% of the landing energy to 100% propagate for subsequent detection, and detecting the signal charged particles within the energy range using at least one detector. |
| US09589761B2 |
Electron microscope and method of adjusting same
An electron microscope is offered which can adjust an energy-selecting slit in a short time by smoothly moving the slit. The electron microscope (100) includes an electron beam source (10) emitting an electron beam (EB), an energy filter (22) producing a deflecting field in the path of the electron beam (EB) to disperse the beam (EB) according to energy, a slit plate (24) disposed on an energy dispersive plane and provided with at least one energy-selecting slit (25), a current measuring section (50) for measuring the electrical current of the beam (EB) absorbed into the slit plate (24), and an energy filter controller (60) for controlling the intensity of the deflecting field of the energy filter (22) on the basis of results of measurements made by the current measuring section (50). |
| US09589756B2 |
Fusible link mounting structure and electrical junction box
A fusible link mounting structure, comprising a three-series fusible link formed by providing three pieces of fuse elements in series within a single common housing, a cavity having a mounting space formed according to a size of the common housing for the three-series fusible link, a plurality of tabs projected from a bottom of the cavity into the mounting space, and a monopole fusible link formed by providing a piece of fuse element in a single monopole housing, wherein a total length of the mounting space is set to be shorter than a sum of lengths of three-pieces of the monopole housings, and the tabs are arranged corresponding to positions of fuse terminals provided in the three-series fusible link, and also arranged at such positions that a plurality of the terminals do not interfere with the monopole housing, when the monopole fusible link is mounted in the cavity. |
| US09589755B1 |
Circuit breaker having a framed finger area
A switch assembly including a housing. An escutcheon portion on the front surface of the housing has a raised platform. A transition ramp extends from the platform to a rest area and a finger area is adjacent the rest area. A perimeter frame encloses the finger area so that the escutcheon portion defines opposing notches aligned with the rest area. A handle has a hub with an axial bore so that a pivot pin insert through the axial bore rotatably couples the handle to the housing. A finger grip extends from the hub. The finger grip has a surface for selectively abutting against the rest area and a textured portion for manual actuation when a finger in inserted into the finger area. |
| US09589751B2 |
Sealed relay
Conventional example is arranged simply to turn a circuit on/off, and not to changeover connection.Sealed relay 1 comprises: insulating tube 2; first relay connect portion 4 attached to one end of insulating tube 2, and provided with first contact 3 on inside surface; second relay connect portion 5 disposed in confrontation with first relay connect portion 4 in insulating tube 2; movable member 7 disposed movably between first and second relay connect portions 4 and 5, and provided with second contact 6 contacting with first contact 3 when moved toward the first relay connect portion; and operating mechanism to move the movable member. Third relay connect portion 10 including third contact 9 is provided between the second and first relay connect portions. Movable member 7 includes a fourth contact contacting with the third contact when the first and second contacts are out of contact from each other. |
| US09589749B1 |
Finger activated switching device
A finger activated switching device has an enclosure with a top wall and a bottom wall, the bottom wall movable on a supporting wall. An upper lever is pivotally joined to the enclosure, and is upwardly spaced apart from the top wall in a first rest position yet is upwardly displaceable using finger pressure from below. A lower lever is pivotally joined to the enclosure directly below the upper lever, and spaced apart from it in a second rest position yet is downwardly displaceable using finger pressure. When the levers are displaced from their rest positions a restoring element moves the levers back to their rest positions. Switching elements positioned in force transmission mechanisms with the levers provide electrical switching actions when the levers are displaced. |
| US09589746B2 |
Switch device for vehicular air conditioning system
A switch device for a vehicular air conditioning system includes a transverse wing surrounded by a knob of an air vent. A circuit board is mounted to an inner side of the transverse wing. The button switch for controlling an air conditioner and an air amount is connected to a switch contact portion of the circuit board to contact the switch contact portion of the circuit board and mounted to an upper surface of the knob. A connector connects a connecting portion formed at a rear portion of the circuit board and an air conditioning controller. |
| US09589743B2 |
Minitype breaker with high stability
A high-stability miniature circuit breaker has a pivotal shaft having a first section, a second section and a shoulder. The diameter of the second section is larger than the first section. The shoulder diameter is larger than the second section. A pivoting lever on the first section limits the axial position of a protruding mesa relative to the shaft by contact fit between the mesa and a thrust surface on the second section. A pivoting latch is on the second section. A first end face fits to a support surface on the shoulder. A second end face fits to the protruding mesa at the other end. The latch controls a drive rod and the lever. A connecting rod separates from the latch when latch hasps are separated and the latch separates from the drive rod which slides along a groove of the lever. |
| US09589742B2 |
Pressing operation device
A pressing operation device is configured such that a base and an operating body are linked to each other by a link member. A support-side shaft of the link member is rotatably supported by a bearing of the base. The bearing of the base includes a first regulation portion that regulates movement of the support-side shaft of the link member in an ascending direction of the operating body and a second regulation portion that regulates movement of the support-side shaft in a direction intersecting the ascending direction, and is provided with a flat spring portion that presses the support-side shaft against the second regulation portion and the first regulation portion. |
| US09589741B2 |
Pressure-actuated safety switch with monitoring function
A security switch has a switch head with an actuator and having a button top. The security switch is mounted in a housing wall. The actuator is designed so as to actuate contact elements of a switch module upon actuation into the switch position. The switch module is extended by a signaling switch block with contact elements located in the signaling flow path, wherein, in the assembly state of the security switch, the signaling switch block is subjected to an actuation pin that is rigidly arranged thereon. if the assembly state is undone or changed, the actuation pin disengages from the signaling switch block and signaling flow path opens. The actuation pin and signaling switch block are located outside the actuation region of the actuator of the security switch. |
| US09589734B2 |
Solid electrolytic capacitor and manufacturing method thereof
A high voltage proof solid electrolytic capacitor that can prevent deterioration of voltage proof property due to lead-free reflow etc. and a manufacturing method thereof are provided. A capacitor element having an anode and cathode electrode foils wound via a separator is impregnated with a dispersion comprising conductive polymer particles or powder and a solvent to form a solid electrolyte layer consisting of a conductive polymer, and the voids inside the capacitor element having the solid electrolyte layer formed are filled with an ion-conducting substance comprising a mixed solvent comprising ethylene glycol and γ-butyrolactone together with a solute selected from at least one type of an ammonium salt, a quaternary ammonium salt, a quaternized amidinium salt, and an amine salt of an organic acid, an inorganic acid, and a composite compound between organic acid and inorganic acids to obtain a solid electrolytic capacitor. |
| US09589729B2 |
Multilayer ceramic capacitor
A multilayer ceramic capacitor includes a laminated body including an inner layer portion including ceramic dielectric layers and internal electrodes, and outer layer portions including ceramic dielectric layers. External electrodes connected to the internal electrodes are provided on both ends of the laminated body. The main constituent of the inner layer portion is a perovskite-type compound represented by ABO3. The outer layer portions include first outer layers and second outer layers respectively containing oxides that differ from each other in main constituents, and boundary reaction layers are provided between the first outer layers and the second outer layers. First ceramic dielectric layers outside the boundary reaction layers differ in color from second ceramic dielectric layers inside the boundary reaction layers. |
| US09589728B2 |
Multilayer ceramic capacitor and board for mounting the same
A multilayer ceramic capacitor includes a ceramic body including dielectric layers; first and second internal electrode groups disposed to be misaligned by a predetermined interval in the length direction, having the dielectric layers interposed therebetween; first and second external electrodes extended from at least one of the first and second side surfaces to at least one of the first and second main surfaces; and an insulating layer covering portions of the first and second external electrodes formed on the at least one of the first and second side surfaces, wherein the first internal electrode group includes first and second internal electrodes including first and second pattern parts and first and second lead parts, respectively, and the second internal electrode group includes third and fourth internal electrodes including third and fourth pattern parts and third and fourth lead parts, respectively. |
| US09589727B2 |
Capacitor and method of production thereof
The present invention relates generally to the fields of electrical engineering and electronics. More specifically, the present invention relates to passive components of electrical circuit and more particularly to a capacitor intended for energy storage and method of production thereof. |
| US09589725B2 |
Multilayer ceramic capacitor, mounting circuit board thereof, and manufacturing method of the same
There is provided a multilayer ceramic capacitor including, a ceramic body including a plurality of dielectric layers, a plurality of first and second internal electrodes disposed in the ceramic body to be alternately exposed through the double side surfaces facing each other in a width direction, having the dielectric layers therebetween, and first and second external electrodes formed on the surfaces of the ceramic body in the width and thickness directions and electrically connected to the first and second internal electrodes, wherein when a length of the ceramic body is defined as L and a width of the ceramic body is defined as W, a ratio L/W of the length L to the width W of the ceramic body satisfies 1.39≦L/W≦2.12. |
| US09589724B2 |
Chip electronic component and method of manufacturing the same
A chip electronic component may include an insulating layer formed on a lower portion of a side surface of an internal coil pattern to avoid a direct contact between the internal coil pattern and a magnetic material, thereby preventing a waveform distortion indicating a reduction in inductance at high frequency. |
| US09589721B2 |
Wireless power transmitter and wireless power receiver
An automatic tuning assist circuit is coupled with a transmission antenna. The transmission antenna injects a first correction current into, or otherwise draws the first correction current from, the transmission antenna. In the first state, the first auxiliary coil is coupled with the transmission antenna. In this state, the first correction current IA, which corresponds to a current that flows through the first auxiliary coil, is injected into or drawn from the transmission antenna. In the second state, the first auxiliary coil is decoupled from the transmission antenna. In this state, the current that flows through the first auxiliary coil flows through a current path which is independent of the transmission antenna. The state is switched between the first state and the second state with the same frequency as that of the driving voltage. |
| US09589719B2 |
Switchable patterned metal shield inductance structure for wideband integrated systems
Technologies are generally described for switchable patterned metal shield inductance structures. In some examples, an inductance structure on a substrate may include an inductor and a metal shield, where the metal shield separates and shields the inductor from the substrate. The configuration of the metal shield and the inductor may facilitate reduction in the overall inductance of the inductance structure. In particular, the metal shield may be configured to develop one or more eddy currents in response to an inductor-generated magnetic field. The eddy currents may then result in a magnetic field opposing the inductor-generated magnetic field, which may result in a reduction in the overall magnetic field and the overall inductance of the inductance structure. The metal shield may be switchable between multiple modes, where each mode may be effective to reduce the overall inductance by a different amount. |
| US09589718B2 |
Method for reducing or eliminating conducted common mode noise in a transformer
At least one shield member interposed between primary and secondary windings of a transformer and connected to the primary and/or secondary windings forms a distributed parasitic capacitance between the shield member and either the winding to which it is not connected or another shield member connected to that winding. Connections are made to the respective transformer windings such that the voltage distributions thus developed cause complementary common mode noise to be conducted in opposite directions in respective portions of the parasitic capacitance such that net common mode current can be made arbitrarily small without requiring that both sides of the distributed parasitic capacitance have complementary or equal voltage distributions. Such complementary common mode currents can be achieved by dividing opposing shield members or developing a voltage distribution in a single shield member in accordance with Faraday's Law. |
| US09589717B2 |
Method of manufacturing a reactor
Divided cores 11, 12 includes left and right leg portions and a yoke portion and formed by molding a yoke portion side core material within resin. The leg portions of the divided core are formed by tubular core mounting portions 41, 42. I-shaped leg portion side core materials 51-53 and spacers 6 are mounted in the tubular core mounting portions. A ring-shaped molded core 1 is formed by abutting and integrating the respective leg portions of two divided cores, and a coil 100 is wound around the molded core. |
| US09589716B2 |
Laminated magnetic component and manufacture with soft magnetic powder polymer composite sheets
Miniaturized magnetic components for electronic circuit board applications include enhanced magnetic composite sheets facilitating increased direct current capacity and higher inductance values. The components may be manufactured using relatively simple and straightforward lamination processes. |
| US09589714B2 |
Sintered NdFeB magnet and method for manufacturing the same
Disclosed is a sintered NdFeB magnet having high coercivity (HcJ) a high maximum energy product ((BH)max) and a high squareness ratio (SQ) even when the sintered magnet has a thickness of 5 mm or more. The sintered NdFeB magnet is produced by diffusing Dy and/or Tb in grain boundaries in a base material of the sintered NdFeB magnet by a grain boundary diffusion process. The sintered NdFeB magnet is characterized in that the amount of rare earth in a metallic state in the base material is between 12.7 and 16.0% in atomic ratio, a rare earth-rich phase continues from the surface of the base material to a depth of 2.5 mm from the surface at the grain boundaries of the base material, and the grain boundaries in which RH has been diffused by the grain boundary diffusion process reach a depth of 2.5 mm from the surface. |
| US09589713B2 |
Sintered ferrite magnet and motor provided therewith
A sintered ferrite magnet comprises a main phase of an M type Sr ferrite having a hexagonal crystal structure. An amount of Zn is 0.05 to 1.35 mass % in terms of ZnO, the sintered ferrite magnet does not substantially include a rare-earth element (R), and the following Formula (1) is satisfied, where a total amount of Sr, Ba and Ca is M3 in terms of mol, a total amount of Fe, Co, Mn, Zn, Cr and Al is M4 in terms of mol, and an amount of Si is M5 in terms of mol. 0.5≦{M3−(M4/12)}/M5≦4.8 (1). |
| US09589711B2 |
Resistor and manufacturing method thereof
A resistor and a manufacturing method thereof are disclosed. Since a ceramic tube formed of a ceramic material is used and the ceramic tube is joined to sealing electrodes by use of brazing rings, joining strength and durability of the resistor are considerably improved. The resistor may be stably used at a high voltage due to excellent heat dissipation characteristics thereof. |
| US09589703B2 |
Data cables having an intumescent tape
A data cable can include a plurality of insulated conductors twisted into pairs, an intumescent tape surrounding one or more of the insulated conductors, and a jacket. Each of the plurality of insulated conductors includes a conductor and an insulation layer. Data cables being fluoropolymer-free or halogen free are also described herein. |
| US09589702B2 |
Cable and electronic device
A cable including two metal conductor wires, and a coating that is made of a transparent material or a translucent material, covers the two metal conductor wires in a state of being arranged in parallel at an interval, and is shaped in a manner that one of two surfaces existing along a direction substantially parallel to a direction between the two metal conductor wires is a plane and the other surface is a curved surface with a convex cross section. |
| US09589700B2 |
Cross-linked polyethylene compositions
A cross-linked polyethylene composition for a power cable insulator including (A) 100 parts by weight of a polyethylene base resin, (B) 0.1 to 0.6 parts by weight of a hindered phenol-based antioxidant, (C) 1 to 4 parts by weight of a crosslinking agent, (D) 0.2 to 1.0 parts by weight of magnesium oxide and (E) 0.1 to 1.0 parts by weight of a scorch inhibitor, which advantageously exhibits superior resistance to water tree generated when a power cable insulator is exposed to outside water and electric field, and superior electrical insulation characteristics. |
| US09589699B2 |
Insulation systems having improved partial discharge resistance, and method for producing same
Disclosed are insulating electric conductors against partial discharge and a method for producing an insulation system having improved partial discharge resistance and such an insulation system. There is an erosion-inhibiting effect of adhesion promoters, such as organic silicon compounds, added to resin when admixing nano particulate fillers. Good results may be attributable to a type of particle wetting of the nano particles as a result of particle wetting with organosilanes. The admixture of adhesion promoters with the resin before the addition of the nano particulate filler provides considerable advantages. |
| US09589696B2 |
Semiconductor device using composition for anisotropic conductive adhesive film or anisotropic conductive adhesive film
A semiconductor device bonded by an anisotropic conductive adhesive composition, the anisotropic conductive adhesive composition having a solid content ratio between a polymer binder system and a curing system of about 40:60 to about 60:40, and a coefficient of thermal expansion of about 150 ppm/° C. or less at about 100° C. or less. |
| US09589694B2 |
Alloyed 2N copper wires for bonding in microelectronics devices
An alloyed 2N copper wire for bonding in microelectronics contains 2N copper and one or more corrosion resistance alloying materials selected from Ag, Ni, Pd, Au, Pt, and Cr. A total concentration of the corrosion resistance alloying materials is between about 0.009 wt % and about 0.99 wt %. |
| US09589693B2 |
Electrically conductive adhesives
The present invention relates to adhesives that are suitable for use as electrically conductive materials in the fabrication of electronic devices, integrated circuits, semiconductor devices, passive components, solar cells, solar modules, and/or light emitting diodes. The adhesives comprise at least one resin component, micron-sized electrically conductive particles having an average particle size of 2 μm to 50 μm, and from 0.01 to 15 wt. % of sub-micron-sized electrically conductive particles having a average particle size of 300 nm to 900 nm. |
| US09589688B2 |
Mobile UVA curing system for collision and cosmetic repair of automobiles
A mobile radiation system is provided. The mobile radiation system comprises a mobile radiation device coupled to a control unit; a radiation blocker having an adaptor opening for receiving said mobile radiation device when said mobile radiation device is in a seated position on said radiation blocker; and a mobile carrier comprising a first compartment for housing said radiation blocker, a second compartment for housing said control unit, and a carrier motion device. The adaptor opening can dimensionally fit the mobile radiation device to block radiations from the mobile radiation device when said mobile radiation device is in the seated position. The mobile radiation device can produce radiation having peak radiation wavelength in a range of from about 250 nm to about 450 nm and can have a peak irradiation power in a range of from about 0.5 W/cm2 to about 10 W/cm2. |
| US09589687B2 |
Controlling the temperature of uranium material in a uranium enrichment facility
An apparatus arranged to control the temperature of uranium material in a uranium material storage container, comprising a thermal guide which wraps around an external surface of the uranium material storage container to cause the uranium material storage container to exchange heat energy with a heat transfer medium inside the thermal guide and a heat exchanger to heat or cool the heat transfer medium outside the thermal guide. A method of controlling the temperature of uranium material in a uranium material storage container is also described. |
| US09589686B2 |
Apparatus for detecting contaminants in a liquid and a system for use thereof
Disclosed herein are apparatus and methods for detecting and quantifying contaminants in aqueous solutions. In one embodiment, an apparatus for the detection of contaminants within a liquid comprises a sensor and a controller. The sensor comprises a film and a transducer configured such that, during use, a first surface of the transducer is in fluid communication with a liquid, and the film is disposed between the first surface and the liquid. The film can be a polymeric material capable of hindering the transport of a non-desired species therethrough. The controller is in operational communication to the transducer, and is configured to determine the concentration of contaminants within the liquid. |
| US09589685B2 |
Passive reactor cooling system
A nuclear reactor cooling system with passive cooling capabilities operable during a reactor shutdown event without available electric power. In one embodiment, the system includes a reactor vessel with nuclear fuel core and a steam generator fluidly coupled thereto. Primary coolant circulates in a flow loop between the reactor vessel and steam generator to heat secondary coolant in the steam generator producing steam. The steam flows to a heat exchanger containing an inventory of cooling water in which a submerged tube bundle is immersed. The steam is condensed in the heat exchanger and returned to the steam generator forming a closed flow loop in which the secondary coolant flow is driven by natural gravity via changes in density from the heating and cooling cycles. In other embodiments, the cooling system is configured to extract and cool the primary coolant directly using the submerged tube bundle heat exchanger. |
| US09589682B2 |
Apparatus and method for controlling control rod of nuclear reactor for nuclear power plant
An apparatus for safely controlling a control rod of a nuclear reactor of a nuclear power plant. The apparatus includes a first controller to output a signal to insert or withdraw the control rod. A mechanical portion performs insertion or withdrawal of the control rod in response to the outputted signal. The mechanical portion includes a latch engagement portion, a stop latch to restrain the control rod, a moving latch to move the control rod, and a lift coil to insert or withdraw the control rod. A detector can detect a position or a speed of the control rod. A brake is configured to stop the control rod by force. A second controller operates the brake in response to a brake signal from the detector. The second controller controls the brake independent of the first controller. |
| US09589679B2 |
Passive device regulating pressure in a chamber, chamber and associated installation
This device comprises a spray assembly (40) for spraying fluid into the chamber, and a fluid feed pipe (42) intended to feed fluid to the spray assembly (40).It comprises a fluid-distributing intermediate receptacle (46) positioned between the feed pipe (42) and the spray assembly (40), the intermediate receptacle (46) being connected upstream to the feed pipe (42) and comprising a fluid-evacuating sidewall (52) delimiting through orifices (60) connected to the spray assembly (40).It comprises at least one pipe (44A to 44D) for evacuating fluid towards the chamber (19) and projecting into the intermediate receptacle (46) opposite the sidewall (52). |
| US09589678B2 |
Complex shape structure for liquid lithium first walls of fusion power reactor environments
A method, system, and apparatus are disclosed for a complex shape structure for liquid lithium first walls of fusion power reactor environments. In particular, the method involves installing at least one tile on the surface area of the internal walls of the reactor chamber. The tile(s) is manufactured from a high-temperature resistant, porous open-cell material. The method further involves flowing liquid lithium into the tile(s). Further, the method involves circulating the liquid lithium throughout the interior network of the tile(s) to allow for the liquid lithium to reach the external surface of the tile(s) that faces the interior of the reactor chamber. In addition, the method involves outputting the circulated liquid lithium from the tile(s). In one or more embodiments, the reactor chamber is employed in a fusion reactor. In some embodiments, the tile is manufactured from a ceramic material or a metallic foam. |
| US09589673B1 |
Estimation of an optimal read threshold using symmetry
A group of cells in solid state storage is sampled in order to obtain a sampled distribution associated with the group of cells. An axis of symmetry is determined using the sampled distribution. At least some portion of a conditional distribution is determined based at least in part on: (1) the sampled distribution and (2) the axis of symmetry. An optimal read threshold is estimated using the sampled distribution and the conditional distribution. |
| US09589670B2 |
Input circuit of three-dimensional semiconductor apparatus capable of enabling testing and direct access
An input circuit of a semiconductor apparatus may include a first input buffer configured to receive a signal through a test input terminal and to output a first input signal, a second input buffer configured to receive a signal through a normal input terminal and to output a second input signal. The input circuit of the semiconductor apparatus may include a switching unit configured to transfer the signal inputted through the test input terminal to the second input buffer according to a test mode signal. The input circuit of the semiconductor apparatus may include a comparison unit configured to compare the first input signal with the second input signal and to generate a comparison signal, and a storage unit configured to store the comparison signal. |
| US09589669B1 |
Semiconductor devices and semiconductor systems
A semiconductor system and semiconductor device may be provided. The semiconductor system may include a first semiconductor device configured to generate a test mode signal and configured to receive output data. The semiconductor system may include a second semiconductor device configured to enter a test mode, based on the test mode signal, and block the output data of data that is stored in redundancy memory cells connected to unrepaired redundancy word lines which are not used among redundancy word lines provided for replacing failed word lines. |
| US09589659B1 |
Pre-compensation of memory threshold voltage
Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target data latch coupled to a data node, storing at least one bit of a second target data state of the multiple possible data states of a second memory cell to be programmed in an aggressor data latch coupled to the data node, and programming the first memory cell and performing a program verify operation for the first target data state to determine if the first memory cell is verified for the first target data state. The program verify operation including: an intermediate verify corresponding to an amount of aggression to apply a voltage to the data node when performing the intermediate verify, based on the at least one bit of the second target state stored in the aggressor data latch; and a program verify corresponding to a condition of no aggression to apply to the voltage to the data node when performing the program verify, based on the at least one bit of the second target state stored in the aggressor data latch. The methods including inhibiting the first memory cell from further programming if the first memory cell is verified during the intermediate verify and the at least one bit in the aggressor data latch corresponds to the particular amount of aggression, or the first memory cell is verified during the program verify and the at least one bit in the aggressor data latch corresponds to the condition of no aggression. The second memory cell is a neighbor of the first memory cell. |
| US09589654B2 |
Rank determination of circuits with distinct current carrying capabilities
Technologies are generally provided for methods and circuitry to rank a large number of cells in a timeframe of about one sense cycle. In some examples, an architecture may be implemented to rank memory cells such as volatile memories, non-volatile memories, and other types of data storage devices, where there may not be an equivalent to threshold voltage. In other examples, an arbitrary group of circuits, such as in neural networks where there may not be an equivalent control gate to set the timing resolution, may be ranked. Relative sense timing may be used to rank the cells having different current carrying abilities. A ramped gate voltage may be used to control the timing resolution and to reduce contention between close separate cells. Digital logic may be used to latch and/or record the rank information. |
| US09589653B1 |
Creating default states for non-volatile memory elements
A circuit has a wordline with an NVM element utilizing a first FET coupled to bitline true and a second FET coupled to bitline complement. A NFET coupled to the bitline complement is configured to pull bitline true toward ground in response to bitline complement reaching a first voltage. One or more wordline drivers are coupled to the NVM element such that a first path from a wordline driver is coupled to the first FET while a second path from a wordline driver is coupled to the second FET. The first path is current-limited in comparison to the second path, such that a first slew rate between a wordline driver and the first FET is slower than a second slew rate between a wordline driver and the second FET. The slew rate disparity allows the bitline complement to reach the first voltage. |
| US09589646B2 |
Page buffer circuit having bias voltage application unit and operating method of same
A page buffer circuit includes a plurality of page buffers including a first page buffer. The first page buffer is configured to load input data of the first page buffer, and input data of at least one neighboring page buffer. The first page buffer is also configured to apply a bias corresponding to the input data of the first page buffer, and the input data of the at least one neighboring page buffer to a bit line. |
| US09589637B1 |
Storage element with storage and clock tree monitoring circuit and methods therefor
A storage element with monitoring circuit, comprising a previous state information storage element configured to record a previous state of a monitored state information storage element, a state change indication unit having a clock input terminal coupled to the clock signal input interface, a state change indication unit being configured to generate a state change indication signal indicative of whether the monitored state information storage element shall have performed a state change by observing the data at a data input interface and a data output terminal, and a state change confirmation unit configured to generate a storage fault indicator by observing the data output terminal of the monitored state information storage element and the data output of the previous state information storage element and checking whether the result of this observation is in line with the state change indicator. |
| US09589635B2 |
Semiconductor device with a stoichiometric gradient
A device that includes a semiconductor device and a contact electrode with a first side that is opposite a second side. The first side abuts the semiconductor device. The contact electrode has a stoichiometry that varies from the first side to the second side. The stoichiometry of the first side inhibits the diffusion of metal from the semiconductor device into the first contact electrode. |
| US09589633B2 |
Memory devices and related methods
A resistive memory device. Implementations may include an array of memory cells including resistive memory elements which are coupled to isolation transistors and which may include a magnetic tunnel junction. A decoder decodes input address information to select a row of the array. A binarizer coupled to the memory array assigns binary weights to outputs of the memory array output through bit lines coupled to the memory cells. A summer sums the binary weighted outputs, and a quantizer generates an output digital code corresponding to data stored in a plurality of memory cells during a prior program cycle. The outputs of the memory array may be currents or voltages. In implementations multiple arrays of memory cells may be utilized and their respective outputs combined to form higher bit outputs, such as eight bit, twelve bit, sixteen bit, and so forth. |
| US09589629B2 |
Semiconductor memory with data line capacitive coupling
A method of accessing a semiconductor memory includes operations as follows. A first voltage is received at a first data line, and a second voltage is received at a second data line, during a write operation of the semiconductor memory, in which the first voltage is lower than the second voltage, and a first coupling line is capacitively coupled with the first data line to lower the first voltage at the first data line in the write operation of the semiconductor memory. |
| US09589628B2 |
Semiconductor device performing refresh operation and method for driving the same
A semiconductor device includes a first memory block, a second memory block, a first refresh control block for generating a first block control signal and a second block control signal in response to a refresh pulse signal, a second refresh control block for generating a first refresh control pulse signal and a second refresh control pulse signal corresponding to a first refresh operation section of the first memory block and a second refresh operation section of the second memory block, respectively, in response to the refresh pulse signal and the first and second block control signals, and a third refresh control block for controlling the first and second memory blocks so that a first refresh operation of the first memory block and a second refresh operation of the second memory block are discontinuously performed in response to the first and second refresh control pulse signals. |
| US09589621B2 |
Resistance change memory
A resistance change memory includes a memory cell array comprising memory cells including magnetic tunnel junction (MTJ) elements; a write and read circuit which performs a write operation and a read operation for the memory cells; a temperature sensor which outputs temperature information corresponding to a temperature of the memory cell array; and a memory controller which controls the write operation and the read operation by the write and read circuit in response to the temperature information, such that a first time period from a write command input to a pre-charge command input is variable according to the temperature information, while a second time period from an active command input to the pre-charge command input is fixed constant regardless of the temperature information. |
| US09589617B2 |
MRAM with magnetic material surrounding contact plug
This technology provides an electronic device and a method of fabricating the same. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes a contact plug which is disposed over a substrate and extends in a vertical direction; a variable resistance element which is coupled to the contact plug and includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the first magnetic layer and the second magnetic layer; and a third magnetic layer which surrounds a sidewall of the contact plug and has a same magnetization direction as the second magnetic layer. |
| US09589615B2 |
Digitally trimmable integrated resistors including resistive memory elements
Embodiments include a resistor, coupled on a signal path, that includes one or more resistive memory elements, such as one or more magnetic tunnel junctions (MTJs). The resistance of the resistive memory elements may be digitally trimmable to adjust a resistance of the resistor on the signal path. The resistor may be incorporated into an analog or mixed signal circuit to pass an analog signal on the signal path. Other embodiments may be described and claimed. |
| US09589614B2 |
Multi-chip memory system having chip enable function
A storage device includes first and second nonvolatile memory groups that respectively include first and second nonvolatile memory chips, a memory controller connected to the first and second nonvolatile memory groups in common through input/output lines and at least one control line, and a group select circuit connected to the memory controller through the at least one control line and chip enable lines. The group select circuit is connected to the first and second nonvolatile memory groups through a plurality of first and second chip enable lines, respectively. The group select circuit, in response to receiving a control signal through the at least one control line, is configured to transmit chip enable signals to a selected memory group among the first nonvolatile memory group and the second nonvolatile memory group through selected chip enable lines among the first chip enable lines and the second chip enable lines. |
| US09589607B2 |
Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry comprising a primary latch coupled to a sense line of the array. The sensing circuitry can be configured to perform a first operation phase of a logical operation by sensing a memory cell coupled to the sense line, perform a number of intermediate operation phases of the logical operation by sensing a respective number of different memory cells coupled to the sense line, and accumulate a result of the first operation phase and the number of intermediate operation phases in a secondary latch coupled to the primary latch without performing a sense line address access. |
| US09589603B2 |
Semiconductor device and operating method thereof
A semiconductor device may include: a fuse array including a plurality of fuses; a voltage generation unit suitable for generating a first measurement voltage having a preset level; and a measurement unit suitable for supplying the first measurement voltage to a sourcing node of the fuse array and a second measurement voltage, which is provided from an external through a first pad, to a sinking node of the fuse array, and outputting a current, which is caused by voltage difference between the first and second measurement voltages and passes through one or more of the multiple fuses, through the first pad. |
| US09589598B1 |
Configurable spacecraft processor system
A configurable mission processor (CMP) is disclosed that includes a chassis with a plurality of reprogrammable processor modules (RPMs) disposed within the chassis. Each RPM has a baseboard with at least one field programmable gate array (FPGA) and a configuration manager configured to accept a configuration file through an externally accessible signal connector, store the configuration file, and selectably program the at least one FPGA using the configuration file. The RPM includes a power submodule that accepts unregulated power through an externally accessible power connector, generates regulated power at a plurality of voltages, and provide the regulated power to the RPM. The RPM may also include an input/output submodule configured to provide a communication channel between the at least one FPGA and external devices through its own externally accessible signal connector. The CMP also includes a backplane that provides only signal and ground interconnections between the baseboards. |
| US09589594B2 |
Generation of layout of videos
Providing a method for organizing portions of videos called video previews. The video previews may be associated with a playable group (e.g., one or more other videos that play simultaneously), a video channel (e.g., a collection of videos), or in a particular order for a viewer to browse. Each video channel or video in a channel can provide short, playable video preview that users can use to better decide whether to watch the full video or video channel. |
| US09589593B2 |
Multiple rereading data from storage medium using weight average
According to one embodiment, in the case of rereading of data from a storage area of a storage is performed, data is read from the storage area a plurality of times, and a weighted average of pieces of the data read from the storage area the plurality of times is calculated, according to weights added to the pieces of data, as data reread from the storage area, in which the weights decreases as quality of the pieces of data read from the storage area decreases. |
| US09589592B1 |
Read head characteristic pre-detection
Implementations disclosed herein provide a method comprising applying voltage to a read head during an unload state, detecting characteristic read head data, and storing the detected characteristic read head data in a buffer. In another implementation, the method further comprises performing a read retry operation in response to a read failure, reading the detected characteristic read head data from the buffer, determining if the detected characteristic read head data meets a threshold for a first predetermined criterion, performing a correction operation if the threshold for the first the first predetermined criterion is met, determining whether a media sector is read successfully, and ending the read retry operation if the media sector is read successfully. |
| US09589589B2 |
Spindle motor with sealing member including flange and disk drive apparatus including same
A motor may include a bearing mechanism including a shaft arranged along a center axis, a sealing member has one-end closed cylindrical shape and a recess receiving a lower portion of the bearing mechanism, a stationary portion including a base defining a part of the housing, and a rotary portion rotating relative to the stationary portion about the center axis. The base has a through hole defined therein so as to have a center aligned with the center axis and pass through the base in an axial direction. The sealing member is fixed in a fixing region defined between an outer circumferential portion of the sealing member and an inner circumferential portion that defines the through hole in the base. The fixing region includes a sealing region where a clearance between the sealing member and the base is closed. |
| US09589588B2 |
Heat-assisted rotating disk magnetometer for ultra-high anisotropy magnetic measurements
An apparatus comprises a spindle to rotate a magnetic recording medium and a magnetic field generator to expose a track of the medium to a DC magnetic field. The magnetic field generator is configured to saturate the track during an erase mode and reverse the DC magnetic field impinging the track during a writing mode. A laser arrangement heats the track during the erase mode and, during the writing mode, heats the track while the track is exposed to the reversed DC magnetic field so as to write a magnetic pattern thereon. A reader reads the magnetic pattern and generates a read signal. A processor is coupled to the reader and configured to measure one or more magnetic properties of the track using the read signal. The apparatus can further comprise a Kerr sensor that generates a Kerr signal using the magnetic pattern. |
| US09589586B2 |
Glass for magnetic recording media substrates, magnetic recording media substrates, magnetic recording media and method for preparation thereof
A glass for a magnetic recording medium substrate permitting the realization of a magnetic recording medium substrate affording good chemical durability and having an extremely flat surface, a magnetic recording medium substrate comprised of this glass, a magnetic recording medium equipped with this substrate, and methods of manufacturing the same. The glass compositions disclosed comprise oxides of at least Si, Al, Li, Na, K, Sn and Ce, optionally Sb, but not comprising As or F. Additional oxides of Mg, Cs, Sr and Ba may be present. The oxides are presented as molar percentages, mass percentages and ratios thereof. |
| US09589583B1 |
Current-perpendicular-to-plane magneto-resistance effect element
The CPPGMR element of the present invention has an orientation layer 12 formed on a substrate 11 to texture a Heusler alloy into a (100) direction, an underlying layer 13 that is an electrode for magneto-resistance measurement stacked on the orientation layer 12, a lower ferromagnetic layer 14 and an upper ferromagnetic layer 16 each stacked on the underlying layer 13 and made of a Heusler alloy, a spacer layer 15 sandwiched between the lower ferromagnetic layers 14 and the upper ferromagnetic layers 16, and a cap layer 17 stacked on the upper ferromagnetic layer 16 for surface-protection. This manner makes it possible to provide, inexpensively, an element using a current-perpendicular-to-plane giant magneto-resistance effect (CPPGMR) of a thin film having a trilayered structure of a ferromagnetic metal/a nonmagnetic metal/a ferromagnetic metal, thereby showing excellent performances. |
| US09589582B2 |
High moment side shield design for area density improvement of perpendicular magnetic recording (PMR) writer
A PMR writer is disclosed wherein a hot seed layer (HS) made of a 19-24 kilogauss (kG) magnetic material is formed between a gap layer and a 10-16 kG magnetic layer in the side shields, and between the leading gap and a 16-19 kG magnetic layer in the leading shield to improve the track field gradient and cross-track field gradient while maintaining write-ability. The HS is from 10 to 100 nm thick and has a first side facing the write pole with a height of ≦0.15 micron, and a second side facing a main pole flared side that may extend to a full side shield height of ≦0.5 micron. The trailing shield has a second hot seed layer on the write gap and a 16-19 kG magnetic layer that contacts the 10-16 kG side shield magnetic layer thereby forming an all wrap around (AWA) shield configuration. |
| US09589580B2 |
Sound processing based on a confidence measure
A method for processing sound that includes, generating one or more noise component estimates relating to an electrical representation of the sound and generating an associated confidence measure for the one or more noise component estimates. The method further comprises processing, based on the confidence measure, the sound. |
| US09589578B1 |
Invoking application programming interface calls using voice commands
Technologies are described herein for invoking API calls through voice commands. An annotated API description is received at a voice API interface. The annotated API description comprises descriptions of one or more APIs and speech annotations for the one or more APIs. The voice API interface further receives a voice API command from a client. By utilizing the annotated API description and the speech annotations contained therein, the voice API interface converts the voice API command into an API call request, which is then sent to the corresponding service for execution. Once the service returns an API call result, the voice API interface interprets the API call result and further converts it into an audio API response based on the information contained in the annotated API description and the speech annotations. The audio API response is then sent to the client. |
| US09589576B2 |
Bandwidth extension of audio signals
Audio decoder and method therein for supporting bandwidth extension (BWE) of a received signal. The method involves receiving a first signal representing the lower frequency spectrum of a segment of an original audio signal; receiving a second signal, being a BWE signal, representing a higher frequency spectrum of the segment of the original audio signal. The method further comprises determining a degree of voicing in the lower frequency spectrum of the audio signal, based on the received first signal; and selecting a spectral tilt adaptation filter, out of at least two spectral tilt adaptation filters having different spectral attenuation characteristics, based on the determined degree of voicing. The selected spectral tilt adaptation filter is then applied on the received second signal. Thus, a differentiation of spectral tilt in the higher frequency spectrum of a reconstructed audio signal, based on lower frequency spectrum characteristics of the original audio signal is enabled. |
| US09589572B2 |
Stepsize determination of adaptive filter for cancelling voice portion by combining open-loop and closed-loop approaches
In accordance with an embodiment of the present invention, a noise reduction method for speech processing includes estimating a noise/interference component signal by subtracting voice component signal from a first microphone input signal wherein the voice component signal is evaluated as a first replica signal produced by passing a second microphone input signal through a first adaptive filter; a stepsize is estimated to control adaptive update of the first adaptive filter, wherein the stepsize is evaluated by combing an open-loop approach and a closed-loop approach, the open-loop approach comprising voice/noise/interference classification and SNR estimation in voice area, and the closed-loop approach comprising calculating a normalized correlation between the first replica signal and the first microphone input signal. A noise/interference reduced signal is outputted by subtracting a second replica signal from a target signal which is the first microphone input signal or the second microphone input signal, wherein the second replica signal is produced by passing the estimated noise/interference component signal through a second adaptive filter. |
| US09589570B2 |
Audio classification based on perceptual quality for low or medium bit rates
The quality of encoded signals can be improved by reclassifying AUDIO signals carrying non-speech data as VOICE signals when periodicity parameters of the signal satisfy one or more criteria. In some embodiments, only low or medium bit rate signals are considered for re-classification. The periodicity parameters can include any characteristic or set of characteristics indicative of periodicity. For example, the periodicity parameter may include pitch differences between subframes in the audio signal, a normalized pitch correlation for one or more subframes, an average normalized pitch correlation for the audio signal, or combinations thereof. Audio signals which are re-classified as VOICED signals may be encoded in the time-domain, while audio signals that remain classified as AUDIO signals may be encoded in the frequency-domain. |
| US09589569B2 |
Audio-encoding method and apparatus, audio-decoding method and apparatus, recoding medium thereof, and multimedia device employing same
Provided is an audio encoding method. The audio encoding method includes: acquiring envelopes based on a predetermined sub-band for an audio spectrum; quantizing the envelopes based on the predetermined sub-band; and obtaining a difference value between quantized envelopes for adjacent sub-bands and lossless encoding a difference value of a current sub-band by using a difference value of a previous sub-band as a context. Accordingly, the number of bits required to encode envelope information of an audio spectrum may be reduced in a limited bit range, thereby increasing the number of bits required to encode an actual spectral component. |
| US09589567B2 |
Plant control system using voice as a control mechanism
A system and method for controlling processing equipment. The system includes a control computer communicatively coupled to a terminal computer. Voice data for each of several authorized operators at a plant is stored. The control computer is programmed to implement a voice recognition and authenticated voice-activated control program. The control computer, responsive to receiving a voice-derived input, analyzes the voice-derived input to determine if the voice-derived input matches the voice data for any of the authorized operators. Provided the voice-derived input matches the voice data, the control computer determines at least one command from the voice-derived input for controlling the processing equipment to modify an operation at the plant. The control computer executes the command to control the processing equipment. |
| US09589564B2 |
Multiple speech locale-specific hotword classifiers for selection of a speech locale
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for recognizing speech in an utterance. The methods, systems, and apparatus include actions of receiving an utterance and obtaining acoustic features from the utterance. Further actions include providing the acoustic features from the utterance to multiple speech locale-specific hotword classifiers. Each speech locale-specific hotword classifier (i) may be associated with a respective speech locale, and (ii) may be configured to classify audio features as corresponding to, or as not corresponding to, a respective predefined term. Additional actions may include selecting a speech locale for use in transcribing the utterance based on one or more results from the multiple speech locale-specific hotword classifiers in response to providing the acoustic features from the utterance to the multiple speech locale-specific hotword classifiers. Further actions may include selecting parameters for automated speech recognition based on the selected speech locale. |
| US09589556B2 |
Energy adjustment of acoustic echo replica signal for speech enhancement
A method for cancelling/reducing acoustic echoes in speech/audio signal enhancement processing comprises using a received reference signal to excite an adaptive filter wherein the output of the adaptive filter forms a replica signal of acoustic echo; the replica signal of acoustic echo is reduced adaptively by multiplying a gain to get a gained replica signal of acoustic echo wherein the gain is smaller in speech area and/or double-talk area than non-speech area; the gained replica signal of acoustic echo is subtracted from a microphone input signal to suppress the acoustic echo in the microphone input signal. |
| US09589551B2 |
System for remotely generating sound from a musical instrument
A system for remotely generating sound from a musical instrument. In one embodiment, the system includes an input configured to receive a signal representative of the sound of a first musical instrument, an exciter for converting the signal to mechanical vibrations, and a coupling interface for coupling the mechanical vibrations into a second musical instrument. |
| US09589549B1 |
Electro-mechanical audio signal control system
The present invention is multi-expression control system designed to control the individual sound from one or more compact analog sound modulator systems, often called “pedals, effects or stomp boxes,” or collectively herein “effects pedals,” for guitars, basses and keyboards. It couples features that are proprietary with off-the shelf products resulting in a system that spans the distance between a third party foot pedal and third party effects pedals. The system gives a musician “hands free” control of any third party effects pedal that has manually controlled potentiometers during a live artistic performance. |
| US09589545B2 |
Mouthpiece ligature for woodwind instruments
Disclosed herein is a ligature providing secure contact between the reed and mouthpiece while at the same time allowing for faster adjustment of the reed location and contact point with respect to the mouthpiece cavity such that longer or shorter reed vibrations can be easily obtained if desired. The improved ligature is adaptable to fit a wide range of woodwind instrument mouthpieces. In addition, the ligature has limited points of contact with the mouthpiece, so as to eliminate or reduce abrasions to the mouthpiece assembly associated with the application of the ligature. |
| US09589542B2 |
Mobile terminal and method of controlling the mobile
Provided is a mobile terminal including: a terminal body that has a first side and a second side; a first display that is located at the first side; a second display that is located at the second side; a sensor that is configured to detect rotation of the mobile terminal; and a controller that is configured to: cause the first display to display a first information; and cause the second display to display a second information when the sensor detects that the mobile terminal is rotated a threshold amount, such that a general direction that the first side faced prior to the rotating of the mobile terminal is generally the same as a general direction that the second side faces after the rotating of the mobile terminal, wherein the second information is related to the first information. |
| US09589531B2 |
Methods, systems and apparatus for displaying the multimedia information from wireless communication networks
Video signals for a mobile terminal are converted to accommodate reproduction by an alternative display terminal. The video signal is processed to provide a converted video signal appropriate for an alternative display terminal that is separate from the mobile terminal. This converted video signal is then provided for the alternative display terminal to accommodate the corresponding video display on a screen provided by the alternative (e.g., external) display terminal. |
| US09589530B1 |
Display device control method
The patent application relates to a method of controlling a display device including display elements arranged in a matrix with n rows of display elements. The method includes: driving a first row of display elements, with a first output of a driving system being connected to the first row and disconnected from at least one further row of display elements. |
| US09589529B2 |
Device equipped with flexible display and controlling method thereof
A device enabling for a user to control a flexible display more convenient and precise and a controlling method therefor, are discussed. According to one embodiment disclosed for this, the device includes a flexible display, a length measuring unit configured to measure an expanded length of the flexible display expanded from the device, a speed measuring unit configured to measure a speed of which the flexible display expanded from the device and a processor configured to control the flexible display, the length measuring unit, and the speed measuring unit, wherein if the flexible display is expanded to a unit length, the processor displays an application execution screen corresponding to the unit length in the flexible display. |
| US09589523B2 |
GOA circuit and liquid crystal display
A GOA circuit comprising GOA units and a liquid crystal display are disclosed. The N-staged GOA units charge the Nth-staged horizontal scanning line in the display region, and comprise N-staged pull-up control circuits, N-staged pull-up circuits, N-staged transfer circuits, N-staged pull-down circuits, and N-staged pull-down holding circuits. The N-staged pull-up circuits turn on when the Nth-staged gate signal point is at a high voltage level, receive a first clock signal and charge the N-staged horizontal scanning lines when the first clock signal is at a high voltage level. The N-staged transfer circuits receive a second clock signal when the Nth-staged gate signal point is at the high voltage level and output N-staged transfer signals to control the operation of the (N+1)-staged GOA units. The disclosure may ensure the scanning lines in the GOA circuit to be better charged for facilitating normal operation for each point in the circuit. |
| US09589520B2 |
Self-compensating gate driving circuit
The present invention provides a self-compensating gate driving circuit, comprising: a plurality of GOA units which are cascade connected, and a Nth GOA unit controls charge to a Nth horizontal scanning line G(n) in a display area, and the Nth GOA unit controls charge to a Nth horizontal scanning line G(n) in a display area, and the Nth GOA unit comprises a pull-up controlling part, a pull-up part, a transmission part, a first pull-down part, a bootstrap capacitor part and a pull-down holding part; the pull-up part, the first pull-down part, the bootstrap capacitor part and the pull-down holding circuit are respectively coupled to a Nth gate signal point Q(N) and the Nth horizontal scanning line G(n), and the pull-up controlling part and the transmission part are respectively coupled to the Nth gate signal point Q(N), and the pull-down holding part is inputted with a first DC low voltage VSS1. The present invention is designed to have the pull-down holding part with self-compensating function to promote the reliability of the long term operation for the gate driving circuit. The influence of the threshold voltage drift to the operation of the gate driving circuit is diminished; the pull-down holding part can be designed to be controlled by a set of DC signal source. The design space of the circuit patterns can be saved and the overall power consumption of the circuit can be decreased. |
| US09589519B2 |
Display panel
A display panel is provided. The display panel includes a display area comprising a gate line and a data line, and a gate driver connected to a terminal of the gate line. The gate driver includes a plurality of stages that are integrated on a substrate, and each stage comprises an inverter unit, an output unit, and a Q node stabilization unit. The output unit includes a first transistor and a first capacitor, wherein the first transistor includes an input terminal for receiving a clock signal, a control terminal connected to a node Q, and an output terminal connected to a gate voltage output terminal to output a gate voltage. A Vgs voltage of a transistor in the Q node stabilization unit has a value of equal to or less than 0 V when the output unit outputs a gate-on voltage. |
| US09589517B2 |
Liquid crystal display device and method for driving same
In a liquid crystal display device for performing pause driving, occurrence of flicker is effectively suppressed while an increase in power consumption is suppressed.When an image change determination portion (11) detects an image change in a period from the previous refresh frame until generation of a predetermined number of times of pause frames, a reversal driving control portion (13) sets the next frame after a frame where an image change has been detected to a refresh frame where a reversal driving technique is a column-reversal driving. When the image change determination portion (11) does not detect an image change in the period from the previous refresh frame until generation of the predetermined number of times of pause frames, the reversal driving control portion (13) sets the next frame after the final pause frame to a refresh frame where a reversal driving technique is a dot-reversal driving. |
| US09589513B2 |
Driving an electrowetting display device
A method of driving an electrowetting display device that includes a display element having a cavity; a first fluid and a second fluid within the cavity, the first fluid being immiscible with the second fluid; a surface facing the cavity; and a first electrode. The display device includes a control system for applying a voltage to the first electrode to provide a display state in response to a signal level of the voltage, wherein the control system is arranged to configure the signal level throughout a display period such that the second fluid adjoins at least a minimum area of the surface, the minimum area being greater than a zero area. The method includes applying at least one display signal level during the display period, the at least one display signal level configured such that the first fluid and the second fluid adjoin the surface throughout the display period. |
| US09589508B2 |
Pixel circuit, display panel, and display device
A pixel driving circuit includes a signal loading component, a storage capacitor, a compensation component, a mirror component, and a drive transistor. In a data transmission stage, the signal loading component transmits a received image data signal to the gate of a drive transistor, which is stored in a storage capacitor; and in a threshold voltage compensation stage, the compensation component connects the gate of the drive transistor to the source of the drive transistor so as to generate a drive signal dependent upon the threshold voltage of the drive transistor from the signal stored in the storage capacitor and to drive an organic light emitting diode to emit light, thus eliminating an influence of the threshold voltage of the drive transistor on the current through the organic light emitting diode and preventing the brightness of the organic light emitting diode from varying over its operating period of time. |
| US09589505B2 |
OLED pixel circuit, driving method of the same, and display device
An OLED pixel circuit includes a data strobe module, a threshold compensation module, a driving module, and a light-emitting module. Wherein, the data strobe module is used for inputting a data signal on a data signal line to the driving module under control of a scanning signal of a scanning signal line; the threshold compensation module is used for compensating a threshold voltage of the driving module; and the driving module is used for driving the light-emitting module to emit light according to the data signal provided by the data strobe module. The OLED pixel circuit can compensate shift and inconsistency of a threshold voltage of a transistor therein effectively, so that the drive current of the OLED will not affected by the threshold voltage of the transistor, making brightness of a display device more uniform. |
| US09589503B2 |
Organic light-emitting display apparatus
An organic light-emitting display apparatus includes: a power voltage generation unit configured to generate a first power voltage and a dummy power voltage having a different level from that of the first power voltage; a power voltage wiring network to which the first power voltage is applied; a dummy power voltage line to which the dummy power voltage is applied; a plurality of pixels each comprising an emission device and a pixel circuit electrically coupled to the power voltage wiring network; a plurality of dummy pixels each comprising a dummy circuit connectable to the dummy power voltage line; and a plurality of repair lines each connectable to the dummy circuit of a corresponding dummy pixel among the plurality of dummy pixels and to the emission devices of corresponding pixels among the plurality of pixels. |
| US09589502B2 |
Organic light emitting display device with initialization circuit and driving method of the same
An organic light emitting display device includes an organic light emitting display panel, and a driver that drives the organic light emitting display panel. The driver applies a first power voltage and a second power voltage to the organic light emitting display panel, the first power voltage is lower than the second power voltage during a first period, and the first power voltage is higher than the second power voltage during a second period. |
| US09589500B2 |
Common voltage compensation circuit, compensating method thereof, array substrate and display apparatus
The present disclosure discloses a common voltage compensation circuit, a compensating method thereof, an array substrate and a display apparatus, when a difference between the common voltage on the common electrode line and a reference voltage is great, the comparison module outputs a zero voltage signal to an inversion module, the common voltage on the common electrode line is compensated by the common voltage compensation circuit; when the difference between the common voltage on the common electrode line and the reference voltage is small, the comparison module outputs a first level signal to the inversion module, the common voltage on the common electrode line is not compensated by the common voltage compensation circuit, The common voltage on the common electrode line can be stabilized, thus a problem of abnormities occurred in a display picture of the display panel could be avoided. |
| US09589499B2 |
Display device having function of controlling luminance based on average picture level and luminance control method thereof
A display device and a method for controlling a luminance of the display device are disclosed. The display device includes an average picture level (APL) calculator which calculates an APL of an input image and outputs the APL of the input image and an APL curve data, a luminance adjuster which includes at least two luminance adjusting units enabled in response to a user input through a user interface and reduces a luminance of an APL section equal to or less than a predetermined reference value, a data modulator modulating data of the input image using a luminance defined in the APL curve data, and a display panel driving circuit which writes data from the data modulator on a display panel and reproduces the input image on the display panel. |
| US09589498B2 |
Display driver and display device
A display driver comprises a plurality of driver stages. For each stage, a source node of a first transistor is coupled to a first power supply, a gate node is coupled to a first node, and a drain node is coupled to a first output end. A source node of a second transistor is coupled to the first output end and a gate node of is coupled to a second controller and a drain node is electrically coupled to a first input end. The first controller is coupled to a second input end and a third input end to provide sampled signals to the first node and a second output end. The second controller is coupled to the first controller and a second power supply. The first output end of each driver stage is coupled to the third input end of the next driver stage. |
| US09589497B2 |
Methods of grayscale calibration of subpixels of liquid crystal panels during imaging
A method of grayscale calibration of subpixels of liquid crystal panels during imaging includes: obtaining a first brightness value when the subpixel of the i-th color has a maximum grayscale; calculating a second brightness value of each grayscale(j); obtaining a third brightness value of each grayscale(r) of the main subpixel area and a fourth brightness value of each grayscale (s) of the secondary subpixel area of under the direct view condition; determining value combinations for the main and the secondary subpixel area of the subpixel having the grayscale (j) and satisfying a predetermined criteria; calculating total color differences of the grayscale images respectively for the direct and a squint view condition when the value combination being applied; determining the value combination of the minimum total color difference as the value combination applied for the subpixel. With such configuration, the color shift of the liquid crystal panel may be reduced. |
| US09589490B2 |
System and methods for extraction of threshold and mobility parameters in AMOLED displays
A system to improve the extraction of transistor and OLED parameters in an AMOLED display includes a pixel circuit having an organic light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input to provide the programming signal, and a storage device to store the programming signal. A charge-pump amplifier has a current input and a voltage output. The charge-pump amplifier includes an operational amplifier in negative feedback configuration. The feedback is provided by a capacitor connected between the output and the inverting input of the operational amplifier. A common-mode voltage source drives the non-inverting input of the operational amplifier. An electronic switch is coupled across the capacitor to reset the capacitor. A switch module including the input is coupled to the output of the pixel circuit and an output is coupled to the input of the charge-pump amplifier. |
| US09589477B2 |
Method of keyboard training using keystroke time-out period
A method of training a student to type on a keyboard which has features that help the student avoid hunting and pecking. During training, a student is instructed to look at sample text and copy it by typing on a keyboard. The output of the student's keystrokes is displayed on a monitor. One feature sets a limited time period in which to type each keystroke. Another feature hides the display. The features may be used in combination. |
| US09589473B1 |
Method and system for automatically displaying flight path, seeding path and weather data
Provided are a method and system for automatically displaying a flight path, a seeding path, and weather data, the system including: an experimental scientist terminal transmitting weather data; a pilot terminal; a terrestrial data processing server transmitting wind field observation data concerning a seeding path; and a portable data processing server that receives and stores weather data from the experimental scientist terminal and constitutes a flight path and a seeding path of an experimental airplane, and a current location of the experimental airplane, thereby transmitting information on the constituted flight path, seeding path, and current location to the experimental scientist terminal and the pilot terminal, the portable data processing server resetting the stored seeding path by control of the experimental scientist terminal based on wind field observation data concerning the seeding path, and storing location information of the experimental airplane by control of the experimental scientist terminal. |
| US09589472B2 |
Runway incursion detection and indication using an electronic flight strip system
An electronic flight strip system and method of detecting and indicating runway incursions are disclosed. One such method receives an aircraft location, compares the location to a geofenced area, and generates an indication on the touchscreen display in response to the aircraft location being within the geofenced area without an indication of clearance to enter the geofenced area. The indication may be part of the electronic flight strip associated with the offending aircraft. |
| US09589470B2 |
Method and apparatus for detecting vehicle running in blind spot, and method and apparatus for giving warning in changing cruising lane
An apparatus for detecting a vehicle running in a blind spot detects, with a predetermined accuracy, a first target position of a target which is present in a first detection area that extends obliquely rearward of the vehicle, detects, with an accuracy lower than the predetermined accuracy, a second target position related to a target which is present in a second detection area adjacent to the first detection area; calculates a first estimated position that corresponds to a subsequent position of the target that has been detected by the detection section as the first target position; and adopts the first estimated position as a position of the target when the first estimated position is included in a predetermined range centering on the second target position, adopts the second target position as a position of the target when the first estimated position is outside the predetermined range. |
| US09589469B2 |
Display control method, display control apparatus, and display apparatus
A computer performs a process to determine whether an object is a predetermined object and a process to control a display unit to generate a first image based on a result of recognized object at a first timing and generate a second image based on a result of the recognized object at a second timing that is later than the first timing if the predetermined object is determined. The first image is an image formed by a pattern of markers representing a skeleton of the object, and the second image is an image formed by a pattern of markers corresponding to the pattern of markers in the first image, and the position of at least one marker of the pattern of markers in the first image differs from the position of the corresponding marker in the second image. |
| US09589467B2 |
Automatic regulated parking system and method
The invention relates to a system, method and equipments for the control, management and administration of regulated vehicles parking, on public and private roads, in an automatic and integrated manner, where the parked vehicles identification, as well as the parked time control and parking permits, including all related parking incidences, are detected and handled without the need of parking meters or permanent parking wardens, and the information is automatically transmitted to a Management Center, for its processing and administration. The Automatic Regulated Parking System (10) includes: A set of User Devices (11) which communicate with the User Management Center (16) by means of Smart Network Terminals (12), a set Smart Network Terminals (12), a set of network Access Nodes (13), a set of Network Nodes (14), a Network Control Center (15), a User Management Center (16) and a reduced set of Agent Mobile Terminals (17). |
| US09589464B2 |
Vehicular headlight warning system
A method is provided for alerting a driver of a vehicle of an unsafe exterior lighting status. The method includes receiving, at a first vehicle, information sufficient to detect a presence of a second vehicle. Once a vehicle is detected, the method continues to identify a direction of travel of the second vehicle with respect to the first vehicle. The method includes measuring a level of ambient light, and determining the level of ambient light is below a threshold level. The method further identifies any presence of functioning exterior lighting of the second vehicle by detecting a light color and light intensity. When an unsafe exterior lighting status is determined, the method includes alerting a driver of the second vehicle using a vehicle-to-vehicle communication signal. The signal includes a notification suggesting usage of at least one of headlights, parking lights, and hazard lights. |
| US09589462B1 |
System and method for CCX based sensor data tracking with highly assured data delivery
A tag, system, and method for wireless sensor data collection, the system including: a data collection tag, the tag including: a sensor configured to provide, at a first repetition rate, a present measurement of an environmental characteristic; a memory configured to store previous measurements of the environmental characteristic; and a transmitter module configured to transmit the present measurement of the environmental characteristic and at least one previous measurement of the environmental characteristic; an access point configured to receive a transmission from the data collection tag; and a controller communicatively coupled to the access point, the controlled configured to store historical measurements extracted from the transmission from the data collection tag. |
| US09589461B1 |
Battery powered wall mounted remote control for ceiling fans and lights
Systems, devices and methods for providing a battery powered wall mounted remote control for ceiling fans and lights. The battery powered remote control can be installable over an existing wall switch without hard wiring into electrical system at the switch box. The remote control housing is decorative in nature and has functional fan and light buttons for remotely controlling operation of the fan and light fixture. The remote housing attaches to the hard wired wall mounted switch using existing hardware that previously held the switch plate in place. The remote housing has a door that opens to allow the original fan/light switch to still be used in an on/off power control for the device being controlled by the battery powered wall mounted remote control for ceiling fans and lights. |
| US09589455B2 |
Vehicle remote control system, server, and remote control terminal
After start of pre-air-conditioning, when a preset set condition is satisfied, an in-vehicle terminal transmits information regarding a vehicle state and a screen display command for selection between continuation and termination of the pre-air-conditioning to a mobile terminal. The mobile terminal receives the screen display command and displays a notification indicating the vehicle state and a selection button for selection between the continuation and the termination of the pre-air-conditioning on a screen. After obtaining the vehicle state, the user selects whether to continue or terminate the pre-air-conditioning. In this manner, pre-air-conditioning suitable for each individual user can be performed. |
| US09589454B2 |
Method, apparatus and system for broadcasting an alarm for an alarm group
An approach for broadcasting an alarm to a plurality of devices associated with an alarm group. The alarm is associated with a plurality of devices in an alarm group. The approach includes receiving a request. The request designates a plurality of devices as the alarm group. The approach includes determining an implementation of the alarm for the alarm group based on the request. The approach also includes broadcasting the alarm to the plurality of devices in the alarm group based on the implementation. |
| US09589451B2 |
Lockdown apparatus for initiation of lockdown procedures at a facility during an emergency including subsequent lockdown status communications
Some embodiments are directed to a lockdown apparatus for facilitating initiation of lockdown procedures at a facility. The lockdown apparatus can include a manually operated actuator disposed at the facility and configured to transmit a lockdown initiation signal upon being manually actuated. The actuator can be configured to be recognizably distinguishable from a fire alarm actuator. The lockdown apparatus can also include a lockdown communicator configured to produce a lockdown communication for communicating initiation of lockdown procedures to the facility occupants and individuals not disposed proximate the facility upon transmission of the lockdown initiation signal, the lockdown communication being recognizably distinguishable from the fire alarm communication. The lockdown communicator can include an annunciator that communicates an audible annunciation to facility occupants upon transmission of the lockdown initiation signal, and that ceases to communicate the audible annunciation subsequent to a predetermined number of alarm cycles. |
| US09589450B2 |
Lockdown apparatus for initiation of lockdown procedures at a facility during an emergency including a drill mode
Some embodiments are directed to a lockdown apparatus for facilitating initiation of lockdown procedures at a facility. The lockdown apparatus can include a manually operated actuator disposed at the facility and configured to transmit a lockdown initiation signal upon being manually actuated. The actuator can be configured to be recognizably distinguishable from a fire alarm actuator. The lockdown apparatus can also include a lockdown communicator configured to produce a lockdown communication for communicating initiation of lockdown procedures to the facility occupants and individuals not disposed proximate the facility upon transmission of the lockdown initiation signal, the lockdown communication being recognizably distinguishable from the fire alarm communication. The lockdown communicator can include an annunciator that communicates an audible annunciation to facility occupants upon transmission of the lockdown initiation signal, and that ceases to communicate the audible annunciation subsequent to a predetermined number of alarm cycles. |
| US09589449B2 |
Lockdown apparatus for initiation of lockdown procedures at a facility during an emergency including a drill mode
Some embodiments are directed to a lockdown apparatus for facilitating initiation of lockdown procedures at a facility. The lockdown apparatus can include a manually operated actuator disposed at the facility and configured to transmit a lockdown initiation signal upon being manually actuated. The actuator can be configured to be recognizably distinguishable from a fire alarm actuator. The lockdown apparatus can also include a lockdown communicator configured to produce a lockdown communication for communicating initiation of lockdown procedures to the facility occupants and individuals not disposed proximate the facility upon transmission of the lockdown initiation signal, the lockdown communication being recognizably distinguishable from the fire alarm communication. The lockdown communicator can include an annunciator that communicates an audible annunciation to facility occupants upon transmission of the lockdown initiation signal, and that ceases to communicate the audible annunciation subsequent to a predetermined number of alarm cycles. |
| US09589442B2 |
Adaptive classification of fall detection for personal emergency response systems
Techniques described herein relate to the classification of fall events for PER (personal emergency response) devices. In one implementation, data relating to acceleration events that occurred at the PER devices may be received. The data relating to the acceleration events may be associated with indications of whether the acceleration events correspond to fall events of users of the PER devices. A classification model may be trained based on the data relating to the acceleration events and the indications of whether the data relating to the acceleration events corresponds to the fall events. The classification model may be transmitted to at least some of the PER devices to update a previous version of the classification model at the at least some of the PER devices. |
| US09589437B2 |
Permissions-based alarm system and method
Embodiments of the present disclosure provide a permissions-based alarm system for use in climbing environment. The permissions-based alarm system includes an identification device storing a permission setting relating to an aspect of the climbing environment and a detection module in communication with the identification device. The detection module detects the permission setting stored on the identification device and detects proximity of the identification device to an area restricted by the permission setting. When the identification device enters the restricted area of the climbing environment, an alert is provided. |
| US09589432B2 |
Haptic actuators having programmable magnets with pre-programmed magnetic surfaces and patterns for producing varying haptic effects
A haptic peripheral including a magnetic actuator coupled to a user input element for providing haptic effects to the user input element. The magnetic actuator includes at least two opposing programmable magnets, a first programmable magnet and a second programmable magnet, with pre-programmed patterns to control the motion of the user input element. Each programmable magnet has a pre-programmed pattern of magnetic elements. The pre-programmed patterns of the magnetic elements interact with each other to cause haptic effects. In order to vary to haptic effects output by the magnetic actuator, the second programmable magnet is spun, rotated, or otherwise moved to change the orientation or position of the pre-programmed pattern. The re-oriented pattern of the second programmable magnet changes the interaction between the first and second programmable magnets and thereby results in different haptic effects being output to the user input device. |
| US09589424B2 |
Gaming system, gaming device and method for draw poker game (dream card)
A gaming system, a gaming machine and a method is provided having a Five Card Video Draw poker game with a single hand or multiple hands. The gaming system or gaming machine first determines whether a dream card is going to be used in a particular round of play or a dream card is used on every hand. If the dream card is going to be used, then the last card of the initial hand is chosen so that, when the last card is combined with the other randomly selected cards of the initial hand, the initial starting hand will have the highest possible expected value. |
| US09589420B2 |
Wagering game with option to risk credit balance
A method of conducting a wagering game includes receiving a first wager amount from a player. The first wager amount initiating a first play of the wagering game. The first wager amount is deducted from an available-credits pool. An outcome of the first play is determined. In response to the outcome of the first play being a winning outcome, a credit amount associated with the winning outcome is added to the available-credits pool. Prior to a second play of the wagering game, it is determined that the available-credits pool is less than the first wager amount and, in response to that determination, an option to risk the available-credits pool is provided. The result of the risk being either (i) a triggering of the second play of the wagering game at the first wager amount or (ii) a reduction of the available-credits pool to zero. |
| US09589415B2 |
Gaming machine and method to effect information transfer between a gaming machine and an external device
Embodiments relate to gaming machines and methods to be performed in relation to gaming machines. An example gaming machine comprises: a display screen; an input mechanism operable to receive an input from a user; a gaming controller configured to: (i) control a game play sequence comprising a presentation of one or more games of chance on the gaming machine; and (ii) in response to the received input from the user, generate and encrypt visual code from a set of data and display the encrypted visual code on the display screen, wherein the encrypted visual code includes a timestamp; wherein the displayed encrypted code is able to be captured by an external handheld device, and the visual code is dynamically re-generated upon each successive input from a user made through the input mechanism. |
| US09589410B2 |
Paper money handling apparatus
Provided is a paper money handling apparatus of which the security of a paper money process unit is improved, the jam is easily removed, and the layout is easily changed while the operability thereof is ensured. The paper money handling apparatus includes a repository, a temporary storage container, and a money deposit/withdrawal slot. The repository is provided inside a safe so as to store paper money therein. The temporary storage container is provided inside the safe so as to temporarily store deposited paper money therein during a transaction. The money deposit/withdrawal slot serves as an entry/exit opening of a paper money passageway provided at the upper part of the safe so as to communicate with the repository and the temporary storage container. |
| US09589408B2 |
Sheet type medium thickness identification device and identification method thereof
A device for identifying thickness of a sheet-like medium and method thereof are provided. The device includes: a frame, a thickness shaft, a floating shaft and a sensor; where: both ends of the thickness shaft are arranged on the two lateral plates of the frame via bearings; both ends of the floating shaft are arranged on the two lateral plates of the frame via bearings and an outer surface of the floating shaft is tangently contacted with an outer surface of the thickness shaft; and the sensor is arranged on the facade of the frame, and configured to detect an amplitude of a point of tangency where the floating shaft is tangent to the thickness shaft. |
| US09589403B2 |
Access control via a mobile device
Systems, devices, and methods for access control via a mobile device are described herein. One device includes instructions stored thereon executable by a processor to receive location information associated with a mobile device in a facility, determine that the mobile device is within a particular distance of an area of the facility based on the location information, receive an indication of a user input by the mobile device, determine whether a user of the mobile device is allowed access to the area, and allow access to the area via a relay associated with the area responsive to a determination that the user is allowed access and the user input. |
| US09589400B2 |
Security control and access system
The present disclosure provides methods, devices, and systems for controlling access to a controlled area. The method may comprise receiving a card identification signal in an access card controller through an access card reader associated with an entrance to the enclosed area, and then authenticating the card identification signal. The method may then comprise sending an unlock signal through a solid state relay to unlock a door at the entrance to the enclosed area associated with the access card reader when the card identification signal has been successfully authenticated. |
| US09589395B2 |
Tool interface connector wireless adapter compact design
A vehicular diagnostic tool interface device that may be connected to a vehicular diagnostic tool, typically through an available port thereof, that enhances the functionality of the overall tool. The interface device is configured in such a manner as to provide physical protection to more sensitive components such as, for example, wireless transceivers. The interface device is also configured to minimize the distance that it protrudes from the diagnostic tool. Also, a method of operating such a vehicular diagnostic tool. |
| US09589393B2 |
Driver log generation
A system for determining a driver log entry comprises a processor and a memory. The processor is configured to determine a log start time. The processor is configured to determine a driver identity after the log start time. The processor is configured to determine whether a change to the driver identity has occurred based at least in part on a sensor data. In the event that the driver identity has changed, the processor is configured to determine a log stop time and determine a driver log entry using the log start time, the driver identity, and the log stop time. |
| US09589388B1 |
Mechanism for minimal computation and power consumption for rendering synthetic 3D images, containing pixel overdraw and dynamically generated intermediate images
Embodiments disclosed include a mechanism in a system and method for significantly reducing power consumption by reducing computation and bandwidth. This mechanism is particularly applicable for modern 3D synthetic images which contain high pixel overdraw and dynamically generated intermediates images. Only blocks of computation which contribute to the final image are performed. This is accomplished by rendering in reverse order and by performing multiple visibility sort in a streaming fashion through the pipeline. Rendering of dynamically generated intermediate images is performed sparsely by projecting texture coordinates from a current image back into one or more dependent images in a recursive manner. The newly computed pixel values are then filtered and control is returned to the sampling shader of the current image. When only visible pixels are projected optimal computation is performed. Several implementations are presented with increasing efficiency. An acceleration structure, termed a Draw Buffer, simplifies the process of projecting backward and utilizes a hardware managed dynamic memory object. This mechanism reduces computation by 50%, with significant bandwidth and power savings. |
| US09589385B1 |
Method of annotation across different locations
A computer-implemented method, system and computer-readable storage device provide functionality for managing location information for planar regions in two-dimensional views of a three-dimensional environment. A request is received for a first two-dimensional view of a three-dimensional environment that identifies a first planar region associated with content within the three-dimensional environment. The first two-dimensional view is rendered and displayed. A request is received for a second two-dimensional view from a second location. A distance and direction between the location of the first planar region and the location for the second view are determined and used to establish a second location of the planar region in the second two-dimensional view, and then use this information to help render and display the second two-dimensional view. |
| US09589382B2 |
Render setup graph
Systems and methods for rendering an image using a render setup graph are provided. The render setup graph may be used to configure and manage lighting configuration data as well as external processes used to render the computer-generated image. The render setup graph may include a dependency graph having nodes interconnected by edges along which objects and object configuration data may be passed between nodes. The nodes may be used to provide a source of objects and object configuration data, configure visual effects of an object, partition a set of objects, call external processes, perform data routing functions within the graph, and the like. In this way, the render setup graph may advantageously be used to organize configuration data and execution of processes for rendering an image. |
| US09589381B2 |
Copying of animation effects from a source object to at least one target object
A method and a processing device may be provided for copying animation effects of a source object to one or more target objects of a presentation. The source object and the target objects may be included in presentation templates, or presentation slides of presentation files. The one or more target objects may be included in a same presentation slide as the source object, a different presentation slide as the source object, a same presentation file as the source object, a different presentation file as a source object, a same presentation template as a source object, or a different presentation template as the source object. Animation effects that are supported by a target object may be copied from the source object to the target object. When copying one or more animation effects from the source object to multiple target objects, timing of the animation effects may be serial or concurrent. |
| US09589380B2 |
Avatar-based unsolicited advertisements in a virtual universe
A system, method and program product for providing a virtual universe in which unsolicited advertisements are embodied in automated avatars. A system is provided that includes: a registration system for introducing an advertisement avatar into the virtual universe; a targeting system for targeting a user avatar for delivery of advertising content by the advertisement avatar; a movement system for defining how the advertisement avatar is to move within the virtual universe; and an advertisement delivery system for defining how the advertisement avatar is to deliver the advertising content to the user avatar. |
| US09589377B1 |
Real-time gap free time domain density histogram display with arbitrary sample rate
A real-time spectrum analyzer for measuring time domain data of an input signal includes an ADC, a resampler and a density histogram memory unit. The ADC has a first sample rate and is configured to acquire and digitize the input signal at the first sample rate to provide first samples. The resampler has a second sample rate and is configured to acquire the first samples at the second sample rate to provide second samples grouped in sample sets, where the second sample rate is selected so that each sample set includes an integer number of second samples per an integer number of periods at a frequency of interest of the input signal. The density histogram memory unit is configured to store at least a portion of the second samples output by the resampler for generating a continuous real-time gap-free density histogram corresponding to the time domain data. |
| US09589373B2 |
Monte carlo modeling of field angle-dependent spectra for radiographic imaging systems
Methods and/or apparatus for iteratively reconstructing a 3-dimensional volume for an object captured with radiographic imaging that includes an electronic sensor, exemplary methods can be performed at least in part on a computer, can include receiving a 3-dimensional volume data set generated from imaging an object; identifying a set of intra system components corresponding to system components used to capture images of the object, where the intra system components include at least an x-ray source within system components configured to be placed before the object; representing x-ray emission characteristics of the x-ray source as a function of angle and energy; using the 3D emission characteristics to simulate the forward projection of x-ray photons to generate a primary image and/or a scattered image; and using the primary image and/or the scattered image to reconstruct an improved 3-dimensional volume data set. |
| US09589371B2 |
Solar heat power generation system and detection device for condenser reflecting surface thereof
A detection device for a condenser reflecting surface of a solar heat power generation system comprises: a horizontal rotary beam disposed above the condenser reflecting surface and capable of rotating in a horizontal surface, a plurality of laser heads being disposed at the bottom end of the horizontal rotary beam, a receiving disk perpendicular to the central axis of the horizontal rotary beam and capable of vertical movement connected at the theoretical focus of the condenser reflecting surface below the horizontal rotary beam, a camera being disposed below the receiving disk. A solar heat power generation system comprises the condenser reflecting surface and the detection device, and the detection device is disposed right above the condenser reflecting surface. |
| US09589370B2 |
Method for assisting with the search for an element, and associated device and vehicle
The invention relates to a method for assisting with the search for an element (E) having a predefined hue in an environment, the method comprising the provision of at least one image in color, said or each image comprising pixels, the method being characterized in that the method comprises the selection in said or each image of the pixels having a hue for which value of the parameter associated through the bijection is comprised between first and second values, the first and second values being chosen so that the set of hues, for which value of the parameter associated through the bijection is comprised between both chosen values, comprises the predefined hue. |
| US09589368B2 |
Object-tracking systems and methods
A system and method for tracking, identifying, and labeling objects or features of interest, such as follicular units is provided. In some embodiments, tracking is accomplished using unique signature of the follicular unit and image stabilization techniques. According to some aspects pixel data of a region of interest in a first image is compared to pixel data of the regions of interest in a second image, and based on a result of the comparison of pixel data in the region of interest in the first and second images and the signature of the follicular unit, locating the follicular unit in the second image. In some embodiments the follicular unit is searched for in the direction of a motion vector. |
| US09589365B2 |
Method and apparatus for expressing motion object
A method and an apparatus for expressing a motion object are disclosed. The method includes obtaining a stereo image in which the motion object has been captured, the stereo image including a depth image; extracting a key point from the motion object in the stereo image; determining, based on statistical information relating to three-dimensional motion of pixels within a first predetermined region surrounding the key point, a dominant direction of the key point; determining, based on the dominant direction of the key point, motion vectors of pixels within a second predetermined region surrounding the key point to obtain rotation invariant motion vectors; and extracting, based on the determined motion vectors of the pixels within the second predetermined region surrounding the key point, a feature describing the key point. The present invention can extract features of motion object that are irrelevant to a viewing angle of a camera. |
| US09589358B1 |
Determination of point of interest views from selected vantage points
A three dimensional map of a designated area that includes location data and relative height data of vantage points, points of interest, and objects, within the designated area, is received. A line-of-sight view from the vantage points to the points of interest is determined by calculating an angle, a distance, and a direction between a vantage point and a point of interest based, at least in part, on the location data and relative height data associated with the three dimensional map of the designated area. Obstructions of the line-of-sight view between the vantage points and the points of interest are determined, based on the line-of-sight view, the location data, and the relative height data, and responsive to determining that the line-of-sight view is free of obstruction, identifying each point of interest viewable from each vantage points, within the designated area. |
| US09589352B2 |
Position controller, method of controlling position, and apparatus including the position controller
A position controller, including a moving part configured to process or measure a workpiece, a laser unit disposed on one side of the moving part and configured to radiate a laser, a mask on which a laser image is formed corresponding to the irradiated laser, and a position control unit configured to position the moving part based on information of the laser image. |
| US09589351B2 |
System and method for pet face detection
Pet faces can be detected within an image using a cascaded adaboost classifier trained to identify pet faces with a high detection rate and a high false positive rate. The identified potential windows are further processed by a number of category aware cascade classifiers, which are each trained to identify pet faces of a particular category with a high detection rate and low false positive rate. The potential pet faces identified by the category aware classifiers may be processed to verify whether a pet's face is present or not. |
| US09589345B2 |
Systems and methods for accelerated arterial spin labeling using compressed sensing
Systems and methods for accelerated arterial spin labeling (ASL) using compressed sensing are disclosed. In one aspect, in accordance with one example embodiment, a method includes acquiring magnetic resonance data associated with an area of interest of a subject, wherein the area of interest corresponds to one or more physiological activities of the subject. The method also includes performing image reconstruction using temporally constrained compressed sensing reconstruction on at least a portion of the acquired magnetic resonance data, wherein acquiring the magnetic resonance data includes receiving data associated with ASL of the area of interest of the subject. |
| US09589344B2 |
Volume data analysis system and method therefor
A controller has a function that: poygonizes and converts three-dimensional volume data, which is generated by a modality, into polygon data; divides this polygon data into a plurality of clusters; calculates an L2 norm vector of spherical harmonics as a feature vector with respect to each of the clusters based on the polygon data constituting each cluster; identifies whether each cluster is a target or not, based on each calculated feature vector and learning data; and displays an image of a cluster identified as the target at least on a screen. |
| US09589343B2 |
Pattern measurement device, evaluation method of polymer compounds used in self-assembly lithography, and computer program
The purpose of the present invention is to provide a pattern measurement device which evaluates quantitatively and with high precision random patterns such as finger print patterns. In order to fulfill this purpose, a pattern measurement device which measures the pattern on a sample on the basis of an image acquired by a charged particle beam is proposed which selectively extracts linear or linearly approximable parts of the pattern on the sample, and outputs at least one of the following: the measurement of the distance between the extracted parts, the ratio of said extracted parts in a prescribed region, and the length of said extracted parts. Further, as a more specific embodiment, a pattern measurement device is proposed which calculates a frequency depending on a distance value between extracted parts, and outputs, as a pattern distance, distance values for which said frequency fulfills a prescribed condition. |
| US09589335B2 |
Method for dynamic range editing
A method of displaying a high dynamic range image, comprising receiving the high dynamic range image, calculating a first set of tone mapping parameters as a function of the high dynamic range image, sub-sampling the first set of tone mapping parameters at a first resolution to create a first sub-sampled parameter set, creating a first tone-mapped image by processing the high dynamic range image as a function of the first sub-sampled parameter set, and displaying the first tone-mapped image. A method of composting a plurality of versions of an image to create the high dynamic range image is also disclosed such that the compositing may be modified as a function of received user input. |
| US09589334B2 |
Automated tonal balancing
A system for automated tonal balancing, comprising a rectification server that groups and processes images for use in tone-matching and provides them to a tone-matching server, that then performs tone-matching operations on the images and provides them as output for review or storage, and methods for tonal balancing using the system of the invention. |
| US09589332B2 |
Camera movement correction apparatus, method and system
A camera movement correction apparatus for use in a system which detects the position of a sporting projectile within a scene, the apparatus comprising: an interface operable to receive a first and second image of the scene captured by a camera; a reference marker determiner operable to determine the position of a reference marker within the first and second image of the scene, the reference marker being static within the scene; a difference determination device operable to determine the difference between the position of the reference marker in the first and second image of the scene; and a corrective transformer operable to apply a corrective transform to the second image on the basis of said determined difference. |
| US09589331B2 |
Method and apparatus for determining a detection of a defective object in an image sequence as a misdetection
Results of automatic detection of dirt or other non-steady defects in a sequence of digitized image frames can be unreliable. Here, a determination of a detection of a defective object to be replaced by a replacement pattern in a frame of a sequence of image frames as a misdetection is presented that comprises determining a value of a first similarity measure between a boundary of the detected defective object and a boundary of the replacement pattern and determining a value of a second similarity measure between the detected defective object and the replacement pattern. The detection of the defective object is determined as a misdetection if at least one of the following holds true: the value of the first similarity measure is outside of a corresponding first similarity acceptance range and the value of the second similarity measure is inside of a corresponding second similarity acceptance range. |
| US09589323B1 |
Super resolution image enhancement technique
A method for image enhancement may include selecting a plurality of patches of an image and determining at least one dimensionally reduced feature for each of the plurality of patches. The system may further determine a generally closest cluster from a set of clusters for each of the dimensionally reduced features and select a corresponding set of regression coefficients for each of the set of generally closest cluster. The system may also apply the selected set of regression coefficients to a corresponding patch to enhance the image. |
| US09589322B2 |
Identifying regions characterized by labeled measurements
Briefly, the disclosure describes embodiments of methods or apparatuses for processing, such as smoothing, a set of labeled measurements at a variety of scale levels. In one or more non-limiting embodiments purely for illustrative purposes, relatively fine details of labeled measurements may be displayed utilizing a relatively low-scale map, such as a map showing individual towns and/or villages. For display utilizing a relatively higher scale map, such as a map showing larger geopolitical areas, for example, relatively fine details may be omitted. |
| US09589316B1 |
Bi-directional morphing of two-dimensional screen-space projections
Described herein are technologies that facilitate computationally low-intensity creation of additional frames in a sequence of frames created by real-time three-dimensional (3D) rendering. More particularly, the technologies described herein generate an interposed two-dimensional (2D) screen-space projection (e.g., the resulting rendered image) in between a pair of fully rendered surrounding frames in a sequence of rendered frames. The interposed 2D screen-space projection is generated based upon information derived from the pair of surrounding frames. |
| US09589314B2 |
Query processing for tile-based renderers
Systems, methods, and apparatus for performing queries in a graphics processing system are disclosed. These systems, methods, and apparatus may be configured to read a running counter at the start of the query to determine a start value, wherein the running counter counts discrete graphical entities, read the running counter at the end of the query to determine an end value, and subtract the start value from the end value to determine a result. |
| US09589312B2 |
Exploiting frame-to-frame coherence for optimizing color buffer clear performance in graphics processing units
A mechanism is described for dynamically optimizing color buffer clear performance in graphics processing units. A method of embodiments, as described herein, includes allocating and initializing a first set of control bits associated with a framebuffer in a graphics processing unit (GPU), and rendering a first frame, wherein the first set of control bits are associated with the first frame. The method may further include allocating a second set of control bits associated with a second frame, and rendering the second frame. The method may further include facilitating an expedited resolve operation of the second frame based on a frame-to-frame coherence associated with the first and second frames. |
| US09589307B2 |
Method of selling absorbent articles bearing similar and/or related graphics
A method of selling absorbent articles wherein the absorbent articles are co-packaged sets of absorbent articles bearing similar and/or related graphics. |
| US09589304B2 |
Method and system of providing social network services associated with management of personal connections and off-line activity by applying life cycle concept of creature
Provided are method and system of providing a social network service (SNS) in which life cycle concepts of creatures are a motif. Particularly, user's personal connection information and relationships between users are separately expressed as a structure of a creature made in a graphic, and a non-disclosure information portion for private use and a disclosure information portion for public use are clearly divided. |
| US09589302B2 |
System and method for selectively displaying market information related to a plurality of tradeable objects
A graphical interface and method are provided for selectively displaying market information corresponding to a plurality of tradeable objects. According to one example method, a scanning feature is provided in relation to a number of tradeable object indicators. Upon detecting a predefined movement of a user input device in relation to the plurality of indicators, a graphical interface dynamically displays market information corresponding to the tradeable objects as a predefined movement of the user input device is detected in relation to the tradeable object indicators. |
| US09589295B2 |
Purchasing systems and methods
Example purchasing systems and methods are described. In one implementation, a method identifies a purchase request that includes a first item to purchase from a first merchant and a second item to purchase from a second merchant. A first virtual machine is invoked and executes an instance of a browser application to purchase the first item from the first merchant. A second virtual machine is invoked and executes another instance of the browser application to purchase the second item from the second merchant. The method receives a first purchase confirmation from the first merchant and receives a second purchase confirmation from the second merchant. |
| US09589293B1 |
Cataloging items and relationships between items
Techniques for cataloging items and relationships between items may be provided. For example, a computing service may be implemented to generate a description of an item and to determine a relationship between the item and another item. In addition to cataloging the description of the item, the computing service may also catalog the relationship. For example, the catalog service may generate a catalog page that may include a number of fields. Some of the fields may be used to capture the description of the item, while other fields may be used to identify the other item and a relationship type. Further, in response to a search for the item, the catalog service may return information about the item and, based on the cataloged relationship, information about the other item. |
| US09589290B1 |
Client-side use of customer preferences
This disclosure describes, in part, techniques for collecting item preferences of users at a centralized location and propagating these item preferences to users and merchants in an intelligent manner. In some instances, the centralized location is a payment service that functions to both authorize payment instruments of users for costs of transactions conducted at the merchant, and collect and propagate the item preferences to the merchants and the users. |
| US09589288B2 |
Tracking effectiveness of remote sales assistance using augmented reality device
A computer-implemented method is disclosed herein. The method includes the step of providing, with a processing device of a commerce server, sales assistance to a consumer shopping in a retail store and considering a first item for purchase. The method also includes the step of receiving, at the processing device, a receipt signal containing a list of items purchased by the consumer. The method also includes the step of determining, with the processing device, if the first item is among the list of items purchased by the consumer to track the effectiveness of the providing step. |
| US09589286B2 |
Business event processing
In one example, an apparatus comprises processors to execute a business event processing module. The module is configured to receive a request to perform an operation on a first listing in a set of listings and identify, in the set of listings, additional listings having certain characteristics in common with the first listing. The operation is automatically performed on the additional listings and a performance of the operation on a last instance of the additional listings is determined by a last event processor. |
| US09589280B2 |
Matching anonymized user identifiers across differently anonymized data sets
Provided is a process of obtaining a plurality of location data sets from different providers of user geolocation history, each location data set including a plurality of user-activity records, each user-activity records being associated with a user identifier and including geolocations of the corresponding user and times that the corresponding user was at the geolocations, the different providers having different user identifiers for a given corresponding user; matching, by one or more processors, the user identifiers between the location data sets based on geolocations of the corresponding user and times that the corresponding user was at the geolocations; and storing the matched user identifiers in association with one another in corresponding user profiles. |
| US09589276B2 |
System and method for card-linked services
A system and method are disclosed for providing a promotion associated with a transaction account. Advertising targeting criteria to target at least one person to receive a respective advertisement for the promotion is submitted to a computing device associated with a data management platform. Viewer information associated with at least one person targeted to receive the respective advertisement is received and processed to assess a value of the at least one person. Thereafter, a bid value that is representative of the assessed value and associated with presenting the respective advertisement is transmitted to a computing device associated with an advertisement exchange. An acceptance of the promotion is received, and the promotion information is processed to associate the promotion with the transaction account. |
| US09589271B2 |
Systems and methods for determining ad impression utility
Various systems and methods for measuring ad impression effectiveness are provided. A method is provided comprising selecting, by an ad impression processor, a target consumer for an ad impression, delivering the ad impression to the target consumer, determining, by the processor, a behavior of the target consumer after a time period elapses, wherein the determining comprises analyzing internal data relating to the target consumer. |
| US09589269B2 |
Cardless payment transactions
A method that includes obtaining a current location of a mobile device of a customer; sending the current location to a cardless payment system; determining whether to send, to the cardless payment system, an indication of consent to perform a cardless payment transaction with the merchant; displaying on the mobile device whether the merchant is authorized to perform a cardless payment transaction with the customer. |
| US09589266B2 |
Restricted-use account payment administration apparatuses, methods and systems
The RESTRICTED-USE ACCOUNT PAYMENT ADMINISTRATION APPARATUSES, METHODS AND SYSTEMS (hereinafter “RUAP”) transform purchase item information inputs or purchase receipt inputs via RUAP components into restricted-use account payment settlement outputs. A method is disclosed, including: receiving a restricted-use account reimbursement request including receipt information related to a purchase transaction from a user; obtaining purchase item information from the receipt information included in the restricted-use account reimbursement request; identifying a restricted-use account of the user; determining a purchase item is eligible for the restricted-account usage; determining a reimbursement amount associated with the purchase item form the purchase item information; generating a reimbursement authorization request message including the purchase item information and the reimbursement amount; transmitting the reimbursement authorization request message to a restricted-account issuer for approval; and transacting the reimbursement amount from the restricted-use account to a user financial account upon the restricted-account issuer approval. |
| US09589263B2 |
Automatic payment code display system
Automatic payment code display systems and methods include a user device detecting a beacon system at a physical merchant location. The user device establishes a background communication process with the beacon system that occurs without user intervention subsequent to detecting the beacon system. The user device then provides the user account authentication token to the beacon system as part of the background communication process. The user device then receives a payment code from the beacon system as part of the background communication process. The user device then causes the payment code to be displayed, and the displayed payment code is configured to be utilized by a payment processing device at the physical merchant location in a payment transaction. The payment code may be caused to be displayed on a lock screen in a background display process that occurs without user intervention. |
| US09589261B2 |
Remote revocation of application access based on non-co-location of a transaction vehicle and a mobile device
Embodiments of the invention relate to an invention for accessing a remotely located mobile device of a user based on certain events is provided. The system, method, and computer program product are configured to: (a) monitor one or more transaction involving a transaction vehicle of a user; (b) determine a physical location of a transaction vehicle based at least partially on the one or more transactions; (c) determine a geographic location of a mobile device of the user, wherein the mobile device is associated with the transaction vehicle; (d) determine whether or not the transaction vehicle of the user and the mobile device of the user are co-located; and (e) reconfigure one or more applications accessible to the mobile device or one or more functional features of the mobile device based at least partially on determining that the mobile device and the transaction vehicle of the user are not co-located. |
| US09589260B2 |
System and method for authenticating electronic money using a smart card and a communication terminal
The present invention relates to a system and a method for authenticating an electronic money using a smart card and a communication terminal. The present invention provides a system and a method for authenticating an electronic money, wherein the system comprises a smart card and a communication terminal. The smart card takes biometric signature from a user as an input, transmits recognition completion information to the communication terminal when the biometric signature inputted by the user matches the stored biometric signature, receives an update command from the communication terminal, updates the amount of stored balance data, and transmits an update completion message to the communication terminal. The communication terminal is connected to the smart card in a wired or wireless manner, and transmits the update command to the smart card upon receipt of the recognition completion information. |
| US09589259B2 |
Location based system and method for calculating sales and use tax
Methods and systems for a location based system and method for calculating sales and use tax for non-traditional points of sale. The methods and systems include a mobile application, a non-transitory computer readable medium for calculating sales and use tax for businesses that do not have a human readable address. |
| US09589258B2 |
Enforcing time-out periods in payment-enabled mobile device
A mobile device includes a housing and an antenna mounted in or on the housing for exchanging transaction signals with a point-of-sale (POS) terminal. The mobile device also includes a user interface element, a transceiver coupled to the antenna, and a secure element including processing circuitry and a secure tick counter. The secure element stores a payment application operable to conduct a pre-sign procedure selected by a user before interfacing with a point-of-sale (POS) terminal. The processing circuitry verifies the user, obtains a first tick value, sets the mobile device into a transaction-enabled state, obtains, when the transceiver is interfaced with a POS terminal, a current tick value from the secure tick counter, calculates a difference value between the current tick value and the first tick value, and enforces a risk management decision. |
| US09589255B1 |
Collaborative media capture and sharing system
A system that enables a group to collaborate to capture and share media for an event. An organizer defines the time and location of an event, which establishes a geofence around the event area. Each event participant uses a mobile application that coordinates communication and sharing. The participants' devices form a mesh network with peer-to-peer links, for example over Bluetooth or Wi-Fi. Media, such as photos or videos, captured by a participant are shared over the mesh network. To accommodate low bandwidth peer-to-peer links, reduced-size media, such as thumbnails, may be shared. Participants may exchange messages and update peers on their locations. Locations may be determined using GPS, or by correlating camera images and 3D sensor data with a model of the event area. Media may be uploaded to a server and curated to form integrated media records of the event, such as a highlight reel or news feed. |
| US09589250B2 |
System and method for asset registration workflows utilizing an eventing infrastructure in a metadata repository
Described herein is a system and method for automating asset workflows in a service metadata repository. A service metadata repository includes an event model for generating one or more events based on a change to one or more assets. A persistent message stores the one or more events. A subscription service provides the ability to subscribe to one or more events and register one or more subscribed web service endpoints where the one or more events will be delivered. A delivery service matches the one or more events to the one or more web service endpoint and delivers the one or more events to a notification service. A notification service notifies the one or more subscribed web service endpoints of the one or more events. One or more workflows automate asset registration based on rules configured in an XML file, wherein the one or more workflows are initiated upon receiving the one or more events at a subscribed web service endpoint. |
| US09589249B1 |
Access authentication and/or item process management using identification codes
Methods and systems using unique item identifiers and a wireless device to (a) authenticate authorization to take possession of an item and (b) specifying and/or tracking service processing of the item. |
| US09589248B2 |
Information processing apparatus, consumables stock management system, consumables stock managing method, consumables stock managing program, and memory medium
A frequency of a residual amount signal which includes the absence of consumables and is issued by a printing apparatus is analyzed, whether new consumables have been attached or not is properly discriminated, and proper stock management is made. |
| US09589246B2 |
Marking the surface of metal coils with material property data
A marking system for a rolled metal coil to provide markings containing data about material properties within the metal proximate the markings. The material property data may be used for allocating blanks from the coil for different vehicle body stampings. A monitoring device may be configured to provide material property data of metal during formation of a coil. A marking device may be configured to provide a 2D-matrix as the marking on a surface of the coil. A controller may be programmed to, in response to receiving the data, utilize the marking device to provide the 2D-matrix containing the material property data on the coil proximate a location of the material property. The 2D-matrix may also allow for the traceability of a finished part back to the coil it was blanked and subsequently formed from. |
| US09589244B2 |
Request process optimization and management
A method of optimizing and managing processes for responding to requests (such as claims for benefits, or insurance applications) includes creating a process definition, performing an optimization of a resource employed for the process, and developing recommendations for process design or execution based on the simulation and optimization. In some cases, the resource being optimized is staffing. In some cases, the requests relate to acquisition of health insurance or governmental program services (for example, health insurance exchanges, benefit eligibility, Medicaid enrollment). The optimization may be non-deterministic and consider uncertainty factors. In some cases, a staffing level is estimated based on the optimization. |
| US09589242B2 |
Integrating custom policy rules with policy validation process
A system is provided for integrating custom policy rules with a policy validation process for validating forms within an organization. The system may enable the organization to create new policy rules and to customize existing policy rules for forms according to various specifications. The custom policy rules may be stored in policy database and the policy validation process may be applied to validate submitted forms against the custom policy rules for identifying policy rule violations. The system may automatically apply the policy validation process upon the submission of a form to the organization for identifying violations before posting the form to the organization's system. The system may generate a policy violation results list, and may provide a display message for indicating when policy violations have been identified in the submitted form, and may also present options to the user for addressing the policy violation and approving the form. |
| US09589240B2 |
System and method for flexible chaining of distinct workflow task instances in a business process execution language workflow
Systems and methods are described for providing task chaining as part of modeling a business process (e.g. a BPEL process). Chained tasks maintain a reference to the previous task and during retrieval of that task, the system can append relevant information, including but not limited to task history, attachments and comments of the previous task. Task chaining can be enabled by selecting a previously completed task and marking that the current task chains the selected task. In one embodiment, tasks are chained across multiple instances of a process. Accordingly, tasks in different processes can be chained together to obtain access to the same context information and other data. |
| US09589239B2 |
Recommending alternatives for providing a service
In certain embodiments, one or more current service elements that can provide a service for a client are monitored. An event associated with a current service element is detected. One or more candidate service elements are analyzed with respect to the one or more current service elements operating for the client. The one or more candidate service elements operate in a client scenario corresponding to the client. A recommendation is provided in response to the analysis. |
| US09589236B1 |
High fidelity and high efficiency qubit readout scheme
A technique relates to a qubit readout system. A cavity-qubit system has a qubit and a readout resonator and outputs a readout signal. A lossless superconducting circulator is configured to receive the microwave readout signal from the cavity-qubit system and transmit the microwave readout signal according to a rotation. A quantum limited directional amplifier amplifies the readout signal. A directional coupler is connected to and biases the amplifier to set a working point. A microwave bandpass filter transmits in a microwave frequency band by passing the readout signal while blocking electromagnetic radiation outside of the microwave frequency band. A low-loss infrared filter has a distributed Bragg reflector integrated into a transmission line. The low-loss filter is configured to block infrared electromagnetic radiation while passing the microwave readout signal. The low-loss infrared filter is connected to the microwave bandpass filter to receive input of the microwave readout signal. |
| US09589235B2 |
Method for measuring individual entities' infectivity and susceptibility in contagion
Measurements of individual-level infectivity, susceptibility and baseline infection risk to biological or social contagion and sensitivity to environmental factors are made for large number of entities from their contact relation, sequential infection occurrences and environmental factors, using computer implemented Markov Chain Monte Carlo and likelihood maximization for Bayesian estimations of an integrated latent trait response model. The method is useful for precise and efficient contagion control and prevention. |
| US09589233B2 |
Automatic recognition and insights of data
Automatic recognition and presentation of insights of data is provided through analysis of overall data to infer locations of a user's data. Statistical, heuristic, and comparable analysis on the user's data sets is used to determine insights such as trends, correlations, outliers, comparisons, and patterns. The insights are then presented to the user through automatically optimized visualizations (highlighting determined insights), emphasis on presented raw data, data formatting suggestions, and similar ones with the capability to explore further. |
| US09589227B2 |
Method and apparatus for identifying a product
The present invention relates to a method and a corresponding apparatus for identifying a product (1) or information relating to the product (1). In the method, a concealed code on the product (1) is identified, wherein the code is given by a set of ellipsometric parameters, and the method comprises the following steps of: measuring ellipsometric variables for at least one defined point (8) on a surface (9) of the product (1), comparing the measured ellipsometric variables with at least one reference code, and determining a match between the measured ellipsometric variables and the reference code or one of the reference codes or determining a mismatch with each reference code. |
| US09589224B2 |
Passive RFID tags with integrated circuits using sub-threshold technology
Systems and methods for operating an RFID transponder (102). The methods involve: performing energy harvesting operations by a voltage scavenging device (130) of the RFID transponder to collect energy from an RF field, magnetic field, heat, light or movement of the RFID transponder; increasing or decreasing, by a voltage converter of the RFID transponder, a voltage level of a signal received from the voltage scavenging device to a sub-threshold voltage level that is at least one order of magnitude below a normal operating range for the RFID transponder; and supplying an operating voltage at the sub-threshold voltage level to at least a transceiver circuit (124) of the RFID transponder. |
| US09589221B2 |
Method of operating smart card and method of operating smart card system including the same
A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed. |
| US09589218B2 |
Method and apparatus for the remote supply, display and/or presentation of dynamic informative contents
Method for the remote supply, display and/or presentation of dynamic informative contents by generating a QR code with a dynamic content, which provides to define a quantity n of a series of QR codes to be generated, to generate x URL addresses on the Internet, until x=n, to verify the univocity of each of the x URL addresses generated, by comparing them with a list of URL addresses, to generate n QR codes, each encoding the x=n URL addresses generated and verified as univocal, to assign a generated and univocal URL address to a specific accredited service user in a form that can be loaded and modified dynamically, to configure the generated and assigned URL address in order to display the informative contents, to optically acquire the QR code and to decode the encoded URL address, directing the user to the informative contents of the URL address. |
| US09589217B2 |
Augmenting barcodes with secondary encoding for anti-counterfeiting
A system generates a secure barcode by: identifying a primary pattern for a two-dimensional barcode to be printed on a substrate, wherein the primary pattern comprises of a set of dark cells and a set of light cells; identifying a two-dimensional micro-shape, wherein the micro-shape has a size that is no larger than a size of each cell of the two-dimensional barcode; generating a secondary pattern comprising a plurality of the micro-shapes; and superimposing the secondary pattern with the primary pattern for the two-dimensional barcode to yield a secure barcode. The resulting two-dimensional barcode includes a primary pattern comprising a set of dark cells and a set of light cells, where the sets represent encoded data, along with a secondary pattern of micro-shapes that are superimposed with the primary pattern. |
| US09589216B2 |
Information processing apparatus, distributed printing system, and method of controlling printing
The necessity of a printer object is determined based on data to be printed, and in a case where the data type is such that a conversion to a printer language is necessary, a printer object is dynamically generated. With this, a distributed printing system that does not use resource pointlessly and for which efficient scaling out is possible can be realized. |
| US09589215B2 |
Image forming apparatus capable of properly reproducing desired settings, method of controlling the same, and storage medium
An image forming apparatus capable of properly reproducing, even when a setting operation is interrupted by a cause unintended by a user, settings desired by the user, and thereby improving the user-friendliness. In a case where a cause of interruption of a job setting operation is generated at a timing other than a predetermined timing, information on the displayed screen and information on the job settings are stored. When the cause of interruption has been removed, the stored screen information and information on job settings are read out, and the interrupted state of the job setting operation is reproduced. |
| US09589213B2 |
Apparatus for recognizing turnoff from vehicle roadway
An apparatus for determining the presence or absence of a turnoff from a roadway. In the apparatus, a white-line candidate extractor applies image processing to an image of surroundings of a subject vehicle acquired by a vehicle-mounted camera to extract white-line candidates in the roadway. A white-line likelihood calculator calculates, for each of the white-line candidates extracted by the white-line candidate extractor, a likelihood of the white-line candidate. A white-line likelihood calculator calculates, for each of the white-line candidates extracted by the white-line candidate extractor, a likelihood of the white-line candidate. A turnoff determiner calculates a likelihood for one of a plurality of features of the white line selected by the white-line selector, and determines the presence or absence of a turnoff from the roadway based on the likelihood calculated by the turnoff determiner. |
| US09589206B2 |
Optimizing an image filter
A system may receive filter coefficients defining a digital filter. The system may select a signal processing quality criterion which describes a transformation that can be derived from an image and further describes the reconstruction of the image that can be derived from the transformation. The system may determine a degree of optimization that quantifies the signal processing quality criterion with the received filter coefficients. The system may vary the filter coefficients to obtain varied filter coefficients. The system may establish the degree of optimization with the varied filter coefficients. The system may compare the determined degree of optimization with the established degree of optimization. |
| US09589204B2 |
Quantification of a characteristic of a lumen of a tubular structure
A method includes generating, based on a distance map, a signal indicative of a quantification of a characteristic of a lumen of a tubular structure of interest over a pre-determined extent of the tubular structure of interest represented in volumetric imaging data. A system includes a quantifying component (216) that generates, based on a distance map, a signal indicative of a quantification of characteristic of a lumen of a tubular structure of interest over a pre-determined extent of the tubular structure of interest represented in volumetric imaging data. A method includes identifying voxels of 3D segmented imaging data that represent tubular structure of interest, determining distances between the identified voxels and nearest voxels corresponding to other structure in a plurality of 2D slices of the segment imaging data, representing the voxels with intensity values that are proportional to the distances, and generating a signal indicative of a 3D distance map based on the intensity values. |
| US09589203B2 |
Action based activity determination system and method
A processor implemented system and method for identification of an activity performed by a subject based on sensor data analysis is described herein. In an implementation, the method includes capturing movements of the subject in real-time using a sensing device. At least one action associated with the subject is ascertained from a predefined set of actions. From the predefined set of actions, a plurality of actions can collectively form at least one activity. The ascertaining is based on captured movements of the subject and at least one predefined action rule. The at least one action rule is based on context-free grammar (CFG) and is indicative of a sequence of actions for occurrence of the at least one activity. Further, a current activity performed by the subject is dynamically determined, based on the at least one action and an immediately preceding activity, using a non-deterministic push-down automata (NPDA) state machine. |
| US09589200B2 |
Handwriting input conversion apparatus, computer-readable medium, and conversion method
A conversion apparatus is disclosed, including: a storage unit; and a processor configured to perform a conversion process. In the conversion process, a handwriting input for a specific position in a text is received. Conversion candidates for the handwriting input is generated based on context information acquired by analyzing before, after, or around the specific position of the text. |
| US09589197B2 |
Method for biometric recognition with clustering of registered data for POS/ATM applications
A method quickly recognizes a person by identification codes derivable from biometric data includes registering a user, and recognizing a registered user, through a respective recognition event. Each registration event includes acquiring at least one biometric datum related to blood vessels of the user. The acquired biometric datum is encoded into a respective registration identification code and associated with the user. The user and the associated registration identification code are registered. Each recognition event includes acquiring biometric datum related to the user's blood vessels and encoding the acquired biometric datum into a respective recognition identification code. Based on the registered registration identification codes, a comparison set of comparison identification codes is prepared and compared. For each comparison, a matching level is estimated and the user is recognized or refused recognition based on the estimated matching levels. |
| US09589191B2 |
Method for evaluating a plurality of time-offset pictures, device for evaluating pictures, and monitoring system
The invention relates to a method for evaluating a plurality of chronologically staggered images, said method comprising the following steps: detecting a plurality of objects in a first image and storing each of the plurality of objects as tracks with a first capture time and/or a first capture location, preferably in a track list, detecting a plurality of objects in further images and identifying each of the detected objects as an object assigned to the respective stored track, wherein the respective track is updated by the current position of the identified object and, in the respective further images, objects detected for the first time are stored with assigned tracks, and wherein a covered path length, a distance and/or a time difference from the first capture time is determined as a capture period for each of the objects or tracks, wherein the path length, the distance and/or the capture period are compared with a respective predefined threshold value, and wherein the objects or tracks are classified according to the result of the comparison as objects or tracks to be taken into consideration or as objects or tracks not to be taken into consideration, wherein a number of stored tracks is determined for at least one of the images. |
| US09589189B2 |
Device for mapping physical world with virtual information
A device is configured to determine a geographic location of a user device and determine, based on the geographic location of the user device, that the user device is within a threshold distance of a structure that includes a quantity of objects. The device is configured to receive, from the user device, an image of an object of the quantity of objects, and analyze, based on receiving the image of the object and based on the user device being within the threshold distance of the structure, the image to identify the object. The device is configured to receive user information associated with the user device, determine, based on the user information, object information associated with the object; and provide the object information for display on the user device. |
| US09589186B2 |
Iris recognition apparatus and operating method thereof
An iris recognition apparatus for recognizing iris in an eyeball is provided. In particular, an iris recognition apparatus including a reflection unit that reflects and transmits an image of an eyeball is provided. The reflection unit reflects and transmits an image of an eyeball. A first image collection unit collects a reflected image. A control unit extracts an iris pattern based on the collected image. |
| US09589183B2 |
System and method for identification and extraction of data
A system and method of for describing target data as a sequence of pattern elements and pattern element groups that comprise an overall target pattern is described. Pattern elements may utilize regular expression syntax along with other metadata that describe the behavior of the element. A pattern element group may be a collection of fully defined pattern elements where at least one pattern element from the group must have a match for the overall pattern to match. Patterns contain both pattern elements and pattern element groups. The general process involves first performing optical character recognition (OCR) on the document, which in turn produces a sequence of text tokens representing the lines of text on each page of the document. The search algorithm may then apply each defined pattern to the entire document capturing and/or extracting data that match each pattern's required elements and element groups. |
| US09589182B2 |
Method and apparatus for estimating orientation of body, and computer readable storage medium of recording the method
A method of estimating an orientation of a body is provided. The method includes determining a reference point based on a first region of a body, calculating a translation matrix of a world coordinate system based on the reference point; determining a first vector based on the reference point and a second region of the body, calculating a first rotation matrix rotated by an angle α about a first rotation vector, which is perpendicular to the first vector and a Z-axis of the world coordinate system, as a first rotation axis, determining a second vector based on the first vector and a third region of the body, calculating a second rotation matrix rotated by an angle β about the Z-axis of the world coordinate system as a second rotation axis, and calculating a transformation matrix based on the translation matrix, the first rotation matrix, and the second rotation matrix. |
| US09589181B2 |
Person search method and device for searching person staying on platform
Provided is a suspicious person detection method. First, a normal similar facial image search is carried out. Next, facial images, which are detected automatically from the input images and specified manually, are specified to be determined. Next, similar faces are searched for limited time on a time axis on the database. Next, the number of search results that distance between the features is lower than predetermined value is calculated and it is determined that the number of appearances is large and a possibility of a prowling person is high if the number of cases is large, and otherwise a possibility of prowling person is low. Last, a similarity between a facial image of a pre-registered residents and a facial image of a person whose number is large is calculated, and it is re-determined that the person is residents if the similarity is high, regardless of the determination. |
| US09589180B2 |
Methods and systems for detecting biometric characteristics in an image
A method for detecting biometric characteristics in a captured biometric data image is provided that includes determining, by a processor, an approximate location for a biometric characteristic in a frame included in captured biometric data, and determining region of interest positions over the frame. Moreover, the method includes calculating a set of feature values for each position, generating a displacement for each set of feature values and generating a median displacement, and adjusting the biometric characteristic location by the median displacement. |
| US09589171B1 |
Method and device for detecting if a finger is present and sensing a fingerprint pattern
The present invention relates to a method of sensing a fingerprint pattern of a finger using a fingerprint sensing device comprising an array of sensing elements; an electrically conductive finger detecting structure; and finger detecting circuitry connected to the finger detecting structure for providing a finger detection signal indicative of a capacitive coupling between the finger detecting structure and the finger. The method comprises the steps of: comparing the finger detection signal with a first threshold value indicating a first capacitive coupling, and a second threshold value indicating a second capacitive coupling stronger than the first capacitive coupling; and activating at least a subset of the sensing elements when the finger detection signal changes from a first value indicating a capacitive coupling weaker than the first capacitive coupling to a second value indicating a capacitive coupling stronger than the second capacitive coupling. |
| US09589164B2 |
Distinctive notice for different symbology information
An indicia reader is adapted for hand held operation to read information bearing indicia (IBI) at a point of transaction (POT) and is operated by: configuring the indicia reader in a store to provide at least one store specific indicia read notice; reading an IBI at a POT with the indicia reader and providing the at least one store specific indicia read notice to a customer when each IBI is read. |
| US09589155B2 |
Technologies for verifying components
Technologies for verifying hardware components of a computing device include retrieving platform identification data of the computing device, wherein the platform identification data is indicative of one or more reference hardware components of the computing device, accessing hardware component identification data from one or more dual-headed identification devices of the computing device, and comparing the platform identification data to the hardware component identification data to determine whether a hardware component of the computing device has been modified. Each of the one or more dual-headed identification devices is secured to a corresponding hardware component of the computing device, includes identification data indicative of an identity of the corresponding hardware component of the computing device, and is capable of wired and wireless communication. |
| US09589154B2 |
Programming on-chip non-volatile memory in a secure processor using a sequence number
An improved secure programming technique involves reducing the size of bits programmed in on-chip secret non-volatile memory, at the same time enabling the typical secure applications supported by secure devices. A technique for secure programming involves de-coupling chip manufacture from the later process of connecting to ticket servers to obtain tickets. A method according to the technique may involve sending a (manufacturing) server signed certificate from the device prior to any communication to receive tickets. A device according to the technique may include chip-internal non-volatile memory to store the certificate along with the private key, in the manufacturing process. |
| US09589150B2 |
Managing confidential information
Embodiments of the present application relate to a method, apparatus, and system for managing confidential information. The method includes accessing stored target information comprising a public part and a confidential part, wherein an identifier corresponds to the confidential part of the target information, outputting the public part of the target information and the corresponding identifier, wherein the public part of the target information comprises at least first address information, receiving location information and a to-be-recognized identifier, wherein the location information is associated with a current location of a mobile terminal, determining whether the location information is consistent with the first address information, and in the event that the location information is consistent with the first address information, sending the confidential part of the target information associated with the to-be-recognized identifier to the mobile terminal. |
| US09589147B2 |
Steganography detection
Systems and methods for detecting potential steganography use to hide content in computer files transmitted via electronic communications are provided. An electronic communication associated with a computer file may be identified. The communication and the computer file may be analyzed to determine whether the computer file potentially includes hidden content. To determine whether the computer file potentially includes hidden content, a set of steganographic criteria may be analyzed. If at least a portion of the steganographic criteria are satisfied, then it may be determined that the computer file potentially includes hidden content. If at least a portion of the steganographic criteria are not satisfied, then it may be determined that the computer file does not potentially include hidden content. If the computer file is determined to potentially include hidden content, an individual may be notified of the communication associated with the computer file. |
| US09589138B2 |
Computing device boot software authentication
Various embodiments are generally directed to authenticating a chain of components of boot software of a computing device. An apparatus comprises a processor circuit and storage storing an initial boot software component comprising instructions operative on the processor circuit to select a first set of boot software components of multiple sets of boot software components, each set of boot software components defines a pathway that branches from the initial boot software component and that rejoins at a latter boot software component; authenticate a first boot software component of the first set of boot software components; and execute a sequence of instructions of the first boot software component to authenticate a second boot software component of the first set of boot software components to form a chain of authentication through a first pathway defined by the first set of boot software components. Other embodiments are described and claimed herein. |
| US09589136B2 |
Method and device for extracting message format
Examples of extracting a message format are disclosed. Extracting the message format may include capturing an execution trace of a malicious program client and identifying and analyzing a processing procedure of a message in the execution trace. An input message format is identified based on the analysis, where the input message format is of a communication protocol used by a malicious program. The examples of identifying the message format provide increase extraction efficiency, accurate analysis and positioning, and a reduced rate of false positives. |
| US09589135B1 |
Exploit detection of malware and malware families
According to one embodiment, a computerized method comprises, accessing information associated with one or more observed events, wherein one or more of the observed events constitutes an anomalous behavior; accessing a reference model based on a first plurality of events, the reference model comprises a first event of the first plurality of events, a second event of the first plurality of events and a relationship that identifies that the second event of the first plurality of events is based on the first event of the first plurality of events, wherein at least one of the first event and the second event constitutes an anomalous behavior; and comparing the information associated with the one or more observed events with the reference model to determine whether at least one observed event of the one or more observed events matches at least one of the first event of the first plurality of events or the second event of the first plurality of events that constitutes the anomalous behavior is provided. |
| US09589131B2 |
Method and computer device to control software file downloads
A computer device includes a download unit which downloads one or more files into a storage device. A file logging unit records a resource locator identifying a source network location of the file, when the file is downloaded, and associates the resource locator with a first fingerprint of the file. A system policy unit stores the resource locator associated with a process control policy relevant to the file. A process control unit is arranged to obtain a second fingerprint of the file upon launching a process in a runtime execution environment, retrieve the resource locator from the file logging unit by matching the second fingerprint with the first fingerprint, retrieve the process control policy from the system policy unit according to the retrieved resource locator, and selectively apply process execution privileges which determine execution of the process in the runtime execution environment according to the retrieved process control policy. |
| US09589117B2 |
Computer security system and method
A computer security system comprises a security module adapted to control access to a secure computer resource by a user via a client based on verification of a security credential provided by the user. The computer security system also comprises verification data disposed on the client and accessible by the security module. The security module is adapted to enable the user to recover the security credential based on a response received from the user associated with the verification data. |
| US09589116B2 |
Managing heterogeneous product features using a unified license manager
An information handling system includes a device, a controller, and a license manager subsystem. The controller is configured to determine whether the device has a license assigned and to communicate with the device pursuant to a uniform protocol. The communications include issuing a command to the device to provide an identification and a command to the device to activate itself. |
| US09589113B2 |
Method for using rights to contents
A method of using rights corresponding to broadcast contents in a terminal having a memory card attached thereto. The method according to one embodiment includes checking, by the terminal, whether or not rights corresponding to broadcast contents include a constraint for verifying an existence of the memory card and an existence of the rights within the memory card; and if the rights include the constraint, performing, by the terminal, a procedure for verifying the existence of the memory card and the existence of the rights within the memory card through an SRM Ping protocol, the performing the procedure for verifying including transmitting, from the terminal to the memory card, a request message, receiving, by the terminal, a response message, and continuing/initiating or stopping/not initiating a consumption of the rights. The constraint includes at least one of a synchronized element, a sync Threshold element, and a check Interval element. |
| US09589111B2 |
System for controlling the distribution and use of rendered digital works through watermarking
A trusted rendering system for use in a system for controlling the distribution and use of digital works. A trusted rendering system facilitates the protection of rendered digital works which have been rendered on a system which controls the distribution and use of digital works through the use of dynamically generated watermark information that is embedded in the rendered output. The watermark data typically provides information relating to the owner of the digital work, the rights associated with the rendered copy of the digital work and when and where the digital work was rendered. This information will typically aid in deterring or preventing unauthorized copying of the rendered work to be made. The system for controlling distribution and use of digital works provides for attaching persistent usage rights to a digital work. Digital works are transferred between repositories which are used to request and grant access to digital works. Such repositories are also coupled to credit servers which provide for payment of any fees incurred as a result of accessing a digital work. |
| US09589109B2 |
Code signing system and method
A code signing system and method is provided. The code signing system operates in conjunction with a signed software application having a digital signature and includes an application platform, an application programming interface (API), and a virtual machine. The API is configured to link the software application with the application platform. The virtual machine verifies the authenticity of the digital signature in order to control access to the API by the software application. |
| US09589106B2 |
Devices, systems, and methods for automated data collection
Embodiments disclosed herein relate to methods, devices, and computer systems thereof for automated data collection from a subject. In certain embodiments, one or more characteristics of a subject are sensed, and the subject is given a queue status indicator based on a comparison of the subject's one or more sensed characteristics with corresponding sensed characteristics from other subjects. In one embodiment, the subject is a healthcare worker and the system, methods, and devices are utilized to evaluate the overall health of the worker as part of the check-in process for work. |
| US09589101B2 |
Electronic methods and systems for microorganism characterization
Systems and methods to characterize one or more microorganisms or DNA fragments thereof are disclosed. Exemplary methods and systems use comparison of DNA sequencing information to information in one or more databases to characterize the one or more microorganism or DNA fragments thereof. Exemplary systems and methods can be used in a clinical setting to provide rapid analysis of microorganisms that may be a cause of infection. |
| US09589100B2 |
Method for determining the risk profile of neoplastic tissue
A method of computing the risk profile of a neoplastic tissue in a patient is disclosed. The method includes the steps of (a) processing a sample of tumor tissue or cancer cells from the patient in a form suitable for visualization and demarcation of cell nuclei, individually distinguishable centrosomes (iCTRs) and megacentrosomes (mCTRs) in a region of interest (ROI) defined by a plurality of cell nuclei; (b) determining the numbers of iCTRs and mCTRs associated with each cell nucleus in the ROI; (c) determining the volume of each iCTR and mCTR in the ROI; and (d) calculating one or more centrosome amplification scores (CASs) values for the sample based on steps (b) and (c), wherein the one or more CASs indicate the severity of centrosome amplification, the frequency of centrosome amplification, or both, and wherein the one or more scores provide a measure of a level of risk and/or a prognosis associated with the neoplastic tissue. |
| US09589099B2 |
Determination of gene expression levels of a cell type
Methods, systems, and compositions can determine gene expression level of a specified cell-type subpopulation by direct analysis of a cell mixture sample composed of multiple subpopulations of various cell-types without the need of prior separation of the component cell-type subpopulations. A target gene and a reference gene can be identified as being informative for a specific cell-type subpopulation when at least 50% of the gene's transcripts in the cell mixture are from the subpopulation. This relative expression level in the cell mixture of the informative target and reference genes can correlate to the relative expression when measured in the isolated subpopulation. Thus, a similar biomarker can be obtained without the difficult step of isolating the cells of the subpopulation. |
| US09589098B2 |
Simulated X-ray diffraction spectra for analysis of crystalline materials
Methods and computer programs to quantify defects in an experimentally synthesized material for use in a battery are provided. A method includes an operation for obtaining spectra of the experimentally synthesized material. Further, defected structures of a crystalline structure are created via simulation, and spectra of the defected structures are obtained via simulation. In another method operation, the spectra of the experimentally synthesized material is compared to the spectra of the defected structures obtained via simulation, and if the spectra of the experimentally synthesized material is substantially equal to the spectra of the defected structures obtained via simulation then the defects in the experimentally synthesized material are quantified according to the defects in the defected structures. |
| US09589096B1 |
Method and apparatus for integrating spice-based timing using sign-off path-based analysis
Methods and systems provide setup and generation of SPICE results for a set of timing path(s) and integration of SPICE simulation with static timing analysis (STA) path-based results generation. In an embodiment, a method may select a candidate set of timing paths, perform path based analysis (PBA) on the selected paths, generate SPICE results for the selected paths, and render the PBA and SPICE results in an integrated user interface to facilitate sign off based on annotated constraints and correlation between STA results and SPICE results. Methods and systems of the present disclosure find application in, among other things, timing signoff in an electronic design and verification process. |
| US09589093B2 |
Multilevel via placement with improved yield in dual damascene interconnection
A method of operating a computer system to improve via electromigration in an integrated circuit with multilevel interconnect. A method of operating a computer system to improve via electromigration in an integrated circuit with multilevel interconnect using via priority groups. |
| US09589089B2 |
Automating system on a chip customized design integration, specification, and verification through a single, integrated service
A user specified high level design selects a plurality of IP cores for placement in a customized system on a chip. A single integrated service automatically performs each of a design integration phase, specification phase, and verification phase for the user specified high level design to generate an integration file specifying stitching between a plurality of pins of each of the plurality of IP cores, a specification file specifying one or more characteristics of the customized system on a chip based on the user specified high level design, and a verification testbench for verification of the user specified high level design. |
| US09589087B2 |
Verification environments utilizing hardware description languages
The method includes identifying a register-transfer level design description for a design. The method further includes identifying one or more tests to perform on the register-transfer level design description. The method includes generating a table of commands from the one or more tests to perform on the register-transfer level design description. The method includes generating a register-transfer level design description from the table of commands for at least one of a set of components including: a test driver for the design, a monitor for the design, and a checker for the design, wherein the register-transfer level design description assigns commands in the generated table of commands to be performed by a corresponding component in the set of components. The method includes simulating the identified one or more tests utilizing the generated register-transfer level design descriptions for at least one of the test driver, the checker, and the monitor. |
| US09589085B1 |
Systems and methods for viewing analog simulation check violations in an electronic design automation framework
A system, method, and computer program product for viewing analog simulation check violations in an EDA framework. Embodiments combine input data tables into a single data table for each check type using SQL inner join operations, create a SQL view of the single data table to list individual check violations, and output the view for user inspection of the corresponding check violations. Embodiments normalize the input data tables to include details of circuit nodes, elements, and paths implicated in the check violations. Additional views combine views of different check types into unified summary tables. Embodiments create a second view to aggregate individual check violations that involve the same circuit objects over time, and output the second view. Output views are self-describing, to enable a single graphical user interface to operate across multiple simulator versions. Metadata tables describe data types presented in various view columns, and user interactions allowed therewith. |
| US09589083B2 |
Computer simulation of electromagnetic fields
A method and system is provided for solving for electromagnetic fields by approximating an electromagnetic function as a sum of basis functions multiplied by coefficients to be determined. The set of equations used to determine the coefficients results from taking derivatives of the action integral with respect to the coefficients (and/or other parameters) and setting the derivative equal to zero, thereby extremizing the action integral. |
| US09589078B2 |
Constructing three dimensional model using user equipment
A user equipment (UE) comprising a display, a visual input configured to capture motion or stop photography as visual data, a memory comprising instructions, and a processor coupled to the display, the input device, and the memory and configured to execute the instructions by receiving visual data from the visual input, determining a position of the feature relative to the UE if the visual data comprises a feature of a first area of a location, and generating a model of the first area of the location based on the position of the feature. The disclosure also includes a method comprising receiving data indicating a position of a feature of a location relative to a UE, and generating a model of the location based on the position of the feature. |
| US09589074B2 |
Multidimensional spatial searching for identifying duplicate crash dumps
A method of identifying duplicate crash dumps in a computer system may include receiving a first crash dump caused by an application crash, extracting a first function signature of a function that caused the first crash dump, and searching a datastore of crash dumps for function signatures that substantially match the first function signature. The searching may include performing an approximate string-match between each of the function signatures the first function signature and performing an exact string match between each of the function signatures and the first function signature. The searching may also include combining weighted results of the approximate string-match with weighted results of the exact string match to generate match scores for each of the function signatures, and identifying the function signatures that substantially match the first function signature based on the match scores. |
| US09589073B2 |
Systems and methods for keyword spotting using adaptive management of multiple pattern matching algorithms
Methods and systems for keyword spotting, i.e., for identifying textual phrases of interest in input data. The input data may be communication packets exchanged in a communication network. A keyword spotting system holds a dictionary (or dictionaries) of textual phrases for searching input data. The input data and the patterns are assigned to multiple different pattern matching algorithms. For example, a share of the traffic is handled by one algorithm and smaller traffic shares may be handled by the others. The system monitors the algorithms performance as they process the data to search for a match. The ratio of traffic splitting among the algorithms is dynamically reassigned or adjusted to maximize the overall performance. |
| US09589070B2 |
Method and system for updating a filter logic expression representing a boolean filter
A method for automatically updating a filter logic expression representing a Boolean filter comprising a plurality of search conditions is disclosed. The method includes receiving a first indication to remove a first search condition from a condition list comprising search conditions. Each search condition is associated with an identifier and the first search condition is associated with a first identifier, and the search conditions are listed in sequential order according to the associated identifier. In response to receiving the first indication, a second search condition associated with a second identifier that sequentially follows the first identifier is identified, and the second search condition is reassociated with a third identifier that immediately precedes the second identifier. A filter logic expression comprising a plurality of identifiers and operators and representing a Boolean filter is then modified by automatically replacing any reference to the second identifier with the third identifier. |
| US09589067B2 |
Converting electronic documents having visible objects
A method involves managing electronic documents (EDs). The method includes receiving a first request to convert an original ED including a visible object from a first format to a second format; extracting, in response to the first request, multiple attributes in the original ED specifying the visible object and required to restore the visible object in the first format; generating, by converting the original ED from the first format to the second format, a converted ED including rendering data of the visible object that is grammatically native to the second format and that is necessary to render the visible object from the second format; and embedding the attributes extracted from the original ED into metadata of the converted ED. |
| US09589062B2 |
Durable memento system
Durable memento system that enables the storage of data associated with mementos, which are objects that serve to provide a reminder of a person, place, thing, or an event. Embodiments are configured to store and recall data including but not limited to pictures, movies, sounds, text, or other information such as performance data indirectly associated with a memento such as but not limited to a keepsake, souvenir, gift, gift card, medal or award, tool or any combination thereof. One or more embodiments may include a visual and/or machine-readable and/or human-readable code to associate the data with the memento. The durable data may be stored remote from the memento, which prevents obsolescence by securing data robustly. This enables the data to be accessed years later even if the file formats or display technology for the data has changed by that time and even if the original memento has been lost. |
| US09589057B2 |
Filtering content on a role tailored workspace
A workspace display includes a plurality of different groups, each group including a plurality of different components. Each group corresponds to a task, set of tasks or topic of information related to a user's role. The particular components included in each group are user interface display elements that are each related to an item of content within the corresponding group. The workspace display has filter mechanisms that are actuated to filter the content displayed in the components on the workspace display. |
| US09589054B2 |
Method of interacting with web sites allowing commenting
Device implemented method interacts with a plurality of web sites using a predetermined key word to create a subset of the plurality of web sites. Which of the subset of the plurality of web sites allow placement of comments on a respective one of the subset of the plurality of web sites is determined creating a list of a plurality of commentable web sites containing the predetermined key word and which allow placement of comments. The list of the plurality of commentable web sites is supplied to a user. A plurality of steps, different for each commentable web site, to post the comments on each of the plurality of commentable web sites is determined and stored. The plurality of steps to post the comments on each of the plurality of commentable web sites is subsequently repeated, separately for each of the plurality of commentable web sites. |
| US09589052B2 |
Remote node for bi-directional digital audio data and control communications
A remote node for bi-directional digital audio data and control communications includes remote components including: a remote transceiver; a remote low-voltage power supply that provides power to the other remote node components; and a sub-system that derives a master clock signal from received digital audio data. The sub-system includes a phase-locked loop (PLL) that is locked to a PLL input signal and outputs a remote node clock signal, and a switch that selects the PLL input signal from the derived clock signal and the remote node clock signal. The remote node is enabled to receive over a two-wire communication network digital audio data and digital control signals, and to transmit over the network digital control signals. The remote power supply has an input that is configured to be coupled to the network to derive the power for the remote node from power coupled to the network by a host end. |
| US09589049B1 |
Correcting natural language processing annotators in a question answering system
An approach is provided to correct natural language processing (NLP) annotators. The approach operates by receiving a set of supporting text noted by a user in response to the user identifying an error to a user question in a question answering (QA) system. The set of supporting text includes one or more text passages from which a correct answer should have been generated by the QA system. The QA system generates one or more scored candidate corrections with each of the scored candidate corrections is based on the identified error and the set of supporting text. The user can then select one or more of the scored candidate corrections as a confirmed correction to the error. The confirmed corrections are then applied to a corpus that is utilized by the QA system when answering questions. |
| US09589048B2 |
Geolocation data analytics on multi-group populations of user computing devices
Provided is a process including: obtaining device identifiers of a population of user computing devices; obtaining groups of the users computing devices obtaining one or more places of interest; assigning user computing devices to either a treatment collection xor a control collection based on hash values of the device identifiers; directing application of the treatment according to the assignment; obtaining geolocations visited by the user computing devices; assigning the geolocations to either the treatment collection xor the control collection based on hash values of device identifiers associated with the geolocations; assigning the geolocations to one or more of the groups based on the device identifiers associated with the geolocations; and for each group, determining a respective amount of visits to at least some of the one or more places of interest attributable to the treatment based on the geolocation assignments. |
| US09589044B2 |
Tagging of electronic content
A method, system, and/or computer program product manages content tags of electronic postings. A first weighted tag is received from a first reader of an electronic posting that supports tagging by non-authors. The first weighted tag, which includes a first weight, comprises metadata that describes the electronic posting. A second weighted tag, which includes a second weight, is received from a second reader of the electronic posting. The first and second weights are summed to generate a summed weight of the first and second weighted tags. In response to the summed weight of the first and second weighted tags being less than a predefined value, the metadata is automatically prohibited from being displayed with the electronic posting. |
| US09589043B2 |
Unified context-aware content archive system
A unified context-aware content archive system allows enterprises to manage, enforce, monitor, moderate, and review business records associated with a variety of communication modalities. The system may store an information infoset derived or inferred from one or more documents representing communications according to the variety of communication modalities as interaction transcripts. An interaction transcript represents interactions between participants through the documents rather than the documents themselves allowing for derivation or inference of communication events, chronologies, and mappings to be stored in a common data structure. In one aspect, events correlation is provided between participants of communications that can be established by general time series analysis for the purposes of extracting meaningful statistics and interaction contexts and other characteristics of data. In another aspect, chronological mappings are provided of conversations between an established start and end time frame. |
| US09589039B2 |
Synchronization of metadata in a multi-threaded system
Synchronization of metadata structures in a multi-threaded system includes receiving, by a first thread of a processing device, a request for a metadata structure located in a first cache associated with an object, obtaining, by the first thread of the processing device, a synchronization mechanism associated with the first cache, holding, by the first thread of the processing device, the metadata structure associated with the object, receiving, by a second thread of the processing device, a request for the metadata structure in a second cache associated with the object, obtaining, by the second thread of the processing device, a synchronization mechanism associated with the second cache and informing the second thread of the processing device that the metadata structure associated with the object is not available. |
| US09589036B2 |
Query-level access to external petabyte-scale distributed file systems
A system to implement query-level access by a database engine to an external distributed file system by identifying a results file location of one or more results files on the external distributed file system, and storing the results file locations in external table files on the database engine for subsequent use during retrieval of data from the results files. The database engine serves to process queries where the query specifies the external table (which in turn references locations of the results files). Execution of the query streams data from the external distributed file system into the database engine. The data from the external distributed file system is not stored in the external table files on the database engine; rather, the external table files specify a location of code or operational directives which, when executed, streams results from the external distributed file system to at least one parallel query engine. |
| US09589035B2 |
Strategies for result set processing and presentation in search applications
In searching electronic documents, prior to executing a query, a reviewer indicates whether a result set of the query will be dynamic or static. The query is then executed on the electronic documents to obtain an original result set, which is provided to the reviewer through a user interface. Upon determining that one or more changes to one or more of the electronic documents have occurred, and if the result set is static, then the original result set continues to be provided to the reviewer without re-executing the query. If the result set is dynamic, then the query is re-executed on the electronic documents to obtain an updated result set, and the updated result set is provided to the reviewer through the user interface. The original result set may be associated with a search session and/or may be a random sample of the electronic documents for an overview query. |
| US09589032B1 |
Updating content pages with suggested search terms and search results
Asynchronous updating of content pages with suggested search terms and search results is performed by receiving at least one character from a search term user interface element is received and suggested search terms are generated. At least one search result associated with the at least one suggested search term is retrieved from an electronic repository, and the content page is asynchronously updated with additional data about the search result retrieved from the electronic repository. |
| US09589028B1 |
Resource identification from organic and structured content
Methods, systems, and apparatus, including computer program products for structured content ranking. In an aspect, a method determines a service requirement from terms of a query, the service requirement being one of a plurality of service requirements fulfilled by databases; determines, for each of the databases, a service requirement score for the database, the service requirement score being a measure of an ability of the database to fulfill the service requirement; selects databases based on the service requirement scores; generates data responsive to the service requirement based on the terms of the query and one or more of the selected databases; and generates, from the data identifying resources that are determined to be responsive to the query and from the data responsive to the service requirement, search results that include first search results that each identify a corresponding resource that was determined to be responsive to the query. |
| US09589026B2 |
Method and device for pushing information
The present invention provides a method and device for pushing information. The method comprises: obtaining a designated query input on a web page; matching the designated query with queries in a query candidate set including queries having a tendency of carrying an image; and when a query in the query candidate set matches the designated query, outputting a corresponding image on the web page according to the designated query. |
| US09589025B2 |
Correlated information recommendation
Method and apparatus for information recommendation are provided. In one aspect, a method for information recommendation uses correlated information combinations to improve recommendation accuracy. Upon receiving data from a client indicating a visited information type, the method obtains correlated information types related to the visited information type from stored records. The correlated information types providing one or more correlated information combinations each including at least two correlated information types. For each of the one or more correlated information combinations, the method computes a degree of correlation between the correlated information combination and the visited information type. The method selects a target correlated information combination with a satisfying degree of correlation, and recommends the target correlated information combination to the client. |
| US09589021B2 |
System deconstruction for component substitution
A method is provided for system deconstruction for component substitution. The method includes a system tree which is deconstructed in a computer-readable medium, the system tree deconstructing into constituent nodes. Each node in the system tree represents a characteristic of a component of a system under consideration. A database of trees is searched for trees containing similar attributes to the system tree. Trees are qualified based on a frequency of nodes that are similar to certain highly ranked nodes in the system tree. The most relevant nodes from the qualified trees are selected. Searching the database is terminated when the most relevant nodes account for a fraction, less than a whole, of an environmental footprint of the system tree. |
| US09589017B2 |
Database system for executing parameter-sensitive query
A query is received. The query comprises a plural number of efficiency expressions. A key is generated for the query indicating a first selectivity region in multi-dimensional selectivity space comprising an array of selectivity regions arranged according to a grid with a number of dimensions equal to the plural number. The generated key is used to look up a stored query plan among a plurality of stored query plans. A stored query plan is executed for the query that is associated with a stored key determined to match the generated key. |
| US09589013B2 |
Message content management system
Multi-media content for inclusion into an SMS (Short Message Service), MMS (Multi-media Message Service), IM (Instant Message) or other message type can be searched, pre-searches, fetched and pre-fetched based upon predictive- and rules-based searching techniques. A system can predict or infer an in-process message, for example, based upon a portion of the inputted text message. Thereafter, in real- or near real-time, content related to the topic of conversation can be retrieved from a local store, remote stores (e.g., servers) or cloud-based sources. The retrieved content can be incorporated into the SMS, MMS, or IM message as appropriate or desired thereby enhancing the messaging experience. |
| US09589012B2 |
Generation of a data model applied to object queries
Embodiments include generating data models that may give semantic meaning for unstructured or structured data that may include data generated and/or received by search engines, including a time series engine. A method includes generating a data model for data stored in a repository. Generating the data model includes generating an initial query string, executing the initial query string on the data, generating an initial result set based on the initial query string being executed on the data, determining one or more candidate fields from one or results of the initial result set, generating a candidate data model based on the one or more candidate fields, iteratively modifying the candidate data model until the candidate data model models the data, and using the candidate data model as the data model. |
| US09589011B2 |
Dynamic suggested search queries on online social networks
In one embodiment, a method includes accessing a prior structured query previously selected by a first user of an online social network, where the prior structured query corresponds to a first set of search results and comprises references to one or more objects associated with the online social network, identifying changes to the first set of search results corresponding to the prior structured query, and sending, to a client system of the first user, one or more suggested structured queries for display to the first user, where at least one of the suggested structured queries is a dynamic query comprising at least a portion of the prior structured query and a reference to the identified changes to the first set of search results corresponding to the prior structured query. |
| US09589008B2 |
Deduplication of volume regions
A system and method for performing coarse-grained deduplication of volume regions. A storage controller detects that a first region of a first volume is identical to a second region of a second volume, wherein the first volume points to a first medium and the second volume points to a second medium. In response to detecting the identical regions, the storage controller stores an indication that the first range of the first medium underlies the second range of the second medium. Also in response to detecting the identical regions, the mappings associated with the second range of the second medium are invalidated. |
| US09589007B2 |
Method for issuing multipart receipts in connection to extensive database operations
Disclosed herein is a technique for providing status feedback on the execution of a database request. The technique involves receiving a database request that defines an operation to be performed on at least one data record stored in a database. The data record is updated in the database in accordance with the operation, and one or more tasks that are to be performed in connection to the operation are scheduled for execution. A first version of a receipt is generated and provided to the application, and includes, for each of the one or more tasks, a status field that indicates a progress of executing the task. The method further includes the steps of, in response to a change in the execution of any of the one or more tasks, updating the status fields to produce a second version of the receipt, which is then provided to the application. |
| US09589006B2 |
Method and apparatus for multidimensional data storage and file system with a dynamic ordered tree structure
An approach is provided to determine one or more dynamic ordered tree structures and transition tree structures (e.g., based on one or more transitions of a device) to facilitate querying and/or accessing data stores. An apparatus and method determines to generate at least one index structure, determines to associate index objects of the generated index structure with one or more data objects of at least one data store, determines to generate at least one transition index structure based on the at least one generated index structure, and determines to associate the transition index structure with index objects corresponding to one or more data objects of at least one data store based on a transition of a device. Also, the method and apparatus determines to generate at least one query, and determines to generate at least one transition index structure where a current index structure to resolve the query is absent. |
| US09589004B2 |
Data storage method and apparatus
A data storage method and apparatus. The method includes: determining a same column attribute of at least two data objects that are to be stored in a KeyValue type distributed database; determining a format of a row identifier of each data object of the at least two data objects, where the row identifier format includes the same column attribute and a data object identifier; determining a row identifier value of each data record of each data object according to the determined row identifier format of each data object; and storing each data record and the row identifier value of each data record, where the row identifier value of each data record is used as a primary index. The data storage method and apparatus in embodiments of the present invention can improve data query efficiency. |
| US09589000B2 |
Method and apparatus for content association and history tracking in virtual and augmented reality
A machine-implemented method includes establishing a virtual or augmented reality entity, and establishing a state for the entity having a state time and state properties including a state spatial arrangement. The data entity and state are stored, and are subsequently received and outputted at a time other than the state time so as to exhibit a “virtual history machine” functionality. An apparatus includes a processor, a data store, and an output. A data entity establisher, a state establisher, a storer, a data entity receiver, a state receiver, and an outputter are instantiated on the processor. |
| US09588996B2 |
Point in time recovery support for pending schema definition changes
Recovering data to a point in time before pending definition changes are materialized in a relational database management system. One or more definition changes to a database schema are received. Original data base schema attributes are saved and maintained as point in time metadata in a catalog table until the one or more definition changes have been materialized. During recovery processing, it is determined for each object being recovered whether the object is being recovered to a point in time prior to which the one or more definition changes were materialized. In response to determining that an object is being recovered to a point in time prior to which the one or more definition changes were materialized, the saved point in time metadata is used for the object in the recovery process. |
| US09588988B2 |
Visual indicators for temporal context on maps
Client-side and server-side methods for displaying event data within a map that is displayed on a computing device are presented. In an example, the method includes receiving a request for mapping data including a request location defining a current geographic location of the client computing device, determining a request time corresponding to the request, the request time based on a time the mapping data request was sent by the client computing device. The method also includes retrieving mapping data corresponding to the request location and determining that an event in an event database includes an event time that occurs within a threshold time of the request time. The method further includes retrieving event data corresponding to the event that occurs within the threshold time of the request time and sending the retrieved mapping data and the retrieved event data to the client computing device in response to the request. |
| US09588986B2 |
Method and system for backup and recovery
For data backup and recovery based on linked file repositories with each of the linked file repositories representing an individual file system capable of storing at least one version of a file and being connected to at least one server system, each of the linked file repositories are placed in a certain position for storing a certain version of the file. Each position of each of the linked file repositories is continuously numbered. A number of the versions of the file are determined by the position of the one of the linked file repositories. |
| US09588984B2 |
Peer-to-peer data management for a distributed file system
In some examples, a distributed file system is described. The distributed file system may include multiple data nodes and a director unit. The multiple data nodes may each include one or more data blocks. The director unit may include multiple master nodes configured in a peer-to-peer distributed architecture and operably coupled to the multiple data nodes. Each of the master nodes may be configured to receive a task related to managing data with respect to the distributed file system; to manage a distribution of the task among one or more of the plurality of master nodes; and to communicate a task status and a status of at least a part of the distributed file system to each of the other master nodes. |
| US09588983B2 |
Data classification for adaptive synchronization
In one embodiment, a synchronization engine 116 of an application module 114 may adjust a synchronization scheme 306 based on the implicit data classification of a data item. A synchronization engine 116 may detect a user action 406 executed by a user on a data item 402. The synchronization engine 116 may determine an action type 408 for the user action 406. The synchronization engine 116 may assign an item synchronization priority to the data item 402 based on the action type 406. |
| US09588980B2 |
Real-time identification of data candidates for classification based compression
Identification of data candidates for data processing is performed in real time by a processor device in a distributed computing environment. Data candidates are sampled for performing a classification-based compression upon the data candidates. A heuristic is computed on a randomly selected data sample from the data candidate, the heuristic computed by, for each one of the data classes, calculating an expected number of characters to be in a data class, calculating an expected number of characters that will not belong to a predefined set of the data classes, and calculating an actual number of the characters for each of the data classes and the non-classifiable data. |
| US09588971B2 |
Generating unique document page identifiers from content within a selected page region
Generating unique document identifiers from content within a selected page region is disclosed. A selection of a first region within a first page of the documents is received from a user, and is defined by a set of first boundaries relative to the first page. A text string of a first base selection page content within the first region is retrieved from the first page. Then the retrieved text string is assigned to a page location index associated with the first page. A text string of a first replicated selection page content is retrieved from a second page. The first replicated selection page content is included in the same first region defined by the set of first boundaries relative to the second page. The retrieved text string of the first replicated selection page content is assigned to a page location index of the second page. |
| US09588969B2 |
Retargeting content segments to multiple devices
A tool for retargeting content from a web page to one or more devices. The tool issues, by one or more computer processors, a request to configure preferences for retargeting content from the web page. The tool receives, by one or more computer processors, a file from a first device. The tool determines, by one or more computer processors, at least one characteristic of the file. The tool matches, by one or more computer processors, the at least one characteristic of the file to an additional device. The tool outputs, by one or more computer processors, the file to the additional device. |
| US09588965B2 |
Identifying and characterizing an analogy in a document
Disclosed is a method and system for identifying and characterizing an analogy in a document. In one implementation, the method comprises identifying a candidate document. The candidate document comprises an analogy for a target concept, a region of interest and a linguistic marker included in the region of interest. Further, the method comprises classifying the candidate document as an analogy document or a non-analogy document based upon a size of a region of interest and a count of linguistic marker. Furthermore, the method comprises identifying a source concept from the analogy document. Subsequently, the method comprises characterizing the source concept with corresponding metadata. The metadata comprises a familiarity of the source concept, a length of the source concept, and a readability of the source concept. |
| US09588952B2 |
Collaboratively reconstituting tables
Reconstituting an attribute associated with data. Data in a tabular form may be received. The data is analyzed for a field that is likely to be determined by a formula. Responsive to identifying the field likely to be determined by the formula, An indication of the field and the formula with the data are stored in a repository. The indication of the field and the formula with the data from the repository may be retrieved to facilitate incorporating the data in an application with the formula for the field integrated into the application. |
| US09588951B2 |
Annotation method and system for conferencing
A conferencing system comprises a plurality of computing devices communicating over at least one network during a conference session, at least one of the computing devices being configured to share content displayed thereby with other computing devices, the other computing devices displaying the shared content, at least one of the computing devices also being configured to accept input annotations made on the displayed shared content and to share input annotations with other computing devices over a channel independent of the shared content. |
| US09588948B2 |
Apparatus and method for editing document image
An apparatus and method for editing a document are disclosed. The apparatus is installed on a first terminal, that is, a mobile terminal of a user, in order to edit a document of a document file stored in the first terminal. The apparatus includes a document storage unit and an edited document generation unit. The document storage unit stores at least one document file. The edited document generation unit extracts an area of interest from a document file stored in the document storage unit and displayed on a display unit of the first terminal, and generates an edited document. The document file is a portable document format (PDF) file. |
| US09588946B2 |
Panning a content area of a markup language document based on movements of a cursor of a pointing device
Embodiments of techniques for moving visible content elements of at least one markup language document within a display area in response to user input moving a cursor of a pointing device. Visible content elements of the markup language document may be moved in a display area based at least in part on an amount by which a content area that includes the visible content elements extends outside of the display area. For example, a panning facility may determine an amount by which to shift visible content elements in the display area based at least in part on an amount by which a content area that includes the visible content elements extends beyond the display area. The panning facility may move the visible content elements by instructing a viewing application to scroll the visible content elements within the display area. |
| US09588945B2 |
Comparing webpage elements having asynchronous functionality
Techniques for determining differences between document object models (DOMs) received in response to asynchronous functionality calls is described herein. The techniques may include clustering elements in a webpage having asynchronous functionality. The techniques include executing asynchronous functionality calls for two of the elements that form a cluster, and receiving a document object model (DOM) in response to each of the asynchronous functionality calls. The DOMs are compared to determine whether a difference exists between the DOMs based on a predetermined threshold. If no difference exists, execution of the asynchronous functionality calls is ceased. |
| US09588937B2 |
Array of processor core circuits with reversible tiers
Embodiments of the invention relate to an array of processor core circuits with reversible tiers. One embodiment comprises multiple tiers of core circuits and multiple switches for routing packets between the core circuits. Each tier comprises at least one core circuit. Each switch comprises multiple router channels for routing packets in different directions relative to the switch, and at least one routing circuit configured for reversing a logical direction of at least one router channel. |
| US09588936B1 |
Automatically transmitting a web browser file over the internet when booting an operating system from a data storage device
A data storage device is disclosed comprising a non-volatile memory having a host operating system stored in an unprotected area of the non-volatile memory, a device operating system stored in a protected area of the non-volatile memory, and a device application operable to transmit a web browser file over the Internet, the device application stored in the protected area of the non-volatile memory. When a first read command is received from a host to load the host operating system, the device operating system is returned in response to the first read command. A second read command is then received from the host to load the device application. |
| US09588935B2 |
User-mounted device calibration using external data
Systems, methods, and computer media for calibrating user-mounted devices are provided. An external device capable of providing calibration data to a user-mounted device worn by a user is identified. An identification acknowledgement is received from the external device. A device calibration mode is entered in which calibration data describing the user-mounted device is received by the user-mounted device. The calibration data is based at least in part on sensor data acquired and normalized by the external device. The calibration data is then received. The calibration data includes at least one determined pose or body measurement of the user and a calculated alignment of the user-mounted device relative to the user. The user-mounted device is calibrated using the received calibration data. |
| US09588929B2 |
PCI-E standard selection setting system and microserver
A peripheral component interface-express (PCI-E) standard selection setting system and microserver are disclosed, in which a selection controller selects an arrangement setting in storage elements to arrange the PCI-E control chip, whereby each of the second PCI-E standard ports is or is not arranged as an upstream PCI-E standard port, so that a single PCI-E standard control chip may arrange one of the multitude of PCI-E standard ports as an upstream PCI-E standard port, so that the upstream PCI-E standard port may have a data transmission with one of the multitude of system on chips (SOCs) connected with the PCI-E standard control chip. |
| US09588921B2 |
System on a chip comprising an I/O steering engine
Embodiments of the technology can provide steering of one or more I/O resources to compute subsystems on a system-on chip (SoC). The SoC may include a first I/O subsystem comprising a plurality of first I/O resources and a second I/O subsystem comprising a plurality of second I/O resources. A steering engine may steer at least one of the first I/O resources to either a network compute subsystem or to a server compute subsystem and may steer at least one of the second I/O resources to either the network compute subsystem or to the server compute subsystem. |
| US09588916B1 |
Interrupt latency reduction
A method in accordance with one embodiment of the invention can include detecting an interrupt request during execution of an instruction by a processor of an integrated circuit. Additionally, a clock signal frequency can be changed that is received by the processor. An interrupt service routine can be executed that corresponds to the interrupt request. |
| US09588915B2 |
System on chip, method of operating the same, and apparatus including the same
A method of operating a system on chip (SoC) includes calculating a first residence time indicating an amount of time that at least one task resides in an execution queue in the SoC, wherein the at least one task is assigned to at least one core of a multi-core processor in the SoC, calculating a total unit residence time indicating an amount of time that all tasks other than the at least one task reside in the execution queue, calculating a second residence time for the at least one core by adding the first residence time of the at least one task and the total unit residence time, and adjusting at least one of an operating frequency and a voltage of the at least one core based on the second residence time. |
| US09588913B2 |
Management of allocation for alias devices
Embodiments of the present invention provide systems, methods, and computer program products for managing computing devices to handle an input/output (I/O) request. In one embodiment, the I/O request may eligible for performance throttling based, at least in part, on the associated importance level for performing the received I/O request and one or more characteristics of the received I/O request. Embodiments of the present invention provide systems, methods, and computer program products for throttling the I/O request and transmitting the I/O request to a storage controller. |
| US09588911B2 |
Semiconductor system for implementing an ising model of interaction
In a semiconductor device which calculates an interaction model, a technique capable of executing interaction calculation in non-synchronization with a clock is provided. The semiconductor device includes a plurality of units each of which includes: a first memory cell for storing a value indicating a state of one node of an interaction model; a second memory cell for storing an interaction coefficient indicating an interaction from a node connected to the one node; and an interaction calculation circuit for determining a value indicating a next state of the one node based on a current determined by a value indicating a state of the connected node and the interaction coefficient. |
| US09588910B2 |
Electronic apparatus and linked operation method
There is provided an electronic apparatus that performs a linked operation with an information processing device via first driver software that is installed in the information processing device and also performs a linked operation with an external device that performs a linked operation with the information processing device via second driver software that is installed in the information processing device. A linked operation is performed with the external device when only the first driver software and second driver software are installed in the information processing device. The first driver software includes a software portion that serves as application software capable of being invoked by the second driver software. |
| US09588907B2 |
Initial operation of a portable data carrier
In a portable data carrier having a non-volatile memory, a memory controller and a memory interface, an effected initial operation of the data carrier is checked through a request to a security unit of the data carrier via a security interface connected to the security unit. For this purpose, the data carrier comprises a memory portion comprising the memory interface and a body portion comprising the security interface, which are interconnected such that the memory portion can be folded out of the body portion, so that simultaneously the memory interface is laid open for a connection to an end device and the electrical connection between the security unit and the security interface is disconnected irreversibly. |
| US09588904B1 |
Host apparatus to independently schedule maintenance operations for respective virtual block devices in the flash memory dependent on information received from a memory controller
Hierarchical address virtualization within a memory controller and configurable block device allocation are disclosed. Respective virtual block devices (VBDs) are defined in flash memory managed by a common memory controller, with data access managed using address virtualization techniques. The common memory controller then tracks the need for maintenance operations independently for each VBD. Information may be received from the common memory controller regarding the need for maintenance operations in respective virtual block devices (VBDs), and commands are then selectively issued to the common memory controller in a manner so as to independently schedule these operations for the respective VBDs; performance of maintenance operations by the memory controller in a first VBD is unconstrained by performance characteristics associated with a second VBD. |
| US09588902B2 |
Flexible page sizes for virtual memory
A method for translating a virtual memory address into a physical memory address includes parsing the virtual memory address into a page directory entry offset, a page table entry offset, and an access offset. The page directory entry offset is combined with a virtual memory base address to locate a page directory entry in a page directory block, wherein the page directory entry includes a native page table size field and a page table block base address. The page table entry offset and the page table block base address are combined to locate a page table entry, wherein the page table entry includes a physical memory page base address and a size of the physical memory page is indicated by the native page table size field. The access offset and the physical memory page base address are combined to determine the physical memory address. |
| US09588898B1 |
Fullness control for media-based cache operating in a steady state
A data storage system incorporating a write-caching subsystem that implements a steady-state media-based cache is described. The steady-state of the media-based cache can be obtained by directing non-sequential write commands and data received from the host device to multiple independent cache locations and, thereafter, selectively copying or moving such data between the caches so that none of the caches are either too full or too empty. In this manner, a non-sequential write command can be cached in a power-safe manner until it is efficient and/or convenient to write such data to the mainstore portion of the physical media. |
| US09588895B2 |
Asynchronous movement of in-line metadata for cached volumes at storage gateways
Methods and apparatus for supporting cached volumes at storage gateways are disclosed. A storage gateway appliance is configured to cache at least a portion of a storage object of a remote storage service at local storage devices. In response to a client's write request, directed to at least a portion of a data chunk of the storage object, the appliance stores a data modification indicated in the write request at a storage device, and asynchronously uploads the modification to the storage service. In response to a client's read request, directed to a different portion of the data chunk, the appliance downloads the requested data from the storage service to the storage device, and provides the requested data to the client. |
| US09588889B2 |
Domain state
Method and apparatus to efficiently maintain cache coherency by reading/writing a domain state field associated with a tag entry within a cache tag directory. A value may be assigned to a domain state field of a tag entry in a cache tag directory. The cache tag directory may belong to a hierarchy of cache tag directories. Each tag entry may be associated with a cache line from a cache belonging to a first domain. The first domain may contain multiple caches. The value of the domain state field may indicate whether its associated cache line can be read or changed. |
| US09588887B2 |
Staging sorted data in intermediate storage
A data storage system includes data storage and random access memory. A sorting module is communicatively coupled to the random access memory and is configured to sort data blocks of incoming write data received in the random access memory. A storage controller is communicatively coupled to the random access memory and the data storage and is configured to write the sorted data blocks as individually-sorted data block sets to a staging area of the data storage. A method and processor-implemented process provide for sorting data blocks of incoming write data received in a random access memory of data storage and writing the sorted data blocks as individually-sorted data block sets to a staging area of the data storage. |
| US09588886B2 |
Staging sorted data in intermediate storage
A data storage system includes data storage and random access memory. A sorting module is communicatively coupled to the random access memory and is configured to sort data blocks of incoming write data received in the random access memory. A storage controller is communicatively coupled to the random access memory and the data storage and is configured to write the sorted data blocks as individually-sorted data block sets to a staging area of the data storage. A method and processor-implemented process provide for sorting data blocks of incoming write data received in a random access memory of data storage and writing the sorted data blocks as individually-sorted data block sets to a staging area of the data storage. |
| US09588884B2 |
Systems and methods for in-place reorganization of device storage
A method, and system for carrying out the method, for in-place reorganization of content, organized according to an original organization scheme, which is stored in a non-volatile storage of a device, to a target organization scheme. The method includes obtaining instructions to reorganize the content to a defined target organization scheme. The method further includes (i) generating, based on the instructions and applying target organization logic to a virtual storage, a sequence of update commands for generating, in the non-volatile storage, at least one target storage unit organized according to the defined target organization scheme, and (ii) executing the update commands on the non-volatile storage. Potential write-before-read conflicts may be identified based on the sequence of update commands, and potential conflicts resolved by reordering, adding, deleting, altering commands, and/or backing up content. The instructions may include instructions to repartition the nonvolatile storage from an original partition layout to a defined target partition layout. |
| US09588880B2 |
Adaptive address translation method for high bandwidth and low IR concurrently and memory controller using the same
An adaptive memory address translation method includes the following steps. Multiple request instructions are received. A memory address corresponding to each request instruction includes a bank address. The memory addresses corresponding to the request instructions are translated, such that the bank addresses corresponding to at least one part of the any two adjacent request instructions are different. A numerical translation is utilized to translate the memory addresses corresponding to the request instructions, such that the memory addresses corresponding to the any two adjacent request instructions have less different bits. |
| US09588877B1 |
Unit-level formal verification for vehicular software systems
According to one exemplary embodiment, a method for preparing a software component for verification is provided. The method may include receiving the software component and a design model. The method may also include generating a wrapper program based on the received software component and the received design model. The method may then include associating the received software component with the generated wrapper program. The method may further include determining a plurality of inputs for the received software component based on the received design model. The method may also include sending the determined plurality of inputs and the received software component with associated wrapper program to a verification tool. |
| US09588875B2 |
Probationary software tests
A method, computer program product, and system is described. A continuous integration environment is identified. A first software test associated with the continuous integration environment is identified. A probationary status for the first software test is determined, the probationary status indicating, at least in part, a potential lack of reliability for the first software test. |
| US09588873B1 |
Using core files to develop diagnostic programs
A list of classes found in a core dump file is determined. One or more classes requested by a classloader is also determined. A set of one or more classes requested by the classloader that are found in the core dump file is then determined. |
| US09588872B2 |
Discovery of code paths
Systems and techniques are described for tracking software code paths. A described technique includes receiving a first log of stack traces that includes a respective stack trace for each of a plurality of calls to access any of a plurality of data objects created during a first execution of an application, generating, for each of the stack traces in the first log, a script for a respective probe that identifies the data object accessed by the call corresponding to the stack trace, a respective instruction called to access the data object, and whether the access is a read or a write access for the data object, generating, for at least one of the probes, a second log that identifies the data object for the respective probe and the data stored in the data object, and generating a representation of the execution of the application using the second log. |
| US09588868B2 |
Correlating multiple disjoint events via an operation identifier
A system and method for correlating asynchronous operations via an operation identifier comprises receiving an originating operation from a first system that indicates a change in the first system and generating a first message with respect to the originating operation. The first message is associated with the operation identifier. The system and method further propagates the first message to a second system, which causes a subsequent operation being associated with the operation identifier to be performed by the second system, and correlates the originating operation and the subsequent operation via the operation identifier. |
| US09588865B2 |
System and method for displaying usage history of applications executed between devices
A system and method displaying usage histories of applications by devices on a network are provided. The method includes storing usage histories of applications that a first device has executed with a plurality of other devices through a network connection; setting, in the first device, at least one of a first mode and a second mode for displaying at least a part of the usage histories; displaying, if the first device is set in the first mode, usage histories of the executed applications arranged by device, with respect to the plurality of other devices; and displaying, if the first device is set in the second mode, usage histories of the plurality of other devices arranged by application, with respect to the executed applications. |
| US09588864B2 |
Methods for assessing data center efficiency and devices thereof
A method, non-transitory computer readable medium, and apparatus for assessing efficiency of a data center includes querying, based on a system management protocol, each of a plurality of information technology (IT) devices to obtain utilization information. A power rating value is obtained for each of the plurality of IT devices. An IT power consumption value for the plurality of IT devices is generated based on the utilization information for the plurality of IT devices and the power rating values. A value for at least one efficiency metric is generated and output based on the IT power consumption value. |
| US09588861B2 |
Method and apparatus for automatically identifying components to monitor in an enterprise environment
One embodiment of the present invention provides a system that facilitates automatically identifying components to monitor in an enterprise environment. During operation, the system receives a designation of the enterprise environment. The system then identifies an enterprise application in the enterprise environment. The system also scans the enterprise application for one or more software components, wherein a software component can include a service, a database, or any other object that provides functionality to the enterprise application. The system then adds each software component to a monitor list. Next, the system determines each hardware component hosting the enterprise application and the software components. The system then adds each hardware component to the monitor list. Finally, the system stores the monitor list to facilitate subsequent monitoring of the enterprise application. |
| US09588855B2 |
Management and utilization of fault domains in distributed cache systems
Fault domains are defined which reflect, either physically or virtually, the topology of a networked computing environment. These defined fault domains are then used to control where cached data is replicated when running in a write back cache mode. Unlike known replication approaches, the present approach replicates such data according to a user's defined data policy and based on the defined fault domains thereby avoiding the user having to keep track of changes in computing system configurations or update their data policy when virtual machines migrate from one host computing system to another. |
| US09588852B2 |
Temporary pipeline marking for processor error workarounds
Embodiments include a method for temporary pipeline marking for processor error workarounds. The method includes monitoring a pipeline of a processor for an event that is predetermined to place the processor in a stuck state that results in an errant instruction execution result due to the stuck state or repeated resource contention causing performance degradation. The pipeline is marked for a workaround action based on detecting the event. A clearing action is triggered based on the marking of the pipeline. The marking of the pipeline is cleared based on the triggering of the clearing action. |
| US09588851B2 |
Locality based quorums
Disclosed are various embodiments for distributing data items within a plurality of nodes. A data item that is subject to a data item update request is updated from a master node to a plurality of slave notes. The update of the data item is determined to be locality-based durable based at least in part on acknowledgements received from the slave nodes. Upon detection that the master node has failed, a new master candidate is determined via an election among the plurality of slave nodes. |
| US09588850B2 |
Network controller failover request to reduce network outages
A system is described that includes a first network controller and a second network controller. The first controller operates as a master controller and the second controller operates as a standby controller for a set of access points. Using a set of VRRP advertisements between the first and second controllers, the second controller may (1) determine that the first controller has failed independent of any determination by the access points and (2) send a failover request to the access points. The failover request may cause the access points to use previously established tunnels between the second controller and each of the access points. By transmitting a failover request message from the second controller to the access points upon the detection by the second controller that the first controller has failed and independent of any determination by the access points, the system reduces network access downtime for the access points. |
| US09588847B1 |
Recovering corrupt virtual machine disks
A method and system for recovering a corrupt virtual disk is discussed. A request to recover the disk may be received. A recovery snapshot for the last point-in-time the system was stable may be synthesized. A difference may be identified between that recovery snapshot and the corrupt disk. A virtual machine may communicate with both the difference and the corrupt disk, and the difference may be merged with the corrupt disk. |
| US09588843B2 |
System and method for transferring traditional RAID to distributed array
In one embodiment, a method includes iteratively selecting an original, unmoved stride from an original array until all original strides have been moved, determining a target stride location in a distributed array, determining a state of the target stride from the following states: an old state indicating unmoved data, a blank state indicating no data, and a new state indicating migrated data, determining that all target stripes are blank, moving data from the original stride to the target stripes when all the target stripes are blank, delaying the moving of the data from the original stride to the target stripes in the target stride when any of the target stripes of the target stride are in the old state and waiting until all the target stripes of the target stride are in the blank state, and determining that all original strides from the original array have been moved. |
| US09588841B2 |
Using reliability information from multiple storage units and a parity storage unit to recover data for a failed one of the storage units
Provided are a method, system, and apparatus using reliability information from multiple storage units and a parity storage unit to recover data for a failed one of the storage units. A decoding operation of the codeword is performed in each of the storage units comprising the data storage units other than the target data storage unit and the parity storage unit to produce reliability information. In response to the decoding operation failing for at least one additional failed storage unit comprising the data and/or parity storage units other than the target data storage unit that failed to decode, reliability information is obtained for the data portion of the at least one additional failed storage unit. The reliability information obtained from the storage units other than the target data storage unit is used to produce corrected data for the data unit in the target data storage unit. |
| US09588840B2 |
Memory devices that perform masked write operations and methods of operating the same
A method of operating a memory device includes: generating an internal read command in response to a received masked write command, the internal read command being generated one of (i) during a write latency associated with the received masked write command, (ii) after receipt of a first bit of masked write data among a plurality of bits of masked write data, and (iii) in synchronization with a rising or falling edge of a clock signal received with an address signal corresponding to the masked write command; reading, in response to the internal read command, a plurality of bits of data stored in a plurality of memory cells, the plurality of memory cells corresponding to the address signal; and storing, in response to an internal write command, the plurality of bits of masked write data in the plurality of memory cells. |
| US09588830B2 |
Local survivability in a distributed contact center environment
A system and method for local survivability in a distributed contact center environment has a first processor in a first contact center node receiving a first request for interaction. The first processor transmits a first message to a second contact center node in response to the request for interaction. The first message is configured to invoke a first resource associated with the second contact center node for handling the interaction via the first resource. The first processor monitors connection with the second contact center node. The first processor receives a second request for interaction, and further determines lack of connection with the second contact center node. In response to determining lack of connection with the second contact center node, the first processor refrains from transmitting a second message to the second contact center node. According to one embodiment, the second message is for invoking a second resource associated with the second contact center node for handling the interaction via the second resource. |
| US09588828B2 |
System and method for routing messages between applications
A system and method for enabling the interchange of enterprise data through an open platform is disclosed. This open platform can be based on a standardized interface that enables parties to easily connect to and use the network. Services operating as senders, recipients, and in-transit parties can therefore leverage a framework that overlays a public network. |
| US09588827B2 |
Single program call message retrieval
Embodiments of the present invention provide a method, system and computer program product for single program code message retrieval for message queues. In an embodiment of the invention, a message queue data processing system can be configured for single program code message retrieval for message queues. The system can include a message queue executing in a host server and providing an API to applications communicatively coupled to the message queue over a computer communications network. The API exposed by the message queue can include a single program call including program code enabled to open a queuing resource in the message queue, to retrieve all messages in a message buffer from the queuing resource and to close the queuing resource. |
| US09588826B2 |
Shared virtual memory
Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings. |
| US09588824B2 |
System and methods of communicating events between multiple applications
A system and methods of communicating events includes detecting an event at a first embedded application, the first embedded application being embedded in an application; triggering the detected event on an event aggregator of the application; determining, by the application, whether a second embedded application is embedded in the application; and if a second embedded application is determined to be embedded in the application, transmitting the detected event from the application to the second embedded application. |
| US09588821B2 |
Automatic determination of required resource allocation of virtual machines
Virtual machine resources may be monitored for optimal allocation. One example method may include monitoring a virtual machine operating in a network to determine whether at least one predefined service tier threshold has been exceeded for a predefined amount of time, initiating a query to determine current performance threshold data of the at least one predefined service tier threshold from a database, determining at least one component state of at least one component of the virtual machine based on the at least one service tier threshold assigned to the at least one component, and reallocating the resource provided by the virtual machine when the component state indicates a high warning state. |
| US09588817B2 |
Scheduling method and scheduling system for assigning application to processor
A scheduling method executed by a scheduler that manages multiple processors, includes detecting based on an application information table when a first application is started up, a processor that executes a second application that is not executed concurrently with the first application; and assigning the first application to the processor. |
| US09588816B2 |
Performance interference model for managing consolidated workloads in QOS-aware clouds
The workload profiler and performance interference (WPPI) system uses a test suite of recognized workloads, a resource estimation profiler and influence matrix to characterize un-profiled workloads, and affiliation rules to identify optimal and sub-optimal workload assignments to achieve consumer Quality of Service (QoS) guarantees and/or provider revenue goals. The WPPI system uses a performance interference model to forecast the performance impact to workloads of various consolidation schemes (e.g., consolidation strategies) usable to achieve cloud provider and/or cloud consumer goals, and uses the test suite of recognized workloads, the resource estimation profiler and influence matrix, affiliation rules, and performance interference model to perform off-line modeling to determine the initial assignment selections and consolidation strategy to use to deploy the workloads. The WPPI system uses an online consolidation algorithm, the offline models, and online monitoring to determine virtual machine to physical host assignments responsive to real-time conditions to meet cloud provider and/or cloud consumer goals. |
| US09588812B2 |
Dynamic reduction of stream backpressure
Techniques are described for eliminating backpressure in a distributed system by changing the rate data flows through a processing element. Backpressure occurs when data throughput in a processing element begins to decrease, for example, if new processing elements are added to the operating chart or if the distributed system is required to process more data. Indicators of backpressure (current or future) may be monitored. Once current backpressure or potential backpressure is identified, the operator graph or data rates may be altered to alleviate the backpressure. For example, a processing element may reduce the data rates it sends to processing elements that are downstream in the operator graph, or processing elements and/or data paths may be eliminated. In one embodiment, processing elements and associate data paths may be prioritized so that more important execution paths are maintained. |
| US09588811B2 |
Method and apparatus for analysis of thread latency
A method for analysis of thread latency includes: determining a thread of interest; computing a summation of time periods in which the thread of interest stays in a run queue to determine a thread in-run-queue time; computing a summation of time periods in which the thread of interest is preempted by other threads to determine a thread preempted time; and evaluating thread latency of the thread of interest according to the thread preempted time to the thread in-run-queue time. |
| US09588809B2 |
Resource-based scheduler
Resource-based scheduling of computer jobs is disclosed. A computer job is scheduled based on utilization of a resource and a utilization criterion that the computer job has pertaining to the resource, in accordance with an embodiment of the present invention. |
| US09588808B2 |
Multi-core system performing packet processing with context switching
A multi-core processing system includes a first processing core, a second processing core, a task manager coupled to the first and second processing cores. The task manager is operable to receive context information of a task from the first processing core and provide the context information to the second processing core. The second processing core continues executing the task using the context information. |