最新美国发明专利
Document Document Title
US09584215B2 Relay node and method for receiving a signal from a base station in a mobile communication system
Provided are a method for receiving information on a relay node zone and reference signals for a relay node from a base station, and a relay node device using same. The relay node can receive information on at least one start point from the start points of a Relay-Physical Downlink Control Channel (R-PDCCH) and a Relay-Physical Downlink Shared Channel (R-PDSCH) for transmitting a signal from a base station to a relay node in a specific downlink subframe. Alternatively, the relay node can implicitly recognize the start points of the R-PDCCH and R-PDSCH set in advance. The relay node can recognize a signal from the base station in the specific downlink subframe based on the start point information after the time corresponding to at least one of the start points of the R-PDCCH and R-PDSCH. Also, the relay node can decode signals transmitted from a base station after the corresponding timing.
US09584214B2 Location aware profiles in an aerial network
Disclosed embodiments may help an aerial vehicle network to provide substantially continuous service in a given geographic area. An example method may be carried out at an aerial vehicle that is at a location associated with the first geographic area in an aerial network that includes a plurality of geographic areas. The balloon may determine that it should update its vehicle-state in accordance with a vehicle-state profile for the first geographic area. Then, in response, the balloon may determine the vehicle-state profile for the first geographic area, which may include one or more state parameters for balloons operating in the first geographic area. The balloon may then operate according to the vehicle-state profile for the first geographic area.
US09584205B2 Antenna configuration for co-operative beamforming
The present invention relates to a method for communicating in a network, the network comprising at least a first cell and a second cell including respectively a first primary station having a first antenna array dedicated to the first cell and a second primary station having a second antenna array dedicated to the second cell, for communicating with a plurality of secondary stations.
US09584204B2 Transmitter for transmitting discovery signals, a receiver and methods therein
A transmitter and a method therein for transmitting discovery signals to a receiver. The transmitter and the receiver arc comprised in a radio communications system. The transmitter transmits two or more discovery signals over two or more directions. Each discovery signal is configured to span over a fraction of a carrier bandwidth.
US09584200B2 Method for transmitting control information in multiple antenna system
A method of transmitting control information includes dividing frequency bandwidth into ranges to which the same PMI (precoding matrix index) is applied, obtaining multiple antenna information by the range to which the same PMI is applied and transmitting the multiple antenna information. Since multiple antenna information is transmitted by the unit of a range to which the same PMI is applied, radio resources allocated for transmitting the multiple antenna information may be reduced, thereby enhancing data transmission efficiency.
US09584192B2 Method and device for transmitting electric power and signals between a stationary wall and a leaf pivotably mounted on said wall
A method for transmitting electric power and signals between a wall and a leaf pivotally mounted on the wall includes transmitting the electric power so as to be galvanically isolated, and transmitting the signals optically or optoelectronically.
US09584189B2 Wireless energy transfer using variable size resonators and system monitoring
A variable effective size magnetic resonator includes an array of resonators each being one of at least two substantially different characteristic sizes and a mechanism for detuning at least one of the resonators from the resonant frequency of the variable effective size magnetic resonator.
US09584184B2 Unified front-end receiver interface for accommodating incoming signals via AC-coupling or DC-coupling
Techniques for accommodating an incoming signal at a front-end receiver via AC-coupling or DC-coupling are described herein. In one aspect, a front-end receiver comprises a differential input with a first data line and a second data line for receiving an incoming signal. The front-end receiver also comprises an AC-coupled switch coupled to the differential input, wherein the AC-coupled switch is configured to both perform high-pass filtering on the incoming signal and offset the filtered incoming signal with a DC-offset voltage if an AC-coupling mode of the receiver is enabled. The front-end receiver further comprises a DC-coupled switch coupled to the differential input, wherein the DC-coupled switch is configured to shift a common-mode voltage of the incoming signal if a DC-coupling mode of the receiver is enabled.
US09584179B2 System and method for multi-channel frequency hopping spread spectrum communication
One embodiment of the present invention sets forth a technique for transmitting data in a frequency hopping spread spectrum (FHSS) wireless communication system. A multi-channel receiver is configured to receive data from one or more channels simultaneously. The multi-channel receiver enables efficient implementation of a transmission protocol in which multiple candidate nodes within a wireless mesh network are polled for availability to receive a packet of data. The packet of data is transmitted to one or more available nodes based on prevailing link conditions, thereby increasing the likelihood of successful delivery. Data flooding may be selectively implemented to further increase the likelihood of successful delivery.
US09584178B2 Correlating pseudonoise sequences in an SIMD processor
In one embodiment, a method includes receiving a signal having communication data from two or more mobile devices, each identifiable by an associated pseudonoise sequence. A first mobile device is identifiable by a first pseudonoise sequence. Two or more samples of the received signal are stored in an input register. A segment of the first pseudonoise sequence is stored as a bit vector in a second register. The SIMD instruction is processed, by an SIMD processor, to produce correlation values associated with the segment of the first pseudonoise sequence and the samples of the received signal. Processing the SIMD instruction includes distributing the segment of the first pseudonoise sequence, as a bit vector, across two or more lanes of the SIMD processor. The processing contributes to despreading the received signal, and an output of the processing includes at least a portion of the communication data from the first mobile device.
US09584172B2 Wireless network receiver
A wireless network receiver includes a detection module that uses preamble data in a data frame for signal processing functions and the detection module is configured to adjust the number of preamble data bits that are used based on the power of a received signal.
US09584164B1 Digital intensive hybrid ADC/filter for LNA-free adaptive radio front-ends
A mixer-first receiver operates to generate filtering and analog-to-digital conversion concurrently and adaptively, while removing an LNA before a mixer to enable integration with digital baseband circuits. A plurality of switching capacitor arrays are integrated with a hybrid analog-to-digital filtering component. Switching capacitor arrays of the plurality of switching capacitor arrays can be selectively modified to perform both the filtering operation and the conversion operation together. The same switch capacitors of a switching capacitor array can be utilized in one phase of a clock cycle for the filtering and in another phase of the clock cycle for the conversion.
US09584155B1 Look-ahead hash chain matching for data compression
Example data compression methods disclosed herein include determining a hash chain index corresponding to a first position in an input data buffer based on a group of bytes beginning at a look-ahead offset from the first position. Such disclosed example methods also include, when a hash chain, which is indexed by the hash chain index, satisfies a quality condition, searching the input data buffer at respective adjusted buffer positions corresponding to a set of buffer positions stored in the hash chain being offset by the look-ahead offset to find a second data string matching a first data string beginning at the first position in the input data buffer. Such disclosed example methods further include, when the second data string satisfies a length condition, providing a relative position and a length of the second data string to an encoder to output compressed data corresponding to the input data buffer.
US09584152B1 Current steering digital to analog converter with dual current switch modules
A current-steering digital-to-analog converter may include dual current switch modules configured to receive digital input bits representative of desired analog output, and each dual current switch module may be controlled by one of the digital input bits. Each digital input bit may be represented by differential signals. The positive input and the negative input to drive two separate current switches in the dual current switch module may be separated, which may make the switching transition noise generated in the two current switches have a 180 degree phase difference. The output currents of these two current switches may be summed in proper phase to add the in-phase signal currents while canceling out the 180 degree out-of-phase switching noises generated in the two current switches. The 2nd order harmonic distortion and other higher even order harmonic distortions due to the common mode switching noise may be greatly reduced.
US09584151B1 Randomized quad switching
Reducing distortions in a digital-to-analog converter is a challenge for circuit designers. For current steering digital-to-analog converters (DACs), a quad switching scheme has been used to remove code-dependent glitching which is otherwise present in dual switching schemes. However, due to various impairments in the circuit, e.g., mismatches in the transistors, some code-dependent distortions remain even when a quad switching scheme is implemented. To address this issue, the quad switching scheme can be randomized to improve dynamic linearity while relaxing driving circuitry design and power constraints. Advantageously, randomization reduces the code dependency of the distortions and makes the distortions appear more noise-like at the output of the DAC.
US09584150B2 Gain calibration for ADC with external reference
Representative implementations of devices and techniques provide gain calibration for analog to digital conversion of time-discrete analog inputs. An adjustable capacitance arrangement is used to reduce or eliminate gain error caused by capacitor mismatch within the ADC. For example, the capacitance arrangement may include an array of multiple switched capacitances arranged to track gain error during search algorithm operation.
US09584148B1 Systems and methods for analog to digital converter failure identification
The present disclosure provides systems and methods for identifying and reporting failures of an analog to digital (A/D) conversion system. The systems and methods are configured to detect and report a failure of a preamplifier of the A/D conversion system and/or a failure of a A/D converter of the A/D conversion system. A high frequency component can be included in the input of an A/D converter. The A/D converter is configured to output a digital value to the A/D conversion system, wherein the digital value includes the high frequency component of the A/D converter input. The A/D conversion system is configured to determine an output status, including a frequency component and a corresponding amplitude, and to determine a failure of the A/D conversion system based on the determined output status. The A/D conversion system can report a change in, or a failure of, the A/D converter, and can operate or prevent operation of protection elements.
US09584142B2 Fractional N frequency synthesizer and setting method thereof
The calculator calculates the remainder of the division of which the dividend is the minimum accumulated value at which a carryover occurs in the ΔΣ modulator and the devisor is a fractional set value, and calculates the quotient and remainder of the division of which the dividend is the devisor of the previous division and the devisor is the remainder of the previous division until the remainder becomes zero. The abnormal noise determiner determines that the fractional set value causes periodic abnormal noise based on the quotients calculated by the calculator using the fractional set value. The fractional setter sets in the ΔΣ modulator the fractional set value changed to the extent that the output frequency of the VCO does not exceed a given value when the abnormal noise determiner determines that the changed fractional set value does not cause periodic abnormal noise.
US09584140B2 Apparatuses, methods, and circuits including a delay circuit
Apparatuses, methods, and delay circuits for delaying signals are described. An example apparatus includes a fine delay circuit configured to provide an output signal based on a ratio of a first input signal and a second input signal. The fine delay circuit including a phase mixer circuit including first signal drivers configured to receive the first input signal. The fine delay circuit further including second signal drivers configured to receive the second input signal, where at least two of the first signal drivers have different drive strengths and at least two of the second signal drivers have different drive strengths.
US09584135B2 Interface and related method for connecting sensor equipment and a physiological monitor
An interface to connect sensor equipment and a physiological monitor includes a first connector to receive power from a first channel of the monitor and a second connector to receive power from a second channel of the monitor. The power from each of the first and second channels of the monitor is combined within the interface. The interface further includes a third connector to provide the combined power to the sensor equipment; a voltage converter to rescale the voltage of the combined power that is provided to the sensor equipment; and a scaling circuit to reduce the voltage of a signal representing a measured physiological parameter. The signal representing the measured physiological parameter is sent from the sensor equipment to the monitor. The interface is advantageous to allow sensor equipment to be sufficiently powered by a monitor that would not typically provide enough power.
US09584131B2 Programmable device, information processing device, and control method for processing circuit of programmable device
A programmable device is disclosed which includes: a circuit data setting section configured to set a logical configuration in a processing circuit using first setting information retrieved from a memory; and a communication status monitoring section configured to determine whether communication is established between the processing circuit and a host computer using the setting made by the circuit data setting section. If it is determined that the communication is not established, the circuit data setting section retrieves from the memory second setting information different from the first setting information to again set a logical configuration in the processing circuit on the basis of the second setting information.
US09584130B1 Partial reconfiguration control interface for integrated circuits
Systems and methods are provided for coordinating the partial reconfiguration of a region of a configurable device (e.g., a SDM/CNoC/LSM system or device) through an interface that coordinates the stopping of the current persona in that region, the resetting of the new current persona, and the starting of the new persona in a manner that does not corrupt the memory of the affected region. The interface further provides signaling that the static region can use to protect itself during the partial reconfiguration, and disallows multiple partial reconfigurations of the same region at the same time.
US09584129B1 Integrated circuit applications using partial reconfiguration
Systems and methods for generating and deploying integrated circuit (IC) applications are provided. Partial reconfiguration functionality of an IC may be used to build reconfigurable application platforms that enable application execution on the IC. These apps may include partial reconfiguration bitstreams that allow ease of access to programming without cumbersome compilation via a set of complex tools. The apps may be acquired via a purchasing website or other mechanism, where the bitstreams may be downloaded to the IC, thus increasing usability of the IC as well providing addition revenue streams.
US09584124B2 Semiconductor device
A semiconductor device may include a first channel provided in a first die. The semiconductor device may include a second channel provided in a second die and disposed adjacent to the first channel, and configured to exchange signals and data with the first channel. The first channel and the second channel may receive and output calibration-related signals from and to each other through bonding, and may share calibration start signals. The calibration start signal may be respectively generated in the first channel and the second channel.
US09584123B2 Systems and methods for voltage level shifting in a device
Level shifters are disclosed for high performance sub-micron IC designs. One embodiment is a level shifting device that comprises a first input circuit that toggles a first internal signal between a logical zero of a first voltage range and a logical one of a second voltage range based on an input data signal and an output data signal, and a second input circuit that toggles a second internal signal between a logical zero of the second voltage range and a logical one of the first voltage range based on the input data signal and the output data signal. An output circuit of the device toggles the output data signal between a logical zero of the second voltage range and a logical one of the second voltage range based on the first internal signal, the second internal signal, and a compliment of the input data signal.
US09584121B2 Compact design of scan latch
A MOS device includes a first latch configured with one latch feedback F and configured to receive a latch input I and a latch clock C. The first latch is configured to output Q, where the output Q is a function of CF, IF, and IC, and the latch feedback F is a function of the output Q. The first latch may include a first set of transistors stacked in series in which the first set of transistors includes at least five transistors. The MOS device may further include a second latch coupled to the first latch. The second latch may be configured as a latch in a scan mode and as a pulse latch in a functional mode. The first latch may operate as a master latch and the second latch may operate as a slave latch during the scan mode.
US09584115B2 Duty cycle-controlled load switch
A switch includes a power transistor configured to switch an input voltage to a load. The switch further includes a charge pump and a duty cycle controller. The charge pump is coupled to the power transistor and includes an enable input to cause the charge pump to be turned on and off. The duty cycle controller is coupled to the charge pump and is configured to duty cycle the charge pump based on a comparison of a signal of a gate of the power transistor to a reference signal.
US09584106B2 Semiconductor integrated circuit apparatus
A semiconductor integrated circuit apparatus may include a clock-distributing unit, an internal circuit unit and an output-controlling unit. The clock-distributing unit may drive an input clock to output a distribution clock. The internal circuit unit may generate an internal circuit output signal in response to an input signal and the distribution clock. The output-controlling unit may select one of the input clock and the distribution clock in response to a clock selection signal and an output selection signal. The output-controlling unit may synchronize the internal circuit output signal with a clock selected between the input clock and the distribution clock or bypass the internal circuit output signal to output an output signal.
US09584104B2 Semiconductor device and method of operating a semiconductor device
A semiconductor device comprising a substrate and an electronic circuit thereon is described. The electronic circuit comprises a first voltage provider node, a second voltage provider node, and an intermediary node connected to the first and second voltage provider node by a first and second network with a first and second resistance, respectively. The substrate is susceptible to conducting a substrate current. The semiconductor device further comprises a substrate current sensor. The first network is arranged to reduce the first resistance in response to the substrate current sensor signaling an increase of the substrate current and vice versa. Similarly, the second network is arranged to reduce the second resistance in response to the substrate current sensor signaling an increase of the substrate current and vice versa.A method of operating a semiconductor device is also disclosed.
US09584101B2 Rapid transition schmitt trigger circuit
A small-sized rapid transition Schmitt trigger circuit for use with a silicon-on-insulator process includes: a first NMOS transistor, a first PMOS transistor, a second NMOS transistor, a second PMOS transistor, and a PMOS/NMOS body control circuit; wherein, the PMOS/NMOS body control circuit is configured to, through changing threshold voltages of the first NMOS transistor and the first PMOS transistor, enable different flip-flop threshold voltages for input transitions from high electrical levels to low electrical levels and from low electrical levels to high electrical levels.
US09584098B2 Sample clock generator for optical tomographic imaging apparatus, and optical tomographic imaging apparatus
A sample clock generator includes a first optical path and a second optical path through which input lights are guided, an optical phase shifter to shift a phase of the input light guided through the first optical path, an interference-light generating unit to combine a phase-shifted input light and the input light guided through the second optical path to thereby generate an interference light for sample clock, a splitting unit to split the interference light for sample clock into two split lights having different phases, one light receiving unit to at least receive one split light from among the two split lights having different phases, the other light receiving unit to at least receive the other split light, a signal generating unit to generate a sample clock signal based on signals outputted from the one light receiving unit and the other light receiving unit.
US09584097B2 System and method for a switchable capacitance
In accordance with an embodiment, a switchable capacitance circuit includes a plurality of capacitance-switch cells that each have a capacitance circuit having a capacitance between a first terminal and a second terminal of the capacitance circuit, and a semiconductor switching circuit including a first terminal coupled to the first terminal of the capacitance circuit, a plurality of series connected radio-frequency (RF) switch cells having a load path and a common node. Each of the plurality of series connected RF switch cells has a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the common node. The switchable capacitance circuit also includes a resistance circuit having a first end coupled to the common node and a second end coupled to a control node.
US09584096B2 Apparatus and methods for digital step attenuators with low phase shift
Apparatus and methods for digital step attenuators are provided herein. In certain configurations, a digital step attenuator (DSA) includes a plurality of DSA stages arranged in a cascade between an input terminal and an output terminal. Each of the DSA stages can be operated in an attenuation mode or in a bypass mode. The DSA further includes an attenuation control circuit, which can be used to control the modes of operation of the DSA stages. The attenuation control circuit can be used to operate the DSA over a plurality of attenuation steps, which can be digitally selectable. To provide low phase shift across the range of attenuation steps, a DSA stage can include one or more phase compensation capacitors used to provide low phase shift and to compensate for a phase difference between the DSA stage operating in the bypass mode and in the attenuation mode.
US09584091B2 Wireless communication device and method of adjusting antenna matching
A wireless communication device includes a diversity antenna operating in a receiving frequency band to receive a receiving signal in the reception frequency band, a tunable matching circuit for adjusting a matching of the diversity antenna according to a control signal, a detection circuit for detecting a wireless communication system corresponding to the receiving signal to generate a detection result, wherein the detection result indicates an antenna configuration and a transmission frequency band corresponding to the wireless communication system, and a radio-frequency processing circuit for determining whether to adjust the matching of the diversity antenna to weaken antenna performance of the diversity antenna in both or one of the transmission frequency band and the reception frequency band according to the antenna configuration so as to improve an isolation between the diversity antenna and a main antenna.
US09584090B2 RF impedance matching network
An RF impedance matching network includes a transformation circuit coupled to an RF input and configured to provide a transformed impedance that is less than a fixed source impedance; a first shunt circuit in parallel to the RF input, the first shunt circuit including a first shunt variable component providing a first variable capacitance or inductance; and a first virtual ground coupled to the first shunt variable component and a ground; and a second shunt circuit in parallel to the RF input and, the second shunt circuit including a second shunt variable component providing a second variable capacitance or inductance; and a second virtual ground coupled to the second shunt variable component and the ground.
US09584089B2 Nested multi-stage polyphase filter
A nested multi-stage polyphase filter can comprise: a first filter stage and a second filter stage. The first filter stage can be connected to the second filter stage via first through fourth intermediate connections. The first filter stage and the second filter stage can be laid out in a nested-ring layout. The first through fourth intermediate connections can be laid out so as to not cross over each other.
US09584088B2 Method for manufacturing acoustic wave device
A method for manufacturing an acoustic wave device with an excellent frequency-temperature profile is performed such that the acoustic wave device produced includes a piezoelectric substrate, an IDT electrode located on the piezoelectric substrate, and a dielectric film mainly including Si and O and arranged on the piezoelectric substrate to cover the IDT electrode. The dielectric film is formed by sputtering in a sputtering gas containing H2O.
US09584085B2 Amplifying system
An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive. In some embodiments the first gain stage is configured to provide RF degeneration control of gain.
US09584084B2 Audio output device and control method
An audio output device includes a voltage detection unit, a processing unit, a voltage detection unit, an alarm unit and an audio output unit. The voltage detection unit is utilized for detecting a voltage level of an audio signal to generate a detection result. The processing unit is utilized for determining whether the voltage level of the audio signal is greater than a threshold value according to the detection result and accordingly generating a control signal. The volume adjustment unit is utilized for adjusting the audio signal to generate an adjusted audio signal according to the control signal. The alarm unit is utilized for outputting a first alarm signal to implement an alarm function according to the control signal. Then audio output unit is utilized for playing the adjusted audio signal according to the control signal.
US09584082B1 Systems and methods for supply-based gain control of an audio output signal
An audio device may include an electrical terminal for coupling a transducer device to the audio device and an audio circuit for generating an analog audio signal coupled to the electrical terminal. The audio circuit may include a pre-amplifier stage, an amplifier, and a gain selector. The pre-amplifier stage may apply a selectable gain to an audio input signal to generate a pre-amplified analog audio signal, wherein the pre-amplifier stage is powered by a first power supply. The amplifier may amplify the pre-amplified analog audio signal to generate the analog audio signal, wherein the amplifier is powered from a second power supply isolated from the first power supply. The gain selector may select the selectable gain based on a level of the first power supply, such that a difference between the second power supply and the analog audio signal is more than a predetermined headroom threshold voltage.
US09584074B2 Optical receiver with automatic distortion cancellation
An optical receiver includes closed-loop composite second order (CSO) distortion correction logic. An optical communication system includes a transmitter comprising open-loop composite second order (CSO) distortion correction logic, and a receiver comprising closed-loop composite second order (CSO) distortion correction logic.
US09584072B1 DC bias regulator for cascode amplifier
An amplifier having a pair of transistors arranged in a cascode amplifier arrangement serially connected to a first voltage source. A DC bias regulator is provided having: a DC bias circuit for producing a reference voltage at a control electrode of a first one of the pair of transistors: and a voltage combiner having a pair of inputs, a first of the pair of inputs being coupled to the reference voltage and a second one of the pair of inputs being coupled to the first voltage source. The DC bias regulator produces a DC bias voltage at a control electrode of a second one of the pair of transistors related to a combination of the reference voltage and the first voltage source.
US09584063B2 Concentrating photoelectric conversion device
The present disclosure provides a concentrating photoelectric conversion device that can efficiently obtain a power generation amount even if a deflection and a strain are generated. A position shift detection element group (7A, 7B, 7C, and 7D) includes some photoelectric conversion elements in a plurality of photoelectric conversion elements (7n). Some photoelectric conversion elements are disposed with centers of light receiving regions (100) of the photoelectric conversion elements being shifted from a center of a focused spot (300) in upward, downward, rightward, and leftward directions by a predetermined distance in a state where the light receiving surface of the power generation panel is opposite to light. The position shift detection element groups are provided in at least three places on the light receiving surface of the power generation panel to correct a light tracking orbit.
US09584060B2 Motor, method for driving motor, and drive controller for motor
A motor includes a two-layer rotor and a two-layer stator. The two layer rotor includes an A-phase rotor and a B-phase rotor that are stacked together. When θ1 represents, in electric angle, an angle of the B-phase stator relative to the A-phase stator in a clockwise circumferential direction, and θ2 represents, in electric angle, an angle of the B-phase rotor relative to the A-phase rotor in a counterclockwise circumferential direction, θ1+|θ2|=90° is satisfied.
US09584058B2 System and method for estimating temperature of rotor of motor
A system and method are provided for estimating temperature of a rotor of a motor configured to calculate temperature of the rotor using an actual measured data-based thermal model (thermal impedance model) and an energy loss model, and to estimate temperature of the rotor using the calculated temperature variation of the rotor. The method includes calculating, by a controller, an energy loss of the motor using driving conditions of the motor. The controller is also configured to calculate a temperature variation of the rotor in a predetermined reference temperature using the calculated energy loss and thermal resistances of the rotor and a stator of the motor. Further, the controller is configured to estimate a rotor temperature in the predetermined reference temperature using the temperature variation of the rotor.
US09584053B2 Vehicle control system
A SBW-ECU prohibits driving of an electric motor by turning off power supply to the motor by a drive prohibition device, when a diagnosis part of a by-wire control circuit determines that a shift-by-wire system is abnormal or a monitor circuit determines that the by-wire control circuit is abnormal. In this case, the motor is stopped from rotating by execution of power supply phase fixation processing, by which a power supply phase of the motor is fixed without switchover, when the motor is driven to rotate at the time of determination of abnormality of the shift-by-wire system. Then the prohibition device prohibits driving of the motor by stopping the power supply to the motor.
US09584052B2 Driving system, apparatus and method for spindle motor
A driving method for a spindle motor and associated driving system and apparatus are provided. The driving method includes the following steps. Plural modulation signals and plural floating phases corresponding to the plural modulation signals are adjusted. A floating period comes immediately after an active period of each of the plural modulation signals according to the plural floating phases. During the floating period, a demagnetization time of the spindle motor is acquired according to a first terminal voltage signal at a first terminal of the spindle motor. If the demagnetization time is not smaller than the threshold time period, the step of adjusting the plural modulation signals is repeatedly done. Whereas, if the demagnetization time is smaller than the threshold time period, after the demagnetization time, a phase of the spindle motor is obtained according to the first terminal voltage signal.
US09584051B2 Method for estimating the angular position of the rotor of a polyphase rotary electrical machine, and application to the control of a polyphase inverter for such a machine
According to the method of the invention, the estimation of the angular position is obtained by calculating at least one first estimator as solution of a differential algebraic equation whose coefficients depend on electric parameters of the rotating electric machine comprising first and second inductances of a stator respectively along a direct axis and a quadrature axis with respect to a magnetic flux produced by the rotor of the machine, a resistance of a phase winding and the magnetic flux produced by the rotor. The coefficients also depend on a reference voltage of a vector pulse width modulation (10) applied to the stator of the machine, on phase currents and on first derivatives with respect to time of these phase currents. The estimation of the speed of rotation is obtained by calculating a second estimator obtained by a calculation of first derivative of the first estimator with respect to time.
US09584049B2 Motor driving control method and motor driving control device
An H-bridge circuit controls a motor and includes a first series circuit of switching elements and a second series circuit of switching elements connected in parallel to the first series circuit. A motor driving control method includes a step of turning each of the switching elements Q2, Q3 off and turning-on or performing PWM control on the switching element Q1 and also turning the switching elements Q4 on; a step of performing PWM control on Q1; a step of turning off Q1; a step of repeating for a predetermined number of times a first kickback suppression period during which Q2 is turned on and Q4 is turned off and a second kickback suppression period during which Q2 is turned off and Q4 is turned on; and a step of turning Q2 on and turning on or performing PWM control on Q3.
US09584047B2 Bidirectional power converter having a charger and export modes of operation
A bidirectional power converter that can be used in an electric vehicle to perform AC to DC power conversion to charge the electric vehicle's battery and to perform DC to AC power conversion to export power to run external electrical loads is described. The bidirectional power converter may include an AC interface coupled to a cyclo-inverter circuit, and a DC interface coupled to a H-bridge circuit. The cyclo-inverter can be electrically coupled to the H-bridge circuit through a transformer. The bidirectional power converter may include a neutral terminal on the AC interface that is coupled to the transformer through a filtering inductor.
US09584043B2 Inverter phase current reconstruction apparatus and methods
Methods and apparatus are presented for sampling low side inverter phase currents, in which current sampling is selectively delayed in a given PWM cycle by a non-zero sampling delay time value from a nominal sample time if the middle pulse width value is less than a non-zero first threshold to facilitate adequate signal settling for accurate current measurement, and if a middle total continuous on-time near the end of the given PWM cycle is less than a non-zero second threshold, the middle total continuous on-time is selectively extended by adding a non-zero adjustment offset time value to a middle pulse width value for a next PWM cycle.
US09584041B2 Method and apparatus for charging devices using a multiple port power supply
A method and apparatus charge devices using a multiple port power supply. The apparatus can include a power supply. The apparatus can include a first device charging port coupled to the power supply. The first device charging port can receive power from the power supply and output power to a first device. The apparatus can include a second device charging port coupled to the power supply. The second device charging port can receive power from the power supply and output power to a second device. The apparatus can include a device charging port monitor coupled to the first device charging port and coupled to the second device charging port. The device charging port monitor can detect a number of device charging ports in use. The apparatus can include a cable compensator coupled to the device charging port monitor. The cable compensator can select a first cable compensation if one device charging port is in use and can select a second cable compensation if two device charging ports are in use.
US09584040B2 Double-rectifier for a multi-phase contactless energy transmission system
A secondary-side rectifier of an inductive n-phase energy transmission system with N greater than or equal to 3, the energy transmission system including in each phase a resonant oscillating circuit, each resonant oscillating circuit including at least one inductor and at least one capacitor wherein secondary-side resonant oscillating circuits are magnetically coupleable to primary-side resonant oscillating circuits, wherein the secondary-side resonant oscillating circuits are star-connected or mesh-connected and are connected to a rectifier via external conductors, wherein the rectifier includes a series connection of a plurality of diodes with identical conducting directions, wherein a smoothing capacitor is connected in parallel with the series connection and an output voltage of the rectifier is applied to connecting points of the smoothing capacitor wherein each external conductor is connected to an anode of the diodes.
US09584037B2 Current signal generator and method of implementing such a generator
A generator for providing regulated current signals, to terminals of a load includes: a plurality of secondary stages, including a direct voltage source insulated from those of other stages, connected in series between the midpoint of the second half-bridge of each secondary stage and the midpoint of the first half-bridge of the next secondary stage, the load terminals being respectively connected to the midpoint of the first half-bridge of a first secondary stage, and to the midpoint of the second half-bridge of a last secondary stage; and a control circuit capable of: selecting a group of secondary active stages, and at least one regulating stage; simultaneously controlling each active stage, except the regulating stage, at the frequency of the current slots; controlling the regulating stage according to a frequency higher than the previous one; and controlling the switches of the non-selected secondary stages to insulate their voltage source.
US09584031B2 Power supply with configurable controller with combination input/output line
Embodiments described herein describe a power supply configured to provide power to an output load via a power supply transformer. The power supply includes a controller configured to operate in a configuration state and an operating state. During the configuration state, the controller receives a configuration signal from a sense circuit coupled to the controller and selects one of a plurality of operating modes from the configuration signal. During the operating state, the controller controls a switch coupled to the transformer based on the selected operating mode and a sense signal received from the sense circuit representative of the power provided to the output load by the power supply. When the switch is closed, current flows from a power source through the transformer, and when the switch is open, current is prevented from flowing from the power source through the transformer.
US09584029B2 Multi-mode control for a DC-to-DC converter
An apparatus includes a voltage regulation module that controls output voltage of a bidirectional DC to DC converter to an output voltage reference over an output current range between a positive power reference and a negative power reference. A positive power regulation module controls output power of the converter to the positive power reference over a positive constant power range between the output voltage reference and a positive output current reference. A negative power regulation module controls output power of the converter to the negative power reference over a constant power range between the output voltage reference and a maximum negative power limit, and a constant current module limits output current to a positive output current reference in a range between a minimum output voltage and output power of the converter reaching the positive power reference.
US09584028B2 Apparatus, system and method for cascaded power conversion
An apparatus, method, and system are provided for power conversion to supply power to a load such as a plurality of light emitting diodes. An exemplary apparatus comprises: a first power converter stage having a first power switch and a first inductive element; a second power converter stage having a second power switch and a second inductive element; a plurality of sensors; and a controller. The second power converter stage provides an output current to the load. The controller is adapted to use a sensed input voltage to determine a switching period, and is further adapted to turn the first and second power switches into an on-state at a frequency substantially corresponding to the switching period while maintaining a switching duty cycle within a predetermined range.
US09584024B2 Metal working power supply converter system and method
A power supply for welding, cutting and similar operations includes a dual two-switch forward converter. The converter has two inverter circuits coupled in parallel but controlled to provide output power in an interleaved fashion. To avoid “walking” of the circuits (which could result in different duty cycles and imbalance of the load sharing), control signals are determined and applied to a first of the inverter circuits, and “on” times of the first circuit is monitored, such as by augmenting a counter to determine the number of clock cycles the first circuit is “on”. The same duration is then used for commanding output from the second inverter circuit. The duty cycles of both circuits is thus ensured to be the same regardless of changes in the total output power.
US09584021B2 Systems and methods for enhanced efficiency auxiliary power supply module
Provided is a power supply for use in a solar electric production system, including: a first stage having an input connected to a voltage from a photovoltaic panel and an output providing a first voltage different from the voltage from the photovoltaic panel; and a second stage connected to the output of the first stage, the second stage supplying power at a second voltage to a micro-controller, where the output of the first stage is turned on and stable for a period of time before the second stage is turned on to supply the power at the second voltage to the micro-controller.
US09584017B1 Input and output overvoltage protection in a power converter
A controller for use in a power converter includes a gate drive circuit coupled to generate a control signal to switch a power switch of the power converter. A zero current detection circuit is coupled to a multifunction pin coupled to receive a multifunction signal that is representative of an input voltage of the power converter when the power switch is on, and representative of an output voltage of the power converter when the power switch is off. The zero current detection circuit is coupled to generate a zero current detection signal. An overvoltage detection circuit is coupled to receive the multifunction signal and a state signal representative of a state of the power switch to generate in response to the state signal and the multifunction signal a line overvoltage signal and an output over voltage signal coupled to be received by the gate drive circuit.
US09584009B2 Line current reference generator
The invention generally relates to the field of power factor correction and specifically to generation of a reference waveform which is proportional to line voltage and is controllable in amplitude.
US09584007B2 Current source converter differential protection method and relay protection device
Embodiments of the present invention disclose a current source converter differential protection method, including: sampling, by a relay protection device, secondary side currents of current transformers on two sides of a protected current source converter, to obtain incomer-side three-phase currents, and outgoer-side three-phase currents; rectifying the incomer-side three-phase currents and the outgoer-side three-phase currents, to obtain an incomer-side input current and an outgoer-side output current which are equivalent; converting the incomer-side input current and the outgoer-side output current according to a current ratio of the current transformers on the two sides, to acquire a transient differential current and a transient restraint current; acquiring a differential current and a restraint current according to the transient differential current and the transient restraint current; and achieving differential protection according to the differential current and the restraint current. The embodiments of the present invention further disclose a relay protection device correspondingly.
US09584004B2 Regenerative power supply system and method
A regenerative power supply system and method comprises a dynamo-electric generator, an electric drive motor coupled to the generator, a transmission device coupling the generator to the electric drive motor, and an energy storage device configured to provide a backup power supply to the regenerative power supply system. An electronic control device is configured to control a flow of electricity to the electric drive motor. An energy storage management device is configured to control a flow of electricity between the electronic control device and the energy storage device.
US09584001B2 Vibration actuator
A vibration actuator includes: a movable element that has a magnet and moves reciprocatingly in a rectilinear manner; first and second coil sections arranged so as to surround the magnet; a housing for accommodating the movable element and the first and second coil sections; and a weight attached to the housing.
US09583990B2 Electrical motor
An electrical motor that includes a circular stator attached to an inner side of a housing and a rotor disposed at an inner side of the stator in a radial direction, the electrical motor includes: a terminal connected to a power supply cable drawn from a coil of the stator; a terminal box that is attached to the housing and stores the terminal; and an insulating material that is disposed between the terminal box and the terminal and separable from the terminal.
US09583984B2 Rotator member to be fixed to rotary shaft of rotary electric machine, rotator including rotator member, and method for manufacturing rotary electric machine and rotator
A rotator member 300 includes a tubular sleeve 301 having a first end surface and a second end surface, a plurality of magnet segments 311 circumferentially disposed at a radially outside of the sleeve 301, and a tubular member 321 adapted to cover the magnet segments 311 from a radially outside to hold the magnet segments 311 between the tubular member 321 and the sleeve 301. The sleeve 301 has an inner circumference surface that includes a tapered surface that gradually and outside the radial direction expands in a direction from the first end surface toward the second end surface.
US09583983B2 Electric motor assembly and method
An electric motor assembly includes a housing and a stator. The housing includes an outer housing surface, an inner housing surface defining an interior housing cavity, and a plurality of housing protrusions extending from the inner housing surface. The stator is disposed in the inner housing cavity and includes an outer stator surface, an inner stator surface, and a plurality of stator protrusions extending from the outer stator surface toward the outer housing surface. The stator protrusions are configured to mate with the housing protrusions to frictionally couple the stator to the housing in order to fix the stator relative to the housing.
US09583982B2 Axial flux stator and method of manufacture thereof
An axial flux stator includes a plurality of magnetically permeable members, a plurality of windings, a back iron, and an encasing. The plurality of windings is associated with the plurality of magnetically permeable members to produce a plurality of winding-magnetically permeable member assemblies. The back iron is mechanically butt joint coupled to the plurality of winding-magnetically permeable member assemblies. The encasing maintains the butt joint coupling of the back iron to the plurality of winding-magnetically permeable member assemblies.
US09583981B2 Armature assembly, armature ring segment and an armature handling appartus for a generator having insertion interface elements for mounting to complementary receiving interface elements
An armature assembly comprising an armature body and a number of armature ring segments mounted on the armature body, wherein the armature assembly comprises a number of insertion interface elements and a number of complementary receiving interface elements for mounting an armature ring segment onto the armature body; whereby an insertion interface element is realized to engage with a complementary receiving interface element in a direction essentially parallel to a rotation axis of the armature; and wherein an insertion interface element is formed as an integral part of the armature body or as an integral part of an armature ring segment. A method of assembling an armature is also described, and a wind turbine comprising such an armature assembly is provided.
US09583979B2 Powering a fixture from AC and DC sources
A system comprises a fixture and a controller that is configured to power the fixture from an alternating current (AC) source and a direct current (DC) source. The controller is configured to automatically switch from powering the fixture from the DC source to powering the fixture from the AC source in response to a time of day. Related systems, methods and computer program products are described.
US09583972B2 Apparatus and method for reducing power consumption of electronic product
Provided is an apparatus and method for reducing power consumption of an electronic product. The apparatus and method reduces unnecessary power consumption by cutting off power for driving a load if a predetermined control condition is satisfied in an electronic product operating for a long time. In the electronic product operating for a long time, power for driving the load is cut off to prevent waste of the power if the predetermined control condition is satisfied, and the load is driven only when the predetermined control condition is not satisfied, thereby efficiently reducing the power consumption of the electronic product.
US09583970B2 Wireless power transfer and rapid charging system and method with maximum power tracking
A wireless power transfer and rapid charging system with maximum power tracking and a method for the same are revealed. The system includes a transmitter device and a receiver device. First the transmitter device performs maximum power tracking and outputs a fixed resonant frequency. Now the receiver device charges a battery. A voltage detection circuit of the receiver device is detecting charging state of the battery. A high-frequency receiving circuit of the transmitter device checks whether a high-frequency transmission circuit transmits a fully-charged signal. When the high-frequency receiving circuit of the transmitter device receives the fully-charged signal that represents the battery is fully charged, the transmitter device shuts down the power and enters standby mode. Thereby wireless charging can be carried out in different environments. The greater transfer distances, lower output impedance, and higher wireless transmission efficiency can be achieved. The speed of wireless charging is also increased.
US09583966B2 Power transmission device, and power transmitter and power receiver for the same
A power transmission device performs contactless power transmission from a power transmitter to a power receiver. The power transmitter includes a main body supporting the power receiver by first and second surfaces that are disposed adjacent to each other, a power transmitting coil disposed within the main body and having a first coil portion corresponding to the first surface and a second coil portion corresponding to the second surface, and a power source supplying power to the power transmitting coil. The power receiver includes a main body having a third surface and a fourth surface opposed to the first and second surfaces, respectively, and a power receiving coil disposed within the main body and having a third coil portion corresponding to the third surface and a fourth coil portion corresponding to the fourth surface.
US09583965B2 Device and method for controlling charging path of mobile terminal
A device and method for controlling a charging path of a mobile terminal are provided. The charging path control device of a mobile terminal includes a power supply unit touch screen uniting a battery. The charging path control device also includes a charging unit configured to charge the battery by wire from an external power source and charge the battery by wireless from the external power source. The charging path control device also includes a controller configured to control a charging path to one of a wire charging path, wireless charging path, and wired and wireless simultaneous charging path based on a charge efficiency level to perform charge through the charging unit.
US09583963B2 Apparatus and method of matching in a source-target structure
Provided is a source-target structure matching controlling apparatus and method that may perform matching control of a source-target structure while resonance power is transmitted and received through the source-target structure. The source-target structure matching controlling apparatus may include a target resonator to receive, from a resonance power transmitter, the resonance power through a magnetic-coupling, and a rectifier to rectify the resonance power to generate a DC voltage, and provide the DC voltage to a load. The source-target structure matching controlling apparatus may detect an impedance of the load and a variance in the impedance, and may transmit, to the resonance power transmitter, information associated with the variance in the impedance of the load.
US09583956B2 Charging device, method for controlling charging device and method for detecting peripheral device
A charging device, a method for controlling a charging device, and a method for detecting a peripheral device are provided. The charging device comprises: a charging gun; a power module; and a controlling module coupled with the charging gun and the power module, wherein the controlling module is configured to determine whether the charging gun is connected with a peripheral device to be charged, and if yes, to control the power module to convert AC electricity to DC electricity to charge the peripheral device. A method for controlling a charging device is also provided. The method comprises: determining whether the charging gun is connected with a peripheral device; and if yes, controlling the power module to convert AC electricity to DC electricity to charge the peripheral device if the charging gun is determined to be connected to the peripheral device.
US09583953B2 Wireless power transfer for portable enclosures
Exemplary embodiments are directed to portable wireless charging. A portable charging system may comprise at least one antenna positioned within a portable enclosure. The at least one antenna may be configured to receive power from a power source and wirelessly transmit power to a receive antenna coupled to a chargeable device positioned within a near-field of the at least one antenna.
US09583950B2 Method and system for maximum achievable efficiency in near-field coupled wireless power transfer systems
Methods and systems for maximum achievable efficiency in near-field coupled wireless power transfer systems may comprise, for example, configuring coil geometry for a transmit (Tx) coil and a receive (Rx) coil based on a media expected to be between the coils during operation. A desired susceptance and conductance may be determined and an impedance of an amplifier for the Tx coil may be configured based on the determined susceptance and conductance. A load impedance for the Rx coil may be configured based on the determined susceptance and conductance. A matching network may be coupled to the amplifier. The Rx coil may be integrated on a complementary metal-oxide semiconductor (CMOS) chip. One or more matching networks may be integrated on the CMOS chip for the configuring of the load impedance for the Rx coil.
US09583948B2 Isolated digital transmission with improved EMI immunity
Embodiments of the present invention may provide a circuit. The circuit may include a primary side, a secondary side, and an isolated energy transfer device electrically isolating the primary side and the secondary side. The primary side may include a first energy storage device coupled to a power source, a control system coupled to the first energy storage device for power, a second energy storage device, and a coupling system, coupled to the control system, to selectively couple the second energy storage device to the power source in a first phase and to selectively couple the second energy storage device to the primary side of the isolated energy transfer device during a second phase.
US09583947B2 Method of distributing electrical power to electrical outlets in a transport vehicle and an associated computer program
A method of distributing electric current to electrical outlets, and a program to implement same, including the steps of supplying electric current to the electrical outlets not yet connected to an electronic device upon receipt of a distribution request from the electrical outlets; determining the instantaneous current intensity supplied to the electrical outlets; comparing the determined current intensity to a threshold referred to as the maximum threshold; and when the predetermined current intensity is greater than the maximum threshold, selecting an electrical outlet and terminating the supply of electric current to the selected electrical outlet. The steps of selection and termination being carried out while continuing the step of supplying electric current to the electrical outlets not yet connected to an electronic device upon receipt of a distribution request from the electrical outlets.
US09583940B2 Sequentially operated modules
Method, modules and a system formed by connecting the modules for controlling payloads are disclosed. An activation signal is propagated in the system from a module to the modules connected to it. Upon receiving an activation signal, the module (after a pre-set or random delay) activates a payload associated with it, and transmits the activation signal (after another pre-set or random delay) to one or more modules connected to it. The system is initiated by a master module including a user activated switch producing the activation signal. The activation signal can be propagated in the system in one direction from the master to the last module, or carried bi-directionally allowing two way propagation, using a module which revert the direction of the activation signal propagation direction. A module may be individually powered by an internal power source such as a battery, or connected to external power source such as AC power. The system may use remote powering wherein few or all of the modules are powered from the same power source connected to the system in a single point. The power may be carried over dedicated wires or concurrently with the conductors carrying the activation signal. The payload may be a visual or an audible signaling device, and can be integrated within a module or external to it. The payload may be powered by a module or using a dedicated power source, and can involve randomness associated with its activation such as the delay, payload control or payload activation.
US09583937B2 Low-, medium-, or high-voltage switchgear
A low-, medium-, or high-voltage voltage switchgear with a circuit breaker or circuit breakers is disclosed which can switch electrical equipment. To protect the switchgear, and the circuit breakers in the switchgear against so called spot welding under vacuum atmosphere, such as during a closing operation of a switchgear used, for example, for switching capacitive or inductive equipment or inductive or capacitive current network an inrush current limiter is placed electrically in line or in series with the current path of the circuit breaker.
US09583934B2 Excitation inrush current suppression device
According to one embodiment, an excitation inrush current suppression device for suppressing excitation inrush currents flowing through a breaker of the three-phase collective operation type for opening and closing connection is configured to measure a three-phase AC voltage of the power supply bus bar to calculate prospective magnetic fluxes of the transformer, and to measure a three-phase AC voltage on the transformer side to calculate residual magnetic fluxes of the transformer after shutoff, so as to set the breaker closed when polarities of the prospective magnetic fluxes respectively agree with polarities of the residual magnetic fluxes in all of the phases respectively.
US09583929B1 Interruptible universal wall box and methods of use thereof
An electrical wall box having plurality of wire power terminals on exterior of electrical wall box, wire power terminals are electrically connected to one of plurality of insulated distribution busses within electrical wall box, each distribution buses having one or more interrupt bus switches electrically connected therein; each distribution buses has first quick connect terminal electrically connected thereto one distribution buses; wherein electrical wall box further includes plurality of switch wiring terminals on an exterior of electrical wall box, each plurality of switch wiring terminals includes insulated electrical tap connecting one switch wiring terminals to one plurality of internal insulated distribution busses or to quick connect terminal within electrical wall box; one or more pluggable electrical receptacles, each one or more pluggable electrical receptacles includes two or more second quick connect terminals to electrically connect thereto one of said one or more first quick connect terminals; and cover plate.
US09583928B2 Mounting structure of electronic component
A mounting structure of an electronic component includes an electronic component, a housing member, a counterpart terminal, and at least one locking mechanism. The electronic component includes: an electronic component main body; a housing formed by assembling a casing member in which a chamber for the electronic component main body is formed and a base member to which the electronic component main body is attached; and a terminal exposed from the chamber to outside of the housing. The housing member includes a housing space including: a first chamber that accommodates the housing; and a second chamber that accommodates a terminal. The counterpart terminal is fitted into the second chamber and electrically coupled to the terminal. The locking mechanism maintains the accommodation state of the electronic component to the housing member by engaging a first engaging part and a second engaging part.
US09583927B2 Trim plate with retractable hook arm
A trim plate is disclosed that includes a base plate, a folding hook arm pivotally attached to the base plate, and a weight-bearing truss that supports the folding hook arm. A first end of the weight bearing truss is pivotally connected to the hook arm at about the middle of the hook arm and the second end of the truss is positioned in a primary slot in the base plate. Two secondary slots in the base plate are positioned on either side of the primary slot, and pins extend perpendicularly from the base plate end of the truss and fit in the secondary slots for sliding therein whenever the hook arm is open or closed.
US09583922B2 Multi level cable bus system with modular cable trays
A cable bus system for the mounting and positioning of high amperature, from low to high voltage electrical power cables transmitting polyphase electrical current. The cable bus system included a ventilated enclosure used to protect electrical cables mounted therein. The enclosure is provided with multiple modular cable trays which are bolted together in a stacked arrangement to form a single multi-level cable raceway. The enclosure is further provided with ventilated top and bottom covers which are secured respectively to the top and bottom of the uppermost and bottom most cable trays to define the enclosed metal circuit. The cable bus system is capable of transmitting the same highest allowable “free air” cable amperature in both above and underground installations, effectively improving the transmission of electrical power from one end to the other end, in installations where a transition of electrical power from below ground to above ground is either necessary or economically preferable. For the underground portion, the cable bus is installed in the encasement that is uniquely offset vented or power cooled to meet the cable high amperage requirements. The cable bus system is also suitable for high vertical rise installations when utilizing anti cable slip mechanism or technique.
US09583916B2 Alumina sintered body and spark plug using the same
An alumina sintered body has a main phase made of alumina crystals, a first dispersed phase made of MgAl2O4 dispersed in the main phase, and a second dispersed phase made of SiO2 and/or CaO dispersed in the main phase. A content ratio of the main phase is within a range from not less than 98% to less than 98%. The alumina sintered body satisfies a relationship of 100×I2/I1≧5.5%, where I1 indicates a maximum peak height intensity derived from alumina, and I2 indicates a maximum peak height intensity derived from MgAl2O4 in a X-ray diffraction of the alumina sintered body. An area ratio of the second dispersed phase on a surface of the alumina sintered body is not more than 15.2%. A spark plug has a central electrode, a ground electrode and an insulator made of the alumina sintered body having the specific features previously described.
US09583913B1 Tunable laser with integrated wavelength reference
In the prior art, tunable lasers utilizing silicon-based tunable ring filters and III-V semiconductor-based gain regions required the heterogeneous integration of independently formed silicon and III-V semiconductor based optical elements, resulting in large optical devices requiring a complex manufacturing process (e.g., airtight packaging to couple the devices formed on different substrates, precise alignment for the elements, etc.). Embodiments of the invention eliminate the need for bulk optical elements and hermetic packaging, via the use of hybridized III-V/silicon gain regions and silicon optical components, such as silicon wavelength filters and stabilized wavelength references, thereby reducing the size and manufacturing complexity of tunable lasing devices.
US09583909B2 Temperature controllable gas laser oscillator
A gas laser oscillator according to the present invention comprises a resonator unit, a heat exchanger through which a fluid exchanging heat with a laser gas flows, a chiller for cooling the fluid in the heat exchanger and supplying the fluid to the heat exchanger, and a heat transfer device for transferring heat of the fluid to the resonator unit. The gas laser oscillator further comprises a first flow path for supplying the fluid used for cooling the laser gas in the heat exchanger to the heat transfer device, a second flow path for supplying the fluid cooled by the chiller to the heat transfer device prior to supplying the fluid to the heat exchanger, and a switching valve for switching either one of a first flow path and a second flow path.
US09583908B2 Pulsed iodine laser apparatus
The disclosed invention relates to a pulsed iodine laser apparatus. The laser apparatus has a flashlamp-pumped iodine laser oscillator which produces a laser pulse with a full pulse width of longer than 1 microsecond, and a COIL amplifier. The laser apparatus may has a controller which controls the timing of injecting chlorine gas contained in a high-pressure chlorine tank into the singlet oxygen generator by outputting an open/close signal of the valve V2, and the timing of injecting iodine molecules contained in a iodine molecule tank into an amplifier chamber of the COIL amplifier.
US09583902B2 High outlet density power distribution unit
Systems and apparatuses are provided in which outlets are coupled to a power distribution unit (PDU) or PDU module in various configurations. The outlets may be coupled to a recessed surface within a PDU housing. The outlets may be coupled to a printed circuit board that is at least partially disposed within the PDU housing. The outlets may extend away from the recessed surface or printed circuit board towards or beyond a front face of the PDU housing. An end cap can be connected to the outlets that is color coded to indicate an output capacity of the outlet.
US09583900B2 Flippable electrical connector
A plug connector includes a front housing, a first and a second terminal module each including an insulator insert molded with terminals. The front housing defines a rear wall, a front mating cavity opening forwards, and a plurality of terminal passageways running through the rear wall in a front and rear direction and the front housing in a vertical direction a first terminal module, The terminals comprising contacting portions received in the corresponding terminal passageways. The shell fitly encloses the front housing and the insulators. The front housing unitarily defines a plurality of protection flanges, each protection flange is located above a front end of each terminal passageway and each contacting section is located inside the protection flange thereby ensuring the contacting sections separating from the shell during the contacting sections are pushed outwards by an insertion of a mating receptacle connector.
US09583896B2 Connector for medical device
A connector system employs an electromechanical connector to connect to a complementary electromechanical connector on an electronic device in a medical system. A shroud surrounds the electromechanical connector and is conductive and shaped to provide a thermal contact to the electronic device. A shielded cable can be electrically coupled to the electromechanical connector and extending through an opening in the shroud, and an electromagnetic shield attaches to the shroud and surrounds the portion of the shielded cable extending from the shroud. A mechanical lock may be included with a spring to press the shroud against the electronic device when the mechanical lock engages the electronic device.
US09583894B2 Cable signal detector and connectorized communication cable
A cable signal detector includes a detection unit that is provided in a connector attached to an end of a communication cable or in a relay connector to be connected to the connector, and branches, extracts and sends a portion of signal transmitted through the cable, and a visualization unit that is provided separately from the connector or the relay connector and includes a light-emitting circuit to emit a light when receiving the signal sent from the detection unit.
US09583892B2 Aircraft having an avionics system including avionics equipment that has primary lightning protector and is connected in series via wired connection to supplemental lightning protector
An aircraft having an avionics system comprising a plurality of avionics equipment and a system of connections, the avionics equipment incorporating protection means for providing protection against indirect effects of lightning, the system of connections including wired connections and connectors between the wired connections. The avionics system has at least one avionics equipment with protection means that are insufficient for providing total protection against the indirect effects of lightning when the equipment is incorporated in the structure, which equipment is connected to at least one connector including a resistor connected in series relative to at least one wired connection secured to the resistive connector.
US09583890B2 RJ45 connector
There is provided a communication connector for improving signal transmission performance, the communication connector including a cable termination component being sized and configured for selective receipt of a plurality of conductor pairs of a cable; a plurality of slots on said cable termination component, wherein each wire of each of the plurality of conductor pairs may be selectively pressed into one of the plurality of slots; a receptacle component including a plurality of electrical contacts and a plurality of offset-positioned insulation displacement contacts (IDCs), each of the plurality of offset-positioned IDCs being aligned for engaged abutment with a corresponding one of the wires of the plurality of conductor pairs when the cable termination component and the receptacle component are coupled; a printed circuit board; and wherein the offset placement of the IDCs increases the separation distance between IDCs of another receptacle component when a plurality of the receptacle components are adjacent to one another, whereby a signal transmission is improved.
US09583889B2 Cable connector assembly having improved metal shell
A cable connector assembly (100) comprising a cable (300) including a plurality of wires (31) and an electrical connector (200) electrically connected with the cable, the electrical connector including a mating member (1) and a metal shell (4), the mating member including a mating shell (14) made of metal material, the mating shell including a mating portion (141) and a mounting portion (142) having a greater dimension than the mating portion, wherein the metal shell includes a main body (43) and a pair of holding portions (44) extending from a front end of the main body, the holding portions profiling an external surface shape of the mounting portion and fixed to the mounting portion.
US09583884B1 Electrostatic discharge (ESD) safe connector insert
A dissipative insert provided within an electrical connector having multiple connector pins and an outer conductive housing where the insert is configured around the pins within the housing and provides structural integrity thereto and prevents a short circuit between the pins and between the pins and the housing. The insert is comprised of a mixture of a polymer and a conductive material that causes the insert to have a volume resistivity in the range of 1×106-1×1010 ohm-cm. In one embodiment, the conductive material is carbon nanotubes.
US09583882B1 Electrical connector
An electrical connector includes an insulator, a plurality of conducting terminals, and a ground member. The insulator includes an insulating body and a tongue portion extending from one side of the insulating body. The conducting terminals include a plurality of ground terminals and a plurality of signal terminals alternatively arranged. The ground terminals and the signal terminals include a contacting portion, a tail portion, and a main portion. The ground member includes a conducting body and a plurality of extension portions. At least one side of each of the extension portions includes a restriction portion. The main portion of the ground terminals is stacked with each of the extension portions, and contact with restriction portion. The ground member and the main portions are fixed within the insulating body. The contacting portions are arranged on the surface of the tongue portion. The tail portion extends out of the insulating body.
US09583880B2 Direct connect orthogonal connection systems
A direct-connect orthogonal electrical connection system with improved high frequency performance is provided. A conductive member is provided between first and second components, each having signal and ground conductors. The conductive member is electrically coupled to ground conductors of both the first and second components and may also have openings through which signal conductors of the first and second components may connect. As such, signal conductors may be positioned relative to the conductive member such that a uniform impedance is maintained along a signal path throughout the interconnection, reducing noise and reflections. The signal conductors may be formed with multiple beams of different lengths to create multiple points of contact distributed along an elongated dimension. For example, a third beam may be fused to a mating portion to allow a tolerance for deviations in alignment between two directly connected connectors.
US09583879B2 Electrical component
An electrical component (1) having a housing (2) and having a plurality of plug contacts (3, 4,5, 6). In this case, the plug contact (3-6) is held in a floating manner on a contact mount (7), and the contact mount (7) is held in a floating manner on the housing (2).
US09583878B2 Electrical plug and socket securement system
An electrical plug fastener comprising a system of binding or securing electrical plugs to avoid unintentional or accidental disconnection. The system comprises a retention mechanism or means that connects to a first cord and a second cord. The retention mechanism is hinged and comprises a clamp. The clamp further comprises a clip that can also engage the first or second cord.
US09583869B2 Connector and electrical connection device
Provided is a connector having excellent vibration resistance. The invention applies to a connector including a terminal portion and a connector housing in which the terminal portion is accommodated and electrically connecting a first object to be connected and a second object to be connected via the terminal portion. A main body-side male contact is connected to the first object to be connected. A main body-side female contact is connected to the second object to be connected. The terminal portion has a connector-side male contact that is inserted into the main body-side female contact, a connector-side female contact into which the main body-side male contact is inserted, and an elastically deformable joint portion that joins the connector-side male contact and the connector-side female contact to each other.
US09583867B2 Water impermeable electrical junction system
A water impermeable electrical junction system for effectively preventing water and debris from contacting electrical connections. The water impermeable electrical junction system generally includes a base, a plurality of first seal members connected to the base, a plurality of first connectors positioned within the first seal members, a plurality of a second seal members that physically connect to the first seal members, and a plurality of second connectors positioned within the second seal members. The first connectors and the second connectors electrically connect to one another with the first seal members and second seal members covering the first connectors and second connectors to prevent the entry of liquids inside of the seal members or to make contact with the connectors.
US09583866B2 Receptacle connector capable of mating with plug connectors with metal cases with different lengths
A receptacle connector includes a connector body at least suitable to mate with a plug connector having an insulating housing and a metal case. The metal case encompasses the outside of the insulating housing, and the metal case is made of a suitable metallic material. The connector body includes a plurality of metal terminals and a plastic base. The plastic base includes at least a tongue plate for the metal terminals to interpose therein. The plastic base forms a circumferential gap near a region in the vicinity of the tongue plate. The circumferential gap defines an accommodation space. When the receptacle connector and the plug connector are mated, the metal case at least partially encompasses the outside of the tongue plate. When the receptacle connector and another plug connector with a longer metal case are mated, the longer metal case is accommodated in the circumferential gap.
US09583863B1 Child-safety electrical socket
A child-safety electrical socket includes a cover having at least two contact introduction apertures, which cover is disposed on a housing, and underneath which cover a slider is positioned, which stands under the influence of a spring, which supports itself on an intermediate bottom in the housing, wherein the intermediate bottom has at least two apertures and the slider has at least two apertures, which are provided with inclined surfaces, and the slider is disposed in the housing so as to rotate. The slider has a plate-like shape and stands in contact with guides on its circumference, which guides are provided on the cover, on the side facing toward the intermediate bottom.
US09583861B2 Electronic device and connector section
An electronic device includes a device body having a installation section provided on the outer surface and an internal circuit provided therein, and a connector section which can be attached to the installation section and can be removed from the installation section. The connector section has at least one functional section for connection to an external device and a first terminal electrically connected to the functional section. The device body has a second terminal electrically connected to the internal circuit and exposed on the inner surface of the installation section. The second terminal is arranged at a position where the second terminal is connected to the first terminal when the connector section is attached to the installation section.
US09583860B1 Electrical connector with recordable position assurance
An electrical connector with recordable position assurance includes a housing, an electrical conductor, an indicating feature, and a concealing feature. The housing is configured to engage a complementary mating connector during a mating operation. The indicating feature and the concealing feature are both carried by the housing. The indicating feature has a visual identifier disposed thereon. The indicating feature and the concealing feature are movable relative to each other between a concealed position and an exposed position. The concealing feature conceals at least a portion of the visual identifier in the concealed position. The visual identifier is exposed or exposable in the exposed position. The indicating feature is in the exposed position relative to the concealing feature when the housing is fully mated to the mating connector, and is in the concealed position relative to the concealing feature when the housing and mating connector are not fully mated.
US09583859B2 Conductive female terminal, connector and method of manufacturing conductive female terminal
A conductive female terminal includes a cylindrical main body formed of a conductor, and formed with a first opening in which a male terminal is to be inserted, and a first protrusion formed of a conductor, and formed so as to protrude from the main body in a direction becoming apart from an axial center of the main body. The first protrusion includes a first inclined portion inclined so as to approach the axial center of the main body toward the first opening, a first plane portion extending from the first inclined portion toward the first opening, and disposed so as to overlap with an outer face of the main body, and a first interconnecting portion that interconnects the first inclined portion with the main body.
US09583855B2 Circuit board device and display apparatus
A circuit board device is provided, including: a first circuit board having a first predetermined connection section; a second circuit board arranged opposite to the first circuit board and having a second predetermined connection section directly facing the first predetermined connection section; and a connector including a first portion and a second portion. The connecter has: a first state where the first portion is arranged at a side of the first circuit board away from the second circuit board, the second portion is arranged at a side of the second circuit board away from the first circuit board, and the first portion and the second portion cooperate with each other to press the first circuit board against the second circuit board; and a second state where the first circuit board is separated from the second circuit board.
US09583854B2 Connector and semiconductor testing device having the same
To provide a connector wherein ground terminals can be designed easily, which not only suppresses the occurrence of impedance mismatch and crosstalk, but which does not lead to interferences between contacting portions. A ground terminal for a connector has a cylindrical main body. A plurality of contacting portions, for contacting a circuit board, are formed on the bottom edge of the cylindrical main body. The ground terminal has, as contacting portions, inner contacting portions and outer contacting portions. The inner contacting portions extend toward the inside of the cylindrical main body and in the downward direction, and the outer contacting portions extend toward the inside of the cylindrical main body and in the downward direction.
US09583853B2 Low cost, high performance RF connector
An RF connector module and associated printed circuit board providing high isolation and controlled impedance at RF frequencies. The connector module may be manufactured using conventional manufacturing techniques, such as stamping, insert molding, multi-shot molding and interference fit between components, to provide low cost. A connector module constructed with these techniques may implement a co-planar waveguide structure, with conductive shields for isolation and lossy material to enforce co-planar propagation modes. The printed circuit board may similarly be manufactured using conventional manufacturing techniques, including drilling to form vias. As a result, an interconnection system may be manufactured with low cost. These techniques may be applied to provide performance, including in the form of isolation between RF signals, comparable to that provided by more expensive components.
US09583849B1 Connector module with multiple connection modes
Disclosed is a tri-mode connector module comprising a module main body, a serial/parallel connector and a bus connector seat. The serial/parallel connector comprises a slot and groups of connection terminals, each including a first contact piece and a second contact piece. A foreign object enters the slot to change the connections of the first and second contact pieces, to establish serial or parallel connections. The bus connector seat comprises a rail to accommodate a bus connector and a slide clip to clip a bus rail. The connector module may further include a bus connector to connect a bus structure provided in the bus rail.
US09583848B2 Electrical connection box
An electrical connection box for installation in a space that has a small vertical height. The electrical connection box includes horizontal terminal guide portion, an insertion hole for the tip of the terminal guide portion, a bolt fastening terminal connected to an end of an electrical wire, an electrical wire connection portion and an electrical contact portion. The terminal guide portion includes a side wall that has a step conforming to the shape of a barrel crimped portion of the bolt fastening terminal, a flat plate-shaped side wall that opposes the side wall that has the step, and upper and lower walls. The terminal guide portion is shaped so as to be fitted with and hold the electrical wire connection portion, and does not allow insertion of the bolt fastening terminal into the terminal guide portion in an opposite orientation. Visual check openings are provided in the upper wall of the terminal guide portion.
US09583846B2 Method of connecting a cable with a cable connector
A method of connecting a cable with a cable connector comprises the steps of mounting a signal transmitting contact on a housing of a cable connector, said signal transmitting contact being formed to have an intersecting portion, an inclined portion and mutually opposite crooked portions forming a slit, forming an annular groove on an insulator covering a core wire in a cable, engaging the annular groove on the cable with the crooked portions so that the core wire appearing in the annular groove is pressed into the slit, and causing a part of the insulator of the cable positioned to demarcate the annular groove to be pushed by the inclined portion of the signal transmitting contact to move for projecting from a top end of the cable toward the outside so that the core wire appearing in the annular groove is put in press-contact with the slit.
US09583841B2 Balun
The present disclosure relates to a balun suitable for realizing a wideband transition in the radio frequency band from an unbalanced transmission line to a balanced transmission line. The balun comprises an input terminal; a two conductor output terminal; and a layered structure comprising a number of conducting layers and dielectric layers alternatingly arranged on top of each other. The layered structure comprises at least one ground plane layer and at least one signal transmission layer. The input terminal has a signal connection point and a screen connecting point. An unbalanced signal path is connected to the signal connection point and the screen connecting point of the input terminal. A balanced signal path is connected to the output terminal and being part of the layered structure. A balun transition region transforms the signal from an unbalanced signal to a balanced signal. The balun transition region comprises a non-conducting gap between the screen of the unbalanced signal and a dummy screen structure. The dummy screen structure is a mirror structure, mirrored in a plane of the gap, of a horizontal portion of the unbalanced signal path before the gap. A central conductor or signal conductor of the unbalanced signal path traverses the gap and enters a volume defined by the dummy screen structure. The screen of the unbalanced signal in the vicinity of the gap forms a first balanced conductor being part of the layered structure and the screen of the dummy screen structure, in vicinity of the gap, forms a second balanced conductor being part of the layered structure.
US09583838B2 Electronic device with indirectly fed slot antennas
An electronic device may be provided with antennas. Antennas for the electronic device may be formed from slot antenna structures. A slot antenna structure may be formed from portions of a metal housing for an electronic device. The slots of the slot antenna structures may be indirectly fed to form first and second indirectly fed slot antennas. The first and second indirectly fed slot antennas may be formed from slots in a rear surface of an electronic device and a sidewall of the electronic device. The slots may have open ends along an edge of the sidewall and may have closed ends that face each other. A hybrid antenna may also be formed in the electronic device.
US09583836B2 High-frequency transmission line and antenna device
An antenna is connected to a first end of a high-frequency transmission line, and a connector is connected to a second end of the high-frequency transmission line. A characteristic impedance of a microstrip line is higher than characteristic impedances of first and second strip lines, and a characteristic impedance of a coplanar line is higher than a characteristic impedance of the second strip line. Thus, at a certain frequency, a standing wave develops in which the position of the microstrip line and the position of the coplanar line are maximum voltage points and three-quarter-wavelength resonance is a fundamental wave mode. Thus, the cutoff frequency of the high-frequency transmission line is high, and an insertion loss of a signal is significantly reduced to be low over a wide band.
US09583835B2 Multiband antenna and wireless communication device employing same
A multiband antenna includes a radiating portion, a grounding portion, a metal member, and a resonating portion. The radiating portion receives feed signals. The grounding portion is grounded. The metal member connects to the radiating portion and the grounding portion, and defines a slit that is adjacent to the radiating portion and the grounding portion. The resonating portion is positioned in an area surrounded by the radiating portion, the grounding portion, and the metal member. The resonating portion resonates with the radiating portion and the metal member to enable the multiband antenna to receive and send wireless signals at different frequencies.
US09583829B2 Optimization of low profile antenna(s) for equatorial operation
Systems and methods for optimizing low profile SATCOM antenna panels affixed to a moving vehicle. An elongated SATCOM antenna panel has a narrow azimuth beam optionally having a typical width of no more than a 2-degree angle while the SATCOM antenna panel is maintained parallel to the motion trajectory of a carrying vehicle. An actuation unit rotates the SATCOM antenna panel about three orthogonal axes: a longitudinal axis (Roll rotation), a vertical axis (Yaw rotation) and a lateral axis (Elevation rotation). The actuation unit actuates the antenna panel so it is maintained aligned with the Earth's equatorial plane and the narrow azimuth beam optionally having a typical width of no more than 2-degree angle eliminates adjacent satellite illumination.
US09583828B2 Apparatus, system and method of controlling one or more antennas of a mobile device
Some demonstrative embodiments include apparatuses, devices, systems and/or methods for controlling an antenna scheme of one or more antennas. For example, a controller may be configured to control an antenna scheme of one or more antennas of a mobile device for wireless communication based on a position of a lid of the mobile device relative to a base of the mobile device.
US09583827B2 Millimeter-wave radar
A millimeter-wave radar device including at least one millimeter-wave circuit and at least one antenna, wherein the millimeter-wave radar device is designed as a module having a multilayered multipolymer circuit board having at least a first layer composed of a polymer material having low dispersion of the dielectric constant, a second layer composed of a high-strength polymer material, which stabilizes the multipolymer circuit board, and a metallization layer, which is arranged between the first layer and the second layer and serves for shielding and for signal carrying, and the multipolymer circuit board carries the at least one millimeter-wave circuit and the at least one antenna.
US09583817B2 Wireless module
A wireless device that suppresses deterioration of antenna characteristics and can be made thin is provided. The wireless device is provided with a substrate, a wireless module that is mounted on the substrate and has an antenna unit, and a casing that accommodates the substrate and the wireless module. The wireless device has a gap of a length that is an approximate multiple of a half-wavelength of a radio wave corresponding to a communication frequency of the antenna unit, from the antenna unit toward the casing.
US09583815B2 Organic electroluminescent display device having integrated NFC antenna
An organic electroluminescent display device having integrated an NFC antenna (9). The NFC antenna is arranged on a display screen of the organic electroluminescent display device, where the NFC interface is equipped with an output line of the display screen and is connected to a control mainboard of the display screen. This combines the display screen and the NFC antenna (9) into one, and has the NFC antenna (9) provided directly on the organic electroluminescent display device, thus preventing the problem of signal quality deterioration and reception failure due to wearing of the NFC antenna (9) interface and inaccurate alignment. In addition, provided is a solution to facilitate reception of an NFC signal from a display panel of the display device or for when the NFC signal must be received from the display panel of the display device.
US09583813B2 Systems and methods for manufacturing passive waveguide components
Various embodiments are directed toward systems and method for manufacturing low cost passive waveguide components. For example, various embodiments relate to low cost manufacturing of passive waveguide components, including without limitation, waveguide filters, waveguide diplexers, waveguide multiplexers, waveguide bends, waveguide transitions, waveguide spacers, and antenna adapters. Some embodiments comprise manufacturing a passive waveguide component by creating a non-conductive structure using a low cost fabrication technology, such as injection molding or three-dimensional (3D) printing, and then forming a conductive layer over the non-conductive structure such that the conductive layer creates an electrical feature of the passive waveguide component.
US09583812B2 Thin, flexible transmission line for band-pass signals
A signal transmission line includes a signal conductor and an array of resonators. The resonators can include split resonators. The array of resonators can partially overlap with the signal conductor of the signal transmission line. In some embodiments, the portion of the signal conductor overlapping with the split ring resonators is wider than the portion of the signal conductor outside the overlapping area. The signal transmission line can be tuned for a range of frequencies. For example, the signal transmission line can be tuned to have an absolute value of a s-parameter less than or equal to 1 dB for a range of frequencies. The signal transmission line can be less than or equal to 200 microns in thickness and may also be flexible.
US09583811B2 Transition between a plastic waveguide and a semiconductor chip, where the semiconductor chip is embedded and encapsulated within a mold compound
A microwave device includes a semiconductor package comprising a microwave semiconductor chip and a waveguide part associated with the semiconductor package. The waveguide part is configured to transfer a microwave waveguide signal. It includes one or more pieces. The microwave device further includes a transformer element configured to transform a microwave signal from the microwave semiconductor chip into the microwave waveguide signal or to transform the microwave waveguide signal into a microwave signal for the microwave semiconductor chip.
US09583809B2 High-frequency signal line
A high-frequency signal line includes a body with a first layer level and a second layer level; a signal line including a first line portion provided at the first layer level, a second line portion provided at the second layer level, and a first interlayer connection connecting the first line portion and the second line portion; a first ground conductor including a first ground portion provided at the first layer level; a second ground conductor including a second ground portion provided at the second layer level; and a second interlayer connection connecting the first ground portion and the second ground portion. A distance between the first interlayer connection and the second interlayer connection is not less than a maximum distance between the first line portion and the first ground portion and is not less than a maximum distance between the second line portion and the second ground portion.
US09583804B2 Electrical energy store
An energy store is provided, having at least one stack, each stack having at least one storage cell, which in turn has an air electrode and a storage electrode. The storage electrode is adjacent to channels, which contain a storage medium and water vapor. The channels have a larger cross-sectional area than the cross-section of the storage medium, which condition causes unhindered spreading of a reaction gas in the area between the storage electrode and the storage medium.
US09583800B2 Vehicle and method for controlling same
The invention relates to a vehicle, having a cooling air duct disposed within a battery to move cooling air for cooling the battery, so as to enable same to be compact and improve space utilization, in order to optimize cooling performance within a limited space. The vehicle of the present invention also includes a battery-cooling unit that exchanges heat and cools air ventilated from the passenger compartment and then supplies the air to the battery, so as to use the air from the passenger compartment with minimal effects on the air temperature in the passenger compartment, and more efficiently cool the battery. Further, the vehicle and method for controlling same according to the present invention can detect the temperatures of the battery and of the passenger compartment, and determine whether to cool the air in the passenger compartment using a heat exchanger in accordance with each detected temperature, or control the rotation speed of a ventilation fan, in order to more efficiently cool the battery. Accordingly, overheating of the battery can be prevented, and the service life of the battery can be extended. Additionally, the vehicle and method for controlling same according to the present invention involve a dehumidifying unit for supplying cool air inside the battery and dehumidifying the inside of the battery, so as to control the moisture inside the battery and thereby reduce the possibility of electrical hazards and malfunctions occurring due to condensation.
US09583797B2 Method for welding battery module and welded structure
Provided are a method for welding a battery module and a welded structure, and more particularly, a method for welding a battery module and a welded structure, in which a plurality of battery cells provided with electrode tabs are assembled to form a module and a voltage measurement portion of a voltage measurement means is welded to the electrode tabs so as to secure stability against vibrations and external shocks, thereby increasing reliability of voltage measurement and the voltage measurement portion is welded to the electrode tabs using the same kind of materials so as to facilitate an operation and improve productivity.
US09583794B2 Scalable highly available modular battery system
A modular battery pack system including a plurality of battery sub-modules operably connected in parallel and an isolation system configured to discretely isolate any one of the battery sub-modules from the remaining battery sub-module(s). The isolation system, in one embodiment, may utilize an ORing FET for each of the battery sub-modules, with each ORing FET operably connected at its input with an output of a corresponding battery sub-module and operably connected at its output with the output of the other ORing FETs. The modular battery pack system may further include a conditioning system for conditioning a battery sub-module by discharging at least a portion of the battery sub-module. Each battery sub-module may be operably and discretely connected to the conditioning system, such that conditioning is selectively applicable to any one or more of the battery sub-modules.
US09583792B2 Dynamically configurable auto-healing battery
A method, apparatus, and computer program product for a dynamically configurable auto-healing battery are provided in the illustrative embodiments. Identification of a condition is performed within the battery. The battery comprises a set of cells a subset of which is electrically connected in a configuration such that the configuration delivers a first amount of electrical power from the battery. The battery further comprising a second set of spare cells. Responsive to the condition, a cell is selected from the subset. Responsive to the condition, a spare cell is selected from the set of spare cells. The selected cell in the subset is made electrically unavailable in the configuration. The selected spare cell is made electrically available in the configuration, resulting in eliminating an effect of the condition on a power output of the battery.
US09583791B2 Electrolytic solution and battery
An electrolytic solution and a battery capable of improving cycle characteristics are provided. A separator is impregnated with an electrolytic solution. The electrolytic solution includes a cyclic carbonate derivative having a halogen atom such as 4-fluoro-1,3-dioxolane-2-one or 4-chloro-1,3-dioxolane-2-one and a cyclic imide salt such as 1,1,2,2,3,3-hexafluoropropane-1,3-disulfonimide lithium. Thereby, the decomposition reaction of the electrolytic solution can be inhibited, and the cycle characteristics can be improved.
US09583789B2 Non-aqueous electrolyte secondary battery
The present invention relates to a non-aqueous electrolyte comprising a non-aqueous electrolyte solvent, a supporting salt, and a sulfonate represented by a predetermined formula, the non-aqueous electrolyte having a sulfonate concentration of 0.001 wt % or more and less than 0.2 wt % based on the total mass of the non-aqueous electrolyte.
US09583785B2 Cable-type secondary battery
The present invention relates to a cable-type secondary battery having a horizontal cross section of a predetermined shape and extending longitudinally, comprising: an inner electrode having an inner current collector and an inner electrode active material layer surrounding the outer surface of the inner current collector; a separation layer surrounding the outer surface of the inner electrode to prevent a short circuit between electrodes; and an outer electrode surrounding the outer surface of the separation layer, and having an outer electrode active material layer, an open-structured outer current collector and a conductive paste layer.The outer electrode having a conductive paste layer and an open-structured outer current collector according to the present invention has good flexibility to improve the flexibility of a cable-type secondary battery having the same. Also, the conductive paste layer is made of a light material, and thus can contribute to the lightening of the cable-type secondary battery.
US09583781B2 Multiple conductive tabs for facilitating current flow in batteries
The disclosed embodiments provide a battery cell. The battery cell includes a set of layers which are wound together to form a jelly roll, including a cathode with an active coating, a separator, and an anode with an active coating. The battery cell also includes a pouch enclosing the layers, wherein the pouch is flexible. To increase a current flow in the battery cell, a first set of conductive tabs is coupled to a cathode substrate of the cathode, and a second set of conductive tabs is coupled to an anode substrate of the anode.
US09583779B2 Metal sulfide electrodes and energy storage devices thereof
The present invention generally relates to energy storage devices, and to metal sulfide energy storage devices in particular. Some aspects of the invention relate to energy storage devices comprising at least one flowable electrode, wherein the flowable electrode comprises an electroactive metal sulfide material suspended and/or dissolved in a carrier fluid. In some embodiments, the flowable electrode further comprises a plurality of electronically conductive particles suspended and/or dissolved in the carrier fluid, wherein the electronically conductive particles form a percolating conductive network. An energy storage device comprising a flowable electrode comprising a metal sulfide electroactive material and a percolating conductive network may advantageously exhibit, upon reversible cycling, higher energy densities and specific capacities than conventional energy storage devices.
US09583774B2 Method for cold starting a fuel cell system and fuel cell system of a motor vehicle
The operational availability of a motor vehicle with a fuel cell is increased by providing that a defined quantity of the output power of the fuel cell system is consumed by a power consumption component in the heating-up phase and/or in the warm-up phase and that the consumed quantity of the output power is converted into power loss by impressing a suitable current into at least one winding of an electric motor which is to be energized.
US09583773B2 Solid oxide fuel cell unit
Provided is a solid oxide fuel cell unit comprising an insulating support, and a power generation element comprising, at least, a fuel electrode, an electrolyte and an air electrode, which are sequentially laminated one another, the power generation element being provided on the insulating support, wherein an exposed insulating support portion, an exposed fuel electrode portion, and an exposed electrolyte portion are provided in an fuel electrode cell end portion.
US09583769B2 Non-aqueous electrolyte secondary battery including a porous layer having filler particles and method of making thereof
A non-aqueous electrolyte secondary battery obtained by the present invention is a non-aqueous electrolyte secondary battery including an electrode body having a positive electrode sheet and a negative electrode sheet 20 stacked via a separator sheet 40. A porous layer 42 having filler particles 44 and a binder is formed between the separator sheet 40 and at least one of the positive electrode sheet and the negative electrode sheet 20. The median value in the circularity distribution of the filler particles 44 contained in the porous layer 42 is 0.85 to 0.97.
US09583765B2 Positive electrode active material for sodium ion secondary battery, positive electrode, and sodium ion secondary battery
Provided are a positive electrode active material for a sodium ion secondary battery, and a positive electrode and a sodium ion secondary battery using the material. The positive electrode active material for a sodium ion secondary battery comprises a lithium sodium-based compound containing lithium (Li), sodium (Na), iron (Fe), and oxygen (O).
US09583762B2 Method of fabricating fibres composed of silicon or a silicon-based material and their use in lithium rechargeable batteries
An electrically interconnected mass includes elongated structures. The elongated structures are electrochemically active and at least some of the elongated structures cross over each other to provide intersections and a porous structure. The elongated structures include doped silicon.
US09583751B2 Battery with an anode preload with consumable metals
A method is provided for fabricating a battery using an anode preloaded with consumable metals. The method forms an ion-permeable membrane immersed in an electrolyte. A preloaded anode is immersed in the electrolyte, comprising MeaX, where X is a material such as carbon, metal capable of being alloyed with Me, intercalation oxides, electrochemically active organic compounds, and combinations of the above-listed materials. Me is a metal such as alkali metals, alkaline earth metals, and combinations of the above-listed metals. A cathode is also immersed in the electrolyte and separated from the preloaded anode by the ion-permeable membrane. The cathode comprises M1YM2Z(CN)N.MH2O. After a plurality of initial charge and discharge operations are preformed, an anode is formed comprising MebX overlying the current collector in a battery discharge state, where 0≦b
US09583750B2 Secondary battery
A secondary battery charged and discharged even after dissolution. The active material in the cathode body and/or the anode body is a liquid, or the active material undergoes phase transition into a liquid is provided. The secondary battery (1) includes: a cathode collector (2), a cathode body (3), a solid electrolyte (4), an anode body (5), and an anode collector (6). The cathode body and the anode body are sealed by the solid electrolyte, the cathode collector, and/or the anode collector. The cathode body and the anode body preferably contain an active material that undergoes phase transition from a solid to a liquid, or to a phase containing a liquid, due to charge and discharge. The cathode body or the anode body preferably contains a liquid active material. A polymeric layer may be inserted between the cathode body and/or the anode body and the solid electrolyte.
US09583746B2 Electric tool powered by a plurality of battery packs and adapter therefor
An electric power tool comprises a main body supporting a tool and an electric motor housed in the main body for driving the tool. A plurality of first battery interfaces is configured to removably receive or attach a plurality of first battery packs and to electrically connect the plurality of attached first battery packs in series with the electric motor. A plurality of indicators is configured to communicate information concerning the respective conditions of the plurality of attached first battery packs. The plurality of indicators is arranged such that all of the indicators are simultaneously viewable by a user of the electric power tool.
US09583744B2 Sheath for enclosing a case of a secondary battery
A secondary battery includes an electrode assembly having first and second electrodes and a separator, a pouch type case for receiving the electrode assembly, and a sheath for enclosing outer sides of the case. The sheath can prevent damage to the pouch in electronic devices to which the secondary battery is applicable as an inner pack type.
US09583741B2 Secondary battery
A secondary battery including an electrode assembly and a case accommodating the electrode assembly, the case including a bottom surface, a first pair of parallel sidewalls and a second pair of parallel sidewalls, connected with the bottom surface, and a corner portion formed by an intersection of each of the first pair of parallel sidewalls and the bottom surface, the corner portion having a first radius of curvature at a first region, and a second radius of curvature different from the first radius of curvature at a second region.
US09583738B2 Display device including reflecting layer
A display device includes a reflecting layer. A display device according to an exemplary embodiment of the present invention includes: a lower substrate; an upper substrate facing the lower substrate; a thin film transistor on the lower substrate; and a first reflecting layer on a first surface of the upper substrate, the first surface facing the lower substrate, in which the lower substrate and the upper substrate include a display area for displaying an image, and a peripheral area outside the display area, and wherein the first reflecting layer is at the peripheral area, at display area, and at an area adjacent an edge of the upper substrate.
US09583733B2 Organic electroluminescent element and illumination device
An organic electroluminescent element is provided with a light transmissive substrate, a light transmissive electrode, a counter electrode paired with the light transmissive electrode, a sealing substrate facing the light transmissive substrate, an organic light emitting layer, and a resin structure. The organic light-emitting layer is disposed between the light transmissive electrode and the counter electrode. The organic light emitting layer is sealed with the light transmissive substrate and the sealing substrate. The resin structure is disposed between the light transmissive electrode and the light transmissive substrate. The resin structure is composed of a plurality of resin layers including a high refractive index layer and a low refractive index layer with different refractive indices. The high refractive index layer contains a physisorption-based moisture-absorbing material.
US09583732B2 Organic light emitting display apparatus and method of manufacturing the same
A flexible organic light emitting display apparatus comprising a flexible encapsulation layer comprising at least one aluminum oxide layer configured to cover an area having a plurality of pixels, a flexible barrier film comprising a flexible barrier film body and a pressure sensitive adhesive layer on the flexible encapsulation layer and an adhesion supporter directly contacting the aluminum oxide layer and the pressure sensitive adhesive layer.
US09583728B2 Organic light emitting device
An organic light emitting device includes a base substrate defining an active area and a pad area that surrounds the active area, an organic light emitting layer formed on the active area, a first protective layer formed to cover the active area, where the organic light emitting layer is formed, and the pad area, a second protective layer formed to cover the first protective layer, and a dam formed between the first protective layer and the second protective layer, wherein the dam is located at a boundary between the active area and the pad area and includes a groove that is positioned separate from an outer portion of the active area.
US09583727B2 Organic light emitting display apparatus
An organic light emitting display apparatus including a substrate including a plurality of pixel areas; a pixel electrode on the substrate; an opposite electrode on the pixel electrode, the opposite electrode transmitting light; an organic light emitting layer between the pixel electrode and the opposite electrode, the organic light emitting layer emitting a first light toward the opposite electrode; a light emitting layer on the opposite electrode, the light emitting layer absorbing a portion of the first light and emitting a second light; and a sealing layer on the light emitting layer, the sealing layer sealing the pixel electrode, the opposite electrode, the organic light emitting layer, and the light emitting layer.
US09583719B2 Carbazolocarbazol-bis(dicarboximides) and their use as semiconductors
The present invention relates to carbazolocarbazol-bis(dicarboximides), a method for their preparation and their use as semiconductors, in particular as semiconductors in organic electronics and organic photovoltaics.
US09583717B2 Compounds for organic electroluminescent devices
The present invention relates to crosslinkable compounds, to the crosslinked compounds obtained from these compounds, and to processes for the preparation thereof. The invention is furthermore directed to the use of these compounds in electronic devices and to the corresponding electronic devices themselves.
US09583712B2 High crystalline polythiophene nanowire for organic solar panels and method of preparation thereof
The present invention relates to a method of preparing high crystalline polythiophene nanowire used for organic solar panels, including the following steps: A. a 0.001-40 wt % polythiophene solution is prepared; B. a 0.01-10 wt % carbon nanomaterial suspension is prepared and a 0.001-5 wt % dispersant is added to the suspension to generate a carbon nanomaterial dispersion; C. The foregoing carbon nanomaterial dispersion is added to the polythiophene solution and the resulting mixture is let stand under atmospheric pressure at −10˜45° C. for 20˜400 min so that polythiophene molecules are able to be adsorbed and stacked up on the surface of carbon nanomaterials to generate polythiophene nanowires. Owing to high alignment order and high crystallinity, the polythiophene nanowire is helpful for elevating light conversion efficiency of organic solar panels.
US09583711B2 Conductive and photosensitive polymers
The present invention relates to newly functionalized polythiophenes and the syntheses thereof. The present invention also demonstrates that the new polythiophenes and their derivatives are suitable for fabricating organic light emitting diodes (OLEDs), light emitting diodes (PLEDs), organic photovoltaic devices (OPVs) and conducting polymers for printed electronic devices.
US09583709B2 Mask for forming organic layer pattern, forming method of organic layer pattern, and manufacturing method of organic light emitting diode display using the same
A mask for forming an organic layer pattern, the mask including a photomask having a first substrate and a reflecting layer on the first substrate; and a donor substrate on the photomask and separated therefrom, the donor substrate including a second substrate and an absorption part on the second substrate, wherein the photomask comprises a reflecting part configured to reflect light incident to the photomask and a light concentrating part configured to concentrate the light and transmit the light to the donor substrate.
US09583708B2 Mask for deposition, mask assembly including the same and method of forming the mask assembly
A mask for deposition includes a mask main body extended in a first direction and having a first thickness, and including ends opposite to each other in the first direction and supported by a frame while a tensile force is applied to the mask in the first direction; and a plurality of active patterns separated from each other in the first direction in a center area of the mask main body, and having a second thickness less than the first thickness.
US09583698B2 Magnetoresistive element having a novel recording multilayer
A magnetoresistive element has a crystalline structural quality and magnetic anisotropy enhancement bilayer (CSMAE bilayer) with a). enhanced the crystalline structural quality, hence fabrication yield, of the resulting magnetoresistive element; and b). enhanced the magnetic anisotropy of the recording layer whereby achieving a high MR ratio for the magnetoresistive element with a simultaneous reduction of an undesirable spin pumping effect. As the magnetoresistive film is thermally annealed, a crystallization process occurs to form bcc CoFe grains having epitaxial growth with (100) plane parallel to the surface of the tunnel barrier layer as Boron elements migrate into the impurity absorbing layer. Removing the top portion of the impurity absorbing layer by means of sputtering etch or RIE etch processes followed by optional oxidization process, a thin but thermally stable portion of impurity absorbing layer is formed on top of the magnetoresistive element with a low damping constant. Accordingly, a reduced write current can be achieved for spin-transfer torque MRAM application.
US09583693B2 Piezoelectric energy harvester
A piezoelectric energy harvester comprising: a metal substrate comprising a planar part, a first leg projecting from the planar part and a second leg projecting from the planar part, the metal substrate configured to support a piezoelectric matrix on the planar part between the first leg and the second leg; and a piezoelectric matrix provided on the substrate, the piezoelectric matrix comprising a plurality of adjacent PZT elements.
US09583692B2 Piezoelectric vibration device and portable terminal using the same
A piezoelectric vibration device capable of allowing a low profile and generating strong vibration, and a portable terminal using the same are provided. Disclosed are a piezoelectric vibration device at least including a support body (11); a vibration member (12) mounted to the support body (11) so as to vibrate; a vibration element (14) capable of being subjected to bending vibration; and a deformable first connecting member (13) interposed between a first surface that is a bending surface of the vibration element (14) and one main surface of the vibration member (12), and a portable terminal using the same. A piezoelectric vibration device capable of allowing a low profile and generating strong vibration, and a portable terminal can be obtained.
US09583690B2 LED lampwick, LED chip, and method for manufacturing LED chip
An LED lamp core, an LED chip, and a method for manufacturing the LED chip are provided. A heat conductive core (6) using the structure of taper column or taper threaded column can be conveniently installed, and solves the heat conductive problem from the standardization of the LED lamp core. A heat diffusion plate (2) is made of copper or aluminum, and the area and the thickness thereof should be large enough, so as to achieve the effect of heat diffusion. A wafer (1) is welded on the heat diffusion plate (2), reducing the temperature difference between the wafer (1) and the heat diffusion plate (2) is primary and the insulation between the same is secondary. A high voltage insulation layer (4), which is required for safety, is provided between the heat diffusion plate (2) and the heat conductive core (6), and the heat flux density between the heat diffusion plate (2) and the heat conductive core (6) has already been reduced by the heat diffusion plate (2). The technique using a wafer locating plate solves the problem of aligning weld, costly equipment and low production efficiency.
US09583689B2 LED package
An LED package includes a chip carrier, an adhesive layer, one high-voltage LED die, and an encapsulating member. The chip carrier defines a receiving space. The adhesive layer is disposed in the receiving space and has a thermal conductivity of larger than or equal to 1 W/mK. The high-voltage LED die is attached to the adhesive layer to be received in the reflective space and has a top surface formed with a trench. The trench of the high-voltage LED die is disposed at an optical center of the receiving space. The encapsulating member encapsulates the high-voltage LED die and includes a plurality of diffusers. The trench is embedded with the encapsulating member and has a width ranging from 1 μm to 10 μm and a depth of less than or equal to 50 μm.
US09583687B2 Semiconductor device, semiconductor device package, and lightning apparatus
A semiconductor device includes a light emitting structure, and an interconnection bump including an under bump metallurgy (UBM) layer disposed on an electrode of at least one of the first and second conductivity-type semiconductor layers, and having a first surface disposed opposite to a surface of the electrode and a second surface extending from an edge of the first surface to be connected to the electrode, an intermetallic compound (IMC) disposed on the first surface of the UBM layer, a solder bump bonded to the UBM layer with the IMC therebetween, and a barrier layer disposed on the second surface of the UBM layer and substantially preventing the solder bump from being diffused into the second surface of the UBM layer.
US09583684B2 Edge coupling alignment using embedded features
Methods and systems may provide an alignment scheme for components that may reduce positional deviation between the components. The method may include placing a first component on top of a substrate, wherein the first component includes a receiving alignment feature, and coupling a second component to the first component, wherein the coupling includes inserting a protruding alignment feature of the second component into the receiving alignment feature of the first component. In one example, the first component includes an edge-emitting semiconductor die and the second component include one or more of an optical lens and an alignment frame.
US09583682B2 Light-emitting device and method of manufacturing the same
A light-emitting device includes a plurality of light-emitting elements face-down mounted on a substrate, a phosphor-containing film on the plurality of light-emitting elements directly or via a transparent adhesive layer, a transparent plate provided on the phosphor-containing film so as to directly contact the film, and a white reflector to cover a side surface of the plurality of light-emitting elements and, of side surfaces of the phosphor-containing film, at least a side surface not located above a gap between the plurality of light-emitting elements. At least a portion of a region directly above the gap is not covered with the phosphor-containing film.
US09583681B2 Light emitter device packages, modules and methods
Light emitter device packages, modules and methods are disclosed having a body and a cavity that can be formed from a single substrate of material. The material can be thermally conductive and/or metallic. A light emitter device package can have at least one isolating layer creating at least a first isolated portion of the body and/or first isolated portion of the cavity. The isolating layer can be formed from the same material as the single substrate which forms the package body and cavity, and can be a layer which is thermally and electrically isolated. A light emitter or light emitter device, such as an LED chip can be mounted upon a surface of the cavity and upon at least a portion of the isolating layer.
US09583680B2 Transparent conductive structure, device comprising the same, and the manufacturing method thereof
An optical electrical device comprises a base and a transparent conductive structure on the base is disclosed. The base further comprises a light-emitting device and the transparent conductive structure comprises a transparent conductive oxide layer and a passivation layer on the transparent conductive oxide layer. The material of the transparent conductive oxide layer comprises transparent conductive metal oxide, such as ZnO. Furthermore, the transparent conductive metal oxide also comprises impurities, such as a carrier e.g. gallium.
US09583678B2 High-performance LED fabrication
High-performance light-emitting diode together with apparatus and method embodiments thereto are disclosed. The light emitting diode devices emit at a wavelength of 390 nm to 470 nm or at a wavelength of 405 nm to 430 nm. Light emitting diode devices are characterized by having a geometric relationship (e.g., aspect ratio) between a lateral dimension of the device and a vertical dimension of the device such that the geometric aspect ratio forms a volumetric light emitting diode that delivers a substantially flat current density across the device (e.g., as measured across a lateral dimension of the active region). The light emitting diode devices are characterized by having a current density in the active region of greater than about 175 Amps/cm2.
US09583677B2 Light-emitting diode having a roughened surface
A method of manufacturing a light-emitting diode comprises the steps of providing a substrate comprising an upper surface and a bottom surface opposite to the upper surface; providing a semiconductor stack layer on the upper surface, wherein the semiconductor stack layer comprises a first type semiconductor layer having a first surface, a light-emitting layer on the first type semiconductor layer for emitting light, and a second type semiconductor layer on the light-emitting layer; treating the first surface to form a second surface, wherein the second surface is flatter than the first surface; and providing a laser beam through the second surface to cut the substrate.
US09583667B2 Systems and methods for forming solar cells with CuInSe2 and Cu(In,Ga)Se2 films
Systems and methods for forming solar cells with CuInSe2 and Cu(In,Ga)Se2 films are provided. In one embodiment, a method comprises: during a first stage (220), performing a mass transport through vapor transport of an indium chloride (InClx) vapor (143, 223) and Se vapor (121, 225) to deposit a semiconductor film (212, 232, 252) upon a substrate (114, 210, 230, 250); heating the substrate (114, 210, 230, 250) and the semiconductor film to a desired temperature (112); during a second stage (240) following the first stage (220), performing a mass transport through vapor transport of a copper chloride (CuClx) vapor (143, 243) and Se vapor (121, 245) to the semiconductor film (212, 232, 252); and during a third stage (260) following the second stage (240), performing a mass transport through vapor transport of an indium chloride (InClx) vapor (143, 263) and Se vapor (121, 265) to the semiconductor film (212, 232, 252).
US09583666B2 Wafer level packaging for proximity sensor
A proximity sensor includes a semiconductor die, a light emitting assembly, a redistribution layer, and an encapsulating layer. A surface of the semiconductor die includes a sensor area and contact pads. A lens is positioned over the sensor area of the semiconductor die. The light emitting assembly includes a light emitting device having a light emitting area, a lens positioned over the light emitting area, and contact pads that face the redistribution layer. A side of the redistribution layer includes contact pads. Electrical connectors place each of the contact pads of the semiconductor die in electrical communication with a respective one of the contact pads of the redistribution layer. The encapsulating layer is positioned on the redistribution layer and at least partially encapsulates the semiconductor die, the lens over the sensor area of the semiconductor die, and the light emitting assembly.
US09583664B2 Ge/Si avalanche photodiode with integrated heater and fabrication method thereof
Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.
US09583662B2 Light weight solar concentrator
A solar concentrator has frame members connected together to form a framework, and a flexible sheet attached to the framework such that the flexible sheet takes a loose shape and can flex in response to shaping forces exerted thereon. The sheet has a reflective surface located between the frame members. A shaping force system is operative, when activated, to exert the shaping forces on the sheet, the shaping forces configured to draw the sheet from the loose shape into a desired shape such that solar rays striking the reflective surface are focused on a target, and a solar energy receiver is attached to the framework at a location corresponding to the target. Thin wall tubing filled with pressurized air can provide strong light frame members. When the shaping force system is deactivated, the flexible sheet reverts substantially to the loose shape.
US09583659B2 Solar cell module
Disclosed is a solar cell module. The solar cell module includes a substrate including at least one hole, and a first surface and a second surface opposite to each other; a solar cell panel located on the first surface and including a plurality of solar cells; a bus bar connected to one of the solar cells; and a cable for outputting a current of the solar cell panel to an outside, wherein the bus bar makes contact with the cable through the hole.
US09583657B2 Multilayer thin-film back contact system for flexible photovoltaic devices on polymer substrates
A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is optionally formed at the back side of the polymer substrate. A metal structure is formed at the device side of the polymer substrate.
US09583656B2 Photoelectric conversion element
A photoelectric conversion element according to the present invention includes a photoelectric conversion layer. The photoelectric conversion layer includes a p-type semiconductor layer, an n-type semiconductor layer, and a superlattice semiconductor layer which is interposed between the p-type semiconductor layer and the n-type semiconductor layer. The superlattice semiconductor layer has a superlattice structure in which barrier layers and quantum layers are stacked alternately and repeatedly, and is provided so as to form an intermediate energy band between an upper end of a valence band of the barrier layer and a lower end of a conduction band of the barrier layer. The intermediate energy band is formed from a region of the superlattice semiconductor layer, which is near to the p-type semiconductor layer, to a region of the superlattice semiconductor layer, which is near to the n-type semiconductor layer, and the intermediate energy band has a region having a wide band width and a region having a narrow band width.
US09583655B2 Method of making photovoltaic device having high quantum efficiency
A method of fabricating a photovoltaic device includes forming an absorber layer comprising an absorber material above a substrate, forming a buffer layer over the absorber layer, forming a front transparent layer over the buffer layer, and exposing the photovoltaic device to heat or radiation at a temperature from about 80° C. to about 500° C. for a period of time, subsequent to the step of forming a buffer layer over the absorber layer.
US09583650B1 Integrated plasmonic circuit and method of manufacturing the same
Provided are a integrated plasmonic circuit including a plasmonic source using a surface plasmon resonance phenomenon, a plasmonic detector detecting an optical signal generated in the plasmonic source, and a link structure between the plasmonic source and the plasmonic detector, that is, a signal transferring part, and a method of manufacturing the same. Provided are a integrated plasmonic circuit capable of realizing both of miniaturization and speed improvement by overcoming both of a limitation of an electronic device in terms of a signal speed in spite of being excellent in terms of miniaturization efficiency and a limitation of an existing optical device in terms of miniaturization due to a diffraction limitation of light in spite of being improved in terms of a signal speed, and a method of manufacturing the same.
US09583649B2 Thin film solar cell backside contact manufacturing process
Embodiments of the invention related to a method for manufacturing a thin film solar cell backside contact. Prior to application of materials, a planar substrate is provided and an associated backside of the substrate is modified to form one or more pedestals. The modified substrate is layered with multiple layers of material, including a conducting layer, a reflective layer, and a passivation layer. The layered backside substrate is polished to expose portions of the conducting layer at discrete locations on the backside of the substrate. The exposed portions of the conducting layer maintain direct electrical communication between an absorber layer deposited on the layered backside substrate and the conducting layer.
US09583647B2 Solar cell element
A solar cell element includes: a transparent body; a MgxAg1-x layer (0.001≦x≦0.045) having a thickness (2-13 nm); a ZnO layer having an arithmetical mean (Ra: 20-870 nm); and a transparent conductive layer. A photoelectric conversion layer including n-type and p-type layers further includes n-side and p-side electrodes. The ZnO layer is composed of ZnO columnar crystal grains grown on the MgxAg1-x layer, and each ZnO grain has a longitudinal direction along a normal line of the body, has a width increasing from the MgxAg1-x layer toward the transparent conductive layer, has a width which appears by cutting each ZnO grain along the normal line, and has a R2/R1 ratio (1.1-1.8). R1 represents the width of one end of the ZnO grain, and the one end is in contact with the surface of the MgxAg1-x layer, and R2 represents the width of the other end of the ZnO grain.
US09583646B2 Bottom-emitting substrate, display device and manufacturing method of substrate
A bottom-emitting substrate, a display device and a method for manufacturing the bottom emitting substrate are provided. The bottom-emitting substrate comprises: a base substrate (1); a black matrix layer (2) with a plurality of opening regions and a plurality of non-opening regions disposed on the base substrate (1); and an array substrate unit disposed on the black matrix layer (2), projections of metal layers in the array substrate unit on the black matrix layer (2) locating within the plurality of non-opening regions of the black matrix layer (2). A method for manufacturing the bottom-emitting substrate and a display device comprising the bottom-emitting substrate are also provided.
US09583641B1 Semiconductor device and manufacturing method thereof
A manufacturing method of a semiconductor device includes the following steps. A plurality of select gates are formed on a memory region of a semiconductor substrate. Two charge storage structures are formed between two adjacent select gates. A source region is formed in the semiconductor substrate, and the source region is formed between the two adjacent select gates. An insulation block is formed between the two charge storage structures and formed on the source region. A memory gate is formed on the insulation block, and the memory gate is connected to the two charge storage structures.
US09583640B1 Method including a formation of a control gate of a nonvolatile memory cell and semiconductor structure
A method comprises providing a semiconductor structure including a nonvolatile memory cell element comprising a floating gate, a select gate and an erase gate formed over a semiconductor material, the select gate and the erase gate being arranged at opposite sides of the floating gate, forming a control gate insulation material layer over the semiconductor structure, forming a control gate material layer over the control gate insulation material layer, performing a first patterning process that forms a control gate over the floating gate and comprises a first etch process that selectively removes a material of the control gate material layer relative to a material of the control gate insulation material layer, and performing a second patterning process that patterns the control gate insulation material layer, the patterned control gate insulation material layer covering portions of the semiconductor structure that are not covered by the control gate.
US09583639B2 Nonvolatile memory device using two-dimensional material and method of manufacturing the same
Example embodiments relate to nonvolatile memory devices using a 2D material, and methods of manufacturing the nonvolatile memory device. The nonvolatile memory device includes a channel layer formed on a substrate, a gate stack that includes a gate electrode, source and drain electrodes. The channel layer has a threshold voltage greater than that of a graphene layer, and the gate stack includes a 2D material floating gate that is not in contact with the channel layer. The channel layer includes first and second material layers and a first barrier layer disposed between the first and second material layers, and the first and second material layers may contact the first barrier layer.
US09583634B2 Semiconductor device and method for manufacturing the same
To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.
US09583633B2 Oxide for semiconductor layer of thin film transistor, thin film transistor and display device
In an oxide for a semiconductor layer of a thin film transistor according to the present invention, wherein metal elements constituting the oxide are In, Zn, and Sn, an oxygen partial pressure is 15% by volume or more when depositing the oxide in the semiconductor layer of the thin film transistor, and a defect density of the oxide satisfies 7.5×1015cm−3 or less, and a mobility satisfies 15 cm2/Vs or more.
US09583626B2 Silicon germanium alloy fins with reduced defects
A silicon germanium alloy is formed on sidewall surfaces of a silicon fin. An oxidation process or a thermal anneal is employed to convert a portion of the silicon fin into a silicon germanium alloy fin. In some embodiments, the silicon germanium alloy fin has a wide upper portion and a narrower lower portion. In such an embodiment, the wide upper portion has a greater germanium content than the narrower lower portion. In other embodiments, the silicon germanium alloy fin has a narrow upper portion and a wider lower portion. In this embodiment, the narrow upper portion of the silicon germanium alloy fin has a greater germanium content than the wider lower portion of the silicon germanium alloy fin.
US09583624B1 Asymmetric finFET memory access transistor
A field effect transistor device comprises a semiconductor substrate, a doped source layer arranged on the semiconductor substrate, an insulator layer arranged on the doped source layer, a fin arranged on the insulator layer, a source region extension portion extending from the doped source layer and through the fin, a gate stack arranged over a channel region of the fin and adjacent to the source region extension portion, a drain region arranged on the fin adjacent to the gate stack; the drain region having a graduated doping concentration.
US09583623B2 Semiconductor device including fin structures disposed over buffer structures and manufacturing method thereof
A semiconductor FET device includes a buffer structure and a fin structure. The buffer structure has a fin shape, is disposed over a substrate and extends along a first direction. The fin structure includes a channel region of the FET device, is disposed on the buffer structure and extends along the first direction. The width of the buffer structure along a second direction perpendicular to the first direction is greater than the width of the fin structure along the second direction measured at an interface between the buffer structure and the fin structure.
US09583618B2 Metal oxide semiconductor field effect transistor having asymmetric lightly doped drain regions
A metal-oxide-semiconductor field effect transistor (MOSFET) includes a substrate and a gate structure over a top surface of the substrate. The MOSFET further includes a source in the substrate on a first side of the gate structure and a drain in the substrate on a second side of the gate structure opposite the first side. A surface portion of the substrate extending from the source to the drain has an asymmetric dopant concentration profile.
US09583615B2 Vertical transistor and local interconnect structure
A first patterned stack and a second patterned stack are formed over a substrate, each of which includes a bottom semiconductor layer, a bottom dielectric spacer layer, a conductive material layer, and a top dielectric spacer layer. Gate dielectrics and vertical semiconductor portions are sequentially formed on each patterned stack. Vertical semiconductor portions are removed from around the second patterned stack, while masked around the first patterned stack. Electrical dopants are introduced to top regions and bottom regions of the remaining vertical semiconductor portions to form a vertical switching device that includes the first patterned stack, while the second patterned stack functions as a horizontal interconnect structure. The vertical switching device can be a transistor or a gated diode.
US09583613B2 Metal oxide semiconductor devices and fabrication methods
A semiconductor device includes a first well that is disposed in a semiconductor substrate. The semiconductor device further includes a second well that is disposed in the semiconductor substrate. The semiconductor device further includes a source region, a drain region, and a gate structure between the source region and the drain region. The gate structure is disposed above the first well. The source region includes a first conducting contact above the first well and. The drain region includes a second conducting contact above the second well, the drain region being connected with the second well at least partially through a first epi region. The first epi region and the second well are configured to lower a first driving voltage applied on the source region and the drain region to a second voltage applied on the gate structure.
US09583605B2 Method of forming a trench in a semiconductor device
A method to make a semiconductor device, a first SiO2 layer and a first Si3N4 layer are sequentially formed on the semiconductor substrate. The first SiO2 layer and the first Si3N4 layer are then patterned as etching mask to form a trench in a semiconductor substrate by a trench etching process. After this, a second SiO2 layer and a second Si3N4 layer are formed conformal onto the substrate. Anisotropic etching is then performed to remove the second Si3N4 and second SiO2 layer except on the trench sidewall. Then a thermal oxidation process is done to grow oxide only in trench bottom and at trench top corner. The radius of curvature of trench bottom and trench top corner is increased at the same time by this thermal oxidation process.
US09583604B2 Semiconductor device with improved short circuit capability
A semiconductor device in which short circuit capability can be improved while decline in overall current capability is suppressed. In the semiconductor device, a plurality of IGBTs (insulated gate bipolar transistors) arranged in a row in one direction over the main surface of a semiconductor substrate include an IGBT located at an extreme end in the one direction and an IGBT located more centrally than the IGBT located at the extreme end. The current capability of the IGBT located at the extreme end is higher than the current capability of the IGBT located centrally.
US09583603B2 ESD protection with integrated LDMOS triggering junction
An electrostatic discharge (ESD) protection device includes a semiconductor substrate, a base region in the semiconductor substrate and having a first conductivity type, an emitter region in the base region and having a second conductivity type, a collector region in the semiconductor substrate, spaced from the base region, and having the second conductivity type, a breakdown trigger region having the second conductivity type, disposed laterally between the base region and the collector region to define a junction across which breakdown occurs to trigger the ESD protection device to shunt ESD discharge current, and a gate structure supported by the semiconductor substrate over the breakdown trigger region and electrically tied to the base region and the emitter region. The lateral width of the breakdown trigger region is configured to establish a voltage level at which the breakdown occurs.
US09583602B2 Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs
Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs are described. For example, a tunneling field effect transistor (TFET) includes a homojunction active region disposed above a substrate. The homojunction active region includes a relaxed Ge or GeSn body having an undoped channel region therein. The homojunction active region also includes doped source and drain regions disposed in the relaxed Ge or GeSn body, on either side of the channel region. The TFET also includes a gate stack disposed on the channel region, between the source and drain regions. The gate stack includes a gate dielectric portion and gate electrode portion.
US09583601B2 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device including a transistor with stable electrical characteristics or high reliability is provided. A gate insulating film is formed over a gate electrode; an oxide semiconductor layer is formed over the gate insulating film; an oxide layer is formed over the oxide semiconductor layer to form a stacked-layer oxide film including the oxide semiconductor layer and the oxide layer; the stacked-layer oxide film is processed into a predetermined shape; a conductive film containing Ti is formed over the stacked-layer oxide film; the conductive film is etched to form source and drain electrodes; and regions in the oxide layer in contact with the source and drain electrodes are heat treated so as to have a low resistivity.
US09583596B2 Drain extended CMOS with counter-doped drain extension
An integrated circuit containing a diode with a drift region containing a first dopant type plus scattering centers. An integrated circuit containing a DEMOS transistor with a drift region containing a first dopant type plus scattering centers. A method for designing an integrated circuit containing a DEMOS transistor with a counter doped drift region.
US09583595B2 Methods of forming low noise semiconductor devices
Disclosed herein are Lateral Diffused Metal Oxide Semiconductor (LDMOS) device and trench isolation related devices, methods, and techniques. In one illustration, a doped region is formed within a semiconductor substrate. A trench isolation region is formed within the doped region. The doped region and the trench isolation region are part of a Lateral Diffused Metal Oxide Semiconductor (LDMOS) device. The trench isolation region or an interface between the trench isolation region and the doped region is configured to reduce low frequency noise in the LDMOS device.
US09583589B1 Self-aligned double gate recess for semiconductor field effect transistors
A method for fabricating a double-recess gate structure for an FET device that includes providing a semiconductor wafer having a plurality of semiconductor layers and depositing an EBL resist layer on the wafer. The method also includes patterning the EBL resist layer to form an opening in the EBL resist layer and performing a first wet etch to form a first recess in the wafer. The method further includes depositing a dielectric layer over the EBL resist layer and into the first recess and performing a dry etch to remove a portion of the dielectric layer in the first recess. The method also includes performing a second wet etch through the opening in the dielectric layer to form a second recess, and depositing a gate metal layer in the first and second recesses and in the opening in the EBL resist layer to form a gate terminal.
US09583586B1 Transient voltage suppressor (TVS) with reduced breakdown voltage
A low capacitance transient voltage suppressor with snapback control and a reduced voltage punch-through breakdown mode includes an n+ type substrate, a first epitaxial layer on the substrate, a buried layer formed within the first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and an implant layer formed within the first epitaxial layer below the buried layer. The implant layer extends beyond the buried layer. A first trench is at an edge of the buried layer and an edge of the implant layer. A second trench is at another edge of the buried layer and extends into the implant layer. A third trench is at another edge of the implant layer. A set of source regions is formed within a top surface of the second epitaxial layer. Implant regions are formed in the second epitaxial layer, with a first implant region located below the first source region.
US09583574B2 Epitaxial buffer layers for group III-N transistors on silicon substrates
Embodiments include epitaxial semiconductor stacks for reduced defect densities in III-N device layers grown over non-III-N substrates, such as silicon substrates. In embodiments, a metamorphic buffer includes an AlxIn1-xN layer lattice matched to an overlying GaN device layers to reduce thermal mismatch induced defects. Such crystalline epitaxial semiconductor stacks may be device layers for HEMT or LED fabrication, for example. System on Chip (SoC) solutions integrating an RFIC with a PMIC using a transistor technology based on group III-nitrides (III-N) capable of achieving high Ft and also sufficiently high breakdown voltage (BV) to implement high voltage and/or high power circuits may be provided on the semiconductor stacks in a first area of the silicon substrate while silicon-based CMOS circuitry is provided in a second area of the substrate.
US09583572B2 FinFET devices having silicon germanium channel fin structures with uniform thickness
Methods are provided to fabricate semiconductor devices, e.g., FinFET devices, having fin channel structures formed of silicon-germanium alloy layers with uniform thickness. For example, a method includes forming a semiconductor fin structure having sidewalls that define a first width of the semiconductor fins structure, and a hard mask layer disposed on a top surface of the semiconductor fin structure. Portions of the sidewalls are etched to form recessed sidewalls that define a thinned portion, wherein a distance between the recessed sidewalls defines a second width of the thinned portion of the semiconductor fin structure, which is less than the first width. Facetted semiconductor alloy layers are formed on the recessed sidewalls, and then anisotropically etched using the hard mask layer as an etch mask to form planarized semiconductor alloy layers of uniform thickness on the recessed sidewalls of the thinned portion of the semiconductor fin structure.
US09583571B2 Dislocation in SiC semiconductor substrate
A semiconductor substrate has a main surface and formed of single crystal silicon carbide. The main surface includes a central area, which is an area other than the area within 5 mm from the outer circumference. When the central area is divided into square areas of 1 mm×1 mm, in any square area, density of dislocations of which Burgers vector is parallel to <0001> direction is at most 1×105 cm−2. Thus, a silicon carbide semiconductor substrate enabling improved yield of semiconductor devices can be provided.
US09583569B2 Profile control over a collector of a bipolar junction transistor
Device structures for a bipolar junction transistor. A layer is formed on a top surface of a substrate. A trench is formed in the layer and has a plurality of sidewalls with a width between an opposite pair of the sidewalls that varies with increasing distance from the top surface of the substrate. A collector pedestal of the bipolar junction transistor is formed in the trench.
US09583565B2 Semiconductor device with isolating layer on side and bottom surfaces
A method for manufacturing a semiconductor device comprises includes providing a substrate with a surface, forming an isolating layer on part of the surface, and forming a first semiconductor portion and spaced therefrom a second semiconductor portion on the surface of the substrate. The isolating layer is interposed between a side surface of the first semiconductor portion and a side surface of the second semiconductor portion which face each other. The method further includes forming a first side isolation layer on the side surface of the first semiconductor portion.
US09583562B2 Reduction of defect induced leakage in III-V semiconductor devices
A semiconductor device includes a semiconductor substrate and a p-doped layer formed on the substrate having a dislocation density exceeding 108 cm−2. An n-type layer is formed on or in the p-doped layer. The n-type layer includes a II-VI material configured to tolerate the dislocation density to form an electronic device with reduced leakage current over a device with a III-V n-type layer.
US09583560B2 Power semiconductor device of stripe cell geometry
A power semiconductor device of stripe cell geometry including a substrate, a plurality of striped power semiconductor units, and a guard ring structure is provided. The substrate has an active area and a termination area surrounding the active area defined thereon. The striped semiconductor unit includes a striped gate conductive structure. The striped semiconductor units are located in the active area. The guard ring structure is located in the termination area and includes at least a ring-shaped conductive structure surrounding the striped power semiconductor units. The ring-shaped conductive structure and the striped gate conductive structures are formed on the same conductive layer, and at least one of the striped gate conductive structures is separated from the nearby ring-shaped conductive structure and electrically connected to the nearby ring-shaped conductive structure through the gate metal pad.
US09583559B2 Capacitor having a top compressive polycrystalline plate
In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.
US09583558B2 High breakdown voltage microelectronic device isolation structure with improved reliability
A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low voltage node by a main dielectric between the high voltage node and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the high voltage node and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer with a bandgap energy less than a bandgap energy of the main dielectric. The lower-bandgap dielectric layer extends beyond the high voltage node continuously around the high voltage node. The lower-bandgap dielectric layer has an isolation break surrounding the high voltage node at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the high voltage node.
US09583557B2 Integrated circuits including a MIMCAP device and methods of forming the same for long and controllable reliability lifetime
Integrated circuits including a MIMCAP device and methods of forming the integrated circuits are provided. An exemplary method of forming an integrated circuit including a MIMCAP device includes pre-determining a thickness of at least one of a bottom high-K layer or a top high-K layer of the MIMCAP device, followed by fabricating the MIMCAP device. The pre-determined thickness is established based upon a pre-determined TDDB lifetime for the MIMCAP device and a minimum target capacitance density at an applied voltage bias to be employed for the MIMCAP device. The MIMCAP device includes a bottom electrode and a dielectric layer disposed over the bottom electrode. The dielectric layer includes a stack of individual layers including the bottom high-K layer, the top high-K layer, and a lower-K layer sandwiched therebetween. At least one of the bottom high-K layer or the top high-K layer has the pre-determined thickness.
US09583554B1 Adjustable ground shielding circuitry
An integrated circuit (IC) die may include a substrate layer and an inductor with an associated capacitance formed on one of multiple metal layers above the substrate layer. Power shielding strips may be formed between the inductor and the substrate layer. Portions of the power shielding strips may be selectively activated to adjust the capacitance of the inductor. As an example, switches may be coupled to the power shielding strips to selectively couple a portion of the power shielding strips to a ground voltage to increase the capacitance of the inductor. As another example, a fuse element may be used to selectively activate desired portions of the power shielding strips.
US09583553B2 Organic light emitting display device
An organic light emitting display device includes a substrate a plurality of pixels disposed along a first direction and a second direction, the first direction and the second direction being substantially parallel to a top surface of the substrate and substantially perpendicular to each other, first wirings which is disposed on the substrate, extends in the first direction, and includes a first low voltage power line, and second wirings which is disposed on the substrate, extends in the second direction, and includes a second low voltage power line electrically connected to the first low voltage power line.
US09583552B2 Organic light emitting diode display
An organic light emitting diode display includes a substrate; a gate wire on the substrate; an interlayer insulating layer covering the gate wire; a data wire on the interlayer insulating layer; a passivation layer on the data wire and the interlayer insulating layer and having a protection opening; a pixel electrode on a first wiring portion of the data wire exposed through the protection opening and the interlayer insulating layer; a pixel definition layer on the passivation layer and having a pixel opening exposing the pixel electrode; an organic emission layer covering the pixel electrode; and a common electrode covering the organic emission layer and the pixel definition layer, wherein the pixel electrode contacting the first wiring portion of the data wire and the interlayer insulating layer has protrusions and depressions.
US09583550B2 Display device
A display device includes a plurality of pixel electrodes, a common electrode disposed from a display area to a peripheral area continuously, a light emitting layer disposed between the plurality of pixel electrodes and the common electrode, and a plurality of auxiliary wirings electrically connecting to the common electrode and located from the display area to the peripheral area continuously. The common electrode includes overlapping areas where the common electrode is in contact with and overlaps the auxiliary wiring in the peripheral area, and includes a thick film portion in at least a portion of the overlapping areas. A thickness of the thick film portion is larger than that of an area other than the overlapping areas.
US09583548B2 Organic light emitting display device comprising light-shielding patterns and method for manufacturing the same
Provided are an organic light emitting display (OLED) device and method for manufacturing the same. The OLED device includes: a plurality of gate lines in one direction on a substrate, a plurality of light-shielding patterns corresponding to at least parts of peripheries of the respective pixel regions on the substrate, the light-shielding patterns spaced apart from the gate lines, at least one insulating film covering the substrate, the gate lines, and the light-shielding patterns, a plurality of data lines in another direction crossing the gate lines on the insulating film to define the pixel areas, a passivation film covering the insulating film and the data lines, a plurality of color filters in the pixel areas on the passivation film, an over-coating film evenly covering the passivation film and covering the color filters, and a plurality of organic light emitting elements in the pixel areas on the over-coating film.
US09583541B2 Organic light-emitting device
The present invention provides an organic light emitting device including: a substrate; and two or more stacked light emitting elements, which comprise a first electrode, at least one intermediate electrode, a second electrode, and an organic material layer disposed between the electrodes, the stacked organic light emitting elements including a first group of electrodes electrically connected to each other such that among the electrodes, at least two electrodes, which are not adjacent to each other, become a common electric potential, and a second group of electrodes which include one electrode among electrodes which are not electrically connected to the first group of electrodes, or at least two electrodes which are not electrically connected to the first group of electrodes and are electrically connected to each other so as to be a common electric potential without being adjacent to each other, in which the stacked organic light emitting elements are disposed at an interval apart from each other on the substrate and driven by an alternating current power source such that a form, in which a first group of electrodes of one stacked organic light emitting element among the stacked organic light emitting elements are directly connected to a second group of electrodes of another stacked organic light element, is continuously repeated.
US09583539B2 Word line connection for memory device and method of making thereof
A three-dimensional monolithic memory device includes at least one device region and a plurality of contact regions each including a stack of an alternating plurality of conductive word line contact layers and insulating layers located over a substrate, where the stacks in the plurality of contact regions are separated from one another by an insulating material, and a bridge connector including a conductive material extending between a first conductive word line contact layer of a first stack in a first contact region and a second conductive word line contact layer of a second stack in a second contact region, where the first word line contact layer extends in a first contact level substantially parallel to a major surface of the substrate and the second word line contact layer extends in a second contact level substantially parallel to the major surface of the substrate that is different than the first level.
US09583537B2 Resistance-change semiconductor memory
According to one embodiment, a memory includes first to fourth memory cells aligned in a first direction. Each of the first to fourth memory cells comprises a cell transistor having a gate connected to a word line extending in a second direction crossing the first direction and a resistive memory element having one end connected to a first source/drain region of the cell transistor. A second source/drain region of the cell transistor is connected to one of a first bit line extending in the first direction and a second bit line extending in the second direction. The other end of the resistive memory element is connected to one of the first and second bit lines which is apart from the second source/drain region. The second source/drain regions in the first and second memory cells are shared, and the second source/drain regions in the third and fourth memory cells are shared.
US09583536B2 Memory device and method for manufacturing the same
A memory device having an array area and a periphery area is provided. The memory device includes a substrate, an isolation layer formed in the substrate, a first doped region formed on the isolation layer in the array area, a second doped region formed on the first doped region, a metal silicide layer formed on the second doped region, and a metal silicide oxide layer formed on the metal silicide layer.
US09583535B2 Magnetoresistive memory device and manufacturing method of the same
According to one embodiment, a magnetoresistive memory device includes a substrate, a first oxide film provided on the substrate, bottom electrodes provided in the first oxide film, a part of each of the bottom electrodes protruding above the first oxide film, magnetoresistive elements provided on the respective bottom electrodes, sidewall nitride films provided on side surfaces of the respective bottom electrodes and the magnetoresistive elements, a second oxide film provided on the magnetoresistive elements, the sidewall nitride films and the first oxide film, and contact electrodes provided in the second oxide film and the first oxide film to reach the substrate from an upper surface of the second oxide film.
US09583534B2 Semiconductor device including magneto-resistive device
A semiconductor device comprises a magneto-resistive device capable of performing multiple functions with low power. The semiconductor device comprises a cell transistor in which a first impurity region and a second impurity region are respectively arranged on both sides of a channel region in a channel direction, a source line connected to the first impurity region of the cell transistor, and the magneto-resistive device connected to the second impurity region of the cell transistor. The first impurity region and the second impurity region are asymmetrical about a center of the cell transistor in the channel direction with respect to at least one of a shape and an impurity concentration distribution.
US09583513B2 Display device
By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.
US09583512B2 Array substrate and manufacturing method thereof, and display panel
The disclosure relates to an array substrate and a manufacturing method thereof, and a display panel. The array substrate includes a plurality of data lines and a plurality of first gate lines, a plurality of first pixel units and a plurality of second pixel units; a plurality of second gate lines; a first TFT and a second TFT, where a first electrode of the first TFT is disposed at one side of the second gate line, the gate and the second electrode of the first TFT is disposed at the other side of the second gate line, the gate, the first electrode, the second electrode and the active layer of each second TFT are disposed at the same side of the second gate line, where the first electrodes of the first TFT and the second TFT are electrically connected to the date lines respectively.
US09583508B2 Array substrate, preparation method for array substrate, and display device
The present invention discloses an array substrate, a preparation method for the array substrate, and a display device, wherein the array substrate comprises a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode, and a pixel electrode arranged on a substrate, the active layer includes an electric conduction area, a coverage area covered by the source electrode and the drain electrode, and an exposure area surrounding the coverage area, and the pixel electrode is lapped on the upper surfaces of the drain electrode, the exposure area of the active layer, and the gate insulation layer. According to the present invention, the pixel electrode breaks in the area, with the large gradient angle, of the drain electrode caused by slip-down due to gravity can be avoided, and the lap joint for the pixel electrode and the drain electrode is effectively facilitated.
US09583507B2 Adjacent strained <100> NFET fins and <110> PFET fins
The present invention relates generally to semiconductor devices, and more particularly, to a structure and method of forming strained <100> n-channel field effect transistor (NFET) fins and adjacent strained <110> p-channel field effect transistor (PFET) fins on the same substrate. A <110> crystalline oxide layer may be either bonded or epitaxially grown on a substrate layer. A first SOI layer with a <100> crystallographic orientation and tensile strain may be bonded to the crystalline oxide layer. A second SOI layer with a <110> crystallographic orientation and compressive strain may be epitaxially grown on the crystalline oxide layer. The first SOI layer may be used to form the fins of a NFET device. The second SOI layer may be used to form the fins of a PFET device.
US09583505B2 Non-volatile memory device
According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
US09583499B1 Devices with embedded non-volatile memory and metal gates and methods for fabricating the same
Devices and methods for fabricating devices with floating gates and replacement metal gates are provided. In an embodiment, a method for fabricating a device includes providing a semiconductor substrate. The method forms a floating gate and a sacrificial gate over the semiconductor substrate. Further, the method replaces the sacrificial gate with a metal gate. After replacing the sacrificial gate with the metal gate, the method forms a control gate over the floating gate.
US09583496B2 Memory device with manufacturable cylindrical storage node
A high capacitance embedded capacitor and associated fabrication processes are disclosed for fabricating a capacitor stack in a multi-layer stack to include a first capacitor plate conductor formed with a cylinder-shaped storage node electrode formed in the multi-layer stack, a capacitor dielectric layer surrounding the cylinder-shaped storage node electrode, and a second capacitor plate conductor formed from a conductive layer in the multi-layer stack that is sandwiched between a bottom and top dielectric layer, where the cylinder-shaped storage node electrode is surrounded by and extends through the conductive layer.
US09583493B2 Integrated circuit and semiconductor device
An embodiment includes an integrated circuit comprising a standard cell, the standard cell comprising: first and second active regions having different conductivity types and extending in a first direction; first, second, and third conductive lines extending over the first and second active regions in a second direction substantially perpendicular to the first direction, and disposed parallel to each other; and a cutting layer extending in the first direction between the first and second active regions and separating the first conductive line into a first upper conductive line and a first lower conductive line, the second conductive line into a second upper conductive line and a second lower conductive line, and the third conductive line into a third upper conductive line and a third lower conductive line; wherein: the first upper conductive line and the third lower conductive line are electrically connected together; and the second upper conductive line and the second lower conductive line are electrically connected together.
US09583490B2 Inverters and manufacturing methods thereof
Inverters and methods of manufacture thereof are disclosed. In some embodiments, an inverter includes a substrate and a first tunnel FET (TFET) disposed over the substrate. The first TFET is a first fin field effect transistor (FinFET). A second TFET is over the first TFET. The second TFET is a second FinFET. A junction isolation region is disposed between a source of the first TFET and a source of the second TFET.
US09583486B1 Stable work function for narrow-pitch devices
A work function setting metal stack includes a configuration of layers including a high dielectric constant layer and a diffusion prevention layer formed on the high dielectric constant layer. An aluminum doped TiC layer has a thickness greater than 5 nm wherein the configuration of layers is employed between two regions as a diffusion barrier to prevent mass diffusion between the two regions.
US09583485B2 Fin field effect transistor (FinFET) device structure with uneven gate structure and method for forming the same
A FinFET device structure is provided. The FinFET device structure includes an isolation structure formed over a substrate and a fin structure formed over the substrate. The FinFET device structure includes a first gate structure and a second gate structure formed over the fin structure, and the first gate structure has a first width in a direction parallel to the fin structure, the second gate structure has a second width in a direction parallel to the fin structure, and the first width is smaller than the second width. The first gate structure includes a first work function layer having a first height. The second gate structure includes a second work function layer having a second height and a gap between the first height and the second height is in a range from about 1 nm to about 6 nm.
US09583480B2 Integrated circuit with matching threshold voltages and method for making same
An integrated circuit having a substrate, a buffer layer formed over the substrate, a barrier layer formed over the buffer layer, and an isolation region that isolates an enhancement mode device from a depletion mode device. The integrated circuit further includes a first gate contact for the enhancement mode device that is disposed in one gate contact recess and a second gate contact for the depletion mode device that is disposed in a second gate contact recess.
US09583469B2 Light-emitting device
This disclosure discloses a light-emitting device. The light-emitting device is configured to electrically connect to an external circuit and comprises: a first light-emitting structure; a second light-emitting structure; a first conductive structure comprising a first connecting pad having a side surface and a top surface connected to the first light-emitting structure, and a first connecting portion extending from the side surface and connected to the external circuit; and a second conductive structure electrically connecting the first light-emitting structure with the second light-emitting structure.
US09583467B2 Optoelectronic semiconductor component and method for producing said component
An optoelectronic semiconductor component and a method for making an optoelectronic semiconductor component are disclosed. In an embodiment the component includes a carrier including at least one conversion-medium body and a potting body, the potting body surrounding the conversion-medium body at least in places, as seen in plan view, electrical contact structures fitted at least indirectly to the carrier and a plurality of optoelectronic semiconductor chips fitted to a main face of the carrier, the optoelectronic semiconductor chips configured to generate radiation, wherein the conversion-medium body is shaped as a plate, wherein the semiconductor chips are directly mechanically connected to the conversion-medium body, and wherein the conversion-medium body is free of cutouts for the electrical contact structures and is not penetrated by the electrical contact structure.
US09583462B2 Damascene re-distribution layer (RDL) in fan out split die application
A semiconductor device may include a first semiconductor die. A passivation layer supports the first semiconductor die. The passivation layer may include a first via having a barrier layer and a first redistribution layer (RDL) conductive interconnect coupled to the first via through the barrier layer. The first via may couple the first semiconductor die to the first RDL conductive interconnect.
US09583456B2 Multiple bond via arrays of different wire heights on a same substrate
Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires (“first wires”) extend from a surface of the substrate. Second wire bond wires (“second wires”) extend from the surface of the substrate. The first wires and the second wires are external to the substrate. The first wires are disposed at least partially within the second wires. The first wires are of a first height. The second wires are of a second height greater than the first height for coupling of at least one electronic component to the first wires at least partially disposed within the second wires.
US09583453B2 Semiconductor packaging containing sintering die-attach material
Sintering die-attach materials provide a lead-free solution for semiconductor packages with superior electrical, thermal and mechanical performance to prior art alternatives. Wafer-applied sintering materials form a metallurgical bond to both semiconductor die and adherends as well as throughout the die-attach joint and do not remelt at the original process temperature. Application to either one or both sides of the wafer, as well as paste a film application are disclosed.
US09583452B2 Systems and methods for high-speed, low-profile memory packages and pinout designs
Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
US09583446B2 Semiconductor device and method of forming a shielding layer between stacked semiconductor die
A semiconductor device has a first semiconductor die with a shielding layer formed over its back surface. The first semiconductor die is mounted to a carrier. A first insulating layer is formed over the shielding layer. A second semiconductor die is mounted over the first semiconductor die separated by the shielding layer and first insulating layer. A second insulating layer is deposited over the first and second semiconductor die. A first interconnect structure is formed over the second semiconductor die and second insulating layer. A second interconnect structure is formed over the first semiconductor die and second insulating layer. The shielding layer is electrically connected to a low-impedance ground point through a bond wire, RDL, or TSV. The second semiconductor die may also have a shielding layer formed on its back surface. The semiconductor die are bonded through the metal-to-metal shielding layers.
US09583443B2 Method for displaying position of alignment mark, array substrate and manufacturing method thereof
A method for displaying a position of an alignment mark, an array substrate and a manufacturing method thereof are provided. The method for displaying the position of the alignment mark includes: forming an alignment mark on a surface of a base substrate; forming a first isolation layer covering the alignment mark; forming a via hole in the first isolation layer to expose the alignment mark; applying a first material in the via hole to form a first material pattern; and applying a second material on surfaces of the first material pattern and the first isolation layer to form a second material film, wherein the first material and the second material are configured to have different polarities, so that the second material cannot be attached to the first material pattern.
US09583442B2 Interconnect structure including middle of line (MOL) metal layer local interconnect on etch stop layer
An interconnect structure includes an insulator stack on an upper surface of a semiconductor substrate. The insulator stack includes a first insulator layer having at least one semiconductor device embedded therein and an etch stop layer interposed between the first insulator layer and a second insulator layer. At least one electrically conductive local contact extends through each of the second insulator layer, etch stop layer and, first insulator layer to contact the at least one semiconductor device. The interconnect structure further includes at least one first layer contact element disposed on the etch stop layer and against the at least one conductive local contact.
US09583441B2 Semiconductor device
A conductor provided in an interconnection layer is allowed to have a low resistance. An insulator film is provided over a substrate, and is comprised of SiO(1-x)Nx (where x>0.5 in an XRD analysis result). An interconnection is provided over the insulator film, and includes a first layer and a second layer. The first layer includes at least one of TiN, TaN, WN, and RuN. The second layer is provided over the first layer, and is formed of a material having a resistance lower than the first layer, for example, W.
US09583440B2 Semiconductor devices including metal-silicon-nitride patterns
A semiconductor memory device can include a first conductive line crossing over a field isolation region and crossing over an active region of the device, where the first conductive line can include a first conductive pattern being doped, a second conductive pattern, and a metal-silicon-nitride pattern between the first and second conductive patterns and can be configured to provide a contact at a lower boundary of the metal-silicon-nitride pattern with the first conductive pattern and configured to provide a diffusion barrier at an upper boundary of the metal-silicon-nitride pattern with the second conductive pattern.
US09583439B1 Memory device comprising memory strings penetrating through a stacking structure and electrically contacting with a metal layer and method for fabricating the same
A memory device and a method for fabricating the same are provided. The memory device includes a substrate, a ground layer disposed on the substrate, a stacking structure having a plurality of conductive layers and a plurality of insulating layers alternatively stacked on the ground layer and a plurality of memory strings penetrating through the stacking structure. The ground layer includes a metal layer. The memory strings electrically contact with the metal layer.
US09583436B2 Package apparatus and manufacturing method thereof
A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a first conductive glue layer, an internal component, a second conductive pillar layer, a first molding compound layer and a second conductive wiring layer. The first conductive pillar layer is disposed on the first conductive wiring layer. The first conductive glue layer is disposed on the first conductive wiring layer. The internal component has a first electrode layer and a second electrode layer, wherein the first electrode layer is disposed and electrical connected to the first conductive glue layer. The second conductive pillar layer is disposed on the second electrode layer. Wherein the first conductive wiring layer, the first conductive pillar layer, the first conductive glue layer, the internal component and the second conductive pillar layer are disposed inside the first molding compound layer.
US09583431B1 2.5D electronic package
A 2.5D electronic package is provided in which at least one integrated circuit is mounted on an interposer that is mounted on a package substrate. To reduce warpage, the interconnection array of the integrated circuit does not include a thick metallization layer; and at least part of the power distribution function that would otherwise have been performed by the thick metallization layer is performed by one or more metallization layers that are added to the interposer. A method is provided for optimizing the design of the electronic package by choosing the appropriate number of metallization layers to be added to the interposer.
US09583428B2 Embedding thin chips in polymer
Systems and methods are provided for the embedding of thin chips. A well region is generated in a substrate that includes a conductive material disposed on a flexible polymer. The standoff well region can be generated by pattern the conductive material, where the thin chip is embedded in the standoff well region. A cavity can be generated in the polymer layer to form a polymer well region, where the thin chip is embedded in the polymer well region.
US09583427B2 Semiconductor substrate, semiconductor package structure and method of making the same
The present disclosure relates to a semiconductor substrate, a semiconductor package structure, and methods for making the same. A method includes providing a substrate and a carrier layer. The substrate includes a first patterned metal layer, a second patterned metal layer spaced from the first patterned metal layer, and a dielectric layer disposed between the first patterned metal layer and the second patterned metal layer. The dielectric layer covers the second patterned metal layer. The dielectric layer defines first openings exposing the second patterned metal layer, and further defines a via opening extending from the first patterned metal layer to the second patterned metal layer. A conductive material is disposed in the via and electrically connects the first patterned metal layer to the second patterned metal layer. The carrier layer defines second openings exposing the second patterned metal layer.
US09583425B2 Solder fatigue arrest for wafer level package
A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 μm) and fifty micrometers (50 μm) from the lead. In some embodiments, the core covers between at least approximately one-third (⅓) and one-half (½) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.
US09583423B2 Semiconductor device and method of manufacturing the same
A semiconductor device includes a stacked structure including conductive layers and insulating layers stacked alternately with each other, first semiconductor patterns passing through the stacked structure and arranged in a first direction, second semiconductor patterns passing through the stacked structure and arranged in the first direction, wherein the second semiconductor patterns are adjacent to the first semiconductor patterns in a second direction crossing the first direction, air gaps located between the first semiconductor patterns and the second semiconductor patterns and extending in the first direction, and at least one blocking pattern passing through the stacked structure and filling portions of the air gaps.
US09583422B2 Lead frame
A lead frame, as one product unit in a multi-row lead frame sharing a partition frame among other lead frames, has a non-mirrorsymmetric pad region and at least one terminal region arranged inside and held to a rectangular outer frame region, which is a part of the partition frame and forms a boundary of the lead frame as a product unit, via respective suspension leads. Only two suspension leads hold the non-mirrorsymmetric pad region to the outer frame region as extending from opposite sides of the outer frame region to the non-mirrorsymmetric pad region, respectively. This structure decreases stress resulting from holding of the non-mirrorsymmetric pad region to the outer frame region and thus can prevent the outer frame region from deformation without widened connecting bars or dambars, which form the outer frame region.
US09583416B2 Mounting structure of semiconductor device and method of manufacturing the same
A semiconductor-device mounting structure includes a first semiconductor device and a plate-shaped second semiconductor device connected to the first semiconductor device. The first semiconductor device includes a flexible board, an electronic component, and a sealing resin. The flexible board includes a bendable flexible portion and a hard portion. The flexible portion is bent at a boundary with the hard portion, along a shape of the electronic component such that the flexible board covers the electronic component. The flexible board and the electronic component are sealed with the sealing resin. The first semiconductor device is provided vertical to the second semiconductor device such that the hard portion is provided parallel to the second semiconductor device, and a length of the hard portion in a direction perpendicular to a bend line of the flexible portion is equal to a thickness of a bottom surface of the electronic component in the direction.
US09583414B2 Silicon-on-plastic semiconductor device and method of making the same
A semiconductor device that does not produce nonlinearities attributed to a high resistivity silicon handle interfaced with a dielectric region of a buried oxide (BOX) layer is disclosed. The semiconductor device includes a semiconductor stack structure with a first surface and a second surface wherein the second surface is on an opposite side of the semiconductor stack structure from the first surface. At least one device terminal is included in the semiconductor stack structure and at least one electrical contact extends from the second surface and is electrically coupled to the at least one device terminal. The semiconductor stack is protected by a polymer disposed on the first surface of the semiconductor stack. The polymer has high thermal conductivity and high electrical resistivity.
US09583412B2 Semiconductor device
A semiconductor device includes a substrate having an edge, a semiconductor layer provided on a substrate, an electrode pad provided on the semiconductor layer, an inorganic insulating film having a first opening through which an upper surface of the electrode pad is exposed, and a resin film provided on the inorganic insulating film, the resin film having a second opening and a third opening separated from each other, where the upper surface of the electrode pad is exposed through the second opening, where the third opening is located between the second opening and the edge of the substrate, and where a bottom of the third opening is constituted by the resin film or the inorganic insulating film.
US09583409B2 Resin sealed module
A resin-sealed module is provided which reduces the warpage of a substrate and the detachment between a sealing resin and the substrate which occur during re-reflow, has the excellent flatness of the top and bottom surfaces, and reduces the occurrence of the short failures. A resin layer made of a thermoplastic resin is arranged on top of a substrate, and a resin layer made of a thermosetting resin is arranged on top of this resin layer, thereby reducing the warpage of the substrate and the detachment between the sealing resin and the substrate which occur during re-reflow.
US09583408B1 Reducing directional stress in an orthotropic encapsulation member of an electronic package
Methods and apparatuses for reducing directional stress in an orthotropic encapsulation member of an electronic package may include attaching a stiffening frame to a carrier, the stiffening frame comprising a central opening to accept a semiconductor chip and a plurality of opposing sidewalls, electronically coupling the semiconductor chip to the carrier concentrically arranged within the central opening, and thermally contacting a directional heat spreader to the semiconductor chip, the directional heat spreader transferring heat from the semiconductor chip, wherein the directional heat spreader is shaped to reduce a directional stress along the opposing bivector direction.
US09583406B2 System and method for dual-region singulation
A method for semiconductor fabrication includes forming a first array of semiconductor circuitry and a second array of semiconductor circuitry separated by a singulation region and a contact region. The method also includes forming a first array of process control monitoring structures within the singulation region of a substrate. The method also includes forming a first array of contact pads disposed in the contact region. The method also includes forming electrical connections between the first array of process control monitoring structures and the first array of contact pads, wherein all external electrical connections to the first array of process control monitoring structures are made through the first array of contact pads.
US09583403B2 Implementing resistance defect performance mitigation using test signature directed self heating and increased voltage
A method and system are provided for implementing resistive defect performance mitigation for integrated circuits. A test is generated for identifying resistive defects. A first self heating repair process is performed for repairing resistive defects. Testing is performed to identify a mitigated resistive defect and a functional integrated circuit. Responsive to identifying a resistive defect not being mitigated and a functional integrated circuit, a second repair process is performed, then testing is performed again.
US09583401B2 Nano deposition and ablation for the repair and fabrication of integrated circuits
An apparatus for and methods of repairing and manufacturing integrated circuits using the apparatus. The apparatus, comprising: a vacuum chamber containing: a movable stage configured to hold a substrate; an inspection and analysis probe; a heat source; a gas injector; and a gas manifold connecting multiple gas sources to the gas injector.
US09583395B2 Method for manufacturing a semiconductor switching device with different local cell geometry
A method for manufacturing a semiconductor device includes providing a semiconductor substrate having an outer rim, an active area, and an edge termination region arranged between the active area and the outer rim, and forming a plurality of switchable cells in the active area. Each of the switchable cells includes a body region, a gate electrode structure, and a source region. The active area defined by the switchable cells includes at least a first switchable region having a specific gate-drain capacitance which is different to a specific gate-drain capacitance of a second switchable region. The method further includes forming a source metallization in ohmic contact with the source regions of the switchable cells, and forming a gate metallization in ohmic contact with the gate electrode structures of the switchable cells.
US09583393B2 Epitaxial growth of doped film for source and drain regions
Embodiments of mechanisms for epitaxially growing one or more doped silicon-containing materials to form source and drain regions of finFET devices are provided in this disclosure. The dopants in the one or more doped silicon-containing materials can be driven into the neighboring lightly-doped-drain (LDD) regions by thermal anneal to dope the regions. The epitaxially growing process uses a cyclical deposition/deposition/etch (CDDE) process. In each cycle of the CDDE process, a first and a second doped materials are formed and a following etch removes most of the second doped material. The first doped material has a higher dopant concentration than the second material and is protected from the etching process by the second doped material. The CDDE process enables forming a highly doped silicon-containing material.
US09583392B2 Carbon layer and method of manufacture
A system and method for manufacturing a carbon layer is provided. An embodiment comprises depositing a first metal layer on a substrate, the substrate comprising carbon. A silicide is epitiaxially grown on the substrate, the epitaxially growing the silicide also forming a layer of carbon over the silicide. In an embodiment the carbon layer is graphene, and may be transferred to a semiconductor substrate for further processing to form a channel within the graphene.
US09583390B2 Organic thin film passivation of metal interconnections
Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on a semiconductor wafer, the organic thin film layer also being formed on a surface adjacent to the metal bumps on the wafer. The wafer is diced into a plurality of semiconductor die structures, the die structures including the organic thin film layer. The semiconductor die structures are attached to substrates, wherein the attaching includes forming a solder bond between the metal bumps on a die structure and bonding pads on a substrate, and wherein the solder bond extends through the organic thin film layer. The organic thin film layer is then exposed to a plasma. Other embodiments are described and claimed.
US09583380B2 Anisotropic material damage process for etching low-K dielectric materials
In one example, a method includes forming a mask layer above or in a dielectric material. The dielectric material is exposed to photon radiation in an ambient atmosphere comprising a carbon gettering agent to generate damaged portions of the dielectric material. The mask layer blocks the photon radiation. The damaged portions of the dielectric material are removed.
US09583378B2 Formation of germanium-containing channel region by thermal condensation utilizing an oxygen permeable material
A structure including a first semiconductor material portion and a second semiconductor material portion is provided. An oxygen impermeable hard mask is then formed directly on a surface of the first semiconductor material portion. Next, a silicon germanium layer is epitaxially formed on the second semiconductor material portion, but not the first semiconductor material portion. An oxygen permeable hard mask is then formed over the first and second semiconductor material portions. A thermal condensation process is then performed which converts the second semiconductor material portion into a germanium-containing semiconductor material portion. The oxygen permeable hard mask and the oxygen impermeable hard mask are then removed. A functional gate structure can be formed atop the remaining first semiconductor material portion and the thus formed germanium-containing semiconductor material portion.
US09583377B2 Installation fixture for elastomer bands
An installation fixture adapted to mount an elastomer band in a mounting groove around a semiconductor substrate support used for supporting a semiconductor substrate in a plasma processing chamber is disclosed, which includes an annular ring having a vertically extending portion on an outer edge of the ring and adapted to receive the elastomer band, and a base plate configured to be attached to the annular ring, the base plate having a plurality of radially extending portions adapted to receive a plurality of mechanical fasteners at locations corresponding to mounting holes in the semiconductor substrate support.
US09583376B2 Suction-holding apparatus and wafer polishing apparatus
A suction-holding apparatus includes a suction plate made of an air-permeable material, a holding member formed with a through-hole in which the suction plate is placed, and a base to which the holding member is attached. The suction plate includes a jutting-out portion so that the outer edge of the rear face is disposed outwardly from the outer edge of the front face. The through-hole includes a first edge and a second edge spaced apart from each other in the thickness direction. The first edge is adjacent to the base. The holding member includes an eaved portion so that the second edge of the through-hole is disposed inwardly from the outer edge of the rear face.
US09583374B2 Debonding temporarily bonded semiconductor wafers
Described methods and apparatus provide a controlled perturbation to an adhesive bond between a device wafer and a carrier wafer. The controlled perturbation, which can be mechanical, chemical, thermal, or radiative, facilitates the separation of the two wafers without damaging the device wafer. The controlled perturbation initiates a crack either within the adhesive joining the two wafers, at an interface within the adhesive layer (such as between a release layer and the adhesive), or at a wafer/adhesive interface. The crack can then be propagated using any of the foregoing methods, or combinations thereof, used to initiate the crack.
US09583371B2 Electrostatic chuck and apparatus for processing a substrate including the same
An ESC may include a dielectric layer, an electrode, a pedestal, a heater, an adhesive and a protecting ring. The dielectric layer may be configured to support a substrate. The electrode may be disposed in the dielectric layer and is configured to form plasma over the substrate. The pedestal may be disposed under the dielectric layer. The heater may be disposed between the pedestal and the dielectric layer and is configured to heat the substrate. The adhesive may be disposed between the pedestal and the heater, and between the heater and the dielectric layer. The protecting ring may be configured to surround the adhesive. The protecting ring may include a plasma-resistant material.
US09583369B2 Ion assisted deposition for rare-earth oxide based coatings on lids and nozzles
A method of manufacturing an article comprises providing a lid or nozzle for an etch reactor. Ion assisted deposition (IAD) is then performed to deposit a protective layer on at least one surface of the lid or nozzle, wherein the protective layer is a plasma resistant rare earth oxide film having a thickness of less than 300 μm and an average surface roughness of 10 micro-inches or less.
US09583367B2 Methods and apparatus for bump-on-trace chip packaging
Methods and apparatuses for a attaching a first substrate to a second substrate are provided. In some embodiments, a first substrate has a protective layer, such as a solder mask, around a die attach area, at which a second substrate is attached. A keep-out region (e.g., an area between the second substrate and the protective layer) is a region around the second substrate in which the protective layer is not formed or removed. The keep-out region is sized such that a sufficient gap exists between the second substrate and the protective layer to place an underfill between the first substrate and the second substrate while reducing or preventing voids and while allowing traces in the keep-out region to be covered by the underfill.
US09583361B2 Method of processing target object and plasma processing apparatus
A method of processing a target object includes (a) exposing a resist mask to active species of hydrogen generated by exciting plasma of a hydrogen-containing gas within a processing vessel while the target object is mounted on a mounting table provided in the processing vessel; and (b) etching a hard mask layer by exciting plasma of an etchant gas within the processing vessel after the exposing of the resist mask to the active species of hydrogen. The plasma is excited by applying of a high frequency power for plasma excitation to an upper electrode. In the method, a distance between the upper electrode and the mounting table in the etching of the hard mask layer ((b) process) is set to be larger than a distance between the upper electrode and the mounting table in the exposing of the resist mask to the active species of hydrogen ((a) process).
US09583358B2 Hardmask composition and method of forming pattern by using the hardmask composition
A hardmask composition may include a solvent and a 2-dimensional carbon nanostructure containing about 0.01 atom % to about 40 atom % of oxygen or a 2-dimensional carbon nanostructure precursor thereof. A content of oxygen in the 2-dimensional carbon nanostructure precursor may be lower than about 0.01 atom % or greater than about 40 atom %. The hardmask composition may be used to form a fine pattern.
US09583356B1 Method for forming semiconductor device structure
A method for forming a semiconductor device structure is provided. The semiconductor device structure includes forming a film over a substrate. The semiconductor device structure includes forming a first mask layer over the film. The semiconductor device structure includes forming a second mask layer over the first mask layer. The second mask layer exposes a first portion of the first mask layer. The semiconductor device structure includes performing a plasma etching and deposition process to remove the first portion of the first mask layer and to form a protection layer over a first sidewall of the second mask layer. The first mask layer exposes a second portion of the film after the plasma etching and deposition process. The semiconductor device structure includes removing the second portion using the first mask layer and the second mask layer as an etching mask.
US09583351B2 Inverted contact
An inverted contact and methods of fabrication are provided. A sacrificial layer is patterned in an inverted trapezoid shape, and oxide is deposited around the pattern. The sacrificial layer is removed, and a metal contact material is deposited, taking an inverted-trapezoid shape. Embodiments of the present invention provide an inverted contact, having a wider base and a narrower top. The wider base provides improved electrical contact to the underlying active area. The narrower top allows for closer placement of adjacent contacts, serving to increase overall circuit density of an integrated circuit.
US09583347B2 Manufacturing method for semiconductor device using resist patterns and impurity injections
A manufacturing method for a semiconductor device, the method, comprising forming, on a substrate, a first resist pattern including a plurality of line patterns extending in a predetermined direction, injecting an impurity into the substrate by using the first resist pattern, removing the first resist pattern, forming a second resist pattern including a plurality of second line patterns extending in the predetermined direction, and injecting an impurity into the substrate by using the second resist pattern, wherein, in the forming the second resist pattern, the plurality of second line patterns are respectively formed between places where the adjacent first line patterns are formed.
US09583346B2 Method for manufacturing silicon carbide semiconductor device
A method for manufacturing a silicon carbide semiconductor device includes steps below. A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, the first main surface having a maximal diameter greater than 100 mm, is prepared. An impurity region is formed on a side of the first main surface of the silicon carbide substrate. In a plan view, a cover member is arranged on the side of the first main surface so as to cover at least the entire impurity region. The silicon carbide substrate is annealed at a temperature lower than a melting point of the cover member while the cover member is arranged on the side of the first main surface of the silicon carbide substrate.
US09583345B2 Method for overcoming broken line and photoresist scum issues in tri-layer photoresist patterning
A method of fabricating a semiconductor device includes forming a first layer over a substrate and forming a second layer over the first layer. The method further includes patterning the second layer into a mask having one or more openings that expose portions of the first layer. The method further includes etching the first layer through the one or more openings via a first etching process, resulting in a patterned first layer. The first etching process includes forming a coating layer around both the mask and the patterned first layer while the first layer is being etched.
US09583344B2 Photoresist pattern trimming methods
Provided are methods of trimming photoresist patterns. The methods involve coating a photoresist trimming composition over a photoresist pattern, wherein the trimming composition includes a matrix polymer, a thermal acid generator and a solvent, the trimming composition being free of cross-linking agents. The coated semiconductor substrate is heated to generate an acid in the trimming composition from the thermal acid generator, thereby causing a change in polarity of the matrix polymer in a surface region of the photoresist pattern. The photoresist pattern is contacted with a developing solution to remove the surface region of the photoresist pattern. The methods find particular applicability in the formation of very fine lithographic features in the manufacture of semiconductor devices.
US09583343B2 Method of forming non-continuous line pattern and non-continuous line pattern structure
A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.
US09583341B2 Layer transferring process
A process for transferring a useful layer to a receiver substrate includes providing a donor substrate comprising an intermediate layer, a carrier substrate, and a useful layer. The intermediate layer is free of species liable to degas during a subsequent heat treatment, and is configured to become soft at a temperature. The receiver substrate and the donor substrate are assembled. An additional layer is provided between the receiver substrate and the carrier substrate that comprises chemical species that are susceptible to diffuse into the intermediate layer during the subsequent heat treatment so as to form a weak zone. The heat treatment is carried out on the receiver substrate and the donor substrate at a second temperature higher than the first temperature.
US09583339B2 Method for forming spacers for a transistor gate
A method is provided for forming spacers for a gate of a field effect transistor, the gate being situated above a layer of semiconductor material, including forming a layer of nitride covering the gate; modifying the layer by plasma implantation of light ions, having an atomic number equal or less than 10, in the layer in order to form a modified layer of nitride, the modifying being performed so as not to modify the layer of nitride over its entire thickness at flanks of the gate; and removing the modified layer of nitride by a selective wet or dry etching, of the modified layer relative to said layer of semiconductor material and relative to the non-modified layer at the flanks of the gate, without etching the layer of semiconductor material, wherein an entire length of the non-modified layer at the flanks remains after the selective wet or dry etching.
US09583338B2 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
According to the present disclosure, a film containing a predetermined element, carbon and nitrogen is formed with high controllability of a composition thereof. A method of manufacturing a semiconductor device includes forming a film containing a predetermined element, carbon and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a first processing gas containing the predetermined element and a halogen element to the substrate, supplying a second processing gas composed of three elements of carbon, nitrogen and hydrogen to the substrate, and supplying a third processing gas containing carbon to the substrate.
US09583337B2 Oxygen radical enhanced atomic-layer deposition using ozone plasma
A method of performing an oxygen radical enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor chamber is disclosed. The method includes forming an ozone plasma to generate oxygen radicals O*. The method also includes feeding the oxygen radicals and a precursor gas sequentially into the interior of the reactor chamber to form an oxide film on the substrate surface. A system for performing the oxygen radical enhanced atomic-layer deposition process is also disclosed.
US09583336B1 Process to enable ferroelectric layers on large area substrates
A microelectronic device with a ferroelectric layer is formed using an MOCVD tool. A substrate is disposed on a susceptor heated to 600° C. to 650° C. A first carrier gas is flowed into a manifold to combine with a plurality of metal organic precursors. The first carrier gas, the metal organic precursors, and a second carrier gas, are flowed through a vaporizer into a chamber of the MOCVD tool, over the substrate. A ratio of a flow rate of the first carrier gas to a flow rate of the metal organic precursors is 250 sccm/milliliter/minute to 500 sccm/milliliter/minute. A ratio of a flow rate of the second carrier gas to a flow rate of the metal organic precursors is 700 sccm/milliliter/minute to 1500 sccm/milliliter/minute. An oxidizing gas is flowed into the chamber over the substrate. The metal organic precursors and the oxidizing gas react to form the ferroelectric layer.
US09583331B2 Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
A manufacturing method of a semiconductor device according to the present invention comprises cleaning a semiconductor substrate. A first chemical liquid for forming a water-repellent protection film and a second chemical liquid coating the first chemical liquid are supplied on a surface of the semiconductor substrate. Alternatively, the semiconductor substrate is immersed in the first chemical liquid coated with the second chemical liquid. The semiconductor substrate is then dried.
US09583327B2 Miniature time-of-flight mass spectrometer
A miniature time-of-flight mass spectrometer (TOF-MS) was developed for a NASA/ASTID program beginning 2008. The primary targeted application for this technology is the detection of non-volatile (refractory) and biological materials on landed planetary missions. Both atmospheric and airless bodies are potential candidate destinations for the purpose of characterizing mineralogy, and searching for evidence of existing or extant biological activity.
US09583324B2 High-voltage power unit and mass spectrometer using the power unit
An excessive overshoot preventing unit (16) is connected to a loop in which a command voltage Vf according to a difference between: a voltage obtained by dividing an output voltage Vout as a high voltage; and a control voltage V cont set from the outside is obtained and fed back to each of drive circuits (3 and 5) of a positive voltage generating unit (2) and a negative voltage generating unit (4). The excessive overshoot preventing unit (16) clamps the command voltage Vf at a voltage value according to the control voltage Vcont. An overshoot that occurs in the voltage generating unit (2 or 4) at the time of polarity switching mainly depends on a circuit constant, and hence the amount of overshoot is excessive in the case of a low-voltage output even if the amount of overshoot is optimal in the case of a rated output. To deal with this, in this power unit, the overshoot of the command voltage Vf in suppressed by the excessive overshoot preventing unit (16), and hence the output voltage can be promptly settled to a target voltage even in the case of a low-voltage output.
US09583323B2 Use of variable XIC widths of TOF-MSMS data for the determination of background interference in SRM assays
Systems and methods identify a product ion that does not include an interference. A full product ion spectrum for a mass range of an analyte in a sample is received from a tandem mass spectrometer. A first set of one or more peak parameters is calculated for a product ion in the full product ion spectrum using a first XIC window width. A second set of one or more peak parameters is calculated for the product ion using a second XIC window width. The product ion is identified as not including an interference, if the first set of one or more peak parameters and the second set of one or more peak parameters are substantially the same. The product ion is further confirmed or determined to be from the analyte and not from a matrix of the sample by correlating the product to a precursor ion of the analyte.
US09583318B2 Plasma processing apparatus, plasma processing method, and recording medium
There is provided an apparatus of performing a plasma process on substrates mounted on an upper surface of a rotary table. The apparatus includes: a heater for heating the substrates; a process gas supply part for supplying a process gas toward the upper surface of the rotary table; an antenna for generating an inductively coupled plasma by converting the process gas to plasma; a light detection part for detecting respective light intensities of R, G and B component as light color components; a calculation part for obtaining an evaluation value corresponding to a change amount before and after supplying a high-frequency power to the antenna, with respect to at least one of the respective light intensities; and an ignition determination part for comparing the evaluation value with a threshold value and to determine that ignition of plasma is not generated if the evaluation value does not exceed the threshold value.
US09583314B2 Plasma processing apparatus
Provided is a plasma processing apparatus including: a circular waveguide connected with a vacuum vessel, and through which a circularly polarized wave of an electric field for plasma formation propagates; a processing chamber which is arranged below the circular waveguide, and in which plasma is formed; a circularly polarized wave generator, which is arranged in the waveguide; a circularly polarized wave adjuster which is connected with the circular waveguide below the circularly polarized wave generator; a circularly polarized wave detector which is below the circularly polarized wave adjuster; and a controller which adjusts an operation of the circularly polarized wave adjuster according to an output from the circularly polarized wave detector, in which the circularly polarized wave adjuster adjusts a length of a protrusion of a dielectric stub into the circular waveguide based on a signal from the controller.
US09583311B2 Drawing apparatus, lithography system, pattern data creation method, drawing method, and method of manufacturing articles
At least one drawing apparatus according to an exemplary embodiment includes a plurality of optical systems and repeats an operation to draw a pattern on a substrate while partly overlapping stripe-shaped regions drawn by the optical systems. The drawing apparatus includes a creation unit configured to create data to be supplied to each of the plurality of optical systems by using a plurality of sub pattern data, each of the plurality of sub pattern data serving as unit data of pattern data used by the plurality of optical systems, corresponding to a region having a width obtainable by dividing the stripe-shaped regions in a drawing width direction, and including information relating to continuity of drawing instruction data and exposure amount information. The creation unit is configured to create the data by changing exposure amount information corresponding to an overlapping drawing region based on the information relating to the continuity.
US09583309B1 Selective area implant of a workpiece
Apparatus and methods for the selective implanting of the outer portion of a workpiece are disclosed. A mask is disposed between the ion beam and the workpiece, having an aperture through which the ion beam passes. The aperture may have a concave first edge, forming using a radius equal to the inner radius of the outer portion of the workpiece. Further, the mask is affixed to a roplat such that the platen is free to rotate between a load/unload position and an operational position without moving the mask. In certain embodiments, the mask is affixed to the base of the roplat and has a first portion with an aperture that extends vertically upward from the base, and a second portion that is shaped so as not to interfere with the rotation of the platen. In other embodiments, the mask may be affixed to the arms of the roplat.
US09583308B1 Light bath for particle suppression
An apparatus, referred to as a light bath, is disposed in a beamline ion implantation system and is used to photoionize particles in the ion beam into positively charged particles. Once positively charged, these particles can be manipulated by the various components in the beamline ion implantation system. In certain embodiments, a positively biased electrode is disposed downstream from the light bath to repel the formerly non-positively charged particles away from the workpiece. In certain embodiments, the light bath is disposed within an existing component in the beamline ion implantation system, such as a deceleration stage or a Vertical Electrostatic Energy Filter. The light source emits light at a wavelength sufficiently short so as to ionize the non-positively charged particles. In certain embodiments, the wavelength is less than 250 nm.
US09583307B2 System and method for controlling specimen outgassing
According to an embodiment of the invention there may be provided a system that may include a specimen chamber, an exchange chamber, a pressure monitor; and a controller. The exchange chamber may be configured to (i) receive a specimen when an exchange chamber pressure maintained within the exchange chamber is at a first pressure level, (ii) reduce the exchange chamber pressure to be lower than a specimen vapor pressure. The pressure monitor may be configured to perform, during a measurement period, at least one measurement of the exchange chamber pressure. The exchange chamber may be configured to stop a reduction of the exchange chamber pressure during the measurement period.
US09583306B2 Swing objective lens
A scanning electron microscope (SEM) with a swing objective lens (SOL) reduces the off-aberrations to enhance the image resolution, and extends the e-beam scanning angle. The scanning electron microscope comprises a charged particle source, an accelerating electrode, and a swing objective lens system including a pre-deflection unit, a swing deflection unit and an objective lens, all of them are rotationally symmetric with respect to an optical axis. The upper inner-face of the swing deflection unit is tilted an angle θ to the outer of the SEM and its lower inner-face is parallel to the optical axis. A distribution for a first and second focusing field of the swing objective lens is provided to limit the off-aberrations and can be performed by a single swing deflection unit. Preferably, the two focusing fields are overlapped by each other at least 80 percent.
US09583298B2 Nano granular materials (NGM) material, methods and arrangements for manufacturing said material and electrical components comprising said material
Nano granular materials (NGM) are provided that have the extraordinary capability to conduct current in a 100 fold current density compared to high Tc superconductors by charges moving in form of Bosons produced by Bose-Einstein-Condensation (BEC) in overlapping excitonic surface orbital states at room temperature and has a light dependent conductivity. The material is disposed between electrically conductive connections and is a nano-crystalline composite material. Also provided are electrical components comprising NGM and methods and arrangements for making it by corpuscular-beam induced deposition applied to a substrate, using inorganic compounds being adsorbed on the surface of the substrate owing to their vapor pressure, and which render a crystalline conducting phase embedded in an inorganic insolating matrix enclosing the material.
US09583285B1 Device housing having improved tolerances
Input elements, handles, enclosures and alignment of such elements and handles within an electronic device. The elements, such as buttons or input devices, and handles discussed herein may be configured, assembled and/or installed within and/or on an electronic device to ensure proper alignment and positioning within the housing of the electronic device. By properly aligning and positioning the elements and handles within or on the housing of the electronic device, the elements and handles may provide accurate input to the electronic device and may be visually appealing to a user. Additionally, a two-piece enclosure including a hook and cutout portion may secure and/or protect the internal components of the electronic device, while also providing a visually “seamless” connection between the two-pieces for forming the enclosure of the electronic device.
US09583284B2 Tap changer
There is provided a tap changer in which movable contacts rotate to be selectively connected to a plurality of taps. The tap changer includes a rotatable upper movable contact; a rotatable lower movable contact electrically connected to the upper movable contact; a driving shaft rotating the upper movable contact and the lower movable contact integrally; a single-type fixed contact including a single terminal connected to any one of a plurality of taps; and a dual-type fixed contact including a first terminal and a second terminal connected together to another of the plurality of taps. Since the upper movable contact and the lower movable contact are integrally rotated through the single driving shaft, the number of components and volume of the device may be reduced and an operation of the device may be facilitated.
US09583281B2 Control of spring(s) type for a high- or medium-voltage breaker furnished with a pawled free wheel coupling device
The invention relates to a spring controller for high- or medium-voltage electric switchgear, the controller having a free-wheel coupling device between a crank handle or a motor and the drive shaft (1) for driving a switch contact of the switchgear and respectively providing coupling while the spring(s) (11) is/are being loaded and decoupling while the spring(s) is/are being released. The free-wheel mechanical device is incorporated in a toothed wheel (2) of the controller and includes at least one pawl (7, 70) meshing or not meshing with an inner set of teeth (4) of the toothed wheel (2).
US09583279B2 Secondary battery
A secondary battery including a plurality of electrode assemblies including: a first electrode assembly including a first positive electrode active material; and a secondary electrode assembly including a second positive electrode active material; the first electrode assembly and the second electrode assembly being electrically connected to each other, the first positive electrode active material being different from the second positive electrode active material, and a discharge capacity ratio of the second electrode assembly being in a range of 25% to 80%, based on a total discharge capacity of the first electrode assembly and the second electrode assembly, is disclosed.
US09583275B2 Solid electrolytic capacitor and method of manufacturing the same
There is provided a solid electrolytic capacitor which can increase an electrostatic capacitance and reduce ESR characteristics, and a method of manufacturing the solid electrolytic capacitor. The solid electrolytic capacitor has: a dielectric oxide film formed on a surface of an anode body having fine pores; a cathode body opposing to the anode body; and conductive polymer layers formed inside the fine pores and including amines and water-soluble self-doped conductive polymers having sulfonic acid groups. The self-doped conductive polymers are held in a good state inside fine pores such as etching pits, so that the electrostatic capacitance increases and ESR characteristics are reduced.
US09583273B2 Solid electrolytic capacitor and method of manufacturing a solid electrolytic capacitor
Provided is a method for forming a capacitor. The method includes: providing an anode with a dielectric thereon and a conductive node in electrical contact with the anode; applying a conductive seed layer on the dielectric; forming a conductive bridge between the conductive seed layer and the conductive node; applying voltage to the anode; electrochemically polymerizing a monomer thereby forming an electrically conducting polymer of monomer on the conductive seed layer; plating a metal layer on said conductive polymer; and disrupting the conductive bridge between the conductive seed layer and the conductive node.
US09583271B1 Cryogenic grinding of tantalum for use in capacitor manufacture
An electrolytic capacitor comprising an anode comprised of cryogenically milled anode material is described. The cryogenic milling process prepares the active anode material for anode fabrication. The capacitor further comprises a casing of first and second casing members secured to each other to provide an enclosure. A feedthrough electrically insulated from the casing and from the casing and extending there from through a glass-to-metal seal, at least one anode electrically connected within the casing, a cathode, and an electrolyte. The cathode is of a cathode active material deposited on planar faces of the first and second casing members.
US09583270B2 Complex oxide, thin-film capacitive element, liquid droplet discharge head, and method of producing complex oxide
A complex oxide includes a chemical compound represented by ABO3 (Chemical Formula 1). In the Chemical Formula 1, A is one or more elements selected from Ba, Ca, and Sr; and B is one or more elements selected from Ti, Zr, Hf, and Sn. When a field having a size of 1 μm×1 μm on a surface of the complex oxide is observed with an atomic force microscope (AFM), a typical particle size is greater than or equal to 300 nm and less than 660 nm. Here, the typical particle size is a maximum length of a maximum particle observed in the field.
US09583265B2 Multilayer ceramic electronic component and method of manufacturing the same
A multilayer ceramic electronic component includes a ceramic body including internal electrodes and dielectric layers, and an electrode layer disposed on at least one surface of the ceramic body and electrically connected to the internal electrodes. A conductive resin layer containing metal particles and a base resin is disposed on the electrode layer. When a weight ratio of metal to carbon in a surface portion of the conductive resin layer is defined as A, and a weight ratio of metal to carbon in an internal portion of the conductive resin layer is defined as B, A is greater than B.
US09583257B2 Microfluidics controlled tunable coil
In some example embodiments, there may be provided an apparatus. The apparatus may include a chamber including a first cavity and a second cavity, wherein the chamber further includes a first fluid suspended in a second fluid; a first electrode adjacent to the first cavity; a second electrode adjacent to the second cavity; a third electrode configured to provide a common electrode to the first electrode and the second electrode; and at least one coil adjacent to at least one of the first cavity or the second cavity, wherein an inductance value of the coil is varied by at least applying a driving signal between the common electrode and the first electrode and/or the second electrode. Related methods, systems, and articles of manufacture are also disclosed.
US09583252B2 Transformer
A transformer and a method of manufacturing a transformer are disclosed. The transformer can include a transformer core with at least three core limbs which are arranged in parallel with respect to one another and perpendicular to corner points of an area spanned by a polygon, and wherein axial end regions of each of the at least three core limbs transition into a respective yoke segment arranged transversely with respect to the axial end regions. Main windings can be arranged around each of the at least three core limbs in a hollow-cylindrical winding region. A magnetic cross section of a respective core limb can be greater than a magnetic cross section of the respective yoke segment. Additional windings can be electrically connected to a respective main winding and can be arranged around each of the respective yoke segments.
US09583249B2 Methods and systems for push pin actuator
A push pin actuator apparatus is provided. The push pin actuator apparatus includes a housing, a wire coil arranged within the housing and arranged around a first armature and a second armature. The first armature is coupled to a first push pin and the second armature is coupled to a second push pin. The push pin actuator apparatus further includes a first permanent magnet and a second permanent magnet arranged on opposing sides of the first armature, and a third permanent magnet and a fourth permanent magnet arranged on opposing sides of the second armature. The first push pin is actuated in response to a current being applied to the wire coil in a first direction, and the second push pin is actuated in response to a current being applied to the wire coil in a second direction opposite to the first direction.
US09583246B2 Temporary attachment and alignment of light-weight components using spatially modulated magnetic fields technology
Fixtureless self-alignment and orientation of components during an assembly process, and self-aligning/self-orienting components for assembly. Self-alignment and self-orientation are provided by integrating complementary spatially-modulated magnetic arrays into components requiring alignment and/or orientation during an assembly process. In addition to providing self-alignment/self-orientation, the spatially-modulated magnetic arrays also provide selective component placement and/or assembly order. Final assembly can involve permanent mechanical or adhesive fasteners.
US09583245B2 Magnet plate assembly, deposition apparatus including the magnet plate assembly, and deposition method using the magnet plate assembly
A magnet plate assembly includes a plurality of magnetic substances having predetermined magnetic forces, a magnet supporter supporting at least a corresponding one of the plurality of magnetic substances, and a guide support supporting the magnet supporter and comprising at least one guide opening. The magnetic plate assembly further includes a coupler extending through the at least one guide opening and movable within the at least one guide opening, the coupler being connected to the magnet supporter; and a driver unit connected to the coupler and configured to move the corresponding one of the plurality of magnetic substances with respect to the guide support.
US09583244B2 Bonded magnet, bonded magnet component, and bonded magnet production method
A bonded magnet is provided which includes first and second components. The first and second components have first and second non-action surfaces, and first and second action surfaces that intersect the first and second non-action surfaces, respectively. First and second flux groups curve inside the first and second components from the first and second non-action surfaces to the first and second action surfaces, respectively. The areas of the first and second non-action surfaces are greater than the first and second action surfaces, respectively. The flux densities on the first and second action surfaces are higher than the first and second non-action surfaces, respectively. The pole on the first non-action surface is opposite to the second non-action surface. The first and second non-action surfaces are coupled to each other. The first flux groups continuously extend from one to another.
US09583243B2 Permanent magnet and method for manufacturing the same, and motor and power generator using the same
In an embodiment, a permanent magnet includes a composition of R (FepMqCur(Co1-sAs)1-p-q-r)z (R: rare earth element, M: Ti, Zr, Hf, A: Ni, V, Cr, Mn, Al, Si, Ga, Nb, Ta, W, 0.05≦p 0.6, 0.005≦q≦0.1, 0.01≦r≦0.15, 0≦s≦0.2, 4≦z≦9). The permanent magnet includes a two-phase structure of a Th2Zn17 crystal phase and a copper-rich phase. An average interval between the copper-rich phases in a cross section including a crystal c axis of the Th2Zn17 crystal phase is in a range of over 120 nm and less than 500 nm.
US09583241B1 Programmable impedance
The present application relates generally to programmable impedances and employs an auxiliary impedance in parallel to a primary programmable impedance to augment the performance of the primary programmable impedance at lower impedance values.
US09583240B2 Temperature independent resistor
The present disclosure relates to a semiconductor structure comprising a positive temperature coefficient thermistor and a negative temperature coefficient thermistor, connected to each other in parallel by means of connecting elements which are configured such that the resistance resulting from the parallel connection is substantially stable in a predetermined temperature range, and to a corresponding manufacturing method.
US09583237B2 Method of manufacturing a polymer-insulated conductor
A method of manufacturing a polymer-insulated conductor. The method includes the steps of a) providing a conductor having a first cross-sectional shape, b) passing the conductor through a conductor-shaping die to shape the conductor such that the conductor obtains a second cross-sectional shape, wherein frictional heat is developed in the conductor, thereby setting the conductor in a heated state, c) applying molten polymer to the conductor when the conductor is in the heated state to obtain a polymer-coated conductor, and d) shaping the polymer-coated conductor by means of a polymer-shaping die to thereby obtain the polymer-insulated conductor.
US09583235B2 Multipair differential signal transmission cable
A multipair differential signal transmission cable includes a plurality of differential signal transmission cables being bundled and each including two signal conductors as a differential pair covered with an insulation and a first shielding tape conductor provided therearound. The first shielding tape conductor is longitudinally lapped so as to have an overlapping portion in a cable longitudinal direction. The plurality of differential signal transmission cables include at least one or more pairs of two adjacent differential signal transmission cables. The two adjacent differential signal transmission cables are arranged such that the overlapping portion of one of the two adjacent differential signal transmission cables does not face the other of the two adjacent differential signal transmission cables.
US09583233B2 Electric power transmission cable particularly for an overhead line
The invention concerns an electric power transmission cable, particularly for an overhead power line, comprising at least one central composite ring (1) formed of fibers impregnated by a matrix, of which the specific breaking strength is greater than 0.4 MPa·m3/kg and at least one layer of conductive wires (3) nested within one another, made of aluminum or an aluminum alloy and windings around said ring (1), said cable having an outer diameter at ambient temperature called the initial diameter (Di) and the ratio between the thermal expansion coefficient of the conductive wires (3) and that of the central ring (1) is greater than three. According to the invention, said conductive wires (3) nested within one another are of a geometry such that the increase in the outer diameter of one length of said cable shorter than 45 m, during an increase of temperature lasting two to four minutes, from ambient temperature to a temperature between 150 and 240° C., is less than or equal to 10% of the initial diameter (Di), said cable being subject to a mechanical tension between 10% and 30% of the nominal breaking strength of the cable. The invention also concerns a conductive wire geometry enabling such a level of expansion of the diameter.
US09583231B2 Carbon nanotube composite electrode and method for manufacturing the same
Provided is a carbon nanotube composite electrode having carbon nanotubes which are firmly fixed to an electrode substrate so as to utilize the characteristics of the carbon nanotubes, and having the intrinsic electrode characteristics of carbon nanotubes. The carbon nanotube composite electrode has a surface layer containing a porous oxide material and carbon nanotubes on the surface of the electrode substrate, wherein the carbon nanotubes are generated from the porous oxide material, and at least some of the carbon nanotubes are electrically connected to the electrode substrate. The carbon nanotube composite electrode is firmly fixed to the electrode substrate, and has the intrinsic electrode characteristics of carbon nanotubes, and thus may preferably be used in applications for electrodes and the like in various electronic devices such as electrochemical sensors and batteries.
US09583230B2 Electrically conductive polyethylene resin composition, electrically conductive polyethylene resin molding, sliding bearing, and sliding sheet
The present invention provides an electrically conductive polyethylene resin composition having a stable volume resistance value and in addition, a low-friction property and a wear-resistant property and a resin molding, a sliding bearing, and a sliding sheet made of the electrically conductive polyethylene resin composition. The electrically conductive polyethylene resin composition contains 100 parts by weight of ultra-high-molecular-weight polyethylene resin which cannot be injection-molded and has a weight average molecular weight of one million to four millions, 2 to 15 parts by weight of Ketjenblack, and 0.5 to 5 parts by weight of at least one powder, having an average particle size of 1 to 30 μm, which is selected from among polytetrafluoroethylene resin powder, graphite powder, and silicone resin powder.
US09583225B2 Laser irradiation apparatus and laser machining method
A laser irradiation apparatus which is provided with: an environment isolation container, which houses a laser oscillator and is disposed in water; a laser irradiation head, which collects laser beams and irradiates a part to be machined with the laser beams; a light guide section which transmits the laser beams from the laser oscillator to the laser irradiation head; a power supply apparatus which supplies the laser oscillator with power; a cooling water supplying apparatus, which supplies the laser oscillator with cooling water through a cooling water supplying path; and a temperature sensor which measures the temperature inside of the environment isolation container. The temperature and/or the flow quantity of the cooling water to be supplied from the cooling water supplying apparatus is controlled on the basis of the measurement results obtained from the temperature sensor.
US09583222B2 Debris filter for nuclear reactor installation and nuclear fuel assembly comprising such a debris filter
A debris filter for a nuclear reactor installation is provided. The debris filter comprises a plurality of plates arranged side-by-side in a spaced relationship and delimiting between them flow passages extending through the debris filter from a lower inlet face to an upper outlet face of the debris filter, each passage having an intermediate section offset with respect to an inlet section and an outlet section. At least one of the plates is formed with debris catching features distributed along the plate and protruding into at least one passage delimited by the plate.
US09583216B2 MBIST device for use with ECC-protected memories
A system implementing an MBIST device is disclosed. The system includes an ECC-protected memory and the MBIST device for self-test of the memory. The MBIST device includes a first access port communicatively connected to the memory via a first path, the first path excluding the ECC logic associated with the embedded memory, and a second access port communicatively connected to the memory via a second path, the second path including the ECC logic associated with the memory. The device is configured to test the memory, in a first mode of operation, via the first path and, in a second mode of operation, via the second path. One advantage of such system includes re-using, with little additional die area, of MBIST logic already required for manufacturing test of the product (first mode of operation) for system or application level tests that may be carried out by customers (second mode of operation).
US09583215B2 Semiconductor memory device and testing method thereof
A semiconductor memory device is provided which includes memory cells, a first error correction code (ECC) circuit configured to generate at least one selected parity bit corresponding to a selected data bit using an error correction code during a write operation and to correct an error of the selected data bit using the selected parity bit during a read operation, and a test circuit configured to selectively perform at least one of an error correction operation and a redundancy repair operation on at least one of the selected data bit and the selected parity bit based on test mode register set (TMRS) information.
US09583213B2 Positive/negative sampling and holding circuit
A positive/negative sampling and holding (S/H) circuit is disclosed herein. The positive/negative S/H circuit includes an operational amplifier, a first capacitor, a second capacitor being parallel with the first capacitor and forming an integration circuit with the operational amplifier, and several discharge switches correspondingly connecting discharge paths of the first and the second capacitors to control the first and the second capacitors to output a first sampling signal and a second sampling signal respectively, and herein, the first and the second sampling signals has the same magnitude but opposite voltage polarities.
US09583211B1 Incorporating bit write capability with column interleave write enable and column redundancy steering
A column access control circuit for generating column write enable outputs with redundancy steering control and bit write control for an integrated circuit chip, and an integrated circuit chip having the same. A column access control circuit may include: a column write enable driver, a redundancy steering logic, and a bit write controller. The column write enable driver may produce column write enable outputs through an output. The column write enable driver is configured to receive certain column interleave write enable and enable column write according to the column interleave write enable received. The redundancy steering logic is configured to receive one or more fuses and skip a damaged column indicated by a corresponding fuse. The bit write controller is configured to receive one or more bit write and provide bit write control according to the one or more bit write received.
US09583208B2 Sensing scheme for high speed memory circuits with single ended sensing
A circuit detects values stored in bit cells of a memory circuit, for example, a memory circuit with single ended sensing. The circuit injects a charge into a bit line coupled to a bit cell to detect the value stored in the bit cell. A level detector detects the voltage level of the bitline as the charge in injected in the bitline. The sensing circuit determines the bit value stored during the charge injection phase. If the bitline voltage reaches above a high threshold voltage level as the charge in injected in the bitline, the circuit determines that the bit cell stores a first bit value (for example, bit value 1.) If the bitline voltage stays below a low threshold voltage level as the charge in injected in the bitline, the circuit determines that the bit cell stores a second bit value (for example, bit value 0).
US09583207B2 Adaptive data shaping in nonvolatile memory
A nonvolatile memory block experiences multiple write-erase cycles during which data is subject to a shaping operation prior to storage. In response to a write-erase cycle count reaching a predetermined number, a polling cycle occurs during which shaping is disabled and data is collected that indicates a condition of the block. Subsequently, shaping is reenabled for subsequent cycles.
US09583202B2 Read level grouping algorithms for increased flash performance
A plurality of flash memory wordlines of a flash storage device are divided into a plurality of wordline groups based on read error counts associated with the wordlines and a plurality of read level offsets. Each wordline group is associated with one of a plurality of read level offsets determined while dividing the plurality of flash memory wordlines, and associations between the plurality of read level offsets and the plurality of wordline groups are stored for use in connection with read levels to read the flash memory wordlines of the respective wordline groups.
US09583199B2 Mitigation of data retention drift by programming neighboring memory cells
A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge representative of data values, assigning a first group of the memory cells for data storage, and assigning a second group of the memory cells for protecting the electrical charge stored in the first group from retention drift. Data is stored in the memory cells of the first group. Protective quantities of the electrical charge that protect from the retention drift in the memory cells of the first group are stored in the memory cells of the second group.
US09583198B1 Word line-dependent and temperature-dependent pass voltage during programming
Techniques are provided for avoiding over-programming which can occur on memory cells connected to a data word line at a source-side of a block of word lines. A gradient in the channel potential is created during a program voltage between the data word line and an adjacent dummy word line. This gradient generates electron-hole pairs which can contribute to over programming, where the over programming is worse at higher temperatures. In one aspect, pass voltages of unselected word lines are set to be relatively lower when the temperature is relatively higher, and when the selected word line is among a set of one or more source-side word lines. On the other hand, the pass voltages are set to be relatively higher when the temperature is relatively higher, and when the selected word line is not among the one or more source-side word lines.
US09583197B2 Nonvolatile memory device, program method thereof, and storage device including the same
A nonvolatile memory device includes memory cells stacked in a direction perpendicular to a substrate and further includes a first memory cell string connected between a selected bit line and a selected string selection line, a second memory cell string connected between the selected bit line and an unselected string selection line, and a third memory cell string connected to an unselected bit line. During a bit line setup section of a program operation, a ground voltage is provided to the selected bit line and a power supply voltage provided to the unselected string selection line is changed to the ground voltage.
US09583196B2 Immediate feedback before or during programming
A system and method of programming user data into a memory cell includes receiving a first user data to be programmed in a memory controller, selecting a memory cell for programming the first user data and measuring at least one health characteristic of the selected memory cell. At least one programming parameter of the selected memory cell is adjusted and the first user data is programmed to the selected memory cell using the adjusted programming parameter corresponding to the selected memory cell.
US09583194B2 Memory system and operating method thereof
A memory system includes: a memory device comprising at least a page; and a controller suitable for setting a seed offset according to a size of a restricted region in the page, randomizing data using the seed offset at each cycle, and storing the randomized data in the page.
US09583191B1 CAM design for bit string lookup
In one embodiment, a programming content addressable memory (CAM) comprising at least one match line, the at least one match line being preloaded to high, and being logically OR-ed for all selector lines the at least one match line being inverted to low upon a match result the at least one match line comprising transistors and grounding which are activated only when a stored data value and a corresponding selector line evaluate to 1 and the corresponding selector line having a logical AND with the stored data value, wherein the programming CAM is implemented as a Bit Indexed Explicit Replication (BIER) table. Related apparatus, systems and methods are also described.
US09583190B2 Content addressable memory in integrated circuit
An integrated circuit (IC) that includes content addressable memories (CAM) is described. A CAM receives a key and searches through entries stored in the CAM for one or more entries that match the key. If a matching entry is found, the IC returns a storage address indicating a memory location at which the matching was found.
US09583189B2 Memory device, operating and control method thereof
A method of operating a memory device including a plurality of memory cells is provided. The method includes receiving a first write command, determining whether a target memory cell is deteriorated or not, in response to the first write command, and writing the second data by selectively erasing the target memory cell according to a result of the determination and by programming the target memory cell.
US09583187B2 Multistage set procedure for phase change memory
Phase change material can be set with a multistage set process. Set control logic can heat a phase change semiconductor material (PM) to a first temperature for a first period of time. The first temperature is configured to promote nucleation of a crystalline state of the PM. The control logic can increase the temperature to a second temperature for a second period of time. The second temperature is configured to promote crystal growth within the PM. The nucleation and growth of the crystal set the PM to the crystalline state. The multistage ramping up of the temperature can improve the efficiency of the set process relative to traditional approaches.
US09583183B2 Reading resistive random access memory based on leakage current
A data storage device includes a resistive random access memory (ReRAM). The data storage device includes read circuitry coupled to a storage element of the ReRAM. The read circuitry is configured to read a data value from the storage element, during a read operation, based on a read current sensed during a first phase of the reading operation and a leakage current sensed during a second phase of the reading operation. The data storage device also includes a controller coupled to the read circuitry. The controller is configured to provide an input value to an error correction coding (ECC) decoder, where the input value includes a hard bit value and a soft bit value. The hard bit value corresponds to the data value, and the soft bit value is at least partially based on the leakage current.
US09583181B1 SRAM device capable of working in multiple low voltages without loss of performance
A memory device comprises a tracking control circuit for controlling the write operation or the read operation of the memory device. The tracking control circuit comprises a plurality of tracking cells, wherein the timing characteristics of the tracking cells emulate the timing characteristics of a bit cell during a write operation or a read operation of the memory device. The memory device further comprises at least two reference word lines for configuring the number of tracking cells of the tracking control circuit; and a selection circuit configured to activate one or more of the at least two reference word lines.
US09583178B2 SRAM read preferred bit cell with write assist circuit
Methods and apparatuses for static memory cells. A static memory cell may include a first pass gate transistor including a first back gate node and a second pass gate transistor including a second back gate node. The static memory cell may include a first pull down transistor including a third back gate node and a second pull down transistor including a fourth back gate node. The source node of the first pull down transistor, source node of the second pull down transistor, and first, second, third, and fourth back gate nodes are electrically coupled to each other to form a common node.
US09583177B2 Memory device and semiconductor device including memory device
A memory cell retains (N−1)-bit data (N is an integer of more than 1) and an error detection bit. The memory cell has 2N data states A_1 to A_2N. Error detection bits for the data states A_i (i is 1 and an even number more than or equal to 4 and less than or equal to 2N) among the 2N data states are assigned “1” (normal), and the error detection bits for the other data states are assigned “0” (abnormal). The memory cell is brought to have the state A_i by a writing operation. During a reading operation, the error detection bit is not read out from the memory cell. The error detection bit together with the (N−1)-bit data is read out for refresh. If the error detection bit is “0”, refresh for bringing the error detection bit back to data state with the error detection bit “1” is performed.
US09583175B1 Receiver equalization circuit with cross coupled transistors and/or RC impedance
An apparatus includes a first circuit and a second circuit. The first circuit may be configured to (a) buffer write signals presented on a data bus connected between a memory channel and a memory controller, (b) buffer read signals presented on the data bus and (c) condition the write signals. The conditioning may be implemented by (i) converting the write signals to a first differential write signal on a first differential write line and a second differential write signal on a second differential write line and (ii) connecting (a) a negative impedance and (b) a combined resistive and capacitive load between the first and second differential write lines. The second circuit may be configured to (a) convert the first and the second differential write signals to a single-ended write signal and (b) present the single-ended write signal to the data bus.
US09583174B1 Semiconductor devices and semiconductor systems
A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may output command/address signals and receives temperature codes. The second semiconductor device may sense an internal temperature if a combination of the command/address signals is a first combination, generate and output the temperature codes having a combination corresponding to the internal temperature if a combination of the command/address signals is a second combination, and adjust a period of the temperature codes in accordance with a temperature section of the internal temperature.
US09583171B2 Write driver circuits for resistive random access memory (RAM) arrays
Aspects disclosed in the detailed description include write driver circuits for resistive random access memory (RAM) arrays. In one aspect, a write driver circuit is provided to facilitate writing data into a resistive RAM array in a memory system. The write driver circuit is coupled to a selector circuit configured to select a memory bitcell(s) in the resistive RAM array for a write operation. An isolation circuit is provided in the write driver circuit to couple a current source to the selector circuit to provide a write voltage during the write operation and to isolate the current source from the selector circuit when the selector circuit is not engaged in the write operation. By isolating the selector circuit from the current source when the selector circuit is on standby, it is possible to reduce leakage current in the selector circuit, thus reducing standby power consumption in the memory system.
US09583158B2 Method of managing requests for access to memories and data storage system
The method includes, at a first clock cycle:—obtaining (202) new requests by the processing stage;—supplying (210) by the processing stage at least one of the new requests;—placing on standby (212) by the processing stage at least one further new request, hereinafter referred to as a standby request. The method further includes, at a second clock cycle following the first clock cycle:—obtaining (202) at least one new request by the processing stage;—selecting (208) by the processing stage, from the standby request(s) and the new request(s), at least one request;—la supplying (210) the selected request(s) by the processing stage.
US09583156B2 Selected gate driver circuit in memory circuits, and control device and control method thereof
A selected gate (SG) driver circuit, including a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a first PMOS transistor, and a second PMOS transistor. A gate electrode of the first NMOS transistor is connected to a gate electrode of the first PMOS transistor, a source electrode of the first NMOS transistor being connected to a drain electrode of the third NMOS transistor, and a drain electrode of the first NMOS transistor being connected to a drain electrode of the first PMOS transistor and a gate electrode of the second NMOS transistor. A source electrode of the second NMOS transistor is connected to a source electrode of the third NMOS transistor, and a drain electrode of the second NMOS transistor being connected to a drain electrode of the second PMOS transistor and a gate electrode of the third NMOS transistor.
US09583152B1 Layout of semiconductor memory device including sub wordline driver
A layout structure of a semiconductor memory device including a sub wordline driver is disclosed. The semiconductor memory device layout having a sub wordline driver in which a PMOS region is located includes: a plurality of active regions; and a main word line formed to pass through the active regions. The main word line includes three gate lines.
US09583147B2 Second screen shopping function
Systems for, and methods of, displaying video information comprising: a second screen device obtaining current play position data of a video being played on a primary screen device (e.g., obtaining from the primary screen device an identification of a current play position of the video, or obtaining information to generate an acoustic fingerprint of the video); determining a current play position of the video playing on the primary screen device based upon the current play position data (e.g., identification of the current play position or the acoustic fingerprint); downloading information (e.g., video map, subtitles, moral principles, objectionable content, memorable content, performers, geographical maps, shopping, plot point, item, ratings, and trivia information) over a computer communications network into the memory of the second screen device; and displaying information on the second screen device synchronized with the contemporaneously played video on the primary screen device.
US09583140B1 Real-time playback of an edited sequence of remote media and three-dimensional assets
A video editing project includes multiple assets, such as animated three-dimensional geometries and streaming video clips. Assets are rendered during associated timespans in a timeline. Video clips are streamed from sources while the project is rendered, rather than in advance. Rendered video data is played in real-time during rendering. Rendering the project may further involve rendering assets in a three-dimensional space. Streaming video clip(s) may be mapped to a geometry. Effects or transformations may be applied the video clip(s) in real-time during rendering and playback. Non-destructive, non-linear editing techniques are described—edits are specified for assets without changing the assets at their sources or having to download and modify a working copy. The editor may support live editing of the project during the real-time playback. The video editor may be, for example, a web browser-based application requiring no direct software installation by the user, and streaming media from remote servers.
US09583138B2 Accessor and library device
An accessor includes a main body unit configured to convey a recording medium in a first direction, the main body unit being attached to a housing of a library device to be movable in the first direction, a picker configured to convey the recording medium in a second direction intersecting with the first direction, the picker being mounted on the main body unit to be movable in the second direction, and a cleaner mounted on a surface of the picker along the second direction.
US09583134B2 Magnetic recording and reproducing device
According to one embodiment, a magnetic recording and reproducing device includes a magnetic recording medium and a magnetic head. The magnetic recording medium includes a first track including a first sub-track extending along a first direction, and a second sub-track extending along the first direction. The second sub-track is arranged with the first sub-track in a second direction intersecting the first direction. The magnetic head includes a recording unit and a reproducing unit. The recording unit records information in the magnetic recording medium. The reproducing unit reproduces the information recorded in the magnetic recording medium. The recording unit includes a magnetic pole, a write shield separated from the magnetic pole in the first direction, and a side shield separated from the magnetic pole in the second direction. The reproducing unit includes a reproducing element having a reproducing width along the second direction.
US09583132B2 Arrangement for rotatably driving a round disk
A device for rotary driving of a round disk, for instance a memory disk of a computer, comprises a stator disposed fixedly relative to a frame and a rotor rotatably drivable relative to the stator.According to the invention the rotor comprises a concentric ring to which the peripheral edge of the disk is connected.The stator has an encircling recess, the form of which corresponds to that of the ring such that the ring fits with clearance into the recess. The rotor is provided with two collars of magnetically active elements in angularly equidistant arrangement, and the stator comprises electromagnets disposed at the same angular distances.The arrangement is such that the rotor and the stator together form an annular induction motor.The rotor is preferably suspended magnetically during operation.
US09583131B1 Magnetic disk device and control method
According to one embodiment, there is provided a magnetic disk device including a magnetic disk, a magnetic head, and a controller. The magnetic head is opposite the magnetic disk. The magnetic head includes a first read head and a second read head. The controller determines a track pitch in the vicinity of a first track or a second track adjacent to the first track of the magnetic disk based on first position information and second position information. The first position information depends on a servo signal read by the first read head and corresponds to the first track. The second position information depends on a servo signal read by the second read head and corresponds to the second track.
US09583125B1 Low resistance interface metal for disk drive suspension component grounding
A stainless steel suspension component such as a mount plate is chemically activated by exposure to an activating solution. Gold is then spot plated onto the mount plate in the activated area using an elastomeric mask that is clamped over the mount plate. A component may then be bonded to the gold bond pads. The component may include a PZT microactuator bonded to the gold bond pads using a conductive adhesive such as silver epoxy. The gold acts as an interface metal that provides to a low resistance and environmentally robust ground path for the microactuator.
US09583122B2 Portable turntable device, system, and method
A turntable device, comprising: a base and an arm. The base may comprise a pad and a spindle. The arm may comprise: a housing; one or more buttons; a spindle engagement portion; a stylus cartridge; a power supply; one or more wireless communication devices; a linear actuator; a motor; and a vertical solenoid. The base may receive a phonographic record, and the spindle engagement portion may engage with the spindle, such that the arm is entirely supported above said base via said spindle and only the spindle.
US09583114B2 Generation of a comfort noise with high spectro-temporal resolution in discontinuous transmission of audio signals
The invention provides an audio decoder being configured for decoding a bitstream so as to produce therefrom an audio output signal, the bitstream including at least an active phase followed by at least an inactive phase, wherein the bitstream has encoded therein at least a silence insertion descriptor frame which describes a spectrum of a background noise, the audio decoder including: a silence insertion descriptor decoder configured to decode the silence insertion descriptor frame; a decoding device configured to reconstruct the audio output signal from the bitstream during the active phase; a spectral converter configured to determine a spectrum of the audio output signal; a noise estimator device configured to determine a first spectrum of the noise of the audio output signal; a resolution converter configured to establish a second spectrum of the noise of the audio output signal; a comfort noise spectrum estimation device; and a comfort noise generator.
US09583112B2 Signal processing apparatus and signal processing method, encoder and encoding method, decoder and decoding method, and program
The present invention relates to a signal processing apparatus and a signal processing method, an encoder and an encoding method, a decoder and a decoding method, and a program capable of reproducing music signal having a better sound quality by expansion of frequency band.A sampling frequency conversion unit converts a sampling frequency of an input signal, and a sub-band division circuit divides the input signal after the sampling conversion into sub-band signals of sub-bands having the number corresponding to the sampling frequency.A pseudo high band sub-band power calculation circuit calculates pseudo high band sub-band powers based on low band signals of the input signal and coefficient tables having coefficients for the respective high band sub-bands. A pseudo high band sub-band power difference calculation circuit compares high band sub-band powers and the pseudo high band sub-band powers to each other and selects a coefficient table from plural coefficient tables. In addition, a coefficient index which specifies the coefficient table is encoded and set as high band encoded data. The present invention can be applied to an encoder.
US09583111B2 Example-based audio inpainting
A method for packet loss concealment, that includes: continuously receiving a digital audio stream; extracting audio features from the digital audio stream while the digital audio stream is unharmed; and upon detecting a gap in the digital audio stream, filling the gap with one or more previous segments of the digital audio stream, wherein the filling is based on a matching of the one or more of the extracted audio features with one or more audio features adjacent to the gap.
US09583106B1 Methods, systems, and media for presenting interactive audio content
Methods, systems, and media for presenting interactive audio content are provided. In some embodiments, the method includes: receiving narrative content that includes action points, wherein each of the action points provides user actions and a narrative portion corresponding to each of the user actions; determining a user engagement density associated with the narrative content, wherein the user engagement density modifies the number of the action points to provide within the narrative content; causing the narrative content to be presented to a user based on the user engagement density; determining that a speech input has been received at one of the action points in the narrative content; converting the speech input to a text input; determining whether the user action associated with the text input corresponds to one of the user actions; selecting the narrative portion corresponding to the text input in response to determining that the user action corresponds to one of the user actions; converting the selected narrative portion to an audio output; and causing the narrative content with the converted audio output of the selected narrative portion to be presented to the user.
US09583100B2 Centralized speech logger analysis
A method of providing hands-free services using a mobile device having wireless access to computer-based services includes receiving speech in a vehicle from a vehicle occupant; recording the speech using a mobile device; transmitting the recorded speech from the mobile device to a cloud speech service; receiving automatic speech recognition (ASR) results from the cloud speech service at the mobile device; and comparing the recorded speech with the received ASR results at the mobile device to identify one or more error conditions.
US09583096B2 Enhancing environment voice macros via a stackable save/restore state of an object within an environment controlled by voice commands for control of vehicle components
A method for state transition in voice systems including: generating one or more stackable state macros, each of the one or more stackable state macros including a plurality of commands; saving the current state before executing another macro; enabling restoring the previous state after a plurality of commands is completed, allowing a user to utter voice commands to restore the individual state of components or the voice systems as a whole to the previous state or to a known home state. The method further utilizes voice commands not specific to the current state and is used specifically for automatically controlling a plurality of components of a vehicle.
US09583093B2 Sound deflecting apparatus
A sound deflector apparatus having mutually coextensive tab and wall portions, the tab portion mounted to an area of an electronic device adjacent the speaker outlet(s), and the wall portion having a curvilinear segment or bend directing sound waves toward the listener(s) viewing programming on a flat-screen television, monitor, smart device, and/or similar electronic devices with such speaker outlet configurations.
US09583089B2 Buzzer output control device and buzzer output control method
Provided is a buzzer that sounds without noise contamination. Specifically, an inaudible frequency signal generation unit 22 generates an inaudible frequency pulse signal P0; an audio frequency signal generation unit 26 generates, from the signal P0, an audio frequency pulse signal P1: a signal synthesizing unit 28 generates a synthesized frequency pulse signal P2 having the signal P0 in an ON time of the signal P1; a first duty ratio setting unit 30 sets a duty ratio Di of the signal P0 in the signal P2 to gradually increase over a first predetermined period of the signal P2, and thus generates a buzzer driving signal P3; and a buzzer driving unit 40 makes a buzzer 60 sound with a pitch corresponding to a frequency of the signal P3 and volume corresponding to the duty ratio of the signal P3.
US09583086B2 Keyboard device of electronic musical instrument
The invention provides a keyboard device of an electronic musical instrument, wherein a hammer can be installed correctly by a simple operation of pressing a key. The keyboard device of the electronic musical instrument includes: a chassis; a key disposed rotatably on the chassis and extending from the rear to a front; a support shaft disposed on the chassis in front of the rotation center; a hammer rotating in conjunction with the key along with pressing on the front of the key; a retaining hole formed through the hammer and retaining the support shaft; a guide groove guiding the support shaft in the retaining hole; and a shifting means, shifting from a temporarily secured state to a retained state, and pressing the hammer in the temporarily secured state toward the rear to shift the hammer to the retained state along with the pressing on the front of the key.
US09583085B2 Accelerometer and gyroscope controlled tone effects for use with electric instruments
A movement actuated tone effects system is provided for manipulating the electrical signal of an electric instrument by moving the electrical instrument in relation to a set of reference axes. A movement actuated tone effects unit is positioned within the electric instrument or within an effects cartridge attached to the electric instrument via a cartridge receiver. The movement actuated tone effects unit includes a motion sensor unit, a processor, a tone effects circuit, and a power source, wherein the motion sensor unit measures the motion of the electric instrument and generates electrical signals directed to the processor. The processor analyzes the electrical signals, determines the appropriate tone effect to apply, and then directs the tone effects circuit to produce the desired tone effect. The movement actuated tone effects unit may further include an integrated speaker, a signal converter, a transmitter, and a device terminal.
US09583083B1 Adaptable drum practice device
An adaptable drum practice device includes an attachment mechanism, including a clip or a clamp; a sliding rail; a one-piece or telescoping shaft; and a device practice pad; such that the device practice pad is rotationally connected to the shaft, which allows a drummer to set the device practice pad to preferred height and rotational, vertical, and horizontal angles, and longitudinal position. The adaptable drum practice device can further include a ball joint with a locking mechanism, and the telescoping shaft can further include upper and lower shafts. The adaptable drum practice device allows a practicing drummer to attach the adaptable drum practice device to an existing conventional training drum, quickly and securely, thereby allowing the drummer to have two drumming surfaces that resemble a drum and a hi-hat, cymbal, or additional drum.
US09583082B1 Drum mount providing isolated resonance
Some embodiments provide drum mounts for mounting a drum to supporting bracket arms, stands, or racks in a manner that does not impede drum shell resonance and that shields the drum mount and structure upon which the drum is mounted from absorbing the drum's vibrational energy during play. The drum mount is comprised of an inner mount plate, outer mount bar, and coupling assemblies. Each of the inner mount plate and outer mount bar couple to a drum shell or tension ring using the coupling assemblies. The coupling assemblies also couple the inner mount plate to the outer mount bar. The coupling assemblies include dampeners and endcaps with protrusions for minimizing surface area contact points from which energy can be transferred to the drum mount.
US09583077B2 Electric stringed instrument amplifier
An electric stringed instrument amplifier includes a housing including an inner surface that defines a cavity configured for disposal of at least a portion of a headstock of an electric stringed instrument that emits sound. A tension member extends from the housing and is engageable with the headstock. Systems and methods are provided.
US09583073B1 Adaptive startup method for constant current LED drivers
A constant current LED driver with adaptive startup voltage control is generally configured to provide output current to an LED load. A controller is configured to sense the output current, and to provide driving control signals as a function thereof to maintain the sensed current at a target current. During startup operation, the controller provides driving control signals further as a function of a first defined maximum output voltage value. During steady state operation, the driving control signals are provided as a function of a second defined maximum output voltage value. The maximum values may be set according to forward voltage drop values for the LED load in association with first and second temperatures, respectively. During transition operations, the maximum output voltage value is continuously adjusted between the first and second maximum output voltage values, such that the LED load exceeds its warm up time prior to steady state operation.
US09583071B2 Calibration apparatus and calibration method
A calibration apparatus comprises: a determination unit configured to determine, for each of a plurality of calibration images, which one of a plurality of subranges to which a characteristic value of the calibration image belongs; a display unit configured to simultaneously display, on a display apparatus, two or more calibration images of which the characteristic values are determined to belong to same subrange; an acquisition unit configured to acquire a calibration measurement value, which is a measurement value representing at least a display brightness or a display color of the calibration image; and a calibration unit configured to execute calibration of the display apparatus based on the calibration measurement value acquired by the acquisition unit.
US09583066B2 Gating control module logic for a gate driving method to switch between interlaced and progressive driving of the gate lines
The present disclosure discloses a gate driving method, a driving apparatus of a display panel and a display apparatus. The driving apparatus may be in two driving modes, i.e., a first mode and a second mode. In the first mode, due to a reduced number of gate lines to be driven when various frames of images are displayed, the power consumption can be reduced. In addition, due to the effect of persistence of vision of human eyes, better quality of display images can be ensured while reducing power consumption. In the second mode, as respective lines of gate lines are driven progressively when various frames of images are displayed, the display panel is enabled to have better quality of display images. By switching the driving apparatus between the first mode and second mode, a number of gate lines to be driven can be reduced so as to reduce power consumption.
US09583064B2 Liquid crystal display
A liquid crystal display (LCD) has a pixel matrix, a plurality of shift registers, a plurality of common voltage generators, a plurality of common voltage buffers, and a plurality of primary bidirectional switch circuits. The shift registers sequentially output gate signals to scan lines of the pixel matrix. The common voltage generators output initial common voltages according to the gate signals. The common voltage buffers are configured to buffer the initial common voltages to output a plurality of common voltages to a plurality of common voltage lines of the pixel matrix. Each of the primary bidirectional switch circuits is configured to control electrical connection between two of the common voltage lines according to one or more gate signals outputted from at least one of the shift registers.
US09583061B2 Display device and driving method
An object is to reduce power consumption of a display device and to suppress deterioration of display quality. As a transistor provided for each pixel, a transistor including an oxide semiconductor layer is used. Note that off-state current of the transistor can be decreased when the oxide semiconductor layer is highly purified. Therefore, variation in the value of a data signal due to the off-state current of the transistor can be suppressed. That is, display deterioration (change) which occurs when writing frequency of the data signal to the pixel including the transistor is reduced (when a break period is lengthened) can be suppressed. In addition, flickers in display which generates when the frequency of an alternating-current driving signal supplied to a signal line in the break period is reduced can be suppressed.
US09583057B2 Pixel circuit and display device
Provided are a pixel circuit and a display device which support multi-gradation display and can prevent display quality from deteriorating with low power consumption. A pixel circuit (3) includes a first switch circuit (22) provided between a pixel node Np of a display element unit (21) and a data signal line SL, and a memory circuit (23) which restores the pixel node to an initial voltage state, based on a hold voltage stored in a storage node Nm. The memory circuit (23) includes a transistor T1 having a gate electrode connected to the storage node Nm, and a source electrode connected to the pixel node Np; a second switch circuit (24) which controls a conducting state between a drain electrode of the transistor T1 and a voltage supply line VSL, in response to a signal level of a first control signal line SWL; a third switch circuit (25) which controls a conducting state between the drain electrode and the gate electrode of the transistor T1, in response to a signal level of a second control signal line CSL; and a capacitor element Cst provided between the storage node Nm and the voltage supply line VSL.
US09583049B2 Display device, electronic apparatus, and method for driving display device
According to an aspect, a display device includes an image display panel; a planar light source including a light guide plate and an edge-lit light source that has light sources; and a controller. The controller sets luminance determination blocks by virtually dividing the image display panel in a light-source-arrangement-direction, identifies a luminance determination block with a highest luminance in the incidence direction, among luminance determination blocks at a same position in the light-source-arrangement-direction, identifies a luminance determination block the luminance of which is to be corrected by referring to luminance information of the light sources, and controls a light quantity of each of the light sources in such a manner that luminance of the identified luminance determination block is achieved.
US09583048B2 Light guide plate, dual-view backlight module and dual-view display device
A light guide plate, a dual-view backlight module having the light guide plate and a dual-view display device having the dual-view backlight module are provided. A lower surface of the light guide plate includes at least one V-shaped groove configured to reflect a light ray, which is incident onto the lower surface of the light guide plate from sides thereof, onto an upper surface of the light guide plate by sides of the at least one V-shaped groove, the reflected light ray leaving the light guide plate from the upper surface thereof. The V-shaped groove on the light guide plate refracts the light from the two sides of the V-shaped groove, so that the light leaving the upper surface of the light guide plate can form dual-view backlight with a good brightness enhancement effect and a dual-view display having a high brightness can be manufactured.
US09583046B2 Lighting device, display device, and television device
A backlight unit 12 includes a light guide plate 16, first LEDs 17A, second LEDs 17B, first support members 28, and second support members 29. The first LEDs 17A are opposed to a first light entrance surface 16nA that is a first edge surface 16E1 of the light guide plate 16. The second LEDs 17B are opposed to a second light entrance surface 16bB that is a second edge surface 16E2 of the light guide plate 16. The second LEDs 17B are arranged to be away from the second light entrance surface 16bB with a distance B relatively greater than a distance A between the first LEDs 17A and the first light entrance surface 16bA. The first support members 28 are in contact with the first edge surface 16E1 of the light guide plate 16 to support the light guide plate 16 from a first LED 17A side. The second support members 29 are arranged on a same side as the second LEDs 17B with respect to the light guide plate 16 to be away from the light guide plate 16. The second support members 29 are to be in contact with the second edge surface 16E2 according to thermal expansion of the light guide plate 16 to support the light guide plate 16 from a second light source side. The second support members 29 are made of an elastic material softer than a material of the first support members 28.
US09583037B2 Display unit and electronic apparatus
A display unit includes: a display panel including, for each pixel, four or more types of sub-pixels that are different from one another in luminescent colors; and a driving circuit applying a pulse based on an image signal to each of the sub-pixels, and applying, when the sub-pixels include a sub-pixel of a defect dot, a compensated pulse configured to correct the defect dot to the sub-pixels that are adjacent or close to the sub-pixel of the defect dot.
US09583036B2 Method of driving display panel and display apparatus for performing the same
A method of driving a display panel includes dividing an input image into a plurality of segments; generating flicker levels of respective ones of the segments; determining a frame rate of the display panel based on the flicker levels of the segments; and outputting a data voltage to the display panel at the frame rate.
US09583032B2 Navigating content using a physical object
Technology is disclosed herein to help a user navigate through large amounts of content while wearing a see-through, near-eye, mixed reality display device such as a head mounted display (HMD). The user can use a physical object such as a book to navigate through content being presented in the HMD. In one embodiment, a book has markers on the pages that allow the system to organize the content. The book could have real content, but it could be blank other than the markers. As the user flips through the book, the system recognizes the markers and presents content associated with the respective marker in the HMD.
US09583030B2 Display system
A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
US09583028B2 Flashlight
A flashlight includes a casing having a first end, a second end, a first side surface and a second side surface. The casing has a first casing member joined to a second casing member, with the first and second casing members defining an interior cavity there between. An electronics package is provided that includes a power source, an actuable switch member and a light array coupled to the power source and switch member. The light source is capable of projecting light outwardly from the first end of the flashlight and into a cavity. The first casing member includes a light passable portion through which the light projected into the cavity can pass to the exterior of the cavity.
US09583024B2 Electronic magnification device
Disclosed is a magnification device for use by blind and/or low vision individuals. The device includes an X-Y table upon which an item to be magnified can be placed. A stationary camera arm and a pivotal monitor arm are oriented over the X-Y table. The monitor arm includes a video monitor pivotally mounted at its distal end. The camera arm also includes two laterally disposed lighting arms. A series of controls are provided along a lower edge of the monitor via a mounting bracket.
US09583022B2 Apparatus for teaching personal life skills
An apparatus for teaching fine motor skills to a special needs student. The apparatus has a plurality of different personal life-skills training tools that more accurately replicate the skill encountered in real life. When the apparatus is arranged in its primary orientation and rests against the student's body, the life-skills training tools replicate the orientation of the objects relative to the orientation encountered by the student in real life. The apparatus includes a configurable platform having a plurality of walls. A plurality of hinges pivotally connect each wall with at least one other wall. The walls of the platform can be oriented and arranged in at least a first configuration forming a housing enclosing the training tools, and a second configuration wherein all of the walls are coplanar. The walls can also be oriented and arranged in at least a third configuration wherein none of the walls are coplanar.
US09583019B1 Cockpit flow training system
An aircraft simulation system comprising a user interface and a simulator in communication with the user interface. The user interface is configured to interact with an operator. The simulator is configured to generate a representation of controls in an aircraft that are visible from a current field of view identified by the user interface. The simulator is further configured to display the representation of the controls on the user interface. The simulator is further configured to identify interaction by the operator with the controls from user input received by the user interface. The simulator is further configured to record a sequence of performed operations from the interaction with the controls.
US09583018B1 Reconfigurable image generator
A RiG may simulate visual conditions of a real world environment, and generate the necessary amount of pixels in a visual simulation at rates up to 120 frames per second. RiG may also include a database generation system capable of producing visual databases suitable to drive the visual fidelity required by the RiG.
US09583013B2 Method and system for EEG-based task management
A method and system are disclosed for determining a task for a subject, which includes sensing electrical activity along a scalp of a subject; characterizing a mental state of the subject based on the electrical activity of the subject; comparing the mental state of the subject with a pre-defined task list to select a task for the subject based on the mental state of the subject; and assigning the task to the subject based on the comparison of the mental state of the subject and the pre-defined task list.
US09583011B2 Aircraft system for signaling the presence of an obstacle, an aircraft equipped with this system, and method for the detection of an obstacle
A system of an aircraft for signaling the presence of an obstacle during visual flight, which system includes at least one onboard unit to be installed in an aircraft to be equipped, which onboard unit includes an onboard database that stores at least one obstacle to be avoided during flight. The onboard unit includes an interface to be installed in the aircraft and whose function is to authorize the addition and the deletion of obstacles in the onboard database, with the interface being in communication with the onboard database.
US09583006B2 Identifying unmanned aerial vehicles for mission performance
A device receives a request for a mission that includes traversal of a flight path from a first location to a second location and performance of mission operations, and calculates the flight path from the first location to the second location based on the request. The device determines required capabilities for the mission based on the request, and identifies UAVs based on the required capabilities for the mission. The device generates flight path instructions for the flight path and mission instructions for the mission operations, and provides the flight path/mission instructions to the identified UAVs to permit the identified UAVs to travel from the first location to the second location, via the flight path, and to perform the mission operations at the second location.
US09583003B2 Vehicle danger notification control apparatus
A pedestrian and a driver of a running vehicle that are in the vicinity of a stopped vehicle are notified of a danger of collision with a vehicle, without requiring the pedestrian to carry a communication terminal. A vehicle danger notification control apparatus includes an outside recognition arrangement for recognizing a running vehicle and/or a pedestrian as a moving object(s), a danger determination arrangement for determining whether there is a danger of collision(s) between the running vehicle and the pedestrian and/or between the running vehicles, and a danger notification arrangement for notifying, in a case in which the danger determination means determines that there is a collision danger, a driver of the running vehicle and/or the pedestrian of the collision danger.
US09583002B2 Vehicle information transmitting device
To provide a vehicle information transmitting device capable of transmitting information associated with danger at a periphery of the own vehicle in a manner intuitively understandable by the driver. In the present embodiment, when a dangerous direction is the left or the right, a display position of an own vehicle state display figure is changed from a display position in an initial state to a display position on the same side as the dangerous direction. If the dangerous direction is on the front, the display position of the own vehicle state display figure is changed from the display position in the initial state to a display position on an upper side. When a dangerous target is detected, a display area of the own vehicle state display figure is changed to a display area greater than the display area in the initial state.
US09582992B2 Control apparatus and method and electronic device
A control apparatus includes: a communicating unit configured to establish communication connection with a controlled object; an image acquiring unit configured to obtain a preview image containing the controlled object; and a controlling unit configured to receive a control instruction inputted according to the preview image, and control the controlled object according to the control instruction. Controlling the controlled object according to the preview image containing the controlled object may realize control of the controlled object in a simple and convenient manner, thereby improving user experiences.
US09582985B2 System and method for mitigating emergency call failure
An emergency call failure mitigation apparatus, system and method includes a messaging subsystem that may be launched, upon receiving a call signaling indication pursuant to an emergency service call from a calling party that has failed to reach a local Public Safety Answering Point (PSAP). The messaging subsystem is operative to prompt the calling party to provide one or more responses relating to the emergency situation and generate a messaging object including at least one of the calling party's location, identity of a call receiving device associated with the calling party, type of the calling party and priority of the emergency service call determined based on one or more responses of provided by the calling party. In one embodiment, the messaging object may be forwarded to an entity operative to reach the calling party.
US09582983B2 Low power voice trigger for finding mobile devices
Systems and methods may provide for monitoring an input audio signal from an onboard microphone of a mobile device while a host processor of the mobile device is in a standby mode. Additionally, a predetermined audio pattern may be identified in the input audio signal and a device location session may be triggered with respect to the mobile device based on the predetermined audio pattern. In one example, an output audio signal is generated during the device location session.
US09582982B2 Method and system for energy management of an offender monitor
A portable device, for example an offender monitor, can utilize a GPS receiver or other location detector to provide locational information for the device. The portable device can communicate over a cellular network, for example using a radio to transmit location readings over the network. The location detector and the radio can draw power from an onboard battery. The portable device can operate in at least two modes. When charge of the battery drops below a threshold, the device can switch from the first mode of operation to the second mode to conserve power and avoid fully depleting the battery.
US09582976B2 Systems and methods for detecting and reporting hazards on a pathway
A safety system and associated methods of operation, for detecting an object on a pathway and reporting to a user information relating to the object to help the user avoid a collision with the object. The safety system includes a first sensor system for detecting the presence of the user and a second sensor system for detecting the object within the pathway. Upon detection of the object, the second sensor system obtains information relating to the object and generates a signal based on the obtained information. The signal is received by a reporting system, which generates a warning signal to communicate the object information to the user. The object information may include a location of the object on the pathway and an identification of the object for the user.
US09582975B2 Alarm routing in integrated security system based on security guards real-time location information in the premises for faster alarm response
An apparatus is provided that includes a plurality of Bluetooth low energy devices (BLEs) embodied as stand-alone devices or incorporated into a respective security sensor, each at known locations within a secured geographic area, a plurality of portable wireless devices within the secured area, each receiving location information via signals from a nearby one or more of the plurality of BLEs, and a security system of the secured area that receives location information from the plurality of portable wireless devices, detects a security breach within the secured area, sends a notification to each of the plurality of wireless devices, and assigns a user of one of the plurality of portable wireless devices to investigate the breach based upon proximity of the one portable device to the breach.
US09582974B2 Method of activating a supplemental visual warning signal based on frequency emitted from a generator of a primary audible warning signal
A system and method for signaling users including a control device electrically connected to a transceiver. The transceiver has a specified frequency. A first mobile signal device being activated by a first user and electrically communicating with a first transmitter having a selectable signal frequency. The first transmitter electrically communicates with the transceiver using the specified frequency. A second signal device includes a second receiver for receiving an activation signal from the transceiver. The second receiver electrically communicates with the transceiver using the specified frequency. The second signal device is activated by the activation of the first mobile signal device using the transceiver for alerting other persons.
US09582971B2 System and method for smart deposit retrieval
A system includes a processor and an interface. The interface receives, from a terminal, planned-deposit information. The terminal is at a location that is remote from a deposit location. The processor associates a deposit identifier with the planned-deposit information and stores the planned-deposit information and the deposit identifier in a memory.A method includes recognizing, at a deposit location, a deposit identifier. The method includes identifying, based on the deposit identifier and information stored in a memory, a planned deposit. The method includes detecting that the planned deposit has been delivered to a depository and determining, by a processor and based on one or more business rules, an availability of funds associated with the planned deposit.
US09582970B2 Electronic gaming device and method of providing games having player provided game elements
Systems and methods for providing games, such as wagering games, that include game features, such as symbols, that may be temporarily replaced or modified by player provided elements, if desired, wherein the player provided elements may function in the same manner as the symbols in one or more rounds of the game.
US09582965B1 Incentivizing users to alter virtual item balances in an online game
A system and method for incentivizing users to alter virtual item balances in an online game are disclosed. The incentives may include rewards for users to reach balance goals. The balance goals may specify target balances of virtual items to be reached in user inventories, and a time by which such target balances must be reached in order for the users to receive a reward. Such target balance may include minimum or maximum balances levels, a range of absolute balance levels, a change in the current balance levels of virtual items in the user inventories and/or any other target balances. Determinations whether a given user has reached such target balance in accordance with a balance goal may be made at or before the time specified in the balance goal.
US09582964B2 Apparatus, system and method for awarding progressive or jackpot prizes
Gaming methods and apparatus are described for providing a plurality of progressive prizes for a gaming system. Separate progressive prizes are maintained for each of a plurality of different wager options for a game playable on the gaming system. The progressive prizes can be maintained so as to reduce the difference in contribution to the expected return to player between the wager options.
US09582963B2 Method and system for gaming machine accounting
A gaming machine has a main or master gaming controller. Primary gaming machine accounting is performed by the master gaming controller in communication with a casino accounting system. A secondary controller is associated with the gaming machine. The secondary controller facilitates paragame activity. Secondary gaming machine accounting, such as associated with activities implemented by the secondary controller, is performed by the secondary controller in communication with a secondary accounting system. The secondary controller and secondary accounting system can also mirror or monitor primary gaming machine accounting.
US09582961B2 Single outcome game of chance with differing wagers varying amoung multiple paytables
A method of playing a wagering game that comprises the player making multiple wagers to play a single-outcome game, the multiple wagers being made on multiple predetermined paytables for said game. One single-outcome game and at least two differing paytables for said game are offered to the player. The paytables may be for different game versions or for a single game version with differing risk levels. The payback percentage of each of the said differing paytables may vary according to the amount of the wager. The player makes one wager for each predetermined paytable to be utilized in the resolve of the wagers. Multiple same paytables, multiple differing paytables or combinations thereof may be wagered for the play of a single game having a single outcome. The said single outcome is then compared to each wagered predetermined paytable, and each wager is resolved according to that same wagered predetermined paytable.
US09582958B2 Providing cinematic animation and visualized payoff in a roulette game
Methods and computer programs for providing animation to online roulette game during game play include providing data for enabling an interface on a device used for playing the online roulette game. The interface renders a grid identifying bet entries and a roulette wheel on which a ball is provided to determine outcome of the roulette game. A number on the grid on which a bet has been placed, is identified. A number is randomly generated to determine outcome of the roulette game. The number corresponds with a specific one of the plurality of slots defined in the roulette wheel in which the ball is to land. Graphical animation is provided at the roulette wheel to provide visual indication of the outcome of the roulette game as the ball is caused to move around the roulette wheel toward the specific slot in the roulette wheel corresponding to the generated number.
US09582957B2 Electronic payment system for automated machine
An electronic payment system is provided to comprise a mobile terminal 10 for emitting a remotely operable signal, a communications device 5 connected to an automated machine 1 for receiving remotely operable signal emitted from mobile terminal 10, and an automatic payment device 6 linked to a financial database 7. Communications device 5 retrieves from remotely operable signal an account number of a holder of the account at financial database 7. Payment device 6 receives a monetary signal indicative of a transaction fee, withdraws the amount of transaction fee from the correct holder's account to produce an authorization signal to communications device 5 that drives automated machine 1 without credit transaction.
US09582952B1 Method and system for paperless electronic queue ticketing
A computer-implemented method for paperless electronic queue ticketing is provided. The method includes reading, by a processor of a user device, an electronic ticket code displayed on a ticket device, the electronic ticket code having information and instructions for an electronic ticket; decoding, by the processor of the user device, the information and instructions in the electronic ticket code; and sending, by the processor of the user device, a signal to a sensor on the ticket device to obtain the electronic ticket. A system and computer product for paperless electronic queue ticketing are also provided.
US09582947B2 Authenticating a user on behalf of another user based upon a unique body signature determined through bone conduction signals
Concepts and technologies are disclosed herein for spoofing bone conduction signals. According to one aspect, a device can compare a first unique body signature associated with a first user to a second unique body signature associated with a second user to determine a first unique effect of a first body of the first user on a signal and a second unique effect of a second body of the second user on the signal. The device can generate an authentication signal based upon the first unique effect and the second unique effect to include signal characteristics that, after propagating through the first body of the first user, are representative of the second unique body signature. The device can transmit the authentication signal through the first body of the first user to an authentication device that authenticates the first user on behalf of the second user.
US09582943B1 Driving data collection
Driving data are collected from a vehicle by a device. The device comprises a vehicle interface for interfacing with an on-board diagnostics system of a vehicle and retrieving vehicle parameters of the vehicle from the on-board diagnostics system. The retrieved vehicle parameters include a vehicle identification parameter and driving parameters. The device includes a processor configured to identify the vehicle based on the vehicle identification parameter and determine data describing how the vehicle is driven based on the retrieved vehicle parameters. The device also includes an output interface configured to output the determined data.
US09582940B2 System and method for image composition
A system and method for obtaining a composite image by combining multiple sub-images are provided. In some embodiments, the method may include retrieving overlapping images corresponding to sub-images including 3D volume data, generating two-dimensional (2D) projection images and pixel maps based on the overlapping images, performing one or more registrations based on the 2D projection images and the pixel maps, calibrating the sub-images based on the results of the registration(s), and fusing the sub-images to produce a composite image. In some embodiments, the method may include setting a plurality of parameters relating to an X-radiation source or a radiation detector based on a preliminary number of exposures and a preliminary exposure region, controlling, based on at least one of the plurality of parameters, a motion of the X-radiation source or a motion of the radiation detector to capture a plurality of sub-images, and combining the plurality of sub-images.
US09582938B2 Image processing apparatus, display control method and program
Aspects of the present invention include an apparatus comprising a recognition unit configured to recognize real object in an image. The apparatus may further comprise a determining unit configured to determine a stability indicator indicating a stability of the recognition, and a display control unit configured to modify a display of a virtual object according to the stability indicator.
US09582937B2 Method, apparatus and computer program product for displaying an indication of an object within a current field of view
A method, apparatus and computer program product are provided for displaying an indication of an object when location information associated with the object describes a location within the current field of view of an imaging device. The indication of the object can be displayed within a map image, live image, etc., when the location information associated with the object describes a location within the current field of view of an imaging device.
US09582936B2 Method and apparatus for combining plurality of 2D images with 3D model
A method and apparatus for combining a three-dimensional (3D) model with a plurality of two-dimensional (2D) images by adjusting degrees of transparency of the plurality of 2D images. The method includes: obtaining a plurality of 2D images; arranging the plurality of 2D images in a 3D space based on predetermined criteria; obtaining spatial coordinates of each of the plurality of 2D images arranged in the 3D space; generating a 3D model of the plurality of 2D images arranged in the 3D space based on the spatial coordinates; changing attribute information of the plurality of 2D images arranged in the 3D space; and displaying the 3D model and the plurality of 2D images whose attribute information is changed.
US09582934B2 Method and system for efficient extraction of a silhouette of a 3D mesh
A method and system for extracting a silhouette of a 3D mesh representing an anatomical structure is disclosed. The 3D mesh is projected to two dimensions. Silhouette candidate edges are generated in the projected mesh by pruning edges and mesh points based on topology analysis of the projected mesh. Each silhouette candidate edge that intersects with another edge in the projected mesh is split into two silhouette candidate edges. The silhouette is extracted using an edge following process on the silhouette candidate edges.
US09582930B2 Target aquisition in a three dimensional building display
The present disclosure provides methods, devices, and computer-readable media for target acquisition in a three dimensional building display are described herein. One or more embodiments include extracting building information modeling semantic data of each of a number of modeled objects in a visual scene of a three dimensional building display, determining a semantic space for each of the number of modeled objects based, at least in part, on the building information modeling semantic data, adjusting a scale factor of the three dimensional building display based, at least in part, on the semantic space of each of the number of modeled objects, and acquiring a target of at least one of the modeled objects using the adjusted scale factor.
US09582925B2 Method for processing a volume model, related computer program product and processing system
This processing method provides the ability to process a volume mode with an object intended to be added to or subtracted from said model. The volume model includes points arranged according to a spatial grid in a first reference system, each point being assigned an intensity value. The object has points positioned in a second reference system that is distinct from the first reference system.The method includes the calculation, for each point of the object, of an image point in the first reference system using a transfer function.The method further includes the modification of the intensity of points of the volume model by applying a correction function associated with each image point, the value of the correction function at a point of the volume model being dependent on the position of said point relative to said image point with which said correction function is associated.
US09582923B2 Volume rendering color mapping on polygonal objects for 3-D printing
Processes and systems for computer enabled volume data rendering, and more particularly for mapping of volume rendering colors upon polygonal model objects applied to computer enabled volume rendering are described. In one example, the mapping or encoding of the color of volume rendering data upon polygonal model objects located inside volumetric data is achieved by assigning the rendering result of voxels near the surface of the polygonal object.
US09582922B2 System, method, and computer program product to produce images for a near-eye light field display
A system, method, and computer program product are provided for producing images for a near-eye light field display. A ray defined by a pixel of a microdisplay and an optical apparatus of a near-eye light field display device is identified and the ray is intersected with a two-dimensional virtual display plane to generate map coordinates corresponding to the pixel. A color for the pixel is computed based on the map coordinates. The optical apparatus of the near-eye light field display device may, for example, be a microlens of a microlens array positioned between a viewer and an emissive microdisplay or a pinlight of a pinlight array positioned behind a transmissive microdisplay relative to the viewer.
US09582920B2 Systems, methods, and computer-readable media for efficiently processing graphical data
Systems, methods, and computer-readable media for efficiently processing graphical data using an electronic device are provided. A characteristic of graphical data may be identified and compared to a threshold. Based on whether the identified characteristic meets the threshold, the graphical data may be rendered either entirely by a first type of graphical processing unit or by both the first type of graphical processing unit and by a second type of graphical processing unit.
US09582919B2 Automatic run-time identification of textures
In one embodiment, a texture identification method and system are disclosed that uniquely identifies textures as they are used by the application and associates collected, inferred, or user-specified data with objects not owned by the library. In various embodiments, textures may be identified in various scenarios such as when textures are loaded, deleted, relocated, reloaded, and the like. In a further embodiment, APIs are provided that the application can call to provide useful information to the system that can improve the quality of the data in some situations.
US09582918B2 Techniques for producing creative stereo parameters for stereoscopic computer animation
A computer-implemented method determining a user-defined stereo effect for a computer-generated scene. A set of bounded-parallax constraints including a near-parallax value and a far-parallax value is obtained. A stereo-volume value is obtained, wherein the stereo-volume value represents a percentage of parallax. A stereo-shift value is also obtained, wherein the stereo-shift value represents a distance across one of: an area associated with a camera sensor of a pair of stereoscopic cameras adapted to film the computer-generated scene; and a screen adapted to depict a stereoscopic image of the computer-generated scene. A creative near-parallax value is calculated based on the stereo-shift value, the stereo-volume, and the near-parallax value. A creative far-parallax value is also calculated based on the stereo-shift value and the product of the stereo-volume and the far-parallax value. The creative near-parallax value and creative far-parallax value are stored in a computer memory as the user-defined stereo effect.
US09582907B1 User interface for displaying internal state of autonomous driving system
Autonomous vehicles use various computing systems to transport passengers from one location to another. A control computer sends messages to the various systems of the vehicle in order to maneuver the vehicle safely to the destination. The control computer may display information on an electronic display in order to allow the passenger to understand what actions the vehicle may be taking in the immediate future. Various icons and images may be used to provide this information to the passenger.
US09582906B2 Method for subjecting PET image to motion compensation and attenuation correction by using small number of low-radiation-dose CT images
The present invention relates to a method for motion compensation and state-of-motion specific attenuation correction of positron tomography images by using a small number of low-radiation-dose computer tomography images. The method of the present invention comprises the steps of: acquiring respiration-specific PET data; acquiring CT images from at least 2 different respirations, and using same to generate a virtual 4D CT image; matching the 4D CT image and the respiration-specific PET data, and selecting 3D CT images accurately corresponding to specific respirations; using the selected results to extract respiration motion displacement field information between respiration-specific PET data; using the selected CT images to subject the respiration-specific PET data to respiration-specific attenuation and scattering correction; and using the corrected respiration-specific PET data items and the extracted respiration motion displacement field information items to carry out respiration compensation and reconstruction.
US09582903B2 Display terminal device connectable to external display device and method therefor
The present invention is to maintain the viewability of display without impairing operability on a terminal side, even when the details of a touch operation performed on a display terminal device are transmitted to an external display device for display. In the present invention, when a touch operation is detected in an external transmission mode, the display terminal device generates details of a composite screen obtained by superimposing operation information (operation icon or animation image) indicating details of the touch operation on contents being displayed on the display screen (terminal screen), and transmits the contents of the composite screen to the external display device so as to change display contents on the external display device (display contents on its screen).
US09582900B2 Medical image processing device and method for displaying image of a body cavity with color distinction of infected area
RGB image signals are inputted. B/G ratio is calculated based on B image signal and G image signal. G/R ratio is calculated based on the G image signal and R image signal. In a feature space formed by the B/G ratio and the G/R ratio, a first process is performed. In the first process, a difference between coordinates in a first observation area and coordinates in a second observation area is increased. The first observation area mostly contains coordinates corresponding to a portion (of an object) infected with H. pylori. The second observation area mostly contains coordinates corresponding to a portion (of the object) in which eradication of the H. pylori infection has been successful.
US09582899B2 Real-time digitally enhanced imaging for the prediction, application, and inspection of coatings
Systems and methods providing digitally enhanced imaging for the prediction, application, and inspection of coatings. A digital imaging and processing device provides image acquisition, processing, and display of acquired digital imaging data to allow a user to discern variations, beyond that which can be discerned by observing a coating or a substrate with the naked eye. The digital imaging and processing device may also provide pre-coating and post-coating inspection capabilities as well as coating prediction capabilities.
US09582897B2 Lifeform image analysis system, lifeform image analysis method, and lifeform image analysis program
A image input means 81 inputs a lifeform image which is a captured image of a lifeform sample. A structure standard color storage means 82 stores a standard color of a structure included in the lifeform image. A structure extraction means 83 extracts a target structure from the lifeform image. A structure color computation means 84 computes, from an image of the structure extracted by the structure extraction means 83, a color of the structure. A color distribution conversion means 85 converts a color distribution of the input lifeform image so that a difference between the color of the structure computed by the structure color computation means 84 and the standard color of the corresponding structure stored in the structure standard color storage means 82 is reduced.
US09582896B2 Line tracking with automatic model initialization by graph matching and cycle detection
A vision based tracking system in a mobile platform tracks objects using groups of detected lines. The tracking system detects lines in a captured image of the object to be tracked. Groups of lines are formed from the detected lines. The groups of lines may be formed by computing intersection points of the detected lines and using intersection points to identified connected lines, where the groups of lines are formed using connected lines. A graph of the detected lines may be constructed and intersection points identified. Interesting subgraphs are generated using the connections and the group of lines is formed with the interesting subgraphs. Once the groups of lines are formed, the groups of lines are used to track the object, e.g., by comparing the groups of lines in a current image of the object to groups of lines in a previous image of the object.
US09582892B2 Radiation imaging apparatus, radiation imaging method, and program
A radiation imaging apparatus comprising: an image capture unit capturing a radiation image; a first decision unit deciding, as a first region of interest, a region of interest from a region of a first radiation image; a first extraction unit extracting the first region of interest from the first radiation image; a form decision unit deciding a first form from the first region of interest; a first display unit enlarging and displaying the first region of interest; a first search unit searching a region of a second radiation image for a second form similar to the first form; a second decision unit deciding a second region of interest from the second radiation image so as to include the second form; a second extraction unit extracting the second region of interest from the second radiation image; and a second display unit enlarging and displaying the second region of interest.
US09582888B2 Structured light three-dimensional (3D) depth map based on content filtering
A structured light three-dimensional (3D) depth map based on content filtering is disclosed. In a particular embodiment, a method includes receiving, at a receiver device, image data that corresponds to a structured light image. The method further includes processing the image data to decode depth information based on a pattern of projected coded light. The depth information corresponds to a depth map. The method also includes performing one or more filtering operations on the image data. An output of the one or more filtering operations includes filtered image data. The method further includes performing a comparison of the depth information to the filtered image data and modifying the depth information based on the comparison to generate a modified depth map.
US09582887B2 Methods and apparatus for determining field of view dependent depth map correction values
In a method for determining field of view dependent depth map correction values for correction of a depth map of an image taken with a lens having a field of view the following is performed: obtaining (31) relative depth information for at least two different depths and at least two different predetermined locations of the field of view of the lens; receiving (32) an image; determining (33) a depth of the received image; and determining (34) on the basis of the determined depth of the received image at least one depth map correction value on the basis of the relative depth information.
US09582885B2 Zonal underground structure detection method based on sun shadow compensation
A zonal underground structure detection method based on sun shadow compensation is provided, which belongs to the crossing field of remote sensing technology, physical geography and pattern recognition, and is used to carry out compensation processing after a shadow is detected, to improve the identification rate of zonal underground structure detection and reduce the false alarm rate. The present invention comprises steps of acquiring DEM terrain data of a designated area, acquiring an image shadow position by using DEM, a solar altitude angle and a solar azimuth angle, processing and compensating a shadow area, and detecting a zonal underground structure after the shadow area is corrected. In the present invention, the acquired DEM terrain data is used to detect the shadow in the designated area; and the detected shadow area is processed and compensated, to reduce influence of the shadow area on zonal underground structure detection; finally, the zonal underground structure is detected by using a remote sensing image after shadow compensation, so that the accuracy of zonal underground structure detection is improved and the false alarm rate is reduced compared with zonal underground structure detection using a remote sensing image without shadow compensation processing.
US09582883B2 Method and apparatus for remote sensing and comparing utilizing radiation speckle
Disclosed are systems and methods to extract information about the size and shape of an object by observing variations of the radiation pattern caused by illuminating the object with coherent radiation sources and changing the wavelengths of the source. Sensing and image-reconstruction systems and methods are described for recovering the image of an object utilizing projected and transparent reference points and radiation sources such as tunable lasers. Sensing and image-reconstruction systems and methods are also described for rapid sensing of such radiation patterns. A computational system and method is also described for sensing and reconstructing the image from its autocorrelation. This computational approach uses the fact that the autocorrelation is the weighted sum of shifted copies of an image, where the shifts are obtained by sequentially placing each individual scattering cell of the object at the origin of the autocorrelation space.
US09582882B2 Method and apparatus for image registration in the gradient domain
A method, apparatus and computer program product are provided for image registration in the gradient domain. A method is provided including receiving a first image and second image; and registering the first and second images in a gradient domain. The registration of the first and second images in the gradient domain includes applying an energy minimization function based on total variation.
US09582881B2 Machine vision image sensor calibration
A system, apparatus, method, and computer readable media for calibration of one or more extrinsic image sensor parameters. A system may calibrate a multi-camera surround view system, for example as may be employed in a vehicle, based on image data comprising one or more ground plane landmarks. The system may determine a ground plane projection of the image data, for example through a Radon transformation. A signal associated with at least one of the one or more ground plane landmarks in the ground plane projection(s) may be determined, for example through application of the projection-slice theorem. The landmark signal may be utilized as a response in an automated calibration loop to optimize one or more extrinsic parameter values associated with the sensors.
US09582877B2 Methods and systems for digitally counting features on arrays
Methods, systems and platforms for digital imaging of multiple regions of an array, and detection and counting of the labeled features thereon, are described.
US09582876B2 Method and apparatus to visualize the coronary arteries using ultrasound
A non-invasive screening technique for visualizing coronary arteries which overcomes the problems of visualizing the curved arteries by projecting the three dimensional volume of the arteries onto a two dimensional screen. Blood-filled areas such as the coronary arteries and veins, are highlighted to contrast with other nearby tissues using non-linear classification and segmentation techniques. Data is gathered as a sequence of 2D slices stored as a 3D volume. Software interpolates voxels intermediate to the slices. Wiener filtering or LMS spatial filtering can be implemented on each 2D scan to improve lateral resolution and reduce noise prior to the use of the scan data with the classification and segmentation algorithms. A traditional handheld ultrasound probe is employed to enable the technician to locate the area of interest, but a gyroscopic stabilizer is added to minimize unwanted variation on two axes of rotation.
US09582874B2 Method of detection of faults on circuit boards
A method of detection of faults on circuit boards comprising the steps of capturing an image (14) of each of a plurality of circuit boards (10) and dividing each of the captured images (14) into a plurality of image segments, each having an image characteristic value. One of the circuit boards 10 is selected for testing and each image segment is compared with corresponding image segments of each other circuit boards (10) to define a plurality of differential image characteristic values. The differential image characteristic values for each image segment are ranked from lowest to highest and an nth differential image characteristic value is selected. An overlay image comprising a representation of the selected differential image characteristic values is created and displayed over the selected circuit board.
US09582869B2 Dynamic binning for diversification and defect discovery
Methods and systems for generating a defect sample for a wafer are provided. One method includes separating defects detected on a wafer into bins having diversity in values of a first set of one or more first attributes of the defects. The method also includes selecting, independently from one or more of the bins, defects within the bins based on diversity in a second set of one or more second attributes of the defects. The selected defects are then used to create a defect sample for the wafer. In this manner, defects having diverse values of multiple attributes can be easily selected.
US09582868B2 Image processing apparatus that appropriately performs tone correction in low-illuminance environment, image processing method therefor, and storage medium
An image processing apparatus includes a histogram detecting unit that detects a luminance histogram from an input image. A determination unit determines control points for use in generation of a tone curve based on such a luminance that a percentage from a low-luminance side in the detected luminance histogram is equal to a first value, and a percentage from a high-luminance side in the detected luminance histogram is equal to a second value. A tone curve generating unit generates a tone curve based on the calculated control points. An image processing unit performs image processing based on the tone curve. A judgment unit judges whether illuminance of a shooting environment is low. A point light source detecting unit detects a component originating from a point light source from the luminance histogram. When the illuminance of the shooting environment is low, the determination unit makes the second value greater.
US09582865B2 Visualization for blood flow in skin image data
Blood flow beneath a user's skin, for example, in a user's face may be visually rendered. In some aspects, a plurality of differences is determined in the intensity of pixels of a first image and the corresponding pixels of a subsequent second image. In some aspects, this plurality of differences is enhanced to accentuate a characteristic associated with the first image and the second image. The enhanced plurality of differences is visually rendered for each subsequent comparison of pixel intensity values.
US09582861B2 Image processing technique using high frequency data analysis to filter low frequency data by dynamic kernel adjustment
A method includes separating image data into high frequency image data and low frequency image data. The high frequency image data is separated into windows, with each window containing pixels. The low frequency image data is separated into windows corresponding respectively to the plurality of windows of the high frequency image data, with each window containing pixels. For each window in the high frequency image data, a number of textured pixels in the window is determined, the textured pixels being pixels that vary greatly in luminance value with respect to other pixels in the window, and a window modification is determined such that the number of textured pixels in the window is reduced. For each corresponding window in the low frequency image data, the window modification is applied, and each textured pixel in the window is corrected based upon the other pixels in the window.
US09582860B2 Temporally smooth video enhancement
Implementations generally relate to enhancing a video. In some implementations, a method includes classifying one or more objects in one or more frames of the video. The method further includes determining one or more filter parameters of one or more filters based on the classifying of the one or more objects. The method further includes smoothing one or more of the determined filter parameters based on the classifying of the one or more objects. The method further includes applying one or more of the filters with corresponding smoothed filter parameters to one or more frames of the video.
US09582857B1 Terrain relief shading enhancing system, device, and method
A system, device, and method for minimizing terrain content in an image are disclosed. The terrain content minimization system may include a source of navigation data, a source of first surface data, and an image generator (IG). The IG may be configured to acquire navigation data; acquire first surface data; identify first surface data as a function of an elevation range; generate first pixel data; generate second pixel; and employ at least one of the first pixel data and the second pixel data. Second surface data could be comprised of a first subset of the surface data, and the third surface data could be comprised of a second subset of the surface data not included in the second subset of the first surface data. In addition, the pixel data could be representative of an image of terrain of the surface data.
US09582851B2 Using proximity sensing to adjust information provided on a mobile device
A proximity metric is obtained that indicates a proximity of a user's face relative to a mobile device. The content, or a visual characteristic of information, on a user interface of the mobile device is adjusted, based upon the proximity metric.
US09582850B2 Apparatus and method thereof
An apparatus for mode detection for a display device includes a front-end circuit, adapted to fetch an image signal according to a determined mode to generate a fetched image signal, and to adjust the determined mode according to a control signal, and a back-end circuit, connected to the front-end circuit, adapted to process the fetched image signal according to the determined mode. The back-end circuit is adapted to generate an indication signal according to an abnormal status, wherein the back-end circuit comprises a buffer adapted to temporarily store the fetched image signal, and wherein the abnormal status comprises an underflow or overflow state of the buffer. The back-end circuit further includes a determining unit, connected to the front-end circuit and the back-end circuit, adapted to generate the control signal according to the indication signal indicating the determined mode needs to adjust.
US09582844B2 Detection from two chrominance directions
The present disclosure relates generally to signal processing, including processing digital watermarking. One claim recites a detector apparatus comprising: memory for storing data representing color image data comprising red color data and green color data, in which the red color data comprises digital watermarking including a first polarity and the green color data comprises the digital watermarking including a second polarity that is inversely related to the first polarity; means for selectively weighting the red color data and the green color data so that the digital watermarking is emphasized while image content is de-emphasized when weighted red color data and weighted green color data are combined; means for detecting the digital watermarking from combined, weighted red color data and weighted green color data; and more or more processors configured for outputting data corresponding to detected digital watermarking. Of course, different combinations and claims are provided too.
US09582841B2 Location based emergency management plans
Locational tracking aids emergency management plans. Occupants of a building or campus are determined based on presence or detection of wireless devices. When an emergency occurs, the occupants may move to safety based on the current locations of their wireless devices.
US09582838B1 Targeted surveillance system with mini-screen dashboard
A method and system for a mini-screen dashboard is described with reference to healthcare workflow processes where multiple healthcare providers work together to manage their patients. The status criteria for patients is collected in one or more healthcare workflow databases accessible by the clinicians according to their various roles and functions using corresponding workflow applications. A central computer determines the number of patients that correspond with various status criteria of the patients that are already being monitored by the clinicians and the mini-screen unobtrusively displays the number patients that meet the status criteria in a series of indicator boxes that remain in the foreground of the clinicians' respective computer screens. The mini-screen dashboard is semi-transparent, becoming opaque when a box is selected and displaying the heading name of the status criteria corresponding with the selected box and also displaying the names of the patients satisfying the status criteria.
US09582837B2 Management system for gas cock opening and closing
A communication terminal receives acceptance data for gas cock opening created by a server, performs selection based on the received acceptance data, reads a two-dimensional barcode, and compares two-dimensional barcode data and target data stored in a storage device of the communication terminal; the sever sends the communication terminal a gas inspection item in which the target data is reflected; the communication terminal receives the inspection item in which the target data is reflected, checks an inspection result item created for the inspection item, and sends the checked inspection result item to the server; and the server gives permission for the gas cock opening based on the sent inspection result item, and sends a result of the permission to the communication terminal.
US09582833B2 Systems and methods for determination of individual activity
Systems and methods are discussed for providing sensor enhanced safety, recovery and activity evaluation systems. Sensors, such as accelerometers, that monitor individual activity-level related data provide data to an activity evaluation module. The activity evaluation module analyzes the received data to determine an activity level associated with the individual. The activity level determination may be employed in providing feedback to an individual.
US09582829B2 Dynamically modifying an application questionnaire
In some embodiments, a system calculates a user risk score, and determines a first subset of questions using the user risk score and type of user device. The system communicates and receives answers to the first subset of questions. The system determines a second subset of questions based on the answers to the first subset of questions. The system communicates and receives answers to the second subset of questions. The system determines whether the answers to the first subset of questions are accurate. If the verification indicates that the answer to one or more of the first subset of questions is not accurate, the system determines a third subset of questions. The system communicates and receives answers to the third subset of questions. The system determines a plurality of repayment plans based on the user risk score and the answers to the first, second, and third subset of questions.
US09582828B2 Method and apparatus for optimizing profit in predictive systems
Techniques are disclosed for methods and apparatuses for forming for determining when to perform maintenance events. The technique comprises determining a first cost of false positives and a second cost of missed true positives. A Receive Operating Characteristic (ROC) of a prediction model is determined for the occurrence of an event. A survival function and prediction horizon is generated from the prediction model for the occurrence of an event. The operational area on the ROC is determined based on the first costs and second costs. A threshold is determined from the ROC and is applied to the survival function and prediction horizon. A maintenance event is triggered based on the threshold.
US09582824B2 Enhancing touch and feel on the Internet
A system for enabling touch and feel over the internet provides a three-dimensional representation of a good being sold, that three-dimensional representation being viewable from a number of different directions. In one embodiment, the good being sold is in a package and the package is displayed from the number of different directions. Another embodiment has the good being a book, and the inside and outside covers of the book are displayed and specified pages of the book can be displayed. The user can read from either the label or the covers just like as if the were actually handling the good.
US09582823B2 Metadata refinement using behavioral patterns
A system and method of metadata refinement using behavioral patterns is disclosed. In some embodiments, user behavioral data for results of a search query is received. The results can include an untagged item and a plurality of tagged items. A determination can then be made that the tagged items have been assigned a first type of metadata not assigned to the untagged item. The untagged item can then be identified as a candidate to be tagged with the first type of metadata assigned to the tagged items based on the user behavioral data. In some embodiments, the user behavioral data comprises clickstream data indicating that a user selected the untagged item and the tagged items during a single search event.
US09582821B2 System and method for providing an intelligent configuration rationalization solution
A system and method are disclosed for rationalizing configurations associated with one or more products. The system includes a database associated with one or more customers. The system further includes an order analysis system coupled with the database. The order analysis system is capable of rationalizing the differences between configurations of various combinations of options that are stored in the database.
US09582820B2 Order management system with an orchestration plan
An order management system is provided. The order management system receives one or more order components. The order management system maps each order line of one or more order lines to a fulfillment pattern. The order management system creates a fulfillment flow by combining one or more fulfillment patterns. The order management system generates an orchestration plan by applying one or more dependencies of the fulfillment flow to the one or more order components. The one or more dependencies of the fulfillment flow are translated into one or more order line dependencies between the one or more order lines of the one or more order components. Each order line dependency is at a completion of a fulfillment function of the order line.
US09582818B2 Interactive graphical interface including a streaming media component and method and system of producing the same
A multiphase interactive advertisement includes a first phase having a first graphical interface and a second phase having a second graphical interface including at least a streaming media component space. In an exemplary embodiment, the second phase has a dimension that is greater than a dimension of the first phase. The multiphase interactive advertisement further includes a streaming media component incorporated into the streaming media component space of the second phase. The multiphase interactive advertisement, and specifically, the streaming media component, is generated using a software player engine that includes a core set of player variables and controls.
US09582808B2 Customizing a presentation based on preferences of an audience
A data processing system and computer program product for customizing a presentation. A set of individual preferences for each individual of a plurality of individuals to form a set of audience preferences is determined, wherein each preference in the set of individual preferences is associated with one of a plurality of versions of the presentation. A set of versions of the presentation from the plurality of versions of the presentation is selected based on the set of audience preferences. The set of versions of the presentation selected from the plurality of versions of the presentation is presented.
US09582803B2 Product specific learning interface presenting integrated multimedia content on product usage and service
A computer implemented method that includes providing a product specific learning interface comprising integrated multimedia content on product usage and service to a user. The multimedia content demonstrates a feature of a product stored in a database (112) associated with an application server (104). The method includes processing a first input that includes a selection of the product from a plurality of products, displaying a product specific learning interface including multimedia content specific to the product selected by the input, processing a second input that includes a keyword corresponding to a feature of the product, displaying a sub set of the multimedia content corresponding the keyword and the product, processing a selection of at least one multimedia file from the sub set of the multimedia content, and playing the multimedia file. The keyword is filtered only from a set of multimedia content corresponding to selected product.
US09582802B2 Identity theft and fraud protection system and method
A system and method protects users against theft of personally identifiable information during both online and offline purchase transactions, registration transactions and identity authentication transactions. The system initially obtains a user's personally identifiable information as storable computer data, establishes an anonymous email address on behalf of the subscribing user, provides the anonymous email address to an email recipient when the subscribing user sends an email to the recipient, receives email communications from the recipient at the anonymous email address, stores the routing information from the email communications, scrubs the email communications for electronic viruses, forwards the email communications received from the recipient at the anonymous email address to the subscribing user, and forwards email communications to the recipient that are sent from the subscribing user to the anonymous email address by matching the stored routing information without ever revealing the subscribing user's real email address to the recipient.
US09582800B2 System and method for permitting a user to submit a payment electronically
A system and method for permitting a user to submit a payment electronically, which includes a network and an electronic device in communication. The electronic device is operated by the user to submit an electronic payment request. A first server in communication with the network receives the request and in response communicates an encryption key and process to the electronic device. The electronic device encrypts the financial information with the encryption key and process and communicates encrypted financial information to the first server. A second server is in communication with the first server at least some of the time via an Internet connection. If there is Internet connectivity, the first server communicates the encrypted financial information to the second server. If there is no Internet connectivity and the payment amount is less than a predefined amount, the first server communicates to the electronic device that the payment has been accepted.
US09582789B2 Payments in communication systems
Users of a communication system can initiate electronic payments during a communication session hosted by the communication system or via a social network identity page hosted by the communication system. The communication system detects a payment signal from a user of the communication system and the collects payment information details either by displaying a payment object interface in a communication application of the user or receiving payment information input directly from the user's communication device. The payment information includes sender and recipient payment account identifiers that are communicated to a payment processing system for processing and delivery of the designated payment amount to the recipient.
US09582786B2 News feed ranking model based on social information of viewer
Machine learning models are used for ranking news feed stories presented to users of a social networking system. The social networking system divides its users into different sets, for example, based on demographic characteristics of the users and generates one model for each set of users. The models are periodically retrained. The news feed ranking model may rank news feeds for a user based on information describing other users connected to the user in the social networking system. Information describing other users connected to the user includes interactions of the other users with objects associated with news feed stories. These interactions include commenting on a news feed story, liking a news feed story, or retrieving information, for example, images, videos associated with a news feed story.
US09582781B1 Real-time adaptive operations performance management system using event clusters and trained models
Embodiments are directed to managing operations. If Operations events are provided, event clusters may be associated with one or more Operations events, such that the Operations events may be associated with the event clusters based on characteristics of the Operations events. Metrics including resolution metrics, root cause analysis, notes, and other remediation information may be associated with the event clusters. Then a modeling engine may be employed to train models based on the Operations events, the event clusters, and the resolution metrics, such that the trained model may be trained to correlate and predict the resolution metrics from real-time Operations events. If real-time Operations events may be provided, the trained models may be employed to predict the resolution metrics that are associated with the real-time Operations events. If model performance degrades beyond accuracy requirements, new observations may be added to the training set and the model re-trained.
US09582779B1 System and method for enhanced customer experience workflow
A system for enhanced customer experience workflows, comprising a workflow integration server configured to receive at least a plurality of customer interaction information, and configured to produce at least a plurality of interaction workflow events based at least in part on at least a portion of the customer interaction information, and configured to transmit at least a portion of the interaction workflow events via a network; wherein at least a portion of the customer interaction information is received from a customer interaction system, and at least a portion of the interaction workflow events are produced automatically, and at least a portion of the customer interaction information is received while an interaction is in progress, and at least a portion of the workflow events are produced and transmitted while the interaction is in progress.
US09582777B2 Point-in-time requirement tracking methods and apparatus
A system, methods, and apparatus for point-in-time requirement tracking are disclosed. In an example embodiment, requirements for a project are stored in a database communicatively coupled to a server, the requirements including at least a first requirement stored in a first record and a second requirement stored in a second record. The server receives changes to the first requirement and the second requirement during the edit session and stores the changed first requirement to a third record and the changed second requirements to a fourth record. The server then provides the first and third records to a client device so that the client device can concurrently display the first requirement as specified in the first record and the first requirement as specified in the third record.
US09582775B2 Techniques for iterative reduction of uncertainty in water distribution networks
In one aspect, a method for reducing uncertainty in a hydraulic model of a water distribution network due to uncertain parameters and faults in the water distribution network is provided which includes the steps of: (i) calculating an optimized placement of sensors throughout a given uncertain section of the water distribution network; (ii) collecting data from the sensors; (iii) partitioning the given uncertain section of the water distribution network into observable and unobservable sub-sections based on the hydraulic model and a) a position, b) a number, and/or c) a type of the sensors that are available; (iv) correcting uncertain parameters and identifying faults for each of the observable sub-sections; (v) calculating a global uncertainty value for each of the unobservable sub-sections; and (vi) repeating the steps (i)-(vi) iteratively, at each iteration selecting an uncertain sub-section of the water distribution network, until no uncertain sub-sections of the water distribution network remain.
US09582774B2 Techniques for estimating, measuring, monitoring or forecasting information quality, technical uncertainty, engineering effort and/or productivity
Embodiments disclosed herein include systems, methods, and apparatuses for managing requirements for an existing or proposed objective system. An information system in accordance with one embodiment includes one or more processors and storage coupled to the one or more processors. The storage is configured to represent requirements data, including one or more requirements for the objective system, and a particular state of the requirements data for the objective system, including subsystems of the objective system. The particular state of the requirements data includes a particular discrete information quality level for each requirement. The processors are programmed to calculate a requirements information entropy metric, HR, for the particular state, and to calculate an additional information increment ΔI. The additional information increment ΔI represents an amount of additional information necessary to transform the requirements data from the particular state of the requirements data to a desired state of the requirements data.
US09582773B2 Systems and methods for queue management
A queue management scheme whereby a system-wide status is considered together with a status of each and every specific or particular queue and associated device within the system, in order to efficiently and effectively balance the needs and desires of customers with the needs and desires of an entity that provides services to the customers.
US09582766B2 Clustering query refinements by inferred user intent
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for clustering query refinements. One method includes building a representation of a graph for a first query, wherein the graph has a node for the first query, a node for each of a plurality of refinements for the first query, and a node for each document in the document sets of the refinements, and wherein the graph has edges from the first query node to each of the refinement nodes, edges from the first query to each document in the respective document set of the first query, edges from each refinement to each document in the respective document set of the refinement, and edges from each refinement to each co-occurring query of the refinement. The method further includes clustering the refinements into refinement clusters by partitioning the refinement nodes in the graph into proper subsets.
US09582765B2 Apparatus, method, and non-transitory computer readable storage medium thereof for recommending an electricity consumption behavior
An apparatus, a method, and a non-transitory computer readable storage medium thereof for recommending an electricity consumption behavior are provided. The apparatus is stored with an appliance efficiency value and an electricity-consuming parameter value for each of a plurality of users. The apparatus generates a plurality of first temporary values by multiplying each of the appliance efficiency values with each of the electricity-consuming parameters, generates a power saving matrix by subtracting each of the electricity-consuming parameters from each of the electricity-consuming parameters individually, generates a changing willingness matrix by the second temporary values, calculates a transform probability matrix by the power saving matrix and the changing willingness matrix, calculates an eigenvalue and an eigenvector of the transform probability matrix, and recommends an electricity consumption behavior according to the eigenvalue and the eigenvector.
US09582764B2 Real-time risk prediction during drilling operations
Systems and methods for real-time risk prediction during drilling operations using real-time data from an uncompleted well, a trained coarse layer model and a trained fine layer model for each respective layer of the trained coarse layer model. In addition to using the systems and methods for real-time risk prediction, the systems and methods may also be used to monitor other uncompleted wells and to perform a statistical analysis of the duration of each risk level for the monitored well.
US09582762B1 Devices, systems, and methods for learning and using artificially intelligent interactive memories
Aspects of the disclosure generally relate to computing devices and may be generally directed to devices, systems, methods, and/or applications for learning conversations among two or more conversation participants, storing this knowledge in a knowledgebase (i.e. neural network, graph, sequences, etc.), and enabling a user to simulate a conversation with an artificially intelligent conversation participant.
US09582758B2 Data classification method, storage medium, and classification device
A data classification method which classifies a plurality of data into a plurality of classification items based on a feature quantity included in the data, the method includes calculating, by a processor, an appearance probabilities in which training data including the feature quantity appears in the classification items in a distribution of the data, generating, by the processor, a rule having the feature quantity and a weighting of the feature quantity based on a plurality of the training data having the feature quantity based on the appearance probabilities; and classifying, by the processor, the plurality of data according to the rule.
US09582756B2 Data pattern analysis using optimized deterministic finite automation
Techniques for data pattern analysis using deterministic finite automaton are described herein. In one embodiment, a number of transitions from a current node to one or more subsequent nodes representing one or more sequences of data patterns is determined, where each of the current node and subsequent nodes is associated with a deterministic finite automaton (DFA) state. A data structure is dynamically allocated for each of the subsequent nodes for storing information associated with each of the subsequent nodes, where data structures for the subsequent nodes are allocated in an array maintained by a data structure corresponding to the current node if the number of transitions is greater than a predetermined threshold. Other methods and apparatuses are also described.
US09582751B2 Method for producing an identification and authentication label and associated device
Method for producing a label having at least one identifier and at least one authenticator printed on a printable medium. A unique identifier is generated by a centralized system or a printing device, and the unique identifier is printed on the printable medium incorporating the authenticator. The unique identifier is generated without relation to a product. The method is implemented with a system including one or more printing devices, one or more recording devices and one or more activation devices communicating with the centralized system.
US09582748B2 Base charging station for monitoring device
A wearable device system includes one or more sensors coupled to a wearable device structure that includes first and second outer surfaces, an interior, a first end and a second end. The wearable device structure has a unique user ID. The sensors acquiring user information selected from of at least one of, a user's activities, behaviors, habit information, health parameters, medical monitoring and user monitoring. The wearable device has a power source coupled to a charging device of the wearable device. A base station is configured to be coupled to the wearable device and has a corresponding charging device for charging or recharging the power source of the wearable device.
US09582747B2 Radio communication tag and method for manufacturing the same
An antenna conductor and a reinforcing layer are provided on an upper surface and a lower surface, respectively, of a flexible base film. An RFIC element is mounted on the upper surface of the base film. Two I/O terminals provided on the RFIC element are each connected to meander patterns of the antenna conductor. In a plan view, the reinforcing layer has a circular contour, and the RFIC element is surrounded by the contour of the reinforcing layer. The two I/O terminals provided on the RFIC element are exposed on the upper surface of the base film. Breakage of the connected portion between the RFIC element and the antenna conductor is prevented, and any breakage that has occurred is easily identified.
US09582746B2 RFID switch tag
Various embodiments of RFID switch devices are disclosed herein. Such RFID switch devices advantageously enable manual activation/deactivation of the RF module. The RFID switch device may include a RF module with an integrated circuit adapted to ohmically connect to a substantially coplanar conductive trace pattern, as well as booster antenna for extending the operational range of the RFID device. The operational range of the RFID switch device may be extended when a region of the booster antenna overlaps a region of the conductive trace pattern on the RF module via inductive or capacitive coupling. The RFID switch device may further include a visual indicator displaying a first color if the RFID switch device is in an active state and/or a second color if the RFID switch device is in an inactive state.
US09582745B2 Wireless tag, wireless communication circuit, and degradation detection method
A wireless communication circuit performs a wireless communication with a transmitter-receiver via an antenna. Power to the wireless communication circuit is turned on by electromagnetic waves transmitted from the transmitter-receiver. In the wireless communication circuit, a circuit includes a capacitor for storing electric charge at the time of the power being on, and is configured to pass discharging current based on the electric charge stored in the capacitor along a current path including the antenna at the time of the power being off, a monitoring circuit is configured to be operated by electric power based on the electric charge at the time of the power being off and to determine the presence or absence of degradation on the basis of potential of a node on the current path, and a storage circuit is configured to store the result of a determination by the monitoring circuit.
US09582744B2 Image processing device and computer-readable medium using photographic and non-photographic correspondence data
An image processing device includes a processor and a memory. The image processing device acquires target image data including each pixel value of a plurality of pixels. The image processing device extracts a plurality of photographic pixels and a plurality of non-photographic pixels from the plurality of the pixels in the target image. The image processing device generates photographic correspondence data. The image processing device generates non-photographic correspondence data. The image processing device converts an original pixel value of a pixel of the plurality of photographic pixels into a respective converted pixel value by using the photographic correspondence data. The image processing device converts an original pixel value of a pixel of the plurality of non-photographic pixels into a respective converted pixel value by using the non-photographic correspondence data.
US09582741B2 System diagnostic tools for printmaking devices
There is provided a method and system evaluating performance of a printing device. In accordance with the method a diagnostic routine is executed on the printing device. The diagnostic routine evaluates performance of the printing device using a set of instructions stored on a computer-readable medium. The set of instructions are configured to identify a fault in the performance of the printing device based on an artifact identifiable on at least one diagnostic output. The diagnostic output is generated by the printing device with the identifiable artifact in accordance with the diagnostic routine for identifying the artifact and associated fault of the printing device.
US09582733B2 Image processing device, image processing method, and image processing program
The invention provides an image processing device, an image processing method, and an image processing program capable of maintaining estimation accuracy even when an input image of a processing target includes a plurality of shape elements. The image processing device includes: a recognizing unit that recognizes one or more shape elements which are included in the input image from a feature amount included in the input image; a selecting unit that selects a desired shape element out of the recognized one or more shape elements; and an estimating unit that estimates a target shape element from information of a region corresponding to the selected shape element.
US09582732B2 Method and apparatus for tomography imaging
A method and apparatus for determining the position of a feature of an object under test in a tomography image are disclosed. The method includes: determining characterizing points, in an additional image, of a feature of the object of interest; determining position data relating to the feature in the additional image based on the detected characterizing points; and identifying a feature of the object of interest in the tomography image. The determined position data in the additional image is used to guide the identification. A computer readable medium which may be non-transitory and upon execution by a processor configures a computer to perform the method is also disclosed.
US09582729B2 Image-based detection of the boundary between a first part and a second part
A detection apparatus for detecting the position of a boundary between a first part and a second part of a subject, includes a pixel extraction unit for extracting a plurality of candidate pixels acting as candidates for a pixel situated on the boundary on the basis of image data of a first section crossing the first part and the second part, and a pixel specification unit for specifying the pixel situated on the boundary from within the plurality of candidate pixels by using an identifier which has been prepared by using an algorithm of machine learning.
US09582721B2 Method and apparatus for determining movement
In order to determine an orientation of a person in various situations, a movement determining method executed by an information processing apparatus is provided. In the movement determining method, first, the information processing apparatus acquires a first distance between a head of the person and a reference position and a second distance between a neck of the person and the reference position. Then, the information processing apparatus determines the orientation of the person on the basis of a comparison result between the first distance and the second distance.
US09582720B2 Image-based indoor position determination
In one implementation, a method may comprise: determining a topological representation of an indoor portion of a building based, at least in part, on positions or number of lines in an image of the indoor portion of the building; and comparing the topological representation to one or more stored topological representations, for example in a digital map of the building, to determine a potential position of the indoor portion of the building.
US09582717B2 Systems and methods for tracking a model
An image such as a depth image of a scene may be received, observed, or captured by a device. A grid of voxels may then be generated based on the depth image such that the depth image may be downsampled. A model may be adjusted based on a location or position of one or more extremities estimated or determined for a human target in the grid of voxels. The model may also be adjusted based on a default location or position of the model in a default pose such as a T-pose, a DaVinci pose, and/or a natural pose.
US09582713B2 Apparatus and method for recognizing media and financial device
The present disclosure relates to an apparatus and a method for recognizing media and a financial device. The apparatus for recognizing media according to an exemplary embodiment of the present disclosure comprises: an image sensor; a skew detector configured to detect skew of the media from media image acquired by the image sensor; a noise detector configured to detect a linear component in a region of interest which include character of the media image and a noise included in the media image based on direction information of the detected linear component and the skew of the media; and a controller configured to remove the detected noise from the region of interest and recognize the character of the region of interest from which the noise is removed.
US09582712B2 Digital image processing apparatus and system and control method thereof
A digital image processing apparatus, system and a control method thereof are disclosed. The digital image processing apparatus includes an image sensor unit to sense hand-drawn information, a display unit to display complete information including the sensed information as partial information, a communication unit to transmit selected complete information among the complete information to a server and a controller. The controller controls the display unit so as to display the complete information by searching for the complete information, and also controls the display unit so as to display the selected complete information when one of the retrieved complete information is selected. The controller senses a hand-drawn marker and, when the sensed marker is a sharing attribute marker, links the sharing attribute marker with the selected complete information and controls the communication unit so as to transmit the selected complete information along with the sharing attribute marker.
US09582708B2 Display device and method of controlling the same
A display device which accurately detects and corrects only a facial region contained in an image and thereby prevents an error in which a background or neighboring object having a similar color to a skin color is corrected together with the facial region, and a method of controlling the same are provided. The display device includes an image processor configured to detect a face candidate region from an input image, based on information associated with at least one face color region, to detect a face region by applying a face detection algorithm to the detected face candidate region and to perform skin color correction on the detected face region, and a display configured to display the corrected input content.
US09582703B2 Code reading device and code reading program
A code reading device is equipped with a region extracting unit 2, which divides a photographed image of a bar code into a plurality of horizontal areas, and extracts readable regions from the horizontal areas respectively, and a region coupling unit 4, which couples the extracted regions to restore the whole bar code. Even if an unreadable portion occurs in a part of the bar code, a plurality of readable regions are extracted as parts of the barcode and those regions are coupled to restore a bar code the entirety of which can be read. Consequently, it is possible to accurately read a bar code having dirt or containment of illumination light partially.
US09582701B2 Information input/output method using dot pattern
A dot pattern including a block defined as a rectangular area of a square or a rectangle of a medium face, such as printed matter. A straight line in a vertical direction and a horizontal direction configuring a frame of the block each are defined as a standard grid line. Virtual reference grid points are provided at predetermined intervals on the reference grid line. Reference grid point dots are placed on respective virtual reference grid points. Straight lines that connect the virtual reference grid points to each other and are parallel to the reference grid lines are defined as grid lines. A point of intersection of grid lines is defined as a virtual grid point. A dot pattern is generated by arranging one or a plurality of information dots, each of which has a distance and a direction around the virtual grid point.
关于PatentHub
关于我们 加入我们 联系我们 帮助中心
PatentHub产品
专利百科 商标查询 专利交易 大学排行榜 行业专题库
API接口 排行榜 专利资讯 最新中国发明专利 最新美国发明专利
PatentHub联系方式
QQ：3307693423 QQ：3236401158