Document Document Title
US09509079B2 Assembling structure of electronic component, electrical junction box, and electronic component
An assembling structure of an electronic component includes an electronic component including a component main body having a plurality of lead terminals protruding from side surfaces of the component main body, and a housing member in which the electronic component is inserted and accommodated and which holds a plurality of terminal fittings connected to the lead terminals. Each lead terminal includes a base end protruding from at least one side surface of the component main body and a connecting portion which is connected to the base end and which droops along the side surface, and the plurality of lead terminals are provided to be protruded from at least one side surface of the component main body in the width direction of the side surface. The side surface of the component main body is provided with an insulating member.
US09509077B2 Connector with locking lance and terminal fitting with deflection regulating portion for regulating deflection of the locking lance
A connector includes a pressure receiving surface (16) on a front of a locking lance (12) and a lock (36) on a terminal (30) is configured to lock the pressure receiving surface (16). An inclined surface (15) on a facing surface (13) of the locking lance (12) faces the terminal (30) and is inclined to be more separated from the terminal fitting (30) toward the back. A guiding surface (18) on the pressure receiving surface (16) is configured to deflect the locking lance (12) toward the terminal (30) when the lock (36) presses the pressure receiving surface (16). A contact surface (21) behind the pressure receiving surface (16) on the locking lance (12) faces the terminal (30). A deflection regulating portion (38) behind the lock (36) on the terminal (30) faces the contact surface (21) while being spaced apart parallel to a resilient deflecting direction of the locking lance (12).
US09509076B2 Connector with front backlash preventing portions and rear backlash preventing portion that are offset circumferentially with respect to the front backlash preventing portions
It is aimed to suppress backlash between a receptacle and a connector main body without reducing the operability of a connector connecting operation. Backlash preventing portions (70) project on an outer peripheral surface of a connector main body (10) to be fitted into a mating receptacle (92). The backlash preventing portions (70) include circumferentially spaced front backlash preventing portions (71) on a front part of the connector main body (10) in a fitting direction into the receptacle (92) and circumferentially spaced rear backlash preventing portions (72) on a rear part of the connector main body (10) in the fitting direction into the receptacle (92). The respective front and rear backlash preventing portions (71, 72) are separated in a front-back direction without being connected to each other and are displaced from each other in the circumferential direction.
US09509068B2 Creepage design terminal strip
A terminal strip and a method of improving a creepage dielectric strength of the same includes a base plate, a barrier, each constructed from an insulating material, and a plurality of terminals constructed from a conducting material. The terminals are connected to the base plate and spaced along a surface thereof. The barrier is disposed between adjacent terminals and configured such that the creepage dielectric strength of the insulating material between adjacent terminals is equal to or greater than a bulk dielectric strength of the insulating material between adjacent terminals.
US09509067B2 Coaxial electrical connector
The reliability of electrical connectivity can be improved by a simple configuration while reducing the number of processes of connection of a coaxial cable. An outer conductor and a connector main-body part are configured to be electrically connected by pushing cable rupturing parts, which are projecting toward an inner side from a radial-direction outer side of a coaxial cable placed on a connector main-body part, against the radial-direction inner side toward the coaxial cable and rupturing an outer-periphery covering material of the coaxial cable. As a result, when electrical connection with respect to the outer conductor of the coaxial cable is to be established, a connecting operation is configured to be carried out without carrying out terminal treatment processing such as a strip process of ripping off a dielectric body or an insulator surrounding a central conductor and the outer conductor so that the connecting process with respect to the outer conductor of the coaxial cable is significantly simplified.
US09509063B2 Wireless communication arrangement
A wireless communication arrangement (100a) with multiple antennas for a vehicle includes a first printed circuit board (110) having a modem unit (111) and a radiating antenna element (113); a second printed circuit board (120) having a radiating antenna element (123); an interface unit (112) disposed on the first printed circuit board (110) and/or the second printed circuit board (120); and a main bendable portion (130) bendably and electrically connecting the first printed circuit board (110) and the second primed circuit board (120) to each other. The first printed circuit board (110) and the second printed circuit board (120) are mountable on an outer surface of a vehicle in non-horizontal orientation with respect to said outer surface, with the first printed circuit board (110) and the second printed circuit board (120) forming a convex like shape in a horizontal direction via bending of the main bendable portion (130).
US09509056B2 Travelling wave antenna feed structures
Techniques for implementing series-fed antenna arrays with a variable dielectric waveguide. In one implementation, coupling elements with optional controlled phase shifters are placed adjacent each radiating element of the array. To avoid frequency sensitivity of the resulting array, one or more waveguides have a variable propagation constant. The variable waveguide may use certain materials exhibiting this phenomenon, or may have configurable gaps between layers. Plated-through holes and pins can control the gaps; and/or a 2-D circular or a rectangular travelling wave array of scattering elements can be used as well.
US09509055B2 Antenna
An antenna (1) including a dielectric substrate (10), an antenna element (11), a feed line (12), and a ground plate (13) is configured such that the feed line (12) and the ground plate (13) which face each other via the dielectric substrate (10) constitute a microstrip line which functions as a BRF.
US09509053B2 Electronic device
An electronic device includes a conducting element, a supporting element, and a multiband antenna is disclosed. The conducting element is connected to the ground of the electronic device by a high impedance connection. The supporting element has a supporting surface, and the supporting surface and the conducting element are perpendicular. The multiband antenna is disposed at the supporting surface and includes a radiating element, and the radiating element and the conducting element form a coupling capacitor.
US09509052B1 Animal body antenna
An antenna comprising: a transceiver; a current probe operatively coupled to the transceiver, wherein the current probe comprises an outer conductive non-magnetic housing, a toroidal magnetic core having a central aperture, wherein the core is insulated from the housing, and a primary winding wound about the core; and an animal body, a portion of which is positioned within the aperture such that incoming and outgoing electromagnetic signals are transferred between the portion of the animal body and the current probe by magnetic induction.
US09509050B2 Portable device with circuit board mounted radiator
A portable electronic device is provided, which includes a circuit board, and a radiator arranged along an edge of the circuit board on one side of the circuit board.
US09509049B2 Magnetic antenna, antenna device, and electronic apparatus
A magnetic antenna includes a plurality of magnetic layers, coil conductor patterns wound around the magnetic layers about a winding axis in a direction perpendicular or substantially perpendicular to a stacking direction of the magnetic layers, a dielectric layer stacked on an outer layer of the magnetic layers, and a conducting pattern provided with the dielectric layer and coupled with a ground. The conducting pattern and the coil conductor patterns disposed along the outer layer are arranged such that at least a portion of the coil conductor patterns faces the conducting pattern and defines a stray capacitor therewith.
US09509046B2 Power amplifier adjustment for transmit beamforming in multi-antenna wireless systems
One or more beamsteering matrices are applied to one or more signals to be transmitted via multiple antennas. After the one or more beamsteering matrices are applied to the one or more signals, the plurality of signals is provided to a plurality of power amplifiers coupled to the multiple antennas. Signal energies are determined for the plurality of signals provided to the plurality of power amplifiers, and relative signal energies are determined based on the determined signal energies. Output power levels of the plurality of power amplifiers are adjusted based on the determined relative signal energies.
US09509044B2 Headset, circuit structure of mobile apparatus, and mobile apparatus
A headset, a circuit structure of a mobile apparatus, and a mobile apparatus are provided. The headset includes at least one earphone, a microphone, an audio plug, and a headset cable. The audio plug includes a connector having a plurality of contacts. The microphone and the at least one earphone is coupled to the corresponding contacts of the audio plug through the headset cable. The headset cable includes a ground line, a microphone line, at least one audio line, and an antenna for receiving a television broadcasting signal. The antenna is coupled to one of the contacts coupled to the ground line, the microphone line, and the at least one audio line. The one of the contacts to which the antenna is coupled further serves as a radio frequency contact to provide the television broadcasting signal and an audio broadcasting signal.
US09509040B2 Antenna assembly and mobile terminal using same
An antenna assembly is disclosed. The antenna assembly includes a radiation body, an antenna feed portion, a RF feed portion, a first branch having one end electrically connecting to the antenna feed portion, and another end electrically connects to a first feed point of the radiation body, the first feed point dividing the radiation body into a first radiation portion and a second radiation portion. The antenna assembly further includes a second branch electrically connecting to a second feed point of the second radiation portion, an impedance matching circuit coupled between the antenna feed portion and the RF feed portion. The impedance matching circuit receives the low frequency signals and matches the impedance, then feeds to the antenna feed portion.
US09509039B2 Portable terminal device and wireless communication method
A portable terminal includes a metal frame on which an LCD is mounted, the metal frame being grounded; and an antenna element that includes a feed point between a first end and a second end and is formed from the same piece of sheet metal used for the metal frame, the first end of the antenna element being connected to the metal frame.
US09509038B2 Vehicle window glass and antenna
Vehicle window glass include a glass plate, a dielectric, a conductive film, placed between the glass plate and the dielectric, and an antenna including a pair of electrodes. The conductive film, includes a pair of facing parts that faces the electrodes across the dielectric, a main slot, and a pair of sub slots. The main slot has, at one end, an open end open at an outer edge of the conductive film, and is formed between the facing parts. Each sub slot has, at one end, an open end open at the outer edge of the conductive film. One of the sub slots connects, at the other end, to the main slot so as to surround one of the facing parts. The other of the sub slots connects, at the other end, to the main slot so as to surround the other of the facing parts.
US09509037B2 Antenna lifting apparatus and related techniques
A method of raising an antenna includes decoupling an antenna pedestal from an antenna pedestal mounting structure. The method additionally includes separating the antenna pedestal from the antenna pedestal mounting structure using one or more lifting rods. The method further includes inserting one or more antenna lifting fixtures between a first surface of the antenna pedestal and a first surface of the antenna pedestal mounting structure. The method also includes operating the one or more antenna lifting fixtures to move the first surface of the antenna pedestal away from the first surface of the antenna pedestal mounting structure. A corresponding system and antenna lifting fixture is also provided.
US09509035B2 Indoor antenna
An indoor antenna having a cover body with a panel cover, a coax cable panel, and a coax cable. The panel cover has an edge and at least one first coax cable channel formed in a side of the coax cable panel and is formed through the edge of the panel cover. The coax cable panel is mounted in the cover body. The coax cable is electrically connected with the coax cable panel, inserted through the panel cover, mounted in one of the at least one first coax cable channel, and extending out of the edge of the panel cover. Therefore, when the indoor antenna is assembled, the coax cable can be arranged firmly without over-bending, such that the indoor antenna sustains good performance and be assembled easily.
US09509031B2 Coaxial filter with elongated resonator
A microwave filter has a housing defining an inner cavity. A first resonator is positioned in a first portion of the inner cavity. A second resonator is positioned in a second portion of the inner cavity. A third resonator is positioned in a third portion of the inner cavity. The first resonator and the third resonator are cross-coupled via an iris. The second resonator is elongated and is coupled to the first resonator and the third resonator. The resulting microwave filter has a frequency response having a transmission zero in the lower stopband. A high-pass filter is realized without the use of a cross-coupling probe.
US09509029B2 Mediator-type photocell system
A mediator-type photocell system is provided. The mediator-type photocell system includes a galvanic cell having a galvanic cell anode and a galvanic cell cathode; and a light capturing portion, including a light capturing cathode corresponding to the galvanic cell anode; and a light capturing anode electrically connected to the light capturing cathode via a conductive element, and corresponding to the galvanic cell cathode, wherein the galvanic cell cathode and the light capturing anode have a first mediator therebetween, the galvanic cell anode and the light capturing cathode have a second mediator therebetween, an oxide is generated to be provided to the galvanic cell cathode when the first mediator is illuminated, and a reducing substance is generated to be provided to the galvanic cell anode when the second mediator is illuminated.
US09509027B2 Metal-air battery having folded structure and method of manufacturing the same
A metal-air battery including: a negative electrode metal layer; a negative electrode electrolyte layer disposed on the negative electrode metal layer; a positive electrode layer disposed on the negative electrode electrolyte layer, the positive electrode layer comprising a positive electrode material which is capable of using oxygen as an active material; and a gas diffusion layer disposed on the positive electrode layer, wherein the negative electrode electrolyte layer is between the negative electrode metal layer and the positive electrode layer; wherein the negative electrode metal layer, the negative electrode electrolyte layer, and the positive electrode layer are disposed on the gas diffusion layer so that the positive electrode layer contacts a lower surface and an opposite upper surface of the gas diffusion layer, and wherein one side surface of the gas diffusion layer is exposed to an outside.
US09509025B2 Recycling method and treatment device for battery pack
A method of recycling a battery pack (10) that includes an assembled battery composed of a plurality of electric cells that are connected in series to one another includes a heating process of heating the battery pack (10) by supplying a vapor supplied from a vapor boiler (14) into a heat treatment bath (12) for heating the battery pack (10) to replace a space in the heat treatment bath (12) with the vapor, and a condensation process of condensing thermolysis products, which are discharged from the battery pack (10) through the heating process, by a condenser (18).
US09509018B2 Expanded battery cooling fin
A battery assembly includes a plurality of battery cells and a plurality of fins arranged in an array. Each of the cells has a side portion disposed against the fins. Each fin defines a serpentine fluid channel having an inlet and an outlet, and a plurality of parallel sections extending across the cells such that lengths of the sections increase from the inlet to the outlet. The length of at least one of the sections near the outlet is greater than the width of the cells and the length of at least one of the sections near the inlet is less than the width of the cells.
US09509013B2 Non-aqueous electrolyte secondary battery
According to one embodiment, there is provided a non-aqueous electrolyte secondary battery including a positive electrode including a positive electrode active material layer, a negative electrode including a negative electrode active material layer, and a non-aqueous electrolyte. At least one of the positive electrode active material layer and the negative electrode active material layer contains carbon dioxide and releases the carbon dioxide in the range of 0.1 ml to 10 ml per 1 g when heated at 350° C. for 1 minute.
US09509007B2 Method of transferring catalyst layer and jig used therefor
A transferring method for transferring a catalyst layer to a desired position on an electrolyte film includes the following processes. A multi-layer body is formed by stacking base materials and an electrolyte film on one another such that catalyst layers formed on the base materials are brought into contact with the electrolyte film. The multi-layer body is pressed from a stacking direction. The multi-layer body is heated to a first temperature. The heating is stopped after a predetermined time passes from when pressing is started. The pressing is stopped when the temperature of the catalyst layers becomes a second temperature or lower, which is a temperature lower than the first temperature, after the heating is stopped.
US09509004B2 Fuel cell system and control method of fuel cell system
Fuel cell system mounting fuel cell vehicle including: fuel cells having platinum-containing catalyst as electrode catalyst; cell voltage meter configured to measure cell voltage of fuel cells; and controller controlling fuel cell system, wherein (a) cell voltage meter obtains first cell voltage in predefined idling state of fuel cells, (b) in response to changing operation state of fuel cell vehicle from driving state to stop state, controller changes operation state of fuel cells to idling state, and cell voltage meter obtains second cell voltage of fuel cells in idling state, (c) controller uses difference between first and second cell voltages to obtain recovery process voltage for recovering catalyst of fuel cells and recovery process time duration wherein cell voltage of fuel cells is kept at recovery process voltage, and (d) controller reduces voltage of fuel cells to recovery process voltage for recovery process time duration, preforming recovery process of catalyst.
US09509001B2 Fuel cell system and control method for same
A fuel cell system, including: a fuel cell having at least one combination of an electrolyte membrane and a cathode-side catalyst layer and an anode-side catalyst layer that have a plurality of pores; a control unit that operates the fuel cell such that an output current determined in accordance with an external load is output from the fuel cell; and an output current acquisition unit that acquires an output current of the fuel cell; wherein, when the control unit determines that an anode in-flowing water amount, which flows to the anode-side catalyst layer when the fuel cell continues power generation at a first output current acquired at a prescribed timing, exceeds a prescribed anode-side allowable water amount, the control unit performs current limitation control to operate the fuel cell at a second output current that is higher than the first output current, regardless of a requirement of the external load.
US09509000B2 Fan and PCB mounting in fuel cell stack assemblies
A fuel cell stack assembly (30) comprises a fuel cell stack (31); an air flow plenum chamber (33) disposed on a face (4) of the stack (31) for delivering air to or receiving air from flow channels in the fuel cell stack (31), at least a part of the plenum chamber wall being defined by a printed circuit board, the printed circuit board having at least one aperture (37) therein; and a fan (36) mounted to the board adjacent the aperture (37) and configured to force air through the aperture into or out of the plenum chamber. The assembly provides integration of circuit boards essential or supportive to operation of the fuel cell assembly with the air flow plenum for forced ventilation of the fuel cells in the stack.
US09508994B2 Current collector, electrode structure, nonaqueous electrolyte battery and electrical storage device, and method for producing current collector
A current collector, an electrode structure, a non-aqueous electrolyte battery, and an electrical storage device capable of providing superior shut down function are provided. According to the present invention, a current collector having a resin layer on at least one side of a conductive substrate, wherein: the resin layer has a thermoplastic resin dispersed in a thermosetting resin base material, the thermoplastic resin encapsuling a conductive agent; a value given by (average thickness of the conductive agent)/(average thickness of the thermoplastic resin) is 0.5 to 3; the conductive agent is formulated so that a value of volume % given by (conductive agent)/(conductive agent+thermoplastic resin) is 10 to 50%; and formulation ratio of the thermoplastic resin is 10 to 65%, is provided.
US09508993B2 Electrode for secondary battery and secondary battery including the same
Disclosed is an electrode for secondary batteries including an electrode mixture including an electrode active material, binder and conductive material coated on a current collector. The present invention provides an electrode for secondary batteries wherein an electrode active material is a cathode active material and/or anode active material, and the conductive material is included in an amount of 0.1 to 15% based on total weight of the electrode mixture, and a secondary battery including the same.
US09508987B2 Composite anode active material, method of preparing the composite anode active material, and lithium battery including the composite anode active material
A composite anode active material, a method of preparing the composite anode active material, and a lithium battery including the lithium battery. According to the method of preparing the composite anode active material, carbon nanotubes are formed on a Si particle without a separate operation of applying a catalyst. Furthermore, high adherence is provided between the Si particle and carbon nanotubes, and therefore the composite anode active material is used as an anode material of the lithium battery.
US09508985B2 Electrodes, batteries, electrode production methods, and battery production methods
Battery electrodes are provided that can include a conductive core supported by a polymeric frame. Methods for manufacturing battery electrodes are provided that can include: providing a sheet of conductive material; and framing the sheet of conductive material with a polymeric material. Batteries are provided that can include a plurality of electrodes, with individual ones of the electrodes comprising a conductive core supported by a polymeric frame.
US09508983B2 Potatolike shaped graphite particles with low impurity rate at the surface, process for preparing same
A method for modifying graphite particles having a prismatic shape or a cylindrical shape characterized by an edge function fe and a basal function fb, said method providing increase of the edge function and lowering of the basal function, wherein the method includes submitting the graphite particles to at least one physical means selected from attrition, jet mill, ball mill, hammer mill, or atomizer mill, in the presence of at least one chemical compound chosen from the group of compounds of the formula MFz, in which M represents an alkaline or alkaline-earth metal and z represents 1 or 2, NaCl and NH4F or a mixture thereof, said compound or compounds being added in solid form, at the beginning of the step using the physical means.
US09508982B2 Negative electrode composition for rechargeable lithium battery, negative electrode comprising same and rechargeable lithium battery comprising same
A negative electrode composition for a rechargeable lithium battery. The negative electrode includes a negative active material and crystalline carbon conductive material, wherein the negative active material includes soft carbon, and the crystalline carbon conductive material includes graphite having an average particle diameter (D90) of about 1 micrometer to about 20 micrometers.
US09508981B2 Active material for batteries, non-aqueous electrolyte battery, and battery pack
According to one embodiment, a non-aqueous electrolyte battery is provided. The non-aqueous electrolyte battery includes a negative electrode contained a negative electrode active material. The negative electrode active material includes a monoclinic β-type titanium-based oxide or lithium titanium-based oxide. The monoclinic β-type titanium-based oxide or lithium titanium-based oxide has a peak belonging to (011), which appears at 2θ1 in a range of 24.40° or more and 24.88° or less, in an X-ray diffraction pattern obtained by wide angle X-ray diffractometry using CuKα radiation as an X-ray source.
US09508972B2 Venting device for an electrochemical battery and battery with a venting device
The invention relates to a venting device (1) for an electrochemical battery (90). The venting device comprises at least one inlet opening (2) for receiving gases venting from the battery (90), at least one outlet opening (3) for venting the gases received from the battery (90), and at least one flame arrester element (4). The inlet opening (2) is in communication with the outlet opening (3) via the flame arrester element (4). An explosion chamber (5, 6) is located within the venting device (1) on the side of the flame arrester element (4) which is directed to the outlet opening (3). The explosion chamber (5, 6) is arranged for developing and temporarily storing an explosive mixture of the gases received from the battery (90) and oxygen from the ambient air, which explodes in case a flame occurs within the explosion chamber (5, 6), thereby blowing off the flame.
US09508965B1 Housing structure with battery cover
The disclosed technology is directed to a housing structure with a battery cover. The housing structure enables a user to easily swap a battery positioned therein. The housing structure includes a housing, a push button, a push button cover, and a torsion spring. The housing defines a battery chamber that can accommodate a battery. The push button is positioned adjacent to the housing and supported by the push button cover and the torsion spring. The push button is coupled to a battery cover positioned adjacent to the housing. When a user pushes the push button from the outside of the housing, the battery cover can be moved and/or rotated accordingly such that a gap is formed between the battery cover and the housing. Through the gap, the user can insert a battery into the battery chamber or remove one therefrom.
US09508963B2 Battery and method for producing same
A battery houses an electrode body inside a battery case including a bottomed cylindrical case body having an opening part, and a plate-like lid member inserted in the opening part so as to seal the opening. The opening part and a lid peripheral edge part are welded hermetically by an energy beam irradiated from outside in the thickness direction of the lid member. In a specific section, the inner peripheral surface of the opening part and the peripheral edge surface of the lid peripheral edge part are welded in close contact with each other. A bead at the specific section takes a fan shape having a central angle of 160 to 200 degrees in a cross section, and the center of the fan shape is positioned on the inner peripheral surface and the peripheral edge surface.
US09508960B2 Method for packaging display device and apparatus therefor
The present application provides a method for packaging a display device and an apparatus therefor. The method includes: providing a display device, a platform, a laser beam and a magnetic mechanism; wherein the display device includes a light emitting element, the light emitting element includes at least one effective light emitting region thereon and is prepared on an upper surface of a glass substrate, the glass substrate is bonded to a glass cover plate via a sealing adhesive layer; the display device is placed on the platform; the laser beam penetrates the glass cover plate and focuses on the sealing adhesive layer to sinter the sealing adhesive layer; and the magnetic mechanism clamps the glass cover plate and the glass substrate from top to bottom and applies a uniform pressing force on the effective light emitting region of the display device.
US09508959B2 Organic EL device and method for manufacturing same
An organic Electro Luminescence device that equalizes heat generated in an organic EL element while preventing the intrusion of moisture. A light emitting element is covered with an inorganic sealing layer, an adhesive layer, an insulating resin film, and a metallic foil. The organic EL device includes a current carrying area located outside and along an edge of an emission area. A heat-conductive sealing stacked layer structure is formed in the current carrying area and includes the following layers in direct contact with each other in the following order: a first electrode layer extended from the emission area, auxiliary electrode layers having heat conductivity larger than that of the first electrode layer, the inorganic sealing layer, the adhesive layer, and a heat-conductive sealing layer. The heat-conductive sealing stacked layer structure having a linear shape is located near at least one side of a transparent substrate.
US09508957B2 OLED with improved light outcoupling
An OLED may include regions of a material having a refractive index less than that of the substrate, or of the organic region, allowing for emitted light in a waveguide mode to be extracted into air. These regions can be placed adjacent to the emissive regions of an OLED in a direction parallel to the electrodes. The substrate may also be given a nonstandard shape to further improve the conversion of waveguide mode and/or glass mode light to air mode. The outcoupling efficiency of such a device may be up to two to three times the efficiency of a standard OLED. Methods for fabricating such a transparent or top-emitting OLED is also provided.
US09508956B2 Organic light emitting diode, manufacturing method for organic light emitting diode, image display device, and illumination device
An organic light emitting diode, which is a top emission-type, is configured so that at least the following are laminated on the substrate: a reflective layer including a metal material; an anode conductive layer including a transparent conductive material; an organic EL layer having a light emitting layer which contains an organic light emitting material; and a cathode conductive layer in which a semi-transmissive metal layer and a transparent conductive layer including a transparent conductive material are laminated. On the surface of the semi-transmissive metal layer that is in contact with the transparent conducive layer side, a two-dimensional lattice structure is formed in which a plurality of protrusions are arranged periodically and two-dimensionally.
US09508952B2 Organic light emitting display device and method of manufacturing the same
An organic light emitting display device includes a first substrate, a second substrate, and an array of organic light emitting elements formed over the first substrate and interposed between the first and second substrate. The array comprises a pixel defining layer. The organic light emitting display device further includes a recess formed into the pixel defining layer, a sealing member, and a reinforcing member. The sealing member is formed along the edges of the first and second substrates and interconnects the first and second substrates. The reinforcing member comprises a first portion positioned in the recess and a second portion projected outside the recess toward the second substrate such that the second portion of the reinforcing member is capable of supporting the second substrate when the second substrate is pressed toward the first substrate by an external force.
US09508946B2 Organic light emitting diode display and manufacturing method thereof
An organic light emitting diode display includes: a substrate; a thin film transistor provided on the substrate; a first electrode connected to the thin film transistor; an organic emission layer provided on the first electrode; an interlayer provided on the organic emission layer; an electron auxiliary layer provided on the interlayer and including an electron injection layer (EIL) and an electron transport layer (ETL); and a second electrode provided on the electron auxiliary layer, wherein the interlayer is made by mixing a material of the electron auxiliary layer.
US09508945B2 Spectrally tunable broadband organic photodetectors
A photodetector device includes multiple organic photodetector subcells arranged in a stack, each organic photodetector subcell being configured to generate an electrical current in response to absorbing light over a corresponding range of wavelengths, in which each organic photodetector subcell includes at least one electron donor material and at least one electron acceptor material.
US09508939B2 Compound and organic electroluminescent element produced using same
A compound represented by the following formula (1): wherein in the formula, L1 is a single bond or a linking group, A is a group represented by the following formula (A), B is a group represented by the following formula (B), m is an integer of 1 to 3, and n is an integer of 1 to 4.
US09508937B2 Acenaphthylene imide-derived semiconductors
Novel acenaphthylene imide-derived semiconductor materials, including small molecule compounds, polymers and oligomers. Also provided are methods for making the novel semiconductor materials and the use of the novel semiconducting materials in electronic or optoelectronic device. In some embodiments, the novel semiconducting materials are used as n-channel component in organic field-effect transistors as well as complementary electronic circuits including inverters. High mobility can be achieved.
US09508936B2 Organic semiconductor material
A novel compound useful as organic semiconductor material, and semiconductor devices containing such organic semiconductor material are described.
US09508933B2 Organic light-emitting diode (OLED) device, manufacturing method thereof and display device
A method for manufacturing an organic light-emitting diode (OLED) device includes: forming auxiliary electrodes (2) on a resin layer (1) of an OLED substrate; forming a gas generation layer (4) on the auxiliary electrodes (2); forming an organic light-emitting layer (6) on the gas generation layer (4); placing a receptor substrate (12) on the organic light-emitting layer (6) and scanning auxiliary electrode regions (22) by laser, so that the gas generation layer (4) is decomposed under laser irradiation to release gas, and hence the organic light-emitting layer (6) in the auxiliary electrode regions (22) is transferred to the receptor substrate (12); removing the receptor substrate (12); and forming a cathode (7) on the auxiliary electrodes. The manufacturing process can effectively reduce poor contact between the auxiliary electrodes and the cathode.
US09508932B2 Laser crystallization system, laser crystallization method, and method of fabricating display device
A laser crystallization system, including an output unit configured to generate output laser light, an optical unit configured to split the output laser light into a first laser light and a second laser light, and to process the first laser light to have a crystallization energy density, a moving unit configured to move a target object to be irradiated with the first laser light and the second laser light, a detection unit configured to detect surface information of the target object utilizing the second laser light, and an input unit configured to receive the detected surface information and to transmit a control signal to the output unit and the moving unit, wherein the laser crystallization system is configured to detect the surface information of the target object and to crystallize the target object utilizing only the output laser light.
US09508930B2 Tunable voltage margin access diodes
The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.
US09508927B1 Phase change memory having a funnel-shaped heater and method of manufacturing the same
A method of manufacturing a phase change memory includes: (i) forming a first dielectric layer, a conductive contact and a first electrode over a semiconductor substrate; (ii) forming a second dielectric layer having an opening over the first dielectric layer, the opening exposing a top surface of the first electrode; (iii) forming a barrier layer lining a sidewall of the opening; (iv) forming a phase change element in the opening, wherein the phase change element includes a base and a peripheral wall extending upwards along the barrier layer from a periphery of the base, and an inner side of the peripheral wall defines a recess having an inlet and a bottom portion; (v) forming a heater filled in the recess; and (vi) forming a second electrode over the heater. A phase change memory is disclosed herein as well.
US09508926B2 Magnetoresistive effect element having an underlayer and a side wall layer that contain scandium
A magnetoresistive effect element includes a recording layer having magnetic anisotropy and a variable magnetization direction, a reference layer having magnetic anisotropy and an invariable magnetization direction, an intermediate layer between the recording layer and the reference layer, an underlayer containing scandium (Sc) and disposed on a surface side of the recording layer opposite to a surface side on which the recording layer is disposed, and a side wall layer containing an oxide of Sc and disposed on side surfaces of the recording layer and the intermediate layer.
US09508924B2 Method and system for providing rare earth magnetic junctions usable in spin transfer torque magnetic random access memory applications
A magnetic junction usable in a magnetic device and a method for providing the magnetic junction are described. The magnetic junction includes a free layer, a pinned layer and nonmagnetic spacer layer between the free and pinned layers. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction. The free and pinned layers each has a layer perpendicular magnetic anisotropy energy greater than an out-of-plane demagnetization energy. At least one of the pinned layer and the free layer includes a multilayer. The multilayer includes at least one bilayer. Each of the bilayer(s) has a first layer and a second layer. The first layer includes an alloy of a magnetic transition metal and a rare earth. The second layer includes an amorphous magnetic layer. The multilayer has a nonzero perpendicular magnetic anisotropy up to at least four hundred degrees Celsius.
US09508921B2 Electronic device and method for fabricating the same
The disclosed technology provides an electronic device and a fabrication method thereof, in which an etching margin in formation of a variable resistance element is secured and process difficulty is reduced. An electronic device according to an implementation includes a semiconductor memory, the semiconductor memory including: a variable resistance element including a stack of a first magnetic layer, a tunnel barrier layer and a second magnetic layer; a contact plug coupling a top of the variable resistance element and including a magnetism correcting layer; and a conductive line coupled to the variable resistance element through the contact plug including the magnetism correcting layer.
US09508917B2 Piezoelectric energy harvesting device or actuator
This invention concerns a piezoelectric energy harvesting device or actuator comprising a piezoelectric material (12) on a substrate (14). The piezoelectric material is divided into a plurality of discrete regions to provide a plurality of piezoelectric elements (16) on the substrate which are electrically insulated from each other. The elements are preferably disposed along the length of a cantilevered beam. The piezoelectric layer may be divided or further divided with an insulating gap extending in the longitudinal direction of the beam for energy harvesting in torsional mode(s) of beam vibration as well as bending modes.
US09508916B2 Ultrasonic transducer device, probe head, ultrasonic probe, electronic machine and ultrasonic diagnostic apparatus
An ultrasonic transducer device includes a substrate on which a plurality of openings are arranged; a plurality of ultrasonic transducer elements, each of the ultrasonic transducer elements being provided to each of the openings of the plurality of openings, on a first surface of the substrate; and a member fixed to a second surface of the substrate, which is a surface on the opposite side of the first surface of the substrate. Provided to the member are a plurality of first groove sections, and a second groove section for bundling together the plurality of the first groove sections.
US09508902B2 Optoelectronic semiconductor device
An optoelectronic semiconductor device in accordance with an embodiment of present invention includes a conversion unit having a first side; an electrical connector; a contact layer having an outer perimeter; and at least three successive discontinuous-regions formed along the outer perimeter and having at least one different factor; wherein the electrical connector, the contact layer, and the discontinuous-regions are formed on the first side of the conversion unit.
US09508900B2 Light-emitting device
A light-emitting device has a current blockage layer formed between a p-layer and a transparent electrode. A region of the transparent electrode on the current blockage layer has a higher sheet resistance as compared with the remaining region. The current blockage layer has a circular planar pattern containing a contact portion of a p-electrode. A straight line L passing through an arbitrary position in the contact portion and extending to a contact portion of an n-electrode with the shortest distance is defined. The center O′ of the width of the current blockage layer in the direction of the straight line L is located more remote from the contact portion of the n-electrode than is the center O of the width of the contact portion of the p-electrode in the direction of the straight line L. This structure can suppress an increase in drive voltage.
US09508899B2 Light emitting element manufacturing method
A light emitting element manufacturing method includes a wafer preparing process of preparing the semiconductor wafer, and a wafer dividing process of dividing the semiconductor wafer. In the wafer dividing process, in a vertical dividing region, a line position shifted by a predetermined distance from a center line of the vertical dividing region in a width direction to one side in the width direction is taken as the cutting start point to divide the semiconductor wafer.
US09508897B2 Multi-luminous element and method for manufacturing same
The present invention relates to a multi-luminous element and a method for manufacturing the same. The present invention provides the multi-luminous element comprising: a buffer layer disposed on a substrate; a first type semiconductor layer disposed on the buffer layer; a first active layer which is disposed on the first type semiconductor layer and is patterned to expose a part of the first type semiconductor layer; a second active layer disposed on the first type semiconductor layer which is exposed by the first active layer; and a second type semiconductor layer disposed on the first active layer and the second active layer, the first and second active layers being repeatedly disposed in the horizontal direction, and the method for manufacturing the same. The multi-luminous element according to the present invention reduces loss of light emitting efficiency and can generate multi-wavelength light by repeatedly disposing the first and second active layers in the horizontal direction.
US09508896B2 Light emitting diode chip and method of manufacturing same
A light emitting diode (LED) chip includes a first semiconductor layer, a first light emitting layer formed on the first semiconductor layer, a second light emitting layer formed on the first light emitting layer, and a second semiconductor layer formed on the second light emitting layer. The first light emitting layer emits light having a first color. The second light emitting layer emits light having a second color different from the first color.
US09508893B2 Method for manufacturing nano-structured semiconductor light-emitting element
There is provided a method for manufacturing a nanostructure semiconductor light emitting device, including: forming a mask having a plurality of openings on a base layer; growing a first conductivity-type semiconductor layer on exposed regions of the base layer such that the plurality of openings are filled, to form a plurality of nanocores; partially removing the mask such that side surfaces of the plurality of nanocores are exposed; heat-treating the plurality of nanocores after partially removing the mask; sequentially growing an active layer and a second conductivity-type semiconductor layer on surfaces of the plurality of nanocores to form a plurality of light emitting nanostructures, after the heat treatment; and planarizing upper parts of the plurality of light emitting nanostructures such that upper surfaces of the nanocores are exposed.
US09508889B2 Method of forming a germanium layer on a silicon substrate
A method is presented for forming a Ge containing layer on a Si substrate. The method includes providing a crystalline Si substrate having a surface that has a crystallographic orientation, heating the Si substrate in a vacuum environment, exposing the Si substrate to a surfactant that is suitable for growth of the Ge containing layer on the crystalline Si using surfactant mediation, and thereafter growing the Ge containing layer on the surface of the heated Si substrate using a suitable sputtering technique. The conditions of the growth of the Ge containing layer are selected such that a thin Ge containing layer is formed on the surface of the Si substrate. The thin Ge containing layer has a surface that has crystallographic properties suitable for epitaxial growth of a layer of a further material on the surface of the thin Ge containing layer.
US09508886B2 Method for making a crystalline silicon solar cell substrate utilizing flat top laser beam
A method for making a crystalline silicon solar cell substrate is provided. A doped dielectric layer is deposited over the backside surface of a crystalline silicon substrate, the doped dielectric layer having a polarity opposite the polarity of the crystalline silicon substrate. Portions of the backside surface of the crystalline substrate are exposed through the doped dielectric layer. An overlayer is deposited over the doped dielectric layer and the exposed portions of the backside surface of the crystalline silicon substrate. Pulsed laser ablation of the overlayer is performed with a flat top laser beam on the silicon substrate to form continuous base openings nested within the exposed portions of the backside surface of the crystalline silicon substrate, the flat top laser beam having a beam intensity profile flatter as compared to a Gaussian beam intensity profile and having a rectangular beam cross section. Doped base regions are formed in the crystalline silicon substrate through the continuous base openings.
US09508885B1 Graphene field effect transistor for radiation detection
The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.
US09508878B2 Solar cell having a rear side metallization
Various embodiments provide a solar cell. The solar cell includes a substrate having a front side and a rear side. At least the front side receives light. The solar cell further includes a multiplicity of rear side solder pad regions at least partially arranged over the rear side, and a plurality of partial solder pads formed in each rear side solder pad region of the multiplicity of rear side solder pad regions. Each partial solder pad includes a first metal. The partial solder pads in a respective rear side solder pad region are separated from each other. The solar cell further includes a rear side metallization formed at the rear side of the substrate partly overlapping the partial solder pads, the rear side metallization including a second metal different from the first metal.
US09508872B2 Method for manufacturing semiconductor device and pin diode
An IGBT (15) is formed in a semiconductor substrate (1). A temperature sense diode (17) made of polysilicon or amorphous silicon is formed on the semiconductor substrate (1). After forming the IGBT (15), the temperature sense diode (17) is divided into a plurality of diodes by selectively oxidizing or sublimating part of the temperature sense diode (17). Thus, influences of variations in finished dimension of polysilicon on the characteristics can be eliminated. As a result, it is possible to reduce the size while reducing characteristic variations.
US09508867B2 Thin film transistor, array substrate, method of fabricating same, and display device
A thin film transistor, an array substrate, a method of fabricating the same, and a display device are provided. The thin film transistor includes a substrate plate, and an active layer, a source, and a drain which are arranged on the substrate plate. The thin film transistor also includes an inclined portion which is arranged on the substrate plate in an inclined manner. The active layer is at least partially arranged on the inclined portion. The source and the drain are arranged over the active layer and at least partially overlap the active layer. In this manner, the size of the thin film transistor in a direction parallel with the substrate plate can be effectively reduced.
US09508865B2 Transistors, methods of manufacturing the same, and electronic devices including transistors
According to example embodiments, a transistor includes a gate, a channel layer that is separate from the gate, a gate insulating layer between the gate and the channel layer, and a source electrode and a drain electrode respectively contacting a first region and a second region of the channel layer. The gate insulating layer includes an impurity metal containing region that includes an impurity metal and contacts the channel layer. The gate insulating layer includes an impurity metal non-containing region contacting the gate that is not doped with the impurity metal.
US09508864B2 Oxide, semiconductor device, module, and electronic device
To provide a crystalline oxide semiconductor which can be used as a semiconductor of a transistor or the like. The crystalline oxide semiconductor is an oxide over a surface and includes a plurality of flat-plate-like In—Ga—Zn oxides. Each of the plurality of flat-plate-like In—Ga—Zn oxides has a crystal structure and includes a first layer, a second layer, and a third layer. The first layer includes a gallium atom, a zinc atom, and an oxygen atom. The second layer includes an indium atom and an oxygen atom. The third layer includes a gallium atom, a zinc atom, and an oxygen atom. A flat plane of each of the plurality of flat-plate-like In—Ga—Zn oxides is substantially perpendicular to a normal vector of the surface.
US09508863B2 Semiconductor device
A transistor is provided in which the bottom surface portion of an oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film, and an insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film. In addition, the oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) through heat treatment in which impurities such as hydrogen, moisture, hydroxyl, and hydride are removed from the oxide semiconductor and oxygen which is one of main component materials of the oxide semiconductor is supplied and is also reduced in a step of removing impurities.
US09508860B2 Lateral gate electrode TFT switch and liquid crystal display device
A lateral gate electrode TFT switch and a liquid crystal display device are disclosed. The lateral TFT switch has a substrate, a source-drain area, a gate insulation layer and a gate electrode. The source-drain area is disposed on the substrate and has a source electrode, a drain electrode and a semiconductor layer. The semiconductor layer is disposed between the source electrode and the drain electrode. The source electrode and the drain electrode are vertically disposed on the substrate. The gate insulation layer is disposed adjacent to the source-drain area. The gate electrode is disposed adjacent to the gate insulation layer. The gate insulation layer is used to separate the source-drain area from the gate electrode.
US09508859B2 TFT array substrate and manufacturing method of the same
A TFT array substrate and a manufacturing method of the same are disclosed by the present disclosure. The TFT array substrate includes a base, a light shielding layer, and a low hydrogen layer. The light shielding layer includes a silicon nitride layer formed on the base, and an amorphous silicon light shielding layer formed on the silicon nitride layer. The low hydrogen layer includes a silicon oxide layer formed on the amorphous silicon light shielding layer of the light shielding layer, and a low hydrogen Poly-Si layer formed on the silicon oxide layer. The layer number of the light shielding layer is equal to that of the low hydrogen layer. The time of manufacturing the light shielding layer matched that of manufacturing the low hydrogen layer, which enhances whole capacity of the TFT array substrate dramatically, and reduces risk of the manufacturing process.
US09508857B2 Thin film transistor display panel
A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer configured to cover the source electrode, the drain electrode, and the semiconductor layer, wherein the semiconductor layer includes a relatively thick first portion between the source electrode and the gate electrode and a relatively thinner second portion between the drain electrode and the gate electrode overlap, the relatively thick first portion being sufficiently thick to substantially reduce a charge trapping phenomenon that may otherwise occur at a gate electrode to gate dielectric interface if the first portion were as thin as the second portion.
US09508855B2 Liquid crystal display and manufacturing method thereof
A liquid crystal display includes: a substrate; a thin film transistor disposed on the substrate; a pixel electrode connected to the thin film transistor; and a roof layer facing the pixel electrode. A plurality of microcavities are between the pixel electrode and the roof layer. A liquid crystal material is in the microcavities, and a dent is formed in the roof layer.
US09508853B2 Channel cladding last process flow for forming a channel region on a FinFET device having a reduced size fin in the channel region
One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming a sacrificial gate structure around a portion of an initial fin, forming a sidewall spacer adjacent opposite sides of the sacrificial gate structure and removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove portions of the initial fin so as to thereby define a reduced size fin and recesses under the sidewall spacers, forming at least one replacement epi semiconductor cladding material around the reduced size fin in the replacement gate cavity and in the recesses under the sidewall spacers, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.
US09508851B2 Formation of bulk SiGe fin with dielectric isolation by anodization
A method of fabricating a semiconductor device is provided that includes providing a material stack that includes a silicon layer, a doped semiconductor layer, and an undoped silicon germanium layer. At least one fin structure is formed from the material stack by etching through the undoped silicon germanium layer, the doped semiconductor layer, and etching a portion of the silicon-containing layer. An isolation region is formed in contact with at least one end of the at least one fin structure. An anodization process removes the doped semiconductor layer of the at least one fin structure to provide a void. A dielectric layer is deposited to fill the void that is present between the silicon layer and the doped semiconductor layer. Source and drain regions are then formed on a channel portion of the at least one fin structure.
US09508848B1 Methods of forming strained channel regions on FinFET devices by performing a heating process on a heat-expandable material
One illustrative method disclosed herein includes, among other things, removing at least a portion of a vertical height of portions of an overall fin structure that are not covered by a gate structure so as to result in the definition of a remaining portion of the overall fin structure that is positioned under the gate structure, wherein the remaining portion comprises a channel portion and a lower portion located under the channel portion. The method continues with the formation of a layer of heat-expandable material (HEM), performing a heating process on the HEM so as to cause the HEM to expand, recessing the HEM so as to expose edges of the channel portion and growing a semiconductor material above the HEM using the exposed edges of the channel portion as a growth surface.
US09508847B2 Semiconductor device having dual work function gate structure, method for fabricating the same, transistor circuit having the same, memory cell having the same, and electronic device having the same
A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.
US09508846B2 Vertical MOS semiconductor device for high-frequency applications, and related manufacturing process
A MOS semiconductor device of a vertical type has: a functional layer, having a first type of conductivity; gate structures, which are formed above the functional layer and have a region of dielectric material and an electrode region; body wells, which have a second type of conductivity, are formed within the functional layer, and are separated by a surface separation region; source regions, which have the first type of conductivity and are formed within the body wells. Each gate structure extends laterally above just one respective body well and does not overlap the surface separation region of the functional layer. The device may further have: at least one shield structure, arranged between adjacent gate structures above the surface separation region; and/or at least one doped control region, having the second type of conductivity, arranged within the surface separation region, which are both set at the source potential.
US09508845B1 LDMOS device with high-potential-biased isolation ring
An LDMOS device implements a substrate having a buried isolation layer, a first well region that incorporates two stacked sub-regions to provide a PN junction with a RESURF effect, and a second well region laterally offset from the first well region. A source region is formed in one of the well regions and a drain region is formed in the other well region. An extension region is disposed immediately adjacent to the first well region and laterally distal to the second well region. An extension biasing region is formed at least partially within the extension region, and is separated from the first well region by a portion of the extension region. One or more metallization structures electrically couple the extension biasing region to the one of the source/drain region in the second well region. A gate structure at least partially overlaps both well regions.
US09508834B1 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon and a shallow trench isolation (STI) around the fin-shaped structure, wherein the fin-shaped structure comprises a top portion and a bottom portion; removing part of the STI to expose the top portion of the fin-shaped structure; and performing an oxidation process on the exposed top portion of the fin-shaped structure to divide the top portion into a first top portion and a second top portion while forming an oxide layer around the first top portion.
US09508830B2 Method of forming FinFET
A method of forming a FinFET is provided. A gate oxide layer and a dummy poly layer are substantially simultaneously etched using an etchant having a higher selectivity on the gate oxide layer than on the dummy poly layer. The gate oxide layer and the dummy poly layer are intersected with the gate oxide layer over a fin layer of the FinFET.
US09508825B1 Method and structure for forming gate contact above active area with trench silicide
A semiconductor device includes a substrate including an active area; a gate formed on the active area and surrounded by a spacer along a sidewall; a first source/drain contact and a second source/drain contact positioned on opposing sides of the gate and in contact with the active area; a first recess formed in the first source/drain contact and a second recess formed in the second source/drain contact; a gate contact including a conductive material on and in contact with the gate and the spacer; and an insulating liner disposed along a sidewall of the gate contact and in the first recess in the first source/drain contact and the second recess in the second source/drain contact.
US09508822B2 Semiconductor device
A semiconductor device comprises: a gate insulating film 190 stacked on a semiconductor layer 130; and a gate electrode layer 230 stacked on the gate insulating film 190 and provided to apply a voltage via the gate insulating film 190 for formation of a channel in the semiconductor layer 130. The gate insulating film 190 includes: a first insulation film 192 stacked on the semiconductor layer 130; and a second insulation film 194 between the first insulation film 192 and the gate electrode layer 230. When ∈1 and ∈2 respectively represent relative permittivities of the first and second insulation film 192, 194, d1 [nm] and d2 [nm] represent film thicknesses of the first and second insulation film 192, 194, and Vmax [V] represents a rated voltage applicable to the gate electrode layer 230, the semiconductor device is configured to satisfy ∈1<∈2 and meet (C1): V ⁢ ⁢ max d ⁢ ⁢ 1 + ɛ ⁢ ⁢ 1 ɛ ⁢ ⁢ 2 · d ⁢ ⁢ 2 ≦ 21 ⁢ [ M ⁢ ⁢ V ⁢ / ⁢ cm ] ⁢ . ( C1 )
US09508817B2 Semiconductor device and manufacturing method thereof
A semiconductor structure, a semiconductor device, and a method for forming the semiconductor device are provided. In various embodiments, the method for forming the semiconductor device includes forming transistors on a substrate. Forming each transistor includes forming a doped region on the substrate. A nanowire is formed protruding from the doped region. An interlayer dielectric layer is deposited over the doped region. A dielectric layer is deposited over the interlayer dielectric layer and surrounding each of the nanowires. A first gate layer is deposited over the dielectric layer. The dielectric layer and first gate layer are etched to expose portions of the nanowires and the interlayer dielectric layer. A second gate layer is formed over the exposed interlayer dielectric layer and surrounding the first gate layer. Then, the second gate layer was patterned to remove the second gate layer on the interlayer dielectric layer between the transistors.
US09508813B1 High-side field effect transistor
The present invention provides a transistor comprising a substrate having a surface; a first deep well region in the substrate; a second deep well region in the substrate, isolated from and encircling the first deep well region; a first well region in the substrate and on the first deep well region; two second well regions in the second deep well region and respectively at two opposite sides of the first well region; a source region in the first well region and adjacent to the surface; two drain regions in the two second well regions respectively and adjacent to the surface; two gate structures on the surface, wherein each of the two gate structures is between the source region and one of the drain regions respectively; and a guard ring in the substrate encircling the second deep well region, and on the periphery of the transistor.
US09508811B2 Semi-floating-gate device and its manufacturing method
The disclosure, belonging to the technological field of semiconductor memory, specifically relates to a semi-floating-gate device which comprises at least a semiconductor substrate, a source region, a drain region, a floating gate, a control gate, a perpendicular channel region and a gated p-n junction diode used to connect the floating gate and the substrate. The semi-floating-gate device disclosed in the disclosure using the floating gate to store information and realizing charging or discharging of the floating gate through a gated p-n junction diode boasts small unit area, high chip density, low operating voltage in data storage and strong ability in data retain.
US09508810B1 FET with air gap spacer for improved overlap capacitance
A semiconductor device and method of forming a semiconductor device including a semiconductor substrate, a gate stack extending from the semiconductor substrate, wherein the gate stack includes a gate conductor layer, and at least two gate spacers adjacent to each side of the gate stack. The semiconductor device also includes a source/drain region on each side of the spacers, wherein the source/drain regions are adjacent to the semiconductor substrate, an ILD layer adjacent to outer surfaces of the two spacers, wherein a height of the ILD layer is level with a height of the gate stack, and an air gap positioned beneath each spacer.
US09508804B2 Nitride semiconductor element and nitride semiconductor wafer
According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0
US09508802B2 Gettering process for producing semiconductor device
A process for producing a semiconductor device includes: forming an SiC epitaxial layer on an SiC substrate; implanting the epitaxial layer with ions; forming a gettering layer having a higher defect density than a defect density of the SiC substrate; and carrying out a heat treatment on the epitaxial layer. The semiconductor device includes an SiC substrate, an SiC epitaxial layer formed on the SiC substrate, and a gettering layer having a higher defect density than a defect density of the SiC substrate.
US09508801B2 Stacked graphene field-effect transistor
In an aspect of the present invention, a graphene field-effect transistor (GFET) structure is formed. The GFET structure comprises a wider portion and a narrow extension portion extending from the wider portion that includes one or more graphene layers edge contacted to source and drain contacts, wherein the source and drain contacts are self-aligned to the one or more graphene layers.
US09508800B2 Advanced transistors with punch through suppression
An advanced transistor with punch through suppression includes a gate with length Lg, a well doped to have a first concentration of a dopant, and a screening region positioned under the gate and having a second concentration of dopant. The second concentration of dopant may be greater than 5×1018 dopant atoms per cm3. At least one punch through suppression region is disposed under the gate between the screening region and the well. The punch through suppression region has a third concentration of a dopant intermediate between the first concentration and the second concentration of dopant. A bias voltage may be applied to the well region to adjust a threshold voltage of the transistor.
US09508796B2 Internal spacers for nanowire transistors and method of fabrication thereof
A nanowire transistor of the present description may be produced with internal spacers formed by using sacrificial spacers during the fabrication thereof. Once the nanowire transistor is formed, the sacrificial spacers, which are position between the transistor gate and the source and drains (respectively), may be removed. The sacrificial material between channel nanowires of the nanowire transistor may then be removed and a dielectric material may be deposited to fill the spaces between the channel nanowires. The dielectric material not between the channel nanowires may be removed to form the internal spacers. External spacers, which are position between the transistor gate and the source and drains (respectively), may then be formed adjacent the internal spacers and transistor channel nanowires.
US09508788B2 Capacitors in integrated circuits and methods of fabrication thereof
In one embodiment, a capacitor includes a first row including a first capacitor element and a second capacitor element coupled in parallel, and a second row including a third capacitor element and a fourth capacitor element coupled in parallel. The first row is coupled in series with the second row. In a metallization level over a workpiece, the second capacitor element is disposed between the first capacitor element and the third capacitor element. In the metallization level, the third capacitor element is disposed between the second capacitor element and the fourth capacitor element. The first, the second, the third, and the fourth capacitor elements are disposed in the metallization level.
US09508786B2 Integrated circuits and fabrication methods thereof
A method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a substrate. The first polysilicon region is implanted with a first dopant of a first conductivity type and a second dopant. After the implantation, the first polysilicon region has a first grain size larger than the initial grain size. Then, a laser rapid thermal annealing process is performed to the first polysilicon region.
US09508774B2 Semiconductor device and manufacturing method of the same
There are provided a highly reliable semiconductor device capable of suppressing occurrence of cracks as well as securing flatness and a manufacturing method therefor. The semiconductor device includes: a semiconductor substrate; an element region; and a non-element region. The non-element region includes: a top-layer metal wiring in a top layer of metal wirings formed in the non-element region; a flattening film covering an upper surface of the top-layer metal wiring; and a protecting film formed over the flattening film. A removed part where the protecting film is removed is formed in at least part of the non-element region.
US09508770B2 Solid-state imaging device and electronic apparatus
A solid-state imaging device and method of making a solid-state imaging device are described herein. By way of example, the solid-state imaging device includes a first wiring layer formed on a sensor substrate and a second wiring layer formed on a circuit substrate. The sensor substrate is coupled to the circuit substrate, the first wiring layer and the second wiring layer being positioned between the sensor substrate and the circuit substrate. A first electrode is formed on a surface of the first wiring layer, and a second electrode is formed on a surface of the second wiring layer. The first electrode is in electrical contact with the second electrode.
US09508767B2 Solid-state imaging device, method of manufacturing solid-state imaging device, and electronic apparatus
A solid-state imaging device includes pixels each having a photoelectric conversion element for converting incident light to an electric signal, color filters associated with the pixels and having a plurality of color filter components, microlenses converging the incident light through the color filters to the photoelectric conversion elements, a light shielding film disposed between the color filter components of the color filters, and a nonplanarized adhesive film provided between the color filters and the light shielding film.
US09508766B2 Image sensors and methods of fabricating the same
An image sensor includes a photoelectric conversion element in a substrate, a first storage region spaced apart from the photoelectric conversion element in the substrate, a gate on the first storage region, a light shielding layer covering the gate, a dielectric layer disposed between the gate and the light shielding layer and extending onto a top surface of the substrate, an interlayer insulating structure covering the light shielding layer, and a micro-lens overlapping with the photoelectric conversion element on the interlayer insulating structure. The light shielding layer includes a first portion covering a sidewall of the gate, and a second portion on a top surface of the gate. The first portion has a first thickness corresponding to a vertical height from a bottom surface of the first portion to a top surface of the first portion, and the first thickness is greater than a second thickness of the second portion.
US09508762B2 Array substrate, method of manufacturing array substrate and display device
Embodiments of the present invention disclose an array substrate, a method of manufacturing an array substrate and a display device, which belong to field of display technology. The method includes: forming a gate metal pattern and a gate insulating layer in turn on a base substrate; forming a source-drain metal pattern that is made of a preset metal on the base substrate, on which the gate insulating layer is formed, the source-drain metal pattern comprising a source electrode and a drain electrode and the preset metal including at least copper; forming a silicon nitride layer and a silicon oxide layer in turn on the base substrate, which compose a passivation layer; forming a trench in the passivation layer at a position corresponding to a gap between the source electrode and the drain electrode, wherein a width of the trench in the silicon oxide layer is smaller than a width of the trench in the silicon nitride layer and is larger than or equal to a distance of the gap between the source electrode and the drain electrode; forming an oxide trench pattern on the source-drain metal pattern, with is not in contact with the silicon nitride layer. The present invention solves problems of high-degree oxidation of copper metal layer and poorer display performance of an existing array substrate, and achieves advantages of reducing oxidation of copper metal layer and improving display performance of the array substrate for a display device.
US09508751B2 Array substrate, method for manufacturing the same and display device
The present invention provides an arrayed substrate, a method for manufacturing the same and a display device. It relates to a field of display technology. The short-circuit defect between the lead wires may be avoided while reducing a spacing between the adjacent two lead lines in a limited space for wiring. The array substrate comprises a plurality of criss-cross gate lines and data lines within a display area, and the array substrate further comprises a first short-circuiting ring and a second short-circuiting ring within a non-display area, and first data lead wires and second data lead wires connected electrically with the first short-circuiting ring and the second short-circuiting ring respectively; the first data lead wires are provided in the same layer and made from the same material as the gate lines for connecting electrically the first short-circuiting ring with first data lines of the data lines; the second data lead wires are provided in the same layer and made from the same material as the data lines for connecting electrically the second short-circuiting ring with second data lines of the data lines; wherein the first data lines are interleaved with the second data lines.
US09508749B2 Display substrates and methods of manufacturing display substrates
A display substrate and a method of manufacturing a display substrate are disclosed. The display substrate includes an active pattern, a first gate electrode and a second gate electrode. The active pattern is disposed on a base substrate. The first gate electrode overlaps the active pattern. The first gate electrode is spaced apart from the active pattern by a first distance. The second gate electrode overlaps the active pattern. The second gate electrode is spaced apart from the active pattern by a second distance which is larger than the first distance.
US09508748B2 Thin film transistor display panel and liquid crystal display
A thin film transistor display panel includes: a substrate; a gate line and a storage electrode line on the substrate; a gate insulating layer on the gate line; a semiconductor layer on the gate insulating layer; a data line, a drain electrode and a divided-voltage reference voltage line on the semiconductor layer; a passivation layer covering the data line, the drain electrode and the divided-voltage reference voltage line; and a first sub-pixel electrode and a second sub-pixel electrode electrically connected to the drain electrode through a contact hole defined in the passivation layer and including a plurality of pixel branch electrodes, where the divided-voltage reference voltage line divides a first or second sub-pixel area, which is defined by the first or second sub-pixel electrode, into two regions, and each of the two regions has three sides defined by the divided-voltage reference voltage line and an open side.
US09508744B2 TFT-driven display device
A TFT-driven display device includes an upper substrate and a lower substrate facing each other, multiple TFTs disposed on a side of the lower substrate facing the upper substrate, and a metal layer disposed on a side of the upper substrate facing the lower substrate. The metal layer includes multiple horizontal metal wirings extending in a direction of scanning lines and including portions overlapping with an active layer of the TFTs in the light transmission direction, the overlapping portions have a pattern width less than that of other portions that do not overlap with the active layer. A photo-leakage current caused by light reflected by the metal layer may be reduced, because no portion of the metal layer is provided in the position opposed to the active layer of the TFTs located on a TFT array substrate.
US09508743B2 Dual three-dimensional and RF semiconductor devices using local SOI
Co-fabrication of a radio-frequency (RF) semiconductor device with a three-dimensional semiconductor device includes providing a starting three-dimensional semiconductor structure, the starting structure including a bulk silicon semiconductor substrate, raised semiconductor structure(s) coupled to the substrate and surrounded by a layer of isolation material. Span(s) of the layer of isolation material between adjacent raised structures are recessed, and a layer of epitaxial semiconductor material is created over the recessed span(s) of isolation material over which another layer of isolation material is created. The RF device(s) are fabricated on the layer of isolation material above the epitaxial material, which creates a local silicon-on-insulator, while the three-dimensional semiconductor device(s) can be fabricated on the raised structure(s).
US09508741B2 CMOS structure on SSOI wafer
A method of forming fins in a complimentary-metal-oxide-semiconductor (CMOS) device that includes a p-type field effect transistor device (pFET) and an n-type field effect transistor (nFET) device and a CMOS device are described. The method includes forming a strained silicon-on-insulator (SSOI) layer in both a pFET region and an nFET region, etching the strained silicon layer, the insulator, and a portion of the bulk substrate in only the pFET region to expose the bulk substrate, epitaxially growing silicon (Si) from the bulk substrate in only the pFET region, and epitaxially growing additional semiconductor material on the Si in only the pFET region. The method also includes forming fins from the additional semiconductor material and a portion of the Si grown on the bulk substrate in the pFET region, and forming fins from the strained silicon layer and the insulator in the nFET region.
US09508740B2 3D stacked semiconductor memory architecture with conductive layer arrangement
According to an embodiment, a semiconductor memory device comprises: a semiconductor substrate; a memory cell array configured having a plurality of memory units, each of the memory units including a plurality of memory cells connected in series, the plurality of memory cells being stacked, the plurality of memory units involving a first memory unit and a second memory unit; and a plurality of bit lines connected to ends of each of the memory units in the memory cell array. The first memory unit and the second memory unit are arranged in a staggered manner by the first memory unit being displaced in a row direction with respect to the second memory unit by an amount less than an arrangement pitch in a row direction of the first memory unit or the second memory unit.
US09508731B2 Pillar arrangement in NAND memory
Embodiments of the present disclosure are directed towards techniques and configurations for providing a 3D memory array apparatus. In one embodiment, the apparatus may comprise a substantially hexagonal arrangement having seven pillars disposed in a die in a repeating pattern. The arrangement may include first and second pillars disposed at a pillar pitch from each other in a first row; third, fourth, and fifth pillars disposed at the pillar pitch from each other in a second row; and sixth and seventh pillar disposed at the pillar pitch from each other in a third row and shifted relative to the first and second pillars respectively by a quarter of the pillar pitch in a direction that is substantially orthogonal to bitlines disposed in the die. Each pillar in the arrangement may be electrically coupled with a different bitline. Other embodiments may be described and/or claimed.
US09508728B2 CMOS gate stack structures and processes
A semiconductor device includes a substrate having a semiconducting surface having formed therein a first active region and a second active region, where the first active region consists of a substantially undoped layer at the surface and a highly doped screening layer of a first conductivity type beneath the first substantially undoped layer, and the second active region consists of a second substantially undoped layer at the surface and a second highly doped screening layer of a second conductivity type beneath the second substantially undoped layer. The semiconductor device also includes a gate stack formed in each of the first active region and the second active region consists of at least one gate dielectric layer and a layer of a metal, where the metal has a workfunction that is substantially midgap with respect to the semiconducting surface.
US09508723B2 Semiconductor device having buried gate and manufacturing method thereof
A dummy active region is formed in a region in which a gate contact for supplying operation power to the buried gate is formed, and a PN junction diode connected to the gate contact in a reverse bias direction is formed in the dummy active region. Current leakage, in which current flows out toward a substrate, is prevented even when misalignment of the gate contact occurs.
US09508718B2 FinFET contact structure and method for forming the same
A device comprises a substrate comprising a first portion and a second portion separated by an isolation region, a first gate structure over the first portion, a first drain/source region and a second drain/source region in the first portion and on opposite sides of the first gate structure, wherein the first drain/source region and the second drain/source have concave surfaces, a second gate structure over the second portion and a third drain/source region and a fourth drain/source region in the second portion and on opposite sides of the second gate structure, wherein the third drain/source region and the fourth drain/source have the concave surfaces.
US09508710B2 Semiconductor device
A technology capable of suppressing a fluctuation in voltage in a diode region is provided. A resistance value between the emitter electrode and the lower body region is lower than a resistance value between the anode electrode and the lower anode region when the semiconductor device operates as a diode. A quantity of holes between the emitter electrode and the second barrier region is smaller than a quantity of holes between the anode electrode and the first barrier region.
US09508709B2 Semiconductor device, light-emitting device, and electronic device
An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.
US09508708B2 Poly resistor for metal gate integrated circuits
An integrated circuit containing a metal gate transistor and a thin polysilicon resistor may be formed by forming a first layer of polysilicon and removed it in an area for the thin polysilicon resistor. A second layer of polysilicon is formed over the first layer of polysilicon and in the area for the thin polysilicon resistor. The thin polysilicon resistor is formed in the second layer of polysilicon and the sacrificial gate is formed in the first layer of polysilicon and the second layer of polysilicon. A PMD layer is formed over the second layer of polysilicon and a top portion of the PMD layer is removed so as to expose the sacrificial gate but not expose the second layer of polysilicon in the thin polysilicon resistor. The sacrificial gate is removed and a metal replacement gate is formed.
US09508706B2 Semiconductor integrated circuit
An input signal having a high level or a low level is input to a pad. A first protection element includes a first transistor configured as an N-channel MOSFET designed so as to withstand ESD. A second protection element includes a second transistor configured as a P-channel MOSFET designed so as to withstand ESD. A capacitance element is connected to a second line, and forms an RC filter together with a filter resistor. The capacitance element includes at least one from among a third transistor having the same device structure as that of the first transistor and a fourth transistor having the same device structure as that of the second transistor.
US09508705B2 Electronic part, electronic device, and manufacturing method
An electronic part includes: a substrate; a first electrode configured to extend through the substrate and have a first opening size; a second electrode configured to extend through the substrate and have a second opening size; a switching section configured to switch between connection of the first electrode to a first power line and connection of the second electrode to the first power line; and a third electrode configured to extend through the substrate and be connected to a second power line different in potential from the first power line, a capacitance between the first and third electrodes and a capacitance between the second and third electrodes being different.
US09508703B2 Stacked dies with wire bonds and method
Semiconductor dies are bonded to each other and electrically connected to each other. An encapsulant is utilized to protect the semiconductor dies and external connections are formed to connect the semiconductor dies within the encapsulant. In an embodiment the external connections may comprise conductive pillars, conductive reflowable material, or combinations of such.
US09508701B2 3D device packaging using through-substrate pillars
A method for 3D device packaging utilizes through-substrate pillars to mechanically and electrically bond two or more dice. The first die includes a set of access holes extending from a surface of the first die to a set of pads at a metal layer of the first die. The second die includes a set of metal pillars. The first die and the second die are stacked such that each metal pillar extends from a surface of the second die to a corresponding pad via a corresponding access hole. The first die and second die are mechanically and electrically bonded via solder joints formed between the metal pillars and the corresponding pads.
US09508698B2 Light emitting device
A light emitting device includes a substrate having a top surface, upper and lower metal layers, multiple LED chips, at least one Zener diode, multiple conductive wires and an encapsulant. The top surface includes a central region bounded by an imaginary boundary with a profile conforming to an outline of a circle stacked with a polygon. The central region has a die bonding area corresponding to the circle, and at least one polygonal extension area formed outside the die bonding area. The upper metal layer includes multiple conducting pads surrounding the central region. The LED chips are disposed on the die bonding area. The Zener diode is disposed on the polygonal extension area. The encapsulant is disposed on the substrate and covers the LED chips.
US09508696B2 Laser marking in packages
A package includes a device die, a first plurality of redistribution lines underlying the device die, a second plurality of redistribution lines overlying the device die, and a metal pad in a same metal layer as the second plurality of redistribution lines. A laser mark is in a dielectric layer that is overlying the metal pad. The laser mark overlaps the metal pad.
US09508692B1 Package including a plurality of stacked semiconductor devices including a capacitance enhanced through via and method of manufacture
A package can include a first, second and third semiconductor devices stacked in a first direction. A first semiconductor device can include a first through via between a first side and a second side opposite the first side of the first semiconductor device and a first circuit that provides a first reference potential at a first circuit output, electrically connected to the first through via in a normal mode of operation. A second semiconductor device can include a second through via, a second circuit, and a third circuit. A second circuit can be electrically connected to the first through via at the second side. A third circuit can provide a second reference potential and can be electrically connected to the second through via at the first side. The third circuit and the third semiconductor device can receive the second reference potential exclusive of the first semiconductor device.
US09508691B1 Flipped die stacks with multiple rows of leadframe interconnects
Stacked microelectronic packages comprise microelectronic elements each having a contact-bearing front surface and edge surfaces extending away therefrom, and a dielectric encapsulation region contacting an edge surface. The encapsulation defines first and second major surfaces of the package and a remote surface between the major surfaces. Package contacts at the remote surface include a first set of contacts at positions closer to the first major surface than a second set of contacts, which instead are at positions closer to the second major surface. The packages are configured such that major surfaces of each package can be oriented in a nonparallel direction with the major surface of a substrate, the package contacts electrically coupled to corresponding contacts at the substrate surface. The package stacking and orientation can provide increased packing density.
US09508690B2 Semiconductor TSV device package for circuit board connection
An electronic device includes a circuit board and a semiconductor device package. The semiconductor device package includes a laminate layer. The semiconductor device package includes a semiconductor die having an active side, an inactive side opposite the active side, and through-silicon vias (TSVs) conductively connecting the active side to the inactive side and conductively connecting the semiconductor die to one of the laminate layer and the circuit board. The semiconductor device package includes a laminate layer having a side attached to the active side or the inactive side semiconductor die. The semiconductor device package includes solder balls at the side of the laminate layer attached to the semiconductor die, around the semiconductor die, and attached to the circuit board.
US09508688B2 Semiconductor packages with interposers and methods of manufacturing the same
A semiconductor package may include a first semiconductor chip, a second semiconductor chip disposed to overlap with a portion of the first semiconductor chip and connected to the first semiconductor chip through first coupling structures. The semiconductor package may include an interposer disposed to overlap with another portion of the first semiconductor chip and may be connected to the first semiconductor chip through second coupling structures. A first surface of the interposer may face the first semiconductor chip, and the interposer may include second internal interconnectors extending from the second coupling structures on the first surface to a second surface of the interposer opposite to the first face. External interconnectors may be disposed on the second surface of the interposer and are connected to the second internal interconnectors.
US09508687B2 Low cost hybrid high density package
A microelectronic assembly includes a substrate, a first and second microelectronic elements, a lead finger, electrical connections extending between contacts of the second microelectronic element and the lead fingers, and an encapsulant overlying at least portions of the first and second microelectronic elements, lead finger and electrical connections. The substrate has contacts at a first surface and terminals at an opposed second surface that are electrically connected with the substrate contacts. The first microelectronic element has contacts exposed at its front face. The front face of the first microelectronic element is joined to the substrate contacts. The second microelectronic element overlies the first microelectronic element and has contacts at a front face facing away from the substrate. The lead frame has lead fingers, wherein the second surface of the substrate and the lead fingers define a common interface for electrical interconnection to a component external to the microelectronic assembly.
US09508686B2 Semiconductor device assembly with package interconnect extending into overlying spacer material, and associated systems, devices, and methods
Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
US09508685B2 Vertically integrated wafers with thermal dissipation
Technologies are generally described related to three-dimensional integration of integrated circuits (ICs) with spacing for heat dissipation. According to some examples, a self-aligned silicide may be formed in a temporary silicon layer and removed subsequent to bonding of the wafers to achieve improved contact between the combined ICs and enhanced heat dissipation through added spacing between the ICs.
US09508682B2 Organic EL luminescent device
An organic EL luminescent device (1) includes: organic EL panels of no smaller than 2 (10, 11) including a light-transmitting organic EL panel (10, 11), the light-transmitting organic EL panel having a first electrode (32), formed on a transparent substrate (31), having optical transparency, an organic layer (33), formed on the first electrode (32), having a light emitting layer and a second electrode (35), formed on the organic layer (33), having optical transparency; and a support (21) to support the no-smaller-than-2 organic EL panels in a manner overlapping each other.
US09508681B2 Stacked semiconductor chip RGBZ sensor
An apparatus is described that includes a first semiconductor chip having a first pixel array. The first pixel array has visible light sensitive pixels. The apparatus includes a second semiconductor chip having a second pixel array. The first semiconductor chip is stacked on the second semiconductor chip such that the second pixel array resides beneath the first pixel array. The second pixel array has IR light sensitive pixels for time-of-flight based depth detection.
US09508676B1 Semiconductor package structure having hollow chamber and bottom substrate and package process thereof
A semiconductor package structure having hollow chamber includes a bottom substrate having a bottom baseboard and a bottom metal layer formed on a disposing area of the bottom baseboard, a connection layer formed on the bottom metal layer, and a top substrate. The bottom metal layer has at least one corner having a first and a second outer lateral surface, and an outer connection surface. A first extension line is formed from a first extreme point of the first outer lateral surface, and a second extension line is formed from a second extreme point of the second outer lateral surface. A first exposing area of the bottom baseboard is formed by connecting the first and second extreme points and a cross point of the first and second extreme points. The top substrate connects to the connection layer to form a hollow chamber between the top and bottom substrates.
US09508675B2 Microelectronic package having direct contact heat spreader and method of manufacturing same
A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
US09508674B2 Warpage control of semiconductor die package
Various embodiments of mechanisms for forming a die package using a compressive dielectric layer to contact and to surround through substrate vias (TSVs) in the die package are provided. The compressive dielectric layer reduces or eliminates bowing of the die package. As a result, the risk of broken redistribution layer (RDL) due to bowing is reduced or eliminated. In addition, the compressive dielectric layer, which is formed between the conductive TSV columns and surrounding molding compound, improves the adhesion between the conductive TSV columns and the molding compound. Consequently, the reliability of the die package is improved.
US09508672B2 Semiconductor device
A semiconductor device suitable for preventing malfunction is provided.The semiconductor device includes a semiconductor chip 1, a first electrode pad 21 laminated on the semiconductor chip 1, an intermediate layer 4 having a rectangular shape defined by first edges 49a and second edges, and a plurality of bumps 5 arranged to sandwich the intermediate layer 4 by cooperating with the semiconductor chip 1. The first edges 49a extend in the direction x, whereas the second edges extend in the direction y. The plurality of bumps 5 include a first bump 51 electrically connected to the first electrode pad 21 and a second bump 52 electrically connected to the first electrode pad 21. The first bump 51 is arranged at one end in the direction x and one end in the direction y.
US09508671B2 Semiconductor device and semiconductor package
The present disclosure relates to bonding structures useful in semiconductor packages. In an embodiment, a semiconductor device includes a semiconductor element and two pillar structures. The semiconductor element has a surface and includes at least one bonding pad disposed adjacent to the surface. The two pillar structures are disposed on the one bonding pad. The two pillar structures are symmetric and formed of a same material.
US09508669B2 Semiconductor device
A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically connected to an emitter layer, contact each other, is shifted in a longitudinal direction of the emitter layer away from a position at which the third opening would be directly above the emitter layer. The third opening is arranged, with respect to the emitter layer, such that an end portion of the emitter layer in the longitudinal direction of the emitter layer and the edge of the opening of the third opening are substantially aligned with each other.
US09508667B2 Formation of solder and copper interconnect structures and associated techniques and configurations
Embodiments of the present disclosure are directed toward formation of solder and copper interconnect structures and associated techniques and configurations. In one embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a solderable material on the IC substrate using an ink deposition process, a binder printing system, or a powder laser sintering system. In another embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a copper powder on the IC substrate using an additive process to form a copper interconnect structure. Other embodiments may be described and/or claimed.
US09508664B1 Semiconductor device structure comprising a plurality of metal oxide fibers and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a conductive structure over the substrate. The semiconductor device structure includes first metal oxide fibers over the conductive structure. The semiconductor device structure includes a dielectric layer over the substrate and covering the conductive structure and the first metal oxide fibers. The dielectric layer fills gaps between the first metal oxide fibers.
US09508659B2 Method and apparatus to protect a wafer edge
A method includes holding bonded wafers by a wafer holding module. A gap between the bonded wafers along an edge is filled with a protection material.
US09508658B1 Electromagnetic wall in millimeter-wave cavity
An apparatus having a package, a wall and a lid is disclosed. The package may be configured to mount a plurality of chips. Two of the chips may generate a plurality of signals in a millimeter-wave frequency range. A metal is exposed at a surface of the package between the two chips. The metal is generally connected to an electrical ground. The wall may be formed on the metal and between the two chips. The wall generally has a plurality of arches that (i) are conductive, (ii) are wire bonded to the metal and (iii) attenuate an electromagnetic coupling between the two chips at the millimeter-wave frequency. The lid may be configured to enclose the chips to form a millimeter-wave cavity.
US09508649B2 Semiconductor devices
Semiconductor devices are provided. The semiconductor devices may include a first interconnection structure and a second interconnection structure which are disposed on a semiconductor substrate. A contact structure may be disposed between the first and second interconnection structures. A first lower air spacer may be disposed between the first interconnection structure and the contact structure. A second lower air spacer may be disposed between the second interconnection structure and the contact structure to be spaced apart from the first lower air spacer. An upper air spacer may be disposed on side surfaces of the contact structure to be connected to the first and second interconnection structures.
US09508648B2 Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate
To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property, a three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(rrrK) between the semiconductor substrate.
US09508646B2 Semicondutor device with copper plugs having different resistance values
Performance of a semiconductor device is improved. In one embodiment, for example, deposition time is increased from 4.6 sec to 6.9 sec. In other words, in one embodiment, thickness of a tantalum nitride film is increased by increasing the deposition time. Specifically, in one embodiment, deposition time is increased such that a tantalum nitride film provided on the bottom of a connection hole to be coupled to a wide interconnection has a thickness within a range from 5 to 10 nm.
US09508644B2 Method of forming a pattern
A method of forming a pattern includes forming a mask pattern on a substrate; etching the substrate by deep reactive ion etching (DRIE) and by using the mask pattern as an etch mask; partially removing the mask pattern to expose a portion of an upper surface of the substrate; and etching the exposed portion of the upper surface of the substrate. In the method, when a pattern is formed by DRIE, an upper portion of the pattern does not protrude or scarcely protrudes, and scallops of a sidewall of the pattern are smooth, and thus a conformal material layer may be easily formed on a surface of the pattern.
US09508637B2 Protrusion bump pads for bond-on-trace processing
An embodiment apparatus includes a dielectric layer in a die, a conductive trace in the dielectric layer, and a protrusion bump pad on the conductive trace. The protrusion bump pad at least partially extends over the dielectric layer, and the protrusion bump pad includes a lengthwise axis and a widthwise axis. A ratio of a first dimension of the lengthwise axis to a second dimension of the widthwise axis is about 0.8 to about 1.2.
US09508632B1 Apparatus and methods for stackable packaging
A semiconductor structure includes a lead frame having a flag and a plurality of leads, a semiconductor die attached to a first major surface of the flag, and a plurality of re-routed lead fingers attached to the lead frame. The plurality of leads has a first pitch. The first end of each re-routed lead finger is attached to a lead of the plurality of leads. Each re-routed lead finger extends over the semiconductor die such that a second end of each re-routed lead finger is over and spaced apart from the flag of the lead frame. The second ends of the plurality of re-routed lead fingers has a second pitch different from the first pitch.
US09508627B2 Electronic device and method of manufacturing the same
In manufacturing an electronic device in which a semiconductor chip including an element layer formed on a front surface of a substrate and a heat sink to perform heat radiation of the semiconductor chip are connected via a heat spreader, a first heat spreader is formed on a rear surface of the semiconductor chip using a first carbon nanotube, a second heat spreader is formed on the heat sink using a second carbon nanotube, and the first heat spreader and the second heat spreader are caused to adhere to each other. With this configuration, a highly reliable electronic device that has very low heat resistance and achieves efficient heat radiation with a relatively simple configuration is fabricated.
US09508625B2 Semiconductor die package with multiple mounting configurations
A semiconductor die package includes first, second and third metal blocks insulated from one another. The first metal block has a thinner inner section, a first thicker outer section at a first end of the thinner inner section and a second thicker outer section at a second end of the thinner inner section opposing the first end. The second metal block has a thicker outer section and a thinner inner section protruding inward from the thicker outer section. The third metal block has a thicker outer section and a thinner inner section protruding inward from the thicker outer section. A semiconductor die has a first terminal attached to the thinner inner section of the first metal block, a second terminal attached to the thinner inner section of the second metal block, and a third terminal attached to the thinner inner section of the third metal block.
US09508623B2 Semiconductor packages and methods of packaging semiconductor devices
Semiconductor packages and methods for forming a semiconductor package are disclosed. The method includes providing a wafer having first and second major surfaces. The wafer is prepared with a plurality of dies and a plurality of external electrical contacts disposed on the first major surface of the wafer. The method includes processing the wafer. Processing the wafer includes separating the wafer into a plurality of individual dies. An individual die includes first and second major surfaces and first and second sidewalls, and the external electrical contacts are formed on the first major surface of the die. An encapsulant material is formed. The encapsulant material covers at least a portion of the first and second sidewalls of the die.
US09508622B2 Method for protecting copper wire bonds on aluminum pads of a semiconductor device from corrosion
A semiconductor device and method for encapsulating the semiconductor device are provided. The method includes: forming a plurality of wire bonds on a surface of the semiconductor device by bonding each of a plurality of copper wires onto corresponding ones of a plurality of aluminum pads; applying a protective material around the plurality of wire bonds, the protective material having a first pH; and encapsulating at least a portion of the semiconductor device and the protective material with an encapsulating material having a second pH, wherein the first pH of the protective material is for neutralizing the second pH of the encapsulating material around the plurality of wire bonds.
US09508620B2 Semiconductor device and manufacturing method thereof
It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.
US09508618B2 Staggered electrical frame structures for frame area reduction
A method of forming a group of probe pads or sets of probe pads and DUTs in a staggered pattern within a portion of a pad row and the resulting device are disclosed. Embodiments include forming a first group of probe pads or sets of probe pads and DUTs in a pad row on a wafer; and forming a second group of probe pads and DUTs in the pad row on the wafer, wherein the probe pads or sets of probe pads of the first group are staggered along the pad row, and each DUT of the first group is aligned with a probe pad perpendicular to the pad row.
US09508612B2 Method to detect wafer arcing in semiconductor manufacturing equipment
Methods and systems for accurate arc detection in semiconductor manufacturing tools are disclosed. Such methods and systems provide real-time arc detection and near real-time notification for corrective actions during a semiconductor manufacturing process. Such methods and systems utilize data with high sample rate and wavelet analysis to provide for more accurate arc detection, which leads to more effective and cost efficient semiconductor manufacturing operations.
US09508607B2 Thermal management of tightly integrated semiconductor device, system and/or package
Some implementations provide a package that includes a first die and a second die adjacent to the first die. The second die is capable of heating the first die. The package also includes a leakage sensor configured to measure a leakage current of the first die. The package also includes a thermal management unit coupled to the leakage sensor. The thermal management unit configured to control a temperature of the first die based on the leakage current of the first die.
US09508605B2 Dummy gate for a high voltage transistor device
The present disclosure provides a semiconductor device. The semiconductor device includes a first doped region and a second doped region both formed in a substrate. The first and second doped regions are oppositely doped. The semiconductor device includes a first gate formed over the substrate. The first gate overlies a portion of the first doped region and a portion of the second doped region. The semiconductor device includes a second gate formed over the substrate. The second gate overlies a different portion of the second doped region. The semiconductor device includes a first voltage source that provides a first voltage to the second gate. The semiconductor device includes a second voltage source that provides a second voltage to the second doped region. The first and second voltages are different from each other.
US09508602B2 Temperature-controlled implanting of a diffusion-suppressing dopant in a semiconductor structure
Semiconductor structures and methods of fabrication are provided for, for instance, inhibiting diffusion of active dopant within a semiconductor material. A diffusion-suppressing dopant is implanted via, an implanting process under controlled temperature, into a semiconductor material of a semiconductor structure to define a diffusion-suppressed region within the semiconductor material. One or more active regions are established within the diffusion-suppressed region of the semiconductor structure by, for example, implanting an active dopant into the semiconductor material. The implanting of the diffusion-suppressing dopant facilitates inhibiting diffusion of the active dopant within the diffusion-suppressed region.
US09508601B2 Method to form silicide and contact at embedded epitaxial facet
An integrated circuit with an MOS transistor abutting field oxide and a gate structure on the field oxide adjacent to the MOS transistor and a gap between an epitaxial source/drain and the field oxide is formed with a silicon dioxide-based gap filler in the gap. Metal silicide is formed on the exposed epitaxial source/drain region. A CESL is formed over the integrated circuit and a PMD layer is formed over the CESL. A contact is formed through the PMD layer and CESL to make an electrical connection to the metal silicide on the epitaxial source/drain region.
US09508600B1 Methods for contact formation for 10 nanometers and beyond with minimal mask counts
A method of making a semiconductor device includes depositing a hard mask on a dielectric layer on a substrate, the dielectric layer being disposed around first, second, and third gates; removing a portion of the hard mask to form an opening that exposes the first, second, and third gates; forming a patterned soft mask on the first, second, and third gates within the opening, a first portion of the patterned soft mask being disposed on the first and second gates, and a second portion of the patterned soft mask being disposed on the second and third gates; removing portions of the dielectric layer to transfer the pattern of the patterned soft mask into the dielectric layer and form first and second contact openings between the first and second gates, and third and fourth contact openings between the second and third gates; and disposing a conductive material in the contact openings.
US09508594B2 Fabricating pillar solder bump
A substrate bonding method is able to reliably bond substrates while avoiding a reduction in yield made worse by finer pitches. The substrate bonding method can include: forming an adhesive resin layer on a surface of a first substrate on which a pad has been formed; forming an opening on the adhesive resin layer above the pad; filling the opening with molten solder to form a pillar-shaped solder bump; and applying heat and pressure to the first substrate and a second substrate while a terminal formed on the second substrate is aligned with the solder bump.
US09508593B1 Method of depositing a diffusion barrier for copper interconnect applications
The present invention pertains to methods for forming a metal diffusion barrier on an integrated circuit wherein the formation includes at least two operations. The first operation deposits barrier material via PVD or CVD to provide some minimal coverage. The second operation deposits an additional barrier material and simultaneously etches a portion of the barrier material deposited in the first operation. The result of the operations is a metal diffusion barrier formed in part by net etching in certain areas, in particular the bottom of vias, and a net deposition in other areas, in particular the side walls of vias. Controlled etching is used to selectively remove barrier material from the bottom of vias, either completely or partially, thus reducing the resistance of subsequently formed metal interconnects.
US09508589B2 Conductive layer routing
Methods of fabricating middle of line (MOL) layers and devices including MOL layers. A method in accordance with an aspect of the present disclosure includes depositing a hard mask across active contacts to terminals of semiconductor devices of a semiconductor substrate. Such a method also includes patterning the hard mask to selectively expose some of the active contacts and selectively insulate some of the active contacts. The method also includes depositing a conductive material on the patterned hard mask and the exposed active contacts to couple the exposed active contacts to each other over an active area of the semiconductor devices.
US09508586B2 Debonding schemes
A method includes receiving a wafer stack having at least two wafers bonded together. At least one blade is inserted between a first wafer of the at least two wafers and a second wafer of the at least two wafers. The blade has a channel configured to inject air or fluid. The first wafer is debonded from the second wafer using the at least one blade. In another embodiment, a detacher having a convex bottom surface is attached to the wafer stack. The first wafer is debonded from the second wafer using the detacher.
US09508584B2 In-situ removable electrostatic chuck
Embodiments described herein generally relate to an electrostatic chuck (ESC). The ESC may contain a first plurality of electrodes adapted to electrostatically couple a substrate to the ESC and a second plurality of electrodes adapted to electrostatically couple the ESC to a substrate support. Instead of being integrally disposed within the substrate support, the ESC may be easily removed from the substrate support and removed from a chamber for maintenance or replacement purposes.
US09508576B2 Process equipment architecture
Embodiments of the present invention relate to improvements to single-substrate, multi-chamber processing platform architecture for minimizing fabrication facility floor space requirements. Prior art systems require significant floor space around all sides to allow for adequate installation and servicing. Embodiments of the present invention provide platforms that allow for servicing the chambers and supporting systems via a front and rear of the platform allowing multiple, side-by-side platform placement within a fabrication facility, while providing improved serviceability of the platform components.
US09508569B2 Substrate liquid processing apparatus
Disclosed is a substrate liquid processing apparatus including a substrate holding unit configured to hold a substrate; a processing liquid nozzle configured to supply a processing liquid to the substrate held by the substrate holding unit; a nozzle arm configured to hold the processing liquid nozzle; and an arm cleaning tank configured to immerse the entire surface of the nozzle arm in a cleaning liquid so as to clean the nozzle arm.
US09508564B2 Method for manufacturing semiconductor device
A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.
US09508561B2 Methods for forming interconnection structures in an integrated cluster system for semicondcutor applications
Embodiments of the present invention provide methods for forming an interconnection structure in semiconductor devices without breaking vacuum with minimum oxidation/atmosphere exposure. In one embodiment, a method for forming an interconnection structure for semiconductor devices includes supplying a barrier layer etching gas mixture into a first processing chamber having a substrate disposed therein to etch portions of a barrier layer exposed by a patterned metal layer until the underlying substrate is exposed, the first processing chamber disposed in a processing system, and forming a liner layer on the substrate covering the etched barrier layer in a second processing chamber disposed in the processing system.
US09508560B1 SiARC removal with plasma etch and fluorinated wet chemical solution combination
A method that allows effective removal of a silicon-containing antireflective coating (SiARC) layer in a block mask after defining an unblock area in a sidewall image transfer (SIT) patterning process without causing a height loss of the SIT spacers is provided. The method includes first modifying the SiARC layer with a dry etch utilizing an etching gas comprising a nitrogen gas followed by treating the modified SiARC layer with a wet chemical etch utilizing an aqueous solution including dilute hydrofluoric acid and citric acid.
US09508555B2 Method of manufacturing semiconductor device
To improve quality or manufacturing throughput of a semiconductor device, a method includes supplying a source gas to a substrate in a process chamber; exhausting an inside of the process chamber; supplying a reaction gas to the substrate; and exhausting the inside of the process chamber, wherein the source gas and/or the reaction gas is supplied in temporally separated pulses in the supply of the source gas and/or in the supply of the reaction gas. Then, the source gas and/or the reaction gas is supplied in temporally separated pulses to form a film during a gas supply time determined by a concentration distribution of by-products formed on a surface of the substrate.
US09508549B2 Methods of forming electronic devices including filling porous features with a polymer
Methods of forming an electronic device comprise: (a) providing a semiconductor substrate comprising a porous feature on a surface thereof; (b) applying a composition over the porous feature, wherein the composition comprises a polymer and a solvent, wherein the polymer comprises a repeat unit of the following general formula (I): wherein: Ar1, Ar2, Ar3 and Ar4 independently represent an optionally substituted divalent aromatic group; X1 and X2 independently represent a single bond, —O—, —C(O)—, —C(O)O—, —OC(O)—, —C(O)NR1—, —NR2C(O)—, —S—, —S(O)—, —SO2— or an optionally substituted C1-20 divalent hydrocarbon group, wherein R1 and R2 independently represent H or a C1-20 hydrocarbyl group; m is 0 or 1; n is 0 or 1; and o is 0 or 1; and (c) heating the composition; wherein the polymer is disposed in pores of the porous feature. The methods find particular applicability in the manufacture of semiconductor devices for forming low-k and ultra-low-k dielectric materials.
US09508548B2 Method for forming barrier layer for dielectric layers in semiconductor devices
A semiconductor device having a high-k gate dielectric, and a method of manufacture, is provided. A gate dielectric layer is formed over a substrate. An interfacial layer may be interposed between the gate dielectric layer and the substrate. A barrier layer, such as a TiN layer, having a higher concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer is formed. The barrier layer may be formed by depositing, for example, a TiN layer and performing a nitridation process on the TiN layer to increase the concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer. A gate electrode is formed over the barrier layer.
US09508540B2 Method and apparatus useful for imaging
The present invention provides a method of generating ions from a sample, the method comprising the steps of (1) designating a plurality of sample target sites, and (2) for each of said plurality of sample target sites, generating ions from a plurality of locations associated with the sample target site, wherein said plurality of locations are selected automatically with reference to the said sample target site. Each of the plurality of sample target sites is associated with a discrete sample region, wherein the sample is part of a MALDI ion source and the plurality of discrete sample regions comprise regions of matrix, suitably formed by chemical inkjet printing. The plurality of locations can be at least 5 and preferably at least 10 locations, each of which can be selected randomly or in accordance with a predetermined pattern. Ions generated from the plurality of locations associated with each of the sample target sites are assigned only a single set of sample position coordinates, which coordinates correspond to those of the sample target site. This averaging technique leads to improved data reliability.
US09508530B2 Plasma processing chamber with flexible symmetric RF return strap
Chambers for processing semiconductor wafers are provided. One such chamber includes an electrostatic chuck having a surface for supporting a substrate. A ground assembly is provided that surrounds a periphery of the electrostatic chuck. The ground assembly includes a first annular part and a second annular part and a space between the first annular part and the second annular part. A conductive strap having flexibility is provided. The conductive strap is annular and has a curved cross-sectional shape with a first end and a second end. The conductive strap is disposed in the space such that the first is electrically connected to the first annular part and the second end is electrically connected to the second annular part. The curved cross-sectional shape has an opening that faces away from the electrostatic chuck when the annular conductive strap is in the space.
US09508527B2 Sample base, charged particle beam device and sample observation method
This charged particle beam device irradiates a primary charged particle beam generated from a charged particle microscope onto a sample arranged on a light-emitting member that makes up at least a part of a sample base, and, in addition to obtaining charged particle microscope images by the light-emitting member detecting charged particles transmitted through or scattered inside the sample, obtains optical microscope images by means of an optical microscope while the sample is still arranged on the sample platform.
US09508525B2 Apparatus and a method for generating a flattening x-ray radiation field
An apparatus and a method are for generating a flattening x-ray radiation field. The apparatus includes: plurality of electron accelerators for generating high-energy electron beam current; and a common target unit including a vacuum target chamber, a target and plurality of input connectors. The plurality of input connectors are connected to one side of the vacuum target chamber and the target is installed at the other side of the vacuum target chamber opposing the plurality of input connectors, the axes of which intersect in pairs at one point in an predetermined included angle. The plurality of electron accelerators are connected to the plurality of input connectors.
US09508521B2 Ion beam device
An ion beam device according to the present invention includes a gas field ion source (1) including an emitter tip (21) supported by an emitter base mount (64), a ionization chamber (15) including an extraction electrode (24) and being configured to surround the emitter tip (21), and a gas supply tube (25). A center axis line of the extraction electrode (24) overlaps or is parallel to a center axis line (14A) of the ion irradiation light system, and a center axis line (66) passing the emitter tip (21) and the emitter base mount (64) is inclinable with respect to a center axis line of the ionization chamber (15). Accordingly, an ion beam device including a gas field ion source capable of adjusting the direction of the emitter tip is provided.
US09508520B2 Integrated vacuum microelectronic device and fabrication method thereof
An integrated vacuum microelectronic device comprises: a highly doped semiconductor substrate, at least one insulating layer) placed above said doped semiconductor substrate, a vacuum aperture formed within said at least one insulating layer and extending to the highly doped semiconductor substrate, a first metal layer acting as a cathode, a second metal layer placed under said highly doped semiconductor substrate and acting as an anode. The first metal layer is placed adjacent to the upper edge of the vacuum aperture and the vacuum aperture has a width dimension such as the first metal layer remains suspended over the vacuum aperture.
US09508517B2 Subsea fuse
A subsea fuse for use in a high-pressure environment is provided. The subsea fuse includes a fuse element, a first lid and a second lid, and electrical connections for contacting the fuse element. Furthermore, a hollow elongated element made of a flexible material is provided. The first and second lids and the hollow elongated element form a liquid-tight chamber, which is filled with a liquid. The fuse element is arranged inside the liquid-tight chamber.
US09508515B2 Electrostatic relay
In an electrostatic relay in which a moving contact and a movable electrode are displaced in parallel with a base substrate, an opening force is increased when the movable electrode is separated from a fixed electrode, and a structure is simplified to enhance a degree of freedom of design. A fixed contact portion and a fixed electrode portion are fixed to the base substrate. The fixed electrode portion and a movable electrode portion constitute an electrostatic actuator that displaces the movable electrode portion and a moving contact portion. A movable spring provided in a spring supporting portion retains the movable electrode portion in a displaceable manner. A cantilever secondary spring is provided in the spring supporting portion, and a projection portion is provided in a front end face of the movable electrode portion. The secondary spring abuts on the projection portion while being not deformed until abutting on the projection portion, before the moving contact of the moving contact portion abuts on the fixed contact of the fixed contact portion when the moving contact portion and the movable electrode portion are displaced.
US09508514B2 Switchgear operating mechanism
An electromagnetic rebound mechanism unit and a magnetic latch unit are fixedly installed between a switchgear and a spring drive unit by virtue of a rebound fixing member and a fixing yoke. The electromagnetic rebound mechanism unit includes a rebound coil fixedly secured to the rebound fixing member, a reinforcing plate fixedly secured to a movable shaft and a rebound ring fixedly secured to the reinforcing plate. The magnetic latch unit includes a permanent magnet fixedly secured to the rebound fixing member, a latch ring fixedly secured to the permanent magnet and a movable yoke fixedly secured to the movable shaft. The spring drive unit includes a support frame, a spring retaining plate, a circuit-opening spring, a damper unit, and first and second electromagnetic solenoids.
US09508513B1 Coaxial RF switch optoelectronic indicators and method of making same
A coaxial RF switch optoelectronic indicator comprising a light-emitting diode (LED), a photo sensor, and a shutter assembly wherein the shutter assembly interacts with the soft-iron rocker in the switch and causes the optical path between the LED and photo-sensor to open or close, corresponding to the states (connected or disconnected) of an RF channel in the switch, providing an indicator means to the switch.
US09508508B2 Switch including an arc extinguishing container with a metal body and a resin cover
A switch has a pair of fixed contacts installed in an arc extinguishing container and disposed to maintain a predetermined space therebetween, and a movable contact disposed so as to come into and out of contact with the pair of fixed contacts. The arc extinguishing container includes an open-topped tub-shaped metal body, an insulating holding member which holds the pair of fixed contacts, disposed on an inner side of the tub-shaped metal body, opposite to the movable contact, and an open-bottomed tub-shaped resin cover which covers the pair of fixed contacts and the movable contact from an open edge face side of the tub-shaped metal body. A periphery of an open edge of the resin cover is sealed to a bottom surface of the tub-shaped metal body with an adhesive agent.
US09508506B2 Potting method for lamp chain
A potting method for a lamp chain includes a) providing a mold having a potting groove; b) providing a fixing support which is fixedly kept in the potting groove; c) fixedly keeping a printed circuit board provided with a light emitting assembly in the fixed support; d) potting a potting material into the potting groove and curing the potting material; and e) removing the mold.
US09508503B2 Increasing yield with tactile button gap adjustment
Embodiments of the disclosure optimize yield of a product having one or more switch assemblies and improve impact robustness of the product without sacrificing tactile feel. Based on failure limits of a gap in the switch assembly during manufacturing, a single size for a shim is calculated. The shim is selectively inserted into the switch assembly based on the gap to maximize the switch assembly yield while minimizing cost. In some examples, a bracket is designed for the switch assemblies. The bracket has datum surfaces in three dimensions and a beam tuned to absorb energy during an impact event to prevent switch failure.
US09508502B2 Push button switch having a curved deformable contact element
The present invention relates to a push button switch 5 comprising a curved deformable contact element 4. The push button switch 5 comprises at least one first terminal point 1, at least one second terminal point 2, and at least one third terminal point 3. The deformable contact element 4 is switched between a first and a second state. In the first state the deformable contact element 4 connects the at least one first terminal point 1 with the at least one second terminal point 2 whereas there is neither contact between the at least one third terminal point 3 and the at least one first terminal point 1 nor between the at least one third terminal point 3 and the at least one second terminal point 2. In the second state the deformable contact element 4 connects the at least one first terminal point with the at least one third terminal point 3, whereas there is neither contact between the at least one second terminal point 2 and the at least one first terminal point 1 nor between the at least one second terminal point 2 and the at 1 least one third terminal point 3. This implies that the push button switch 5 is designed to be both normally closed and normally open.
US09508501B2 Two terminal arc suppressor
A two terminal arc suppressor for protecting switch, relay or contactor contacts and the like comprises a two terminal module adapted to be attached in parallel with the contacts to be protected and including a circuit for deriving an operating voltage upon the transitioning of the switch, relay or contactor contacts from a closed to an open disposition, the power being rectified and the resulting DC signal used to trigger a power triac switch via an optoisolator circuit whereby arc suppression pulses are generated for short predetermined intervals only at a transition of the mechanical switch, relay or contactor contacts from an closed to an open transition and, again, at an open to a close transition during contact bounce conditions.
US09508500B2 Contactor-circuit breaker device
The invention relates to a contactor-circuit breaker device (2, 102, 202), comprising: a switch (4) including two pairs of contacts (10, 12) each comprising a stationary contact (14, 16) and a moving contact (18, 20), the stationary contacts (14, 16) being connected in series to an electrical circuit (22), the switch (4) being capable of switching between a closed configuration of the electrical circuit (22) and an open configuration of the electrical circuit (22); a support member (24) for the moving contacts; a current cutoff module (6) able to switch the current from the electrical circuit (22) to the cutoff module (6); and a movement apparatus (26) for moving the support member (24) comprising a armature (44) capable of translating the armature such that the support member switches between the closed configuration and the open configuration through a translational and/or rotational movement.
US09508497B2 Lockable electric switch
An electric switch, in particular for an electric power tool, in particular a hammer drill, comprises a first switching device and a second switching device, wherein the first switching device can be adjusted by adjusting a first mechanical signaling means from a first switched state to a second switched state, wherein the second switching device can be adjusted by adjusting a second electrical or mechanical signaling means from a third switched state in which the electric switch acts as a pushbutton into a fourth switched state in which the switch acts as a rocker switch. The disclosure further relates to an electrical power tool having an electric switch according to the disclosure.
US09508494B2 Carbonaceous material for negative electrodes of lithium ion capacitors and method for producing same
The object of the present invention is to provide a manufacturing method of carbonaceous material for a negative electrode of lithium ion capacitors, wherein the carbonaceous material is obtained from plant-derived char as a source, potassium and iron are sufficiently removed, and an average particle diameter thereof is small; and a carbonaceous material for a negative electrode of lithium ion capacitors.The object can be solved by a method for manufacturing a carbonaceous material having an average diameter of 3 to 30 μm, for a negative electrode of lithium ion capacitors comprising the steps of: (1) heating plant-derived char having an average particle diameter of 100 to 10000 μm at 500° C. to 1250° C. under an inert gas atmosphere containing a halogen compound to demineralize in a gas-phase, (2) pulverizing a carbon precursor obtained by the demineralization in a gas-phase, (3) calcining the pulverized carbon precursor at less than 1100° C. under a non-oxidizing gas atmosphere.
US09508492B2 Manganese oxide capacitor for use in extreme environments
A capacitor assembly for use in high voltage and high temperature environments is provided. More particularly, the capacitor assembly includes a capacitor element containing an anodically oxidized porous, sintered body that is coated with a manganese oxide solid electrolyte. To help facilitate the use of the capacitor assembly in high voltage (e.g., above about 35 volts) and high temperature (e.g., above about 175° C.) applications, the capacitor element is enclosed and hermetically sealed within a housing in the presence of a gaseous atmosphere that contains an inert gas. It is believed that the housing and inert gas atmosphere are capable of limiting the amount of moisture supplied to the manganese dioxide. In this manner, the solid electrolyte is less likely to undergo an adverse reaction under extreme conditions, thus increasing the thermal stability of the capacitor assembly. In addition to functioning well in both high voltage and high temperature environments, the capacitor assembly of the present invention may also exhibit a high volumetric efficiency.
US09508489B2 Capacitor holder
A capacitor holder includes: a cylindrical portion made of a resin having a cylindrical shape and externally fitted to a capacitor; a pair of protrusions formed integrally with the cylindrical portion, the protrusions protruding in an outward direction of the cylindrical portion from positions opposed to each other with respect to an axis of the cylindrical portion; and a pair of metal pins protruding along the axis from axial end surfaces of the paired protrusions, the metal pins configured to solder the cylindrical portion and the protrusions to a printed circuit board. In the capacitor holder, a distance between the axis and outer circumferences of the protrusions is less than 0.76 times of an inner diameter of the cylindrical portion.
US09508486B2 High temperature electromagnetic coil assemblies
Embodiments of a high temperature electromagnetic coil assembly are provided, as are embodiments of a method for fabricating such a high temperature electromagnetic coil assembly. In one embodiment, the high temperature electromagnetic coil assembly includes a coiled anodized aluminum wire and an electrically-insulative, high thermal expansion ceramic body in which the coiled anodized aluminum wire is embedded. The electrically-insulative, high thermal expansion ceramic body has a coefficient of thermal expansion greater than 10 parts per million per degree Celsius and less than the coefficient of thermal expansion of the coiled anodized aluminum wire.
US09508482B2 Reactor
U-shaped cores and fasteners are embedded in resin members, and brackets provided at respective ends of the fasteners protrude from the resin members. By fixing the brackets and a casing with screws, a reactor main body and the casing are fixed together. Openings formed by a partition wall that suppresses a direct application of a resin flowing from resin-filling portions to the fasteners are provided between the respective fasteners and the respective resin-filling portions. A protrusion extending in an opposite direction to a core and in parallel with the partition wall is provided between the resin-filling portions and the partition wall. The resin flowing from the resin-filling portion flows in between a core upper face and the fastener, and between a fastener surface located behind the partition wall and the internal surface of a die.
US09508472B2 Standoff device and method of installation of harness
A device connects a wire harness to a structure. A fixation portion of the device is secured to the structure. A spacing portion is connected to the fixation portion and to a connector portion. A retaining clip on the connector portion deforms when a wire harness connector component moves axially toward the fixation portion. The clip opposes an abutment edge against the component into engagement position when the component is past the clip to prevent it from moving back onto the clip. An abutment surface contacts another portion of the component in engagement position to prevent further axial movement of the component toward the fixation portion. The component is held captive between the edge and the abutment surface. Also provided are a cable support for connecting the wire harness to the device, a method for connecting and disconnecting the wire harness to a structure with the device, and an aircraft.
US09508469B2 Peelable superconductive conductor, production method of peelable superconductive conductor, and repair method for superconducting wire
A peelable superconductive conductor comprising a superconductive conductor including a substrate and a superconducting layer which is formed on one principal surface of the substrate. The peelable superconductive conductor can further comprise a peelable carrier body, which is formed on a principal surface of the superconductive conductor on an opposite side of the surface on which the superconducting layer is formed.
US09508468B2 Noise suppression cable, core assembly, and electrical device
A noise suppression cable includes an electrical wire, a first magnetic material including a pair of first surfaces formed along an axis direction of the electrical wire and a convex portion projecting from the first surfaces, and a second magnetic material including a pair of second surfaces disposed on a periphery of the electrical wire, the pair of the second surfaces contacting the pair of the first surfaces such that a tubular shape is formed by the first and second magnetic materials. The first magnetic material and the second magnetic material are configured to generate a compression stress in the convex portion of the first magnetic material by receiving an external force so as to reduce a relative permeability of the convex portion.
US09508463B2 Electrolyte material, liquid composition and membrane/electrode assembly for polymer electrolyte fuel cell
It is to provide an electrolyte material with which an increase in the water content can be suppressed even when the ion exchange capacity of a polymer having repeating units based on a monomer having a dioxolane ring is high; and a membrane/electrode assembly excellent in the power generation characteristics under low or no humidity conditions and under high humidity conditions.It is to use an electrolyte material, which comprises a polymer (H) having ion exchange groups converted from precursor groups in a polymer (F), and having an ion exchange capacity of at least 1.35 meq/g dry resin, the polymer (F) having repeating units (A) based on a perfluoromonomer having a precursor group of an ion exchange group and a dioxolane ring and repeating units (B) based on a perfluoromonomer having no precursor group and having a dioxolane ring, and having a TQ of at least 200° C., which is a temperature at which the melt volume rate becomes 100 mm3/sec when the polymer (F) is subjected to melt-extrusion under an extrusion pressure condition of 2.94 MPa from a nozzle having a length of 1 mm and an inner diameter of 1 mm.
US09508462B2 Sn-coated copper alloy strip having excellent heat resistance
A Sn-coated copper alloy strip including a surface coating layer containing a Ni layer, a Cu—Sn intermetallic compound layer, and a Sn layer formed in this order over the surface of a base material containing a copper alloy strip, in which an average thickness of the Ni layer is from 0.1 to 3.0 μm, an average thickness of the Cu—Sn intermetallic compound layer is from 0.02 to 3.0 μm, an average thickness of the Sn layer is from 0.01 to 5.0 μm, and the Cu—Sn intermetallic compound layer contains only an η-phase or the η-phase and an ε-phase.
US09508459B2 Method to prevent stress corrosion cracking of storage canister and storage canister
A method to prevent stress corrosion cracking of a storage canister 1, wherein stress corrosion cracking is prevented by applying a compressive stress to a range where a tensile residual stress is generated on a metallic body 2 by welding a cover 4 to a top 2a of the body 2. A first compressive stress is applied beforehand to a range L of the body 2 where a tensile residual stress is expected to be generated by the welding of the cover 4, the tensile residual stress is canceled by welding the cover 4 with a compressive residual stress generated in the range L, and then a second compressive stress is applied so as to generate a compressive residual stress over the range L.
US09508457B2 Electronic device and method for operating electronic device
An electronic device comprising a semiconductor memory unit that may include a plurality of data transfer lines; a plurality of columns including a plurality of memory cells; at least one redundancy column including a plurality of redundancy memory cells and configured to replace at least one column among the plurality of columns; a repair select information generation unit configured to store a column address of the at least one column to be replaced among the plurality of columns and generate a plurality of repair select information in response to the stored column address; and a plurality of repair selection units connected with data transfer lines corresponding to them among the plurality of data transfer lines, columns corresponding to them among the plurality of columns and the at least one redundancy column, and each configured to electrically connect a column selected among a column corresponding to it and the at least one redundancy column, to a data transfer line corresponding to it, in response to repair select information corresponding to it among the plurality of repair select information.
US09508452B2 Partial chip, and systems having the same
A partial chip and a system including the partial chip are provided. The partial chip includes a memory cell array and a signal control circuit. The memory cell array includes a pass region and a fail region. The signal control circuit is configured to generate second data corresponding to first data to be output from the fail region.
US09508448B2 Memory element and signal processing circuit
A memory element having a novel structure and a signal processing circuit including the memory element are provided. A first circuit, including a first transistor and a second transistor, and a second circuit, including a third transistor and a fourth transistor, are included. A first signal potential and a second signal potential, each corresponding to an input signal, are respectively input to a gate of the second transistor via the first transistor in an on state and to a gate of the fourth transistor via the third transistor in an on state. After that, the first transistor and the third transistor are turned off. The input signal is read out using both the states of the second transistor and the fourth transistor. A transistor including an oxide semiconductor in which a channel is formed can be used for the first transistor and the third transistor.
US09508436B2 Method for reading data stored in a flash memory according to a physical characteristic and memory controller and system thereof
A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.
US09508435B1 Writing method for resistive memory apparatus
A writing method for a resistive memory apparatus is provided. In the method, logic data is received, and a corresponding selection memory cell is selected. A logic level of the logic data is determined. When the logic data is at a first logic level, a RESET pulse is provided to the selection memory cell and then a SET pulse smaller than a reference write current and having a near-rectangular pulse width is provided to the selection memory cell during a writing period. When the logic data is at a second logic level, the RESET pulse is provided to the selection memory cell and then a SET pulse larger than the reference write current and having the near-rectangular pulse width is provided to the selection memory cell during the writing period.
US09508431B2 Nonvolatile semiconductor memory device of variable resistive type with reduced variations of forming current after breakdown
A device including a memory cell including a variable resistive memory element; a capacitor; a voltage generation circuit; and a switch circuit including a first switch and a second switch. The first switch is coupled between the voltage generation circuit and the capacitor without an intervention of the second switch. The second switch is coupled between the capacitor and the memory cell without an intervention of the first switch. The first switch is configured to take an on-state during a first period of time and an off-state during a second period of time following the first period of time and the second switch is configured to take an off-state during the first period of time and an on-state during the second period of time.
US09508422B2 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell
A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL to the memory cell, continuing the writing of the data in the memory cell by changing the value of the write control voltage VBL in response to an advent of a first write state of the memory cell and inhibiting any operation of writing a data to the memory cell by further changing the value of the write control voltage VBL to Vdd in response to an advent of a second write state of the memory cell.
US09508421B2 Memory device, storage apparatus and method for diagnosing slow memory cells
A memory device comprises a memory block including a plurality of cells each including an erase state and a program state, respectively; and a control circuit configured to execute, in response to a program command, program operation of applying a pulse to each cell to charge an electric charge and transferring the cell from the erase state to the program state. The control circuit executes, in response to a diagnostic command, diagnostic operation of applying to a diagnostic target cell the pulse within a range that the diagnostic target cell in the erase state in a memory block including stored data is not shifted to the program state, and checking whether or not a charge speed of the diagnostic target cell is faster than or equal to a charge speed of a slowest-speed cell whose charge speed is the slowest among normal cells.
US09508414B2 Memory cell supply voltage reduction prior to write cycle
An integrated circuit device includes a memory cell coupled to a supply voltage line to receive a supply voltage and a voltage control circuit operable to reduce a magnitude of the supply voltage prior to a write cycle to the memory cell. The voltage control circuit includes a first capacitor that is selectively coupled between a supply voltage line and a first reference supply voltage line of the integrated circuit device in anticipation of a write cycle to the memory cell.
US09508410B1 Semiconductor device having a secondary address generating unit for generating address signal in response to address signal from a first address generating unit
A semiconductor device includes a control signal generating unit, a first address generating unit, and a second address generating unit. The control signal generating unit generates a read/write control signal and a selection control signal in response to an active signal. The first address generating unit generates a first address signal in response to the selection control signal and a second address signal. The second address generating unit generates the second address signal in response to the read/write control signal and the first address signal.
US09508407B2 Wiring configuration of a bus system and power wires in a memory chip
Devices and circuits for wiring configurations of a bus system and power supply wires in a memory chip with improved power efficiencies. The effective resistance on the power supply wires may be reduced by utilizing non-active bus wires as additional power wires connected in parallel with the other supply wires. The non-active bus wires may reduce or prevent parasitic couplings and cross-talk effects between neighboring sensitive wires, thereby improving performance of the chip.
US09508406B2 Driving apparatus and selection of a dead zone of an internal voltage
A driving apparatus includes a control circuit configured to generate a voltage region control signal enabled for a predetermined time according to a command signal; and a driving circuit configured to provide an internal voltage by selecting a dead zone of the internal voltage according to the voltage region control signal.
US09508405B2 Method and circuit to enable wide supply voltage difference in multi-supply memory
A method and apparatus for operating a memory device with wider difference in array and periphery voltage is presented. The memory device includes a bit line, a complementary bit line, a memory cell, a first pre-charge circuit, and a second pre-charge circuit. The memory cell, the first pre-charge circuit, and the second pre-charge circuit are coupled between the bit line and the complementary bit line. The first pre-charge circuit is configured to pre-charge the bit line and the complementary bit line to a first voltage level. The second pre-charge circuit is configured to pre-charge the bit line and the complementary bit line to a second voltage level that is different than the first voltage level. In some examples, two precharge circuits are configured to operate such that memory access is ensured to be static noise margin safe even under wider difference between two voltage levels.
US09508404B2 Semiconductor memory device for conducting monitoring operation to verify read and write operations
A semiconductor memory device includes, in part, a first data I/O block and a second data I/O block. During a write operation, the first data I/O block transmits input data supplied through a first pad to a first global I/O line, and further generates a write internal signal. The second data I/O block transmits the write internal signal to a second pad in response to a monitor enable signal. During a read operation, the first data I/O block supplies data from the first global I/O line to a first pad, and further generates a read internal signal. The second data I/O block transmits the read internal signal to the second pad in response to a monitor enable signal.
US09508401B2 Semiconductor system and method of operating the same
A semiconductor system includes multiple semiconductor devices operating commonly in response to a command signal, wherein each of the multiple semiconductor devices is independently activated according to each of multiple data strobe signals respectively corresponding to the multiple semiconductor devices; and a controller suitable for providing the command signal and the multiple data strobe signals.
US09508397B1 Non-volatile memory (NVM) with endurance control
An operating voltage and reference current are adjusted in a memory device. At least a portion of an array of memory cells is preconditioned to an erased state using an erase verify voltage on word lines coupled to the memory cells and a first reference current in sense amplifiers coupled to bit lines for the array. A test reference current is set for the sense amplifiers. A bitcell gate voltage is set on the word lines to a present overdrive voltage. The at least a portion of the array is read. If any of the memory cells in the at least a portion of the array are read as being programmed, the present overdrive voltage is increased until none of the memory cells in the at least a portion of the array are read as being programmed.
US09508395B2 Three-dimensional one-time-programmable memory comprising off-die read/write-voltage generator
The present invention discloses a three-dimensional one-time-programmable memory (3D-OTP) comprising an off-die read/write-voltage generator (VR/VW-generator). It comprises at least a 3D-array die and at least a peripheral-circuit die. At least a VR/VW-generator of the 3D-OTP arrays is located on the peripheral-circuit die instead of the 3D-array die. The VR/VW-generator generates at least a read voltage and/or a write voltage different from a supply voltage.
US09508392B2 Systems and methods for mechanical isolation of information handling resources
In accordance with embodiments of the present disclosure, a system may include a structural member and an isolator/guide. The structural member may define at least a portion of each of two laterally adjacent bays, each bay for receiving a respective modular information handling resource. The isolator/guide may be mechanically coupled to the structural member and include at least one guide pin and a vibrational isolator. The at least one guide pin may be configured to engage with modular information handling resources disposed in each of the two laterally adjacent bays in order to mechanically guide the modular information handling resources during insertion into and removal from the bays. The vibrational isolator may be mechanically coupled between the structural member and the at least one guide pin such that the vibrational isolator provides vibrational isolation between the at least one guide pin and the structural member.
US09508391B2 Multifunction flashlight
A multifunction flashlight includes an audio recorder, a video recorder and a flashlight having one or more operating modes. The flashlight includes an audio microphone secured within a water-tight interior compartment in the body of the flashlight. A storage compartment is provided in a rear portion of the flashlight for removably storing one or more light diffuser caps which are selectively mountable over the flashlight lens. A port in the wall of the flashlight can be opened to improve audio reception and sensitivity of a microphone housed within the flashlight. A resilient switch cover is provided with two or more differently textured surface portions to allow an operator to identify an audio, video or lighting function by tactile feel or touch. A delay circuit can be provided to protect the audio and/or video functions from in advertent or unintentional actuation.
US09508385B2 Audio-visual project generator
Embodiments disclosed herein enable a user to generate an audio-visual project. Certain embodiments enable a user to use one of a plurality of predefined templates to generate a project easily and quickly. Other embodiments enable a user to generate a custom project that gives more control to the user, compared to if the user selected one of the predefined templates. Each project includes one or more segments, which may be specified by a user directly, or may be specified by the template selected by the user. An effect is applied to each segment, wherein the effect specifies how many video and audio slots are included in the segment, if any, and can specify one or more other properties of the segment. Projects generated using embodiments disclosed herein can be saved and shared with other users.
US09508383B2 Method for creating a content and electronic device thereof
A method for creating a content in an electronic device is provided. The method includes acquiring first media data acquired by at least one external electronic device, acquiring second media data on a basis of at least a part of the first media data, recognizing a feature of the second media data acquired by the at least one external electronic device, and creating the content on a basis of at least a part of the feature of the second media data.
US09508381B2 DVR schedule collaboration methods and systems
An exemplary method includes a DVR schedule collaboration system 1) maintaining data representative of a plurality of DVR schedules associated with a plurality of users, 2) creating a master DVR schedule based on the plurality of DVR schedules, and 3) facilitating creation of a personal DVR schedule by a user in accordance with at least one of the master DVR schedule and one or more of the DVR schedules associated with the plurality of users. Corresponding methods and systems are also disclosed.
US09508379B2 Recording apparatus
A recording device of the present disclosure includes a light source, an objective lens, a beam splitter, an optical element, a detector and an operation circuit. The optical element divides a light beam into a first main region, a second main region, a first main end region, a second main end region, a first sub-region, and a second sub-region. The operation circuit generates a main signal in which a first main end region signal is multiplied by a coefficient a and added to the first main region signal, and a second main signal in which a second main end region signal is multiplied by the coefficient α and added to the second main region signal.
US09508376B2 Archiving imagery on digital optical tape
Methods and apparatus for archival storage of an image are disclosed. The image may be separated into a plurality of bit plane images. The plurality of bit plane images may be written separately onto digital optical tape.
US09508375B2 Modification of magnetic properties of films using ion and neutral beam implantation
Methods and apparatus for forming substrates having magnetically patterned surfaces is provided. A magnetic layer comprising one or more materials having magnetic properties is formed on the substrate. The magnetic layer is subjected to a patterning process in which selected portions of the surface of the magnetic layer are altered such that the altered portions have different magnetic properties from the non-altered portions without changing the topography of the substrate. A protective layer and a lubricant layer are deposited over the patterned magnetic layer. The patterning is accomplished through a number of alternative processes that expose substrates to energy of varying forms.
US09508373B2 Perpendicularly magnetized ultrathin film exhibiting high perpendicular magnetic anisotropy, method for manufacturing same, and application
Provided are an element structure in which a magnetic layer has a high magnetic anisotropy constant and saturated magnetization properties in a thickness of 1.5 nm or less, and a magnetic device that uses the element structure. A BCC metal nitride/CoFeB/MgO film structure that uses a nitride of a BCC metal as a seed layer is fabricated. The nitride amount in the BCC metal nitride is preferably less than 60% in terms of volume ratio based on 100% BCC metal. It is thereby possible to readily obtain a perpendicularly magnetized film having the magnetic properties that the perpendicular magnetic anisotropy is 0.1×106 erg/cm3 or more and the saturated magnetization is 200 emu/cm3 or more, even when the thickness of the magnetic layer is 0.3 nm or more and 1.5 nm or less.
US09508371B2 Slider and/or hard disc including coating, and optionally one or more additives that can dissipate electrical charge
The present disclosure relates to reducing a potential difference among a slider body and a hard disc drive platter by providing a hard disc drive platter and/or slider body with a coating that includes one or more additives that can dissipate electrical charge.
US09508368B2 Slider for heat assisted magnetic recording including a thermal sensor for monitoring laser power
An apparatus includes a light source, a slider including a sensor having a resistance or voltage that varies with the temperature of the sensor, the sensor being mounted to be heated by a portion of light emitted by the light source, and a controller controlling the light source power in response to the resistance or voltage of the sensor.
US09508367B1 Tunnel magnetoresistive sensor having conductive ceramic layers
In one general embodiment, an apparatus includes a sensor having an active tunnel magnetoresistive region, magnetic shields flanking the tunnel magnetoresistive region, and spacers between the active tunnel magnetoresistive region and the magnetic shields. The active tunnel magnetoresistive region includes a free layer, a tunnel barrier layer and a reference layer. At least one of the spacers includes an electrically conductive ceramic layer. The presence of the electrically conductive ceramic layer enables current-perpendicular-to-plane operation, while enhancing wear resistance and resistance to deformities of the thin films.
US09508366B2 Reader structure
An apparatus disclosed herein includes a sensor with a free layer having cross-track easy axis anisotropy.
US09508365B1 Magnetic reader having a crystal decoupling structure
A magnetic read apparatus has an air-bearing surface (ABS) and includes a shield, a crystal decoupling structure on the shield and a read sensor on the crystal decoupling structure. The crystal decoupling structure includes at least one of a magnetic high crystalline temperature amorphous alloy layer and a combination of a high crystalline temperature amorphous layer and an amorphous magnetic layer. The high crystalline temperature amorphous layer has a crystalline temperature of at least three hundred degrees Celsius. The amorphous magnetic layer is amorphous as-deposited.
US09508361B2 Channel apparatus for transmitting multiple differential signals
Transmission signals may generated based on three differential signals and transmitted along a channel. Each of the plurality of transmission signals may include a signal representative of each of the three differential signals. After receiving the transmission signals, the original three differential signals may be generated based on the transmission signals.
US09508356B2 Encoding device, decoding device, encoding method and decoding method
An encoding device is provided for improving decoded signal quality. A local search unit conducts a local search on a plurality of sub-bands generated by dividing spectrum data, and calculates lattice vectors for the spectra in the plurality of sub-bands. A multi-rate indexing unit uses the lattice vectors to perform multi-rate indexing on each of the sub-bands, and generates indexing information showing the results thereof. A band selection unit determines certain sub-bands from amongst the plurality of sub-bands in a plurality of encoding layers as perceptually important sub-band groups, where these are: within a selection range of sub-bands wherein the total number of encoding bits allocated to each of the plurality of sub-bands in the indexing information is equal to or less than an already set value, and within a sub-band selection range with the highest total energy of each of the plurality of sub-bands.
US09508353B2 Method and apparatus for generating a stereo signal from a down-mixed mono signal
Provided are a method and apparatus for encoding and decoding a stereo signal or a multi-channel signal. According to the method and apparatus, a stereo signal or a multi-channel signal can be encoded and/or decoded by generating parameters based on a mono signal.
US09508348B2 Pulse encoding and decoding method and pulse codec
In a pulse encoding and decoding method and a pulse codec, more than two tracks are jointly encoded, so that free codebook space in the situation of single track encoding can be combined during joint encoding to become code bits that may be saved. Furthermore, a pulse that is on each track and required to be encoded is combined according to positions, and the number of positions having pulses, distribution of the positions that have pulses on the track, and the number of pulses on each position that has a pulse are encoded separately, so as to avoid separate encoding performed on multiple pulses of a same position, thereby further saving code bits.
US09508345B1 Continuous voice sensing
Provided are methods and systems for continuous voice sensing. An example method allows for detecting and buffering, by a first module, a key phrase in an acoustic signal. Responsive to the detection, the method includes sending an interrupt to a second module and switching the first module to an omnidirectional microphone mode. Upon receiving the interrupt, the second module is operable to boot up from a low power mode to an operational mode. While the second module is booting up, the first module is operable to continue to buffer a clean speech output generated from an acoustic signal captured by at least one omnidirectional microphone. After the second module is booted, an indication may be sent to the first module that the second module is ready to exchange data through a fast connection. Upon receiving the indication, the buffered clean speech output may be sent to the second module.
US09508341B1 Active learning for lexical annotations
Features are disclosed for active learning to identify the words which are likely to improve the guessing and automatic speech recognition (ASR) after manual annotation. When a speech recognition system needs pronunciations for words, a lexicon is typically used. For unknown words, pronunciation-guessing (G2P) may be included to provide pronunciations in an unattended (e.g., automatic) fashion. However, having manually (e.g., by a human) annotated pronunciations provides better ASR than having automatic pronunciations that may, in some instances, be wrong. The included active learning features help to direct these limited annotation resources.
US09508339B2 Updating language understanding classifier models for a digital personal assistant based on crowd-sourcing
A method for updating language understanding classifier models includes receiving via one or more microphones of a computing device, a digital voice input from a user of the computing device. Natural language processing using the digital voice input is used to determine a user voice request. Upon determining the user voice request does not match at least one of a plurality of pre-defined voice commands in a schema definition of a digital personal assistant, a GUI of an end-user labeling tool is used to receive a user selection of at least one of the following: at least one intent of a plurality of available intents and/or at least one slot for the at least one intent. A labeled data set is generated by pairing the user voice request and the user selection, and is used to update a language understanding classifier.
US09508336B1 Transitioning between arrayed and in-phase speaker configurations for active noise reduction
A noise cancellation method and system comprises a system controller that produces a command signal in response to a signal from at least one microphone detecting sound in an area. The system controller includes an arrayed speaker controller for producing a driver signal for each speaker in response to the command signal such that combined sound emitted by the speakers in response to the driver signals produces a substantially uniform sound pressure field adapted to attenuate a noise field corresponding to the sound detected by the at least one microphone. The system controller includes an in-phase speaker controller for producing a common in-phase driver signal for all speakers in response to the command signal and a signal director module for proportioning the command signal between the arrayed and in-phase speaker controllers in response to a magnitude of voltage associated with driving the speakers in accordance with the command signal.
US09508334B1 Acoustical treatment with transition from absorption to diffusion and method of making
The essence of the present invention is that the thickness of a diffusive fascia of an acoustical treatment is directly correlative of the transition frequency between absorption and pure diffusion. Applicant has found that the thicker the fascia, the lower the transition frequency. For a fascia 600 microns thick, the transition between absorption and diffusion is at about 250 Hz; for a fascia having a thickness of 300 microns, the transition frequency is at about 500 Hz; for a micro-perforated fascia having a thickness of 150 microns, the transition frequency is at about 1,000 Hz; for a fascia having a thickness of 100 microns, the transition frequency is at about 2,000 Hz. An acoustical treatment is created taking these criteria into account. A method of making is also disclosed.
US09508333B2 Magnetoelectric pickup element for detecting oscillating magnetic fields
A magnetoelectric pickup device for use with a stringed musical instrument combines magnetostriction and the piezoelectric effect to detect a combination of magnetic field oscillations produced by a vibrating ferromagnetic string and acoustic vibrations from the body of the instrument itself. The result is a sound reproduction that preserves the natural acoustic timbre of the instrument.
US09508329B2 Method for producing audio file and terminal device
Embodiments of the present invention provide a method for producing an audio file and a terminal device. The method includes recording a user's voice to obtain audio information, generating a score curve according to the audio information, and displaying the score curve; receiving a polishing instruction that is sent by the user by operating the score curve, and adjusting the audio information according to the polishing instruction, and generating an audio file. The technical solutions provided in the present invention enable the user to create a song of himself or herself on the terminal device, thereby improving functions of the terminal device and meeting an application requirement of the user.
US09508327B2 Pitch adjustment device for stringed musical instruments
A pitch adjustment device for selectively adjusting the pitch of at least one of a plurality of strings on a stringed musical instrument. The device comprises a support frame configured to be mounted onto the stringed musical instrument. A string puller is rotatably coupled to the support frame. A string support is coupled to the string puller. The string support is adjustably positionable along the string puller to selectively position the string support on the string puller in alignment with each of the strings one at a time. The string support also has a string retainer for securing a string. A lever is coupled to the string puller such that pivoting the lever rotates the string puller and the string support relative to the frame about the first axis. The lever has a normal position and an actuated position in which the lever is pivoted to adjust the pitch.
US09508326B1 Unitary guitar neck, pickup and bridge mounting system
The system for mounting a guitar neck, pickup, and bridge provides a plate having a number of wings formed in pairs. The guitar body is formed with a cavity and the plate is assembled to a lower surface of the body in the cavity, the wings extending laterally beyond the cavity. The guitar neck is mounted to an extended portion of the plate. A bridge and at least one audio pickup are mounted on the plate within the cavity, the bridge supporting the guitar strings above the audio pickup.
US09508321B2 Source driver less sensitive to electrical noises for display
The present invention relates to a source driver of a display apparatus, and relates to a source driver for display apparatus insensitive to power noise, which forcibly decides an internal operation state as normality in a specific period including a power noise generation period and operates insensitively to the power noise. Accordingly, the display apparatus can normally output an image voltage even though power noise occurs.
US09508320B2 Method of transition between window states
The present invention relates to a method for moving objects within the graphical user interface (GUI) of an operating system in a manner that provides a transitional effect between window states, which is pleasing to the user. This transitional effect includes changing the shape of a window while scaling and moving the window between two different sizes and positions. In one embodiment of the present invention, the transitional effect may be employed as a window is minimized into an icon, or restored from an icon. In another embodiment of the present invention, the transitional effect is employed as a window is minimized within its title bar, or restored therefrom. The rate of movement of objects is controlled in a non-linear manner, to further enhance the pleasing effect.
US09508317B2 Display evaluation device, display evaluation method, and non-transitory computer readable medium
Provided is a display evaluation device, including a specification unit that specifies a boundary gradation value as a boundary of whether or not a viewer identifies a color of an image displayed on a display device based on display characteristics of the display device, a first output unit that generates a viewing angle evaluation image using a boundary image having a gradation value close to the specified boundary gradation value and that outputs the viewing angle evaluation image to the display device, and an evaluation unit that specifies presence or absence of a difference in appearance of the viewing angle evaluation image when the viewing angle evaluation image is viewed from plural viewing angles and that evaluates the display characteristics of the display device due to a viewing angle difference.
US09508316B2 Method, system and apparatus for rendering
A method of rendering a parametric patch. The patch is defined by a geometry and a color varying according to a surface mapping points of the patch to intermediate values. Each of the intermediate values is mapped to a color value according to a shading color function. A set of intermediate values is determined for the patch. The determined set of intermediate values represent an approximation of the shading color function by linear segments. The patch is tessellated into a plurality of cells. Tessellation points are determined for each of the plurality of cells according to the determined set of intermediate values. A further cell is formed for the patch by joining, within each of said plurality of cells, a plurality of the tessellation points being of equal intermediate value and approximating isolines of the surface. The patch is rendered using the intermediate values.
US09508315B2 Ordering rays in rendered graphics for coherent shading
There is provided a system and a method for ordering rays in rendered graphics for coherent shading. The method comprises recording, using the processor, intersection points for each of a plurality of directional queries in the memory, wherein each of the plurality of directional queries has one intersection point, organizing, using the processor, the intersection points in the memory into a plurality of elements, and grouping, using the processor, the intersection points in the memory by shading context. The method may further comprise shading the intersection points, wherein the shading is performed on a plurality of elements substantially concurrently. The shading context may include a volume of intersection points. In another implementation, the shading context may be one of texture ID, material ID, and element ID. Additionally, the texture ID may correspond to a mesh face ID.
US09508314B2 Electronic equipment and image forming apparatus
An electronic equipment includes a control unit, an EMI frequency storage unit, and a settable range detection unit. The EMI frequency storage unit stores respective frequencies of EMI noise components in ones of driving pulse signals, which are transmitted from the control unit to other modules than a display module in association with the other modules. The settable range detection unit detects a settable range of the frequency of one of the driving pulse signals, which is transmitted from the control unit to the display unit. When transmitting the driving pulse signal to the display module, the control unit sets, as the frequency of the driving pulse signal to the display module, a frequency that is a frequency excluding the frequencies of the EMI noise components stored in association with the other modules that are being driven and also is a frequency in the settable range that has been detected.
US09508313B2 Display device, program information display method in display device, receiving device, and signal transmission method in receiving device
There is provided a display device including a signal receiving unit for receiving a video signal from an external device via a transmission path through a plurality of channels using a differential signal, an information receiving unit for receiving program information from the external device using a bidirectional communication path including predetermined lines of the transmission path, an image display unit for displaying images on image display elements based on the video signal received by the signal receiving unit, and a program information display unit for displaying the program information on the image display elements based on the program information received by the information receiving unit.
US09508312B2 Mechanism for facilitating dynamic counter synchronization and packetization in high-definition multimedia interface and mobile high-definition link
A mechanism for facilitating dynamic counter synchronization and packetization for data streams being communicated over communication devices is described. In one embodiment, a method includes detecting an audio/video (A/V) data stream being encrypted and/or decrypted using one or more high-bandwidth digital content protection (HDCP) engines, where the A/V data stream is communicated between a source device and a sink device. The method may further include dividing a video stream portion of the A/V data stream into a plurality of frames if the A/V data stream relates to a high-definition multimedia interface (HDMI), and synchronizing counter values with indicators within the plurality of frames.
US09508310B2 Manual switch system for outputting multimedia content to a digital sign
The present invention extends to a manual switch system for selecting multimedia content from one or various source inputs to be provided to a digital display. The manual switch system of the present invention provides a compact, convenient, and simple to use solution for updating a digital display in many environments. In a particular example, the manual switch can be used within a fast food restaurant to quickly and easily update the menu such as when the restaurant switches from serving breakfast to lunch or dinner.
US09508308B1 Display device control method
The patent application relates to a method of controlling a display device including display elements arranged in a matrix with n rows of display elements. The method includes: driving a first row of display elements, with a first output of a driving system being connected to the first row and disconnected from at least one further row of display elements.
US09508305B2 Display panel driving device and display device
A display device is provided that effectively reduces noise generated inside a display panel such as a liquid crystal panel. The source driving unit of the display device includes positive amplifiers, negative amplifiers, a positive amplifier regulating unit and a negative amplifier regulating unit. The positive amplifiers transmit positive driving signals to the display panel unit via source lines. The negative amplifiers transmit negative driving signals to the display panel via source lines. The positive amplifier regulating unit regulates the timing for the positive amplifiers to output positive driving signals. The negative amplifier regulating unit regulates the timing for the negative amplifiers to output negative driving signals.
US09508302B2 Apparatus to supply power in display device
Exemplary embodiments of the present invention relate to a power supply of a display device that includes a driving circuit and a display panel that displays an image according to an output data voltage transmitted from the driving circuit. The power supply includes a first booster and a second booster provided in the driving circuit, the first booster generates a first output voltage supplied to an Op-amp of a source output circuit of the driving circuit, and the second booster generates a second output voltage supplied to buffers of the source output circuit of the driving circuit.
US09508299B2 Method of driving a display panel and a display apparatus performing the method
A method of driving a display panel includes providing a boosting voltage line on the display panel with a boosting voltage, compensating the boosting voltage based on a feedback boosting voltage received from the display panel, and providing the boosting voltage line on the display panel with the compensated boosting voltage. The display panel includes a first sub pixel. The first sub pixel includes a first switching element and a first boosting switching element, the first switching element is connected to a first liquid crystal (LC) capacitor, a gate line, an m-th data line and a first electrode of the first LC capacitor, and the first boosting switching element is connected to the boosted voltage line, and ‘m’ is a natural number.
US09508297B2 Liquid-crystal-driving method and liquid crystal display device
The present invention provides a liquid-crystal-driving method of driving liquid crystal by causing a potential difference between a pair of electrodes provided for one of upper and lower substrates, wherein a DC image sticking and a flicker are sufficiently reduced, and a liquid crystal display device driven by using the liquid-crystal-driving method. The present invention relates to a method of driving liquid crystal by causing a potential difference between a pair of electrodes provided for one of upper and lower substrates. In the liquid-crystal-driving method, a driving operation of driving liquid crystal by causing a potential between a pair of electrodes is executed. In the driving operation, the absolute value of a second offset voltage is larger than that of a first offset voltage.
US09508293B2 Liquid crystal display device
A device according to an embodiment includes an array substrate, a color filter substrate including color filters corresponding to pixels, a liquid crystal layer provided between the substrates, a backlight unit, and a controller. The controller controls an application timing of a driving voltage to the pixel electrodes, and a light emission timing of the backlight unit. Each of the pixels has a shape elongated in a lateral direction. Identical colors of the pixels are arranged in the lateral direction, and different colors of the pixels are arranged in a vertical direction. Pixels neighboring in the lateral direction have shapes of line-symmetry with respect to a center line of the neighboring pixels, and liquid crystal molecules of them tilt in directions of the line-symmetry with respect to the center line when the driving voltage is applied to the pixel electrodes corresponding to the neighboring pixels.
US09508283B2 Light emitting diode block display device using a user contact and input for adjusting color
The present invention relates to a display device using LED blocks, which includes at least one LED block having an LED installed. The LED block adjusts the color of light displayed according to the contact by the user. According to the present invention, the display device using LED blocks includes: at least one LED block including a plurality of installed color LEDs and a contact sensing unit for sensing contact by the user; and a controller for adjusting the color of light displayed by the LED block on the basis of the color data corresponding to the contact data which is generated by the contact sensing unit in accordance with contact by the user.
US09508282B2 Virtualized display output ports configuration
A virtualized DisplayPort (DP) configuration data (DPCD) for multi-stream transport (MST) logical DP end points and non-DP end points allows DPCD configuration for links within a DisplayPort topology which are not configurable using DPCD. A virtualized DPCD may configure a link to an internal display of a MST sink device or a non-DP display to receive data using a dynamic refresh rate (DRR), display stream compression (DSC), panel self-refresh (PSR) and other DPCD configurable features.
US09508277B2 Display device, driving method of display device and data processing and outputting method of timing control circuit
A display device includes a timing control circuit, a first data driving circuit, and a second data driving circuit. The first data driving circuit receives the first clock embedded training data from the timing control circuit, performs a first clock training to adjust a work frequency of the data driving circuit to be equal to the frequency of a first clock signal, and receives the first clock embedded image data from the timing control circuit. The second data driving circuit receives a second clock embedded training data from the timing control circuit, performs a second clock training to adjust a work frequency of the data driving circuit to be equal to the frequency of a second clock signal, and receives the second clock embedded image data from the timing control circuit. The frequency of the first clock signal is different from that of the second clock signal.
US09508266B2 Cross-classroom and cross-institution item validation
Anonymous pretesting items for subsequent presentation to participants in a group enable an instructor to validate responses and revise the items accordingly.
US09508263B1 Generating a mission plan for capturing aerial images with an unmanned aerial vehicle
Systems and methods are disclosed for generating a digital flight path within complex mission boundaries. In particular, in one or more embodiments, systems and methods generate flight legs that traverse a target site within mission boundaries. Moreover, one or more embodiments include systems and methods that utilize linking algorithms to connect the generated flight legs into a flight path. Moreover, one or more embodiments include systems and methods that generate a mission plan based on the flight path. In one or more embodiments, the generated mission plan enables a UAV to traverse a flight area within mission boundaries and capture aerial images with regard to the target site.
US09508252B2 Control target selection
A system of devices includes a plurality of devices such as a sink device, a source device and an intermediate device. In one embodiment, a first device propagates to a second device, via a multimedia link, an address of the first device in association with an indication that the first device is a master for a remote control command type. The second device responsive to receiving a remote control command from a remote control identifies the remote control command type of the remote control command. Responsive to the command type of the received remote control command being the remote control command type that the first device is the master for, the second device forwards the received remote control command using the address of the first device. The first device upon receiving the remote control command modifies a multimedia output by the first device based on the remote control command received.
US09508246B2 In-vehicle charging device, automobile and charging system
During charging of a mobile device by a charging coil, a charge controller acquires information of the seating position of the owner of the mobile device, through a short-range wireless communicating section, and therefore issues an alarm when a person who causes the mobile device to be charged performs an operation of leaving from the seating position. Consequently, it is possible to prevent the mobile device from being left in a vehicle.
US09508245B2 Sewer alarm apparatus with probe extending through a monitored pipe
According to some embodiments, sewer alarm devices and apparatus are provided for detecting the presence of liquid within a pipe. In some embodiments, the devices and apparatus include a housing defining an interior volume, the housing including a top portion and a bottom portion, the bottom portion mounted on an exterior surface of the pipe. At least a first mounting portion extends outwardly from the housing and receives at least a first strap securing the housing to the exterior surface of the pipe. A probe housing extends from the interior volume of the housing to an interior of the pipe, and at least a first probe is disposed within the probe housing and exposed to the interior of the pipe along a first direction substantially along a center axis of the pipe.
US09508242B2 Pool alarm system
Pool alarm system for detecting the introduction and/or presence of a body in a liquid pool. The system includes: a first sensor for sensing audio signals generated by the body in the pool; a second sensor for sensing water pressure signals generated by the body in the pool; an analog signal processor for pre-processing the audio signals and water pressure signals and for converting them to digital data; an alarm device activated when the body was detected in the pool; a processor and control unit. The audio signals are detected and processed faster than the detection of the water pressure signal. According to the intensity of an acoustic signature originating from the audible signals an aquatic signature originating from the water pressure sensor is analyzed using an adaptable sensitivity parameter dependent on the intensity of the acoustic signature for improving alarm triggering decision.
US09508241B2 Wearable personal locator device with removal indicator
Disclosed is a wearable personal locator device that communicates the location of a wearer to an administrator input terminal. The device is a wearable structure comprising either a wristband or adhesive patch, whereby the device registers whether or not the device is actively being worn by the wearer and provides a means to receive alert signals sent from the administrator input terminal. The device includes a processing unit, a power source, an antenna, and a communication means for processing and transmitting location data to the remote input terminal. The device further comprises one of several wearer contact means, including a heat sensor for registering body heat of the wearer, a pressure sensor adapted to be pressed against the wearer, or a frangible circuit that registers when the device is removed from the wearer. The device provides a location monitoring means for children traveling in groups with at least one administrator.
US09508239B1 Doorbell package detection systems and methods
Delivery parcel detection systems can include a remote computing device and a doorbell configured to detect a delivery parcel. The doorbell can have a wireless communication system and a radio frequency identification reader. The remote computing device can be communicatively coupled with the doorbell via the wireless communication system. The delivery parcel can have a radio-frequency identification tag. The doorbell can be configured to detect the delivery parcel by detecting the radio-frequency identification tag.
US09508238B2 Electronic article surveillance portal
A system and device for detecting and/or deactivating a security tag when passing through an electronic article surveillance (EAS) portal. The portal may be oriented by the arrangement of one or more antennas to generate an electromagnetic field at or within the portal to detect and/or deactivate the security tag. The electromagnetic field may detect and/or deactivate a security tag located at any orientation on merchandise as the security tag passes through the portal. The portal may be mounted on a counter at a point-of-sale station in which merchandise having security tags attached thereto are passed through the portal. The portal may also be mounted to a floor in which a shopping cart having merchandise is passed through the portal so that security tags attached to the merchandise in the cart are detected and/or deactivated.
US09508231B2 Banknote pay-in/pay-out device and banknote transaction device
An automated teller machine includes: a customer interface that receives operation relating to banknotes; a pay-in/pay-out port section that takes in banknotes from the outside and dispenses banknotes to the outside; a classification section that classifies the banknotes; a front conveyance section that conveys the banknotes between the pay-in/pay-out port section and the classification section; banknote storage boxes that are provided below the classification section, and that store normal banknotes determined to be normal by the classification section from out of the banknotes inserted into the pay-in/pay-out port section; a sorting conveyance section that is provided below the classification section, that sorts the normal banknotes into the banknote storage boxes according to denomination, and that retains a pay-in reject banknote determined to be unsuitable for pay-in by the classification section; and a rear conveyance section that conveys the banknotes between the classification section and the sorting conveyance section.
US09508229B2 Systems and methods for bingo-style games
Systems, methods, and articles of manufacture provide for new features and functionality of bingo-style games.
US09508219B2 Dynamic management of wagering game availability
A wagering game system and its operations are described herein. In some embodiments, the operations can include initiating, at a wagering game server, a secondary game for presentation on a wagering game machine. The secondary game may be associated with a primary wagering game being presented on the wagering game machine. The operations can also include detecting that the secondary game becomes unavailable for play while the secondary game is being presented on the wagering game machine, and determining identification information associated with a player of the primary wagering game and the secondary game. The operations can further include generating results for the secondary game associated with the player after the secondary game is available for play, and providing an award, depending on the secondary game results, to the player using the identification information.
US09508218B2 Gaming system download network architecture
Download distribution points are geographically distributed throughout the at least one casino property and a download and configuration management server determines relatively optimal download distribution points for downloading to gaming machines and points the gaming machines to the optimal download distribution point. Optimization may be based on one or more of geographic location, network location, availability, connection speed, and/or availability of a given package of gaming machines instructions at the download distribution point. A map, directory or library may be maintained indicative of where specific packages of gaming machine instructions reside.
US09508216B2 Gambling game objectification and abstraction
Systems and methods for configuring a gaming system. In one such gaming system, a plurality of real world engine modules are provided for a hybrid game, each real world engine module having a gambling game that is triggered by an element of an entertainment game of the hybrid game. A selection is received, from a player of the hybrid game, of a selected real world engine module of the plurality of real world engine modules, and triggering is enabled of the selected real world engine module's gambling game by the element of the entertainment game of the hybrid game.
US09508211B2 Merchandiser
The present application provides a merchandiser for dispensing a number of products. The merchandiser may include an a temperature controlled compartment with a number of concentric storage wheels for storing the number of products therein, an input system positioned about the temperature controlled compartment, and a vending system positioned about the temperature controlled compartment.
US09508209B2 Ultraviolet anti-counterfeiting check verification method
The invention relates to a ultraviolet anti-counterfeiting check verification method which solves subjective defect and time consuming problems of the traditional verification methods, and comprises the following steps: a. collecting ultraviolet gray level image by a ultraviolet scanner; b. extracting a first binary image from the ultraviolet gray level image; c. calculating a tilt angle of the first binary image; d. calculating tilt correction positions of pixels of the ultraviolet gray level image and the first binary image; e. determining a top left corner locating position of a first binary image rectangle; f. extracting a second binary image from the tilt corrected ultraviolet gray level image; g. performing position correction on the second binary image of a check to be verified; and h. calculating the matching degree between the second binary image of the check to be verified and a second binary image of a real check to verify authenticity.
US09508208B1 Systems, methods and devices for processing coins with linear array of coin imaging sensors
Currency processing systems, coin processing machines, and methods of imaging coins are presented herein. A currency processing system is disclosed which includes a housing with a coin input area for receiving coins and coin receptacles for stowing processed coins. A disk-type coin processing unit is coupled to the coin input area and coin receptacles. The disk-type coin processing unit includes a rotatable disk for imparting motion to the coins, and a sorting head having a lower surface adjacent the rotatable disk. The lower surface forms various shaped regions for guiding the coins, under the motion imparted by the rotatable disk, to exit channels through which the coins are discharged to the coin receptacles. A linear array of sensors is mounted to the sorting head and/or the rotatable disk. The sensors examine each coin on the rotatable disk and output a signal indicative of coin image information for processing the coin.
US09508205B1 Method, apparatus, and computer-readable medium for enrollment
Presented are a method, apparatus, and computer-readable medium for enrollment. The method includes receiving, at a user equipment (UE), one of a plurality of predetermined user identifiers, the UE having access to the plurality of predetermined user identifiers stored in a memory, and creating a biometric template corresponding to at least one biometric scan of the user. The method further includes storing the created biometric template, wherein the created biometric template is associated with the one of the plurality of user identifiers.
US09508204B2 Package exchange and service system using a key fob simulator
A key fob simulator for sending actuation command to a vehicle is discussed. The key fob has memory buffers, processors, and a transceiver that uses wireless communications to communicate with a backend cloud-based system. A RF transmitter of the key fob can transmit RF signals to Remote Keyless Entry (RKE) module of the vehicle. A mapping module includes a map-calculating circuit to calculate map coordinates of the key fob. A security module can receive a rolling security key of the RKE module of the vehicle. The key fob includes buttons that can be pushed by a user of the key fob to generate actuation commands by the security module. Using the RF transmitter, an actuation command and the rolling security key can be sent from security module to the RKE module of the vehicle. The RKE module then executes the actuation command after validating the rolling security key.
US09508203B2 Tactical security system
A tactical security system can be used to secure a room. For example, such a security system may be contained in a housing sized for shipment to a location for placement in a room in order to secure the room. Various components may be included in the housing, such as a storage device configured to store data received from one or more audio or video recording devices; an access controller configured to interface with a badge reader associated with one or more access points to the room in order to selectively control access to the room; a switch configured to couple the one or more audio or video recording devices with the storage device and to couple the badge reader with the access controller; and/or a power supply configured to supply power to the devices in the housing.
US09508199B2 Mobile device communicating with motor vehicle system
A vehicle system is in communication with a mobile device. The vehicle system receives information from the mobile device and determines the quality of the information. If the quality of the information is acceptable, the vehicle system may use the information from the mobile device. In addition, the quality of the information may be used to determine if the information should be sent to other vehicles.
US09508198B1 Meters and upgraded meter cover with sensor
Meters and meter covers comprising: a removable cover housing configured to accommodate the upper portion of the internal components of an existing meter, the cover housing engageable with the housing base of the existing meter to cover and enclose the internal components of the existing meter; a sensor affixed to the cover housing, the sensor configured to collect environmental information pertaining to the local external environment of the existing meter; a wireless radio affixed to the cover housing, the wireless radio configured to transmit the environmental information to the existing meter or to a remote server in communication with the existing meter; and a power unit affixed to the cover housing, the power unit supplying power to the sensor and the wireless radio.
US09508196B2 Compact scalable three dimensional model generation
A user equipment (UE) comprising a processor configured to generate a three dimensional (3D) model by obtaining a 3D mesh comprising a plurality of reference markers, positioning at least one first order virtual object onto a surface of the mesh by associating the first order virtual object to at least one of the mesh reference markers, wherein the first order virtual object comprises a plurality of reference markers, and positioning at least one second order virtual object onto a surface of the mesh by associating the second order virtual object to at least one of the first order virtual object reference markers.
US09508195B2 Management of content in a 3D holographic environment
Methods for managing content within an interactive augmented reality environment are described. An augmented reality environment may be provided to an end user of a head-mounted display device (HMD) in which content (e.g., webpages) may be displayed to the end user using one or more curved slates that are positioned on a virtual cylinder that appears body-locked to the end user. The virtual cylinder may be located around the end user with the end user positioned in the middle of the virtual cylinder such that the one or more curved slates appear to be displayed at the same distance from the end user. The position and size of each of the one or more curved slates may be controlled by the end user using head gestures and a virtual pointer projected onto the virtual cylinder.
US09508193B2 Apparatus, method, and non-transitory tangible computer readable medium thereof for creating 3D scene
Apparatuses, methods, and non-transitory tangible computer readable media thereof for creating a 3D scene are provided. The apparatus generates a height map according to a plurality of depth data of an image. The apparatus finds a first region of the height map, wherein the depth data within the first region change more greatly than the depth data outside the first region. The apparatus creates a plurality of grids on a plane according to the first region and generate a 3D mesh by morphing the height map with the grids of the plane. The plane and the height map are of the same size, a second region within the plane corresponds to the first region of the height map, and the grids inside the second region has a finer resolution than the grids outside the second region. The apparatus generates the 3D scene by mapping the image onto the 3D mesh.
US09508184B2 Generating a multi-layered geographic image and the use thereof
Systems, devices, features, and methods for generating and/or using a multi-layered image are disclosed. For example, a method of creating a multi-layered image from a three-dimensional model of a geographic area includes receiving three-dimensional graphical object data that represents a geographic area. The three-dimensional graphical object includes multiple geographic features. A first graphical layer of a first geographic feature of the three-dimensional graphical object is rendered as a first independent image layer. A second graphical layer of a second geographic feature of the three-dimensional graphical object is rendered as a second independent image layer. The first graphical layer and the second graphical layer are combined or overlaid to form the multi-layered image. Also, removal of layers may occur in a reverse order of their creation and/or may avoid causing gaps within the other layers not removed.
US09508177B2 Method of controlling skeleton model, and recording medium therewith
A method of controlling a model by a computer, includes accepting an instruction of changing a pose or a movement of a standard model for which control data for joint angles is attached; determining a pose or a movement of the standard model based on the instruction and the control data for joint angles; and determining a pose or a movement of a target model to be controlled where parts of the standard model and parts of the target model being in correspondence with each other, such that the pose or the movement of the target model follows the pose or the movement of the determined standard model based on the correspondence of the parts of the standard model and the parts of the target model.
US09508174B2 Display device and non-transitory storage medium storing instructions executable by the display device
A non-transitory storage medium stores instructions executable by a display device including an image taking device and a display. The instructions cause the display device to perform: displaying a real-space image being taken by the image taking device; displaying a content disposed in an augmented reality space and the real-space image in combination, when a marker associated with the content exists in the real-space image; keeping displaying the content, when an instruction for keeping displaying the content is provided with the content being displayed; displaying the content when the instruction is not provided and when the marker exists in the real-space image; and not displaying the content when the instruction is not provided and when the marker does not exist in the real-space image.
US09508172B1 Methods and devices for outputting a zoom sequence
Certain embodiments of this disclosure include methods and devices for outputting a zoom sequence. According to one embodiment, a method is provided. The method may include: (i) determining first location information from first metadata associated with one or more images, wherein the first location information identifies a first location; and (ii) outputting, for display, a first zoom sequence based on the first location information, wherein the first zoom sequence may include a first plurality of mapped images of the first location from a first plurality of zoom levels and the plurality of mapped images are sequentially ordered by a magnitude of the zoom level.
US09508171B2 Path tracing method
Disclosed is a method of rendering at least one graphical object comprising a plurality of sub parts described with a page description language format, said method comprising the steps of: converting the at least one graphical object into a first edge pair and a second edge pair, wherein the first edge pair and the second edge pair are vertically separated by a scanline gap; joining the second edge pair and the first edge pair to make a corresponding new edge pair having an empty fill portion in the scanline gap; and processing the new edge pair to render the at least one graphical object.
US09508170B2 Image display apparatus and image display method
An image display apparatus for displaying an image containing a plurality of objects includes a setting unit configured to set a display magnification and a display position according to an attribute of a display target object when a first display mode for displaying each object included in the image is specified, and a display control unit configured to perform control to display on a screen the image containing the display target object based on the display magnification and the display position set by the setting unit.
US09508167B2 Method and apparatus for high-dimensional data visualization
A method and an apparatus are provided to visualize high-dimensional data. The method includes primarily visualizing the high-dimensional data at a dimension lower than the high-dimensional data to obtain a primarily-visualized image. The method also includes secondarily visualizing the high-dimensional data in an area of the primarily-visualized image at a dimension higher than the primarily-visualized image to obtain a secondarily-visualized image.
US09508163B2 Accelerated iterative reconstruction
A framework for an iterative reconstruction algorithm is described which combines two or more of an ordered subset method, a preconditioner method, and a nested loop method. In one type of implementation a nested loop (NL) structure is employed where the inner loop sub-problems are solved using ordered subset (OS) methods. The inner loop may be solved using OS and a preconditioner method. In other implementations, the inner loop problems are created by augmented Lagrangian methods and then solved using OS method.
US09508162B2 Method and system for rapidly vectorizing image by gradient meshes based on parameterization
The present invention discloses a method for rapidly vectorizing an image by gradient meshes based on parameterization, which comprises the following steps: determining an image region to be vectorized (S1); converting the image region into a mesh representation (S2); mapping the meshes to a planar rectangular region by parameterizing the meshes (S3); and generating a gradient mesh image according to the parameterization result of said meshes (S4). The present invention generates gradient meshes by converting an image region into meshes and by parameterization, so the gradient meshes are obtained completely automatically without the need for the user to give original meshes and moreover, the computation speed is improved significantly since nonlinear optimization is avoided. In addition, the method of the present invention can process image regions containing or not containing holes.
US09508161B2 Device and method for processing notification data
A method of generating display objects comprises operating a processor to: detect an occurrence of an event; define a display time associated with a predefined duration following the occurrence of the event; generate a first display object for display for by a display device for the predefined duration, wherein the first display object is representative of the detected event; output the first display object on the display device; generate a second display object for display by a display device for the predefined duration, wherein the second display object is indicative of the display time; output the second display object on the display device; and update the second display object based on an elapsed time of the predefined duration. A device and executable computer program for performing the steps of the method is also provided.
US09508159B2 Image database constructing method and device using the same
Disclosed is a device for constructing image database, including: an image input unit for receiving an image; and a building identification unit configured to map the image to a three-dimensional map based on photographing information of the image, to project direction vectors toward respective locations of the image that are mapped to the three-dimensional map from a photographing position of the image, and to distinguish buildings from the image based on whether the respective direction vectors collide or not.
US09508158B2 Palette generation using user-selected images
Automatic generation of custom palettes based on an image selected by a user is disclosed. In various embodiments, automatic palette generation may involve generating one or more than one palette based on the color or shading content of the image provided by the user. The generated palette may include a variety of colors (or shadings) that can be automatically mapped to and applied to various distinct features within a composite graphic construct to be customized.
US09508152B2 Object learning and recognition method and system
An object recognition system is provided. The object recognition system for recognizing an object may include an input unit to receive, as an input, a depth image representing an object to be analyzed, and a processing unit to recognize a visible object part and a hidden object part of the object, from the depth image, by using a classification tree. The object recognition system may include a classification tree learning apparatus to generate the classification tree.
US09508151B2 Systems, methods, and devices for image matching and object recognition in images using image regions
A computer-implemented method for determining whether a first image contains at least a portion of a second image, includes: dividing set first image into multiple image regions; for a particular image region of the multiple image regions, determining a particular set of feature points associated with the particular image region; and attempting to match feature points in the particular set of feature points with second feature points associated with the second image to determine whether the particular image region of the first image contains at least a portion of the second image, wherein the first image is considered to contain at least a portion of a second image when the particular image region of the first image contains at least a portion of the second image.
US09508150B1 Point of interest based alignment of representations of three dimensional objects
A non-transitory computer readable medium that stores instructions that once executed by a computer cause the computer to execute the stages of: calculating first curvature attributes of first areas of a first representation of a first three dimensional object; calculating second curvature attributes of second areas of a second representation of a second three dimensional object; selecting first points of interest of the first representation in response to the first curvature attributes; selecting second points of interest of the second representation in response to the second curvature attributes; classifying the first points of interest to first classes; classifying the second points of interest to second classes; calculating multiple sets of first vectors that are indicative of spatial relationships between first points of interest, wherein different sets out of the multiple sets of the first vectors are associated with different first classes; calculating multiple sets of second vectors that are indicative of spatial relationships between second points of interest, wherein different sets out of the multiple sets of the second vectors are associated with different second classes; and determining a misalignment between the first and second representations of the first and second objects in response to relationships between the multiple sets of first vectors and the multiple sets of the second vectors.
US09508145B2 Determination of a change of position of a bony structure in radiation therapy
The present invention refers to a data processing method for use in the field of radiation therapy and for determining a relative position between the position of the bony structure and a reference position at a monitoring time, the relative position being referred to as monitoring bone position, wherein an anatomical structure of a patient includes the bony structure and a treatment body part to be treated by at least one treatment beam of a treatment device, the reference position having a defined relative position with respect to an actual arrangement of at least one position of the at least one treatment beam; the data processing method being constituted to be performed by a computer and comprising the following steps: •providing CBCT image data describing a three-dimensional CBCT image of the bony structure, the CBCT image representing the bony structure at a pre-alignment time; •providing x-ray image data describing at least one two-dimensional x-ray image of the anatomical structure, the at least one two-dimensional x-ray image representing the bony structure (110) and the x-ray image data being generated at the monitoring time; •providing imaging position data comprising at least one of CBCT position data and x-ray geometry data, CBCT position data describing the relative position between the CBCT image and the actual arrangement and the x-ray geometry data describing a positional relationship between the actual arrangement and at least one imaging geometry, referred to as x-ray imaging geometry, given for generating the at least one x-ray image; •determining the relative position between the bony structure and the reference position at the monitoring time on the basis of the CBCT image data, the x-ray image data and the imaging position data.
US09508143B2 Apparatus and method for marking region of interest
An apparatus and method thereof include an observation map generator configured to generate a three-dimensional (3D) observation map based on display frequency and/or display duration of a cross-sectional image of a 3D volume image, wherein the 3D observation map three-dimensionally represents degrees of interest for each voxel of the 3D volume image. The apparatus also includes a region of interest marker configured to mark a region of interest.
US09508137B2 Automated patron guidance
In one embodiment, a method comprises determining, by a first access network computing node at a venue, a position of a person based on an image of the person captured with at least one camera at the venue; controlling rendering, by the first access network computing node, of an icon moving toward a destination in response to a determined movement of the person; and handing-off, by the first access network computing node, the controlling rendering of the icon to a second access network computing node in response to the position of the person moving from a first domain zone associated with the first access network computing node to a second domain zone associated with the second access network computing node.
US09508133B2 System and method for generating an image result based on availability of a network resource
A system, method, and computer program product are provided for generating an image result based on availability of a network resource. In use, a request is received for one or more image operations. Additionally, an availability of a network resource is identified. Next, if the network resource is not available, a result is generated using a subset of the one or more image operations. Further, if the network resource is available, a result is generated using each of the one or more image operations. Additional systems, methods, and computer program products are also presented.
US09508129B1 Dehazing photos and videos using visual artifact suppression
Methods and systems for dehazing images with increased accuracy and reduced error enhancement. In particular, one or more embodiments estimate a transmission map representing an amount of unscattered light reflected from objects in an input image. One or more embodiments refine the transmission map to obtain transmission information consistent with a depth of the objects in the input image. One or more embodiments also determine a radiance gradient for the input image. One or more embodiments generate an output image from the input image by removing haze based on the refined transmission map and preventing error enhancement based on the determined radiance gradient.
US09508110B2 Unobtrusive audio messages
A method for providing audio messages includes receiving a first image set and a second image set. The first image set includes visually encoded audio data for rendering audio on an electronic computing device. The method also includes displaying images from the first and second image sets interspersed in an image sequence. In the image sequence, a time interval between each image from the first image set and at least one image from the second image set is less than a critical flicker interval (CFI) for a human eye.
US09508109B2 Graphics processing
An embodiment of the present invention includes a device for real-time graphics processing. The device includes an interface coupled to exterior for receiving external data. The device includes a data converter coupled to the interface for converting the external data received from the interface. The device includes a graphics processing unit coupled to the data converter to process the external data that has been converted.
US09508108B1 Hardware-accelerated graphics for user interface elements in web applications
Some embodiments provide a system that renders a user interface (UI) element for a web application. During operation, the system loads the web application in a web browser and obtains a rendering request for the UI element from the web application. Next, the system generates a graphics-processing unit (GPU) command stream corresponding to the UI element based on the rendering request. Finally, the system sends the GPU command stream to a GPU, where the UI element is rendered by the GPU.
US09508101B1 Systems and methods for providing stock ticker information
A system generates a ticker result, which may be a uniform resource locator (URL) corresponding to a quote provider. The system receives a string of information and determines whether all terms in the string of information correspond to ticker symbols. If all terms in the string of information correspond to ticker symbols, the system may ascertain whether the string of information corresponds to a query for ticker information. If the string of information corresponds to a query for ticker information, the ticker information (e.g., a ticker result) may be provided.
US09508091B2 Interactive property communication system
Disclosed herein, among other things, are apparatus and methods for interactive property communication. In various embodiments, an interactive property communication system includes two or more property communication nodes (PCNs) each adapted for coupling to an electrical service. PCNs include a radio transceiver for communications with a broker service adapted for controlling communications with one or more PCNs.
US09508090B1 End user participation in mobile advertisement
Embodiments of the disclosure are directed to methods and systems for customizing advertising content for use on a mobile communication device. A user may be allowed to customize the advertisement content that is presented on their device. This may be accomplished by monitoring the advertisement activity on the mobile device and then allowing the user to customize advertisements from that monitored activity. The functionality may be provided by a customization application executed by the device, individual communication applications executed by the device, and/or an ad gateway in communication with the device.
US09508089B2 Method and systems for directing profile-based electronic advertisements via an intermediary ad network to visitors who later visit media properties
An automatic system facilitates selection of media properties on which to display an advertisement, responsive to a profile collected on a first media property, where a behavioral-targeting company calculates expected profit for an ad correlated with the profile and arranges for the visitor to be tagged with a tag readable by the selected media property. The profit can be calculated by deducting, from the revenues that are expected to be generated from an ad delivered based on the collected profile, at least the price of ad space at a media property where the BT company might like to deliver ads to the profiled visitor. When the calculated profit is positive (i.e., not a loss), the BT company arranges for the visitor to be tagged with a tag readable by the selected media property through which the BT company expects to profit.
US09508087B1 Identifying similar display items for potential placement of content items therein
Apparatus and method for identifying similar publisher display items for potential placement of content items therein. In accordance with some embodiments, a population of publisher display items is provided each adapted to be respectively displayed on a graphical user interface (GUI) of a network accessible device. The display items are sorted into sets of similar display items responsive to user interactions with said display items so that, for each display item in the population, a number of similar display items is associated therewith. A content item is received for potential display in conjunction with the display of a first selected display item in the population of display items. The content item is thereafter displayed in one of the other display items of the set of similar display items associated with the first selected display item.
US09508084B2 System, method and computer program product for predicting item preference using revenue-weighted collaborative filter
Embodiments disclosed provide a system, method, and computer program product for identifying consumer items more likely to be bought by an individual user. In some embodiments, a collaborative filter may be used to rank items based on the degree to which they match user preferences. The collaborative filter may be hierarchical and may take various factors into consideration. Example factors may include the similarity among items based on observable features, a summary of aggregate online search behavior across multiple users, the item features determined to be most important to the individual user, and a baseline item against which a conditional probability of another item being selected is measured.
US09508082B1 Offline location-based consumer metrics using online signals
A business monitoring system is described herein that brings together the previously separate worlds of social media and offline secret shopper and similar programs. With the business monitoring system, owners of brands are able to monitor the local voice of the customer to detect local and regional trends in sentiment and activity, build benchmarks and goals for local storefronts, evaluate in-store operations and customer service trends, and measure the local impact of marketing and advertising initiatives. The system collects and analyzes signals from online sources, producing reports, analytics, benchmarks, and alerts regarding offline activity at the local/store-front level. The system normalizes the signals from various sources, analyzes the signals at the individual location level, aggregates the data across various dimensions, builds benchmarks for comparison, and fires triggers notifying appropriate people upon detecting a meaningful variance. Thus, the system provides a rich and timely set of information to business decision makers.
US09508080B2 System and method of presenting a commercial product by inserting digital content into a video stream
In a commerce system, a commercial product is presented by transmitting a video stream through a communication link to present as an image on a video display. The image including a representation of the commercial product. An interactive device is used by a consumer to select a portion of the image on the video display representing the commercial product. The information related to the commercial product, such as product description, price, and ordering, is retrieved from a database or electronic search based on the selected portion of the image on the video display. Digital content containing the information related to the commercial product is generated by an adverting agent, manufacturer, or retailer. The digital content is inserted into the video stream to form composite video. The composite video is displayed on the video display to assist the consumer in completing a transaction to acquire the commercial product.
US09508079B2 Privacy-counscious advertising
Various exemplary embodiments relate to a method and related network element including one or more of the following: receiving a plurality of advertisement messages via the communications network, each advertisement message of the plurality of advertisement messages including a set of meta-information which describes the content of an advertisement associated with the advertisement message; determining whether each advertisement message is relevant to the user by comparing the set of meta-information to a set of user preferences associated with the user, the set of user preferences stored locally on the user node; when an advertisement message is determined to not be relevant to the user, discarding the advertisement message; and when an advertisement message is determined to be relevant to the user, providing the user with access to the advertisement associated with the advertisement message.
US09508072B2 Secure payment instruction system
A method for providing secure payment instructions includes verifying a payer device for use in a transaction with a payee device. When a request is received from the payee device for payer information associated with a payment account being used by the payer device in the transaction, a security font is generated and associating in a database at least one payer information font character with payer information that is associated with the payer account. The at least one payer information font character is then provided to the payee device, and when a request for the security font is received and determined to be from the verified payer device, the security font is provided to the verified payer device such that the at least one payer information font character may be converted to the payer information for display on the payer device.
US09508069B2 Rendering payments with mobile phone assistance
Methods and arrangements for effecting payments via a mobile phone. A purchase request is received from a merchant on behalf of a customer. A code is provided to the customer via the merchant, via a first communication path. A purchase confirmation is directly received from the customer, the purchase confirmation being prompted by provision of the code to the customer. The purchase is validated via using the purchase confirmation from the customer via a second communication path different from the first communication path. Other variants and embodiments are broadly contemplated herein.
US09508068B2 Systems and methods for processing a contactless transaction card
Embodiments of the invention relate to systems and methods for processing a contactless card transaction. In one embodiment, a method for processing a contactless transaction card can be provided. The method can include receiving an input associated with a selection of at least one payment option. Further, the method can include based at least in part on the input, activating a contactless transaction card reader and initiating a corresponding transaction application program. In addition, the method can include receiving account information from the contactless transaction card via the contactless transaction card reader. Moreover, the method can include advancing a transaction counter associated with the contactless transaction card and a transaction counter associated with the corresponding transaction application program.
US09508066B2 Mobile kiosk for enhanced financial product offerings
A mobile kiosk comprising a vehicle and a kiosk portion coupled to the vehicle. The mobile kiosk receives information for a first configuration of financial products and applies the first configuration to the mobile kiosk based on a user profile of a first user. It provisions a first set of the financial products while the mobile kiosk is configured according to the first configuration. The mobile kiosk receives information for a second configuration of the financial products and applies the second configuration to the mobile kiosk based on a user profile of a second user. It provisions a second set of the financial products while the mobile kiosk is configured according to the second configuration.
US09508065B2 Method and apparatus for providing real time mutable credit card information with future timestamp functionality
A method for using a smartcard is provided. The smartcard may include a microprocessor chip, a button, a dynamic transaction authorization number, a Bluetooth low energy (“BLE”) device, and a battery. The battery may power the BLE and the microprocessor chip. The smartcard may also include memory. The memory may store the dynamic transaction authorization number. The smartcard may also include a dynamic magnetic strip. The dynamic magnetic strip may include a digital representation of the dynamic transaction authorization number. The method may include pressing the button. The method may also include transmitting an instruction to a smartphone for a request for a dynamic transaction authorization number. The transmission of an instruction may be in response to the pressing of the button. The method may also include receiving a dynamic transaction authorization number from a smartphone.
US09508063B2 Image reading device, image reading system, and control method of an image reading device
When a second image G2 is acquired by emitting UV light to the surface 2a of a check 2 (medium) in a first operating mode for acquiring images by sequentially emitting visible light and UV light, a check processing device 5 (image reading device) acquires an image based on corrected scanning information acquired by using a first UV light correction value 33UV1 to correct the scanning information output from the reading unit 26. In a second operating mode that acquires images by emitting only UV light, the check processing device 5 acquires an image based on corrected scanning information acquired by using a second UV light correction value 33UV2 to correct the scanning information output from the reading unit 26.
US09508061B2 Out-of office notification mechanism for email clients
A method for an out-of-office message notification system to notify at least one sender who has sent an email in a pre-defined time span prior to a start time associated with an out-of-office notification being set by a user is provided. The method may include identifying an unresponded email within a plurality of unresponded emails in an inbox received within the pre-defined time span prior to the start time associated with the out-of-office notification being set by a user. The method may also include sending an out-of-office message notification to the sender associated with the unresponded email.
US09508060B2 System, method and user interface for generating electronic mail with embedded optimized live content
A system for introducing behaviorally tested live content into an electronic mail message comprising at least one dynamic live content area sent through an e-mail service provider system is disclosed. The system includes a memory including a plurality of live content comprising image data, wherein the plurality of live content is behaviorally tested for campaign effectiveness, and a click manager that receives an indication of the opening of the message by a recipient, wherein, after receiving the indication, the click manager, accesses the memory to retrieve at least one of the plurality of live content and sends the retrieved live content for rendering in the dynamic live content area of the e-mail message opened by the one of the plurality of recipients, wherein the at least one of the plurality of live content is retrieved based at least in part on the campaign effectiveness.
US09508059B2 Messaging device having a graphical user interface for initiating communication to recipients
A messaging device allows a user to initiate communication to recipients via a graphical user interface. In some embodiments, messages are composed by a user via a touchscreen display. Pre-existing messages may also be retrieved by the user via the display. Icons representing potential message recipients are displayed, and the user may deliver a message to a recipient by associating the message with the icon that represents the desired recipient, such as by a drag-and-drop or pop-and-hop motion. In addition, the user may indicate to which of the recipient's various electronic devices or services the message is to be delivered. In some embodiments, the user may deliver the message to a group of recipients.
US09508058B2 System providing an interactive conference
Embodiments of the invention are directed to systems, methods and computer program products for providing an interactive conference, such as a video conference. The system, methods, and computer program products determine that an operative connection is being established between a user device of a user and a system associated with a representative of a financial institution, such that the user and the representative may conduct a conference; provide a document viewable by both the user and the representative during the conference; and enable the document to be edited by at least one of the user and the representative during the conference. The document may be an uploaded document or an account view. The system, method, and computer program product provide augmented service to customers of financial institutions when the customers are participating in a conference with a representative of the financial institution.
US09508057B2 Automatically updating account information
A method of one embodiment facilitates the updating of account information. First account information associated with a payment account of a user is received by an interface, and the first account information is stored by a memory. Payee system information associated with a payee system, wherein the payee system stores one or more portions of the first account information, is also received by the interface and stored by the memory. A processor automatically determines that an update event has occurred, the update event associated with updated information comprising one or more updated values for one or more respective portions of the first account information, wherein at least a portion of the first account information stored on the payee system changes based on the update event. In response to automatically determining that the update event has occurred, the interface automatically communicates a payee update message comprising the updated account information.
US09508055B1 Method and system for managing and responding to legal hold notices
A secure administration server sends legal hold information to a confirmation server in response to a delivery request. The legal hold information comprises a plurality of recipients required to comply with a legal hold notice. The secure administration server generates a unique email for each of the plurality of recipients. Each unique email comprises a unique Uniform Resource Locator (URL) to the confirmation server for a corresponding recipient. The secure administration server obtains a confirmation of compliance associated with the corresponding recipient from the confirmation server.
US09508053B2 System and method for estimating delivery events
A computer-implemented method for processing loading operation data to estimate one or more delivery events is described. The loading operation data comprises payload records, each representing a delivery event. The method comprises, for a selected payload record, operating a processing unit to determine whether a delivery weight in respect of the selected payload record is likely to reflect a single delivery event. If the delivery weight is unlikely to reflect a single delivery event the method further comprises generating a synthetic payload record representing an estimated delivery event and comprising synthetic weight and timing values.
US09508051B2 Business development configuration
In accordance with aspects of the disclosure, systems and methods are provided for configuring business development software for a modeled business environment including simulating one or more business related scenarios for managing situational events encountered with the modeled business environment using scenario input data to thereby generate data related to simulation results, and applying the data related to the simulation results to the modeled business environment to refine the modeled business environment by reconfiguring the business development software for the refined modeled business environment based on the data related to the simulation results provided by simulating the one or more business related scenarios with the scenario input data for the modeled business environment.
US09508049B2 Update-triggered document-defined workflow
A computer-implemented update-triggered document-defined workflow method provides for triggering an update to an original source document to yield an updated document. In response, a document handler executes the document-defined workflow method so as to create, delete, or modify a target document or so as to create a workflow description calling for creating, deleting, or modifying a target document.
US09508043B1 Extracting data from documents using proximity of labels and data and font attributes
A method for identifying information in a document may include analyzing the document for a text block containing a structure element, wherein said structure element is a position, font attribute, or text character; applying a rule based analysis on the text block to identify an adjacent label and field containing a value; and identifying said label and said value as a label and value pair in the document.
US09508040B2 Predictive pre-launch for applications
Systems and methods of pre-launching applications in a computer system, said applications being likely to be activated by a user from a terminated and/or suspended process state, are disclosed. The pre-launching of an application may be based on the assessed probability of the application being activated—as well as the level of availability of system resources to affect such pre-launching. Applications may be pre-launched based on these and other conditions/considerations, designed to improve the user's experience of a quick launch of applications in the background. Several prediction models are presented to provide a good estimate of the likelihood of an application being activated by a user. Such prediction models may comprise an adaptive predictor (based on past application usage situations) and/or a switch rate predictor (based on historic data of an application being switched and, possibly, having a decay rate applied to such switch rate measure).
US09508036B2 Helmet mountable timed event RFID tag assembly and method of use
An RFID tag assembly and method of use with a helmet wherein the RFID tag assembly the RFTD tag assembly includes an RFID tag having a mounting substrate with an exposed first planar surface and an opposing second planar surface, the RFID tag having an RFID semiconductor chip has a predetermined operating frequency with an antenna interface mounted on the second planar surface, a conductor electrically coupled to the antenna interface of the RFID semiconductor chip, and an antenna electrically coupled to the conductor. A spacer has a first surface and an opposing second surface. The first surface of the spacer is attached to the second planar surface of the RFID tag. The spacer has a predetermined thickness between the first surface and the second surface. A mounting carrier has a substantially planar body with a first portion having a first end and a second end with two sides defined therebetween and has one or more second portions extending from the body forming free ends each with a planar top surface and a planar bottom surface, with selectively attachable adhesive on a portion of the bottom surface being deformably attached to the first portion. The second surface of the spacer is attached to the top surface of the first portion with the first planar surface of the RFID tag position parallel and set apart above the top surface of the carrier by a distance equal to or greater than the predetermined thickness of the spacer.
US09508033B2 Power management in an electromagnetic transponder
A method for managing the power in an electromagnetic transponder in the field of a terminal, including the steps of: evaluating the power consumption of the transponder circuits; and if this power consumption is below a threshold, evaluating the current coupling factor between the transponder and the terminal and, according to the current coupling: causing an increase of the transponder power consumption or causing a detuning of an oscillating circuit of the transponder.
US09508030B2 Information processing apparatus with image generating unit generating gloss-control plane data and designating emphasis to an image region for glossiness control to change surface effect of recording medium
An information processing apparatus includes: an image data generation unit that generates image data of a gloss control plane including a type of a surface effect given to at least a region of a recording medium, coordinates to identify the region, and designation to emphasize, among a first region and a second region adjacent to each other, a surface effect of the first region as compared with a surface effect of the second region; a change unit that changes the surface effect of the second region when the designation to emphasis is given to the first region; a print data generation unit that generates print data on the basis of the image data of the gloss control plane in which the surface effect of the second region has been changed by the change unit; and an output unit that outputs the print data.
US09508028B2 Converting text strings into number strings, such as via a touchscreen input
System and methods are provided for detecting numerical text strings within a text string and converting those numerical text strings into digit strings. The digit strings may be reflected in real-time, such as when the user is typing a text message. If more than one possible format of the digit string is determined, the system may then provide a selection of the various formats for selection. Once the proper format for the digit string is determined, that digit string may replace the numerical string previously detected in the text string. The text to digit conversion and associated formatting expedites user text entry such that the user is not required to switch keyboard views, (e.g., virtual keyboards). Additionally, converting to digit strings compresses message length, as well as provide other benefits.
US09508025B2 Image processing device, image processing method and medium
An image processing device according to the present invention includes: a patch generation unit which generates an input patch used for comparison on the basis of an input image; a modification parameter estimation unit which estimates a parameter used in blurred modification on the basis of the input image; a blurred image generation unit which generates a blurred image on the basis of a learning image by using the parameter; a patch pair generation unit which generates a patch pair used to compose a restoration image on the basis of the blurred image and the learning image; a selection unit which selects a patch pair used to compose the restoration image on the basis of the input patch; and a composition unit which composes the restoration image on the basis of the patch pair selected by the selection unit.
US09508022B2 Multi-view fingerprint matching
A method and a device are provided for performing a recognition process. The recognition process compares an individual fingerprint view to a fingerprint enrollment template in order to determine whether a match has been found. The determination of a match is based on individual match statistics collected between the individual fingerprint view and each view of the fingerprint enrollment template. Additionally, inter-view match statistics between each view of the fingerprint enrollment template may also be determined. The inter-view match statistics can be analyzed along with the individual match statistics to further inform the determination of a match between the individual fingerprint view and the fingerprint enrollment template.
US09508021B2 Logo or image recognition
Subject matter disclosed herein relates to electronic image object or logo recognition.
US09508020B2 Image processing system with artifact suppression mechanism and method of operation thereof
An image processing system, and a method of operation thereof, includes: a local patch ternarization module for receiving an input image, for calculating a mean value of a local patch of pixels in the input image, and for calculating ternary values for the pixels based on the mean value; and an artifact removal module, coupled to the local patch ternarization module, for removing a residue artifact based on the ternary values and for generating an output image with the residue artifact removed for sending to an image signal processing hardware.
US09508019B2 Object recognition system and an object recognition method
An object recognition system is applicable to practical use, and utilizes image information besides speech information to improve recognition accuracy. The object recognition system comprises a speech recognition unit to determine candidates for a result of speech recognition on input speech and their likelihoods, and an image model generation unit to generate image models of a predetermined number of the candidates having the highest likelihoods. The system further comprises an image likelihood calculation unit to calculate image likelihoods of input images based on the image models, and an object recognition unit to perform object recognition using the image likelihoods. At the time of generating the image model of the candidate, the image model generation unit first searches an image model database, and, when the image model of the candidate is not found in the database, the image model generation unit generates said image model from image information on the web.
US09508018B2 Systems and methods for object detection
An object detection system and a method of detecting an object in an image are disclosed. In an embodiment, a method for detecting the object includes computing one or more feature planes of one or more types for each image pixel of the image. A plurality of cells is defined in the image, where each cell includes first through nth number of pixels, and starting locations of each cell in the image in horizontal and vertical directions are integral multiples of predefined horizontal and vertical step sizes, respectively. One or more feature plane summations of one or more types are computed for each cell. A feature vector is determined for an image portion of the image based on a set of feature plane summations, and the feature vector is compared with a corresponding object classifier to detect a presence of the corresponding object in the image portion of the image.
US09508015B2 Method for evaluating image data of a vehicle camera taking into account information about rain
In a method for evaluating image data of a vehicle camera, information about raindrops on the vehicle's windshield within the field of view of the camera is taken into account in the evaluation of the image data for detection and classification of objects in the environment of the vehicle. Particularly, for example, depending on the number and the size of the raindrops on the windshield, different detection algorithms, image evaluation criteria, classification parameters, or classification algorithms are used for the detection and classification of objects.
US09508013B2 Image processing device, information storage device, and image processing method
An image summarization device includes a first image summarization section that performs a first image summarization process based on a similarity between a plurality of images to acquire a first summary image sequence, a second image summarization section that performs a second image summarization process based on a target object/scene recognition process on each image among the plurality of images to acquire a second summary image sequence, and an integration processing section that performs an integration process on the first summary image sequence and the second summary image sequence, or performs an integration process on the first image summarization process and the second image summarization process to acquire an output summary image sequence.
US09508009B2 Fast recognition algorithm processing, systems and methods
Systems and methods of quickly recognizing or differentiating many objects are presented. Contemplated systems include an object model database storing recognition models associated with known modeled objects. The object identifiers can be indexed in the object model database based on recognition features derived from key frames of the modeled object. Such objects are recognized by a recognition engine at a later time. The recognition engine can construct a recognition strategy based on a current context where the recognition strategy includes rules for executing one or more recognition algorithms on a digital representation of a scene. The recognition engine can recognize an object from the object model database, and then attempt to identify key frame bundles that are contextually relevant, which can then be used to track the object or to query a content database for content information.
US09508006B2 System and method for identifying trees
A system and method of detecting trees in an image. A system and method may receive a dimension related to the trees in an input image. A two dimensional (2D) high pass filter may be applied to the input image to produce a high pass image. Objects may be marked in the high pass image based on the dimension. A processed image may be produced by associating a set of pixels in the high pass image with a respective set of grayscale values. A density operator may be applied to the processed image to identify locations with high frequency changes. Shapes may be defined to include the locations. Trees may be identified by grouping one or more shapes.
US09508004B2 Eye gaze detection apparatus, computer-readable recording medium storing eye gaze detection program and eye gaze detection method
An eye-gaze-detection apparatus includes an image acquisition unit that acquires a face image of a user from an imaging apparatus, the face image being captured by the imaging apparatus; a feature-quantity extraction unit that extracts a feature quantity of the face image; an eye-gaze-calculation-determination unit that determines whether or not an eye-gaze calculation process is performed by referring to a rule database, based on the feature quantity extracted by the feature quantity extraction unit, the rule database storing a rule set associating a condition including the feature quantity of the face image with information indicating whether or not the eye gaze calculation process is performed; and an eye-gaze-calculation unit that performs the eye-gaze-calculation process for the user, based on the feature quantity of the face image acquired by the image acquisition unit, when the eye-gaze-calculation-determination unit determines that the eye-gaze-calculation process is performed.
US09508002B2 Generating cinematic flyby sequences following paths and GPS tracks
A visualization system and method allow moving objects to be visualized in a GIS system as an interactive animation by moving an icon or 3D graphical model in an interactive virtual environment of the GIS. A line may also be drawn behind the icon/3D model representing the path traveled during a window of time. Additionally, the evolution of time-dependent data associated with the moving object may be encoded and visualized in the GIS.
US09508000B2 Object recognition apparatus
An object recognition apparatus 10 includes a candidate image extraction unit 12 which extracts a candidate image part 22 from a pickup image 21, a distance calculation unit 13 which calculates the distance of the candidate image part 22, and a candidate image determination unit 14 which determines that, in the case where a predetermined k number or more of the candidate image parts 22, the real space positions of which belong to a determination area R having the distance thereof lying within the range of a second predetermined distance exceeding a first predetermined distance and the width thereof being a predetermined width or less, are extracted, the candidate image parts 22 which belong to the determination area R are less likely to be the image parts of a pedestrian.
US09507999B2 Image processing apparatus and program
An information processing system that acquires image data corresponding to a target object that is a target for gesture recognition captured by an imaging device; determines whether a distance between the target object and the imaging device is inadequate for recognition of a gesture made by the target object; and outputs a notification when the determining determines that the distance between the target object and the imaging device is inadequate for recognition of a gesture made by the target object.
US09507993B2 Standard calibration target for contactless fingerprint scanners
A contactless, three-dimensional fingerprint scanner apparatus, method, and system are described. The contactless fingerprint scanner can provide either, or both, topographical contrast of three-dimensional fingerprint features and optical contrast of a three-dimensional fingerprint surface. Data captured from scanning of a target with known geometric features mimicking fingerprint features can be examined as images or surface plots and analyzed for fidelity against the known target feature specifications to evaluate or validate device capture performance as well as interoperability. The target can be used by scanner vendors and designers to validate their devices, as well as to perform type certification.
US09507989B2 Decoding barcode using smart linear picklist
A method of decoding a barcode includes determining number of barcode candidates in the image captured and processing the image captured in accordance with the number of barcode candidates found. If the number of barcode candidates is one, the image captured is processed to decode the only one barcode candidate in the image captured. If the number of barcode candidates is larger than one, the image captured is processed to find a barcode candidate that overlays with an aiming location between a first location and a second location on a scan line and to decode the barcode candidate that is found that overlays with the aiming location.
US09507986B2 Imaging system
An imaging system includes an optical system, an optical element, a lighting, and an imaging device. The optical system has different focus positions for different wavelengths of light. The optical element extends depth of field of the optical system. The lighting irradiates an object with illumination light of a wavelength that is designated from among multiple wavelengths. The imaging device captures an image of the object that is irradiated with the illumination light and is formed by the optical system.
US09507984B1 Resource tag generation and deployment for resource valuation and distribution
Embodiments of the invention are directed to a system, method, or computer program product for generating resource tag systems and integration of the tag systems on machines for machine use, valuation, and distribution. The tags comprise sensors for monitoring activity of the machine or product and identifies stagnant periods in the use of the machine or product. Based on a triggering stagnant duration, the tag system provides signals to the user indicating product inactivity. The tag may generate a communicable link with outside sources to identify and present the user with a current market value of the machine or product that the tag is affixed. Upon authorization, the tag may post the machine or product for sale and/or present the product for donation. Furthermore, upon sale of the product, the tag may be able to transfer warranty information along with the product.
US09507982B2 Line replaceable unit health nodes and methods for determining maintenance actions relating to line replaceable units
Line Replaceable Unit (LRU) health nodes are provided, as are methods for determining maintenance actions with respect to LRU health nodes. In one embodiment, the LRU health node includes a passive Radio Frequency identification (RFID) module having an RFID memory and an RFID antenna coupled thereto. The LRU health node further includes a mass storage memory, a sensor configured to monitor an operational parameter of an LRU and generate a corresponding output signal, and a health node controller operably coupled to the passive RFID module, to the mass storage memory, and to the sensor. The health node controller is configured to: (i) record the output signal generated by the sensor in the mass storage memory as time-phased sensor data, (ii) derive health summary data from the time-phased sensor data, and (iii) store the health summary data in the RFID memory.
US09507981B2 Association of processed items with process logs
A system for associating processed items with process logs, including a server computer for tracking the items and a tag reader positioned in the vicinity of a device for processing the items; wherein the items are marked with a tag that is readable with a tag reader; wherein the device produces a process log listing a commencement time of the process, a type of process performed and an indication if the process completed successfully; wherein the tag reader records identity information of the items inserted and/or removed from the device for processing; and wherein the process log and identity information are provided to the server computer to associate the processes recorded in the process log with the processed items to form tracking information for an item.
US09507979B2 Saving power in a battery powered system having a touch sensor and an RFID tag reader
A system and method that combines RFID tag reader circuitry and a touch sensor, wherein the system and method may reduce power consumption of a battery powered system by detecting the presence of an RFID tag by using a lower power consumption touch sensor instead of scanning for the RFID tag by using higher power RFID tag detection and reading circuitry, controlling activation and deactivation of the RFID tag detection and reading circuitry when the touch sensor has detected the presence of the RFID tag, and reconfiguring sensor electrodes so that the electrodes may form a touch sensor or an antenna as needed.
US09507963B2 Method and apparatus for secure execution using a secure memory partition
A processor capable of secure execution. The processor contains an execution unit and secure partition logic that secures a partition in memory. The processor also contains cryptographic logic coupled to the execution unit that encrypts and decrypts secure data and code.
US09507961B2 System and method for providing secure access control to a graphics processing unit
Systems, methods, and computer programs are disclosed for providing secure access control to a graphics processing unit (GPU). One system includes a GPU, a plurality GPU programming interfaces, and a command processor. Each GPU programming interface is dynamically assigned to a different one of a plurality of security zones. Each GPU programming interface is configured to receive work orders issued by one or more applications associated with the corresponding security zone. The work orders comprise instructions to be executed by the GPU. The command processor is in communication with the plurality of GPU programming interfaces. The command processor is configured to control execution of the work orders received by the plurality of GPU programming interfaces using separate secure memory regions. Each secure memory region is allocated to one of the plurality of security zones.
US09507960B2 Systems and methods for automated data privacy compliance
Systems and methods for automated data privacy compliance involve a data privacy operations server receiving information via a web server regarding an initiative and packaging the initiative information for assessment by a data privacy legal compliance function. One or more databases storing an inventory of data privacy compliance requirements resources are accessible by the data privacy legal compliance function via a relational database server to assess the packaged initiative information. A clear function generates an approval recommendation based on the assessment of the packaged initiative information by the data privacy legal compliance function.
US09507959B2 Electronic equipment having display having divided screen and control method thereof
Provided is an electronic equipment, where divided display is performed and different user operates each screen, to protect privacy of showing contents. Accordingly, a permission user to whom access to privacy information made into a privacy protection object and its privacy information is permitted is set to privacy setup information. As for a privacy protection processing part, the divided display of the display screen of an operation part is performed, in case that a login user of a divided screen of one side differs from a login user of another divided screen of another side, when showing on one screen privacy information set as privacy setup information, an operation part is controlled to reduce a visibility of one screen.
US09507957B2 Providing features in a database system environment
A system and method for providing features in a database system. In one embodiment, a method includes receiving, from a user, a request for a feature, where the feature is a functionality of the database system. The method further includes upgrading the database system, where the upgrading includes one or more provisioning steps that are based on the request from the user.
US09507955B2 System and method for executing code securely in general purpose computer
The various embodiments of the invention provide a method for executing code securely in a general purpose computer. According to one embodiment, a code is downloaded into a cache memory of a computer in which the code is to be executed. The code downloaded into the cache memory is encrypted in the cache memory. Then the encrypted code in the cache memory is decrypted using a decryption algorithm to obtain the decrypted code. The decrypted code is executed in the cache to generate a result. The decrypted code is destroyed in the cache memory after the forwarding the result to a user.
US09507949B2 Device and methods for management and access of distributed data sources
A device and method for provided access to distributed data sources includes a cloud security server configured to associate any number of data sources and client devices with a cloud security server account. The cloud security server assigns trust levels to the data sources and the client devices. A client device requests data from the cloud security server. The cloud security server authenticates the client device and verifies the trust levels of the client device and the requested data. If verified, the cloud security server brokers a connection between the client device and the data source, and the client device accesses the requested data. Data sources may include cloud service providers and local storage devices. The cloud security server may assign a trust level to a client device for a limited time or revoke a trust level assigned to a client device. Other embodiments are described and claimed.
US09507946B2 Program vulnerability identification
In one embodiment, a system for identifying and tracking application vulnerabilities includes an interface, a processor, and a memory. The interface is operable to receive a plurality of applications from one or more business units, each of the plurality of applications including source code. A process is communicatively coupled to the interface and is operable to identify a vulnerability associated with the source code of each of the plurality of applications. A memory is communicatively coupled to the interface and the processor and operable to store the vulnerability and the source code associated with the vulnerability in a vulnerability database. The processor is further operable to create a vulnerability tag for the vulnerability stored in the vulnerability database. The memory may also store the vulnerability tag for the vulnerability in a reporting database.
US09507945B2 Method and apparatus for automated vulnerability detection
A method executable via operation of configured processing circuitry to identify vulnerabilities in program code may include receiving a program and employing a disassembler to disassemble the program, generating a function call tree for the program based on disassembly of the program, receiving an indication of a post condition for which analysis of the program is desired, transforming program statements into logical equations, simplifying the logical equations, propagating post conditions backwards via Dijkstra's weakest precondition variant, analyzing aliases and processing loops to generate a precondition, and using an automated solver to determine whether the precondition is realizable and, if so, providing program inputs required to realize the precondition.
US09507942B2 Secure BIOS mechanism in a trusted computing system
An apparatus including a ROM and a microprocessor. The ROM includes BIOS contents that are stored as plaintext and an encrypted digest. The encrypted digest includes an encrypted version of a first digest corresponding to the BIOS contents. The microprocessor is coupled to the BIOS ROM, and includes a tamper timer and a tamper detector. The tamper timer periodically generates an interrupt at a prescribed interval. The tamper detector accesses the BIOS contents and the encrypted digest upon assertion of the interrupt, and directs the microprocessor to generate a second digest corresponding to the BIOS contents and a decrypted digest corresponding to the encrypted digest using the same algorithms and key that were employed to generate the first digest and the encrypted digest, and compares the second digest with the decrypted digest, and precludes operation of the microprocessor if the second digest and the decrypted digest are not equal.
US09507941B2 Method of verifying integrity of electronic device, storage medium, and electronic device
Disclosed herein are techniques for verifying the integrity of an electronic device. A normal world virtual processor and a secure world virtual processor are instantiated. An integrity verification agent is executed by the secure world virtual processor. A kernel operation attempted by the normal world virtual processor is intercepted by the secure world virtual processor.
US09507938B2 Real-time code and data protection via CPU transactional memory support
A technique allows for memory bounds checking for dynamically generated code by using transactional memory support in a processor. The memory bounds checking includes creating output code, identifying read-only memory regions in the output code and creating a map that is provided to a security monitoring thread. The security monitoring thread executes as a transaction and determines if a transactional conflict occurs to the read-only memory region during parallel execution of a monitored thread in the output code.
US09507934B2 Filtering mechanism for securing Linux kernel
Systems and methods for providing security to the Linux kernel are described. Wrappers are provided around the kernel, thereby reducing the amount of testing needed since the new security code will be introduced only into the wrappers. This also provides flexibility in various layers. The filters may be customized per se to suit various security needs. Overhead incurred due to this is very low.
US09507933B2 Program execution apparatus and program analysis apparatus
Execute a countermeasure process for vulnerability reliably before an attack aiming at vulnerability occurs. A vulnerability countermeasure processing unit performs a countermeasure process for vulnerability of a vulnerable library function being a general-purpose library function that has vulnerability among the general-purpose library functions included in a general-purpose library. A countermeasure selection unit, when a call for the vulnerable library function is requested at execution of a Web application, makes the vulnerability countermeasure processing unit perform the countermeasure process for the vulnerability of the vulnerable library function, and after the countermeasure process is performed by the vulnerability countermeasure processing unit, calls the vulnerable library function.
US09507929B1 Decentralized information flow securing method and system for multilevel security and privacy domains
The present invention discloses a method for securing information flow in an information system. The method comprises intercepting access requests to information in the information system by all applications running in the information system, intuitively assigning labels to all the information and the applications depending on the application requirements, combining the application making the access request and the information for which the access request is made with their respective labels, checking allowance of the access request based on comparison of the label corresponding to the application making the access request and the label corresponding to the information for which the access request is made and accordingly providing access of the information to the application on detection of allowable access request else denying the access request.
US09507927B2 Dynamic identity switching
Techniques are disclosed for dynamically switching user identity when generating a web service request by receiving, at a client application, an invocation of a web service, the invocation associated with a first authenticated user identity of a first user, identifying a second user identity, verifying that a switch from the first user identity to the second user identity is permitted by switching rules, including the second user identity in a service request when the switch is permitted, and communicating the service request to the web service. The switching rules can include associations between initial user identities and permitted user identities. Verifying that a switch is permitted can include searching the associations for an entry having an initial user identity that matches the first authenticated user identity and a new user identity that matches the second user identity, wherein the switch is permitted when the entry is found.
US09507925B2 Mobile communications device providing heuristic security authentication features and related methods
A mobile communications device includes a plurality of first input devices capable of passively collecting input data, a second input device(s) capable of collecting response data based upon a challenge, and a processor capable of determining a level of assurance (LOA) that possession of the mobile communications device has not changed based upon a statistical behavioral model and the passively received input data, and comparing the LOA with a security threshold. When the LOA is above the security threshold, the processor may be capable of performing a given mobile device operation without requiring response data from the second input device(s). When the LOA falls below the security threshold, the processor may be capable of generating the challenge, performing the given mobile device operation responsive to valid response data, and adding recent input data to the statistical behavioral model responsive to receipt of the valid response data.
US09507923B2 Automatic activation of a service
A triggering mechanism may provide a user of a device the ability to send a multimedia message and/or capture multimedia information via the device without the user unlocking the device, without the user opening a messaging application and/or without the user opening an information capturing application on the device. In an example configuration, an emergency call button, or the like, on the device may provide a user several options for sending a message and/or capturing information. Upon selecting one or more of the options, applications for effectuating the selected option(s) may be automatically initiated without user intervention.
US09507915B2 Managing the delivery of alert messages by an intelligent event notification system
A healthcare system includes an event notification system (ENS) and a real-time location (RTL) system. The ENS operates to receive event messages from an event generation device that includes the identity of a clinical event instance, the location of the clinical event source and timestamp information associated with the event, and it operates to receive tag message information that includes the identity of a caregiver associated with the tag, the current location of the tag and timestamp information. Alert message logic operates on the clinical event information and the tag information to determine whether an alert message should be sent to a caregiver currently attending to a patient.
US09507908B2 Systems and methods for airplane electrical system connection routing and visualization with topology determination
A method for creating a computerized visualization of a wiring topology is described that includes combining three-dimensional wire harness data with logical wire content using a process executed on a computer processing device, and displaying a graphical wire topology, output from the process, within a three dimensional model of the platform within which the wiring topology is contained.
US09507907B2 Computational wafer inspection
Disclosed herein is a computer-implemented defect prediction method for a device manufacturing process involving processing a portion of a design layout onto a substrate, the method comprising: identifying a hot spot from the portion of the design layout; determining a range of values of a processing parameter of the device manufacturing process for the hot spot, wherein when the processing parameter has a value outside the range, a defect is produced from the hot spot with the device manufacturing process; determining an actual value of the processing parameter; and determining or predicting, using the actual value, an existence, a probability of existence, a characteristic, or a combination selected therefrom, of a defect produced from the hot spot with the device manufacturing process.
US09507906B2 Metal interconnect modeling
A method performed by a computing system for modeling metal routing in a circuit design includes extracting physical parameters of a metal interconnect and substrate for the circuit design, determining a substrate capacitance value from a database, the substrate capacitance being at a maximum frequency of a frequency range to be simulated, modeling the metal interconnect with a symmetric lumped transmission line model, defining a substrate resistance value for the symmetric lumped transmission line model to be such that the substrate resistance value multiplied by the substrate capacitance value is within a range of about 100-6000 ohm femtofarads, and simulating the symmetric lumped transmission line model across the frequency range using the substrate resistance value as the substrate resistance of the symmetric lumped transmission line model.
US09507905B2 Storage medium storing circuit board design assistance program, circuit board design assistance method, and circuit board design assistance device
A non-transitory recording medium storing a program that causes a computer to execute a circuit board design assistance process. The circuit board design assistance process includes: extracting, from design information of a multilayer circuit board in which a plurality of layers are layered, a plurality of ground patterns in the multilayer circuit board that are within a predetermined distance from a path of a signal that flows in the multilayer circuit board; resolving a region at which the plurality of ground patterns are electronically separated as being a discontinuity region; and displaying the resolved discontinuity region.
US09507899B2 System and method for register transfer level autointegration using spread sheet and computer readable recording medium thereof
A system and a method for RTL auto-integration using a spread sheet and a recording medium thereof are provided. A method for RTL auto-integration including receiving an input indicating a connection relationship between a first device and a second device through a spread sheet, matching a first port included in the first device to a second port included in the second device using a naming matching algorithm, and converting the spread sheet into an RTL code using a result of the matching, wherein the naming matching algorithm matches the first port to the second port having a port name most similar to a first port name of the first port.
US09507891B1 Automating a microarchitecture design exploration environment
In a computing system running an environment for designing operation of circuity, at least the following are performed for providing simulations and evaluations of one or more user-defined modules of circuitry including one or more pipeline stages in a pipeline. A model of the pipeline is automatically generated by using a pipeline block diagram, where the model is generated in a high-level modeling language able to perform simulations of circuitry with the pipeline. An interface is automatically generated between the one or more user-defined modules and the generated model of the pipeline, the interface including a set of access methods to the pipeline. Evaluation is performed of the one or more user-defined modules using the automatically generated model of the pipeline and the automatically generated interface. Methods, apparatus, and computer program products are disclosed.
US09507890B2 Detecting appliances in a building from coarse grained meter data with partial label
Detecting appliance in a building, in one aspect, may comprise receiving meter data associated with energy consumption, the meter data comprising at least energy consumption data associated with usage of the appliance, receiving customer data associated with the meter data, extracting features for training a model for detecting the appliance, based on at least the meter data and the customer data, and constructing the model based on the features.
US09507889B2 Decomposition of the seismic moment tensor
Analysis of a seismic event, such as a microseismic event caused by hydraulic fracturing, comprises measuring seismic waves emitted by the event and converting the measurements into two values for magnitude of explosion or implosion and for magnitude of displacement discontinuity at a plane, together with two directions, a direction of a normal to the plane and a direction of displacement; where the two values and the two directions compose the moment tensor describing the seismic event. The measurements may be converted into the moment tensor and decomposed into the values and directions. The values and directions associated with several seismic events may be displayed concurrently on a graphic display as a graphic representation of multiple events, where each event may be depicted with magnitude of expansion or contraction represented by a volume and the plane represented as a laminar object.
US09507888B1 Active state visualization for finite state machine models
A device receives information that identifies a model, of a finite state machine, that includes information that identifies a parent state and sub-states of the parent state. The device generates a data structure that designates an enumerated data type associated with the parent state, where the enumerated data type includes values corresponding to the sub-states. The device executes the model, based on the data structure, and monitors operation of the finite state machine and state transitions among some of the sub-states. The device detects, based on the state transitions, a change in an active sub-state that represents a particular sub-state, of the sub-states, that is active at a particular time during execution of the model. The device provides state transition information that identifies changes in the active sub-state over time.
US09507887B1 Adaptive techniques for workload distribution across multiple storage tiers
Described are techniques for performing data storage optimizations. A reserved workload for a first of a plurality of storage tiers is determined. Each of the plurality of storage tiers is characterized by a set of one or more attributes. The first storage tier includes performance characteristics which are any of incomplete, unknown, and unable to be predictively modeled for various workloads. The plurality of storage tiers includes the first tier and a remaining set of additional storage tier(s). Performance is modeled of a first workload distributed among the remaining set of storage tiers. The first workload represents a total workload less the reserved workload. One or more data movements are determined in accordance with the modeling. Each data movement moves a data portion from a first physical device of one of the plurality of storage tiers to a second physical device of another of the plurality of storage tiers.
US09507885B2 System and method for realizing a building using automated building massing configuration generation
Computer based methods and systems for evaluating different building designs are disclosed. In one embodiment, the method involves generating a first set of different building massing configurations using a shape grammar, storing the generated first set of different building massing configurations in a building massing library, reducing the first set of different building massing configurations according to a parameter search to form a second set of different building massing configurations, the second set being a subset of the first set, and using the second set of different building massing configurations to evaluate an aspect of a building system.
US09507884B2 Modeling system and modeling method based on logical relation
A modeling system and modeling method based on a logical relation, including an operation task integrating module, a task interpreter, a graph layout correcting module, a graph wiring correcting module and a database model increment correcting module, wherein the database model increment correcting module includes a graph increment calculating unit and a model increment calculating unit. The system, through description of the logical relation and based on support of the automatic wiring technology, realizes the graph-model integrated generation of a new grid model of the power system which is based on the description of the logical relation; the grid model is completely defined and modified on “one net”, which is different from the original way that the power system model is established on countless net graphs, thereby helping the grid operation manager to accurately and rapidly establish and modify the grid model of the full system.
US09507882B1 Declarative language dynamic web platform
Described is a dynamic web platform configured to provide content rendered with one or more rendering systems. The rendering systems and the modules making up the rendering modules may interact with one another by way of declarative data. Administrators may configure the platform using the declarative data. The declarative data may express operational parameters, business rules, and so forth and may be modified while the platform is operating. The modules in the rendering system may be loosely bound, allowing for concurrent operations, dynamic changes to what content is to be rendered, and so forth.
US09507880B2 Regular expression optimizer
Systems, methods, and other embodiments associated with processing regular expressions are described. One example method includes analyzing a rule for a regular expression and deleting the regular expression.
US09507877B2 Method of and system for storing spatial objects
A computer-implemented method of organization of a plurality of objects contained in a quadrant tree into a singly linked linear list, comprising: placing a first, a second, a third and a fourth markers of a first level, that correspond to a first, a second, a third and a fourth elements of the first level of the quadrant tree, into the singly linked linear list; placing respective objects stored in any of: the first, the second, the third and the fourth element of the first level of the quadrant tree after a respective one of the first, the second, the third and the fourth marker of the first level accordingly into the singly linked linear list; placing a first, a second, a third and a fourth markers of the second level, that correspond to a first, a second, a third and a fourth elements of the second level of the quadrant tree, into the singly linked linear list; placing objects stored in any one of: the first, the second, the third and the fourth element of the second level of the quadrant tree into the singly linked linear list, the placing executed after the first, the second, the third and the fourth markers of second level accordingly.
US09507870B2 System, method and computer readable medium for binding authored content to the events used to generate the content
A web page that includes content form fields may be modified to include an event observer module and an authored content module. Events generated during the authoring of content by a user are recorded by the event observer module and sent to an event server with an InteractionID. The authored content module inserts hidden fields into the form fields that are updated with the InteractionID when content is submitted to the web server. The web server provides the InteractionID in a bind request to the event server. The event server binds the content to the events used to create the content in response to the request.
US09507869B2 Platform and application method for inter-system data exchange based on data tags
The present invention relates to platforms, systems, and application methods for data exchanges between systems based on data tag. The platform for data exchange between systems includes a service management system, a data tag management systems, an application terminal, and a service resource system. The data tag management system obtains service resource information from the service management system based on different applications, and generates data tags. The application terminal obtains the corresponding service resource information from the data tag, interacts with the service management system to obtain service result, thus achieving a variety of service applications. The disclosed system and method can effectively integrate a range of services, facilitate inter-system data exchanges, and improve user experiences, which allow tag data to be applied among the larger scale commercial applications. The disclosed systems and methods are easy to implement and have low implementation costs.
US09507868B2 Method, apparatus, and system for displaying usage records
A method, apparatus, and system are provided for displaying usage records. The method includes: reading a usage record stored in a transportation card and acquiring a terminal number corresponding to the usage record; transmitting a route identifier query request to a server, the route identifier query request including the terminal number corresponding to the usage record; receiving a route identifier of a vehicle associated with the terminal number of the usage record; and displaying the usage record as well as the route identifier of a vehicle associated with the terminal number corresponding to the usage record.
US09507865B2 Intelligence centers
Disclosed herein, among other things, is a system comprising a content repository, a communication portal developer, a content manager, and an analytic engine. The content repository is adapted to store electronic content in a computer-readable storage medium. The communication portal developer includes at least one wizard to create a plurality of customizable portals without coding software. Each customizable portal is accessible to one or more selected visitors through a web browser. The content manager is adapted to publish selectable electronic content to selectable portals. The content manager includes at least one wizard to populate and manage the electronic content within the content repository. The analytic engine analyzes electronic content use and visitor behavior while logged into their customizable portal. In various embodiments, the analytics are provided in real time or near real time. Other embodiments are disclosed herein.
US09507862B2 Chronology based content processing
Various techniques for chronology based content processing are disclosed herein. For example, in one embodiment, a method includes receiving a content containing a plurality of facts and determining a subject and a chronological value for each of the facts contained in the content. The subject includes at least one of a person, a place, an object, or an event, and wherein the chronological value includes at least a date. The method also includes assembling the facts in the content based on the determined subjects and corresponding chronological values for the individual facts.
US09507859B1 Speculative acquisition of certificate validation information
Methods and systems for validating online certificate status are provided. A method for validating online certificate status may include storing data associated with a first certificate beyond an expiration time of a second certificate. The second certificate was used to validate the first certificate. The method may further include validating the first certificate upon a host connection request or prior to expiration of a second certificate. A system for validating online certificate status may include a certificate data acquirer and a certificate validator. Another method for validating online certificate status may include obtaining a hostname and selecting a first certificate based upon an association between the hostname and data associated with the first certificate. The method may also include providing the first certificate data for validation. A system for validating online certificate status may include a speculator. A system for providing an online certificate status may include a speculative server.
US09507857B2 Apparatus and method for classifying document, and computer program product
According to an embodiment, a document classification apparatus includes an extraction unit, a clustering unit, a classification unit, and a label assignment unit. The extraction unit is configured to extract feature words from documents. The clustering unit is configured to cluster the feature words into clusters so that a difference between the number of documents each including any one of the feature words belonging to one cluster and the number of documents each including any one of the feature words belonging to another cluster is equal to or less than a predetermined reference value. The classification unit is configured to classify the documents into the clusters so that each document belongs to the cluster to which the feature word included in the each document belongs. The label assignment unit is configured to assign a classification label to each cluster as a word representative of the corresponding feature words.
US09507852B2 Techniques for discriminative dependency parsing
A computer-implemented method can include receiving a speech input representing a question, converting the speech input to a string of characters, and obtaining tokens each representing a potential word. The method can include determining one or more part-of-speech (POS) tags for each token and determining sequences of the POS tags for the tokens, each sequence of the POS tags including one POS tag per token. The method can include determining one or more parses for each sequence of the POS tags for the tokens and determining a most-likely parse and its corresponding sequence of the POS tags for the tokens to obtain a selected parse and a selected sequence of the POS tags for the tokens. The method can also include determining a most-likely answer to the question using the selected parse and the selected sequence of the POS tags for the tokens and outputting the most-likely answer.
US09507851B1 Methods and systems for providing recommendation information
A method for providing recommendation information from a network application service is disclosed and includes receiving, by a server, user activity data relating to a first data object of a plurality of data objects in a network application service, and storing the user activity data in a structured storage model comprising a plurality of nodes representing a plurality of items including the first data object, and at least one edge representing user activity data relating to the plurality of items. When a recommendation search criteria relating to the first object is received, recommendation information corresponding to the recommendation search criteria is retrieved and transmitted. The recommendation information is based on at least one inference determined from the structured storage model.
US09507849B2 Method for combining a query and a communication command in a natural language computer system
A method for processing a natural language input to a computerized system. The method parses the input to identify a query portion and a communication portion of the input. The system then determines an answer to the query portion, including identifying communication parameters from the communication portion. Upon determining the answer, the system prepares an answer to the communication and transmits that answer. If the answer requires information from a remote source, the system creates a subsidiary query to obtain that information and then submits the subsidiary query to the remote source. A response to the query is used to compose the answer to the query from the answer to the subsidiary query. If the system concludes that the query portion does not require information from a remote source, analyzing and answering the query locally.
US09507848B1 Indexing and querying semi-structured data
Generating an inverted index is disclosed. Semi-structured data from a plurality of sources is parsed to extract structure from at least a portion of the semi-structured data. The inverted index is generated using the extracted structure. The inverted index includes a location identifier and a data type identifier for one or more entries of the inverted index.
US09507845B1 Virtual splitter
A system, program product, and computer implemented method for replicating a consistency group comprising monitoring the latency between one or more splitters of the consistency group and replication appliances in the replication cluster for the consistency group (CG); wherein each replication appliance of the replication appliances is configured to be able to receive IO from the one or more splitters, determining which replication appliance of the replication appliances has the lowest latency after including additional latency resulting from assignment of the CG to the replication appliance, and configuring the splitter to replicate IO from the CG to the replication appliance determined to have the lowest latency.
US09507839B2 Method for determining a supported connectivity between applications
A computer-implemented system and method that analyzes metadata of the first application to identify a first data object and one or more first fields of the first data object, the first data object and the first fields being part of the metadata of the first application, identifies one or more second applications having a second data object with one or more second fields, and determines, for at least one of the second applications, a supported connectivity with the first application and whether the supported connectivity is a point-to-point connectivity or a connectivity through a central design time repository.
US09507837B2 Reference data segmentation from single to multiple tables
Embodiments of the present invention can be used to improve cross reference look-up performance by performing multi-table data segmentation. In accordance with an embodiment, a method of multi-table data segmentation can comprise augmenting each of a plurality of definition files associated with a database table with multi-table data. The method can further comprise creating a plurality of multi-tables. Each multi-table is associated with a different one of the plurality of definition files. The method can further comprise transposing data stored in the database table based on the plurality of definition files, and migrating the transposed data from the database table to the plurality of multi-tables.
US09507835B2 Search-on-the-fly/sort-on-the-fly search engine for searching databases
A processor-implemented method for accessing data from a data source includes using search-on-the-fly to displaying an initial view of the data source. The initial view includes, as a first data field result list, a dynamically-determined set of first available data fields upon which a data query may be run. The method further includes executing data queries by executing a search-on-the-fly operation. The search-on-the-fly operation includes receiving a first selection of one of the first available data fields and displaying as a first data element result list, a first set of available data elements of the selected first available data field. The method still further includes executing a sort-on-the-fly operation by receiving a sort-on-the-fly command and displaying a second view of the data source. The second view includes as a second data field result list of all data fields from the initial view except the selected first available data field. Finally, the method includes repeating search-on-the-fly and sort-on-the-fly operations until a desired data query result is achieved.
US09507834B2 Search suggestions using fuzzy-score matching and entity co-occurrence
A method for generating search suggestions by using fuzzy-score matching and entity co-occurrence in a knowledge base is disclosed. Embodiments of the method may be employed in any search system that may include an entity extraction computer module that may perform partial entity extractions from provided search queries, a fuzzy-score matching computer module that may generate algorithms based on the type of entity extracted and perform a search against an entity co-occurrence knowledge base. The entity co-occurrence knowledge base, which may include a repository where entities may be indexed as entities to entities, entities to topics, or entities to facts among others, may return fast and accurate suggestions to the user to complete the search query. The suggestions may include alternates to the partial query provided by the user that may enhance and save time when performing searches.
US09507830B2 Tailoring user experience for unrecognized and new users
A system stores a table mapping users to attributes, and stores a second table mapping the users to products associated with a source domain. The system determines a set of top scoring products for each of the attributes, and creates, using the top scoring products, a model that is predictive of an activity in a target domain, the target domain being separate from the source domain. The system detects a behavior from a particular user accessing the target domain, and generates a personalized prediction for the particular user based on the model, in response to the detecting the behavior.
US09507829B1 Storage optimization for social networks
Systems and methods are provided for optimizing allocation of storage resources for computing systems. For example, a method includes performing a storage allocation process to optimize storage of user data in data centers of a computing system. The storage allocation process includes determining a ranking of each data center in the computing system for a given user, and selecting a data center to store user data of the given user, based at least in part on the determined rankings of the data centers for the given user. The data centers are ranked using a ranking function which includes an access ratio that is determined as ratio of (i) a number of times that each of a total number of users in the given data center have accessed shared data of the given user to (ii) a number of data uploads that the given user has made to the computing system.
US09507818B1 System and method for conditionally updating an item with attribute granularity
A system that implements a scaleable data storage service may maintain tables in a non-relational data store on behalf of clients. Each table may include multiple items. Each item may include one or more attributes, each containing a name-value pair. Attribute values may be scalars or sets of numbers or strings. The system may provide an API usable to request that values of one or more of an item's attributes be updated. An update request may be conditional on expected values of one or more item attributes (e.g., the same or different item attributes). In response to a request to update the values of one or more item attributes, the previous values and/or updated values may be optionally returned for the updated item attributes or for all attributes of an item targeted by an update request. Items stored in tables may be indexed using a simple or composite primary key.
US09507817B2 Method for synchronizing access to shared resources of a computing system and detecting and eliminating deadlocks using lock files
The disclosure generally relates to computer engineering, in particular, to a method for synchronizing access to shared resources of a computing system, and for detecting and eliminating deadlocks using lock files. The disclosure advantageously improves reliability of detection and elimination of deadlocks. The method grants access to a shared resource to other processes and ensures that there will be no deadlock in cases where the process, whose data is indicated in the lock file, does not currently exist in the computing system (for example, an application was aborted from RAM by the operating system due to an internal software failure). The method can be preferably implemented in POSIX-compatible operating systems, in particular, the GNU/Linux operating system.
US09507811B2 Compressed data page with uncompressed data fields
Systems, methods, and other embodiments associated with a compressed data page that includes uncompressed data fields are described. One example method includes compressing user records and storing them on a compressed data page and then storing one or more uncompressed data fields on the compressed data page such that the uncompressed data fields can be updated in place without uncompressing the compressed data page.
US09507810B2 Updating database schemas in a zero-downtime environment
A system is described for processing schema updated in a zero-downtime environment. A technique includes establishing an application session to access a database, receiving a schema update, converting the database to an updated database according to the schema update after establishing the application session, generating a temporary compensation view from the schema update, the temporary compensation view containing compensation logic to locate database objects belonging to the database, receiving a database transaction from the application session to access a database object in the database; and processing the compensation logic to locate the database object.
US09507808B2 Technique for structuring navigation data
A technique for structuring a navigation data base in order to support incremental data updates is provided. A method implementation of the technique includes the steps of providing at least two data levels, wherein a first data level is associated with route links representing road segments of regional distance roads, partitioning the first data level into local tiles, wherein each local tile is associated with route links representing road segments of regional distance roads for a specific local geographic area, and interlinking those route links of neighboring local tiles that represent road segment portions of a regional distance road extending over neighboring local tiles.
US09507806B1 Efficient delivery of image files
A method of delivering images by an edge server to a web browser is disclosed. It includes receiving through an interface a request for an image file. It includes detecting by a processor the image file as a non-interlaced image file. It includes converting by the processor the detected non-interlaced image file to a corresponding interlaced image file. It includes sending a first segment of the corresponding interlaced image file in response to the request for the image file and delaying delivery of a second segment of the corresponding interlaced image file until a subsequent request for the second segment of the corresponding interlaced image file is received.
US09507805B1 Drawing based search queries
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for processing drawing-based search queries. In one aspect, a method includes receiving search request data specifying a search request, the search request comprising a drawing represented by a set of line strokes, each line stroke representing a trace of a moving input point; identifying line segments from the line strokes; comparing the identified line segments to reference line segments, each of the reference line segments representing a portion of a corresponding reference drawing; identifying a candidate reference drawing based on the comparison of the identified line segments with reference line segments; identifying a keyword for the candidate reference drawing, the keyword being a term determined to be relevant to a subject matter of the candidate reference drawing; and in response to receiving the search request, providing search results data specifying search results responsive to the keyword.
US09507799B1 Distributed object store for network-based content repository
A distributed object store in a network storage system uses location-independent global object identifiers (IDs) for stored data objects. The global object ID enables a data object to be seamlessly moved from one location to another without affecting clients of the storage system, i.e., “transparent migration”. The global object ID can be part of a multilevel object handle, which also can include a location ID indicating the specific location at which the data object is stored, and a policy ID identifying a set of data management policies associated with the data object. The policy ID may be associated with the data object by a client of the storage system, for example when the client creates the object, thus allowing “inline” policy management. An object location subsystem (OLS) can be used to locate an object when a client request does not contain a valid location ID for the object.
US09507797B2 Cross-protocol locking with a file system
A file system is to be shared by multiple file servers according to respective different file server protocols, and the file system is to implement cross-protocol locking in access of file system objects of the file system. A file system denies access to a particular file system object from a first file server protocol in response to a data structure referred to by an inode indicating that an access from a second different file server protocol of the particular file system object is present.
US09507796B2 Relay apparatus and image processing device
The information processing device may determine a file type of a send file which is a file to be sent to the storage device and to be stored in the storage device. The information processing device may acquire a plurality of stored tag information from the storage device. The stored tag information may be tag information associated with a stored file which is a file stored in the storage device. The information processing device may cause a display unit to display one or more stored tag information among the acquired plurality of stored tag information. The information processing device may store, in association with the send file, at least one selected tag information into the storage device. The information processing device may cause the display unit to display a first group of stored tag information in preference to a second group of stored tag information.
US09507795B2 Functionalities, features, and user interface of a synchronization client to a cloud-based environment
Embodiments in the present disclosure include systems and methods related to a synchronization client of a cloud-based collaboration platform that runs on a user device for synchronizing folders and files between a location on the cloud-based collaboration platform and a location on the user device. The synchronization client informs a user of the status of synchronization processes and allows a user to choose various options depending on the informed status.
US09507793B2 File resharing management
Managing file distribution in an online file sharing system implemented by at least one server includes inviting a first entity to access a shared file hosted by the online file sharing system, and allowing the first entity to reshare the shared file through the online file sharing system with at least a second entity only to an extent permitted by a resharing policy stored by the online file sharing system.
US09507791B2 Storage system user interface with floating file collection
A method includes outputting for display a first view representing a first plurality of objects stored in a first folder of a hierarchical storage system and receiving one or more selection inputs that designate one or more objects from the plurality of objects as selected objects. The method also includes outputting for display a floating interface element representing the selected objects and receiving a navigation input identifying a second folder of the hierarchical storage system. The method also includes executing, in response to the navigation input, a view transition that removes the first view from display and outputs, for display, a second view representing a second plurality of objects stored in the second folder, wherein the floating interface element representing the selected objects remains displayed during the view transition.
US09507783B1 Migration of large data from on-line content management to archival content management
A file system storage device includes a memory storing instructions and at least one processor. The processor is configured to: execute the instructions to create a storage area symbolic name in the file system storage device, generate a core table data structure, generate an ancillary table data structure, cache partitioning rule paths for the file system storage device based on the storage area symbolic name, compare property values for a document with the cached partitioning rule paths, dynamically select the storage device symbolic name for the document, store the document into a partition of the file system storage device, store metadata for the document into a partition of the core table, and store ancillary objects for the document into a partition of the ancillary table.
US09507781B2 System and method for mobile presentation processing
The invention comprises a system and method using a software application (“app”) running on portable computing devices to download presentations from a central server as thumbnails and manipulate the presentations in thumbnail format. The thumbnails can provide a storybook-type presentation that takes much less memory on a portable device than full native presentation format files. With the thumbnail file, the portable device user can move from slide to slide, reorder slides, delete slides, add slides from other thumbnail files, and add notes/text. After a new presentation is created using one or more thumbnail files, it may be uploaded to a central server where a server-side application recompiles the new presentation into a native format presentation from the thumbnail format. In this manner, presentations can be sourced from virtually anywhere and using nearly any computing device from which one can view thumbnail presentations. Other variations and enhancements are disclosed.
US09507780B2 Media playback queuing for playback management
Management or coordination of playback of digital media assets by an electronic device (e.g., a computing device), that supports media playback is disclosed. According to one embodiment, the electronic device can be controlled such that a user is able to schedule playback of distinct digital media assets.
US09507779B2 Multimedia integration description scheme, method and system for MPEG-7
The invention provides a system and method for integrating multimedia descriptions in a way that allows humans, software components or devices to easily identify, represent, manage, retrieve, and categorize the multimedia content. In this manner, a user who may be interested in locating a specific piece of multimedia content from a database, Internet, or broadcast media, for example, may search for and find the multimedia content. In this regard, the invention provides a system and method that receives multimedia content and separates the multimedia content into separate components which are assigned to multimedia categories, such as image, video, audio, synthetic and text. Within each of the multimedia categories, the multimedia content is classified and descriptions of the multimedia content are generated. The descriptions are then formatted, integrated, using a multimedia integration description scheme, and the multimedia integration description is generated for the multimedia content. The multimedia description is then stored into a database. As a result, a user may query a search engine which then retrieves the multimedia content from the database whose integration description matches the query criteria specified by the user. The search engine can then provide the user a useful search result based on the multimedia integration description.
US09507777B2 Temporal metadata track
Methods, data processing systems and machine readable non-transitory storage media are described that can provide, in one embodiment, a non-time based description of types of metadata in a time based metadata track that can be associated with, in time, a time based media track. The description can include a set of keys, or other identifiers, that specify the types of metadata in the metadata track, and the description can also include values describing the structure of each key and values describing how to interpret each key.
US09507776B2 Annotation system for creating and retrieving media and methods relating to same
The invention described herein is generally directed to a method and apparatus for creating and retrieving audio data. In one implementation the invention comprises an annotation system configured to record, store, and retrieve media. The annotation system contains a set of client-processing devices configured to capture media for subsequent playback. Each client-processing device typically contains a record button to initiate the capture and is configured upon performing the capture operation to trigger an association of a unique ID with the media. The client-processing devices are further configured to upload the media and a unique ID to a server for purposes of storage. The server obtains the media and unique ID for subsequent retrieval and provides the media and the unique ID to at least one client-processing device from the set of client processing devices.
US09507775B1 System for automatically changing language of a traveler's temporary habitation by referencing a personal electronic device of the traveler
A traveler habitation language setting system, including a plurality of habitations, each habitation having at least one smart device having an active language, for use by a traveler having a native language and carrying a personal electronic device. Initially the system associates the personal electronic device of the traveler with one of the habitations. The system determines the native language of the traveler by contacting the personal electronic device and sets the active language of the smart device(s) for that habitation. Example habitations illustrated in the present disclosure include airplane seating locations that have seat back infotainment systems, and hotel rooms having television infotainment devices.
US09507773B2 Translation assistance device, translation assistance system, and control method for the same
The translation assistance device is equipped with: a dictionary means storing dictionary data comprising terms in a specific language, and terms in another language corresponding to the terms in said specific language; a specification means specifying the selected range of a term to be searched for in a text containing the term; a search means searching for the longest full-string match corresponding to the term contained in the specified selected range using said dictionary data as the search target; and a display control means displaying the terms in the other language corresponding to the term matching in the search for the longest full-string match. The translation assistance device searches for the longest full-string match by searching the dictionary means using all characters in the selected range, and reducing the characters in the selected range one at a time from the head character if there is no match.
US09507771B2 Methods for using a speech to obtain additional information
An item of information (212) is transmitted to a distal computer (220), translated to a different sense modality and/or language (222), and in substantially real time, and the translation (222) is transmitted back to the location (211) from which the item was sent. The device sending the item is preferably a wireless device, and more preferably a cellular or other telephone (210). The device receiving the translation is also preferably a wireless device, and more preferably a cellular or other telephone, and may advantageously be the same device as the sending device. The item of information (212) preferably comprises a sentence of human of speech having at least ten words, and the translation is a written expression of the sentence. All of the steps of transmitting the item of information, executing the program code, and transmitting the translated information preferably occurs in less than 60 seconds of elapsed time.
US09507770B2 Methods, systems, and products for language preferences
Methods, systems, and computer program products provide personalized feedback in a cloud-based environment. A client device routes image data to a server for analysis. The server analyzes the image data to recognize people of interest. Because the server performs image recognition, the client device is relieved of these intensive operations.
US09507766B2 Tree tables for mobile devices and other low resolution displays
In one embodiment, a computer-implemented method includes writing, into a tree content column of a tree table, content for a plurality of rows of the tree table. The content spans multiple hierarchical levels, and the content in each of the rows is commonly aligned within the tree content column. A level-indicating icon is associated with each of the hierarchical levels of the tree table. A first level-indicating icon for a first hierarchical level of the tree table is positioned in two or more distinct rows of the tree table having content in the first hierarchical level, and a second level-indicating icon for a second hierarchical level of the tree table is positioned in at least one row of the tree table having content in the second hierarchical level. The tree table is rendered by a computer processor.
US09507765B2 Displaying rotated text inside a table cell
Approaches are described for displaying rotated character strings within cells of tables. In particular embodiments, the display of the rotated character string is handled such that the character string does not extend beyond the edges of the cell. Further, in certain implementations, the character string may be displayed as wrapped and rotated text within the cell, wherein each line of the wrapped character string does not extend beyond the edges of the cell.
US09507756B2 Space efficient counters in network devices
A network device includes a memory and a counter update logic module. The memory is configured to store a plurality of bits. The counter update logic module is configured to estimate a count of quanta within a plurality of data units in a data flow based on statistical sampling of the plurality of data units, and to store the estimated count of quanta in the memory as m mantissa bits and e exponent bits. Them mantissa bits represent a mantissa value M and the e exponent bits represent an exponent value E.
US09507754B2 Modeling passage of a tool through a well
In modeling passage of an elongate well tool through an interval of a well an adaptive machine learning model executed on a computing system receives a first set of inputs representing a plurality of characteristics of the well tool and a second set of inputs representing a plurality of characteristics of the well. The adaptive machine learning model also receives historical data representing a plurality of other well tools passed through a plurality of other wells and a plurality of characteristics of the other well tools and the other wells. The adaptive machine learning model matches the historical data with at least a portion of the first and second sets of inputs, and determines, based on the matching whether the well tool can pass through the interval of the well.
US09507751B2 Managing seed data
Embodiments of the invention provide systems and methods for managing seed data in a computing system (e.g., middleware computing system). A disclosed server computer may include a processor and a memory coupled with and readable by the processor and storing therein a set of instructions which, when executed by the processor, cause the processor to perform a method. The method may include obtaining first input data via a graphical interface. The first input data indicates a first memory storage location of seed data. The seed data comprises data to initialize an application for operation. The method further includes accessing the seed data from the first memory storage location based on the first input data. The method includes storing data based on the seed data to a second memory storage location.
US09507750B2 Dynamic search partitioning
A system can monitor data usage, including an amount of searchable data used and/or a rate at which the searchable data is manipulated, on a storage allocation in a networked environment. The storage allocation can have a quantity/number of partitions, including at least one partition, configured to store the searchable data. The system can detect that the data usage is beyond a specified threshold and then based at least in part on factors such as network traffic, CPU usage, and/or data usage, the system can modify the storage allocation to increase or decrease a size of the partition and/or the quantity of partitions. Network traffic for the storage allocation can be directed away from the portion of the storage allocation being modified. When modifying the storage allocation is complete, the network traffic can be directed to the modified portion of the storage allocation.
US09507747B2 Data driven composite location system using modeling and inference methods
Embodiments respond to a position inference request from a computing device to determine a location of a computing device. The position inference request received from the computing device identifies a set of beacons observed by the computing device. A geographic area is estimated in which the computing device is located using the set of beacons. At least one location method is selected to identify a location of the computing device within the geographic area. In some cases two or more location methods may be employed and their results combined using, for example, a weighting function. The location of the computing device is determined within the geographic area using the set of beacons and the selected location method(s). The location that is determined is communicated to the computing device.
US09507746B2 Control messaging in multislot link layer flit
A link layer control message is generated and included in a flit that is to be sent over a serial data link to a device. The flits sent over the data link are to include a plurality of slots. Control messages can include, in some aspects, a viral alert message, a poison alert message, a credit return message, and acknowledgements.
US09507745B1 Low latency dynamic route selection
Communicating among cores in a computing system comprising a plurality of cores, each core comprising a processor and a switch, includes: routing a packet from a core or from a device coupled to at least one core to a destination over a route including one or more cores, with an order of dimensions associated with the route being selected dynamically upon construction of the packet; routing the packet to a first core in the route over the first selected dimension; and routing the packet from the first core to the destination over the second dimension.
US09507742B2 Variable length arbitration
In one embodiment, a method determines a plurality of categories for requests for a shared resource being shared by a plurality of entities. A request for the resource is received from an entity in the plurality of entities. The method determines a category in the plurality of categories for the received request. If the received request is determined to be in a first category, the method dispatches the received request to a first arbitration scheme configured to determine an arbitration decision in a first time cycle. If the received request is determined to be in a second category, the method dispatches the received request to a second arbitration scheme configured to determine an arbitration decision in a second time cycle of a different length from the first time cycle.
US09507737B2 Arbitration circuitry and method
Arbitration circuitry is provided to select an output from between multiple inputs each having an associated priority value. A tie-break value is appended to the least significant bits of each of the priority values to form extended priority values before those extended priority values are compared. Thus, if two priority values are equal, then the appended tie-break bits are used to determine which of the two inputs will be selected as having the higher priority.
US09507731B1 Virtualized cache memory
A memory address and a virtual cache identifier are received in association with a request to retrieve data from a cache data array. Context information is selected based on the virtual cache identifier, the context information indicating a first region of a plurality of regions within the cache data array. A cache line address that includes a first number of bits of the memory address in accordance with a size of the first region is generated and, if the cache data array is determined to contain, in a location indicated by the cache line address, a cache line corresponding to the memory address, the cache line is retrieved from the location indicated by the cache line address.
US09507730B2 Maintaining processor resources during architectural events
In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
US09507729B2 Method and processor for reducing code and latency of TLB maintenance operations in a configurable processor
A memory management unit (MMU) is disclosed for storing mappings between virtual addresses and physical addresses. The MMU includes a translation look-aside buffer (TLB) and a memory management unit controller. The TLB stores mappings between a virtual address and a physical address. The MMU controller receives a request to insert an entry into the TLB and performs a set of operations based on the received request. The MMU controller determines whether an entry stored in the TLB is associated with the virtual address of the request, removes the entry stored in the TLB that is associated with the virtual address and inserts the requested entry into the TLB.
US09507728B2 Bridge circuitry for translating between memory transactions of first type and memory transactions of a second type
A data processing apparatus 2 includes bridge circuitry 14, 16, 18 which serves to translate memory transactions of a first type (AXI) into memory transactions of a second type (PCI Express). The bridge circuitry includes translation circuitry 18 which maps at least some of the bits of attribute data of a memory transaction of the first type to unused bits within the significant bits of an address of the second type, which are unused to represent significant bits of the address of memory transactions of the first type.
US09507727B2 Page fault injection in virtual machines
Described systems and methods allow protecting a host system from malware using virtualization technology. In some embodiments, a memory introspection engine operates below a virtual machine (VM) executing on the host system. The engine is configured to analyze the content of a virtual memory page used by software executing within the VM, and/or to protect the respective content from unauthorized modification, for instance by malware. When the respective content is swapped out of memory, the memory introspection engine injects a page fault into the respective VM, to force a swap-in of the respective content.
US09507726B2 GPU shared virtual memory working set management
A method and apparatus of a device that manages virtual memory for a graphics processing unit is described. In an exemplary embodiment, the device manages a graphics processing unit working set of pages. In this embodiment, the device determines the set of pages of the device to be analyzed, where the device includes a central processing unit and the graphics processing unit. The device additionally classifies the set of pages based on a graphics processing unit activity associated with the set of pages and evicts a page of the set of pages based on the classifying.
US09507724B2 Memory access processing method and information processing device
A memory access processing method includes storing, in a cache memory, a plurality of pages stored in a main memory; storing the plurality of pages in a buffer memory, each of the plurality of pages being associated with an identifier indicating whether the each of the plurality of pages being a zero page to be zero-cleared; allocating a page to be set to a zero page, when a page fault occurs during execution of an access to the cache memory and execution of a process is stopped; updating an identifier corresponding to the allocated page to an identifier indicating the allocated page being the zero page; resuming the execution of the process; controlling an access to the cache memory, based on the identifier for each of the plurality of pages; and executing initialization of a page corresponding to the allocated page and is included in the main memory.
US09507720B2 Block storage-based data processing methods, apparatus, and systems
The present disclosure relates to the field of information technology, and in particular, to a block storage-based data processing method, apparatus, and system. The block storage-based data processing method provided in embodiments of the present disclosure is applied in a system including at least two storage nodes, each storage node including a CPU, a cache medium, and a non-volatile storage medium, and the cache medium in all the storage nodes forming a cache pool. According to the method, after receiving a data operation request sent by a client, a service processing node sends the data operation request to a corresponding storage node in the system according to a logical address carried in the data operation request, so that the data operation request is processed in the cache medium of the storage node under control of the CPU of the storage node.
US09507717B1 Multithreaded transactions
Embodiments relate to multithreaded transactions. An aspect includes assigning a same transaction identifier (ID) corresponding to the multithreaded transaction to a plurality of threads of the multithreaded transaction, wherein the plurality of threads execute the multithreaded transaction in parallel. Another aspect includes determining one or more memory areas that are owned by the multithreaded transaction. Another aspect includes receiving a memory access request from a requester that is directed to a memory area that is owned by the transaction. Yet another aspect includes based on determining that the requester has a transaction ID that matches the transaction ID of the multithreaded transaction, performing the memory access request without aborting the multithreaded transaction.
US09507712B2 Determining a benefit of reducing memory footprint of a java application
Changes in performance in a Java program are deduced from information related to garbage collection events of the program. Assumptions are made about the system, the application and garbage collection, and changes in performance that will result from modifying the program are deduced.
US09507708B2 Method for managing memory apparatus, associated memory apparatus thereof and associated controller thereof
A method for managing a memory apparatus and the associated memory apparatus thereof and the associated controller thereof are provided, where the method includes: temporarily storing data received from a host device into a volatile memory in the controller and utilizing the data in the volatile memory as received data, and dynamically monitoring the data amount of the received data to determine whether to immediately write the received data into at least one NV memory element; and when a specific signal is received and it is detected that specific data having not been written into a same location in a specific block configured to be an MLC memory block within a specific NV memory element of the at least one NV memory element for a predetermined number of times exists in the received data, immediately writing the specific data into another block in the at least one NV memory element.
US09507706B2 Memory system controller including a multi-resolution internal cache
A memory system comprising a non-volatile memory and a controller in communication with the non-volatile memory is disclosed. The controller may include a central processing unit (“CPU”) and an internal cache in communication with the CPU via a plurality of cache lines. The CPU is configured to utilize a first subset of the plurality of cache lines when accessing data stored in the internal cache at a first resolution. Additionally, the CPU is configured to utilize a second subset of the plurality of cache lines when accessing data stored in the internal case at a second resolution, where the first and second resolutions are different resolutions.
US09507702B2 Method of performing write access by distributing control rights to threads, memory controller and flash memory storage device using the same
A flash memory storage device, a controller thereof, and a programming management method thereof are provide for the flash memory storage device including a flash memory chip, wherein at least a first thread and a second thread are to be implemented within the flash memory storage device. The method includes defining a predetermined programming unit and receiving a first write command sent by a host. The method also includes distributing a control right of the flash memory chip to the first thread if the first write command is determined to be executed by the first thread, and controlling the first thread to release the control right of the flash memory chip after the first thread finishes a programming operation of the predetermined programming unit.
US09507693B2 Method, device and computer-readable storage medium for closure testing
A method for closure testing is disclosed. The method includes: acquiring an identification of a closure to be tested; generating code to be inserted based on the identification of the closure to be tested; searching and obtaining a corresponding annotation based on the identification of the closure to be tested, and determining a closure corresponding to the identification of the closure to be tested based on the annotation; adding the generated code to be inserted to the searched closure; and testing the closure added the code to be inserted. In addition, the present disclosure also discloses a device for closure testing. For the above method and device for closure testing, it reduces the burden of the tester and improves testing efficiency, and the source code published to the network need not to make an internal interface in a closure be exposed for testing, which improves the security of the program.
US09507691B2 Conditional component breakpoint setting system and method
A method, computer program product, and computer system for setting, at a computing device, a breakpoint of a plurality of breakpoints for use by a debugger at an entry point of a plurality of entry points for a component of a plurality of components, wherein the breakpoint is set automatically. While executing the debugger on the component, it is determined whether the breakpoint is reached from outside of the component by a program. If the breakpoint is reached from outside of the component, the program executed by the debugger stops. If the breakpoint is reached from inside of the component, the program executed by the debugger continues.
US09507688B2 Execution history tracing method
An execution history tracing method includes tracing an execution history of a CPU upon executing, in a semiconductor device including the CPU, a program by using the CPU, for one or a tracing target, from outside the semiconductor device via software. The execution history tracing method includes recording, in a buffer, target information as trace information about an execution of the one or the tracing target, for each instruction cycle in which the target information is produced as the execution history; and performing data sorting by using the software to group the trace information about the execution of the one or the tracing target, the trace information being recorded for the each instruction execution cycle, for each of the one or the tracing target.
US09507687B2 Operation management device, operation management method, and operation management program
An operation management device includes: an information collection module which collects, from a managed device, first and second performance information showing a time series change in the performance information; a correlation model generation module which derives a correlation function between the first and second performance information and creates a correlation model based on the correlation function; a correlation change analysis module which judges whether or not the current first and second performance information acquired by the information collection module satisfy the relation shown by the conversion function between the first and second performance information of the correlation model within a specific error range; and a failure period extraction module which, when the first and second performance information does not satisfy the relation shown by the conversion function of the correlation model , extracts a period of that state as a failure period.
US09507682B2 Dynamic graph performance monitoring
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for dynamic graph performance monitoring. One of the methods includes receiving multiple units of work that each include one or more work elements. The method includes determining a characteristic of the first unit of work. The method includes identifying, by a component of the first dataflow graph, a second dataflow graph from multiple available dataflow graphs based on the determined characteristic, the multiple available dataflow graphs being stored in a data storage system. The method includes processing the first unit of work using the second dataflow graph. The method includes determining one or more performance metrics associated with the processing.
US09507681B2 Scalable testing in a production system with autoscaling
A network-based production service is configured to process client requests for the production service via a network, capture production request data defining the requests and store the production request data in a data store. A test system comprising one or more controllers creates test jobs according to a test plan for testing the production service. The test plan creates a test profile for using specified production request data to simulate a load on the production service. Each job created by the test plan specifies a portion of production request data. A job queue receives and queues test jobs from one or more controllers configured to add test jobs to the job queue according to the test plan. Workers access jobs from the job queue and the production request data from the data store as specified in each job and replay the production request data to the production service.
US09507678B2 Non-disruptive controller replacement in a cross-cluster redundancy configuration
During a storage redundancy giveback from a first node to a second node following a storage redundancy takeover from the second node by the first node, the second node is initialized in part by receiving a node identification indicator from the second node. The node identification indicator is included in a node advertisement message sent by the second node during a giveback wait phase of the storage redundancy giveback. The node identification indicator includes an intra-cluster node connectivity identifier that is used by the first node to determine whether the second node is an intra-cluster takeover partner. In response to determining that the second node is an intra-cluster takeover partner, the first node completes the giveback of storage resources to the second node.
US09507676B2 Cluster creation and management for workload recovery
Aspects of the disclosure relate to managing migration of one or more applications from a primary computing device to recovery computing devices using a controller. Resource data that includes application resource requirements and resource capacities is monitored. An application exists as a single instance on the primary computing device. A recovery cluster for the application consisting of recovery computing devices is determined. A division of the application into a plurality of application instances is identified. In response to the resource data being updated, a new recovery cluster is determined. In response to the new recovery cluster, a new plurality of application instances is identified. Once a triggering event on the primary computing device is detected, the controller migrates the new application instances to the new recovery cluster. Other uses of the disclosure are possible.
US09507675B2 Systems and methods for recovering from uncorrected DRAM bit errors
Systems, methods, and computer programs are disclosed for recovering from dynamic random access memory (DRAM) defects. One method comprises determining that an uncorrected bit error has occurred for a physical codeword address associated with a dynamic random access memory (DRAM) device coupled to a system on chip (SoC). A kernel page associated with a DRAM page comprising the physical codeword address is identified as a bad page. Recovery from the uncorrected bit error is provided by rebooting a system comprising the SoC and the DRAM device. In response to the rebooting, the identified kernel page is excluded from being allocated for DRAM operation.
US09507673B1 Method and system for performing an incremental restore from block-based backup
Techniques for performing an incremental restore from block-based backup are described herein. One method starts by parsing entries in first block allocation table (BAT) associated with first full backup information of parent volume to determine BAT entry corresponding to start of parent volume. Merged BAT associated with resultant image is then generated based on first BAT and incremental BATs respectively associated with one or more incremental backup information. One or more incremental backup information is based on incremental changes to parent volume subsequent to first full backup information being generated. Volume used blocks information is then generated based on merged BAT. Volume used blocks information includes start location of each volume used block. Starting from the entry corresponding to start of parent volume, data in blocks identified by each entry in merged BAT are read and written to target volumes corresponding respectively to each entry in merged BAT.
US09507671B2 Write cache protection in a purpose built backup appliance
For write cache protection of purpose built backup appliances in a computing environment, backup data of the write cache is created using a server memory that includes the write cache in a redundant array of independent disks (RAID) system. The server memory is not controlled by a failing RAID card and/or NVRAM card that controls the write cache. The backup data in the server memory is flushed to a persistent storage device subsequent to detecting a failure of the write cache for enabling recovery of the backup data using the persistent storage device during a reboot operation.
US09507670B2 Selective processing of file system objects for image level backups
Systems, methods, and computer program products are provided for reducing the size of image level backups. An example method receives backup parameters identifying a physical or Virtual Machine (VM) to backup and at least one file system object to include in the backup. The method connects to production storage corresponding to the selected physical or virtual machine and obtains access to data stored in disk corresponding to the selected file system object(s). The method fetches file allocation table (FAT) blocks from the disk and parses contents of the FAT blocks to determine if the disk blocks correspond to the selected file system object(s). The method creates a backup disk image FAT comprising blocks corresponding to the selected file system object(s). The method creates a reconstructed disk image FAT blocks corresponding to the backup FAT and disk image data blocks belonging to the selected file system object(s) and all other disk image data blocks are saved as zero blocks. A reconstructed disc image is compressed and stored in a backup file on backup storage, or replicated (copied) to another storage intact.
US09507669B2 Method of transmitting data using HARQ
A method of data transmission using HARQ is provided. The method includes transmitting an uplink data, receiving an ACK/NACK signal for the uplink data, keeping the uplink data in a HARQ buffer when the ACK/NACK signal is an ACK signal, and retransmitting the uplink data when an uplink scheduling information for retransmission of the uplink data is received. In the present invention, a transmission error in an ACK/NACK signal is promptly detected, and thus data can be transmitted at a high speed.
US09507668B2 System and method for implementing a block-based backup restart
A system and method for block-based restarts are described. A data storage system interfaces with one or more nodes of a network file system on which a volume is provided in order to read data stored on the volume on a block-by-block basis. Backup data sets capable of recreating the data on the volume are generated from the data blocks read from the volume. The system can interface with a backup memory resource and write the backup data sets to the backup memory resource in a sequential order. As the backup data sets are generated and written to the backup memory resource, restart checkpoints for the data set are also regularly generated and stored for use in restarting the backup process in the event of a recoverable failure in the transfer.
US09507667B1 Computer methods and computer systems for automatic data analysis, reconcilliation and repair
In some embodiments, the instant invention includes a computer-implemented method that includes: specifically programming at least one computer system to perform: automatically obtaining input financial data; automatically determining units of work that the input financial data can be organized into; automatically importing the input financial data into a database based on the units of work; automatically validating the imported input financial data, by: identifying deficient units of work based on predefined rules, where each deficient unit of work has a current data error; analyzing, based on research information, the current data error to determine a current corrective action to remedy the current data error; and verifying that the current corrective action does not result in: an additional deficient unit of work, an additional data error, and a change in at least one predefined data report; and automatically executing the current corrective action to remedy the current data error.
US09507661B2 Bus system having a master and a group of slaves and communication method for interchanging data in said bus system
The invention relates to a bus system having a master and a group of slaves connected thereto via a bus and to a communication method for interchanging data between the master and slaves in such a bus system. At least one communication frequency is associated with each slave in the group. The master places transmission data at different communication frequencies onto the bus in transmission phases. Each slave in the group reads in and processes those transmission data which have been placed onto the bus by the master at a frequency corresponding to the, or a, communication frequency associated with this slave and ignores and rejects those transmission data which have been placed onto the bus by the master at a frequency corresponding to a communication frequency associated with another slave in the group, with the result that each slave in the group can be individually addressed by the master by virtue of the fact that transmission data are transmitted from the master to each of the slaves in the group at that communication frequency which has been associated with said slave.
US09507660B2 Eliminate corrupted portions of cache during runtime
In an approach for taking corrupt portions of cache offline during runtime, a notification of a section of a cache to be taken offline is received, wherein the section includes one or more sets in one or more indexes of the cache. An indication is associated with each set of the one or more sets in a first index of the one or more indexes, wherein the indication marks the respective set as unusable for future operations. Data is purged from the one or more sets in the first index of the cache. Each set of the one or more sets in the first index is marked as invalid.
US09507659B2 Temporary pipeline marking for processor error workarounds
Embodiments include a method for temporary pipeline marking for processor error workarounds. The method includes monitoring a pipeline of a processor for an event that is predetermined to place the processor in a stuck state that results in an errant instruction execution result due to the stuck state or repeated resource contention causing performance degradation. The pipeline is marked for a workaround action based on detecting the event. A clearing action is triggered based on the marking of the pipeline. The marking of the pipeline is cleared based on the triggering of the clearing action.
US09507657B2 Investigation program, information processing apparatus, and information processing method
A non-transitory computer readable storage medium that stores therein an investigation program for causing an information processing apparatus to execute processing, the processing includes creating, in a storage medium, a first dump file for writing out data in a memory in the information processing apparatus when an operating system detects a first abnormality, rebooting the information processing apparatus without erasing the data stored in the memory after the detection of the first abnormality and after the creation of the first dump file, creating, during the reboot, a first table that associates a plurality of page areas in the memory and a plurality of dump file areas in the first dump file that correspond to the page areas, and writing out, when a page area in the memory is released, data stored in the page area to the first dump file.
US09507656B2 Mechanism for handling unfused multiply-accumulate accrued exception bits in a processor
A mechanism for handling unfused multiply-add accrued exception bits includes a processor including a floating point unit, a storage, and exception logic. The floating-point unit may be configured to execute an unfused multiply-accumulate instruction defined with the instruction set architecture (ISA). The unfused multiply-accumulate instruction may include a multiply sub-operation and an accumulate sub-operation. The storage may be configured to maintain floating-point exception state information. The exception logic may be configured to capture the floating-point exception state after completion of the multiply sub-operation and prior to completion of the accumulate sub-operation, for example, and to update the storage to reflect the floating-point exception state.
US09507648B1 Separate plug-in processes in browsers and applications thereof
Embodiments of the present invention relate to browser plug-ins. In one embodiment, a system browses web content using a plug-in. The system includes at least one renderer process that detects plug-in content in the web content. Separate from the at least one tenderer process, the system also includes a plug-in process that includes the plug-in and communicates with the at least one renderer process to interpret the plug-in content using an inter-process communication channel.
US09507647B2 Cache as point of coherence in multiprocessor system
In a multiprocessor system, a conflict checking mechanism is implemented in the L2 cache memory. Different versions of speculative writes are maintained in different ways of the cache. A record of speculative writes is maintained in the cache directory. Conflict checking occurs as part of directory lookup. Speculative versions that do not conflict are aggregated into an aggregated version in a different way of the cache. Speculative memory access requests do not go to main memory.
US09507644B2 Task scheduling based on thermal conditions of locations of processors
Provided is a computer system including a first processor disposed in a first zone, a second processor disposed in a second zone, a prioritizing unit, and a scheduling unit. The prioritizing unit prioritizes the first processor and the second processor based on the thermal conditions of the first zone and the second zone, respectively. The scheduling unit schedules a task to one of the first processor and the second processor according to the priority provided by the prioritizing unit.
US09507642B2 Method and systems for sub-allocating computational resources
The disclosed embodiments relate to systems and methods for method and systems for sub-allocating computational resources. A first computing device receives information associated with a first set of computational resources from a cloud infrastructure. The first set of computational resources has been allocated to the first computing device by the cloud infrastructure. A first set of parameters associated with a workflow received by the first computing device is determined. The first set of parameters is indicative of a need of the first set of computational resources by the first computing device. One or more computational resources from the first set of computational resources are sub-allocated based on the determined first set of parameters.
US09507637B1 Computer platform where tasks can optionally share per task resources
Disclosed are apparatus and methods for managing thread resources. A computing device can generate threads for an executable application. The computing device can receive an allocation request to allocate thread-specific memory for an executable thread of the threads, where thread-specific memory includes a call stack for the executable thread. In response to the allocation request, the computing device can: allocate the thread-specific memory and indicate that the executable thread is ready for execution. The computing device can execute the executable thread. The computing device can receive a sleep request to suspend executable thread execution. In response to the sleep request, the computing device can determine whether the allocated thread-specific memory is to be deallocated. After determining that the allocated thread-specific memory is to be deallocated: the thread-specific memory can be deallocated and an indication that the executable thread execution is suspended can be provided.
US09507636B2 Resource management and allocation using history information stored in application's commit signature log
Aspects of the present disclosure are directed towards managing computing resources. Managing computing resources can include initializing in a computer system, an application that corresponds to one or more commit signatures, each of the one or more commit signatures correspond to a transaction within the application and determining that a commit signature of one or more commit signatures is saved in a commit block (COB). Managing computing resources can include retrieving, from the COB, in response to determining that the commit signature is saved in the COB, a first set of resource data that corresponds to the commit signature, the first set of resource data contains information for resource usage that corresponds to the application and allocating resources accessible to the computer system based on the first set of resource data.
US09507634B1 Methods and system for distributing technical computing tasks to technical computing workers
A method and system is disclosed for providing a distributed technical computing environment for distributing technical computing tasks from a technical computing client to technical computing workers for execution of the tasks on one or more computers systems. Tasks can be defined on a technical computing client, and the tasks organized into jobs. The technical computing client can directly distribute tasks to one or more technical computing workers. Furthermore, the technical computing client can submit tasks, or jobs comprising tasks, to an automatic task distribution mechanism that distributes the tasks automatically to one or more technical computing workers providing technical computing services. The technical computing worker performs technical computing of tasks and the results of the execution of tasks may be provided to the technical computing client.
US09507632B2 Preemptive context switching of processes on ac accelerated processing device (APD) based on time quanta
Methods, systems, and computer readable media for preemptive context-switching of processes on an accelerated processing device are based upon a comparison of the running time of the process and a threshold time quanta. A method includes preempting a process running on an accelerated processing device based upon a running time of the process and a threshold time quanta.
US09507630B2 Application context transfer for distributed computing resources
In one embodiment, a universal programming module on a first device collects context and state information from a local application executing on the first device, and provides the context and state information to a context mobility agent on the first device. The context mobility agent establishes a peer-to-peer connection with a second device, and transfers the context and state information to the second device, such that a remote application may be configured to execute according to the transferred context and state information from the first device. In another embodiment, the context mobility agent receives remote context and remote state information from the second device, wherein the remote application had been executing according to the remote context and remote state information, and provides the remote context and remote state information to the universal programming module to configure the local application to execute according to the remote context and remote state information.
US09507628B1 Memory access request for a memory protocol
A computer-implemented method includes identifying two or more memory locations and referencing, by a memory access request, the two or more memory locations. The memory access request is a single action pursuant to a memory protocol. The computer-implemented method further includes sending the memory access request from one or more processors to a node and fetching, by the node, data content from each of the two or more memory locations. The computer-implemented method further includes packaging, by the node, the data content from each of the two or more memory locations into a memory package, and returning the memory package from the node to the one or more processors. A corresponding computer program product and computer system are also disclosed.
US09507621B1 Signature-based detection of kernel data structure modification
A method and apparatus for signature-based detection of kernel data structure modification are disclosed. In the method and apparatus a signature is generated for a kernel data structure, whereby the kernel data structure is capable of being modified based at least in part on access to the kernel data structure. The signature is also updated as a result of access to the kernel data structure due at least in part to one or more identified instructions being executed. The signature is used to determine whether the kernel data structure is accessed by one or more other instructions.
US09507619B2 Virtualizing a host USB adapter
Virtualizing a host USB adapter in a virtualized environment maintained by a hypervisor, the hypervisor administering one or more logical partitions, where virtualizing includes receiving, by the hypervisor from a logical partition via a logical USB adapter, a USB Input/Output (‘I/O’) request, the logical USB adapter associated with a USB device coupled to the host USB adapter; placing, by the hypervisor, a work queue element (‘WQE’) in a queue of a queue pair associated with the logical USB adapter; and administering, by an interface device in dependence upon the WQE, USB data communications among the logical partition and the USB device including retrieving, with direct memory access (‘DMA’), USB data originating at the USB device from the host USB adapter into a dedicated memory region for the logical USB adapter.
US09507618B2 Virtual machine system supporting a large number of displays
A method and system for supporting multiple displays in a virtual machine (VM) environment are disclosed. The system includes a client device coupled to a server hosting one or more VMs. The client device may include multiple displays anda client display manager coupled to the displays. The client display manager may be operable to establish display connections with virtual devices of a VM, receive data generated by the VM via the display connections, and forward the data to a display controller of a relevant display.
US09507617B1 Inter-virtual machine communication using pseudo devices
Communication between software components in different virtual machines may be made through a hypervisor between pseudo-devices that have no corresponding physical device. A software component in a virtual machine transfers data to a pseudo-device in the virtual machine. The pseudo-device is connected to another pseudo-device in another virtual machine, and the connection is through the hypervisor. The data from the software component is transferred from the pseudo-device to the other pseudo-device over the connection through the hypervisor. The other pseudo-device in the other virtual machine receives the data and provides the data to another software component in the other virtual machine.
US09507614B2 Method and system for presenting and managing storage shares
Methods and systems for managing storage shares in a virtual environment having a plurality of virtual machines are provided. The system includes a storage system for managing storage space for the storage shares and generating a quota report. The quota report shows an assigned quota for each storage share and actual storage used by each storage share. The assigned quota indicates an amount of designated storage space for each storage share. The system also includes a storage provider for obtaining the quota report from the storage system and filtering the quota report based on storage shares that are managed by the storage provider. The storage provider modifies a quota for a storage share based on a client request and notifies the storage system of the modification.
US09507613B2 Methods and apparatus for dynamically preloading classes
A class preloading mechanism that dynamically preloads classes at runtime in a virtual machine (VM) environment. Data structures representing preloaded classes may be stored in a persistent module corresponding to a classloader. A persistent module can be directly mapped or copied into a memory region at runtime so that the classes may not have to be loaded from the class file container. The preloaded classes are not fully linked and resolved. When a classloader receives a class request, the classloader looks up the preloaded class in the memory region and completes linking and resolution of the class. Persistent modules may be pre-generated and, for example, installed with an application. Alternatively, a persistent module for a class file container may be generated at runtime by preloading classes from the class file container into a memory region and storing data structures representing the classes as a persistent module.
US09507611B2 Electronic apparatus, control device, control method, and computer readable medium
An electronic apparatus includes a first controller, a second controller, and plural devices. The first controller executes a first operating system. The second controller executes a second operating system. The plural devices are controlled by the second controller. The first controller includes a first conversion unit, a command writing unit, a status reading unit, a second conversion unit, a status disposal unit, and a reset unit. The first conversion unit converts a function which is called by a process into a command. The command writing unit writes the command to a storage region of the second controller. The status reading unit reads a status. The second conversion unit converts the read status into a return value, and returns the return value to the process. The status disposal unit disposes of, for each communication channel, the read status. The reset unit resets, for each communication channel, software and a device.
US09507610B2 Task-sensitive methods and systems for displaying command sets
Methods and systems present commands to a user within a software application program by determining the user's context within the application program and automatically presenting in a user interface commands that pertain to the user's current context. When the user's context changes, the context-sensitive commands are automatically removed from the user interface. In one implementation context blocks and context panes are employed to present the commands.
US09507608B2 Systems and methods for displaying notifications received from multiple applications
Systems and methods are disclosed for displaying notifications received from multiple applications. In some embodiments, an electronic device can monitor notifications that are received from the multiple applications. Responsive to receiving the notifications, the electronic device can control the manner in which the notifications are displayed while the device is operating in a locked or an unlocked state. In some embodiments, the electronic device can allow users to customize how notifications are to be displayed while the device is in the locked and/or unlocked states.