| Document | Document Title |
|---|---|
| US09485343B2 |
System and method to sort messages exchanged in a wireless personal area network according to relative orientations and positions of sending and receiving devices
Apparatus and methods are described herein for sorting messages sent and received, for example in a wireless Personal Area Network (PAN), according to whether the receiving device is within a radially defined region of space. The space may be defined by one or more parameters set by the sending device. A wireless PAN may define the range of peer-to-peer transmission and reception of radio waves between at least two wireless devices. Location and orientation information may be transmitted by a communication device and combined with user and/or software defined boundary limits to filter short range wireless messages. |
| US09485342B2 |
Wireless device system-architecture
According to the presently disclosed subject matter there is provided a wireless device system-architecture and a wireless device including a plurality of functional layers each of the functional layers comprising one or more respective layer elements where the plurality of functional layers being operatively connected and ordered as a cascade of functional layers for data-transfer from one layer to its one or more adjacent functional layers. The architecture further includes one or more matrix-switches, each matrix-switch operatively connected between each two functional layers in the cascade of functional layers. A matrix-switch controller is operable to determine at least two processing routes for data-transfer from at least one layer element in one functional layer, to at least one layer element in a second functional layer, wherein each of the at least two processing routes is associated with a different application processor layer element and wherein data is being transmitted via the at least two processing routes, in the same direction, substantially at the same time. |
| US09485341B2 |
Terminal device and method for controlling the same
A terminal device and a method for controlling the same are disclosed herein. The terminal device includes a communication unit configured to perform communication with an external target, a rollable display unit configured to be stored in the housing and to be exposed from the housing, a sub display unit configured to be positioned on a portion of the housing, a grip unit configured to be positioned on a lower portion of the housing and to detect whether or not a contact is being made, a sensor unit configured to detect a movement of the terminal device, an input unit configured to receive commands from an external source, and a controller, wherein the controller may be configured to set up a first mode, in case the rollable display unit is exposed from the housing, wherein at least one key of the input unit is mapped to a key configured to perform a function respective to the first mode, and to set up a second mode, in case the rollable display unit is stored in the housing, and in case a contact state detected by the grip unit matches with a predetermined contact state, wherein at least one key of the input unit is mapped to a key configured to perform a function respective to the second mode. |
| US09485333B2 |
Method and apparatus for network streaming
A method of data streaming in a streaming system (200) that comprises a processor (202) and a controller (204) operably coupled to a streaming peripheral (214) via a shared interconnect (206) is described. The method comprises at the controller, receiving at least one descriptor that points to at least one header data element in memory and at least one payload buffer element in the streaming peripheral (214); reading the at least one descriptor (211) by the controller (204); fetching by the controller the at least one header data element from memory and the at least one payload element from the payload buffer (212) in the streaming peripheral (214) referred to by the descriptor (211). |
| US09485326B1 |
Scalable multi-client scheduling
A method includes receiving a plurality of requests, determining a plurality of first bank identifiers specifying respective physical memory banks, and selecting, based at least on the first bank identifiers, a first set of requests to be processed according to a scheduling hierarchy. Selecting the first set of requests includes prohibiting any two requests from being associated with a same first bank identifier. The method also includes processing, during a single processing cycle, ones of the first set of requests at respective nodes within a single level of the scheduling hierarchy. The method also includes, responsively at least to processing ones of the first set of requests at respective nodes within the single level of the scheduling hierarchy, selecting a queue, and, responsively at least to selecting the queue, causing one or more packets corresponding to a traffic class associated with the queue to be sent to an egress port. |
| US09485320B1 |
Monitoring and controlling perception of an online profile of a user
One embodiment provides a system for monitoring and controlling an online profile of a user. In response to receiving a data request from the user to access a first web site, the system forwards the data request and desired persona scores to an intelligence service system, receives a list of other web sites from the intelligence service system, and counteracts the user's access to the first web site by spawning multiple threads in accordance with the list received. The multiple threads spawned are transparent to the user. Further, the system alters an original data post submission from the user based on a desired translation option, maps the altered data post submission to a first key, and posts the altered data post submission to a target web site. The original data post submission is viewable only by the user and other users with the first key. |
| US09485316B2 |
Method and apparatus for passively monitoring online video viewing and viewer behavior
Various user behaviors are passively monitored and recorded when a user/viewer interacts with a network video player, e.g. a web video player, while watching an online video clip. For one embodiment, a data collection agent (DCA) is loaded to the player and/or to a web page that displays the video clip. The DCA passively collects detailed viewing and behavior information without requiring any specific input or actions on the part of the user. Indications of user preferences are inferred by user actions leading up to viewing the video, while viewing the video, and just after and still related to viewing the video. The DCA periodically sends this information to a central server where it is stored in a central database and where it is used to determine preference similarities among different users. Recorded user preference information may also be used to rate a video itself. |
| US09485307B1 |
Broadcasting network identifiers that are based on media items
Disclosed are various embodiments for generating a network identifier that is based on a media item. A network identifier system processes a media item. The network identifier system generates a network identifier that is based on the media item. The network identifier system broadcasts the network identifier that was generated. |
| US09485299B2 |
Progressive download gateway
Embodiments disclosed herein relate to a gateway for delivering scalable media files from a web server to a client in a manner that allows dynamic thinning. The gateway includes a control module for receiving a request for a scalable media file, forwarding the request to a web server, receiving the scalable media file from the web server using a first protocol, transmitting a redirect message to the client, and receiving a streaming request from the client in response; a packet processor for packetizing the scalable media file to produce raw scalable media packets; an encapsulation module for encapsulating the raw scalable media packets using a second protocol to produce encapsulated scalable media packets; and an output module for streaming the encapsulated scalable media packets to the client in response to the streaming request. The gateway may also include a module for thinning the raw scalable media packets prior to encapsulation. |
| US09485295B2 |
Transmitting apparatus, receiving apparatus, and signal processing method thereof
A transmitting apparatus, a receiving apparatus and methods of controlling these apparatuses are provided. The transmitting apparatus includes: a baseband packet generator configured to, based on an input stream including a first type stream and a second type stream, generate a baseband packet including a header and payload data corresponding to the first type stream; a frame generator configured to generate a frame including the baseband packet; a signal processor configured to perform signal-processing on the generated frame; and a transmitter configured to transmit the signal-processed frame, wherein the header includes a type of the payload data in the baseband packet and the number of the first type stream packets in the baseband packet. |
| US09485293B2 |
Dynamic chunk manipulation for streaming mixed media: application programming interface
Timestamps for streams of media that transition from one media source to another (such as from live content to on-demand content, and vice versa) can be rewritten by a server to help ensure error-free streaming by the client. Embodiments can coordinate the creation of a client manifest with the dynamic creation of a requested segment of media (i.e., “chunk”) to determine how to rewrite timestamps of requested chunks such that they are continuous through the transition. |
| US09485290B1 |
Method and system for controlling local display and remote virtual desktop from a mobile device
A computer-implemented method for transmitting and controlling images of a remotely executed application, the method including connecting a mobile computing device to a remote server; connecting a desktop computing device to the remote server and to the mobile computing device; starting an application on the remote server, wherein the application generates graphical objects controllable by commands from the mobile computing device; encoding each graphical object into a video stream; transferring the video stream to the mobile computing device and to the desktop computing device; generating the commands on mobile computing device; sending the commands to the remote server; detecting if the video stream contains results of execution of the commands; displaying the graphical objects on the local computing device; and generating an image of a substitute graphic object image if the video stream does not contain the results. |
| US09485286B1 |
Sharing media items with pass phrases
A sharing service receives a request to store a media item stored on an electronic book reader device for sharing with one or more other content rendering devices. In response, the sharing service associates a pass phrase with the request. The sharing service then provides the media item to those devices (e.g., eBook reader devices) that provide the pass phrase to the sharing service within a predetermined amount of time. |
| US09485284B2 |
Customizing participant information in an online conference
Various embodiments of systems, methods, and computer programs are disclosed for customizing participant information in an online conference. One embodiment is a method for customizing display of participant information in an online conference. The method comprises: a conferencing system establishing an online conference with a plurality of client devices via a communication network, each client device associated with a participant in the online conference; the conferencing system presenting a conference user interface to the client devices, the conference user interface displaying an interactive participant object identifying each of the participants; and during the online conference, one of the participants customizing presentation of at least one of the interactive participant objects via the conference user interface. |
| US09485283B2 |
Method and apparatus for enabling communications between users
A method and device are provided for creating and utilizing a database which enables ascribing a plurality of communication addresses to each of a plurality of users' entries comprised therein, and wherein each of the plurality of communication addresses is associated with a different communication application, allowing a user who wishes to communicate with another user while applying a certain communication application, to communicate with that other user who uses a different communication application. |
| US09485280B2 |
Proposal system access policy enforcement
Described herein are techniques and mechanisms for access policy creation and enforcement. According to various embodiments, a message may be received via a communications interface. The message may include a request to perform an action within a proposal system. The proposal system may be operable to create a request for proposals based on user input. The request for proposals may describe a business need associated with a business entity. The proposal system may be further operable to process a plurality of proposal documents received in response to the request for proposals. The request may be associated with a user account. A determination may be made as to whether the requested action complies with an access policy. The requested action may be performed when it is determined that the requested action complies with the access policy. |
| US09485274B2 |
Traffic segmentation in prevention of DDOS attacks
Systems, methods, and computer storage media for traffic segmentation in prevention of DDoS attacks are provided. Data associated with one or more users of a particular service or network is collected. Properties associated with the data are identified. In embodiments, the properties are shared with one or more related services. One or more requests are received for the service or related services. The legitimacy of the one or more requests is predicted. |
| US09485273B2 |
System and method to diffuse denial-of-service attacks using virtual machines
A system for diffusing denial-of-service attacks by using virtual machines is disclosed. In particular, the system may receive, from a measurement probe, a network transaction measurement associated with a first node in a network. Based on the network transaction measurement, the system may determine if the network transaction measurement satisfies a threshold measurement value. If the network transaction measurement satisfies the threshold measurement value, the system may determine that an attack is occurring at the first node in the network. The system may then identify one or more nodes that have capacity for handling traffic intended for the first node. Once the one or more nodes are identified, the system may launch virtual machines at the one or more nodes to handle legitimate traffic intended for the first node. |
| US09485266B2 |
Security measures based on signal strengths of radio frequency signals
Electromagnetic (EM)/radio frequency (RF) emissions may be detected and corresponding EM personas may be created. One or more EM personas may be associated with a super persona corresponding to a particular entity. EM personas, super personas, and/or supplemental identifying information can be used to enforce security protocols. |
| US09485264B2 |
Coordinated detection and differentiation of denial of service attacks
According to one embodiment, an analyzer module (AM) within a same protected network and on-premise with a web application server (WAS) detects and distinguishes between types of Denial-of-Service (DoS) attacks. The AM tracks whether test HTTP messages, which include test HTTP request messages that a signal generation module (SGM) is configured to transmit to the WAS and test HTTP response messages that the WAS is expected to transmit in response to the test HTTP request messages, are timely received. The AM is aware of a timeliness that the SGM is expected to transmit the test HTTP request messages and that the WAS is expected to transmit the test response HTTP messages. The AM detects an occurrence of a DoS attack and identifies the type of the DoS attack based upon the result of the tracking indicating that a number of the test HTTP messages have not been timely received. |
| US09485262B1 |
Detecting past intrusions and attacks based on historical network traffic information
A device may receive information that identifies an attack signature for detecting an intrusion. The device may determine a device configuration that is vulnerable to the intrusion, may determine an endpoint device associated with the device configuration, and may determine a time period during which the endpoint device was associated with the device configuration. The device may determine an endpoint identifier associated with the endpoint device during the time period, and may identify network traffic information associated with the endpoint identifier during the time period. The device may apply the attack signature to the network traffic information, and may determine whether the endpoint device was subjected to the intrusion during the time period based on applying the attack signature to the network traffic information. The device may selectively perform an action based on determining whether the endpoint device was subjected to the intrusion. |
| US09485261B2 |
Web security protection method, device and system
A method, device and system for network security protection comprise: according to a received scan task, a network security device performs a security bug scan of the scan task appointed web site, and when a scan result is obtained, transmits the scan result to a network application firewall, so that the network application firewall can configure a individuality security strategy for the web site according to the received scan result. The problem that it can not he implemented complete individuality security configuration of the web site can be solved in this way. |
| US09485259B1 |
System and architecture for electronic permissions and security policies for resources in a data system
An electronic permissions and security system are disclosed which may be used to determine permissions and policies for resources in a complex multi-dimensional data system. Analysis of resource data hierarchies and/or accessor data hierarchies using the permissions computing systems and methods discussed herein may provide efficient and flexible permissions analysis, determination, and management. The electronic permissions system may include for example, a permissions analysis module or component configured to access, traverse and/or analyze a resource hierarchy and/or an accessor hierarchy to determine permissions with respect to a resource. Permissions may be defined according to various policies which may include specific actions allowed or disallowed for the policy. Specific actions within a policy may also be organized hierarchically such that one particular grant of one permission may imply granting of another permission. |
| US09485258B2 |
Mediation system and method for restricted access item distribution
Mediation systems and methods for restricted access item distribution are disclosed. In an embodiment, a method for facilitating payment from a user device for a restricted access item hosted by a host system is disclosed. In another embodiment, a system for facilitating payment from a user device to for a restricted access item hosted by a host system is disclosed. In another embodiment, a method for providing a mediated marketplace service is disclosed. |
| US09485257B2 |
Atomically updating ternary content addressable memory-based access control lists
Embodiments described herein provide techniques for atomically updating a ternary content addressable memory (TCAM)-based access control list (ACL). According to one embodiment, a current version bit of the ACL is determined. The current version bit indicates that a rule in the ACL is active is the version flag in the rule matches the current version bit. Through these techniques, a first set of rules can be modified to create a second set of rules (e.g., by insertions, deletions, and replacements, etc.). |
| US09485256B1 |
Secure assertion attribute for a federated log in
Embodiments of the present invention disclose a method, computer program product, and system for authenticating a user. The application server receives a user log in request and determines if a unique identification accompanies the received user log in request. The application server uses the unique identification to authenticate the identity of the user. The application server determines if the unique identification has been previously received by searching a first database to see if the unique identification was already stored in the first database. If the unique identification is not in the first database then the application server stores the unique identification and grants the user access to the one or more applications hosted on the application server. |
| US09485255B1 |
Authentication using remote device locking
A method includes (a) receiving, by the authentication server device, an authentication request from a requesting device in the name of a particular user, the requesting device being a mobile computer seeking access to the protected resource in the name of the particular user, (b) in response to receiving the authentication request, verifying that the requesting device is an enrolled device, the enrolled device being a mobile computer previously assigned to the particular user, (c) in response to verifying that the requesting device is equivalent to the enrolled device, remotely locking, by the authentication server device, the enrolled device, (d) receiving confirmation, by the authentication server device, that the enrolled device has been unlocked within a timeout period, and (e) in response to the authentication server device receiving confirmation that the enrolled device has been unlocked within the timeout period, providing the requesting device with access to the protected resource. |
| US09485249B2 |
User authentication in a mobile telecommunications system
A computer, such as a Windows-based PC (10), has associated with it a Subscriber Identity Module (or SIM) (12), such as of the type used in a GSM cellular telephone system. The SIM (12) can be authenticated by the telephone network (16), in the same way as for authenticating SIMs of telephone handset users in the network, and can in this way authenticate the user of the PC (10) or the PC (10) itself. Such authentication can, for example, permit use of the PC (10) in relation to a particular application (22) which is released to the PC (10) after the authentication is satisfactorily completed. The application may be released to the PC (10) by a third party after and in response to the satisfactory completion of the authentication process. A charge for the session can be debited to the user by the telecommunications network and then passed on to the third party. |
| US09485247B2 |
On-board vehicle communication system and method
An on-board vehicle communication system and method employ a storage device, a communication device and a controller. The storage device is configured to store a plurality of security certificates. The communication device is configured to receive external information that is external to a host vehicle equipped with the on-board vehicle communication system. The controller is configured to determine whether to begin a security certificate replenishment process to attempt to receive additional security certificates from at least one source that is external of the host vehicle based on the received external information, upon an amount of security certificates stored in the storage device decreasing below a first prescribed threshold. |
| US09485243B2 |
Securing a wireless mesh network via a chain of trust
A master beacon device emits a data packet that is received and retransmitted by servant beacon devices in a wireless mesh network that enables the beacon devices to detect the received signal strength indicator (“RSSI”) of beacon devices in proximity. Each servant beacon device transmits survey data packets comprising the RSSIs and hardware identifiers of proximate beacon devices to the master beacon device, which constructs a first virtual map of the mesh network. At a later time, each servant beacon device transmits authentication data packets, which are retransmitted, each retransmitting beacon inserting an RSSI and hardware identifier of the beacon device from which the authentication data packet was received, until they reach the master beacon device, which constructs a second virtual map of the mesh network. The master beacon device compares the first virtual map to the second virtual map to determine if the network is secure. |
| US09485239B2 |
Implementing single sign-on across a heterogeneous collection of client/server and web-based applications
Leveraging an established authenticated session in obtaining authentication to a client application includes receiving a request for access to a client application requiring authentication of a requestor and determining whether there exist characteristics of leverageable authentications corresponding to established sessions having an authenticated state at a time of the determination. When the determination reveals characteristics of at least one leverageable authentication corresponding to an established session, and attempt is made to obtain access for the requestor to the client application based on the at least one leverageable authentication, and the requestor is provided with a notification related to the 1 attempt to obtain access for the requestor to the client application. |
| US09485236B2 |
System and method for verified social network profile
A method for verifying the on-line identity of a subscribed user and securely displaying an indicia in connection with that user's on-line content, wherein the indicia includes an aspect corresponding to the verification level assigned to the subject user's profile. |
| US09485235B2 |
Systems and methods for inter-network service selection
Systems, methods, and devices for inter-network service selection are described herein. Through the use of one or more of device identifiers and device classes, information including a randomization metric can be transmitted to networked devices indicating which devices and/or device classes are permitted or denied to access a given network service. Equipment seeking access may alter the selection based on this information. Equipment providing access may enforce access request based on this information. As an example, selection between eHRPD and LTE may be load balanced based on device class or identifiers. |
| US09485231B1 |
Securing internet of things communications across multiple vendors
A secure connection between a user mobile device and a “Internet-of-Things” network-connected device (e.g., a home appliance or a vehicle) may be provided using an internet gateway residing in the public internet and a local gateway residing in a private network behind a firewall. The user device may receive an input through a software application and may generate an electronic instruction based on the input. The user device may then encrypt the electronic instruction and send the encrypted electronic instruction to the internet gateway over a secure connection (e.g., SSH, TLS). The internet gateway then sends the encrypted electronic instruction to the local gateway, which decrypts the encrypted electronic instruction, interprets it, and generates and transmits a device instruction to communicate with the network-connected device, either directly or through an intermediary device such as a third-party bridge or hub. Only the user device and local gateway have encryption/decryption keys. |
| US09485228B2 |
Selectively performing man in the middle decryption
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for selectively performing man in the middle decryption. One of the methods includes receiving a first request to access a first resource hosted by a server outside the network, determining whether requests from the client device to access the first resource outside the network should be redirected to a second resource hosted by a proxy within the network, providing a redirect response to the client device, the redirect response including the second universal resource identifier, establishing a first encrypted connected between the client device and the proxy hosting the second resource, and a second encrypted connection between the proxy hosting the second domain and the server hosting the first resource, and decrypting and inspecting the encrypted communication traffic passing between the client device and the server hosting the first resource. |
| US09485227B2 |
Code domain isolation
A method for achieving code domain isolation. A first set of data is received in a first domain format. The first set of data is changed to a second domain format. The first set of data in the second domain format is captured. The first set of data in the second domain format is changed to a third domain format. The first set of data in the third domain format is prepared for receipt by a user computer system. |
| US09485224B2 |
Information delivery system with advertising mechanism and method of operation thereof
An information delivery system includes: a control unit configured to: generate an anonymous identity for concealing client information of an anonymous client from a provider, generate a comparison result for determining whether a client encryption data of the anonymous identity matches with a provider encryption data of the provider, obtain a provider notification based on the comparison result of a match for displaying on a device, and a user interface, coupled to the control unit, configured to display the provider notification. |
| US09485223B2 |
System and method for controlling features on a device
Trust between entities participating in an upgrade or enablement/disablement process is established and, to facilitate this remotely and securely, a highly tamper resistant point of trust in the system that is being produced is used. This point of trust enables a more efficient distribution system to be used. Through either a provisioning process or at later stages, i.e. subsequent to installation, manufacture, assembly, sale, etc.; the point of trust embodied as a feature controller on the device or system being modified is given a feature set (or updated feature set) that, when validated, is used to enable or disable entire features or to activate portions of the feature. |
| US09485222B2 |
Data stream traffic control
Techniques related to data stream traffic control are disclosed herein. A bit equivalent entropy of an anonymized data stream is computed. Traffic of the data stream is controlled based on the value of the bit equivalent entropy. |
| US09485220B2 |
Virtual desktop accelerator with support for dynamic proxy thread management
In particular embodiments, a method includes determining a data flow rate of the active connections at a proxy, comparing the data flow rate to a first pre-determined threshold value, and, when the data flow rate exceeds the first pre-determined threshold value, creating one or more new processing threads associated with the proxy. |
| US09485219B1 |
VPN for containers and virtual machines in local area networks
A method, system and computer program product for a VPN for containers and VMs implemented on different network node. A number of network hardware nodes have containers and VMs running on them. The containers and VMs are aggregated into VPNs assembled across the hardware nodes. Each hardware node has a network edge programmable switch configured to route packets to containers and VMs only inside a particular VPN. The switch detects a number of the VPN inside the packet header, replaces this number by a standard broadcast header number and multi-casts the packet to the containers and the VMs inside the VPN. |
| US09485216B1 |
Multi-layered application classification and decoding
An intrusion detection system is described that is capable of applying a plurality of stacked (layered) application-layer decoders to extract encapsulated application-layer data from a tunneled packet flow produced by multiple applications operating at the application layer, or layer seven (L7), of a network stack. In this was, the IDS is capable of performing application identification and decoding even when one or more software applications utilize other software applications as for data transport to produce packet flow from a network device. The protocol decoders may be dynamically swapped, reused and stacked (layered) when applied to a given packet or packet flow. |
| US09485215B2 |
Multiple inspection avoidance (MIA) using a protection scope
A multiple inspection avoidance (MIA) technique is implemented in a virtualized environment. Preferably, the technique is implemented in a packet processing unit (PPU) and takes advantage of a protection scope determined in an automated manner. The protection scope may be MAC-based. The MIA technique ensures that the same packet is not inspected more than once by a same packet processing unit (PPU), and that the same packet is not inspected more than once by different PPUs. According to this disclosure, when a PPU implementing MIA receives a packet, it uses the protection scope to determine whether it needs to process the packet. Preferably, the determination of whether to process the packet depends on the source and destination addresses in the packet, whether those addresses are being protected by the PPU that receives the packet, the direction of the packet flow, and optionally one or more packet processing rules. |
| US09485213B2 |
Cross registrar compliance and communication mechanism
What is described is a system and method providing an improved customer experience for the registrant. The registrant is able to use a single interface and a single set of user inputs to bring about changes for multiple domain names. The single interaction with the single interface works out just as well and just as conveniently regardless of whether a single registrar happens to be handling all of the domain names, or whether each domain name is handled by a different registrar. |
| US09485212B1 |
Message management method
A method for managing computer based messaging involves monitoring messages transmitted within a messaging system over time; identifying related messages; and automatically analyzing the related messages using natural language analytics. The analyzing is based upon: subject of, sentiment within, and context of, each of the related messages, and frequency of transmittals of the related messages. The analyzing involves assigning at least: a first value based upon sentiment, a second value based upon content, and a third value based upon frequency, and calculating a score for the related messages as a function of the first value, second value and third value, comparing the score to a pre-specified threshold value; and when the score exceeds the pre-specified threshold value, automatically generating and issuing at least one of: (i) a summary of the related messages, (ii) a timing based notification message, or (iii) a content-based notification regarding a score inflection point. |
| US09485208B2 |
Managing notification messages
Methods and apparatuses that generate a subtopic identifier identifying a client application within a client device are described. The client application may be associated with a server application hosted in one or more application servers. Notification services may be registered with the application servers from the client application to forward identifiers associated with the client application to the server application to enable the server application to push notification messages to the client device selectively for the client application. When receiving a notification message from the application server, the notification message may be examined to forward the notification message directly to the client application without invoking other applications in the client device if the notification message carries a subtopic identifier of the client application. |
| US09485206B2 |
Devices and methods for improving web safety and deterrence of cyberbullying
Devices, systems, and methods for allowing parents to view and track smart phone activities of their children can include one or more child software modules. The module can be installed on each child's smart phone. The module can access and extract data from or about more than one of the smart phone's other software applications, including at least two of the following: a texting application, a social media application, an image application that facilitates transmission or reception of images, and a web browser application. The module can further send the extracted data to an analysis server. The module can also monitor location data. Moreover, the system can include an analysis server that can identify potentially harmful language, images, and websites. Further, the system can include a parent portal. The parent portal can receive results from the analysis server. |
| US09485205B2 |
User initiated rule-based restrictions on messaging applications
A method, system and computer program product are disclosed for user initiated rule based restrictions on sending messages from a sender to a receiver in a communications network. The receiver establishes a set of rules for the sender that allows the sender a limited number of defined messages events with the receiver. The defined message events may be messages or message sessions. When the sender attempts to send a message to the receiver, it is determined whether a message session currently exists between the sender and the receiver. If a current session exists, the rules set by the receiver are used to determine if the message is allowed to be sent to the receiver. If a session does not currently exist, the rules are used to determine whether a new session is allowed. If a new message session is allowed, a new session is established, and the message is sent to the receiver during the new session. |
| US09485203B2 |
Method and system for attaching scanned documents to email replies via a mobile communications device
A method and system for attaching a scan to an email reply utilizing a mobile communications device and any standard email client. A scan-to-email attachment module can be configured in association with the mobile communications device. A contact address can be added to a list of email contacts available via the mobile communications device. The contact address can be added by the user to a reply-to email as an additional address utilizing the mobile communications device so that a scan document can be sent as an attachment to an email address listed in the reply-to email. A server monitoring the contact address can be polled by the scan-to-email attachment module and a scan request initiated with respect to a scanner. An email client on the mobile communications device sends the scan document as an attachment to an email address listed in the reply-to email composed by the user. A fresh email can also be composed and the contact address can be added so that the email containing the scan document can be sent to the recipients. |
| US09485201B1 |
System, method, and computer program for partially authorizing a multi-target communication request
A system, method, and computer program product are provided for partially authorizing a multi-target communication request. In use, a plurality of targets associated with a multi-target communication request are determined. Further, the multi-target communication request is automatically authorized, wherein the multi-target communication request includes a request to send at least one communication to each of the plurality of targets. Additionally, it is determined whether the multi-target communication request has been successfully authorized for each of the plurality of targets. Responsive to determining that the multi-target communication request has not been successfully authorized for at least one of the plurality of targets, the multi-target communication request is rolled back for only the at least one target. |
| US09485196B1 |
Internal packet steering within a wireless access gateway
In general, techniques are described for steering data traffic for a subscriber session from a network interface of a wireless access gateway to an anchoring one of a plurality of forwarding units of the wireless access gateway using a layer 2 (L2) address of the data traffic. For example, a wireless access gateway for a wireless local area network (WLAN) access network is described as having a decentralized data plane that includes multiple forwarding units for implementing subscriber sessions. Each forwarding unit may present a network interface for sending and receiving network packets and includes packet processing capabilities to enable subscriber data packet processing to perform the functionality of the wireless access gateway. The techniques enable steering data traffic for a given subscriber session to a particular one of the forwarding units of the wireless access gateway using an L2 address of the data traffic. |
| US09485194B2 |
Virtual link aggregation of network traffic in an aggregation switch
Access switches in a switching system may use virtual aggregated links. When a link between an aggregation switch and an access switch fails, the link failure may be reflected in the virtual aggregated link and data traffic to another access switch may be switched away from the failed switch. A forwarding table in the access switch stores a number of entries that each define a correspondence between destination addresses and an output identifier for the switch. At least a first output identifier includes an aggregated link that represents a first set of possible output links. At least a second output identifier includes a virtual aggregated link, associated with a second network switch that represents a second set of possible output links. Destination addresses in the forwarding table for the virtual aggregated link correspond to network devices connected to the second network switch. |
| US09485193B2 |
Method and apparatus for allocating network medium data resources
A method of allocating network medium data resources is disclosed. The method is performed at an apparatus having one or more processors and memory for storing programs to be executed by the one or more processors. The method includes selecting, from a set of virtual requests, a virtual request including a requested resource usage time range consisting of multiple unit time periods. The method includes identifying a set of requests conflicting with the selected virtual request, where the set of conflicting requests includes one virtual request and one actual request. The method includes calculating, based on the set of conflicting requests, a maximum allocatable resource volume for each unit time period within the requested resource usage time range. The method further includes determining, based on the maximum allocatable resource volumes and the selected virtual request, an allocatable resource volume for each unit time period within the requested resource usage time. |
| US09485188B2 |
Virtual switching based flow control
Flow control of data packets in a network may be enabled to at least one side of a virtual switching interface to provide a lossless environment. In some embodiments, wherever two buffer queues are in communication with at least one buffer queue being connected to a virtual switching interface, flow control may be used to determine if a threshold has been exceeded in one of the buffer queues. When exceeded, the transmission of data packets may cease to one of the buffer queues to prevent packet dropping and loss of data. |
| US09485187B2 |
Intelligent software-defined networking based service paths
An example method embodiment for networking includes managing, by a network controller, network services for one or more network devices connected to the network controller. Managing network services includes receiving a packet in a traffic flow from a network device. The network device is one of the one or more network devices connected to the network controller. Managing network services further includes determining applicable services for the packet, transmitting the packet to a service provider in accordance with the applicable services for the packet, receiving, from the service provider, service results corresponding to the packet, and creating a forwarding entry providing instructions for handling the traffic flow in a service path table at the network device in accordance with the service results corresponding to the packet. |
| US09485183B2 |
System and method for efectuating packet distribution among servers in a network
A packet distribution scheme for forwarding incoming packets to servers in a network. Depending on a hash value of the incoming flow's identification parameters, a hash flow table or database is queried to determine the server to which the packet is to be forwarded. If multiple flows have the same hash index and are associated with different servers, a secondary flow table or database is queried for determining the server. In an example implementation, only the secondary flow table is configured to store fully qualified flow identification parameters whereas the hash flow table is operative to store reduced or compressed state information. |
| US09485182B2 |
Method for improved load balancing in communication systems
Various methods are provided to address the need for improved load balancing. In a one method, a packet loss is determined (101) for traffic sent between a first network node and a second network node. The determined packet loss is then used to determine (103) whether to perform load balancing. In another method, a first network node receives a request from a neighboring network node for a current loading status of the first network node. The first network node sends to the neighboring network node an indication of a backhaul loading level of the first network node. |
| US09485178B2 |
Packet coalescing
In general, in one aspect, the disclosures describes a method that includes receiving multiple ingress Internet Protocol packets, each of the multiple ingress Internet Protocol packets having an Internet Protocol header and a Transmission Control Protocol segment having a Transmission Control Protocol header and a Transmission Control Protocol payload, where the multiple packets belonging to a same Transmission Control Protocol/Internet Protocol flow. The method also includes preparing an Internet Protocol packet having a single Internet Protocol header and a single Transmission Control Protocol segment having a single Transmission Control Protocol header and a single payload formed by a combination of the Transmission Control Protocol segment payloads of the multiple Internet Protocol packets. The method further includes generating a signal that causes receive processing of the Internet Protocol packet. |
| US09485176B2 |
Global IP-based service-oriented network architecture
Data is transferred. A data packet associated with an application flow is received. A Pseudowire label is determined based at least in part on an application header associated with the data packet. The data packet is encapsulated with the Pseudowire label. The data packet is transferred over a Pseudowire using the Pseudowire label. |
| US09485173B2 |
Optimization to expand IS-IS leaf nodes during LFA computation
A method and system implemented by a network device, where the network device is in a network having a plurality of nodes. The method computes a loop free alternative (LFA) next hop as a backup for a primary path next hop for intermediate system-intermediate system (IS-IS). The method improves LFA computation efficiency by minimizing expansion of prefixes. The method includes expanding all prefixes of the next LFA shortest path first (SPF) destination node and inheriting a next candidate next hop as a current LFA next hop where the next candidate next hop provides link or node protection and better protection than the current LFA next hop. |
| US09485171B2 |
Optimizing fault synchronization in a bidirectional data network
Methods and apparatus for optimizing fault synchronization in a bidirectional data network are provided. In an example, a downstream endpoint of the data network receives a first Alarm Indication Signal (AIS). The first AIS indicates a first FLI of an upstream interface having an interface fault. The downstream endpoint transmits, to an upstream endpoint of the data network, a second AIS including a Remote Defect Indication (RDI) and a second FLI identifying the downstream endpoint. An upstream endpoint of the data network receives the second AIS and determines that the AIS is an AIS-RDI (AIS-RDI) from the presence of the second FLI. The presence of the AIS-RDI triggers the upstream endpoint to initiate tunnel failure synchronization with the downstream endpoint. |
| US09485169B2 |
Systems and methods for adaptive routing
Systems and methods for performing routing are described. For each of a plurality of messages transmitted over a primary route, a message transmission indication is received by an application. The application further receives, for at least one of the messages, a conversion indication that is based on the transmitted message. The quality of the primary route is determined based on a subset or all of the transmission indications and a subset or all of the conversion indications. Based on this determination, an alternate route is selected to replace the primary route. |
| US09485161B2 |
Systems and methods for setting up end-to-end traffic engineered ethernet line services
A method, a switch, and a network includes receiving a request for an Ethernet service at a Maintenance End Point (MEP) in a network, wherein the Ethernet service has a destination of a Remote MEP (RMEP), and wherein the request includes bandwidth amounts for the request; utilizing Link Trace messaging to the RMEP to detect an active path to the RMEP; and utilizing Loop Back messaging to the RMEP to reserve bandwidth based on the bandwidth amounts on the active path. |
| US09485144B2 |
Network traffic optimization
A method of optimizing network traffic includes, in part, measuring amounts of traffic exchange between each of a multitude of hosts disposed in the network, identifying a network domain to which each of the multitude of hosts is connected, calculating a net increase or decrease in inter-domain traffic associated with moving each of the multitude of hosts among the network domains in order to generate a list, and ranking the list of moves by net saving in the inter-domain traffic. The highest ranked move may be automatically applied so as to change the network domain to which the host associated with the highest ranked move is connected. The hosts may be virtual machines. Optionally, a change in the inter-domain traffic as a result of moving a first host in accordance with the list occurs only if one or more conditions are met. |
| US09485141B1 |
Constrained route distribution for multiple virtual private network services
In general, techniques are described for ensuring the distribution of Virtual Private Network (VPN) routes in a service provider network configured with multiple VPN services. In some examples, a network device receives configuration data that defines a VPN service associated with a route target. The network device, responsive to receiving the configuration data, sends a request for routes that match a type of the VPN service to a routing protocol speaker. The network device receives routes that match the type of the VPN service and are associated with the route target, installs the routes that match the type of the VPN service and are associated with the route target to the routing information base. The network device forwards traffic for the VPN service in accordance with the installed routes. |
| US09485135B1 |
Node-protection and path attribute collection with remote loop free alternates
An example method includes selecting, by a network device, a remote LFA next hop as an alternate next hop for forwarding network traffic from the network device to a destination, wherein the selected remote LFA next hop provides node protection to a primary next hop node on the shortest path from the network device to the destination. The method includes, for each candidate remote LFA next hop, performing a forward shortest path first (SPF) computation having the respective candidate remote LFA next hop as a root to compute a path segment between the respective candidate remote LFA next hop and the destination, wherein each of the candidate remote LFA next hops is the egress of a respective potential repair tunnel between the network device and candidate remote LFA next hop, and selecting the remote LFA next hop based at least in part on the computed path segments. |
| US09485133B2 |
Platform independent management controller
DCMI functionality is extended to platforms of a datacenter by integrating a management controller in each of plural platforms and interfacing the management controllers with a management server through a network. End users interface with platforms of the datacenter using DCMI protocol communications. The management server supports communication with management controllers by receiving DCMI messages and translating the DCMI messages to a text-based protocol for communications with the management controllers. In one embodiment, the management controllers push sensor information for their associated platforms to a sensor cache of the management server so that the management sensor references the cache to respond to DCMI requests for sensor information. |
| US09485132B2 |
Automated SAN network topological diagram and point-to-point cabling creation for customers environments
A method of presenting a network architecture includes identifying two or more network devices for interconnection analysis, collecting information describing communications paths between two or more network devices, and converting the collected information into a markup language format. The method further includes generating, from the markup language format, a listing of the network devices and a listing of connections between the network devices. The method also includes instantiating, based on the listing of the network devices, one or more images depicting each of the two or more network devices. The method further includes instantiating, based on the listing of connections, one or more images depicting connections between the two or more network devices. |
| US09485129B1 |
Multi-standard peak canceling circuitry
Integrated circuits with wireless communications circuitry having peak cancelation circuitry operable to perform crest factor reduction is provided. The peak cancelation circuitry may receive at least first and second carrier waveforms and may include at least a first canceling pulse generator (CPG), a second CPG, a first peak detector for performing peak detection on the first waveform, a second peak detector for performing peak detection on the second waveform, a third peak detector for performing peak detection on a combined waveform of the first and second waveforms, and a pulse allocator that receives clipping information from the three peak detectors and that controls the amount of peak cancelation that is being performed by the two CPGs. The allocator may determine whether the combined waveform contains any peaks. In response to determining that the combined waveform does not contain any peaks, the CPGs may be configured in bypass mode. |
| US09485128B2 |
System and method for scrambling using a bit scrambler and a phase scrambler
A system and method that demodulates the phase characteristic of a carrier signal are described. The scrambling of the phase characteristic of each carrier signal includes associating a value with each carrier signal and computing a phase shift for each carrier signal based on the value associated with that carrier signal. The value is determined independently of any input bit value carried by that carrier signal. The phase shift computed for each carrier signal is combined with the phase characteristic of that carrier signal so as to substantially scramble the phase characteristic of the carrier signals. Bits of an input signal are modulated onto the carrier signals having the substantially scrambled phase characteristic to produce a transmission signal with a reduced PAR. |
| US09485122B1 |
Data rate programming using source degenerated CTLE
The present invention is directed to data communication systems and methods. In various embodiments, the present invention provides a CML device that changes output frequency response by varying resistance values of its load resistance and source resistance. A bias control voltage is used to adjust the tail current of the CML device, and the tail current adjusts the output gain of the CML device. There are other embodiments as well. |
| US09485121B2 |
Digital baud rate clock recovery of heavily ISI-induced signals
System and method for digitally equalizing a data channel having wide channel impulse response for clock recovery of heavily ISI-induced received signals operating at one sample per symbol, according to which the received signal is pre-processed to provide a received signal with modified constellation, which is pre-processed for the decision process of signal with Inter-Symbol Interference by introducing controlled ISI to the received signal. The decision process is performed, based on a higher order vocabulary according to the introduced controlled ISI. |
| US09485110B2 |
Apparatus for alerting an emergency via broadcast signal transmission/reception and method for alerting an emergency via broadcast signal transmission/reception
A method and an apparatus for transmitting broadcast signals thereof are disclosed. The method for transmitting broadcast signals includes encoding PLP data; building at least one signal frame by mapping the encoded PLP data; and modulating data in the built signal frame by OFDM method and transmitting a broadcast signal having the modulated data, wherein the signal frame includes a preamble having a preamble symbol and a guard interval, wherein the guard interval is generated by using a sequence and the preamble symbol. |
| US09485103B2 |
Bridge circuit for Ethernet powered device
A network powered device includes field effect transistors connected as bridge circuit. The bridge circuit includes control circuitry to enable the FETs based on completion of a powered device detection sequence performed by power sourcing equipment coupled to the device via an Ethernet link. |
| US09485102B2 |
Techniques for user-validated close-range mutual authentication
A close-range mutual authentication system is described. A method may comprise receiving encoded connection information at a close-range input device of a client mode electronic device from a server mode electronic device; decoding the encoded connection information into one or more connection elements; establishing a communication connection with the server mode electronic device utilizing the connection elements; receiving authentication information at the client mode electronic device via the communication connection; authenticating the server mode electronic device to the client mode electronic device utilizing the authentication information; and generating one or more authentication elements responsive to authentication of the server mode electronic device for presentation via a close-range output device of the client mode electronic device, the one or more authentication elements configured to confirm authentication of the client mode electronic device to the server mode electronic device. Other embodiments are described and claimed. |
| US09485100B2 |
Trust management systems and methods
The present invention provides systems and methods for making efficient trust management decisions. A trust management engine is provided that processes requests for system resources, authorizations or certificates, and the identity of one or more root authorities that are ultimately responsible for granting or denying the requests. To determine whether a request should be granted, the trust management engine identifies a set principals from whom authorization may flow, and interprets each of the certificates as a function of the state of one or more of the principals. The processing logic iteratively evaluates the functions represented by the certificates, updates the states of the principals, and repeats this process until a reliable determination can be made as to whether the request should be granted or denied. The certificates may be evaluated until the state of the root authority indicates that the request should be granted, or until further evaluation of the certificates is ineffective in changing the state of the principals. |
| US09485099B2 |
Apparatus, systems and methods for agile enablement of secure communications for cloud based applications
Embodiments disclosed facilitate secure communication for cloud-based and/or distributed computing applications. In some embodiments, a method may comprise: instantiating a first Virtual Machine (VM) on a cloud infrastructure, wherein the at least one first VM is dynamically configured with a private key and a wildcard security certificate comprising a public key corresponding to the private key, and registering, with a domain name server, a domain name derived from an Internet Protocol (IP) address associated with the first VM and a Common Name associated with the wildcard security certificate. |
| US09485098B1 |
System and method of user authentication using digital signatures
The present disclosure pertains to data security, and more specifically, to a method and system of user authentication using an electronic digital signature of the user. An exemplary method includes obtaining biometric data of the user, calculating a biometric key based on the biometric data, identifying encrypted confidential information of the user in an electronic database and decrypting the identified confidential information of the user using the calculated biometric key. Furthermore, the method includes calculating a cryptographic key using a first portion of the decrypted confidential information of the user; generating an electronic digital signature of the user based on the cryptographic key; verifying the electronic digital signature using a second portion of the decrypted confidential information; and authenticating the user to access the data if the electronic digital signature is verified. |
| US09485093B2 |
Push button configuration pairing
Systems, methods, and devices for pairing devices in a wired network are provided. One method includes receiving configuration request signals at multiple devices. The method further includes exchanging public keys between two devices, generating a shared key using the public keys, determining a protected channel key using the shared key, and establishing a protected channel between the devices using the protected channel key. The method further includes transferring privacy credentials from one device to the other using the protected channel and using the privacy credentials to pair another device to the network. |
| US09485092B2 |
Electronic authentication systems
A transaction device for establishing a shared secret with a point of interaction (POI) over a communications network to enable encrypted communications between the transaction device and the point of interaction, the device comprising: an input arranged to receive communications from the point of interaction; a processor arranged to generate a first communication according to a Diffie-Hellman protocol; an output arranged to send the first communication to the point of interaction; wherein the processor is arranged to apply a randomly generated blinding factor, r, when generating the first communication and wherein, in response to receiving a second communication from the point of interaction at the input, the second communication having been generated according to the Diffie-Hellman protocol, the processor is arranged to apply the randomly generated blinding factor and generate a shared secret according to the Diffie-Hellman protocol in dependence on data contained within the second communication. |
| US09485091B2 |
Dual-party session key derivation
Embodiments relate to negotiating a session key to secure a user session executed in a host computer. An electronic hardware security module (HSM) located in the host computer generates a first session key. A smart card generates a second session key that matches the first session key. An encrypted copy of the second session key is communicated to an electronic host application module installed in the host computer. The electronic host application module decrypts the encrypted session key to obtain a copy of the session key such that the first and second session keys possessed by the smart card, the host application module and the HSM match one another. |
| US09485087B2 |
Method and circuit for cryptographic operation
A method of performing a cryptographic operation including: receiving a plurality of binary input values; splitting the binary input values into a plurality of non-binary digits of base r, where r is an integer greater than 2 and not equal to a power of 2; and performing, by a cryptographic block on each of the plurality of non-binary digits, a different modulo r operation to generate at least one output digit) of base r. |
| US09485084B2 |
Linearity of phase interpolators by combining current coding and size coding
A phase interpolator, including: a first portion including a first plurality of branches and a plurality of tail current sources, each branch including a differential pair of transistors, source terminals of the differential pair of transistors connect to form a source node, wherein each tail current source couples to one of the source nodes, and wherein the differential pair of transistors and the corresponding tail current source are configured in a current coding scheme; a second portion including a second plurality of branches and a fixed current source coupled to the second plurality of branches, each branch of the second plurality of branches including a second plurality of differential pairs of transistors and a plurality of switches configured in a size coding scheme; wherein the first portion and the second portion are coupled to each other and to a pair of load resistors. |
| US09485080B1 |
Multiphase clock data recovery circuit calibration
Methods, apparatus, and systems for clock calibration are disclosed. A method for clock data recovery circuit calibration includes configuring a first clock recovery circuit to provide a clock signal that has a first frequency and that includes a single pulse for each symbol transmitted on a 3-wire, 3-phase interface, and calibrating the first clock recovery circuit by incrementally increasing a delay period provided by a delay element of the first clock recovery circuit until the clock signal provided by the first clock recovery circuit has a frequency that is less than the first frequency and, when the first clock recovery circuit has a frequency that is less than the first frequency, incrementally decreasing the delay period provided by the delay element of the first clock recovery circuit until the clock signal provided by the first clock recovery circuit has a frequency that matches the first frequency. |
| US09485076B2 |
Dynamic polarization modulation and control
A method for sending a data from an electromagnetic radiator by polarization modulation of an electromagnetic wave includes radiating from the radiator first and second electromagnetic waves including first and second polarizations respectively, the first polarization being different than the second polarization. The first and second electromagnetic waves form a third electromagnetic wave having a third polarization different from the first or second polarization. The method includes modulating the third polarization responsive to the data by modulating one or more parts of the third electromagnetic wave. The data is sent in the third polarization. A system for sending a data includes an oscillator adapted to generate an oscillating signal, and a phase shifter coupled to the oscillator and adapted to generate a first phase-shifted oscillating signal having a first phase. The phase shifter is adapted to vary the phase difference across a predefined range in response to the data. |
| US09485074B1 |
Method and apparatus for scheduling asynchronous transmissions
The present invention provides a method of scheduling asynchronous transmissions for a plurality of subscriber units. The method includes receiving information associated with a plurality of subscriber units that have uplink data to transmit, the information including uplink timing offset information associated with each of the subscriber units. Two or more subscriber units are then selected from a set of subscriber units having a timing offset differential, that is below a predetermined threshold, where the timing offset differential is the difference between the timing offset of a first subscriber unit and the timing offset of a second subscriber unit further selectively offset by a multiple of the transmission segment size, which minimizes the difference. The transmission segments, which are available for the uplink of data, are then allocated between the selected two or more subscriber units, which limits the number of transmission segments that have at least one of an overlap or a gap, and the amount of any overlap or gap, in order to minimize wasted scheduling opportunities. |
| US09485067B2 |
Pilot arrangement method in mobile radio communication system and transmitter/receiver adopting same
A mobile communication system in which a working frequency band is divided into a plurality of predetermined frequency bands, and time division multiplexing is performed, the mobile communication system includes a base station to insert a known pilot symbol into the plurality of predetermined frequency bands at a predetermined reference interval, and to insert to arrange the known pilot symbol into at least one of the plurality of predetermined bands at a smaller interval than the predetermined reference interval, wherein a frequency band in which the known pilot symbol is inserted at a smaller interval than the predetermined reference interval is to be set cyclically in time; and a mobile terminal to receive the known pilot symbol transmitted from the base station. |
| US09485063B2 |
Pre-coding in multi-user MIMO
In a multi-user communication system, a pre-coder in a transmitter comprises a Discrete Fourier Transform (DFT) spreader configured to spread reference-signal symbols with Fourier coefficients to generate DFT-spread reference symbols. An OFDM modulator, such as an inverse-DFT, modulates the DFT-spread reference symbols onto OFDM subcarriers to produce a pre-coded OFDM transmission signal. |
| US09485062B2 |
Systems and methods for configuring redundant transmissions in a wireless network
A method for configuring communication in a wireless communication system includes obtaining, at a first network node, information indicating a plurality of candidate subframes for downlink transmissions to a wireless communication device in a first cell served by the first network node. Each candidate subframe satisfies a candidate condition that relates to transmissions in a second cell during that subframe. The method also includes determining, based on the obtained information, a number of copies of an uplink transmission a wireless communication device should transmit in consecutive uplink subframes so that a downlink transmission related to the uplink transmission will occur during one of the candidate subframes. Additionally, the method includes configuring the wireless communication device to transmit the determined number of copies of the uplink transmission in consecutive subframes. |
| US09485058B2 |
PAM data communication with reflection cancellation
The present invention is directed to data communication systems and methods. More specifically, embodiments of the present invention provide a communication system that removes reflection signals. A digital data stream is processed through both tentative path and the main path. The tentative path uses a first DFE device and a reflection cancellation circuit to generate a correction signal for removing reflection signal from the digital data stream. A second DFE device removes ISI and other noises from the corrected digital data stream. There are other embodiments as well. |
| US09485056B2 |
Optical transceiver and data mapping method using thereof
Disclosed is an optical transceiver. The optical transceiver includes a decoder for decoding an 8B10B line-coded signal; a data mapper for separating the decoded signal into block units and securing extra memory capacity by mapping a data code and a block information code onto each of the separated blocks; and an FEC encoding unit for creating a Forward Error Correction (FEC) data and mapping the FEC data onto the extra memory capacity. |
| US09485053B2 |
Long-distance RapidIO packet delivery
The present invention provides a RapidIO device that includes a switch fabric and a port coupled to the switch fabric. The port is configured to establish a LP-Serial link with RapidIO endpoints, add packet headers having the same acknowledgement identifier to a plurality of contiguous packets and generate a link cyclical redundancy check value for the plurality of contiguous packets having the same acknowledgement identifier, the link cyclical redundancy check code computed to include the value of an acknowledgement identifier header. The port is configured to sequentially output the plurality of packets having the same acknowledgement identifier on the LP-Serial link. In addition, methods are disclosed for formatting bit streams in a RapidIO based communication system and communicating RapidIO packets. |
| US09485051B2 |
Facilitation of security employing a femto cell access point
One or more femto cell access points (FAPs) are employed to facilitate provisioning of security. A signal indicative of an intrusion in an area associated with an FAP can be received, and, based on receiving the signal, an identifier associated with a device in a detection range of the FAP can be determined. One or more frequencies in the detection range of the femto cell access point can be jammed, an attachment attempt emitted from the device in response to jamming the frequencies can be detected, and a telephone number of the device can be identified based, at least, on detecting the attachment attempt from the device. Warnings can also be sent to the device and/or tracking of the device can be performed. |
| US09485049B2 |
Adjusting carrier spacing in a channel
An optical system may include optical transmitters to provide respective optical signals. Each of the respective optical signals may provide one or more carriers in an optical channel. The optical channel may include multiple carriers associated with the respective optical signals. First and second carriers, of the multiple carriers, may have a particular carrier space width. The particular carrier space width may include a frequency error associated with one or more optical signals of the respective optical signals. The optical system may include a control system to determine the frequency error and cause one or more of the optical transmitters to adjust the particular carrier space width based on the adjusted frequency error. |
| US09485046B1 |
Optical spot array pitch compressor
An apparatus comprises a passive wavelength division multiplexing (WDM) demultiplexer (DeMUX) or a passive WDM multiplexer (MUX), an active photo diode (PD) array or an active laser diode (LD) array, and a compressing device disposed between the passive WDM DeMUX or the passive WDM MUX and the active PD array or the active LD array. The compressing device changes the optical spot pitch of the passive WDM DeMUX or the passive WDM MUX to match the pitch of the active PD array or the active LD array. The compressing device may be a single optical wedge, a first and a second optical wedges, a plurality of optical wedges, or a grating. A compression ratio can be adjusted by changing the incident angle of the incident beam to the compressing device. |
| US09485043B1 |
Quadrature modulation apparatus for AM stereo transmitters
A modulation system for AM stereo transmission wherein in a combination of amplitude modulation and phase modulation allows a pair of unique audio channel signals to be modulated onto an AM carrier. When a monophonic audio signal is provided, there is no phase modulation present. However, when a first audio signal (e.g., a “right” channel) differs from a second audio signal (e.g., a “left” audio channel), phase modulation occurs simultaneously with amplitude modulation. The modulation system accepts non-matrixed audio signals and produces quadrature modulation compatible with the industry standard C-QUAM system. |
| US09485042B2 |
Transmitting and receiving apparatus and method for separating multiple broadcast signals in terrestrial cloud broadcast system
A transmitting and receiving apparatus and method for separating multiple broadcast signals from each other in a terrestrial cloud broadcast system are provided. A terrestrial cloud broadcast signal transmitting apparatus may include a plurality of transmitters for transmitting a plurality of terrestrial cloud broadcast signals, wherein each of the plurality of transmitters includes, an encoder encoding input data to generate a code word and a scrambler scrambling the generated code word using a scramble sequence uniquely allocated for each transmitter so that the plurality of terrestrial cloud broadcast signals are distinguished from each other. |
| US09485040B2 |
Method for testing sensitivity of a data packet signal transceiver
A method for using a test data packet signal to test a data packet signal transceiver device under test (DUT) having an operating characteristic defined by a data packet error rate (PER) as a function of data packet signal power (PWR). The test data packet signal power is varied and a test PER is computed as a function of DUT response data packets and test data packets until a measured test PER or a computed test PER extrapolated from measured PERs is equal to a predetermined PER less than and greater than maximum and minimum PERs, respectively. |
| US09485038B2 |
System and method for enabling automated testing of wireless data packet signal transceivers
A system and method for enabling automated testing of wireless data packet signal transceiver devices under test (DUTs). One or more DUTs are enclosed inside respective chambers within a shielded enclosure providing electromagnetic shielding for its interior region. Each DUT is powered by an internal power source and its radio frequency (RF) signal port is connected to an external RF signal interface at an outer wall of the shielded enclosure. An anchor at an outer wall of the shielded enclosure enables mechanical engagement with and physical displacement of the shielded enclosure, thereby allowing DUTs to be manipulated using pick and place automation devices for engagement with and connection to automated test equipment. Such test equipment can be assembled into vertically stacked RF signal test stations with which shielded DUT enclosures are engaged by physically mating their respective power and RF signal ports using the pick and place automation device. |
| US09485030B2 |
Optical signal modulation
A 2n-QAM (e.g. 16-QAM) optical modulator comprising cascaded I-Q modulators. The first I-Q modulator applies 2n-2 (e.g. 4) QAM to an optical signal, having a constellation diagram with the 2n-2 (e.g., 4) constellation points located in quadrant I. The second I-Q modulator subsequently applies a quaternary phase-shift keying (QPSK) modulation scheme to the optical signal, thereby rotating the constellation points of the 2n-2-QAM modulation scheme to quadrants II, III and IV, to produce a 2n-QAM modulation constellation diagram. The rotation causes the 2n-QAM modulator to inherently apply four quadrant differential encoding to the optical signal. A method of 2n-QAM optical modulation is also provided and optical signal transmission apparatus comprising the 2n-QAM optical modulator. |
| US09485027B2 |
Dynamic memory allocation in an optical transceiver
Methods, algorithms, architectures, circuits, and/or systems for dynamically allocating memory for storing parametric data in optical transceivers are disclosed. The optical transceiver can include an optical receiver configured to receive optical data; an optical transmitter configured to transmit optical data; a microprocessor configured to access data for each of a plurality of parameters that are related to operation of at least one of the optical receiver and the optical transmitter; one or more memories configured to store the data at a plurality of locations that are dynamically allocated by the microprocessor; and an interface configured to receive a request for data for one or more of the parameters from a host and provide the data in response to the request. In the present disclosure, the host is unaware of the locations at which the parametric data are stored. |
| US09485015B2 |
Optical layer status exchange over OSC-OAM method for ROADM networks
A method for receiving, by circuitry of an optical node adapted for wavelength multiplexing and wavelength switching, a signal over OSC comprising overhead information indicative of status of at least one of an optical layer in an OTN; wherein the signal utilizes OC-N frame format comprising a first STS frame, a second STS frame, and a third STS frame, the STS frames having a format wherein the information is assigned to a number of bits designated for OAM information, wherein the bits are assigned to bytes within a transport overhead portion of the STS frame format within the OC-N frame format; terminating, by circuitry of the optical node, the signal at the optical node; and notifying, by circuitry of the optical node, software of the status of the optical layer in the OTN. |
| US09485014B2 |
Transmission apparatus, transmission system, and failure detection method
A transmission apparatus includes a plurality of output units and a detector. The plurality of output units is configured to couple to a plurality of transmission paths, respectively, branched from one transmission path. The plurality of output units includes at least one first output unit configured to transmit signal light selectively to one of the branched transmission paths, and at least one second output unit configured to transmit test light with a wavelength different from a wavelength of the signal light to another of the branched transmission paths. The detector is configured to decide a failure in the branched transmission paths, based on a result of detection of a reflected light of the test light received through at least one of the branched transmission paths. |
| US09485008B2 |
Intra cell interference mitigation in a wireless network employing relay nodes
A method and relay node (RN) in a wireless communications network for controlling downlink transmissions to User Equipments (UEs) being served by the RN. An RN transceiver circuit requests each UE to measure and report a Reference Signal Received Power (RSRP) and a UE total downlink interference. An RN receiver circuit receives and forwards the reported RSRP and UE total downlink interference for each UE. An RN processing and control circuit measures an RN total downlink interference; determines which UEs are closely located to the RN based on the reported RSRP of each UE; creates a UE-list with UEs determined to be closely located to the RN and which experience UE total downlink interference similar to the measured RN total downlink interference; determines whether the measured RN total downlink interference exceeds an RN interference threshold; and if so, controls the downlink transmissions to the UEs in the created UE-list. |
| US09485006B2 |
Relay communication system
A relay communications system is described in which a base station is able to dynamically vary or semi-statically vary the number of resource blocks used to carry relay control data within a transmitted sub-frame. Default resource blocks are used to include a first part of the control data and if additional control data is provided, then the first part of the control data identifies that there is additional control data and provides information to allow the additional data to be located within the sub-frame. |
| US09485002B2 |
Equalizing method in a receiver node of a wireless communication system
The present invention relates to an equalizing method in a receiver node of a cellular wireless communication system, the method comprising: receiving at least one radio signal comprising a plurality of resource elements; obtaining interference information associated with the plurality of resource elements; extracting resource elements from the plurality of resource elements carrying data into a first set based on the interference information; dividing the resource elements in the first set into one or more sub-sets each comprising T number of resource elements; filtering the resource elements in said one or more sub-sets by applying a balanced whitening and energy focusing filter W so as to obtain filtered resource elements y; and equalizing the filtered resource elements y. The invention also relates to a receive device, a computer program, and a computer program product. |
| US09484998B2 |
Antenna allocation apparatus and method for cellular mobile communication system
Methods and apparatuses are provided for communicating with a terminal of a base station in a mobile communication system. Configuration information on a plurality of antenna ports of reference signals (RSs) which comprise first type antenna ports and second type antenna ports, is transmitted. Status information for at least one antenna port of an RS among the plurality of antenna ports of the RSs, is received. At least one indicator indicating at least one selected antenna port of an RS is transmitted based on the status information. The terminal is communicated with using the at least one selected antenna port of the RS. The first type antenna ports are for a centralized antenna and the second type antenna ports are for a distributed antenna. |
| US09484995B2 |
Method, system, and device for transmitting coding instruction information and for determining pre-coding matrix
The present application relates to the technical field of radio communications, and relates specifically to a method, system, and device for transmitting coding instruction information and for determining a pre-coding matrix, for use in solving the problem that direct application of current codebooks to a three-dimensional beamforming/pre-coding technology causes performance degradation. The method of embodiments of the present application comprises: a user equipment determines and transmits first pre-coding instruction information, second pre-coding instruction information, and third pre-coding instruction information, where the first pre-coding instruction information, the second pre-coding instruction information, and the third pre-coding instruction information correspond to a pre-coding matrix, a first component pre-coding matrix is a block diagonal matrix, a third component pre-coding matrix is constituted by a weighted column selection vector, and, with the exception of a P-number of nonzero elements, the remainder of the weighted column selection vector is all zeros. Employment of the solution of the embodiments of the present application increases the performance of the three-dimensional beamforming/pre-coding technology. |
| US09484994B2 |
Adaptive mode-switching spatial modulation for MIMO wireless communication system
Techniques are generally described related to tag refinement strategy. One example method for communicating between a first wireless system having a plurality of first antennas and a second wireless system having a plurality of second antennas may be presented. The method may include receiving configuration information associated with the plurality of first antennas and a plurality of modulation schemes which the first wireless system is configured to support; determining a plurality of configurations based on the configuration information, wherein each of the plurality of configurations defines a corresponding subset of first antennas selected from the plurality of first antennas and a corresponding modulation scheme selected from the plurality of modulation schemes; and selecting a first configuration from the plurality of configurations, wherein when operating under the first configuration, the first wireless system is configured to achieve one or more performance criteria. |
| US09484989B2 |
System and method for autonomous combining
A user agent capable of carrying out autonomous combining. The user agent can be implemented as a processor configured to promote receiving a first signal from an access node and a second signal from a relay node. The processor may be further configured to combine the first and second signals. |
| US09484988B2 |
Power supply device, power receiving device, charging system, and obstacle detection method
Provided are a power supply device, a power receiving device, a charging system, and an obstacle detection method that obtain a sufficient obstacle detection sensitivity even when an obstacle is small. A modulation unit (202) performs amplitude modulation or phase modulation on a test data sequence output from a test data sequence storage unit (201). A power control unit (203) generates, according to an instruction from a determination unit (204), a power control signal for increasing the power level of the test data sequence every time when the test data sequence is transmitted. The determination unit (204) determines whether there is an obstacle between the power receiving device and the power supply device based on whether the test data sequence output from the test data sequence storage unit (201) coincides with the test data sequence output from a power-transmitting-side receiving circuit (124). |
| US09484987B2 |
Information processing apparatus, system, and information processing method
An information processing apparatus includes a first communication unit, a second communication unit, and a communication-apparatus-side controller. The first communication unit performs wireless communication with plural terminal apparatuses, the number of which is less than or equal to a predetermined maximum number of connections. The second communication unit performs wireless communication with a connection-requesting terminal apparatus that newly attempts to perform wireless communication with the first communication unit. The communication-apparatus-side controller switches the wireless communication via the second communication unit to wireless communication via the first communication unit, the wireless communication via the first communication unit being performed using a dedicated line prepared in advance. |
| US09484973B1 |
Voltage equalization for stacked FETs in RF switches
A switch branch that improves voltage uniformity across a series stack of an n-number of transistors is disclosed. A first one of the n-number of transistors is coupled to an input terminal, and an nth one of the n-number of transistors is coupled to an output terminal, where n is a positive integer greater than one. Predetermined parasitic capacitances associated with each of the n-number of transistors are adjustable with respect to capacitance value by predetermined amounts by dimensioning and arranging at least one metal layer element in proximity to the series stack of the n-number of transistors. Capacitance values for the predetermined parasitic capacitances are selected such that a voltage across the series stack of the n-number of transistors is uniformly distributed. In this way, the n-number of transistors can be reduced without risking a transistor breakdown within the series stack of the n-number of transistors. |
| US09484969B2 |
Delta-pi signal acquisition
Values representative of modulation signal components are extracted from a modulated signal. The modulated signal contains a modulation signal. A periodic time segment sequence is defined having at least four ordered time segments. Multiple sets of signal values are acquired from the modulated signal. For each signal value, a difference in the modulated signal during each of two of the ordered time segments is acquired, as the signal value. The two ordered time segments differ in their order within the sequence by half of the number of ordered time segments in the sequence. Each set is acquired over multiple repetitions of the periodic time segment sequence. Each set is acquired during different ordered time segments than each other set. Each signal value is representative of a modulation signal component. |
| US09484967B1 |
Method for duty cycle distortion detection through decision feedback equalizer taps
An embodiment includes a receiver circuit, a feedback circuit and a control circuit. The receiver circuit is configured to receive each data bit of a plurality of data bits. The feedback circuit is configured to measure a first interference level generated by a first data bit of a first subset of the plurality of data bits on a second data bit of the plurality of data bits to generate one of a first plurality of feedback values. The feedback circuit is also configured to measure a second interference level generated by a third data bit of a second subset of the plurality of data bits on a fourth data bit of the plurality of data bits to generate one of a second plurality of feedback values. The control circuit is configured to determine a duty cycle dependent upon a comparison of the first plurality to the second plurality. |
| US09484955B2 |
Semiconductor memory apparatus and training method using the same
A semiconductor memory apparatus may include a cyclic redundancy check (CRC) circuit block electrically coupled with a first pad, and configured to generate internal CRC information from data received from the first pad. The semiconductor memory apparatus may also include a comparison unit configured to compare external CRC information received from outside the semiconductor memory apparatus with the internal CRC information, and generate a read training result signal. |
| US09484954B1 |
Methods and apparatus to parallelize data decompression
Methods and apparatus to parallelize data decompression are disclosed. A method selects the initial starting positions in a compressed data bitstream. A first one of the initial starting positions is adjusted to determine a first adjusted starting position by decoding the bitstream starting at a training position in the bitstream. The decoding includes traversing the bitstream from the training position as though first data located at the training position is a valid token. The first decoded data generated by decoding a first segment of the bitstream starting from the first adjusted starting position is output. The first decoded data is merged with second decoded data generated by decoding a second segment of the bitstream. The decoding of the second segment starting from a second position in the bitstream is performed in parallel with the decoding of the first segment. The second segment precedes the first segment in the bitstream. |
| US09484950B1 |
Hardware efficient digital signal processing for on-the-fly delta sigma bit stream linear operator and compressor circuits
Methods and apparatuses embodied in delta sigma domain digital signal processing circuits that perform linear operation of delta sigma modulated bit stream, including adding, coefficient multiplication, and compressing. The digital processing circuits perform on-the-fly processing to generate a continuous output delta sigma bit-stream based on the continuous input delta-sigma modulated bit-streams and the input binary coefficients. The on-the-fly bit-stream processing circuit is realized via digital delta sigma modulators with input coefficient multiplexers, feedback multiplexers, and toggling multiplexers. |
| US09484949B1 |
Variable run length encoding of a bit stream
An apparatus and method for encoding data are disclosed that may allow for variable run length encoding of data to be transmitted. An ordered stream of data bits is received from a logic circuit, and N sequential data bits of the stream are selected, where N is a positive integer. Of the N sequential data bits, M sequential data bits are selected, wherein M is a positive integer less than N. The M sequential data bits are then encoded to generate a code word that includes P data bits, wherein P is a positive integer greater than M and less than N. The code word is then concatenated with a subset of the N sequential data bits that excludes the M sequential data bits to form a transmission word. A transmit unit then sends the data bits of the transmission word in a serial fashion. |
| US09484948B2 |
Clock generation circuit
The present technique relates to a clock generation circuit including a phase difference comparison circuit configured to compare a phase of each of an input clock signal and a feedback signal, and provides a phase difference signal indicating a phase difference between the input clock signal and the feedback signal, a filter circuit configured to suppress a high frequency component in the phase difference signal, an output circuit configured to modulate the phase difference signal in such a manner as to decrease a noise component of a low frequency band and increase a noise component of a high frequency band, and generate and output an output clock signal from the modulated phase difference signal and a reference clock signal, and a frequency dividing circuit configured to divide a frequency of the output clock signal, at a predetermined frequency dividing ratio, and feed it back to the phase comparison circuit. |
| US09484944B2 |
Current counting analog-to-digital converter for load current sensing including dynamically biased comparator
In one embodiment, a circuit comprises first and second capacitors configured to receive a sense current in first and second modes, respectively. A comparator is coupled to the first capacitor to compare a voltage of the first capacitor to a reference voltage and generate a count signal in response to the voltage of the first capacitor reaching the reference voltage in the first mode. The comparator is coupled to the second capacitor to compare a voltage of the second capacitor to the reference voltage and generate the count signal in response to the voltage of the second capacitor reaching the reference voltage in the second mode. A reset circuit discharges the first capacitor in the second mode and the second capacitor in the first mode in response to the count signal. A counter increments a count of a number of occurrences of the count signal. |
| US09484938B2 |
Apparatus, system and method for controlling temperature and power supply voltage drift in a digital phase locked loop
Described herein are apparatus, system, and method for controlling temperature drift and/or voltage supply drift in a digital phase locked loop (DPLL). The apparatus comprises a DPLL including a digital filter to generate a fine code for controlling a frequency of an output signal of a digital controlled oscillator (DCO) of the DPLL; a logic unit to monitor the fine code and to generate a compensation signal based on the fine code; and a voltage adjustment unit to update a power supply level to the DCO based on the compensation signal, wherein the updated power supply level to cause the digital filter to generate the fine code near the middle of an entire range of the fine code across various temperatures, and wherein the digital filter to generate the fine code near the middle of the entire range across power supply drift. |
| US09484937B2 |
Time-to-digital converter using a configurable multiplier
A fractional error correction circuit includes a time-to-digital converter (TDC) configured to detect a phase difference between a reference clock signal and a variable clock signal, and a configurable multiplier coupled with the TDC. The configurable multiplier has a selectable bit size, the selectable bit size being based on a minimum number of bits needed to obtain a reciprocal of a period of the variable clock signal. The TDC is configured to output a fractional error correction value based on the detected phase difference and the reciprocal of the period. |
| US09484934B1 |
Delay lock loop
A delay lock loop is provided. A delay unit includes a delay factor and delays a first clock signal to generate a second clock signal according to the delay factor. An elimination unit delays a third clock signal to generate a fourth clock signal. A phase detection unit is coupled to the delay unit and the elimination unit and generates an indication signal according to a phase difference between the second and fourth clock signals. A control unit is coupled to the phase detection unit and the delay unit. The control unit controls the delay unit according to the indication signal to adjust the delay factor. When the delay factor is equal to an initial value, an initial time difference occurs between the first and second clock signals. A time difference between the third and fourth clock signals is equal to the initial time difference. |
| US09484933B2 |
Device for generating frequency-stable signals with switchable injection-locked oscillator
A device for generating at least one frequency-stable periodical signal, including: a generator configured to generate at least one first periodical signal with frequency spectrum that includes at least two lines at different frequencies fa and fb; a first switchable injection-locked oscillator configured to receive at an input the first periodical signal and to be locked, in a first state, to the frequency fa, and in a second state, to the frequency fb, as a function of a value of at least one control signal applied at the input of the first switchable injection-locked oscillator. |
| US09484931B2 |
Delay locked loop circuit and operation method thereof
A delay locked loop (DLL) circuit may include: an input clock control unit suitable for transmitting first and second internal clocks generated based on an external clock, and controlling transmission of the second internal clock based on a clock control signal which is activated during a predetermined period; a clock delay unit suitable for generating a first delay locked clock by delaying the first internal clock by a delay time required for locking, and generating a second delay locked clock by delaying the second internal clock based on the clock control signal; and an output clock control unit suitable for outputting the first delay locked clock and the second delay locked clock during a period in which the clock control signal is activated. |
| US09484930B2 |
Initializing components of an integrated circuit
Methods, systems, and computer program products for initializing one or more components of a system, the system comprising an integrated circuit that comprises at least one processor, are disclosed. A method includes initializing at least one component of the system, determining a temperature of the integrated circuit using a temperature sensing device embedded on the integrated circuit, comparing the determined temperature to a predetermined suitable temperature operating range of at least one additional component to yield a comparison result, and initializing the at least one additional component based on the comparison result. The at least one additional component may be initialized on the condition that the determined temperature of the integrated circuit is within the predetermined suitable temperature operating range of the at least one additional component. |
| US09484924B2 |
Negative capacitance logic device, clock generator including the same and method of operating clock generator
A negative capacitance logic device includes a first field effect transistor (FET) and a second FET. The first FET is coupled between a power supply voltage and an output node, and the first FET includes a ferroelectric having a negative capacitance. The second FET is coupled between the output node and a ground voltage, and the second FET includes a ferroelectric having a negative capacitance. The negative capacitance logic differentiates an input voltage applied to an input node to provide an output voltage at the output node. |
| US09484922B2 |
Voltage level shifter module
A voltage level shifter module comprising at least one input arranged to receive an input signal, and at least one cascode transistor arranged to receive at a gate thereof at least one reference voltage signal. The voltage level shifter module further comprises at least one reference voltage control component arranged to detect logical state transitions within the input signal from at least a first logical state to a second logical state, and cause the reference voltage signal applied to the gate of the at least one cascode transistor to be pulled down to a reduced voltage upon detection of a logical state transition within the input signal from at least a first logical state to a second logical state. |
| US09484921B2 |
LVDS input circuit with comparators, or gate, and multiplexer
First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input to the input circuit is also connected to the input of the driver. The input circuit may also receive an offset voltage. In response to its inputs, the input circuit in each device can use comparators, gates and a multiplexer to determine the logic state being transmitted over the pair of LVDS signal paths from the other device. This advantageously reduces the number of required interconnects between the first and second devices by one half. |
| US09484917B2 |
Digital clamp for state retention
Described is an apparatus which comprises: a clamp coupled between a first power supply and a second power supply; and a circuit to operate with the second power supply, wherein the clamp is operable to adjust the second power supply when the apparatus enters a low power mode. |
| US09484916B1 |
Adaptive on-chip termination circuitry
An integrated circuit with on-chip termination (OCT) circuitry is provided. In particular, the integrated circuit may include an input-output (IO) buffer, an OCT circuit coupled between the IO buffer and a physical IO interface, and adaptive external OCT calibration circuitry for impedance matching the IO buffer to a transmission line that is coupled to the IO buffer. The adaptive external OCT calibration circuitry may include a waveform measurement circuit for selectively sampling a waveform at the IO interface, and a waveform analyzer and control circuit for analyzing the sampled waveform and adjusting the OCT circuit until the impedance provided by the OCT circuit matches with the external impedance of the transmission line. A switch that is interposed between the OCT circuit and the measurement module may be enabled during calibration and disabled during normal device operation. |
| US09484905B1 |
Voltage sampling switch and method therefor
A voltage switch for handling negative voltages includes an input terminal coupled to a voltage that is greater than a voltage rating of oxide in the voltage switch, a top capacitor plate pre-charge module including three cascoded p-channel transistors coupled between a supply voltage and a top plate of a capacitor, a bottom capacitor plate pre-charge module including two cascoded n-channel transistors coupled between a bottom plate of the capacitor and ground, and an output voltage module including an output terminal and four cascoded n-channel transistors with control electrodes of a first and fourth of the cascoded n-channel transistors coupled to a boost node. Control electrodes of a second and third of the cascoded n-channel transistors coupled to the top plate of the capacitor. A voltage switch for positive voltages is also disclosed. |
| US09484900B2 |
Digital-to-phase converter
Systems and methods for converting digital signals into clock phases are disclosed. An example digital-to-phase converter circuit receives a complementary in-phase and quadrature clock signals and produces four clock outputs at a phase controlled by a digital phase control input. The digital-to-phase converter uses first and second pre-driver modules to buffer the -phase and quadrature clock signals and produce corresponding buffered clock signals having controlled slew rates. Mixer modules produce the clock outputs by forming weighted combinations of the buffered clock signals. The weighting is determined based on the phase control input. The controlled slew rates of the buffered clock signals allow digital mixer module to provide accurate phase control. The digital-to-phase converter may also include an output buffer that compensates for nonlinearities in the relationship between the phases of the clock outputs and the phase control input. |
| US09484899B2 |
Debounce circuit with dynamic time base adjustment for a digital system
A debounce circuit eliminates noise, glitches, or transient signal variations resulting from mechanical bounce occurring at a change of state of analog signals and provides a dynamic debounce period alteration and time base variation without loss of the current debounce state. The debounce circuit has a physical counter that is configured for being adjusted within a virtual counter such that the noise, glitches, or transient signal variations resulting from mechanical bounce occurring at an initiation of a change of state of an analog input signal from a source device are filtered by delaying a change of output state of the debounce circuit. The debounce circuit includes a strobe generator that produces a strobe signal that is a submultiple of a master clock that is determined by the location of the physical counter within the virtual counter that is used to increment the physical counter within the virtual counter. |
| US09484897B2 |
Level shifter
Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors. |
| US09484896B2 |
Resonant frequency divider design methodology for dynamic frequency scaling
A dynamic rotary traveling wave oscillator circuit includes plurality of multi-output spot-advancing blocks (MOSABs) forming a main-loop and a plurality of multi-input spot-advancing blocks (MISABs) forming a sub-loop. Depending on a desired division ratio, a connection connects blocks on the MOSABs and MISABs to create the desired division ratio. |
| US09484895B2 |
Self-adjusting duty cycle tuner
A duty cycle tuner measures high and low periods of a signal, calculates an actual duty cycle, generates duty control signals based on the actual duty cycle and a desired duty cycle, and adjusts the duty cycle responsive to the duty control signals. The high and low periods are measured using high-speed counters to provide a high count for the high period and a low count for the low period. The actual duty cycle value is then computed from the high and low counts, and compared to the desired duty cycle value to generate increment and decrement signals which may be positive or zero, to increase, decrease or maintain the actual duty cycle. In this manner, even if the high and low counts are subject to variations due to process, temperature or power supply voltage, their ratio is independent of such variations, so the tuner is immune to those effects. |
| US09484894B2 |
Self-adjusting duty cycle tuner
A duty cycle tuner measures high and low periods of a signal, calculates an actual duty cycle, generates duty control signals based on the actual duty cycle and a desired duty cycle, and adjusts the duty cycle responsive to the duty control signals. The high and low periods are measured using high-speed counters to provide a high count for the high period and a low count for the low period. The actual duty cycle value is then computed from the high and low counts, and compared to the desired duty cycle value to generate increment and decrement signals which may be positive or zero, to increase, decrease or maintain the actual duty cycle. In this manner, even if the high and low counts are subject to variations due to process, temperature or power supply voltage, their ratio is independent of such variations, so the tuner is immune to those effects. |
| US09484893B1 |
Clock generation circuit with fast-startup standby mode
A clock generation circuit operates in a STANDBY mode as well as conventional OFF and ON modes. In STANDBY mode, a small pre-bias current is applied to amplifiers in the clock generation circuit, which bias voltages on internal nodes to very near their operating voltage values. This reduces transient perturbations on signals as the clock generation circuit is returned to ON mode. The smaller transients settle faster, and allow the clock generation circuit to achieve very fast startup times from STANDBY to ON. The very fast startup times allow the clock generation circuit to be placed in STANDBY mode more often, such as when a system must monitor and rapidly respond to activity on an external bus or interface (such as an RF modem). |
| US09484892B1 |
Integrated circuit adaptive voltage scaling with de-aging
An integrated circuit compensates for circuit aging by measuring the aging with an aging sensor and controlling a supply voltage based on the measured aging. The operating environment for the aging sensor can be set to reduce impacts of non-aging effects on the measured aging. For example, the operating environment can use a temperature inversion voltage. An initial aging measurement value which is the difference between an initial aged measurement and an initial unaged measurement can be stored on the integrated circuit. A core power reduction controller can use the measured aging and the stored initial aging measurement value to update a performance-sensor target value and then perform adaptive voltage scaling using the using the updated performance-sensor target value. |
| US09484887B2 |
Acoustic wave band reject filter
A method and system for an acoustic wave band reject filter are disclosed. According to one aspect, an acoustic wave band reject filter includes a substrate and a plurality of acoustic wave band reject filter blocks. The substrate includes bonding pads formed on the substrate. Each one of the plurality of acoustic wave band reject filter blocks is fixed on a separate die. Each separate die has solder balls on a side of the die facing the substrate. The solder balls are positioned to electrically connect the bonding pads formed on the substrate to positions on each of the die. |
| US09484885B2 |
Method of manufacturing elastic wave device
A method for manufacturing an elastic wave device includes a step of preparing a supporting substrate, a step of forming a high-acoustic-velocity film on the supporting substrate and in which an acoustic velocity of a bulk wave propagating therein is higher than an acoustic velocity of an elastic wave propagating in a piezoelectric film, a step of forming a low-acoustic-velocity film on the high-acoustic-velocity film and in which an acoustic velocity of a bulk wave propagating therein is lower than an acoustic velocity of a bulk wave propagating in the piezoelectric film, a step of forming the piezoelectric film on the low-acoustic-velocity film, and a step of forming an IDT electrode on a surface of the piezoelectric film. |
| US09484884B2 |
Planar structure of a mechanical resonator decoupled by bending oscillation and expansion/compression vibrations
Mechanical resonators for making timepieces have the drawback of not being simultaneously efficient, compact, and inexpensive. The invention is a planar structure of a mechanical resonator (100) that is suitable for reducing bulkiness and manufacturing cost and comprises a bar (R) vibrating in longitudinal expansion/compression resonance and two beams, (12) each vibrating simultaneously in longitudinal expansion/compression and it bending oscillation in the plane of the structure and connected to the bar by a connection element (11) on the median plane (π) of the bar, thereby enabling the effects of the transverse deformations of the bar, due to the Poisson ratio of the material, to not be transmitted to the attachment pads (PF) of the resonator. Thus, the quality factor of the resonator can be very high. |
| US09484878B2 |
Equalization of frequency-dependent gain
Systems, devices, and methods for determining and establishing frequency-dependent gain compensation in wide bandwidth communication systems are disclosed. Variable frequency-dependent gain compensation circuits, or variable equalizers, have settings that configure them to establish discrete frequency-dependent gain compensation. The frequency-dependent gain compensation can include various types and levels of gain slope and/or ripple. The settings of the variable equalizers can be set by control signals established a control circuit in response to signals from an external computer. The variable equalizers are coupled to other circuits or devices and the frequency-dependent gain of the combined circuit are measured. The settings of the variable equalizer are then changed to establish an optimal frequency-dependent gain profile or frequency-dependent gain that is closest to a predetermined frequency-dependent target gain profile. The settings can then be saved in a memory or register. |
| US09484873B2 |
Differential amplifier circuit
Aspects of the invention include a differential amplifier circuit with a differential amplifier operated with a first power supply voltage applied thereto to amplify a differential voltage between paired input voltages, an inverting amplifier operated with a second power supply voltage applied thereto to carry out inverting amplification of the output of the differential amplifier and output the amplified output to the outside, and a voltage step-up circuit producing the first power supply voltage higher than the second power supply voltage from the second power supply voltage and applying the produced first power supply voltage to the differential amplifier. This satisfies at one time the requirement for producing the high power supply voltage necessary for the differential amplifier and the requirement for securing the power supply current necessary for the inverting amplifier on the basis of the externally supplied second power supply voltage. |
| US09484869B2 |
Tube amplifier systems and related methods
An amplifier stage module circuit has a tube connected with an anode section, a grid section, a cathode section, and an attenuator section. The amplifier stage module circuit is configurable to provide any one of a plurality of selectable voices, each voice provided by a corresponding combination of selectively combinable voice components of the sections. |
| US09484867B2 |
Wideband low-power amplifier
An amplifier is provided that includes a differential pair of transistors configured to steer a tail current responsive to a differential input voltage. The amplifier also includes a transconductor that tranconducts high-frequency changes in the differential output voltage into a differential bias current conducted through the differential pair of transistors. |
| US09484866B2 |
Doherty power amplifying circuit and power amplifier
A Doherty power amplifying circuit includes at least two asymmetrical two-branch power devices. Each of the asymmetrical two-branch power devices includes two power amplifiers. In the at least two asymmetrical two-branch power devices, one power amplifier included in each asymmetrical two-branch power device separately forms a peak power amplifier of the Doherty power amplifying circuit, and the other power amplifiers included in all the asymmetrical two-branch power devices jointly form a main power amplifier of the Doherty power amplifying circuit. |
| US09484864B2 |
Doherty amplifier
A Doherty amplifier (300) is provided, it comprises: a main amplifier (301) and a peak amplifier (302); a first microstrip (303) with λ/4 electric length connected between the main amplifier and the peak amplifier; a second microstrip (304) with λ/4 electric length connected between a junction of outputs of the peak amplifier and the main amplifier, and an output terminal (306); at least a tuner (305) for adjusting radius of VSWR circle of the main amplifier and connected, in series with the first microstrip (303), between the main amplifier (301) and the peak amplifier (302) based on input signal power. The hack-off power level efficiency is increased by enlarge the VSWR radius with the new Doherty structure. |
| US09484859B2 |
Modulation circuit and operating method thereof
A modulation circuit includes a phase locked loop (PLL) circuit, a scalar circuit and a sigma-delta modulator. The PLL circuit is for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal. The scalar circuit is for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form. The sigma-delta modulator is for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit. |
| US09484857B2 |
Semiconductor circuit device, electronic device, electronic apparatus, and moving object
A semiconductor circuit device includes: a semiconductor substrate; and a first circuit block including an analog circuit as a component, a second circuit block including a digital circuit as a component, a connection pad, and a connection wire electrically connecting the connection pad with the first circuit block, all of which are arranged on the semiconductor substrate. The connection wire is provided so as not to overlap the second circuit block in a plan view. |
| US09484854B2 |
Apparatus and method for providing oscillator signals
An apparatus for providing oscillator signals includes an oscillator circuit configured to generate a first oscillator signal with a first oscillator signal frequency for a frequency conversion of a first signal to be converted and to generate a second oscillator signal with a second oscillator signal frequency for a frequency conversion of a second signal to be converted. The oscillator circuit is configured to enable the generation of the first oscillator signal with the first oscillator signal frequency and the second oscillator signal with the second oscillator signal frequency based on at least two different possible oscillator circuit configurations. The control circuit is configured to select, based on the first oscillator signal frequency and the second oscillator signal frequency, one of the possible oscillator circuit configurations of the oscillator circuit for generating the first oscillator signal and the second oscillator signal. |
| US09484852B2 |
High power low voltage electrified powertrain
An electrified powertrain includes an electric motor having four or more coils corresponding to four or more AC phases and configured to generate drive torque to propel an electrified vehicle. The electrified powertrain also includes a low voltage electrical system comprising independent battery modules each configured to output a separate low DC voltage, and a power inverter module (PIM) configured to receive each of the separate low DC voltages from the battery modules, generate a separate low AC voltage for each AC phase using all of or fewer than all of the separate low DC voltages, and output the separate low AC voltages to the coils of the electric motor to drive the electric motor to generate the drive torque to propel the electrified vehicle, wherein none of the separate low DC voltages are electrically isolated and none of the separate AC voltages are considered high voltage. |
| US09484848B2 |
Motor controller
The motor controller includes: a current detection section that detects a current between a battery and an inverter circuit generating a voltage applied to a coil of a motor; an overload determination value output section that outputs an overload determination value used to determine whether or not the motor is overloaded; an overload determination section that compares a current value detected by the current detection section against the overload determination value, and that determines the motor to be overloaded in a case in which the current value detected by the current detection section is the overload determination value or greater; and a forced 500 rpm instruction section that controls the motor rotation speed to 500 rpm, this being a specific speed, in a case in which the overload determination section has determined the motor to be overloaded. |
| US09484847B2 |
Method of controlling a permanent magnet motor and corresponding system
A method for controlling a motor propulsion unit including a motor including a permanent magnet rotor and a stator, the method including regulating currents of the stator so that they attain their setpoints by virtue of control signals, the currents to be regulated and the control signals being expressed in a rotating reference frame including a plurality of axes. The regulating includes for each of the axes of the plurality of axes applying, to the current to be regulated on the respective axis, a linear operator differing as a function of a value of the current to be regulated with respect to its setpoint, the result of the application of the linear operator being a control signal on the respective axis. |
| US09484845B2 |
Motor control device, motor control method, and computer-readable storage medium
A motor control device includes a detecting unit configured to detect rotation of a motor to be controlled and output a rotation detection value related to the rotation; a drive control unit configured to perform drive control to rotate the motor at a control target value increasing with time based on the rotation detection value; and an abnormality detection unit configured to perform an abnormality detection process for detecting an abnormality in the drive control based on the rotation detection value and a predetermined threshold. The drive control unit performs control to stop rotation of the motor when the abnormality is detected. |
| US09484844B1 |
Circuit and method for reducing inrush current of phase converter motor
A method and circuit for starting a three-phase motor in a manner that reduces inrush current normally associated with starting an AC motor. The method uses the circuit to start the three phase motor gradually with three phase alternating current having relatively low frequency and gradually increasing the frequency up to or above the motor operating frequency over a period of time and then switching in a single phase alternating current supply to power the three phase motor. |
| US09484840B2 |
Hybrid zero-voltage switching (ZVS) control for power inverters
A power inverter combination includes a half-bridge power inverter including first and second semiconductor power switches receiving input power having an intermediate node therebetween providing an inductor current through an inductor. A controller includes input comparison circuitry receiving the inductor current having outputs coupled to first inputs of pulse width modulation (PWM) generation circuitry, and a predictive control block having an output coupled to second inputs of the PWM generation circuitry. The predictive control block is coupled to receive a measure of Vin and an output voltage at a grid connection point. A memory stores a current control algorithm configured for resetting a PWM period for a switching signal applied to control nodes of the first and second power switch whenever the inductor current reaches a predetermined upper limit or a predetermined lower limit. |
| US09484839B2 |
Power converter, power generating system, apparatus for controlling power converter, and method for controlling power converter
A power converter according to one embodiment includes a controller that switches between a boosting operation in a boost circuit and a pulse-width modulation operation in a single-phase inverter. The controller modifies an output from a voltage detection filter based on a delay compensating value for compensating a detection delay introduced by the voltage detection filter, when switching is performed the boosting operation in the boost circuit to the PWM operation in the single-phase inverter. |
| US09484838B2 |
Inverter and power supplying method thereof and application using the same
An inverter and a power supply method thereof and an application thereof are provided. The inverter includes a DC-DC conversion circuit, an inverting circuit and an auxiliary power circuit. The DC-DC conversion circuit converts a DC input voltage into a DC bus voltage. The inverting circuit is configured to convert the DC bus voltage into an AC output voltage. The auxiliary power circuit is enabled in response to the DC input voltage, and the auxiliary power circuit generates a first auxiliary power for enabling the DC-DC conversion circuit after being enabled. The DC-DC conversion circuit is enabled in response to the first auxiliary power, and the DC-DC conversion circuit generates a second auxiliary power for enabling the inverting circuit after being enabled, such that the inverting circuit is enabled in response to the second auxiliary power and generates the AC output voltage. |
| US09484836B2 |
Inverter that converts DC power into AC power
An inverter converts a direct-current (DC) power supplied from different DC power supplies into an alternate-current (AC) power formed by a quasi sinusoidal wave and then outputs the thus converted AC power. A first absolute-value setting switch to a fourth absolute-value setting switch are switched to generate absolute values of AC power by using a combination of a power-supply voltage supplied from each DC power supply and a voltage generated from a voltage supplied from each DC power supply. A first polarity setting switch to a fourth polarity setting switch are switched to generate the polarities of AC power. A control unit controls the switching of the first absolute-value setting switch and the like and the first polarity setting switch and the like. The control unit switches the first polarity switching switch and the like with timing at which the polarity of quasi sinusoidal wave changes. |
| US09484833B2 |
System and method for controlling PCS voltage and frequency
The present invention discloses a system and a method for controlling PCS voltage and frequency, wherein the system comprises a reference voltage converter, a phase-locked loop, a grid-side voltage converter, a voltage transformer, a first proportional integral controller, a second proportional integral controller, a coordinate converter and a SVPWM generator; a reference voltage converter is connected to an output terminal of a the phase-locked loop, and the output terminal of the phase-locked loop is further connected to a grid-side voltage converter; the grid-side voltage converter is connected to a high-voltage side of an isolating transformer of the electric grid via the voltage transformer; two output terminals of the grid-side voltage converter are respectively connected to the coordinate converter via two proportional integral controllers; an output terminal of the coordinate converter is connected to the SVPWM generator; an output terminal of the SVPWM generator is connected to a power switch of the electric grid. A PWM control signal for controlling the power switch of the electric grid is generated by the reference voltage converter, the phase-locked loop, the grid-side voltage converter, the voltage transformer, the two proportional integral controllers, the coordinate converter and the SVPWM generator. The system and method for controlling PCS voltage and frequency according to the invention have the advantages that the PCS can realize voltage and frequency buildup in an off-grid state and can stably output an expected voltage and frequency. |
| US09484829B2 |
Power conversion device including noise suppression capacitor
A power conversion device including a power conversion portion that switches direct current voltage supplied by a positive line and negative line of a direct current power supply with a semiconductor switching element, and outputs converted voltage, is such that a plurality of interline capacitors are connected in parallel between the positive line and negative line, the capacitance of the plurality of interline capacitors is of a value that becomes smaller the nearer to the power conversion portion the position in which the interline capacitor is connected, and the capacitance of the interline capacitor with the smallest value of capacitance is set to a value greater than that of the capacitance between main electrodes when a direct current voltage is applied to the switching element used in the power conversion portion. |
| US09484827B2 |
Power supply with output rectifier
A power converter for converting power from a first voltage level at an input terminal to a second voltage level across first and second output terminals, the power converter including a first inductor having one end connected to the input terminal and another end connected to a point with a switched voltage level, a first switch element with a first terminal connected to the point and a second terminal connected to ground and a second switch element connected in series with a capacitor through a first terminal, and a second terminal of the second switch element being connected to the point and the capacitor being terminated to ground, the first switch element being operated with a first duty cycle (D), and wherein the second switch element being operated with a second duty cycle (1-D), wherein the first and second switch elements are operated such that their conducting periods are complementary, wherein the switched voltage level at the point includes a first pulse generated when the first switch element conducts and a second pulse generated when the second switch element conducts. |
| US09484824B2 |
Method and apparatus for digital control of a switching regulator
An on/off controller device includes a control circuit to generate a control signal to switch a power switch between an on state and an off state to transfer energy from a primary side to a secondary side of a switched mode power supply. A comparator is coupled to generate an enable signal that enables and disables the switching of the power switch by the control circuit. The comparator compares a feedback signal with a variable threshold and switches the enable signal between enabling and disabling the switching of the power switch. The variable threshold is modulated to increase a fundamental frequency of the switching of the power switch by the control circuit. The variable threshold is modulated with a fixed amplitude pulse that is combined with a second threshold to modulate the variable threshold between a first higher value and a second lower value. |
| US09484823B2 |
Power supply apparatus with extending hold up time function
A power supply apparatus with extending a hold up time function includes a transformer, a winding switching unit and a detection unit. The transformer includes a primary side winding and a secondary side winding. A turn number of the secondary side winding and a turn number of the primary side winding have a relationship of a turn ratio. When the detection unit detects that an input voltage of the primary side winding is less than an input predetermined voltage, the winding switching unit is configured to increase the turn ratio, so that an output voltage of the secondary side winding is recovered to an output predetermined voltage. |
| US09484820B2 |
DC/DC converter, electronic apparatus having the same and DC/DC conversion method thereof
A multi-output DC/DC converter, which may be included in an electronic apparatus, performs sync switching control using a simplified configuration. The DC/DC converter may include a first switching unit which alternately switches input DC power and converts the DC power into AC power, a converter which converts the AC power and outputs first power and second power, a first output unit which receives the first power and outputs an output voltage, a second output unit which includes a second switching unit, and receives and switches the second power through the second switching unit and outputs an output voltage, and a controller which detects a voltage applied to a winding wire of the first output unit, generates a sync signal by using the detected voltage, compares the sync signal with a predetermined reference and controls the second switching unit to synchronize the second switching unit with the first switching unit. |
| US09484817B2 |
DC/DC converter
In a DC/DC converter, each channel operates under digital control using nonlinear control. The time interval between the time of turning ON of the switching element 1 and the time of turning ON of each of other switching elements j (j=2, 3, . . . , N) is measured. If the measured interval is within a specified range, operation is continued without changing the ON time of the switching element j used last time. Meanwhile, if the measured interval is out of the range, the ON time of the switching element j is increased or decreased within a predetermined range to be shifted from a basic frequency. Thus, the interval between the time of turning ON of the switching element 1 and the time of turning ON of the switching element j is brought back to the specified range. |
| US09484816B2 |
Controllable on-time reduction for switching voltage regulators operating in pulse frequency modulation mode
A switching voltage regulator includes a power stage for delivering output current to a load through an inductor. The power stage has a high-side transistor and a low-side transistor. The switching voltage regulator also includes a controller for setting the power stage in a PFM (pulse frequency modulation) switching mode if the output current decreases below a first threshold. Each period of the PFM switching mode includes an on-time during which the high-side transistor is on and the low-side transistor is off, an off-time during which the low-side transistor is on and the high-side transistor is off and a HiZ-time during which the high-side transistor and the low-side transistor are both off. The controller varies the on-time of the PFM switching mode responsive to a change in the output current. |
| US09484815B2 |
Energy-based control of a switching regulator
A system and method are provided for controlling a switching voltage regulator circuit. An energy difference between a stored energy of a switching voltage regulator and a target energy is determined. A control variable of the switching voltage regulator is computed based on the energy difference and the control variable is applied to a current control mechanism of the switching voltage regulator. In one embodiment, the control variable is pulse width of a control signal. |
| US09484811B2 |
Integrated circuit comprising voltage modulation circuitry and method threfor
An integrated circuit comprising voltage modulation circuitry arranged to convert an input voltage level at an input node to an output voltage level at an output node. The voltage modulation circuitry comprises a switching element arranged to connect the input node to the output node when in an ON condition, and switching control module operably coupled to the switching element and arranged to control the connection of the input node to the output node by the switching element in accordance with a switching frequency. The voltage modulation circuitry further comprises frequency control module operably coupled to the switching control module and arranged to receive an indication of the input voltage level at the input node, and to configure the switching frequency based at least partly on the input voltage level indication. |
| US09484807B2 |
High efficiency switched capacitor voltage regulator
A high efficiency switched capacitor voltage regulator circuit and a method of efficiently generating an enhanced voltage from an input voltage supply. An input voltage Vin from a main power source is the base voltage to be pumped to an enhanced voltage. Auxiliary voltage sources V1 and V2 are from sources (or grounds) available in the system. During phase 1 of a clock signal, a pump capacitor is charged to ΔV=V2−V1. During phase 2 of the clock signal, the pump capacitor is connected in series between Vin and an output capacitor, resulting in the sum voltage V=Vin+ΔV being generated across the output capacitor. |
| US09484805B2 |
Dual mode power supply controller with current regulation
A power conversion circuit includes a voltage boost circuit including a boost inductor configured to generate an output voltage in response to an input voltage, and a boost controller configured to control operation of the voltage boost circuit. The boost controller is configured to control operation of the voltage boost circuit in response to a level of current in the boost inductor. |
| US09484804B2 |
Battery charging system and method
A battery charging system includes a PFC converter which converts an alternating current input voltage which is input from a power supply to a direct current output voltage, a DC-DC converter which changes an output voltage of the PFC converter, a battery which is charged by the DC-DC converter, and a controller which calculates power conversion efficiency based on the input current and the input voltage, a charged voltage of the battery, and a charging current for the battery, and updates the output voltage of the PFC converter according to the power conversion efficiency. A battery charging method includes steps of: calculating power conversion efficiency using the input current and the input voltage from the power supply, and the charging current and the charged voltage of the battery; and updating the output voltage of the PFC converter according to the calculated power conversion efficiency. |
| US09484803B2 |
Method for regulating an output voltage
A method for regulating an output voltage of a converter is provided in which a switching frequency of a switching device is limited in response to a signal that is representative of a magnitude of a current from an input of the converter and to a sense signal generated in response to an input voltage signal. |
| US09484802B2 |
Soft-off control circuit, power converter and associated control method
A power converter having a soft-off control circuit and a variable reference signal generation module and associated method for controlling the power converter. The variable reference signal generation module is configured to provide a variable reference signal to the power converter. The soft-off control circuit is configured to determine whether an input voltage of the power converter exceeds an over-voltage threshold, and to control the variable reference signal to increase once the input voltage reaches the over-voltage threshold and to decrease when the input voltage is lower than the over-voltage threshold. The power converter can regulate an output voltage to increase with the increase of the variable reference signal and to decrease with the decrease of the variable reference signal so that during a soft-off procedure the input voltage may not exceed the over-voltage threshold, enabling the power converter to be safely shut off. |
| US09484797B2 |
RF switching converter with ripple correction
This disclosure relates generally to radio frequency (RF) switching converters and RF amplification devices that use RF switching converters. In one embodiment, an RF switching converter includes a switching circuit operable to receive a power source voltage, a switching controller configured to switch the switching circuit so that the switching circuit generates a pulsed output voltage from the power source voltage, and an RF filter configured to convert the pulsed output voltage into a supply voltage, wherein the RF filter includes a decoupling capacitor configured to receive the supply voltage. The switching controller is configured to generate a ripple correction current that is injected into the decoupling capacitor such that the decoupling capacitor filters the ripple correction current. The decoupling capacitor outputs the ripple correction current such that the ripple correction current reduces a ripple variation in a supply current level of a supply current resulting from the supply voltage. |
| US09484794B2 |
Hybrid induction motor with self aligning permanent magnet inner rotor
A hybrid induction motor includes an inductive rotor and an independently rotating permanent magnet rotor. The inductive rotor is a squirrel cage type rotor for induction motor operation at startup. The permanent magnet rotor is axially displaced and variably coupled to the inductive rotor (or to a motor load) through a clutch and is allowed to rotate independently of the inductive rotor at startup. The independently rotating permanent magnet rotor quickly reaches synchronous RPM at startup. As the inductive rotor approaches or reaches synchronous RPM, the coupling between the inductive rotor and the permanent magnet rotor increases until the two rotors are coupled the synchronous RPM and the motor transitions to efficient synchronous operation. |
| US09484792B2 |
Rotor and method for manufacturing the rotor
A rotor has a rotor core arranged to radially face a stator. The rotor core has an accommodation hole extending axially from an axial end face of the rotor core. A magnet is received in the accommodation hole. A recess, which is dented in a direction separating from the magnet, is formed in an end surface of the accommodation hole. The recess has an opening facing the magnet. A pair of open distal portions are arranged at opposite sides of the opening and pressed against the magnet. |
| US09484791B2 |
Remote rotor parameter sensor for electric drives
A rotor parameter sensor is used for electric drives. A rotor of an electric engine or motor is monitored by a sensor sensing one or more physical observables or operation parameters. Furthermore, a method and system is used for monitoring an electric engine or motor for use in electric or hybrid vehicles. |
| US09484790B2 |
Rotor for electric rotating machine and method of manufacturing the same
A rotor for an electric rotating machine includes a hollow cylindrical rotor core and a plurality of magnets. The rotor core has a plurality of magnet-receiving holes formed therein. Each of the magnet-receiving holes has a plurality of wall surfaces including a radially innermost wall surface which is positioned radially innermost among the plurality of wall surfaces. Each of the magnets is received in a corresponding one of the magnet-receiving holes of the rotor core. Further, each of the magnets is arranged in the corresponding magnet-receiving hole so that among the thermal resistances between the magnet and the plurality of wall surfaces of the corresponding magnet-receiving hole, the thermal resistance between the magnet and the radially innermost wall surface of the corresponding magnet-receiving hole is lowest. |
| US09484788B2 |
Rotary-electric-machine temperature estimation system for vehicle
Provided is a rotary-electric-machine temperature estimation system for a vehicle. The temperature estimation system includes a rotary electric machine, a cooler, a temperature sensor, and a controller. The rotary electric machine is fixed to a vehicle body of the vehicle and provided in the vehicle. The rotary electric machine includes a stator coil. The cooler has an injection outlet for injecting refrigerant, and cools off the stator coil by the refrigerant thus injected from the injection outlet. The temperature sensor measures a temperature of the stator coil. The controller estimates an actual temperature of the stator coil by use of the measured temperature and a preset temperature correction value. The controller changes the temperature correction value according to a change in a posture of the vehicle body. |
| US09484787B2 |
Voltage regulator device for rotary electric machine, bearing for rotary electric machine and rotary electric machine comprising such bearing
A voltage regulator device provided in a bearing of a rotary electric machine of a motor vehicle. The regulator device comprises a support and at least one electronic component configured to participate in the control of the electric machine. The support comprises a first part on which the at least one electronic component is mounted. The first part having an edge equipped with a brush holder provided with at least one brush-holder receptacle configured to accommodate a brush for making an electrical connection with a rotor of the electric machine. The device is configured to allow air to flow through the first part of the support, in contact with the brush holder. The device includes at least one air circulation slot provided through the support between the first part and the brush-holder. The support covers an air opening in the bearing. |
| US09484784B2 |
Electric motor systems and methods
Electric motor systems and methods may provide highly efficient operation. The electric motor systems and methods discussed herein provide an oil filled motor that is low speed and utilizes permanent magnets. The electric motor may utilize a large number of poles and fractional slot design. Further, in some embodiments, the electric motor systems and methods may be suitable for use downhole. |
| US09484783B2 |
Outer rotor type motor
Provided is an outer rotor type motor capable of reducing workload for wiring and connecting coil leads without reducing a coil space factor while keeping the motor small. Coil leads extracted from same-phase coils of respective stator units pass between pole teeth of the stator units, and are respectively connected to inter-phase connection terminals at one end and then connected in series with each other, the stator units comprises a plurality of individual same-phase stator units which are stacked together, and the inter-phase connection terminals are protruded from a main terminal body. A drive signal input terminal and external input terminals, to which the other ends of coil leads extracted from the respective phase coils are respectively connected, and a drive signal input terminal and an external input terminal, to which the other ends of coil leads extracted from the respective phase coils are respectively connected, are respectively connected and wired inside the main terminal body. |
| US09484781B2 |
Core formed from powder and motor for vehicle using the same
A core formed from powder, such as a stator core for use in a motor for a vehicle, wherein the core is formed from metallic powder and includes an outer part disposed at an inside of the motor, an inner part disposed at an inside of the motor, and a winding part which connects the outer part and the inner part and on which a wire is wound, and to a motor for a vehicle using the same. The winding part is formed to have rounded corners and a height lower than the height of the inner part, and a connection part is obliquely formed between the winding part and the inner part so that the winding part and the inner part are naturally connected. |
| US09484772B2 |
Wireless power mechanisms for lab-on-a-chip devices
Methods, devices and systems are provided for wirelessly powering and controlling a lab-on-a-chip device. Direct current (DC) and alternating current (AC) signals can be produced at the lab-on-a-chip device in a wireless manner. In some configurations, integrated RF components and optoelectronic components of the lab-on-a-chip device are used to collaboratively produce the DC and AC signals. In other configurations only optoelectronic components on the lab-on-a-chip system can produce the DC and/or AC signals in response to incident light. By modulating the incident light, AC signals of various frequencies and waveforms can be generated. The DC and AC signals can be used by additional integrated electronic circuits and by a microfluidic chip lactated on the lab-on-a-chip device to control the behavior of the bioparticles in the microfluidic device. |
| US09484766B2 |
Wireless power transmitter tuning
This disclosure provides systems, methods and apparatus for tuning a wireless power transmitter. In one aspect a device configured to wirelessly provide power to a load is provided. The device includes a signal driver configured to provide power along a power path. The device further includes a first tuning circuit along the power path, configured to tune reactance at the signal driver, introducing undesired harmonic content. The device further includes a second tuning circuit along the power path, configured to tune reactance at the signal driver and to generate complementary harmonic content, at least partly canceling the harmonic generated at the first tuning circuit. |
| US09484762B2 |
Device and method for balancing battery cells
A device and method for balancing cells of a battery of an electric automobile, the device including: a primary winding arranged in series with a primary switch; and, for each cell, a circuit including, in series, a secondary winding that forms a transformer together with the primary winding, a secondary switch, a coil, and a diode mounted in parallel with the coil and the cell; and a controller controlling the primary switch and each secondary switch. |
| US09484757B2 |
Charging and discharging system
A charging/discharging system includes a charging/discharging power unit for applying power to a battery cell, a chamber, a jig unit for holding the battery cell mounted in the chamber, an air conditioning unit for adjusting temperature and humidity in the chamber, and an interface unit for controlling the charging/discharging power unit, and for controlling the air conditioning unit, wherein the charging/discharging power unit, the chamber, the air conditioning unit, and the interface unit are combined as an integrated structure. |
| US09484754B2 |
Balancing series-connected electrical energy units
An apparatus and methods to fabricate the apparatus for balancing a string of N series-connected electrical energy units (such as battery cells or modules) comprising: a transformer with a magnetic core and N windings; N switch circuits; N driver circuits, each driver circuit operable to turn ON/OFF a respective switch circuit in a charging or discharging or idling configuration; and a controller circuit. In a novel way, the controller circuit selects each electrical energy unit for charging or discharging or idling, and controls simultaneously coupling all selected-for-discharging electrical energy unit(s) to respective winding(s) in discharging configuration(s) for a first period of time to simultaneously energize the respective winding(s); then immediately or after a short delay, the controller circuit controls simultaneously coupling all selected-for-charging electrical energy unit(s) to respective winding(s) in charging configuration(s) for a second period of time to be charged with respective induced current(s). |
| US09484753B2 |
Method for balancing the charge and discharge level of a battery by switching its blocks of cells
A device balancing overall levels of electrical charge in plural blocks of cells in a battery. The blocks can be connected in a circuit during a charging phase of the cells accumulating charge, and during a discharging phase of the cells giving back charge. The device includes one series switch and one parallel switch. The series switch can, when closed and the parallel switch is open, connect a block to the circuit, in series with the other blocks, so that the block is connected during the charging and discharging phases. The parallel switch can, when closed and the series switch is open, disconnect the block from the circuit, so that the block is disconnected if discharging disconnection conditions are met during the discharging phase or if charging disconnection conditions are met during the charging phase. The block includes a mechanism locally balancing charge levels of its cells when disconnected. |
| US09484751B2 |
Wireless power for portable articles
A wireless electrical power system provides access to high voltage and/or low voltage electrical power at portable articles that are positionable at different locations within a work area, and substantially without the use of exposed cabling. The power system includes a portable article that is positionable at two or more locations within a work area. The work area is defined by a plurality of surfaces, at least one of which incorporates a wireless electrical power transmitter. The portable article incorporates a wireless electrical power receiver that is configured to receive electrical power from the wireless power transmitter when the wireless power receiver is sufficiently close to the wireless power transmitter. The portable article further includes an electrical power outlet that provides users in the work area with access to the electrical power. |
| US09484742B2 |
Power supply system for mounting to a rail
Power supply system for mounting to a rail has an AC/DC converter for converting high voltage AC power to low voltage DC power a controller for controlling the power supply system, an AC/DC converter and controller module for mounting to the rail and for connection to the AC/DC converter and controller respectively, and a battery connection and LVBD contactor module for mounting to the rail and for connection to a first battery, wherein the battery connection and LVBD contactor module on a first side is connected to the AC/DC converter and controller module by a first connection interface and where the battery connection and LVBD contactor module on a second side, opposite of the first side, has a first connector of a second connection interface. |
| US09484739B2 |
Overvoltage protection device and method
A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path. |
| US09484738B2 |
Operating a substation automation system
A method and system are provided for operation of substations in which protection, control and measurement devices (e.g., Intelligent Electronic Devices (IEDs)) exchange operational data over a data network, for example, according to IEC standard 61850. During maintenance, commissioning and fault situations, when one or several IEDs are inoperable, the data that these IEDs would have produced is substituted to ensure availability of the substation. To this effect, a dedicated substitute device is permanently installed that can take the role of any IED, and that is automatically configured out of a standard configuration description (SCD) file that describes the SA system. |
| US09484736B2 |
Method for determining flooded state and electronic device thereof
Provided is an operating method of an electronic device including a first processor, a humidity sensor, a second processor controlling the humidity sensor, and a battery, wherein the second processor and the battery are waterproofed. The method may include: detecting a power supply event from the battery; supplying a power from the battery to the second processor controlling the humidity sensor and not supplying the power to the first processor; determining, by the second processor, a humidity of the electronic device by using the humidity sensor; and when the humidity of the electronic device is greater than a first reference humidity, cutting off power supply from the battery and when the humidity of the electronic device is less than the first reference humidity, supplying the power to the first processor. |
| US09484729B2 |
Electrical equipment including a conductor mounting between two casing portions
An insulating support (20) for insulating an electrical conductor contained in aligned casing portions (34, 35), is held in a housing (39) defined by the flanges (36, 37) for joining the casing portions (34, 35) together, the flanges presenting contact faces (38) around the periphery (24) of the support (20). A single sealing gasket (41) is sufficient to prevent the atmosphere in the casing leaking to the outside, and that simplifies assembly of the electrical equipment, while at the same time protecting the support (20) from the outside. For application to medium- and high-voltage electrical equipment. |
| US09484727B1 |
Cable manager
A retention device for cables includes a plurality of channels configured to receive a plurality of cables having connector ends. The retention device includes a plurality of openings extending from the plurality of channels to an outer edge of the retention device such that the plurality of cables can be inserted into the plurality of channels. The retention device includes means for removably attaching the retention device to another retention device. The retention device is fabricated to be semi-rigid. |
| US09484726B2 |
Fluid-tight line feedthrough
A fluid-tight line feedthrough for introducing an electric conductor into a high-pressure chamber includes a housing and an electric conductor that passes through the housing. A ceramic insulator is positioned between the housing and the electric conductor. The ceramic insulator is divided into a first insulator segment facing the electric conductor and a second insulator segment facing the housing, thereby forming a conical separating plane. A fitting made of an electrically conductive material is positioned between the two segments, the fitting being connected to the two segments and to the housing. |
| US09484724B2 |
Cable protection device and system
A cover is provided for protecting cables. The cover includes a first cover member and a second cover member. The second cover member is configured to mate with the first cover member to define conduits that enclose and permit passage therethrough of one or more cables. Plural covers are couplable to form an articulating cover system operable to enclose a selected length of cable(s). The covers may be employed to protect hoses, pipes, ducts and the like. |
| US09484718B2 |
Spark plug
A spark plug includes an insulator having an axial hole, a center electrode inserted into a forward portion of the axial hole, a terminal electrode inserted into a rear portion of the axial hole, and an interelectrode insert which contains glass and electrically conductive carbon and is disposed in the axial hole between the center electrode and the terminal electrode. The interelectrode insert has a resistance of 1.0 kΩ to 3.0 kΩ, and the interelectrode insert has a carbon content of 1.5% by mass to 4.0% by mass at a forward portion located forward of a center point between the rear end of the center electrode and the forward end of the terminal electrode. Furthermore, the forward portion is lower in resistance than a rear portion of the interelectrode insert located rearward of the center point. |
| US09484717B2 |
High energy ignition spark igniter
The disclosure pertains to ignition systems and more particularly to spark igniters for burners and burner pilots. The spark igniter provided, is configured such that an electric field concentration between two electrodes increases while keeping output voltage unchanged. |
| US09484712B2 |
Combined Gain-SOA chip
A combined Gain-SOA (Semiconductor Optical Amplifier) Chip is provided for forming a hybrid laser by a combination with an external reflector, the Gain-SOA Chip comprising a gain section and an SOA section, wherein an optical grating is arranged between the gain section and the SOA section. |
| US09484711B2 |
Semiconductor laser apparatus and manufacturing method thereof
A semiconductor laser apparatus includes a silicon-on-insulator assembly and an edge-emitting semiconductor laser assembly integrated on the silicon-on-insulator assembly. The silicon-on-insulator assembly includes an optical waveguide at the top which is bonded to the edge-emitting semiconductor laser assembly and configured to couple a laser light emitted from the edge-emitting semiconductor laser assembly, and the optical waveguide includes a core portion located in the middle of the optical waveguide; and at least one vertical rib configured on two sides of the core portion respectively, with a width narrower than that of the core portion. The apparatus obtains a single mode laser operation and has low propagation loss and high mechanical bond strength. |
| US09484710B2 |
Semiconductor laser device
A semiconductor laser device includes: semiconductor laser arrays; collimating members; a condenser lens provided, in common, for collimated light beam arrays outputted from the respective collimating members, and including a light incident surface on which a light incident row pattern including light incident regions is formed through entering of the collimated light beam arrays; and an optical fiber. A condenser lens incident optical path length of at least one of the semiconductor laser arrays is different from that of any other one of the semiconductor laser arrays. A collimated light beam array derived from one of the semiconductor laser arrays that corresponds to the largest condenser lens incident optical path length is directed to a predetermined light incident region in the light incident surface. The predetermined light incident region is other than the outermost light incident region in the light incident row pattern. |
| US09484708B2 |
Dual wavelength laser module with constant output intensity
A laser module includes a light source device having a first amplifier that outputs first output light, and a second amplifier that outputs second output light, a first drive circuit that supplies the first amplifier with a first drive current, a second drive circuit that supplies the second amplifier with a second drive current. A dither signal is superimposed on one of two drive currents to respectively grasp the characteristics of the two amplifiers. |
| US09484707B2 |
Spatially stable high brightness fiber
Optical fibers that provide stable output beam sizes have core refractive indices that decrease non-monotonically from a core center to a core/cladding interface. A maximum refractive index of the core is situated at a radius of between about ½ and ¾ of the core radius so that a core center has a depressed refractive index. Such fibers are included in diode pumped solid state lasers to deliver pump laser power to a laser medium. |
| US09484705B2 |
Optically end-pumped slab amplifier comprising pump modules arranged in a distributed manner
An optically end-pumped amplifier with a plate-shaped optical gain medium has a plurality of pump laser units for optically pumping the gain medium through at least one of the narrow side surfaces thereof. The pump laser units are designed such that the pump laser radiation, upon passing through the gain medium, has an elongated beam cross section having a short axis and a long axis running parallel to the main surfaces of the gain medium and propagates freely through the gain medium with respect to the short axis. They are arranged such that in each case the principal axes of the beam bundles of the pump laser units impinge on one of the pumped side surfaces in a plane perpendicular to the short axis at an angle to one another, wherein the beam cross sections of the beam bundles are superimposed on one another. |
| US09484693B1 |
Cord organizing assembly
A cord organizing assembly includes a housing that may be coupled to a support surface. The housing has a well therein such that the well may have a plurality of cords positioned within the well. A pair of retainers is provided and each of the retainers is coupled the housing. Each of the retainers is positioned within the well such that each of the retainers may retain the cords within the well. A power supply is coupled to the housing such that the power supply may have each of the cords is electrically coupled to the power supply thereby facilitating the power supply to provide electrical power to each of the cords. |
| US09484692B2 |
High outlet density power distribution
Systems and apparatuses are provided in which outlets are coupled to a power distribution unit (PDU) or PDU module in various configurations. The outlets may be coupled to a recessed surface within a PDU housing. The outlets may be coupled to a printed circuit board that is at least partially disposed within the PDU housing. The outlets may extend away from the recessed surface or printed circuit board towards or beyond a front face of the PDU housing. |
| US09484690B2 |
Modular electrical connector
The present invention relates to a modular electrical connector, and the modular electrical connector can be divided into three modules including: housing, connecting modules, and RJ45 receiving modules, wherein the housing is used for disposed on a circuit board of an external host case, and the connecting modules and the RJ45 receiving modules are assembled and disposed in the housing so as to electrically connected with the circuit board; according to the modular design of the present invention, the RJ45 receiving modules are able to be individually disassembled from the connecting modules and the connector, thus, user does not have to disassembles whole connector during the RJ45 connector's repairing or replacing process. |
| US09484686B2 |
Electric connecting module for a motor vehicle
An electric connecting module (12) for an electric component (10) of a motor vehicle (40) has a connecting section (22) with at least two electrical contacts (36). A connecting housing (24) has a connecting opening that can be connected to the connecting section (22). The connecting housing (24) has at least one cable opening (18) that opens laterally on the connecting housing (24) in relation to the connecting opening for routing electric connecting lines (14) through the connecting opening (18) and to connect them to the contacts (36). The connecting housing (24) can be connected to the connecting section (22) in different rotational positions to route the connecting lines (14) in different directions in relation to the electric component (10). |
| US09484680B2 |
Radio frequency interference shield
An apparatus is described herein. The apparatus includes a receptacle to receive a plug to couple a peripheral device to a computing device. The apparatus includes a ground contact of a printed circuit board of the computing device. The apparatus includes a shield communicatively coupled to the ground contact, wherein the shield is to reduce radio frequency interference (RFI) from an interface between the plug and the receptacle. |
| US09484677B2 |
Electrical connector having improved grounding member
An electrical receptacle connector includes a terminal module assembly and a grounding collar thereon. The terminal module assembly includes the front mating tongue, the rear body, and the step structure therebetween, and the corresponding contacts. The contacts are secured to the body with contacting sections exposed upon the mating tongue. The grounding collar includes the grounding regions located on two opposite upper and lower surfaces of the step structure. The front edge area of the grounding region adjacent to the front edge area, forms a notch so as to leave a space to allow the spring finger of the corresponding interior grounding plate of the plug connector to first slide upon the step structure and successively contact the grounding region of the grounding collar of the receptacle connector. |
| US09484673B1 |
Signal terminal of vertical bilayer electrical connector
A signal terminal of a vertical bilayer electrical connector provided forwardly with a plugging surface having thereon an upper plugging hole and a lower plugging hole and provided downwardly with an electrical connection surface includes a conductive body having at least a bump and/or at least a dent at two ends, wherein the at least a bump is parallel to a plane perpendicular to the plugging surface and the at least a dent is parallel to a plane perpendicular to the plugging surface; a resilient electrical contact segment connected to an end of the conductive body and disposed in the upper or lower plugging hole; and an electrical connection segment connected to another end of the conductive body and mounted on the electrical connection surface to thereby electrically connect with a circuit board. Therefore, the signal terminal is effective in adjusting an impedance, reducing loss, and eliminating delay skew. |
| US09484671B2 |
Electrical connector and conductive terminal assembly thereof
A conductive terminal assembly of an electrical connector is disclosed having a terminal aligning plate and four pairs of differential signal terminals. The terminal aligning plate made of a dielectric material. The four pairs of differential signal terminals are arranged in two columns in an array on the terminal aligning plate. Each terminal has a terminating end, a contacting end, and a terminal body. The terminal body extends between the terminating end and the contacting end. The terminal bodies of two first terminals in the same column, which are longitudinally adjacent to each other and have opposite polarities, are offset transversely. |
| US09484669B2 |
Locking electrical connector
An electrical connector (10) of elongate shape includes a main body (11) having a first end region (18) which includes one or more electrical contacts in use for contact with a complementary connector component and a second end region (24) opposite the first end region and from which depends a protective guide (12) through which a flexible conductor may extend, the main body of the connector including a locking mechanism (20) whereby, in use, the connector (10) may be selectively releasably secured to a complementary connector component, and the connector (10) including a release control (14) operable to act on the locking mechanism and allow release of the connector from the complementary connector component, wherein the release control (14) is operable at a position further from the first end (18) of the connector than the second end (24) as considered in the direction of the length of the connector. |
| US09484662B2 |
Electrical connector with improved terminal module
A receptacle connector for mating with the plug connector, includes a terminal unit, a metallic shield and a mating cavity surrounded by the metallic shield. The terminal unit includes a terminal module having a first insulator with a plurality of first contacts embedded therein via a first stage insert-molding process, a second insulator with a plurality of second contacts embedded therein via the similar first stage insert-molding process. The first insulator includes a first front insulator and a first rear insulator spaced from each other while linked together by the corresponding first contacts; the second insulator includes a second front insulator and a second rear insulator spaced from each other while linked together by the corresponding second contacts. |
| US09484656B2 |
Electrical connector
An electrical connector includes a fixed housing to be fixed to a board; a movable housing arranged to be movable relative to the fixed housing; and a plurality of terminals disposed between the fixed housing and the movable housing. The terminal includes a connecting portion held with the fixed housing; a first curved portion connected to the connecting portion; a terminal portion held with the movable housing; a second curved portion connected to the terminal portion; and a inclined portion connected between the first curved portion and the second curved portion so that the first curved portion is curved in a direction opposite to a direction that the second curved portion is curved. The inclined portion is inclined so that an angle between the inclined portion and the first curved portion or the second curved portion becomes an acute angle. |
| US09484654B2 |
Electrical connector with improved contacts
An electrical connector comprises an insulative housing with a plurality of ports, a plurality of contacts received in the insulative housing, a rear seat assembled to a rear side of the insulative housing and a metal shell covering the insulative housing. The insulative housing has a plurality of slots recessed from a rear surface thereof for retaining the contacts. The contact has a linking portion positioned in the rear sear and a mating portion bent from the linking portion and exposed in the port. The mating portions of the contacts in a same port are located in different heights, and at least one of the mating potions is inclined, so as to provide an inclined force to an inserted mating connector thereby reducing a pressing force to the inserted plug during engaging. |
| US09484653B1 |
Power socket terminal
A power socket terminal is provided, comprising a base plate, a pair of asymmetric elastic arms and a receiving space defined by the base plate and the pair of the elastic arm. First contact portions of the pair of the elastic arms are located at the same level, and second contact portions thereof are staggered in a vertical direction. Some second contact portions are higher than the first contact portions, and other second contact portions are lower than the first contact portions. Using this design, when the plug is inserted into and mated with the power socket terminal of the present invention, the plug will be subjected to balance forces and be kept in a correct insertion state for forming a normal power circuit. Therefore, the power socket terminal of the present invention has the characteristics of high security, good electric property and reliable connection. |
| US09484651B2 |
Pane having an electrical connection element
A pane having a connection element, having; a substrate having an electrically conductive structure on at least a subregion of the substrate, the electrical connection element on at least a subregion of the electrically conductive structure, and a lead-free soldering compound which connects the electrical connection element to the electrically conductive structure in at least a subregion, wherein the lead-free soldering compound contains 58 to 62% by weight indium, 35 to 38% by weight tin, 1 to 3.5% by weight silver and 0.5 to 2% by weight copper. |
| US09484650B2 |
Self-adjusting coaxial contact
A self-adjusting mated pair connector having a conductive flexible wire and a retaining ring to facilitate electrical connections through the mated pair connector. A receptacle assembly rigidly and electrically connects a portion of the receptacle assembly to a receptacle PCB. A plug assembly rigidly and electrically connects a portion of the plug assembly to a plug PCB. During mating of the receptacle assembly and the plug assembly, the flexible wire and retaining ring allow for floating or movement of a portion of the receptacle assembly and/or plug assembly without stressing or damaging the rigid electrical connections with the receptacle PCB and the plug PCB or the connector interfaces. Electrical conductivity can be maintained without needing to angle the entire receptacle assembly and/or plug assembly during misalignment in the mating process. Impedance matching and low inductance of the mated pair connector may allow for desired electrical performance. |
| US09484644B2 |
Terminal structure
Provided are a male terminal main body (15) of a male terminal (11), an uneven portion (17) formed, on an outer peripheral surface of the male terminal main body (15), of a plurality of ridges (19) and a plurality of grooves (21), a tubular female terminal main body (23) of the female terminal (13), and a spring contact (37) housed in the female terminal main body (23) in such a manner that a plurality of leaf spring pieces (39) provided corresponding to the ridges (19) are moved from positions facing the grooves (21) to positions facing the ridges (19) by a relative movement of the male terminal main body (15) and are in elastic contact with the ridges (19). |
| US09484642B2 |
Terminal, a wire connecting structure and a method of manufacturing the terminal
A terminal includes a connector portion, a tubular crimp portion that crimps/joins with a wire, and a transition portion joining the two portions. The tubular crimp portion is composed of a metal member including a base material of copper or copper alloy with 0.20-1.40 mm thickness and a coating layer of tin, tin alloy, nickel, nickel alloy, silver or silver alloy with 0.2-3.0 μm thickness formed on the base material. The tubular crimp portion has a weld portion formed by butt-welding and having, in its cross-section perpendicular to a terminal longitudinal direction, a phase existing therein of tin, tin alloy, nickel, nickel alloy, silver or silver alloy greater than 0.01 μm2. The tubular crimp portion is a closed tubular body with one end opposite to a wire-insertion-opening being closed. |
| US09484639B1 |
Openable wire-mounting connector
An openable wire-mounting connector includes a body. A bottom of the body forms a welding face. A front of the body forms a wire entrance. Two sides of a rear of the body bend oppositely to form elastic clips which allow an insertion of a conducting wire and hold the wire in place. A top edge of each elastic clip forms a funnel-shaped mouth which opens upwards. A top end of the rear of the base bends firstly to form a curved limiting part and then bends upwards to form an elastic button. The curved limiting part presses down on the conducting wire to prevent the wire from escaping. The elastic button is located above the funnel-shaped mouth. The elastic clips can be opened by pressing the elastic button which activates the funnel-shaped mouth. |
| US09484633B2 |
Loop antenna having a parasitically coupled element
An antenna, a portable electronic device incorporating an antenna and a method of operation are provided to enable both wide and multiple frequency band response. The antenna may include a feeding arm and a parasitic element. The feeding arm may include a conductive loop antenna and a conductive excitation arm portion. The loop antenna portion may extend from a first end that is configured to be grounded to a second end that is configured to be driven by radio frequency circuitry. The excitation arm may be coupled at a first end to the loop antenna portion and extend outwardly therefrom to an open end. The parasitic element may extend from a first end is configured to be grounded to a second end that is open. The parasitic element may extend along opposite sides of the excitation arm portion so as to be coupled thereto. |
| US09484629B2 |
Multi-use antenna
Multi-use antenna techniques are described. In one or more implementations, a device includes a single fixed radiating structure, a first branch coupled to the single fixed radiating structure to tune to a first frequency range to support a first wireless signal technique, and a second branch coupled to the single fixed radiating structure to tune to a second frequency range to support a second wireless signal technique, the second frequency range being different than the first frequency range. |
| US09484628B2 |
Multiband frequency antenna
Disclosed is an antenna capable of operating at more than one frequency band. The antenna comprises a first main helix antenna element and a second parasitic helix antenna element electromagnetically coupled to integrate a single radiofrequency connection structure operating in dual frequency bands. Furthermore, the antenna is configured to structurally combine a plurality of helix antenna elements to operate at multiple frequency bands having only one radiofrequency connector. |
| US09484610B2 |
Processes for forming waveguides using LTCC substrates
Processes for forming waveguides (200) using multiple co-planar layers of LTCC substrates (212, 212a, 212b) are described. Registration holes (222) on the substrates help align layering of the substrates. Arrays of circuit patterns are printed on each substrate, with each circuit being made up of conductor pattern (213) and/or via holes (224). Cavity alignment holes (226) formed around a periphery of each circuit allow alignment marks to be printed on the substrates for vision inspection. Similarly, circuit orientation holes (227) associated with each circuit allow orientation marks to be printed on the substrates to identify orientation of circuits in each finally formed waveguide. Substrate orientation holes (225) allow marks to be printed on one side of each substrate for alignment during screen printing. These in-process vision inspections and quality assurance tests allow product quality and process yields to improve. |
| US09484607B2 |
Battery module
A battery module includes a first battery cell, a first barrier, and a second barrier, the first battery cell being between the first barrier and the second barrier, wherein a first opening is in flow communication with a first space defined between a first side of the first battery cell and a first side portion formed by at least one of the first and second barriers, the first space being in flow communication with a second space defined between a second side of the first battery cell and a second side portion formed by at least one of the first and second barriers. |
| US09484604B2 |
Battery module system
A battery module system includes at least one cell and a battery module processor. The battery module processor may be configured to receive at least one cell signal associated with the at least one cell, wherein the at least one cell signal includes at least one of a temperature signal, a voltage signal, or a current signal. The battery module processor may be also configured to determine a status of the at least one cell based on the at least one cell signal. The battery module system may be configured to removably connect to a master/module interface, and to deliver power from the at least one cell to the master/module interface. The battery module system may be also configured to communicate, from the battery module processor, the status of the at least one cell to the master/module interface. |
| US09484602B1 |
Light tower having a battery housing
Conventional internal combustion engine technology has been around for decades and historically has been the primary power source for virtually all industrial equipment. It relies on carbon-based fuels, is loud, polluting, and the machines it powers are expensive to operate and maintain. A self-contained, rechargeable battery system is provided that possesses superior power than comparable diesel and gas engines. The rechargeable battery power system generates zero emissions, is virtually maintenance free, is quiet, and recharges overnight via a standard electrical outlet. The rechargeable battery power system can be installed in new and used construction equipment (light towers, excavators, generators) and may be used wherever a source of power is required, for example, in vans and boats, and in supplemental power systems including smart grid applications. It can be safely used indoors, in neighborhoods and other locations sensitive to the side effects of internal combustion engines. |
| US09484590B2 |
Fuel cell header wedge
A fuel cell system may include a fuel cell stack having a header and active area in fluid communication with the header. The fuel cell system may also include a wedge disposed within the header and configured to alter the cross-sectional area of the header along the length of the stack such that, during operation of the stack, a flow velocity of gas through the active area is generally constant. |
| US09484586B2 |
Driving control method and system of fuel cell system
A driving control method and system of a fuel cell system are provided. The method includes monitoring an exterior temperature. In addition, the method includes increasing hydrogen pressure at an anode side of a fuel cell stack when the exterior temperature is less than a preset exterior temperature during the monitoring. |
| US09484585B2 |
Non-aqueous organic electrolytic solution for lithium primary battery, and lithium primary battery
There is provided non-aqueous organic electrolytic solution for a lithium primary battery which can be stored for long period at elevated temperatures or at the end stage of discharge. Non-aqueous organic electrolytic solution 20 for lithium primary battery 1 having a cathode active material which is manganese dioxide and an anode active material which is either of lithium or lithium alloy includes a base electrolytic solution that is composed of organic solvent and supporting electrolyte and to which either one of hydroxyphthalimide or hydroxyphthalimide derivative is added as an additive. An amount of the additive which is added to the base electrolytic solution is 0.1 wt % or more and 5.0 wt % or less. It is more preferable that the amount of the additive which is added to the base electrolytic solution is 0.1 wt % or more and 1.0 wt % or less. |
| US09484580B2 |
Platinum monolayer for fuel cell
An example fuel cell electrode forming method includes covering at least a portion of a copper monolayer with a liquid platinum and replacing the copper monolayer to form a platinum monolayer from the liquid platinum. |
| US09484578B2 |
Method for the synthesis of metal cyanometallates
Methods are presented for synthesizing metal cyanometallate (MCM). A first method provides a first solution of AXM2Y(CN)Z, to which a second solution including M1 is dropwise added. As a result, a precipitate is formed of ANM1PM2Q(CN)R.FH2O, where N is in the range of 1 to 4. A second method for synthesizing MCM provides a first solution of M2C(CN)B, which is dropwise added to a second solution including M1. As a result, a precipitate is formed of M1[M2S(CN)G]1/T. DH2O, where S/T is greater than or equal to 0.8. Low vacancy MCM materials are also presented. |
| US09484574B2 |
Hydrothermal process for the production of LiFePO4 powder
The present invention relates to a process for the production of LiFePO4 powder, comprising the steps: a) providing an aqueous solution of an organic surfactant; b) providing an aqueous solution of an iron (II) salt and mixing said aqueous iron (II) salt solution with an aqueous solution of a phosphate, to provide a mixed iron (II) salt/phosphate solution having a stoichiometric ratio of Fe2+:phosphate of about 1:1; c) adding the mixed iron (II) salt/phosphate solution to the surfactant solution under constant stirring; d) providing an aqueous solution comprising a lithium salt, adding said aqueous solution comprising a lithium salt to said mixed iron (II) salt/phosphate solution to provide a mixture having a stoichiometric ratio of Fe2+:phosphate:lithium salt of about 1:1:3 and stirring the resulting mixture; e) heating the resulting mixture at 80-200° C.; f) washing the resulting precipitate to remove excess surfactant, filtering and drying the precipitate; and g) heat treating the dried precipitate in an inert atmosphere by firing at 550-850° C. for at least 2 hours, wherein a co-solvent is added during or after any one of steps (a) to (d). |
| US09484572B2 |
Electrode active material for all solid state secondary battery and all solid state secondary battery
An electrode active material for an all solid state secondary battery, which is able to have the controlled orientation of a crystal face at the interface between an electrode layer and an electrolyte layer in order to enhance the battery performance, and an all solid state secondary battery including the electrode active material. The electrode active material includes a carbon material having an intensity ratio (P002/P100) of 600 or less between the X-ray diffraction peak intensity P002 in the (002) plane and the X-ray diffraction peak intensity P100 in the (100) plane, which are obtained when a surface of a compact prepared by compression molding of a powder of the carbon material at a pressure of 110 MPa is irradiated with X-ray. The all solid state secondary battery includes a positive electrode, a negative electrode, and a solid electrolyte, and the negative electrode contains the electrode active material. |
| US09484568B2 |
Method of manufacturing layered structure constituting all-solid-state battery, apparatus for manufacturing the same, and all-solid-state battery provided with layered structure
The present invention provides a method of manufacturing and an apparatus for manufacturing a layered structure comprising a solid electrolyte layer, a positive electrode active material layer, and a negative electrode active material layer, which together constitute an all-solid-state battery. The layered structure has concavities and convexities formed on the surface and is manufactured by the method comprising the steps of: forming a green sheet S111, where the green sheet for a solid electrolyte layer 11 is formed; forming concavities and convexities S112, where the green sheet for a solid electrolyte layer 11 and the sheet member 50 that is made from material that is caused to disappear when heated, and that has concavities and convexities, are formed in one piece, and the concavities and convexities are formed on the surface of the green sheet for a solid electrolyte layer 11; heating S113, where the sheet member 50 is caused to disappear by heating the green sheet for a solid electrolyte layer 11 and the sheet member 50 that are formed in one piece, and where the green sheet for a solid electrolyte layer 11 is sintered. |
| US09484563B2 |
Battery pack
A battery pack includes a sealed case and a battery cell accommodated in the sealed case. The sealed case includes a case body, which has an opening, and a lid member, which is fixed to the case body by a plurality of bolts and closes the opening. When distances between adjacent ones of the bolts are compared, the distance between a specific adjacent pair of the bolts is greater than that between any other adjacent pair of the remaining bolts. |
| US09484557B2 |
Organic light-emitting diode (OLED) display and method of manufacturing the same
An organic light-emitting diode (OLED) display and method of manufacturing the same are disclosed. In one aspect, the OLED display includes a substrate which includes non-emission regions and emission regions, a first electrode which is formed on each of the emission regions of the substrate, an organic light-emitting layer which is formed on the first electrode, a second electrode which is formed on the organic light-emitting layer and the substrate and a passivation layer which is formed on the second electrode. The passivation layer includes a first passivation layer which substantially overlaps the organic light-emitting layer and a second passivation layer which does not overlap the organic light-emitting layer, wherein the refractive index of the first passivation layer is higher than the refractive index of the second passivation layer. |
| US09484556B2 |
Method of repairing organic light-emitting display apparatus
A method of repairing an organic light-emitting display apparatus, the organic light-emitting display apparatus including a substrate, an organic light-emitting device formed on the substrate, a thin film transistor (TFT) formed on the substrate, an organic insulating layer formed on the TFT, and a conductive pattern formed on the organic insulating layer, the conductive pattern including a shorted part between two conductive elements in the conductive pattern, the method including: removing the short by using a focused ion beam (FIB). |
| US09484553B2 |
Organic light-emitting diode device and manufacturing method thereof
The embodiment of the present invention relates to an organic light-emitting diode (OLED) device, which comprises a pixel define layer (PDL) and a light-emitting structure. Metal nanoparticles are doped in the PDL. The OLED device improves the luminous efficiency. The embodiment of the present invention further provides a method for manufacturing the OLED device. |
| US09484552B2 |
Manufacturing method of flexible device substrate
A flexible device substrate includes a flexible substrate, a device layer, and a waterproof layer. The flexible substrate has a top surface and a bottom surface disposed opposite to each other. The device layer is disposed on the top surface of the flexible substrate. The waterproof layer is disposed on the bottom surface of the flexible substrate. |
| US09484547B2 |
Organic light-emitting diode (OLED) display and method of manufacturing the same
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a lower substrate including a display area and a non-display area surrounding the display area, wherein a plurality of pixels are formed in the display area. The OLED display also includes an embedded circuit formed in the configured to apply a plurality of signals to the pixels, and an initialization wiring formed in the non-display area and configured to apply an initialization voltage to each of the pixels. The initialization circuit is formed in a layer so as to at least partially overlap with the area of the embedded circuit. |
| US09484543B2 |
Fabrication of anchored carbon nanotube array devices for integrated light collection and energy conversion
A method of fabricating optical energy collection and conversion devices using carbon nanotubes (CNTs), and a method of anchoring CNT's into thin polymeric layers is disclosed. The basic method comprises an initial act of surrounding a plurality of substantially aligned nanostructures within at least one fluid layer of substantially uniform thickness such that a first end of the plurality of nanostructures protrudes from the fluid layer. Next, the fluid layer is altered to form an anchoring layer, thereby fastening the nanostructures within the primary anchoring layer with the first ends of the nanostructures protruding from a first surface of the primary anchoring layer. Finally, a portion of the anchoring layer is selectively removed such that a second end of the nanostructures is exposed and protrudes from the anchoring layer. The resulting product is an optically absorbent composite material having aligned nanostructures protruding from both sides of an anchoring layer. |
| US09484540B2 |
Oxygen-containing fused ring derivative and organic electroluminescence device comprising the same
An oxygen-containing fused ring derivative represented by the following formula (1) wherein Ar1 is an m-valent fused ring group in which four or more rings including one or more rings selected from a furan ring and a pyran ring are fused and HAr is any of the nitrogen-containing heterocyclic group represented by the following formulas (2) to (5): |
| US09484539B2 |
Polycyclic compound and organic electronic device comprising the same
An exemplary embodiment of the present application provides a new compound and an organic electronic device using the same. The organic electronic device according to an exemplary embodiment of the present application shows excellent characteristics in terms of efficiency, driving voltage, and service life. |
| US09484538B2 |
Manufacturing method of organic semiconductor film, organic semiconductor film, thin film transistor, active matrix device, electro-optical device, and electronic device
A manufacturing method of an organic semiconductor film according to the invention includes applying a liquid composition in which an organic semiconductor material is dissolved or dispersed in a first solvent onto a base material in a predetermined pattern, applying a second solvent in which solubility of the organic semiconductor material is lower than that in the first solvent onto a region of the base material having the liquid composition applied thereto, and removing the second solvent. |
| US09484536B2 |
Memory cells, memory arrays, and methods of forming memory cells and arrays
Some embodiments include methods of forming memory cells. Heater structures are formed over an array of electrical nodes, and phase change material is formed across the heater structures. The phase change material is patterned into a plurality of confined structures, with the confined structures being in one-to-one correspondence with the heater structures and being spaced from one another by one or more insulative materials that entirely laterally surround each of the confined structures. Some embodiments include memory arrays having heater structures over an array of electrical nodes. Confined phase change material structures are over the heater structures and in one-to-one correspondence with the heater structures. The confined phase change material structures are spaced from one another by one or more insulative materials that entirely laterally surround each of the confined phase change material structures. |
| US09484530B2 |
Integrated circuit structures with spin torque transfer magnetic random access memory having increased memory cell density and methods for fabricating the same
STT-MRAM integrated circuit and method for fabricating the same are disclosed. An integrated circuit includes a word line layer, a bit line layer, and an MRAM stack in contact with the bit line metal layer. The integrated circuit further includes a first doped silicon layer in contact with the MRAM stack, the first doped silicon layer including conductivity-determining ions of a first type, and a second doped silicon layer in contact with the first doped silicon layer and further in contact with the word line layer, the second doped silicon layer including conductivity-determining ions of a second type that is opposite the first type. Still further, the integrated circuit includes a third doped silicon layer in contact with the second doped silicon layer and a source line layer in electrical contact with the third doped silicon layer. |
| US09484529B2 |
Magnetic memory device
A magnetic memory device is provided. The magnetic memory device includes a first vertical magnetic layer and a second vertical magnetic layer on a substrate, a tunnel barrier layer between the first vertical magnetic layer and the second vertical magnetic layer, and an exchange-coupling layer between a first sub-layer of the first vertical magnetic layer and a second sub-layer of the first vertical magnetic layer. |
| US09484527B2 |
Nanometer magnetic multilayer film for temperature sensor and manufacturing method therefor
A magnetic multilayer film for a temperature sensor is disclosed. The magnetic multilayer film comprises: a bottom magnetic composite layer provided on a substrate, the bottom magnetic composite layer having a direct pinning structure, an indirect pinning structure, a synthetic ferromagnetic structure, or a synthetic anti-ferromagnetic structure; a spacer layer provided on the bottom magnetic composite layer; and a top magnetic composite layer provided on the spacer layer, the top magnetic composite layer having the direct pinning structure, the indirect pinning structure, the synthetic ferromagnetic structure, or the synthetic anti-ferromagnetic structure, wherein a ferromagnetic layer of the bottom magnetic composite layer closest to the spacer layer has a magnetic moment anti-parallel with that of a ferromagnetic layer of the top magnetic composite layer closest to the spacer layer. |
| US09484526B2 |
Magnetic memory device and method for forming the same
Provided are a magnetic memory device and a method of forming the same. The magnetic memory device includes a magnetic tunnel junction pattern located on a substrate and including magnetic patterns and a tunnel barrier pattern located between the magnetic patterns, and a first crystallinity conserving pattern located on the magnetic tunnel junction pattern and having a higher crystallization temperature than the magnetic patterns. The first crystallinity conserving pattern is amorphous. |
| US09484525B2 |
Hall effect device
Embodiments of the present invention provide a Hall effect device that includes a Hall effect region of a first semiconductive type, at least three contacts and a lateral conductive structure. The Hall effect region is formed in or on top of a substrate, wherein the substrate includes an isolation arrangement to isolate the Hall effect region in a lateral direction and in a depth direction from the substrate or other electronic devices in the substrate. The at least three contacts are arranged at a top of the Hall effect region to supply the Hall effect device with electric energy and to provide a Hall effect signal indicative of the magnetic field, wherein the Hall effect signal is generated in a portion of the Hall effect region defined by the at least three contacts. The lateral conductive structure is located between the Hall effect region and the isolation arrangement. |
| US09484521B2 |
Vibration generating apparatus
There is provided a vibration generating apparatus including: a bracket having a circular plate shape; a vibration member having a lower edge portion of a central portion fixed to the bracket and having a closed curved line shape; a piezoelectric element fixed to a lower surface of the vibration member among inner surfaces of the vibration member and deformed when power is applied thereto; and a mass body fixed to the inner surfaces of the vibration member and disposed to face the piezoelectric element. |
| US09484519B2 |
Piezoelectric/electrostrictive element
A piezoelectric/electrostrictive element has a piezoelectric body, a first electrode, a second electrode and a glass layer. The piezoelectric body is formed in a thin film-shape. The piezoelectric body has a first main surface and a second main surface. The first electrode is disposed on the first main surface of the piezoelectric body. The first electrode has an electrode side surface configured to be connected with the first main surface. The second electrode is disposed on the second main surface of the piezoelectric body. The glass layer is continuously formed on the first main surface and the electrode side surface. The glass layer containing glass as a principal constituent. The glass layer is isolated from the side surface of the piezoelectric body. |
| US09484504B2 |
Micro LED with wavelength conversion layer
A light emitting device and method of manufacture are described. In an embodiment, the light emitting device includes a micro LED device bonded to a bottom electrode, a top electrode in electrical contact with the micro LED device, and a wavelength conversion layer around the micro LED device. The wavelength conversion layer includes phosphor particles. Exemplary phosphor particles include quantum dots that exhibit luminescence due to their size, or particles that exhibit luminescence due to their composition. |
| US09484503B2 |
Light emitting device
A light emitting device includes a first lead, a second lead, an insulating member, a diffusing agent-containing portion, a wavelength conversion portion and a lens portion. The insulating member is configured to fix the first lead and the second lead. A thickness of the insulating member is equal to the thickness of the first and second leads. A groove or a recessed portion is provided to retain the wavelength conversion portion in a specific region formed in the first lead. A second groove portion or recessed portion is formed in a first lead inner side of the groove portion or the recessed portion, which is filled with the diffusing agent-containing portion. |
| US09484498B2 |
Light emitting structure having electrodes forming a concave surface and manufacturing method thereof
A light-emitting structure comprises a semiconductor light-emitting element which includes a first connection point and a second connection point. The light-emitting structure further includes a first electrode electrically connected to the first connection point, and a second electrode electrically connected the second connection point. The first electrode and the second electrode can form a concave on which the semiconductor light-emitting element is located. |
| US09484494B2 |
Semiconductor light emitting device having a plurality of semiconductor layers having P-type dopant
Provided are a semiconductor light emitting device. The semiconductor light emitting device comprises a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; an active layer disposed between the first semiconductor layer and the second semiconductor layer; a third semiconductor layer disposed on the second semiconductor layer; and a fourth semiconductor layer disposed on the third semiconductor layer. The second semiconductor layer is formed of an InAlGaN semiconductor layer, the third semiconductor layer is formed of an AlGaN semiconductor layer, and the fourth semiconductor layer is formed of a GaN semiconductor layer. |
| US09484487B2 |
Method for fabricating thin photovoltaic cells
A method for fabricating thin crystalline photovoltaic cells is disclosed. In one aspect, the method includes: forming a weakening layer in a surface portion of a semiconductor substrate; epitaxially growing a stack of semiconductor layers on the substrate for forming an active layer of the photovoltaic cell, the stack having a first thermal coefficient of expansion; providing on the stack patterned contact layer for forming electrical contacts of the photovoltaic cell, the patterned contact layer having a second thermal coefficient of expansion different from the first thermal coefficient of expansion. The process of providing a patterned contact layer simultaneously induces a tensile stress in the weakening layer, resulting in a lift-off from the substrate of a structure including the stack of semiconductor layers and the patterned contact layer. |
| US09484484B2 |
Shingled solar cell module
A high efficiency configuration for a solar cell module comprises solar cells arranged in a shingled manner to form super cells, which may be arranged to efficiently use the area of the solar module, reduce series resistance, and increase module efficiency. |
| US09484483B2 |
Device and method for restoring silicon-based solar cells using an ultrasound transducer
The restoration device of least one silicon-based photovoltaic solar cell includes a support of the cell, a heat source configured to heat the photovoltaic solar cell, and unit for generating charge carriers in the cell. To better accelerate the restoration kinetics of the solar cell, the device includes an ultrasonic transducer designed to generate ultrasonic waves propagating in the photovoltaic solar cell. |
| US09484482B2 |
Efficient optical (light) coupling
A light coupling structure is provided that includes a diffractive grating coupler, a total internal reflection (TIR) mirror, and a polymer waveguide. The TIR mirror is formed within the polymer waveguide to direct light signals between the diffractive grating coupler and the polymer waveguide. |
| US09484480B2 |
High performance, high bandgap, lattice-mismatched, GaInP solar cells
High performance, high bandgap, lattice-mismatched, photovoltaic cells (10), both transparent and non-transparent to sub-bandgap light, are provided as devices for use alone or in combination with other cells in split spectrum apparatus or other applications. |
| US09484474B1 |
Ultrananocrystalline diamond contacts for electronic devices
A method of forming electrical contacts on a diamond substrate comprises producing a plasma ball using a microwave plasma source in the presence of a mixture of gases. The mixture of gases include a source of a p-type or an n-type dopant. The plasma ball is disposed at a first distance from the diamond substrate. The diamond substrate is maintained at a first temperature. The plasma ball is maintained at the first distance from the diamond substrate for a first time, and a UNCD film, which is doped with at least one of a p-type dopant and an n-type dopant, is disposed on the diamond substrate. The doped UNCD film is patterned to define UNCD electrical contacts on the diamond substrate. |
| US09484463B2 |
Fabrication process for mitigating external resistance of a multigate device
A method for fabricating a multigate device includes forming a fin on a substrate of the multigate device, the fin being formed of a semiconductor material, growing a first conformal epitaxial layer directly on the fin and substrate, wherein the first conformal epitaxial layer is highly doped, growing a second conformal epitaxial layer directly on the first conformal epitaxial layer, wherein the second conformal epitaxial layer is highly doped, selectively removing a portion of second epitaxial layer to expose a portion of the first conformal epitaxial layer, selectively removing a portion of the first conformal epitaxial layer to expose a portion of the fin and thereby form a trench, and forming a gate within the trench. |
| US09484460B2 |
Semiconductor device having gate dielectric surrounding at least some of channel region and gate electrode surrounding at least some of gate dielectric
A semiconductor device includes a first type region including a first conductivity type and a second type region including a second conductivity type. The semiconductor device includes a channel region extending between the first type region and the second type region. The semiconductor device includes a gate electrode surrounding at least some of the channel region. A first gate edge of the gate electrode is separated a first distance from a first type region edge of the first type region and a second gate edge of the gate electrode is separated a second distance from a second type region edge of the second type region. The first distance is less than the second distance. |
| US09484448B2 |
Semiconductor gas sensor and method for producing the same
A technique capable of realizing a semiconductor gas sensor having a high rising response speed is provided. A gate insulating film (e.g., a SiO2 film) is formed on a Si layer, and a modified TiOx (a TiOx nanocrystal) film is formed on the gate insulating film. Further, on the modified TiOx film, a Pt film is formed. This Pt film is composed of a plurality of Pt crystal grains, and in a crystal grain boundary gap existing among the plurality of Pt crystal grains, Ti and oxygen (O) are present, and particularly, a TiOx nanocrystal is formed on a surface in the vicinity of a grain boundary triple point as the center. |
| US09484446B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes: a nitride semiconductor layer; a first silicon nitride film that is formed on the nitride semiconductor layer, has a first opening whose inner wall is a forward tapered shape; a second silicon nitride film that is formed on the first silicon nitride film, and has a second opening whose inner wall is an inverse tapered shape; and a gate electrode formed so as to cover the whole surface of the nitride semiconductor layer exposed on the inside of the first opening; wherein a side wall of the gate electrode separates from the first silicon nitride film and the second silicon nitride film via a cavity. |
| US09484444B2 |
Semiconductor device with a resistance element in a trench
A semiconductor device has a semiconductor substrate, an insulating film, a semiconductor element and a resistance element. The semiconductor substrate has a first trench. The insulating film covers an inner surface of the first trench. The semiconductor element has an electrode. The resistance element is electrically connected to the electrode to form a resistance to a current flowing through the electrode, and is arranged in the first trench with the insulating film therebetween. Thereby, the semiconductor device can have a resistance element that has a small footprint and can pass a large current with high reliability. |
| US09484443B2 |
Semiconductor device
A semiconductor device includes a semiconductor layer opposing to a bottom surface and a side surface of a gate electrode. An insulation film is provided between the bottom surface of the gate electrode and the semiconductor layer and between the side surface of the gate electrode and the semiconductor layer. A first conduction-type drain layer is provided in the semiconductor layer on a side of an end part of one of the bottom surface and the side surface of the gate electrode. A second conduction-type source layer is provided in the semiconductor layer opposing to the other one of the bottom surface and the side surface of the gate electrode. A second conduction-type extension layer is provided in the semiconductor layer opposing to a corner part between the side surface and the bottom surface of the gate electrode and has a lower impurity concentration than that of the source layer. |
| US09484441B2 |
Method for fabricating transistor having hard-mask layer
A method for fabricating a transistor including the following steps is provided. First, a gate electrode is formed on a substrate, and a gate insulating layer is formed on the substrate in sequence, wherein the gate insulating layer covers the substrate and the gate electrode. Next, a patterned channel layer and a hard-mask layer are formed on the gate insulating layer, wherein the patterned channel layer and the hard-mask layer are located above the gate electrode, and the hard-mask layer is disposed on the patterned channel layer. Afterwards, a source and a drain are formed on the gate insulating layer by a wet etchant. The part of the hard-mask layer that is not covered by the source and the drain is removed by the wet etchant until the patterned channel layer is exposed, so as to form a plurality of patterned hard-mask layers. |
| US09484439B1 |
III-V fin on insulator
A method of forming a semiconductor structure in which a III-V compound semiconductor channel fin portion is formed on a dielectric material is provided. The method includes forming a III-V material stack on a surface of a bulk semiconductor substrate. Patterning of the III-V material stack is then employed to provide a pre-fin structure that is located between, and in contact with, pre-pad structures. The pre-pad structures are used as an anchoring agent when a III-V compound semiconductor channel layer portion of the III-V material stack and of the pre-fin structure is suspended by removing a topmost III-V compound semiconductor buffer layer portion of the material stack from the pre-fin structure. A dielectric material is then formed within the gap provided by the suspending step and thereafter a fin cut process is employed. |
| US09484435B2 |
MOS transistor with varying channel width
One embodiment of the invention relates to a semiconductor device formed over a semiconductor body. In this device, source and drain regions are formed in the body about lateral edges of a gate electrode and are separated from one another by a gate length. A channel region, which is configured to allow charged carriers to selectively flow between the source and drain regions during operation of the device, has differing widths under the gate electrode. These widths are generally perpendicular to the gate length. Other devices, methods, and systems are also disclosed. |
| US09484429B2 |
High electron mobility transistor (HEMT) capable of absorbing a stored hole more efficiently and method for manufacturing the same
A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first electrode, a second electrode, a control electrode, and a third electrode. The second semiconductor layer is provided on the first semiconductor layer and has a band gap narrower than that of the first semiconductor layer. The second semiconductor layer includes a first portion and a second portion which is provided together with the first portion and contains an activated acceptor. The third semiconductor layer is provided on the first portion and has a band gap wider than or equal to the band gap of the second semiconductor layer. The first and the second electrodes are provided on the third semiconductor layer. The control electrode is provided between the first electrode and the second electrode. The third electrode is provided on the second portion. |
| US09484425B2 |
Biased reactive refractory metal nitride capped contact of group III-V semiconductor device
According to one disclosed embodiment, an electrical contact for use on a semiconductor device comprises an electrode stack including a plurality of metal layers and a capping layer formed over the plurality of metal layers. The capping layer comprises a refractory metal nitride. In one embodiment, a method for fabricating an electrical contact for use on a semiconductor device comprises forming an electrode stack including a plurality of metal layers over the semiconductor device, and depositing a refractory metal nitride capping layer of the electrode stack over the plurality of metal layers. The method may further comprise annealing the electrode stack at a temperature of less than approximately 875° C. In some embodiments, the method may additionally include forming one of a Schottky metal layer and a gate insulator layer between the electrode stack and the semiconductor device. |
| US09484414B2 |
Semiconductor device
A MOSFET includes a silicon carbide substrate including a main surface having an off angle with respect to a {0001} plane and a source electrode formed in contact with the main surface. A base surface is exposed at at least a part of a contact interface of the silicon carbide substrate with the source electrode. With such a construction, the MOSFET achieves suppressed variation in threshold voltage. |
| US09484413B2 |
Methods of forming buried junction devices in silicon carbide using ion implant channeling and silicon carbide devices including buried junctions
A semiconductor device structure according to some embodiments includes a silicon carbide substrate having a first conductivity type, a silicon carbide drift layer having the first conductivity type on the silicon carbide substrate and having an upper surface opposite the silicon carbide substrate, and a buried junction structure in the silicon carbide drift layer. The buried junction structure has a second conductivity type opposite the first conductivity type and has a junction depth that is greater than about one micron. |
| US09484412B1 |
Strained silicon—germanium integrated circuit with inversion capacitance enhancement and method to fabricate same
A structure includes a substrate; a plurality of pFET fins disposed over the substrate; and a plurality of nFET fins disposed over the substrate. In the structure each of the plurality of pFET fins is composed of s-Si1-xGex, where x has a value in a range of about 0.4-0.6; each of the plurality of nFET fins is composed of one of s-Si or a Group III-V material; and each of the plurality of pFET fins and the plurality of nFET fins includes a thin (e.g., <1 nm) multilayer structure containing a plurality s-Ge monolayers disposed on a surface thereof, a gate dielectric disposed over the multilayer structure, and a gate conductor disposed over the gate dielectric. The presence of the multilayer structure containing the plurality s-Ge monolayers enhances Tinv scaling by effectively increasing a Ge percentage of the s-Si1-xGex pFETs. Methods to fabricate the structure are also disclosed. |
| US09484409B2 |
Semiconductor devices including channel dopant layer
A semiconductor device includes a semiconductor substrate including a well dopant layer having a first conductivity type, a gate electrode on the well dopant layer, a channel dopant layer in the well dopant layer and spaced apart from a top surface of the semiconductor substrate, a channel region between the gate electrode and the channel dopant layer, and source/drain regions in the well dopant layer at both sides of the gate electrode. The channel dopant layer and the channel region have the first conductivity type. The source/drain regions have a second conductivity type. A concentration of dopants having the first conductivity type in the channel dopant layer is higher than a concentration of dopants having the first conductivity type in the channel region. The semiconductor device may be used in a sense amplifier of a memory device. |
| US09484404B2 |
Electronic device of vertical MOS type with termination trenches having variable depth
An electronic device is integrated on a chip of semiconductor material having a main surface and a substrate region with a first type of conductivity. The electronic device has a vertical MOS transistor, formed in an active area having a body region with a second conductivity type. A set of one or more cells each one having a source region of the first conductivity, a gate region of electrically conductive material in a gate trench extending from the main surface in the body region and in the substrate region, and an insulating gate layer, and a termination structure with a plurality of termination rings surrounding at least part of the active area on the main surface, each termination ring having a floating element of electrically insulating material in the termination trench extending from the main surface in the chip and at least one bottom region of said semiconductor material of the second conductivity type extending from at least one deepest portion of a surface of the termination trench in the chip; the termination trenches have a depth from the main surface decreasing moving away from the active area. |
| US09484402B2 |
Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion
A method is disclosed for forming a semiconductor device. A first opening is formed for an STI on a semiconductor substrate and a first process is performed to deposit first oxide into the first opening. A second opening is formed to remove a portion of the first oxide from the first opening and second process(es) is/are performed to deposit second oxide into the second opening and over a remaining portion of the first oxide. A portion of the semiconductor device is formed over a portion of a surface of the second oxide. A semiconductor device includes an STI including a first oxide formed in a lower portion of a trench of the STI and a second oxide formed in an upper portion of the trench and above the first oxide. The semiconductor device includes a portion of the semiconductor device formed over a portion of the second oxide. |
| US09484400B2 |
Method of forming a super junction semiconductor device having stripe-shaped regions of the opposite conductivity types
A super junction semiconductor device is formed by forming at least a portion of a drift layer on a doped layer of a first conductivity type, implanting first dopants of a first conductivity type and second dopants of a second conductivity type into the drift layer using one or more implant masks with openings to form stripe-shaped first implant regions of the first conductivity type and stripe-shaped second implant regions of the second conductivity type in alternating order, and performing a heat treatment for controlling a diffusion of dopants from the implant regions to form stripe-shaped first regions of the first conductivity type and stripe-shaped second regions of the second conductivity type. |
| US09484399B2 |
Charge compensation device and manufacturing therefor
A charge-compensation semiconductor device includes a semiconductor body having a first surface, a lateral edge delimiting the semiconductor body in a horizontal direction substantially parallel to the first surface, an active area, and a peripheral area arranged between the active area and the lateral edge. A source metallization is arranged on the first surface. A drain metallization is arranged opposite to the source metallization. The semiconductor body further includes a drift region in Ohmic contact with the drain metallization, and a plurality of compensation regions forming respective pn-junctions with the drift region, which are arranged in the active area and in the peripheral area, and are in Ohmic contact with the source metallization via respective body regions arranged in the active area and having a higher doping concentration than the compensation regions. In a horizontal cross-section substantially parallel to the first surface the compensation regions are at least in a respective portion shaped as a strip oriented in a direction which is tilted with respect to the lateral edge by a tilt angle. |
| US09484397B2 |
Component-embedded substrate
A component-embedded substrate having a multilayer substrate formed by laminating a plurality of thermoplastic sheets in a predetermined direction, an internal component provided in the multilayer substrate, and a surface-mount component mounted on a surface of the multilayer substrate using bumps. The surface-mount component, when viewed in a plan view in the predetermined direction, is positioned so as to cross an outline of the internal component, with the bumps on the surface-mount component located 50 μm or more from the outline of the internal component. |
| US09484391B2 |
OLED with chamfered emission layer
An organic light emitting diode display includes a first electrode, a pixel defining layer positioned on the first electrode and including a first opening having a first polygonal shape opening the first electrode, and a first organic emission layer positioned on the pixel defining layer through the first electrode corresponding to the first opening and including a first chamfer adjacent to a corner of the first opening. |
| US09484390B2 |
Method for fabricating semiconductor apparatus
A method for fabricating a semiconductor apparatus includes forming a diffusion barrier film on a semiconductor substrate, forming a first film on a semiconductor substrate including a common source region, forming a second film on the first film, forming a conductive film on the second film, patterning the conductive film and the second film, to form an active pattern, and patterning the first film and the semiconductor substrate using the active pattern as a mask, to form a pillar; and forming a gate electrode on an outer circumference of the pillar. |
| US09484388B2 |
Light-emitting device, method for designing light-emitting device, method for driving light-emitting device, illumination method, and method for manufacturing light-emitting device
A light-emitting device that can implement a natural, vivid, highly visible and comfortable appearance of colors and appearance of objects as if the objects are seen outdoors is provided. The light-emitting device can change the appearance of colors of the illuminated objects so as to satisfy the requirements for various illuminations. Furthermore, the appearance of colors of the light-emitting device which currently exists or is in use, and which includes a semiconductor light-emitting device of which appearance of colors is not very good, is improved. A method for driving the light-emitting device, an illumination method by the device, and a method for manufacturing the light-emitting device are also provided. These features are achieved by the light-emitting device that incorporates light-emitting elements and satisfies predetermined requirements, in which φSSL(λ) emitted from the light-emitting device satisfies a predetermined condition. |
| US09484377B2 |
CMOS image sensor including infrared pixels having improved spectral properties, and method of manufacturing same
The present invention relates to a CMOS image sensor including an infrared pixel with enhanced spectral characteristics in which a stepped portion is formed between color filters of RGB pixels and a filter of an infrared pixel, and a manufacturing method thereof. A stepped portion is formed between color filters and an infrared filter according to respective pixels and the thicknesses of the filters are arbitrarily adjusted regardless of the characteristics of material in the formation of the color filters and the infrared filter, so that crosstalk characteristics are improved. |
| US09484375B2 |
Image sensor with 3D stack structure
Disclosed is an image sensor with a 3D stack structure, in which pixels of a top plate are realized as image pixels and pixels of a bottom plate are realized as pixels for realizing a phase difference AF, so that the phase difference AF is realized without loss of resolution. In the image sensor with a 3D stack structure, a problem of the reduction of resolution, which is a disadvantage of an existing imaging surface phase difference AF device, is solved, so that a fast phase difference AF is realized while maintaining high resolution without a separate phase difference AF module. |
| US09484374B2 |
Image sensor and method for fabricating the same
An image sensor includes a substrate including a pixel array region and a logic region where a surface of the pixel array region is higher than a surface of the logic region, and a light shielding pattern formed over the substrate of the logic region and having a surface on substantially the same plane as a surface of the substrate. |
| US09484372B2 |
Substrate for embedding imaging device and method for manufacturing same, and imaging apparatus
A substrate for embedding an imaging device includes: a core layer; a first multilayered wiring layer that is formed onto the core layer, the core layer and the first multilayered wiring layer having a cavity penetrating therethrough; a second multilayered wiring layer that is formed onto the core layer on a side opposite to the first multilayered wiring layer and that includes a conductive pattern formed at a position facing the cavity; a resin portion that is arranged inside the cavity and includes a bottom surface supported by the second multilayered wiring layer, a side face supported by the core layer, and a curved surface formed on a side opposite to the bottom surface; and an imaging device adhered along the curved surface inside the cavity. |
| US09484370B2 |
Isolated global shutter pixel storage structure
A pixel cell includes a photodiode disposed in a semiconductor material to accumulate image charge in response to incident light directed to the photodiode. A global shutter gate transistor disposed in the semiconductor material and is coupled to the photodiode to selectively deplete the image charge from the photodiode. A storage transistor is disposed in the semiconductor material to store the image charge. An optical isolation structure is disposed in the semiconductor material proximate to the storage transistor to isolate a sidewall of the storage transistor from stray light and stray charge in the semiconductor material outside of the storage transistor. The optical isolation structure is filled with tungsten. |
| US09484369B2 |
Solid-state imaging device, method of manufacturing the same, and imaging apparatus
A solid-state imaging device includes a photoelectric conversion section which is disposed on a semiconductor substrate and which photoelectrically converts incident light into signal charges, a pixel transistor section which is disposed on the semiconductor substrate and which converts signal charges read out from the photoelectric conversion section into a voltage, and an element isolation region which is disposed on the semiconductor substrate and which isolates the photoelectric conversion section from an active region in which the pixel transistor section is disposed. The pixel transistor section includes a plurality of transistors. Among the plurality of transistors, in at least one transistor in which the gate width direction of its gate electrode is oriented toward the photoelectric conversion section, at least a photoelectric conversion section side portion of the gate electrode is disposed within and on the active region with a gate insulating film therebetween. |
| US09484368B2 |
Solid-state imaging device, method for manufacturing solid-state imaging device, method for manufacturing solid-state imaging element, and semiconductor device
A solid-state imaging device includes a semiconductor substrate configured to include a solid-state imaging element that is provided with a photoelectric conversion region, and a scribe line region that is provided along a periphery of the solid-state imaging element, a wiring layer that is formed to be layered on the semiconductor substrate, a support substrate that is formed to be layered on the wiring layer, and a groove that is provided between a blade region in the scribe line region and the solid-state imaging element, in the semiconductor substrate and penetrates through the semiconductor substrate. |
| US09484364B2 |
Array substrate and method for manufacturing the same, display device
An array substrate and a display device are presented. The array substrate includes: a base substrate and a plurality of thin film transistor units located on the base substrate, wherein, the thin film transistor unit includes: a first gate electrode located on the base substrate, a gate insulating layer located on the first gate electrode, a drain electrode disposed in the same layer as the first gate electrode, an active layer located on the drain electrode, a source electrode located on the active layer, a first transparent conductive layer is provided between the base substrate and the first gate electrode and the drain electrode that are disposed in the same layer, and the gate insulating layer is also disposed between the first gate electrode plus the first transparent conductive layer beneath it and the drain electrode plus the first transparent conductive layer beneath it. |
| US09484362B2 |
Display substrate and method of manufacturing a display substrate
A display substrate includes an active pattern, a gate electrode, a first insulation layer and a pixel electrode. The active pattern is disposed on a base substrate. The active pattern includes a metal oxide semiconductor. The gate electrode overlaps the active pattern. The first insulation layer covers the gate electrode and the active pattern, and a contact hole is defined in the first insulation layer. The pixel electrode is electrically connected to the active pattern via the contact hole penetrating the first insulation layer. A first angle defined by a bottom surface of the first insulation layer and a sidewall of the first insulation layer exposed by the contact hole is between about 30° and about 50°. |
| US09484360B2 |
Method for manufacturing oxide thin film transistor (TFT) array substrate
The present disclosure provides a method for manufacturing an oxide thin film transistor (TFT) array substrate. Specifically the step of forming the thin film transistors may include: forming a pattern of an oxide semiconductor layer on the substrate with photoresist is reserved on the channel regions in the pattern of the oxide semiconductor layer; and forming a source-drain metal layer on the pattern of the oxide semiconductor layer, forming patterns that include source electrodes and drain electrodes by an etching process, and removing the photoresist reserved on the channel regions in the pattern of the oxide semiconductor layer. |
| US09484358B2 |
Ultrahigh density vertical NAND memory device and method of making thereof
Monolithic, three dimensional NAND strings include a semiconductor channel, at least one end portion of the semiconductor channel extending substantially perpendicular to a major surface of a substrate, a plurality of control gate electrodes having a strip shape extending substantially parallel to the major surface of the substrate, the blocking dielectric comprising a plurality of blocking dielectric segments, a plurality of discrete charge storage segments, and a tunnel dielectric located between each one of the plurality of the discrete charge storage segments and the semiconductor channel. |
| US09484357B2 |
Selective blocking dielectric formation in a three-dimensional memory structure
A plurality of blocking dielectric portions can be formed between a memory stack structure and an alternating stack of first material layers and second material layers by selective deposition of a dielectric material layer. The plurality of blocking dielectric portions can be formed after removal of the second material layers selective to the first material layers by depositing a dielectric material on surfaces of the memory stack structure while avoiding deposition on surfaces of the first material layers. A deposition inhibitor material layer or a deposition promoter material layer can be optionally employed. Alternatively, the plurality of blocking dielectric portions can be formed on surfaces of the second material layers while avoiding deposition on surfaces of the first material layers after formation of the memory opening and prior to formation of the memory stack structure. The plurality of blocking dielectric portions are vertically spaced annular structures. |
| US09484354B2 |
Semiconductor device including different orientations of memory cell array and peripheral circuit transistors
A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate, and an extension direction of the active region has an acute angle with the <110> direction of the substrate. A transistor serving as a peripheral circuit is on the second region of the substrate. In the memory device, defects or failures due to a crystal defects or a dislocation of the substrate may decrease. |
| US09484352B2 |
Method for forming a split-gate flash memory cell device with a low power logic device
An embedded flash memory device is provided. A gate stack includes a control gate arranged over a floating gate. An erase gate is arranged adjacent to a first side of the gate stack. A word line is arranged adjacent to a second side of the gate stack that is opposite the first side. The word line includes a word line ledge exhibiting a reduced height relative to a top surface of the word line and on an opposite side of the word line as the gate stack. A polysilicon logic gate has a top surface approximately even with the word line ledge. An ILD layer is arranged over the gate stack, the erase gate, the polysilicon logic gate, and the word lines. A contact extends through the ILD layer. A method of manufacturing the embedded flash memory device is also provided. |
| US09484351B2 |
Split gate memory device and method of fabricating the same
The present disclosure relates to a split gate memory device which requires less number of processing steps than traditional baseline processes and methods of making the same. Word gate/select gate (SG) pairs are formed around a sacrificial spacer. The resulting SG structure has a distinguishable non-planar top surface. The spacer layer that covers the select gate also follows the shape of the SG top surface. A dielectric disposed above the inter-gate dielectric layer and arranged between the neighboring sidewalls of the each memory gate and select gate provides isolation between them. |
| US09484349B1 |
Static random access memory
A static random access memory (SRAM) including at least a SRAM cell is provided. A gate layout of the SRAM cell includes first to fourth strip doped regions, a recessed gate line and first and second gate lines. The first to fourth strip doped regions are disposed in the substrate in order and separated from each other. The recessed gate line intersects the first to fourth strip doped regions. The first to fourth strip doped regions are disconnected at intersections with the recessed gate line. The first gate line intersects the first and the second strip doped regions. The first and the second strip doped regions are disconnected at intersections with the first gate line. The second gate line intersects the third the fourth strip doped regions. The third and the fourth strip dopeds region are disconnected at intersections with the second gate line. |
| US09484344B2 |
Semiconductor apparatus
A semiconductor apparatus includes a reservoir capacitor, and the reservoir capacitor includes a plurality of MOS capacitors serially coupled to one another. The plurality of MOS capacitors are arranged in one well. |
| US09484342B2 |
Semiconductor apparatus
A semiconductor apparatus includes a substrate; a nitride semiconductor layer formed on the substrate; a transistor formed on the nitride semiconductor layer, and including a source electrode, a gate electrode, and a drain electrode disposed in this order; and a diode formed on the nitride semiconductor layer, and including an anode electrode and a cathode electrode disposed in this order. The semiconductor apparatus has a transistor/diode pair in which the source electrode, the gate electrode, the drain electrode, the anode electrode, and the cathode electrode are sequentially disposed in this order, and the drain electrode of the transistor and the anode electrode of the diode are connected by a drain/anode common electrode wiring and serve as a common electrode. |
| US09484337B2 |
Circuit protection device
A circuit protection device is provided and includes a first insulation layer, a second insulation layer, a thermal fuse, a diode, a first exterior electrode pad, a second exterior electrode pad, and a third exterior electrode pad. The second insulation layer is positioned above a top surface of the first insulation layer. The thermal fuse is packaged in the first insulation layer and having a first electrode end and a second electrode end positioned opposite to the first electrode end. The diode is packaged in the second insulation layer and having a first electrode surface and a second electrode surface positioned opposite to the first electrode surface. The first exterior electrode pad is positioned on a bottom surface of the first insulation layer and electrically connected to the first electrode surface and the first electrode end. The second exterior electrode pad is positioned on the bottom surface and electrically connected to the second electrode end, while the third exterior electrode pad is positioned on the bottom surface and electrically connected to the second electrode surface. |
| US09484332B2 |
Micro solar cell powered micro LED display
Micro LEDs may be placed on a substrate in regularly spaced rows with an empty row between at least two successive rows of micro LED. A micro solar cell may then be placed in the empty row. |
| US09484325B2 |
Interconnections for a substrate associated with a backside reveal
An apparatus relating generally to a substrate is disclosed. In this apparatus, a post extends from the substrate. The post includes a conductor member. An upper portion of the post extends above an upper surface of the substrate. An exterior surface of the post associated with the upper portion is in contact with a dielectric layer. The dielectric layer is disposed on the upper surface of the substrate and adjacent to the post to provide a dielectric collar for the post. An exterior surface of the dielectric collar is in contact with a conductor layer. The conductor layer is disposed adjacent to the dielectric collar to provide a metal collar for the post, where a top surface of each of the conductor member, the dielectric collar and the metal collar have formed thereon a bond structure for interconnection of the metal collar and the conductor member. |
| US09484323B2 |
Method of manufacturing a semiconductor package and wire bonding apparatus for performing the same
In a method of manufacturing a semiconductor package, a first semiconductor chip is adhered to a package substrate. An end portion of a wire is bonded to a first bonding pad of the first semiconductor chip by using a capillary. An operating voltage of the first semiconductor chip is applied to the first bonding pad through the wire to detect a leakage current. A second end portion of the wire is bonded to the first connection pad by using the capillary, according to a result of the detection. |
| US09484317B2 |
Scheme for connector site spacing and resulting structures
A system and method for preventing cracks in a passivation layer is provided. In an embodiment a contact pad has a first diameter and an opening through the passivation layer has a second diameter, wherein the first diameter is greater than the second diameter by a first distance of about 10 μm. In another embodiment, an underbump metallization is formed through the opening, and the underbump metallization has a third diameter that is greater than the first diameter by a second distance of about 5 μm. In yet another embodiment, a sum of the first distance and the second distance is greater than about 15 μm. In another embodiment the underbump metallization has a first dimension that is less than a dimension of the contact pad and a second dimension that is greater than a dimension of the contact pad. |
| US09484309B2 |
Light emitting device and method for manufacturing light emitting device
A light emitting device (10) includes light emitting elements (12), conductor wirings (14), and alignment marks (18) formed on a substrate (11). The alignment marks (18) and the conductor wirings (14) are formed by printing. |
| US09484305B2 |
Offset contacts for reduced off capacitance in transistor switches
Systems, apparatuses and methods for reduced OFF capacitance in switching devices are disclosed. A semiconductor die may include a semiconductor substrate, first and second elongated doped regions, said first region serving as a source of a first transistor, said second region serving as a drain of the first transistor and a source of a second transistor. The semiconductor die further includes a plurality of elongated gate structures including a first gate structure disposed between the first and second regions and serving as a gate of the first transistor. The semiconductor die further includes a first set of evenly-spaced electrical contact pads disposed on the first region, and a second set of evenly-spaced electrical contact pads disposed on the second region, the second set of contact pads being offset with respect to the first set of contact pads in a longitudinal direction of the first and second regions. |
| US09484303B2 |
Stress tuning for reducing wafer warpage
An integrated circuit structure includes a substrate, a plurality of low-k dielectric layers over the substrate, a first dielectric layer over the plurality of low-k dielectric layers, and a metal line in the first dielectric layer. A stress tuning dielectric layer is over the first dielectric layer, wherein the stress tuning dielectric layer includes a first opening and a second opening. The metal line extends into the first opening. The second opening has a bottom substantially level with a top surface of the first dielectric layer. A second dielectric layer is over the first dielectric layer. |
| US09484302B2 |
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device comprises a workpiece including a conductive feature disposed in a first insulating material and a second insulating material disposed over the first insulating material, the second insulating material having an opening over the conductive feature. A graphene-based conductive layer is disposed over an exposed top surface of the conductive feature within the opening in the second insulating material. A carbon-based adhesive layer is disposed over sidewalls of the opening in the second insulating material. A carbon nano-tube (CNT) is disposed within the patterned second insulating material over the graphene-based conductive layer and the carbon-based adhesive layer. |
| US09484298B1 |
Non-volatile memory device
A non-volatile memory device includes a first electrode layer extending in a first direction and a first channel body extending through the first electrode layer in a second direction. The first electrode layer has, on a side surface, a first projecting portion expanding in a third direction perpendicular to the first direction and the second direction, and having a rounding shape in a tip of the first projecting portion. |
| US09484292B2 |
Semiconductor package and method of forming the same
A semiconductor package includes a first package substrate, a first semiconductor chip disposed on the first package substrate, the semiconductor chip including first through hole vias, and a chip package disposed on the first semiconductor chip, the chip package including a second package substrate and a second semiconductor chip disposed on the second package substrate, wherein a first conductive terminal is disposed on a first surface of the semiconductor chip and a second conductive terminal is disposed on a first surface of the second package substrate, the first conductive terminal disposed on the second conductive terminal. |
| US09484289B2 |
Semiconductor device with heat spreader
A semiconductor device includes a package body, a semiconductor die embedded in the package body and a heat spreader attached to a top surface of the package body and spaced from semiconductor die. The heat spreader may be formed of solder that is melted within a recess in the top surface of the package body. |
| US09484283B2 |
Modular jet impingement cooling apparatuses with exchangeable jet plates
Modular cooling apparatuses are disclosed. In one embodiment, a cooling apparatus includes an inlet manifold, a jet plate manifold, a plurality of jet plates, a vapor manifold, and a target layer. The inlet manifold includes a fluid distribution chamber, and a plurality of fluid distribution channels symmetrically located within the fluid distribution chamber. The jet plate manifold is coupled to the inlet manifold such that the plurality of jet plate openings is vertically aligned with respect to the plurality of fluid distribution channels. The plurality of jet plates is removably disposed in the jet plate manifold. The vapor manifold has a plurality of walls that define a vapor manifold opening and at least one outlet channel through at least one of the walls. The target layer is coupled to the vapor manifold such that the jet orifice surface of each jet plate is positioned above the target layer. |
| US09484280B2 |
Semiconductor device and method of manufacturing a semiconductor device
A semiconductor device is provided, wherein the semiconductor device comprises a carrier, wherein the carrier comprises a first portion configured to hold a semiconductor chip; and a second portion configured for mounting the semiconductor device to a support, the second portion further comprising a first feature configured to be connected to the support; and at least one second feature configured to facilitate transfer of heat away from the first portion, wherein the at least one second feature increases a surface area of the second portion. |
| US09484278B2 |
Semiconductor package and method for producing the same
A semiconductor package includes a housing having a bottom surface and an upper surface and a solder pad arranged in the bottom surface of the housing. The solder pad includes a solderable through hole. The housing includes an opening extending from the through hole to the upper surface of the housing. |
| US09484276B2 |
Semiconductor mounting device and method for manufacturing semiconductor mounting device
A semiconductor mounting device including a first substrate having insulation layers, conductor layers formed on the insulation layers, and via conductors connecting the conductor layers, a second substrate having insulation layers and conductor layers formed on the insulation layers of the second substrate, first bumps connecting the first substrate and the second substrate and formed on an outermost conductor layer of the first substrate formed on an outermost insulation layer of the first substrate, and second bumps positioned to mount a semiconductor element to the second substrate and formed on an outermost conductor layer of the second substrate formed on an outermost insulation layer of the second substrate. The second substrate has a thickness which is greater than a thickness of the first substrate. |
| US09484274B2 |
Methods for reducing semiconductor substrate strain variation
Embodiments of the disclosure provide methods and system for correcting lithographic film stress/strain variations on a semiconductor substrate using laser energy treatment process. In one embodiment, a method for correcting film stress/strain variations on a substrate includes performing a measurement process in a metrology tool on a substrate to obtain a substrate distortion or an overlay error map, determining dose of laser energy in a computing system to correct film stress/strain variations or substrate distortion based on the overlay error map, and providing a laser energy treatment recipe to a laser energy apparatus based on the dose of laser energy determined to correct substrate distortion or film stress/strain variations. |
| US09484263B1 |
Method of removing a hard mask on a gate
A method of removing a hard mask on a gate includes forming a first gate structure and a second gate structure. The first gate structure includes a first gate, a first hard mask disposed on the first gate and a first spacer surrounding the first gate and the first hard mask, wherein the second gate structure includes a second gate, a second hard mask disposed on the second gate and a second spacer surrounding the second gate and the second hard mask. Later, the first spacer surrounding the first hard mask and the second spacer surrounding the second hard mask are removed. After that, a dielectric layer is formed to cover the first hard mask and the second hard mask. Finally, the second dielectric layer, the first mask layer and the second mask layer are removed. |
| US09484262B2 |
Stressed channel bulk fin field effect transistor
Effective transfer of stress to a channel of a fin field effect transistor is provided by forming stress-generating active semiconductor regions that function as a source region and a drain region on a top surface of a single crystalline semiconductor layer. A dielectric material layer is formed on a top surface of the semiconductor layer between semiconductor fins. A gate structure is formed across the semiconductor fins, and the dielectric material layer is patterned employing the gate structure as an etch mask. A gate spacer is formed around the gate stack, and physically exposed portions of the semiconductor fins are removed by an etch. Stress-generating active semiconductor regions are formed by selective epitaxy from physically exposed top surfaces of the semiconductor layer, and apply stress to remaining portions of the semiconductor fins that include channels. |
| US09484258B1 |
Method for producing self-aligned vias
A method for producing self-aligned vias (SAV) is provided. Embodiments include forming a ILOS layer over a dielectric layer; forming pairs of spacers over the ILOS layer, each pair of spacers having a first filler formed between adjacent spacers, and a second filler formed between each pair of spacers; forming and patterning a first OPL to expose one second filler, spacers on opposite sides of the one second filler, and a portion of the first filler adjacent each of the exposed spacers; removing the one second filler to form a SAV, and SAV etching into the ILOS layer; forming a second OPL over the first OPL and in the SAV to form a SAV plug; removing OPL layers and etching into the ILOS layer down to the dielectric layer; forming a third OPL layer in spaces between the TEOS layer; and removing the SAV plug. |
| US09484257B2 |
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes forming an insulating material layer over a workpiece, patterning an upper portion of the insulating material layer with a conductive line pattern, and forming a stop layer comprising a metal oxide or a metal nitride over the patterned insulating material layer. A masking material is formed over the stop layer, and the masking material is patterned with a via pattern. The via pattern of the masking material is transferred to a lower portion of the insulating material layer. |
| US09484254B2 |
Size-filtered multimetal structures
A size-filtered metal interconnect structure allows formation of metal structures having different compositions. Trenches having different widths are formed in a dielectric material layer. A blocking material layer is conformally deposited to completely fill trenches having a width less than a threshold width. An isotropic etch is performed to remove the blocking material layer in wide trenches, i.e., trenches having a width greater than the threshold width, while narrow trenches, i.e., trenches having a width less than the threshold width, remain plugged with remaining portions of the blocking material layer. The wide trenches are filled and planarized with a first metal to form first metal structures having a width greater than the critical width. The remaining portions of the blocking material layer are removed to form cavities, which are filled with a second metal to form second metal structures having a width less than the critical width. |
| US09484253B2 |
Signal line fabrication method, array substrate fabrication method, array substrate and display device
Embodiments of the disclosure provide a signal line fabrication method, an array substrate fabrication method, an array substrate and a display device. The signal line fabrication method includes: sequentially forming a material layer for forming the signal line, a material layer for forming a first barrier layer and a material layer for forming a second barrier layer; forming the first barrier layer and the second barrier layer by a patterning process; and forming the signal line by a patterning process. |
| US09484250B2 |
Air gap contact formation for reducing parasitic capacitance
A functional gate structure is located on a surface of a semiconductor material portion and including a U-shaped gate dielectric portion and a gate conductor portion. A source region is located on one side of the functional gate structure, and a drain region is located on another side of the functional gate structure. The source region and drain region both have a topmost surface that is above a topmost surface of the semiconductor material portion and another surface that touches a portion of the U-shaped gate dielectric. A contact structure is located on the topmost surface of the source region and/or the drain region. A middle-of-the-line air gap contact is located between the contact structure and the functional gate structure and above at least one of the source region and the drain region. The middle-of-the-line air gap contact is sealed by a portion of a conformal dielectric material. |
| US09484247B2 |
Semiconductor device having stable structure and method of manufacturing the same
The semiconductor device includes a stacked structure including conductive layers and insulating layers alternately stacked; semiconductor patterns configured to pass through the stacked structure; and contact plugs electrically coupled to the conductive layers, respectively, wherein each of the conductive layers includes a first region which has a first thickness, and a second region electrically coupled to the first region and a second thickness greater than the first thickness, and a second region of a lower conductive layer located under a second region of an upper conductive layer. |
| US09484241B2 |
Device for holding multiple semiconductor devices during thermocompression bonding and method of bonding
Disclosed is a device for holding a plurality of semiconductor devices during thermocompression bonding, comprising: a body; a plurality of support surfaces at a first side of the body, each support surface being configured for holding at least one semiconductor device during thermocompression bonding; and a plurality of internal conduits within the body, each internal conduit extending from an opening of a respective one of the support surfaces at the first side of the body to an opening at a second side of the body. In particular, the openings at the second side of the body are configured to be connected to separate pneumatic paths to be in fluid communication therewith, each pneumatic path having an independently controlled pneumatic suction force so that the openings of the support surfaces at the first side of the body are operative to selectively hold the one or more semiconductor devices against the support surfaces at the first side of the body or to release the same therefrom. An apparatus for holding semiconductor devices during thermocompression bonding, and a method of bonding a plurality of semiconductor devices to a substrate via thermocompression bonding are also disclosed. |
| US09484239B2 |
Sacrificial carrier dicing of semiconductor wafers
Mechanisms are provided for sacrificial carrier dicing of semiconductor wafers. A bottom layer of a semiconductor wafer is bonded to a top layer of a sacrificial carrier. The semiconductor wafer is diced into a set of chips, such that the dicing cuts through the semiconductor wafer and into the sacrificial carrier and such that the sacrificial carrier dresses a diamond blade of a saw so as to expose one or more new, sharp layers of diamonds on the diamond blade. |
| US09484237B2 |
Mass transfer system
Micro pick up arrays for transferring micro devices from a carrier substrate are disclosed. In an embodiment, a micro pick up array includes a compliant contact for delivering an operating voltage from a voltage source to an array of electrostatic transfer heads. In an embodiment, the compliant contact is moveable relative to a base substrate of the micro pick up array. |
| US09484235B2 |
Substrate processing apparatus, substrate transfer method and storage medium
In a substrate processing apparatus 1 which performs a process on a substrate W, each of multiple processing modules 2 includes at least a first processing member 21 and a second processing member 22, and substrate transfer devices 15 and 17 transfer substrates W into the multiple processing modules 2. Further, a controller 3 configured to control the substrate processing apparatus 1 stores member operating possibility information on whether it is possible to use the first processing member 21 and the second processing member 22 provided in each of the multiple processing modules 2, and the controller 3 creates, based on the member operating possibility information and process recipe information on processes to be performed on the substrates W, a transfer schedule in which the substrate transfer devices 15 and 17 transfer the substrates W into the multiple processing modules 2 in parallel. |
| US09484234B2 |
Processing station for planar substrates and method for processing planar substrates
A processing station for two-dimensional substrates including at least two processing units and at least two conveyor lines for substrates arranged in parallel to another, wherein both the processing units are placed between the two conveyor lines, and an arrangement for moving the substrates from the conveyor lines to the processing units and back is provided. The arrangement includes four linear conveyor units each having at least one substrate support, wherein a first linear conveyor unit leads from the second conveyor line to the first processing unit, a second linear conveyor unit leads from the first conveyor line to the first processing unit, a third linear conveyor unit leads from the first conveyor line to the second processing unit, and a fourth linear conveyor unit leads from the second conveyor line to the second processing unit. |
| US09484233B2 |
Carousel reactor for multi-station, sequential processing systems
A reactor for processing a plurality of substrates includes P processing station assemblies arranged symmetrically around an axis, where P is an integer greater than one. A pedestal carousel assembly includes P pedestal assemblies arranged symmetrically around the axis, each of the P pedestal assemblies including a pedestal. A rotational actuator rotates the pedestal carousel assembly relative to the axis to selectively index the P pedestal assemblies with the P processing station assemblies. Each of the P processing station assemblies processes substrates arranged on corresponding ones of the P pedestal assemblies at the same time. |
| US09484232B2 |
Zone temperature control structure
A zone temperature control structure which has two or more zone of which surface temperatures are controlled to different temperatures, respectively. The structure can maintain a temperature difference by suppressing heat conduction in a direction in which the zones are arrayed, and prevent formation of a hot spot by ensuring smooth heat conduction for heat input in a direction intersecting the direction in which the zones are arrayed. A heat-conducting anisotropic material layer is disposed between the two or more zones. The heat-conducting anisotropic material layer is configured such that heat conductivity is lower in the direction in which the two or more zones are arrayed than in the direction intersecting the direction in which the two or more zones are arrayed. |
| US09484230B2 |
Substrate liquid processing apparatus
A substrate liquid processing apparatus of the present invention includes a process-liquid supply unit selectively supplying a plurality of types of process-liquids to the substrate held by a substrate holding table, first and second guide cups which are disposed in this order from the top and are configured to respectively guide downward the process-liquid scattering from the rotating substrate while being held by the substrate holding table; and a position adjustment mechanism adjusting a positional relationship between the first and second guide cups and the substrate holding table. A first process-liquid recovery tank is provided at a lower area of the first and second guide cups and recovers the process-liquid guided by the first guide cup. A second process-liquid recovery tank is provided at the inner peripheral side of the first process-liquid recovery tank and recovers the process-liquid guided by the second guide cup. |
| US09484224B2 |
Method of fabricating a circuit board structure
A circuit board structure and a fabrication method thereof are disclosed. The circuit board structure includes a carrying board having a first and an opposite second surface and having at least one through cavity formed therein; a semiconductor chip disposed in the through cavity of the carrying board; an adhesive material filling the gap between the through cavity of the carrying board and the semiconductor chip to fix the semiconductor chip in the through cavity; and a reinforcing layer disposed on the second surface of the carrying board and the inactive surface of the semiconductor chip, thereby increasing the strength of the carrying board as well as the reliability of the circuit board. |
| US09484222B2 |
Semiconductor devices, semiconductor device packages, and packaging techniques for impedance matching and/or low frequency terminations
A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (RF) power amplifier transistor having a first port, a second port, and a third port. The semiconductor device also includes an output lead, a first output impedance matching circuit between the second port and the output lead, and a first additional circuit coupled between the output lead and a ground terminal. At least one component of the first additional circuit is formed at least in part by way of one or more of a plurality of castellations and a plurality of vias. |
| US09484221B2 |
Bipolar semiconductor device and method of manufacturing thereof
A power semiconductor device has a semiconductor body having a first surface and a second surface that runs substantially parallel to the first surface. A first metallization is arranged on the first surface. A second metallization is arranged on the second surface. The semiconductor body includes an n-doped first semiconductor region spaced apart from the first metallization and having a first maximum doping concentration, an n-doped second semiconductor region having a second maximum doping concentration higher than the first maximum doping concentration and adjoining the first semiconductor region, and a third semiconductor region in ohmic contact with the second metallization, arranged between the second metallization and the second semiconductor region, and adjoining the second semiconductor region. The second semiconductor region is made of a semiconductor material which includes electrically active chalcogen impurities as donors. At least 90% of the electrically active chalcogen impurities form isolated defects in the semiconductor material. |
| US09484217B2 |
Method of forming contact openings for a transistor
A method for making contact openings for connecting a transistor from a stack of layers comprising an active layer made of a semi-conductor material, a silicide layer on the top of the active layer, a nitride-based layer on the top of the silicide layer, and an electrically insulating layer on the top of the nitride-based layer, includes opening for forming, in the insulating layer, an exposing opening on the nitride-based layer and delimited by flanks of the insulating layer, and removing the nitride-based layer by modifying the nitride-based layer at the opening using plasma wherein CxHy is introduced where x is the proportion of carbon and y is the proportion of hydrogen ions and comprising ions heavier than hydrogen. The conditions of plasma being so chosen as to modify a portion of the nitride-based layer and to form a protective carbon film on the flanks of the insulating layer. |
| US09484216B1 |
Methods for dry etching semiconductor devices
The present invention provides methods for etching semiconductor devices, such aluminum nitride resonators. The methods herein allow for devices having improved etch profiles, such that nearly vertical sidewalls can be obtained. In some examples, the method employs a dry etch step with a primary etchant gas that omits BCl3, a common additive. |
| US09484215B2 |
Sulfur and fluorine containing etch chemistry for improvement of distortion and bow control for har etch
In accordance with this disclosure, there is provided several inventions, including a method for etching a plurality of features in a stack comprising alternating layers above a substrate, comprising: providing a steady state flow of an etching gas, wherein the etching gas comprises: a molecule A comprising sulfur and fluorine; a molecule B comprising carbon, fluorine, and hydrogen; and a molecule C comprising carbon and fluorine and not hydrogen; forming the etching gas into a plasma; and etching the features into the stack through the plurality of alternating layers. |
| US09484211B2 |
Etchant and etching process
A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant may be hydrogen peroxide. |
| US09484207B2 |
Semiconductor device structure and method for forming the same
A method for forming a semiconductor device structure is provided. The method includes providing a wafer having a central portion and a peripheral portion surrounding the central portion. The method includes forming a first dielectric layer over the central portion. The first dielectric layer has first contact openings exposing conductive regions of the wafer. The method includes forming a protective layer over the peripheral portion. The method includes after forming the protective layer, performing a metal silicide process to form metal silicide structures over the conductive regions of the wafer. |
| US09484200B2 |
Oxide sputtering target, thin film transistor using the same, and method for manufacturing thin film transistor
A thin film transistor includes a gate electrode, a source electrode, a drain electrode disposed on the same layer as the source electrode and facing the source electrode, an oxide semiconductor layer disposed between the gate electrode and the source electrode or the drain electrode, and a gate insulating layer disposed between the gate electrode and the source electrode or the drain electrode, in which the oxide semiconductor layer includes thallium and at least one of indium, zinc, tin, and gallium. Also an oxide sputtering target including: an oxide including thallium (Tl); and at least one of indium, zinc, tin, and gallium. |
| US09484195B2 |
Systems and methods for transfer of ions for analysis
The invention generally relates to systems and methods for transferring ions for analysis. In certain embodiments, the invention provides a system for analyzing a sample including an ionizing source for converting molecules of a sample into gas phase ions in a region at about atmospheric pressure, an ion analysis device, and an ion transfer member operably coupled to a gas flow generating device, in which the gas flow generating device produces a laminar gas flow that transfers the gas phase ions through the ion transfer member to an inlet of the ion analysis device. |
| US09484193B2 |
Automatic amino acid sequencing of glycopeptide by Y1 ions
Apparatus and methods for automatic amino acid sequencing of a glycopeptide by mass spectrometry. The glycopeptide is fragmented by higher energy collision dissociation fragmentation, and sequentially fragmented by collision induced dissociation fragmentation. The glycopeptide Y1 ion is isolated, and the mass spectra of fragmented glycopeptide Y1 ions provide mass spectral peaks corresponding to the amino acid sequence of the glycopeptide. |
| US09484192B2 |
Data directed storage of imaging mass spectra
A method of ion imaging is disclosed comprising scanning a sample and acquiring first mass spectral data related to a first pixel location at a first spatial resolution and determining whether or not the first mass spectral data satisfies a condition. If it is determined that the first mass spectral data does satisfy the condition then the first mass spectral data is stored, recorded or prioritized. If it is determined that the first mass spectral data does not satisfy the condition then the first mass spectral data is discarded or downgraded. Scanning of the sample then continues at the first spatial resolution and further mass spectral data related to further pixel locations is acquired. |
| US09484189B2 |
Method of detecting arc discharge in a plasma process
An arc discharge detection device is used for detecting arc discharges in a plasma process. The arc discharge detection device includes a comparator configured to emit an arc discharge detection signal and receive an instantaneous value of the signal or a signal proportional thereto, a minimum or maximum value detection device configured to receive the signal and to determine a minimum or maximum value of the signal within a predetermined time period, a setting means configured to receive the minimum or maximum value and to generate a reference signal from the minimum or maximum value, such that the reference signal is supplied to the comparator, and such that the comparator changes the signal level of the arc discharge detection signal when the comparator detects that the instantaneous value has reached the reference signal. |
| US09484185B2 |
Charged particle beam writing apparatus, and charged particle beam writing method
A charged particle beam writing apparatus includes a correction term calculation processing circuitry to calculate a correction term which corrects an error of a proximity effect density of a figure pattern to be written, compared against the figure pattern at design stage, a proximity effect correction dose coefficient calculation processing circuitry to calculate a proximity effect correction dose coefficient for correcting a proximity effect, by using the correction term, a dose calculation processing circuitry to calculate a dose of a charged particle beam by using the proximity effect correction dose coefficient, and a writing mechanism to write the figure pattern on a target object by using the charged particle beam whose dose is the dose calculated. |
| US09484183B2 |
Linkage conduit for vacuum chamber applications
An ion implantation apparatus including an enclosure defining a process chamber, a carriage slidably mounted on a shaft within the process chamber and coupled to a drive mechanism adapted to selectively move the carriage along the shaft. A platen assembly can be coupled to the carriage, and a linkage conduit can extend between a side wall of the enclosure and the carriage. The linkage conduit can include a plurality of pivotably interconnected linkage members that define a contiguous internal volume that is sealed from the process chamber. The contiguous volume can be held at a desired vacuum pressure separate from the vacuum environment of the process chamber. |
| US09484180B2 |
Plasma processing method and plasma processing apparatus
A plasma processing apparatus includes a processing chamber; a conductive base within the processing chamber; an electrostatic chuck, having an electrode, provided on the base; a high frequency power supply that applies a high frequency power to the base; a first DC power supply that applies a DC voltage to the electrostatic chuck; and a plasma generation unit that generates plasma of a processing gas within the processing chamber. A plasma processing method performed in the plasma processing apparatus includes connecting the first DC power supply to the electrode of the electrostatic chuck; cutting off connection between the first DC power supply and the electrode of the electrostatic chuck; and generating the plasma within the processing chamber by applying the high frequency power to the base in a state that the connection between the first DC power supply and the electrode of the electrostatic chuck is cut off. |
| US09484175B2 |
Fuse circuit assembly
A fuse circuit assembly (1) includes: a linking plate (11) configured to carry a current input from an input part (14), the linking plate (11) having a shape tapered with distance from the input part (14) in a flow direction of the current input from the input part (14); a plurality of fusible members (12) each configured to be fused by a current of a predetermined magnitude flowing through each fusible member (12); and a plurality of terminals (13) connected to the linking plate (11) through the plurality of fusible members (12) from locations of the linking plate (11) positioned at intervals in the flow direction. |
| US09484173B2 |
Electromagnetic switch with increased magnetic flux density
An electromagnetic switch includes a pair of fixed contacts fixed in a contact housing case with a predetermined distance therebetween; a movable contact disposed in the contact housing case to contact to and separate from the pair of fixed contacts; and an electromagnet unit causing the movable contact to contact to and separate from the pair of fixed contacts. The electromagnet unit has a magnetic yoke enclosing an exciting coil, a movable plunger disposed to move through a through hole provided in the magnetic yoke and having a contact pole surface facing the contact pole surface of the magnetic yoke, and a linking shaft linking the movable plunger and the movable contact. The contact pole surface of the movable plunger includes a circular protruding portion having a width narrower than that of a surface facing the magnetic yoke for increasing a magnetic flux density. |
| US09484172B2 |
Electrical contact sets
An electrical contactor has a first terminal having a first fixed contact; a second terminal having a second fixed contact; a first electrically-conductive movable arm in electrical communication with the first terminal and having a first movable contact thereon; a second electrically-conductive movable arm in electrical communication with the second terminal and having a second movable contact thereon, counter-opposed to the first moveable arm; and an actuator for moving the first and second moveable arms in opposing directions. The first moveable contact and the second fixed contact form a primary contact set, and the second moveable contact and the first fixed contact form a secondary contact set, first and second moveable arms thereby forming a current-sharing arm pair between first and second terminals. |
| US09484170B2 |
Fuse securing structure for power source circuit cutoff device
Provided are: a plug body including a main body housing, a fuse having a pair of terminals protruding outside the main body housing with the fuse being accommodated in the main body housing, and a cover attached to the main body housing; a circuit accommodating body configured to accommodate a pair of terminals on a mating side connected to the pair of terminals of the fuse; a rotatable lever connected to the plug body and the circuit accommodating body and configured to connect and disconnect between the pair of terminals of the fuse and the pair of terminals on the mating side; and a fuse biasing portion configured to bias the fuse accommodated in the main body housing toward the cover. |
| US09484169B2 |
Vacuum interrupter arrangement for a medium voltage circuit breaker with cup-shaped TMF-contacts
An exemplary vacuum interrupter arrangement for a medium voltage circuit breaker includes a vacuum housing within which a pair of electrical contacts are coaxially arranged and concentrically surrounded by the cylindrical shaped vacuum housing. The electrical contacts are formed as a type of TMF-contacts, each having a slotted cup-shaped contact part which is attached to the distal end of a contact shaft and which is covered by a contact ring disposed on a rim of the cup-shaped contact part, wherein each cup-shaped contact part is provided with a vertical inward bending towards the contact ring. The outer diameter of the bottom section of the cup-shaped contact part is larger than the outer diameter of its rim section, in order to alter the Lorentz force to a respective inward direction. |
| US09484167B2 |
Coupling device for circuit breaker
Disclosed is a coupling device for a circuit breaker. A third coupler formed as a curved surface is provided between a first coupler coupled to an outer handle assembly, and a second coupler coupled to an inner handle. Under such configuration, even if the inner handle and the outer handle assembly are not concentric with each other, the third coupler may transmit a rotational force applied to the first coupler to the second coupler in a direction perpendicular to a shaft direction of the second coupler, in a state where the third coupler is inclined from an upper surface of the circuit breaker body. As a result, a user's force to rotate the outer handle can be transmitted to the inner handle. This can prevent a malfunction of the circuit breaker, and thus can enhance reliability of the circuit breaker. |
| US09484164B2 |
Crashworthy memory module having a thermal cutoff
A memory module is disclosed. The memory module may have an enclosure having a slot in a wall of the enclosure. The memory module may also have a device disposed within the enclosure. The memory module may further have a thermal cutoff disposed in the slot. The thermal cutoff may have a first end attached to the device. The thermal cutoff may also have a second end attached to a wire configured to electrically connect to the device. The thermal cutoff may disconnect the wire from the device when subjected to a threshold temperature. |
| US09484162B2 |
Power source switch
A switchable socket assembly (36) permits a power source to be changed. The switchable socket assembly (36) includes a switch guide (38) that communicates with a linear array of terminal fittings that include an output terminal fitting (12) and first and second input terminal fittings (14, 16) on opposite respective sides of the output terminal fitting (12). A switch (40) is slidable in the switch guide (38) and can be moved between first and second positions. In the first position, the switch (40) permits a fuse (30) to connect to the output terminal fitting (12) and the first input terminal fitting (14). In the second position, the switch (40) permits the fuse (30) to connect to the output terminal fitting (12) and the second input terminal fitting (16). |
| US09484161B2 |
Electrical switching device
An electric switching device includes first and second switch contact pieces. The first switch contact piece has a guide portion. The first switch contact piece is connected to an actuating unit or drive device by a kinematic chain. The guide portion of the first switch contact piece is guided on a guide path. The guide portion and the guide path each have a contact or bearing surface and at least one of the contact or bearing surfaces is convexly curved. |
| US09484160B2 |
Large-grain graphene thin film current collector and secondary batteries containing same
A unitary graphene-based current collector in a battery or capacitor. The current collector is or contains a unitary graphene layer that is composed of closely packed and chemically bonded parallel graphene planes having an inter-graphene plane spacing of 0.335 to 0.40 nm and an oxygen content less than 5% by weight (more typically 0.001% to 1%), an average grain size larger than 5 μm (more typically >100 μm; some as large as >cm), a physical density higher than 1.8 g/cm3, and is obtained from heat-treating a graphene oxide gel at a temperature higher than 100° C. (typically and preferably from 1,000 to 3,000° C.). Such an integrated or unitary graphene entity is compatible with essentially all electrolytes commonly used in batteries and supercapacitors. |
| US09484159B2 |
Silicon oxide material, making method, negative electrode, lithium ion secondary battery, and electrochemical capacitor
A silicon oxide material having a cobalt content of 2-200 ppm is provided. A negative electrode is formed using the silicon oxide material as active material. A nonaqueous electrolyte secondary battery constructed using the negative electrode exhibits improved cycle performance while maintaining the high battery capacity and low volume expansion of silicon oxide. |
| US09484155B2 |
Thin flexible rechargeable electrochemical energy cell and method of fabrication
A thin, rechargeable, flexible electrochemical energy cell includes a battery cell, or a capacitor cell, or a battery/capacitor hybrid cell that can be stackable in any number and order. The cell can be based on a powdery mixture of hydrated ruthenium oxide particles or nanoparticles with activated carbon particles or nanoparticles suspended in an electrolyte. The electrolyte may contain ethylene glycol, boric acid, citric acid, ammonium hydroxide, organic acids, phosphoric acid, and/or sulphuric acid. An anode electrode may be formed with a thin layer of oxidizable metal (Zn, Al, or Pb). The cathode may be formed with a graphite backing foil. The energy cell may have a voltage at or below 1.25V for recharging. The thickness 15 of the cell structure can be in the range of 0.5 mm-1 mm, or lower. |
| US09484153B2 |
Multilayer ceramic electronic component having a plurality of internal electrodes and method for manufacturing the same
There is provided a multilayer ceramic electronic component including: a ceramic body including a plurality of dielectric layers; and a plurality of first and second internal electrodes disposed to face each other with the dielectric layer interposed therebetween within the ceramic body and having different widths, wherein three or more of the plurality of first and second internal electrodes form a single block, the blocks are iteratively laminated, and when the longest distance between the uppermost internal electrode and the lowermost internal electrode, among the plurality of first and second internal electrodes 121 and 122, is T1 and the shortest distance therebetween is T2, 0.76≦T2/T1≦0.97 is satisfied. |
| US09484152B2 |
Electronic component, substrate-type terminal included therein, and electronic component mounted structure
A substrate-type terminal includes a first major surface with a first mounting electrode and a second mounting electrode. The substrate-type terminal includes a second major surface with a first connecting electrode and a second connecting electrode. The substrate-type terminal includes a first slit located between the first mounting electrode and the first connecting electrode, as seen in a plane, and penetrating the terminal from the first major surface to the second major surface, and a second slit located between the second mounting electrode and the second connecting electrode, as seen in a plane, and penetrating the terminal from the first major surface to the second major surface. |
| US09484146B2 |
High voltage transformer having a sensor system, method for monitoring physical characteristic variables of a high voltage transformer and sensor system for monitoring physical characteristic variables
The invention relates to a high voltage transformer (6) having a sensor system (30) for monitoring physical characteristic variables. In particular, said sensor system has at least one sensor (1) that comprises a glass fiber (3) with a sensor head (2). Said sensor head supports a plurality of Bragg gratings (7, 8, 9). An evaluation unit (10) is associated with the sensor system and is connected to the at least one sensor head via said glass fiber. The invention is based on the general inventive concept of arranging the sensors of the sensor system between successive windings (4, 5) of the high voltage transformer using spacers. In addition, the use of a plurality of Bragg gratings in the sensor head ensures that at least one of the Bragg gratings determines the actual physical characteristic variables such as temperature or contact force (A). |
| US09484143B2 |
Induction component
An induction component contains, in a housing, a coil, which has a coil core with two end surfaces and a coil winding. The housing consists of a housing base, in turn consisting of plastic, and a hood-like upper part connected thereto. A holder, in which the coil is held non-displaceably in the direction of its longitudinal axis, is arranged on the housing base. It is thus ensured that the air gaps to the right and left between the end surfaces of the coil core and the inner face of the housing upper part are constant. |
| US09484142B2 |
Circuit board and power conversion apparatus having circuit board
The present invention discloses a circuit board, including a substrate and a magnetic core, where the magnetic core is embedded into the substrate, at least one turn of a winding conductor wound around the magnetic core is arranged on the substrate, each turn of the winding conductor includes a first end-surface conductor and a second end-surface conductor that are separately arranged on two ends of the magnetic core, and each turn of the winding conductor further includes a first side-surface conductor that penetrates through the magnetic core from an inner side of the magnetic core and a second side-surface conductor that penetrates through the magnetic core from an outer side of the magnetic core. The circuit board and the power conversion apparatus having the circuit board provided by the present invention, achieve larger inductance, save materials, and reduce cost for fabricating a power conversion apparatus. |
| US09484136B2 |
Magnetic core for use in an integrated circuit, an integrated circuit including such a magnetic core, a transformer and an inductor fabricated as part of an integrated circuit
A magnetic core is provided for an integrated circuit, the magnetic core comprising: a plurality of layers of magnetically functional material; a plurality of layers of a first insulating material; and at least one layer of an secondary insulating material; wherein layers of the first insulating material are interposed between layers of the magnetically functional material to form subsections of the magnetic core, and the at least one layer of second insulating material is interposed between adjacent subsections. |
| US09484134B2 |
Feedthrough signal transmission circuit and method utilizing permanently on buffer and switchable normal buffer
A feedthrough signal transmission circuit includes a first permanently on cell and a cell controlling unit. The first permanently on cell is arranged to transmit a first control signal. The cell controlling unit is coupled to the first permanently on cell, and includes a power switch and a plurality o buffers. The power switch is coupled to the first permanently on cell, arranged to receive a switch control signal and the first control signal, and selectively output the first control signal according to the switch control signal. The plurality of buffers is coupled to the power switch. Each of the buffers is arranged to buffer a data input only when powered by the first control signal output from the power switch. |
| US09484130B2 |
Device for assisting in the production of wiring harnesses
A device for assisting in the production of wiring harnesses. The device includes a board, with a groove that makes it possible to receive cables. The device further includes an arrangement for transporting a cable, including a nozzle making it possible to position the cable in the groove of the board. Further, a control is configured and arranged to drive the displacement of the cable transport arrangement. Also, flexible and resilient holding elements are provided for holding cables in the groove. The holding elements deform to allow the nozzle to pass when the nozzle positions a cable in the groove and then revert to their initial form to hold the cable in the groove. |
| US09484123B2 |
Conductive sealant compositions
Embodiments of the present disclosure are directed to sealant compositions including a base composition with at least one sulfur-containing polymer, a curing agent composition, and an electrically conductive filler including carbon nanotubes and stainless steel fibers. The electrically conductive filler can be in either or both of the base composition and the curing agent composition. The sealant compositions are substantially Ni-free and exhibit unexpectedly superior EMI/RFI shielding effectiveness. |
| US09484122B2 |
Post-accident fission product removal system and method of removing post-accident fission product
A post-accident fission product removal system may include an air mover, a filter assembly, and/or an ionization chamber. The air mover may be configured to move contaminated air through the filter assembly to produce filtered air. The ionization chamber may be connected to the filter assembly. The ionization chamber may include an anode and a cathode. The ionization chamber may be configured to receive the filtered air from the filter assembly and to ionize and capture radioisotopes from the filtered air to produce clean air. |
| US09484119B2 |
Liquid nitrogen emergency cooling system for nuclear power plants
A reactor cooling system for cooling a nuclear reactor using nitrogen comprising a refrigeration unit for cooling and compressing nitrogen gas into liquid nitrogen, a liquids storage tank to store liquid nitrogen, the tank in fluid communication with the refrigeration unit, a heat exchanger drop system in fluid communication with the liquids storage tank, adjacent to the nuclear reactor, wherein the nitrogen absorbs heat by becoming gaseous, a tank for receiving and holding nitrogen gas in fluid communication with the heat exchanger and in fluid communication with the refrigeration unit, and where the system is a closed-loop drop system. |
| US09484111B2 |
Bidirectional scanning GOA circuit
A GOA circuit for use in LCD applications is disclosed, and the GOA circuit includes multiple cascaded GOA units, each of which includes a pull-up control circuit, a pull-up circuit, a pull down circuit, a pull-down holding circuit, a reset circuit, and a bootstrap capacitor. By using the GOA circuit, scanning directions of the LCD display panel are controlled by introducing scanning control signals to the pull-up control circuit for determining to output gate signals of the GOA circuit in sequence of up-to-down stages or in sequence of down-to-up stages. Furthermore, a novel scheme of three-segment voltage division achieves the optimization and the stability of the GOA circuit. |
| US09484109B2 |
Memory cell and memory device
The memory cell of a memory device comprises a MOS capacitor having a n-type gate and a n-type well, a first switch to temporarily apply a breakthrough voltage across the n-type gate and the n-type well to generate a permanent conductive breakthrough structure between the n-type gate and the n-type well. |
| US09484105B2 |
Nonvolatile semiconductor memory device
When selectively erasing one sub-block, a control circuit applies, in a first sub-block, a first voltage to bit lines and a source line, and applies a second voltage smaller than the first voltage to the word lines. Then, the control circuit applies a third voltage lower than the first voltage by a certain value to a drain-side select gate line and a source-side select gate line, thereby performing the erase operation in the first sub-block. The control circuit applies, in a second sub-block existing in an identical memory block to the selected sub-block, a fourth voltage substantially identical to the first voltage to the drain side select gate line and the source side select gate line, thereby not performing the erase operation in the second sub-block. |
| US09484102B2 |
Semiconductor device and method of operating the same
A method of operating the semiconductor device includes performing an erase operation on a plurality of memory cells, performing a back-tunneling operation by injecting electrons into a storage node from a gate electrode of a memory cell, selected among the plurality of memory cells, and performing a program operation by injecting electrons into the storage node from a channel layer of the selected memory cell. |
| US09484099B2 |
Three dimensional semiconductor memory device with line sharing scheme
A semiconductor memory device includes a memory array including memory blocks stacked in a plurality of layers over a substrate and an operation circuit suitable for performing a read operation and a program loop to memory cells included in the memory blocks, wherein word lines of the memory blocks are coupled to each other and a pair of the memory blocks are arranged vertically adjacent to each other and share bit lines. |
| US09484098B1 |
Smart reread in nonvolatile memory
A population of memory cells are programmed and an indicator of a first number of the memory cells programmed to a first state is recorded. Subsequently, a first read operation is performed using a first set of read parameters to identify a second number of the memory cells that are read as being in the first state. The difference between the first number and the second number is determined and a second set of read parameters for a second read (reread) is selected accordingly. |
| US09484095B2 |
TCAM providing efficient move contents operation
An embodiment of the invention includes a Ternary Content Addressable Memory (TCAM) that includes a group of TCAM block. Each TCAM block stores a number of match entries. Each TCAM block is ranked in priority order. The TCAM also includes a group of TCAM headpointers. There is a TCAM headpointer coupled to each TCAM block. The TCAM headpointer indicates the highest priority match in the group of match entries in a TCAM block. The match entries within a TCAM block are prioritized in circular priority order starting from the highest priority match. |
| US09484094B2 |
Control method of resistive random-access memory
A control method of a resistive random-access memory is provided. Firstly, an action is performed on the resistive random-access memory, so that the resistive random-access memory has a specified state. Then, an operation period begins. During a first sub-period of the operation period, a first control signal with a first polarity is provided. During a second sub-period of the operation period, a second control signal with a second polarity is provided. During a third sub-period of the operation period, a third control signal with the first polarity is provided. During a fourth sub-period of the operation period, a read signal is provided, so that the resistive random-access memory generates a read current. According to the read current, a controlling circuit verifies whether the resistive random-access memory is in the specified state. |
| US09484093B2 |
Controlling adjustable resistance bit lines connected to word line combs
Methods for reducing leakage currents through unselected memory cells of a memory array during a memory operation are described. In some cases, the leakage currents through the unselected memory cells of the memory array may be reduced by setting an adjustable resistance bit line structure connected to the unselected memory cells into a non-conducting state. The adjustable resistance bit line structure may comprise a bit line structure in which the resistance of an intrinsic (or near intrinsic) polysilicon portion of the bit line structure may be adjusted via an application of a voltage to a select gate portion of the bit line structure that is not directly connected to the intrinsic polysilicon portion. The intrinsic polysilicon portion may be set into a conducting state or a non-conducting state based on the voltage applied to the select gate portion. |
| US09484091B2 |
Resistance change memory
According to one embodiment, a resistance change memory includes a memory cell, a sense amplifier and a global bit line. The memory cell is disposed at a location where a local bit line and a word line intersect each other. The memory cell is connected to both the local bit line and the word line. The sense amplifier reads data stored on the memory cell by supplying a read current to the memory cell. The global bit line is connected between the local bit line and the sense amplifier. The global bit line feeds the read current supplied by the sense amplifier to the local bit line. The sense amplifier charges the global bit line, before the local bit line and the global bit line are connected to each other. |
| US09484090B2 |
Read and write methods for a resistance change non-volatile memory device
A selection circuit that selects a memory cell from a memory cell array and a read circuit for reading a resistance state of a resistance change element in the selected memory cell are provided. In memory cells of odd-numbered-layer and even-numbered-layer memory cell arrays that constitute a multilayer memory cell array, each memory cell in any of the layers has a selection element, a first electrode, a first resistance change layer, a second resistance change layer, and a second electrode that are disposed in the same order. Whether the selected memory cell is located in any layer of the multilayer memory cell array, the read circuit applies a voltage to the selected memory cell to perform the reading operation. The voltage applied to the selected memory cell causes the second electrode to become positive with reference to the first electrode in the selected memory cell. |
| US09484089B2 |
Dual polarity read operation
A data storage device includes a memory die and a controller coupled to the memory die. The memory die includes a resistive memory and read/write circuitry configured to determine a first hard bit value and a second hard bit value of a storage element of the resistive memory. The first hard bit value and the second hard bit value are determined using opposite polarity read voltages. The controller is configured to perform error correction with respect to data read from the resistive memory. |
| US09484077B2 |
Providing services from a remote computer system to a user station over a communications network
A method includes receiving first information at a remote computer system during a first user-initiated communication session for a user station not previously identified to the remote computer system, sending second information that is a function of and different from the first information to the user station over the communications network during the first user-initiated communication session stored automatically at the user station, storing third information based on the first information at a location remote from the user station, receiving the second information over the communications network during a subsequent and separate user-initiated communication session automatically from the user station, retrieving the stored third information using the received second information, during the subsequent and separate communication session and using the retrieved third information for interaction with the remote computer system during the subsequent and separate communication session. |
| US09484075B2 |
Semiconductor device
A semiconductor device includes data terminal, unit buffers which drive the data terminal and the impedance of which can be adjusted, and control circuits which successively switch the operation of at least two unit buffers selected from unit buffers. Because the operation of the plurality of unit buffers is switched successively, the peak current which flows during an output operation is dispersed, power-supply noise can be controlled, and the output potential can be switched very rapidly and continuously, while a fixed output impedance is maintained. |
| US09484074B2 |
Current mode sense amplifier with load circuit for performance stability
Memories, current mode sense amplifiers, and methods for operating the same are disclosed, including a current mode sense amplifier including cross-coupled p-channel transistors and a load circuit coupled to the cross-coupled p-channel transistors. The load circuit is configured to provide a resistance to control at least in part the loop gain of the current mode sense amplifier, the load circuit including at least passive resistance. |
| US09484073B1 |
Current-mode sense amplifier
The invention relates to a current sense amplifier. The current sense amplifier comprises: a first NAND gate comprising an output terminal being connected to a first output terminal, a second NAND gate comprising an output terminal being connected to a second output terminal, a first cross coupled inverter, and a second cross coupled inverter, the first inverter comprising a first n-FET and the second inverter comprising a second n-FET, a transmission gate comprising a first and a second transmission terminal and a transmission control terminal, the transmission control terminal being connected to a sense control line input terminal, a third n-FET having a source connected to a sense current input terminal and a drain connected to a source of the first n-FET, a fourth n-FET having a source connected to a reference current input terminal and a drain connected to a source of the second n-FET. |
| US09484072B1 |
MIS transistors configured to be placed in programmed state and erased state
A nonvolatile memory device includes a pair of MIS transistors one of which is placed in a programmed state by a first program operation utilizing a hot carrier effect to store one-bit data in the pair of MIS transistors, and a control unit configured to recall the one-bit data from the pair of MIS transistors in a recall operation, to cause an unprogrammed one of the MIS transistors to be placed in a programmed state by a second program operation utilizing a hot carrier effect in response to the one-bit data recalled from the pair of MIS transistors, and to erase the programmed states of both of the MIS transistors in an erase operation. |
| US09484065B2 |
Intelligent determination of replays based on event identification
A system for intelligently determining replay locations in a multimedia content stream based on identifying events in the multimedia content stream is provided. In one embodiment, events in the multimedia content stream are identified by analyzing information in the multimedia content stream, in real time. In another embodiment, events in the multimedia content stream are identified by analyzing the viewing behavior and an emotional response from users viewing the multimedia content, in real time. One or more replay locations in the multimedia content stream are determined based on the events identified in the multimedia content stream. The multimedia content stream with the replay locations are displayed to a user via a user interface in the user's processing device. |
| US09484064B2 |
Video chunking for robust, progressive uploading
Devices and methods are provided herein relating to video chunking for robust, progressive upload. Video can be parsed to determined byte offsets associated with prospective chunk boundaries. Chunks can be generated based on the prospective chunk boundaries and a preferred chunk size. Sample tables can be generated for each chunk. The chunks can be fully self contained, in that they can be received and transcoded independently of other chunks. Thus, if one chunk fails, only that chunk needs to be retransmitted versus the entire video. |
| US09484063B2 |
Shared scene mosaic generation
A method of joint generation of a mosaic of scenes. The method comprises selecting by each of a plurality of users one of a plurality of characters which are imaged in a plurality of media content items, alternately selecting by the plurality of users a plurality of expression indications, each the expression indication is selected during another of a plurality of user interactions which are held alternately with the plurality of users using a plurality of client terminals, sequentially selecting a plurality of scenes which are extracted from the plurality of media content items, each the scene is selected in another of the plurality of user interactions according to a respective the expression indication and images a respective character from the plurality of characters, and automatically generating a scene mosaic which comprises the plurality of scenes. |
| US09484062B1 |
Media cleaning with self-assembled monolayer material
A method of cleaning a recording medium, such as a disc. The method includes contacting a surface of the recording medium with a cleaning tape comprising a flexible backing and a self-assembled monolayer (SAM) coating. The cleaning tape may include an abrasive coating, with the SAM on the abrasive coating. |
| US09484061B2 |
Automatically correcting audio data
Systems, methods, and computer program products are provided for editing digital audio data. In some implementations a method is provided that includes receiving digital audio data, identifying a modification to a portion of the digital audio data, and automatically correcting audio data surrounding one or more edit boundaries resulting from the identified modification including interpolating audio data from a region associated with the one or more edit boundaries. |
| US09484059B2 |
Stationary and rotatable components operational with first and second stators
A fluid dynamic bearing motor and method are provided for use with various disc drive memory device products differently rated by operational rotational speed. The operational speeds are those speeds measured during reading and writing memory operations to the memory device. In an aspect, the present invention meets full operating requirements, including stiffness and power requirements, at multiple rated speeds for use with either standard or high-end performance disc drive products. Costs associated with a dedicated manufacturing line for high-end products are substantially reduced. A single manufacturing line can serve both standard and high-end disc drive memory device products. The present invention is especially useful in reducing costs of 2.5 inch notebook products that are typically marketed in two levels of performance, namely, 5400 RPM standard performance products and 7200 RPM high performance products. |
| US09484058B2 |
Spindle motor and disk drive apparatus
{circle around (1)} A spindle motor includes a fixing portion defined by a bearing portion, a holder portion, a gap between the bearing portion and the holder portion, and an adhesive arranged in the gap. {circle around (2)} The fixing portion includes first and second protruding surfaces arranged to protrude radially from a first and a second one, respectively, of an outside surface of the bearing portion and an inside surface of the holder portion; and first and second boundary surfaces arranged to join the first and second surfaces, respectively, to the first and second protruding surfaces, respectively. {circle around (3)} At least a portion of the first boundary surface is arranged above the second boundary surface. {circle around (4)} The first and second protruding surfaces are arranged radially opposite to the second and first surfaces, respectively, with a first and a second gap, respectively, intervening therebetween. {circle around (5)} The first boundary surface is arranged opposite to the second boundary surface with a third gap intervening therebetween. {circle around (6)} The adhesive is arranged to extend from the third gap to at least a portion of each of the first and second gaps. |
| US09484054B2 |
Optical disc information device and information processing device
An optical disc information device is an optical disc information device for reproducing and/or recording information with respect to an optical disc including a track in the form of a groove, and capable of recording information in a land portion and in a groove portion of the groove. The optical disc information device includes a laser light source, an objective lens, a transmittance limiting element, a dividing element, a light detector, a central amplifier, at least two end amplifiers, a gain controller, an adder, a reproduction signal processor, and a control signal processor. The transmittance limiting element includes a first central region, and at least two first end regions which interpose the first central region therebetween, and attenuates light passing through at least the first end regions out of a light flux emitted from the laser light source more strongly than light passing through the first central region. |
| US09484053B2 |
Optical information recording medium and optical information recording medium reproducing device
Provided is a CAV or a zone CAV. A groove which continuously wobbles is preliminary formed and information is recorded in the groove and a land adjacent to the groove, the groove has a first wobble part which is modulated by groove address information, a second wobble part which is modulated by address information of one adjacent land, and a third wobble part which is modulated by address information of the other adjacent land, a first section sandwiched between the second wobble parts of adjacent two grooves and a second section sandwiched between the third wobble parts of the adjacent two grooves are formed on the land, and one of phases of wobbles on both sides of the first section and phases of wobbles on both sides of the second section are substantially in-phase. |
| US09484051B1 |
Method and system for reducing undesirable reflections in a HAMR write apparatus
A heat-assisted magnetic recording (HAMR) write apparatus is coupled with a laser that provides energy. The HAMR write apparatus includes a pole, at least one coil, a waveguide, a near-field transducer (NFT) and at least one antireflective mechanism. The pole writes to a region of the media and includes a media-facing surface. The coil(s) energize the pole. The waveguide is optically coupled with the laser and includes a core and cladding. The waveguide is for directing a portion of the energy toward the NFT, which is located in a transmission direction from the core of the waveguide. The antireflective mechanism(s) are in at least one of a first position in the waveguide, a second position in the NFT and a third position between the waveguide and the NFT. |
| US09484048B2 |
Magnetic head with a heating element between the read and write element and method of manufacturing thereof
According to one embodiment, a magnetic head includes a write element, a read element, and a heating element disposed between the write element and the read element. When power is applied to the heating element, either the read element or the write element projects beyond a plane of an air-bearing surface (ABS) of the magnetic head, and when power is not applied to the heating element, a portion of the ABS of the magnetic head facing a magnetic disk close to the heating element has a concave shape. In another embodiment, when power is applied to the heating element, at least one of a portion of the read element and a portion of the write element approaches a magnetic disk, and when power is not applied to the heating element, a portion of the ABS of the magnetic head facing a magnetic disk close to the heating element has a concave shape. |
| US09484047B2 |
Attaching optical components using homogenized laser light
An attachable optical component is aligned with a base optical component. The attachable optical component has a mounting surface interfacing with the base optical component and an exposed surface opposed to the mounting surface. Laser light is directed to the exposed surface of the attachable optical component for delivery to the mounting surface. The attachable optical component guides and homogenizes the laser light delivered to the mounting surface and uniformly heats a bonding feature between the mounting surface and the base optical component. The directing and subsequent removing of the laser light bonds the attachable optical component to the base optical component via the bonding feature |
| US09484041B1 |
Backward-compatible communication system components
A communication system with a base station configured to determine a codec to use with end units, such that, in response to a determination that a first end unit uses a first set of access information, the base station registers the first end unit to the base station, setting the first codec to be used for communications with the first end unit, and, in response to a determination that a second unit uses a second set of access information, the base station registers the second end unit to the base station, setting the second codec to be used for communications with the second end unit. The communication system also comprises an end unit configured to determine the codec used by the base station and set the determined codec as the codec to use for communications with the base station. |
| US09484039B2 |
Method and an apparatus for processing an audio signal
An apparatus for processing an audio signal and method thereof, the method including receiving a downmix signal including at least one normal object signal, and a bitstream including object information determined when the downmix signal is generated; extracting an extension type identifier indicating whether the downmix signal further includes a multi-channel object signal, from an extension part of the bitstream; extracting spatial information from the bitstream when the extension type identifier indicates that the downmix signal further includes the multi-channel object signal; and transmitting spatial information when mode information indicates that the least one normal object signal is to be suppressed. The spatial information is determined when a multi-channel source signal is downmixed into the multi-channel object signal. The mix information is to control an object position or an object level of the at least one normal object signal. |
| US09484038B2 |
Apparatus and method for merging geometry-based spatial audio coding streams
An apparatus for generating a merged audio data stream is provided. The apparatus includes a demultiplexer for obtaining a plurality of single-layer audio data streams, wherein each input audio data stream includes one or more layers, wherein the demultiplexer is adapted to demultiplex each one of one or more input audio data streams having one or more layers into two or more demultiplexed audio data streams having exactly one layer. Furthermore, the apparatus includes a merging module for generating the merged audio data stream based on the plurality of single-layer audio data streams. Each layer of the input data audio streams, of the demultiplexed audio data streams, of the single-layer data streams and of the merged audio data stream includes a pressure value of a pressure signal, a position value and a diffuseness value as audio data. |
| US09484036B2 |
Method and apparatus for detecting synthesized speech
Computer systems employing speaker verification as a security approach to prevent un-authorized access by intruders may be tricked by a synthetic speech with voice characteristics similar to those of an authorized user of the computer system. According to at least one example embodiment, a method and corresponding apparatus for detecting a synthetic speech signal include extracting a plurality of speech features from multiple segments of the speech signal; analyzing the plurality of speech features to determine whether the plurality of speech features exhibit periodic variation behavior; and determining whether the speech signal is a synthetic speech signal or a natural speech signal based on whether or not a periodic variation behavior of the plurality of speech features is detected. The embodiments of synthetic speech detection result in security enhancement of the computer system employing speaker verification. |
| US09484034B2 |
Voice conversation support apparatus, voice conversation support method, and computer readable medium
According to one embodiment, a voice conversation support apparatus includes an input unit, a first determination unit, a second determination unit, a third determination unit, and a scoring unit. The input unit accepts a text data input according to a voice input mode and another input mode. The first determination unit extracts at least one subject keyword representing a current subject from the text data input. The second determination unit estimates a category of a word that can be an answer. The third determination unit calculates a question pair likelihood. The scoring unit calculates a score about a priority of each input mode. |
| US09484032B2 |
Methods and systems for navigating through multimedia content
The disclosed embodiments illustrate methods and systems for processing multimedia content. The method includes extracting one or more words from an audio stream associated with multimedia content. Each word has associated one or more timestamps indicative of temporal occurrences of said word in said multimedia content. The method further includes creating a word cloud of said one or more words in said multimedia content based on a measure of emphasis laid on each word in said multimedia content and said one or more timestamps associated with said one or more words. The method further includes presenting one or more multimedia snippets, of said multimedia content, associated with a word selected by a user from said word cloud. Each of said one or more multimedia snippets corresponds to said one or more timestamps associated with occurrences of said word in said multimedia content. |
| US09484030B1 |
Audio triggered commands
A system is configured to execute audio-initiated commands. The system detects audio and determines if a first sound is included in the audio. The system then processes further incoming audio to detect a second sound. If the second sound is not detected within a time threshold, the system executes a command. The command may include delivering a message, outputting audio corresponding to synthesized speech, or some other executable command. |
| US09484029B2 |
Electronic apparatus and method of speech recognition thereof
An electronic apparatus and a method of speech recognition thereof are disclosed. According to the method of speech recognition of the electronic apparatus, the method includes receiving a speech of a speaker, extracting phonemic characteristics for recognizing a speech and voice print characteristics for registering the speaker by analyzing the received speech of the speaker, and in response to the speech of the speaker corresponding a registered trigger word or phrase, based on the extracted phonemic characteristics, changing an execution mode to a speech recognition mode of the electronic apparatus and registering the extracted voice print characteristics as voice print characteristics of the speaker who spoke the speech. |
| US09484024B2 |
System and method for handling repeat queries due to wrong ASR output by modifying an acoustic, a language and a semantic model
Disclosed herein are systems, computer-implemented methods, and computer-readable storage media for handling expected repeat speech queries or other inputs. The method causes a computing device to detect a misrecognized speech query from a user, determine a tendency of the user to repeat speech queries based on previous user interactions, and adapt a speech recognition model based on the determined tendency before an expected repeat speech query. The method can further include recognizing the expected repeat speech query from the user based on the adapted speech recognition model. Adapting the speech recognition model can include modifying an acoustic model, a language model, and a semantic model. Adapting the speech recognition model can also include preparing a personalized search speech recognition model for the expected repeat query based on usage history and entries in a recognition lattice. The method can include retaining unmodified speech recognition models with adapted speech recognition models. |
| US09484020B2 |
System and method of extracting clauses for spoken language understanding
A clausifier for extracting clauses for spoken language understanding is disclosed. The method relates to generating a set of clauses from speech utterance text and comprises inserting at least one boundary tag in speech utterance text related to sentence boundaries, inserting at least one edit tag indicating a portion of the speech utterance text to remove, and inserting at least one conjunction tag within the speech utterance text. The result is a set of clauses that may be identified within the speech utterance text according to the inserted at least one boundary tag, at least one edit tag and at least one conjunction tag. The disclosed clausifier comprises a sentence boundary classifier, an edit detector classifier, and a conjunction detector classifier. The clausifier may comprise a single classifier or a plurality of classifiers to perform the steps of identifying sentence boundaries, editing text, and identifying conjunctions within the text. |
| US09484018B2 |
System and method for building and evaluating automatic speech recognition via an application programmer interface
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for building an automatic speech recognition system through an Internet API. A network-based automatic speech recognition server configured to practice the method receives feature streams, transcriptions, and parameter values as inputs from a network client independent of knowledge of internal operations of the server. The server processes the inputs to train an acoustic model and a language model, and transmits the acoustic model and the language model to the network client. The server can also generate a log describing the processing and transmit the log to the client. On the server side, a human expert can intervene to modify how the server processes the inputs. The inputs can include an additional feature stream generated from speech by algorithms in the client's proprietary feature extraction. |
| US09484015B2 |
Hybrid predictive model for enhancing prosodic expressiveness
Systems and methods for prosody prediction include extracting features from runtime data using a parametric model. The features from runtime data are compared with features from training data using an exemplar-based model to predict prosody of the runtime data. The features from the training data are paired with exemplars from the training data and stored on a computer readable storage medium. |
| US09484014B1 |
Hybrid unit selection / parametric TTS system
In a text-to-speech (TTS) system, a database including sample speech units for unit selection may be include both units represented by sample audio segments as well as parametric representations of units created by Hidden Markov Models (HMMs). Inclusion of parametric representations in the database may reduce the storage necessary to maintain the database. The parametric representations may be configured to match a voice of the audio segments. The parametric representations may correspond to phonetic units that are less frequently encountered in TTS processing, such as rare diphones or phonemes corresponding to foreign languages. Multiple foreign language HMM models may be used to enable polyglot synthesis with a reduction in storage capacity requirements. Parametrically stored speech units may be combined with speech segments generated during processing time by a parametric model. |
| US09484012B2 |
Speech synthesis dictionary generation apparatus, speech synthesis dictionary generation method and computer program product
According to an embodiment, a speech synthesis dictionary generation apparatus includes an analyzer, a speaker adapter, a level designation unit, and a determination unit. The analyzer analyzes speech data and generates a speech database containing characteristics of utterance by an object speaker. The speaker adapter generates the model of the object speaker by speaker adaptation of converting a base model to be closer to characteristics of the object speaker based on the database. The level designation unit accepts designation of a target speaker level representing a speaker's utterance skill and/or a speaker's native level in a language of the speech synthesis dictionary. The determination determines a parameter related to fidelity of reproduction of speaker properties in the speaker adaptation, in accordance with a relationship between the target speaker level and a speaker level of the object speaker. |
| US09484008B2 |
Method and apparatus for down-mixing of a multi-channel audio signal
A method for down-mixing of a m-channel audio signal (L, R, C, Ls, Rs, Rss, Lss) into a n-channel audio signal (Ro, Lo, Rso, Lso), where m is an integer for which holds m>n and n is an integer for which holds n≧2, including the step of generating one of the n-channel audio signals of one side (right or left) of a listener (Ro, Lo, Rso, Lso), by a combination of: a first term including a signal component (R, L, Rs, Ls) of the m-channel audio signal of the same side only, and a second term dependent of m, including one or more of further signal components of the m-channel audio signal (C, Ls, Rs, Rss, Lss) of the same side only, multiplied by at least one respective filtering function (H1, H2, H3, H4, H5, H6, H7, H8), said filtering function being dependent on: a frequency characteristic of the transmission path between the position of the loudspeaker of the respective signal component of the further m-channel audio signal, and a position of the right ear or left ear, respectively, of a listener in an m-channel reproduction situation, and a frequency characteristic of the transmission path between the position of a loudspeaker of the said one of the n-channel audio down-mixed signals, (Ro, Lo, Rso, Lso), and a position of the right ear or left ear, respectively, of a listener in an n-channel reproduction situation. |
| US09484007B1 |
Tremolo stop tuner and tremolo stabilizer
TREMOLO STOP TUNER is integrated into the spring block portion of a traditional fulcrum tremolo, and moveable therewith about the tremolo pivot axis, comprising an adjustment device to adjust the tension of the traditional tremolo springs with the capacity to stop or block the tremolo at the equilibrium point or initial position. One embodiment includes the option to configure the novel Tremolo Stop Tuner elements as either a Global Tuner or a Stop Tuner and includes an optional setscrew for improving coupling. |
| US09484002B2 |
System and method for adaptive and persistent media presentations
Systems and methods providing for an advertisement (media) is designed using segments that can be added or subtracted are provided. By adapting the various segments of an advertisement to fit the orientation of the displaying device, and to be persistent on the display without overlaying the application being viewed by the user, it is possible to increase viewing time of the displayed media. In one embodiment, the various segments are sized to be displayed in areas (such as preview areas) of the display that the user does not typically use for his/her main work. In this manner, the displayed media is adapted for display area and does not intrude on the viewing area. |
| US09484001B2 |
Portable electronic device controlling diffuse light source to emit light approximating color of object of user interest
A trigger event causes a portable electronic device to capture an image of an object in which a user has expressed interest. The trigger event can be an express command or an implied, or inferred, indication of the user's interest in the object. With an image of the object captured, the portable electronic device determines a predominant color, and controls one or more diffuse light sources associated with the portable electronic device to emit light that approximates the determined color. The one or more diffused light sources controlled in this manner can include multi-color light emitting elements located at a housing of the portable electronic device, multi-color light emitting elements located at a case accessory of the portable electronic device (e.g., a case cover, holster, etc.), or a combination thereof. |
| US09484000B2 |
Signal conversion method for display image
A signal conversion method for a display image is provided. The signal conversion method includes: receiving an image data of the (N−1)th frame; converting the (N−1)th image data to obtain a luminance data; determining a signal tuning gain of an image data of Nth frame according to the image data of the (N−1)th frame, the luminance data and a backlight duty adjusting table; adjusting an image data of Nth frame according to the signal tuning gain of Nth frame so as to generate an output image data of Nth frame; and displaying pixels according to the output image data of Nth frame. |
| US09483999B2 |
Laser projection display device and laser drive control method
A laser projection display device includes: a laser light source drive unit; an attribute amount detection unit for detecting the attribute amount of a picture signal; a light sensor for measuring the light amounts of the laser light sources; and a temperature sensor for measuring the temperatures of the laser light sources. The laser projection display device is configured so that the current vs. light amount output characteristics of the laser light sources with a threshold current and current gain as a parameter are corrected in accordance with the load amount of the picture signal per frame if the change of the attribute amount exceeds a predefined amount; the light sources are driven at a predefined timing of the vertical blanking interval; controls the threshold currents and current gains in accordance with the light amounts; and the threshold currents and current gains are corrected on the basis of the measured temperatures. |
| US09483994B2 |
Liquid crystal display and gate discharge control circuit thereof
A liquid crystal display (LCD) and a gate discharge control circuit thereof are provided. The gate discharge control circuit has a first voltage division circuit, a control circuit, a second voltage division circuit and at least a discharge switch. A switch of the control circuit operates according to a first DC voltage so as to be turned on when the LCD is powered on and to be turned off during shutting down the LCD. The first voltage division circuit divides a second DC voltage to output a divided voltage. A falling speed of the second DC voltage is less than that of the first DC voltage. During shutting down the LCD, voltage levels of a first end and a control end of the discharge switch are pulled up because of operations of the first and second voltage division circuits, such that discharge operations of pixels of the LCD are performed. |
| US09483993B2 |
Gate drive circuit
A gate drive circuit is disclosed. The gate drive circuit comprises multi-stage of GOA drive unit, and each stage of GOA drive unit comprises a signal afferent unit, used for outputting a pull-down control signal; an output unit, used for outputting a first gate signal and a second gate signal; a pull-up control unit, used for outputting a pull-up control signal; and a pull-up sustaining unit, used for pulling up an electric potential of the control end of the output unit to an electric potential of the direct-current power supply according to the pull-up control signal, so that the first gate signal and the second gate signal are maintained in a high-level state. |
| US09483992B2 |
Gate drive circuit
A gate drive circuit comprising multistage gate drive on array (GOA) drive units is provided. Each stage of GOA drive unit comprises a pull-up control part, a pull-up part, a key pull-down part, and a pull-down holding part. The pull-down holding part comprises a bridging module, a first and a second pull-down holding modules. When the bridging module is in a shutoff state, the first and the second pull-down holding modules work alternately, whereby a potential at the gate signal output end and/or a potential at the control end of the pull-up part are/is kept at a potential of the direct current power source according to a pull-down holding control signal. |
| US09483991B2 |
Liquid crystal display device and driving method thereof
Disclosed is an organic light emitting display device which includes: a liquid crystal display panel configured to include at least one common electrode bar and a plurality of divisional areas defined along a length direction of the at least one common electrode bar; a common voltage controller configured to divide a single frame into a plurality of intervals corresponding to the plurality of divisional areas and generate a common voltage control signal in each interval; and a common voltage compensator configured to generate a compensated common voltage on the basis of the common voltage control signal in each interval and apply the compensated common voltage to the at least one common electrode bar of the liquid crystal display panel. |
| US09483990B2 |
Gate driver on array (GOA) circuit and LCD device using the same
A gate driver on array (GOA) circuit for a liquid crystal display is disclosed. The GOA circuit includes multiple cascaded GOA units, and a Nth stage GOA unit controls a charging of a Nth stage horizontal scanning line of a display area. The Nth stage GOA unit includes a pull-up circuit, a pull-down circuit, a first pull-down holding circuit, a second pull-down holding circuit, a pull-up control circuit, a transfer circuit, and a boast capacitor. The present invention also discloses a liquid crystal display (LCD) device. The present invention can decrease the cost of the LCD device, improve the functionality of the GOA circuit, and increase the operation life. |
| US09483989B2 |
Method of adjusting source voltage by vertical portion for driving display panel and display apparatus performing the method
A method of driving a display panel includes determining a source voltage level by a vertical portion in a present horizontal line of the display panel based on data of the present horizontal line, the display panel including a plurality of vertical portions extended along a vertical direction and arranged in a horizontal direction (the plurality of vertical portions including a vertical portion), generating correction data of the present horizontal line by the vertical portion utilizing the source voltage level of the present horizontal line determined by the vertical portion, generating a source voltage of the present horizontal line by the vertical portion utilizing the source voltage level of the horizontal line determined by the vertical portion, and driving the display panel by the vertical portion utilizing the correction data and the source voltage of the present horizontal line. |
| US09483988B2 |
Driving method and driving device for liquid crystal panel, and display device
The present invention relates to a liquid crystal display and more particularly to a driving method and driving device for a liquid crystal panel, and to a liquid crystal display device comprising a liquid crystal panel. The driving method comprises: receiving an original input signal; judging whether or not a current time is within a signal conversion phase; and when the judgment result indicates that the current time is within the signal conversion phase, generating a target driving signal based on the original input signal, and outputting the target driving signal to a data line of a liquid crystal panel or generating an original driving signal based on the original input signal and outputting the original driving signal to the data line. The polarity of the target driving signal is opposite to that of the original driving signal. An amplitude of the target driving signal corresponding to a first frame within the signal conversion phase is less than an amplitude of the original driving signal. |
| US09483979B2 |
Pixel circuit, driving method thereof, and display device
Provided are a pixel circuit, a driving method thereof, and a display device, which relate to the field of the display technology and can effectively compensate variation in currents due to ununiformity and drift of threshold voltages of driving Thin Film Transistors as well as ununiformity of OLEDs. The pixel circuit comprises: a light-emitting element; a driving TFT; a first TFT having a drain connected to a gate of the driving TFT; a second TFT having a drain connected to a source of the driving TFT; a third TFT having a source connected to a drain of the driving TFT, and a drain connected to the light-emitting element; a fourth TFT having a source connected to the gate of the driving TFT, and a drain connected to the drain of the driving TFT; a fifth TFT having a drain connected to the source of the driving TFT; and a capacitor. |
| US09483975B2 |
Color space conversion methods for electronic device displays
An electronic device may include a display having an array of display pixels. Storage and processing circuitry may generate display data for the display in an RGB input color space. The display may display the display data in an RGBW output color space. Display control circuitry may use sets of predetermined conversion factors to convert display data from the RGB input color space to the RGBW output color space without requiring conversion to a device-independent color space. Each set of predetermined conversion factors may be associated with a color in a set of predetermined colors. Using the sets of predetermined conversion factors, the display control circuitry may convert RGB values in the input color space to RGBW values in the output color space. The display control circuitry may supply data signals corresponding to the display data in the RGBW output color space to the array of display pixels. |
| US09483974B2 |
Method and apparatus for displaying keypad using organic light emitting diodes
A method and an apparatus for displaying a keypad on a touch screen are provided. The apparatus includes an Organic Light Emitting Diode (OLED). The method includes arranging at least one keypad block including at least one area, determining at least one light-emitting area among the areas, and displaying the at least one keypad block by emitting light in the OLED corresponding to the at least one light-emitting area. |
| US09483972B2 |
Display device, display method, and electronic system
A display method includes: performing display by driving a display pixel at a drive interval that conforms to a weight of each bit in a gray-scale code that includes the bits; and so correcting the drive interval, the gray-scale code, or both of the drive interval and the gray-scale code as to change a luminance of the display pixel smoothly. |
| US09483965B2 |
Optical sheet for graphic image displays
In one embodiment, a graphic image display can comprise: a backlight source; a light transmitting first sheet having a viewing side and a backside, with a plurality of geometric microstructure units on the backside; and a second layer comprising a source of graphic image information. The plurality of geometric microstructure units can be selected from microlenses, polyhedral shapes, lenticular shapes, and combinations comprising at least one of the foregoing. The graphic image display can be suitable for viewing under ambient light from the viewing side alone, under backlighting alone, and in the presence of both ambient light from the viewing side and backlighting. |
| US09483963B2 |
Display assembly and system for paint sample cards
A display assembly is provided with a base, and a plurality of receptacles supported by the base. Each of the plurality of receptacles is sized to receive a plurality of cards. Each of the plurality of receptacles has a distal end with an opening for display, receipt and removal of at least one of the plurality of cards and a proximal end to provide a limit to a depth of receipt for the plurality of cards within the receptacle. Each receptacle is oriented such that a direction from the distal end to the proximal end is angularly offset from vertical about a fore/aft axis relative to the base for customer access of at least one of the plurality of cards. Multiple arrays of receptacles are provided with a central array having a quantity of receptacles that is different than the other arrays to create a non-rectangular overall profile. |
| US09483962B2 |
Perforated, combined receipt and label roll
A receipt and label roll comprises a core and a web having a longitudinally-extending axis and wound on the core along the axis. The web includes (i) a substrate having a front side and a back side opposite the front side, (ii) a thermally-sensitive coating disposed on the front side of the substrate, (iii) adhesive disposed on a portion of the back side of the substrate along the web axis, and (iv) a release coating disposed on the front side of the substrate along the web axis to prevent the adhesive from sticking to the front side of the substrate when the web is wound on the core. The web further includes (v) a longitudinal weakened structure extending along a direction parallel to the web axis and dividing the web into a first web portion on which the adhesive is disposed and a second web portion which is substantially devoid of adhesive. |
| US09483961B1 |
Water conservation educational mat and kit
The water conservation educational mat includes a water-impermeable and flexible sheet, having opposed top and bottom surfaces, and with a plurality of first openings and a plurality of apertures being formed therethrough. A plurality of flexible reservoirs are respectively received by, and seal, the plurality of first openings. In use, a volume of water may be received within one of the plurality of flexible reservoirs and users may manipulate the water-impermeable and flexible sheet to cause the volume of water to flow from one of the plurality of flexible reservoirs to another one of the plurality of flexible reservoirs. The plurality of apertures serve as obstacles to be avoided during water transfer. |
| US09483960B2 |
Method and apparatus for dimensional proximity sensing for the visually impaired
A method, non-transitory computer readable medium, and apparatus for providing a dimension and a proximity of an object are disclosed. For example, the method receives a three dimensional depth map expressed as a two dimensional array of gray values, rasterizes the two dimensional array of gray values into vertical scan lines and horizontal scan lines for a left speaker and a right speaker and converts the vertical scan lines and the horizontal scan lines into a double beep, wherein a first beep of the double beep represents a vertical dimension of the object, the second beep of the double beep represents a horizontal dimension of the object, an intensity of each beep of the double beep represents the proximity of the object and a frequency spectrum of the double beep represents a shape of the object. |
| US09483959B2 |
Welding simulator
Embodiments of the present invention pertain to a computer program product and processor based computing system that provides processing means for executing coded instructions and input means for interacting with said processing means to create a virtual welding environment. The system establishes an objective to change a functional or operational state of a virtual article, and directs the end user to perform at least one virtual welding operation for changing its functional state. The system trains new users and inexperienced welders on the fundamental aspects of welding. |
| US09483956B2 |
Stringed musical instrument performance feedback system and method
A real time performance pressure feedback system for a stringed instrument includes a pressure sensor, a desired pressure input device, a feedback device, and a controller. The pressure sensor is configured to be fixedly and removably attached to the stringed instrument on a pressure surface, and to generate a pressure signal indicative of a pressure being applied to the pressure surface. The desired pressure user input device is configured to receive a desired pressure input and to generate a desired pressure signal indicative of the desired pressure input. The feedback device is configured to generate feedback to a performer at least in part in response to a performance feedback signal. The controller is communicatively connected to the pressure sensor, the desired pressure user input, and the feedback device, and is configured to generate the performance feedback signal at least in part in response to the pressure signal. |
| US09483955B2 |
Fractal-based decision engine for intervention
A method/apparatus/system for educational intervention based on a response metric is disclosed. The notice is generated in response to the collection of user and question data, the sending of questions, the receipt of answers, the evaluation of the correctness of the answers, the generation of a response metric, the comparison of the response metric to a threshold, and the generation of the report or notice. The response metric can be reflect the scatter, randomness, and/or slope of student provided answer data, and can be a fractal dimension. |
| US09483953B2 |
Voice learning apparatus, voice learning method, and storage medium storing voice learning program
A voice learning apparatus includes a learning-material voice storage unit that stores learning material voice data including example sentence voice data; a learning text storage unit that stores a learning material text including an example sentence text; a learning-material text display controller that displays the learning material text; a learning-material voice output controller that performs voice output based on the learning material voice data; an example sentence specifying unit that specifies the example sentence text during the voice output; an example-sentence voice output controller that performs voice output based on the example sentence voice data associated with the specified example sentence text; and a learning-material voice output restart unit that restarts the voice output from a position where the voice output is stopped last time, after the voice output is performed based on the example sentence voice data. |
| US09483951B1 |
Airborne system and method for detecting and avoiding atmospheric particulates
An airborne system for detecting and avoiding atmospheric particulates, which include a sensor coupled with an aircraft and configured to capture electromagnetic signals from a flight path of the aircraft, including infrared wavelengths, an output device configured to provide visual and an aural messages to a flight crew, and a processor coupled with sensor, the output device, and a non-transitory processor-readable medium storing processor-executable instructions for causing the processor to: receive a signal from the sensor via an input port; calculate a temperature difference between a first and second infrared wavelengths; determine a presence of atmospheric particulates in the flight path based on the temperature difference; generate an aural message and/or a visual message indicative of the presence of atmospheric particulates; and provide the message to a flight crew. The processor may calculate an alternate flight path and provide the alternate flight path to the flight crew. |
| US09483950B2 |
Flight control for flight-restricted regions
Systems, methods, and devices are provided for providing flight response to flight-restricted regions. The location of an unmanned aerial vehicle (UAV) may be compared with a location of a flight-restricted region. If needed a flight-response measure may be taken by the UAV to prevent the UAV from flying in a no-fly zone. Different flight-response measures may be taken based on the distance between the UAV and the flight-restricted region and the rules of a jurisdiction within which the UAV falls. |
| US09483945B2 |
Vehicle control device and vehicle control method
A vehicle control device for starting a drive assist in accordance with relative positional relationship between a self vehicle and an object around the self vehicle, comprises a control value calculating part which calculates a control value based on an inter-vehicular distance between the self vehicle and the object, a velocity of the self vehicle, a relative velocity of the object to the self vehicle, and an acceleration-related value obtained based on at least one of an acceleration of the self vehicle and an acceleration of the object; an acceleration-related value adjusting part which adjusts the acceleration-related value by changing a degree of contribution of at least one of the acceleration of the self vehicle and the acceleration of the object in the acceleration-related value in accordance with the acceleration of the self vehicle; and a drive assist start judging part which starts the drive assist if the control value is greater than a threshold value. |
| US09483944B2 |
Prediction of free parking spaces in a parking area
Embodiments of the present invention disclose a computer implemented method, computer program product, and system for management of parking spaces in a parking area. Identifying an individual entering a parking area and a vehicle in the parking area that corresponds to the identified individual. Determining a distance between the identified individual and the identified vehicle in the parking area. Determining whether the identified individual is moving toward the identified vehicle. Responsive to determining that the identified individual is moving toward the identified vehicle, determining whether the determined distance is less than an associated distance threshold condition. In another embodiment, detecting a parking ticket entering the parking area and identifying an individual and a vehicle in the parking area that correspond to the detected parking ticket. |
| US09483943B2 |
Device and method of detecting parking space
A device for detecting a parking space includes: a signal pre-processing unit configured to filter ultrasonic signals emitted from ultrasonic sensors attached to a vehicle, and reflected and returned from a corner section of an obstacle; a corner estimating unit configured to extract a crossing point of a plurality of circles each having a measurement distance as a radius, wherein the measurement distances are collected from the received ultrasonic signals according to a movement of the vehicle, estimate a reflection angle between a first line for bisecting a detection region of the ultrasonic sensor, which has an attachment position of the ultrasonic sensor as a reference point, and a second line for connecting the reference point and the crossing point, and estimate the corner section based on the estimated reflection angle; and a parking space detecting unit configured to detect a parking space according to the estimated corner section. |
| US09483940B2 |
Method and system for adapting the driving-off behavior of a vehicle to a traffic signal installation, and use of the system
The invention relates to a method for adapting the driving-off behavior of a vehicle to a traffic signal installation, in which method the traffic signal installation permits passing in a first state and forbids passing in a second state. By means of vehicle-to-X communication means, state information and time information of the traffic signal installation are received by the vehicle and forwarded by the vehicle to a traffic light phase assistance system. Furthermore, the vehicle receives presence information comprising at least position indications from surrounding vehicles that are capable of vehicle-to-X communication. In addition, the position of the vehicle is determined by means of position-determining means. The method is characterized in that the position indications received by means of vehicle-to-X communication are displayed to the driver and the driving-off behavior is adapted in dependence on the state information and the time information and the presence of surrounding vehicles that are not capable of vehicle-to-X communication. The invention further relates to a corresponding system and a use of the system. |
| US09483937B2 |
Wireless beacon devices providing crosswalk management through communication device connections
There are provided systems and methods for wireless beacon devices providing crosswalk management through communication device connections. A user may travel with a device, such as a communication device, that includes a communication module that may utilize specialized hardware features to establish short range wireless communications with nearby wireless beacons. The wireless beacons may be established at or nearby crosswalk locations. The beacon may provide the aforementioned communication services with the communication device and be utilized to triangulate a position, path of travel, and speed of travel of the user. Calendar, travel route, and other information for the user may also be determined using the beacons. Thus, a crosswalk signal may be changed in anticipation of the user crossing. Further, if the user requires additional time to cross based on triangulating the user's location in the crosswalk, the signal may be further changed based on the user's location. |
| US09483936B2 |
Remote controller and control method thereof, display device and control method thereof, display system and control method thereof
A display system, a display device, and a remote controller for controlling the display device are provided. The remote controller includes: a touch screen which receives an input from a user and display a first manipulation UI group including a shortcut key corresponding to a plurality of buttons to control the display device; a signal output unit which outputs a control signal to the display device based on an input to the touch screen; and a controller which, in response to a user's selection of the shortcut key, displays on the touch screen a second manipulation UI group and parts of the first manipulation UI group, the second manipulation UI group displaying the plurality of buttons. |
| US09483931B2 |
System and method for automated response to distress signal
A system for facilitating automated response to a distress signal includes an attachment for a multifunction mobile computing device. In some embodiments, the attachment removably articulates to a sensor location coupled to a housing of the multifunction mobile computing device. In some embodiments, the system includes a computer program product in a non-transitory computer-readable medium. In some embodiments, the program instructions are computer-executable by the multifunction mobile computing device to implement detecting a disarticulation of the attachment from the sensor location on the multifunction mobile computing device, and, responsive to the detecting the disarticulation of the attachment from the sensor location on the multifunction mobile computing device, transmitting to a distress signal response receiver over a radio-frequency network from a radio-frequency transmitter located within a housing of the multifunction mobile computing device the distress signal. |
| US09483929B1 |
Overload detection for electrical wiring
An apparatus includes a power cord and multiple overload detection sensors connected to the power cord based on a type of overload detection. The type of overload detection includes one or more of: thermal detection, voltage drop detection, and current reading detection. The overload detection sensors are powered from a same power supply as the electrical power cord by direct wiring or inductive coupling. An overload detection triggers one or more actionable events powered by the power cord. The actionable events include circuitry for one or more of: a ground fault circuit interrupter (GFCI) trip, a visual signal, an audible alarm, radio frequency identification (RFID) communication signaling, a wired or wireless communication. |
| US09483927B2 |
Method and system for controlling a vehicle during an autonomous control mode
A method and control system for maintaining attentiveness of a driver of a vehicle during an autonomous control mode. A series of cognitively demanding tasks is presented to the driver via a man-machine interface during the autonomous control mode. Driver responses to the tasks are monitored, and an audible alert is provided to the driver if the response of the driver and/or a reaction time of the driver in making the response indicate an insufficient level of driver attentiveness. |
| US09483923B2 |
Electric tactile sense presentation device
A tactile sense presentation device is provided which is simple in structure, and is able to give a real tactile sense to a human body by causing electrical stimulation to effectively act thereon, while holding original human tactile sense. The electric tactile sense presentation device includes an electrode substrate adapted to be worn on a human body so as to be in contact with a skin, and a multitude of electrodes formed on a contact surface of the electrode substrate for contact with the skin to present a tactile sense by means of electrical stimulation, wherein the electrode substrate is composed of a flexible circuit body which is flexible to enable a portion thereof in contact with a real object to flexibly deform so as to conform to deformation of the skin, and it is configured such that electrical stimulation by the electrodes is superimposed on the tactile sense of a human being, while maintaining the human tactile sense. |
| US09483922B2 |
Shaker apparatus and related methods of transmitting vibrational energy to recipients
Disclosed is a shaker element. In a preferred embodiment, the shaker element is provided with an electrical signal so that the shaker element can impart mechanical motions of the music to a listener whereby the listener can “feel” the music. |
| US09483920B1 |
Color changing payment card
A method includes receiving, on an electronic payment device, a radio frequency signal from a mobile electronic device. The radio frequency signal is used to control an activation of an electric current to one or more color producing components on the electronic payment device. The electric current is transmitted to the one or more color producing components. The one or more color producing components display a color when the electric current is transmitted to the color producing components. |
| US09483919B2 |
Light indicator
Light indicator which comprises a support structure provided with multiple seats, each of which housing at its interior rows of LEDs and a power supply circuit providing electrical power supply to the LEDs. The light indicator also comprises collimation lenses each positioned in front of the corresponding row of LEDs, and an insulating material layer deposited in each seat to cover the power supply circuit. Each lens extends parallel to the corresponding row of LEDs, and on the rear part is provided with an abutment portion fixed on the base surface of the seat and provided with a rear groove housing the row of LEDs. The abutment portion of each lens is closed transversely and longitudinally by longitudinal and transverse walls defining a rear edge which adheres to the base surface of the seat in order to prevent the insulating material from penetrating into the rear groove. |
| US09483914B2 |
Community game that adapts communal game appearance
A community game that adapts a scene on a community display based on the number of participating players and/or player locations from one session of the community game to another or in any given session and/or number of the gaming terminals. Selectable elements are displayed on the community display for selection by the participating players. When additional players are eligible to participate in the community game, a field of view or a virtual camera angle of a scene is changed to reveal additional selectable elements or a greater variety of selectable elements than were available for selection with fewer participating players. Any of the selectable elements can be cooperatively selectable elements which multiple players can select to reveal an enhanced award. Based on the players' locations, the scene can be adapted to portray selectable elements or previously hidden or obscured areas of the scene closest to the newly participating player(s). |
| US09483913B2 |
Apparatus and methods for playing electronic table card games
Electronic card game devices and methods incorporate progressive jackpot operations controlled by a central server computer. If a system game device is selected by the central server computer to win a progressive jackpot award, the system game device is programmed to display secondary game outcome symbols on playing cards being displayed during game play to indicate winning of the award. |
| US09483912B2 |
Electronic gaming device with repeat payline functionality
Examples disclosed herein relate to systems and methods, which may receive wagers on one or more repeat paylines. The systems and methods may receive one or more secondary wagers on one or more repeat paylines. The repeat paylines may be based on data received from a player. The systems and methods may determine a repeat paylines payout based on the one or more repeat paylines. |
| US09483911B2 |
Information distribution in gaming networks
Patron information generated at an originating gaming property may be transmitted to a requesting gaming property based on a set of permissions associated with a group of gaming properties. Vouchers generated at a first gaming property may also be redeemed at a second gaming property. |
| US09483909B2 |
Gaming device having multiple game play option
Embodiments of this concept are directed to gaming devices that are configured to initiate multiple gaming events in response to a player input. The gaming device may include game initiating inputs that initiate a predetermined number of gaming events in response to the player input, or the gaming device may include configurable game initiating inputs that initiate a number of gaming events specified by the player, specified the gaming device, or specified by a gaming server. The gaming device or gaming server may set the number of initiated game events in response to the occurrence of a triggering event. |
| US09483907B2 |
Gaming system
A gaming machine (12) is disclosed which comprises at least one meter (76) arranged to generate game meter data. The gaming machine (12) is arranged to forward meter data generated by the at least one meter (76) to a remote data storage device (26) arranged to store meter data associated with a plurality of games. The gaming machine (12) is also arranged to retrieve meter data associated with a game from the remote data storage device (27) when the gaming machine is requested to provide the meter data associated with the game. An associated gaming system and method of gaming are also disclosed. |
| US09483903B2 |
Gaming device and method for providing wagering for additional symbol functionality and package betting
A gaming device which includes a plurality of different predefined wager packages. Each predefined wager package is associated with a wager amount or value and includes one or more of a plurality of different game play features. In operation, the gaming device enables players to wager an amount equal to one of the plurality of predefined wager packages available to the player. The game play features associated with the wagered on predefined wager package are activated for one or more plays of a game. |
| US09483901B2 |
Gaming device docking station
In one embodiment, a system to authorize a mobile electronic device to play games of chance includes a gaming system manager and a portable docking station configured to: (i) detect whether the mobile electronic device is connected to a receiver of the portable docking station; (ii) receive device information from the mobile electronic device if it is detected that the mobile electronic device is connected to the receiver; (iii) determine whether the games of chance can be played on the mobile electronic device based on the received device information; (iv) authorize the mobile electronic device to play the games of chance; and (v) transmit gaming data to the mobile electronic device if it is determined that the games of chance can be played on the mobile electronic device and if the mobile electronic device is authorized. |
| US09483898B2 |
Player-entry assignment and ordering
A method of assigning a player-entry to a table so that said player-entry can participate in a hand of a particular card game at said table, wherein there is a plurality of players each having one or more respective player-entries for participating in a respective hand of said card game, wherein a player-entry that is actively participating in a hand of said card game may fold out of turn from said hand so as to no longer be actively participating in said hand, the method comprising: for a first player-entry of a first player, identifying an assignable table for said first player-entry from a plurality of tables for said card game, wherein a table is an assignable table for a particular player-entry if the assignment of said particular player-entry to said table cannot itself provide any player with further information about a hand in which an already assigned player-entry of said player is actively participating in addition to information about said hand that is available to said player only by virtue of the participation of said already assigned player-entry in said hand; and assigning the first player-entry to the identified assignable table. |
| US09483897B2 |
Linear dispensing system with universal escapement
A universal escapement is provided that is configured to receive inventory products of different shapes from a dispensing system carrier unit in substantially the same orientation, and to read informational indicia on the inventory product. The escapement includes a slide plate having an integral glass portion, a reader disposed behind the glass portion to read indicia on the inventory products and scan images of the inventory products before labeling, a plurality of imaging devices configured to read informational indicia on the sides and ends of the products, and an imaging device configured to read informational indicia on a label after it is applied to the inventory product. The escapement includes a shuttle assembly having a plurality of imaging devices configured to read information indicia on the bottom of the inventory products. The escapement also includes first and second guide members movably disposed for receiving inventory products of various sizes therebetween. |
| US09483896B2 |
Dispensing and display system
A system for controlling advancement of and access to product and for generating data associated with such advancement and access. Systems of this invention include a pusher system having a track, a pusher, and mechanisms for generating data relating to the movement of the pusher. Certain embodiments of the invention include a door assembly, which controls consumer access to product located behind the door assembly, a stop for limiting the forward progression of the pusher along the track, and mechanisms for generating data relating to when and/or for how long the door assembly is open. |
| US09483895B2 |
Paper money identification method and device
The disclosure discloses a paper money identification method and device. The paper money identification method comprises: obtaining entire grayscale image data of the paper money to be tested; dividing the entire grayscale image of the paper money to be tested into a plurality of areas; comparing the feature value of each area with feature value of a corresponding area in a paper money template to judge whether the two compared areas are matched; counting the number of unmatched areas of the paper money to be tested; judging whether the number of the unmatched areas is greater than a second preset threshold; and determining that the paper money to be tested is the altered money when the number of the unmatched areas is judged to be greater than the second preset threshold. By the disclosure, the accuracy of identifying the altered money is improved. |
| US09483892B2 |
Smart key apparatus and method for processing signal of smart key apparatus
A smart key apparatus and a method of processing a signal from the smart key apparatus is provided and the smart key apparatus includes a plurality of antennas that receive a Low Frequency (LF) signal from a vehicle via a plurality of reception axes. In addition, an LF reception controller receives the LF signal via a reception antenna which is determined by sequentially verifying a reception level according to a set order of the plurality of antennas when receiving the LF signal and determines an antenna having a highest reception level as a reception antenna by comparing a reception level that corresponds to a plurality of antennas respectively. A signal processing unit processes the LF signal received via the reception antenna. |
| US09483884B2 |
Smart phone app-based remote vehicle diagnostic system and method
Provided is a remote vehicle diagnostic system which utilizes a smart phone as a centralized communication hub between a vehicle and several remote resources. The system includes a program downloadable onto the smart phone to program the phone to perform desired functionality. The smart phone app may allow the smart phone to operate in several different modes, including a diagnostic mode and an emergency mode. In the diagnostic mode, the smart phone may relay vehicle data from the vehicle to a remote diagnostic center. The smart phone may also query the user to obtain symptomatic diagnostic information, which may also be uploaded to the remote diagnostic center. In the emergency mode, the smart phone may be configured to upload critical information to a remote diagnostic center, as well as an emergency response center. The emergency mode may be triggered automatically in response to the vehicle being in an accident, or alternatively, but user actuation. |
| US09483882B2 |
Method and device for modifying the configuration of a driving assistance system of a motor vehicle
A method and apparatus for modifying the configuration of a driving assistance system of a motor vehicle includes, during operation in an autopilot mode, detecting that a vehicle driver makes a control input counter to vehicle control directed by the driving assistance system. Data relating to driving conditions existing when the driver made the control input is logged onboard the vehicle and transmitted to an off-board central communications platform. The central communications platform creates a modified configuration for the driving assistance system based on the data and re-transmits it back to the vehicle where it is loaded into the driving assistance system. The modified configuration causes the driving assistance system to automatically control the vehicle in a manner consistent with the control input if the driving conditions reoccur. The modified configuration may also be transmitted to a driving assistance system of one or more other motor vehicles. |
| US09483878B2 |
Contextual editing using variable offset surfaces
A method for editing content including at least one three-dimensional object. The method includes determining by a processing element one or more constraints, rendering by the processing element a shell defining an offset distance to the three-dimensional object corresponding to the one or more constraints, receiving a user input to a point related or connected to the three-dimensional object, and moving the point in a direction corresponding to the user input. In the method, the movement of the point is limited in at least one direction by the shell. |
| US09483875B2 |
Augmented reality system with encoding beacons
An augmented reality system with encoding light emitting beacons placed in a scene. Beacons placed at desired locations in a scene emit light modulated with multiple access encoding that conveys an identifier for its emitting beacon. The emitted light signals are also blanked for longer than a time between image capturing by an image augmenting device. Beacons viewed in captured images are identified by correlating an absence of a beacon in an image with an absence of a received identifier in received light signals. In a view of the scene presented to a user, augmenting images are obtained based upon the determined beacon identifier and are displayed at locations in the scene based upon the determined location of that beacon. Beacons that emit pulsed light signals encoded with the multiple access coding are also provided. |
| US09483868B1 |
Three-dimensional visual representations for mobile devices
Rendering graphical objects to a display of a mobile client computing device by obtaining virtual object information, obtaining normal components of the virtual object, encoding an image file that describes the normal components of the virtual object, wherein encoding the image file includes encoding dimensional parameters of the normal components into color parameters held by the image file for individual image pixels so that the color information held by the image file describes the surfaces of the virtual object, determining a likely viewing angle of a user associated with the mobile client computing device, and modulating the color parameters in the image file describing the surfaces of the virtual object in response to an indication of a change of the orientation of the mobile client computing device. |
| US09483863B2 |
Terrain mapping system using moved material estimation
A terrain mapping system is disclosed for use with an excavation machine at a worksite. The terrain mapping system may have a locating device mountable onboard the excavation machine and configured to generate a first signal indicative of a position of the excavation machine at the worksite, and a sensor configured to generate a second signal indicative of a load on the excavation machine. The terrain mapping system may also have a controller in communication with the locating device and the sensor. The controller may be configured to update a surface contour of the worksite contained in an electronic map based on the first signal as the excavation machine traverses the worksite, and to determine an amount of material moved by the excavation machine based on the second signal. The controller may also be configured to generate a representation of the material moved by the excavation machine in the electronic map when the excavation machine ceases to move the material. |
| US09483857B2 |
Display control device, display control method, and program
There is provided a display control device including an operation detection unit configured to detect an enlargement operation on any image displayed within a display screen among a plurality of images having a predetermined relation, and a display control unit configured to determine a display area of the image based on the detected enlargement operation and to cause a portion corresponding to the display area to be enlarged and displayed for each of the images displayed within the display screen. |
| US09483856B2 |
Display controller with blending stage
A display controller comprising a blending stage and a blending controller. The blending stage is provided for blending multiple image layers into one display output image and comprises a plurality of input channels for receiving pixel data for the multiple image layers. The blending stage further comprises multiple blenders for combining the pixel data received by at least two input channels of the plurality of input channels. The blending controller is coupled to the blending stage for controlling operation of the blending stage. The blending stage further comprises a controllable switch for coupling an output of at least one blender of the multiple blenders to a display output of the blending stage for regular on-the-fly blending or to an offline blending memory for storing a result of an offline blending task. The blending controller comprises an input for receiving layer data describing locations and/or properties of the multiple image layers and a predictor for, based on the layer data, predicting an availability of the at least one blender. The blending controller is further operative to control the blending stage to perform the offline blending task in dependence of the predicted availability. |
| US09483854B1 |
System and method for providing controls in a virtual space based on user geolocations
A system and method for facilitating control of virtual space entities based on user geolocations is disclosed. In such a system and method, one or more real-world spatial displacement requirements may be associated with corresponding virtual space maneuvers to connect user movements in real world locations with the virtual space. User performance of real-world spatial displacements may be obtained and compared with real-world spatial displacement requirements of interest. Virtual space maneuvers may be executed in the virtual space based on requesting user performance of real-world spatial displacements as required. Rewards, bonuses, virtual space enhancements and/or other incentives may be provided to the users based on qualities of their performance of real-world spatial displacement as required. |
| US09483853B2 |
Systems and methods to display rendered images
A computer-implemented method to display a rendered image is described. A base image is obtained. A rendered image is obtained. The rendered image is matched to a location on the base image. The rendered image is overlaid onto the base image at the location to generate a set of layered images. The set of layered images is displayed. |
| US09483841B2 |
Travel amount estimation device and travel amount estimating method
A processor generates a first road surface image from an image at a first time captured by an imaging device mounted on a moving body, and generates a second road surface image from an image at a second time after the first time. Next, the processor determines direction information depending on a direction of travel of the moving body between the first time and the second time from an amount of turn of the moving body between the first time and the second time. Then, the processor determines a relative positional relationship between the first road surface image and the second road surface image by using the amount of turn and the direction information, and determines an amount of travel of the moving body between the first time and the second time on the basis of the relative positional relationship. |
| US09483839B1 |
Occlusion-robust visual object fingerprinting using fusion of multiple sub-region signatures
Within examples, methods and systems for occlusion-robust object fingerprinting using fusion of multiple sub-region signatures are described. An example method includes receiving an indication of an object within a sequence of video frames, selecting from the sequence of video frames a reference image frame indicative of the object and candidate image frames representative of possible portions of the object, dividing the reference image frame and the candidate image frames into multiple cells, defining for the reference image frame and the candidate image frames sub-regions of the multiple cells such that the sub-regions include the same cells for overlapping representations and the sub-regions include multiple sizes, comparing characteristics of sub-regions of the reference image frame to characteristics of sub-regions of the candidate image frames and determining similarity measurements, and based on the similarity measurements, tracking the object within the sequence of video frames. |
| US09483838B2 |
Method and system for automated sequencing of vehicles in side-by-side drive-thru configurations via appearance-based classification
This disclosure provides a method and system for automated sequencing of vehicles in side-by-side drive-thru configurations via appearance-based classification. According to an exemplary embodiment, an automated sequencing method includes computer-implemented method of automated sequencing of vehicles in a side-by-side drive-thru, the method comprising: a) an image capturing device capturing video of a merge-point area associated with multiple lanes of traffic merging; b) detecting in the video a vehicle as it traverses the merge-point area; c) classifying the detected vehicle associated with traversing the merge-point area as coming from one of the merging lanes; and d) aggregating vehicle classifications performed in step c) to generate a merge sequence of detected vehicles. |
| US09483835B2 |
Depth value restoration method and system
Disclosed is a method comprising steps of conducting image preprocessing so as to respectively obtain a candidate object region including a foreground image in a depth map and a color image; determining whether it is necessary to conduct a region growing process with respect to the candidate object region of the depth map; in the former case, conducting the region growing process with respect to the candidate object region of the depth map; and conducting, after the region growing process is conducted with respect to the candidate object region of the depth map, a depth value restoration process with respect to a candidate region. |
| US09483831B2 |
Segmentation using hybrid discriminative generative label fusion of multiple atlases
A method for segmenting a target image includes receiving the target image of an anatomical structure, registering a plurality of atlases to the target image, each of the atlases including an image and a plurality of labels corresponding to portions of the image, selecting a plurality of registered atlases, transferring the labels of selected registered atlases to the target image, combining the labels that are transferred to the target image using a fusion of a discriminative model and a generative model, and outputting a segmentation of the target image isolating the anatomical structure, wherein a segmentation of the target image is displayed. |
| US09483825B2 |
Apparatus and method for estimating distance using dual off-axis color filter aperture
Disclosed are an apparatus and method for estimating a distance using a dual off-axis color filter aperture (DCA). An object detection unit is configured to detect an object from an image taken by a camera having the DCA equipped with a first filter having a first color and a second filter having a second color complementary to the first color. A color shifting value calculation unit is configured to calculate a color shifting value (CSV) using a color shift property between color channels of the image in a region corresponding to the detected object. A distance estimation unit is configured to estimate a distance from the camera to each point of the object based on the calculated CSV and camera parameters including a focal distance of the camera, a focal plane of the camera, and a position of the aperture. |
| US09483824B2 |
Image analysis device and control method of an image analysis device
In one embodiment, an image analysis device (65) includes an acquisition unit (66) and an analysis unit (67). The acquisition unit acquires image data of a plurality of images of an imaging region of an object respectively imaged by magnetic resonance imaging before and after administration of contrast medium. The analysis unit calculates an estimated value of concentration of contrast medium per unit volume including air region by using a coefficient based on the image data before administration of contrast medium, in accordance with the image data of a plurality of images and a value related to relaxation rate or relaxation time before and after administration of contrast medium. |
| US09483823B2 |
Medical image measurement device and method, and non-transitory computer-readable recording medium
The medical image measurement device includes a medical image acquisition unit which acquires a first medical image and a second medical image obtained by photographing the same object of interest of the same patient at different time points, a measurement parameter acquisition unit which acquires a first measurement parameter set for measuring the features of the shape of the object of interest in the first medical image and a second measurement parameter set for measuring the features of the shape of the object of interest in the second medical image, an evaluation value acquisition unit which acquires an evaluation value indicating a change between the first measurement parameter and the second measurement parameter, and a determination unit which determines whether or not the change is equal to or greater than a preset amount of change based on the evaluation value. |
| US09483820B2 |
Method and system for detecting a damaged component of a machine
A method and system for detecting a damaged machine component during operation of the machine are provided. The damaged machine component detection system includes one or more processors, one or more memory devices communicatively coupled to the one or more processors, an image capture device configured to generate a stream of temporally-spaced images of a scene including a machine component of interest, the images generated in real-time, and a grouping model configured to compare features of a current image of the stream of images to features of previously captured images sorted into a plurality of groups of images having similar features, generate an alert if predetermined features of the current image deviate from corresponding features of the grouped images by a predetermined amount, and update the groups with the current image if the predetermined features of the current image are similar to corresponding features of the grouped images by a predetermined amount. The system also includes an output device configured to output at least one of the alert and the current image. |