| Document | Document Title |
|---|---|
| US09324862B2 |
Semiconductor device
To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a first circuit region side toward a second circuit region side and an element separation film overlap each other in plan view, a field plate and conductive films are provided alternately from the first circuit region side toward the second circuit region side in plan view. Further, in this region, there is a decrease in the potential of the field plate and the potentials of the conductive films from the first circuit region toward the second circuit region. Further, at least one of the conductive films has a potential lower than the potential of the field plate adjacent to the conductive film on the second circuit region side in plan view. Further, this conductive film covers at least a part of the second conductivity type region without space in the extension direction of the second conductivity type region. |
| US09324859B2 |
Semiconductor device and method of forming the same
A split gate trench field effect transistor includes a gate electrode formed in a trench. A shield gate is formed in a trench below the gate electrode and surrounded by an insulating structure to float the shield electrode. |
| US09324858B2 |
Trench-gated MIS devices
In a trench-gated MIS device contact is made to the gate within the trench, thereby eliminating the need to have the gate material, typically polysilicon, extend outside of the trench. This avoids the problem of stress at the upper corners of the trench. Contact between the gate metal and the polysilicon is normally made in a gate metal region that is outside the active region of the device. Various configurations for making the contact between the gate metal and the polysilicon are described, including embodiments wherein the trench is widened in the area of contact. Since the polysilicon is etched back below the top surface of the silicon throughout the device, there is normally no need for a polysilicon mask, thereby saving fabrication costs. |
| US09324856B2 |
MOSFET having dual-gate cells with an integrated channel diode
A semiconductor device includes MOSFET cells having a drift region of a first conductivity type. A first and second active area trench are in the drift region. A split gate uses the active trenches as field plates or includes planar gates between the active trenches including a MOS gate electrode (MOS gate) and a diode gate electrode (diode gate). A body region of the second conductivity type in the drift region abutts the active trenches. A source of the first conductivity type in the body region includes a first source portion proximate to the MOS gate and a second source portion proximate to the diode gate. A vertical drift region uses the drift region below the body region to provide a drain. A connector shorts the diode gate to the second source portion to provide an integrated channel diode. The MOS gate is electrically isolated from the first source portion. |
| US09324852B2 |
Semiconductor device including a gate electrode on a protruding group III-V material layer
A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well. |
| US09324851B2 |
DC/DC converter circuit of semiconductor device having a first transistor of a normally-off type and a second transistor of a normally-on type
A semiconductor device including a DC/DC converter circuit, in which the DC/DC converter circuit includes a transistor of a normally-off type, having a first drain electrode connected to an input terminal and a first source electrode connected to an output terminal, which is formed in a first compound semiconductor substrate having a two-dimensional electron gas layer, and a transistor having a second drain electrode connected to the first source electrode and a grounded second source electrode. |
| US09324850B2 |
Integrated circuit devices and fabricating method thereof
An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel between a second source/drain. The first transistor operates based on a first amount of current and the second transistor operates based on a second amount of current different from the first amount of current. The first and second channels have fixed channel widths. The fixed channel widths may be based on fins or nanowires included in the first and second transistors. |
| US09324847B2 |
Semiconductor device and semiconductor device manufacturing method
In some aspects of the invention, an n-type field-stop layer can have a total impurity of such an extent that a depletion layer spreading in response to an application of a rated voltage stops inside the n-type field-stop layer together with the total impurity of an n− type drift layer. Also, the n-type field-stop layer can have a concentration gradient such that the impurity concentration of the n-type field-stop layer decreases from a p+ type collector layer toward a p-type base layer, and the diffusion depth is 20 μm or more. Furthermore, an n+ type buffer layer of which the peak impurity concentration can be higher than that of the n-type field-stop layer at 6×1015 cm−3 or more, and one-tenth or less of the peak impurity concentration of the p+ type collector layer, can be included between the n-type field-stop layer and p+ type collector layer. |
| US09324845B2 |
ESD protection structure, integrated circuit and semiconductor device
Implementations are presented herein that include an ESD protection structure. The structure may include a plurality of first doped regions forming first terminals of a plurality of transistors, a plurality of second doped regions forming second terminals of the plurality of transistors, and a third doped region surrounding the plurality of first doped regions and the plurality of second doped regions to form a common third terminal of the plurality of transistors. The plurality of first doped regions and the plurality of second doped regions may be arranged in an alternating pattern such that an ESD discharge current received on any one of the plurality of first doped regions dissipates through at least two of the plurality of second doped regions. |
| US09324842B2 |
Buried local interconnect in finfet structure and method of fabricating same
A method for fabricating a finfet with a buried local interconnect and the resulting device are disclosed. Embodiments include forming a silicon fin on a BOX layer, forming a gate electrode perpendicular to the silicon fin over a portion of the silicon fin, forming a spacer on each of opposite sides of the gate electrode, forming source/drain regions on the silicon fin at opposite sides of the gate electrode, recessing the BOX layer, undercutting the silicon fin and source/drain regions, at opposite sides of the gate electrode, and forming a local interconnect on a recessed portion of the BOX layer. |
| US09324839B2 |
Graphene structure, graphene device including same, and method of manufacturing graphene structure
A method of manufacturing a graphene structure, the graphene structure, and a graphene device including the graphene structure, include depositing a metal layer over a silicon carbide substrate; and performing, at a first temperature, a heat treatment on the silicon carbide substrate over which the metal layer is deposited to form a composite layer and a graphene layer on the silicon carbide substrate. The composite layer includes a metal. |
| US09324835B2 |
Method for manufacturing MOSFET
A method for manufacturing a MOSFET, including: performing ion implantation, via a shallow trench surrounding an active region in a semiconductor substrate, into a first sidewall of the active region and into a second sidewall of the active region opposite to the first sidewall to form a first heavily doped region in the first sidewall and a second heavily doped region in the second sidewall; filling the shallow trench with an insulating material, to form a shallow trench isolation; forming a gate stack and an insulating layer on the substrate, wherein the insulating layer surrounds and caps the gate stack; forming openings in the substrate using the shallow trench isolation, the first and second heavily doped regions, and the insulating layer as a hard mask; and epitaxially growing a semiconductor layer with a bottom surface and sidewalls of each of the openings as a seed layer. |
| US09324834B2 |
Semiconductor device having embedded strain-inducing pattern and method of forming the same
In a semiconductor device, a first active region has a first Σ-shape, and the second active region has a second Σ-shape. When a line that is perpendicular to the substrate and passes a side surface of a first gate electrode in the first region is defined as a first vertical line, when a line that is perpendicular to the substrate and passes a side surface of a second gate electrode in the second region is defined as a second vertical line, when a shortest distance between the first vertical line and the first trench is defined as a first horizontal distance, and when a shortest distance between the second vertical line and the second trench is defined as a second horizontal distance, a difference between the first horizontal distance and the second horizontal distance is equal to or less than 1 nm. |
| US09324833B2 |
Methods of manufacturing semiconductor devices
Methods of forming semiconductor devices are disclosed. In some embodiments, a first trench and a second trench are formed in a substrate, and dopants of a first conductivity type are implanted along sidewalls and a bottom of the first trench and the second trench. The first and second trenches are filled with an insulating material, and a gate dielectric and a gate electrode over the substrate, the gate dielectric and the gate electrode extending over the first trench and the second trench. Source/drain regions are formed in the substrate on opposing sides of the gate dielectric and the gate electrode. |
| US09324830B2 |
Self-aligned contact process enabled by low temperature
Self-aligned contacts of a semiconductor device are fabricated by forming a metal gate structure on a portion of a semiconductor layer of a substrate. The metal gate structure contacts inner sidewalls of a gate spacer. A second sacrificial epitaxial layer is formed on a first sacrificial epitaxial layer. The first sacrificial epitaxial layer is adjacent to the gate spacer and is formed on source/drain regions of the semiconductor layer. The first and second sacrificial epitaxial layers are recessed. The recessing exposes at least a portion of the source/drain regions. A first dielectric layer is formed on the exposed portions of the source/drain regions, and over the gate spacer and metal gate structure. At least one cavity within the first dielectric layer is formed above at least one of the exposed portions of source/drain regions. At least one metal contact is formed within the at least one cavity. |
| US09324827B1 |
Non-planar schottky diode and method of fabrication
A non-planar Schottky diode includes a semiconductor substrate of a first type, the first type including one of n-type and p-type. The structure further includes raised semiconductor structure(s) of a second type opposite the first type coupled to the substrate, isolation material surrounding a lower portion of the raised structure(s), a first well of the second type directly under the raised structure(s), a guard ring of the first type around an edge of a top portion of the first well, a conformal layer of silicide over a top portion of the raised structure(s) above the isolation material, and a common contact above the conformal layer of silicide. The non-planar Schottky diode can be fabricated with non-planar transistors, e.g., FinFETs. |
| US09324826B2 |
Semiconductor device and manufacturing method of the same
A semiconductor device of an embodiment at least includes: a SiC substrate; and a gate insulating film formed on the SiC substrate, wherein at an interface between the SiC substrate and the gate insulating film, some of elements of both of or one of Si and C in an outermost surface of the SiC substrate are replaced with at least one type of element selected from nitrogen, phosphorus, and arsenic. |
| US09324823B2 |
Semiconductor device having a tapered gate structure and method
A semiconductor device includes a semiconductor body having a first surface vertically spaced apart from a second surface. A first trench vertically extends into the semiconductor body from the first surface and includes first and second sidewalls extending across the semiconductor body in a lateral direction that is parallel to the first surface. A field electrode is arranged in first trench and electrically insulated from the semiconductor body by a field dielectric. A first gate electrode is arranged in the first trench. The first gate electrode is electrically insulated from the field electrode by the field dielectric and is electrically insulated from the semiconductor body by a first gate oxide. The first gate electrode includes widened and tapered portions that are continuously connected and adjacent to one another in the lateral direction. The first gate oxide forms a non-perpendicular angle with the first sidewall in the lateral direction. |
| US09324822B2 |
Gate dielectric protection for transistors
At least one method, apparatus and system disclosed herein involves forming a device comprising a transistor comprising an active gate and at least one inactive gate in parallel to the active gate. A source region on a substrate is formed. An active gate region is formed on the substrate adjacent the source region. A drain region is formed on the substrate adjacent the active gate region. A first inactive gate region is formed on the substrate in parallel to the active gate region. The source region, the drain region, the active gate region, and the first inactive gate region comprise the transistor. The first inactive gate region is capable of dissipating the at least a portion of a charge. |
| US09324821B2 |
Compound semiconductor device and manufacturing method of the same
An embodiment of a compound semiconductor device includes: a substrate; a nitride compound semiconductor stacked structure formed on or above the substrate; and a gate electrode, a source electrode and a drain electrode formed on or above the compound semiconductor stacked structure. A recess positioning between the gate electrode and the drain electrode in a plan view is formed at a surface of the compound semiconductor stacked structure. |
| US09324819B1 |
Semiconductor device
A semiconductor device includes an active layer, source electrodes, drain electrodes, gate electrodes, a first dielectric layer, source trace, first source vias, a second dielectric layer, a source pad, and second source vias. The first dielectric layer covers the source electrodes, the drain electrodes, and the gate electrodes. The source traces are disposed on the first dielectric layer, are electrically connected to the source electrodes, and are covered by the second dielectric layer. The source pad is disposed on the second dielectric layer, and includes a first source trunk, a first source branch, and a source sub-branch. The first source branch is protruded from the first source trunk and is electrically connected to one of the drain traces through the second source vias. The source sub-branch is protruded from the first source branch and is electrically connected one of the source electrodes through the third source vias. |
| US09324818B2 |
Gate-all-around semiconductor device and method of fabricating the same
The disclosed technology generally relates to semiconductor devices and more particularly to a gate-all-around semiconductor device, and methods of fabricating the same. In one aspect, the method comprises providing on a semiconductor substrate between STI regions at least one suspended nanostructure anchored by a source region and a drain region. The suspended nanostructure is formed of a crystalline semiconductor material that is different from a crystalline semiconductor material of the semiconductor substrate. A gate stack surrounds the at least one suspended nanostructure. |
| US09324813B2 |
Doped zinc oxide as N+ layer for semiconductor devices
A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-type layer is formed on or in the p-doped layer. The n-type layer includes ZnO on the p-doped layer to form an electronic device. |
| US09324808B2 |
Semiconductor device, power-supply unit, amplifier and method of manufacturing semiconductor device
A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode. |
| US09324807B1 |
Silicon carbide MOSFET with integrated MOS diode
A monolithically integrated MOS channel in gate-source shorted mode is used as a diode for the third quadrant conduction path for a power MOSFET. The MOS diode and MOSFET can be constructed in a variety of configurations including split-cell and trench. The devices may be formed of silicon carbide, gallium nitride, aluminum nitride, aluminum gallium nitride, diamond, or similar semiconductor. Low storage capacitance and low knee voltage for the MOS diode can be achieved by a variety of means. The MOS diode may be implemented with channel mobility enhancement materials, and/or have a very thin/high permittivity gate dielectric. The MOSFET gate conductor and MOS diode gate conductor may be made of polysilicon doped with opposite dopant types. The surface of the MOS diode dielectric may be implanted with cesium. |
| US09324806B2 |
Silicon carbide semiconductor device
A silicon carbide semiconductor device includes: a silicon carbide semiconductor layer of a first conductivity type; a field insulating film formed on a surface of the silicon carbide semiconductor layer; a Schottky electrode formed on the surface of the silicon carbide semiconductor layer on an inner periphery side relative to the field insulating film, the Schottky electrode being formed to overlap onto the field insulating film; a front-surface electrode that covers the Schottky electrode and extends on the field insulating film beyond a peripheral edge of the Schottky electrode; and a terminal well region of a second conductivity type that is formed to be in contact with a part of the Schottky electrode in an upper part of the silicon carbide semiconductor layer and extends in the silicon carbide semiconductor layer on an outer periphery side relative to a peripheral edge of the front-surface electrode. |
| US09324804B2 |
Graphene-on-semiconductor substrates for analog electronics
Electrically conductive material structures, analog electronic devices incorporating the structures and methods for making the structures are provided. The structures include a layer of graphene on a semiconductor substrate. The graphene layer and the substrate are separated by an interfacial region that promotes transfer of charge carriers from the surface of the substrate to the graphene. |
| US09324801B2 |
Nanowire FET with tensile channel stressor
Fin stacks including a silicon germanium alloy portion and a silicon portion are formed on a surface of a substrate. Sacrificial gate structures are then formed straddling each fin stack. Silicon germanium alloy portions that are exposed are oxidized, while silicon germanium alloy portions that are covered by the sacrificial gate structures are not oxidized. A dielectric material having a topmost surface that is coplanar with a topmost surface of each sacrificial gate structure is formed, and thereafter each sacrificial gate structure is removed. Non-oxidized silicon germanium alloy portions are removed suspending silicon portions that were present on each non-oxidized silicon germanium alloy portion. A functional gate structure is then formed around each suspended silicon portion. The oxidized silicon germanium alloy portions remain and provide stress to a channel portion of the suspended silicon portions. |
| US09324799B2 |
FinFET structures having uniform channel size and methods of fabrication
Methods of fabricating circuit structures including FinFET structures are provided, including: providing a substrate and a first material having a first threshold voltage above the substrate, and a second material having a second threshold voltage lower than the first threshold voltage above the first material; forming fins having base fin portions formed from the first material and upper fin portions formed from the second material; providing gate structures over the fins to form one or more FinFET structures, wherein the gate structures wrap around at least the upper fin portions and have an operating voltage lower than the first threshold voltage and higher than the second threshold voltage, so that the upper fin portions define a channel size of the one or more FinFET structures. Circuit structures including FinFET structures are also provided, in which the FinFET structures have a uniform channel size defined only by upper fin portions thereof. |
| US09324798B2 |
Semiconductor device and method for manufacturing the same
In one embodiment, a semiconductor device includes a first diffusion layer of a first conductive type and a second diffusion layer of a second conductive type which is a reverse conductive type of the first conductive type, the first conductive type first diffusion layer and the second conductive type diffusion layer being spaced apart and provided in a semiconductor layer, a pocket region of the second conductive type which is provided on a surface portion of the semiconductor layer adjacently to the first diffusion layer, and a first extension region of the first conductive type which is provided in the semiconductor layer to cover at least a portion of the pocket region. A second diffusion layer side end portion of the first extension region is positioned closer to a second diffusion layer side than a second diffusion layer side end portion of the pocket region. |
| US09324797B2 |
Gate-all-around nanowire MOSFET and method of formation
A method for fabricating a semiconductor device comprises forming a nanowire on an insulator layer at a surface of a substrate; forming a dummy gate over a portion of the nanowire and a portion of the insulator layer; forming recesses in the insulator layer on opposing sides of the dummy gate; forming spacers on opposing sides of the dummy gate; forming source regions and drain regions in the recesses in the insulator layer on opposing sides of the dummy gate; depositing an interlayer dielectric on the source regions and the drain regions; removing the dummy gate to form a trench; removing the insulator layer under the nanowire such that a width of the trench underneath the nanowire is equal to or less than a distance between the spacers; and forming a replacement gate in the trench. |
| US09324793B2 |
Method for controlling the profile of an etched metallic layer
An ashing chemistry employing a combination of Cl2 and N2 is provided, which removes residual material from sidewalls of a patterned metallic hard mask layer without residue such that the sidewalls of the patterned metallic hard mask layer are vertical. The vertical profiled of the sidewalls of the patterned metallic hard mask layer can be advantageously employed to reduce pattern factor dependency in the etch bias between the pattern transferred into an underlying layer and the pattern as formed on the metallic hard mask layer. Further, the ashing chemistry can be employed to enhance removal of stringers in vertical portions of a metallic material layer. |
| US09324791B2 |
Semiconductor element
A semiconductor element includes a substrate and a semiconductor layer. The substrate has a first main face and a second main face. The semiconductor layer is formed on a side of one of the first main face and the second main face of the substrate. The substrate has a plurality of isolated processed portions and an irregularity face that runs from the processed portions at least to the first main face of the substrate and links adjacent ones of the processed portions. |
| US09324784B2 |
Electronic device having a termination region including an insulating region
An electronic device can include an electronic component and a termination region adjacent to the electronic component region. In an embodiment, the termination region can include an insulating region that extends a depth into a semiconductor layer, wherein the depth is less than 50% of the thickness of the semiconductor layer. In another embodiment, the termination region can include a first insulating region that extends a first depth into the semiconductor layer, and a second insulating region that extends a second depth into the semiconductor layer, wherein the second depth is less than the first depth. In another aspect, a process of forming an electronic device can include patterning a semiconductor layer to define a trench within termination region while another trench is being formed for an electronic component within an electronic component region. |
| US09324779B2 |
Toroid inductor in an integrated device
Some novel features pertain to an integrated device that includes a substrate, a first cavity through the substrate, and a toroid inductor configured around the first cavity of the substrate. The toroid inductor includes a set of windings configured around the first cavity. The set of windings includes a first set of interconnects on a first surface of the substrate, a set of though substrate vias (TSVs), and a second set of interconnects on a second surface of the substrate. The first set of interconnects is coupled to the second set of interconnects through the set TSVs. In some implementations, the integrated device further includes an interconnect material (e.g., solder ball) located within the first cavity. The interconnect material is configured to couple a die to a printed circuit board. In some implementations, the interconnect material is part of the toroid inductor. |
| US09324778B2 |
Variable inductor and semiconductor device using same
A variable inductor includes a spiral inductor, a loop conductor, and a switch for opening or short-circuiting an end of the loop conductor. The loop conductor is formed in a direction perpendicular to the spiral inductor and is used for adjusting the inductance value of the spiral inductor by opening or short-circuiting the end of the loop conductor by the switch. |
| US09324774B2 |
Organic light emitting diode display and method for manufacturing the same
An organic light emitting diode (OLED) display and a method for manufacturing the same are provided. The OLED display includes a substrate, an active layer and a capacitor lower electrode positioned on the substrate, a gate insulating layer positioned on the active layer and the capacitor lower electrode, a gate electrode positioned on the gate insulating layer at a location corresponding to the active layer, a capacitor upper electrode positioned on the gate insulating layer at a location corresponding to the capacitor lower electrode, a first electrode positioned to be separated from the gate electrode and the capacitor upper electrode, an interlayer insulating layer positioned on the gate electrode, the capacitor upper electrode, and the first electrode, a source electrode and a drain electrode positioned on the interlayer insulating layer, and a bank layer positioned on the source and drain electrodes. |
| US09324772B2 |
Organic light emitting diode display device and method of fabricating the same
An OLED display device includes a substrate, a driving thin film transistor (TFT) formed on the substrate, a passivation layer formed over the substrate and covering the driving TFT, an OLED display formed on the passivation layer, the OLED including a first electrode, an organic emitting layer and a second electrode, a base line formed on the passivation layer, a support pattern formed on the central portion of the base line, a first bank layer covering a boundary portion of each of the first electrode and the base line so as to expose a central portion of each of the first electrode and the base line, and a second bank layer formed on the support pattern. The organic emitting layer is formed on the first electrode, the first and second bank layers and the support pattern in a pixel region of the substrate, and is cut at a top edge portion of the support pattern to expose a portion of the base line, and the second electrode covers the organic emitting layer and is connected to the portion of the base line. |
| US09324769B2 |
Pixel arrangement structure, display device and display method thereof
A pixel arrangement structure according to the present disclosure may include pixel units parallel to each other. The pixel units each includes a plurality of first pixels and second pixels spaced from each other. The first pixels each include a first sub-pixel located in a first row, a second sub-pixel located in a second row, and a third sub-pixel located in third and fourth rows. The second pixels each include a third sub-pixel located in the first and second rows, a first sub-pixel located in the third row, and a second sub-pixel located in the fourth row. The first sub-pixels and second sub-pixels are arranged horizontally, while the third sub-pixels are arranged longitudinally. |
| US09324765B2 |
Semiconductor light emitting apparatus comprising connecting plate
The present disclosure provides a semiconductor light emitting apparatus, comprising a first light emitting unit having a current supplying layer formed at the bottom; a second light emitting unit having a current supplying layer formed at the bottom and extended into the second light emitting unit; a connecting plate including a conductive portion where the first light emitting unit is placed and a conductive portion where the second light emitting unit is placed; and an electric pass for electrically connecting the first light emitting unit and the second light emitting unit. |
| US09324762B1 |
Process of forming a semiconductor device
A process of forming a semiconductor device includes second-type blanket implanting a first-type semiconductor substrate to form a second-type implant layer therein; second-type implanting the semiconductor substrate through a first mask to form second-type wells in a second region of the semiconductor substrate; and first-type implanting the semiconductor substrate through a second mask to form isolations in a first region of the semiconductor substrate and to compensate complementary sub-regions of the second region. |
| US09324761B2 |
Method of making image sensor devices having a concave reflective shield
A method of forming an image sensor device where the method includes forming a first dielectric layer on a substrate. The method further includes patterning the first dielectric layer to define an area for a reflective shield, where the area defined for the reflective shield is above a photodiode. Additionally, the method includes forming the reflective shield on the substrate by filling the defined area with a high reflectivity material, and the high reflective material comprises a polymer. |
| US09324757B2 |
Solid-state imaging device
A solid-state imaging device includes: pixels arranged in a matrix, a semiconductor substrate; a first electrode formed above the semiconductor substrate for each of the pixels; a photoelectric conversion film formed on the first electrode, for photoelectric conversion of light into signal charge; a charge accumulation region formed in the semiconductor substrate for accumulating the signal charge generated through the photoelectric conversion in the photoelectric conversion film; a contact plug for electrically connecting the first electrode and the charge accumulation region in a corresponding pixel; a high-concentration impurity region formed on a surface of the charge accumulation region, in a region in contact with the contact plug; a surface impurity region formed on the surface of the charge accumulation region, in a region not in contact with the contact plug; and a low-concentration impurity region formed between the high-concentration impurity region and the surface impurity region. |
| US09324756B2 |
CIS chips and methods for forming the same
A device includes a semiconductor substrate, an image sensor at a front surface of the semiconductor substrate, and a plurality of dielectric layers over the image sensor. A color filter and a micro lens are disposed over the plurality of dielectric layers and aligned to the image sensor. A through via penetrates through the semiconductor substrate. A Redistribution Line (RDL) is disposed over the plurality of dielectric layers, wherein the RDL is electrically coupled to the through via. A polymer layer covers the RDL. |
| US09324751B2 |
Image sensor, production method therefor, and inspection apparatus
[Object]To provide an image sensor having high light collection efficiency and less crosstalk among pixels, a production method therefor, and an inspection apparatus.[Solving means]In an image sensor including a light source conversion unit that includes a plurality of light-receiving devices and converts incident light into an electric signal, a plurality of lenses that are provided in an immediately-above area of the light-receiving devices and collect light toward a light-receiving unit of the light-receiving devices positioned right below the lenses, and an insulation layer that is formed of an optically-transparent material and formed above the lenses, detection areas are provided on a surface of the insulation layer while being apart from one another for each of the light-receiving devices, a center of each of the detection areas being positioned on an extended line connecting a center of the light-receiving unit of each of the light-receiving devices and a center of the lens provided right above each of the light-receiving devices. In addition, a sample as a detection target is fixed to at least the detection areas. |
| US09324749B2 |
Color imaging element and imaging device
A color filter array of a color imaging element is formed with a basic array pattern repeatedly disposed in a horizontal direction and a vertical direction. The basic array pattern is formed with RGB filters arrayed in an array pattern corresponding to 5×5 pixels in the horizontal direction and the vertical direction. A ratio of all pixel numbers of a G pixel is made larger than a ratio of a pixel number of each color of RB. The G filter is disposed in each line in the horizontal, vertical and oblique directions of the color filter array. One or more R and B filters are disposed in each filter line in the horizontal and vertical directions of the color filter array in the basic array pattern. Filters of different colors are adjacently disposed in each of the horizontal, vertical and oblique directions of the R and B filter. |
| US09324744B2 |
Solid-state image sensor having a trench and method of manufacturing the same
A solid-state image sensor includes a semiconductor layer, a multilayer wiring layer, an opening which extends through the semiconductor layer, and reaches an electrically conductive layer in the multilayer wiring layer, an electrically conductive member arranged in the opening so as to be connected to the electrically conductive layer, and a trench which surrounds the opening, and extends through the semiconductor layer, the trench having a space with no solid substance, and the semiconductor layer including a wall portion arranged between a side face defining the opening, and an inner-side face defining the trench to surround the electrically conductive member. |
| US09324742B2 |
Array substrate and manufacturing method thereof
Embodiments of the invention provide an array substrate comprising a plurality of pixel units, each of the pixel units including a first display electrode, a second display electrode and an insulating portion, wherein, the insulating portion comprises a plurality of first via holes; the first display electrode is disposed at a surface of the insulating portion, and the second display electrode is disposed at bottom surfaces of the first via holes. Embodiments of the invention further provide a method for manufacturing the array substrate. |
| US09324739B1 |
Thin film transistors with metal oxynitride active channels for electronic displays
In one embodiment of the invention, a high electron mobility thin film transistor with a plurality of gate insulating layers and a metal oxynitride active channel layer is provided for forming a backplane circuit for pixel switching in an electronic display, to reduce unwanted ON state series resistance in the metal oxynitride active channel layer and minimize unwanted power dissipation in the backplane circuit.Another embodiment of the invention provides a high electron mobility thin film transistor structure with a plurality of metal oxynitride active channel layers and a gate insulating layer for forming a backplane circuit for pixel switching in an electronic display, to reduce unwanted ON state series resistance in the metal oxynitride active channel layer and to minimize unwanted power dissipation in the backplane circuit.In yet another embodiment of the invention a high electron mobility thin film transistor structure with a plurality of gate insulating layers and a plurality of metal oxynitride active channel layers for forming a backplane circuit for pixel switching in an electronic display, to reduce unwanted ON state series resistance in the metal oxynitride active channel layers and to minimize unwanted power dissipation in the backplane circuit. |
| US09324733B2 |
Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics
In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices. |
| US09324730B2 |
Vertical memory devices and methods of manufacturing the same
A vertical memory device including a substrate including first regions and a second region; a plurality of channels in the first regions, the plurality of channels extending in a first direction substantially perpendicular to a top surface of the substrate; a charge storage structure on a sidewall of each channel in a second direction substantially parallel to the top surface of the substrate; a plurality of gate electrodes in the first regions, the plurality of gate electrodes arranged on a sidewall of the charge storage structure and spaced apart from each other in the first direction; and a plurality of supporters in the second region, the plurality of supporters spaced apart from each other in a third direction substantially perpendicular to the first direction and the second direction, the plurality of supporters contacting a sidewall of at least one gate electrode. |
| US09324728B2 |
Three-dimensional vertical gate NAND flash memory including dual-polarity source pads
A memory includes a three-dimensional array including a plurality of levels is described. Each level includes a bit line pad, a source line pad, and a plurality of strips of semiconductor material extending between the bit line pad and the source line pad. The source line pad includes at least one n-type region and at least one p-type region. The memory includes word lines coupled to the plurality of strips in the plurality of levels. The memory includes data storage elements between the word lines and the strips of semiconductor material, whereby memory cells are disposed at cross-points of the strips and the word lines. The memory also includes circuitry coupled to the n-type region and the p-type region of the source line pad, configured to selectively enable current flow in the strips extending from the source line pad and one of the n-type region and the p-type region. |
| US09324727B2 |
Memory devices having semiconductor patterns on a substrate and methods of manufacturing the same
A memory device may include a plurality of semiconductor patterns on a substrate including a plurality of first impurity regions doped at a first impurity concentration, a plurality of second impurity regions at portions of the substrate contacting the plurality of semiconductor patterns and doped at a second impurity concentration, a plurality of channel patterns on the plurality of semiconductor patterns, a plurality of gate structures, a plurality of third impurity regions at portions of the substrate adjacent to end portions of the plurality of gate structures, and a plurality of fourth impurity regions at portions of the substrate between the second and third impurity regions and between adjacent second impurity regions. The plurality of fourth impurity regions may be doped at a third impurity concentration which may be lower than the first and second impurity concentrations. |
| US09324725B2 |
Semiconductor device and a manufacturing method thereof
The performances of a semiconductor device are improved. The semiconductor device has a first control gate electrode and a second control gate electrode spaced along the gate length direction, a first cap insulation film formed over the first control gate electrode, and a second cap insulation film formed over the second control gate electrode. Further, the semiconductor device has a first memory gate electrode arranged on the side of the first control gate electrode opposite to the second control gate electrode, and a second memory gate electrode arranged on the side of the second control gate electrode opposite to the first control gate electrode. The end at the top surface of the first cap insulation film on the second control gate electrode side is situated closer to the first memory gate electrode side than the side surface of the first control gate electrode on the second control gate electrode side. |
| US09324724B1 |
Method of fabricating a memory structure
The present invention provides a method of fabricating a memory structure, especially forming an oxide on top of a spacer to prevent the spacer from being over-etched, the method comprising the steps of: providing a semiconductor substrate; forming a charge trapping layer, a first conducting layer and a capping layer as a gate stack on the substrate; forming a first gate structure by patterning; a plurality of spacers are patterned and disposed adjacent to the sidewall of said gate stack; depositing a second conducting layer on the substrate to cover the first gate structure and the spacer; selectively etching the second conducting layer to expose the top of the spacer; performing an oxidation process to form an oxide on top of the spacer. |
| US09324718B2 |
Three dimensional multilayer circuit
A three dimensional multilayer circuit (600) includes a plurality of crossbar arrays (512) made up of intersecting crossbar segments (410, 420) and programmable crosspoint devices (514) interposed between the intersecting crossbar segments (410, 420). Shift pins (505, 510) are used to shift connection domains (430) of the intersecting crossbar segments (410, 420) between stacked crossbar arrays (512) such that the programmable crosspoint devices (514) are uniquely addressed. The shift pins (505, 510) make electrical connections between crossbar arrays (512) by passing vertically between crossbar segments (410, 510) in the first crossbar array (512) and crossbar segments in a second crossbar array. A method for transforming multilayer circuits is also described. |
| US09324715B2 |
Flip-flop layout architecture implementation for semiconductor device
A semiconductor device includes a substrate including PMOSFET and NMOSFET regions. First and second gate electrodes are provided on the PMOSFET region, and third and fourth gate electrodes are provided on the NMOSFET region. A connection contact is provided to connect the second gate electrode with the third gate electrode, and a connection line is provided on the connection contact to cross the connection contact and connect the first gate electrode to the fourth gate electrode. |
| US09324713B1 |
Eliminating field oxide loss prior to FinFET source/drain epitaxial growth
Method for forming FinFET source/drain regions with reduced field oxide loss and the resulting devices are disclosed. Embodiments include forming silicon fins separated by a field oxide on a silicon substrate; recessing the field oxide to reveal an upper portion of the silicon fins; forming a spacer layer conformally over the upper portion of the fins and over the field oxide; filling spaces between the fins with a material having high selectivity with the spacer layer; recessing the material; removing the spacer layer above an upper surface of the material; removing the material; recessing the upper portion of the fins; and epitaxially growing source/drain regions on the recessed fins. |
| US09324710B2 |
Very planar gate cut post replacement gate process
A semiconductor structure with improved gate planarity and method of fabrication are provided. In a replacement gate scheme, an array of sacrificial gate structures of substantially uniform pitch and spacing formed over a semiconductor substrate is removed and replaced with functional gate structures. Portions of functional gate structures that are accounted as extraneous features in a circuit design are subsequently removed and the removed portions of the functional gate structures are filled with a dielectric material. Because the functional gate structures of substantially uniform pitch and spacing are formed before removal of unwanted portions of the functional gate structures, the chemical mechanical polishing process can be accomplished uniformly across the semiconductor substrate. The functional gate structures thus formed have a substantially uniform height across the substrate. |
| US09324705B2 |
Lateral bipolar junction transistor
A lateral bipolar junction transistor includes an emitter region; a base region surrounding the emitter region; a gate disposed at least over a portion of the base region; and a collector region surrounding the base region; wherein the portion of the base region under the gate does not under go a threshold voltage implant process. |
| US09324703B2 |
High-performance device for protection from electrostatic discharge
The semiconductor device for protection from electrostatic discharges comprises several modules (MDi) for protection from electrostatic discharges comprising triggerable elements (TRi) coupled with triggering means, the said modules being connected between two terminals by the intermediary of a resistive network (R). A common semiconductor layer contacts all of the modules, each triggerable element (TRi) having at least one gate (GHi), and the triggering means comprise a single triggering circuit (TC) common to all of the triggerable elements and whose output is connected to the gates of all of the triggerable elements. |
| US09324702B2 |
Photoelectric device
A photoelectric device includes a base, an LED (light emitting diode) element and a zener diode. The base includes a first electrode and a second electrode. The LED element and the zener diode are electrically connected with the first electrode and the second electrode. A recess structure is defined in the base. The zener diode is arranged in the recess structure. The zener diode is electrically connected in anti-parallel with the LED element. |
| US09324699B2 |
Semiconductor device
The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101, an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a side face of the first semiconductor element 113, and a second semiconductor element 111 provided on a face on the other side of the interconnect component 101. The interconnect component 101 has a constitution where an interconnect layer 103, a silicon layer 105 and an insulating film 107 are sequentially formed. The interconnect layer 103 has a constitution where the interconnect layer 103 has a flat plate shaped insulating component and a conductive component extending through the insulating component. The first semiconductor element 113 is electrically connected with the second semiconductor element 111 through the conductive component. |
| US09324698B2 |
Multi-chip structure and method of forming same
A device comprises a first chip and a second chip stacked together to form a multi-chip structure, wherein the multi-chip structure is embedded in an encapsulation layer. The device further comprises a redistribution layer formed on a top surface of a first side of the encapsulation layer, wherein the redistribution layer is connected to active circuits of the first chip and the second chip and the redistribution layer extends beyond at least one edge of the first chip and the second chip. |
| US09324696B2 |
Package-on-package devices, methods of fabricating the same, and semiconductor packages
In a package-on-package (PoP) device according to the inventive concepts, an anisotropic conductive film is disposed between a lower semiconductor package and an upper semiconductor package to remove an air gap between the lower and upper semiconductor packages. Thus, heat generated from a lower semiconductor chip may be rapidly and smoothly transmitted toward the upper semiconductor package, thereby increasing or maximizing a heat exhaust effect of the PoP device. |
| US09324694B2 |
Light-emitting diode
A light-emitting diode (LED) is provided. An LED die includes a first semiconductor layer, a light-emitting layer, a second semiconductor layer, a first electrode and a second electrode. At least a part of the first semiconductor is exposed from the light emitting layer and the second semiconductor layer. The first electrode and the second electrode is disposed on top of the exposed first semiconductor layer and the second semiconductor layer respectively. At least two metal pads are disposed on top of the first electrode and the second electrode of the LED die respectively. Each of the metal pads has a side surface. A fluorescent layer is disposed on a surface of the LED die. The fluorescent layer directly contacts with the side surfaces of the metal pads and fills a gap between the metal pads. |
| US09324693B2 |
Folded 3-D light sheets containing printed LEDs
A method of forming a light sheet includes printing a layer of inorganic LEDs on a first conductive surface of a substrate, depositing a first dielectric layer, and depositing a second conductor layer over the LEDs so that the LEDs are connected in parallel. At least one of the first conductive surface or the second conductor layer is transparent to allow light to escape. A phosphor layer may be formed over the light sheet so that the LED light mixed with the phosphor light creates white light. The flat light sheet is then folded, such as by molding, to form a three-dimensional structure with angled light emitting walls and reflective surfaces to control a directionality of the emitted light and improve the mixing of light. The folds may form rows of angled walls or polygons. |
| US09324689B2 |
Chip-on-film (COF) tape and corresponding COF bonding method
The present invention provides a chip-on-film (COF) tape and a corresponding COF bonding method. The COF tape comprises a base tape, a plurality of first COFs and second COFs, the first and second COFs are arranged on the base tape in an alternating manner, and are correspondingly punched onto a moving platform by a punching mechanism, and are respectively bonded onto two side edges of a liquid crystal panel. The present invention can simultaneously process the bonding operations of the two types of COF by using only one COF tape and one set of equipment, thus lowering the cost and increasing the productivity. |
| US09324684B2 |
Semiconductor device and manufacturing method thereof
A manufacturing method of a semiconductor device according to the present invention includes the steps of (a) preparing an insulating or conductive substrate; (b) arranging a bonding material having sinterability in at least one bonding region of a principal surface of the substrate (i.e., insulating substrate); and (c) sintering the bonding material while a bonding surface to be subjected to bonding of at least one semiconductor element is brought into pressurized contact with the bonding material, and bonding the substrate (i.e., insulating substrate) and the semiconductor element together through the bonding material. The bonding region in the step (b) is inwardly positioned from the bonding surface (i.e., region) of the semiconductor element in plan view, and the bonding material is not protruded outwardly from the bonding surface of the semiconductor element in plan view even after the step (c). |
| US09324683B2 |
Semiconductor package and method of manufacturing the same
In one embodiment, a semiconductor package includes a circuit substrate, a plurality of semiconductor chips stacked on the circuit substrate, insulating adhesive patterns interposed between the semiconductor chips, a heat slug provided on an uppermost semiconductor chip and adhered to the uppermost semiconductor chip by a heat dissipative adhesive pattern, and a mold structure provided on the circuit substrate to cover sidewalls of the semiconductor chips, the insulating adhesive patterns, the heat dissipative adhesive pattern and the heat slug. A failure of the semiconductor package during a manufacturing process of the mold structure may be reduced. The semiconductor package may therefore have good operating characteristics and reliability. |
| US09324682B2 |
Method and system for height registration during chip bonding
A method of fabricating a composite semiconductor structure is provided. Pedestals are formed in a recess of a first substrate. A second substrate is then placed within the recess in contact with the pedestals. The pedestals have a predetermined height so that a device layer within the second substrate aligns with a waveguide of the first substrate, where the waveguide extends from an inner wall of the recess. |
| US09324680B2 |
Solder attach apparatus and method
An electronic device including a solder structure and methods of forming an electrical interconnection are shown. Solder structures are shown including a solder ball formed from a first solder having a first melting temperature, and a connecting structure coupling the solder ball to one or more electrical connection pads, the connecting structure formed from a second solder having a second melting temperature lower than the first melting temperature. Electronic devices are shown including a polymer mold material formed over the solder structures. |
| US09324676B2 |
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die. |
| US09324671B2 |
Metal pillar bump packaging strctures and fabrication methods thereof
A method for fabrication a metal pillar bump packaging structure is provided. The method includes providing a semiconductor substrate; and forming a metal interconnect structure and a dielectric layer exposing a portion of the metal interconnect structure on the semiconductor substrate. The method also includes forming a photoresist layer having an opening with an undercut with a bottom area greater than a top area at the bottom of the opening to expose the metal interconnect structure and a portion of the dielectric layer on the semiconductor substrate; and forming a metal pillar bump structure having a pillar body and an extension part with an enlarged bottom area in the opening and the undercut. Further, the method includes forming a soldering ball on the metal pillar bump structure. |
| US09324664B2 |
Embedded chip package structure
An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer. |
| US09324662B2 |
Semiconductor device and manufacturing method thereof for protecting metal-gate from oxidation
A semiconductor device and a manufacturing method thereof is provided. The method comprises: providing a substrate for the semiconductor device with a gate structure and a first dielectric interlayer being formed thereon, said gate structure comprising a metal gate and an upper surface of said first dielectric interlayer being substantially flush with an upper surface of said gate; forming an interface layer to cover at least the upper surface of said gate such that the upper surface of said gate is protected from being oxidized; and forming a second dielectric interlayer on said interface layer. |
| US09324659B2 |
Semiconductor device and method of forming POP with stacked semiconductor die and bumps formed directly on the lower die
A semiconductor device has a first semiconductor wafer mounted to a carrier. A second semiconductor wafer is mounted to the first semiconductor wafer. The first and second semiconductor wafers are singulated to separate stacked first and second semiconductor die. A peripheral region between the stacked semiconductor die is expanded. A conductive layer is formed over the carrier between the stacked semiconductor die. Alternatively, a conductive via is formed partially through the carrier. A bond wire is formed between contact pads on the second semiconductor die and the conductive layer or conductive via. An encapsulant is deposited over the stacked semiconductor die, bond wire, and carrier. The carrier is removed to expose the conductive layer or conductive via and contact pads on the first semiconductor die. Bumps are formed directly on the conductive layer and contact pads on the first semiconductor die. |
| US09324655B2 |
Modified via bottom for beol via efuse
An electronic fuse structure including an Mx level including a first Mx metal, a second Mx metal, and an Mx cap dielectric above of the first and second Mx metal, an Mx+1 level above the Mx level, the Mx+1 level including an Mx+1 metal and a via electrically connecting the Mx metal to the Mx+1 metal in a vertical orientation, and a nano-pillar located within the via and above the second Mx metal. |
| US09324654B2 |
Integrated circuits with electronic fuse structures
Integrated circuits including electronic fuse structures are disclosed. In some examples, the electronic fuse structure includes a fuse part and first and second pre-heating lines positioned generally parallel to and co-planar with the fuse part, and electrically connected with the fuse part. The electronic fuse structure also includes a cathode physically and electrically connected to the first pre-heating line and an anode physically and electrically connected to the second pre-heating line. |
| US09324653B2 |
Semiconductor device
On a single semiconductor package PK1, m semiconductor chips CP1 to CPm are mounted, and the semiconductor package PK1 has external terminals T shared by m pad electrodes PD1 to PDm of the m semiconductor chips CP1 to CPm. An electrostatic protection circuit CD is mounted on only one CPm of the m semiconductor chips CP1 to CPm. |
| US09324651B1 |
Package structure
A package structure includes a chip, a substrate, wires and a molding compound. The chip includes an active surface, a back surface and bonding pads disposed on the active surface. The substrate includes first and second solder masks, first and second patterned circuit layers and a core layer having a first surface and a second surface. The first patterned circuit layer is disposed on the first solder mask. The core layer disposed on the first solder mask with the first surface partially exposes the first patterned circuit layer. The substrate disposed on the active surface with the first solder mask exposes the bonding pads. The second patterned circuit layer disposed on the second surface. The second solder mask partially covers the second patterned circuit layer. The wires are connected between the first patterned circuit layer and the bonding pads. The molding compound covers the chip, the wire and the substrate. |
| US09324650B2 |
Interconnect structures with fully aligned vias
A method of forming a fully aligned via connecting two metal lines on different Mx levels by forming a recessed opening above a first metal line in a first ILD; forming a cap on the first ILD and in the recessed openings; forming a second ILD on the cap; forming a metal trench hardmask above the second ILD, forming a metal trench pattern in the metal trench hardmask; forming a via pattern that is self aligned to the metal trench pattern and above a portion of the first metal line; forming a via opening exposing the first metal line by transferring the via pattern and metal trench pattern to lower levels, the via pattern is self-aligned to the recessed opening; and forming a via and a third metal line in the via opening and the transferred metal trench pattern, respectively. |
| US09324649B2 |
Semiconductor device including a cap substrate on a side wall that is disposed on a semiconductor substrate
Certain embodiments provide a semiconductor device including a semiconductor substrate, a side wall portion, a cap substrate, a plurality of external connection terminals, and a ground conductor. The semiconductor substrate includes a semiconductor element on its front surface. The side wall portion has conductivity and is provided on the front surface of the semiconductor substrate so as to surround the semiconductor element. The cap substrate is provided on the side wall portion so as to be electrically connected to the side wall portion. Each of the plurality of external connection terminals is provided on a back surface of the semiconductor substrate so as to be electrically connected to the semiconductor element. The ground conductor is provided to be electrically connected to the side wall portion on the entire back surface of the semiconductor substrate except an area in which the plurality of external connection terminals is provided. |
| US09324645B2 |
Method and system for co-packaging vertical gallium nitride power devices
An electronic package includes a leadframe and a plurality of pins. The electronic package also includes a first gallium nitride (GaN) transistor comprising a source, gate, and drain and a second GaN transistor comprising a source, gate, and drain. The source of the first GaN transistor is electrically connected to the leadframe and the drain of the second GaN transistor is electrically connected to the leadframe. The electronic package further includes a first GaN diode comprising an anode and cathode and a second GaN diode comprising an anode and cathode. The anode of the first GaN diode is electrically connected to the leadframe and the cathode of the second GaN diode is electrically connected to the leadframe. |
| US09324643B1 |
Integrated circuit device having exposed contact pads and leads supporting the integrated circuit die and method of forming the device
An integrated circuit (IC) device includes an IC die and encapsulation material surrounding the IC die. A first set of leads is coupled to the IC die and has first contact pads exposed on a bottom surface of the encapsulation material adjacent its periphery. A second set of leads is coupled to the IC die and has second contact pads exposed on the bottom surface of the encapsulation material adjacent its periphery. The second set of leads has internal ends extending laterally inwardly from respective ones of the second contact pads to define a die pad area supporting the IC die. |
| US09324634B2 |
Semiconductor interconnect structure having a graphene-based barrier metal layer
An interconnect structure and method for fabricating the interconnect structure having enhanced performance and reliability, by utilizing a graphene-based barrier metal layer to block oxygen intrusion from a dielectric layer into the interconnect structure and block copper diffusion from the interconnect structure into the dielectric layer, are disclosed. At least one opening is formed in a dielectric layer. A graphene-based barrier metal layer disposed on the dielectric layer is formed. A seed layer disposed on the graphene-based barrier metal layer is formed. An electroplated copper layer disposed on the seed layer is formed. A planarized surface is formed, wherein a portion of the graphene-based barrier metal layer, the seed layer, and the electroplated copper layer are removed. In addition, a capping layer disposed on the planarized surface is formed. |
| US09324632B2 |
Semiconductor structures with isolated ohmic trenches and stand-alone isolation trenches and related method
A method of forming a semiconductor structure in a semiconductor-on-insulator (SOI) substrate and semiconductor structure so formed are provided. The SOI substrate includes a semiconductor layer; a bulk semiconductor region underlying the semiconductor layer; and an insulation layer between the two. The method includes substantially simultaneously forming a first opening and a second opening extending from the semiconductor layer to the conductive region; introducing an insulating material to the side walls of the first opening; at least partially filling the first opening with a semiconductor material to provide an ohmic contact trench; and at least partially filling the second opening with an insulating material to form a device isolation trench. Insulating regions, for example, shallow trench isolation (STI) regions, may be formed about the device isolation trench and the ohmic contact trench. Semiconductor structures are also provided. The benefits of combining the features of SOI and STI structures are provided. |
| US09324631B2 |
Semiconductor device including a stress buffer material formed above a low-k metallization system
A bump structure or pillar structure formed above a metallization system of a complex semiconductor device may include a stress buffer layer, which may efficiently distribute the resulting mechanical stress which may typically occur during the chip package interaction due to a thermal mismatch of these components. The stress buffer layer comprises copper-based buffer regions that cover a significant portion of the overall surface, wherein a thickness of approximately 3-10 μm may also be used. Moreover, the buffer regions may efficiently replace aluminum as a terminal metal active region. |
| US09324626B2 |
Interposers with circuit modules encapsulated by moldable material in a cavity, and methods of fabrication
Stacked dies (110) are encapsulated in an interposer's cavity (304) by multiple encapsulant layers (524) formed of moldable material. Conductive paths (520, 623) connect the dies to the cavity's bottom all (304B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole (514) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided. |
| US09324624B2 |
Optimizing light extraction efficiency for an LED wafer
The present disclosure involves a method of fabricating a light-emitting diode (LED) wafer. The method first determines a target surface morphology for the LED wafer. The target surface morphology yields a maximum light output for LEDs on the LED wafer. The LED wafer is etched to form a roughened wafer surface. Thereafter, using a laser scanning microscope, the method investigates an actual surface morphology of the LED wafer. Afterwards, if the actual surface morphology differs from the target surface morphology beyond an acceptable limit, the method repeats the etching step one or more times. The etching is repeated by adjusting one or more etching parameters. |
| US09324623B1 |
Method of manufacturing semiconductor device having active fins
Provided is a method of manufacturing a semiconductor device. The method of manufacturing the semiconductor includes preparing a substrate on which a first region and a second region are defined, forming a first active fin and a second active fin in the first and second regions, respectively, forming a first gate structure and a second gate structure on the substrate in a direction that crosses the first and second active fins, forming a first recess in the first active fin that is adjacent to one side surface of the first gate structure, forming a first epitaxial layer in the first recess, forming a first silicide layer on the first epitaxial layer, forming a second recess in the second active fin that is adjacent to one side surface of the second gate structure, and forming a second silicide layer in the second recess, wherein the second silicide layer includes nickel (Ni) and platinum (Pt). |
| US09324622B2 |
Semiconductor device and method of forming the same
A method of forming a semiconductor device includes forming a gate stack over a substrate, forming an amorphized region in the substrate adjacent to an edge of the gate stack, forming a stress film over the substrate, performing a process to form a dislocation with a pinchoff point in the substrate, removing at least a portion of the dislocation to form a recess cavity with a tip in the substrate, and forming a source/drain feature in the recess cavity. |
| US09324619B2 |
Semiconductor device and method of fabricating the same
A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate. |
| US09324609B2 |
Methods of manufacturing semiconductor devices having high aspect ratio
Methods of forming a hard mask capable of implementing an electrode having a high aspect ratio are provided. A molding layer may be formed on a substrate. A sacrificial layer may be formed on the molding layer. First mask patterns may be formed in parallel in the sacrificial layer. After the first mask patterns are formed, second mask patterns, which cross the first mask patterns and are in parallel, may be formed in the sacrificial layer. The first mask patterns and the second mask patterns may have materials more opaque than the sacrificial layer. Upper surfaces of the sacrificial layer, the first mask patterns and the second mask patterns may be exposed at the same horizontal level. The sacrificial layer may be removed. Openings, which pass through the molding layer, may be formed using the first mask patterns and the second mask patterns as etch masks. Electrodes may be formed in the openings. |
| US09324606B2 |
Self-aligned repairing process for barrier layer
A self-aligned repairing process for a barrier layer is provided. A repair layer is formed by chemical vapor deposition using an organometallic compound as a precursor gas. The precursor gas adsorbed on a dielectric layer exposed by defects in a barrier layer is transformed to an insulating metal oxide layer, and the precursor gas adsorbed on the barrier layer is transformed to a metal layer. |
| US09324603B2 |
Semiconductor structures with shallow trench isolations
A method is disclosed that includes the operations outlined below. An insulating material is disposed within a plurality of trenches on a semiconductor substrate and over the semiconductor substrate. The first layer is formed over the insulating material. The first layer and the insulating material are removed. |
| US09324594B2 |
Workpiece handling modules
A workpiece handling module including a first housing member and a second housing member pivotally movable relative to the first member forming a housing having an access side and a second side opposite the access side and side walls, a first portion of the side walls is carried by the first member and a second portion of the side walls is carried by the second member, and at least one of the first and second housing members includes at least one sealable opening for allowing ingress and egress of workpieces to and from an interior chamber formed by the first and second housing members in a closed configuration, and the second portion of the side walls adjacent the access side and carried by the second member is greater than the first portion of the side walls adjacent the access side and carried by the first member. |
| US09324592B2 |
Wafer processing tape
A wafer processing tape includes a release film having a large length; an adhesive layer formed on a first surface of the release film and having a predetermined planar shape; a pressure-sensitive adhesive film having a label portion and a surrounding portion surrounding outside the label portion; and a support member formed on a second surface of the release film opposite to the first surface on which the adhesive layer and the pressure-sensitive adhesive film are formed. The label portion has a predetermined planar shape and covers the adhesive layer so that the label portion contacts with the release film around the adhesive layer. The support member is disposed at both end portions of the release film in a short side direction of the release film. The support member has a coefficient of linear expansion of 300 ppm/° C. or less. |
| US09324590B2 |
Processing methods and apparatus with temperature distribution control
Wafer treatment process and apparatus is provided with a wafer carrier arranged to hold wafers and to inject a fill gas into gaps between the wafers and the wafer carrier. The apparatus is arranged to vary the composition, flow rate, or both of the fill gas so as to counteract undesired patterns of temperature non-uniformity of the wafers. |
| US09324588B2 |
Data analysis method for plasma processing apparatus, plasma processing method and plasma processing apparatus
A stable etching process is realized at an earlier stage by specifying the combination of wavelength and time interval, which exhibits a minimum prediction error of etching processing result within a short period. For this, the combination of wavelength and time interval is generated from wavelength band of plasma emission generated upon etching of the specimen, the prediction error upon prediction of etching process result is calculated with respect to each combination of wavelength and time interval, the wavelength combination is specified based on the calculated prediction error, the prediction error is further calculated by changing the time interval with respect to the specified wavelength combination, and the combination of wavelength and time interval, which exhibits the minimum value of calculated prediction error is selected as the wavelength and the time interval used for predicting the etching processing process. |
| US09324585B2 |
Semiconductor package and method of fabricating the same
A method of fabricating a semiconductor package is provided, including: disposing a plurality of semiconductor elements on a carrier through an adhesive layer in a manner that a portion of the carrier is exposed from the adhesive layer; forming an encapsulant to encapsulate the semiconductor elements; removing the adhesive layer and the carrier to expose the semiconductor elements; and forming a build-up structure on the semiconductor elements. Since the adhesive layer is divided into a plurality of separated portions that will not affect each other due to expansion or contraction when temperature changes, the present invention prevents positional deviations of the semiconductor elements during a molding process, thereby increasing the alignment accuracy. |
| US09324583B2 |
Packaging method
The present invention relates to a packaging method including the steps: a cementing layer is formed on a carrier board; the functional sides of chips and passive devices are attached to the cementing layer; a sealing material layer is formed on the side of the carrier board to which the chips and the passive devices are attached, and packaging and curing are performed; and the carrier board and the cementing layer are removed. Compared to the prior art, the system-level fan-out wafer packaging method claimed by the present invention first integrates chips and passive devices and then packages the chips and the passive devices together, thereby forming a final packaged product having not single-chip functionality but integrated-system functionality. Compared to current system-level packaging, highly integrated wafer-level packaging reduces such interfering factors as system-internal electric resistance and inductance, and accommodates the growing demand for lighter, thinner, shorter, and smaller semiconductor packaging. |
| US09324577B2 |
Modified self-aligned contact process and semiconductor device
Methods of modifying a self-aligned contact process in a semiconductor fabrication and a semiconductor device are provided. A method includes forming a transistor over a substrate, including depositing a high-k dielectric layer over the substrate; depositing a work function metal layer over the high-k dielectric layer; forming a metal gate over the work function metal layer; forming two spacers sandwiching the work function metal layer and the metal gate; and forming a doped region in the substrate; etching the work function metal layer and the metal gate to leave a metal residue over inner walls of the two spacers exposing the work function metal layer and the metal gate; modifying the metal residue and the exposed work function metal layer and metal gate to form a metal compound; depositing an insulator covering the metal compound; and forming contact pads respectively electrically connected to the metal gate and the doped region. |
| US09324574B2 |
Methods of forming patterns in semiconductor devices
Methods of forming a pattern in a semiconductor device may be provided. The methods may include sequentially forming a first hard mask layer and a second hard mask layer on an etching target layer including first and second regions, forming a first spacer layer on the second hard mask layer, forming a second hard mask pattern layer by etching the second hard mask layer using the first spacer layer, forming a second spacer layer on a sidewall of the second hard mask pattern layer, forming a first hard mask pattern layer by etching the first hard mask layer using the second spacer layer, and etching the etching target layer using the first hard mask pattern layer. |
| US09324570B1 |
Method of manufacturing semiconductor device
The present invention provides a method of manufacturing a semiconductor device including using a first photomask to form a sacrificial block on a hard mask layer in a first region, a first dummy pattern on the sacrificial block, a first spacer on sidewalls of the sacrificial block and a second spacer in a second region; using a second photomask to form a feature mask on the first dummy pattern and a fin cutting mask on the second spacer; and performing a fin cutting process to remove a portion of the first dummy pattern, a portion of the sacrificial block underlying the portion of the first dummy pattern and the first spacer to form a feature spacer and to remove a portion of the second spacer without being covered with the fin cutting mask to form a fin spacer. |
| US09324565B1 |
Systems and methods for forming contact definitions
In one embodiment, a method for fabricating thin film tunnel devices includes forming multiple bottom electrodes on a substrate, depositing an insulating layer of material on top of each bottom electrode, and directly depositing a single, continuous top layer of conductive material on the insulating layers that does not contact the bottom electrodes, wherein the bottom electrodes, insulating layers, and continuous top layer together form multiple thin film tunnel devices in which the continuous top layer forms the top electrode for each tunnel device and electrically connects the tunnel devices. |
| US09324564B2 |
Spalling with laser-defined spall edge regions
Laser ablation can be used to form a trench within at least a blanket layer of a stressor layer that is atop a base substrate. A non-ablated portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can also be used to form a trench within a blanket material stack including at least a plating seed layer. A stressor layer is formed on the non-ablated portions of the material stack and one portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can be further used to form a trench that extends through a blanket stressor layer and into the base substrate itself. The trench has an edge that defines the edge of the material layer region to be spalled. |
| US09324562B1 |
Metal halide solid-state surface treatment for nanocrystal materials
Methods of treating nanocrystal and/or quantum dot devices are described. The methods include contacting the nanocrystals and/or quantum dots with a solution including metal ions and halogen ions, such that the solution displaces native ligands present on the surface of the nanocrystals and/or quantum dots via ligand exchange. |
| US09324558B2 |
Machining process for semiconductor wafer
A surface of a semiconductor wafer is subjected to high flattening processing.A resin application and grinding step is repeatedly carried out, the step including determining as a reference surface a flat surface obtained by applying a curable material to one entire surface of a wafer sliced out from a semiconductor single crystal ingot with the use of a wire saw apparatus and performing surface grinding with respect to the other surface of the wafer, and determining as a reference surface the other surface of the wafer subjected to the surface grinding and performing the surface grinding with respect to the one surface of the wafer. |
| US09324554B2 |
Methods and systems for providing a substantially quadrupole field with significant hexapole and octapole components
A system and method involving processing ions in a linear ion trap are provided, involving a two-dimensional asymmetric substantially quadrupole field having a hexapole and octopole component. |
| US09324550B1 |
Self-shielding flex-circuit drift tube, drift tube assembly and method of making
The present disclosure is directed to an ion mobility drift tube fabricated using flex-circuit technology in which every other drift electrode is on a different layer of the flex-circuit and each drift electrode partially overlaps the adjacent electrodes on the other layer. This results in a self-shielding effect where the drift electrodes themselves shield the interior of the drift tube from unwanted electro-magnetic noise. In addition, this drift tube can be manufactured with an integral flex-heater for temperature control. This design will significantly improve the noise immunity, size, weight, and power requirements of hand-held ion mobility systems such as those used for explosive detection. |
| US09324549B2 |
MEMS 2D air amplifier ion focusing device and manufacturing method thereof
The present invention relates to the field of micro electro mechanical system (MEMS), and particularly relates to a MEMS device of a two-dimensional (2D) air amplifier for electro spray ion focusing. It mainly includes original gas inlets, a gap structure, a wall structure and a center focusing groove in the axis of air amplifier. The feature of present invention is the double layers SU-8 mold fabricated by a micro machining method. Then the polydimethylsiloxane (PDMS) air amplifier is cast and bonded. In order to enhance the structure stiffness, PDMS is bonded with a glass supporting substrate. In the present invention, the fabrication method for the SU-8 mold and the PDMS casting and bonding processes are disclosed in detail so that the MEMS planar air amplifier ion focusing device can be fabricated by those skilled in the art. This fabrication method has advantages of simple process, low cost, small dimension size and easily implemented. |
| US09324545B2 |
Calibrating dual ADC acquisition system
A method of calibrating a dual gain ADC detector system is disclosed comprising passing a test signal through a high gain signal path to produce a first signal and passing a test signal through a low gain signal path to produce a second signal. A time difference between the first signal and the second signal is then determined. Data from the two ADCs is then stitched to form a composite mass spectrum without needing to correct the phase between the two ADCs. |
| US09324544B2 |
Saturation correction for ion signals in time-of-flight mass spectrometers
The invention relates to time-of-flight mass spectrometers in which individual time-of-flight spectra are measured by detection systems with limited dynamic measurement range and are summed to sum spectra. The invention proposes a method to increase the dynamic range of measurement of the spectrum. To achieve this, those ion signals whose measured values display saturation of the analog-to-digital converter (ADC) are replaced by correction values, particularly if several successive measured values are in saturation. The correction values are obtained from the width of the signals, preferably simply from the number of measured values in saturation. |
| US09324543B2 |
Dynamic resolution correction of quadrupole mass analyser
A method of mass spectrometry is disclosed comprising automatically correcting the mass or mass to charge ratio resolution of a quadrupole mass filter or mass analyser one or more times during an experimental run or acquisition based upon a measurement, determination or estimation of the mass or mass to charge ratio resolution of one or more reference ions observed in a mass spectrum or mass spectral data acquired either during the same experimental run or acquisition or during a previous experimental run or acquisition. |
| US09324537B2 |
Charged particle inspection method and charged particle system
The present invention relates to a charged particle system comprising: a charged particle source; a first multi aperture plate; a second multi aperture plate disposed downstream of the first multi aperture plate, the second multi aperture plate; a controller configured to selectively apply at least first and second voltage differences between the first and second multi aperture plates; wherein the charged particle source and the first and second multi aperture plates are arranged such that each of a plurality of charged particle beamlets traverses an aperture pair, said aperture pair comprising one aperture of the first multi aperture plate and one aperture of the second multi aperture plate, wherein plural aperture pairs are arranged such that a center of the aperture of the first multi aperture plate is, when seen in a direction of incidence of the charged particle beamlet traversing the aperture of the first multi aperture plate, displaced relative to a center of the aperture of the second multi aperture plate. The invention further pertains to a particle-optical component configured to change a divergence of a set of charged particle beamlets and a charged particle inspection method comprising inspection of an object using different numbers of charged particle beamlets. |
| US09324536B2 |
Dual-energy X-ray tubes
Dual-energy x-ray tubes. In one example embodiment, a dual-energy x-ray tube includes an evacuated enclosure, an anode positioned within the evacuated enclosure, a first cathode positioned within the evacuated enclosure, and a second cathode positioned within the evacuated enclosure. The first cathode and the second cathode are configured to operate simultaneously at different voltages. |
| US09324534B2 |
Cold field electron emitters based on silicon carbide structures
A cold cathode field emission electron source capable of emission at levels comparable to thermal sources is described. Emission in excess of 6 A/cm2 at 7.5 V/μm is demonstrated in a macroscopic emitter array. The emitter has a monolithic and rigid porous semiconductor nanostructure with uniformly distributed emission sites, and is fabricated through a room temperature process which allows for control of emission properties. These electron sources can be used in a wide range of applications, including microwave electronics and x-ray imaging for medicine and security. |
| US09324533B2 |
Medium voltage controllable fuse
An electric fuse, having a first fusible element and a disconnect section electrically connected in series to the first fusible element. The disconnect section is comprised of a first stationary contact, a second stationary contact and a movable contact movable from a first position electrically connecting the first and second stationary contacts to form a conductive path through the disconnect section to a second position electrically separating the first and second stationary contacts from each other and terminating the conductive path through the disconnect section. A retaining element holds the movable contact in the first position, the retaining element operable to release the movable contact from the first position when activated by an electrical (actuation) signal from an external source. |
| US09324531B2 |
Fuse unit
A fuse unit is provided having a fuse element (2) in which a first terminal connecting part (4) and second terminal connecting parts (5) are formed and an insulative resin part (20) is formed on the outer surface of the fuse element (2) with insertion molding. Threaded bolt holes (10) are formed in the first terminal connecting part (4) and the second terminal connecting parts (5) of the fuse element (2). Bolts (30) are temporarily fixed to the fuse element (2) by being screwed into the threaded bolt holes (10), and the insulating resin part (20) is formed with insertion molding by using the fuse element (2) to which the bolts (30) are temporarily fixed as an inserted component. |
| US09324528B1 |
Magnetic trip mechanism for circuit breaker
A magnetic trip mechanism for a circuit breaker includes an electrically conductive strap having a first wall portion and a second wall portion that define an interior space therebetween. Also included is a flux block disposed at least partially within the interior space, and movable in response to a short circuit condition of the circuit breaker. Further included is a trip lever operatively coupled to the flux block. Yet further included is a trip latch moveable between a latched condition and an unlatched condition with a handle, wherein rotation of the trip lever occurs in response to the short circuit condition and causes movement from the flux block to actuate the trip latch to the unlatched condition. |
| US09324527B2 |
Arc monitor
An arc monitor for tripping a circuit breaker in the event of an arc occurrence, the arc monitor including at least one arc detector and arranged to be operatively connected to at least one circuit breaker. The arc monitor includes a base unit and at least one extension unit with at least one arc detector input terminal, the at least one arc detector being connectable to the at least one arc detector input terminal, and the base unit includes a control unit. The extension unit is operatively connectable to and arranged to send an arc occurrence signal to the control unit, which is arranged to send a trip signal for tripping the at least one circuit breaker, in the event of an arc occurrence. Also an electrical installation including an arc monitor, and the use of an arc monitor as a supervision and safety equipment in an electrical installation. |
| US09324517B2 |
Switch actuator having light guiding features
A switch assembly includes a base plate and a switch element. The base plate includes a protrusion, a first light emitting diode, a second light emitting diode, a first switch contact, and a second switch contact. The first light emitting diode and the first switch contact are positioned on a first side of the protrusion, and the second light emitting diode and the second switch contact are positioned on a second side of the protrusion. The switch element is movably mounted on the protrusion and contactable with the first switch contact and the second switch contact. The switch element includes a light guiding portion with a first light incident surface positioned above the first light emitting diode, a second light incident surface positioned above the second light emitting diode, and a light emitting surface. |
| US09324514B2 |
Key input device
There is provided a key input device including a supporting member including groove portions inclined with respect to a horizontal direction, a plurality of keytops each including a sliding portion which is fitted in a corresponding groove portion of the groove portions and slides along the groove portion, and a control member configured to cause two or more keytops of the plurality of keytops to slide obliquely downward along the groove portions. |
| US09324512B2 |
SPST switch, SPDT switch, SPMT switch and communication device using the same
Various embodiments provide a single pole single throw switch. The switch may include a first terminal, a second terminal and a control terminal; a field-effect transistor having a drain connected to the first terminal, a source connected to the ground, and a gate; a bias resistor connected between the gate of the field-effect transistor and the control terminal; an inductor connected between the first terminal and the second terminal; and a capacitor having one end connected to the second terminal and another end connected to the ground. |
| US09324511B2 |
Switch mechanism and related electronic device
A switch mechanism capable of preventing a battery from short is disclosed in the present invention. The switch mechanism includes a base, a circuit board, a connector and a cover. The base has an accommodating space for accommodating the battery with a first terminal. The circuit board with a second terminal is disposed on the base. The connector is movably disposed on the base and moves between a first position and a second position. The connector located at the first position does not contact the first terminal or the second terminal. The cover is detachably disposed on the base. The cove includes an actuating portion, which moves the connector from the first position to the second position when the cove is assembled with the base, so that the connector simultaneously contacts the first terminal and the second terminal to electrically connect the battery with the circuit board. |
| US09324510B2 |
Gas circuit breaker
The gas circuit breaker includes a main shaft which is a rotating shaft of a main lever connected to an opening spring, a cam shaft which is a rotating shaft of a cam connected to a closing spring, a main shaft holding member which holds the main shaft, a cam shaft holding member which holds the cam shaft, and a bracket which holds the main shaft holding member and the cam shaft holding member. A through hole is provided in a portion of the bracket between the main shaft holding member and the cam shaft holding member, and a heat generating member is provided at least on a portion of the through hole. |
| US09324509B2 |
Touch panel
Disclosed is a touch panel. The touch panel includes an insulating layer, first sensing electrode patterns provided on one surface of the insulating layer, and second sensing electrode patterns provided on another surface opposite to the one surface of the insulating layer such that the second sensing electrode patterns are insulated from the first sensing electrode patterns. A bridge electrode is prevented from being viewed by the eyes of a user by removing the bridge electrode from the touch panel. The touch panel is constructed in a simpler structure, so that the production cost of the touch panel is reduced. |
| US09324499B2 |
High capacitance single layer capacitor
A high capacitance single layer ceramic capacitor structure having a ceramic dielectric body containing one or more internal electrodes electrically connected to a metallization layer applied to the side and bottom surfaces and a metallization pad electrically isolated from the metallization side and bottom surfaces positioned on a top surface of the ceramic body. |
| US09324498B2 |
Dielectric composition, and multilayered ceramic capacitor including the same as dielectric layer
Disclosed herein are a dielectric composition including a compound represented by the following Chemical Formula A5-xB10O30-x (A necessarily includes Ba, and a portion of Ba is substituted by at least one selected from Sr and Ca; B necessarily includes Nb, and a portion of Nb is substituted by at least one selected from Ta and V; and x satisfies the following equation: 1 |
| US09324496B2 |
Multilayer ceramic electronic component and method of manufacturing the same
There is provided a multilayer ceramic electronic component, including: a ceramic body including a dielectric layer and having first and third surfaces opposing each other in a length direction of the dielectric layer and second and fourth surfaces opposing each other in a width direction thereof; and a multilayer part including a first internal electrode and a second internal electrode disposed to oppose each other, while having the dielectric layer interposed there between in the ceramic body, and exposed to the first and third surfaces of the ceramic body, respectively; wherein one or more residual carbon removing path parts are formed to be protruded on both side of the first and second internal electrodes in a length direction of the ceramic body. |
| US09324491B2 |
Inductor device and electronic apparatus
An inductor device includes a layer-laminated member with laminated base-material layers and a coil with a winding axis coincident with a direction of layer lamination, a smaller-thickness portion near one end portion thereof in the direction of layer lamination, and a greater-thickness portion with more base-material layers than that in the smaller-thickness portion. The coil is located in the greater-thickness portion. The coil is connected, at its one end positioned near one end portion of the layer-laminated member, to a conductor pattern in the smaller-thickness portion. The coil is connected, at its other end positioned near the other end portion of the layer-laminated member, to a conductor pattern in a base-material layer located near the other end portion of the layer-laminated member. The conductor patterns are located at respective different positions in the direction of layer lamination. |
| US09324490B2 |
Apparatus and methods for vector inductors
Apparatus and methods for vector inductors are provided herein. In certain configurations, an apparatus includes a vector inductor comprising a plurality of conductors arranged in a stack and separated from one another by dielectric. The conductors are tightly coupled to one another to provide a relatively high amount of mutual inductance. For example, adjacent conductors in the stack can be mutually coupled with a coupling coefficient k that is at least 0.5, or more particularly, 0.9 or greater. In certain implementations, the conductors are electrically connected in parallel with one another to provide the vector inductor with low resistance. However, tight coupling between the conductors in the stack can result in vector inductor having an overall inductance that is similar to that of a self-inductance of an individual conductor in the stack. The Q-factor of the vector inductor can be increased by the inclusion of additional conductors in the stack. |
| US09324476B2 |
Insulated winding wire
Insulated winding wires and associated methods for forming winding wires are described. A winding wire may include a conductor and insulation formed around the conductor. The insulation may provide a partial discharge inception voltage greater than approximately 1,000 volts and a dielectric strength greater than approximately 10,000 volts. Additionally, the insulation may be capable of withstanding a continuous operating temperature of approximately 220° C. without degradation. The insulation may include at least one base layer formed around an outer periphery of the conductor, and an extruded thermoplastic layer formed around the base layer. The extruded layer may include at least one of polyetheretherketone (PEEK) or polyaryletherketone (PAEK). |
| US09324475B2 |
Doped carbon nanotubes and transparent conducting films containing the same
Transparent conducting electrodes include a doped single walled carbon nanotube film and methods for forming the doped single walled carbon nanotube (SWCNT) by solution processing. The method generally includes depositing single walled carbon nanotubes dispersed in a solvent and a surfactant onto a substrate to form a single walled carbon nanotube film thereon; removing all of the surfactant from the carbon nanotube film; and exposing the single walled carbon nanotube film to a single electron oxidant in a solution such that one electron is transferred from the single walled carbon nanotubes to each molecule of the single electron oxidant. |
| US09324474B2 |
Dispersion for the metallization of contactings
A dispersion is provided having a dispersion medium and a plurality of colloid particles finely distributed in the dispersion medium, the colloid particles being electrically conductive, the dispersion being a functional ink for the wetting of an inner wall of a contacting opening of a substrate using a print process. |
| US09324473B2 |
Nanoparticle composition, a device and a method thereof
A nanoparticle composition, a device including the nanoparticle composition, and a method thereof are provided. The composition comprises nanoparticles such as Gold nanorods (NR) and electrically charged self-assembled molecular aggregates such as disodium chromoglycate (DSCG) in a common solvent such as water. The nanoparticles are assembled as, for example, side-by-side and end-to-end assemblies of nanorods, through a non-covalent interaction such as anisotropic electrostatic interaction with the electrically charged self-assembled molecular aggregates. The invention can be used in a cloaking device, a biological sensing device, a drug delivery, a meta material, a negative index material, an enhanced imaging device, and a device for solar energy conversion, and exhibits many merits such as simpler process without the need of a covalent bonding between the nanoparticles, different manners of nanoparticles assembling with same linker, higher thermal stability, cost effectiveness, and capability of gradual controlling of the degree of NR assembly, among others. |
| US09324471B2 |
Aluminum alloy wire rod, aluminum alloy stranded wire, coated wire, wire harness and manufacturing method of aluminum alloy wire rod
An aluminum alloy wire rod has a composition consisting of 0.1-1.0 mass % Mg; 0.1-1.0 mass % Si; 0.01-1.40 mass % Fe; 0.000-0.100 mass % Ti; 0.000-0.030 mass % B; 0.00-1.00 mass % Cu; 0.00-0.50 mass % Ag; 0.00-0.50 mass % Au; 0.00-1.00 mass % Mn; 0.00-1.00 mass % Cr; 0.00-0.50 mass % Zr; 0.00-0.50 mass % Hf; 0.00-0.50 mass % V; 0.00-0.50 mass % Sc; 0.00-0.50 mass % Co; 0.00-0.50 mass % Ni; and the balance being Al and incidental impurities, wherein at least one or none of Ti, B, Cu, Ag, Au, Mn, Cr, Zr, Hf, V, Sc, Co and Ni is contained in the composition. A dispersion density of an Mg2Si compound having a particle size of 0.5 μm to 5.0 μm is less than or equal to 3.0×10−3 particles/μm2. Each of Si and Mg at a grain boundary between crystal grains of a parent phase has a concentration of less than or equal to 2.00 mass %. |
| US09324469B1 |
X-ray intensifying screens including micro-prism reflective layer for exposing X-ray film, X-ray film cassettes, and X-ray film assemblies
An intensifying screen for exposing X-ray film includes a screen support backing, a luminescent layer having a luminescent material that emits light in the presence of X-rays, and a reflective layer disposed between the luminescent layer and the screen support backing, the reflective layer including a plurality of micro-prisms that reflect light emitted by the luminescent material. An X-ray film cassette includes at least one intensifying screen and a housing surrounding the at least one intensifying screen. |
| US09324467B2 |
Mobile UVA curing system for collision and cosmetic repair of automobiles
A mobile radiation system is provided. The mobile radiation system comprises a mobile radiation device coupled to a control unit; a radiation blocker having an adaptor opening for receiving said mobile radiation device when said mobile radiation device is in a seated position on said radiation blocker; and a mobile carrier comprising a first compartment for housing said radiation blocker, a second compartment for housing said control unit, and a carrier motion device. The adaptor opening can dimensionally fit the mobile radiation device to block radiations from the mobile radiation device when said mobile radiation device is in the seated position. The mobile radiation device can produce radiation having peak radiation wavelength in a range of from about 250 nm to about 450 nm and can have a peak irradiation power in a range of from about 0.5 W/cm2 to about 10 W/cm2. |
| US09324466B2 |
Transportation container
The present invention provides a radiation-shielding container for a radiopharmaceutical that allows or a product fluid to be dispensed from a base component thereof. |
| US09324464B2 |
Apparatus and method to inspect nuclear reactor components in the core annulus, core spray and feedwater sparger regions in a nuclear reactor
This invention generally concerns robotic systems and is specifically concerned with an improved apparatus and method for inspecting nuclear reactor components in limited access areas, such as, the core annulus, core spray and feedwater sparger regions of a nuclear reactor. This invention includes an apparatus for remotely operating and positioning at least one inspection device for inspecting at least one component in an annulus region of a reactor pressure vessel of a nuclear power plant. The apparatus includes a track, a braking system and a frame assembly which has a frame movably connected to the track, at least one mast assembly and at least one mast positioning assembly. The at least one inspection device is attached to the at least one mast assembly. In certain embodiments, the at least one mast assembly includes a mast that is capable of becoming rigidly stable in both an extended tube form and a retracted rolled form. |
| US09324463B2 |
Preventive maintenance method and apparatus for a structural components in a reactor pressure vessel
Disclosed is a water jet peening method that includes the steps of: preparing a water jet peening apparatus having a supporting member, a first divider plate, a nozzle support body, and a second divider plate; inserting the water jet peening apparatus into a piping in which a structure or electronic device is mounted that is susceptible to damage by a jet of water discharged from a jet nozzle or by shock waves; disposing either the first divider plate or the second divider plate between the jet nozzle and the structure or electronic device; filling water into an internal area formed in the piping between the first divider plate and the second divider plate; and subjecting the inner surface of the piping to water jet peening by allowing the jet nozzle to discharge a jet of water into the water in the internal area. |
| US09324459B1 |
Repair information storage circuit and semiconductor apparatus including the same
A repair information storage circuit may include a fuse block, a controller, and a fuse latch array. The fuse block provides a boot-up enable signal and repair information. The controller generates a voltage control signal in response to the boot-up enable signal. The fuse latch array stores repair information provided from the fuse block. The voltage control signal, which is used as a bulk bias of a transistor formed in the fuse latch array, is adjustable. |
| US09324458B2 |
Method and controller for receiving and outputting commands and addresses using a queue
Provided are a memory controller, a memory system including the memory controller, and an operating method performed by the memory controller. The operating method includes operations of queuing a first command in a first queue, detecting a fail of a first address that corresponds to the first command, when the first address is determined as a fail address, queuing a second address and a second command in the first queue, wherein the second address is obtained by remapping the first address and the second command corresponds to the second address, and outputting the second command and the second address from the first queue. |
| US09324452B2 |
Semiconductor system
A semiconductor system may include a first semiconductor device including a first pad, a second pad and a first test input pad, and suitable for storing data inputted in series through the first test input pad and outputting the stored data in parallel through the first pad and the second pad; a second semiconductor device including a third pad, a fourth pad and a second test output pad, and suitable for storing data inputted in parallel through the third pad and the fourth pad, a first through via connecting the first pad and the third pad so that the stored data outputted in parallel through the first pad is inputted in parallel through the third pad; and a second through via connecting the second pad and the fourth pad so that the stored data outputted in parallel through the second pad is inputted in parallel through the fourth pad. |
| US09324447B2 |
Circuit and system for concurrently programming multiple bits of OTP memory devices
Circuits and systems for concurrently programming a plurality of OTP cells in an OTP memory are disclosed. Each OTP cell can have an electrical fuse element coupled a program selector having a control terminal. The control terminals of a plurality of OTP cells can be coupled to a plurality of local wordlines, and a plurality of the local wordlines can be coupled to at least one global wordline. A plurality of banks of bitlines can have each bitline coupled to a plurality of the OTP cells via the control terminal of the program selector. A plurality of bank selects can enable turning on the wordlines or bitlines in a bank. A plurality of the OTP cells can be configured to be programmable concurrently into a different logic state by applying voltages to at least one selected global wordline and at least one selected bitline to a plurality of the selected OTP cells in a plurality of banks, if a plurality of banks are enabled. |
| US09324445B2 |
High-voltage switching circuit for flash memory device
A high-voltage switching device for a flash memory includes at least one pumping transistor which includes one junction terminal and another junction terminal which are commonly connected to a control signal, and a gate terminal connected to a select signal. The high-voltage switching device also includes at least one switching transistor that includes one junction terminal connected to an input signal, another junction terminal connected to an output signal, and a gate terminal connected to the select signal. A layout of the high-voltage switching device includes a pumping active area in which the one junction terminal and the another junction terminal of the pumping transistor are disposed; a control interconnection area in which an interconnection of the control signal is wired; and a select interconnection area in which an interconnection of the select signal is wired. |
| US09324440B2 |
Nonvolatile memory devices, operating methods thereof and memory systems including the same
The inventive concept relates to a nonvolatile memory device and methods for operating the same. The nonvolatile memory device comprises a plurality of strings arranged in rows and columns on a substrate, each string including at least one ground select transistor, a plurality of memory cells and at least one string select transistor sequentially stacked on the substrate. The method comprises erasing first memory cells corresponding to an erasure failed row and inhibiting erasure of second memory cells corresponding to an erasure passed row, and performing an erasure verification by a unit of each row with respect to the first memory cells. |
| US09324437B2 |
Systems and methods for trimming control transistors for 3D NAND flash
Control transistors and memory cells within 3D NAND Flash memory arrays may both be created using the same technology, such as charge trapping structures, to simplify the fabrication process. However, the resulting control transistors may initially have higher variability in threshold voltages, when compared to traditional gate-oxide-based control transistors. Provided are exemplary techniques to trim control transistors to provide increased reliability and performance during array operation. |
| US09324433B2 |
Intelligent flash reprogramming
Apparatus, methods, and computer-readable media for programming, reading, and servicing non-volatile storage device to improve data retention time and data density are disclosed. According to one embodiment, a method of managing a non-volatile memory storage device includes generating output values based on an expected pattern of discrete states stored in memory cells of the storage device, comparing output values for the memory cells to expected output values using a pre-selected threshold, and based on the comparing, programming other memory cells of the storage device to refresh the programming of the other memory cells. Methods of performing service and management operations for interrupting a host system coupled a non-volatile memory storage device are also disclosed. |
| US09324432B2 |
Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate
A semiconductor memory device includes a memory cell unit, word lines, a driver circuit, and first transistors. The word lines are connected to the control gates of 0-th to N-th memory cells. The (N+1) number of first transistors transfer the voltage to the word lines respectively. Above one of the first transistors which transfers the voltage to an i-th (i is a natural number in the range of 0 to N) word line, M (M |
| US09324426B2 |
Method for improving sensing margin of resistive memory
A method in a resistive memory device includes configuring two or more memory cells in a column of the array sharing the same bit line and the same source line to operate in parallel as a merged memory cell; programming the resistance of the merged memory cell in response to the write data, the resistance of the two or more resistive memory cells in the merged memory cell being programmed simultaneously; and reading the programmed resistance value of the merged memory cell, the programmed resistance of the two or more memory cells in the merged memory cell being read simultaneously. |
| US09324423B2 |
Apparatuses and methods for bi-directional access of cross-point arrays
The disclosed technology generally relates to apparatuses and methods of operating the same, and more particularly to cross point memory arrays and methods of accessing memory cells in a cross point memory array. In one aspect, an apparatus comprises a memory array. The apparatus further comprises a memory controller configured to cause an access operation, where the access operation includes application of a first bias across a memory cell of the memory array for a selection phase of the access operation and application of a second bias, lower in magnitude than the first bias, across the memory cell for an access phase of the access operation. The memory controller is further configured to cause a direction of current flowing through the memory cell to be reversed between the selection phase and the access phase. |
| US09324417B1 |
Systems and methods for avoiding read disturbance in a static random-access memory (SRAM)
Systems and methods are provided for reading from a static random-access memory (SRAM). The systems and methods include activating a first bitline connected to a first transistor, wherein the first transistor provides access to a state stored by the SRAM. The systems and methods further include preventing a second bitline from being activated when the first bitline is activated, wherein the second bitline is connected to a second transistor that isolates the SRAM from a reference potential when the second bitline is activated, and reading the state stored by the SRAM by triggering a wordline connected to a gate of the first transistor. |
| US09324413B2 |
Write assist circuit, memory device and method
A write assist circuit includes a first switch, a second switch and a bias voltage circuit. The first switch connects a cell supply voltage node of a memory cell to a power supply voltage node in response to a write control signal having a first state, and disconnects the cell supply voltage node from the power supply voltage node in response to the write control signal having a second state. The bias voltage circuit generates, at an output thereof, an adjustable bias voltage lower than the power supply voltage. The second switch connects the cell supply voltage node to the output of the bias voltage circuit in response to the write control signal having the second state, and disconnects the cell supply voltage node from the output of the bias voltage circuit in response to the write control signal having the first state. |
| US09324412B2 |
Memory architecture
A memory circuit includes a memory cell and a data circuit. In a write operation of the memory cell, the data circuit is configured to provide a first write logical value to the first output of the data circuit and to provide a second write logical value to the second output of the data circuit. The first write logical value is different from the second write logical value. In a read operation of the memory cell, the data circuit is configured to provide a same logical value to the first output and the second output of the data circuit. |
| US09324410B2 |
Semiconductor memory device having an output buffer controller
A device includes a data output terminal, an output buffer including n first transistors (n is a natural number greater than 1) connected in parallel with the data output terminal, and a calibration circuit to output an n-bit first code signal for controlling each of the n first transistors. In some embodiments, the calibration circuit includes a first counter circuit to output a k-bit second code signal (k is a natural number less than n), and a first code conversion circuit to convert the k-bit second code signal to the n-bit first code signal. Additional apparatus, systems, and methods are disclosed. |
| US09324407B2 |
Semiconductor apparatus capable of preventing refresh error and memory system using the same
A semiconductor apparatus includes a plurality of memory banks configured to perform a refresh operation in response to an address count value and row active signals; a refresh control block configured to update refresh bank informations which define a bank designated to perform the refresh operation in response to a refresh command and bank addresses, and activate a count control signal in response to the refresh bank informations; and a counter configured to change the address count value in response to activation of the count control signal. |
| US09324405B2 |
CMOS analog memories utilizing ferroelectric capacitors
A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization. |
| US09324404B2 |
MRAM sensing with magnetically annealed reference cell
Systems and method for reading/sensing data stored in magnetoresistive random access memory (MRAM) cells using magnetically annealed reference cells. A MRAM includes a reference circuit comprising at least one magnetic storage cell, wherein each magnetic storage cell in the MRAM is programmed to the same state. The reference circuit includes a load element coupled to the magnetic storage cell, wherein the load element is configured to establish a reference voltage during a read operation. |
| US09324401B2 |
Modular magnetoresistive memory
A magnetoresistive memory element is provided with a read module having a first pinned layer with a magnetoresistance that is readable by a read current received from an external circuit. A write module has a nanocontact that receives a write current from the external circuit and, in turn, imparts a spin torque to a free layer that functions as a shared storage layer for both the read module and the write module. |
| US09324392B1 |
Memory device and method of performing a write operation in a memory device
The present invention provides a technique for performing write operations within a memory device comprising an array of memory cells. Wordline driver circuitry is used to assert a wordline signal to activate an addressed memory cell in the array. Write driver circuitry is used to perform a write operation to write a data value into the addressed memory cell, and is responsive to assertion of a write assist enable signal during the write operation to implement a write assist mechanism. Further, control circuitry is used to control timing of assertion of the wordline signal in dependence on timing of assertion of the write assist enable signal. By making the timing of assertion of the wordline signal dependent on the timing at which the write assist enable signal is asserted, it has been found that writeability of the memory cells is significantly improved. |
| US09324390B2 |
Semiconductor devices and semiconductor systems including the same
A semiconductor device includes a first data input/output unit storing first internal input data in a first cell block in response to a first shift data strobe signal generated by shifting a first data strobe signal in a test mode, a second data input/output unit storing second internal input data in a second cell block in response to a second shift data strobe signal generated by shifting a second data strobe signal in the test mode, and a connector electrically coupling the first data input/output unit to the second data input/output unit in the test mode. |
| US09324387B2 |
Semiconductor memory device with data path option function
A semiconductor memory device may include a memory cell, a bit line connected to the memory cell, a bit line data latch circuit configured to sense-amplify data stored in the memory cell connected to the bit line and to store write data in the memory cell via the bit line; an input/output driver configured to output read data on the bit line to an external device or to drive the write data provided from the external device; and a selection unit configured to select whether the read data and the write data are communicated between the input/output driver and the memory cell with or without use of the bit line data latch circuit. |
| US09324383B2 |
Source line voltage regulation scheme for leakage reduction
An integrated circuit that includes a generator unit connected to one or more pull-up units, one or more pull-up units connected to one or more source lines and an array of memory cells connected to the one or more source lines. The generator unit is configured to set a first voltage signal of each pull-up unit of the one or more pull-up units. Each pull-up unit of the one or more pull-up units is connected with the corresponding source line of the one or more source lines and is configured to set a current of the corresponding source line of the one or more source lines. The array of memory cells is electrically connected to the one or more source lines and one or more bit lines. |
| US09324381B2 |
Antifuse OTP memory cell with performance improvement, and manufacturing method and operating method of memory
An OTP memory cell including an antifuse unit and a select transistor is provided. The antifuse unit includes an antifuse layer and an antifuse gate disposed on a substrate in sequence, a modified extension doped region disposed in the substrate below the antifuse layer, and a first doped region and a second doped region disposed in the substrate at two opposite sides of the antifuse gate. The select transistor includes a select gate, a gate dielectric layer, a second doped region, and a third doped region. The select gate is disposed on the substrate. The gate dielectric layer is disposed between the select gate and the substrate. The second and the third doped region are respectively disposed in the substrate at two opposite sides of the select gate. The doped region, the antifuse layer and the antifuse gate form a varactor. |
| US09324378B2 |
Synchronizing navigators to play non-sequential segments
A method comprising utilizing a first navigator to seek to a navigation point appropriate to a begin frame of a first video segment, to step to the begin frame of the one video segment, and to cue a playing at the begin frame of the one video segment; utilizing a second navigator to seek to a navigation point appropriate to a begin frame of a non-sequential video segment, step to the begin frame of the non-sequential video segment, and cue a playing at the begin frame of the non-sequential video segment; utilizing the first navigator to enable a playing of the first video segment; and synchronizing the second navigator to enable a playing of the non-sequential video segment seamlessly following the playing of the first video segment. |
| US09324376B2 |
Time-lapse video capture with temporal points of interest
Traditionally, time-lapse videos are constructed from images captured at given time intervals called “temporal points of interests” or “temporal POIs.” Disclosed herein are intelligent systems and methods of capturing and selecting better images around temporal points of interest for the construction of improved time-lapse videos. According to some embodiments, a small “burst” of images may be captured, centered around the aforementioned temporal points of interest. Then, each burst sequence of images may be analyzed, e.g., by performing a similarity comparison between each image in the burst sequence and the image selected at the previous temporal point of interest. Selecting the image from a given burst that is most similar to the previous selected image allows the intelligent systems and methods described herein to improve the quality of the resultant time-lapse video by discarding “outlier” or other undesirable images captured in the burst sequence around a particular temporal point of interest. |
| US09324375B1 |
Dynamically adjusting stream quality level
Dynamically adjusting stream quality level is disclosed. In some embodiments, playing media content includes playing a first stream having a first quality level of the media content, determining that a different available quality level of the media content would result in improved playback performance, and switching to playing a second stream having a second quality level of the media content. |
| US09324371B2 |
Systems and methods for multi-stage decoding processing
The present invention is related to systems and methods for serial application of different decode algorithms to a processing data set. In some cases, a first data decode algorithm may be applied to a first detected output, and a second data decode algorithm may be applied to a second detected output. In such a case, the second detected output may be generated based at least in part on the result of applying the first data decode algorithm. |
| US09324367B1 |
SMR-aware append-only file system
A shingled magnetic recording (SMR) append-only file system includes a disk comprising a plurality of concentric append-only shingled data bands having partially overlapping data tracks, wherein the data bands are associated with a circular linked list having a head data band and a tail data band, the head data band and the tail data band each comprising a plurality of data blocks. The system also includes a processor configured to write data blocks to the disk, and create a new file wherein an empty data band of the plurality of data bands is removed from the circular linked list and added to a single linked list of the new file. |
| US09324365B2 |
Multi-language buffering during media playback
A data processor for processing a data stream having audio and video data has an input buffer for buffering the data stream; a data stream analyzer for analyzing the data stream for finding information on a plurality of language-specific content in different languages; a queuing buffer for queuing a plurality of parallel queues, each queue having only language-specific content in the same language; and a feeder for feeding a selected queue in accordance with a language selection signal to a subsequent processing stage, wherein a non-selected queue is not fed by the feeder. Also disclosed are a corresponding method for processing a data stream and a computer-readable digital storage medium. The data processor or the method for processing a data stream reduces a delay experience by a user when switching from one language-specific content to another language-specific content in a different language, even if the processing is done on an architecture that needs ample data buffering to compensate for variations in the system load, such as a personal computer system with the standard operating system. |
| US09324364B2 |
Constraining FIR filter taps in an adaptive architecture
According to one embodiment, a system for processing data includes a processor and logic integrated with and/or executable by the processor, the logic being configured to individually set, for each of one or more range-constrained finite impulse response (FIR) filter taps configured for use in a FIR filter, a predetermined range of values suitable for controlling an equalizer response, and pass data through the equalizer including the FIR filter to obtain equalized data, wherein each of the one or more range-constrained FIR filter taps are individually adaptive within its predetermined range of values. Other systems and methods for processing data by constraining FIR filter taps while reading data from a data storage medium are described in more embodiments. |
| US09324360B2 |
Storage medium having interactive graphic stream and apparatus for reproducing the same
A storage medium including an interactive graphic stream providing menus using various transition effects regardless of reproducing modes of multimedia data and an apparatus for reproducing the same. The storage medium in which multimedia information is recorded includes: video data; and graphic data to provide a menu screen overlaid on an image based on the video data, wherein the graphic data provides a plurality of menu pages. Accordingly, a plurality of menu pages may be provided regardless of application types of a main stream, and various transition effects may be applied when transitions between menu pages are performed. |
| US09324359B2 |
System and server for efficient data recording on and reproduction from storage media having multiple surfaces
Data recording and reproduction systems, apparatus, and methods provide efficient recording of and reproduction from storage media having multiple surfaces. In particular, a grouping processing unit groups data based on several factors. The grouped data can then be efficiently stored on storage media having multiple sides to increase the efficiency of storage and retrieval of such data. For example, data belonging to the same group is not stored on two surfaces of the same storage media to avoid having to remove and reverse the direction of the storage media in order to store data on or retrieve data from the other side of the storage media. |
| US09324357B2 |
Optical recording medium production device and production method
A recording medium production device includes a substrate positioning pin vertically movable that performs positioning to a center-hole of a substrate; a substrate holding portion that performs positioning of substrate using the substrate positioning pin to hold the substrate; a cleaner having a gas ejection portion that ejects gas toward the surface of the substrate held by the substrate holding portion, and a gas suction portion that suctions gas; and a substrate positioning pin fixing portion that can press the substrate positioning pin downward. The fixing portion is configured so as not to contact an inner circumferential side surface of the center-hole of substrate. The substrate positioning pin fixing portion descends inside the center-hole of substrate held by the substrate, and presses and fixes the substrate positioning pin. Then the cleaner performs ejection and suction of gas. |
| US09324354B2 |
Barium ferrite magnetic storage media
Magnetic storage media that include a multilayer structure are described. In general, the magnetic storage media include a substrate, an underlayer that includes a plurality of underlayer particles formed over the substrate, and a magnetic layer that includes a plurality of magnetic particles formed over the underlayer. The magnetic layer may define a saturated magnetization and thickness product less than or equal to approximately 1.00 memu per square centimeter, and the magnetic particles may be selected from the group consisting of magnetic platelet-shaped particles and magnetic particles with an aspect ratio less than or equal to approximately 1.5. In addition, the described magnetic storage media may exhibit minimal interlayer diffusion between the underlayer and magnetic layer. Reduced interlayer diffusion between different layers of a magnetic recording medium may result in an improved magnetic recording surface for recording and storing data. |
| US09324351B2 |
Contact pad for recording heads
A recording head that includes at least one protection feature that prevents at least one other feature of the recording head from directly colliding with a data storage medium with which the recording head communicates. The recording head includes a transducer element having a leading edge and a trailing edge. The recording head also includes a transducer element heater located closer to the leading edge of the transducer element than the trailing edge of the transducer element. A contact pad is interposed between the leading edge of the transducer element and the transducer element heater to prevent the transducer element from directly colliding with the data storage medium. |
| US09324345B2 |
Suspension assembly and disk drive with the same
According to one embodiment, a suspension assembly includes a base plate having a securing plate portion protruding outwardly from a side edge of the base plate, a load beam secured on a first surface of the base plate and extending from the base plate, and a wiring member. The wiring member includes a distal side portion attached to the load beam and the first surface of the base plate, and a proximal side portion extending outwardly from the side edge of the base plate and extending in a direction opposite to the load beam along the support surface. |
| US09324344B1 |
Disk drive head suspension tail with ground pad outside of bonding region
A head gimbal assembly for a disk drive includes a flexure tail terminal region having flexure bond pads in electrical communication with the head. Each of the flexure bond pads is aligned with one of a plurality of flexible printed circuit (FPC) bond pads. An anisotropic conductive film is disposed between the FPC and the flexure tail terminal region. The flexure tail terminal region overlaps the anisotropic conductive film in a bonding area. Each of the flexure bond pads is bonded to one of the plurality of FPC bond pads by the anisotropic conductive film in a bonding area. A conductive layer of the flexure tail terminal region includes an exposed conductive ground pad that is disposed outside of the bonding area, and/or disposed outside of an application area of a thermode tool that is pressed against the flexure tail terminal region during the bonding process. |
| US09324342B2 |
Dual reader structure
Implementations described and claimed herein provide a stacked dual reader with a bottom sensor stack and a top sensor stack separated by a top mid-shield and a bottom mid-shield, and a pre-amplifier circuit comprising a top lead connected to the top mid-shield, configured to collect current flowing from the top mid-shield through the top sensor stack opposite a direction of current flowing from the bottom mid-shield to a bottom lead through the bottom sensor stack. |
| US09324340B2 |
Methods and apparatuses for use in animating video content to correspond with audio content
Some embodiments provide methods of reanimating multimedia content, comprising: accessing multimedia content; accessing a plurality of dubbed vocalized content; determining a playback duration of a first dubbed vocalized content is different than a first primary vocalized content; identifying a first portion of the primary visual content corresponding to the first primary vocalized content; modifying the first portion of the primary visual content such that a number of frames in the first portion of the primary visual content is changed and has a playback duration that is more consistent with the playback duration of the first dubbed vocalized content; identifying a character movement corresponding to each distinct vocal sound within the first dubbed vocalized content; and reanimating a first character such that reanimated character movements of the first character are consistent and synchronized with the identified character movement corresponding to each of the distinct vocal sounds. |
| US09324335B2 |
Multistage IIR filter and parallelized filtering of data with same
In some embodiments, a multistage filter whose biquad filter stages are combined with latency between the stages, a system (e.g., an audio encoder or decoder) including such a filter, and methods for multistage biquad filtering. In typical embodiments, all biquad filter stages of the filter are operable independently to perform fully parallelized processing of data. In some embodiments, the inventive multistage filter includes a buffer memory, at least two biquad filter stages, and a controller coupled and configured to assert a single stream of instructions to the filter stages. Typically, the multistage filter is configured to perform multistage filtering of a block of input samples in a single processing loop with iteration over a sample index but without iteration over a biquadratic filter stage index. |
| US09324334B2 |
Signal processing apparatus, signal processing method, and program
Provided is a signal processing apparatus, including a filter unit that filters an audio signal created by decimating a portion of frequency components by an all-pass filter and outputs a filtering result thereof as improvement components to improve sound quality of the audio signal, and an adder that generates an improved sound in which the sound quality of the audio signal is improved by adding the improvement components to the audio signal. |
| US09324333B2 |
Systems, methods, and apparatus for wideband encoding and decoding of inactive frames
Speech encoders and methods of speech encoding are disclosed that encode inactive frames at different rates. Apparatus and methods for processing an encoded speech signal are disclosed that calculate a decoded frame based on a description of a spectral envelope over a first frequency band and the description of a spectral envelope over a second frequency band, in which the description for the first frequency band is based on information from a corresponding encoded frame and the description for the second frequency band is based on information from at least one preceding encoded frame. Calculation of the decoded frame may also be based on a description of temporal information for the second frequency band that is based on information from at least one preceding encoded frame. |
| US09324331B2 |
Coding device, communication processing device, and coding method
Provided are a coding device, a communication processing device, and a coding method, whereby processing operation load (computational load) is significantly reduced for a configuration which computes either frame energy or sub-frame energy of an input signal, using auto-correlation operations, without causing a decline in the precision of either the frame energy or the sub-frame energy. In a coding device (101), a sub-frame energy computation unit (201) computes the sub-frame energy by substituting the sum of input signal auto-correlation operations in a first range with the sum of auto-correlation operations in a second range which differs at least partially from the first range. |
| US09324324B2 |
Adaptive telephone relay service systems
Adaptive telephone relay service systems. Embodiments herein provide technical solutions for improving text captioning of Captioned Telephone Service calls, including computer systems, computer-implemented methods, and computer program products for automating the text captioning of CTS calls. These technical solutions include, among other things, embodiments for generating text captions from speech data using an adaptive captioning service to provide full automated text captioning and/or operator assisted automated text captioning, embodiments for intercepting and modifying a calling sequence for calls to captioned telephone service users, and embodiments for generating progressive text captions from speech data. |
| US09324321B2 |
Low-footprint adaptation and personalization for a deep neural network
The adaptation and personalization of a deep neural network (DNN) model for automatic speech recognition is provided. An utterance which includes speech features for one or more speakers may be received in ASR tasks such as voice search or short message dictation. A decomposition approach may then be applied to an original matrix in the DNN model. In response to applying the decomposition approach, the original matrix may be converted into multiple new matrices which are smaller than the original matrix. A square matrix may then be added to the new matrices. Speaker-specific parameters may then be stored in the square matrix. The DNN model may then be adapted by updating the square matrix. This process may be applied to all of a number of original matrices in the DNN model. The adapted DNN model may include a reduced number of parameters than those received in the original DNN model. |
| US09324314B2 |
System for controlling vehicle interior sound using smart phone and method thereof
A system for controlling vehicle interior sound using a smart phone and a method thereof include a driving information provider to provide driving information while a vehicle is being driven. A smart phone includes a microphone which senses interior noise or sound of the vehicle and generates a sound control signal to diminish or amplify the interior noise based on the driving information from the driving information provider. An audio amplifier amplifies the sound control signal received from the smart phone and outputs an amplified signal though a speaker. |
| US09324312B2 |
Viscoelastic phononic crystal
A sound barrier and method of sound insulation are disclosed. In one aspect of the disclosure, a sound barrier comprises a first, solid medium, such as a viscoelastic solid and a second medium, such as air. At least one of the two media forms a periodic array disposed in the other medium. The solid medium has a speed of propagation of longitudinal sound wave and a speed of propagation of transverse sound wave, the speed of propagation of longitudinal sound wave being at least about 30 times the speed of propagation of transverse sound wave. |
| US09324311B1 |
Robust adaptive noise canceling (ANC) in a personal audio device
An adaptive noise canceling (ANC) circuit adaptively generates an anti-noise signal from that is injected into the speaker or other transducer output to cause cancellation of ambient audio sounds. At least one microphone provides an error signal indicative of the noise cancellation at the transducer, and the coefficients of the adaptive filter are adapted to minimize the error signal. In order to prevent improper adaptation or instabilities in one or both of the adaptive filters, spikes are detected in the error signal by comparing the error signal to a threshold ambient noise average. Therefore, if the magnitude of the coefficient error is greater than a threshold value for an update, the update is skipped. Alternatively the step size of the updates may be reduced. |
| US09324310B2 |
Multi-touch piano keyboard
A musical keyboard touch sensor pad having a plurality of integrated sensors disposed in an array is disclosed. The plurality of integrated sensors represents a keyboard key. A processor is electronically coupled to the plurality of integrated sensors. The processor is programmed to receive signals from several of the plurality of integrated sensors and to generate a sound signal based on input from the several of the plurality of integrated sensors. The output is variable based on the number in the plurality and the location of the plurality in the array. An audio output device is electronically coupled to the processor to generate a sound based on the sound signal. A keyboard using a plurality of the sensor pads as well as a method of generating sounds from the keyboard are also disclosed. |
| US09324309B2 |
Method for adjusting the vibration frequency range of a sound producing device with vibrating tongues
The invention concerns a method for adjusting the vibration frequency range of a sound producing device with vibrating tongues. The device includes an assembly formed of a comb extended by at least one vibrating tongue, said comb having at least one hole for the securing thereof to a support by means of a support jaw and of a tightening element traversing the support jaw and the hole in the aforecited comb. According to the method, the frequency range is adjusted by reducing the free length of the vibrating tongue or tongues by the localized clamping of said tongues between the support jaw and a local counter-support. |
| US09324301B2 |
Capacitive sensing during non-display update times
Embodiments of the invention generally provide an input device with display screens that periodically update (refresh) the screen by selectively driving common electrodes corresponding to pixels in a display line. In general, the input devices drive each electrode until each display line (and each pixel) of a display frame is updated. In addition to updating the display, the input device may perform capacitive sensing using the display screen as a proximity sensing area. To do this, the input device may interleave periods of capacitive sensing between periods of updating the display based on a display frame. For example, the input device may update the first half of display lines of the display screen, pause display updating, perform capacitive sensing, and finish updating the rest of the display lines. Further still, the input device may use common electrodes for both updating the display and performing capacitive sensing. |
| US09324300B2 |
Extending battery life by automatic control of display illumination
A display screen of a computer is segmented into several portions, some of which are marked “used” and others which are marked “unused.” When the system is activated on the computer, the computer will decrease the luminance of unused portions of the display screen to save electricity. |
| US09324299B2 |
Atlasing and virtual surfaces
Atlasing and virtual surface techniques are described. In one or more implementations, virtual surface functionality is exposed by an operating system for access by one or more applications of the computing device. A virtual surface is created in response to a request from the one or more applications to be used to render visuals for display by a display device. The virtual surface is allocated in memory of the computing device by the exposed virtual surface functionality to have an area that is larger than an area to be used to display the visuals from the one or more applications. |
| US09324297B2 |
Image display unit, method of driving image display unit, signal generator, signal generation program, and signal generation method
An image display unit, includes: an image display section having pixels each including red, green, blue, and white pixels; and a signal generating section configured to generate red, green, blue, and white sub-pixel signals, the signal generating section being configured to determine values of the red, green, and blue sub-pixel signals Rcvt, Gcvt, and Bcvt, based on a first matrix and a second matrix, with use of a coefficient ‘Purity’, an additive-color-mixture matrix, and a purity coefficient ‘Ψ’, and being configured to employ a value of the white sub-pixel signal Wcvt as a value of min (RnL, GnL, BnL), where the min (RnL, GnL, BnL) represents a minimum value of the red-, green-, and blue-display image signal RnL, GnL, and BnL that are linearized and normalized and are provided for each of the pixels. |
| US09324295B2 |
Display device and method of controlling display device
A projector includes a projection unit that displays an image on a screen, a control unit that allows the projection unit to display a plurality of images based on image data input from a plurality of PCs, a location detection unit that detects an operation location by a pointing tool, an output control unit that selects the PC based on the operation location detected by the location detection unit and a display location of the image on the screen, and an output switching unit that outputs coordinates of the operation location to the PC selected by the output control unit. |
| US09324294B2 |
Graphics system for supporting multiple digital display interface standards
The present invention sets forth an apparatus for supporting multiple digital display interface standards. In one embodiment, the apparatus includes a graphics processing unit (GPU) configured to determine a display device type of a display device that is in connection with a digital display interconnect, receive a display device information associated with the display device, and output a first data signal to the display device. The display device is of display port (DP) digital display interface standard and the digital display interconnect is of digital visual interface (DVI) digital display interface standard. The apparatus further includes a removable adaptor circuitry between the display device and the digital display interconnect. |
| US09324292B2 |
Selecting an interaction scenario based on an object
Techniques for selecting an interaction scenario based on an object are described in various implementations. A method that implements the techniques may include receiving, at a computer system and from an image capture device, an image that depicts a viewing area proximate to a presentation device. The method may also include processing the image, using the computer system, to detect a user in the viewing area presenting an object in a manner that indicates desired interaction with the presentation device. The method may also include selecting, using the computer system, an interaction scenario for presentation on the presentation device based on the object. |
| US09324289B2 |
Array substrate, driving method thereof and display device
Embodiments of the present invention disclose an array substrate and a driving method thereof, and a display device. The array substrate comprises: a pixel electrode; a data line; a first thin film transistor comprising a first gate electrode, a first source electrode and a first drain electrode, and a second thin film transistor comprising a second gate electrode, a second source electrode and a second drain electrode; a first gate line connected with the first gate electrode and a second gate line connected with the second gate electrode, wherein the first source electrode and the second source electrode are electrically connected with the data line, and the first drain electrode and the second drain electrode are electrically connected with the pixel electrode. |
| US09324286B2 |
Multiple primary color liquid crystal display device and signal conversion circuit
The viewing angle characteristics of a multiprimary liquid crystal display device in which a plurality of red subpixels are provided in each pixel are improved.A multiprimary liquid crystal display device according to the present invention includes a pixel defined by a plurality of subpixels, and performs multicolor display by using four or more primary colors to be displayed by the plurality of subpixels. The plurality of subpixels of the multiprimary liquid crystal display device according to the present invention include first and second red subpixels R1 and R2 for displaying red, a green subpixel G for displaying green, a blue subpixel B for displaying blue, and a cyan subpixel C for displaying cyan. When a color having a hue which is within a predetermined first range is displayed by the pixel, the gray scale level of the first red subpixel R1 and the gray scale level of the second red subpixel R2 differ from each other. When a color having a hue which is within a second range different from the first range is displayed by the pixel, the gray scale level of the first red subpixel R1 and the gray scale level of the second red subpixel R2 are equal. |
| US09324280B2 |
Light source apparatus and method of controlling same
A light source apparatus includes: a light-emitting unit which includes a plurality of emission areas emitting light periodically at different phases and in which at least two light sources are disposed in each emission area; a detection unit configured to detect light from the light-emitting unit; and a control unit configured to select the plurality of light sources sequentially and to perform lighting-control of temporarily reducing emission brightness of light sources other than the selected light source, wherein the control unit selects lighting-control target light sources so that lighting-control is sequentially performed on light sources disposed in different emission areas among the plurality of emission areas. |
| US09324276B2 |
Liquid crystal display device and method for automatically controlling brightness
Disclosed herein are a liquid crystal display device including a photosensor for sensing brightness of external light such that the photosensor can stably sense the external light without influence of temperature or external noise, and a method for automatically controlling the brightness, the liquid crystal display device includes a liquid crystal panel having a display area and a non-display area defined therein and including first and second substrates facing each other and a liquid crystal layer filled between the first and second substrates, the first substrate having an outer portion protruding from the second substrate, a gate driver and a data driver formed in the non-display area of the first substrate, a photosensor formed in the outer portion of the first substrate, a dummy sensor formed in the non-display area of the first substrate covered by the second substrate, a backlight unit formed below the liquid crystal panel, and a control unit including a timing controller for controlling the gate driver, the data driver and the backlight unit, and a power supply unit for supplying a power voltage. |
| US09324274B2 |
Organic light emitting display device, and method of generating a gamma reference voltage for the same
An organic light emitting display device includes a scan driving unit configured to provide a scan signal to pixel circuits via a plurality of scan lines, a data driving unit configured to provide a data signal to the pixel circuits via a plurality of data lines, a power unit configured to provide a first power voltage and a second power voltage to the pixel circuits, the first power voltage being greater than the second power voltage, a gamma reference voltage generating unit configured to generate a gamma reference voltage corresponding to a voltage difference between the first power voltage and a subtraction reference voltage, a gamma voltage generating unit configured to generate a plurality of gamma voltages based on the gamma reference voltage, and to provide the gamma voltages to the data driving unit, and a timing control unit. |
| US09324269B2 |
Scan driving device and method of driving the same
A scan driving device includes scan driving blocks, each including: a first node receiving a signal that is input to a first driving signal input terminal according to a clock signal input to a first clock signal input terminal; a second node receiving a second power source voltage according to the clock signal input to the first clock signal input terminal and a signal input to a second driving signal input terminal; a first transistor including a gate electrode connected to the second node and an electrode receiving an output control signal; a second transistor including a gate electrode connected to the first node and an electrode connected to a second clock signal input terminal; and a third transistor including a gate electrode connected to the second node, an electrode connected to a first power source voltage, and another electrode connected to the first node. |
| US09324267B2 |
Organic light emitting display and driving method thereof
An organic light emitting display including a repair circuit is disclosed. In one aspect the organic light emitting diode (OLED) display includes a pixel unit having a plurality of pixels positioned at the intersection of scanning lines, data lines, and power lines, The OLED display further includes an organic light emitting diode OLED connected to the pixel circuit, and repair lines disposed in parallel with data lines and repair circuits connected to the repair lines and the power lines. The OLED display further includes a switching unit for selectively connecting output lines of the data driving unit to the repair lines or the data lines. |
| US09324261B2 |
Organic light emitting diode display device
An organic light emitting diode (OLED) display includes a display panel including data lines, scan lines crossing the data lines, and pixels which each include an organic light emitting diode and are arranged in a matrix form, a power generator which is enabled in a normal mode to generate a high potential power voltage for driving the display panel and is disabled in a low power mode, and a panel driving circuit which drives the data lines and the scan lines, disables the power generator in the low power mode to cut off an output of the power generator, and supplies an internal power less than the high potential power voltage to the display panel to reduce the high potential power voltage in the low power mode. |
| US09324260B2 |
Image display device
The invention provides an image display device that has an especially satisfactory display quality for animated images, and sufficiently suppresses the irregularities of display quality among pixels. The image display device includes a light emitting drive means that drives a light emitting means, based on an analog display signal inputted to the pixels, and a light emitting control switch for controlling a light-on or light-off of the light emitting means on one end of the light emitting drive means in each pixel. |
| US09324255B2 |
Electro-optic device and electronic apparatus
An electro-optic device according an embodiment of the invention can increase the number of gray scales capable of being expressed. A liquid crystal panel is viewed via a blocking unit which blocks the field of view in a predetermined non-viewing period. A converting unit converts, based on a video signal, a gray-scale value input for each frame composed of a subfields into a subfield code indicating a combination of ON and OFF of b (2≦b≦a) subfields included in a viewing period other than the non-viewing period and c (1≦c≦b) subfields included in the non-viewing period. A driving unit drives a plurality of electro-optic elements each based on the converted subfield code. |
| US09324252B2 |
Wiring structure of wiring area on liquid crystal displaying panel and testing method of liquid crystal displaying panel
A wiring structure of a wiring area on a liquid crystal displaying panel includes a number of wiring lines connected to one end of a corresponding data line and corresponding scan line on the wiring area, at least one signal testing point, a number of first testing lines connected between the wiring lines and the signal testing point, a number of second testing lines connected between the signal testing point and the other end of the corresponding data line and the corresponding scan line, and a switch controlling circuit connected to the second testing lines. After the testing lines are disconnected from the wiring lines in the previous process, the testing signal still can be transmitted through the other end of the corresponding data line or the scan line, to implement the image test of the liquid crystal displaying panel. |
| US09324251B2 |
Stereoscopic display device and mobile device having the same
A mobile terminal comprising a stereoscopic display unit outputting a stereoscopic image is disclosed. In one embodiment the stereoscopic display unit comprises a display element configured to periodically display left and right images, a refractive lens unit disposed to overlap with the display element and configured to change refractive characteristics thereof, and a controller configured to control the refractive characteristics of the refractive lens unit such that a refraction direction of transmitted light is periodically changed to make the left and right images face in different directions. |
| US09324249B2 |
Electroluminescent display panel with reduced power consumption
An EL light-emitting element is driven digitally to reduce power consumption using a pixel having three transistors and two capacitors. A reset transistor for diode connection writes the threshold voltage of the drive transistor onto a coupling capacitor. The data voltage plus threshold voltage is then written onto the gate of the drive transistor. This reduces the amplitude of the data voltage required, further reducing power consumption. |
| US09324246B2 |
Methods and apparatus for monitoring and encouraging health and fitness
Methods and apparatus are provided for monitoring and encouraging health and fitness. In accordance with a first aspect, an apparatus is provided that is adapted to assist in weight loss and exercise. The apparatus comprises a personal digital assistant (PDA) having computer program code adapted to assist in at least one of calorie counting, meal selection, meal suggestion, weight monitoring, weight loss or gain monitoring, fat consumption monitoring, sugar consumption monitoring and salt consumption monitoring. The PDA also includes computer program code adapted to display historical data regarding at least one of calorie counting, meal selection, meal suggestion, weight monitoring, weight loss or gain monitoring, fat consumption monitoring, sugar consumption monitoring and salt consumption monitoring. Numerous other embodiments are provided, as are methods, systems and computer program products. |
| US09324245B2 |
Apparatus and method for creating artificial feelings
An apparatus and a method for creating combined artificial feelings to which different basic feelings like a human being's combined feeling are reflected. The apparatus for creating an artificial feeling comprises a feeling value group creation part which is configured to create a feeling value group having a feeling value which gradually decreased as it gets farther from a basic feeling assigned to a machine apparatus on an internal state coordinate system of a machine apparatus; and a feeling creation part which is configured to create, as a feeling of a machine apparatus, a group of a feeling value of each feeling value group that a coordinate of an internal state input value of the machine apparatus indicates on the internal state coordinate system. |
| US09324243B2 |
Musical score performing apparatus, a method of performing a musical score, and a program recording medium
A musical-score performing apparatus is provided. In the apparatus, a musical-score displaying unit with a displaying screen displays a musical score of music on the displaying screen, the musical score being represented by a form of multiple staffs, and a designating unit is used to designate a position on the displaying screen of the musical-score displaying unit. A play-back controlling unit plays back the music represented by apart or the whole of the multiple staffs of the musical score in accordance with the position designated on the displaying screen. |
| US09324242B2 |
Electronic book that can communicate directly with hardware devices via a keyboard API interface
An educational electronic book (e-Book) facility that may be suitable for use in public school classrooms and many other environments may be based on an encapsulated HTML technology to facilitate complete interactive operation without use or risks associated with an external network connection, such as the Internet. |
| US09324241B2 |
Predictive executive functioning models using interactive tangible-graphical interface devices
A method of diagnosing attention deficit hyperactivity disorder (ADHD). The method employs a tangible graphical interactive game wherein the interactive game employs a plurality of tangible graphical cubes. The game induces stimuli, measures responses and accumulates the responses using a predefined set of variables into a predefined set of metrics, wherein the variables are determined using an interactive machine learning feedback algorithm. |
| US09324236B2 |
System and methods for situation awareness, advisory, tracking, and aircraft control information
A portable device for presenting situation awareness information is provided. The portable device is operable onboard an aircraft and includes a communications module configured to communicate with a data center to receive situation awareness information that includes at least a real-time position for each of a plurality of additional aircraft, a sensor module configured to determine a real-time position of the portable device, and a display device configured to overlay a moving map display with the situation awareness information and the real-time position of the portable device. |
| US09324235B2 |
Driving assistance system
A vehicle (1) having a vehicle information acquisition unit (11) which acquires image captured by a vehicle mounted sensor (20) and a camera (21), a vehicle information transmission unit (13) which transmits vehicle information data indicating information acquired by the vehicle information acquisition unit (11) to a host computer (50), a first arithmetic processing result reception unit (14) which receives first arithmetic processing result data replied from the host computer (50), and a driving assistance unit (17) which executes driving assistance processing based on the first arithmetic processing result data, the host computer (50) has a vehicle information reception unit (52) which receives vehicle information data, a first arithmetic processing unit (53) which executes first arithmetic processing on vehicle information data, and a first arithmetic processing result transmission unit (54) which transmits first arithmetic processing result data indicating the first arithmetic processing result to the vehicle (1). |
| US09324232B2 |
Method and system for modeling and processing vehicular traffic data and information and applying thereof
A method and system for modeling and processing vehicular traffic data and information, comprising: (a) transforming a spatial representation of a road network into a network of spatially interdependent and interrelated oriented road sections, for forming an oriented road section network; (b) acquiring a variety of the vehicular traffic data and information associated with the oriented road section network, from a variety of sources; (c) prioritizing, filtering, and controlling, the vehicular traffic data and information acquired from each of the variety of sources; (d) calculating a mean normalized travel time (NTT) value for each oriented road section of said oriented road section network using the prioritized, filtered, and controlled, vehicular traffic data and information associated with each source, for forming a partial current vehicular traffic situation picture associated with each source; (e) fusing the partial current traffic situation picture associated with each source, for generating a single complete current vehicular traffic’ situation picture associated with entire oriented road section network; (f) predicting a future complete vehicular traffic situation picture associated with the entire oriented road section network; and (g) using the current vehicular traffic situation picture and the future vehicular traffic situation picture for providing a variety of vehicular traffic related service applications to end users. |
| US09324231B2 |
Communication module and lighting apparatus having the same
Disclosed are a communication module and a lighting apparatus having the same. The communication module includes a housing provided therein with a space, and a module substrate provided in the space of the housing and provided therein with a wireless communication chip, a reset device to reset the wireless communication chip, and a display part to display the state of the wireless communication chip through the opening. The communication module is detachably coupled with an object to transmit a control signal, which is received through a wireless network, to the object. The communication module is stored when the lighting part of the lighting apparatus is replaced with new one, so that the cost is reduced. The light is discharged through the opening to display the erroneous operation of the inner part, such that the communication module is forcibly reset. |
| US09324229B2 |
System and method to display maintenance and operational instructions of an apparatus using augmented reality
A head-mounted display provides a user with an augmented view of an object being viewed; a tracking mechanism such as a camera repeatedly determine the position and orientation of the head-mounted display relative the object being viewed; and a computer system provides information for the augmented view and repeatedly updates the augmented view of the object being viewed based on the determined position and orientation of the display. The head-mounted display may be a see-through display; it may be video-based or optical-based, and it may be monoscopic and stereoscopic. The tracking mechanism determines its position using one or more markers or beacons on the object being viewed. The markers may be active or passive, including light-emitting diodes (LEDs) that emit invisible light. |
| US09324227B2 |
Electronic device with environmental monitoring
An environmental monitoring device that includes an acoustic sensor is described. During operation of the environmental monitoring device, the acoustic sensor provides acoustic data based on measurements of sound in an external environment that includes the environmental monitoring device. Based on the acoustic data and predefined characterization of the external environment, a control mechanism determines if an alarm device, which is separate from the environmental monitoring device, is activated. For example, the predefined characterization may include a location of the alarm device. This location may be specified by: an image of the external environment, a positioning system, a communication network, and/or an acoustic latency in the external environment. Alternatively, the predefined characterization may include an acoustic transfer function of the external environment proximate to the alarm device and the environmental monitoring device. Furthermore, if the alarm device is activated, the environmental monitoring device may provide an alert. |
| US09324226B2 |
Post disaster lighting operation sequences system and method(s) for visually locating, identifying, distinguishing and tracking disaster victims
Method of implementing a disaster identification system by utilizing personal illuminated displays to visually communicate with search and rescue personnel. The method consists of holding or attaching an illuminated display to people and pets that are located in a disaster stricken area. In one exemplary method, the illuminated displays are set by the users to certain colors and flash patterns to indicate their location, group make up and condition to search and rescue personnel patrolling the area. The night is now utilized to discover survivor's locations and conditions, something that is not done today. |
| US09324224B2 |
Cuffs for restriction of vehicle operation
Operation of a generally requires that the operator have sufficient range of motion in the upper limbs to 1) steer the vehicle and/or 2) to operate the vehicle's ancillary controls. The presently disclosed technology provides for limiting upper limb movement by requiring a user's upper limbs to be oriented in a way as to limit or prevent the user from being able to operate the vehicle. Cuffs may be secured to a variety of locations on a user's upper limbs. In a predetermined upper limb position, the cuffs are oriented in a specific location and orientation on the user's upper limbs and in a specific proximity and orientation with respect to one another. The user is compliant by maintaining the cuffs in the predetermined upper limb position. To ensure compliance, the cuffs are equipped with a compliance monitor that monitors the cuffs contact, proximity, and/or orientation with one another in conjunction with GPS information such as location and/or speed. |
| US09324222B2 |
Tamper resistant motion detector
A tamper resistant motion detector is provided that can include a housing, a capacitive sensor, and a microprocessor. The housing can include a window, and the capacitive sensor can be located inside of the housing, behind the window. A capacitance of the capacitive sensor can change when the capacitive sensor detects an object on the window or within a predetermined distance from the window, and the microprocessor can read the capacitance of the capacitive sensor and use the capacitance of the capacitive sensor to determine whether to activate an alarm or to determine whether to activate an anti-mask system. |
| US09324218B2 |
Personal alarm light apparatus and method
A personal alarm light operates as a multi-purpose emergency tool having a power pack of batteries powering a white light beam, as well as a radially emanating red light ring. An audible alarm has a loud, typically high-pitched oscillating sound. A resonance chamber amplifies the sound, which emanates from apertures delivering sound radially away from the resonance chamber. Crowns on each end of the tool provide regions of reduced area and alternating relieved sections about the circumference thereof, in order to provide increased impact pressure from the points when used as hammers to break glass, or as strikers to cut through fabric or other sheet materials. |
| US09324209B2 |
Methods and architecture for cashless system security
Methods for secure transactions between gaming machines and portable devices are described. A logic device, separate from a master gaming controller on the gaming machine and placed in the gaming machine, may be operable to authenticate a portable device, such as a smart card, and authorize transactions involving transfers of indicia of credit between the portable device and the gaming machine. The logic device may be operable to send authentication information relating to the portable device to a remote host where a value amount of transactions involving the portable device authorized by the logic device may be higher when the logic device and the remote host authenticate the portable device as opposed to when the portable device is only authenticated by the logic device. |
| US09324208B2 |
Transporting and using wagering game data
A wagering game system and its operations are described herein. In some embodiments, the operations can include storing a copy of wagering game content of a wagering game on a portable data storage device while the portable data storage device is connected to a wagering game machine in a casino, the wagering game being played at the wagering game machine. The operations can further include disconnecting the portable data storage device from the wagering game machine, the portable data storage device being configured to transport the copy of the wagering game content to play on a computing device outside the casino. |
| US09324204B2 |
Secure charging stations and methods for operating the same
A secure charging station for portable electronic devices (PEDs) may include plurality of individual charging sub-stations, each with an associated charging port, PED sensing area and authentication system. The PED sensing area includes one or more sensors sensing the presence and/or absence of the PED. The authentication system permits a PED owner to enter authentication information, such as a four-digit code via keypad, or information on a credit card, to initiate a secure mode in which unauthorized removal of the PED will trigger an alarm. When in the secure mode, the charging station may display a signal to notify unauthorized persons that tampering or removal of a corresponding PED from the sensing area will trigger an alarm. When charging is complete, or when the owner desires to remove the PED from the secure sensing area, he or she again enters authentication information via the authentication system to cause the PED sensing area to assume an unsecure mode, which permits removal of the PED without the sounding of an alarm. |
| US09324200B2 |
Work machine, control system for work machine, and control method for work machine
A work machine includes a tank that stores liquid. The work machine includes a calculation unit configured to obtain a difference between an amount of the liquid inside the tank acquired at a first timing and an amount of the liquid inside the tank acquired at a second timing after the first timing, and a notification unit configured to notify abnormality information indicating occurrence of abnormality related to the tank in the case where an operating time of the work machine during a period from the first timing to the second timing is equal to or smaller than a first threshold and also the difference is equal to or larger than a second threshold, and further configured not to notify the abnormality information in the case where the operating time is larger than a second threshold. |
| US09324191B2 |
Method and arrangement for image model construction
A method for constructing an image model (M1; M) from at least one image data input (IV1; IV1-IVn), comprises the steps of, in an iterative way, determining at least one state (PS1; PS1-PSn) of said at least one image data input (IV1; IV1-IVn), and a state (PSMF) of an intermediate learning model (MF; MIF) determining a target state (TSP) from said at least one state (PS1; PS1-PSn) of said at least one image data input, and from the state (PSMF) of said intermediate learning model (MF; MIF), performing at least one transformation in accordance with the determined target state (TSP) on said at least one image data input (IV1; IV1-IVn), thereby generating at least one transformed image (IV1T; IV1T-IVnT), aggregating said at least one transformed image (IV1T; IV1T-IVnt) with intermediate learning model (MF; MIF; MIT; MFT) information, thereby generating an updated estimate of said image model (M1; M), providing said updated estimate of said image model (M1; M) as said image model (M1; M) while also providing said updated estimate of said image model (M1; M) in a feedback loop to a model object learning module (500) for deriving an update of said intermediate learning model (MF, MIF). |
| US09324186B2 |
Method for representing terrain, method for creating terrain primitives, and apparatus using the methods
A method for representing a terrain, a method for creating terrain primitives, and an apparatus using the methods are disclosed. The terrain representation method includes: reading digital elevation model (DEM) data of a terrain; extracting feature points of the terrain from the DEM data of the terrain; creating a plurality of terrain primitives according to the feature points of the terrain; storing terrain representation model data based on the plurality of terrain primitives; and converting the terrain primitive based terrain representation model data into DEM data, and visualizing the DEM data. |
| US09324185B2 |
Process for creating a model of a surface of a cavity wall
A process for creating a surface model of a surface of a cavity wall (2), especially a heart chamber including the steps of: (a) accessing at least one three dimensional image data record of the cavity; (b) creating a preliminary deformable surface model of the interior surface or the exterior surface of the cavity wall for each three dimensional image data record; (c) dividing the surface of the preliminary surface model into surface segments; (d) defining volume segments each including one surface segment and extending radially inwards and/or outwards from their associated surface segment; (e) statistical analysis of the grey levels of the voxels present in the volume segments for analyzing the volume proportion of the cavity wall, in the respective volume segment; and (f) deforming the surface segments on the basis of the volume proportion thus creating a corrected surface model. |
| US09324184B2 |
Image three-dimensional (3D) modeling
Among other things, one or more techniques and/or systems are disclosed for creating a three-dimensional model of an image. Image data, comprise a series of images of a location, such as along a route, can be received. The image data can comprise a first image element location for a first image element, where the first image element location may correspond to a three-dimensional point in the image, such as a location in the image with a depth from a point of observation. The first image element can be segmented into a first façade plane using the first image element location. The first façade plane can be merged with a second façade plane, resulting in a three-dimensional model of the image. The second façade plane can comprise a second image element, where the image data comprises a second image element location for the second image element. |
| US09324177B2 |
Generation of intermediate images for texture compression
A machine may be configured to process an uncompressed image to obtain a set of intermediate images, which may be alternatively known as working images or temporary images. Such a set of intermediate images may be used as input for an image compression algorithm that, when executed by the machine or other compression engine, outputs a compressed version of the uncompressed image. For example, a compression format called “PVRTC,” which may be used on certain portable devices, accepts a set of three intermediate images as input, specifically, one full resolution, low precision version of the original uncompressed image, plus two low resolution, low frequency color versions of the original uncompressed image. A set of intermediate images for such a compression format may be generated by the machine from the original uncompressed image. |
| US09324175B2 |
Memory coherency in graphics command streams and shaders
One embodiment of the present invention sets forth a technique for performing a computer-implemented method that controls memory access operations. A stream of graphics commands includes at least one memory barrier command. Each memory barrier command in the stream of graphics command delays memory access operations scheduled for any command specified after the memory barrier command until all memory access operations scheduled for commands specified prior to the memory barrier command have completely executed. |
| US09324174B2 |
Multi-chip rendering with state control
Circuits, methods, and apparatus that provide multiple graphics processor systems where specific graphics processors can be instructed to not perform certain rendering operations while continuing to receive state updates, where the state updates are included in the rendering commands for these rendering operations. One embodiment provides commands instructing a graphics processor to start or stop rendering geometries. These commands can be directed to one or more specific processors by use of a set-subsystem device mask. |
| US09324173B2 |
System and method for enabling multiple-state avatars
A method of rendering an electronic graphical representation of a user of a computerized system includes providing a plurality of states for the electronic graphical representation including first and second differing states, monitoring a measurable quantity to provide a monitored quantity, and changing a state of the graphical representation from the first state to the second state based upon the monitored quantity. The graphical representation is an avatar and the method includes defining a receptor point associated with the avatar and associating an object with the receptor point. The receptor point is located on the avatar. The plurality of states includes a non-hybrid state. The plurality of states includes a hybrid state. The hybrid state is a static image hybrid state and a video hybrid state. The video hybrid state is a live video hybrid state and a pre-recorded video hybrid state. |
| US09324170B2 |
Creating a blended image
A blended image is created as follows. An overlay image frame is received in a device implemented by electronic circuitry. The overlay image frame has multiple pixels. A blending factor is determined with the device for each pixel in the overlay image frame. The blending factor is based on the color saturation surrounding the pixel such that an amount by which the pixel contributes to a blended image of the overlay image frame with an underlying image frame is based on the blending factor. |
| US09324164B2 |
Image encoding apparatus, image decoding apparatus, image processing apparatus, and control method thereof dealing with high dynamic range image
This invention makes it possible to detect only a relatively large mismatch while allowing a mismatch to some extent between an LDR image and HDR information, which are stored in a single file, caused by editing of the LDR image. An apparatus of this invention generates, from an input HDR image, an LDR image and difference information representing a difference between the LDR image and the HDR image. The generated LDR image is encoded. Information formed from data representing a local feature of the LDR image is calculated as LDR meta-data. The apparatus generates a file by storing the encoded data in a main encoded data storage region and storing the difference information and the LDR meta-data in a marker defined as a non-reference region for an LDR image decoding apparatus in the file structure. |
| US09324162B2 |
Image processing apparatus, method, and program
There is provided an image processing apparatus including a tone mapper that losslessly tone maps image data in a floating-point representation, a base layer generator that generates base layer image data by reducing a bit depth of the image data tone mapped by the tone mapper, and an enhancement layer generator that generates enhancement layer data by using the image data tone mapped by the tone mapper and the base layer image data generated by the base layer generator. |
| US09324161B2 |
Content-aware image compression method
Methods for content-aware image compression are disclosed. One method comprises the steps of non-uniformly downscaling an original input image according to a saliency map, creating a residual image, encoding the residual image and downscaled input image, and transmitting the residual image and downscaled input image. The encoded image components are transmitted to a receiver. Downscaling may be performed using an aspect ratio that is automatically calculated from the saliency map. The saliency map may be based on an algorithm specified at an encoder or on regions of interest selected by a plurality of users of receivers that receive the transmitted encoded image components. |
| US09324158B2 |
Image processing device for performing image processing on moving image
An image processing device executes: a determination process of determining similarity of a motion of a subject in each of a plurality of pieces of moving image data stored in the storing unit; a selection process of selecting a specific piece of moving image data from among the pieces of moving image data on the basis of the similarity determined by the determination step; and an output process of outputting information of a selection result by the selection step. |
| US09324152B2 |
Image processing of images that include marker images
A method, includes: obtaining an image, the image having marker images and a background image; identifying presence of an object in the background image using a processor; and providing a signal for stopping a procedure if the presence of the object is identified. An image processing apparatus, includes: a processor configured for: obtaining an image, the image having marker images and a background image; identifying presence of an object in the background image; and providing a signal for stopping a procedure if the presence of the object is identified. A computer product having a non-transitory medium storing instructions, an execution of which causes an image processing method to be performed, the method includes: obtaining an image, the image having marker images and a background image; identifying presence of an object in the background image; and providing a signal for stopping a procedure if the presence of the object is identified. |
| US09324148B2 |
Image processing apparatus, image processing method and program
There is provided an image processing apparatus which calculates a feature value of an image. The apparatus comprises first obtaining means for obtaining an image; calculation means for calculating a set of numerical values formed from degrees of contributions of each of a plurality of order, wherein the degree of contributions of each order indicate contributions of monomials of the order for intensity values which are calculated using an approximation polynomial, and wherein the approximation polynomial provides a relationship between a pixel position of the image and an intensity value at the pixel position and is formed from a plurality of the monomials each having an order out of the plurality of orders; and first output means for outputting the set of the calculated numerical values as the feature value of the image. |
| US09324140B2 |
Methods and systems for evaluating bone lesions
Methods and systems for evaluating bone lesions include accessing a first dataset acquired from a patient with a first imaging modality and a second dataset acquired from the patient with a second imaging modality. A segmentation is performed on the first dataset to identify a subset of the first dataset corresponding to a skeletal structure of the patient and a patient skeletal metric representing a total bone volume of the patient is automatically calculated from the subset of the first dataset. The methods and systems further include detection of at least one lesion in the second dataset, classification of the at least one lesion as a bone or non-bone lesion, automatic calculation of a bone lesion metric based on the classification, and calculation of a lesion burden as a ratio of the bone lesion metric and the patient skeletal metric. |
| US09324139B1 |
Picture brightness adjusted temporal filtering
An apparatus includes an input circuit configured to receive a sequence of pictures and a processing circuit. The processing circuit may be configured to (i) determine respective picture brightness values for each of a reference picture and a target picture selected from the sequence of pictures, (ii) remap image data of the reference picture based upon the respective picture brightness values, and (iii) perform temporal filtering between the reference picture and the target picture utilizing the remapped image data. |
| US09324137B2 |
Low-frequency compression of high dynamic range images
Methods and apparatuses for adjusting a global dynamic range of an image are described. An image is decomposed into (i) a low spatial frequency component and (ii) a high spatial frequency component. The global dynamic range of the low spatial frequency component is adjusted to produce an adjusted low spatial frequency component. The image is reconstructed with (i) the adjusted low spatial frequency component and (ii) the high spatial frequency component to thereby produce a processed image. |
| US09324135B2 |
Image processing system, image processing method, and image processing program
There is provided an image processing system which can remove jaggies not only from binary images but also from gray scale images, color images and images upscaled by an unknown scaler. When the center pixel of the local area clipped from a processing target image is decided to be the jaggy removal target pixel, a base filter computing means 84 applies a plurality of types of predetermined base filters to the local area. A weight calculating means 85 calculates weights with respect to the plurality of types of base filters based on the feature amount calculated by a principal component analyzing means 82. Based on a filtering result of each base filter and a weight with respect to each base filter, a filtering result weight computing means 86 updates a pixel value of the center pixel. |
| US09324134B2 |
Display apparatus and control method thereof
Disclosed are a display apparatus and a control method thereof. The display apparatus includes a transparent display unit to display content including a first part and a second part based on a first direction in which a first user is located, a sensor unit to receive information sensed in a second direction opposite to the first direction, and a controller to implement mirror flipping the second part to be displayed in the second direction according to the received sensed information. The transparent display unit displays the first part in the first direction and the mirror flipped second part. The first part and the second part are included in the same content, the first part is set to maintain the first direction, and the second part is set to be mirror flipped based on the second direction. |
| US09324126B2 |
Automated latency management and cross-communication exchange conversion
A system and method for communication in a parallel computing system is applied to a system having multiple processing units, each processing unit including processor(s), memory, and a network interface, where the network interface is adapted to support virtual connections. The memory has at least a portion of a parallel processing application program and a parallel processing operating system. The system has a network fabric between processing units. The method involves identifying need for communication by the first processing unit with a group of processing units, creating virtual connections between the processing units, and transferring data between the first processing units. |
| US09324117B2 |
Method and system for dynamic web display
A system and method for transacting retrieval of inventory data, such as real estate property listing(s), over an information network and dynamically transmitting the listing(s), in near or real time, to one or more subwindows of a web browser window. The listings contain customized rendering instructions that are encoded into an inventory data string and sent to an ad server that renders the listings in the subwindow according to the customized rendering instructions. |
| US09324114B2 |
Interactive map for grouped activities within a financial and social management system
Embodiments of the invention comprise systems, computer program products, and methods for a financial and social management system that provides improved tracking and management related to how, where, when, and with whom a user enters into activities. The financial and social management system captures activity information and images from various sources of information, including but not limited to social networking accounts, e-receipts, location determination devices, and the like, and associates the activity information and images with the activities. The financial and social management system may display the activities, activity information, and images in an interactive map using markers. The markers in the interactive may be displayed as a function of the time of the activity, include images, or transaction data related to the activity. Positioning information related to the location of the user at the time of the activities may also be overlaid on the interactive map. |
| US09324113B2 |
Presenting social network connections on a search engine results page
Systems, methods, and computer-readable storage media for presenting social network connections in association with a search engine results page (SERP) are provided. Upon receipt of a search query, it is determined if the query is a name query and if social networking data associated with the user is available. If it is determined that the query is a name query and that social networking data associated with the user is available, it is determined if there is a connection match to the query. If it is determined that one or more social network connections of the user match the name query, the matching social network connection is presented in association with the SERP. Additionally, the user may add a presented social network connection as a first degree connection and/or send a message to a presented connection from the context of the SERP. |
| US09324111B2 |
271 embedded alerts
Normalizing codified data in an eligibility response and proactively identifying insurance eligibility and benefit documentation issues is provided. Data in an eligibility response may be mapped with other data including data received from healthcare providers, payers, data from inquiries, etc. The data may be stored in tables, and/or in internal and external databases. If there are any determined issues discovered, an alert of the issue found is embedded in the response or the determined issue may be automatically corrected. The alert may provide an instruction on how to rectify the issue to a healthcare provider administrative user. The formatting and structure of the eligibility response may be normalized such that message segments relating to a same service type are grouped together, providing a consistently formatted normalized response. Accordingly, an end user may be able to more easily find information in the normalized eligibility response. |
| US09324107B2 |
Interactive collection book for mobile devices
A software-based interactive collection book for mobile devices provides the users a way to connect their customers to products while the products are still being developed. This will allow a user to engage with their customers earlier to drive more sales. This will result in their products being more successful in the market at the time of launch. |
| US09324106B2 |
In-store navigation without electronic positioning
A shopping list is received from the user and locations of items in the list are obtained. A route visiting the locations of the items is generated and a corresponding ordering of items is also generated. Directions to a next item in the shopping list are provided in response to detecting checking off or scanning of a previous item. In response to detecting scanning of an item out of order or an item not in the shopping list, a new route is generated originated at the item and passing by the locations of items of the shopping list that have not been checked off or scanned. Routes may be generated according to a route optimization algorithm. The directions to items in a list may be provided on a user's mobile device without use of an electronic locating means such as GPS, beacons, or the like. |
| US09324100B2 |
Card reader with asymmetric spring
A card reader is positioned in a housing that has length, height and width dimensions. The read head is configured to be coupled to a mobile device and has a slot for swiping a magnetic stripe of a card. The read head reads data on the magnetic stripe and produces a signal indicative of data stored on the magnetic stripe. The read head has length, height and width edge surfaces. An asymmetric spring is coupled to the read head. The asymmetric spring positions the read head to be offset in the housing with the housing length and height edges being non-symmetrical in respect to the length and height edges of the read head. An output jack is adapted to be inserted in a port of the mobile device and deliver an output jack signal to the mobile device. |
| US09324099B2 |
Dynamically allocating resources between computer partitions
Embodiments of the present invention provide a computer system having a plurality of partitions, comprising a pay-per-use (PPU) system including at least one computing resource available for use in the computer system on a chargeable basis, a resource management system for receiving a computing resource request from one of the partitions and allocating computing resources amongst the partitions, wherein the resource management system is arranged to allocate a computing resource from the PPU system to the requesting partition according to the received request without charge by the PPU system, and to allocate a corresponding computing resource to the PPU system from another of the partitions. |
| US09324096B2 |
System and method for communicating information
A system and method for effectively communicating information using at least one mode of communication is described, in which information recipients proximate to a communications device within a pre-determined space and during a pre-determined time period are identified, from whom physiological state information is obtained that, when coupled with other characteristics information, is used to select from a plurality of information elements at least one information element to better target the information elements. The information element is then provided to the communications device so that it may be provided to the information recipients in the pre-determined space in a manner that is sensed by the information recipients. |
| US09324094B1 |
Ad skip feature for characterizing advertisement effectiveness
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for characterizing effectiveness of online advertisements inserted into media streams based at least in part on monitoring events indicative of an audience skipping ad streams inserted into the media streams. The methods and systems described in this specification enable tracking the number of impressions prior to detecting events indicative of interest or disinterest for ad streams inserted into a media stream. |
| US09324090B2 |
Method, system and apparatus for reinforcing desirable consumer behaviors with surprise rewards
In some embodiments, a fulfillment entity receives over an electronic interface from a merchant website associated with a third-party online user community an order from a member of the user community for an item from the merchant website. During order processing, a set of rules for rewarding members of the third-party online user community based on the past behaviors of one or more members of the user community is evaluated. Responsive to a condition fulfilling one of the rules, the member order is modified to provide an incentivizing reward to the member of the online user community. |
| US09324089B2 |
Methods and apparatus for metering media feeds in a market
Methods and apparatus for metering media feeds in a market are disclosed. An example method includes duplicating a first audio stream in a media feed to generate a second audio stream, encoding the first audio stream with a first breakout code, encoding the second audio stream with a second breakout code different from the first breakout code, combining the first audio stream, the second audio stream, and a video stream of the media to generate an encoded transport stream, and instructing, via a processor, a media receiver to tune to the transport stream and select the second audio stream for distribution to a media presentation location on a channel associated with the second breakout code. |
| US09324084B2 |
System and method for real-time web page context analysis for the real-time insertion of textual markup objects and dynamic content
A technique is described for delivering contextual information to end users of a data network which includes at least one client system associated with an end user. According to a specific embodiment, the technique of the present invention provides a contextual-based platform for delivering to an end user in real-time proactive, personalized, contextual information relating to web page content currently being displayed to the user. |
| US09324082B2 |
System and method for providing information tagging in a networked system
A computer-implemented system and method for providing information tagging in a networked system is disclosed. The apparatus in an example embodiment includes a tag engine configured to process a database of categorized product listings; to receive a user-provided tag associated with at least one of the product listings; to retain the user-provided tag; and to serve the user-provided tag to a user viewing at least one of the product listings. |
| US09324081B2 |
Network advertising system
Systems and methods for transmitting content to a client via a communication network are provided. In one embodiment, a method of transmitting unsolicited content, such as an advertisement, to a client via the Internet may include one or more of the following steps: 1) intercepting a data transfer protocol request/response; 2) analyzing information contained within the data transfer protocol request/response; 3) selecting advertising content to send to the client; and 4) sending the selected content to the client. For example, a TCP/IP request, such as a hypertext transfer protocol (HTTP) request, from the client may be detected. Next, substitute or supplemental content may be selected for sending to the client. Lastly, the selected substitute or supplemental content may be sent to the client in lieu of or in addition to the originally requested content. |
| US09324080B2 |
Method and system of facilitating on-line shopping using a downloadable toolbar
A method of modifying an Internet browser interface to provide shopping assistant functionality facilitating on-line shopping at a supported merchant Internet site. A wallet created in accordance with the present invention comprises a database having various user data stored therein under certain predetermined field names. A supported merchant data file identifies a plurality of supported merchants and enables the modified browser interface to determine when a shopper has navigated to a supported merchant web site. For each supported merchant, a rules and mapping file is created that may be used in connection with the wallet to map user-provided information in the wallet to corresponding fields in the merchant's check-out web page. When a user navigates to a supported merchant web site and desires to purchase merchandise and/or services from that merchant, the wallet automatically fills out the merchant's check-out web page(s), thereby simplifying on-line shopping and particularly, the check-out process. |
| US09324078B2 |
Dynamic social network system
The system service provider automatically spawns a custom website for any group created using the system. The group may be created from a user interface and a groups lozenge provided by the interface. Messages may be sent between group members using a multi-user chat provided by the custom website. In addition, video and images and other digital media and content may be shared with group members. The website associated with the group stores any messages sent to the group, any multi-user chat between group members, any shared videos or images, and any shared files. As a result, group members may access this information at any time; however, others people beyond the group are unable to access this information. |
| US09324077B2 |
System, method, and computer program product for issuing and using debit cards
A system, method, and computer program product are used to issue and track debit cards. A system comprises an enrolling system that verifies an enrollee, associates an enrollee's main and overdraft account, and issues a debit card, an authentication system that receives information regarding a requested transaction of a debit card and that receives information regarding the main and overdraft account associated with the debit card and accepts or rejects the requested transaction based thereon, and a settlement system that generates a periodic report of at least one of the transactions, the main account, and the overdraft account. The overdraft account can be a charge or credit account. |
| US09324074B2 |
Mobile communication device monitoring systems and methods
Systems and methods are directed to monitoring the communications to and from a mobile communication device in accordance with one or more embodiments. For example in accordance with an embodiment, data services such as a mobile wallet on a mobile communication device may be monitored against rules stored in a central data center repository. Other data services may include all forms of communications between the mobile communication device and a third party along with changes to application or data within the mobile communication device. An alert may be provided to an administrator when unauthorized mobile wallet activity is detected and/or a message may be sent to the mobile communication device to prevent the unauthorized mobile wallet activity. |
| US09324073B2 |
Systems for mobile image capture and remittance processing
The present invention relates to automated document processing and more particularly, to methods and systems for document image capture and processing using mobile devices. In accordance with various embodiments, methods and systems for document image capture on a mobile communication device are provided such that the image is optimized and enhanced for data extraction from the document as depicted. These methods and systems may comprise capturing an image of a document using a mobile communication device; transmitting the image to a server; and processing the image to create a bi-tonal image of the document for data extraction. Additionally, these methods and systems may comprise capturing a first image of a document using the mobile communication device; automatically detecting the document within the image; geometrically correcting the image; binarizing the image; correcting the orientation of the image; correcting the size of the image; and outputting the resulting image of the document. |
| US09324068B2 |
System, method and article of manufacture to facilitate a financial transaction without unlocking a mobile device
A financial transaction is facilitated without unlocking a mobile device, where the lock screen wallpaper of a mobile device is dynamically set to an image having a scanning code (e.g., a QR code, a barcode, etc.) for use at a business location that the user is currently located. |
| US09324067B2 |
User interface for payments
The present disclosure relates to making payments with a mobile device. In one example process, the mobile device receives and stores information for one or more payment accounts on the mobile device. The mobile device is used to make payments using the payment accounts. In some examples, authorization to proceed with a payment is performed before each purchase made by the user. The authorization process can include receiving a verification of the user, such as a fingerprint scan or passcode. In some examples, a payment account is selected from among available payment accounts. In some examples, an indication is displayed of a digital item associated with a purchased item. In some examples, a payment transaction is initiated with participants of an ongoing communication. In some examples, an application of a retailer is invoked based on the availability of the application. In some examples, a purchase recommendation is provided. |
| US09324066B2 |
Method and system for providing virtual credit card services
An approach is provided for virtual credit card services. A request for a limited use transactional account number representing a virtual credit card is generated at a mobile device. The limited use transactional account number is received in response to the request. A point of sale interface is configured with the limited use transactional account number for presentation at a point of sale terminal. |
| US09324063B2 |
Contextual solicitation in a starter application
A reduced capability subset of an application referred to as a “starter application” is provided on a computer device prior to purchase and intended for use by a user purchasing the computer device. The starter application may monitor input from the user when the starter application is executing to ascertain opportunities to inform the user of an upgrade and then solicit the user for purchasing the upgrade. The starter application may use a limited access browser to contact a server to assist in the solicitation and complete the transaction. Upon completing the transaction, the upgrade is provided to the computing device. The upgrade may comprise the full capability version of the application, templates, clip art, or other software. The upgrade may entail transmitting the upgrade to the computer device or providing an authorization key to unlock the upgrade that is already stored on the computer device. |
| US09324060B2 |
Displaying a plurality of calendar entries
Displaying multiple calendar entries includes dividing the calendar entries into multiple different priority levels in a computerized calendaring system implemented by at least one processor; displaying at least some of the calendar entries in each priority level in a separate strip associated with that priority level in a user interface of the computerized calendaring system; and advancing a position of each displayed calendar entry in each strip with the computerized calendaring system to reflect the passage of time. |
| US09324055B2 |
Techniques to manage remote events
Techniques to manage remote events are described. An apparatus may comprise a processor circuit and a remote event application arranged for execution by the processor circuit. The remote event application may be operative to manage remote event notifications for a publisher entity and a subscriber entity. The remote event application may comprise, among other elements, an event monitor component operative to receive an external event notification message with a publisher entity event for the publisher entity. The event monitor component may select a custom event receiver component associated with the publisher entity from among multiple custom event receiver components, and send the external event notification message to the selected custom event receiver component. The custom event receiver component may implement custom business logic, such as code callouts designed for specific application programs or system programs. Other embodiments are described and claimed. |
| US09324050B2 |
System and method of performing an engineering-based site development and risk assessment process
A system and method is provided for on-site site risk assessment and to encourage collaboration between professional disciplines related to land development and construction projects. A graphical risk analysis system is provided based on answers to interdisciplinary questions related to risks. Use of the system promotes a complete checklist of interdisciplinary and informational consultation which, when completed for a project, assesses the risk related to construction site development and allows for reduction in risk as the project progresses. |
| US09324045B2 |
Computer implemented method, process modelling system and non-transitory computer readable data carrier for transforming a meta-model from a process model
A computer implemented method for instantiating a process in a process modelling system may include modelling the process as a process model, said process model comprising process objects and automatically transforming the process model into a meta model, said meta model comprising the process objects of the process model as definitions of process object types in said meta model. Further, a process modelling system and a non-transitory computer readable media containing a computer program for performing said method are provided. |
| US09324042B2 |
Automatically initiating product replenishment
A facility for assessing product replenishment is described. The facility determines that a purchasing entity possesses an item, determines an expiration time for the item, and schedules, for a time preceding the expiration, a unilateral communication to the purchasing entity indicating that the item should be replenished. The facility can also manage automatic item replenishment, including determining a target date for replenishment of the item, transmitting to the purchaser in advance of the target date (when the purchaser is not engaged in an electronic shopping activity) a replenishment proposal, and ordering a replacement for the item. In some cases, the facility places an order within a predetermined tolerance of the target date without intervention by the consumer. The facility can also establish and test a condition for suggesting replenishment, can raise an event when the condition is satisfied, and can unilaterally make the replenishment suggestion when the event is raised. |
| US09324039B2 |
Incremental updates for ordered multi-field classification rules when represented by a tree of longest prefix matching tables
An apparatus includes a memory and a processor. The memory may be configured to store at least a portion of a multi-level tree representation of an ordered multi-field rule-based classification list. The tree representation includes at least one non-leaf level and one or more leaf levels. Each entry in the at least one non-leaf level contains a count value indicating a number of rules having a matching field. Entries in at least one of the one or more leaf levels include rule pointers arranged in priority order. The processor may be configured to incrementally insert or delete rules, while preserving ordering semantics of the tree representation. |
| US09324036B1 |
Framework for calculating grouped optimization algorithms within a distributed data store
A framework for executing iterative grouped optimization algorithms such as machine learning and other analytic algorithms directly on unsorted data within a SQL data store without first redistributing the data comprises an architecture that provides C++ abstraction layers that include the algorithms over a SQL data store, and a higher Python abstraction layer that includes grouping and iteration controllers and call functionality to the C++ layer for invocation of the algorithms. |
| US09324028B1 |
Collaborative filtering of content recommendations
Identifying collaboratively filtered content recommendations based on user activity data collected from users in an electronic environment is disclosed. The user activity data includes information relating to user-engagement indications of the users. Multiple connection pairs are identified based on the user activity data, with each connection pair including a potential target document and a candidate recommendation document. A connection strength is determined for each of the identified connection pairs. An overall grade is generated for a set of candidate connection pairs of the plurality of connection pairs, wherein the overall grade is based on the respective connection strength associated with each of the set of candidate connection pairs. One or more filtered recommendations for provisioning in connection with the target document based on a comparison of the overall grade associated with each of the set of candidate connection pairs. |
| US09324027B2 |
Collective evaluation of alternatives in a collaborative decision making environment
A system, method and computer program product for facilitating collaborative decision making may be provided. The system receives data representing individual postings of users associated with a deliberation to make a decision. The system further receives ratings associated with the individual postings in order to make the decision. The system represents the received data in a hierarchical data structure. The system aggregates, through the hierarchical data structure, the ratings associated with the individual postings to obtain strength values. The system facilitates the making of the decision based on the aggregated strength values. |
| US09324025B2 |
Automating natural-language interactions between an expert system and a user
A method and associated systems for automating natural-language interactions between an expert system and a user. Characteristics of and relationships among elements of a set of business processes are captured, organized into a data structure, and stored as a set of business process models. The format, contents, and organization of these models are chosen to facilitate translating characteristics of the business processes into a format that may be stored in a knowledgebase of an expert system. The structured business-process models are then translated into a component of a knowledgebase from which an expert system may infer rules that guide its natural-language user interactions that relate to the business processes. In some embodiments, a similar method may be used to automatically translate business-process metadata, such as concept classes and process classes, into a similar knowledgebase-compatible format. |
| US09324021B2 |
Avoiding non-intentional separation of avatars in a virtual world
A method for avoiding non-intentional separation of avatars in a virtual world may include detecting a first avatar seeking to enter a first location and determining if a second avatar is related to the first avatar based on a first predetermined rule. The method may also include determining that the first and second avatars are seeking to enter the first location together. The method may further include determining whether to allow the first avatar and the second avatar to enter the first location based on a second predetermined rule. |
| US09324020B2 |
Antenna structures and methods for omni directional radiation patterns
A device is provided for use with a radio frequency identification (RFID) chip that receives and modulates a radio frequency (RF) signal. A substrate of the device includes a first short dipole antenna structure that backscatters a received RF signal to produce a first radiation pattern having nulls. A set of connection pads couple the RF signal from the antenna to a frontend transmitter circuit of the RFID chip. A second antenna structure backscatters the received RF signal by electromagnetic coupling to the first antenna structure and produces a second radiation pattern that complements the nulls in the first radiation pattern. |
| US09324018B2 |
Method of producing radio-frequency identification elements and radio-frequency identification elements capable of being obtained by such a method
The invention relates to a method of producing, by vacuum deposition of at least one conducting material on a supporting means, radiofrequency identification elements as well as to radiofrequency identification elements that can be obtained by implementing such a method. The present invention is directed to a method of production allowing low-cost fabrication of radiofrequency identification elements which have high-performance and are also discrete. To achieve this, the invention provides for the use of a vacuum deposition technique for producing the antenna on a support means previously covered with a bonding coat, such as a layer of varnish. More precisely, the subject of the invention is a method of producing at least one radiofrequency identification element consisting in producing at least one antenna (8) on a support means (2) by vacuum deposition of at least one conducting material (10) on a receiving surface (2a) of the support means (2), characterized in that at least a part of the receiving surface (2a) is previously covered with a bonding coat (6). |
| US09324009B2 |
Media processing device
A media processing device enables reading second media that do not bend easily from the device front with the same ease of use as processing first media that bend easily. The media processing device has a media conveyance path that guides first media inserted from a media insertion opening toward the back and then again toward the front on the front-back axis to the media exit. A straight conveyance path that angles to the inside on the device width axis is formed at a part connected to the media exit, and a second media insertion path that extends straight to the front from the straight conveyance path is connected to the media exit. |
| US09324005B2 |
Complex-valued phase-based eulerian motion modulation
In one embodiment, a method of amplifying temporal variation in at least two images includes converting two or more images to a transform representation. The method further includes, for each spatial position within the two or more images, examining a plurality of coefficient values. The method additionally includes calculating a first vector based on the plurality of coefficient values. The first vector can represent change from a first image to a second image of the at least two images describing deformation. The method also includes modifying the first vector to create a second vector. The method further includes calculating a second plurality of coefficients based on the second vector. |
| US09324002B2 |
User identification and personalization based on automotive identifiers
A system and method for user identification and personalization based on automotive identifiers are described. Image data of a vehicle is received from an image capture device. Vehicle identification information is extracted from the image data. A data record associated with a user is retrieved using the vehicle identification information. A personalized communication for the user is generated based on the retrieved data record. The personalized communication may be transmitted to a device. The personalized communication may comprise a recommendation. |
| US09324001B2 |
Character recognition device and character segmentation method
A character recognition device for use with a medium with a character string, the character recognition device may include an image reader to capture the character string as image data; an image memory to store the image which is read by said image reader; and a data processor to segment the character string from said image data stored in said image memory and segmenting characters from said character string for character recognition. The data processor may include a character segmenting unit to detect boundary positions of neighboring characters in said character string and segment each character. The character segmenting unit may include a boundary search range setting unit to set a range to search boundary position of neighboring characters in said character string and a boundary position setting unit to set a boundary position of characters by using a discriminant analysis method within said search range which has been set. |
| US09324000B2 |
Identifying objects in an image using coded reference identifiers
Image processing is performed to identify an image of a physical object within a digital image. A boundary of the image of the physical object may be determined. A coded reference identifier that is contained within the boundary of the image of the physical object may be recognized. A database record for the coded reference identifier may be associated with a database record for the physical object. |
| US09323996B2 |
Controlling multiple photographic adjustments with a single control
A method and system for controlling multiple image editing controls using one master control. The system identifies various characteristics of an image being edited. The system generates, for each of multiple image editing controls, a relationship between the master control and the image editing control. The relationship is based on at least one of the identified characteristics of the image being edited. The relationship is different for different images when the different images have different characteristics, such as different average color component values at a particular percentile of pixels in the images. |
| US09323995B2 |
Image processor with evaluation layer implementing software and hardware algorithms of different precision
An image processor comprises image processing circuitry implementing a plurality of processing layers including at least an evaluation layer and a recognition layer. The evaluation layer comprises a software-implemented portion and a hardware-implemented portion, with the software-implemented portion of the evaluation layer being configured to generate first object data of a first precision level using a software algorithm, and the hardware-implemented portion of the evaluation layer being configured to generate second object data of a second precision level lower than the first precision level using a hardware algorithm. The evaluation layer further comprises a signal combiner configured to combine the first and second object data to generate output object data for delivery to the recognition layer. By way of example only, the evaluation layer may be implemented in the form of an evaluation subsystem of a gesture recognition system of the image processor. |
| US09323993B2 |
On-street parking management methods and systems for identifying a vehicle via a camera and mobile communications devices
Methods, systems and processor-readable media for identifying a vehicle for street parking management. An initial identification of one or more vehicles detected parked along a street can be generated based on one or more of a group of factors. The initial identification can be communicated to a user of the vehicle by transmitting an image indicative of the vehicle parked along the street (e.g., via a mobile communications device). An operation can then be implemented for requesting a confirmation or a non-confirmation as to whether the vehicle detected and displayed on the image is associated with the user. Upon confirmation, an operation can be implemented for identifying the at least one vehicle as the initial identification. Upon non-confirmation, an operation can be implemented to query to identify the vehicle associated with the user from among a group of vehicles displayed via the image. |
| US09323991B2 |
Method and system for video-based vehicle tracking adaptable to traffic conditions
A method and system for adaptable video-based object tracking includes acquiring video data from a scene of interest and identifying an initial instance of an object of interest in the acquired video data. A representation of a target object is then established. One or more motion parameters associated with said scene of interest are used to adjust the size of a search neighborhood associated with said target object. The target object is then tracked frame-by-frame in the video data. |
| US09323990B2 |
Full-automatic detection method and system for static characteristic information in dynamic image
According to a method in the present invention, first whether an inter-frame difference for each pixel in predetermined first region and second region in the dynamic image exceeds a predetermined threshold is judged to determine whether the pixel is a static information point, and when, in the second region, pixels in regions not overlapping with the first region are determined as non-static information points, judgment on the inter-frame difference and the predetermined threshold is stopped; and then static characteristic information in the dynamic image is determined based on the static information points in the first region. Preferably, the inter-frame difference for each pixel in the first region may be re-judged based on an adjusted predetermined threshold, to further determine the static characteristic information in the dynamic image, so that static opaque static characteristic information or static characteristic information with arbitrary degrees of transparency in the dynamic image can be detected. |
| US09323985B2 |
Automatic gesture recognition for a sensor system
A method for gesture recognition including detecting one or more gesture-related signals using the associated plurality of detection sensors; and evaluating a gesture detected from the one or more gesture-related signals using an automatic recognition technique to determine if the gesture corresponds to one of a predetermined set of gestures. |
| US09323982B2 |
Display apparatus for performing user certification and method thereof
A method of certifying a user is provided. The method includes: generating a learning system; if a reference image is registered, analyzing the reference image by using the learning system to detect characteristic information; storing the detected characteristic information; photographing a user to acquire a user image; analyzing the user image by using the learning system to detect face characteristic information and additional information of the user; and comparing the face characteristic information and the additional information with stored characteristic information to certify the user. Therefore, a user certification is accurately performed. |
| US09323981B2 |
Face component extraction apparatus, face component extraction method and recording medium in which program for face component extraction method is stored
Disclosed is a face component extraction apparatus including an eye detection unit which detects a plurality of combinations of eye regions, each combination forming a pair, a first calculation unit which calculates a first evaluation value for each pair of eye regions, a fitting unit which fits a plurality of extraction models for extracting a plurality of face components in the image based on a number of pairs of eye regions whose first evaluation values are equal to or greater than a predetermined value, a second calculation unit which calculates a second evaluation value for each of a number of pairs of eye regions, and a deciding unit which decides a fitting mode of the plurality of extraction models to be fitted by the fitting unit based on calculation results of a number of second evaluation values by the second calculation unit. |
| US09323980B2 |
Pose-robust recognition
Some implementations provide techniques and arrangements to address intrapersonal variations encountered during facial recognition. For example, some implementations transform at least a portion of an image from a first intrapersonal condition to a second intrapersonal condition to enable more accurate comparison with another image. Some implementations may determine a pose category of an input image and may modify at least a portion of the input image to a different pose category of another image for comparing the input image with the other image. Further, some implementations provide for compression of data representing at least a portion of the input image to decrease the dimensionality of the data. |
| US09323979B2 |
Face recognition performance using additional image features
A technique is provided for recognizing faces in an image stream using a digital image acquisition device. A first acquired image is received from an image stream. A first face region is detected within the first acquired image having a given size and a respective location within the first acquired image. First faceprint data uniquely identifying the first face region are extracted along with first peripheral region data around the first face region. The first faceprint and peripheral region data are stored, and the first peripheral region data are associated with the first face region. The first face region is tracked until a face lock is lost. A second face region is detected within a second acquired image from the image stream. Second peripheral region data around the second face region are extracted. The second face region is identified upon matching the first and second peripheral region data. |
| US09323972B2 |
Finger biometric sensor including stacked die each having a non-rectangular shape and related methods
A finger biometric sensor may include first and second integrated circuit (IC) dies arranged in a stacked relation. The first IC die may include a first semiconductor substrate and an array of finger biometric sensing pixels thereon, and the second IC die may include a second semiconductor substrate and processing circuitry thereon coupled to the array of finger biometric sensing pixels. The first and second IC dies may each have respective first and second non-rectangular shapes, such as circular shapes that are coextensive. |
| US09323970B2 |
Trading interface retrieved based upon barcode data
Methods, systems, and apparatuses, including computer programs encoded on computer-readable media, for receiving barcode data including a company identifier. The company identifier is determined from the barcode data. A company name is determined based upon the company identifier. One or more associated company names associated with the manufacturer are determined based upon the company name. Based upon the company name, a ticker symbol is determined. In addition, one or more ticker symbols based upon the one or more associated company names are determined. |
| US09323963B2 |
Label printer, control method for a label printer, and non-transitory storage medium
Writing incorrect information to an IC tag affixed to a label is prevented. When a control command including recording information, an instruction to print the recording information on a label, and an instruction to write data including at least time-related information to an IC tag affixed to the label is received from a host computer, the system controller of a label printer prints the recording information and writes the write data based on time information input from a RTC, but does not print the recording information and write the write data based on the control command if an error was detected by RTC error detector. |
| US09323960B2 |
Clone-proof monetary and security documents and preparation thereof
The present invention relates to particulate based compositions for deposition on substrates, a system and method for the deposition of the said compositions for preparation of a clone-proof monetary and/or security documents. The said composition is applied as an identifier at predetermined location on the substrate. The magneto-optical signal from the said applied composition is captured by the reading system. Further it is encrypted same as an invisible or visible two dimensional (2D) barcode/image on the substrate as an associated identifier so as to create a dedicated, non repeatable and unique functional digitized relation between two said identifiers and/or any other identifier(s) linked to a specific object. |
| US09323957B2 |
Anti-tamper system based on dual random bits generators for integrated circuits
An apparatus includes a mesh block, a first number generator configured to generate a first number, a second number generator configured to generate a second number, and a comparator block configured to compare the first number with the second number and generate an output signal from the mesh block. The output signal indicates an occurrence of an unauthorized activity on the mesh block. |
| US09323955B2 |
Method for protecting a logic or mathematical operator installed in an electronic module with a microprocessor as well as the associated embedded electronic module and the system
The method for protecting a logic or mathematical operator of the NOR operator type, able to be used for executing a program in a microprocessor electronic module wherein the execution of the NOR operator is replaced by the execution (CAL-XORSEC(1) of a sequence Si operations having for final result a result identical to that of the XOR function.The sequence of operations Si composed of elementary operations with AND, OR and NOT is selected at each XOR operator from a set of eight equivalent sequences (S1 to S8) after determination CAL-NDO) of an order number ND0=1 according to the parameters of the program and/or a random parameter R supplied by a pseudo-random number generator (14). |
| US09323954B2 |
Method and apparatus for secure execution using a secure memory partition
A processor capable of secure execution. The processor contains an execution unit and secure partition logic that secures a partition in memory. The processor also contains cryptographic logic coupled to the execution unit that encrypts and decrypts secure data and code. |
| US09323953B2 |
System for managing secure and nonsecure applications on one and the same microcontroller
An electronic microcontroller system including: plural processors; at least one interface for exchange with at least one peripheral, the peripheral being user master of the electronic microcontroller system; a mechanism for access to a shared memory space; an interconnection matrix for interconnecting the exchange interface, the processors and the mechanism for access to a shared memory space; a mechanism managing applications involving a guaranteed level of security and integrity and of applications exhibiting a nonguaranteed level of security and integrity. The exchange interface cooperates with a secure isolation cell of the memory situated between the user master peripheral and the interconnection matrix. |
| US09323950B2 |
Generating signatures using a secure device
An integrated circuit device comprises a processor and a secure protection zone with security properties that can be verified by a remote device communicating with the integrated circuit device. The secure protection zone includes a persistent storage that is configured for storing cryptographic keys and data. The secure protection zone also includes instructions that are configured for causing the processor to perform cryptographic operations using the cryptographic keys. In addition, the secure protection zone includes an ephemeral memory that is configured for storing information associated with the cryptographic operations. The instructions are configured for causing the processor to perform the cryptographic operations on the data stored in the persistent storage and the information in the ephemeral memory as part of a secure communication exchange with the remote device. |
| US09323944B2 |
Conforming passwords to a password policy
An apparatus, program product, and method are disclosed for receiving a password entered by a user, the password not conforming to one or more requirements of a password policy, manipulating the password to create one or more compliant passwords conforming to the one or more requirements of the password policy, and presenting a list of the one or more compliant passwords to the user wherein a compliant password is selectable by the user. |
| US09323935B2 |
User device security profile
Attribute data of an endpoint computing device is collected that describes attributes of the endpoint computing device. The attribute data is communicated to a security score generator and security score data is received for the endpoint computing device. A graphical dashboard interface is caused to be presented on a display device, the dashboard interface presenting a plurality of security ratings based on the security score data, each security rating representing an amount of risk determined to be associated with a corresponding user activity on the endpoint device in a plurality of user activities. |
| US09323934B2 |
Managing and tracking commands associated with a change on a computer system
A method, computer program product, and computer system for managing and tracking commands associated with a change on a managed computer system. The managed computer system receives a log-on of an administrator onto the managed computer system, determines the lockdown level of the managed computer system by querying a managing computer system, and retrieves a list of authorized commands under the lockdown level from the managing computer system. The managed computer system determines, by querying the managing computer system, whether an authorized change on the managed computer system exists. The managed computer system removes the lockdown level to receive from the managing computer system authorization of commands that have been locked down, in response to determining that the authorized change exists. The managed computer system sets the lockdown level with the authorized commands on the managed computer system, in response to determining that the authorized change does not exist. |
| US09323929B2 |
Pre-identifying probable malicious rootkit behavior using behavioral contracts
The various aspects provide for a computing device and methods implemented by the device to ensure that an application executing on the device and seeking root access will not cause malicious behavior while after receiving root access. Before giving the application root access, the computing device may identify operations the application intends to execute while having root access, determine whether executing the operations will cause malicious behavior by simulating execution of the operations, and pre-approve those operations after determining that executing those operations will not result in malicious behavior. Further, after giving the application root access, the computing device may only allow the application to perform pre-approved operations by quickly checking the application's pending operations against the pre-approved operations before allowing the application to perform those operations. Thus, the various aspects may ensure that an application receives root access without compromising the performance or security integrity of the computing device. |
| US09323926B2 |
Method and system for intrusion and extrusion detection
A hypervisor includes an analysis trigger monitoring system. One or more analysis trigger parameters are defined and analysis trigger data representing the analysis trigger parameters is generated. The analysis trigger data is then provided to the analysis trigger monitoring system and the analysis trigger monitoring system is used to monitor at least a portion of the message traffic sent to, and/or sent from, a virtual asset controlled by the hypervisor to detect any message including one or more of the one or more analysis trigger parameters. A copy of at least a portion of any detected message including one or more of the one or more analysis trigger parameters is then transferred to one or more analysis systems for further analysis. |
| US09323924B1 |
Systems and methods for establishing reputations of files
A disclosed method may include (1) tracking the health of a computing system over time by calculating, for each of several time periods, a health metric that indicates the computing system's health during the time period, (2) evaluating the health metrics of the time periods to identify an anomalous time period during which the health of the computing system changed, (3) locating one or more files that were present on the computing system during the anomalous time period and absent from the computing system during one or more other time periods, and (4) basing a reputation for the file(s) on an association between the file(s) and the computing system that includes the anomalous time period and excludes the other time period. Various other methods, systems, and computer-readable media are also disclosed. |
| US09323922B2 |
Dynamically differentiating service in a database based on a security profile of a user
One embodiment of the present invention provides a system that differentiates service provided to a database user based on a security profile of the user. During operation, the system receives a sequence of commands from a user at a database system. The system then uses the sequence of commands to determine a security profile which indicates whether the user is behaving suspiciously. Next the system associates a resource consumer group with the user based on the security profile. Finally, the system differentiates service provided to the user based on the resource consumer group. |
| US09323915B2 |
Extended security for wireless device handset authentication
A mobile device is related to a user account. An agent implemented as processor instructions on a computing device sends login information to a service provider server. The service provider server compares the login information to the user account, performs a proximity check of the mobile device and the computing device, and sends authorization to the agent to approve an exchange of data with an application on the computing device. In some implementations the service provider may be an authorization service provider. Alternatively the service provider may be a wireless communications service provider and the mobile device is a cellular phone. In some implementations the mobile device is one of a card or a key fob that may include a biometric reader. |
| US09323912B2 |
Method and system for multi-factor biometric authentication
An approach for enabling multi-factor biometric authentication of a user of a mobile device is described. A biometric authenticator captures, via a mobile device, first and second biometric data for a user. The biometric authentication further associates the first biometric data and the second biometric data. The biometric authenticator then initiates a multi-factor authentication procedure that utilizes the first biometric data and the second biometric data to authenticate the user based on the association. |
| US09323907B2 |
Distribution apparatus, device, control method for distribution apparatus, and storage medium
A distribution apparatus accepts registration of an application program configured to provide a specific service to a device and an extension application program. When an application program that is specified by the extension application program is registered, the image forming apparatus manages the extension application program by linking it with the application program. When a license key has been received, the distribution apparatus distributes, to the image forming apparatus, an application program specified by a license key and/or an extension application program linked to the application program. |
| US09323905B2 |
Digital rights management handler and related methods
A system and method of providing universal digital rights management system protection is described. One feature of the invention concerns systems and methods for repackaging and securing data packaged under any file format type, compression technique, or digital rights management system. Another feature of the invention is directed to systems and methods for securing data by providing scalability through the use of modular data manipulation software objects. |
| US09323904B2 |
Blog post protection pathway
Disclosed herein is a method and system for providing copyright protection for blog posts prior to publication from within a running blog-publishing software application by automatically assembling and electronically submitting a copyright application for the blog post to the United States Copyright Office through the use of a portable application programming interface, which may be utilized by third-party blog-publishing applications, and then automatically publishing the blog post through the blog-publishing application once submission of the electronic copyright application for the blog post is confirmed. Additionally disclosed is a method and system of registering a blog post in order to memorialize the creation of the blog post from within a running blog-publishing application through the use of a portable application programming interface, which may be utilized by third-party blog-publishing applications, and then automatically publishing the blog post through the blog-publishing application once registration of the blog post is confirmed. |
| US09323901B1 |
Data classification for digital rights management
Information management is used to enforce and control rights associated with data through the use of policies implemented by a digital rights management (“DRM”) server. An information management system collects information about data objects in a computer system and classifies the data objects into one or more categories. The categories are mapped to service level objectives that include or request encryption and identify DRM policies to associate with data objects within each category. Each DRM policy identifies one or more users authorized to access data objects the DRM policy is associated with. Encryption is orchestrated, in one embodiment, by identifying a data object to the DRM server in an encryption request, and identifying a DRM policy to associate with the data object. The DRM server encrypts the data object and only allows it be decrypted by authorized users. |
| US09323900B2 |
Analysis system, analysis device, and management device
An analysis system comprising: an analysis device that analyzes a sample using a reagent and that performs the analysis of the sample in accordance with a measurement parameter measured in relation to a reagent to be used; and a management device communicably connected to the analysis device via a network; wherein the analysis device includes a first control unit that enables execution of processing for accepting a registration of the measurement parameter, and when the measurement parameter is registered, executes processing for transmitting to the management device transmission information including information indicating that the measurement parameter is registered; and the management device includes a second control unit that executes a receiving process of receiving the transmission information transmitted from the analysis device and an output process of outputting information indicating that the measurement parameter is registered in the analysis device based on the received transmission information is disclosed. |
| US09323899B2 |
Method and device for audio recording
An acquisition system includes a processor and one or more sensors coupled to the processor, where the one or more sensors monitor within an ear canal one or more of acceleration, blood oxygen saturation, blood pressure or heart-rate configured to monitor a biological state or a physical motion or both. The processor can be configured to analyze a portion of the biological state or the physical motion. Other embodiments are disclosed. |
| US09323897B2 |
Medication dispenser
A medication dispenser comprises a body with an opening, an advancing device, a reader, an output device and a processor connected to the advancing device, the reader and the output device. The body is closable and lockable and is arranged to receive a medication container comprising multiple individual sealed medication chambers, each medication chamber including a data tag relating to the medication chamber. The opening in the body is for a medication chamber and the advancing device is arranged to advance a medication chamber through the opening. The reader is arranged to read a data tag on a medication chamber and the processor is arranged to control the advancing device and the output device, according to a data tag on a medication chamber. |
| US09323893B2 |
Using mobile consumer devices to communicate with consumer medical devices
Mobile consumer devices are used to communicate with consumer medical devices to either provide update data to the consumer medical device or to obtain data from the consumer medical device. Some data is used to evaluate performance and operation of the medical device or a biological condition of the living being that is being treated with the medical device. Other data is used to calibrate and update the consumer medical device or to enable or disable certain functionality of the medical device. Communications between the medical devices and mobile consumer devices can be performed automatically or on demand, as initiated by a user, a third party, or in response to predetermined conditions detected by the devices. |
| US09323891B1 |
Intelligent dynamic preloading and processing
Provided herein are various systems and methods of adjusting images of an image series that are preloaded (and/or otherwise processed) in view of behavior data associated with viewing of other previous exams having similar characteristics (e.g., same modality) and/or by the same user. |
| US09323889B2 |
System and method for processing reference sequence for analyzing genome sequence
Provided are systems and methods for processing a reference sequence. Exemplary systems for processing a reference sequence may include a seed extractor configured to extract a seed from a reference sequence; a determiner configured to determine whether an unidentified base is present or absent in a seed extracted by the seed extractor; and an index generator configured to add a seed to an index when unidentified bases are absent from an extracted seed. |
| US09323887B2 |
Device and computed tomography scanner for determining and visualizing the perfusion of the myocardial muscle
A device is disclosed for determining and visualizing the perfusion of the myocardial muscle with the aid of static CCTA images. In at least one embodiment, the device includes a segmentation unit for segmenting the coronary blood vessels and the left myocardial muscle from a CCTA image of the heart; a first simulation unit for simulating the blood flow through the coronary blood vessels; and a second simulation unit by which the local perfusion of the myocardial muscle is determined on the basis of the ascertained blood flow into different regions of the myocardial muscle. The perfusion of the different regions of the myocardial muscle is visualized in a schematized image on a visualization unit. By virtue of the proposed device it is possible to dispense with further imaging examinations after the performance of a CCTA scan, thereby relieving the pressure both on the part of the physician and on the part of the patient. |
| US09323885B2 |
Method for generating updated vehicle wiring harness diagrams
A unique reproducible nomenclature for all components of a wiring harness is provided such that automatic calculation and re-calculation of wiring harness configurations is made possible. Specifically, automated updating of identification tags for harness nodes, bundles, parts from/referring to these topology elements without connectors/connections/cable lugs, as well as accessories referring to connectors, is provided for using a unique reproducible nomenclature and set of predefined rules. |
| US09323884B2 |
Computer program, method, and system for locksmithing
A computer program, method, and system for locksmithing. The computer program, method, and system receive vehicle information, obtain a key code for a lock based on the vehicle information, decrypt the key code to determine key specification data, and provide the key specification data to a user, such that a duplicate key corresponding to the lock can be formed. |
| US09323882B2 |
Metrology pattern layout and method of use thereof
A metrology pattern layout for a circuit structure is provided, the metrology pattern layout including a plurality of quadrants, in which quadrants a first wafer measurement pattern, a second wafer measurement pattern, a reticle registration pattern, and a reticle measurement pattern may be arranged to facilitate correlation of reticle metrology data with wafer metrology data. The reticle registration pattern may further include one or more outermost structural elements designed to protect other structural elements within the reticle measurement pattern from being modified in an optical proximity correction process. A method of optical proximity correction process is provided, in which a reticle measurement pattern may be obtained and classified to add or modify a rule set of the optical proximity correction process. |
| US09323879B2 |
Method of optimizing the design of an electronic device with respect to electromagnetic emissions based on frequency spreading introduced by hardware, computer program product for carrying out the method and associated article of manufacture
There is described a method of optimizing the design of an electronic device with respect to electromagnetic emissions based on frequency spreading. With the method, a designer can add frequency spreading with specific parameters by hardware. The resulting frequency spread signal can be observed. The designer can thus evaluate the reduction in electromagnetic emission level, and repeat this process by iteratively applying frequency spreading each time with specific parameters but without having to modify the design of the device and to generate another prototype of the device. |
| US09323878B2 |
Method of optimizing the design of an electronic device with respect to electromagnetic emissions based on frequency spreading introduced by data post-processing, computer program product for carrying out the method and associated article of manufacture
There is described a method of optimizing the design of an electronic device with respect to electromagnetic emissions based on frequency spreading. With the method, a designer can, for example, perform a transient simulation on the device only once, and then process the obtained signal data to add frequency spreading with specific parameters by post-processing. The resulting data can be filtered by various methods and the resulting spectrum observed. The designer can thus evaluate the reduction in electromagnetic emission level, and repeat this process by iteratively applying frequency spreading each time with specific parameters but without having to modify the schematic of the device and to perform another simulation of the device. The post-processing according to this innovation is extremely rapid as it is not a simulation process such as SPICE™, ADS™, etc. Only data is manipulated. |
| US09323877B2 |
Beam-steered wide bandwidth electromagnetic band gap antenna
An antenna includes a radiating element that is held in a fixed orientation with respect to an underlying electromagnetic band gap (EBG) structure. In one embodiment, the radiating element and the EBG structure are both housed within a conductive cavity. The radiating element, the EBG structure, and the cavity are designed together to achieve an antenna having improved operational characteristics (e.g., enhanced bandwidth, beam steering, etc.). In some embodiments, the antenna may be implemented as a flush mounted or conformal antenna on an outer surface of a supporting platform. |
| US09323876B1 |
Integrated circuit pre-boot metadata transfer
Pre-boot metadata transfer may include loading a first configuration bitstream into a programmable integrated circuit (IC), wherein the first configuration bitstream includes a first circuit design and metadata for a second circuit design. The metadata may be stored within a memory of the programmable IC. A configuration bitstream load condition may be detected and, responsive to the configuration bitstream load condition, a second configuration bitstream may be loaded into the programmable IC. The second configuration bitstream includes a second circuit design. |
| US09323873B2 |
Modelling and simulation method
A method for simulating behavior of first and second interrelated components within a system. The method comprises modelling behavior of said first and second components using first and second functional specifications; simulating behavior of said first and second components in predetermined circumstances by instantiating at least one first entity within a hierarchy of interrelated entities; and instantiating at least one further entity in response to the or each instantiated first entity. The or each further entity is selected by a simulation system on the basis of its hierarchical relationship with the at least one first entity. |
| US09323872B2 |
Fibre optic network design method
A system and method of designing a fiber optic network for a plurality of premises in a geographic area that has existing infrastructure is described. They include electronically receiving fiber optic network design inputs that include data indicative of a plurality of nodes in the fiber optic network and data indicative of arcs extending between said nodes in the fiber optic network based on allocated bandwidth for said premises in the geographic area, electronically receiving existing infrastructure design inputs comprising data indicative of said existing infrastructure that can be used as geographic locations for said nodes and said arcs in the fiber optic network, electronically generating design outputs by optimizing geographic locations of said nodes and said arcs in the fiber optic network using said fiber optic network design inputs and said existing infrastructure inputs, and electronically outputting the design outputs. |
| US09323865B2 |
Content alignment method and system
A method is provided for content alignment. The method includes obtaining a first content sequence and a second content sequence different from the first content sequence. The method also includes representing each of the first content sequence and the second content sequence in a hierarchical structure containing an ordered root element sequence and a sub-tree structure. The ordered root element sequence includes a plurality of root elements and each root element is associated with a sub-tree of elements. The method also includes determining a desired alignment between the first content sequence and the second content sequence using dynamic programming, and outputting results of the desired alignment between the first content sequence and the second content sequence. |
| US09323864B2 |
Method and apparatus for identifying the optimal schema to store graph data in a relational store
A system for identifying a schema for storing graph data includes a database containing a graph dataset of data and relationships between data pairs and a list of storage methods that each are a distinct structural arrangement of the data and relationships from the graph data set. An analyzer module collects statistics for the graph dataset, and a data classification module uses the collected statistics to calculate metrics describing the data and relationships in the graph dataset, uses the calculated metrics to group the data and relationships into a plurality of graph dataset subsets and. associates each graph dataset subset with one of the plurality of storage methods. The resulting group of storage methods associated with the plurality of graph dataset subsets includes a unique storage method for each graph dataset subset. The data and relationships in each graph dataset subset are arranged in accordance with associated storage methods. |
| US09323863B2 |
Highlighting of time series data on force directed graph
A force directed graph may display recent activities of a message passing system as highlighted features over a larger graph. The force directed graph may display a superset of nodes and edges representing processes and message routes, then display recent activities as highlighted elements within the larger superset. The highlighted elements may display messages passed or computation performed during a recent time element of a time series. In some embodiments, the effects of activities may be displayed by decaying the highlighted visual elements over time. |
| US09323861B2 |
Method and apparatus for enhanced web browsing
Methods and apparatus for searching the World Wide Web are disclosed. The method includes searching all the pages of at least one web site and then searching at least one search engine index for all the pages of at least one web site and determining if the pages are cached in the search engine index. A further embodiment provides for searching an index of a search engine, repeating the search after a specified period of time and then determining if any changes have been made to the web pages in the search engine index. |
| US09323857B2 |
System and method for providing content-related information based on digital watermark and fingerprint
In a method for providing content-related information based on a digital watermark and fingerprint, the method includes: receiving a request for content-related information from a client terminal; using a watermark and a fingerprint of content to retrieve the requested content-related information from a database; and transmitting the retrieved content-related information to the client terminal. |
| US09323855B2 |
Processing media items in location-based groups
Processing a plurality of media items that are associated with a respective plurality of locations includes: obtaining the plurality of media items; selecting a first media item that defines a first region on a map; determining a first set of media items that are located within the first region; selecting a second media item that defines a second region on the map, the second media item being selected among media items that are not located within the first region; determining a second set of media items that are located within the second region; and processing the first set of media items and the second set of media items as distinct groups. |
| US09323853B1 |
Customized web summaries and alerts based on custom search engines
The present invention provides systems and methods for generating alerts based on results received from one or more custom search engines. In an embodiment, the present invention generates alerts based on custom search engines by (1) receiving one or more alert specifications including a custom search engine identifier; (2) receiving at least one current result from the identified custom search engines; (3) determining one or more itemized alert elements based on the at least one current result; and (4) transmitting a signal representing the one or more itemized alert elements to a user via a communication network. |
| US09323852B2 |
Activity list filters for a financial and social management system
Embodiments of the invention comprise systems, computer program products, and methods for a financial and social management system that provides improved tracking and management related to how, where, when, and with whom a user enters into activities. The financial and social management system captures activity information and images from various sources of information, including but not limited to social networking accounts, e-receipts, contact lists, calendars, and the like, and associates the activity information and images with the activities. The financial and social management system may determine locations, social relationships, entities, categories, or the like from the various sources of information and tag the activities with location tags, social relationship tags, entity tags, category tags, or the like. The tags allow the user to easily filter the activities based on the location, social relationship, entity, category, or other activity information and display the activities and activity information in customized interfaces. |
| US09323850B1 |
Potential social recipient ranking for maximal viral content distribution
Methods and systems are disclosed for estimating a “viral score” for users in a social network, where the viral score estimates a potential contribution of a user to the virality of a content item (e.g., a webpage, a photo, a video clip, an audio clip, etc.) if the content item is shared with the user via the social network. In one embodiment, when a first user wishes to share a content item with one or more of his or her followers in the social network, a computer system determines a viral score for a second user who is a follower of the first user. The computer system then determines whether the second user is to be included in a list of potential recipients for the content item based on the second user's viral score, and presents the list to the first user. |
| US09323848B2 |
Search system using search subdomain and hints to subdomains in search query statements and sponsored results on a subdomain-by-subdomain basis
A method and apparatus for generating search results including searching by subdomain and providing sponsored results by subdomain is provided. A search system according to embodiments of the present invention analyzes search queries to determine if they are to be routed to subdomains and presents results include sponsored hits sponsored on a subdomain by subdomain basis. |
| US09323846B2 |
Method, system, and graphical user interface for alerting a computer user to new results for a prior search
A method, system, and graphical user interface for alerting a computer user to new results for a prior search are disclosed. One aspect of the invention involves a graphical user interface on a computer that includes a plurality of links recommended by a search engine for a computer user. The plurality of links are determined by the search engine by: producing search results by rerunning a plurality of search queries that have been performed previously for the computer user, and evaluating the produced search results to select search results that meet predefined search result selection criteria. At least one of the criteria is based on Internet usage data for the user. |
| US09323845B2 |
Portable communication terminal for extracting subjects of interest to the user, and a method therefor
A portable communication device for extracting a user interest comprises a term vector generation unit for generating, based on types of text data stored in the portable communication device, a term vector representing each text data, a subject classification tree storage unit for storing a subject classification tree, which is a tree structure in which multiple nodes, each including at least one training data and representing a subject, are connected to one another, and a similarity calculation unit for calculating a similarity between the term vector and the training data for each node in the subject classification tree. The similarity calculation unit extracts a node name representing the user interest from the subject classification tree based on the similarity. |
| US09323843B2 |
Method and system for performing bi-directional search
When a user enters a primary search query into a primary search query input area to perform a first search of the primary search query, disclosed is a method and system for automatically entering the primary search query into a secondary search query input area to perform a second search of the primary search query. When the user enters a secondary search query into the secondary search query input area to perform a first search of the secondary search query, the method and system automatically enters the secondary search query into the primary search query input area to perform a second search of the secondary search query. |
| US09323835B2 |
Cloud-based web content filtering
A method of filtering web content including maintaining a data store including a plurality of web content filtering rules. A filtering rules query is received from a client device via a network in response to the client device requesting web content. One or more web content filtering rules are transmitted to the client device via the network. |
| US09323834B2 |
Semantic and contextual searching of knowledge repositories
A system and an article of manufacture for semantic and contextual searching over a knowledge repository including creating a search query for each concept related to the target concept to form a search context, wherein the search query for each related concept comprises at least one word derived from a record of that concept previously authored in the project, running the search query on a search index of a knowledge repository to identify a record of the related concept for which the search query is created, and fetching the record of the target concept from the repository as a search result such that the fetched record of the target concept is linked in the knowledge repository to a record of the related concept returned as a result of running the search query on at least one record of the at least one related concept. |
| US09323828B2 |
Complex query handling
Processing a query for a database includes: receiving a portion of a query from a client device in a server implemented by at least one processor, the portion of the query comprising an incomplete component; determining that the incomplete component is one of multiple predefined types with the server; providing the incomplete component to an auto-complete function specific to the determined type of the incomplete component; receiving in the server a suggestion for completing the query from the auto-complete function, the suggestion being specific to the type of the incomplete component; and providing the suggestion from the server to the client device. |
| US09323822B2 |
Data backup method and device for mobile terminal
The present invention relates to a mobile terminal technology. The present invention discloses a data back method and device for a mobile terminal. Since the data backup method and device of the mobile terminal provided in the present invention encodes a data in the mobile terminal into UTF-8 and stores it in the xml file, it is quite convenient to back up the data in the mobile terminal to the xml file. It is also beneficial for a user to manage the data in the mobile terminal. The present invention provides convenience for the user, the operation is simple, and the backup is easy to be done. |
| US09323821B2 |
Network repository auto sync wireless handset
According to the invention, one embodiment of a method and program of synchronizing an end device with a data repository is disclosed. In another embodiment, a method for synchronizing data, both multimedia and non-multimedia, with a repository is provided. In an exemplary embodiment, a method for synchronizing data with multiple repositories is provided. In another embodiment a software program to implement said methods is provided. |
| US09323818B1 |
System and method to anonymize data transmitted to a destination computing device
A method and system for anonymizing data to be transmitted to a destination computing device is disclosed. An anonymization strategy module is executed on a computing device to store anonymization strategy for data anonymization in a data store. A logic configured to receive data from a user computer, to be stored in the destination computing device. An anonymization module is executed on the computing device to selectively anonymize data to be stored in the destination computing device, based on the anonymization strategy for the data to be stored. Anonymized data is transmitted to the destination computing device for storage, over a network. |
| US09323817B2 |
Distributed storage system with pluggable query processing
As part of a query-processing technique, in response to receiving queries for information stored in a distributed storage system and associated query-processing information identifying sets of predefined operations to perform on one or more databases in the distributed storage system, the distributed storage system accesses sets of predefined operations. Then, for the sets of predefined operations on the one or more databases, the distributed storage system uses one or more adaptors for multiple storage subsystems in the distributed storage system and one or more indexes corresponding to collections of information in the one or more databases. Moreover, the distributed storage system executes the sets of predefined operations on the multiple storage subsystems to obtain results for the queries. The sets of predefined operations may be defined by different users, so that the distributed storage system can be adapted to these users' needs. |
| US09323816B1 |
Extract, transform, and load application complexity management framework
Extract, transform, and load application (ETL) complexity management framework systems and methods are described herein. The present disclosure describes systems and methods that reduce the complexity in managing ETL flow and correcting errant data that is subsequently identified. One or more methods include defining an ETL job definition, defining a data asset definition, defining a data asset dependency definition, receiving an ETL flow to provide execution of one or more ETL flow steps, providing retrieval of data from a source data asset, applying a data control to the source asset data, and producing an ETL job registration, a data asset status, a latest asset available date, a data asset consumer identifier, and a target data asset based on at least one of the ETL job definition, the data asset definition, the data dependency definition, and the source asset data. |
| US09323812B2 |
Hybrid bifurcation of intersection nodes
A method of processing a set of intersection queries in a multi-dimensional data structure may include receiving the set of intersection queries for the multi-dimensional data structure. The method may also include determining whether to process each of the set the intersection queries individually, or whether to process the set of intersection queries together using pre-cached modifier mappings. The method may additionally include processing the set of intersection queries, and providing intersection values that correspond to the set of intersection queries. |
| US09323810B2 |
Curation selection for learning
A method of ranking curations includes receiving a query. The method also includes calculating, based on the query, a content similarity measurement for each of multiple curations. The method also includes extracting, from each of the curations, multiple curation-specific features. The method also includes calculating a curation credit measurement for each of the curations based on the extracted curation-specific features. The method also includes ranking each of the curations based on the corresponding content similarity measurement and the corresponding curation credit measurement. |
| US09323803B2 |
Collaborative filtering of a graph
Embodiments of the present invention provide for collaborative filtering during retrieval of a graph. In an embodiment of the invention, a method for collaborative filtering of a graph includes loading a data set from a repository of data and representing the data set in a graph of a plurality of arranged nodes and links therebetween. A primary node can be identified amongst the nodes of the graph a composite rating can be retrieved for different ones of the arranged nodes. In this regard, the composite rating for a corresponding one of the nodes can include an aggregation of different ratings previously applied to the corresponding one of the nodes by different end users. Finally, a subset of the arranged nodes can be selected based upon the identified primary node and a composite rating of one or more other nodes. |
| US09323802B2 |
Data profiling
Processing data includes profiling data from a data source, including reading the data from the data source, computing summary data characterizing the data while reading the data, and storing profile information that is based on the summary data. The data is then processed from the data source. This processing includes accessing the stored profile information and processing the data according to the accessed profile information. |
| US09323801B2 |
Statistical identification of instances during reconciliation process
A system for reconciling object for a configuration management databases employs statistical rules to reduce the amount of manual identification required by conventional reconciliation techniques. As users manually identify matches between source and target datasets, statistical rules are developed based on the criteria used for matching. Those statistical rules are then used for future matching. A threshold value is adjusted as the statistical rules are used, incrementing the threshold value when the rule successfully matches source and target objects. If the threshold value exceeds a predetermined acceptance value, the system may automatically accept a match made by a statistical rule. Otherwise, suggestions of possibly applicable rules may be presented to a user, who may use the suggested rules to match objects, causing adjustment of the threshold value associated with the suggested rules used. |
| US09323799B2 |
Mechanism to run OLTP workload on in-memory database under memory pressure
Techniques are provided for maintaining data persistently in one format, but making that data available to a database server in more than one format. For example, one of the formats in which the data is made available for query processing is based on the on-disk format, while another of the formats in which the data is made available for query processing is independent of the on-disk format. Data that is in the format that is independent of the disk format may be maintained exclusively in volatile memory to reduce the overhead associated with keeping the data in sync with the on-disk format copies of the data. |
| US09323797B2 |
System and method of penalty data compilation, analysis and report generation
The present invention relates generally to a system and method for reviewing and evaluating performance. In particular, the present invention relates to a system and method for reviewing and evaluating performances of an official or group of officials at an event or events. Even more specifically, according to embodiments of the present invention, the system and method can involve reviewing and evaluating a referee's performance during a football game or games. |
| US09323796B2 |
Data partitioning method and apparatus
A data partitioning method and apparatus. The method includes: determining tuple relationship information according to received mixed loads and structure information of a database; determining tuple split cost information according to the tuple relationship information and a feature about whether the mixed loads are executable in parallel; obtaining multiple partitioning schemes according to the tuple split cost information, and determining, from the partitioning schemes, a partitioning scheme with a minimum total cost value as an optimum partitioning scheme to perform partitioning processing on data stored in the database. In the data partitioning method and apparatus, optimum partitioning is performed on data associated with the mixed loads in a database, after partitioning, data has features of a transaction load and an analytical load in the mixed loads, thereby improving working performance of the database system oriented to the mixed loads. |
| US09323793B2 |
Control data driven modifications and generation of new schema during runtime operations
A computational device receives input data and control data, where the control data includes instructions to modify one or more operations performed during a runtime execution associated with the input data. The control data is processed to modify the one or more operations during the runtime execution associated of the input data. |
| US09323791B2 |
Apparatus and method for expanding a shared-nothing system
A computer readable storage medium includes executable instructions to evaluate an expanded shared-nothing data store configuration. A data redistribution schedule table with specified parameters is formed. Data is redistributed within the expanded shared-nothing data store in accordance with the data redistribution schedule table. |
| US09323784B2 |
Image search using text-based elements within the contents of images
A mobile device searches for electronic content. The mobile device captures an image from a rendered document, and searches for an electronic version of the image using characteristics of the image and using text within the contents of the image. The mobile device receives a result for the search based upon the image characteristics and the text within the context of the image. |
| US09323780B2 |
Locale-based sorting on mobile devices
Embodiments are directed to implementing locale-based sorting and to creating temporary metadata sorting values. In one scenario, a computer system sends a request for a contact list, where the request includes an indication of the user's locale. The contact list includes contact information for contacts of a specified user. The computer system receives the requested contact list, which includes various portions of appended, locale-specific sorting metadata for at least one of the user's contacts' fields. The computer system then sorts the contacts of the contact list according to the selected sorting criterion using the sorting metadata, where the sorting metadata includes a sorting order specific to the user's locale. After the contacts are sorted, the computer system presents the sorted contacts to the user in a user interface. |
| US09323778B2 |
Virtual disk utility
In particular embodiments, a method comprising, by one or more computing devices, installing an application on a portion of a physical disk system of a first platform, virtualizing the portion of the physical disk system into a virtual disk system, comprising, storing data in the portion of the physical disk system in a database of the virtual disk system, providing an interface to access the data stored in the database, and providing a plurality sets of drivers for a plurality of platforms, wherein each set of drivers supports native operations with respect to the portion of the physical disk system on a different one of the plurality of platforms, mounting the virtual disk system on a second platform, and executing the application on the second platform, wherein all operations in connection with executing the application are contained within the virtual disk system mounted on the second platform. |
| US09323770B1 |
Fingerprint merging after claim generation
A media item fingerprint consolidation system is described that merges fingerprints into a consolidated fingerprint. Fingerprints can be generated to compactly represent media items. Fingerprints of common media items can be merged to generate a consolidated fingerprint that compactly represents the common media items. The consolidated fingerprint can replace existing fingerprints. |
| US09323769B2 |
Positional relationships between groups of files
Methods and apparatus teach a digital spectrum of a file for use in determining positional relationships between groups of files. The digital spectrum is used to reveal distances between the files to sort into groups of related files. Representatively, files determined by a nearest neighbor method to be related are sorted into groups of related files. In turn, the groups of related files are determined to be related, or not, according to positional location in N-dimensional space. A centroid location for each group of related files is determined, and a distance value from that centroid location to each member file of the group of related files is determined. In turn, centroid-to-centroid distance values are determined between each group of related files and rank-ordered. Comparing the centroid-to-centroid distance values and the distance values between centroid locations and files of the groups of related files reveals relatedness, or not, of groups of files. |
| US09323767B2 |
Performance and scalability in an intelligent data operating layer system
Systems and methods that allow for an intelligence platform for distributed processing of big data sets including both structured and unstructured data types across two or more intelligent data operation engine servers. The intelligent data operation engine servers can form a conceptual understanding of content in each electronic file and then cooperates with a distributed index handler to index the conceptual understanding of the electronic file. A query pipeline and the distributed index handler in the intelligence platform cooperate with the two or more intelligent data operation engine servers to improve scalability and performance on the big data sets containing both structured and un-structured electronic files represented in the common index. |
| US09323765B1 |
Scalable cloud file system with efficient integrity checks
Example embodiments of the present invention provide authenticated file system that provides integrity and freshness of both data and metadata more efficiently than existing systems. The architecture of example embodiments of the present invention is natural to cloud settings involving a cloud service provider and enterprise-class tenants, thereby addressing key practical considerations, including garbage collection, multiple storage tiers, multi-layer caching, and checkpointing. Example embodiments of the present invention support a combination of strong integrity protection and practicality for large (e.g., petabyte-scale), high-throughput file systems. Further, example embodiments of the present invention support proofs of retrievability (PoRs) that let the cloud prove to the tenant efficiently at any time and for arbitrary workloads that the full file system (i.e., every bit) is intact, leveraging integrity-checking capabilities to achieve a property that previous PoRs lack, specifically efficiency in dynamic settings (i.e., for frequently changing data objects). |
| US09323764B2 |
Copying volumes between storage pools
Methods, apparatus and computer program products implement embodiments of the present invention that include defining a source data volume including a first multiple of source snapshots, and storing the first multiple of the source snapshots in a first storage pool including a second multiple of storage regions having respective identifiers. Upon receiving a request to copy the source data volume to a target data volume in a second storage pool, a first given source snapshot including a first set of the storage regions is accessed, and a second given source snapshot preceding the first given source snapshot is identified, the second given source snapshot including a second set of the storage regions. A set difference of the second and the first sets of the storage regions is identified, respective identifiers of the set difference are stored to the target volume, and a target snapshot is created for the target volume. |
| US09323761B2 |
Optimized query ordering for file path indexing in a content repository
Techniques for indexing file paths of items in a repository may include, for each type associated with instances that are not associated with file path indexes, starting with folder types prior to item types in a round robin sequence, attempting to associate the instances of the type with file path indexes. The repository may be queried for instances of a current type that are not associated with file path indexes and that are filed in a folder that is associated with a file path index. Responsive to the querying returning one or more instances of the current type, the one or more instances of the current type may be associated with the file path indexes. Responsive to the querying returning one or more instances of the current type, attempting to associate the instances of the same current type with file path indexes may be repeated. |
| US09323759B1 |
Multiprocess divided file system backup
A method of backing up data is disclosed. Information is collected from a file system corresponding to an initial backup set, wherein the initial backup set comprises a set of data configured to be backed up, and wherein the collected information comprises information regarding how the initial backup set is organized within the file system. Two or more subdivided backup sets are determined based at least in part on the collected information. The two or more subdivided backup sets are backed up. |
| US09323757B2 |
System and method for displaying, and operating multi-layers item list in web-browser with supporting of concurrent multi-users
The use of hierarchical list to represent and operate resource structure has been practiced by operating system, for example by Windows Explore of Microsoft Windows, for very long time. However, users are lack of Windows Explore like tools to work on resource structure, such as file system, across world wide web (“WWW”). Present invention has disclosed a technology of utilizing memory bound multi-layered hierarchical list to mirror an actual resource structure and presenting the multi-layered hierarchical list to a user across the Internet during a user session for the user through the multi-layered hierarchical list displayed on an end-user device to access and operate the resource structure. |
| US09323752B2 |
Display of slides associated with display categories
A method and system for displaying slides associated with display categories. Display categories are simultaneously displayed, each display category including display sets, each display set including a set of slides. A first row of buttons is displayed for a selected display category. Each button in the first row of buttons corresponds to a different display set in the selected display category such that each display set is represented by a different button in the first row of buttons. A second row of buttons is displayed simultaneous with the displayed first row of buttons. Each button in the second row of buttons corresponds to a different slide in the display set selected via selection of the first button in the first row of buttons. The slide corresponding to the selected second button is displayed simultaneous with the displayed first row of buttons and the displayed second row of buttons. |
| US09323745B2 |
Machine translation using global lexical selection and sentence reconstruction
Disclosed are systems, methods, and computer-readable media for performing translations from a source language to a target language. The method comprises receiving a source phrase, generating a target bag of words based on a global lexical selection of words that loosely couples the source words/phrases and target words/phrases, and reconstructing a target phrase or sentence by considering all permutations of words with a conditional probability greater than a threshold. |
| US09323744B2 |
Transliteration device, transliteration program, computer-readable recording medium on which transliteration program is recorded, and transliteration
A transliteration device (100) comprises a generation part (105) generating rewriting tables corresponding to K different languages and including multiple rewriting probabilities that an original segment can be rewritten as a transliterated segment for transliteration and transliteration tables corresponding to the K languages. The transliteration device (100) further comprises an update part (107) saving the transliteration probability that an original spelling string originating from a language corresponding to the used rewritten language is transliterated to a target spelling string in the transliteration able corresponding to the language, and so updating the K rewriting tables as to maximize the expected value of a likelihood function calculating the likelihood of the K transliteration tables. |
| US09323741B2 |
System and method for searching functions having symbols
A system and method for searching through functions and expressions with symbols. Moreover, the system can be used to recognize and further analyze the notations of this nature and use this in order to translate, transform into audio, or solve the mathematical problems. According to at least some embodiments, the functions comprise mathematic equations which are defined by symbols and mathematic notation. The system and method enable a user to enter a mathematical equation in a WYSIWYG environment to a search engine, and to find similar or identical equations, first and foremost according to theoretical similarity, and secondly, according to visual similarity. The engine does this be understanding the meaning behind the visual symbols of the equation using a Dynamic Hidden Markov Model (hereon DHMM). The system enables the user to insert the equation with no prior knowledge of LaTeX, or any computing language, and with no need to follow a predefined generic protocol in order to insert the query. |
| US09323732B2 |
Automatic website accessibility and compatibility
A method for an accessibility solution provided as a software. The method includes approving or implementing by a website owner of a code into his website and receiving web format by a user device by “scraping” the data from the website pages or by other means of using client side plugin, server side plugin, browser or 3rd party server side or mobile app. The method also includes analyzing the data over the user device or on the server side and clicking a button by the end-user and the original code and the content and code that were collected from the website are rewritten which can also be done automatically as a suggestion to the end user, and the end-user sees or can use a new format according to the updated standard. |
| US09323731B1 |
Data extraction using templates
Systems and techniques for extracting data from unstructured documents are described. One such method involves assigning one or more labels to one or more nodes in a first object model of a first web page; comparing a second object model of a second web page to the first object model; if the first object model matches the second object model to a determined degree, extracting from the second web page data associated with nodes in the second object model that match labeled nodes in the first object model; and providing the extracted data for storage in a structured database in a manner associated with the labels. |
| US09323728B2 |
Coordinating the management of the layout and design of portal pages with the management of its associated web content
A method, system and computer program product for coordinating the management of portal pages and its associated web content. A node is created in the portal database representing a draft of a portal page, where the node refers to a data structure that holds structured information pertaining to the portal content (e.g., portlet instances, layout, design). A shadow node associated with the portal page is created in the web content management system, where the web content of the portal page is associated with the shadow node. The shadow node refers to a data structure that stores information used to identify the portal page stored in the portal database. The portal page, after completing various tasks in the workflow process, is rendered by linking the web content of the portal page associated with its shadow node with the portal content of the portal page stored in the portal database. |
| US09323724B2 |
Webpage skin replacement method, apparatus, and mobile terminal
This invention provides a skin replacement method for a webpage content area displayed in a mobile terminal browser, including: parsing each element of webpage content received, determining whether a self-defined extension property exists in an element for indicating skin style information of the element. The self-defined extension property is predefined by a browser client and provided for a web server, and a value of the self-defined extension property represents index information of the skin style information of the element in a skin style library of the browser client; when the self-defined extension property exists, based on the index information, searching the skin style information corresponding to the index information in the skin style library; and rendering the element based on found skin style information. This method can directly and seamlessly integrate skin effect of the browser client into the webpage content displayed in the browser, providing better use experience. |
| US09323723B2 |
Reading ease of text on a device
One or more techniques and/or systems are disclosed for improving reading ease of text displayed by a device. Reading-related feedback, such as feedback that indicates user reading speed and/or user reading comprehension, can be received for a user of the device. One or more display-related characteristics, such as characteristics that indicate how text is displayed by the device, can be received for the device. Using the reading-related feedback and the one or more display-related characteristics, a reading model can be created that can indicate desired display parameters for displaying the text on the device. The desired display parameters indicated by the reading model may be used to improve reading ease of the text, displayed by the device, for the user. |
| US09323720B2 |
Automated and user customizable content retrieval from a collection of linked documents to a single target document
A user initiated unification command can be received from a user interface. The unification command can be associated with a selected portion of a fragmented document. The fragmented document can include more than one discrete documents interconnected by at least one reference. Each reference can be a linkage to content of a document other than the one containing the reference. The selected portion can be associated with one of the discrete documents referred to as a root document. Responsive to the unification command, content represented by the reference can be acquired from the associated discrete documents without presenting the discrete document within a user interface window. The acquired content can be added to the root document. |
| US09323718B2 |
Method and device for operating a driver assistance system of a vehicle
A method for operating a driver assistance system of a vehicle, includes providing and using data for making a decision as to whether or not the driver assistance system is to provide a driver assistance function, detecting a vehicle position when the driver assistance function is provided, and assigning the detected vehicle position to the used data to create a set of driver assistance system data. A device for operating a driver assistance system of a vehicle, as well as a vehicle system for a vehicle and a computer program are also described. |
| US09323716B2 |
Hierarchical reconfigurable computer architecture
A reconfigurable hierarchical computer architecture having N levels, where N is an integer value greater than one, wherein said N levels include a first level including a first computation block including a first data input, a first data output and a plurality of computing nodes interconnected by a first connecting mechanism, each computing node including an input port, a functional unit and an output port, the first connecting mechanism capable of connecting each output port to the input port of each other computing node; and a second level including a second computation block including a second data input, a second data output and a plurality of the first computation blocks interconnected by a second connecting means for selectively connecting the first data output of each of the first computation blocks and the second data input to each of the first data inputs and for selectively connecting each of the first data outputs to the second data output. |
| US09323710B2 |
Receiving infrared communications on a mobile device
A system and a method are disclosed for receiving an infrared signal on a mobile device. The mobile device receives an infrared signal by creating an intermediate bitstream based on the received infrared signal. The intermediate bitstream is trimmed, downsampled, and demodulated in the time domain. The intermediate bitstream is then converted into a raw infrared code. The received bitstream is processed in a software layer, enabling the mobile device to process infrared signals without the use of additional hardware configured on the mobile device. |
| US09323705B2 |
Input output control device, information processing system, and computer-readable recording medium having stored therein log collection program
An input output (IO) control device connects a plurality of devices with each other, and includes a plurality of ports to which the plurality of devices are connected and a control unit that controls the plurality of ports with each other, and the control unit collects a log of a the collection target port designated by a log collection instruction among the plurality of ports when the log collection instruction is received from any one of the plurality of devices through a first port to which the corresponding device is connected among the plurality of ports. |
| US09323704B2 |
Electronic device, its pairing process and pairing monitoring method
An electronic device and its pairing process and pairing monitoring process is provided, which, though relatively simple, can correctly judge if the electronic device connected to a host device and multiple sub-devices is a certified pair so that the replacement by an illegal sub-device can be detected. An electronic device that implements the process according to the command from the host device has a control unit. The control unit controls the electronic device and multiple sub-devices. The sub-devices have reference data memory sections that store reference data specific to the sub-devices. The control unit has a comparing section that refers to the reference data of each of the multiple sub-devices. |
| US09323703B2 |
Facilitating resource use in multicyle arbitration for single cycle data transfer
Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively. |
| US09323702B2 |
Increasing coverage of delays through arbitration logic
In the verification of an integrated circuit design having arbitration logic which controls access from a plurality of requesters to a shared resource, an arbitration stall simulation mechanism selects one or more of the requesters for an extended stall procedure, and when a global counter expires, applies stalls having controlled durations to the selected requesters. The controlled durations can be randomly generated time periods within a preset range. The number of requesters subjected to the extended stall procedure can be randomly selected based on a predetermined percentage of requesters to stall. Local (requester-specific) code can perform the stalls for respective requesters using a stall duration inputs. The requester-specific codes can carry out the stalls using application program interface calls to override respective arbiter inputs from the requesters. |
| US09323698B2 |
System and method for transmitting USB data over a DisplayPort transmission link
A data transmission system is provided. The data transmission system includes a source device having a source device controller and a register and a sink device having a sink device controller. The data transmission system also includes a transmission link coupling the source device and the sink device. The transmission link includes a unidirectional main line having a plurality of main link channels, a bidirectional auxiliary line configured to transmit data between the source device and the sink device at a first data rate, and a unidirectional interrupt line. The transmission link is configured to transmit data from the source device to the sink device over one of the main link lines at a second data rate and to transmit data from the sink device to the source device over the auxiliary line at the second data rate. The transmission link may comply with the DisplayPort standard, and the data may be transmitted in accordance with the USB standard. |
| US09323693B2 |
Zero-copy caching
Caching of an immutable buffer that has its data and address prevented from changing during the lifetime of the immutable buffer. A first computing entity maintains a cache of the immutable buffer and has a strong reference to the immutable buffer. So long as any entity has a strong reference to the immutable buffer, the immutable buffer is guaranteed to continue to exist for the duration of the strong reference. A second computing entity communicates with the first computing entity to obtain a strong reference to the immutable buffer and thereafter read data from the immutable buffer. Upon reading the data from the cache, the second computing entity demotes the strong reference to a weak reference to the immutable buffer. A weak reference to the immutable buffer does not guarantee that the immutable buffer will continue to exist for the duration of the weak reference. |
| US09323692B2 |
Managing translation of a same address across multiple contexts using a same entry in a translation lookaside buffer
In response to a current context, with a particular process currently in control of a processor requesting access to a shared address space, a translation lookaside buffer (TLB) controller sets a process identifier field in a virtual address to be looked up in a TLB to a clamped value different from an identifier for the process, wherein the virtual address comprises at least the process identifier field and an effective address field set to an address in the requested shared address space. In response to the TLB controller comparing the virtual address for the current context to a particular entry of at least one entry within the TLB comprising the at least one entry stored for a previous translation of a previous virtual address, the TLB controller only indicates a match between the process identifier field and a translation process identifier field within the particular entry of the TLB if the translation process identifier field is also set to the clamped value. |
| US09323689B2 |
I/O bandwidth reduction using storage-level common page information
I/O bandwidth reduction using storage-level common page information is implemented by a storage server. In response to receiving a request from a client for a page stored at a first virtual address, the storage server determines that the first virtual address maps to a page that is a duplicate of a page stored at a second virtual address. Or the storage server determines that the first and second virtual addresses map to a deduplicated page within a storage system. The storage server then transmits metadata to the client. The metadata maps the first virtual address to a second virtual address that also maps to the deduplicated page. |
| US09323685B2 |
Data storage space processing method and processing system, and data storage server
The present invention discloses a data storage space processing method and processing system, and a data storage server. The data storage space processing method includes: dividing a disk and memory resource into tablets; dividing memory space of a tablet into different logical objects; and dividing, according to a fixed size, disk space of the tablet into multiple data blocks that are of a same size. According to the data storage space processing system and method provided in embodiments of the present invention, a disk and memory resource on a storage server is divided into independent tablets, and the tablets are used as basic service resource allocating and managing units, which can implement multiplexing of a single-node resource on multiple services. Besides, by using hybrid indexing and associated write combining and block recycling technologies, random write IOPS of a system is improved, and index memory space can also be significantly saved. |
| US09323677B2 |
Method, apparatus and computer programs providing cluster-wide page management
A data processing system includes a plurality of virtual machines each having associated memory pages; a shared memory page cache that is accessible by each of the plurality of virtual machines; and a global hash map that is accessible by each of the plurality of virtual machines. The data processing system is configured such that, for a particular memory page stored in the shared memory page cache that is associated with two or more of the plurality of virtual machines, there is a single key stored in the global hash map that identifies at least a storage location in the shared memory page cache of the particular memory page. The system can be embodied at least partially in a cloud computing system. |
| US09323676B2 |
Non-data inclusive coherent (NIC) directory for cache
Embodiments relate to a non-data inclusive coherent (NIC) directory for a symmetric multiprocessor (SMP) of a computer. An aspect includes determining a first eviction entry of a highest-level cache in a multilevel caching structure of the first processor node of the SMP. Another aspect includes determining that the NIC directory is not full. Another aspect includes determining that the first eviction entry of the highest-level cache is owned by a lower-level cache in the multilevel caching structure. Another aspect includes, based on the NIC directory not being full and based on the first eviction entry of the highest-level cache being owned by the lower-level cache, installing an address of the first eviction entry of the highest-level cache in a first new entry in the NIC directory. Another aspect includes invalidating the first eviction entry in the highest-level cache. |
| US09323673B2 |
Hierarchical cache structure and handling thereof
A hierarchical cache structure comprises at least one higher level cache comprising a unified cache array for data and instructions and at least two lower level caches, each split in an instruction cache and a data cache. An instruction cache and a data cache of a split second level cache are connected to a third level cache; and an instruction cache of a split first level cache is connected to the instruction cache of the split second level cache, and a data cache of the split first level cache is connected to the instruction cache and the data cache of the split second level cache. |
| US09323672B2 |
Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory access overhead by supporting address calculation, data shuffling, and format conversion. |
| US09323669B1 |
System, apparatus, and method of initializing cache
A computer-executable method, system, and computer program product for managing a data storage system, wherein the data storage system includes a cache and a data storage array, the computer-executable method, system, and computer program product comprising receiving initialization information, analyzing the initialization information to determine which portions of the data storage array related to the initialization information, and managing the data storage system based on the determined portion of the data storage array. |
| US09323668B2 |
Deconfigure storage class memory command
An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory. |
| US09323667B2 |
System and method for managing trim operations in a flash memory system using mapping tables and block status tables
A method and system for managing a flash memory system facilitates the use of TRIM or similar operations so as to release physical memory space of logical block addresses (LBAs) that are declared to be deleted by a user file management system. A plurality of data structures corresponding to levels of indirection are used to manage the mapping between a user logical block address and the physical location of the data in the flash memory system and to respond to user read and write requests by determining the current status of the user logical block address in the frame of reference of the memory system. This process substantially decouples TRIM management from garbage collection and wear leveling operations. |
| US09323665B2 |
Circuit for generating a start sequence and method for generating a start sequence
The invention relates to a circuit and to a method for generating a start sequence. The circuit comprises at least one partially programmable memory (nonvol) for storing an encoded start sequence (Ni) and a control unit (CTRL), which is equipped to read the encoded start sequence (Ni) and decode it into a decoded start sequence (dNi) and to generate a target register address (n) depending on the decoded start sequence (dNi). An addressable memory (vol) is provided, to which the decoded start sequence (dNi) can be written by means of the control unit (CTRL) at the target register address (n). |
| US09323661B2 |
Memory system and control method thereof
A memory system has a storage unit having two or more parallel read/write processing elements and non-volatile data recording areas for a logical block divided into a plurality of logical pages, and a control unit that generates log information for each unit of data written into the recording areas, determines for each logical page a log information recording area from a group of recording areas of the logical page, and controls the parallel operation elements to write the log information generated for a logical page into the log information recording area of the logical page and the data of the logical page into the other recording areas of the group of recording areas of the logical page. |
| US09323657B1 |
Memory system and method for improving read latency of a high-priority partition
A memory system and method for improving read latency of a high-priority partition are provided. In one embodiment, a memory system receives a command to store data in the memory. The memory system determines if the command specified that the data is to be stored in a standard partition in the memory or in a high-priority partition in the memory. If the command specified that the data is to be stored in a standard partition in the memory, the memory system stores the data using a first write technique. If the command specified that the data is to be stored in a high-priority partition in the memory, the memory system stores the data using a second write technique, wherein the second write technique provides improved read latency of the stored data. Other embodiments are disclosed. |
| US09323656B2 |
Computer program installation across multiple memories
Embodiments herein are directed to a method for installing a program across multiple memories. The method includes calculating a memory space requirement of the program. It may be determined that a first available memory space in a first memory of the first computer system is smaller than the memory space requirement. The first memory is a default memory for installing the program. Upon determining that the first available memory space in the first memory is smaller than the memory space requirement, the method may perform the step of identifying a second memory in communication with the first computer system that has a second available memory space. The first and second available memory spaces, when combined, are sufficient for the memory space requirement to install files of the program. The files of the program may be installed in the first and second memories. |
| US09323652B2 |
Iterative bottleneck detector for executing applications
A bottleneck detector may use an iterative method to identify a bottleneck with specificity. An automated checkpoint inserter may place checkpoints in an application. When a bottleneck is detected in an area of an application, the first set of checkpoints may be removed and a new set of checkpoints may be placed in the area of the bottleneck. The process may iterate until a bottleneck may be identified with enough specificity to aid a developer or administrator of an application. In some cases, the process may identify a specific function or line of code where a bottleneck occurs. |
| US09323650B2 |
Methods for generating software test input data and devices thereof
A method, non-transitory computer readable medium, and apparatus that extracts a plurality of attributes from a software requirements specification wherein each attribute is associated with a data type and one or more properties. Constraint representation syntax is applied to the extracted attributes based on the data type and the one or more properties associated with each attribute to generate a plurality of constraints, wherein the constraint representation syntax is a machine readable format. Each of the plurality of constraints is output and optionally associated with one or more nodes of a specification requirements model. |
| US09323647B2 |
Request-based activation of debugging and tracing
Apparatus, systems, and methods for troubleshooting a software service are disclosed that operate to execute the software service on a computing platform to provide a software execution; receive a request at the software service, the request including a client session identifier; identify a troubleshooting point in the software execution based on the client session identifier; and perform a troubleshooting action when the troubleshooting point is detected during the software execution. Additional apparatus, systems, and methods are disclosed. |
| US09323644B1 |
Query-based software dependency analysis
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generated aggregated dependencies between software elements in a code base. One of the methods includes receiving a query that defines a dependency between the software elements in a project. Searching a database to identify matching source software elements having the one or more source attributes and target software elements having the one or more target attributes of the query. Identifying pairs of matching source software elements and matching target software elements having the specified relationship, and generating, for each pair of matching source software elements and matching target software elements having the specified relationship, a new dependency in a raw dependency graph, the new dependency being a dependency from a source software element of the pair to the target software element of the pair. |
| US09323640B2 |
Method and system for measuring the performance of a computer system on a per logical partition basis
Disclosed are a method and system for measuring the performance of individual logical partitions of a logically partitioned computer system. Preferably, the method and system both hardware and firmware to allow measurement samples to be collected only for user specified zones of interest. In one embodiment, the method comprises the steps of specifying a Zone or Zones of interest (a Zone being a logical partition), collecting measurement samples only from the one or more specified Zones of interest, and measuring the performance of each of these Zones using only the measurement samples collected from said each of the Zones. |
| US09323638B2 |
Apparatuses, methods and systems for determining a virtual machine state based on CPU registers
The CPU REGISTER ASSISTED VIRTUAL MACHINE SCREENSHOT CAPTURE TIMING APPARATUSES, METHODS AND SYSTEMS (“CRV”) transforms register retrieval requests, via CRV components, into boot success messages and screenshot capture command invocation outputs. A method comprises determining when to capture a screenshot of a virtual machine's display output by observing the values of a virtual CPU's registers, or the entropy of the virtual CPU's register values, obtained from a hypervisor in communication with the virtual machine's virtual CPU. The method further comprises determining when the virtual machine is at a boot success state and capturing a screenshot of the virtual machine display output. |
| US09323636B2 |
Proactive failure handling in network nodes
Embodiments are directed to predicting the health of a computer node using health report data and to proactively handling failures in computer network nodes. In an embodiment, a computer system monitors various health indicators for multiple nodes in a computer network. The computer system accesses stored health indicators that provide a health history for the computer network nodes. The computer system then generates a health status based on the monitored health factors and the health history. The generated health status indicates the likelihood that the node will be healthy within a specified future time period. The computer system then leverages the generated health status to handle current or predicted failures. The computer system also presents the generated health status to a user or other entity. |
| US09323629B2 |
Method for managing path failures of OSEK networks
Disclosed herein is a method of managing the path of an OSEK network. The method of managing the path of an OSEK network includes step S1 at which a message is transferred along nodes of the OSEK network; step S2 at which a failed node at which a network failure has occurred is detected while the message is being transferred at step S1; step S3 at which the failed node of step S2 is eliminated from the overall network; and step S4 at which the message is transferred from a source node that has transferred the message to the failed node of step S2 to a target node to which the failed node will transfer the message by connecting the source node with the target node. |
| US09323628B2 |
Instance level server application monitoring, load balancing, and resource allocation
A system and methodology to monitor system resources for a cluster computer environment and/or an application instance allows user to defined failover policies that take appropriate corrective actions when a predefined threshold is met. An engine comprising failover policies and mechanisms to define resource monitoring, consumption, allocation, and one or more thresholds for a computer server environment to identify capable servers and thereafter automatically transition an application between multiple servers so as to ensure the application is continually operating within the defined metrics. |
| US09323627B1 |
System, method, and apparatus for detecting fault conditions experienced by remote physical ports
A computer-implemented method for detecting fault conditions experienced by remote physical ports may include (1) identifying a network connection between a first physical port operating in a first communication mode and a second physical port operating in a second communication mode, (2) monitoring at least one count that identifies the number of block-sized transmission errors encountered by the first physical port, (3) determining that the second physical port has experienced a fault condition based at least in part on the count that identifies the number of block-sized transmission errors encountered by the first physical port and then, in response to determining that the second physical port has experienced the fault condition, (4) deactivating the network connection to avoid dropping network traffic directed to the network connection. Various other systems, methods, and apparatuses are also disclosed. |
| US09323625B2 |
Systems and methods for lost synchronization data set reprocessing
Systems and method relating generally to data processing, and more particularly to systems and methods for segmenting a data set and recovering the segmented data set. In one particular example, a method is disclosed that includes: querying an input data set for an actual sync mark; forcing a proxy sync mark where the actual sync mark is not found in the input data set; applying data processing to the input data set to yield a processed output; correlating a potion of the processed output with a corresponding portion of the input data set to yield a true sync location; calculating a difference between the true sync location and the location of the forced sync mark to yield an offset; re-forcing the proxy sync mark based upon the offset; and re-applying the data processing to the input data set aligned using the re-forced proxy sync mark to yield a re-processed output. |
| US09323623B1 |
Method and system for providing coordinated checkpointing to a group of independent computer applications
A method and system of checkpointing single process application groups and multi-process application groups. In an exemplary embodiment, the method may include creating at least one full checkpoint for each application in an application group, and creating at least one incremental application checkpoint for each application in the application group. Further, each of the at least one incremental application checkpoint may be automatically merged against a corresponding full application checkpoint. Further, checkpointing may be synchronized across all applications in the application group. In the exemplary embodiment, each application may use both fork( ) and exec( ) in any combination. |
| US09323622B2 |
Progress recording method and recovering method for encoding operation on storage device
A recovering method is adapted to an encoding operation performed on a storage area of a storage device. The recovering method includes: reading a variable set, wherein the encoding operation comprises a plurality of sub-operations, and each of the sub-operations is corresponding to at least one flag variable in the variable set; determining whether any one of the sub-operations is interrupted according to the variable set; when one of the sub-operations is interrupted, recovering the sub-operation according to the at least one flag variable corresponding to the sub-operation; and carrying on the encoding operation according to a process recorded by the flag variables in the variable set. |
| US09323613B2 |
Parity scheme for a data storage device
A data storage device includes a non-volatile memory. The non-volatile memory may include a first word line, a second word line, and a third word line. The second word line may be between the first word line and the third word line. The non-volatile memory may further include a first string and a second string. The first string may be adjacent to the second string. The data storage device may further include circuitry configured to store parity information at a fourth word line of the non-volatile memory. The parity information may correspond to a combination of first data associated with the first word line and the first string, second data associated with the first word line and the second string, third data associated with the third word line and the first string, and fourth data associated with the third word line and the second string. |
| US09323611B2 |
Systems and methods for multi-stage soft input decoding
Systems and methods are provided for decoding data. A first decoder attempts to decode the data based on a hard decision input for a symbol. When the attempt to decode the data based on the hard decision input fails, a request is transmitted reliability information for the symbol. Receiving circuitry receives the reliability information for the symbol, and a second decoder decodes the data based on the reliability information. |
| US09323609B2 |
Data storage and variable length error correction information
A corresponding portion of storage (such as one or more storage cells) is assigned one of multiple different error correction modes depending on a respective ability of the corresponding portion of storage cells to store data without error. Groups of storage cells that are less prone to failures (i.e., loss of data) are assigned a first error correction mode in which a first length error correction code is used to generate error correction information for a given sized segment of data. Groups of storage cells that are more prone to failures are assigned a second error correction mode in which a second length error correction code is used to generate error correction information for the given sized segment of data. |
| US09323605B2 |
Measured value transmitting device
A measured value transmitting device for serially transmitting data in accordance with the SSI method, includes a slave providing the data bits of a measured value detected by a sensor for serial bit-by-bit transmission to a master. The master requests a measured value from the slave with a clock burst having multiple clock cycles matching the number of data bits to be transmitted. In a first device, the clock cycles have a specified duty cycle corresponding to the ratio of the pulse duration to the period duration of one clock cycle, and the master contains a comparator. The master reads the clock bursts outputted on the clock line and checks the duty cycle in the comparator to determine whether an upper and/or lower threshold has been exceeded. In a second device a corresponding check of the duty cycle is carried out in the slave. |
| US09323604B2 |
Signature update by code transformation
Embodiments described herein provide an apparatus, computer readable digital storage medium and method for producing an instruction sequence for a computation unit which can be controlled by a program which includes at least the instruction sequence. |
| US09323602B2 |
Error correction with extended CAM
A memory system includes a memory and a content addressable memory (CAM). The memory includes a plurality of address locations, wherein each address location configured to store data and one or more error correction bits corresponding to the data. The CAM includes a plurality of entries, wherein each entry configured to store an address value of an address location of the memory and one or more extended error correction bits corresponding to the data stored at the address location of the memory. |
| US09323599B1 |
Time series metric data modeling and prediction
A system that utilizes a plurality of time series of metric data to more accurately detect anomalies and model and predict metric values. Streams of time series metric data are processed to generate a set of independent metrics. In some instances, the present system may automatically analyze thousands of real-time streams. Advanced machine learning and statistical techniques are used to automatically find anomalies and outliers from the independent metrics by learning latent and hidden patterns in the metrics. The trends of each metric may also be analyzed and the trends for each characteristic may be learned. The system can automatically detect latent and hidden patterns of metrics including weekly, daily, holiday and other application specific patterns. Anomaly detection is important to maintaining system health and predicted values are important for customers to monitor and make planning and decisions in a principled and quantitative way. |
| US09323598B2 |
Bug clearing house
A computer-implemented system for managing software problem reports includes a registration sub-system to register software developers from multiple different developer organizations; an application store that makes a plurality of applications from a plurality of application developers available for acquisition by members of the public; an application bug tracker programmed to receive reports of problems with applications distributed using the application store, to receive data regarding the problems, and to associate the data with a particular application or developer of the particular application; and a report generator to produce one or more problem reports for a developer that has provided one or more applications, the problem reports including information about the data regarding the problems relating to particular applications submitted to the application store by the developer. |
| US09323595B2 |
Microcontroller, control device and determination method
A microcontroller includes a central processing unit, a PWM signal generation unit which generates a PWM signal according to a generation condition of a PWM signal set by the central processing unit, and a diagnostic unit which inputs the generated PWM signal therein and detects a pulse period and a pulse width, based on the input signal and which determines whether the detected pulse period and pulse width respectively coincide with a pulse period and a pulse width corresponding to the generation condition. |
| US09323593B2 |
Method and device for saving running log of an operating system during a soft reset
Embodiments of the present application disclose a method for saving a running log, including: when a running exception occurs in an operating system, configuring that a random access memory adapted to record a running log of the operating system works in a self-refresh mode; performing reset on an application processor of the operating system and keeping a power management unit working normally, where the power management unit is adapted to manage power of the application processor and the random access memory; acquiring the running log of the operating system from the random access memory and saving the running log of the operating system, after reset of the application processor is completed. The embodiments of the present application further disclose a device. By adopting the present application, it can be ensured that a log is saved completely during a preset process of the system. |
| US09323592B2 |
Ensuring thread affinity for interprocess communication in a managed code environment
A remote procedure call channel for interprocess communication in a managed code environment ensures thread-affinity on both sides of an interprocess communication. Using the channel, calls from a first process to a second process are guaranteed to run on a same thread in a target process. Furthermore, calls from the second process back to the first process will also always execute on the same thread. An interprocess communication manager that allows thread affinity and reentrancy is able to correctly keep track of the logical thread of execution so calls are not blocked in unmanaged hosts. Furthermore, both unmanaged and managed hosts are able to make use of transparent remote call functionality provided by an interprocess communication manager for the managed code environment. |
| US09323591B2 |
Listening for externally initiated requests
Processing a request from a sending computer that is a co-member of a message group of a sysplex coupled together using a signaling service includes the steps of: determining, by a receiving computer, that a signaling service message has been received from the sending computer, wherein the signaling service message relates to a data transfer between the sending computer and the receiving computer and wherein the data transfer relates to an exchange of one or more files between the sending and receiving computers using a communications channel other than the signaling service. This processing also includes decoding, by the receiving computer, a control block data structure associated with the signaling service message to determine contents of the control block data structure; and performing, by the receiving computer, an action related to the data transfer based on the contents of the control block data structure associated with the signaling service message. |
| US09323589B2 |
Self registration of event—consumers/producers and auto discovery
Systems, methods, and other embodiments associated with automatic registration and discovery of services in a network using a platform independent interface are described. In one embodiment, a method includes receiving a request from an event producer on the network to add an entry to a registration table. The example method may also include broadcasting a message to devices on the network to announce the presence of the event producer. |
| US09323582B2 |
Node to node collaboration
Implementations of node to node collaboration are described. In one technique described herein, one or more secondary nodes coupled to a primary node are identified. In one possible implementation, the secondary nodes are coupled to the primary node via a peer to peer network. Resources associated with the one or more secondary nodes can be shared with the primary node to improve a performance of an oilfield services application being run at the primary node. |
| US09323581B1 |
Space inheritance
A method, article of manufacture, and apparatus for managing a cloud computing environment. In some embodiments, this includes partitioning resources to create a space, determining a parent space, inheriting properties of the parent space, and storing the space in a storage device. In some embodiments, a precedence may be designated to resources of the created space, and may override properties of the parent. |
| US09323576B2 |
Removal of idle time in virtual machine operation
A computer system for providing virtualization services may execute computer programs by a virtual processor in a virtual machine. The computer programs may be executed as tasks scheduled for execution at respective points in an apparent time tracked by an apparent-time reference. During execution of the computer programs, the computer system may detect a current point in apparent time at which all tasks scheduled for repeated execution at a given frequency have been executed, or at which the virtual processor is idle. And in response, the computer system may advance the apparent time to a subsequent point with a frequency greater than that with which the apparent time is tracked by the apparent-time reference. |
| US09323572B2 |
Autoconfiguration of a cloud instance based on contextual parameters
An embodiment of the invention provides a method and system for autoconfiguring a cloud instance based on contextual parameters. More specifically, an interface receives a request for a resource from a user; and, an analysis module connected to the interface examines parameters of the resource. The parameters of the resource include an encryption parameter and a language parameter. The analysis module also examines properties of the request, including a location of the user, at least one rule at the location of the user, and a dominant language at the location of the user. A processor connected to the analysis module determines whether the encryption parameter of the resource violates the rule at the location of the user. An instance generator connected to the processor creates a customized instance of the resource when the encryption parameter of the resource violates the rule at the location of the user. |
| US09323568B2 |
Indicating a low priority transaction
Accessing at least one memory location by one of a plurality of transactions in a multi-processor transactional execution environment is provided. Included is assigning, by a computer system, a conflict priority to a transaction; based on encountering a conflict with another process for a memory location, comparing, by the computer system, the assigned conflict priority of the transaction with another priority of the another process; and based on the conflict priority of the transaction being the higher priority continuing the transaction; and based on the conflict priority of the transaction being the lower priority, aborting the transaction. |
| US09323567B2 |
Overcommitting virtual machine hosts
A host-side overcommit value is set upon a physical node that implements virtual machines (VM Node). The overcommit value is determined by receiving a selected enablement template that includes a selected computing capacity and a selected overcommit value. A user-side normalization factor is determined that normalizes the selected computing capacity against a reference data handling system. A comparable computing capacity of the VM Node is determined. A host-side normalization factor is determined that normalizes the comparable computing capacity against the reference data handling system. The host-side overcommit value is determined from the selected overcommit value, the user-side normalization factor, and the host-side normalization factor. The host-side overcommit value may indicate the degree the comparable computing capacity is overcommitted to virtual machines deployed upon heterogeneous VM Nodes as normalized against the reference system. |
| US09323566B2 |
Virtual computer system for restoring network connection of live-migrated virtual computer
The network connection of a VM (target VM) that has been live-migrated from a first physical computer to a second physical computer is restored in a virtual computer system in which communication is performed using a certain type of information outside the jurisdiction of a virtualization mechanism. When receiving a packet from the VM, the first virtualization mechanism of the first physical computer extracts a certain type of information from the packet and registers the extracted certain type of information in a first management information unit. The first virtualization mechanism transmits the certain type of information in the first management information unit to the second virtualization mechanism of the second physical computer during live migration. The second virtualization mechanism registers the certain type of information in a second management information unit and transmits a certain type of packet including the certain type of information from at least one of one or more physical I/O devices of the second physical computer in order to restore the network connection of the target VM. |
| US09323562B2 |
Providing seamless copy-paste operations in a virtual machine environment
A hypervisor running on a host computer system receives data that was requested to be copied on a client device using one of a plurality of copy operations supported by the client device. The hypervisor transfers the data and an identifier of a copy operation used on the client device to a virtual machine hosted by the host computer system to allow a user to paste the data in the virtual machine via a paste operation that corresponds to the copy operation used on the client device. |
| US09323558B2 |
Method and system for the protected storage of downloaded media content via a virtualized platform
A method and system for the protected storage of downloaded media content via a virtualized platform. A method comprises downloading content to a special purpose virtual machine and then storing the downloaded content at a location, where the location is only accessible via the special purpose virtual machine. The stored content is then streamed over a virtual network to a general purpose virtual machine, where the special purpose virtual machine and the general purpose virtual machine exist on the same personal computer (PC). |
| US09323557B2 |
Determining performance states of parent components in a virtual-machine environment based on performance states of related child components during a time period
Techniques promote monitoring of hypervisor systems by presenting dynamic representations of hypervisor architectures that include performance indicators. A reviewer can interact with the representation to progressively view select lower-level performance indicators. Higher level performance indicators can be determined based on lower level state assessments. A reviewer can also view historical performance metrics and indicators, which can aid in understanding which configuration changes or system usages may have led to sub-optimal performance. |
| US09323556B2 |
Programmatic event detection and message generation for requests to execute program code
A service manages a plurality of virtual machine instances for low latency execution of user codes. The service can provide the capability to execute user code in response to events triggered on an auxillary service to provide implicit and automatic rate matching and scaling between events being triggered on the auxiliary service and the corresponding execution of user code on various virtual machine instances. An auxiliary service may be configured as an event triggering service to detect events and generate event messages for execution of the user codes. The service can request, receive, or poll for event messages directly from the auxiliary service or via an intermediary message service. Event messages can be rapidly converted to requests to execute user code on the service. The time from processing the event message to initiating a request to begin code execution is less than a predetermined duration, for example, 100 ms. |
| US09323552B1 |
Secure virtual machine memory allocation management via dedicated memory pools
Embodiments are disclosed for recycling memory from a memory pool dedicated to a virtual machine instance. For example, memory sub-pools can be pre-allocated to respective virtual machine instances. Memory scrubbing can be ordinarily performed to avoid data leakage between different customers. However, scrubbing can be inhibited when a given virtual machine reclaims memory previously released to the dedicated pool because the memory remains dedicated to the instance. Further features, such as partition and merge of sub-pools can be supported. Control of the features can be accomplished via API calls as part of a web service. |
| US09323548B2 |
Method and system for pseudo-virtualization of application running environment on a host server
A method and system for running multiple instances of a computer application into a virtual environment on a host server, and more specifically for running multiple instances of an operating system such as a mobile devices operating system, on the internet cloud. The method includes launching a global service manager, and having this service manager querying a binder driver which handles interprocess communications, so that the global service manager becomes a binder context manager for managing the running of multiple instances of the computer application into a virtual running environment. The method also includes launching, when launching any instance of the application after launch of the global service manager, a local service manager for handling service management for the instance of the application into a pseudo-virtual environment, the local service manager being registered by the binder context manager as local service manager for the instance of the application. |
| US09323547B2 |
Virtual machine and/or multi-level scheduling support on systems with asymmetric processor cores
Different processor cores in a computing device can support different features. In one or more embodiments, the features supported by each of multiple physical processor cores of a computing device are identified. A set of one or more features of the multiple physical processor cores to make available to virtual processor cores of the virtual machine are determined based at least in part on both the one or more features supported by each of the multiple physical processor cores and a number of virtual processor cores of the virtual machine. In additional embodiments, a multi-level scheduling model is used. An operating system level scheduler of an operating system schedules multiple applications for execution on multiple processor cores, and a user level scheduler of an application schedules application threads of that application for execution on one or more of the multiple processor cores. |
| US09323544B2 |
Dynamic reconfiguration of queue pairs
Dynamic reconfiguration of queue pairs in a data processing system is provided. A device driver determines whether a dynamic CPU reconfiguration has added one or more CPUs to the data processing system, wherein the data processing system comprises a number of CPUs and a number of queue pairs. Responsive to the dynamic CPU configuration adding one or more CPUs, the device driver allocates a portion of a memory corresponding to a queue pair, wherein each queue pair comprises a receive queue and a transmit queue, programs a receive side scaling mechanism in a network adapter to allow for dynamic insertion of a processing engine associated with the queue pair, and enables transmit tuple hashing to the queue pair. |
| US09323543B2 |
Capability based device driver framework
Enforcing limitations on hardware drivers. The method includes from a system kernel, assigning I/O resources to the system's root bus. From the root bus, the method further includes assigning a subset of the I/O resources to a device bus. Assigning a subset of the I/O resources to a device bus includes limiting the device bus to only be able to assign I/O resources that are assigned to it by the root bus. From the device bus, the method includes assigning I/O resources to a device through a device interface. |
| US09323540B2 |
Task execution determinism improvement for an event-driven processor
Embodiments of a method for operating an event-driven processor and an event-driven processor are described. In one embodiment, a method for operating an event-driven processor involves configuring a heartbeat timer of the event-driven processor and handling an event using the event-driven processor based on the heartbeat timer. Using a heartbeat timer built into the event-driven processor, the task execution determinism of the event-driven processor is improved and the power consumption of the event-driven processor is reduced. Other embodiments are also described. |
| US09323539B2 |
Constructing persistent file system from scattered persistent regions
Methods and apparatus related to constructing a persistent file system from scattered persistent regions are described. In one embodiment, stored information in a storage unit corresponds to one or more persistent memory regions that are scattered amongst one or more non-volatile memory devices. The one or more persistent memory regions are byte addressable. Also, the one or more persistent memory regions are used to form a virtual contiguous region. Other embodiments are also disclosed and claimed. |
| US09323534B2 |
Method and apparatus for detecting a collision between multiple threads of execution for accessing a memory array
A method includes determining, for a first thread of execution, a first speculative decoded operands signal and determining, for a second thread of execution, a second speculative decoded operands signal. The method further includes determining, for the first thread of execution, a first constant and determining, for the second thread of execution, a second constant. The method further compares the first speculative decoded operands signal to the second speculative decoded operands signal and uses the first and second constant to detect a wordline collision for accessing the memory array. |
| US09323532B2 |
Predicting register pairs
Embodiments relate to reducing a number of read ports for register pairs. An aspect includes executing an instruction. The instruction identifies a pair of registers as containing a wide operand which spans the pair of registers. The executing of the instruction includes determining whether a pairing indicator associated with the pair of registers has a first value, a second value or a third value. Based on the pairing indicator having the first value, the wide operand is read from the wide register. Based on the pairing indicator having the second value the wide operand is read from the pair of registers. Based on the pairing indicator having the third value, the wide operand is speculatively read from a predetermined register. The predetermined register consists of the wide register or the pair of registers. |
| US09323529B2 |
Reducing register read ports for register pairs
Embodiments relate to reducing a number of read ports for register pairs. An aspect includes executing an instruction. The instruction identifies a pair of registers as containing a wide operand which spans the pair of registers. It is determined if a pairing indicator associated with the pair of registers has a first value or a second value. The first value indicates that the wide operand is stored in a wide register, and the second value indicates that the wide operand is not stored in the wide register. Based on the pairing indicator having the first value, the wide operand is read from the wide register. Based on the pairing indicator having the second value, the wide operand is read from the pair of registers. An operation is performed using the wide operand. |
| US09323528B2 |
Method, apparatus, system creating, executing and terminating mini-threads
Described herein are mechanisms for creating, executing, and terminating mini-threads. A processor executes instructions with a primary thread in a first execution mode, and to execute an instruction to create a secondary mini-thread that is associated with a first subset of registers and associates the primary thread with a second subset of the registers during a second execution mode. During the second execution mode, the primary thread operates as a primary mini-thread. |
| US09323527B2 |
Performance of emerging applications in a virtualized environment using transient instruction streams
A method, system and computer-usable medium are disclosed for managing transient instruction streams. Transient flags are defined in Branch-and-Link (BRL) instructions that are known to be infrequently executed. A bit is likewise set in a Special Purpose Register (SPR) of the hardware (e.g., a core) that is executing an instruction request thread. Subsequent fetches or prefetches in the request thread are treated as transient and are not written to lower-level caches. If an instruction is non-transient, and if a lower-level cache is non-inclusive of the L1 instruction cache, a fetch or prefetch miss that is obtained from memory may be written in both the L1 and the lower-level cache. If it is not inclusive, a cast-out from the L1 instruction cache may be written in the lower-level cache. |
| US09323525B2 |
Monitoring vector lane duty cycle for dynamic optimization
In an embodiment, a processor includes a vector execution unit having a plurality of lanes to execute operations on vector operands, a performance monitor coupled to the vector execution unit to maintain information regarding an activity level of the lanes, and a control logic coupled to the performance monitor to control power consumption of the vector execution unit based at least in part on the activity level of at least some of the lanes. Other embodiments are described and claimed. |
| US09323524B2 |
Shift instruction with per-element shift counts and full-width sources
Techniques for packing and unpacking data from a source register using a particular shift instruction are provided. The shift instructions takes, as input, a source register that contains a plurality of elements and a shift count register that contains a plurality of shift counts. Each shift count indicates how much to shift bits from the source registers. Where “source” bits are shifted (or copied) to in an output register depends on the position of the shift count in the shift count register. The shift counts may correspond to one or more bytes from the source register. The shift instruction may initiate a left shift operation or a right shift operation. |
| US09323515B1 |
Network with broker for device management
A network having a device management server to execute Sync ML device management (DM) commands and manage associated mobile devices. The network may employ a broker to execute bundles comprising device management and provisioning activities, provisioning parameters etc. The broker may determine the sequence in which these device management and provisioning activities are executed and may employ the device management server to conduct the DM operations to interact with the associated mobile devices. |
| US09323512B2 |
Tools and methods for copying applications
Various embodiments herein include at least one of systems, methods, and software to export and import an application. Some embodiments include a user selecting a source system and a target system, and automatically exporting an application from a source system and automated import of this export to the target system. Exporting an application can include testing whether a software export tool version is compatible with a software import tool version, and installing a compatible software import tool on the target system. Some embodiments include informing the user that the application has been successfully imported. |
| US09323510B2 |
Allocating optimized resources for components based on derived component profiles
Systems, methods and techniques relating to publishing mobile applications are described. A described technique includes identifying, at a second component container contained in a first component container, a first component container profile associated with the first component container, translating at least a portion of the first component container profile to a second component container profile associated with the second component container, and initializing the second component container based, at least in part, on the second component container profile. |
| US09323509B2 |
Method and system for automated process distribution
A method for automated process distribution includes selecting a process definition; identifying a first process portion and at least one second process portion in the process definition; generating a first further process definition for the first process portion; generating a second further process definition for each the second process portion; generating a corresponding service definition for each the second further process definition. In the method, generating the first further process definition includes generating a process definition element configured to invoke at least one service of the service definitions, and generating the second further process definition includes generating a process definition element configured to offer a service of the service definition corresponding to that second further process definition. |
| US09323507B2 |
Optimization apparatus, optimization method and optimization program
An optimization apparatus includes an insertion unit inserting a method test for each of the virtual methods included in a code sequence, an acquisition unit acquiring one or more profiled run-time classes of a receiver object used for calling each of the virtual methods at execution of the code sequence into which the method tests have been inserted, and an optimization unit inserting, in place of the inserted method test, a class test that sets a recording-time class and the run-time class of a corresponding receiver object as classes to be permitted on condition that the run-time class of the corresponding receiver object has successfully called all virtual methods requesting the method test for the receiver object. |
| US09323500B2 |
Reducing power consumption in a fused multiply-add (FMA) unit responsive to input data values
In an embodiment, a fused multiply-add (FMA) circuit is configured to receive a plurality of input data values to perform an FMA instruction on the input data values. The circuit includes a multiplier unit and an adder unit coupled to an output of the multiplier unit, and a control logic to receive the input data values and to reduce switching activity and thus reduce power consumption of one or more components of the circuit based on a value of one or more of the input data values. Other embodiments are described and claimed. |
| US09323498B2 |
Multiplier circuit with dynamic energy consumption adjustment
A fixed point multiplier that can be used in mobile computer systems operating under limited power constraints provides a trade-off between computational accuracy and energy consumption that may be changed dynamically for energy conservation purposes. In one embodiment, the multiplier pre-stores multiplication shift coefficients to eliminate leading-one circuitry normally used in shift and accumulate multipliers. |
| US09323497B2 |
Executing perform floating point operation instructions
A perform floating-point operation instruction is executed specifying a Test (T) bit of general register 0, if the T bit is ‘1’ the execution sets a condition code value indicating whether a specified conversion function is installed, if the T bit is ‘0’ the execution stores a result of a specified floating-point conversion function in general register 0 and sets a condition code value. |
| US09323492B2 |
Systems and methods for enhanced printing of online content
Methods disclosed permit the printing of online content in a manner that optimally uses printer capability. A method for printing web page content can comprise: receiving a print request for a first print data associated with the web page at a printer, wherein the print request includes the web-page URL; generating a request for a second print data, wherein the request for the second print data is based on the web-page URL, and the second print data is associated with the first print data; and printing according to the second print data received in response to the request. For example, for online maps, the first print data can be low resolution map data while the second print data can be higher resolution map data. For online images, the first print data can be RGB image data while the second print data can be CMYK image data. |
| US09323490B2 |
Image processing apparatus and image processing method
An image processing device that displays a printed material, includes a first calculator configured to calculate display data based on: original data of an image printed on a sheet of paper; first data indicating diffuse reflection of the sheet; second data used for giving regular reflection texture of the sheet to a display image for displaying texture of the printed material; and third data used for giving regular reflection texture of the image to the display image for displaying the texture of the printed material. |
| US09323489B2 |
Method and device for conversion of a production plant for the post print processing
A method and device for the conversion of a production plant for the post print processing, which production plant includes several post print processing machines and a plant central control unit. The method and device may be used for successively processing different production orders for turning partial products into finished print products. According to the method, it may first be determined when a last partial product of a first production order has left a post print processing machine. The post print processing machine may then be automatically and/or semi-automatically converted by the plant central control unit. The method may include determining, by the plant central control unit, when the conversion of the post print processing machine has been completed. |
| US09323488B2 |
Image forming apparatuses that start downloading image data in response to specifying printing conditions, image forming systems including such image forming apparatuses, and computer-readable media storing instructions for such image forming apparatuses
Image forming systems include servers and image forming apparatuses. Image forming apparatuses include first storage devices, printing devices, accepting devices, and first controllers. Printing devices print images corresponding to image data pieces stored in first storage devices. Accepting devices accept instructions. First controllers include first control devices. Servers include second storage devices and second controllers. Second controllers include second control devices. First controllers specify printing conditions for print-target image data pieces based on instructions. First controllers start downloading print-target image data pieces from servers in response to specifying printing conditions for print-target image data pieces. First controllers store downloaded print-target image data pieces in first storage devices. First controllers control printing devices to print downloaded print-target image data pieces stored in first storage devices after accepting print-start instructions at accepting devices. Second controllers transmit print-target image data pieces based on instructions accepted at accepting devices. |
| US09323484B2 |
Print instruction apparatus, printer, printing system, print instruction method, and non-transitory computer readable medium
A print instruction apparatus includes a group information acquisition unit that acquires information identifying a feeder unit included in a group including two or more feeder units, from among a plurality of feeder units mounted on a printer to feed paper sheets, where if one feeder unit in the group runs out of paper sheets during printing, another feeder unit in the same group is configured to feed paper sheets, and a display that acquires information related to a remaining amount of paper sheets each of the feeder units in the group, and displays information related to a total remaining amount of paper sheets in the group. |
| US09323483B2 |
Location-based print notifications
In one implementation, a print service system communicates with a device to provide notifications related to a print job at the device based on the proximity of the device to the printer. Additionally, the print service system communicates with the printer to provide a print job to the printer. |
| US09323481B2 |
Preview display device, and method and computer readable medium for the same
A preview display device is provided that includes a display unit, and a controller configured to determine whether a print-requested page requested to be printed is permitted to be printed, based on print restriction information, and control the display unit to display a preview image showing a print result of the print-requested page in advance of printing of the print-requested page, in a manner to distinguish the preview image showing the print-requested page determined to be permitted to be printed from the preview image showing the print-requested page determined to be not permitted to be printed. |
| US09323479B2 |
Information processing apparatus for displaying thumbnail images associated with printed frames of a moving image file
A medium stores instructions that are executable by a computer. The instructions cause a controller of an information processing apparatus to receive a selection of a moving-image file from a plurality of moving-image files stored in a storage unit, to receive a selection of a print target frame image from a plurality of frame images composing the moving-file that has been selected, to output print data based on the print target frame image to a print unit, to store a thumbnail composing image based on the print target frame image upon associating with the moving-image file that has been selected, and to display one thumbnail image based on the thumbnail composing image that has been stored in the storage unit upon associating with that moving-image file, for each of the plurality of moving-image files that has been stored in the storage unit. |
| US09323477B2 |
Operating device and image formation device
An operating device of the disclosure includes: a plurality of operation keys; and a processing unit executing a process corresponding to a pushed operation key from among the operation keys, the processing unit executing a process corresponding to a specified operation key when the processing unit detects that the specified operation key and an operation key located near the specified operation key from among the operation keys are pushed at the same time. |
| US09323472B2 |
Storage controlling device and controlling method
A Controller Module (CM) includes a memory that temporarily stores therein data to be written into storage, a switch that connects to another CM and a DMA controller that transfers the data stored in the memory to the other CM via the switch. The DMA controller reads a transfer status of the transferred data from the switch and writes the read transfer status into the memory. |
| US09323471B2 |
Management of extent migration on tiered storage
Aspects of the present disclosure are directed toward a method, a system, and a computer program product for managing the migration of extents on tiered systems. The method can include receiving a space reservation request for one or more requested extents on a first storage tier of a storage system. The method can also include releasing a first storage tier reserve space that includes one or more first tier reserved extents in response to the first storage tier reserve space being insufficient for the reservation request. The method can also include migrating the one or more requested extents to the first storage tier reserve space. |
| US09323466B2 |
System and method for client policy assignment in a data storage system
A system and method for property assignment in a data storage system is presented. A data storage system defines a client configuration profile comprising a set of storage operation properties, wherein the storage operation properties regulate criteria for performing storage operations by the data agent on client devices that are associated with the client configuration profile. A storage management system associates a first client device to the client configuration profile; and communicates the set of properties of the client configuration profile to property tables of corresponding objects in the first client device. |
| US09323464B2 |
Assigning device adaptors to use to copy source extents to target extents in a copy relationship
Provided are a computer program product, system, and method for assigning device adaptors to use to copy source extents in source ranks to target extents in target ranks in a copy relation. A determination is made of an order of the target ranks in the copy relation. Target ranks in the copy relation are selected according to the determined order. For each selected target rank, indication is made in a device adaptor assignment data structure of a source device adaptor and target device adaptor of the device adaptors to use to copy the source rank to the selected target rank indicated in the copy relation, wherein indication is made for the selected target ranks according to the determined order. The source ranks are copied to the selected target ranks using the source and target device adaptors indicated in the device adaptor assignment data structure. |
| US09323460B2 |
Assigning priorities to data for hybrid drives
A hybrid drive includes multiple parts: a performance part (e.g., a flash memory device) and a base part (e.g., a magnetic or other rotational disk drive). A drive access system, which is typically part of an operating system of a computing device, issues input/output (I/O) commands to the hybrid drive to store data to and retrieve data from the hybrid drive. The drive access system assigns, based on various available information, a priority level to groups of data identified by logical block addresses (LBAs). With each I/O command, the drive access system includes an indication of the priority level of the LBA(s) associated with the I/O command. The hybrid drive determines, based on the priority level indications received from the drive access system, which LBAs are stored on which part or parts of the hybrid drive. |
| US09323453B2 |
System and method for enhanced command input
A portable electronic device having an input device for receiving a gesture based input from a user is used to control a navigation operation of an appliance. The portable electronic device receives via the input device the gesture based input and uses one or more parameters stored in a memory of the portable electronic device and one or more characteristics associated with the gesture based input to cause the portable electronic device to transmit a navigation step command to thereby control the navigation operation of the appliance. |
| US09323448B2 |
Tracking user interactions with a mobile UI to facilitate UI optimizations
The disclosed embodiments relate to a system for tracking and analyzing user interactions with a mobile user interface (UI). During operation, the system collects data while a user interacts with the mobile UI through a touchscreen, wherein the data includes tap-attempt data that specifies coordinates for touchscreen locations that the user has tapped while interacting with the mobile UI. Next, the system compares the tap-attempt data with locations of tappable elements in the mobile UI, wherein each tappable element has an associated tap target size. For each tappable element, the system uses results of the comparison to determine a percentage of tap attempts that have succeeded or failed for the associated tap target size. Finally, the system makes the percentage information available to a UI designer to enable the UI designer to adjust tap target sizes for the mobile UI. |
| US09323446B2 |
Apparatus including a touch screen and screen change method thereof
An apparatus for screen change includes a touch screen to divisionally display a first region where a first screen is displayed and a second region where a second screen is displayed, and a controller to detect whether a display change event for a screen display change occurs in at least one of the first region and the second region, and to analyze the display change event and to change a display direction of the second screen while maintaining a display of the first screen. |
| US09323445B2 |
Displayed content drilling in a touch screen device
Methods may provide drilling of displayed content in a touch screen device. A method may include detecting a touch gesture by a user on a first portion of displayed content on a touch display. The first portion may include a drillable data element having at least a first dimension, a second dimension and a third dimension. The method may further include detecting information associated with the touch gesture, determining a requested drilling action based at least in part on the detected information, the requested drilling action including at least one of a change of a displayed drill dimension and a change of a displayed drill degree, sending the requested drilling action of the first portion to a report server and presenting a drilled first portion on the touch display. |
| US09323439B2 |
System and method for displaying published electronic documents
A system and method that displays published electronic documents including an electronic periodical database that stores electronic files representing a plurality of electronic documents and a plurality of corresponding published issues to each of the plurality of electronic documents, a electronic periodical display controller that displays a graphic substrate upon which the electronic documents and corresponding published issues are arranged, a user input controller that receives user input to manipulate the graphic substrate to control a zooming function and a panning function, and associates input user information with a specific one of the plurality of electronic published issues, and a user input database that saves the input user information associated with the specific electronic published issue, and displays the stored input user information within the graphic substrate associated with the specific one of the plurality of electronic published issues of the plurality of electronic documents. |
| US09323437B2 |
Method for displaying scale for enlargement and reduction operation, and device therefor
A method for displaying a scale for an enlargement and reduction operation on a touch screen includes detecting, using a multi-touch detection sensor, a plurality of touches by a user on the touch screen, and detecting an enlarging operation or a reducing operation caused by the user applying two operating fingers to the touch screen. An enlargement factor or a reduction factor is displayed on the touch screen at a position near the two operating fingers of the user. |
| US09323434B2 |
Integrated user interface system and method
An integrated user interface system being disposed at a chair and methods for manufacturing and using same. The user interface system comprises one or more interface elements that are disposed at an armrest or other suitable chair location and that are obscured from view or otherwise de-emphasized when a user is distal from the user interface system. At least one selected interface element becomes emphasized when a user hand becomes proximate to the user interface system. The selected interface element can become emphasized, for example, by becoming visible and/or by forming a raised projection. Upon becoming emphasized, the selected interface element is activated for use and can be manipulated to interact with available system resources. The chair advantageously can appear to be an ordinary chair when the user interface system is not in use and can present the user interface system when the user wishes to access the system resources. |
| US09323432B2 |
Method and apparatus for adjusting size of displayed objects
A method and apparatus for adjusting sizes of objects displayed on a screen are provided. The a method includes recognizing one or more objects appearing on the screen, displaying guides indicating regions of the recognized objects on the screen, receiving a selection command for one of the recognized objects, and adjusting, upon reception of a size adjustment command, a size of the region of the selected object with respect to a first axis of the guide associated with the selected object or a second axis thereof perpendicular to the first axis, and displaying the size-adjusted region. |