| Document | Document Title |
|---|---|
| US09325338B2 |
Adaptive ternary A/D converter for use in an ultra-wideband communication system
In an ultra-wideband communication system, a 1-trit ternary analog-to-digital converter (“ADC”) having dynamic threshold adaption and providing an output in ternary form [+1, 0, −1]. The ternary ADC includes a pair of 1-bit binary ADCs, one being configured in a non-inverting form, and one being configured in an inverting form. Each binary ADC includes an feedback network mechanism, thereby allowing for simultaneous and independent adaptation of the pair of thresholds, compensating for the effects of any DC offset that may be present. The use of a trit-based ternary encoding scheme improves system entropy. |
| US09325336B2 |
Gain calibration of ADC residue amplifiers
A device for gain calibration of an analog-to-digital converter (ADC) residue amplifier includes a digital-to analog converter (DAC) configured to convert a digital signal to an analog signal. The DAC includes a calibration capacitor that can be used in the gain calibration of the ADC residue amplifier. A flash ADC, including a plurality of comparators and an additional comparator, generates the digital signal. The additional comparator provides a threshold voltage approximately in a middle point of a nominal subrange. The nominal subrange comprises a portion of a voltage range corresponding to threshold voltages of two adjacent comparators of the plurality of comparators. |
| US09325335B1 |
Comparator circuits with local ramp buffering for a column-parallel single slope ADC
A comparator circuit suitable for use in a column-parallel single-slope analog-to-digital converter comprises a comparator, an input voltage sampling switch, a sampling capacitor arranged to store a voltage which varies with an input voltage when the sampling switch is closed, and a local ramp buffer arranged to buffer a global voltage ramp applied at an input. The comparator circuit is arranged such that its output toggles when the buffered global voltage ramp exceeds the stored voltage. Both DC- and AC-coupled comparator embodiments are disclosed. |
| US09325334B2 |
IC, process, device generating frequency reference from RF gas absorption
A frequency reference device that includes a frequency reference generation unit to generate a frequency reference signal based on an absorption line of a gas. |
| US09325331B2 |
Prediction based digital control for fractional-N PLLs
Methods and systems for phase correction include determining a phase error direction and generating a prediction for the phase error based on a sigma-delta error. It is determined whether the prediction agrees with the determined phase error direction. If the prediction does not agree, a phase correction is adjusted in accordance with the predicted phase error. |
| US09325329B2 |
Automatic selection of on-chip clock in synchronous digital systems
Embodiments of a synchronous digital system are disclosed that may include generation of clock and synchronization signals. Any of a plurality of available clock signals may be selected for use as a primary clock, without causing clock-induced errors in the synchronous digital system. A clock signal generated on-chip with the synchronous digital system may be automatically selected in response to detecting a condition indicating that use of a local clock may be necessary. Such conditions may include detection of tampering with the synchronous digital system. If an indication of tampering is detected, security measures may be performed. |
| US09325328B2 |
Oscillation circuit, oscillator, electronic apparatus, moving object, and frequency adjustment method of oscillator
An oscillation circuit includes a voltage controlled oscillation circuit that includes a variable capacitance circuit provided with a variable capacitance element whose capacitance value is controlled on the basis of a control voltage and oscillates a vibrator so as to generate an oscillation signal, and a fractional N-PLL circuit that receives the oscillation signal generated by the voltage controlled oscillation circuit and includes a voltage controlled oscillator which controls an oscillation frequency on the basis of control input data (an integral division ratio and a fractional division ratio). |
| US09325327B1 |
Circuits and method of equalizing impedances of PMOS and NMOS devices
A circuit for equalizing the impedances of a PMOS device with an NMOS device includes a first reference voltage coupled to the source of the first PMOS device. A second reference voltage is coupled to the source of the NMOS device. A first node has a common mode voltage between the first reference voltage and the second reference voltage. A second node is located between the PMOS device and the NMOS device. A first gate voltage is coupled to the gate of either the PMOS device or the NMOS device. An operational amplifier has a first input coupled to the first node and a second input coupled to the second node, the output of the operational amplifier is a second gate voltage that is coupled to the gate of one of either the PMOS device or the NMOS device that is not coupled to the first gate voltage. |
| US09325326B2 |
Interface and related method for connecting sensor equipment and a physiological monitor
An interface to connect sensor equipment and a physiological monitor includes a first connector to receive power from a first channel of the monitor and a second connector to receive power from a second channel of the monitor. The power from each of the first and second channels of the monitor is combined within the interface. The interface further includes a third connector to provide the combined power to the sensor equipment; a voltage converter to rescale the voltage of the combined power that is provided to the sensor equipment; and a scaling circuit to reduce the voltage of a signal representing a measured physiological parameter. The signal representing the measured physiological parameter is sent from the sensor equipment to the monitor. The interface is advantageous to allow sensor equipment to be sufficiently powered by a monitor that would not typically provide enough power. |
| US09325320B1 |
System level interconnect with programmable switching
A plurality of functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. A configuration data store in the integrated circuit stores configuration values loaded by the micro-controller. A plurality of connectors are configured to connect the integrated circuit to external signals. A programmable interconnect also located in the integrated circuit programmably connects together the plurality of functional elements and the plurality of connectors according to the configuration values loaded into the configuration data store. |
| US09325316B1 |
Low-power high swing CML driver with independent common-mode and swing control
A low-power high-swing current-mode logic (CML) driver circuit includes a first differential-pair and a second differential-pair. The first differential-pair includes first transistors, and is coupled to a first voltage supply that supplies a first voltage. The second differential-pair includes second transistors, and a common node of the second differential-pair is coupled to a second voltage supply. The second voltage supply supplies a second voltage that is higher than the first voltage. Control terminals of the first transistors are coupled to control terminals of the second transistors to form input nodes of the driver circuit. |
| US09325314B2 |
Integrated circuit including circuits driven in different voltage domains
Provided is an integrated circuit including circuits driven in different voltage domains. The integrated circuit includes a logic circuit configured to be driven by a first power supply voltage having a first power supply voltage level, and a memory circuit configured to be driven by a second power supply voltage having a second power supply voltage level different from the first power supply voltage level. The memory circuit includes a circuit configured to interface with the logic circuit, configured to be supplied with power at the second power supply voltage level in response to an output signal, and configured to shift a level of a signal having the first power supply voltage level received from the logic circuit to the second power supply voltage level. The first power supply voltage corresponds to a first voltage domain, and the second power supply voltage corresponds to a second voltage domain. |
| US09325312B1 |
Input control circuit for analog device
An input control circuit that can be used to drive analog switches of analog modules such as an analog-to-digital converter (ADC) enables a sampling switch to receive a higher input voltage than the voltage rating of the devices comprising the sampling switch without risk of damage and without the need for a resistor divider network. The input control circuit and switch both receive an input voltage to be processed and the input control circuit generates a control signal for the switch that is derived from a pre-charged capacitor. The control circuit permits the design and manufacture of high voltage analog modules using low voltage devices, which can save on mask costs without any performance trade-offs. |
| US09325310B2 |
High-swing voltage mode driver
A high-swing voltage mode driver is provided that is operably coupled to a Serializer/Deserializer (SerDes) chip. The high-swing voltage mode driver can operate at a speed of 16 gigabits per second. The high-swing voltage mode driver comprises a thirteenth transistor that is configured to stabilize a voltage at a fifth node, where an output signal that is a negative differential signal exists. The high-swing voltage mode driver comprises a sixteenth transistor that is configured to stabilize a voltage at a sixth node, where an output signal that is a positive differential signal exists. |
| US09325308B2 |
Semiconductor device and cascode circuit
A semiconductor device and a cascode circuit are disclosed herein. The semiconductor device includes a first transistor and a second transistor. The first transistor includes a first electrode, a second electrode, a control electrode, and a control pad. The second transistor includes a first electrode, a second electrode, a control electrode, and a control pad. The second electrode of the first transistor is configured to receive a first predetermined voltage. The control electrode of the first transistor is configured to receive an input signal. The first electrode of the second transistor configured to receive a second predetermined voltage. The second electrode of the second transistor is electrically coupled to the first electrode of the first transistor. The control pad is disposed between the first electrode of the second transistor and the control electrode of the second transistor, and is configured to receive a first adjust signal. |
| US09325302B1 |
Programmable filter
In several embodiments of the invention, a programmable architecture for FIR filters includes a tapped delay chain and a number of different slices. Each slice has a multiplexer that receives all of the tapped input-signal samples and a programmable current driver. Each slice can be independently programmed to correspond to any one of the taps in the delay chain, such that zero, one, or more slices can be associated with any of the delay-chain taps. Moreover, the current driver in each slice can be independently programmed to contribute any available driver strength level for the selected tap, where the combination of one or more drive strengths associated with a given tap corresponds to the effective tap coefficient for that tap. In this way, the architecture can be programmed to provide a variety of different filters having not just transfer functions with different coefficient values, but also transfer functions having different numbers of pre-cursor and/or post-cursor taps. |
| US09325300B2 |
Method for the operation of electrostatic precipitators
The disclosure relates to a method for the scheduling and/or the operation of a system of at least two power supplies (11) providing DC pulses to a consumer (5), typically an electrostatic precipitator, wherein the power supplies (11) are energized by a common feeding (1). According to the proposed method one power supply (11) is defined to be the reference power supply, and the initial pulses of each further power supply (11) are shifted by controlled delays (δPri) with respect to the pulses of the reference power supply so as to fill the gaps between the pulses of the reference power supply by the pulses of the further power supplies (11). |
| US09325288B2 |
Wireless communication device
In a wireless communication device, baseband variable gain amplifiers amplify a baseband signal. Mixers convert the amplified baseband signal into a high-frequency transmission signal. Hybrid variable gain amplifiers amplify an in-phase local signal and an orthogonal local signal which are input to the mixers. The level detection controller changes respective gains of the baseband variable gain amplifiers and the hybrid variable gain amplifiers, in response to power of the high-frequency transmission signal. |
| US09325287B2 |
Programmable gain amplifier with controlled gain steps
Provided is a programmable gain amplifier that includes controlled gain steps that dynamically control an output voltage in real-time. The programmable gain amplifier includes a first transistor and a second transistor that includes respective control ports, input ports, and output ports. The programmable gain amplifier also includes a resistor connected to the output ports of the transistors. Further, at least a third transistor is connected to the output ports, in parallel with the resistor. On applying a control voltage to the third transistor and applying an input voltage to the first control port, the second control port is selectively modified by the control voltage to produce a desired output at the first input port and the second input port. |
| US09325285B2 |
Method of reducing un-correlated noise in an audio processing device
An audio processing device comprises a multitude of electric input signals, each electric input signal being provided in a digitized form, and a control unit receiving said digitized electric input signals and providing a resulting enhanced signal. The control unit is configured to determine the resulting enhanced signal from said digitized electric input signals, or signals derived therefrom, according to a predefined scheme. |
| US09325281B2 |
Power amplifier controller
The present disclosure provides a power amplifier controller for starting up, operating, and shutting down a power amplifier. The power amplifier controller includes current sense amplifier circuitry adapted to monitor a main current of the power amplifier. A bias generator is also included and adapted to provide a predetermined standby bias voltage and an operational bias voltage based upon a main current level sensed by the current sense amplifier circuitry. The power amplifier controller further includes a sequencer adapted to control startup and shutdown sequences of the power amplifier. In at least one embodiment, the power amplifier is a gallium nitride (GaN) device, and the main current level sensed is a drain current of the GaN device. Moreover, the bias generator is a gate bias generator provided that the power amplifier is a field effect transistor (FET) device. |
| US09325276B2 |
Methods and apparatus for clock oscillator temperature coefficient trimming
Apparatus and methods are provided for a temperature-compensated oscillator adapted to receive an input reference current. The apparatus and methods include or provide a temperature coefficient control circuit adapted to adjust the input reference current based on temperature information, wherein the temperature coefficient control circuit receives a first signal corresponding to the temperature information at a first signal node, and a second signal corresponding to a trimmed bias signal at a second signal node. |
| US09325274B2 |
Apparatus for carrying out improved control of rotary machine
In an apparatus for controlling a variable of a rotary machine based on an AC voltage supplied to the rotary machine via a switching element of a power converter, a generator generates a drive signal including an on-off pattern of the switching element. A driver drives, based on the on-off pattern of the drive signal, the switching element. A parameter monitor monitors a parameter indicative of change of a harmonic current flowing in the rotary machine based on a harmonic voltage included in the AC voltage. A limiter limits, based on the parameter monitored by the parameter detector, generation of the drive signal by the generator to limit an increase of a level of the harmonic current. |
| US09325273B2 |
Method and system for driving electric machines
A system for driving an electric machine is provided. The system includes a power converter coupled to an input source and the electric machine. The power converter includes a leg that includes a first and second string. The first string includes plurality of controllable semiconductor switches, a first and second connecting node. The first string is operatively coupled across a first and second bus. The second string is operatively coupled to the first string via the first and second connecting node. The second string comprises plurality of switching modules. The switching modules include fully controllable semiconductor switches and energy storage devices. The system further includes a system controller configured to provide activation commands to the controllable semiconductor switches and the switching modules such that energy stored in the energy storage device is provided to the electric machine when the machine is switched on for operation. |
| US09325268B2 |
Power dissipating arrangement in a wind turbine
A power dissipating arrangement for dissipating power from a generator in a wind turbine is provided. The generator comprises a plurality of output terminals corresponding to a multi-phase output. The power dissipating arrangement comprises a plurality of dissipating units, a plurality of semiconductor switches, a trigger circuit for switching the semiconductor switches and a control unit for controlling the operation of the trigger circuit, thereby controlling the switching of the semiconductor switches. Each dissipating unit includes a first terminal and a second terminal. The first terminal of each dissipating unit is coupled to each output terminal of the generator. Each semiconductor switch includes a first terminal anode, a second terminal and a gate terminal. The first terminal of each semiconductor switch is coupled to the second terminal of each dissipating unit and the second terminal of the semiconductor switch is coupled to the second terminal of another dissipating unit, such that the second terminal of each dissipating unit is coupled to the first terminal of one semiconductor switch and the second terminal of another semiconductor switch. The trigger circuit is coupled to the gate terminal of the plurality of the semiconductor switches for switching the semiconductor switches. |
| US09325267B2 |
Diagnosis of over-current conditions in bipolar motor controllers
A circuit for controlling a load current through a coil is connected to an output port of a transistor H-bridge that includes two low side transistors and two high side transistors. A current sense circuit is coupled to the H-bridge and configured to provide a representation of the load current provided by the output port. A current regulator is configured to generate a modulated signal dependent on the representation of the load current and a current set-point. The modulated signal has a duty-cycle. A gate control logic drives the individual transistors of the H-bridge on and off in accordance with the modulated signal. A direction signal provides the load current to the coil. The direction signal determines the direction of the load current. An over current detection circuit is coupled to each individual transistor and is configured to signal an over-current by providing an active over-current failure signal when a transistor current through the respective transistor exceeds a respective maximum value. |
| US09325262B2 |
Brushless motors with linear hall sensors
A motor system includes a motor including two linear Hall sensors configured to output analog signals, and a controller configured to control the motor. The controller is operable to monitor the analog signals output from the two linear Hall sensors, determine a plurality of auxiliary signals based on the analog signals, and determine a motor position based on the plurality of auxiliary signals. |
| US09325260B2 |
Motor control apparatus
In a butting control, while performing a constant current control for a motor based on an output of a current sensor, the motor is driven by sequentially switching over a current supply phase of the motor in a one-phase current supply method, in which only one of the phases of the motor is powered. By performing the constant current control in the butting control, changes in a current value of each phase caused by temperature changes or aging changes is suppressed and hence a torque change of the motor is suppressed. In addition, by sequentially switching over the current supply phase of the motor in the one phase current supply method under the constant current control, a torque change of the motor can be suppressed while maintaining the current value of the current supply phase at a constant value. |
| US09325259B2 |
Graphene sheet and nanomechanical resonator
A graphene sheet is provided. The graphene sheet includes a carbon lattice and a spatial distribution of defects in the carbon lattice. The spatial distribution of defects is configured to tailor the buckling properties of the graphene sheet. |
| US09325258B2 |
Wireless control of power network switching devices
A method for controlling a plurality of power converters connected to a power supply network is described. Each power converter includes high-power semiconductor devices. Control signals are sent between a controller and a wireless node of one or more of said plurality of power converters using a wireless communication system. The control signals are transmitted to a local wireless node of one or more of a plurality of power converters. The data transmissions include data packets including control information such that a clock of the local wireless node can be synchronized using time synchronization information of the wireless communication system. In other aspects of the invention a system employing the method and a computer program for carrying out the method are described. |
| US09325255B2 |
Switch controller, switch control method, and power supply device comprising the switch controller
An exemplary embodiment of the present invention relates to a switch controller, a method for controlling a switch, and a power supply including the switch controller. According to the exemplary embodiment of the present invention, an AC input passed through a dimmer is rectified such that an input voltage is generated, and the input voltage is transmitted to the power switch. A charging current is generated using a voltage that depends on the input voltage, a zero cross-point at which the input voltage becomes zero voltage is detected using a detection voltage output from a current source, and a reference signal synchronized at the detected zero cross-point is generated. |
| US09325254B2 |
SCR dimming circuit and dimming control method
A silicon-controlled rectifier (SCR) dimming circuit and a dimming control method are disclosed. The SCR dimming circuit includes a SCR element, a rectifier circuit, a filter circuit, a power converter, and a dimming control circuit. The dimmer control circuit includes a phase angle detection circuit, an output current feedback control circuit, an input current control circuit, a maximum operation time detection circuit, and a logic operator. An input current sampling signal fluctuates near a predetermined value after the SCR element is turned off by turning on and off the power converter, so that the input AC current is less than a holding current of the SCR element. The present SCR dimming circuit and the present dimming control method can avoid repeatedly turning on the SCR element in cycles of an operating frequency. Thus, the linearity of dimming is improved and the flicker of an LED lamp is eliminated. |
| US09325248B2 |
Converter with shared current path and isolation barrier
A converter with at least one or more transformers having at least one primary side magnetically coupled to at least one secondary side, the primary side being electrically isolated from the secondary side, wherein a first transformer has first and second sets of coils and a second transformer has third and fourth sets of coils. The first set of coils is connected in series to the third set of coils, wherein one of the secondary sides is connectable to an external output unit, wherein another secondary side is connectable to an external input source, wherein the two secondary sides are electrically isolated from each other, wherein the primary side is adapted to drive the transformers that are connectable to an external power source. The converter uses a shared current path and an isolated current-to-current transfer between the input and output sides to replicate the input current to an output current. |
| US09325245B2 |
Bidirectional isolated DC-DC converter
The present disclosure discloses a bidirectional isolated DC-DC converter, which includes two ports, two voltage and current isolated acquisition units, a processing module, two filtering-circuit units, and a bidirectional power-converting module. One of the two ports is selectively used as an input terminal of the bidirectional isolated DC-DC converter, and another of the two ports is used as an output terminal. The two voltage and current isolated acquisition units are connected with the two ports respectively to sample voltages and currents at the two ports and generate corresponding feedback signals. The processing module receives the feedback signals and outputs corresponding control signals according to the feedback signals. The bidirectional power-converting module is connected via the two voltage and current isolated acquisition units to the two ports to perform the conversion of different voltages between the two ports according to the control signals output by the processing module. |
| US09325243B2 |
Boost regulator incorporating peak inductor current modulation
A boost switching regulator incorporates a peak inductor current modulation circuit to modulate the peak inductor current as a function of the load current, the input voltage, the regulated output voltage, and a fixed current value. In this manner, the switching frequency of the boost regulator can be maintained above a given value or within a given frequency range over a wide range of load conditions and also over input voltage variations and output voltage settings. |
| US09325242B2 |
Switching regulator output capacitor current estimation
A switching regulator includes a controller and a power stage for coupling to a load through an inductor and a capacitor. The a controller is operable to control operation of the power stage via a pulse width modulation (PWM) signal generated based on a difference between a reference voltage and the load voltage and sample the inductor current at a lower rate than the load voltage. The controller is further operable to estimate the capacitor current based on the sampled load voltage, generate an offset to the reference voltage based on the sampled inductor current and the estimated capacitor current and adjust the PWM signal applied to the power stage based on the offset. The switching regulator can be single-phase or multi-phase. |
| US09325241B2 |
Dead-time compensation in a power supply system
One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also includes a power stage comprising a gate driver, a high-side switch, and a low-side switch. The gate driver can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system further includes a digital delay system configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch. |
| US09325240B2 |
Low input voltage boost converter with peak inductor current control and offset compensated zero detection
The low input voltage boost converter with peak inductor current control and offset compensated zero detection provide a boost converter scheme to harvest energy from sources with small output voltages. Some embodiments described herein includes a thermoelectric boost converter that combines an IPEAK control scheme with offset compensation and duty cycled comparators to enable energy harvesting from TEG inputs as low as 5 mV to 10 mV, and the peak inductor current is independent to first order of the input voltage and output voltage. A control circuit can be configured to sample the input voltage (VIN) and then generate a pulse with a duration inversely proportional to VIN so as to control the boost converter switches such that a substantially constant peak inductor current is generated. |
| US09325239B2 |
Power supply device, control circuit, electronic device and control method for power supply
A power supply device that includes a switch circuit to which an input voltage is supplied, a coil coupled between the switch circuit and an output terminal from which an output voltage is outputted. A voltage adding circuit adds a slope voltage to a reference voltage. A control unit compares a feedback voltage corresponding to the output voltage and the reference voltage and switches the switch circuit at a timing corresponding to a comparison result of the feedback voltage and the reference voltage. A slope adjustment circuit differentiates a current flowing in the coil and adjusts a slope amount of the slope based on a differentiation result of the current. |
| US09325235B2 |
Adaptive nonlinear current observer for boost PFC AC/DC converters
Systems, methods, and devices which estimate the inductor current in a power factor correction (PFC) converter for use with AC/DC converters. A control system for use with the PFC takes as input the input voltage and the output voltage of the PFC. Control signals for power semiconductor subcircuits in the PFC are then output from the control system. The control system uses an adaptive observer sub-circuit that estimates the inductor current and the bus voltage. The adaptive observer uses an adaptive updater which uses both the estimates and the estimate error to update the adaptive observer's estimates. |
| US09325232B1 |
Method and apparatus for power generation
Embodiments of an electrical power generation device and methods of generating power are disclosed. One such method comprises creating magnetic flux forces generally transverse to a face of a magnet facing a center of a cylinder, moving a coil of wound conductive material partially through the center opening of the cylinder to produce the electric current and, routing resistive forces generated from the moving coil through an iron core, wherein the first coil is positioned concentrically about a first portion of the core, and further routing the resistive forces around the cylinder. |
| US09325230B2 |
Vibration generator
A vibration generator includes a tubular magnetic case, an end cover holding a first bearing metal, a second bearing metal held in a burring portion of the bottom plate of the case, a non-magnetic movable thrust shaft that is inserted in an axially movable manner spinning the first and second bearing metal, and first to third toroidal coils connected and fixed at the inner circumference of the case. The vibration generator further includes a first annular pole piece fixed to the movable thrust shaft, a first and a second tubular permanent magnet of axial magnetization, a second annular pole piece and third annular pole piece, first and second wight body fixed at both ends of the movable thrust shaft outside the case, a first coil spring between the end cover and the first wight body, and a second coil spring between the bottom plate and the second wight body. |
| US09325228B2 |
Multi-axis robot apparatus with unequal length forearms, electronic device manufacturing systems, and methods for transporting substrates in electronic device manufacturing
Embodiments include multi-arm robots for substrate transport systems that include a boom, first and second forearms rotationally coupled to the boom, the second forearm being shorter than the first forearm, a first wrist member rotationally coupled to the first forearm, and a second wrist member rotationally coupled to the second forearm. Each of the boom, first and second forearms, and the first and second wrist members are configured to be independently rotated to carry out substrate motion profiles. Electronic device processing systems and methods of transporting substrates are described, as are numerous other aspects. |
| US09325225B2 |
Rotating electrical machine
A rotating electric machine and a method of magnetizing a rotor of a brushless rotating electric machine are disclosed, the method including forming a stationary magnetic field, rotating a rotor of a magnetizing machine in the stationary magnetic field for producing alternating current, rectifying the alternating current with a controllable bridge situated in the rotor, receiving control instructions wirelessly to the rotor, controlling a magnitude of current with the controllable bridge based on the control instructions, and feeding the controlled current to the magnetizing winding of the rotating electric machine. |
| US09325220B2 |
Propulsion and control for a magnetically lifted vehicle
Electromechanical systems using magnetic fields to induce eddy currents and generate lift are described. Magnet configurations which can be employed in the systems are illustrated. The magnet configuration can be used to generate lift and/or thrust. Lift and thrust predictions for various magnet configurations are provided. Arrangements of hover engines, which can employ the magnet configurations, and an associated guidance, navigation and control system, are described. Finally, a number of different applications, such as trains, elevators and printing, which utilize embodiments of the electromechanical systems described herein, are presented. |
| US09325217B2 |
Flywheel energy system
An energy storage system comprises a housing and a flywheel having a drive shaft portion attached to a cylindrical ferromagnetic rotor portion. The drive shaft portion defines a substantially vertical axis about which the rotor portion is mounted for rotation. A magnetic bearing assembly comprised of an annular permanent magnet having no electromagnetic components is mounted on the housing in stationary centered relation about the vertical axis above the rotor portion so as to attract the rotor portion axially upwardly towards a lower face of permanent magnet, thereby supporting a significantly high portion of the weight of the flywheel. At least one low friction mechanical bearing assembly is mounted within the housing about the drive shaft portion to provide radial positioning of the rotor portion and to limit at least upward axial movement of the rotor portion in relation to the lower face. The annular permanent magnet overlies a portion of the end face of the rotor with the balance providing a return path for magnetic flux. |
| US09325216B2 |
Motor bearing for electric submersible motors
A motor bearing for an electric submersible motor is described. An electric submersible motor includes a rotatable motor shaft extending longitudinally through a submersible motor, a bearing sleeve secured to the rotatable motor shaft in between two adjacent rotor sections, a motor bearing radially outward from the bearing sleeve and pressed against a stator bore, wherein the motor bearing comprises a series of magnets dispersed around an outer diameter of the motor bearing, and an insulation layer covering a surface of each magnet of the series of magnets, wherein the insulation layer faces the stator bore. A motor bearing includes a series of recessions dispersed around an outer axial surface of a motor bearing, a magnet inset in each recession of the series of recessions, and an insulation layer coating a surface of each of the magnets. |
| US09325214B2 |
Electric power collection and distribution ring and electric motor
An electric power collection and distribution ring includes first to third bus rings configured to collect and distribute electric power from and to winding wires of a plurality of phases. The first to third bus rings include first to third annular conductor parts, respectively, and first to third feeding terminal parts, respectively, configured to feed electric power to the first to third annular conductor parts, respectively. The second feeding terminal part projects toward another side in an axial direction of the first to the third annular conductor parts without projecting toward the one side in the diameter direction than the first annular conductor part. The third feeding terminal part projects toward the another side in the axial direction of the first to the third annular conductor parts without projecting toward the one side in the diameter direction than the second annular conductor part. |
| US09325213B2 |
Motor connecting member and motor device
A motor connecting member, which connects a motor winding and a terminal block, includes a terminal to be connected to the terminal block, a winding connecting portion to be connected to the motor winding, and an extended portion extending between the terminal and the winding connecting portion. The extended portion is made by plastically deforming a single wire having a circular cross section, and is curved in a circular arc shape in at least one portion between the terminal and the winding connecting portion, and the at least one curved portion comprises a narrower conductor width in a radial direction than a diameter of the single wire before the plastic deformation. |
| US09325210B2 |
Rotor for a motor, and a motor and an appliance comprising the rotor, and a method for making a rotor
A rotor for a motor comprising a frame having a hub for connecting the rotor to a shaft and a perimeter portion for interacting with a stator of the motor to cause the rotor to rotate about an axis of rotation. The frame comprises legs extending from an outer portion of the frame towards the hub, each leg having an inner end at the hub and an outer end at the outer portion of the frame, the inner ends of a first plurality of legs being spaced from the inner ends of a second plurality of legs in a direction along the axis of rotation. |
| US09325207B2 |
Power supplier and receiver and mobile device
An arrangement place for a device such as a rectifier and a power storage device is easily secured. At the time of power supply using a resonance phenomenon, a power-receiving device generates a magnetic field space having a lower magnetic field strength than other parts at or around the inner side of the power-receiving module, and this magnetic field space is used as the arrangement place of an electronic component. The power-receiving module includes a power-receiving resonance coil which is resonated with a power-supplying module and a power-receiving coil which partly overlaps the power-receiving resonance coil in a coil diameter direction and receives and supplies power from and to the power-receiving resonance coil. |
| US09325198B2 |
Wireless charging device
A wireless charging device includes a plurality of power supply modules, a control unit and a charge module. Each of the power supply modules includes a receiver and a conduction circuit. The receiver outputs an induction current. The conduction circuit is coupled to the receiver and generates an output signal according to the induction current. The control unit is coupled to the power supply modules and generates a control signal according to the induction current outputted by the receivers. The charge module is coupled to the power supply modules and generates a charge current according to the output signal generated from the power supply modules. The control unit adjusts the maximum value of the charge current according to the number of the power supply modules which generate the induction current. |
| US09325195B2 |
Inductively chargeable power pack
An inductively enabled power pack charging system and method includes an integrated circuit for controlling inductive transfer of power to the power pack and managing communication with an external power source. The system may further include an electrochemical cell for storing energy received from the external power supply and magnetic shielding material for guiding magnetic flux away from the electrochemical cell. |
| US09325193B2 |
Apparatus and method for accurate energy device state-of-charge (SoC) monitoring and control using real-time state-of-health (SoH) data
A device and associated testing method for empirically determining the state-of-charge of an electrochemical energy device, comprising: applying electrical excitations to the energy device at a predetermined electrical excitation frequency ωe; applying mechanical excitations to the energy device at a predetermined mechanical excitation frequency ωm; measuring an electrically-induced phase difference Δθe(ωe) between voltage (V) and current (I) within the energy device from applying the electrical excitations; measuring a mechanically-induced phase difference Δθe(ωm) between voltage (V) and current (I) within the energy device from applying the mechanical excitations; and deducing the empirical real-time state-of-health of the energy device by comparing the electrically-induced phase difference Δθe(ωe) with the mechanically-induced phase difference Δθe(ωm); and using the deduced state of health to determine the state of charge. |
| US09325189B2 |
Battery, and method, device, and system for battery protection
A battery for electronic equipment includes: a rechargeable power supply; and a battery chip, wherein: the rechargeable power supply is configured to supply power to the electronic equipment; and the battery chip is configured to detect whether the rechargeable power supply has started to supply power to the electronic equipment and, if a detection result is that the rechargeable power supply has started to supply power to the electronic equipment, transmit a customized signal to the electronic equipment through a predetermined transmitting pin. |
| US09325188B2 |
Power recovery controller
The inventive subject matter provides a circuit and a method for efficiently charging a battery. In one aspect of the invention, the circuit includes an oscillator that generates a series of current pulses at a frequency that corresponds to a resonant frequency of the battery. In some embodiments, the series of current pulses includes constructive resonant ringing that is constructive with respect to the charging of the battery. The constructive resonant ringing includes decaying oscillation of currents generated in response to a current pulse. |
| US09325181B2 |
Battery overcharge monitoring system and method
An exemplary battery charge monitoring method includes, among other things, calculating expected charge data for a battery using at least a capacity of the battery and a charge rate, and comparing actual charge data to the expected charge data to identify differences between the actual charge data and the expected charge data. |
| US09325180B2 |
USB power supply
A power supply system effective to provide power to a plurality of different personal electronic devices includes a source of AC or DC power, a power converter effective to convert the AC or DC power to a useable voltage and amperage, a remote power outlet or a plurality of remote power outlets each configured to receive one or more connectors and a signal decoder. The signal decoder determines the requirements of a connected one of the personal entertainment devices and personal computing devices and apply the requirements to the power outlet for powering the device. |
| US09325179B1 |
Apparatus for generating a voltage surge from low voltage batteries that are charged in parallel and discharged in series
Apparatus for generating a voltage surge which can be in the form of a voltage pulse. More specifically, the invention is an apparatus in which low voltage sources charge in parallel and discharge in series to generate a voltage sufficient to drive devices such as, but not limited to, a solenoid. The low voltage sources can be rechargeable batteries such as, but not limited to, 1.5 V or 9 V batteries or a combination of different voltage rechargeable batteries. The apparatus comprises one or more modules in which a battery is directed to charge in parallel but discharge in series. The switch-over from charging to discharging is by means of transistors in each module that cause the modules to discharge in unison thereby creating a voltage surge which can be in the form of a voltage pulse. |
| US09325175B2 |
Phase angle drift method for loss of mains/grid protection
A phase angle drift method for loss of mains/grid protection is disclosed. According to one aspect, an accumulated electrical phase angle drift derived from the difference between the current measured local frequency and the estimated frequency using historical data is compared to an angle threshold. An estimated grid frequency may be calculated based on the historical delay, and the window, over which the estimated frequency is calculated. An addition/subtraction of a phase angle offset value is calculated for a half cycle is performed when the frequency difference between the estimated frequency fnest and the measured frequency fn is greater or equal to a first determined value. |
| US09325173B2 |
Utilization of distributed generator inverters as STATCOM
The invention provides a method and system for operating a solar farm inverter as a Flexible AC Transmission System (FACTS) device—a STATCOM—for voltage control. The solar farm inverter can provide voltage regulation, damping enhancement, stability improvement and other benefits provided by FACTS devices. In one embodiment, the solar farm operating as a STATCOM at night is employed to increase the connectivity of neighboring wind farms that produce peak power at night due to high winds, but are unable to connect due to voltage regulation issues. The present invention can also operate during the day because there remains inverter capacity after real power export by the solar farm. Additional auxiliary controllers are incorporated in the solar farm inverter to enhance damping and stability, and provide other benefits provided by FACTS devices. |
| US09325172B2 |
Power supply control apparatus and method for controlling the same
A power supply control apparatus comprises a receiving unit configured to receive data sent from an external device via a network, a control unit configured to process the data received by the receiving unit, a switching unit configured to switch between supply and disconnection of power from a first power supply unit to the receiving unit and to the control unit, and a mechanical switch configured to switch between supply and disconnection of power from a second power supply unit to the control unit. If the apparatus receives data from the external device in a power state in which power is supplied from the first power supply unit to the receiving unit and power to the control unit is stopped, the apparatus controls to supply power from the first power supply unit to the control unit without turning on the mechanical switch. |
| US09325168B2 |
Semiconductor device
Disclosed is a semiconductor device that includes an N-channel MOS transistor and a control voltage generation circuit. The N-channel MOS transistor controls the supply of a power supply voltage obtained by stepping down a DC voltage. The control voltage generation circuit clips the gate voltage of the N-channel MOS transistor at a control voltage not higher than a predetermined voltage in accordance with the DC voltage. |
| US09325167B2 |
Method, system, and apparatus for providing arc flash mitigation
A power equipment protection system is provided. The power equipment protection system includes a first trip unit configured to monitor a first circuit, a second trip unit configured to monitor a second circuit that is downstream from the first circuit, an arc-flash (AF) sensor configured to detect an arc flash, an AF mitigation device, at least one current sensor, and a controller. The power equipment protection system is operable in a first mode and a second mode, wherein in the first mode, the controller is configured to activate the AF mitigation device based on signals generated by both the AF sensor and the at least one current sensor, and wherein in the second mode, the controller is configured to activate the AF mitigation device based on signals generated by at least one of the at least one current sensor and the AF sensor. |
| US09325162B2 |
Ganged electrical fittings with integral cover plate and method of use thereof
A ganged electrical fitting having an integral cover plate and two or more electrical components, such as a switch, a receptacle, an outlet, a fan switch, a dimmer and combinations thereof, the ganged electrical component/cover plate being secured via screws through the cover plate into a wall box. Electrical component wires are secured to power wires coming from the wall box via quick-connectors or wirenuts. |
| US09325161B2 |
Universal electrical receptacle cover
A universal receptacle cover for an electrical receptacle is provided. The universal receptacle cover includes a base, a neck supported by the base, and a cap coupled to the neck, the cap moving between an open configuration and a closed configuration. In some cases, a portion of the universal receptacle cover consists essentially of a material transparent to visible light. In some cases, the universal receptacle cover is sized and shaped to completely cover standard electrical receptacles when the cap is in the closed configuration. |
| US09325156B2 |
Spark plug
A spark plug wherein an outer diameter of a first face that is a gap foliating face of the center electrode tip is denoted as R1, an outer diameter of a second face that is a gap forming face of the ground electrode tip is denoted as R2, a length of the gap is denoted as G1, and an average distance of a distance between an end in the first direction of the first face and an end in the first direction of the second face and a distance between an end in the second direction of the first face and an end in the second direction of the second face is denoted as G2, R1 |
| US09325155B2 |
Lightning protection apparatus
A lightning protection apparatus is provided, including a substrate and multiple passive elements, where multiple paired first electrical contacts and multiple paired second electrical contacts are disposed on the surface of the substrate, each pair of first electrical contacts is disposed to form a gap with an adjacent pair of second electrical contacts, and the passive element is separately coupled between each pair of the first electrical contacts and each pair of the second electrical contacts, so that a discharging gap is formed between a passive element on a pair of the first electrical contacts and a passive element on a pair of the second electrical contacts adjacent to the pair of the first electric contacts. |
| US09325152B2 |
Raman distributed feedback fiber laser and high power laser system using the same
A Raman distributed feedback (DFB) fiber laser is disclosed. It includes a pump source and a Raman gain fiber of a length smaller than 20 cm containing a distributed feedback (DFB) grating with a discrete phase structure located within no more than 10% off the center of the grating and wherein the Raman DFB fiber laser generates a laser signal with an optical spectrum, which has an optical bandwidth at half maximum optical intensity of less than 1 gigahertz (GHz) (wherein a maximum intensity frequency is different from the frequency of the pump laser). The Raman laser includes compensation for the nonlinear phase change due to Kerr effect and thermal effect resulting from absorption of the optical field, thus enhancing the conversion efficiency. |
| US09325150B2 |
Alignment system and extreme ultraviolet light generation system
An alignment system for a laser apparatus includes a guide laser device outputting a guide laser beam, an adjusting mechanism adjusting travel directions of the guide laser beam and a laser beam from the laser apparatus, a beam path combiner controlling travel directions of the laser beam and the guide laser beam to substantially coincide with each other, a first optical detection unit provided from the beam path combiner detecting the laser and guide laser beams, a first controller controlling the adjusting mechanism based on a first optical detection unit detection result, a beam steering unit downstream from the beam path combiner controlling travel directions of the laser and guide laser beams, a second optical detection unit downstream from the beam steering unit detecting the guide laser beam, and a second controller controlling the beam steering unit based on a second optical detection unit detection result. |
| US09325149B2 |
Multi-beam combining apparatus
A multi-beam combining apparatus includes a phase shifting section, a superposing section, an observing section and a phase control section. The phase shifting section generates a plurality of phase-shifted laser beams by shifting the phase of each of the plurality of laser beams. The superposing section generates a plurality of superposed laser beam by superposing the reference laser beam and each of the plurality of phase-shifted laser beams. The observing section generates interference pattern data of a spatial interference pattern which appears when observing each of the superposed laser beams. The phase control section carries out a feedback control of the phase shifts in the phase shifting section based on the interference pattern data obtained for every superposed laser beam, and thereby sets the plurality of phase-shifted laser beams to desired states. |
| US09325147B2 |
Method and apparatus for generating laser
Disclosed herein is an apparatus for generating a laser. The apparatus includes, on an upper surface of a PCB, a display unit (50) which displays a charge state and an intensity of laser, a switch unit (60) which control power, the intensity of the laser and the emission of the laser, a safety unit (80) which includes contact point parts, and a control unit (70). The apparatus includes, on a rear surface of the PCB, a reflector (10) which has first and second spaces, a xenon tube (12) which emits light, a crystal rod (11) which amplifies the light to generate a laser, a focusing lens (15) which focuses the laser and forms a focus, a focusing lens installation part (13), a capacitor (20) which applies voltage to the xenon tube, a drive unit (90) which charges the capacitor, and a battery (30) which supplies power to the drive unit. |
| US09325143B2 |
Excimer laser composite cavity
Disclosed is an excimer laser composite cavity, comprising a laser discharge cavity, a laser output module, a line-width narrowing module, and a laser amplification module. The laser discharge cavity contains work gas for generating laser when it is activated by an excitation source. The laser discharge cavity, the laser output module, and the line-width narrowing module constitute a line-width narrowing cavity configured to narrow down a line-width of the laser generated by the work gas. The laser discharge cavity, the laser output module, and the laser amplification module constitute an amplification cavity configured to amplify power of the laser with the line-width having been narrowed down by the line-width narrowing cavity. |
| US09325139B2 |
Cooling laser gas
A cooling arrangement for cooling laser gas for a gas laser includes a first cooling circuit having a first cooling assembly and a first heat exchanger for cooling laser gas which flows from a fan to a resonator of the gas laser, and a second cooling circuit which is independent of the first and which has a second cooling assembly and a second heat exchanger for cooling laser gas which flows from the resonator to the fan. The second cooling circuit has at least one additional heat exchanger for additionally cooling the laser gas which flows from the fan to the resonator. |
| US09325136B2 |
Coaxial cable compression tool
A tool for compressing a connector onto a coaxial cable includes a pair of gates, a plunger for compressing the connector against the gates and onto the coaxial cable, and an actuator in communication with the gates and the plunger. When the actuator is moved from a first position to a second position, it causes the gates to move from an open to a closed position in which they retain the coaxial cable and brace the connector, and the plunger moves from a first position to a second position in which it engages the connector to compress the connector against the gates and onto the coaxial cable. When the actuator is moved back to its first position, the gates move to their open position thereby releasing the coaxial cable and the plunger moves to its first position thereby disengaging from the connector. |
| US09325127B2 |
Patch panel structure
A patch panel structure includes a circuit board, a plurality of first RJ45 sockets, and a plurality of second RJ45 sockets. The circuit board has a first end and a second end opposite to each other. A plurality of first conducting points are formed at the first end. A plurality of second conducting points are formed at the second end. Each of the first RJ45 sockets forms a first interface and is electrically connected to each of the first conducting points. Each of the second RJ45 sockets forms a second interface, is electrically connected to each of the second conducting points, and is disposed in a parallel and symmetrical manner with respect to each of the first RJ45 sockets. Each of the first interfaces of the first RJ45 sockets is disposed in a back-to-back and spaced-apart manner with respect to each of the second RJ45 sockets. |
| US09325126B2 |
Direct attach media converter
A direct attach media converter is provided. The direct attach media converter comprises a media converter module, a connecting wire and a pluggable transceiver module. The media converter module is configured to transform a RJ-45 interface signal into a pluggable transceiver module interface signal or transform a pluggable transceiver module interface signal into a RJ-45 interface signal. The connecting wire is directly connected to the media converter module and is configured to transmit the pluggable transceiver module interface signal. The pluggable transceiver module is electrically connected to the connecting wire and is configured to receive and transmit the pluggable transceiver module interface signal. |
| US09325123B2 |
Electrical connector with detecting contacts
An electrical connector (100) includes an insulative housing (1) and a plurality of detecting contacts (5) mounted into the insulative housing (1). The insulative housing (1) includes a base portion (11) and a tongue plate (12) extending from the base portion (11). The detecting contacts (5) include two first detecting contacts (51). The base portion (11) defines a receiving cavity (1130) passing through the base portion along an upper to down direction. The base portion includes a resisting portion (1152) disposed behind the receiving cavity. Each of the first detecting contacts includes a first main portion (512) received in the receiving cavity and a first contacting portion (511) extending from the first main portion forwardly. The resisting portion (1152) supports the first main portion (512) forwardly to prevent the first detecting contact from being pushed and dropping from the electrical connector when a plug connector is inserted. |
| US09325118B2 |
Electrical connector having capacitor with low cross talk
An electrical connector includes an insulative housing having a plurality of walls formed a plurality of passageways thereof, a plurality of contacts received in the passageways, and a capacitor series connecting with the contact. |
| US09325117B1 |
Pin structure of modular jack
A pin structure of a modular jack has eight resilient pins. The two intermediate resilient pins have two electrically conducting segments vertically spaced apart and are each wide and have two electrically contacting segments transversely spaced apart and are each slender, whereas the other resilient pins are transversely and consecutively spaced apart and disposed on two sides of the two intermediate resilient pins and are each slender. The electrically fixing ends of the first, third, fifth, seventh resilient pins lie in a first straight line. The electrically fixing ends of the second, fourth, sixth, eighth resilient pins lie in a second straight line. The first and second straight lines are spaced apart and lie on the same plane. The resilient pins have V-shaped electrically contacting portions lying in a third straight line. Hence, the pin structure of a modular jack reduces crosstalk and loss and thereby meets strict standards. |
| US09325116B2 |
Connector assembly
A connector assembly comprises a first connector and a second connector. The second connector is mateable with the first connector under any one of a normal state and a reversed state. The first connector comprises a first guide portion and a second guide portion while the second connector comprises a first normal guided-portion, a second normal guided-portion, a first reversed guided-portion and a second reversed guided-portion. When the second connector is mated with the first connector under the normal state, the first normal guided-portion and the second normal guided-portion are guided by the first guide portion and the second guide portion, respectively. When the second connector is mated with the first connector under the reversed state, the first reversed guided-portion and the second reversed guided-portion are guided by the first guide portion and the second guide portion, respectively. |
| US09325114B2 |
Plug connector
A plug connector for cooperation with a socket connector (9) comprises a plug housing (2) having latch arms (22) with an end lug (29) for cooperation with an appropriate groove (95) in the socket connector (9), and being formed with a pair of split cross ribs (26) forming a gap (26a) therebetween. A CPA member (5) is provided for locking the connectors (1, 9) when mated, and comprises a pair of locking legs (50) and a pair of spring arms (53). The spring arms (53) each has a free end lug (54) and a nose (55) which projects inwardly so that, when the CPA member (5) and the plug connector (1) are in a pre-locked position, the nose (55) takes a short distance (d) to a support surface (20a) of the connector housing (20), and when there is a load well in excess of the mating a force onto the CPA member (5) in this condition, the noses (55) make a stop on the support surface (20a) to keep the CPA member (5) in the pre-locked position. When there is an excessive force placed on the CPA member, the spring arms (53) may slip into the gaps (26a) to prevent damaging of the CPA member (5). |
| US09325113B2 |
Connector arrangement with self aligning features
The present invention relates to a connector arrangement including a plug connector and a socket connector that may be suited for use with an electronically adjustable damper of an automobile. The socket connector is rotatably arranged in a socket connector housing and has an outer casing. The outer casing includes a guideway formed therein that is configured to receive a corresponding guide element of the plug connector. The guideway has a funnel shaped portion configured to receive the guide element. The guide element rotates the socket connector into a correctly aligned orientation with regard to the plug connector upon contacting the funnel shaped portion when the plug connector is inserted into the socket connector. |
| US09325107B2 |
Electrical connector assembly for neural monitoring device and method of using same
An electrical connector assembly comprising an electrode interface board with a socket portion of a subminiature dual-row electrical connector attached to the top surface of a first printed circuit board and a first plurality of magnets attached to the bottom surface. The socket portion comprises a plastic housing and a plurality of female contacts with protruding contact points. The connector assembly further comprises a head stage with a top socket, connector and a second printed circuit board. A plug portion of the electrical connector is attached to the bottom surface of the second printed circuit board and a second plurality of magnets is attached to the bottom surface. The plug portion comprises a plastic housing and a plurality of male contacts with detents. The male contacts mate with the female contacts so that the protruding contact point of each female contact touches an inside distal surface of a male contact. |
| US09325105B1 |
Electrical plugs with integrated strain relief and method of manufacture
Overmolded electrical plugs with integrated strain relief are disclosed. The strain relief may have multiple protrusions extending though the overmolded housing which are visible to users. The strain relief may employ a ratcheting mechanism which permanently secures the strain relief on the electrical power cord. The strain relief may be partially assembled in a pre-lock configuration on the electrical power cord where the strain relief may be positioned on the power cord, and then be further pressed to a locked configuration in which the is securely attached to the power cord. The strain relief is self-aligned on the electrical plug during an assembly process. |
| US09325099B2 |
Coupling system including a receptacle housing with a rotating domed door
Coupling system housings including a receptacle housing with a domed protective door and a male coupler housing that may be used to actuate the receptacle housing door are disclosed. The receptacle housing may be mounted in a receiving structure. The receptacle housing is configured with a dome-shaped door that conceals and protects the connectors of an assembled receptacle when in the closed position. The receptacle housing also includes a biasing mechanism that urges the door to a closed position and maintains the door in its closed position when a male coupler is not mated to the receptacle. The male coupler housing is configured with an ergonomic handle suitable for one handed operation of the male coupler. The male coupler housing may be used to actuate the receptacle housing door during insertion and mating of and assembled male coupler to an assembled receptacle. |
| US09325095B2 |
Female type contact for an electrical connector
A female contact is provided for an electrical connector. The female contact includes a body portion and a plurality of flexible beams that extend from the body portion. The body portion is biased for engagement with a connector housing. The flexible beams taper from a first width this is near the body portion to a second width that is smaller than the first width. |
| US09325094B2 |
Device for powering battery dependent equipment with AC power
A device for powering battery dependent equipment with AC power includes faux batteries that correspond with standard and non-standard battery sizes and configurations; cables; and a means for connecting the faux batteries to an outlet. Instead of inserting batteries into the battery compartment of equipment, a user inserts the faux batteries, plugs the inventive device into a wall socket, and uses the device as usual. A variety of different configurations and components ensure safety and deliver the desired output. |
| US09325090B2 |
Card edge connector with a metal member
A card edge connector includes an insulative housing, a number of contacts retained in the insulative housing and an ejector retained the insulative housing to lock an electronic card. The insulative housing includes a central slot for receiving the electronic card and two end portions located on opposite sides of the central slot respectively. The card edge connector also includes a metal member located on the end portion of the insulative for electrically connecting to the metal member. Thus, The card edge connector having a higher electrical function. |
| US09325085B2 |
Connection structure of electric wire and terminal, and manufacturing method thereof
A connection structure of an electric wire and a terminal includes the electric wire, the terminal, and a seal part. The electric wire has an insulating coated part in which a conductor part is covered with an insulating material, and a conductor exposed part in which the insulating material of an end of the electric wire is removed. The terminal includes a first crimp part crimped to the insulating coated part, and a second crimp part crimped to the conductor exposed part. The seal part is made of thermoplastic elastomer and covers a surface including the first crimp part and the insulating coated part of a side extending from said first crimp part toward a direction opposite to the end of the electric wire and a surface of the second crimp part in an extension direction of the electric wire. |
| US09325082B2 |
Crimped terminal for coaxial cable
A shield terminal includes a braided part crimping member. The shield terminal is connected to a coaxial cable including a core wire, an insulator covering an outer periphery of the core wire, a braided part covering an outer periphery of the insulator and an outer jacket covering an outer periphery of the braided part. The braided part crimping member is crimped with and encloses a braided part exposing portion which is formed by removing the outer jacket to expose the braided part. A wall part of the braided part crimping member which comes into direct contact with the braided part is formed with a round hole so that a part of the braided part enters the round hole in a state where the braided part crimping part is crimped with the braided part exposing portion. |
| US09325078B2 |
Node for high-rise building coverage
The present invention relates to a communication node (1) comprising at least one antenna arrangement (2) with two horizontal and two vertical array antennas. A first horizontal antenna port (4) and a second vertical antenna port (10) are connected to a first polarization (P1). A first vertical antenna port (8) and a second horizontal antenna port (6) are connected to an orthogonal second polarization (P2). Each port is connected to corresponding antenna elements. Said first horizontal antenna port (4) and said first vertical antenna port (8) are connected in phase. Said second horizontal antenna port (6) and said second vertical antenna port (10) are connected with opposite phases. A plurality of antenna element symmetry pairs (11a, 12a; 11b, 12b; 11c, 12c; 11d, 12d; 13a, 14a; 13b, 14b; 13c, 14c; 13d, 14d) are formed with respect to a common symmetry point (15). Certain weights are applied to the antenna elements of each symmetry pair, where a weight for a certain polarization (P1, P2) in an antenna element in a symmetry pair comprises the complex conjugated weight for an orthogonal polarization (P2, P1) in the other antenna element in the symmetry pair. |
| US09325076B2 |
Antenna for wireless device
An antenna for a wireless device includes a low band left-handed (LBLH) mode element and a low band right-handed (LBRH) mode element both operable in a low frequency bandwidth and a high band left-handed (HBLH) mode element and a high band right-handed (HBRH) mode element both operable in a high frequency bandwidth. The LBLH mode element is capacitively coupled to a feed of the antenna and is inductively coupled to a ground of the antenna. The LBRH mode element is electrically coupled to the feed of the antenna. The HBLH mode element is capacitively coupled to the feed of the antenna and is inductively coupled to the ground of the antenna. The HBRH mode element is electrically coupled to the feed of the antenna. At least one tuning element is operatively coupled to at least one of the mode elements. |
| US09325075B1 |
Antennae formed using integrated subarrays
An antenna subarray is disclosed that includes a main board comprising a first substrate, a patterned conductive layer coupled to the first substrate, and a first antenna element coupled to the first substrate. The subarray also includes at least one ancillary board comprising a second substrate coupled to and extending outward from the first substrate and a second antenna element coupled to the second substrate and coupled through a soldered connection to the patterned conductive layer. |
| US09325074B2 |
Coaxial waveguide antenna
Processes and systems for radiating electromagnetic energy from an open-ended coaxial cavity are described herein. An antenna assembly includes an open-ended coaxial radiator. The coaxial assembly includes an inner electrically conducting surface and an outer conductive surface spaced apart from and opposing the inner electrically surface. More than one radially aligned electromagnetic coupling modules are positioned at least partially within the coaxial waveguide along different rotation angles. Each of the different electromagnetic coupling modules samples a local electric field, amplifies the sampled field, and alters a phase of at least one of the amplified fields. The amplified, phase-adjusted coaxial fields are radiated from an open end of the coaxial cavity. Although described for transmission mode, the structure can be operated in receive mode by similarly detecting radiated electric fields, amplifying and applying a phase offset, and radiating the amplified, phase offset fields into an open-ended coaxial cavity. |
| US09325073B2 |
Apparatus for assembling different categories of multi-element assemblies to predetermined tolerances and alignments using a reconfigurable assembling and alignment apparatus
Systems and methods for assembling different multi-element items with different specifications using a reconfigurable apparatus are provided. One embodiment includes a base plate, a back plate coupled to the base plate in a predetermined angle relationship. The exemplary back plate comprises a plurality of alignment pins adapted to engage with alignment locations of multiple element assembly items. The exemplary base plate and alignment mounting structures couple to end cap parts disposed on opposing ends of the multiple element assembly items holding the items together. A clamping mechanism maintains/releases pressure on the multiple element assembly items against the back plate. The back plate holds alignment pins in a first back plate location in a first orientation for one type of multiple element assembly items and hold the alignment pins in a second location when the back plate is in a second orientation for a different type of multiple element assembly items. |
| US09325068B2 |
Broadband antenna device
An antenna device is provided. The antenna device comprises a first radiation portion and a second radiation portion. The first radiation portion includes a first end and a second end. The second radiation portion is connected to the first end at a connecting part and includes a first arm and a second arm. The first arm and the second arm have different lengths and extend from the connecting part. |
| US09325067B2 |
Tunable multiband multiport antennas and method
An antenna, comprising a plurality of feed points and tuning elements for tuning a resonant frequency at each feed point independently of the others of the plurality of feed points. The tuning elements are placed on the configured radiating element such that for a given feed point its tuning element is placed on the configured radiating element where a current distribution of the other feed points is a minimum. |
| US09325066B2 |
Communication device and method for designing antenna element thereof
A communication device including a ground plane and an antenna element is provided. An edge of the ground plane is embedded with a notch, which has at least a first edge and a second edge. The antenna element, disposed at the notch, has at least a first operating frequency band and a second operating frequency band. The antenna element includes a first conductive portion and a second conductive portion. The first conductive portion has a starting terminal, electrically coupled to the first edge of the notch through a signal source, as a feeding terminal of the antenna element. A capacitive coupling portion is formed between an end terminal of the first conductive portion and the ground plane. The second conductive portion has a shorting terminal electrically coupled or connected to the second edge of the notch. |
| US09325064B2 |
Mobile terminal
A mobile terminal that includes a first antenna element disposed in proximity to a first side of the mobile terminal, a second antenna element disposed in proximity to a second side of the mobile terminal, and a third antenna element disposed in proximity to a third side of the mobile terminal. The mobile terminal further including a switching mechanism that switches between a first connection mode in which the first and second antenna elements are feed elements and the third antenna element is a parasitic element, and a second connection mode in which the first and third antenna elements are feed elements, and a control unit that controls the switching mechanism to switch between the first connection mode and the second connection mode in accordance with a predetermined condition. |
| US09325063B2 |
Radiation pattern insulator and multiple antennae system thereof and communication device using the multiple antennae system
A radiation pattern insulator and an antennae system thereof are proposed. The radiation pattern insulator includes a dielectric substrate and a plurality of radiation pattern insulation elements. The dielectric substrate allocated between a plurality of antennae includes a top surface and a bottom surface, and a normal direction of the dielectric substrate is substantially perpendicular to propagation directions of electromagnetic waves radiated from the antennae. In addition, the radiation pattern insulation elements are allocated on the top surface or the bottom surface of the dielectric substrate, or alternatively, all allocated on the top surface and the bottom surface. |
| US09325061B2 |
Antenna radome with removeably connected electronics module
In one embodiment, an antenna assembly in a cellular network has a radome that houses a plurality of antenna arrays and an electronics module. The electronics module has a weatherproof housing that encloses electronics for processing signals received by and transmitted from a first of the antenna arrays. The electronics module is physically removeably connected to an outer surface of the radome and electrically removeably connected to the first antenna array, such that the electronics module can be removed without (i) disrupting service to other antenna arrays and (ii) removing the antenna assembly from the cell tower on which the antenna assembly is installed. |
| US09325060B2 |
Methods and apparatus for conductive element deposition and formation
A conductive element such as an antenna, for use in electronic devices, including mobile devices such as cellular phones, smartphones, personal digital assistants (PDAs), laptops, and wireless tablets. In one exemplary aspect, the present disclosure relates to a conductive antenna formed using deposition of conductive fluids as well as the method and equipment for forming the same. In one embodiment, a “thick” antenna element can be formed in one pass of a dispensing head or nozzle, thereby reducing manufacturing cost and increasing manufacturing efficiency. |
| US09325056B2 |
Radiation efficient integrated antenna
An apparatus includes a dielectric slab having first and opposing second major surfaces. A planar antenna element is located on the first major surface. A via formed through the dielectric slab is conductively connected to the antenna element. A plurality of solder bump pads is located on the second major surface and is configured to attach the dielectric slab to an integrated circuit. |
| US09325046B2 |
Multi-mode filter
The present invention provides a multi-mode cavity filter in which signals are coupled to or from a resonator body, using a coupling path with first and second portions arranged such that current flows in opposite directions and the couplings due to the magnetic fields generated partially cancel one another. In this way, the degree of coupling to any particular mode of the filter can be closely controlled by varying the length and/or orientation of the portions with respect to each other. |
| US09325038B2 |
Temperature controlling system and method for battery
The present invention provides a temperature controlling system for a battery in an energy storage system, the temperature controlling system including: a converter comprising a plurality of switches and a converter inductor, the converter being configured to increase or decrease a voltage of the battery; a DC linker comprising first and second capacitors that are coupled in series and configured to stabilize an output voltage of the converter; and an inverter comprising a plurality of switches and an inductor, the inverter being configured to invert an input voltage, wherein the inverter further comprises a switch coupled between a terminal of the inductor and a first node between the first and second capacitors of the DC linker to provide a current from the inductor to the battery. |
| US09325036B2 |
Molten salt-containing metal electrode for rechargeable oxide-ion battery cells operating below 800°C
A rechargeable oxide-ion battery cell 20, operating below 800° C., containing a molten salt-containing electrode 22, made of active metal-active metal oxide-active metal salt; which electrode is associated with an electrolyte 24 and an air electrode 26 to provide the cell 20. |
| US09325035B2 |
Non-aqueous electrolyte and lithium secondary battery using the same
The present invention provides non-aqueous electrolyte solution for a lithium secondary battery, comprising an ester-based compound having a branched-chain alkyl group and an ester-based compound having a straight-chain alkyl group; and a lithium secondary battery using the same. |
| US09325034B2 |
Secondary battery with organic electrolytic solution
Disclosed herein is a highly reliable secondary battery with organic electrolytic solution. The secondary battery has a set of plates for the positive and negative electrodes, with a separator interposed between them, and an organic electrolytic solution composed of an organic solvent and an electrolyte dissolved therein. The organic electrolytic solution contains polyethylene glycol and bis-(3-Sulfopropyl)disulfide. |
| US09325033B2 |
Sodium-metal chloride secondary battery and method of manufacturing the same
There are provided a sodium-metal chloride secondary battery and a method of manufacturing the same. A secondary battery that is operated at room temperature and has a more stable electrochemical characteristic is provided. The present invention provides a sodium-metal chloride secondary battery and a method of manufacturing the same. The battery includes an anode made of a sodium-containing inorganic material, an electrolytic solution containing an electrolyte (NaAlCl4) and a solvent (sulfur dioxide), and a cathode including a carbon-based material in which NaCl is generated and decomposed according to an oxidation-reduction reaction of NaAlCl4-xSO2 and a metal chloride (CuCl2). |
| US09325032B2 |
Electrode assembly, battery and device including the same
The present disclosure relates to an electrode assembly formed by stacking a plurality of electrode units, the electrode assembly including: two or more steps formed by stacking three or more types of the electrode units having different areas, wherein an array of electrode units having a maximum area among the electrode units is positioned in the interior of the electrode assembly, and electrodes having different polarities face each other at an interface between the electrode units having different areas. |
| US09325025B2 |
Membrane electrode assemblies and fuel cells with long lifetime
The present invention relates to improved membrane electrode assemblies and fuel cells with long lifetime, comprising two electrochemically active electrodes separated by a polymer electrolyte membrane based on polyoxazoles. |
| US09325024B2 |
Gas decomposition component, method for producing gas decomposition component, and power generation apparatus
Provided are a gas decomposition component, a method for producing a gas decomposition component, and a power generation apparatus. A gas decomposition component 10 includes a cylindrical-body MEA 7 including a first electrode 2 disposed on an inner-surface side, a second electrode 5 disposed on an outer-surface side, and a solid electrolyte 1 sandwiched between the first electrode and the second electrode; and a porous metal body 11s inserted on the inner-surface side of the cylindrical-body MEA and electrically connected to the first electrode, wherein the gas decomposition component further includes a porous conductive-paste-coated layer 11g formed on an inner circumferential surface of the first electrode, and a metal mesh sheet 11a disposed on an inner circumferential side of the conductive-paste-coated layer, and an electrical connection between the first electrode and the porous metal body is established through the conductive-paste-coated layer and the metal mesh sheet. |
| US09325023B2 |
Method for manufacturing membrane-electrode assembly for polymer electrolyte fuel cell and membrane-electrode assembly manufactured thereby
The present invention provides a method for manufacturing a membrane-electrode assembly for a polymer electrolyte fuel cell, in which the glass transition temperature of an electrolyte membrane is reduced using a hydrophilic solvent, and a membrane-electrode assembly for a polymer electrolyte fuel cell, manufactured by the method. In the method of the invention, the glass transition temperature of the electrolyte membrane to which a catalyst is transferred is reduced compared to that in a conventional method for manufacturing a membrane-electrode assembly for a polymer electrolyte fuel cell using the decal process. Thus, even to an electrolyte membrane material having a relatively high glass transition temperature, the catalyst may be transferred at a rate of 100% at a temperature of about 120° C., at which hot pressing is carried out. Thus, the problems associated with electrolyte membrane deterioration occurring in conventional methods can be solved. |
| US09325017B2 |
Method for controlling ionomer and platinum distribution in a fuel cell electrode
One embodiment of the invention includes a method including applying a first ink comprising carbon over a substrate and drying the first ink to form a first electrode layer, applying a second ink including a second catalyst over the first electrode layer and drying the second ink to form a second electrode layer, and applying a third ink comprising an ionomer solution over the second electrode layer and drying the third ink to form an ionomer overcoat. |
| US09325016B2 |
Porous electrode substrate and process for production thereof, porous electrode substrate precursor sheet, membrane-electrode assembly, and polymer electrolyte fuel cell
Provided are: a porous electrode substrate which has excellent handling properties and surface smoothness and satisfactory gas permeability and electrical conductivity, and enables the reduction of damage to a polymer electrolyte membrane when integrated into a fuel cell; and a process for producing the porous electrode substrate. Specifically provided are: a porous electrode substrate comprising a three-dimensional structure (Y-1) produced by bonding short carbon fibers through carbon and a three-dimensional structure (Y-2) produced by bonding short carbon fibers through carbon, wherein the three-dimensional structures (Y-1) and (Y-2) are layer stacked on and integrated with each other, the short carbon fibers form a three-dimensional entangled structure in the structure (Y-1), and the short carbon fibers do not form a three-dimensional entangled structure in the structure (Y-2); a process for producing the electrode base material; a precursor sheet for producing the electrode base material; a membrane-electrode assembly which involves the electrode base material; and a polymer electrolyte fuel cell. |
| US09325011B2 |
Cathode active material for lithium secondary battery
Disclosed herein is a cathode active material for a lithium secondary battery, including lithium transition metal oxide, where the lithium transition metal oxide is coated with carbon particles and a polymer resin at a surface thereof, and the polymer resin is a substance inactivated by an electrolyte for a lithium secondary battery and an organic solvent and has a melting point of at least 80° C. A lithium secondary battery having the disclosed cathode active material has advantages of improving rate properties and high temperature stability, so as to provide excellent cell characteristics. |
| US09325007B2 |
Shadow mask alignment and management system
A magnetic handling assembly for thin-film processing of a substrate, a system and method for assembling and disassembling a shadow mask to cover a top of a workpiece for exposure to a processing condition. The assembly may include a magnetic handling carrier and a shadow mask disposed over, and magnetically coupled to, the magnetic handling carrier to cover a top of a workpiece that is to be disposed between the shadow mask and the magnetic handling carrier when exposed to a processing condition. A system includes a first chamber with a first support to hold the shadow mask, a second support to hold a handling carrier, and an alignment system to align the shadow mask a workpiece to be disposed between the carrier and shadow mask. The first and second supports are moveable relative to each other. |
| US09324998B2 |
Method for manufacturing of slurry for production of battery film
The present invention relates to a method for manufacturing slurry for coating of electrodes for use in lithium ion batteries, wherein the method comprises mixing active materials with a binder into a binder solution, and adding an organic carbonate to the binder solution to generate the slurry. The present invention also relates to a method for manufacturing electrodes for a lithium battery cell, wherein the method comprises mixing active materials with a binder into a binder solution, adding an organic carbonate to the binder solution to generate slurry, wherein the above adding step is carried out at temperature above melting temperature of the organic carbonate, coating electrode material with the slurry, drying the coating on the electrode material by drying the organic carbonate, and surface treatment of the slurry so that the electrode is prepared for use in a lithium ion battery cell. Further, the invention also relates to a method for manufacturing a lithium ion battery cell. |
| US09324993B2 |
Lithium-ion cell and energy density thereof
A lithium-ion cell can include at least one electrode that includes packed active electrode particles that include a multimodal particle size distribution (PSD) and a packing density, for example, greater than approximately 0.56. Various other apparatuses, systems, methods, etc., are also disclosed. |
| US09324992B2 |
Hybrid radical energy storage device and method of making
Hybrid radical energy storage devices, such as batteries or electrochemical devices, and methods of use and making are disclosed. Also described herein are electrodes and electrolytes useful in energy storage devices, for example, radical polymer cathode materials and electrolytes for use in organic radical batteries. |
| US09324989B2 |
Rechargeable battery including external short-circuit member
A rechargeable battery includes: an electrode; a case accommodating the electrode assembly therein; a cap plate closing an opening of the case; a first electrode terminal and a second electrode terminal extending through the cap plate and coupled to the electrode assembly; and an external short-circuiter including a membrane closing and sealing a short-circuit opening in the cap plate and coupled to the second electrode terminal, and a short-circuit tab coupled to the first electrode terminal and separated from the membrane, wherein the cap plate includes a bending inducement groove formed at the second electrode terminal. |
| US09324988B2 |
Rechargeable battery
A rechargeable battery including: an electrode assembly including a negative electrode and a positive electrode; a case receiving the electrode assembly; a terminal electrically connected to the electrode assembly and protruding outside the case; a current collecting member electrically connecting the terminal and the electrode assembly to each other; and an insulating member partially enclosing the current collecting member, and the current collecting member includes a plurality of fuse parts including a first fuse part enclosed by the insulating member, and a second fuse part that is not enclosed by the insulating member and is exposed. |
| US09324986B2 |
Battery module
A battery module including: a plurality of battery cells aligned in a direction, the battery cells each including a terminal portion on a surface thereof; and a bus bar configured to connect between the terminal portions of battery cells of the plurality of battery cells, the bus bar including through-regions through which the terminal portions of the battery cells respectively pass, and a connection region connecting the through-regions, and a through-region of the through-regions has two or more through-holes corresponding to each other and through which one of the terminal portions passes, and the terminal portions are forcibly inserted into the bus bar. |
| US09324984B2 |
Direct formation of a separator with a protective edge on an electrode
A method for forming integral separator-electrodes for a battery. The method comprises providing a continuous electrode sheet having an electrode active material deposited on a current collector. The method includes forming a plurality of individual electrodes from the continuous electrode sheet. Each electrode is formed having a center region and a plurality of edges. A separator coating having a substantially uniform thickness is applied to the center region and the plurality of edges of each electrode. The separator coating layer is larger in size than the electrode active material coated area. |
| US09324981B2 |
Cell frame for extended range electric vehicle battery module
A foldable frame for a battery cell assembly includes a one-piece main body. The main body has a first section, a second section, and a third section. The first section is coupled to each of a second section and a third section with living hinges. The first section is configured to receive a first battery cell. The second section is configured to receive an expansion unit and a second battery cell. The second section folds over the first battery cell. The third section is configured to fold over the second battery cell, thereby securing each of the first battery cell, the expansion unit, and the second battery cell within the foldable frame. |
| US09324978B2 |
Packaging for cable-type secondary battery and cable-type secondary battery comprising the same
The present disclosure relates to a packaging for a cable-type secondary battery, surrounding an electrode assembly in the cable-type secondary battery, the packaging having a moisture-blocking layer comprising sealant polymer layers on both outer surfaces of a moisture-blocking film and a moisture-blocking film disposed between the sealant polymer layers, wherein the moisture-blocking layer is a tube form surrounding the electrode assembly, and the sealant polymer layers in both ends of the moisture-blocking layer are overlapped and adhered with each other in a predetermined part. The packaging according to the present disclosure can be used in a cable-type secondary battery to block moisture from being infiltrated into an electrode assembly, thereby improving the life characteristics of the battery and preventing the deterioration of battery performances. |
| US09324976B2 |
Electrochemical cell having a fixed cell element
An electrochemical cell includes a cell element and a current collector disposed in a housing that includes a vent. The current collector includes an outer member and an inner member coupled together by one or more flexible arms. The outer member is coupled to the cell element and the inner member is coupled to the vent, such that the flexible arms allow axial movement of the inner member with respect to the outer member when the vent moves from an undeployed position to a deployed position. The housing may include a shoulder that holds the cell element in the housing. The electrochemical cell may also include a coil plate provided at an end of the cell element. The coil plate is coupled to an edge of at least one electrode of the cell element. The outer member of the current collector may be coupled to the coil plate and the inner member of the current collector may be coupled to the vent, such that when the vent moves from an undeployed position to a deployed position, the cell element remains substantially fixed within the housing. |
| US09324975B2 |
Card battery having smart card functions
Disclosed is a card type battery that has both functions of a smart card and a battery. The card battery can prevent a short caused by contact with an external device, reduce a total thickness of the battery and improve bonding strength between internal elements of the battery. |
| US09324972B2 |
Organic light emitting display device
An organic light emitting display device comprises a substrate that includes a plurality of pixel regions; a conductive line arranged on the substrate; and an anti-reflective layer arranged on the conductive line, wherein the anti-reflective layer includes an intermediate layer arranged on the conductive line and a semi-transparent layer arranged on the intermediate layer, and the conductive line is electrically connected with the semi-transparent layer. |
| US09324964B2 |
Organic light-emitting element with hole injection layer having concave portion
An organic EL element including anode, hole injection layer, buffer layer, light-emitting layer, and cathode, layered on substrate in the stated order, and banks defining a light-emission region, and having excellent light-emission characteristics, due to the hole injection layer having excellent hole injection efficiency, being a tungsten oxide layer including an oxygen vacancy structure, formed under predetermined conditions to have an occupied energy level within a binding energy range from 1.8 eV to 3.6 eV lower than a lowest binding energy of a valence band, and after formation, subjected to atmospheric firing at a temperature within 200 ° C. -230 ° C. inclusive for a processing time of 15-45 minutes inclusive to have increased film density and improved dissolution resistance against an etching solution, a cleaning liquid, etc., used in a bank forming process. |
| US09324962B2 |
Organic luminescence display and method of manufacturing the same
According to an aspect of the present invention, an organic luminescence display includes a substrate, a first electrode on the substrate, a pixel defining layer on the first electrode and partially exposing the first electrode, an auxiliary layer on the pixel defining layer, an organic layer on the first electrode and an edge of the auxiliary layer, and a second electrode on the organic layer. |
| US09324960B2 |
Semiconducting alloy polymers formed from orthocarborane and 1,4-diaminobenzene
Novel semiconducting polymers have been formed via the electron-induced cross-linking of orthocarborane B10C2H2 and 1,4-diaminobenzene. The films were formed by co-condensation of the molecular precursors and 200 eV electron-induced cross-linking under ultra-high vacuum (UHV) conditions. Ultraviolet photoemission spectra show that the compound films display a shift of the valence band maximum from ˜4.3 eV below the Fermi level for pure boron carbide to −1.7 eV below the Fermi level when diaminobenzene is added. The surface photovoltage effect decreases with decreasing B/N atomic ratio. A neutron detector comprises the polymer as the p-type semiconductor to be paired with an n-type semiconductor. |
| US09324959B2 |
Display device and method of manufacturing the same
A display device includes a display panel, a top member, and a bottom member. The top member is disposed on the display panel. The bottom member is disposed under the display panel, and includes a plurality of layers. At least one of the layers has an opening at a bending region of the display device. |
| US09324957B2 |
Synthesis of four coordinated gold complexes and their applications in light emitting devices thereof
Synthesis of four coordinated gold complexes and their applications in light emitting devices thereof. |
| US09324953B2 |
Condensed-cyclic compounds and organic light-emitting diodes comprising the same
Condensed-cyclic organic compounds, synthetic methods for preparing the same and an organic light-emitting diode including the same are presented. The subject polycyclic triarylamines are prepared via a series of substitution and cyclization reactions. |
| US09324952B2 |
Thiadiazole, compound for light-emitting elements, light-emitting element, light-emitting apparatus, authentication apparatus, and electronic device
The thiadiazole represented by formula (1), when used as a light-emitting material in a light-emitting element, allows the light-emitting element to emit near-infrared light: wherein, in formula (1), each A independently represents a hydrogen atom, an alkyl group, a substituted or unsubstituted aryl group, a substituted or unsubstituted aryl amino group, or a substituted or unsubstituted triarylamine. |
| US09324950B2 |
Organic electroluminescence device
An organic electroluminescence device that includes an anode, an emitting layer that includes a host and a fluorescent dopant, an electron transporting zone, a cathode, a blocking layer adjacent to the emitting layer in the electron transporting zone where the blocking layer includes an aromatic heterocyclic derivative with an azine ring and where the triplet energy ETb (eV) of the aromatic heterocyclic derivative is larger than a triplet energy ETh (eV) of the host. |
| US09324943B2 |
Filamentary memory devices and methods
Apparatus, devices, systems, and methods are described that include filamentary memory cells. Mechanisms to substantially remove the filaments in the devices are described, so that the logical state of a memory cell that includes the removable filament can be detected. Additional apparatus, systems, and methods are described. |
| US09324940B2 |
Storage element, memory and electronic apparatus
A storage element is provided. The storage element includes a memory layer having a first magnetization state of a first material; a fixed magnetization layer having a second magnetization state of a second material; an intermediate layer including a nonmagnetic material and provided between the memory layer and the fixed magnetization layer; wherein the first material includes Co—Fe—B alloy, and at least one of a non-magnetic metal and an oxide. |
| US09324939B2 |
Synthetic antiferromagnet (SAF) coupled free layer for perpendicular magnetic tunnel junction (p-MTJ)
A magnetic tunnel junction (MTJ) device in a magnetoresistive random access memory (MRAM) and method of making the same are provided to achieve a high tunneling magnetoresistance (TMR), a high perpendicular magnetic anisotropy (PMA), good data retention, and a high level of thermal stability. The MTJ device includes a first free ferromagnetic layer, a synthetic antiferromagnetic (SAF) coupling layer, and a second free ferromagnetic layer, where the first and second free ferromagnetic layers have opposite magnetic moments. |
| US09324938B2 |
Boron carbide films exhibits extraordinary magnetoconductance and devices based thereon
Boron carbide polymers prepared from orthocarborane icosahedra cross-linked with a moiety A wherein A is selected from the group consisting of benzene, pyridine. 1,4-diaminobenzene and mixtures thereof give positive magnetoresistance effects of 30%-80% at room temperature. The novel polymers may be doped with transitional metals to improve electronic and spin performance. These polymers may be deposited by any of a variety of techniques, and may be used in a wide variety of devices including magnetic tunnel junctions, spin-memristors and non-local spin valves. |
| US09324928B2 |
Lighting device and corresponding method
A lighting device may include a mounting board with first and second opposed faces and vias extending therethrough, one or more light radiation sources mounted on the first face of the mounting board, drive circuitry for the light radiation source mounted on the second face of the mounting board, with electrically conductive lines between the light radiation source and the drive circuitry passing through said vias, a vat-like holder housing the mounting board with the light radiation source and the drive circuitry mounted thereon. The holder has cavities for receiving therein the drive circuitry with the first face of the mounting board and the light radiation source mounted thereon facing outwardly of the holder. Over the first face of the mounting board at least one sealing layer is applied, which ensures an IP grade protection of device. |
| US09324926B2 |
Wavelength converted light emitting device
A structure according to embodiments of the invention includes a plurality of LEDs attached to a mount. A wavelength converting layer is disposed over the LEDs. A transparent layer is disposed over the wavelength converting layer. Reflective material is disposed between neighboring LEDs. |
| US09324924B2 |
Tunable remote phosphor constructs
A solid state lighting comprising: at least one LED element positioned on a top surface of a substrate or a submount; and a polygonal structure comprising a plurality of edges forming a plurality of facets configured to receive light from the at least one LED element, the polygonal structure comprising a wavelength converting material, wherein the wavelength converting material is remotely positioned from the at least one LED element. |
| US09324922B2 |
Illumination method and light-emitting device
To provide an illumination method and a light-emitting device which are capable of achieving, under an indoor illumination environment where illuminance is around 5000 lx or lower when performing detailed work and generally around 1500 lx or lower, a color appearance or an object appearance as perceived by a person, will be as natural, vivid, highly visible, and comfortable as though perceived outdoors in a high-illuminance environment, regardless of scores of various color rendition metric. Light emitted from the light-emitting device illuminates an object such that light measured at a position of the object satisfies specific requirements. A feature of the light-emitting device is that light emitted by the light-emitting device in a main radiant direction satisfies specific requirements. |
| US09324921B2 |
Light-emitting diode package
The present invention relates to a light-emitting diode package. According to the present invention, a light-emitting diode package comprises: a substrate for growth; a passivation layer formed on a surface of one side of the substrate for growth; and a package substrate having a main body portion and a wall portion, wherein the wall portion is formed on the main body portion. At least the space formed among the main body portion, the wall portion and the passivation layer is sealed from the outside. |
| US09324915B2 |
Light-emitting device with improved electrode structures
A light-emitting device includes first and second semiconductor layers and a light-emitting layer between the first and second semiconductor layers. The light-emitting device also includes an improved electrode structures. |
| US09324911B2 |
Methods of fabricating dilute nitride semiconductor materials for use in photoactive devices and related structures
Dilute nitride III-V semiconductor materials may be formed by substituting As atoms for some N atoms within a previously formed nitride material to transform at least a portion of the previously formed nitride material into a dilute nitride III-V semiconductor material that includes arsenic. Such methods may be employed in the fabrication of photoactive devices, such as photovoltaic cells and photoemitters. The methods may be carried out within a deposition chamber, such as a metalorganic chemical vapor deposition (MOCVD) or a hydride vapor phase epitaxy (HVPE) chamber. |
| US09324909B2 |
Light emitting diode and method of fabricating the same
Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural layer comprises a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement. Also, a method for fabricating the light emitting diode is disclosed. |
| US09324906B2 |
LED package manufacturing system
There are prepared element characteristic information 12 obtained by previously, individually measuring light emission characteristics of a plurality of LED elements and resin coating information 14 that correlates an appropriate amount of resin to be applied for acquiring an LED package exhibiting a specified light emission characteristic and the element characteristic information 12. A map preparation processing section 74 prepares, for each board, map data 18 correlating mounting position information 71a showing position of the LED element mounted on the board by a component mounting device M1 and the element characteristic information 12. There is updated the resin coating information 14 on the basis of an inspection result fed back to a resin coating device M4 as a result of a completed product coated with a resin being inspected by a light emission characteristic inspection device M7. |
| US09324905B2 |
Solid state optoelectronic device with preformed metal support substrate
A wafer-level process for manufacturing solid state lighting (“SSL”) devices using large-diameter preformed metal substrates is disclosed. A light emitting structure is formed on a growth substrate, and a preformed metal substrate is bonded to the light emitting structure opposite the growth substrate. The preformed metal substrate can be bonded to the light emitting structure via a metal-metal bond, such as a copper-copper bond, or with an inter-metallic compound bond. |
| US09324897B2 |
Conversion of high-energy photons into electricity
Systems and methods for the conversion of energy of high-energy photons into electricity which utilize a series of materials with differing atomic charges to take advantage of the emission of a large multiplicity of electrons by a single high-energy photon via a cascade of Auger electron emissions. In one embodiment, a high-energy photon converter preferably includes a linearly layered nanometric-scaled wafer made up of layers of a first material sandwiched between layers of a second material having an atomic charge number differing from the atomic charge number of the first material. In other embodiments, the nanometric-scaled layers are configured in a tubular or shell-like configuration and/or include layers of a third insulator material. |
| US09324895B2 |
Solar cell module and manufacturing method thereof
A plurality of thin linear thin wire electrodes are formed entirely over a first surface that is a light receiving surface of a solar cell element, a back surface collecting electrode is formed on a second surface that is a back surface of the solar cell element, and a wiring member which draws power is connected to each of the thin wire electrode and the back surface collecting electrode. The thin wire electrode and the wiring member are bonded with solder and side surfaces of the solder bonding portion in a longitudinal direction along the wiring member are coated with a thermosetting resin, and, in a region excluding the thin wire electrodes, the wiring member and the first surface are bonded with a thermosetting resin. The wiring member and the thin wire electrodes are bonded to have a sufficient mechanical bonding strength and high bonding reliability. |
| US09324893B1 |
Portable solar power system and method for the same
A portable solar power system and a method for deploying the portable solar power system are disclosed. The portable solar power system may include a foldable plate including a non-foldable portion and at least one foldable portion with respective to the non-foldable portion, both of which have respective surfaces on which a solar cell array is mounted; a rotating mechanism for rotating the foldable plate at least in a generally horizontal plane; and a mast for supporting at least a part of the rotating mechanism and the foldable plate. |
| US09324888B2 |
Solar cell and method for manufacturing same
The invention relates to a solar cell and to a method for manufacturing same. The solar cell contains a carbon structure layer; a microstructure formed on the carbon structure layer; and a thin-film layer covering the microstructure and including a charge separation junction part. |
| US09324880B2 |
Thin film transistor and method of producing the same, display device, image sensor, X-ray sensor, and X-ray digital imaging device
A thin film transistor includes a gate electrode; a gate insulating film which contacts the gate electrode; an oxide semiconductor layer which includes a first region represented by In(a)Ga(b)Zn(c)O(d), wherein 0 |
| US09324874B2 |
Display device comprising an oxide semiconductor
A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over the oxide semiconductor layer serving as a channel formation region which is overlapped with the gate electrode. The driver circuit as well as the pixel portion is provided over the same substrate to reduce manufacturing costs. |
| US09324871B2 |
Semiconductor device
A semiconductor device including a transistor having excellent electrical characteristics is provided. Alternatively, a semiconductor device having a high aperture ratio and including a capacitor capable of increasing capacitance is provided. The semiconductor device includes a gate electrode, an oxide semiconductor film overlapping the gate electrode, an oxide insulating film in contact with the oxide semiconductor film, a first oxygen barrier film between the gate electrode and the oxide semiconductor film, and a second oxygen barrier film in contact with the first oxygen barrier film. The oxide semiconductor film and the oxide insulating film are provided on an inner side of the first oxygen barrier film and the second oxygen barrier film. |
| US09324870B2 |
Fin field effect transistor including asymmetric raised active regions
Merged and unmerged raised active regions on semiconductor fins can be simultaneously formed on a same substrate by control of growth rates of a deposited semiconductor material on surfaces of the semiconductor fins. In one embodiment, a growth-rate-retarding dopant can be implanted by angled ion implantation onto sidewall surfaces of first semiconductor fins on which retardation of growth rates is desired, while second semiconductor fins are masked by a masking layer. In another embodiment, a growth-rate-enhancing dopant can be implanted by ion implantation onto sidewall surfaces of second semiconductor fins, while first semiconductor fins are masked by a masking layer. The differential growth rates of the deposited semiconductor material can cause raised active regions on the first semiconductor fins to remain unmerged, and raised active regions on the second semiconductor fins to become merged. |
| US09324868B2 |
Epitaxial growth of silicon for FinFETS with non-rectangular cross-sections
FinFET devices with epitaxially grown fins and methods for fabricating them are provided. Embodiments include forming at least two shallow trench isolation (STI) regions, filled with dielectric material, adjacent to but separate from each other in a silicon substrate; epitaxially growing a silicon-based layer between each adjacent pair of STI regions to form a fin with a non-rectangular cross-section extending from each STI region to each adjacent STI region; forming a gate oxide over and perpendicular to each fin; and forming a gate electrode over the gate oxide to form a FinFET. |
| US09324866B2 |
Structure and method for transistor with line end extension
The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate; an isolation feature formed in the semiconductor substrate; a first active region and a second active region formed in the semiconductor substrate, wherein the first and second active regions extend in a first direction and are separated from each other by the isolation feature; and a dummy gate disposed on the isolation feature, wherein the dummy gate extends in the first direction to the first active region from one side and to the second active region from another side. |
| US09324864B2 |
Semiconductor device structure and method for forming the same
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes an isolation structure positioned in the semiconductor substrate and adjacent to a first active region of the semiconductor substrate. The semiconductor device structure includes a gate stack disposed over the first active region. The semiconductor device structure includes a first contact structure disposed over the first active region and positioned between the isolation structure and the gate stack. The semiconductor device structure includes a dummy gate stack disposed over the isolation structure and adjacent to the gate stack. The dummy gate stack is not positioned over a portion of the isolation structure next to the first contact structure. |
| US09324861B2 |
Semiconductor device
A semiconductor device has on a semiconductor layer: a gate insulating film formed, extending from a second emitter region toward a buffer region beyond a first body region, and covering part of a drift region; and a gate electrode. The second emitter region contacts a first emitter region, and extends laterally to a portion under the gate electrode so as to be longer than a diffusion depth of the second emitter region and not beyond a lateral length of the first body region under the gate electrode, in an area from an end portion of the first emitter region closer to the gate electrode to a region under the gate electrode. |
| US09324860B2 |
Semiconductor device
According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, an insulating film, and a control electrode. The first semiconductor region includes a silicon carbide of a first conductivity type. The second semiconductor region is provided on the first semiconductor region, includes a silicon carbide of a second conductivity type, and has a first main surface. The third semiconductor region is provided on the second semiconductor region and includes the silicon carbide of the first conductivity type. The film is provided on the surface. The electrode is provided on the film, and has a first region close to the third semiconductor region side, and a second region closer to the first semiconductor region side than the first region. An effective work function of the first region is larger than an effective work function of the second region. |
| US09324857B2 |
Semiconductor device manufacturing method
A semiconductor device includes a p-type semiconductor layer, n-type column regions formed of columnar thermal donors exhibiting an n-type property, a p-type column region interposed between the n-type column regions, the n-type column regions configured to form a super-junction structure in cooperation with the p-type column region, a channel region formed in the semiconductor layer, a source region formed in the channel region, a gate insulator film formed on the semiconductor layer, and a gate electrode formed on the gate insulator film and opposite to the channel region across the gate insulator film. |
| US09324855B2 |
Lateral power device having low specific on-resistance and using high-dielectric constant socket structure and manufacturing method therefor
Provided is a lateral power device having low specific ON-resistance and using a high-dielectric constant socket structure and a manufacturing method therefor, which relate to semiconductor power devices. A source electrode (8) of the device is of a first conduction type, and a channel region (6), a silicon substrate (4) and an ohmic contact heavily-doped region are of a second conduction type; at least two isolation regions are arranged in an embedded manner in a drift region (1); between the isolation regions are the drift region (1) and the channel region (6); each isolation region extends from the source electrode (8) to a drain electrode (11); high-dielectric constant material strips (3) and first insulation dielectric layers (10) form boundaries of the bottoms and sidewalls of the isolation regions; the isolation regions are filled with a first filling material (2), a second insulation dielectric layer (9) is arranged on the upper surface of the drift region (1) and the upper surfaces of the isolation regions, and a gate electrode (5) directly contacts the first filling material (2) via holes on the second insulation dielectric layer (9); and a source electrode lead-out wire (16) and a drain electrode lead-out wire (12) directly contact the source electrode (8) and the drain electrode (11) respectively via the holes on the second insulation dielectric layer (9). The area of a power device can be greatly reduced on the premise of not reducing the withstand voltage and not increasing the specific ON-resistance. |
| US09324844B2 |
Method and system for a GaN vertical JFET utilizing a regrown channel
A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region. |
| US09324838B2 |
LDMOS power semiconductor device and manufacturing method of the same
An electronic semiconductor device comprising: a semiconductor body, having a first side and a second side opposite to one another and including a first structural region facing the second side, and a second structural region extending over the first structural region and facing the first side; a body region extending in the second structural region at the first side; a source region extending inside the body region; an LDD region facing the first side of the semiconductor body; and a gate electrode. The device comprises: a trench dielectric region extending through the second structural region a first trench conductive region immediately adjacent to the trench dielectric region; and a second trench conductive region in electrical contact with the body region and with the source region. An electrical contact at the second side of the semiconductor body is in electrical contact with the drain region via the first structural region. |
| US09324832B1 |
Methods of manufacturing semiconductor devices using masks having varying widths
In a method, a dummy gate layer structure and a mask layer are formed on a substrate. The mask layer is patterned to form masks. Spacers are formed on sidewalls of the mask. A dummy gate mask is formed between the spacers. The dummy gate layer structure is patterned using the dummy gate mask to form dummy gate structures. The dummy gate structure is replaced with a gate structure. When the mask is formed, an initial layout of masks extending in a first direction is designed. An offset bias in a second direction is provided for a specific region of the initial layout to design a final layout having a width in the second direction varying along the first direction. The mask layer is patterned according to the final layout to form the masks having a width varying along the first direction. |
| US09324831B2 |
Forming transistors without spacers and resulting devices
Methods for forming gates without spacers and the resulting devices are disclosed. Embodiments may include forming a channel layer on a substrate; forming a dummy gate on the channel layer; forming an interlayer dielectric (ILD) on the channel layer and surrounding the dummy gate; forming a trench within the ILD and the channel layer by removing the dummy gate and the channel layer below the dummy gate; forming an un-doped channel region at the bottom of the trench; and forming a gate above the un-doped channel region within the trench. |
| US09324828B2 |
Vertical P-type, N-type, P-type (PNP) junction integrated circuit (IC) structure, and methods of forming
Various particular embodiments include a method of amorphizing a portion of silicon underneath the N+ base section of a PNP transistor structure. After amorphizing, the method can include selectively etching that implant-amorphized silicon to trim the collector-base area and collector-base junction. The selective etching is enhanced because the unimplanted silicon region etches at a distinct rate than the implant-amorphized silicon, allowing for control over the trimming of the collector-base junction. |
| US09324824B2 |
Transistor, semiconductor device and method of manufacturing the same
A semiconductor device including a central region, side regions located in both sides of the central region, and conductive layers including a first barrier pattern formed in the central region, a material pattern formed in the first barrier pattern and having an etch selectivity with respect to the first barrier pattern, and a second barrier pattern formed in the material pattern; and insulating layers alternately stacked with the conductive layers. |
| US09324817B2 |
Method for forming a transistor device having a field electrode
A method for forming a transistor device includes forming a field electrode arrangement by forming a trench in a first surface of a semiconductor body, forming a protection layer on sidewalls of the trench in an upper trench section, forming a dielectric layer on a bottom of the trench and on sidewall sections uncovered by the protection layer, and forming a field electrode at least on the dielectric layer. The method further includes forming a gate electrode and a gate electrode dielectric horizontally spaced apart from the field electrode arrangement with respect to the first surface, forming a body region adjacent the gate electrode and dielectrically insulated from the gate electrode by the gate dielectric, and forming a source region in the body region. |
| US09324814B2 |
Silicon carbide single-crystal substrate
A silicon carbide single-crystal substrate includes a first surface, a second surface opposite to the first surface, and a peripheral edge portion sandwiched between the first surface and the second surface. A plurality of grinding traces are formed in a surface of the peripheral edge portion. A chamfer width as a distance from an outermost peripheral end portion of the peripheral edge portion to one of the plurality of grinding traces which is located on an innermost peripheral side of the peripheral edge portion in a direction parallel to the first surface is not less than 50 μm and not more than 400 μm. Thereby, a silicon carbide single-crystal substrate capable of suppressing occurrence of a crack, and a method for manufacturing the same can be provided. |
| US09324812B2 |
Semiconductor device including nanowire transistor
A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film. |
| US09324810B2 |
Semiconductor device including oxide semiconductor film
A highly reliable semiconductor device having stable electrical characteristics is provided. Oxide films each containing one or more kinds of metal elements included in an oxide semiconductor film are formed in contact with an upper side and a lower side of the oxide semiconductor film where a channel is formed, whereby interface states are not easily generated at an upper interface and a lower interface of the oxide semiconductor film. A material which has a lower electron affinity than the oxide semiconductor film is used for the oxide films in contact with the oxide semiconductor film, whereby electrons flowing in the channel hardly move in the oxide films and mainly move in the oxide semiconductor film. Thus, even when an interface state exists between the oxide film and an insulating film formed on the outside of the oxide film, the state hardly influences the movement of electrons. |
| US09324805B2 |
Flexible graphene switching device
Provided is a graphene switching device including: a graphene layer formed on a substrate; a plurality of semiconductor nanowires on the substrate; a first electrode connected to a second end of the graphene layer; a second electrode on the substrate to face the first electrode so as to be connected to the plurality of semiconductor nanowires; a gate insulating layer on the substrate to cover the graphene layer; and a gate electrode on the gate insulating layer. The gate electrode and the plurality of semiconductor nanowires face each other with the graphene layer therebetween. At least one of the plurality of semiconductor nanowires is connected to at least one of the second electrode, the graphene layer, and the other of the plurality of semiconductor nanowires. |
| US09324803B2 |
Superjunction power device and manufacturing method
A method for manufacturing a semiconductor power device, comprising the steps of: forming a trench in a semiconductor body having a first type of conductivity; partially filling the trench with semiconductor material via epitaxial growth so as to obtain a first column having a second type of conductivity and having an internal cavity. The epitaxial growth includes simultaneously supplying a gas containing dopant ions of the second type of conductivity, hydrochloric acid HCl in gaseous form and dichlorosilane DCS in gaseous form, so that the ratio between the amount of HCl and the amount of DCS has a value of from 3.5 to 5.5. |
| US09324802B2 |
Spacer supported lateral channel FET
A semiconductor device includes a semiconductor material and trenches extending into the semiconductor material from a first main surface of the semiconductor material to form mesas of semiconductor material between the trenches. The device also includes a field plate in the trenches, a body region in the mesas, a source region in contact with the body region in the mesas, and a gate electrode on the first main surface of the semiconductor material and defining a lateral channel region in each of the body regions under the gate electrodes. A drain region is at the opposing main surface of the semiconductor material. The gate electrodes adjacent opposing sides of the same field plate have the same alignment with respect to that field plate. The device can be a MOSFET or HEMT. Corresponding methods of manufacture are also provided. |
| US09324800B1 |
Bidirectional MOSFET with suppressed bipolar snapback and method of manufacture
A bidirectional trench FET device includes a semiconductor substrate, a trench in the substrate extending vertically from the surface of the substrate, and a body region laterally adjacent the trench. A source region is disposed in the semiconductor substrate between the body region and the surface of the substrate. A dielectric layer is disposed over the surface and a body electrode is disposed over the dielectric layer. A body contact plug extends through the dielectric layer to interconnect the body region with the body electrode, and the body contact plug is electrically isolated from the source region. Two separate metal layers are implemented to make multiple body and source contacts electrically isolated from one another throughout the active area of the device. The low resistive path by the body contact plug and the separate metal layers enables suppression of bipolar snapback without losing bidirectional switching capability. |
| US09324790B2 |
Self-aligned dual-height isolation for bulk FinFET
A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region. |
| US09324787B2 |
Semiconductor device
According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, and a first electrode. The first semiconductor region is of a first conductivity type. The second semiconductor region is provided on the first semiconductor region, and is of a second conductivity type. The third semiconductor region is provided on the second semiconductor region, and is of the second conductivity type. The third semiconductor region contains a first impurity of the first conductivity type and a second impurity of the second conductivity type, and satisfies 1 |
| US09324785B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes: a plurality of stacked semiconductor layers; a plurality of composite doped regions separately and parallelly disposed in a portion of the semiconductor layers along a first direction; a gate structure disposed over a portion of the semiconductor layers along a second direction, wherein the gate structure covers a portion of the composite doped regions; a first doped region formed in the most top semiconductor layer along the second direction and being adjacent to a first side of the gate structure; and a second doped region formed in the most top semiconductor layer along the second direction and being adjacent to a second side of the gate structure opposite to the first side thereof. |
| US09324783B2 |
Soft switching semiconductor device and method for producing thereof
A semiconductor device has a semiconductor body with a first side and a second side that is arranged distant from the first side in a first vertical direction. The semiconductor device has a rectifying junction, a field stop zone of a first conduction type, and a drift zone of a first conduction type arranged between the rectifying junction and the field stop zone. The semiconductor body has a net doping concentration along a line parallel to the first vertical direction. At least one of (a) and (b) applies: (a) the drift zone has, at a first depth, a charge centroid, wherein a distance between the rectifying junction and the charge centroid is less than 37% of the thickness the drift zone has in the first vertical direction; (b) the absolute value of the net doping concentration comprises, along the straight line and inside the drift zone, a local maximum value. |
| US09324782B2 |
Semiconductor device
A semiconductor layer, a well region, and a source region form a unit cell. The unit cell is defined into a certain shape in plan view at a main surface of the semiconductor layer, and a plurality of the unit cells is coupled in a chain manner to form a unit chain structure with a constriction. The certain shape of the unit cell is defined by an outer edge of a virtual region of the semiconductor layer defined so as to include the source region and the well region inside and by respective outer edges of the source region and the well region at a joint with a different unit cell. An active region is composed of a plurality of the unit chain structures. The unit chain structures are arranged so as to avoid generation of a gap between the unit cells of adjacent ones of the unit chain structures. |
| US09324780B2 |
Metal-insulator-metal (MIM) capacitor structure including redistribution layer
Embodiments of mechanisms for forming a semiconductor device with metal-insulator-metal (MIM) capacitor structure are provided. The MIM capacitor structure includes a substrate; and a MIM capacitor formed on the substrate. The MIM capacitor includes a bottom electrode formed over the substrate. The bottom electrode is a top metal layer. The MIM capacitor also includes an insulating layer formed on the bottom electrode; and a top electrode formed on the insulating layer. |
| US09324776B2 |
Organic light-emitting device including barrier layer including silicon oxide layer and silicon nitride layer
An organic light-emitting device including a barrier layer that includes a silicon oxide layer and a silicon-rich silicon nitride layer. The organic light-emitting device includes a flexible substrate that includes a barrier layer and plastic films disposed under and over the barrier layer. The barrier layer includes a silicon-rich silicon nitride layer and a silicon oxide layer. The order in which the silicon-rich silicon nitride layer and the silicon oxide layer are stacked is not limited and the silicon oxide layer may be first formed and then the silicon-rich silicon nitride layer may be stacked on the silicon oxide layer. The silicon-rich silicon nitride layer has a refractive index of 1.81 to 1.85. |
| US09324773B2 |
Display panel including a plurality of lighting emitting elements
One pixel is divided into a first region including a first light emitting element and a second region including a second light emitting element, wherein the first region emits light in one direction and the second region emits light in the direction opposite to that of the first region. Independently driving the first light emitting element and the second light emitting element allows images to be displayed independently on the surface. |
| US09324770B2 |
Organic light emitting display devices and methods of manufacturing organic light emitting display devices
An organic light emitting display device includes a first substrate having a display region and a peripheral region adjacent to the display region, a plurality of display structures in the display region, the display structures including a plurality of switching elements and a plurality of organic light emitting elements, a plurality of solar cells adjacent to the organic light emitting elements in the display region, and a second substrate opposed to the first substrate. |
| US09324766B2 |
Display device and method for manufacturing the same
A display device includes: a substrate; a pixel defining layer defining a pixel region on the substrate; a first electrode on the pixel region; a light emitting layer on the first electrode; a second electrode on the light emitting layer; a thin film encapsulation layer on the second electrode; a metal pattern on the thin film encapsulation layer and overlapping the pixel defining layer; and a multi-layer thin film layer on the metal pattern and the thin film encapsulation layer. |
| US09324763B2 |
Method of manufacturing semiconductor device
To protect a plurality of semiconductor chips of a sawn wafer housed in a shipping case.A method of manufacturing a semiconductor device includes a step of vacuum packing a sawn wafer while being housed in a shipping case. The shipping case has the following structure. The shipping case has a lid portion that covers the upper surface of the sawn wafer and a body portion that covers the lower surface of the sawn wafer. The lid portion has a recess portion that covers a plurality of semiconductor chips and a ventilation route communicated with the recess portion. In a step of reducing pressure in the shipping case, a gas in the shipping case is discharged outside via a ventilation route. |
| US09324758B2 |
Depth pixel included in three-dimensional image sensor and three-dimensional image sensor including the same
A depth pixel includes a photo detection region, first and second photo gates and first and second floating diffusion regions. The photo detection region collects photo charges based on light reflected by an object. The collected photo charges are drifted in a first direction and a second direction different from the first direction based on an internal electric field in the photo detection region. The first photo gate is activated in response to a first photo control signal. The first floating diffusion region accumulates first photo charges drifted in the first direction if the first photo gate is activated. The second photo gate is activated in response to the first photo control signal. The second floating diffusion region accumulates second photo charges drifted in the second direction if the second photo gate is activated. |
| US09324754B2 |
Imaging sensors including photodetecting devices with different well capacities and imaging devices including the same
An image sensor includes a first photo detecting device disposed in a central region of a pixel array portion and a second photo detecting device disposed in an edge of the pixel array portion. The second photo detecting device has a full well capacity which is less than a full well capacity of the first photo detecting device. An imaging device includes the image sensor and an image signal process. The image signal processor compensates for a lens shading effect and a difference between the full well capacity of the first photo detecting device and the full well capacity of the second photo detecting device. |
| US09324753B2 |
Solid-state imaging device, method of manufacturing a solid-state imaging device, and electronic apparatus
Provided is a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function. The solid-state imaging device includes a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode. |
| US09324752B2 |
Image sensor device with light blocking structure
The disclosure provides an image sensor device and a manufacturing method. The image sensor device includes a semiconductor substrate and a light sensing region in the semiconductor substrate. The image sensor device also includes a light blocking structure in the semiconductor substrate and adjacent to the light sensing region. A sidewall of the light blocking structure is a curved surface. |
| US09324746B2 |
Pixel circuit for global shutter of substrate stacked image sensor
A pixel circuit for a global shutter of a substrate-stacked image sensor may include a semiconductor chip including: a photodiode configured to output electric charges generated through a light sensing operation; and a reset node configured to receive a reset voltage from a reset voltage node and reset the photodiode. The semiconductor chip may have a structure in which the semiconductor chip is stacked over another semiconductor chip. |
| US09324743B2 |
Flat panel display device with oxide thin film transistor and method of fabricating the same
A flat panel display device with an oxide thin film transistor is disclosed which includes: an oxide semiconductor layer which has a width of a first length and is formed on a buffer film; a gate insulation film which has a width of a second length and is formed on the oxide semiconductor layer; a gate electrode which has a width of a third length and is formed on the gate insulation film; an interlayer insulation film formed on the entire surface of the substrate provided with the gate electrode; source and drain electrodes formed on the interlayer insulation film and connected to the oxide semiconductor layer; a pixel electrode formed on a passivation film and connected to the drain electrode. The first length is larger than the second length and the second length is larger than the third length. |
| US09324741B2 |
Display device, manufacturing method of display device and electronic equipment
Disclosed herein is a manufacturing method of a display device including: forming a gate electrode on a substrate; forming a laminated film by photolithography techniques. The laminated film is provided above the gate electrode with a gate insulating film sandwiched therebetween and includes a semiconductor layer, at least either a source/drain electrode or a pixel electrode, a planarizing film and a pixel isolation film. The manufacturing method further includes forming a functional layer and a common electrode in this order after the formation of the laminated film. The functional layer includes an organic electric field light-emitting layer. Two or more layers are patterned all together in at least part of the laminated film during the formation of the laminated film. |
| US09324738B2 |
Pixel circuit and display device
A pixel circuit includes: a switching transistor whose conduction is controlled by a drive signal supplied to the control terminal; a drive wiring adapted to propagate the drive signal; and a data wiring adapted to propagate a data signal. The drive wiring is formed on a first wiring layer and connected to the control terminal of the switching transistor. The data wiring is formed on a second wiring layer and connected to a first terminal of the switching transistor. A multi-layered wiring structure is used so that the second wiring layer is formed on a layer different from that on which the first wiring layer is formed. |
| US09324737B2 |
Display device and electronic device
To provide a novel display device. The display device includes a pixel portion, a driver circuit portion that is provided outside the pixel portion, and a protection circuit that is electrically connected to one of or both the pixel portion and the driver circuit portion and includes a pair of electrodes. The pixel portion includes pixel electrodes arranged in a matrix and transistors electrically connected to the pixel electrodes. The transistor includes a first insulating layer containing nitrogen and silicon, and a second insulating layer containing oxygen, nitrogen, and silicon. The protection circuit includes the first insulating layer between the pair of electrodes. |
| US09324731B1 |
Method for fabricating memory device
A method for fabricating a memory device is provided: A multi-layer stack is formed on a substrate. The multi-layer stack is then patterned to form plural trenches extending along a first direction to define plural ridge-shaped stacks each of which comprises at least one conductive strip. Next, a memory layer and a channel layer are formed in sequence on bottoms and sidewalls of the trenches. A sacrifice layer is formed to fulfill the trenches. Subsequently, portions of the sacrifice layer, the memory layer and the channel layer formed in the trenches are removed to form plural openings exposing a portion of the substrate therefrom. After removing the remaining sacrifice layer, portions of the memory layer and the channel layer formed on the ridge-shaped stacks are patterned to form an interconnection between two adjacent trenches through two of the openings formed in the two adjacent trenches. |
| US09324726B2 |
Method for manufacturing a semiconductor device
The performances of a semiconductor device are improved. In a method for manufacturing a semiconductor device, in a memory cell region, a control gate electrode formed of a first conductive film is formed over the main surface of a semiconductor substrate. Then, an insulation film and a second conductive film are formed in such a manner as to cover the control gate electrode, and the second conductive film is etched back. As a result, the second conductive film is left over the sidewall of the control gate electrode via the insulation film, thereby to form a memory gate electrode. Then, in a peripheral circuit region, a p type well is formed in the main surface of the semiconductor substrate. A third conductive film is formed over the p type well. Then, a gate electrode formed of the third conductive film is formed. |
| US09324720B2 |
Meander line resistor structure
A method comprises implanting ions in a substrate to form a first active region and a second active region, depositing a first dielectric layer over the substrate, forming a first via and a second via in the first dielectric layer, wherein the first via is over the first active region and the second via is over the second active region, depositing a second dielectric layer over the first dielectric layer, forming a third via and a fourth via in the second dielectric layer, wherein the third via is over the first via and the fourth via is over the second via and forming a connector in a metallization layer over the second dielectric layer, wherein the connector is electrically connected to the third via and the fourth via. |
| US09324716B2 |
Semiconductor device and fabricating method thereof
A semiconductor device includes an interlayer insulating film formed on a substrate and including a trench, a gate insulating film formed in the trench, a work function adjusting film formed on the gate insulating film in the trench along sidewalls and a bottom surface of the trench, and including an inclined surface having an acute angle with respect to the sidewalls of the trench, and a metal gate pattern formed on the work function adjusting film in the trench to fill up the trench. |
| US09324714B2 |
Semiconductor device
In one embodiment, a semiconductor device includes a semiconductor substrate, and first and second transistors of first and second conductivity types on the substrate. The first transistor includes a first gate electrode on the substrate, a first source region of the second conductivity type and a first drain region of the first conductivity type disposed to sandwich the first gate electrode, and a first channel region of the first or second conductivity type disposed between the first source region and the first drain region. The second transistor includes a second gate electrode on the substrate, a second source region of the first conductivity type and a second drain region of the second conductivity type disposed to sandwich the second gate electrode, and a second channel region disposed between the second source region and the second drain region and having the same conductivity type as the first channel region. |
| US09324709B2 |
Self-aligned gate contact structure
Embodiments of present invention provide a method of forming a semiconductor device. The method includes depositing a layer of metal over one or more channel regions of respective one or more transistors in a substrate, the layer of metal having a first region and a second region; lowering height of the first region of the layer of metal; forming an insulating layer over the first region of lowered height, the insulating layer being formed to have a top surface coplanar with the second region of the layer of metal; and forming at least one contact to a source/drain region of the one or more transistors. Structure of the semiconductor device formed thereby is also provided. |
| US09324708B2 |
Power semiconductor device
An exemplary power semiconductor device with a wafer having an emitter electrode on an emitter side and a collector electrode on a collector side, an (n-) doped drift layer, an n-doped first region, a p-doped base layer, an n-doped source region, and a gate electrode, all of which being formed between the emitter and collector electrodes. The emitter electrode contacts the base layer and the source region within a contact area. An active semiconductor cell is formed within the wafer, and includes layers that lie in orthogonal projection with respect to the emitter side of the contact area of the emitter electrode. The device also includes a p-doped well, which is arranged in the same plane as the base layer, but outside the active cell. The well is electrically connected to the emitter electrode at least one of directly or via the base layer. |
| US09324707B2 |
Integrated circuits and methods of design and manufacture thereof
Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are dummy electrodes. Based on the location of these dummy electrodes, selected dummy electrodes are removed using a second mask. The use of the method provides greater flexibility in tailoring individual devices for different objectives. |
| US09324697B1 |
Chip-on-heatsink light emitting diode package and fabrication method
The present disclosure provides a novel light-emitting diode package and corresponding fabrication method for making such a package. The novel LED package comprises a resin carrier layer having a first and second surface. Embedded in the resin carrier layer are at least one electrical conductor and at least one LED. The embedded LED comprises a substrate having a bottom surface that is substantially exposed at the second surface of the resin carrier layer. The embedded LED further comprises a light emitting layer that is substantially exposed at the first surface of the resin carrier layer. |
| US09324695B2 |
Method of tuning color temperature of light-emitting device
A method of tuning color temperature of light-emitting device having an overall color temperature, comprising: providing a carrier; disposing at least two LED units on the carrier, wherein there is a space formed between the two LED units, and the overall color temperature of the light-emitting device is positively correlated to the space; and setting a predetermined temperature for the overall color temperature by adjusting the space. |
| US09324692B2 |
Transparent LED layer between phosphor layer and light exit surface of lamp
A flexible light sheet lamp includes a thin substrate and an array of printed microscopic vertical LEDs (VLEDs) sandwiched between a transparent first conductor layer and a transparent second conductor layer. The light sheet has a light exit surface. The VLEDs have one surface, facing the light exit surface of the light sheet, covered with a reflective metal. A phosphor layer is provided such that the semi-transparent VLED layer is between the phosphor layer and the light exit surface. A reflector layer is provided such that the phosphor layer is between the reflector layer and the VLED layer. The substrate may form the light exit surface or the light exit surface may be the opposite side of the light sheet. Some VLED light passing through the phosphor layer is reflected by the reflector layer and re-enters the phosphor layer. Therefore, less phosphor is needed to achieve the desired conversion ratio. |
| US09324690B2 |
Signal delivery in stacked device
Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice. |
| US09324688B2 |
Embedded packages having a connection joint group
An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided. |
| US09324687B1 |
Wafer-level passive device integration
A device and fabrication techniques are described that employ wafer-level packaging techniques to fabricate semiconductor devices that include an embedded integrated circuit chip device and an embedded passive device on a semiconductor wafer device. In implementations, the wafer-level package device includes a semiconductor wafer device, an embedded integrated circuit chip, an embedded passive device, an encapsulation structure covering at least a portion of the semiconductor wafer device, the embedded integrated circuit chip, and the embedded passive device, at least one redistribution layer structure, and at least one solder bump for providing electrical interconnectivity to the devices. Once the wafer is singulated into semiconductor devices, the semiconductor devices may be mounted to a printed circuit board, and the solder bumps may provide electrical interconnectivity through the backside of the device that interface with pads of the printed circuit board. |
| US09324686B2 |
Semiconductor chips having improved solidity, semiconductor packages including the same and methods of fabricating the same
Semiconductor chips are provided. The semiconductor chip includes a semiconductor chip body having an arch-shaped groove in a backside thereof and a non-conductive material pattern filling the arch-shaped groove. Related methods are also provided. |
| US09324681B2 |
Pin attachment
A method for making a microelectronic package includes the steps of providing a microelectronic assembly that further includes a substrate with a plurality of conductive elements thereon, a carrier, and a plurality of substantially rigid metal elements extending from the carrier and joined to the conductive elements; and removing the carrier from the microelectronic assembly to expose contact surfaces of the respective ones of the plurality of metal elements remote from the first conductive pads. |
| US09324677B2 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode. |
| US09324674B2 |
Die substrate assembly and method
A die comprising a body of semiconductor material, said body configured to receive a solder layer of gold containing alloy for use in die bonding said die to a substrate, wherein the die includes an interface layer on a surface of the body for receiving the solder layer, the interface layer having a plurality of sub-layers of different metals. |
| US09324670B2 |
Semiconductor device with copper-tin compound on copper connector
An embodiment is a method for forming a semiconductor assembly including cleaning a connector including copper formed on a substrate, applying cold tin to the connector, applying hot tin to the connector, and spin rinsing and drying the connector. |
| US09324669B2 |
Use of electrolytic plating to control solder wetting
A method including forming a copper pillar, electroplating a metal layer on a top surface and a sidewall of the copper pillar, and electroplating a metal cap above the top surface of the copper pillar in direct contact with the metal layer. The method further including forming an intermetallic by heating the metal layer and the copper pillar in a non-reducing environment, the intermetallic including elements of both the copper pillar and the metal layer, where molten solder will wet to the metal cap and will not wet to the intermetallic. |
| US09324668B2 |
Bonding structures and methods of forming the same
A package includes a package component and a second package component. A first elongated bond pad is at a surface of the first package component, wherein the first elongated bond pad has a first length in a first longitudinal direction, and a first width smaller than the first length. A second elongated bond pad is at a surface of the second package component. The second elongated bond pad is bonded to the first elongated bond pad. The second elongated bond pad has a second length in a second longitudinal direction, and a second width smaller than the second width. The second longitudinal direction is un-parallel to the first longitudinal direction. |
| US09324667B2 |
Semiconductor devices with compliant interconnects
A method forms a connecting pillar to a bonding pad of an integrated circuit. A seed layer is formed over the bond pad. Photoresist is deposited over the integrated circuit. An opening is formed in the photoresist over the bond pad. The connecting pillar is formed in the opening by plating. |
| US09324661B2 |
Semiconductor package and method of manufacturing the same
An aligning guide, a semiconductor package comprising an aligning guide, and a method of manufacturing a semiconductor package comprising an aligning guide are provided. The semiconductor package may comprise a circuit board and an aligning guide mounted on the circuit board. The aligning guide may have a plurality of stepped portions. A plurality of semiconductor chips may be stacked on the circuit board and engage with the stepped portions of the aligning guide. According to the disclosed semiconductor package, a large number of semiconductor chips may be stacked with high accuracy and sufficient margin. Therefore, the rate of failure and defects in the chip stacking process may be reduced and the reliability and stability of the semiconductor package may be enhanced. |
| US09324660B2 |
Device and method for alignment of vertically stacked wafers and die
A device is provided that includes a first die having a first alignment structure that includes a plurality of first transmission columns arranged in a pattern and a second die positioned on the first die, the second die having a second alignment structure that includes a plurality of second transmission columns arranged in the same pattern as the first transmission columns. The first and second transmission columns are each coplanar with a first surface and a second surface of the first and second die, respectively. |
| US09324658B2 |
High speed, high density, low power die interconnect system
A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one die to at least one conducting layer on a side of the other die. Another interconnect embodiment is a slug having conducting and dielectric layers disposed between two or more die to interconnect between the die. Other interconnect techniques include direct coupling such as rod, ball, dual balls, bar, cylinder, bump, slug, and carbon nanotube, as well as indirect coupling such as inductive coupling, capacitive coupling, and wireless communications. The die may have features to facilitate placement of the interconnects such as dogleg cuts, grooves, notches, enlarged contact pads, tapered side edges and stepped vias. |
| US09324657B2 |
Semiconductor package and method of fabricating the same
Provided are semiconductor packages and methods of fabricating the same. The method may include, stacking a lower semiconductor chip on a lower package substrate, forming a lower molding layer on the lower package substrate, forming a connecting through-hole and an element through-hole by performing a laser drilling process on the lower molding layer, and stacking an upper package substrate having a bottom surface to which a passive element is bonded on the lower package substrate to insert the passive element into the element through-hole. |
| US09324656B1 |
Methods of forming contacts on semiconductor devices and the resulting devices
One method of forming a transistor device comprised of a source/drain region and a gate structure includes forming a dielectric layer above the gate structure and the source/drain region. A first opening is formed in at least the dielectric layer to expose the gate structure. A first spacer is formed on sidewalls of the first opening. After forming the first spacer, a second opening is formed in at least the dielectric layer to expose a portion of the source/drain region. The first spacer at least partially defines a spacing between the first opening and the second opening. A conductive gate contact is formed in the first opening and a conductive source/drain contact is formed in the second opening. |
| US09324652B2 |
Method of creating a maskless air gap in back end interconnections with double self-aligned vias
A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a dielectric material on the interconnect material. A method including depositing and patterning an interconnect material into a wiring line and one or more vias; and introducing a dielectric material on the interconnect material such that the one or more vias are exposed through the dielectric material. An apparatus including a first interconnect layer in a first plane and a second interconnect in a second plane on a substrate; and a dielectric layer separating the first and second interconnect layers, wherein the first interconnect layer comprises a monolith including a wiring line and at least one via, the at least one via extending from the wiring line to a wiring line of the second interconnect layer. |
| US09324648B2 |
Semiconductor device, method for manufacturing same, and electronic component
A plurality of insulating film rings are selectively formed on a front surface of an Si substrate, and surface pads are formed opposite openings of the insulating film rings. Next, by etching the Si substrate from a back surface, through holes that pass through the openings of the insulating film rings and reach the surface pads are formed. Through electrodes that connect electrically with the surface pads are formed by forming a via insulating film (35) on the sides of the through holes and then filling the through holes with electrode material. |
| US09324644B2 |
Semiconductor device
A trench portion (trench or groove) is formed at each of four corner portions of a chip bonding region having a quadrangular planar shape smaller than an outer-shape size of a die pad included in a semiconductor device. Each trench is formed along a direction of intersecting with a diagonal line which connects between the corner portions where the trench portions are arranged, and both ends of each trench portion are extended to an outside of the chip bonding region. The semiconductor chip is mounted on the chip bonding region so as to interpose a die-bond material. In this manner, peel-off of the die-bond material in a reflow step upon mounting of the semiconductor device on a mounting substrate can be suppressed. Also, even if the peel-off occurs, expansion of the peel-off can be suppressed. |
| US09324642B2 |
Method of electrically isolating shared leads of a lead frame strip
A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to the die paddles. A molding compound covers the unit lead frames, including the semiconductor dies. Prior to testing or other processing of the lead frame strip, a gap is etched into a region of the leads which are shared by adjacent ones of the unit lead frames. The gap extends at least mostly through the shared leads. A partial cut is made in the molding compound around the periphery of the unit lead frames prior to the subsequent processing, including below the gap in the shared leads, to electrically isolate the leads of the unit lead frames. |
| US09324639B2 |
Electronic device comprising an improved lead frame
An electronic device includes a chip and a support element which supports the chip. Leads are provided to be electrically coupled to at least one terminal of the chip. A coupling element is mounted to a free region of the support element that is not occupied by the chip. The coupling element includes a conductive portion electrically connected to at least one lead and to the at least one terminal of the chip to obtain an electrical coupling. |
| US09324638B2 |
Compact wirebonded power quad flat no-lead (PQFN) package
Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections have been disclosed. One exemplary embodiment comprises a PQFN semiconductor package comprising a leadframe, a driver integrated circuit (IC) coupled to the leadframe, a plurality of vertical conduction power devices coupled to the leadframe, and a plurality of wirebonds providing electrical interconnects, including at least one wirebond from a top surface electrode of one of the plurality of vertical conduction power devices to a portion of the leadframe, wherein the portion of the leadframe is electrically connected to a bottom surface electrode of another of the plurality of vertical conduction power devices. In this manner, efficient multi-chip circuit interconnections can be provided in a PQFN package using low cost leadframes. |
| US09324637B1 |
Quad flat non-leaded semiconductor package with wettable flank
A Quad Flat Non-leaded (QFN) semiconductor package has a semiconductor die mounted on a die flag of a lead frame. A molded housing with a base and sides covers the die. The package has electrically conductive mounting feet each of which includes an exposed base surface in the base of the housing, an opposite parallel surface covered by the housing, and an exposed end surface in the one of the sides of the housing. The exposed end surface is normal to, and located between, the exposed base surface and the opposite parallel surface. Bond wires selectively electrically connect electrodes of the die to respective ones of the mounting feet. An electrically conductive plating coats the exposed base portion and exposed end surface of the mounting feet. |
| US09324635B2 |
Semiconductor interconnect structure having a graphene-based barrier metal layer
An interconnect structure and method for fabricating the interconnect structure having enhanced performance and reliability, by utilizing a graphene-based barrier metal layer to block oxygen intrusion from a dielectric layer into the interconnect structure and block copper diffusion from the interconnect structure into the dielectric layer, are disclosed. At least one opening is formed in a dielectric layer. A graphene-based barrier metal layer disposed on the dielectric layer is formed. A seed layer disposed on the graphene-based barrier metal layer is formed. An electroplated copper layer disposed on the seed layer is formed. A planarized surface is formed, wherein a portion of the graphene-based barrier metal layer, the seed layer, and the electroplated copper layer are removed. In addition, a capping layer disposed on the planarized surface is formed. |
| US09324630B2 |
Semiconductor device
A cooling fin 9 is joined to a semiconductor element 1. A resin 10 encapsulates the semiconductor element 1. A portion of the cooling fin 9 projects from a lower surface of the resin 10. A cooler 11 has an opening 12. The cooling fin 9 projecting from the resin 10 is inserted in the opening 12 of the cooler 11. The lower surface of the resin 10 and the cooler 11 are joined to each other by a joining material 13 such as an adhesive. Therefore, a reduction in the number of component parts and a reduction in weight can be achieved, and compatibility between the heat conductivity and the strength of joining can be ensured. |
| US09324625B2 |
Gated diode, battery charging assembly and generator assembly
A gated diode may include source zones and a drain zone which are both of a first conductivity type. The source zones directly adjoin a first surface of a semiconductor die and the drain zone directly adjoins an opposite second surface of the semiconductor die. The drain zone includes a drift zone formed in an epitaxial layer of the semiconductor die. Base zones of a second conductivity type, which is the opposite of the first conductivity type, are provided between the drain zones and the source zones. The drift zone further includes adjustment zones directly adjoining a base zone and arranged between the respective base zone and the second surface, respectively. A net dopant concentration in the adjustment zone is at least twice a net dopant concentration in the second sub-zone. The adjustment zones precisely define the reverse breakdown voltage. |
| US09324621B1 |
Providing shallow trench isolation structures through a backside of a metal-oxide semiconductor device
Embodiments of the present disclosure provide a method of making a metal-oxide semiconductor (MOS) device. The method comprises providing an apparatus that comprises a common source and drain well disposed within a substrate, and a gate disposed on the substrate, wherein the gate is substantially encapsulated within layers of the apparatus. The method further comprises removing a portion of the substrate and creating a shallow trench isolation (STI) structure through the substrate such that the STI structure engages the common source and drain well. |
| US09324615B2 |
Method for producing a semiconductor body
A method of producing a semiconductor body includes providing a semiconductor wafer having at least two chip regions and at least one separating region arranged between the chip regions, wherein the semiconductor wafer includes a layer sequence, an outermost layer of which has, at least within the separating region a transmissive layer transmissive to electromagnetic radiation, carrying out at least one of: removing the transmissive layer within the separating region, applying an absorbent layer within the separating region, increasing the absorption coefficient of the transmissive layer within the separating region, and separating the chip regions along the separating regions by a laser. |
| US09324614B1 |
Through via nub reveal method and structure
A method includes applying a backside passivation layer to an inactive surface of an electronic component and to enclose a through via nub protruding from the inactive surface. The method further includes laser ablating the backside passivation layer to reveal a portion of the through via nub. The backside passivation layer is formed of a low cost organic material. Further, by using a laser ablation process, the backside passivation layer is removed in a controlled manner to reveal the portion of the through via nub. Further, by using a laser ablation process, the resulting thickness of the backside passivation layer is set to a desired value in a controlled manner. Further, by using a laser ablation process, the fabrication cost is reduced as compared to the use of chemical mechanical polish. |
| US09324612B2 |
Shielded coplanar line
In one embodiment there is disclosed a method for manufacturing an integrated circuit in a semiconductor substrate including through vias and a coplanar line, including the steps of: forming active components and a set of front metallization levels; simultaneously etching from the rear surface of the substrate a through via hole and a trench crossing the substrate through at least 50% of its height; coating with a conductive material the walls and the bottom of the hole and of the trench; and filling the hole and the trench with an insulating filling material; and forming a coplanar line extending on the rear surface of the substrate, in front of the trench and parallel thereto, so that the lateral conductors of the coplanar line are electrically connected to the conductive material coating the walls of the trench. |
| US09324611B2 |
Corrosion resistant via connections in semiconductor substrates and methods of making same
Devices and methods for protecting the metal within a via in a semiconductor substrate from corrosion are provided. Specifically, embodiments of the present invention relate to disposing a corrosion resistant metal layer within a recess formed in a semiconductor substrate such that the metal subsequently deposited within the via will adhere to the corrosion resistant metal layer, then backgrinding the bottom surface of the semiconductor substrate to expose the corrosion resistant metal. For example, the metal deposited within the recess may be copper, while the corrosion resistant metal may be a noble metal such as palladium. |
| US09324608B2 |
Method for via plating with seed layer
Presented herein is a method for plating comprising providing a substrate having a dielectric layer formed over a trace, and forming a via/trench opening extending through the dielectric layer, the via/trench opening exposing a surface of the trace. The method further comprises forming a seed layer in the via/trench opening and contacting the trace and forming a protection layer over the seed layer. The protection layer is removed and a conductive layer deposited on the seed layer in a single plating process step by applying a plating solution in the via/trench opening. |
| US09324602B2 |
Substrate inverting apparatus and substrate processing apparatus
Provided is a technique which can properly invert a plurality of substrates at a time. To achieve this object, a substrate inverting apparatus includes: a support mechanism which supports a plurality of substrates in a state where the substrates are stacked vertically in a spaced-apart manner in a horizontal posture; and a clamping and inverting mechanism which clamps the plurality of substrates supported by the support mechanism respectively and inverts the plurality of substrates at a time. In the support mechanism, support members which support the substrate are moved to a standby position from a support position while being moved downward away from the center of the substrate as viewed in the vertical direction. On the other hand, in the clamping and inverting mechanism, clamping members which clamp the substrate are moved to a near position from a remote position by a clamping member drive part and are elastically biased by an elastic member toward side surfaces of the substrate at the near position. |
| US09324601B1 |
Low temperature adhesive resins for wafer bonding
A method for adhesive bonding in microelectronic device processing is provided that includes bonding a handling wafer to a front side of a device wafer with an adhesive comprising phenoxy resin; and thinning the device wafer from the backside of the device wafer while the device wafer is adhesively engaged to the handling wafer. After the device wafer has been thinned, the adhesive comprising phenoxy resin may be removed by laser debonding, wherein the device wafer is separated from the handling wafer. |
| US09324600B2 |
Mounting table structure and plasma film forming apparatus
A mounting table structure includes a mounting table body, made of a conductive material, for mounting thereon the processing target object and serving as an electrode; a base table, made of a conductive material, disposed below the mounting table body with a gap therebetween in a state insulated from the mounting table body; a support column, connected to the ground side, for supporting the base table; a high frequency power supply line, connected to the mounting table body, for supplying a high frequency bias power to the mounting table body; and a power stabilization capacitor provided between the ground side and a hot side to which the high frequency bias power is applied. Here, an electrostatic capacitance of the power stabilization capacitor is set to be larger than an electrostatic capacitance of a stray capacitance between the mounting table body and the protective cover member. |
| US09324596B2 |
Substrate storage rack
The present disclosure relates to a substrate storage rack, including a hollow rack body with a first, a second, a third, and a fourth lateral surfaces, wherein at least one substrate laying layer is arranged in the rack body along a vertical direction. The substrate laying layer includes: a first support connected with the rack body and arranged at the second lateral surface; first supporting bars transversely arranged on the first support and extending to the interior of the rack body; a second support connected with the rack body and arranged at the fourth lateral surface; and second supporting bars transversely arranged on the second support and extending to the interior of the rack body. Since the first and the second supporting bars are arranged on the second and the fourth lateral surfaces of the rack body respectively, storing substrates in the rack body can be ensured. Then, the first lateral surface can be used as a fetching and feeding port for an automatic manipulator arm and the fourth lateral surface can be used as a manual fetching and feeding port, so that bidirectional fetching and feeding of the substrates in the substrate storage rack can be realized, and thus the production efficiency can be effectively improved. |
| US09324587B2 |
Method for manufacturing semiconductor structure
A method includes followings operations. A substrate including a first surface and a second surface is provided. The substrate and a transparent film are heated to attach the transparent film on the first surface. A first coefficient of a thermal expansion (CTE) mismatch is between the substrate and the transparent film. The substrate and the transparent film are cooled. A polymeric material is disposed on the second surface. A second CTE mismatch is between the substrate and the polymeric material. The second CTE mismatch is counteracted by the first CTE mismatch. |
| US09324586B2 |
Chip-packaging module for a chip and a method for forming a chip-packaging module
A chip-packaging module for a chip is provided, the chip-packaging module including a chip including a first chip side, wherein the first chip side includes an input portion configured to receive a signal; a chip carrier configured to be in electrical connection with the first chip side, wherein the chip is mounted to the chip carrier via the first chip side; and a mold material configured to cover the chip on at least the first chip side, wherein at least part of the input portion is released from the mold material. |
| US09324582B2 |
Semiconductor package and fabrication method thereof
A fabrication method of a semiconductor package is disclosed, which includes the steps of: disposing a plurality of first semiconductor elements on an interposer; forming a first encapsulant on the interposer for encapsulating the first semiconductor elements; disposing a plurality of second semiconductor elements on the first semiconductor elements; forming a second encapsulant on the first semiconductor elements and the first encapsulant for encapsulating the second semiconductor elements; and thinning the interposer, thereby reducing the overall stack thickness and preventing warpage of the interposer. |
| US09324579B2 |
Metal structures and methods of using same for transporting or gettering materials disposed within semiconductor substrates
Embodiments of the present invention provide metal structures for transporting or gettering materials disposed on or within a semiconductor substrate. A structure for transporting a material disposed on or within a semiconductor substrate may include a metal structure disposed within the semiconductor substrate and at a spaced distance from the material. The metal structure is configured to transport the material through the semiconductor substrate and to concentrate the material at the metal structure. The material may include a contaminant disposed within the semiconductor substrate, e.g., that originates from electronic circuitry on the substrate. |
| US09324578B2 |
Hard mask reshaping
One or more systems and methods for reshaping a hard mask are provided. A semiconductor arrangement comprises one or more structures formed from a layer according to a target dimension, such as a width criterion, a length criterion, a spacing criterion, or other design constraints. To form such a structure, a hard mask is formed over the layer. Responsive to a dimension, such as a width, of the hard mask not corresponding to the target dimension, a first hard mask portion is modified to create a modified hard mask comprising a modified first hard mask portion. In some embodiments, the first hard mask portion is trimmed to decrease the dimension or coated with a coating material to increase the dimension. An etch of the layer is performed through the modified hard mask to create an etched layer comprising an etched portion, such as the structure, corresponding to the target dimension. |
| US09324576B2 |
Selective etch for silicon films
A method of etching patterned heterogeneous silicon-containing structures is described and includes a remote plasma etch with inverted selectivity compared to existing remote plasma etches. The methods may be used to conformally trim polysilicon while removing little or no silicon oxide. More generally, silicon-containing films containing less oxygen are removed more rapidly than silicon-containing films which contain more oxygen. Other exemplary applications include trimming silicon carbon nitride films while essentially retaining silicon oxycarbide. Applications such as these are enabled by the methods presented herein and enable new process flows. These process flows are expected to become desirable for a variety of finer linewidth structures. Methods contained herein may also be used to etch silicon-containing films faster than nitrogen-and-silicon containing films having a greater concentration of nitrogen. |
| US09324568B2 |
Method of forming a semiconductor device
A semiconductor device includes an active region, a gate conductor and a source electrode. The active region includes a drain region, a channel region stacked on the drain region, and a source region stacked on the channel region. The active region is formed of a silicon semiconductor layer. The gate conductor is embedded within a trench, which is formed from the source region to the drain region penetrating through the channel region. The source electrode is formed to come in contact with the source region and includes an adhesion layer. The source electrode is formed of a metal layer having a film thickness of 150 Å or smaller. The interface between the source electrode and the source region is silicidized. |
| US09324567B2 |
Gas cluster ion beam etching process for etching Si-containing, Ge-containing, and metal-containing materials
A method and system for performing gas cluster ion beam (GCIB) etch processing of various materials is described. In particular, the GCIB etch processing includes setting one or more GCIB properties of a GCIB process condition for the GCIB to achieve one or more target etch process metrics. Furthermore, the GCIB etch processing utilizes Si-containing and/or Ge-containing etchants. Further yet, the GCIB etch processing facilitates etching Si-containing material, Ge-containing material, and metal-containing material. |
| US09324566B1 |
Controlled spalling using a reactive material stack
A reactive material stack is formed above a surface of a base substrate. The reactive material stack includes metals which when subjected to heat energy or electrical energy can undergo a solid state reaction that provides an intermetallic compound. The intermetallic compound that forms has a smaller unit volume than the initial reactive material stack and, as such, induces a tensile stress within the base substrate which, in turn, initiates crack formation within the base substrate. This represents an initial stage of spalling. The crack formation can be propagated along a fracture plane within the base substrate by continued spalling. |
| US09324563B2 |
Methods of forming patterns
Methods of forming patterns are provided. The methods may include sequentially forming an etch-target layer and a photoresist layer on a substrate, exposing two first portions of the photoresist layer to light to transform the two first portions into two first photoresist patterns and exposing a second portion of the photoresist layer to light to transform the second portion into a second photoresist pattern disposed between the two first photoresist patterns. The method may also removing portions of the photoresist layer to leave the two first photoresist patterns and the second photo resist pattern on the etch-target layer such that the etch-target layer is exposed. |
| US09324561B2 |
Silicon carbide epitaxial wafer, and preparation method thereof
According to an embodiment, there is provided a method of fabricating an epitaxial wafer, which includes preparing a wafer in a susceptor; and growing an epitaxial layer on the wafer, wherein the growing of the epitaxial layer on the wafer includes supplying a raw material into the susceptor; growing the epitaxial layer on the wafer at a first growth rate; and growing the epitaxial layer on the wafer at a second growth rate higher than the first growth rate. According to an embodiment, there is provided a silicon carbide epitaxial wafer which includes a silicon carbide wafer; and a silicon carbide epitaxial layer on the silicon carbide wafer wherein a surface defect formed on the silicon carbide epitaxial layer is 1 ea/cm2 or less. |
| US09324559B2 |
Thin film deposition apparatus with multi chamber design and film deposition methods
A multi chamber thin film deposition apparatus and a method for depositing films, is provided. Each chamber includes a three dimensional gas delivery system including process gases being delivered downwardly toward the substrate and laterally toward the substrate. A pumping system includes an exhaust port in each chamber that is centrally positioned underneath the substrate being processed and therefore the gas flow around all portions of the edge of the substrate are equally spaced from the exhaust port thereby creating a uniform gas flow profile which results in film thickness uniformity of films deposited on both the front and back surfaces of the substrate. The deposited films demonstrate uniform thickness on the front and back of the substrate and extend inwardly to a uniform distance on the periphery of the backside of the substrate. |
| US09324557B2 |
Method for fabricating equal height metal pillars of different diameters
A process to form metal pillars on a flip-chip device. The pillars, along with a layer of solder, will be used to bond die pads on the device to respective substrate pads on a substrate. A photoresist is deposited over the device and a first set of die pads on the device are exposed by forming openings of a first diameter in the photoresist. Pillars of the first diameter are formed by electroplating metal onto the exposed die pads. Then a second photoresist deposited over the first photoresist covers the pillars of the first diameter. Openings of a second diameter are formed in the first and second photoresists to expose a second set of die pads. Pillars of the second diameter are formed by electroplating metal onto the exposed die pads. The photoresists are then removed along with conductive layers on the device used as part of the plating process. |
| US09324553B2 |
Multireflection time-of-flight mass spectrometer
A method of reflecting ions in a multireflection time of flight mass spectrometer is disclosed. The method includes guiding ions toward an ion mirror having multiple electrodes, and applying a voltage to the ion mirror electrodes to create an electric field that causes the mean trajectory of the ions to intersect a plane of symmetry of the ion mirror and to exit the ion mirror, wherein the ion are spatially focussed by the mirror to a first location and temporally focused to a second location different from the first location. Apparatus for carrying out the method is also disclosed. |
| US09324552B2 |
Periodic field differential mobility analyzer
A periodic field differential mobility analyzer apparatus for separating and identifying ionic analytes employs a series of elongated parallel channels, a pump, a first voltage providing an electric field Ex in a direction opposing the gas flow, a second voltage providing an electric field Ey in a direction perpendicular to the gas flow, an ion source, and a detector. The periodic field differential mobility analyzer provides high resolution and sensitivity. |
| US09324548B1 |
Method and device to increase the internal energy of ions in mass spectrometers
A method and a device increases (e.g., uniformly) the internal energy of ions, in order to remove water shells or adducts, to decompose clusters or molecular agglomerations, to unfold large folded ions, or to prepare ions for fragmentation with high yield. The ions can be heated at a gas pressure of a few hectopascal viscously dragged through a tube comprising on-axis RF fields with strong axial field components. The ions are introduced, as usual together with entraining gas, into a vacuum system of a mass spectrometer through a small hole or capillary, and are driven by the gas flow through the tube with the RF fields. The RF fields decelerate and re-accelerate the ions, which travel through the tube, in rapid succession mainly in forward and backward direction, thus causing high numbers of collisions with the gas molecules and heating up the ions in a uniform manner. |
| US09324547B2 |
Method and apparatus for mass analysis utilizing ion charge feedback
A method of mass analysis and a mass spectrometer are provided wherein a batch of ions is accumulated in a mass analyzer; the batch of ions accumulated in the mass analyzer is detected using image current detection to provide a detected signal; the number of ions in the batch of ions accumulated in the mass analyzer is controlled using an algorithm based on a previous detected signal obtained using image current detection from a previous batch of ions accumulated in the mass analyzer; wherein one or more parameters of the algorithm are adjusted based on a measurement of ion current or charge obtained using an independent detector located outside of the mass analyzer. |
| US09324546B2 |
Integrated capacitor transimpedance amplifier
Spectrometers including integrated capacitive detectors are described. An integrated capacitive detector integrates ion current from the collector (220) into a changing voltage. The detector includes a collector configured to receive ions in the spectrometer, a dielectric (228), and a plate (232) arranged in an overlapping configuration with collector on an opposite side of the dielectric. The detector also includes an amplifier (226). |
| US09324542B2 |
Plasma processing method and plasma processing apparatus
In a plasma processing apparatus of an exemplary embodiment, energy of microwaves is introduced from an antenna into the processing container through a dielectric window. The plasma processing apparatus includes a central introducing unit and a peripheral introducing unit. A central introduction port of the central introducing unit injects a gas just below the dielectric window. A plurality of peripheral introduction ports of the peripheral introducing unit injects a gas towards a periphery of the placement region. The central introducing unit is connected to with a plurality of first gas sources including a reactive gas source and a rare gas source through a plurality of first flow rate control units. The peripheral introducing unit is connected to with a plurality of second gas sources including a reactive gas source and a rare gas source through a plurality of second flow rate control units. |
| US09324540B2 |
Charged particle beam device
When a signal electron is detected by energy selection by combining and controlling retarding and boosting for observation of a deep hole, etc., the only way for focus adjustment is to use a change in magnetic field of an objective lens. However, since responsiveness of the change in magnetic field is poor, throughput reduces. A charged particle beam device includes: an electron source configured to generate a primary electron beam; an objective lens configured to focus the primary electron beam; a deflector configured to deflect the primary electron beam; a detector configured to detect a secondary electron or a reflection electron generated from a sample by irradiation of the primary electron beam; an electrode having a hole through which the primary electron beam passes; a voltage control power supply configured to apply a negative voltage to the electrode; and a retarding voltage control power supply configured to generate an electric field, which decelerates the primary electron beam, on the sample by applying the negative voltage to the sample, wherein the charged particle beam device performs focus adjustment while an offset between the voltage applied to the electrode and the voltage applied to the sample is being kept constant. |
| US09324539B2 |
Electron microscope sample holder for forming a gas or liquid cell with two semiconductor devices
A novel sample holder for specimen support devices for insertion in electron microscopes. The novel sample holder of the invention allows for the introduction of gases or liquids to specimens for in situ imaging, as well as electrical contacts for electrochemical or thermal experiments. |
| US09324530B2 |
Circuit for protecting against reverse polarity
A circuit for protecting an electric load against reverse polarity is provided by using a MOSFET (metal oxide semiconductor field-effect transistor), wherein: the circuit is connected on the input side to a voltage supply and on the output side to the load; the source connection of the MOSFET is connected to the voltage supply; the drain connection of the MOSFET is connected to the load; the circuit has dynamic behavior similar to a diode and at the same time low power loss; the gate of the MOSFET is connected to the collector of a first bipolar transistor; the source of the MOSFET is connected to the emitter of the first bipolar transistor; the base of the first bipolar transistor is controlled by a control current; and the control current is derived from the voltage at the drain of the MOSFET. |
| US09324529B2 |
Current direction sensitive circuit interrupter
A circuit interrupter includes a first terminal, a second terminal, separable contacts moveable between a closed position and an open position, an operating mechanism configured to open said separable contacts, an electromagnetic element electrically connected between the first terminal and the second terminal and cooperating with said operating mechanism, and a diode electrically connected between the first terminal and the second terminal and in parallel with the electromagnetic element. When a current flowing through the circuit interrupter flows in a first direction from the first terminal toward the second terminal, the current flows through the diode. When the current flowing through the circuit interrupter flows in a second direction from the second terminal toward the first terminal, the current flows through the electromagnetic element. |
| US09324526B2 |
Multi integrated switching device structures
A permanent magnet is pivotally mounted in a top spacer layer of a switching device and rests on a flex arm created in an underlying flex circuit layer. The underside of the flex arm rests on a thin bar formed in a lower spacer layer beneath which lies a base layer including an electromagnet. Activation of the electromagnet causes rotation of the flex arm to thereby close and open electrical contacts formed respectively on the underside of the flex arm and on the top surface of the base layer. |
| US09324525B2 |
Electromagnetic relay
An electromagnetic relay has a base having an upper surface, an electromagnet block, formed by winding a coil around a spool with at least one end provided with a guard portion and inserting an iron core through a through hole of the spool, mounted on the upper surface of the base such that a shaft center of the iron core is parallel to the base, a movable contact, provided at a free end of a movable touch piece that rotates based on magnetization and demagnetization of the electromagnet block, that is brought into contact with or separated from a fixed contact, and a press-fitting portion that is press-fitted into a press-fitting hole provided at the edge of the outward surface of the guard portion along the shaft center of the iron core. The press-fitting portion extends to the lateral side from a fixed contact terminal that has the fixed contact. |
| US09324522B2 |
Conduction breaking device
A conduction breaking device is provided that uses gas from a gas generator to move a cutter block in the thickness direction of a cuttable portion, thereby cutting the cuttable portion between the moving cutter block and a cutting edge portion of a cutting chamber. The cutter block is attached to the cuttable portion such that, before generation of gas by the gas generator, a part of the cutter block is located in the cutting chamber and at a position close to the cutting edge portion in a direction along the surface of the cuttable portion. |
| US09324521B2 |
Power switchgear
A vacuum valve includes a fixed side electrode on a fixed side current-carrying shaft and a movable side electrode on a movable side current-carrying shaft. An opening and closing unit is coaxially disposed with the movable side current-carrying shaft, and drives the movable side current-carrying shaft. A chattering suppression structure is coaxially disposed with the fixed side current-carrying shaft on the fixed side of the vacuum valve, and suppresses chattering. The opening and closing unit includes an electromagnetic operating mechanism which drives the movable side current-carrying shaft when energized. A contact pressure spring is coaxially disposed with the electromagnetic operating mechanism, and applies contact pressure between the movable side electrode and the fixed side electrode during contact closing of the vacuum valve. A release spring is coaxially disposed with the electromagnetic operating mechanism, and assists driving force of the electromagnetic operating mechanism during contact opening of the vacuum valve. |
| US09324518B2 |
Self-contained link module for gang-style high voltage dead tank breaker
A linkage and operating assembly is provided for a dead tank circuit breaker. The circuit breaker has a plurality of pole assemblies and an actuating assembly associated with each pole assembly for opening and closing a movable electrical contact of the associated pole assembly. The linkage and operating assembly includes a linkage module having a plurality of drive structures. Each drive structure has a portion constructed and arranged to be removably coupled to an associated actuating assembly. An operating mechanism is coupled with the linkage module for causing movement of the drive structures substantially simultaneously. When the portions of the drive structures are decoupled from the associated actuating assemblies, the linkage module together with the operating mechanism is constructed and arranged to be removed as a single unit from the circuit breaker. |
| US09324513B2 |
Method for evaluating the mechanical performances of a switchgear device and switchgear device for implementation of said method
The invention relates to a method for evaluating the mechanical performances of a switchgear device comprising at least one pole. Each pole comprises: a pair of contacts (12, 14); a support arm (16) for a first contact (14); a mechanism (22) for driving the support arm (16) comprising a rotary poles shaft (20) and energy accumulation means capable of driving a movement of the said arm in order to place the contacts (12, 14) in an open position. The method consists in: measuring the angle of rotation (θ) of the poles shaft (20) over a period of opening the contacts (12, 14); retrieving from the measurements at least one specific value; comparing the said specific value with specific initial operational specifications of the switchgear device; diagnosing the mechanical wear performances of the drive mechanism (22) as a function of a comparative state between the specific values obtained and those of the operational specifications. |
| US09324508B2 |
Substrate for electrode capable of undergoing reversible deformation
An apparatus including first and second electrodes separated by an electrolyte, at least one of the first and second electrodes including an actuating substrate configured to undergo reversible deformation during actuation, wherein reversible deformation of the actuating substrate causes a decrease in the internal resistance of the apparatus. |
| US09324507B2 |
Systems and methods for implementing high-temperature tolerant supercapacitors
Systems and methods in accordance with embodiments of the invention implement high-temperature tolerant supercapacitors. In one embodiment, a high-temperature tolerant super capacitor includes a first electrode that is thermally stable between at least approximately 80° C. and approximately 300° C.; a second electrode that is thermally stable between at least approximately 80° C. and approximately 300° C.; an ionically conductive separator that is thermally stable between at least approximately 80° C. and 300° C.; an electrolyte that is thermally stable between approximately at least 80° C. and approximately 300° C.; where the first electrode and second electrode are separated by the separator such that the first electrode and second electrode are not in physical contact; and where each of the first electrode and second electrode is at least partially immersed in the electrolyte solution. |
| US09324506B2 |
AMTEC cell and method for manufacturing the AMTEC cell
Disclosed is a modularized AMTEC cell which does not require a separate collector by using a metal support as an internal electrode, has durability and stability even at a high temperature and a high pressure, very easily joins the cell to a housing by inserting the cell into an insulating portion and sealing, minimizes the number of the parts and expands easily the system scale through the serial-parallel structure. |
| US09324504B2 |
Organic metal dye, and photoelectric element and dye-sensitized solar cell using the organic metal dye
The present invention relates to an organic metal dye comprising fused heterocyclic derivatives, and to a photoelectric element and to a dye-sensitized solar cell using the organic metal dye. |
| US09324500B2 |
Multilayer ceramic electronic component to be embedded in board and printed circuit board having multilayer ceramic electronic component embedded therein
There is provided a multilayer ceramic electronic component to be embedded in a board including: a ceramic body including dielectric layers and having first and second main surfaces opposing one another, first and second lateral surfaces opposing one another, and first and second end surfaces opposing one another; first and second internal electrodes stacked to be spaced apart from both end surfaces of the ceramic body at a predetermined distance with the dielectric layers interposed therebetween, respectively; and first and second external electrodes formed in both end portions of the ceramic body, wherein the first and second external electrodes include first and second base electrodes and first and second terminal electrodes formed on the first and second base electrodes, respectively, and a non-conductive paste layer is formed on both lateral surfaces of the ceramic body. |
| US09324494B2 |
Treatment device
A processing system according to the present invention includes: a diffusion processing section 10 which heats a sintered R-T-B based magnet body 1 and an RH diffusion source 2 made of either a metal or alloy of a heavy rare-earth element RH (which is at least one of Dy and Tb) while rotating; a sorting section 20 which selectively sorts the RH diffusion source 2 from the sintered R-T-B based magnet body 1 when the diffusion source and the magnet body come from the diffusion processing section 10; and a heat treatment processing section 30 which conducts a heat treatment process on the sintered R-T-B based magnet body 1, in which the heavy rare-earth element RH has been diffused and from which the RH diffusion source 2 has been removed. |
| US09324493B2 |
Actuator for a tap changer
An actuator for a tap changer of an electrical transformer, including: a piston, being hollow to define a piston space; a cylinder arranged around the piston such that the piston is arranged to be movable axially into and out of the cylinder; a piston ring fixed to the outside surface of the piston such that a cylinder space is formed between the piston and the cylinder and delimited by the piston ring, the cylinder space having a variable volume which is configured to vary with axial movement of the piston; and a spring engaging both the piston and the cylinder such that the spring is able to be compressed and elongated, respectively, with axial movement of the piston. The piston space is connected to the cylinder space via at least one hole through the hollow piston. The piston space is connected to an outside of the piston. |
| US09324489B2 |
Thin film inductor with extended yokes
A thin film inductor with top and bottom pole pieces that are mechanically connected to each other at at least two via zones, to create a magnetically permeable yoke that defines at least one interior space. Enclosed portion(s) of a winding member pass through the interior space(s) of the yoke. The enclosed portion(s) of the winding member define an axial direction and a transverse direction. The pole pieces extend beyond the via zones in the axial and/or transverse direction. The extended pole pieces improve magnetic performance of the thin film inductor, by effectively moving pole piece edges away from locations of high magnetic flux density. |
| US09324488B2 |
Solenoid assembly
A solenoid assembly includes a coil assembly having a coil and a bobbin surrounding the coil. A first post extends from the bobbin. Electrical current is supplied to the coil through the first post. An armature at least partially surrounds the coil assembly and is configured so that the first post extends through the armature. The armature is configured to translate relative to the pole piece when the coil is energized. A feature is configured to prevent the armature from contacting the first post when the armature translates. |
| US09324482B1 |
High impedance resistor device applied in high voltage environment
A high impedance resistor device is applied in high voltage environment. The high impedance resistor device includes a voltage-endurance column, a first end, a second end, and a plurality of high impedance resistors. The first end and second end are configured at two ends of the voltage-endurance column. The plurality of high impedance resistors are connected to each other in series from the first end to the second end, and surrounded by the voltage-endurance column. The neighbored high impedance resistors are separated by an interval so as to avoid ash and water vapor accumulated at the connecting portion, and maintains the stability high impedance. The connecting portion between the two high impedance resistors is separated by a distance with the voltage-endurance column. And the connecting portion is configured a pellet connector to avoid point discharge phenomena. |
| US09324480B2 |
Interference prevention apparatus and method
An interference prevention apparatus includes a control module configured to send a working signal to the interference prevention module. An interference prevention module is configured to receive the working signal and to control a working state of a first component. The first component is connected to the control module by a first connection wire. The first connection wire is divided into at least two segments by an interference prevention material, which is connected to ground. |
| US09324479B2 |
Differential transmission cable and multipair differential transmission cable
A differential transmission cable includes a pair of inner conductors; an insulator that separately or integrally covers the pair of inner conductors; an outer conductor disposed around the insulator; a wrapping tape wound around the outer conductor; and a drain wire disposed outside of the wrapping tape, the drain wire being electrically connected to the outer conductor for grounding the outer conductor. |
| US09324477B2 |
Shielded electrical cable
A shielded electrical cable includes a conductor set, two generally parallel shielding films disposed around the conductor set, and a transition portion defined by the shielding films and the conductor set. The conductor set includes one or more substantially parallel longitudinal insulated conductors. The shielding films include a concentric portion substantially concentric with at least one of the conductors and a parallel portion wherein the shielding films are substantially parallel. The transition portion provides a gradual transition between the concentric portion and the parallel portion of the shielding films. |
| US09324468B2 |
Multileaf collimators with transverse motion
A collimation assembly includes a multileaf collimator and motion assembly. The multileaf collimator includes a support body and a plurality of pairs of beam blocking leaves supported by the support body. The beam blocking leaves are longitudinally movable in a first direction. The motion assembly includes an actuator and a guide assembly operable to move the support body and thereby allowing the plurality of pairs of beam blocking leaves to move in a second direction generally transverse to the first direction. |
| US09324462B2 |
Reactor head seismic support tie rod system
A quick disconnect for a control rod drive mechanism seismic support tie rod system that is remotely operable from a nuclear power plant's operating deck. A wall mounted anchor in the reactor cavity contains one half of a disconnect coupling that interfaces with the other half of the disconnect coupling on the ends of the tie rods employing a remote winching system that is actuated from the top of the reactor head assembly. A latching mechanism is then actuated from the refueling cavity operating deck to lock the tie rod in place and prevent displacement during a seismic or pipe break event. The tie rod may similarly be unlocked from the wall anchor and raised above the reactor head assembly as part of a reactor head disassembly operation to gain access to the core of the reactor vessel for refueling. |
| US09324460B1 |
Repair circuit, semiconductor memory device and method of operating the same
A repair circuit includes a column repair signal generation block suitable for comparing an input address with respective first and second repair addresses in response to a mode control signal, and generating first and second column repair signals; a normal decoder suitable for accessing any one of a first normal column line corresponding to the input address and a second normal column line corresponding to an address that is different in terms of a most significant bit from the input address, in response to the first and second column repair signals; and a redundancy decoder suitable for decoding the first repair address in response to the first and second column repair signals, wherein the second repair address is generated by inverting a most significant bit of the first repair signal. |
| US09324457B2 |
Nonvolatile memory
According to one embodiment, a nonvolatile memory includes a memory area including a first magnetoresistive element, and a fuse circuit including a second magnetoresistive element serving as an anti-fuse element and configured to store correction information of the memory area when a defect exists in the memory area. The first magnetoresistive element includes a first storage layer, a first reference layer, and a first insulating film between the first storage layer and the first reference layer. The second magnetoresistive element includes a second storage layer, a second reference layer, and a second insulating film between the second storage layer and the second reference layer. |
| US09324456B2 |
Self-diagnosing method of a volatile memory device and an electronic device performing the same
In a self-diagnosing method of a volatile memory device, a processor outputs a self-refresh entrance command and enters a power save mode, and a volatile memory device performs a self-diagnosing operation for a plurality of memory cells in response to the self-refresh entrance command while the processor is in the power save mode. |
| US09324455B2 |
Apparatus for measuring signal skew of asynchronous flash memory controller
A method of measuring skew between signals from an asynchronous integrated flash memory controller (IFC) includes connecting input/output (I/O) pins of the IFC to cycle based test equipment (ATE). The ATE applies a pattern of test signals as input drive to the IFC. Relative to the test cycle, the earliest delay time at which output signals from all of the I/O pins first correspond with expected results, and the latest delay time at which the output signals still correspond with the expected results are measured. The difference between the latest and the earliest delay times is compared with a limit value and a comparison report is generated. |
| US09324453B2 |
Memory unit and method of testing the same
A memory unit that includes a tracking unit, a scan chain and a scan chain control unit. The tracking unit includes a tracking bit line, wherein the tracking unit is configured to receive a tracking control signal, selectively charge or discharge a voltage on the tracking bit line in response to the tracking control signal and generate a sense amplifier signal. The scan chain includes one or more logic devices, wherein the scan chain is configured to receive at least a first control signal. The scan chain control unit is connected to the scan chain and the tracking unit. The scan chain control unit is configured to receive the sense amplifier signal and generate the first scan chain control signal. |
| US09324450B2 |
NAND flash memory
Serial NAND flash memory may be provided with the characteristics of continuous read of the memory across page boundaries and from logically contiguous memory locations without wait intervals, while also being clock-compatible with the high performance serial flash NOR (“HPSF-NOR”) memory read commands so that the serial NAND flash memory may be used with controllers designed for HPSF-NOR memory. Serial NAND flash memory having these compatibilities is referred to herein as high-performance serial flash NAND (“SPSF-NAND”) memory. Since devices and systems which use HPSF-NOR memories and controllers often have extreme space limitations, HPSF-NAND may also be provided with the same physical attributes of low pin count and small package size of HPSF-NOR memory for further compatibility. HPSF-NAND memory is particularly suitable for code shadow applications, even while enjoying the low “cost per bit” and low per bit power consumption of a NAND memory array at higher densities. |
| US09324446B2 |
Non-volatile semiconductor storage device, and memory system
A non-volatile semiconductor storage device includes an memory cell array including first and second blocks, each of which includes a plurality of memory strings each having n (n: natural number) memory cells, and a optionally a peripheral circuit for controlling the memory cell array. In this non-volatile semiconductor storage device, n signal lines are arranged in the first block, and m (n>m, m: natural number) signal lines are arranged in the second block, such that the second block size is smaller than the first block size. |
| US09324442B2 |
Semiconductor memory device
A semiconductor memory device includes a memory cell, a sense amplifier electrically connected to the memory cell, the sense amplifier including a node for sensing a voltage during a sense operation and a data latch electrically connected to the node and configured to hold a first voltage corresponding to a voltage of the node when a strobe signal is issued during a strobe operation, and a controller configured to raise the voltage of the node during the strobe operation before the strobe signal is issued. |
| US09324441B1 |
Fast adaptive trimming of operating parameters for non-volatile memory devices
As memory devices scale down, the controller may use different sets of trim values for read/program/erase operations for different blocks based on the amount of wear a block has experienced. To facilitate this process, when the controller issues series of commands, a set of parameters for the operations are initially transferred into latches that are normally used for user data, after which they are transferred into the registers used to hold the parameters while the operation is performed. This allows for read, write and erase parameters to be updated with minimal time penalty and on the fly, allowing for these trim values to be changed more frequently and without the need to add extra registers on the memory circuit. |
| US09324438B2 |
Method of operating incrementally programmable non-volatile memory
An array of programmable non-volatile devices, such as a nominal OTP cell, is operated such that a Vt representing a particular binary logic state is changed over time. This allows for re-programming and emulating a few times or multi-time programmable device. |
| US09324434B2 |
Determining memory page status
The present disclosure includes methods, devices, modules, and systems for operating semiconductor memory. One method embodiment includes determining a status of a page of memory cells without using input/output (I/O) circuitry, and outputting the status through the I/O circuitry. |
| US09324430B2 |
Method for defining a default state of a charge trap based memory cell
A method of generating a default state in an embedded Multi-Time-Programmable-Read-Only-Memory for a high-performance logic technology consisting of a plurality of memory cells featuring a charge trap, each having a first and a second NMOS transistor. The first and second NMOS transistors use a different mask having different threshold voltages. The second NMOS threshold voltage is adjusted to a middle point of the threshold voltage of the first NMOS with or without trapping the charge. When the charge is not trapped by the first NMOS, the NMOS threshold is lowered to the second NMOS, thereby generating a default state. When the charge is trapped to the first NMOS, the NMOS threshold is higher than the second NMOS, generating a second state. Moreover, a reference voltage generation can use two arrays, each consisting of memory cells and reference memory cells such that a default state can be generated for a single transistor per memory cell. |
| US09324424B2 |
Memory device and access method
A memory device includes multiple bit lines extending in a first direction, multiple word lines extending in a second direction crossing the first direction, and multiple memory cells each coupled to corresponding two word lines and corresponding two bit lines. Each memory cell includes a memory element configured to store information on the basis of changes in resistance and two select transistors. One terminal of the memory element is coupled to one of the two bit lines corresponding to the memory cell; the other terminal is coupled to respective drains of the select transistors; respective sources of the select transistors are coupled to the other bit line; a gate of one of the select transistors is coupled to one of the two word lines corresponding to the memory cell; and a gate of the other is coupled to the other word line. |
| US09324422B2 |
Adaptive resistive device and methods thereof
A system that incorporates teachings of the subject disclosure may include, for example, a device including a nanoelectrode having a gap, and a resistive change material located in the gap, wherein an application of a voltage potential across first and second terminals of the nanoelectrode causes the resistive change material to modify at least one non-volatile memory state of the resistive change material. Additional embodiments are disclosed. |
| US09324421B2 |
Method and circuit for switching a memristive device
A method of switching a memristive device applies a current ramp of a selected polarity to the memristive device. The resistance of the device during the current ramp is monitored. When the resistance of the memristive device reaches the target value, the current ramp is removed. |
| US09324420B2 |
Method of estimating deterioration state of memory device and related method of wear leveling
A method of estimating a deterioration state of a memory device comprises reading data from selected memory cells connected to a selected wordline of a memory cell array by applying to the selected wordline a plurality of distinct read voltages having values corresponding to at least one valley of threshold voltage distributions of the selected memory cells, generating quality estimation information indicating states of the threshold voltage distributions using the data read from the selected memory cells, and determining a deterioration state of a storage area including the selected memory cells based on the generated quality estimation information. |
| US09324419B2 |
Multiple pass programming for memory with different program pulse widths
Techniques are provided for programming memory cells while reducing the effects of detrapping which cause a downshift in the threshold voltage distribution. Detrapping is particularly problematic for charge-trapping memory cells such as in a 3D stacked non-volatile memory device. After completion of a full programming pass, a verify test is performed to identify cells for which reprogramming is warranted. The reprogramming can include multiple program-verify iterations which use longer program pulses than in the full programming pass. Moreover, the number of program-verify iterations is limited to reduce the reprogramming time. In one approach, cells of all target data states are programmed together. In another approach, cells of different target data states are programmed separately. |
| US09324414B2 |
Selective dual cycle write operation for a self-timed memory
A write is performed to a first cell of a memory at a first row and column during a first memory access cycle. A memory access operation is made to a second cell at a second row and column during an immediately following second memory access cycle. If the memory access is a read from the second cell and the second row is the same as the first row, or if the memory access is a write to the second cell and the second row is the same as the first row and the second column is different than the first column, then a simultaneous operation is performed during the second memory access cycle. The simultaneous operation is an access of the second cell (for read or write) and a re-write of data from the first memory access cycle write operation back to the first cell. |
| US09324411B2 |
Multi-die memory device
A memory is disclosed that includes a logic die having first and second memory interface circuits. A first memory die is stacked with the logic die, and includes first and second memory arrays. The first memory array couples to the first memory interface circuit. The second memory array couples to the second interface circuit. A second memory die is stacked with the logic die and the first memory die. The second memory die includes third and fourth memory arrays. The third memory array couples to the first memory interface circuit. The fourth memory array couples to the second memory interface circuit. Accesses to the first and third memory arrays are carried out independently from accesses to the second and fourth memory arrays. |
| US09324409B1 |
Method and apparatus for gating a strobe signal from a memory and subsequent tracking of the strobe signal over time
A method, non-transitory computer readable medium and circuit for gating a strobe (DQS) signal are disclosed. The method sends a read command to a memory, sends a strobe clock signal after the read command is sent and before the DQS signal is received from the memory, wherein the strobe clock signal comprises a duration equal to a duration of the DQS signal, gates the DQS signal based on the strobe clock signal to generate a positively gated strobe signal for indicating a rising edge of the DQS signal, wherein the gating is performed during a pre-amble of the DQS signal and generates a negatively gated strobe signal based on the positively gated strobe signal for indicating a falling edge of the DQS signal. |
| US09324408B2 |
Semiconductor devices and semiconductor systems including the same
A semiconductor memory device may include a power control signal generator and a sense amplifier circuit. The power control signal generator may generate a first power control signal, the first power control signal having an enablement period that may be controlled in response to a temperature signal having a cycle time. The cycle time may be controlled according to a mode signal and an internal temperature. The sense amplifier circuit may generate a first power signal driven to have a first drive voltage in response to the first power control signal. In addition, the sense amplifier circuit may sense and amplify a level of a bit line using the first power signal as a power supply voltage. |
| US09324403B2 |
Voltage-controlled magnetic anisotropy (VCMA) switch and magneto-electric memory (MERAM)
Voltage controlled magnetic tunnel junctions and memory devices are described which provide efficient high speed switching of non-volatile magnetic devices at high cell densities. Implementations are described which provide a wide range of voltage control alternatives with in-plane and perpendicular magnetization, bidirectionally switched magnetization, and control of domain wall dynamics. |
| US09324399B2 |
System and method for a level shifting decoder
According to various embodiments described herein, a circuit includes a decode logic circuit, a buffer coupled to the decode logic, a positive level shifter with an input coupled to receive address signals and an output coupled to the buffer, and a negative level shifter with an input coupled to receive the address signals and an output coupled to the buffer. |
| US09324394B2 |
Strobe signal generation device and memory apparatus using the same
A strobe signal generation device includes an enable signal generating section, a buffering section and a strobe signal driving section. The enable signal generation section generates a division enable signal in response a strobe signal. The buffering section configured to generate a delayed strobe signal from the strobe signal while the division enable signal is enabled. The strobe signal driving section configured to generate a plurality of data strobe signals with a larger pulse width than the delayed strobe signal, in response to the division enable signal and the delayed strobe signal. |
| US09324393B2 |
Tracking mechanisms
A tracking circuit in a memory macro includes a data line, a tracking cell electrically coupled with the data line, a logical gate, a feedback transistor, and a plurality of pulling devices. The logical gate has an input terminal and an output terminal. The input terminal of the logical gate is electrically coupled with the data line. The feedback transistor has a first terminal, a second terminal, and a gate terminal. The first terminal of the feedback transistor is electrically coupled with the data line, and the gate terminal of the feedback transistor is electrically coupled with the output terminal of the logical gate. The plurality of pulling devices is configured to pull the second terminal of the feedback transistor toward a first voltage. |
| US09324388B2 |
Allocating memory address space between DIMMs using memory controllers
A memory controller enters a memory mode, allocating memory address space within a pair of dual in line memory modules (DIMMs) such that each DIMM of the pair contains unallocated memory address space corresponding to allocated memory space in the other DIMM. The memory controller enters another memory mode, modifying the allocation of the memory address space from a first DIMM of the pair of DIMMs to a second DIMM of the pair of DIMMs. The data is moved from allocated memory address space of the first DIMM to unallocated memory address space in the second DIMM. |
| US09324380B2 |
Stacked semiconductor apparatus and semiconductor system capable of inputting signals through various paths
A semiconductor apparatus includes a control signal reception portion. The control signal reception portion may set information related to operation of a memory chip by receiving a command signal and an address signal from one among a stack chip test portion, a control signal interface portion and a test setting portion. |
| US09324379B2 |
Mobile terminal and controlling method thereof
A mobile terminal providing a thumbnail enabling overall content of a video to be previewed and a controlling method thereof are disclosed. The mobile terminal includes a memory, a display, and a controller for selecting a plurality of video frames of the video to create a plurality of representative images, creating a representative thumbnail image of the video comprising at least the plurality of representative images, and displaying the representative thumbnail image to correspond to the video. |
| US09324374B2 |
Method and system for automatic generation of clips from a plurality of images based on an inter-objects relationship score
A method and a system for automatic generation of clips from a plurality of images based on inter-object relationships score are provided herein. The method may include: obtaining a plurality of images, wherein at least two of the images contain at least one object over a background; analyzing at least some of the images to detect objects; extracting geometrical meta-data of at least some of the detected objects; calculating an inter-object relationships score for at least some of the detected objects; and determining a spatio-temporal arrangement of at least some of the objects and at least some of the images based at least partially on the inter-object relationships score and the geometrical meta-data of at least some of the detected objects. |
| US09324373B2 |
Determining updates for a video tutorial
Embodiments of the present invention disclose a computer implemented method, computer program product, and system for updating a video tutorial. In accordance with an embodiment, the method includes the steps of determining a number of users of a video tutorial that have performed a set of actions that are different than a set of actions displayed in the video tutorial, determining that the number of users of the video tutorial that have performed the set of actions that are different meets a threshold condition, and identifying a segment of the video tutorial to remove, wherein the identified segment includes the set of actions displayed in the video tutorial that are different. The method may further include creating an updated video tutorial by replacing the identified segment of the video tutorial with a video of the set of actions that are different than the set of displayed actions. |
| US09324369B2 |
Data recording medium and method for generating a reference clock signal
Various embodiments provide a recording medium. The recording medium may include a dedicated servo layer for providing servo information. The dedicated servo layer may include a plurality of tracks. A first track may include a first servo signal. A second track may include a second servo signal. The first servo signal and the second servo signal may include a plurality of common transitions. The transitions may be provided at a pre-determined frequency. |
| US09324368B2 |
Method and structure for improving performance and storage density in a data storage device
A data storage device with improved data storage densities, coupled with lower hard error and write-inhibit events is described. A feed-forward write inhibit (FFWI) method enables data tracks to be written more densely. Alternatively, the FFWI method may reduce the hard error and write inhibit events to improve data storage performance. A concept of virtual tracks enables the FFWI method to be applied to the writing of circular data tracks with non-circular servo tracks, or to the writing of non-circular data tracks with PES data from circular servo tracks—in both cases, improvements to performance and/or storage densities are enabled. The FFWI method may also be applied to the case of both non-circular servo and data tracks. |
| US09324366B1 |
Controlling track density in storage discs
Devices including at least one storage disc having a recording surface segmented into a plurality of radial zones, each radial zone having an inner diameter and an outer diameter, each of the plurality of zones having a plurality of concentric tracks; and a track density ramp ratio assigned to each of the plurality of zones, where the track density ramp ratio describes an increase in the track density from the inner diameter of the zone to the outer diameter of the zone. |
| US09324363B2 |
Systems and methods for floating variance branch metric calculation
The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for data detection. As one example, a data processing system is described that includes a variance calculation circuit operable to calculate a variance of a data input; and a branch metric calculation circuit operable to calculate a branch metric based at least in part on the variance. |
| US09324358B2 |
Controlling data writing of tape recording apparatus
A tape recording apparatus according to one embodiment includes a magnetic head and a controller coupled to the magnetic head. The tape recording apparatus is configured to: write data on a tape medium in a direction from a first end toward a second end of the tape medium using the magnetic head; and wrap-turn a running direction of the tape medium before reaching the second end and write a first portion of data remaining to be written when the data remaining to be written is smaller than a volume of the data to be written in one running of the tape medium so that an end of the data is written at a position close to the first end, and write a second portion of data remaining to be written toward the first end. |
| US09324355B2 |
Pattern formation method, stamper manufacturing method, and magnetic recording medium manufacturing method
According to one embodiment, a pattern formation method includes steps of forming a layer to be processed on a substrate, forming a metal microparticle layer by coating the layer to be processed with a metal microparticle coating solution containing metal microparticles and a solvent, reducing a protective group amount around the metal microparticles by first etching, forming a protective layer by exposing the substrate to a gas containing C and F and adsorbing the gas around the metal microparticles to obtain a projection pattern, and transferring the projection pattern to the layer to be processed by second etching. |
| US09324353B2 |
Dual segregant heat assisted magnetic recording (HAMR) media
In one embodiment, a magnetic media suitable for HAMR recording includes a recording layer having first and second magnetic layers. The first magnetic layer has a first segregant between magnetic grains thereof, the first segregant being primarily C. Moreover, the second magnetic layer is formed above the first magnetic layer. The second magnetic layer has a second segregant between magnetic grains thereof, the second segregant being primarily C and a second component. Additional systems and methods are also described herein. |
| US09324350B2 |
High density timing based servo format for use with tilted transducer arrays
An apparatus according to one embodiment includes a magnetic head having servo writers each configured to write a servo pattern having a first magnetic bar and a third magnetic bar oriented to form a chevron-like pattern with the first magnetic bar, the first magnetic bars each having a longitudinal axis oriented at a first angle between 2 and 88 degrees from an intended direction of tape travel thereacross, the third magnetic bars each having a longitudinal axis oriented at a second angle between 2 and 88 degrees from the intended direction of tape travel thereacross, the second angle having a different numerical absolute value than the first angle. The apparatus also includes a drive mechanism for passing the magnetic recording tape over the magnetic head, and a controller electrically coupled to the magnetic head. |
| US09324348B2 |
Detecting a servo pattern using a data channel in a magnetic tape drive
In one embodiment, a system for processing data includes an equalizer having a finite impulse response (FIR) filter configured to process data read with a channel using servo coefficients to generate equalized data, and one or more low-pass filters configured to filter the equalized data to output filtered data. The one or more low-pass filters is configured to remove high frequency noise from the equalized data. A method for processing data in a read channel, in one embodiment, includes receiving data read from a magnetic tape using the read channel of a magnetic tape drive. A finite impulse response (FIR) filter is applied to the data by an equalizer using servo coefficients to output equalized data. One or more low-pass filters is applied to the equalized data to obtain filtered data, the one or more low-pass filters being configured to remove high frequency noise from the equalized data. |
| US09324347B2 |
Apparatus and method for controlling tape movement in a rotary head data storage system and retrieval system
A method is provided for controlling movement of a tape in a data storage and retrieval system having a tape roller servo subsystem for controlling movement of a tape, and a head servo subsystem for controlling position of a head element mounted on a rotatable carriage unit. The method includes receiving, from the head servo subsystem, a head element position feedback signal at the tape roller servo subsystem; and controlling movement of the tape by the tape roller servo subsystem based, at least in part, on the head element position feedback signal. |
| US09324346B1 |
Head stack assembly with a flexible printed circuit having a mouth centered between arms
A novel head stack assembly (HSA) is disclosed and claimed. The HSA includes a flexible printed circuit (FPC) having a mouth with an upper mouth edge and a lower mouth edge. The FPC includes a first plurality of conductive terminals immediately adjacent the upper mouth edge and a second plurality of conductive terminals immediately adjacent the lower mouth edge. The mouth defines and is bisected by a mouth centerline disposed equidistant from the upper mouth edge and the lower mouth edge. The mouth centerline is substantially parallel to and substantially equidistant from first and second actuator arms of the HSA. A first plurality of conductive traces of a first head gimbal assembly (HGA) is electrically connected to the first plurality of conductive terminals, and a second plurality of conductive traces of a second HGA is electrically connected to the second plurality of conductive terminals. |
| US09324338B2 |
Denoising noisy speech signals using probabilistic model
A method determines from an input noisy signal sequences of hidden variables including at least one sequence of hidden variables representing an excitation component of the clean speech signal, at least one sequence of hidden variables representing a filter component of the clean speech signal, and at least one sequence of hidden variables representing the noise signal. The sequences of hidden variables include hidden variables determined as a non-negative linear combination of non-negative basis functions. The determination uses the model of the clean speech signal that includes a non-negative source-filter dynamical system (NSFDS) constraining the hidden variables representing the excitation and the filter components to be statistically dependent over time. The method generates an output signal using a product of corresponding hidden variables representing the excitation and the filter components. |
| US09324337B2 |
Method and system for dialog enhancement
A method and system for enhancing dialog determined by an audio input signal. In some embodiments the input signal is a stereo signal, and the system includes an analysis subsystem configured to analyze the stereo signal to generate filter control values, and a filtering subsystem including upmixing circuitry configured to upmix the input signal to generate a speech channel and non-speech channels and a peaking filter configured to filter the speech channel to enhance dialog while being steered by at least one of the control values. The filtering subsystem also includes ducking circuitry for attenuating the non-speech channels while being steered by at least some of the control values, and downmixing circuitry configured to combine outputs of the peaking filter and ducking circuitry to generate a filtered stereo output. In some embodiments, the system is configured to downmix a multichannel input signal to generate a downmixed stereo signal, an analysis subsystem is configured to analyze the downmixed stereo signal to generate filter control values, and a filtering subsystem is configured to generate a dialog-enhanced audio signal in response to the input signal while being steered by at least some of the filter control values. Preferably, the filter control values are generated without use of feedback including by generating power ratios (for pairs of speech and non-speech channels) and preferably also shaping in nonlinear fashion and scaling at least one of the power ratios. |
| US09324328B2 |
Reconstructing an audio signal with a noise parameter
A method for reconstructing an audio signal having a baseband portion and a highband portion is disclosed. The method includes decoding an encoded audio signal to obtain a decoded baseband audio signal, filtering the decoded baseband audio signal to obtain subband signals, and generating a high-frequency reconstructed signal by copying a number of consecutive subband signals. The method also includes adjusting a spectral envelope of the high-frequency reconstructed signal based on an estimated spectral envelope of the highband portion extracted from the encoded audio signal to obtain an envelope adjusted high-frequency signal, generating a noise component based on a noise parameter extracted from the encoded audio signal, and adding the noise component to the envelope adjusted high-frequency signal to obtain a noise and envelope adjusted high-frequency signal. |
| US09324327B2 |
Spoken control for user construction of complex behaviors
A device interface system is presented. Contemplated device interfaces allow for construction of complex device behaviors by aggregating device functions. The behaviors are triggered based on conditions derived from environmental data about the device. |
| US09324323B1 |
Speech recognition using topic-specific language models
Speech recognition techniques may include: receiving audio; identifying one or more topics associated with audio; identifying language models in a topic space that correspond to the one or more topics, where the language models are identified based on proximity of a representation of the audio to representations of other audio in the topic space; using the language models to generate recognition candidates for the audio, where the recognition candidates have scores associated therewith that are indicative of a likelihood of a recognition candidate matching the audio; and selecting a recognition candidate for the audio based on the scores. |
| US09324319B2 |
Method and apparatus for exemplary segment classification
Method and apparatus for segmenting speech by detecting the pauses between the words and/or phrases, and to determine whether a particular time interval contains speech or non-speech, such as a pause. |
| US09324318B1 |
Creation and application of audio avatars from human voices
A subject voice is characterized and altered to mimic a target voice while maintaining the verbal message of the subject voice. Thus, the words and message are the same as in the original voice, but the voice that conveys the words and message in the altered voice is different. Audio signals corresponding to the altered voice are output, for example to an application for playback to a user, or to another application or device for subsequent playback by the user or someone else. In one embodiment, the altered voice is posted to a social network. In other embodiments, the altered voice is used by other software applications or consumer electronics applications, such as GPS guidance systems, ebook readers, voice-based intelligent personal assistants, chat applications, and/or others that use voice as an input or output. |
| US09324317B2 |
System and method for synthetically generated speech describing media content
Disclosed herein are systems, methods, and computer readable-media for providing an automatic synthetically generated voice describing media content, the method comprising receiving one or more pieces of metadata for a primary media content, selecting at least one piece of metadata for output, and outputting the at least one piece of metadata as synthetically generated speech with the primary media content. Other aspects of the invention involve alternative output, output speech simultaneously with the primary media content, output speech during gaps in the primary media content, translate metadata in foreign language, tailor voice, accent, and language to match the metadata and/or primary media content. A user may control output via a user interface or output may be customized based on preferences in a user profile. |
| US09324316B2 |
Prosody generator, speech synthesizer, prosody generating method and prosody generating program
There is provided a prosody generator that generates prosody information for implementing highly natural speech synthesis without unnecessarily collecting large quantities of learning data. A data dividing means 81 divides into subspaces the data space of a learning database as an assembly of learning data indicative of the feature quantities of speech waveforms. A density information extracting means 82 extracts density information indicative of the density state in terms of information quantity of the learning data in each of the subspaces divided by the data dividing means 81. A prosody information generating method selecting means 83 selects either a first method or a second method as a prosody information generating method based on the density information, the first method involving generating the prosody information using a statistical technique, the second method involving generating the prosody information using rules based on heuristics. |
| US09324315B2 |
Loudspeaker diaphragm and loudspeaker using same
The present invention relates to a type of vibrating membrane for speakers comprising the vibrating membrane body which comprises: A bottom layer used to reinforce the low frequency, a surface disposed on the said bottom layer, a composite metal layer used to ensure vibration uniformity, and a composite platy layer used for HF compensation disposed between the said bottom layer and the said composite metal layer. A type of speaker with the structure of the said vibrating membrane is also disclosed in the invention. Application of the vibrating membrane for speakers and the speaker using the said vibrating membrane as claimed in the invention could be such as to: enable excellent transient response speed, ensure vibration uniformity and obtain flat response in the working area; eliminate MF (medium frequency) and HF (high frequency) resonance to meet the full frequency band requirements of the headphone speakers; boast good flexural behavior to make the speaker structure more stable and less prone to deformation, thereby extending the service life and promoting the quality of the product. |
| US09324308B1 |
Guitar string bender
The invention pertains to a string bender device for use with a stringed instrument, particularly with a guitar. The bending device comprises a mount, an activation lever and a spring device coupled therebetween. The string bender further includes an anchoring arrangement to secure the anchor portion of a guitar string to the string bender. When in use the guitar string anchor is attached to the bending device while the free end of the guitar string is wound around a tuning peg of the guitar. The tension of the string is adjusted using the tuning peg until a desired neutral tone of the string is achieved. The position of the spring at this tension is defined as the neutral position of the string. The activation lever can then be moved in a first direction to deform the spring in a first direction and move the anchor of the guitar string away from the tuning pegs, causing an increase in string tension and thus raising the tone of the affected string. Alternatively the activation lever can be moved in a second direction to deform the spring in a second direction and move the guitar string anchor towards the tuning pegs, causing a decrease in tension of the affected string and thus a decrease in tone. The present invention is advantageous in that it can raise or lower the tone of the affected string. Furthermore the string bender of the present invention uses existing structures on traditional guitars to facilitate mounting of the string bender thereto. |
| US09324307B1 |
Instrument cover system for customizing appearance
An instrument cover system for displaying dynamic or static images. A display coating having electronic ink is disposed on a front surface of a guitar body. The display coating is operatively connected to a display processor, which is operatively connected a display memory component adapted to store instructions that causes the processor to perform operations for displaying an image. A first control button is operatively connected to the display processor and functions to change the image on display. A connector component is operatively connected to the display processor and functions to allow the system to connect to a power source or a separate electronic device. The electronic device has a device memory for storing instructions that causes a device processor to perform operations for changing and displaying an image. |
| US09324305B2 |
Method of synthesizing images photographed by portable terminal, machine-readable storage medium, and portable terminal
A system generates a synthesized image by combining content of a first image with content of a second image where both the first and second images are acquired by a portable terminal, The system identifies a portion of the second image, selects at least a part of the portion of the second image as a region of interest and generates a synthesized image by incorporating content of the first image in the region of interest. The method displays and stores the synthesized image. |
| US09324303B2 |
Open angle detection and processing apparatus and method
Embodiments of techniques and apparatus for open angle detection and processing are described. In embodiments, an apparatus may comprise a first panel having a display, a second panel movably coupled with the first panel. The first and second panels variably define an angle between these two panels. One or more sensors may be disposed in the apparatus and configured to detect an angle change event of the variable angle between two panels. The angle changing information may be used by an application to vary output of the application onto the display. Other embodiments may be described and claimed. |
| US09324302B2 |
Storage medium having stored thereon display control program and display control apparatus
In accordance with an operation content indicated by a user's operation data, an amount of scrolling is calculated, and a display range of a table to be displayed on a display apparatus is moved in the table in accordance with the amount of the scrolling. With respect to respective drawing areas, whether or not drawing start points, from which drawing character strings are to be drawn, stay within the display range is determined. When the drawing start point of a drawing area, among the drawing areas, falls outside the display range, the drawing start point of the drawing area is changed to a position which is in the drawing area and also which stays within the display range. The character strings are arranged in the respective drawing areas from the drawing start points set to the respective drawing areas, and the table in the display range is displayed on the display apparatus together with the arranged character strings. |
| US09324296B2 |
Image processing apparatus, method and program
Provided is an image processing apparatus including a cursor position acquisition section which acquires a position of a cursor on a display screen where an image is displayed, and a representative color acquisition section for performing a color reduction process which acquires a region including the position of the cursor acquired by the cursor position acquisition section as a color reduction processing region, and acquires a prescribed number of colors as representative colors, from colors included in the color reduction processing region. |
| US09324293B2 |
Conversion of multimedia data streams for use by connected devices
Embodiments of the invention are generally directed to conversion of multimedia data streams for use by connected devices. An embodiment of a method for processing data includes receiving a data stream in a first multimedia data format at a first device, and inserting a replacement video portion into the received data stream to generate a modified multimedia data stream in a second multimedia data format. The modified data stream is provided to a second device coupled to the first device. |
| US09324288B1 |
Self-compensating gate driving circuit
The present invention provides a self-compensating gate driving circuit which comprises a plurality of GOA units which are cascade-connected, and a Nth GOA unit controls charge to a Nth horizontal scanning line G(n) in a display area. The Nth GOA unit comprises a pull-up controlling part, a pull-up part, a transmission part, a first pull-down part, a bootstrap capacitor part and a pull-down holding part. The pull-up part, the first pull-down part, the bootstrap capacitor part and the pull-down holding part are respectively coupled to a Nth gate signal point Q(N) and the Nth horizontal scanning line G(n), and the pull-up controlling part and the transmission part are respectively coupled to the Nth gate signal point Q(N), and the pull-down holding part is inputted with a DC low voltage VSS. |
| US09324285B2 |
Apparatus for simultaneously performing gamma correction and contrast enhancement in display device
A display device is provided with a display panel; a correction circuit which performs gamma correction on target image data in response to correction data specifying a gamma curve; and a driver circuit driving the display panel in response to gamma-corrected data received from the correction circuit. The correction circuit is configured to perform approximate gamma correction in accordance with a correction expression in which the target image data is defined as a variable of the correction expression and coefficients of the same are determined on the correction data, and to modify the correction data in response to target image data associated with the target pixel of the gamma correction and the pixel adjacent to the target pixel. |
| US09324284B2 |
Liquid crystal display device compensating for common voltage and method of driving the same
There is provided a driving method of a liquid crystal display device that is driven by an inversion method, including: calculating a total sum of changed amounts of data voltages between an (n−1)-th row line and an n-th row line, using image data of the (n−1)-th row line and image data of the n-th row line; generating common voltage data according to the total sum of the changed amounts of the data voltages; compensating for the common voltage data using a characteristic parameter of a liquid crystal panel; and generating a common voltage according to the compensated common voltage data, and outputting the common voltage to the liquid crystal panel. |
| US09324283B2 |
Display device, driving method of display device, and electronic apparatus
According to an aspect, a display device includes a first sub-pixel, a second sub-pixel, a third sub-pixel; and a fourth sub-pixel. A signal obtained based on at least an input signal for the first sub-pixel and an extension coefficient is supplied to the first sub-pixel. A signal obtained based on at least an input signal for the second sub-pixel and the extension coefficient is supplied to the second sub-pixel. A signal obtained based on at least an input signal for the third sub-pixel and the extension coefficient is supplied to the third sub-pixel. A signal obtained based on at least the input signal for the first sub-pixel, the input signal for the second sub-pixel, the input signal for the third sub-pixel, and the extension coefficient is supplied to the fourth sub-pixel. The extension coefficient varies based on at least a saturation of the input signals. |
| US09324277B2 |
Backlight driving circuit, liquid crystal display device and drive method
The present invention provides a backlight drive circuit, and a liquid crystal display and a drive method for the same, wherein the backlight drive circuit includes: an error amplification unit configured to receive a feedback voltage from the backlight, and used for comparing the feedback voltage with a basis voltage, adjusting the amplification coefficient and the amplification speed for a comparison result based on the magnitude of the comparison result, and outputting an amplification result as a control signal; and a drive control unit configured to receive the control signal from the error amplification unit, and used for outputting, according to the control signal, a pulse width modulation dimming signal with a corresponding duty cycle to modulate a voltage signal output to the backlight from a power supply. The backlight drive circuit may be applied to driving operation for various display devises and capable of automatically adjusting response rate under different loading modes. Compared with the prior art, the backlight drive circuit has higher response rate and accordingly can improve the display performance of animating images in a display device in an indirect manner. |
| US09324275B2 |
Organic light emitting diode display device and method for driving the same
Discussed is an OLED display device and a method of driving the same. The OLED display device includes first to third transistors, a capacitor, a driving transistor, and an OLED. The first transistor supplies a data voltage to a first node according to a first scan signal. A first electrode of the second transistor is connected to the first node, and a gate of the second transistor is connected to a second electrode of the second transistor. The third transistor initializes a voltage of a second node according to a second scan signal. One end of the capacitor is connected to the second node, and the other end of the capacitor is connected to a third node. A gate of the driving transistor is connected to the second node, and a source of the driving transistor is connected to the third node. The OLED emits light. |
| US09324273B2 |
Organic light emitting display and method of driving the same
An organic light emitting display capable of improving data charging time, includes pixels at crossing regions between scan and data lines and configured to control an amount of current supplied from a first to a second power source, a charge unit adjacent to an adjacent pixel of the pixels and coupled to the same data line as the adjacent pixel, a scan driver for supplying scan signals to the scan lines, a data driver for supplying data signals to the data lines in synchronization with the scan signals, and a comparison unit in a channel of the data driver to compare a data signal supplied to a current line with a data signal supplied to a previous line and to control coupling between the charge unit and the data line according to a comparison result in a partial period of a period in which the scan signals are supplied. |
| US09324272B2 |
GOA circuit, display substrate and display device
A Gate Driver on Array (GOA) circuit according to this disclosure may include M cascaded GOA units. The M GOA units may have a one-to-one correspondence with M rows of pixels within a pixel region. And a Gate signal and a Reset signal may be outputted from each GOA unit. A Gate signal output from a GOA unit in an n-th row may be an input signal of a GOA unit in an (n+1)-th, where n is a natural number less than M. |
| US09324271B2 |
Pixel driver
A pixel driver includes an input unit, a power-switching unit, a voltage-dividing unit, a pixel-driving unit and a shorting unit. The input unit outputs a data voltage according to a first scan signal and a data signal. The power-switching unit outputs a first power voltage according to a first power voltage and a power-controlling signal. The voltage-dividing unit adjusts a control voltage according to a second scan signal. The pixel-driving unit includes a control terminal, a first terminal and a second terminal. The pixel-driving unit provides a driving current to an LED according to the voltage difference between the control terminal and the second terminal. The shorting unit connects the control terminal to the first terminal according to the first scan signal. |
| US09324268B2 |
Amoled displays with multiple readout circuits
The OLED voltage of a selected pixel is extracted from the pixel produced when the pixel is programmed so that the pixel current is a function of the OLED voltage. One method for extracting the OLED voltage is to first program the pixel in a way that the current is not a function of OLED voltage, and then in a way that the current is a function of OLED voltage. During the latter stage, the programming voltage is changed so that the pixel current is the same as the pixel current when the pixel was programmed in a way that the current was not a function of OLED voltage. The difference in the two programming voltages is then used to extract the OLED voltage. |
| US09324266B2 |
Pixel and organic light emitting display using the same
A pixel capable of being driven at a low driving frequency that includes an organic light emitting diode (OLED), a first transistor for controlling an amount of current supplied from a first power supply coupled to a first electrode thereof to the OLED to correspond to a voltage applied to a first node, a second transistor coupled between a data line and a second node and turned on when a scan signal is supplied to a scan line, a third transistor coupled between the first node and the second node and turned on when a second control signal is supplied to a second control line, a first capacitor coupled between the second node and a fixed voltage source, and a second capacitor and a third capacitor serially coupled between the first node and the first power supply. |
| US09324263B2 |
Display driver, display driving method and display device
A display driver for driving data lines according to gradation values of pixels in a display unit is provided. The display driver includes a correction value generating unit configured to count the number of display data for each of the gradation values in display data corresponding to pixels on each of scanning lines on a scanning line basis, and generate correction values of the display data based on the counting result, and a driving signal generating unit configured to perform a correction process to the display data by using the correction values generated by the correction value generating unit, and generate a data line driving signal for driving each of the data lines based on the corrected display data. |
| US09324262B2 |
Pixel array structure and organic light emitting display including the same
A pixel array structure of a display device, for example, an organic light emitting display device, includes a plurality of pixel units. In the pixel array structure, each of the pixel units includes four color pixels arranged in a lattice form, and a white sub-pixel positioned at the center of the pixel unit. The four pixels are disposed at a periphery of the pixel unit. In the pixel array structure, pixels are efficiently arranged in consideration of characteristics of the pixels. |
| US09324259B2 |
Image display device
The invention provides an image display device that has an especially satisfactory display quality for animated images, and sufficiently suppresses the irregularities of display quality among pixels. The image display device includes a light emitting drive means that drives a light emitting means, based on an analog display signal inputted to the pixels, and a light emitting control switch for controlling a light-on or light-off of the light emitting means on one end of the light emitting drive means in each pixel. |
| US09324258B2 |
Display apparatus
The display apparatus has a plurality of arrayed pixel circuits. Each of the pixel circuits has a current light emitting device; a driving transistor supplying current to the current light emitting device; a first capacitor having a first terminal connected with a gate of the driving transistor; a second capacitor connected between a second terminal of the first capacitor and a source of the driving transistor; a first switch applying a reference voltage to a node at which the first capacitor and the second capacitor are connected; a second switch supplying an image signal voltage to the gate of the driving transistor, and a third switch supplying an initialization voltage to the source of the driving transistor. |
| US09324257B2 |
Display control apparatus and display control method
A display control apparatus that makes it easy to recognize a target image when images are displayed in each of regions obtained by dividing a single screen, even when the method for dividing the screen has changed. For example, when the method for dividing the screen in an index view is switched, the post-switch location of a target thumbnail image is calculated based on the ratio between the pre- and post-switch division numbers and the pre-switch location of the target thumbnail image, in both the horizontal and vertical directions. Then, the overall arrangement of the thumbnail images in the index view after the division method switch is determined based on the calculated location of the target thumbnail image. |
| US09324256B2 |
Liquid crystal display panel
A liquid crystal display panel includes a pixel array, a first shift register, M first output cells, a second shift register, and N second output cells. The first register is disposed on a first side of the pixel array. The M first output cells are coupled to and next to the first shift register for providing M gate signals to M rows of the pixel array according to a first clock signal. The second register is disposed on a second side of the pixel array. The N second output cells are coupled to and next to the second shift register for providing N gate signals to N rows of the pixel array according to a second clock signal. M and N are positive integers. |
| US09324250B2 |
High dynamic range displays comprising MEMS/IMOD components
Several embodiments of display systems are disclosed that comprise a backlight source, a first modulator, a second modulator and a controller. The backlight source may further comprise an edge-lit backlighting source that may be controlled to affect a field-sequential illumination for the dual or multiple modulator display system. In another embodiment, the display system may comprise two or more color primary emitters that each comprise a color gamut. When the color gamuts are driven in a field sequential pattern, the resulting overall gamut is substantially wider. Other display systems and methods are disclosed herein that affect a variety of 3D viewing embodiments. Systems, methods and techniques to increase the dynamic range, color gamut and bit precision of display systems comprising MEMS and/or IMODs are presented. |
| US09324248B2 |
Exterior aircraft display system
A method and apparatus for displaying information is presented. The information is sent from a number of sources to a display unit. The information is displayed through pixels located in the display unit. Heat is transferred in the display unit through a conductive path. |
| US09324244B1 |
Distributed multi-nodal operant conditioning system and method
A multi-nodal distributed operant conditioning system and method consisting of a user node and one or more networked subject nodes. A user audience at a user node engages in operant conditioning with a subject at a networked subject node by observing real time image data of the subject and effecting operant conditioning signals to the subject in response to operantly offered behaviors by the subject. The multi-nodal, distributed nature of the embodiments provides for uses by a user audience in educational, entertainment, or therapeutic behavioral modification settings. |
| US09324240B2 |
Vertically integrated mobile educational system
A vertically integrated, mobile educational system for a child aged about 1 to about 12 years is presented comprising a mobile digital processing device that is optionally connected to a computer network and at least one mobile application provided to the mobile digital processing device. The one or more mobile applications include executable instructions that create a mobile interactive educational resource characterized by: providing a mobile extension of a web-based educational suite; integrating with the web-based educational suite according to an instructional plan designed to accomplish one or more specific educational objectives in a subject; and comprising one or more learning activities associated with a subject appropriate for the child. Additionally, the educational resource is substantially free of activities not teaching toward one or more educational objectives in a subject. |
| US09324239B2 |
Authoring tool to structure and create a computer-based training course, and having role-specific functions
An authoring tool to structure and create a computer-based training course includes a role allocation module to facilitate an allocation of a user to at least one of an instructional design role and a content definition role with respect to the authoring tool. A function allocation module facilitates an allocation of a first set of functions, provided by the authoring tool, to the instructional design role, and also facilitates an allocation of a second set of functions, provided by the authoring tool, to the content definition role. |
| US09324238B2 |
Dynamic collision avoidance systems and methods
The use of dynamic collision avoidance parameters in connection with automatic dependent surveillance, broadcast, as well as for other purposes in systems and methods may assist collision avoidance and/or advisory systems in properly identifying intruders for reporting to pilots. For example, a method can include monitoring for a triggering event with respect to at least one of geographic coordinates and a flight path of an aircraft. The method can also include detecting the triggering event. The method can further include altering at least one characteristic of at least one of a traffic alerting system and an advisory system based on detecting the triggering event. |
| US09324237B2 |
Method and system for calculating aircraft speed changes
Methods and systems for determining a change of speed of an aircraft for enabling the avoidance of conflicts between aircraft trajectories. The method of determining a change in speed of an aircraft, comprises the steps of: defining a merge point and a tie point; monitoring a first aircraft; determining when the first aircraft passes the tie point; providing trajectory data; predicting a trajectory of a second aircraft using the trajectory data; defining a minimum permissible longitudinal spacing; predicting a longitudinal spacing between the first and second aircraft at the merge point based on the predicted trajectory; and if the minimum permissible longitudinal spacing is greater than the predicted longitudinal spacing then calculating a proposed change in speed of the second aircraft that will result in the longitudinal spacing between the first and second aircraft at the merge point being greater than or equal to the minimum permissible longitudinal spacing. |
| US09324234B2 |
Vehicle comprising multi-operating system
A mobile computing device with a mobile operating system and personal computer or vehicle processing module operating system running concurrently and independently on a shared kernel without virtualization. The mobile operating system provides a user experience for the mobile computing device that suits the mobile environment. The personal computer operating system provides a full personal computer user experience when the mobile computing device is docked to a secondary terminal environment. The vehicle processing module operating system provides a full vehicle processing module user experience when the mobile computing device is docked to a secondary terminal environment. The mobile computing device may be a smartphone running the Android mobile OS and a full desktop Linux distribution on a modified Android kernel. |
| US09324233B2 |
Vehicle contact warning method and system
A vehicle contact warning method and system are provided in a host vehicle. A communication device of the host vehicle receives a remote vehicle message including information pertaining to a remote vehicle including a remote vehicle location and a remote vehicle trajectory. A controller of the host vehicle prepares a host vehicle location and a host vehicle trajectory. The controller determines a possibility of contact between the host vehicle and the remote vehicle at a contact location at a contact time based on a host vehicle travel time from the host vehicle location to the contact location based on the host vehicle information and a remote vehicle travel time from the remote vehicle location to the contact location based on the remote vehicle information. The controller automatically operates an external warning device to the host vehicle, the remote vehicle, or both, upon determining the possibility of contact exists between the host vehicle and the remote vehicle. |
| US09324225B2 |
Safety alert apparatus
Disclosed is a safety alert apparatus, comprising a communication module to connect a communication network, a detection module including an activity detector and a determination module to determine an emergency event, according to an activity detection signal generated by the activity detector, and to provide an alert signal to the communication module, when an emergency event is determined, such that the communication module provides emergency alerts to a predetermined remote device; wherein the activity detector comprises an electrical appliance remote controller signal detector and uses a wireless channel signal of the electrical appliance remote controller as the activity detection signal. |
| US09324219B2 |
Device and method for checking the integrity of physical objects
The invention relates to a device for monitoring physical objects that comprises one or more short-range remote readers (13), memory elements (5) to be attached to physical objects, and a controller (15) adapted for executing a reading function capable of interaction with the one or more remote readers in order to acquire data contained in adjacent memory elements, and for executing an integrity validation function capable of distinguishing, from the acquired data, individual identifiers particular to each of the memory elements as well as group description data stored in at least some of said memory elements, and of checking the sufficiency of group description data while checking the compliance of individual identifiers with corresponding group description data. |
| US09324214B2 |
Wagering game having enhanced display of winning symbols
An outcome of a wagering game is evaluated to determine if it is a winning outcome. In response to the outcome being a winning outcome, it is determined if the winning outcome includes two or more groups of winning symbols. In response to determining that the winning outcome includes two or more groups of winning symbols, each of the two or more groups of winning symbols is visually highlight in a sequential fashion. Further, it is determined if each of the two or more groups includes winning symbols on two or more lines. In response to determining that one of the two or more groups includes winning symbols on two or more lines, the winning symbols on each of the two or more lines is visually highlighted in a sequential fashion. |
| US09324213B2 |
System and method for increasing player participation
A system and method are provided to combine a gambling establishment player club with one or more second chance games. Players are thereby given multiple opportunities and incentives to interact with the gambling establishment and player club. The gambling establishment is thereby able to gather valuable player data, build player profiles, and incentivize players to take actions desired by the gambling establishment. |
| US09324210B2 |
Multi-function cashless gaming ATM
A system and method are provided for performing a cashless gaming ticket redemption transaction for a customer in a casino environment. The system includes a gaming machine, such as a slot machine, that the customer plays. Rather than issuing cash to the customer, the gaming machine issues a redemption ticket with a unique identifier to the customer. The unique identifier and the amount of the customer's winnings accrued on the gaming machine are stored and associated on a redemption ticket database. When the customer wishes to redeem the winnings, the redemption ticket is introduced to a multi-function ATM. To perform the ticket redemption transaction, the ATM is adapted to electronically accept the redemption ticket and read the unique identifier. The ATM then electronically communicates with the redemption database to retrieve the predetermined dollar value associated with the unique identifier. Finally, the ATM transfers to the customer an award equal to the predetermined dollar value in cash or credit. |
| US09324207B2 |
Gaming machine producing effect when awarding benefit and control method thereof
When a wild symbol 311a is fixedly displayed, a gaming machine of the present invention preferentially displays a fixedly displayed wild symbol 311a over a symbol 311 rearranged behind the fixedly displayed wild symbol 311a until rearrangement is completed. When the plurality of symbols 311 rearranged including the symbol 311 rearranged behind the fixedly displayed wild symbol 311a satisfy a predetermined relation, the symbol 311 rearranged behind the fixedly displayed wild symbol 311a is preferentially displayed over the fixedly displayed wild symbol 311a. When the predetermined relation is not satisfied, the fixedly displayed wild symbol 311a is preferentially displayed over the symbol 311 rearranged behind the fixedly displayed wild symbol 311a. |
| US09324205B1 |
Managing personnel access employing a distributed access control system with security enhancements for improved user awareness to aid in decision making
A system and method are provided for implementing system controlled randomization and related functioning in screening procedures when granting individuals entry into certain limited access areas. The disclosed schemes supplement personnel access systems with additional user aware features to implement standard objective randomization processes for the selection, identification and tracking of individuals for separate levels of screening. The randomization scheme is tracked to collect information regarding the selection of individuals from the group of all individuals screened at a particular screening checkpoint to verifiably prove objective randomness in the implementation of the randomization scheme. An additional verifiable capability is provided to modify the randomization scheme locally, or from a centralized location, to adapt to changing situations while maintaining the objectivity in the scheme. These modifications can be individually directed by a system administrator, or can be automated to make them one or more of time- or event-driven. |
| US09324203B2 |
Systems and methods to control a door keypad
A door lock controller receives sensor data from a sensor, such as a motion sensor or an RF envelope sensor, and determines whether to permit operation of a keypad associated with the door lock based at least in part on the sensor data. The door lock controller further sends messages including key pad data to a local receiver, receives messages containing door lock commands from the local receiver, and controls a state of the door lock based at least in part on the door lock commands. |
| US09324201B2 |
Vehicular image processing apparatus and method of sharing data using the same
Provided are a vehicular image processing apparatus and a method of sharing data using the same that may verify a driving route of a vehicle or detect and share a location of a vehicle by analyzing recorded images of the image processing apparatus, for example, a black box, thereby increasing data usage and utilization. |
| US09324198B2 |
Systems and methods for utilizing telematics data to improve fleet management operations
According to various embodiments, a fleet management system is provided for capturing, storing, and analyzing telematics data to improve fleet management operations. The fleet management system may be used, for example, by a shipping entity (e.g., a common carrier) to capture telematics data from a plurality of vehicle sensors located on various delivery vehicles and to analyze the captured telematics data. In particular, various embodiments of the fleet management system are configured to analyze engine idle data in relation to other telematics data in order to identify inefficiencies, safety hazards, and theft hazards in a driver's delivery process. The fleet management system may also be configured to assess various aspects of vehicle performance, such as vehicle travel delays and vehicle speeds. These analytical capabilities allow the fleet management system to assist fleet managing entities, or other entities, in analyzing driver performance, reducing fuel and maintenance costs, and improving route planning. |
| US09324196B2 |
Self-service vehicle diagnostic testing
Vehicle diagnostic tests may be performed by an owner of a vehicle on a self-serve basis. In one implementation, a method may include communicating, by a vehicle diagnostic device, with a vehicle through an OBD connector of the vehicle, to obtain diagnostic information relating to operation of the vehicle. The method may further include receiving instructions relating to the obtaining of the diagnostic information and playing, via a speaker associated with the vehicle diagnostic device, the instructions as audible instructions. |
| US09324193B2 |
Methods and systems for cost-based control of aircraft health data reporting
A method for reporting aircraft data is described that includes receiving, at a processing device, data relating to a condition experienced during operation of the aircraft, determining a cost relevance for the data, comparing, with the processing device, the cost relevance for the data to a threshold, transmitting the data to an end user system if the cost relevance exceeds the threshold, and storing the data in a memory if the cost relevance does not exceed the threshold. |
| US09324189B2 |
Ambulatory system to communicate visual projections
An ambulatory system to communicate visual projections. An embodiment of an apparatus for ambulatory communication includes: a propulsion system to enable the apparatus to fly, including to hover in place and to follow a user; a stereo camera to record an image of a user of the apparatus or a scene nearby the user of the apparatus; a transmitter to transmit video data generated by the stereo camera to a second apparatus via network for a communication with a remote user; a receiver to receive video data via the network from the remote user; and a video projection mechanism to project an image including the received video to the user. |
| US09324187B2 |
Visualization apparatus and method
A visualization process visualizes a visualization range of a three-dimensional model based on physical values of regions of the model. The visualization process may include setting the visualization range, projecting the physical values corresponding to the visualization range onto a visualization plane, designating a coloring range for the projected physical values within the visualization range based on the physical values, defining color information that determines a relationship of the physical values and colors based on the coloring range, and coloring the visualization range based on the color information and the coloring range. |
| US09324183B2 |
Dynamic graphical interface shadows
Dynamic window and cursor shadows are described. In some implementations, graphical user interface display objects can be configured with elevation offset information to give the display objects a three-dimensional surface that can have pixels of varying height. In some implementations, shadows that are rendered upon display objects configured with pixel elevation offset information can be adjusted to reflect the three-dimensional surface of the objects thereby better approximating real-life shadows. In some implementations, shadows can be dynamically rendered in real-time and adjusted according to the elevations of display objects onto which they are cast. |
| US09324181B2 |
Method for producing an autostereoscopic display and autostereoscopic display
Method for producing an autostereoscopic display with an optical element and an image forming unit, characterized by the following method steps: provide an optical element preferably generated on a flat substrate, determine position parameters of the optical element using a sensor unit, particularly an optical sensor unit, and deposit the image forming unit onto the back of the optical element based on the position parameters determined. In addition, an autostereoscopic display produced in this manner is disclosed. |
| US09324179B2 |
Controlling a virtual camera
Among other aspects, on computer-implemented method includes: receiving at least one command in a computer system from a handheld device; positioning a virtual camera and controlling a virtual scene according to the command; and in response to the command, generating an output to the handheld device for displaying a view of the virtual scene as controlled on a display of the handheld device, the view captured by the virtual camera as positioned. |
| US09324178B2 |
Three-dimensional semiconductor image reconstruction apparatus and method
A system comprises an electron beam directed toward a three-dimensional object with one tilting angle and at least two azimuth angles, a detector configured to receive a plurality of scanning electron microscope (SEM) images from the three-dimensional object and a processor configured to calculate a height and a sidewall edge of the three-dimensional object. |
| US09324176B2 |
Apparatus and method for saving and updating image file
An image saving apparatus may extract an object from a photographed picture, and may store position information. The image saving apparatus may selectively perform image processing of each object using the position information and may provide a user with a dynamic image in which a change in the photograph range is considered. |
| US09324169B2 |
Identifying relationships between entities using two-dimensional array of scalar elements, and a block matrix
A computer-implemented method for identifying relationships between entities includes accessing a first data structure being a two-dimensional array of scalar elements (e, eij, ekl(i)) representable as a matrix, each of the scalar elements capturing a relationship between two entities; reorganizing the first data structure by clustering the scalar elements separately on each dimension of the two-dimensional array, to obtain a second data structure, representable as a K×M block matrix, wherein each block is a reordered sequence of rows and/or columns of the first data structure; compacting the second data structure by: determining two parallel block sequences, which are the most similar according to a given distance measure, the parallel block sequences being either distinct rows or distinct columns of blocks of the second data structure; and reorganizing the second data structure by merging the two determined sequences into a single block sequence. |
| US09324168B2 |
Constraint-based correction of shape positions in a diagram
Technologies are described herein for correcting the layout of shapes in a diagram, and specifically for diagrams having constraint-based layouts, such as with lists of regions and shapes directly connected without connecting lines. A request is received to correct the diagram layout. Shape layouts are predicted for each region, followed by minimal region corrections corresponding to the corrected shape layouts. Corrected layouts are provided sequentially through the lists of regions while resolving conflicts. Virtual nodes may be utilized to preserve region layouts when flipping or rotating diagrams. A connection classification and prioritization system is used to layout shapes and regions within a diagram having one or more direct connections between shapes and/or regions. |
| US09324166B2 |
Systems, methods, and apparatuses for creating digital glitter
Methods and systems for rendering an electronic greeting card to a portable computing device, wherein the visually-perceived light effects of the electronic greeting card are updated in real time. The electronic greeting card is dynamically rendered to the portable computing device including these dynamic light effects. |
| US09324163B2 |
Methods of and apparatus for compressing depth data
A tile-based graphics processing system 3 has a write out stage 31 configured to compress depth data by dividing each depth value to be compressed into plural parts, forming plural depth data channels by associating corresponding ones of the plural parts of different depth values with each other and applying a data compression scheme separately to each depth data channel to be compressed in order to produce compressed representations of the depth data channels. The compressed representations of the depth data channels are written to external memory 34. |
| US09324160B2 |
System and method for stabilizing digital image sequences
The present invention relates to the field of image processing and image stabilization methodologies used on image acquisition and processing systems. A method and apparatus to generate an image sequence output that is stable and free of any sudden jumps from an image sequence input acquired with an imaging system whose line of sight is fixed but may drift in time, and by efficiently updating the reference frames that are used in the image stabilization, the method can be optimized. |
| US09324159B2 |
Method and system for tracking motion of a device
The present invention relates to a method for tracking the motion of a device across a surface. The method repeats the following steps: (a) acquiring, using the device, an input image showing an input area of the surface; (b) comparing the input image to a plurality of current reference images to estimate the displacement between the input image and each current reference image; (c) deciding whether to update each current reference image based on the displacements estimated in step (b), and if said decision is positive, updating the current reference image to form an updated reference image; and (d) determining, based on the displacements, the motion of the device across the surface from an area shown in a previously acquired image to the input area. The previously acquired image may be a previously acquired input image or one of the current reference images. |
| US09324156B2 |
Method and apparatus for searching images
Disclosed are methods and apparatuses for searching images. An image is received and a first search path is defined for the image. The first search path may be a straight line, horizontal, and/or near the bottom of the image, and/or may begin at one edge and move toward the other. A transition is defined for the image, distinguishing a feature to be found. The image is searched for the transition along the first search path. When the transition is detected, the image is searched along a second search path that follows the transition. The apparatus includes an image sensor and a processor. The sensor is adapted to obtain images. The processor is adapted to define a first search path and a transition for the image, to search for the transition along the first search path, and to search along a second search path upon detecting the transition, following the transition. |
| US09324155B2 |
Systems and methods for determining parameters for image analysis
Systems and methods for determining parameters for image analysis are provided. One method includes obtaining ultrasound data of an object, generating an image of the object, and identifying a region of interest in the image. The method also includes determining a plurality of spatially varying parameters for image analysis of the region of interest using prior information for one or more objects of interest, including prior location information for the one or more objects of interest, and wherein the plurality of spatially varying parameters are determined for a plurality of sections of the region of interest and different for at least some of the plurality of sections. The method further includes using the plurality of spatially varying parameters for performing image analysis of the region of interest in the image to determine the location of the one or more objects of interest. |
| US09324154B2 |
Method and apparatus for enhancing stereo vision through image segmentation
A method and apparatus for segmenting an image are provided. The method may include the steps of clustering pixels from one of a plurality of images into one or more segments, determining one or more unstable segments changing by more than a predetermined threshold from a prior of the plurality of images, determining one or more segments transitioning from an unstable to a stable segment, determining depth for one or more of the one or more segments that have changed by more than the predetermined threshold, determining depth for one or more of the one or more transitioning segments, and combining the determined depth for the one or more unstable segments and the one or more transitioning segments with a predetermined depth of all segments changing less than the predetermined threshold from the prior of the plurality of images. |
| US09324150B2 |
Efficient cardiac MR workflows based on automated planning from mDIXON surveys
A system (10) for planning cardiac MRI views, said system (10) includes a planning device (16) which includes at least one processor (42) programmed to: receive one or more images (18) from an imaging device (12) acquired utilizing an mDIX-ON protocol, determine a position and orientation of an object of interest from the one or more images, transform a model of the object of interest such that is matches the object of interest with a generalized Hough transform, and generate one or more object of interest views from the matching of the object of interest, A display (48) displays the one or more object of interest views. |
| US09324149B2 |
Method and use of smartphone camera to prevent distracted driving
A method and use are described for disabling certain wireless communication device functionalities based on input from the device's user-facing camera. More particularly, image data of the user is collected, image analysis is used to extract certain metrics about the user, and if those metrics are in violation of one or more thresholds one or more device functionalities are disabled. The functionality may be disabled for a period of time or until the user's image metrics fall below one or more thresholds. The disabled device functionalities may also be extended to connected peripheral devices. Finally, records of threshold violations resulting in disabled device functionality may be stored on the device or a database and made available to third parties. |
| US09324145B1 |
System and method for detection of transitions in an image stream of the gastrointestinal tract
A system and method for detecting a transition in a stream of images of a gastrointestinal (GI) tract may include selecting images from an in-vivo image stream; calculating a segment score for each selected image indicating in which segment of the GI tract the image was captured; applying a smoothing function on the scores; detecting a global step in the smoothed segment score signal indicating a substantial change in a parameter calculated based on segment score signal values of the segment score signal values; detecting a local step indicating a substantial change in a parameter calculated based on segment score signal values of a predetermined interval of the of the segment score signal values; combining the local step and the global step; and determining a point of transition in the stream from one anatomical segment to another, the point of transition correlating to the combined step. |
| US09324144B2 |
Device having a digital infrared sensor and non-touch optical detection of vital signs from a temporal variation amplifier
A camera coupled to a microprocessor provides images to a microprocessor, a digital infrared sensor coupled to the microprocessor has ports that provide a digital signal representing a temperature, the microprocessor is operable to receive from the ports the digital signal and the microprocessor is operable to determine a body core temperature from the digital signal and the microprocessor includes a cropper that receives the images from the camera and operable to crop the images to exclude a border area of the images, yielding cropped images, the microprocessor includes a temporal-variation-amplifier of the cropped images that generates a temporal variation, the microprocessor includes a vital-sign generator that is coupled to the temporal-variation-amplifier that generates a vital sign from the temporal variation and the microprocessor is coupled to a display device that displays the vital sign. |
| US09324142B2 |
Multi-energy imaging
A method includes generating landmarks, for different compositions of materials in scanned structure, wherein a landmark represents a location of a composition of materials, distorted by beam hardening, in a multi-energy Hounsfield Unit space and using the landmarks to perform an image domain material separation and quantification free of beam hardening artifacts. |
| US09324141B2 |
Removal of A-scan streaking artifact
This invention generally relates to the removal of streaking artifacts and periodic noise from tomographic images. The method comprises obtaining an A-scan from an imaging data set. The A-scan having a signal and the signal defining an amplitude. Noise specific to the A-scan is estimated. The amplitude of the A-scan is scaled based on its specific estimated noise floor. In another aspect, a plurality of A-scans is obtained from an imaging data set. Each of the plurality of A-scans has a signal and the signal defines an amplitude. Noise specific to each A-scan of the plurality of A-scans is estimated. Each A-scan of the plurality of A-scans is scaled by the A-scan's specific estimated noise floor. |
| US09324138B2 |
Global contrast correction
Systems and methods may apply global contrast correction to a plurality of thermal images. For example, a vehicle may capture a plurality of aerial thermal images for use in generating a composite image. Each individual thermal image may be individually contrasted based on the temperature range of pixels in that image, so the contrast range of the thermal images may vary. The plurality of thermal images may be analyzed to determine a global contrast range. Extreme temperatures may be excluded from the global contrast range. Based on the global contrast range, a contrast level of each of the plurality of thermal images may be adjusted. For example, the individual temperature range of each thermal image may be scaled to a global temperature range. A composite image having consistent contrasting may be generated from the plurality of thermal images. |
| US09324133B2 |
Image content enhancement using a dictionary technique
A system for determining a high resolution image includes receiving a low resolution image and determining a vector of a patch of the low resolution image based upon a low resolution dictionary. The system includes determining a high resolution patch based upon a high resolution dictionary and the vector and determining the high resolution image based upon the high resolution patch. |
| US09324131B1 |
Method and apparatus for motion adaptive deinterlacing with reduced artifacts
A method and apparatus for generating an interpolated pixel at a vertical position half way between lines in a field of a video frame. The method comprises detecting a degree of motion in the vicinity of said interpolated pixel and providing weighting factors based on said degree of motion, and detecting a degree of variation in the vicinity of said interpolated pixel and providing a further weighting factor based on said degree of variation. The method further comprises calculating a high vertical frequency contribution, calculating a low vertical frequency contribution, calculating a weighted high vertical frequency contribution based on said high vertical frequency contribution and said further weighting factor, calculating a total vertical contribution by summing together said low vertical frequency contribution and said weighted high vertical frequency contribution, calculating a temporal contribution, and calculating said interpolated pixel by summing together weighted contributions from said total vertical contribution and said temporal contribution based on said weighting factors. |
| US09324130B2 |
First image and a second image on a display
A first image and a second image of the first image. A display to display the first image and the second image. A sensor to detect an input relative to the display. A processor to determine a task to perform based on the input relative to the first image or the second image on the display. |
| US09324129B2 |
Method and apparatus for single-axis cross-sectional scanning of parts
Improved methods and apparatus for cross-sectional scanning of parts employ a scanning station in which the focal plane of the scanning apparatus never moves in the vertical direction, i.e., the direction in which the stage of the part/potting combination moves. Distinct steps of material removal and scanning alternate with an intermediate step of moving the part/potting combination in the vertical direction after a surface layer has been removed, thus placing the newly-created surface back into the non-moving focal plane for the next scanning step. A removal station (not the stage carrying the part/potting combination) repeatedly moves into and out of the field of view of the scanning station between scanning steps. The material removal station is specially configured to remove the desired surface layer of the part/potting combination and the created debris, without requiring the separate environment characteristic of previous commercial applications. |
| US09324128B2 |
Techniques for improving rendering efficiency
Various embodiments are generally directed to techniques for causing the storage of a color data value of a clear color to be deferred or entirely avoided as color data values of primitives of an image are stored. An apparatus includes a processor element; and a logic to store color data values of a block of pixels of the image in a first portion of a cache line, store an indication of the first portion as written and of a second portion of the cache line as not in a per-portion table, evict contents of the first and second portions, and store the contents of the first portion in an image data and store a color data value of a clear color in place of the contents of the second portion in the image data in response to the indications stored in the per-portion table. Other embodiments are described and claimed. |
| US09324124B2 |
Image processing apparatus, method, and computer-readable medium for controlling the display of an image
In one example embodiment, an information processing apparatus displays a first image associated with an observation target object. In this example embodiment, the first image has a first zoom magnification and a first display range which has a first center position. In one example embodiment, the information processing apparatus enables a user to change the first zoom magnification by selecting a first position of the displayed first image. In response to the first position being selected, the information processing apparatus displays a second image associated with the observation target image. In this example embodiment, the second image has a second zoom magnification which is different from the first zoom magnification. The second image also has a second display range which has a second center position which is different from the first center position. In this example embodiment, the second center position corresponds to the selected position. |
| US09324123B2 |
Storage of keyID in customer data area
A key identifier for an encryption key repository is stored with customer data on a logical device. When the customer data is compressible, the key identifier is stored in space freed by compressing the customer data. When the customer data is not compressible, a portion of the customer data is copied to a key record in the key repository identified by the key identifier, and the key identifier overwrites the copied customer data. |
| US09324122B2 |
Voting scheme for time alignment
Systems and methods for time aligning time-stamped measurements using a voting scheme are disclosed. The system and method filter incoming measurements based on whether the time-stamped measurements fall within a defined time window. In response to determining that the time stamp falls within the defined time window, the time-stamped measurement is added to a time slice corresponding with the time stamp. In response to determining that the time-stamped measurement does not fall within the defined time window, the time window is re-established based on a voting scheme. |
| US09324120B2 |
Method and apparatus for emergency response notification
Embodiments of the invention leverage mobile proliferation to enable laypersons to initiate a timely and effective emergency response in case of an emergency, such as a medical emergency, e.g. cardiac event. Mobile apps are made available as part of an organization's overall response plan and program, allowing bystanders of emergency events to easily initiate notification of trained responders, for example in their facility, in a timely manner commensurate with the type of emergency specific to their facility. More particularly, embodiments of the invention use mobile applications to alert certified first trainees to respond to the scene of the emergency. |
| US09324112B2 |
Ranking authors in social media systems
The author ranking technique described herein is a technique to rank authors in social media systems along various dimensions, using a variety of statistical methods for utilizing those dimensions. More particularly, the technique ranks authors in social media systems through a combination of statistical techniques that leverage usage metrics, and social and topical graph characteristics. In various exemplary embodiments, the technique can rank author authority by the following: 1) temporal analysis of link sharing in which authority is computed based on a user's propensity to provide early links to web pages that subsequently become popular; 2) topical authority based on the author's links and content updates in specific topic areas; and 3) popularity and influence based on nodal properties of authors. |
| US09324109B1 |
Proactive Pricing
Disclosed are various embodiments of systems, methods and computer programs for proactive pricing. An offer to sell a product extended by a seller is maintained in a server. The offer to sell includes a plurality of asking terms and at least one selling rule authorizing a deviation from the asking terms and that is associated with the offer. A plurality of purchase offers from at least one buyer to purchase the product is maintained in the server. Each of the purchase offers specifies at least one purchase term. The purchase offers are ranked based upon a degree to which the respective purchase terms match the asking terms. |
| US09324108B2 |
Control method, system and device
A computer-implemented control method for a rented device, comprises providing identification data to identify the device at a server, receiving a permission data file for the device from the server on the basis of the identification data, and including data representing a set of operating permissions associated with the device, executing a device specific operation on the basis of the permission data file to restrict or enable a function of the device. |
| US09324103B2 |
Systems and methods for identifying and delivering tailored content based upon a service dialog
The present disclosure identifies and/or delivers tailored content based upon a service dialog. For example, the systems may receive a request for tailored content, facilitate a service dialog to obtain information related to the request, and communicate a plurality of tailored content based upon the information related to the request. Further, the systems may identify tailored content based upon a consumer profile, communicate the tailored content to a web client, and/or receive a selection of the tailored content. Further still, the systems may modify a magazine (e.g., content that is presented electronically) based upon tailored content. |
| US09324101B2 |
User customized greeting card design system with portal for crowd-sourced artwork
The invention relates to systems and methods of providing a user customized card design system with a portal used to receive crowd-sourced artwork that users may select to include in customized greeting cards, games for bonuses that can be applied to customized greeting cards, and greeting card kiosks that may have different portions each having a dedicated functionality. The crowd-sourced content items may include items that are provided by various entities so that others may use the items in their own greeting cards. The crowd-sourced content items may be localized such that crowd-sourced content items within a proximity of a given location may be used to customize greeting cards at or in association with the given location. The bonuses may be won during gameplay and may include free or discounted customized greeting cards, free or discounted customization options, and/or other value. |
| US09324097B2 |
Methods and apparatus for transmitting multimedia files and advertisements
The invention is directed to a method of transmitting a file having an advertising portion and a requested portion different from the advertising portion. The method includes receiving a request to transmit the file, via a streaming protocol allowing non-sequential access, transmitting the advertising portion of the file, receiving a request to transmit a portion of the requested portion of the file prior to completing transmitting the advertising portion of the file, completing the transmission of the advertising portion of the file, and transmitting the requested portion of the file. |
| US09324095B2 |
Determining conversion rates for on-line purchases
Identifying on-line advertising conversions includes identifying, at a computer server system, a plurality of reports from one or more computing devices, wherein each of the reports indicates a clock skew between one of the computing devices and a clock server system; using the clock skews to determine that two or more of the reports are likely from a common computing device; determining that the two or more of the reports are common, in that they correspond to display of an advertisement on the common computing device and to purchase of on-line content with the common computing device; and indicating that a purchase conversion occurred based on determining that the two or more of the reports are common. |
| US09324093B2 |
Measuring the effects of social sharing on online content and advertising
A computer-implemented method, advertising network, and computer readable medium for measuring ad performance metrics after user-initiated sharing activity at a website. The method commences by receiving an original internet ad, the original internet ad for hosting within a website (e.g. a social networking website), then recoding the original internet ad (also for hosting within a website) wherein the recoded sharable internet ad comprises ad sharing and instrumentation code for capturing, tracking and later reporting various user-initiated sharing activities by measuring online events using the ad sharing and instrumentation code (i.e. the online events being in response to user-initiated sharing activity) without requiring any explicit action to be provided by the website operator. In some cases, the measured event occurs in the form of expanding an ad, clicking a request to share, printing a coupon, or performing an online conversion action. The ad can comprise any forms of internet media. |
| US09324092B2 |
Display system
A content control system is provided for displaying mixed media content. The content control system includes a display module, a content module and a control module. The display module includes a display device and a information appliance device connected to the display device. The information appliance devices includes a display processor to processes a signal into displayable content for the display device. The content module is connected to the information appliance device and includes a storage device storing data for the signal and a content processor that sends the signal to the information appliance device. The control module connects to the content module and includes a user interface to view and select the data to be displayed on the display device. |
| US09324085B2 |
Method and system of generating digital content on a user interface
There is revealed a progressive and conditional delivery of digital contents. A given master digital content is previously divided in content blocks, each content block being associated with related content blocks presenting particular hierarchical and dependency characteristics. Responsive to user selection of the master digital content, for each selected content block, there is checked first the display of each related content block and upon positive checking there is displayed the considered selected content block. There is further disclosed steps of checking display performed from an analog capture of the user interface or from video frame buffer memory data. There may be detected predefined marks. There may be performed image similarity comparisons or image matching tests with expected images associated with content blocks. There are also disclosed predefined encryption keys being used to decipher one or a plurality of content blocks. In response to a negative display checking according to the invention, there is displayed a predefined content block such as a warning message, an authentication request, a kaptcha challenge, advertisement content or a blurred content block. There is discussed a correspondence of content blocks with DOM nodes. |
| US09324083B2 |
Booking system and method
A method enabling owners of websites to monetize their local listings by implementing online bookings, reservations or orders using an interactive voice recognition (IVR) system. A user of a web-based interface requests a booking or order by entering parameters, for example, name of the restaurant, number of people, date and time. The software of the present invention calls the restaurants telephone using the IVR and confirms or rejects (refuses) the booking. The invention allows for the payment of commissions for originating or facilitation of bookings or orders or the registration of participating restaurants. The booking service is paid by the restaurant for successful bookings. Credit is made for cancelled or no-show bookings. The invention includes a loyalty points system that rewards frequent users of the booking service. |
| US09324079B2 |
System and pouch with QR code, RFID tag, and/or NFC tag
A system for obtaining information from a flexible pouch having an information tag is provided. The system has a management platform, a brand/tag manager and a communication network that affords for an individual using a personal electronic device (PED) to interact with content related to the flexible pouch and/or product within the flexible pouch. The system also includes on-the-fly coding of the information tag as it is printed onto a flexible pouch, the on-the-fly coding being a function and/or analysis of past interactions by individuals viewing, purchasing and/or using flexible pouches with information tags. |
| US09324076B2 |
PIN creation system and method
A user may select or create a PIN at a non-secure input device, such as a web-enabled personal computer. PINs are stored at a financial host in encrypted form, as PIN offsets. The user selected PIN and a corresponding account number are sent in clear text form to the host, which selects a base PIN offset corresponding to the PIN. A host security module within the host converts the base PIN offset to an actual PIN offset using the actual account number. The actual PIN offset (corresponding to the new PIN and the account number) is then stored at the financial host. |
| US09324071B2 |
Powering financial transaction token with onboard power source
There is provided a card or token for use in financial transactions. The financial transaction token or card has an onboard energy storage device that enables onboard electronics to operate when the card is not in the proximity of a merchant Point-Of-Service (POS) terminal. In one implementation, the onboard energy storage device includes a capacitor such as a thin-film capacitor that stores sufficient energy to power onboard electronics without the need for an onboard battery. The card may be incorporated within various conventional apparatus such as a see-through and/or protective substrate, an item of clothing, an item of jewelry, a cell phone, a Personal Digital Assistant (PDA), a credit card, an identification card, a money holder, a wallet, a personal organizer, a keychain payment tag, and like personality. |
| US09324069B2 |
Transit access apparatus and method including device authentication
An apparatus and method for enabling effective use of a contactless payment device in a transit system. The invention may be implemented in a manner that separates the authentication process from the pre-authorization process, thereby permitting a transit system patron to access and begin use of the transit system prior to authorization of the transaction by the issuer of the device. |
| US09324065B2 |
Determining languages for a multilingual interface
In some examples, a merchant device at a point of sale (POS) location may present information to a merchant in a first language preferred by the merchant, and may present information to a buyer in a second language preferred by the buyer. The merchant device may switch between the different languages in response to detecting a change in the physical orientation of a display. For instance, in a first orientation in which the display is viewable from a merchant direction, the merchant device may present information in the language preferred by the merchant. When the orientation of the display is changed to a second orientation in which the display is viewable from a buyer direction, the merchant device may present information in the language indicated to be preferred by the buyer. Various techniques may be used for determining the preferred language of a particular buyer. |
| US09324064B2 |
Digital jukebox device with karaoke and/or photo booth features, and associated methods
Certain exemplary embodiments relate to entertainment systems and, more particularly, certain exemplary embodiments relate to jukebox systems that incorporate digital downloading jukebox features along with karaoke jukebox and/or photo booth features. A combined karaoke/photo booth/jukebox may enable more integrated performance-like experiences in an in-home or out-of-home location or venue. By leveraging vast audio media libraries, trusted rights-respecting network infrastructure, and on-site image/video capturing from integrated recorders and/or remote portable devices, a more sociable experience may be created for karaoke jukebox patrons, e.g., where custom content can be generated and shared in a safe and legally appropriate manner. |
| US09324062B2 |
Isolated payment system
A payment company separate from a retailer runs a payment application having credentials on a server computer. There are wireless personal portable interfaces belonging to the payment company but located in real and virtual retail, showrooms. The retailer agrees to the credentials of the payment company, which include prespecified real and virtual currencies for remittance. Credentials also include rules regarding limitations on acceptance of remittance in virtual currencies. A customer having a personal portable device enters a showroom and selects merchandise to purchase. She selects a payment company who remits payment to the retailer according to the credentials. |
| US09324061B2 |
Notification to users of events
A method and system for notifying users of events. User information is received at a storage location. The user information includes meeting and notification information. User activity is monitored based on the received user information. In response to a detection of a change in user activity, a determination is made of whether the change necessitates notifying a user. The user information in the storage location is modified, based on the detected change in user activity, when the user desires to change the notification information and returning to monitoring user activity. |
| US09324056B2 |
Model entity network for analyzing a real entity network
Systems and techniques that can be used for analyzing a social network or any other type of entity networks. In an effort to preserve the privacy rights of individuals, a model of a real entity network can be generated that is a balanced representation of the entity network, and various tests can be performed on metadata in the model. For example, the model network can be generated based on only two data portions: the total number of nodes in the network and the number of relations per node. |
| US09324051B2 |
Storage cabinet with multiple RFID readers
An RFID cabinet system is provided for monitoring items having an RFID tag. System includes cabinet having open interior where items are stored and at least one door providing access to items. Static RFID system is provided for reading and identifying data embedded on RFID tag located on at least some of the items placed within cabinet. Static RFID system is configured to monitor substantially all items located within the interior of cabinet when door is closed. Transaction RFID system is provided for reading one of the RFID tags upon removal or return of the associated item from cabinet. Transaction RFID system is operable when door is open. Computer system is configured to sense opening and closing of door. Computer system is configured to receive input that identifies user, and computer system is configured to periodically record data read from RFID tags by static RFID system and transaction RFID system. |
| US09324049B2 |
System and method for tracking wellsite equipment maintenance data
A maintenance system includes a plurality of wellsite equipment located at or nearby a wellsite, and a communication interface device for monitoring data that is representative of a health status of the equipment. The system further includes a database containing prior health status of the equipment, and a central data server in communication with the database which is capable of communicating with the communication interface device for generating analysis of the equipment. The analysis includes comparing the monitored data with the prior health status to prescribe if maintenance is required. |
| US09324048B2 |
Resource allocation based on retail incident information
Security personnel time is assigned to a store property by generating an incident score based on a probability of an incident occurring on a store property. A set of ranges of incident scores, each range being associated with a number of hours of security personnel time, are retrieved from computer memory. A range of incident scores in the set of ranges of incident scores that the generated incident score falls within is identified and an associated number of hours of security personnel time is retrieved. Security personnel time is assigned to the store property using a processor based on the number of hours of security personnel time retrieved for the identified range of incident scores. |
| US09324047B2 |
Location-based carpool survey trigger
A portable computing device of a carpool participant may include functionality enabling a mobile application executed on the device to detect an appropriate end of a carpool for a respective participant. Once the end of the carpool is detected for a particular carpool participant, the mobile application may automatically generate and present a carpool survey to the participant on the participant's mobile device. The survey may be presented and feedback collected immediately once the carpool has concluded for each participant using movement and/or location based technologies included in the mobile computing device. Mobile computing devices, methods, and computer readable media are provided. |
| US09324044B2 |
Methods for generating missing rules matching a minimal set of objects
A method (1500) for generating a Generalized Missing Rule (GMR). The method involves receiving descriptions of First Scopes (FSs) that are admissible for a First Rule Project (FRP). FRP comprises first rules. Each FS is defined by at least one object characterizing a case. An Expanded Set of Scope Descriptions (ESSD) is generated by adding descriptions of Second Scopes (SSs) covered by FRP to the descriptions of FSs. An Implicit Description (ID) of FSs and SSs is produced. An Incomplete Most-General Scope (IMGS) is identified from FSs and SSs using ID. IMGS is a scope which is defined by a minimal set of objects, is admissible for FRP and covers at least one case which is not treated by a Second Rule Project (SRP). A Missing Case (MC) of IMGS is identified. MC is not treated by FRP. GMR is generated using MC and IMGS. |
| US09324038B2 |
Method and system for clustering, modeling, and visualizing process models from noisy logs
A process discovery system that includes an offline system training module configured to cluster similar process log traces using Non-negative Matrix Factorization (NMF) with each cluster representing a process model, and learn a Conditional Random Field (CRF) model for each process model and an online system usage module configured to decode new incoming log traces and construct a process graph in which transitions are shown or hidden according to a tuning parameter. |
| US09324034B2 |
On-device real-time behavior analyzer
Methods, systems and devices for generating data models in a communication system may include applying machine learning techniques to generate a first family of classifier models using a boosted decision tree to describe a corpus of behavior vectors. Such behavior vectors may be used to compute a weight value for one or more nodes of the boosted decision tree. Classifier models factors having a high probably of determining whether a mobile device behavior is benign or not benign based on the computed weight values may be identified. Computing weight values for boosted decision tree nodes may include computing an exclusive answer ratio for generated boosted decision tree nodes. The identified factors may be applied to the corpus of behavior vectors to generate a second family of classifier models identifying fewer factors and data points relevant for enabling the mobile device to determine whether a behavior is benign or not benign. |
| US09324029B2 |
Method of determining a driving tendency, and controlling shift according to fuzzy rules
A method of determining a short term driving tendency and a system of controlling shift using the same that reflects precisely a will of a driver on the shift by determining a short term driving tendency is disclosed. The method may include detecting input variables, determining whether determination condition of the short term driving tendency is satisfied, calculating tendencies and output membership function values according to a plurality of fuzzy rules based on the input variables if the determination condition of the short term driving tendency is satisfied, and determining a short term driving tendency index based on the tendencies and the output membership function values according to the plurality of fuzzy rules. |
| US09324024B2 |
Pseudo message recognition based on ontology reasoning
In some examples, a method for recognizing a pseudo message is described. The method may include receiving a message intended for a recipient having an associated recipient Ontology. The method may also include semantically analyzing content of the message to determine whether the content is inconsistent with any rules in the recipient Ontology. The method may also include, upon a determination that the content is inconsistent with a rule in the recipient Ontology, authenticating the message as a pseudo message. |
| US09324023B2 |
Self learning method and system for managing a group reward system
A system for managing a purchase agreement, including: a memory element for at least one specially-programmed general purpose computer for storing an artificial intelligence program (AIP) and a purchase agreement between a customer and at least one business entity, the purchase agreement including at least one requirement regarding at least one retail transaction between the customer and the business entity; a processor in the specially-programmed general purpose computer for: compiling a purchasing history for the customer with respect to the business entity and the purchase agreement, the memory element for storing the purchasing history, and modifying, using the purchasing history and the AIP, the at least one requirement to increase revenue or profitability of the business entity; and an interface element in the specially-programmed general purpose computer for transmitting the modified at least one requirement for presentation to the customer. |
| US09324019B2 |
IC tag
There is provided an IC tag that is simple in structure and in which concentration of stress in a portion near the connection of an IC chip and an antenna part can be reduced. The IC tag 100 includes a film member 10, an antenna part 20 provided on the film member 10, an IC chip 30 mounted on the film member 10 in such a way as to be connected with the antenna part 20. A slit 51 is provided at a position away from the antenna part 20 in the region on the film member 10 near the site at which the IC chip 30 is mounted, and a covering 41 made of an elastic material is provided to cover at least the entire area of the IC chip 30 and a portion of connection of the IC chip 30 and the antenna part 20. |
| US09324017B2 |
Chip module for an RFID system
The invention relates to a chip module for an RFID system, in particular for an RFID-label, a coupling label for use in an RFID-label, an RFID-Inlay for an RFID-label, and an RFID label produced using an RFID inlay on a strip-shaped backing material (5, 8), in particular a backing film; an RFID chip (3) and a coupling antenna (4) that is electrically, in particular galvanically, connected to the RFID-chip (3), are arranged on the strip-shaped backing material. |
| US09324016B1 |
Digest of biographical information for an electronic device with static and dynamic portions
A method of managing a lifecycle of a mobile communication device. The method comprises storing a biographical digest in a radio frequency identity chip of the mobile communication device at the time of manufacture of the communication device, wherein the biographical digest comprises information about the device and comprises a static portion and a dynamic portion. The method further comprises activating the device for wireless communication service; after activating the device, deactivating the device for wireless communication service; and after deactivating the device, writing a device status of the dynamic portion of the biographical digest in the radio frequency identity chip of the device to a value of dead, whereby the device is prevented from being activated for wireless communication service after once having the device status of the dynamic portion of the biographical digest in the radio frequency identity chip of the device written to the dead value. |
| US09324013B2 |
Image used commercial goods creating apparatus, image used commercial goods creating method, and non-transitory computer readable recording medium
An image used commercial goods creating apparatus and an image used commercial goods creating method that automatically create desired image used commercial goods using a processed image which a user has strong feelings about. Whether an image is a processed image obtained by processing an original image is judged. The content of processing of the image which is judged to be the processed image is judged. At least one of the arrangement and size of the processed image in image used commercial goods is determined on the basis of the content of processing of the processed image. The processed image is laid out on the basis of the determined at least one of the arrangement and size of the processed image to create the image used commercial goods. |
| US09324011B2 |
Processing apparatus and processing method for processing print jobs
A processing apparatus includes a generation unit configured to generate print data that is based on a print job, an identification unit configured to identify a preparation time necessary for preparing the print data to be generated by the generation unit, a prediction unit configured to predict a permitted time permitted until preparation of second print data to be printed after first print data is printed is completed on the basis of a preparation time necessary for preparing the first print data, a reception unit configured to receive a supply request for the print data when printing is to be carried out by a printing unit, and a determination unit configured to determine whether print data of a predetermined unit including the second print data generated by the generation unit is to be stored in a print data storage unit. |
| US09324010B2 |
Image forming apparatus
An image forming apparatus, including a mechanism configured to switch an intermediate transfer member between a first state in which the intermediate transfer member is in contact with a first photosensitive drum for a color toner image and a second photosensitive drum for a black toner image in a full-color mode and a second state in which the intermediate transfer member is separated from the first photosensitive drum and in contact with the second photosensitive drum in a monochrome mode; and a control portion configured to control the mechanism according to a set color mode in response to a user operation from which a start of the image formation is predicted, without an instruction of image formation and thereafter control the mechanism according to a changed color mode if the set color mode is changed by a setting of the color mode before receiving the instruction of the image formation. |
| US09324008B2 |
Classifier update device, information processing device, and classifier update method
One aspect of the present invention provides a classifier update device that enhances accuracy of the determination made by a classifier with respect to a specific determination target. A feature quantity update unit updates a reference value of a predetermined criterion in the classifier based on target image data including a specific type of target acquired by an image acquisition unit. |
| US09324006B2 |
System and method for displaying contextual supplemental content based on image content
An image-based content item is analyzed to determine one or more interests of a viewer of the content item. The analysis may include performing image analysis on the content item to determine geographic information that is relevant to an image of the content item. The one or more interests may be determined based on an assumption or probabilistic conclusion about a subject of the content item. Further, the one or more interests may be determined by applying one or more rules that utilize the geographic information. For some embodiments, a supplemental content item may be provided to the viewer based on the one or more interests. |
| US09324004B2 |
Image capture and identification system and process
A digital image of the object is captured and the object is recognized from plurality of objects in a database. An information address corresponding to the object is then used to access information and initiate communication pertinent to the object. |
| US09324003B2 |
Location of image capture device and object features in a captured image
A method for matching a region on an object of interest with a geolocation in a coordinate system is disclosed. In one embodiment, an image of a region on an object of interest is captured on an image capture device. The image is processed to detect a located feature using a feature detection algorithm. Further processing of the located feature is performed to derive a first feature descriptor using a feature descriptor extraction algorithm. The feature descriptor is stored in a memory. A database of feature descriptors having geolocation information associated with the feature descriptors is searched for a match to the first feature descriptor. The geolocation information is then made available for access. |
| US09323999B2 |
Image recoginition device, image recognition method, and image recognition program
An image recognition device includes an image acquiring unit configured to acquire an image, and an object recognition unit configured to extract feature points from the image acquired by the image acquiring unit, to detect coordinates of the extracted feature points in a three-dimensional spatial coordinate system, and to determine a raster scan region which is used to recognize a target object based on the detection result. |
| US09323997B2 |
Distortion/quality measurement
Various implementations address distortion and quality measurements related to, for example, freeze-with-skip and/or a freeze-without-skip events. In several implementations, information is accessed indicating that a first and second set of one or more consecutive pictures are not to be displayed. A first and second indicator are determined. In one such implementation, the first and second indicators indicate an amount of distortion across one or more types of distortive effects that result from displaying substantially a first, or second, same picture during a display time for the first, or second, set of pictures. The first and second indicators are combined in a non-linear manner. In another such implementation, the distortion is associated with a given type of distortive effect, from among multiple types of distortive effects, and the first and second indicators are combined for the given type of distortive effect. |
| US09323994B2 |
Multi-level hierarchical routing matrices for pattern-recognition processors
Multi-level hierarchical routing matrices for pattern-recognition processors are provided. One such routing matrix may include one or more programmable and/or non-programmable connections in and between levels of the matrix. The connections may couple routing lines to feature cells, groups, rows, blocks, or any other arrangement of components of the pattern-recognition processor. |
| US09323992B2 |
Fusion of far infrared and visible images in enhanced obstacle detection in automotive applications
A computerized system mountable on a vehicle operable to detect an object by processing first image frames from a first camera and second image frames from a second camera. A first range is determined to said detected object using the first image frames. An image location is projected of the detected object in the first image frames onto an image location in the second image frames. A second range is determined to the detected object based on both the first and second image frames. The detected object is tracked in both the first and second image frames When the detected object leaves a field of view of the first camera, a third range is determined responsive to the second range and the second image frames. |
| US09323988B2 |
Content-adaptive pixel processing systems, methods and apparatus
Embodiments include methods and systems for context-adaptive pixel processing based, in part, on a respective weighting-value for each pixel or a group of pixels. The weighting-values provide an indication as to which pixels are more pertinent to pixel processing computations. Computational resources and effort can be focused on pixels with higher weights, which are generally more pertinent for certain pixel processing determinations. |
| US09323986B2 |
Method and device for recognizing situation based on image using template
The present invention relates to a method and device for recognizing a situation based on an image using a template. The present invention provides the device for recognizing a situation based on an image. The device includes a camera unit capturing an image which is divided into a plurality of regions and having a template for each of the regions, the template defining characteristics of each of the regions, and a control unit detecting an object in the image and determining the situation surrounding the object according to the template mapped to the region to which the detected object belongs. In addition, the present invention provides the method of operating the device for recognizing a situation. |
| US09323984B2 |
System and methods of adaptive sampling for emotional state determination
Systems, methods, and non-transitory computer readable media for determining the emotional state of a user are described herein. In one example, the method for determining the emotional state of the user comprises receiving a feed from a sensor at a default sampling frequency, and analyzing the feed to determine facial features of a user. The method further comprises computing an emotional quotient of the user based on the facial features, determining a trigger to re-compute the sampling frequency the feed, based in part on the emotional quotient and computing a new sampling frequency based in part on the trigger. Thereafter, the method comprises generating instructions for the sensor to capture the feed at the new sampling frequency. |
| US09323974B2 |
Fingerprint ridge image synthesis system, fingerprint ridge image synthesis method, and program thereof
A fingerprint ridge image synthesis system, configured to accurately extract the shape of the ridges contained in a fingerprint image and clearly reproduce the fingerprint of the fingerprint image on an image, includes: a ridge pixel parameter calculation unit that calculates parameter values including wavelet phase, ridge angle, and inter-ridge distance corresponding to each pixel by means of applying continuous wavelet conversion with respect to the gradient of each pixel contained in the fingerprint image; a label optimization processing unit that optimizes/converts the parameter values corresponding to each pixel to values indicating the mutual continuity with the parameter values in surrounding pixels; and a ridge image generation unit that generates the ridge image by means of converting each pixel gradient in the fingerprint image on the basis of the optimal value. |
| US09323973B2 |
Device for capturing an image representing a print of a part of the body of a person
A device for capturing an image representing a print of a part of the body of a person, the capture device may include: a base layer; a reference electrode covering the base layer; electronic capsules fixed in the form of a matrix on the reference electrode, each electronic capsule consisting of a microcapsule filled with a liquid medium and particles with two different colors and opposite electrical charges; a support plate covering the electronic capsules and serving as a support for said part; a camera intended to take an image of the electronic capsules; and an active electrode intended to come into contact with said part and electrically connected to a voltage source delivering a non-zero electrical voltage. |
| US09323965B2 |
Method for choosing RFID communication mode and RFID device which supports near-field and far-field communication
Provided is a method of choosing a communication mode of an RFID device which supports near-field communication and far-field communication, including: interrupting generation of a self RF field signal; determining whether or not an RF field signal for near-field communication is detected; choosing the near-field communication mode when an external RF field signal for near-field communication is detected; and generating the self RF field signal for far-field communication when the external RF field signal for near-field communication is not detected, and choosing the communication mode according to whether or not a response signal is received. |
| US09323962B2 |
Electrical connector with grounding plate
An electrical connector comprises an insulative housing, a plurality of contacts retained in the insulative housing and a metal shell enclosing the insulative housing. The insulative housing has a inserting slot. The contacts include a plurality of grounding contacts and signal contacts, the contacts each comprise a retaining portion retained in the insulative housing, a contacting portion extending forwardly from a side of the retaining potion and extending into the inserting slot and a soldering portion extending from the other side of the retaining portion. The shield shell has a top wall covering a top of the insulative housing and the shield shell comprising at least a pair of resisting arms, the pair of resisting arms resisting the two sides of the grounding contact along a left-to-right direction. |
| US09323961B2 |
Portable electronic device
The problem of the present invention is to provide a tablet-type portable electronic device that can perform payment by way of a card, as well as having a compact size. A tablet-type portable electronic device of the present invention includes a plate-shaped housing having a front surface, a touch panel and display unit provided to the front surface of the housing, and reading units that perform reading processing of a card related to payment. The reading units are configured integrally with the housing. |
| US09323959B2 |
Buffer-less rotating coefficient filter
A circuit that provides a rotating coefficient FIR filter with all necessary coefficient sets present at the same time, without the need for delay elements, devices providing for adjustable impedances, or buffers is described. An input signal is sampled in a round robin fashion by a plurality of switches and capacitors. The capacitors are connected directly to sets of impedance devices. Each set of impedance devices implements the coefficients of the desired frequency response of the filter, adjusted to compensate for the decay of samples in the capacitors between samples. The impedance devices in each set are connected to the capacitors in a different order from each other set, so that each set of impedance devices will produce the desired frequency response when a different one of the capacitor contains a new sample of the input signal. Switches connect the sets of impedance devices to an output and a virtual ground, only one switch being connected to the output at a time to provide the output signal. |
| US09323949B2 |
De-identification of data
The present invention relates to a method, computer program product and system for de-identifying data, wherein a de-identification protocol is selectively mapped to a business rule at runtime via an ETL tool. |
| US09323945B2 |
Systems, methods, and computer program products for managing secure elements
Systems, methods, and computer program products are provided for performing content management operations. At least one memory stores data, and a central security domain manages instructions on behalf of one or more service provider security domains. The instructions are received, over a network, from a trusted service manager. The instructions are processed in at least one of the one or more determined service provider security domains, using the data stored in the at least one memory. The data includes one or more generic applications, each of which can be instantiated for one or more service providers. |
| US09323943B2 |
Decrypt and encrypt data of storage device
Data read from a volume is decrypted using a first key. The decrypted data is encrypted using a second key. The encrypted data is written back to the volume. An access request to a location of the volume is received from a host. Data is encrypted to or decrypted from the location using the first or second key, in response to the access request. The first key is used for the access request if the location has not been decrypted using the first key and encrypted using the second key. The second key is used for the access request if the location has been decrypted using the first key and encrypted using the second key. |
| US09323940B2 |
Rights control method and apparatus for digital living network alliance
Disclosed in the disclosure are a rights control method and an apparatus for Digital Living Network Alliance (DLNA). An address/rights recoding unit is expanded at a DLNA apparatus side to record what addresses and corresponding rights; a service control program is expanded at the DLNA apparatus side, and when another DLNA apparatus requires the present DLNA apparatus to provide a service, the address of said another DLNA apparatus and the address/rights recording unit are compared and the rights is found out. Only users with a Media Access Control (MAC) address set as allowed to have related service can be allowed to use the service of the DLNA apparatus of the technology and to obtain Extensible Markup Language (XML) files of the apparatus and the service description. The service of DLNA service points can be flexibly arranged so as to enable different access users to obtain different rights, thus well guaranteeing the security of the multimedia data and the flexibility of the multimedia service management. The security, privacy and manageability of the DLNA apparatus are ensured. |
| US09323938B2 |
Holistic XACML and obligation code automatically generated from ontologically defined rule set
Computer-based systems and methods for automatically generating both XACML rules and processed-based obligation code using a common ontologically defined ruleset. |
| US09323936B2 |
Using a file whitelist
A method and/or system for using a file whitelist may include receiving a request to approve an application for release in an application store. The request may comprise application data. The application data may comprise a resource manifest and/or a file whitelist. The resource manifest may comprise, for example, one or more resource items. The file whitelist may comprise, for example, one or more file items. The request may be analyzed based on application data. A determination may be made whether the applications may be released in the application store based on the analyzing of the applications data. A request to access a particular file may be received. A determination of whether to grant the request may be based on a resource manifest and/or a file whitelist associated with the application. |
| US09323932B2 |
Protecting memory contents during boot process
Embodiments include methods, systems, and computer storage devices directed to identifying that a trusted boot mode (TBM) control bit is set in an input/output memory management unit (IOMMU) and configuring the IOMMU to block a DMA request received by the IOMMU from a peripheral in response to the identifying. |
| US09323927B2 |
Apparatus and method for guaranteeing safe execution of shell command in embedded system
Provided are an apparatus and method for enhancing security and safety of an embedded system by monitoring and blocking unauthorized execution of a shell command in the embedded system.The apparatus for guaranteeing safe execution of the shell command in the embedded system includes a shell command detection part configured to detect an execution request of the shell command, and a shell command execution control part configured to control execution of the shell command according to whether a password based on safety is provided for the detected shell command. |
| US09323923B2 |
Code repository intrusion detection
The disclosed subject matter provides for code repository intrusion detection. A code developer profile can be generated based on characteristic features present in code composed by the developer. Characteristic features can be related to the coding propensities peculiar to individual developers and, over sufficient numbers of characteristic features, can be considered pseudo-signatures. A target code set is analyzed in view of one or more developer profiles to generate a validation score related to a likelihood of a particular developer composing a portion of the target code set. This can serve to confirm or refute a claim of authorship, or can serve to identify likely author candidates from a set of developers. Where the target code set authorship is determined to be sufficiently suspect, the code set can be subjected to further scrutiny to thwart intrusion into the code repository. |
| US09323920B2 |
Data processing arrangement and method for ensuring the integrity of the execution of a computer program
According to one embodiment, a data processing arrangement is described comprising a processor configured to carry out a computer program including a plurality of program instructions; a signature determination arrangement configured to determine a signature of the program instructions carried out by the processor wherein the processor is configured to, when it carries out a program instruction of the plurality of program instructions which indicates the next program instruction of the plurality of program instructions to be carried out, provide information about the indication to the signature determination arrangement; wherein the signature determination arrangement is configured to take into account the information in the determination of the signature; and a detector configured to check, when the computer program is completely carried out, whether the determined signature is equal to a reference signature. |
| US09323919B2 |
Password reset system
A customer initiated password reset system resets user passwords on a variety of network entities, such as internal systems, allowing simultaneous reset with a minimum number of user specified passwords that nonetheless satisfy the password specifications of these internal systems. Thereby, the user avoids the tedium of logging into each of these systems, changing their password, logging out, etc., for each system with the likelihood of creating unique passwords for each system that have to be remembered. By further incorporating a score metric based upon how many character sets are touched, a required degree of complexity can be measured and enforced against the password specifications. Advantageously, a table-based approach to enforcing password reset against the multiple password specifications facilitates making and fielding updates. |
| US09323918B2 |
Methods, systems, and computer program products for recovering a password using user-selected third party authorization
A password recovery technique for access to a system includes receiving a request from a first party to recover the first party's password to access the system, receiving a selection of a second party from the first party, sending a message to the second party requesting that the second party authorize the request to recover the first party's password, receiving authorization from the second party for the request to recover the first party's password, and resetting the first party's password responsive to receiving authorization from the second party. |
| US09323917B2 |
Information processing system, information processor, image forming apparatus, and information processing method
An information processing system including multiple apparatuses capable of executing one or more applications and an information processor connected to the apparatuses through a first network is disclosed. The information processing system includes a license status information obtaining part configured to obtain the license status information of the applications installed in each of the apparatuses from the corresponding apparatuses through the first network, a license data obtaining part configured to obtain license data authorizing usage of the applications from a computer connected through a second network based on the license status information, and a license data delivery part configured to deliver the license data to each of the apparatuses. |
| US09323913B2 |
Web based extranet architecture providing applications to non-related subscribers
An extranet includes a network which couples a plurality of non-related participants and a server coupled to the network. The server stores a plurality of applications including workgroup applicants, transaction applications, security applications and transport circuits and equipment. The server is programmed to load particular ones of the plurality of applications onto the network for use by the plurality of participants in response to a request by one of the participants for a particular application. |
| US09323910B2 |
Method, client and server of password verification, and password terminal system
The present disclosure provides techniques for authenticating a password. These techniques may enable a user terminal to retrieve a diagram using a computing device. The diagram is inputted by a user in a terminal and is displayed in form of a diagram in connection to a password. The computing device may then transfer operand points passed through by the diagram to a server terminal for password authentication, and then receive a result of the password authentication from the server terminal. These techniques improve password authentication security. |
| US09323906B2 |
Method and system for digital rights management enforcement
A method and system for Digital Right Management (DRM) enforcement on a client device is provided. The method includes: determining client requested digital content; retrieving DRM data associated with the requested digital content; bundling the associated DRM with the requested digital content; transmitting the bundled DRM and digital content to the client device; and enforcing the DRM on the client device. The system includes: a client device configured to issue a request for digital content; a content review module configured to retrieve DRM data associated with the requested digital content; a bundler module configured to bundle the associated DRM with the requested digital content; a connection module configured to transmit the bundled DRM and digital content to the client device; and an enforcement module configured to enforce the DRM on the client device. |
| US09323896B2 |
Systems and methods for simulation-based radiation estimation and protection for medical procedures
Systems and methods for determining radiation exposure during an x-ray guided medical procedure are disclosed. In some embodiments, the system includes an x-ray equipment model that simulates the emission of radiation from x-ray equipment during the x-ray guided medical procedure, a human exposure model that simulates one or more human anatomies during the x-ray guided medical procedure, a radiation metric processor that calculates at least one radiation exposure metric, and a feedback system for outputting information based on the at least one radiation exposure metric. The radiation metric processor calculates radiation exposure metrics based on input parameters that correspond to operating settings as well as the location and structure of one or more human anatomies. |
| US09323892B1 |
Using de-identified healthcare data to evaluate post-healthcare facility encounter treatment outcomes
A computer-implemented method includes producing medical information that characterizes a group of individuals from a set of private data representing pre or post-encounter characteristics of the individuals, wherein the individuals have had encounters with a healthcare facility. The identity of the individuals is unattainable from the produced medical information. The method also includes providing the produced medical information to report the pre or post-encounter characteristics of the group. |
| US09323890B2 |
Optimal solution search method and optimal solution search device
A search device and method of a pertinent solution using a genetic algorithm that performs genetic operation(s) on a plurality of individuals each having an element of a candidate solution to a problem in the form of a gene sequence. Genetic information about target individuals includes whether all individuals are, regardless of their fitness values, in a state among a living state that is a target of genetic operation and a target of calculating a fitness value, and a dead state that is not the target of genetic operation nor the target of the calculation of the fitness value. Each target individual has a predetermined value of a lifespan. A breeding area that allows predation of leading an individual belonging to a lower layer to a dead state due to predation by an individual belonging to a higher layer in the breeding area is an aspect of generating new target individuals. |
| US09323888B2 |
Detecting and classifying copy number variation
The invention provides a method for determining copy number variations (CNV) of a sequence of interest in a test sample that comprises a mixture of nucleic acids that are known or are suspected to differ in the amount of one or more sequence of interest. The method comprises a statistical approach that accounts for accrued variability stemming from process-related, interchromosomal and inter-sequencing variability. The method is applicable to determining CNV of any fetal aneuploidy, and CNVs known or suspected to be associated with a variety of medical conditions. CNV that can be determined according to the method include trisomies and monosomies of any one or more of chromosomes 1-22, X and Y, other chromosomal polysomies, and deletions and/or duplications of segments of any one or more of the chromosomes, which can be detected by sequencing only once the nucleic acids of a test sample. |
| US09323886B2 |
Performance predicting apparatus, performance predicting method, and program
A performance predicting apparatus includes an approximate model storage unit configured to store approximate models each of which is associated with one of categories, and which are used to calculate functional performance based on feature values, a feature value extracting unit configured to extract the feature values from shape data representing a shape of an object, a selection unit configured to select one of the approximate models to be used from the approximate models stored in the approximate model storage unit depending on the feature values extracted by the feature value extracting unit, and a performance calculating unit configured to calculate functional performance based on the feature values extracted by the feature value extracting unit using the approximate model selected by the selection unit. |
| US09323883B2 |
Planar design to non-planar design conversion method
A planar design to non-planar design conversion method includes following steps. At least a diffusion region pattern including a first side and a second side perpendicular to each other is received. A look-up table is queried to obtain a first positive integer according to the first side of the diffusion region pattern and a second positive integer according to the second side of the diffusion region pattern. Then, a plurality of fin patterns is formed. An amount of the fin patterns is equal to the second positive integer. The fin patterns respectively include a first fin length, and the first fin length is a product of the first positive integer and a predetermined value. The forming is performed by at least a computer-aided design (CAD) tool. |
| US09323875B2 |
Dynamically determining number of simulations required for characterizing intra-circuit incongruent variations
A method is disclosed comprising using a circuit recognition engine running on a computerized device to detect a number and type of devices in an integrated circuit. The method characterizes device variation by selecting a set of dominant active devices and performing simulation using the set of dominant active devices. Three different options may be used to optimize the number of simulations for any arc/slew/load combination. Aggressive reduction uses a minimal number of simulations at the cost of some accuracy loss, conservative reduction reduces the number of simulations with negligible accuracy loss, and dynamic reduction dynamically determines the minimum number of simulations needed for a given accuracy requirement. |
| US09323874B2 |
Simulation method using memory frame proxy architecture for synchronization and check handling
A simulation technique that handles accesses to a frame of memory via a proxy object provides improved throughput in simulation environments. The proxy object, if present, processes the access at a head of a linked list of frames. If a check frame is not inserted in the list, the memory frame handles the request directly, but if a check frame is inserted, then the check operation is performed. The check frame can be a synchronization frame that blocks access to a memory frame while the check frame is present, or the check frame may be a breakpoint, watch or exception frame that calls a suitable handling routine. Additional check frames may be chained between the interface and the memory subsystem to handle synchronization, breakpoints, memory watches or other accesses to or information gathering associated with the memory frame. |
| US09323871B2 |
Collaborative development of a model on a network
An application programming interface (API) is provided for use with a modeling software. The API allows users at several devices operating on a network to collaboratively develop a model of an object or a group of objects. The API receives an indication that a selected component has been modified by the modeling software in accordance user commands, generates component data indicative of the modifications of the selected component, and causes an update indication to be transmitted to a collaboration server via a communication network to synchronize the selected component between the first computing device and a second computing device. The update indication may include a component identifier, such that the component identifier uniquely identifies the selected component in the model. |
| US09323870B2 |
Method and apparatus for improved integrated circuit temperature evaluation and IC design
A method and apparatus generates thermal partitions for metal interconnects of an integrated circuit, based on interconnect self heat data and mutual heat data. Each of the thermal partitions includes data identifying thermally related interconnects and respective temperature values associated with each of the thermally related interconnects. Thermally related partitions that can be computed efficiently and simultaneously and the results then integrated using superposition for the full chips. |
| US09323869B1 |
Mesh-based shape optimization systems and methods
A system and method for shape optimization that includes receiving information regarding a model that represents one or more physical objects to be manufactured, the information comprises a finite element mesh, geometric parameters, geometric constraints, and manufacturing constraints of the model and generating a morphed mesh that results in an updated finite element mesh in order to meet specified model characteristics. The method further includes generating the morphed mesh by displacing nodes located at the boundary regions of the model and determining a displacement of interior nodes of the finite element mesh using an interpolation of boundary node displacement. |