| Document | Document Title |
|---|---|
| US09318983B2 |
Motor controller
A 0-axis current calculator 7 configured to calculate a target value of the 0-axis current by setting the current of the open phase to be zero when one of the phases becomes open, or determines that the target value of the 0-axis current is zero when there is no open phase is provided. Based on the target values of the d-axis current and the q-axis current, the target value of the 0-axis current calculated by the 0-axis current calculator 7, and the d-axis current, the q-axis current, and the 0-axis current transformed by the d-q-0 transformer 8, the current supplied to each phase of the motor are controlled. |
| US09318980B2 |
Piezoelectric actuator, robot hand, and robot
A piezoelectric actuator includes a vibrating body including a piezoelectric device; a driving circuit that supplies a driving signal to the piezoelectric device; a phase difference detecting circuit that detects a phase difference between the driving signal and a detection signal detected based on vibration of the vibrating body; and a frequency controller that controls the frequency and power of the driving signal, wherein the frequency controller sets the power to an upper limit voltage value when the frequency is changed so that the phase difference falls within a predetermined range and sets the voltage to a lower limit voltage value smaller than the upper limit voltage value when the phase difference is outside the predetermined range. |
| US09318976B1 |
Adjustable PWM method to increase low speed starting torque and inverter voltage measurement accuracy
Methods, control apparatus and computer readable mediums are presented for controlling a switching inverter in which a controller selectively suspends PWM carrier signals to provide inverter switching control signals using zero vectors in response to a maximal pulse width value for a present PWM half cycle being greater than a threshold value, and accumulates a present output control value for individual output phases for use in a subsequent PWM half cycle for selective effective reduction in switching frequency for low-speed operation while maintaining high frequency control loop sampling. |
| US09318970B2 |
Voltage regulation apparatus
A voltage regulator for regulation both of AC and of DC voltages, is provided in a regulator module (30) which uses a repetitive switching signal (32) to control a switch (36) allowing current to be supplied to a reservoir capacitor (42) by supply from an unregulated rail (18). The module contains a dual inductor (44, 46, 48) having first (44) and second (46) identical windings and a common core. A current pass capacitor (43) is also provided. When the switch (36) is closed, the first winding (44) delivers current to the reservoir capacitor. When the switch (36) is open, both the second (44) and the first (46) windings deliver current to the reservoir capacitor (42). The apparatus can support balanced operation, where pairs of switches are operated alternately and oppositely. The switching signal (32) can be suitably voltage restored to provide a signal suitable to control and operates switches (36). Different configurations of transistor switches (36) and diodes (38) are shown. |
| US09318969B2 |
Frequency converter with DC link capacitor and method for pre-charging the DC link capacitor
A frequency converter has an AC-DC converter and an inverter interconnected via a DC link having a first and a second circuit branch interconnected by a DC link capacitor and a commutation capacitor. To protect the AC-DC converter from damage caused by an overcurrent, the first circuit branch includes a choke in which a capacitor-side terminal is connected to a terminal of the DC link capacitor and a switch-side terminal is connected via a semiconductor switch to a DC link terminal of the AC-DC converter and also via a freewheeling diode to the second circuit branch. The semiconductor switch is configured to control a magnitude of an electric current flowing from the AC-DC converter into the DC link capacitor in accordance with a control signal. |
| US09318968B2 |
DC-DC converter circuit for high input-to-output voltage conversion
The present invention provides a series of DC-DC converter circuit designs, and DC-DC converters based on such circuit design, that provide high input-to-output voltage conversion. The converters include a resonant tank and a means for interrupting the tank current to produce a near zero-loss “hold” state wherein zero current and/or zero voltage switching is provided, while providing control over the amount of power transfer. A resonant DC-DC converter for high voltage step-up ratio in accordance with the circuit design includes: (a) a low voltage DC-AC converter, (b) a resonant tank, (c) a high voltage AC-DC converter, (d) a (i) common ground on an input and an output without use of a transformer and/or (ii) a single high voltage controllable switch within the resonant tank. |
| US09318965B2 |
Method to control a minimum pulsewidth in a switch mode power supply
A power converter circuit includes a transformer and a main switch controller by a primary side controller. A sensing circuit is implemented that senses the voltage at an auxiliary winding of the transformer while the main switch is ON. The auxiliary winding is another winding on the primary side of the transformer, magnetically coupled to the secondary winding and electrically isolated from the primary winding. When the voltage across the auxiliary winding reaches a predefined threshold voltage level, the main switch is switched OFF. The threshold voltage level is set at a value that minimizes an amount of energy transferred per pulse to the secondary side of the circuit while maintaining a minimum amount of energy transfer to enable output voltage sensing at the auxiliary winding. |
| US09318964B2 |
Power supply system, image forming apparatus having the same, and control method of the same
A power supply system includes: a switching power supply configured to convert an AC voltage from an AC power supply into predetermined DC voltages, and outputs the DC voltages; a switch circuit provided on an AC input line, the switch circuit being configured to be switched on and off and supply AC power to the power supply when the switch circuit is turned on; a low-capacity power supply circuit connected. to the AC input line at a front stage of the switch circuit, the low-capacity power supply circuit being configured to supply electric power to the switch circuit if the power supply is active and supply predetermined electric power if the power supply is not used; and a control device configured to receive the predetermined electric power from the low-capacity power supply circuit. When the power supply is not used, the control device turns off the switch circuit. |
| US09318961B2 |
Switching power-supply device
A switching power-supply device includes a COMP-voltage comparator circuit that compares a COMP-voltage obtained by performing phase compensation on the feedback signal, with a first threshold voltage which is a threshold value; and an intermittent-oscillation control circuit that, if it is detected by the COMP-voltage comparator circuit that the COMP-voltage is lower than the first threshold voltage, stops the switching operation of the switching device and performs a transition to a first intermittent oscillation operation in which the switching device performs the switching operation every predetermined first period, wherein if a predetermined delay period elapses in a state where the COMP-voltage is lower than the first threshold voltage, the intermittent-oscillation control circuit performs a transition to a second intermittent oscillation operation in which the switching device performs the switching operation every second period which is an integral multiple of the first period. |
| US09318950B2 |
Control circuit for reducing touch current of a power converter and operation method thereof
A control circuit for reducing touch current of a power converter includes an auxiliary pin, a zero-crossing signal generator, a frequency limiting signal generator, and a gate signal generator. The auxiliary pin is used for receiving a voltage generated by an auxiliary winding of the power converter. The zero-crossing signal generator is used for generating a zero-crossing signal according to the voltage generated by the auxiliary winding and a first reference voltage. The frequency limiting signal generator is used for generating a frequency limiting signal according to a gate control signal, a burst mode signal, and the voltage generated by the auxiliary winding. The frequency limiting signal is used for limiting the gate control signal to a predetermined frequency. The gate signal generator is used for generating the gate control signal to a power switch of the power converter according to the frequency limiting signal and the zero-crossing signal. |
| US09318945B2 |
Resonant-mode power supply with a multi-winding inductor
A resonant-mode power supply, comprising an assembly of switches connected in a bridge or a half-bridge configuration, a series resonant circuit connected in the bridge or half bridge diagonal, a part of which is formed by a multi-winding inductor by means of which a load is connected, and a controller configured to stabilize output voltages or currents by controlling the switching frequency of the assembly of switches. The series resonant circuit comprises an energy recirculation circuit (ERC1) for limiting the resonant circuit quality factor, connected through the diode rectifier (DR2) to the supply voltage node and a current monitoring circuit (CMC) configured to monitor the recirculation circuit current (Ilim) and, by means of the controller (C), to change the switching frequency of the assembly of switches (K1, K2, K3, K4) in order to reduce power supplied to the resonant circuit upon exceeding the threshold value by the current (Ilim) in the energy recirculation circuit (ERC1). |
| US09318942B2 |
Electric machine with linear mover
An electric machine that allows enhancement of thrust of a mover is provided. An electric machine includes a magnetic pole piece array including a plurality of magnetic pole pieces spaced along a permanent magnet array. The magnetic pole pieces are disposed between the permanent magnet array and winding portions in immovable relation with the winding portions. The pitch of permanent magnets and the pitch of magnetic pole pieces are determined such that magnetic flux flows through two of the permanent magnets magnetized in the same direction and located in the permanent magnet array with one permanent magnet interposed between the two permanent magnets, and also flows through one of the magnetic pole pieces facing the one permanent magnet interposed between the two permanent magnets and magnetized in a direction of magnetization different from the direction of magnetization of the two permanent magnets. |
| US09318932B2 |
Control unit for a power tool
A power tool includes a brushless DC motor housed inside an upper body of the tool housing and a control unit housed inside a handle of the housing, the control unit including a micro-controller mounted on a control circuit board, a power unit electronically coupled to the micro-controller and mounted on a power circuit board arranged substantially parallel the control circuit board inside the handle, and a heat sink in thermal contact with the power unit. An input unit may be mounted directly on the control circuit board. An upper portion of the heat sink extending towards the upper body of the housing may include a tab protruding underneath a fan assembly of the motor to transfer heat from the power unit to the airflow created by the fan. |
| US09318928B2 |
Brushless motor, disk drive apparatus and brushless motor manufacturing method
A brushless motor includes a plate-shaped armature and a magnet facing either one of a top surface and a bottom surface of the armature. An inner peripheral surface of a base member and an outer peripheral surface of a bearing mechanism contact with each other or face each other in a diametrical direction with an adhesive therebetween in a first fixing part. Further, a rotor yoke and a hub protrusion contact with each other or face each other in a diametrical direction with an adhesive therebetween in a second fixing part. Then, a press-fitting or adhesion is carried out in the other of the first and the second fixing part. |
| US09318925B2 |
Wind turbine generator and maintenance of its main bearing
A generator for a wind turbine is proposed. The generator has a stator, a rotor having a rotor housing surrounding the stator, and a main bearing to support the rotor housing such that the rotor housing is rotatable about an axis of rotation. The stator has a plurality of cylindrical elements extending in parallel with the axis of rotation, and the rotor has a front element having a plurality of holes at positions alignable with the cylindrical elements, such that the rotor is fixable to the stator by inserting a fastening member through a cylindrical element and a hole aligned with the cylindrical element. |
| US09318923B2 |
Laminated iron core and method for manufacturing same
A laminated iron core and a method for manufacturing the same are provided to secure the lamination strength of the respective iron core pieces thereof, and to provide good magnetic efficiency and to reduce a loss. In a laminated iron core including a first caulking section formed in an area thereof having larger magnetic flux density than other area and a second caulking section formed in the other area, the engagement area A of the recessed sub-sections and projecting sub-sections of the first caulking sections of divided iron core pieces adjoining each other in the laminating direction is set smaller than the engagement area B of the recessed sub-sections and projecting sub-sections of the second caulking sections adjoining each other in the laminating direction. |
| US09318921B2 |
System and method for three mode wireless energy harvesting
Described herein are embodiments of methods and systems for a three mode wireless energy harvesting concept wherein a triceiver system with a single antenna can be configured to transmit wireless data, receive wireless data and exchange power with other devices. When not being used for exchanging power, the triceiver system with the single antenna can be operably connected to data transfer functions of a wireless device. When used for receiving power, the triceiver antenna can be operably connected to subsystems for converting RF signals to electrical energy. When used for transmitting power, the triceiver antenna can be operably connected to subsystems for converting electrical energy to RF signals. |
| US09318914B2 |
Wireless charging device
The present disclose relates to a wireless charging device for charging a portable electronic device. The wireless charging device includes a charging panel, a transmitting unit and a heat dissipation unit. The charging panel includes a first surface and a second surface opposite to the first surface, the first surface supports the portable electronic device, and the portable electronic device includes a top surface away from the charging panel. The transmitting unit includes a coil for generating electromagnetic signals for charging the portable electronic device. The heat dissipation unit includes a base and a pressing portion connected to the base. The base thermally contacts the second surface of the charging panel, and the pressing portion thermally contacts the top surface of the portable electronic device. |
| US09318910B2 |
Cell balancing circuit and cell balancing method using the same
A battery cell balancing system is disclosed. In one embodiment, the system includes a plurality of battery cells arranged in series and a power supply configured to receive the cumulative voltage of the battery cells and output a first charging voltage to one of the battery cells that has a voltage less than a reference voltage. According to one embodiment, it is possible to implement a cell balancing operation using the cumulative voltage of the battery cells. |
| US09318907B2 |
Assembled wearable electronic device
An assembled wearable electronic device including a first body and a second body is provided. The first body has a primary system and a first assembling portion. The primary system is for providing the independent operation of the first body and producing a related first data. The second body has a secondary system and a second assembling portion. The secondary system is for providing the independent operation of the second body and producing a related second data. The first body and the second body are adapted to be assembled to each other by the first assembling portion and the second assembling portion, and the first assembling portion and the second assembling portion are adapted to rotate relatively such that the first assembling portion is positioned or released by the second assembling portion. |
| US09318904B2 |
Battery-charging device and method of manufacturing same
A battery-charging device includes: a housing that is configurable from a first shape into at least a second shape; and a direct current-to-direct current battery charger disposed within the housing. The direct current-to-direct current battery charger is configured to convert direct current power, received from a source external to the battery charger, into a direct current source for supplying energy to a rechargeable battery that is electrically connected to the battery charger. The battery-charging device may further include a communication element configured to communicate, with a portable electronic device that includes the rechargeable battery, using a short-range communication technology. |
| US09318900B2 |
Power management system
A power management system capable of outputting AC voltages includes a plurality of power units, at least a first diode, a first polarity switch unit and a control unit. The power units are electrically connected to form a power unit string. Each power unit includes a battery module and a first switch device connected in serial. One end of the first diode is connected to one of the power units, and the other end thereof is connected to a first common node to form a discharge path. The first polarity switch unit is electrically connected to the first common node and the power unit string, and outputs a first operating voltage. The control unit is electrically connected to the first switch device and the first polarity switch unit to turn on/off the first switch device and control the output polarity of the first polarity switch unit. |
| US09318897B2 |
Reducing corruption of communication in a wireless power transmission system
An embodiment of the invention provides a method for reducing data corruption in a wireless power transmission system. Power is transmitted from a primary coil to a secondary coil by induction. The voltage induced on the secondary coil by induction is rectified. The change in current supplied to a load configured to be coupled to the wireless power transmission system is limited. |
| US09318887B2 |
Resin molded bushing and switchgear
An object of the present invention is to obtain a resin molded bushing which can easily perform positioning of an electric field relaxation shield in a switchgear. The resin molded bushing includes: an electric field relaxation shield which concentrically surrounds the outer periphery of an internal conductor made of conductor; a cast resin which covers the internal conductor and the electric field relaxation shield; and an elastic member which is disposed on the outer periphery of the electric field relaxation shield and is embedded in the cast resin. The height of the elastic member is equal to the thickness of the cast resin which covers the electric field relaxation shield. |
| US09318886B1 |
Electrical fixture mounting system
A light fixture mounting system which aids in quickly, easily, and safely connecting a light fixture to a junction box. The light fixture mounting system generally includes a mounting plate adapted to be electrically and mechanically connected to a junction box. The mounting plate includes contacts comprised of metallic material such that an electrical fixture may be magnetically secured to the mounting plate. Magnets on the electrical fixture will magnetically engage with the contacts to magnetically secure the electrical fixture to the mounting plate. Current from the junction box will pass through the contacts and magnets to power the light source. A relay switch and reed switch are also utilized in combination with a central magnet on the electrical fixture to stop current flow if the electrical fixture becomes partially or fully dislodged from the mounting plate. |
| US09318881B2 |
Inter-event control strategy for corona ignition systems
The invention provides a system and method for controlling corona discharge. A driver circuit provides energy to the corona igniter and detects any arc formation. Optionally, in response to each arc formation, the energy provided to the corona igniter is shut off for a short time to dissipate the arc. Once the arc dissipates, the energy is applied again to restore the corona discharge. The driver circuit obtains information relating to the corona discharge, such as timing and number of arc formations. A control unit adjusts the energy provided to the corona igniter, shut-off time, or the duration of the corona event based on the information. The adjusted energy levels and duration are applied during subsequent corona events. For example, the voltage level could be reduced or the shutoff time could be increased to limit arc formations and increase the size of the corona discharge during the subsequent corona events. |
| US09318880B1 |
Spark plug for internal combustion engine
A spark plug includes a terminal metal fitting held inside a cylindrical insulator, and a resistor disposed inside the insulator so as to be located between the terminal metal fitting and a center electrode held inside the insulator. The terminal metal fitting includes an engaging portion engaged into the inner peripheral surface of the insulator and a small-diameter portion extending from the engaging portion. The small-diameter portion is formed with ribs extending in an axial direction of the small-diameter portion and projecting outward from the outer peripheral surface of the small-diameter portion. A conductive sealing member is located at least at part on a distal end side of a gap between the outer peripheral surface of the terminal metal fitting and the inner peripheral surface of the insulator. |
| US09318879B2 |
Spark plug having firing pad
A spark plug has a firing pad attached to a center electrode or a ground electrode by way of a fused portion. In one or more embodiments, the firing pad is composed of a precious metal material. The fused portion can be formed in such a way that a material composition thereof at a sparking surface of the firing pad has a greater percentage of the precious metal material than a material of the underlying electrode to which the firing pad is attached. |
| US09318878B2 |
Spark plug with noble metal tip
In a section of a spark plug cut by a plane which passes through the center of gravity of the intermediate member and is in parallel with the facing direction between a center electrode and an extending portion of a ground electrode, a spark plug that satisfies the relational expression S1/(D1×H1)≧0.005, where S1 is the total area of nuggets, H1 is the height of the end surface of a noble metal tip from the disposition surface of an electrode base metal, and D1 is the maximum width of the noble metal tip. |
| US09318872B2 |
VCSEL with integrated electrically modulated intra-cavity graphene absorber
A VCSEL can include a graphene intra-cavity absorber having at least one graphene region and at least one dielectric region adjacent to the graphene region. The VCSEL can also include a graphene electrode electronically coupled with at least one graphene region. The VCSEL can also include a contact region adjacent with at least one dielectric region. The VCSEL can also include a contact electrode electronically coupled with the contact region. The VCSEL can also include a base electrode electronically coupled with a base of a semiconductor region of the VCSEL. The graphene intra-cavity absorber can include at least two graphene regions sandwiching at least one dielectric region therebetween. |
| US09318870B2 |
Deep ultra-violet light sources for wafer and reticle inspection systems
Disclosed are methods and apparatus for generating a sub-208 nm laser. A laser apparatus includes one or more seed radiation sources for generating a first radiation beam having a first fundamental wavelength on a first optical path and a second radiation beam having a second fundamental wavelength on a second optical path, a first amplifier for amplifying the first radiation beam, a second amplifier for amplifying the second radiation beam, and a wavelength conversion module comprising a plurality of crystals for frequency multiplying and mixing the amplified first and second radiation beams to produce an output beam at a fifth harmonic that is less than about 208 nm. |
| US09318869B2 |
193nm laser and inspection system
A laser for generating an output wavelength of approximately 193.4 nm includes a fundamental laser, an optical parametric generator, a fourth harmonic generator, and a frequency mixing module. The optical parametric generator, which is coupled to the fundamental laser, can generate a down-converted signal. The fourth harmonic generator, which may be coupled to the optical parametric generator or the fundamental laser, can generate a fourth harmonic. The frequency mixing module, which is coupled to the optical parametric generator and the fourth harmonic generator, can generate a laser output at a frequency equal to a sum of the fourth harmonic and twice a frequency of the down-converted signal. |
| US09318867B2 |
Laser device with Kerr effect based mode-locking and operation thereof
A laser device (100), configured for generating laser pulses, has a laser resonator (10) with a gain disk medium (11) and a Kerr medium (12). The laser resonator (10) includes a first mode shaping section (13) which is adapted for shaping a circulating electric field coupled into the gain disk medium (11), and a second mode shaping section (14), which is adapted for shaping the circulating electric field coupled into the Kerr medium (12) independently of the electric field shaping in the first mode shaping section (13). Furthermore, a method of generating laser pulses (1) using a laser resonator (10) with a gain disk medium (11) and a Kerr medium (12) is described. |
| US09318866B2 |
Sub-wavelength plasmon laser
A plasmonic laser device has resonant nanocavities filled with a gain medium containing an organic dye. The resonant plasmon frequencies of the nanocavities are tuned to align with both the absorption and emission spectra of the dye. Variables in the system include the nature of the dye and the wavelength of its absorption and emission, the wavelength of the pumping radiation, and the resonance frequencies of the nanocavities. In addition the pumping frequency of the dye is selected to be close to the absorption maximum. |
| US09318865B2 |
Vision enhancement illuminators
An illuminator comprising a short-wave infrared (SWIR) laser, a fiber optic, and a lens optic. The fiber optic is coupled to the SWIR laser for mixing the modes of a beam emitted by the SWIR laser. The lens optic is coupled to the fiber optic for shaping the beam into a top-hat beam profile. A method for creating SWIR illumination includes emitting a laser beam with multiple modes from a SWIR laser, transmitting the laser beam through a multi-mode fiber optic, and transmitting the laser beam through a lens optic. Transmitting the laser beam through the multi-mode fiber optic can including mixing modes of the laser beam thereby reducing speckle and constructive and destructive interference in the laser beam. Transmitting the laser beam through the lens optic can include generating a top-hat beam profile. |
| US09318856B2 |
Electrical receptacle connector and electrical plug connector
An electrical receptacle connector provided to connect with an electrical plug connector. The electrical receptacle connector includes a metal shell, an insulation body and a the conductive contact members. The conductive contact members are disposed at the insulation body to connect with the metal shell. The electrical plug connector includes a metal shell and a tubular portion disposed at a front portion of the metal shell. When the electrical plug connector is plugged into the electrical receptacle connector, the surface of the tubular portion of the electrical plug connector is in contact with the conductive contact members. |
| US09318855B2 |
Connector
A connector having a housing is disclosed. The housing of the connector includes a receiving chamber group having four terminal receiving chambers in which a terminal is inserted, and a lance body surrounded by the four terminal receiving chambers. Each of the four terminal receiving chambers is arranged so that each axis thereof is positioned in four vertexes of a square. The lance body integrally has four flexible lances arranged corresponding to each four terminal receiving chambers. Each of the four flexible lances has a locking portion. Further, each the four flexible lances is arranged in a diagonal line so that the free end is bent in a diagonal direction of the square when inserting/extracting the terminal into the terminal receiving chamber and the locking portion is locked or unlocked on the step of the terminal. |
| US09318852B2 |
DC connector with a voltage-stabilizing function
A DC connector with a voltage-stabilizing function has a tube and a wire connected with a noise-resistant filter between the tube and the wire. The tube has an upper cap and a lower opening. The lower opening has an internal terminal for electrical connection when the tube is inserted into a corresponding socket. The upper cap of the tube has a first connecting part. An outer wall of the tube near the upper ring has a second connecting part. The filter has two electrode terminals electrically connecting to the first and second connecting parts, respectively. The first and second connecting parts also electrically connect to the anode and cathode of the wires. Therefore, when an electrical signal is sent from the wire to the first connecting part, the filter provides the functions of filtering noises for stabilizing voltage. |
| US09318850B2 |
Shielding a connector to reduce interference
In an embodiment, a connector such as an edge connector includes a connector housing, a first set of pins configured within the housing and having first ends to couple to corresponding signal lines of a first circuit board and second ends to couple to corresponding signal lines of a mating connector of a second circuit board, and a conductive material adapted to the housing to reduce interference caused by one or more sources of interference. Other embodiments are described and claimed. |
| US09318845B2 |
Charging connector
In the charging connector, in a movement process of a release lever from a start position to a completion position, a holding locking piece moves on a plane surface of the release lever with an urging force of a coil spring, and also an auxiliary locking piece slides over a top point between the plane surface and an inclined surface with an urging force of a coil spring. At the completion position of the release lever, the holding locking piece falls from the plane surface of the release lever to an upper-side locking groove portion with the urging force of the coil spring to be locked on a locking surface, and thus a tip end of the holding locking piece does not come into contact with a bottom surface. |
| US09318844B2 |
Switch assembly of cable connector
The present invention is a switch assembly of cable connector, which comprises a plug having a plug rubber core, a housing, a plurality of pin terminals, a protruding rib and a wire; a plug holder harnessed on the outer edge of the plug rubber core movably; a switching unit joining with the plug holder movably, which is harnessed on the outer edge of the plug rubber core movably, and provided between the housing and the plug holder; and an elastic element harnessed on two ends of the plug rubber core and caught at the housing and the switching unit. Thereby, rotational switching is possible by using the switching unit in conjunction with the elastic element, such that the plug holder may be bonded to different types of sockets, in order to achieve the effects of close locking, detachment prevention, easy assembly, ease to retreat, convenient replacement and maintenance, facile to operate and applicability to at least two different kinds of sockets as the cable connector and a socket are bonded. |
| US09318843B2 |
Rotatable RF connector with coupling nut
An RF connector comprises a coupling nut for locking the connector to a mating connector and a locking ring. When tightening the coupling nut, it pushes on the locking ring, which again pushes on a protrusion of the connector, moving the connector into a mating connector. When the coupling nut is tightened, the locking ring acts as a stop to limit the movement coupling nut leaving a gap between the connector and the mating connector. Due to this gap, the connector may be rotated in a locked state. |
| US09318841B2 |
Connector assembly with chamber block and contact position assurance
A plug type connector is provided with chamber block. The chamber block includes a receiving chamber and a recess that intersects with the receiving chamber. The receiving chamber extends a length of the chamber block and includes a contact securing member with a catch. The recess includes an opening into which the catch protrudes into. |
| US09318840B2 |
Matched high-speed interconnector assembly
An assembly for use in a system comprising a plurality of pairs of conductors, and a plug/receptacle for terminating the cable at a rear end thereof, a plurality of evenly spaced terminal contacts/tines respectively exposed along a front of the plug body/within the receptacle, arranged in parallel, and a printed circuit board assembly comprising a plurality of pairs of traces interconnecting each conductor of the pairs of conductors with respective ones of the terminal contacts/tines. A center pair of the conductors is attached to a first pair of the terminal contacts/tines and a second pair of conductors is attached to a second pair of the terminal contacts/tines. The center pair of terminal contacts/tines is positioned between the second pair of contacts/tines wherein in operation a current flow in the center pair of terminal contacts/tines is in a direction substantially away from the second pair of terminal contacts/tines. |
| US09318835B2 |
Flip-cover receptor connector, and RF plate cable and cable end connector used in conjunction therewith
A flip-cover receptor connector, and a RF (radio frequency) plate cable and a cable end connector used in conjunction therewith are provided. A receptor insulator is provided concavely with a placement space. A metal cover may be forced to rotate pivotally until fastening with the receptor insulator, thereby movement of the RF plate cable or the cable end connector in the placement space of the receptor insulator is restricted. As such, the movement of the RF plate cable or the cable end connector may be restricted, such that it is not easy to leave the placement space of the receptor insulator due to external force impact by fastening the metal cover and the receptor insulator even though height of the flip-cover receptor connector is very small. |
| US09318834B2 |
Linkage mechanism for folding power plug blades
A power plug device includes a casing, a first prong, a second prong, and a linkage mechanism. The first and second prongs are pivotally arranged in a receiving recess of the casing. The linkage mechanism includes a linkage member, a first link, and a second link. A first end of the first link and a first end of the second link are respectively connected to the first and second prongs. A second end of the first link and a second end of the second link are both disposed in a guiding groove of the linkage member. When the first prong rotates, the second end of the first link can move in the guiding groove to drive the second end of the second link through the linkage member to move inversely in the guiding groove, such that the second prong rotates inversely with respect to the first prong. |
| US09318820B2 |
Connector for multi-layered board
A connector for a multilayered board to connect a flat cable to a middle layer of a multilayered board while minimizing the impact due to variations in the dimensional precision and strength of multilayered boards and/or preventing deformation of the multilayered board and improving contact stability. The connector includes a board-side connecting portion and a cable-side connecting portion. The board-side connecting portion includes a column-shaped terminal, and the cable-side connecting portion includes flat terminals. The column-shaped terminal protrudes from the middle layer of the multilayered board in the thickness direction. The flat terminals include resilient contact portions, contacting a side surface portion of the column-shaped terminal from the width direction of the insertion slot in response to insertion of the cable-side connecting portion into the insertion slot. |
| US09318816B2 |
Electric connector and terminal included in the same
There is provided a terminal made of a single metal sheet, the terminal including a support unit in which a core wire of a cable is sandwiched, the support unit including a first portion extensive in a direction perpendicular to a direction in which an axis of the core wire extends, and a second portion spaced away from the first portion, and extensive in a direction perpendicular to a direction in which the axis of the core wire extends, the first and second portions being connected at an end thereof to each other, the first and second portions being formed with a slit thereover, a center line of the slit existing in the first portion and a center line of the slit existing in the second portion deviating from each other when viewed in a direction in which the axis of the core wire extends. |
| US09318815B2 |
Crimp terminal, connection structural body and method for producing the same
An insulating body-forming part is formed on a border between a surface of a crimp terminal formed of an aluminum material and a conductive contact body provided on the surface and containing a nobler metal material than the aluminum material. |
| US09318808B1 |
Configurable electromagnetic reflector
Configurable passive electromagnetic reflectors are disclosed, as are aircraft comprising configurable passive electromagnetic reflectors and methods to use configurable passive electromagnetic reflectors. In one embodiment a system comprises a reflector comprising a surface having a plurality of addressable patches switchable between a reflective state and a non-reflective state, and a controller coupled to the reflector to provide signals to switch the plurality of addressable patches between the non-reflective state and the reflective state to configure the reflector to selectively reflect incident electromagnetic radiation toward a remote target. Other embodiments may be described. |
| US09318806B2 |
Electronic device with balanced-fed satellite communications antennas
An electronic device may include balance-fed antenna structures that do not have direct paths to ground. The antenna structures may serve as a Global Positioning System (GPS) antenna and may have a dipole structure having a first and second antenna resonating element arms. The antenna structures may include a conductive path that conveys antenna signals between a first feed terminal on the first antenna resonating element arm and a transmission line. The conductive path may overlap with the second antenna resonating element arm such that current flow through the conductive path induces corresponding current flow in the second antenna resonating element arm. The antenna structures may include an impedance matching short-circuit stub path that couples the first antenna resonating element arm to the second antenna resonating element arm. Choke inductors may be used to help block indirect paths from the antenna structures to ground through adjacent circuitry. |
| US09318803B2 |
Multimode antenna structure
One or more embodiments are directed to a multimode antenna structure for transmitting and receiving electromagnetic signals in a communications device. The communications device includes circuitry for processing signals communicated to and from the antenna structure. The antenna structure is configured for optimal operation in a given frequency range. The antenna structure includes a plurality of antenna ports operatively coupled to the circuitry, and a plurality of antenna elements, each operatively coupled to a different one of the antenna ports. Each of the plurality of antenna elements is configured to have an electrical length selected to provide optimal operation within the given frequency range. The antenna structure also includes one or more connecting elements electrically connecting the antenna elements such that electrical currents on one antenna element flow to a connected neighboring antenna element and generally bypass the antenna port coupled to the neighboring antenna element. The electrical currents flowing through the one antenna element and the neighboring antenna element are generally equal in magnitude, such that an antenna mode excited by one antenna port is generally electrically isolated from a mode excited by another antenna port at a given desired signal frequency range without the use of a decoupling network connected to the antenna ports, and the antenna structure generates diverse antenna patterns. |
| US09318801B2 |
Dual/wideband termination for hybrid transformer
A wireless device is described. The wireless device includes an antenna. The wireless device also includes a hybrid transformer. The wireless device further includes a frequency matching termination port. The frequency matching termination port provides impedance matching with the antenna at multiple frequencies. The frequency matching termination port may include multiple resistors, inductors and capacitors that can be switched in/out. |
| US09318797B2 |
Electronic device
An electronic device includes a main body, a metal cover, an antenna and a magnetic flux inducer unit. The metal cover is disposed at the main body and the main body includes a nonmetal covered portion. The antenna is disposed in the main body. The magnetic flux inducer unit is disposed in the main body and located between the nonmetal covered portion and the antenna. The permeability of the magnetic flux inducer unit is greater than 1. |
| US09318796B2 |
Multiband antenna
A multiband antenna includes a feed end, a first ground end, a second ground end, a ground path, parasitic member, a first resonating member, and a second resonating member. The ground path is connected between the feed end and the first ground end. The first resonating member operates at a low frequency resonating mode. The second resonating member operates at a high frequency resonating mode. The second resonating member includes a first bent portion and a second bent portion. The first bent portion is coupled with the parasitic member to widen a bandwidth of the second resonating member at the high frequency resonating mode. The second bent portion is coupled with the first resonating member to reduce an electrical length of the first resonating member. |
| US09318795B2 |
Wideband antenna and related radio-frequency device
A wideband antenna is disclosed. The wideband antenna includes a ground element electrically connected to a ground, a feed element for feeding in a Radio-Frequency signal, a radiation element electrically connected to the feed element for radiating the Radio-Frequency signal, and at least one meta-material structure electrically connected between the radiation element and the ground element. |
| US09318791B2 |
Carbon fiber-based chassis components for portable information handling systems
A chassis component of an information handling system may include a chassis main lid component constructed of carbon fiber composite material that supports a lid chassis antenna housing that includes an internal antenna cavity defined therein to create an antenna window for the system. The carbon fiber composite material may be attached to the chassis antenna housing by an interlocking rib that provides sufficient joint strength to allow for a substantially larger and extended chassis antenna housing with larger antenna window that may be spaced further away from the carbon fiber composite material of the chassis main lid component than would otherwise be possible for the same form factor size so as to minimize or substantially eliminate shielding or blocking of wireless signals by the carbon fiber composite material lid component that would result in reduced system wireless performance. |
| US09318785B2 |
Apparatus for reconfiguring an integrated waveguide
Methods and apparatus are disclosed for wirelessly communicating among integrated circuits and/or functional modules within the integrated circuits. A semiconductor device fabrication operation uses a predetermined sequence of photographic and/or chemical processing steps to form one or more functional modules onto a semiconductor substrate. The functional modules are coupled to an integrated waveguide that is formed onto the semiconductor substrate and/or attached thereto to form an integrated circuit. The functional modules communicate with each other as well as to other integrated circuits using a multiple access transmission scheme via the integrated waveguide. One or more integrated circuits may be coupled to an integrated circuit carrier to form Multichip Module. The Multichip Module may be coupled to a semiconductor package to form a packaged integrated circuit. |
| US09318782B2 |
Temperature control device for the temperature control of a battery and method for the production of a temperature control device
A temperature control device is provided for the temperature control of a battery. The temperature control device has an upper part with an upper side and an underside, which has on the upper side a thermal interface to the battery. Furthermore, the temperature control device has at least one lower part, which has an embossed structure in order to embody a sealing edge and to embody a cavity for guiding temperature control fluid. The sealing edge is arranged on an upper side of the lower part, and is connectable to the underside of the upper part in a fluid-tight manner. |
| US09318779B2 |
Electric energy storage units connected in series and selectively charged/discharged via a balancing circuit or directly from a charger or to a load
An electric energy storage system is designed to equally utilize electric energy storage banks during charging/discharging, and keep fluctuation of an input voltage from a charger or an output voltage to a load, within an arbitrary range, while equally utilizing the electric energy storage banks during charging/discharging. The electric energy storage system comprises an electric energy storage module, a charger, a balancing circuit, a voltage detection section, taps led out, respectively, from one of opposite terminals of the electric energy storage module and/or the other terminal of the electric energy storage module and/or one or more of series-connection points between the electric energy storage units, through respective switches, and a switch control section for switching the switches such that one of the taps is connected to one of opposite terminals of the charger. The switch control section is operable to sequentially switch the switches according to progress of the charging. |
| US09318778B2 |
Systems and methods for battery system temperature estimation
System and methods for estimating a temperature of a battery are presented. In some embodiments, a method of estimating a temperature of a battery system may utilize measured battery system temperature data and measured ambient temperature data. Based on the measured temperature data, an average estimated temperature of the battery system may be determined using, at least in part, an extended Kalman filter and an energy balance process model associated with the battery system. |
| US09318775B2 |
Magnesium borohydride and its derivatives as magnesium ion transfer media
An electrolyte for a magnesium battery includes a magnesium salt having the formula MgBxHy where x=11-12 and y=11-12. The electrolyte also includes a solvent, the magnesium salt being dissolved in the solvent. Various solvents including aprotic solvents and molten salts such as ionic liquids may be utilized. |
| US09318768B2 |
Shovel
An upper rotating body is rotatably attached to a lower traveling body. An electricity storage module is mounted on the upper rotating body. The electricity storage module includes a plurality of electricity storage cells each having at least a pair of electrodes led out from the edges of a plate-like portion. The electricity storage cells are stacked in the thickness direction of the plate-like portions, and are connected in series by bringing the electrodes of the electricity storage cells adjacent to each other in the stack direction into contact with each other. At least some of the electrode pairs, each of which is comprised of a pair of electrodes in contact with each other, each have a bridge structure having the electrodes bent in a direction in which the electrodes approach each other and also having the outer surface of one electrode and the inner surface of the other electrode in contact with each other. |
| US09318767B2 |
Laminate assembly sealing method and arrangement
An example laminate assembly pressurization arrangement includes a plurality of laminations arranged in a laminate stack. The plurality of laminations are movable between sealed positions and unsealed positions relative to each other. An end plate is adjacent the laminate stack. A housing is configured to establish a first volume together with the end plate. A first group of tie rods is directly secured to the end plate and is configured to move the end plate to a first position that holds the plurality of laminations in sealed positions. A second group of tie rods is directly secured to the housing. Pressurizing the first volume limits movement of the end plate away from the first position. |
| US09318765B2 |
Solid electrolyte membrane, fuel battery cell, and fuel battery
Provided are a solid electrolyte membrane useful in achieving strong electromotive force in a fuel battery, and a fuel battery cell produced with this membrane. The solid electrolyte membrane includes a substrate made of a sheet material and having a plurality of openings penetrating the substrate in its thickness direction, and a solid electrolyte layer provided on at least one of the faces of the substrate. The fuel battery cell includes a solid electrolyte membrane having the solid electrolyte layer on one of the faces of the substrate, and a catalyst layer containing a precious metal and provided on the other of the faces of the substrate, with the solid electrolyte layer and the catalyst layer being in contact with each other in the openings of the substrate. |
| US09318760B2 |
Fuel cell and method of operating fuel cell
In a method of operating a fuel cell, a voltage difference between voltages of a first unit cell and a second unit cell is detected. Whether the voltage difference is out of a predetermined range is determined. If the voltage difference is determined to be out of the predetermined range, humidity of a first reactant gas before being supplied to a first reactant gas passage is adjusted or humidity of a second reactant gas before being supplied to a second reactant gas passage is adjusted. The first reactant gas passage is provided in a first separator. The first reactant gas is to be supplied to one of first electrodes through the first reactant gas passage. The second reactant gas is to be supplied to another of the first electrodes through the second reactant gas passage. |
| US09318752B2 |
Apparatus for insulating exposed charging part of fuel cell stack
An apparatus for insulating a plurality of exposed live parts of a fuel cell stack, includes a plurality of protectors. Each of the plurality of protectors is made of an insulating material and configured to insulate a corresponding one of the plurality of exposed live parts to which a corresponding one of current collector terminals disposed in an end plate of the fuel cell stack and a corresponding one of connections of a busbar are connected. |
| US09318750B2 |
Gas cell manufacturing apparatus
A manufacturer of gas cells performs an arrangement process of arranging solid substances at positions corresponding to holes each of which is provided on each of a plurality of cells. Then, the manufacturer of the gas cells performs an accommodation process of accommodating gas in inner spaces of the cells through an air flow path connected to the holes. Further, the manufacturer of the gas cells performs a sealing process of sealing the spaces by melting the solid substances to close the holes corresponding to the solid substances. |
| US09318749B2 |
Process for producing catalyst carrier, process for producing composite catalyst, composite catalyst, and fuel cell using same
A catalyst carrier production process includes a step (a) of mixing a transition metal compound (1), a nitrogen-containing organic compound (2), and a solvent to provide a catalyst carrier precursor solution; a step (b) of removing the solvent from the catalyst carrier precursor solution; and a step (c) of the thermally treating a solid residue obtained in the step (b) at a temperature of 500 to 1100° C. to provide a catalyst carrier; wherein the transition metal compound (1) is partly or wholly a compound including a transition metal element (M1) selected from the group 4 and 5 elements of the periodic table as a transition metal element; and at least one of the transition metal compound (1) and the nitrogen-containing organic compound (2) includes an oxygen atom. |
| US09318748B2 |
Bipolar electrochemical Li-ion battery having increased capacity
A bipolar lithium-ion electrochemical battery having increased capacity. |
| US09318747B2 |
Electrode and power storage device comprising said electrode
This electrode is provided with a thin metal sheet and an active substance layer containing, on the surface of the thin metal sheet, multiple active substance particles of a prescribed average particle diameter. The surface of the thin metal sheet includes a forming region where the active substance layer is located. In the forming region, the thin metal sheet has a depressed section in the surface. A portion of the active substance particles is present in at least a part of the depression, and the average distance between the centers of two neighboring particles of these active substance particles present in at least a part of the depression is 60-98% of the aforementioned average particle diameter. |
| US09318746B2 |
Positive electrode having current collector with carbon layer for rechargeable lithium battery and rechargeable lithium battery including same
Disclosed are a positive electrode for a rechargeable lithium battery and a rechargeable lithium battery including the same, and the positive electrode includes a current collector including a carbon layer disposed on a substrate; and a positive active material layer disposed on the current collector, wherein the carbon layer has a loading level of 0.5 g/m2 to 3 g/m2. The effects of the carbon layer include improving the high power characteristics and the power density by decreasing the internal resistance of an electrode, and to improve the power density by providing uniform current to the positive electrode. The carbon layer may have a thickness of about 1 μm to about 2 μm. The carbon layer may include a carbon-based material of artificial graphite, natural graphite, carbon black, acetylene black, ketjen black, denka black, or combinations thereof. |
| US09318745B2 |
Conductive agent for nonaqueous electrolyte secondary battery, positive electrode for nonaqueous electrolyte secondary battery, and nonaqueous electrolyte secondary battery
To provide a conductive agent for a nonaqueous electrolyte secondary battery and the like, in which oxidative decomposition reaction of an electrolyte is sufficiently suppressed during charging and discharging under high-temperature, high-voltage conditions and thus the cycle characteristics under these conditions are improved.A conductive agent main body composed of carbon and a compound attached to a surface of the conductive agent main body are contained. The average particle size of primary particles or secondary particles of the conductive agent main body is larger than the average particle size of the compound and the compound contains at least one metal element selected from the group consisting of aluminum, zirconium, magnesium, and a rare earth element. |
| US09318744B2 |
Polymer electrode for lithium secondary battery including the polymer and lithium second battery employing the electrode
A polymer includes a first repeating unit having a cationic group and a second repeating unit having an anionic group. The polymer may further include a third repeating unit having a non-ionic group. The polymer may include first and second polymers, each of which includes a first repeating having a cationic group and a second repeating unit having an anionic group. The cationic group of the first polymer may form an intermolecular bond with the anionic group of the second polymer, and the anionic group of the first polymer may form an intermolecular bond with the cationic group of the second polymer. An electrode for a lithium secondary battery includes the polymer, and a lithium secondary battery employs the electrode. |
| US09318743B2 |
Binder for electrode of lithium rechargeable battery and electrode for rechargeable battery comprising the same
In one aspect, a binder for an electrode of a lithium rechargeable battery, which increases adhesion between the electrode and an active material by saving characteristics of two monomers by grafting an acryl group to a vinyl alcohol group, and an electrode for a rechargeable battery comprising the same are provided. The electrode can improve charge and discharge cycle life characteristics of the rechargeable battery. |
| US09318741B2 |
Positive electrode active material of power storage device, power storage device, electrically propelled vehicle, and method for manufacturing power storage device
An object is to improve the characteristics of a power storage device such as a charging and discharging rate or a charge and discharge capacity. The grain size of particles of a positive electrode active material is nano-sized so that a surface area per unit mass of the active material is increased. Specifically, the grain size is set to greater than or equal to 10 nm and less than or equal to 100 nm, preferably greater than or equal to 20 nm and less than or equal to 60 nm. Alternatively, the surface area per unit mass is set to 10 m2/g or more, preferably 20 m2/g or more. Further, the crystallinity of the active material is increased by setting an XRD half width to greater than or equal to 0.12° and less than 0.17°, preferably greater than or equal to 0.13° and less than 0.16°. |
| US09318737B2 |
Negative electrode material for non-aqueous electrolyte secondary battery, negative electrode active material for non-aqueous electrolyte secondary battery, and non-aqueous electrolyte secondary battery
There is provided a negative electrode material for non-aqueous electrolyte secondary batteries, the negative electrode material being a silicon oxide represented by the composition formula, SiOx, containing silicon and silicon oxide, in which x satisfies the relation of 0.1≦x≦0.8; the silicon oxide contains crystalline silicon; among the particles of crystalline silicon having a diameter of 1 nm or greater, the proportion by number of particles having a diameter of 100 nm or less is 90% or greater; and the BET specific surface area of the silicon oxide is larger than 100 m2/g. |
| US09318734B2 |
Bimetal buss bar assembly
A bimetal buss bar assembly includes a positive battery cell terminal having a flat pad, a negative battery cell terminal having a flat pad, and a buss bar having a negative end and a positive end. The buss bar is attached to the positive battery cell terminal at the positive end and attached to the negative battery cell terminal at the negative end. At least one of the positive battery cell terminal, negative battery cell terminal, and buss bar have a bimetal interface. |
| US09318729B2 |
Power tool battery pack
A power tool battery pack includes a lower side case, an upper side case fixed to the lower side case, a battery cell in the lower side case and a circuit board connected to the battery cell. A plurality of electrical signal terminals are arranged in parallel on the circuit board, and the circuit board includes at least one slit between adjacent pairs of the plurality of signal terminals to make it difficult for any water that reaches the circuit board to electrically short two of the signal terminals together. Alternately or in addition, a wall structure may be provided between the terminals for reducing the likelihood that water reaching one of the signal terminals will be able to electrically connect two of the signal terminals. |
| US09318727B2 |
Organic light-emitting device having a matrix material embedded with heat conducting particles
Various embodiments relates to an organic light-emitting device, including at least one functional layer for generating electroluminescent radiation, an encapsulation structure formed on or over the at least one functional layer, and a heat conduction layer formed on or over the encapsulation structure. The heat conduction layer includes a matrix material and heat conducting particles embedded in the matrix material. |
| US09318722B2 |
Method for producing organic light-emitting element, organic display panel, organic light-emitting device, method for forming functional layer, ink, substrate, organic light-emitting element, organic display device, and inkjet device
A method of efficiently manufacturing an organic light-emitting element with excellent light-emitting characteristics is provided. The method includes: preparing ink and filling an inkjet device having an ink ejection nozzle with the ink; preparing a substrate having a base layer including a first electrode; positioning the inkjet device above the substrate; and causing the inkjet device to eject a drop of the ink onto the base layer. In the preparation of the ink, a value Z denoting a reciprocal of the Ohnesorge number Oh determined by density ρ (g/dm3), surface tension γ (mN/m), and viscosity η (mPa·s) of the ink and a diameter r (mm) of the ink ejection nozzle satisfies Formula 1, in the ejection of the drop of the ink, speed V (m/s) of the ejected drop satisfies Formula 2, and the value Z and the speed V (m/s) satisfy Formula 3. |
| US09318720B2 |
Photoelectric conversion device and method for producing the same
Provided is a photoelectric conversion device which includes a positive electrode, a negative electrode, a photoelectric conversion layer including poly-[N-9″-heptadecanyl-2,7-carbazole-alt-5,5-(4′,7′-di-2-thienyl-2′,1′,3′-benzothiadiazole)] as a p-type organic semiconductor material and fullerene or a fullerene derivative as an n-type organic semiconductor material; and a buffer layer, provided between the positive electrode and the photoelectric conversion layer, including MoO3, in which device the proportion of the p-type organic semiconductor material in a first region being in contact with the buffer layer in the photoelectric conversion layer is higher than the proportion of the p-type organic semiconductor material in the entirety of the photoelectric conversion layer, and the proportion of the p-type organic semiconductor material in a second region on the negative electrode side than the first region in the photoelectric conversion layer is lower than the proportion of the p-type organic semiconductor material in the entirety of the photoelectric conversion layer. |
| US09318719B2 |
Method of producing organic photoelectric conversion device
A method for producing an organic photoelectric conversion device, including a step of forming an anode, a step of forming an active layer on the above-described anode, a step of forming an oxide layer comprising a zinc oxide doped with at least one metal selected from the group consisting of gallium, aluminum, indium and boron on the above-described active layer, and a step of forming a cathode on the above-described oxide layer by a vacuum film formation method. |
| US09318717B1 |
Semi-conductor device with programmable response
An apparatus with a programmable response includes a semi-conductor device with a junction formed thereon, the junction having a built-in potential, a quantum well element proximate to the junction that provides an energy well within a depletion region of the junction. The energy well comprises one or more donor energy states that support electron trapping, and/or one or more acceptor energy states that support hole trapping; thereby modulating the built-in potential of the junction. The semi-conductor device may be a diode, a bipolar diode, a transistor, or the like. A corresponding method is also disclosed herein. |
| US09318708B2 |
Hole transport material for organic electroluminescence device and organic electroluminescence device comprising the same
A hole transport material for an organic electroluminescence device, the hole transport material being represented by the following Formula 1, |
| US09318706B2 |
Laminated structure, method for producing same, and electronic element comprising same
A laminated structure comprising an electrode, a polymer binding layer arranged on the electrode, and an electrically conductive organic material layer arranged on the polymer binding layer, wherein the polymer binding layer comprises an aromatic polymeric compound which has a structure represented by formula (I) [wherein Ar represents a conjugated divalent group which may have a substituent, provided that when there are multiple Ar's, the Ar's may be the same as or different from each other; and n represents an integer of 1 or greater] and has a number average molecular weight of 1×103 to 1×108 inclusive in terms of polystyrene content, the polymer binding layer is bonded to the electrode via a chemical bond between the aromatic polymeric compound and the surface of the electrode, and an electrically conductive organic material that composes a layer included in the electrically conductive organic material layer and arranged adjacent to the polymer binding layer has a number average molecular weight of 3×102 to 1×108 inclusive in terms of polystyrene content. |
| US09318703B2 |
Resistive random access memory and method for manufacturing the same
A resistive random access memory (RRAM) including a substrate, a dielectric layer, memory cells and an interconnect structure is provided. The dielectric layer is disposed on the substrate. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first electrode, a second electrode and a variable resistance structure. The second electrode is disposed on the first electrode. The variable resistance structure is disposed between the first electrode and the second electrode. In two vertically adjacent memory cells, the first electrode of the upper memory cell and the second electrode of the lower memory cell are disposed between the adjacent variable resistance structures and isolated from each other. The interconnect structure is disposed in the dielectric layer and connects the first electrodes of the memory cells. |
| US09318702B2 |
Resistive memory cell having a reduced conductive path area
A method of forming a resistive memory cell, e.g., a CBRAM or ReRAM, may include forming a bottom electrode layer, oxidizing an exposed region of the bottom electrode layer to form an oxide region, removing a region of the bottom electrode layer proximate the oxide region, thereby forming a bottom electrode having a pointed tip region adjacent the oxide region, and forming an electrolyte region and top electrode over at least a portion of the bottom electrode and oxide region, such that the electrolyte region is arranged between the pointed tip region of the bottom electrode and the top electrode, and provides a path for conductive filament or vacancy chain formation from the pointed tip region of the bottom electrode to the top electrode when a voltage bias is applied to the memory cell. A memory cell and memory cell array formed by such method are also disclosed. |
| US09318701B2 |
Low voltage embedded memory having cationic-based conductive oxide element
Low voltage embedded memory having cationic-based conductive oxide elements is described. For example, a material layer stack for a memory element includes a first conductive electrode. A cationic-based conductive oxide layer is disposed on the first conductive electrode. The cationic-based conductive oxide layer has a plurality of cation vacancies therein. A second electrode is disposed on the cationic-based conductive oxide layer. |
| US09318698B2 |
Spin transfer torque cell for magnetic random access memory
Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via. |
| US09318697B2 |
Methods of detecting an etch by-product and methods of manufacturing a magnetoresistive random access memory device using the same
In a method of detecting an etch by-product, the method including forming a magnetic layer including palladium (Pd) on a substrate; etching the magnetic layer to form a magnetic layer pattern; depositing a mixture including an alkyl bromide compound on a surface of the magnetic layer pattern; and measuring a current difference between the substrate and the mixture to detect an etch by-product on the surface of the magnetic layer pattern. |
| US09318692B1 |
Self-limited crack etch to prevent device shorting
A semiconductor device includes a piezoelectric layer interposed between a first metal layer and a hardmask layer. A first trench extends through the hardmask layer, the piezoelectric layer and the first metal layer. A self-limiting second trench extends through the hardmask layer and the piezoelectric layer without reaching the first metal layer. |
| US09318688B2 |
Piezoelectric vibration element, piezoelectric vibration device, and portable terminal
A piezoelectric vibration element capable of reducing occurrence of unnecessary vibration, and a piezoelectric vibration device and a portable terminal using the same are disclosed. The piezoelectric vibration element includes a plurality of electrode layers and a plurality of piezoelectric layers being stacked along a first direction, the piezoelectric vibration element having two surfaces that face each other to be at intervals in the first direction, and vibrating in bending mode in the first direction with an amplitude varying along a second direction perpendicular to the first direction according to input of an electric signal, one of the two surfaces having such a shape that a central portion thereof in a third direction perpendicular to the first direction and the second direction protrudes as compared with opposite end portions thereof in the third direction. |
| US09318686B2 |
Driver device and driving method for driving a capacitive load, in particular an ultrasound transducer
The present invention relates to a driver device (40; 60) for driving a capacitive load (12), in particular an ultrasound transducer (12) having one or more transducer elements, comprising an output terminal (42; 68) for providing an alternating drive voltage (V14; V22) to the load (12), a plurality of voltage supply elements (46, 48, 50, 52; 72, 74) for providing intermediate voltage levels (V16), a plurality of controllable connecting means (S0-S7) each associated to one of the voltage supply elements (46, 48, 50, 52; 72, 74) for connecting the voltage supply elements (46, 48, 50, 52; 72, 74) to the output terminal (42; 68) and for supplying one of the intermediate voltage levels (V16) or a sum of a plurality of the intermediate voltage levels (V16) as the alternating drive voltage (V14; V22) to the output terminal. |
| US09318685B2 |
Method for producing a superconductive element
The invention relates to a method for producing a superconductive element to be used as a wire-in-channel superconductor in magnetic resonance imaging (MRI) and in nuclear magnetic resonance (NMR) applications, which superconductive element contains a superconductive wire and a copper component having a longitudinal groove and the superconductive wire being positioned in the groove. In order to produce the wire-in-channel superconductive element by a mechanical contact between the superconductive wire and a wall of the groove in the copper component, at least one contact surface is coated with a lead free solder material before having the mechanical contact. In order to enhance the thermal and electrical conduction and to create a bond between the said components the soldering material is fused in annealing process step. |
| US09318683B2 |
Thermoelectric module for a thermoelectric generator of a vehicle and vehicle having thermoelectric modules
A thermoelectric module includes an inner circumferential surface, an axis and an outer circumferential surface. A plurality of semiconductor elements is disposed with thermoelectric material in the direction of the axis and between the inner circumferential surface and the outer circumferential surface and are electrically interconnected in an alternating manner. At least one part of the semiconductor elements has at least one inner frame part or an outer frame part. At least some of the inner frame parts form an interrupted inner circumferential surface or outer frame parts form an interrupted outer circumferential surface. |
| US09318682B2 |
Modular thermoelectric units for heat recovery systems and methods thereof
Apparatus and method for generating electricity. The apparatus includes one or more first components configured to extract heat from at least a first fluid flow at a first temperature to one or more devices configured to convert thermal energy to electric energy. The first fluid flow is in a first direction. Additionally, the apparatus includes one or more second components configured to transfer heat from the one or more devices to at least a second fluid flow at a second temperature. The second temperature is lower than the first temperature, and the second fluid flow is in a second direction. Each first part of the first fluid flow corresponds to a first shortest distance to the one or more devices, and the first shortest distance is less than half the square root of the total free flow area for a corresponding first cross-section of the first fluid flow. |
| US09318676B2 |
Light emitting device and methods for forming the same
The present invention provides a light emitting device, which comprises an epitaxial stack structure, a II/V group compound contact layer directly formed on the epitaxial stack structure, a protrusion or recess type structure directly formed on the II/V group compound contact layer, and a conductive layer covering the protrusion or recess type structure. |
| US09318674B2 |
Submount-free light emitting diode (LED) components and methods of fabricating same
Light emitting devices include a Light Emitting Diode (LED) chip having an anode contact and a cathode contact on a face thereof. A solder mask extends from the gap between the contacts onto one or both of the contacts. The LED chip may be mounted on a printed circuit board without an intervening submount. Related fabrication methods are also described. |
| US09318673B2 |
Light-emitting diode and light-emitting diode lamp
The present invention relates to a light-emitting diode which has an emission wavelength of 655 nm or more, excellent monochromatic properties, high output, high luminance, high efficiency and fast response time, has such a characteristic that the intensity of light emitted from a light extraction surface and traveling in a direction perpendicular to the light extraction surface has high directivity, and can release heat to the outside with high efficiency; and a light-emitting diode lamp. The light-emitting diode includes a compound semiconductor layer (11) which includes at least a pn-junction-type light-emitting section (3) and a strain adjustment layer (13) laminated on the light-emitting section (3); wherein the light-emitting section (3) has a laminated structure composed of a strained light-emitting layer having a composition formula (AlXGa1-X)YIn1-YP (0≦X≦0.1, 0.37≦Y≦0.46) and a barrier layer, wherein the strain adjustment layer (13) can be penetrated by light from the light-emitting section (3) and has a smaller lattice constant than those of the strained light-emitting layer and the barrier layer; and wherein a functional substrate (5) is bonded to a surface (11b) of the compound semiconductor layer (11) which is located on the opposite side with respect to the light extraction surface (11a) through a reflective structure (4). |
| US09318672B2 |
Leadframe LED lighting assembly
A lighting assembly and a lamp for a motor vehicle are described. A leadframe 14 out of a metal sheet material comprises a first part 14c and a second part 14b not directly electrically connected. An LED element 16 is fixed to the leadframe 14. A first contact part 24a is connected to the first leadframe part 14c and a second contact part 24b is connected to the second leadframe part 14b. The LED element 16 is disposed to emit light when operated. In order to achieve a desired directed emission of light in a simple way, the leadframe 14 comprises a light direction section 20a,20b including a reflective surface 30a,30b arrange to reflect the light emitted from the LED element 16. |
| US09318670B2 |
Materials for photoluminescence wavelength converted solid-state light emitting devices and arrangements
A photoluminescence material paste comprises: a first inorganic photoluminescence material having a first density, a second inorganic photoluminescence material having a second density and a light transmissive non-curable silicone fluid that is not curable by itself. The first density of the first inorganic photoluminescence material is different from the second density of the second inorganic photoluminescence material. The first and second inorganic photoluminescence materials are substantially homogenously distributed within the light transmissive non-curable silicone fluid to form the photoluminescence material paste. A weight loading of the first and second photoluminescence materials in the photoluminescence material paste is in a range of about 60% to about 95%. |
| US09318669B2 |
Methods of determining and making red nitride compositions
Provided according to embodiments of the invention are methods of making a Ca1-x-ySrxEuyAlSiN3 phosphor composition that include selecting a Color Rendering Index (CRI) R9 value, determining an Eu concentration based on predetermined values to obtain the selected CRI R9 value and making the Ca1-x-ySrxEuyAlSiN3 phosphor having the determined Eu concentration. Also provided are methods for determining concentrations of Eu in a Ca1-x-ySrxEuyAlSiN3 phosphor that will achieve a CRI R9 value. Related computer products are also disclosed. |
| US09318667B2 |
Method for producing a light-emitting diode and light-emitting diode
A method of producing a light-emitting diode includes providing at least one light-emitting diode chip, providing a suspension comprising a solvent and particles of at least one luminescent material, arranging the at least one light-emitting diode chip in the suspension, electrophoretically depositing the particles on an outer face of the at least one light-emitting diode chip, and completing the light-emitting diode. |
| US09318658B2 |
Method for manufacturing red phosphor
Provided is a process for producing a red phosphor, said process achieving enhanced productivity. Also provided are: a red phosphor having excellent luminescence characteristics; and a white light source, a lighting system, and a liquid crystal display device, using the red phosphor. This process comprises: mixing an A-containing compound, a nitrogen-free europium source, a silicon-containing compound, an aluminum-containing compound and a carbon-containing reducing agent so as to form a mixture wherein the atomic ratio among A, europium (Eu), silicon (Si), aluminum (Al) and carbon (C) is a value represented by compositional formula (1); firing the mixture; and pulverizing the fired mixture. (Am−xEux)Aly(Si1−zCz)90 nN[12+y−2(n−m)/3] (1) [wherein A is at least one element selected from among magnesium (Mg), calcium (Ca), strontium (Sr) and barium (Ba), and m, x, z and n satisfy the relationships: 3. |
| US09318654B2 |
Light-emitting display device and electronic device including the same
An object is to provide a light-emitting display device in which a pixel including a thin film transistor using an oxide semiconductor has a high aperture ratio. The light-emitting display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wiring functioning as a scan line. The thin film transistor includes an oxide semiconductor layer over the first wiring with a gate insulating film therebetween. The oxide semiconductor layer is extended beyond the edge of a region where the first wiring is provided. The light-emitting element and the oxide semiconductor layer overlap with each other. |
| US09318652B1 |
Ultraviolet light emitting diode structures and methods of manufacturing the same
Semiconductor structures involving multiple quantum wells provide increased efficiency of UV and visible light emitting diodes (LEDs) and other emitter devices, particularly at high driving current. LEDs made with the new designs have reduced efficiency droop under high current injection and increased overall external quantum efficiency. The active region of the devices includes separation layers configured between the well layers, the one or more separation regions being configured to have a first mode to act as one or more barrier regions separating a plurality of carriers in a quantum confined mode in each of the quantum wells being provided on each side of the one or more separation layers and a second mode to cause spreading of the plurality of carriers across each of the quantum wells to increase an overlap integral of all of the plurality of carriers. The devices and methods of the invention provide improved efficiency for solid state lighting, including high efficiency ultraviolet LEDs. |
| US09318649B2 |
Multi-wavelength LED curing lamp
A curing device may comprise a first array of LED's, each LED of the first array emitting radiation substantially centered at a first excitation wavelength onto a quantum dot layer, the quantum dot layer positioned above the first array of LED's and configured to partially absorb the first excitation wavelength radiation and down convert the absorbed first excitation wavelength radiation, and partially transmit the emitted first excitation wavelength radiation, wherein the down converted and the partially transmitted first excitation wavelength radiation are directed onto a radiation-curable workpiece. |
| US09318646B2 |
LED device manufacturing method and fluorescent material-dispersed solution used in same
The present invention addresses the problem of providing an LED device having no color unevenness in light emission. In order to solve the problem, this LED device manufacturing method includes: a step of providing an LED chip-mounted package; a step of film-forming a fluorescent material layer by applying a fluorescent material-dispersed solution to a emission surface of the LED chip, said fluorescent material-dispersed solution containing a solvent, a fluorescent material, clay minerals and porous inorganic particles, and by drying the fluorescent material-dispersed solution; and a step of film-forming a wavelength conversion section by applying, to the fluorescent material layer, a precursor solution having a precursor of a light transmissive ceramic dispersed in a solvent, and by firing the layer, said wavelength conversion section being composed of a light transmissive ceramic layer having the fluorescent material, the clay minerals and the porous inorganic particles dispersed therein. |
| US09318645B2 |
Nitride semiconductor light-emitting element
A nitride semiconductor light-emitting element includes a second light-emitting layer, a third barrier layer, and a first light-emitting layer from a side close to a p-type nitride semiconductor layer. The first light-emitting layer includes a plurality of first quantum well layers and a first barrier layer provided between the plurality of first quantum well layers. The second light-emitting layer includes a plurality of second quantum well layers and a second barrier layer provided between the plurality of second quantum well layers. The second quantum well layers include a multiple quantum well light-emitting layer thicker than the first quantum well layers. |
| US09318637B2 |
Solar cell with improved conversion efficiency
Solar cells exhibiting improved conversion efficiency are disclosed. Particularly, multi-pn junction solar cells that contain a current spreading layer as well as concentrating photovoltaic modules that include such a solar cell and light concentrating optics are disclosed. The multi-pn junctions in question may generally be made up of III-V semiconductor materials, while the current spreading layer may generally be made up of II-VI semiconductor materials. |
| US09318635B2 |
Automatic solar tracking adjustment/control apparatus of solar generation system
An automatic solar tracking adjustment/control apparatus of solar generation system includes a support assembly, a two-dimensionally movable pivotal rotational assembly disposed on the support assembly, a solar generation module disposed on the support assembly via the pivotal rotational assembly and at least one drive assembly disposed between the support assembly and the solar generation module. The drive assembly drives the solar generation module to tilt in different directions and angles according to reference parameters in a control unit. A detection/correction module is disposed on the solar generation module for detecting actual parameters of the solar generation module. The control unit compares the actual parameters with the reference parameters to modify the output of the drive assembly so as to adjust the tilting direction and inclination angle of the solar generation module. |
| US09318633B2 |
Photodetector with controllable spectral response
A photodetector includes a semiconductor substrate having an irradiation zone configured to generate charge carriers having opposite charge carrier types in response to an irradiation of the semiconductor substrate. The photodetector further includes an inversion zone generator configured to operate in at least two operating states to generate different inversion zones within the substrate, wherein a first inversion zone generated in a first operating state differs from a second inversion zone generated in a second operating state, and wherein the first inversion zone and the second inversion zone have different extensions in the semiconductor substrate. A corresponding method for manufacturing a photodetector and a method for determining a spectral characteristic of an irradiation are also described. |
| US09318631B2 |
Photodiode and method for making the same
A method for manufacturing a photodiode including the steps of providing a substrate, solution depositing a quantum nanomaterial layer onto the substrate, the quantum nanomaterial layer including a number of quantum nanomaterials having a ligand coating, and applying a thin-film oxide layer over the quantum nanomaterial layer. |
| US09318626B2 |
Boron nitride anti-reflection coatings and methods
High performance photovoltaic devices are provided. Certain embodiments relate to the use of Boron-Nitride (BN) thin films as anti-reflection coating (ARC) material on Si and GaAs solar cells. A low and wide reflectance window covering a large energy range of the solar spectrum is available. For a large part of the useful solar spectrum, the index of refraction of the grown BN thin films remains constant at about 2.8. In another embodiment, a BN ARC is applied directly on ordinary window glass providing the device's mechanical strength. |
| US09318620B2 |
Folded conical inductor
A semiconductor inductor structure may include a first spiral structure, located on a first metal layer, having a first outer-spiral electrically conductive track and a first inner-spiral electrically conductive track separated from the first outer-spiral electrically conductive track by a first dielectric material. A second spiral structure, located on a second metal layer, having a second outer-spiral electrically conductive track and a second inner-spiral electrically conductive track separated from the second outer-spiral electrically conductive track by a second dielectric material may also be provided. The first outer-spiral electrically conductive track may be electrically coupled to the second outer-spiral electrically conductive track and the first inner-spiral electrically conductive track may be electrically coupled to the second inner-spiral electrically conductive track. The first outer-spiral conductive track is laterally offset relative to the second outer-spiral conductive track and the first inner-spiral conductive track is laterally offset relative to the second inner-spiral conductive track. |
| US09318615B2 |
Semiconductor device and method for fabricating semiconductor device
A semiconductor device according to an embodiment includes a gate electrode, a first dielectric film, an oxide semiconductor film, a second dielectric film, a source electrode and a drain electrode. The first dielectric film is placed above the gate electrode. The oxide semiconductor film is placed above the first dielectric film. The oxide semiconductor film is formed to have a film thickness in a first contact region in contact with the source electrode and a second contact region in contact with the drain electrode larger than a film thickness in a channel region of the oxide semiconductor film so that a film portion of the first contact region projects toward the source electrode side and a film portion of the second contact region projects toward the drain electrode side. |
| US09318614B2 |
Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption
A method of fabricating MOTFTs includes positioning opaque gate metal on a transparent substrate, depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Etch stop material is deposited on the semiconductor material. Photoresist defines an isolation area in the semiconductor material. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas. |
| US09318612B2 |
Array substrate and method of fabricating the same
An array substrate includes: a substrate; a thin film transistor including a gate electrode, an oxide semiconductor layer and source and drain electrodes, wherein a first insulating layer of an inorganic insulating material is disposed between the gate electrode and the oxide semiconductor layer, and wherein a second insulating layer of an inorganic insulating material is disposed between the oxide semiconductor layer and the source and drain electrodes; a passivation layer on the thin film transistor; a first electrode on the passivation layer in the pixel region; and a first hydrogen absorbing layer on at least one of top and bottom surfaces of the first insulating layer, top and bottom surfaces of the second insulating layer and top and bottom surfaces of the passivation layer, the first hydrogen absorbing layer including plurality of particles spaced apart from each other and including one of nickel, palladium and platinum. |
| US09318609B2 |
Semiconductor device with epitaxial structure
A semiconductor device includes a fin structure, an isolation structure, a gate structure and an epitaxial structure. The fin structure protrudes from the surface of the substrate and includes a top surface and two sidewalls. The isolation structure surrounds the fin structure. The gate structure overlays the top surface and the two sidewalls of a portion of the fin structure, and covers a portion of the isolation structure. The isolation structure under the gate structure has a first top surface, and the isolation structure at two sides of the gate structure has a second top surface. The first top surface is higher than the second top surface. The epitaxial layer is disposed at one side of the gate structure and is in direct contact with the fin structure. |
| US09318604B2 |
Semiconductor device including a gate electrode
A semiconductor device includes a plurality of first gate electrodes buried in a semiconductor substrate including an active region and a device isolation film, a plurality of junction regions including storage node junction regions and a bit line junction region disposed between the storage node junction regions, a plurality of storage node contact plugs respectively disposed over and coupled to the storage node junction regions, a plurality of storage nodes respectively disposed over and coupled to the storage node contact plugs, and a second gate electrode disposed over a sidewall of a corresponding one of the storage node contact plugs. A vertical transistor includes the second gate electrode and the corresponding storage node contact plug and stores charges leaked from a corresponding one of the storage nodes. |
| US09318602B2 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device according to one embodiment includes a semiconductor substrate, a back-gate layer formed above the semiconductor substrate, and a stacked body formed above the back-gate layer and comprising a plurality of insulating layers alternately formed between a plurality of electrode layers. The lowermost electrode layer of the plurality of electrode layers contains metal, and remaining electrode layers of the plurality of electrode layers other than the lowermost electrode layer do not contain the metal. Furthermore, the semiconductor device includes a pair of columnar semiconductor layers penetrating the stacked body and a semiconductor layer connecting lower portions of the pair of columnar semiconductor layers, the semiconductor layer embedded in the surface of the back-gate layer. |
| US09318600B2 |
Silicon carbide semiconductor device and method for manufacturing same
This silicon carbide semiconductor device includes: a substrate with a principal surface; a silicon carbide layer which is arranged on a side of the principal surface of the substrate and which includes a first impurity region of a first conductivity type; a trench which is arranged in the silicon carbide layer and which has a bottom located in the first impurity region; a trench bottom impurity layer which is arranged in the trench to contact with at least a portion of the bottom of the trench and which is a silicon carbide epitaxial layer of a second conductivity type; a gate insulating film which covers a side surface of the trench and the trench bottom impurity layer; and a gate electrode which is arranged over at least a portion of the gate insulating film that is located inside the trench. |
| US09318598B2 |
Trench MOSFET having reduced gate charge
A trench MOSFET device includes a semiconductor layer of a first doping type. MOS transistor cells are in a body region of a second doping type in the semiconductor layer. The transistor cells include a first cell type including a first trench providing a first gate electrode or the first gate electrode is on the semiconductor surface between the first trench and a second trench, and a first source region is formed in the body region. The first gate electrode is electrically isolated from the first source region. A second cell type has a third trench providing a second gate electrode or the second gate electrode is on the semiconductor surface between the third trench and a fourth trench, and a second source region is in the body region. An electrically conductive member directly connects the second gate electrode, first source region and second source region together. |
| US09318593B2 |
Forming enhancement mode III-nitride devices
A method of fabricating a III-N device includes forming a III-N channel layer on a substrate, a III-N barrier layer on the channel layer, an insulator layer on the barrier layer, and a trench in a first portion of the device. Forming the trench comprises removing the insulator layer and a part of the barrier layer in the first portion of the device, such that a remaining portion of the barrier layer in the first portion of the device has a thickness away from a top surface of the channel layer, the thickness being within a predetermined thickness range, annealing the III-N device in a gas ambient including oxygen at an elevated temperature to oxidize the remaining portion of the barrier layer in the first portion of the device, and removing the oxidized remaining portion of the barrier layer in the first portion of the device. |
| US09318591B2 |
Transistor device and materials for making
This application relates to graphene based heterostructures and transistor devices comprising graphene. The hetero-structures comprise i) a first graphene layer; ii) a spacer layer and iii) a third graphene. The transistors comprise (i) an electrode, the electrode comprising a graphene layer, and (ii) an insulating barrier layer. |
| US09318585B1 |
Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having a wide band gap emitter/collector which are epitaxially grown
A method of forming a semiconductor structure includes forming a first seed layer, a second seed layer and an intrinsic base spaced apart from each other and with the intrinsic base located between the first seed layer and the second seed layer on an insulator layer. The method further includes forming an emitter on the first seed layer and on a first vertical surface of the intrinsic base by epitaxially growing the emitter from the first seed layer and the first vertical surface of the intrinsic base, and forming a collector on the second seed layer and on a second vertical surface of the intrinsic base by epitaxially growing the collector from the second seed layer and the second vertical surface of the intrinsic base. |
| US09318582B2 |
Method of preventing epitaxy creeping under the spacer
After forming a gate spacer on each sidewall of a sacrificial gate structure, portions of each dielectric fin cap portion underneath the gate spacer is intentionally etched and undercut regions that are formed are filled and pinched off with a dielectric material of a conformal dielectric liner. Portions of the conformal dielectric liner in the undercut regions are not subject to the undercut during an epitaxial pre-clean process performed prior to forming an epitaxial source region and an epitaxial drain region on opposite sides of the sacrificial gate structure and remain in the undercut regions after forming the epitaxial source region and the epitaxial drain region. |
| US09318579B2 |
Method for making a semiconductor device while avoiding nodules on a gate
A method for making a semiconductor device includes forming laterally spaced-apart semiconductor fins above a substrate, and a gate overlying the semiconductor fins. The gate has a tapered outer surface. A first pair of sidewall spacers is formed adjacent the gate an exposed tapered outer surface is also defined. Portions of the gate are removed at the exposed tapered outer surface to define a recess. A second pair of sidewall spacers is formed covering the first pair of sidewall spacers and the recess. Source/drain regions are formed on the semiconductor fins. |
| US09318577B2 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device is provided, which includes a single crystal semiconductor layer formed over an insulating surface and having a source region, a drain region, and a channel formation region, a gate insulating film covering the single crystal semiconductor layer and a gate electrode overlapping with the channel formation region with the gate insulating film interposed therebetween. In the semiconductor device, at least the drain region of the source and drain regions includes a first impurity region adjacent to the channel formation region and a second impurity region adjacent to the first impurity region. A maximum of an impurity concentration distribution in the first impurity region in a depth direction is closer to the insulating surface than a maximum of an impurity concentration distribution in the second impurity region in a depth direction. |
| US09318576B2 |
Method of manufacturing three-dimensional semiconductor device and variable resistive memory device
A three-dimensional semiconductor device, a resistive variable memory device including the same, and a method of manufacturing the same are provided. The method may include forming a source on a semiconductor substrate, sequentially forming a first semiconductor layer formed of a first material, a second semiconductor layer formed of a second material having a higher oxidation rate than that of the first material, and a third semiconductor layer formed of the first material on the source; patterning the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer; forming a lightly doped drain (LDD) region in the second semiconductor layer and a drain in the third semiconductor layer; oxidizing outer circumferences of the first semiconductor layer, the LDD region and the drain region to form a gate insulating layer; forming a gate on an outer circumference of the gate insulating layer to overlap the first semiconductor layer and a portion of the LDD region; foaming a heating electrode on the drain; and forming a variable resistance layer on the heating electrode. |
| US09318574B2 |
Method and structure for enabling high aspect ratio sacrificial gates
Sacrificial gate structures having an aspect ratio of greater than 5:1 are formed on a substrate. In some embodiments, each sacrificial gate structure straddles a portion of a semiconductor fin that is present on the substrate. An anchoring element is formed orthogonal to each sacrificial gate structure rendering the sacrificial gate structures mechanically stable. After formation of a planarization dielectric layer, each anchoring element can be removed and thereafter each sacrificial gate structure can be replaced with a functional gate structure. |
| US09318570B2 |
Semiconductor device
Provided is a semiconductor device, including a substrate including a device isolation layer and an active region isolated by the device isolation layer; a trench in the active region; a gate electrode filling at least a portion of the trench; a recess in the substrate at one side of the gate electrode, the recess overlapping a portion of the device isolation layer and the active region; and a lower contact plug filling the recess. |
| US09318567B2 |
Fabrication method for semiconductor devices
A method of fabricating a semiconductor device includes the following steps. First, a semiconductor substrate is provided, which includes at least a fin structure and at least a gate semiconductor layer disposed thereon. The gate semiconductor layer covers a portion of the fin structure. Then a sacrificial layer is deposited to cover the fin structure entirely. Subsequently, a top surface of the fin structure is exposed from the sacrificial layer through an etching process. A material layer is then deposited, which covers the gate semiconductor layer, the fin structure and the sacrificial layer conformally. Finally, the material layer is etched until the top surface of the fin structure is exposed and a first spacer is concurrently formed on side surfaces of the gate semiconductor layer. |
| US09318565B2 |
Power semiconductor device with dual field plate arrangement and method of making
A semiconductor device includes a semiconductor layer, gate electrodes, an insulating film, source electrodes, and drain electrodes which are provided on the semiconductor layer. Each of the source electrodes and the drain electrodes are spaced in the insulating film from a corresponding gate electrode, such that one end thereof is in contact with the semiconductor layer and the other end thereof is exposed. Further, the semiconductor device includes first field plate electrodes, each of which is provided on a corresponding gate electrode and the insulating film, and second field plate electrodes, each of which is provided on the insulating film between a corresponding first field plate electrode and a corresponding drain electrode. Furthermore, the thickness of the insulating film between each first field plate electrode and the semiconductor layer is smaller than the thickness of the insulating film between each second field plate electrode and the semiconductor layer. |
| US09318564B2 |
High density static random access memory array having advanced metal patterning
Methods and apparatus directed toward a high density static random access memory (SRAM) array having advanced metal patterning are provided. In an example, provided is a method for fabricating an SRAM. The method includes forming, using a self-aligning double patterning (SADP) technique, a plurality of substantially parallel first metal lines oriented in a first direction in a first layer. The method also includes etching the substantially parallel first metal lines, using a cut mask, in a second direction substantially perpendicular to the first direction, to separate the substantially parallel first metal lines into a plurality of islands having first respective sides that are aligned in the first direction and second respective sides that are aligned the second direction. The method also includes forming, in a second layer, a plurality of second metal lines oriented in the first direction. |
| US09318563B2 |
Silicon carbide single-crystal substrate
A silicon carbide single-crystal substrate includes a first surface, a second surface opposite to the first surface, and a peripheral edge portion sandwiched between the first surface and the second surface. A plurality of grinding traces are formed in a surface of the peripheral edge portion. A chamfer width as a distance from an outermost peripheral end portion of the peripheral edge portion to one of the plurality of grinding traces which is located on an innermost peripheral side of the peripheral edge portion in a direction parallel to the first surface is not less than 50 μm and not more than 400 μm. Thereby, a silicon carbide single-crystal substrate capable of suppressing occurrence of a crack, and a method for manufacturing the same can be provided. |
| US09318559B2 |
Method for producing group III nitride semiconductor and template substrate
A semiconductor substrate includes a sapphire substrate including a c-plane main surface and a groove in a surface thereof, the groove including side surfaces and a bottom surface, and a Group III nitride semiconductor layer formed on the sapphire substrate. The side surfaces of the groove are an a-plane of sapphire. An axis of the Group III nitride semiconductor layer, perpendicular to one of the side surface of the groove, is a c-axis of Group III nitride semiconductor. A plane of the Group III nitride semiconductor, parallel to the main surface of the sapphire substrate, is an a-plane of Group III nitride semiconductor. |
| US09318558B2 |
MOS field effect transistor
The present invention is to cause high channel mobility and a high threshold voltage to coexist in a SiC-MOSFET power device which uses a SiC substrate. The SiC MOSFET which is provided with a layered insulation film having electric charge trap characteristics on a gate insulation film has an irregular threshold voltage in a channel length direction of the SiC MOSFET, and in particular, has a shorter area having a maximum threshold voltage in the channel length direction compared to an area having other threshold voltages. |
| US09318554B2 |
Gate pad and gate feed breakdown voltage enhancement
A semiconductor chip includes a semiconductor layer having first and second opposing main surfaces. A plurality of MOSFET cells are at least partially formed in the semiconductor layer. A gate pad region is at least partially formed in the semiconductor layer and includes a gate pad contact and a first plurality of trenches extending from the first main surface. The first plurality of trenches are spaced apart from one another in a direction parallel to the first main surface by about 45 micrometers to about 60 micrometers. At least one gate feed region is at least partially formed in the semiconductor layer and includes a gate feed contact and a second plurality of trenches extending from the first main surface. The second plurality of trenches are spaced apart from one another in the direction parallel to the first main surface by about 45 micrometers to about 60 micrometers. |
| US09318553B1 |
Nanowire device with improved epitaxy
As disclosed herein, a method for fabricating a nanowire device with improved epitaxy, includes forming a nanowire stack on a substrate, the nanowire stack having one or more sacrificial layers, where the substrate includes a bulk substrate, an oxide layer, and an extremely thin silicon (ETSOI) layer, removing the sacrificial layers, depositing and patterning a gate material over the nanowire stack, the gate material having sidewalls, covering the sidewalls of the gate material with a spacer layer, and epitaxially growing an in-situ doped layer comprised of doped silicon from the ETSOI layer. The ETSOI may have a (100) crystallographic orientation. A pFET source/drain may be epitaxially grown by including an in-situ doped layer of boron doped SiGe. An nFET source/drain may be epitaxially grown by including an in-situ doped layer of phosphorus doped Si:C. A device corresponding to the method is also disclosed herein. |
| US09318551B2 |
Trench isolation structures and methods for bipolar junction transistors
Device structures, fabrication methods, and design structures for a bipolar junction transistor. A first isolation region is formed in a substrate to define a lateral boundary for an active device region and an intrinsic base layer is formed on the substrate. The intrinsic base layer has a section overlying the active device region. After the intrinsic base layer is formed, the first isolation region is partially removed adjacent to the active device region to define a trench that is coextensive with the substrate in the active device region and that is coextensive with the first isolation region. The trench is at least partially filled with a dielectric material to define a second isolation region. |
| US09318549B2 |
Semiconductor device with a super junction structure having a vertical impurity distribution
A super junction semiconductor device includes a semiconductor portion with parallel first and second surfaces. An impurity layer of a first conductivity type is formed in the semiconductor portion. Between the first surface and the impurity layer a super junction structure includes first columns of the first conductivity type and second columns of a second conductivity type. A sign of a compensation rate between the first and second columns may change along a vertical extension of the columns perpendicular to the first surface. A body zone of the second conductivity type is formed between the first surface and one of the second columns. A field extension zone of the second conductivity type may be electrically connected to the body zone or a field extension zone of the first conductivity type may be connected to the impurity layer. The field extension zone improves the avalanche characteristics of the semiconductor device. |
| US09318546B1 |
Doped electrode for DRAM capacitor stack
In some embodiments, a metal oxide second electrode material is formed as part of a MIM DRAM capacitor stack. The second electrode material is doped with one or more dopants. The dopants may influence the crystallinity, resistivity, and/or work function of the second electrode material. The dopants may be uniformly distributed throughout the second electrode material or may be distributed with a gradient in their concentration profile. |
| US09318543B2 |
Organic light-emitting diode (OLED) display and method of manufacturing the same
An organic light-emitting diode (OLED) display and method of manufacturing the same are disclosed. In one aspect, the OLED display includes a substrate, a thin film transistor (TFT) formed over the substrate, and a first pixel defining layer formed over the TFT and having an opening. The OLED display also includes an insulating layer formed in the opening and including a top surface having a dome shape and an OLED formed over the insulating layer. |
| US09318540B2 |
Light emitting diode pixel unit circuit and display panel
A LED pixel unit circuit and a display panel. The circuit comprises a driving module (31) which is provided with a driving control unit (311). The driving control unit (311) comprises a matching TFT (T4) whose threshold voltage is matched with the threshold voltage of the driving TFT (DTFT), is located between the first switching element (T1) and the first capacitor (C1), and is configured to control charging and discharging of the first capacitor (C1) so as to write the threshold voltage of the matching TFT (T4) and a new data voltage into the first capacitor (C1) while eliminating the original data voltage in the first capacitor (C1) and thereby compensate for the threshold voltage of the driving TFT (DTFT). The circuit can solve the problem of brightness non-uniformity of the display panel due to different threshold voltages of the TFTs, and also integrate a touch screen circuit into the pixel unit circuit to realize a touch function of the LED display panel. |
| US09318538B2 |
Organic light emitting diode array
The disclosure relates to an organic light emitting diode array. The organic light emitting diode array includes a number of thin-film transistors arranged to form an array, a first insulative layer, a plurality of first electrodes, a number of electroluminescent layers, a patterned second insulative layer, and at least one second electrode. The first insulative layer is located on the plurality of first electrodes defines a number of convexities. The first electrodes are located on the convexities and electrically connected to the thin-film transistors. The electroluminescent layers are located on the first electrodes. The patterned second insulative layer is located on the first insulative layer to cover the first electrodes and expose the electroluminescent layers. The at least one second electrode is electrically connected to the electroluminescent layers. |
| US09318537B2 |
Organic light emitting device, method of manufacturing the same, and shadow mask therefor
The present invention relates to an organic light emitting device, and the organic light emitting device according to an exemplary embodiment of the present invention includes a blue subpixel that is larger than a red subpixel and a green subpixel. The red subpixel and the green subpixel have the same layered structure such that the red subpixel and the green subpixel are formed by using the same shadow mask. |
| US09318536B2 |
Light emitters with series connection
An organic solid state lighting system comprising multiple OLED modules connected in series is provided. |
| US09318532B2 |
Semiconductor memory device
A semiconductor memory device comprises: a memory cell array comprising first wiring lines, second wiring lines extending crossing the first wiring lines, and memory cells at intersections of the first and second wiring lines, the memory cells being stacked perpendicularly to a substrate, each memory cell comprising a variable resistance element; a first select transistor layer comprising a first select transistor operative to select one of the first wiring lines; a second select transistor layer comprising a second select transistor operative to select one of the second wiring lines; and a peripheral circuit layer on the substrate, the peripheral circuit layer comprising a peripheral circuit that controls a voltage applied to one of the memory cells. The first select transistor layer is provided below the memory cell array perpendicularly to the substrate. The second select transistor layer is provided above the memory cell array perpendicularly to the substrate. |
| US09318527B2 |
Method for producing photosensitive infrared detectors
A method for producing at least one photosensitive infrared detector by assembling a first electronic component including plural photodiodes sensitive to infrared radiation and a second electronic component including at least one electronic circuit for reading the plurality of photodiodes, an infrared detector, and an assembly for producing such a detector, the method including: production, on each one of the first and second components, of a connection face formed at least partially by a silicon oxide (SiO2)-based layer; bonding the first component and the second component by the connection faces thereof, thus performing the direct bonding of the two components. The method can simplify hybridization of heterogeneous components for producing an infrared detector. |
| US09318524B2 |
Imaging detector with per pixel analog channel well isolation with decoupling
An imaging apparatus (400) includes a detector array (412) with at least one detector tile (418). The detector tile includes a photosensor array (422) with a two dimensional array of individual photosensitive detector pixels (424) located within a non-photosensitive area (426) and readout electronics (432) coupled to the photosensor array. The readout electronics includes individual analog readout channel wells (602, 604) corresponding to the individual detector pixels, wherein an analog readout channel well electrically isolates analog electrical components therein from analog electrical components in other analog readout channel wells. Decoupling circuitry optionally is located in at least one of metal layers of the individual analog readout channels or in the individual analog readout channel wells. |
| US09318519B2 |
Imaging apparatus and imaging system
One embodiment according to the present invention is an imaging apparatus including a pixel. The pixel includes first and second photoelectric conversion units, a floating diffusion portion, and first and second transfer transistors. The first and second transfer transistors are configured to transfer electric carriers generated respectively at the first and second photoelectric conversion units to the floating diffusion portion. The imaging apparatus includes a first conductive member electrically connected to the gate electrode of the first transfer transistor, a second conductive member electrically connected to the gate electrode of the second transfer transistor, and a control unit. The distance of closest proximity between the first conductive member and the floating diffusion portion is longer than the distance of closest proximity between the second conductive member and the floating diffusion portion. |
| US09318518B2 |
Photon counting detector pixel having an anode including two or more alternatively selectable and separate sub-anodes
An imaging system (100) includes a radiation source (112) that emits radiation that traverses an examination region and a detector array (114) with a plurality of photon counting detector pixels (116) that detect radiation traversing the examination region and respectfully generate a signal indicative of the detected radiation. The photon counting detector pixel includes a direct conversion layer (122) having a first radiation receiving side (202) and second opposing side (206), a cathode (118) affixed to and covering all of or a substantial portion of the first side, an anode (120) affixed to a centrally located region (208) of the second side, wherein the anode includes at least two sub-anodes (120, 120i, 1202, 120N), and a metallization (124) affixed to the second side, surrounding the anode and the anode region, with a gap between the anode and the metallization. The system further includes a reconstructor (144) that reconstructs the signal to generate volumetric image data indicative of the examination region. |
| US09318513B2 |
Semiconductor device, active matrix board, and display device
Provided is a semiconductor device equipped with: a plurality of switching elements (T1, T2) that are connected in series; a first capacitance (Cs1) having one electrode connected to an end of the plurality of switching elements (T1, T2) and another electrode being connected to a first capacitance wiring line (CSL1); a second capacitance (Cs2) with one electrode connected to a node that connects two adjacent switching elements (T1, T2) among the plurality of switching elements, and another electrode being connected to a second capacitance wiring line (CSL2); and a light-shielding film that block light from being incident on at least one of the plurality of switching elements (T1, T2). |
| US09318510B2 |
Metal wire, thin-film transistor substrate and method for manufacturing a thin-film transistor substrate
A metal wire included in a display device, the metal wire includes a first metal layer including a nickel-chromium alloy, a first transparent oxide layer disposed on the first metal layer, and a second metal layer disposed on the first transparent oxide layer. |
| US09318509B2 |
Array substrate and method for manufacturing the same, display panel
The present invention discloses an array substrate comprising: a first substrate on which a thin film transistor and a data line are formed; and a shield metal layer comprising a first shield metal zone positioned at a location corresponding to a channel of the thin film transistor and a second shield metal zone positioned at a location corresponding to the data line. The present invention also discloses a display panel and a method for manufacturing the array substrate. The shield metal layer formed at the location on the array substrate corresponding to the data line, there is no any black matrix region between a color filter units along a direction corresponding to the data line. The display panel comprising the array substrate has increased aperture ratio of pixel, and difficulty of manufacturing the display panel is decreased. |
| US09318508B2 |
Array substrate and method for producing the same, display
An array substrate, comprising: a substrate; a metal pattern formed on the substrate; an insulation layer formed on the metal pattern and formed with a via therein; and a transparent conductive pattern formed on the insulation layer and electrically connected to the metal pattern through the via, wherein the via has a cross section exhibiting an irregular geometry shape having a curved side edge. |
| US09318507B2 |
Thin film transistor and display device
Provided is a thin film transistor comprising an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with: a gate electrode; two or more oxide semiconductor layers that are used as a channel layer; an etch stopper layer for protecting the surfaces of the oxide semiconductor layers; a source-drain electrode; and a gate insulator film interposed between the gate electrode and the channel layer. The metal elements constituting an oxide semiconductor layer that is in direct contact with the gate insulator film are In, Zn and Sn. The hydrogen concentration in the gate insulator film, which is in direct contact with the oxide semiconductor layer, is controlled to 4 atomic % or less. |
| US09318506B2 |
Semiconductor device and manufacturing method thereof
An object of an embodiment of the present invention is to provide a semiconductor device which includes a transistor including an oxide semiconductor with high field-effect mobility, a small variation in threshold voltage, and high reliability. The semiconductor device includes a transistor which includes an insulating substrate from which oxygen is released by heat treatment and an oxide semiconductor film over the insulating substrate. A channel is formed in the oxide semiconductor film. The insulating substrate from which oxygen is released by heat treatment can be manufactured by implanting oxygen ions into at least a region of an insulating substrate on the side provided with the oxide semiconductor film. |
| US09318504B2 |
Density gradient cell array
One or more techniques or systems for mitigating density gradients between two or more regions of cells are provided herein. In some embodiments, an array of cells is associated with a dummy region. For example, the array of cells includes an array of gates and an array of OD regions. In some embodiments, the array of gates includes a first set of gates associated with a first gate dimension and a second set of gates associated with a second gate dimension. In some embodiments, the array of OD regions includes a first set of OD regions associated with a first OD dimension and a second set of OD regions associated with a second OD dimension. In this manner, at least one of a pattern density, gate density, or OD density is customized to a region associated with active cells, thus mitigating density gradients between respective regions. |
| US09318499B2 |
Lithography-friendly local read circuit for NAND flash memory devices and manufacturing method thereof
A flash memory device comprising a local sensing circuitry is provided in a hierarchical structure with local and global bit lines. The local sensing circuitry comprise read and pass circuits configured to sense and amplify read currents during read operations, wherein the amplified read signals may be passed to a global circuit via the local and global bit lines. |
| US09318498B2 |
Buried hard mask for embedded semiconductor device patterning
Methods and apparatus for manufacturing semiconductor devices, and such semiconductor devices, are described. According to various aspects of the disclosure, a semiconductor device can be manufactured by forming a core region of the semiconductor device and forming a periphery region of the semiconductor device. A first polysilicon region can then be formed over the core and periphery regions of the semiconductor device. A first mask is formed on the first poly silicon layer and a second polysilicon layer is disposed such that the second polysilicon layer covers the first mask. A second mask can then be formed on the second polysilicon layer. After forming the second mask, portions of the first and second polysilicon layers that are uncovered by either the first or second masks are removed. |
| US09318494B2 |
Methods of forming positioned landing pads and semiconductor devices including the same
A method of forming a DRAM can include forming a plurality of transistors arranged in a first direction on a substrate and forming a bit line structure that extends in the first direction, where the bit line structure being electrically coupled to the plurality of transistors at respective locations in the first direction. A plurality of first landing pads an be formed at alternating ones of the respective locations having a first position in a second direction on the substrate. A plurality of second landing pads can be formed at intervening ones of the respective locations between the alternating ones of the respective locations, where the intervening ones of the respective locations having a second position in the second direction on the substrate wherein second position is shifted in the second direction relative to the first position. |
| US09318489B2 |
Complex circuits utilizing fin structures
A method of forming a semiconductor structure includes forming a multilayer lattice matched structure having an unstrained layer, a first strained layer, and a second strained layer formed between the unstrained and the first strained layer. A first opening in the multilayer structure is etched and a second strained fill material having a same material as the second strained layer is deposited. A second opening in the multilayer structure is etched and an unstrained fill material having a same material as the unstrained layer is deposited. A first strained fill material having a same material as the first strained layer is then deposited between the unstrained fill and the second strained fill. A second strained fin is formed from the deposited second strained fill material, a first strained fin is formed from the deposited first strained fill material, and an unstrained fin is formed from the deposited unstrained fill material. |
| US09318488B2 |
Semiconductor device and formation thereof
A semiconductor device and method of formation are provided herein. A semiconductor device includes a first active region adjacent a first side of a shallow trench isolation (STI) region. The first active region including a first proximal fin having a first proximal fin height adjacent the STI region, and a first distal fin having a first distal fin height adjacent the first proximal fin, the first proximal fin height less than the first distal fin height. The STI region includes oxide, the oxide having an oxide volume, where the oxide volume is inversely proportional to the first proximal fin height. A method of formation includes forming a first proximal fin with a first proximal fin height less than a first distal fin height of a first distal fin, such that the first proximal fin is situated between the first distal fin and an STI region. |
| US09318486B2 |
Semiconductor integrated circuit devices
A semiconductor integrated circuit device may include a standard cell region on a surface of a substrate and a first active region on the surface of the substrate in the standard cell region, wherein the first active region has a length in a first direction. A second active region may be on the surface of the substrate in the standard cell region, the second active region may have a length in the first direction, the length of the second active region may be greater than the length of the first active region, and an axis in a second direction may intersect centers of the first and second active regions so that the first and second active regions are symmetric about the axis in the second direction. A first gate electrode may extend across the first active region in the first direction, and a second gate electrode may extend across the second active region in the first direction. |
| US09318484B2 |
Semiconductor device
The semiconductor device of the present invention comprises first and second transistors and first and second capacitors. One of source and drain electrodes of the first transistor is electrically connected to a first wiring, the other is electrically connected to a second wiring, and a gate electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor and one of electrodes of the first capacitor. The other of the source and drain electrodes of the second transistor is electrically connected to the first wiring, and a gate electrode of the second transistor is electrically connected to one of electrodes of a second capacitor and a fifth wiring. The other electrode of the first capacitor is electrically connected to a third wiring, and the other electrode of the second capacitor is eclectically connected to a fourth wiring. |
| US09318482B2 |
Semiconductor devices having high-resistance region and methods of forming the same
Provided are an electrostatic discharge (ESD) protection device having a high-resistance region and a method of forming the same. The device includes a well on a substrate. A first impurity region is formed on the well and connected to an input/output pad. A second impurity region is formed on the well, spaced apart from the first impurity region, and connected to a ground (Vss). A third impurity region is formed on the well, spaced apart from the first impurity region, and connected to the ground (Vss). An isolation layer is formed between the first impurity region and the second impurity region. A high-resistance region, which directly contacts the first impurity region and the well and has a resistance higher than the first impurity region, is formed between the first impurity region and the isolation layer. The well and the third impurity region include first conductive type impurities. The first impurity region and the second impurity region include second conductive type impurities different from the first conductive type impurities. |
| US09318478B1 |
Semiconductor device and fabricating method thereof
A semiconductor device includes a first dummy gate having a first width, a second dummy gate adjacent to the first dummy gate in a lengthwise direction and having a second width, and a first bridge connecting the first dummy gate and the second dummy gate to each other. The first width and the second width are smaller than a minimum processing line width. |
| US09318476B2 |
High performance standard cell with continuous oxide definition and characterized leakage current
A transistor cell is provided that includes a dummy gate overlaying a continuous oxide definition (OD) region. A first portion of the OD region adjacent a first side of the dummy forms the drain. The cell includes a local interconnect structure that couples the dummy gate and a portion of the OD region adjacent a second opposing side of the dummy gate to a source voltage. |
| US09318471B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes: a first substrate including a first surface layer that includes first and second electrodes; a second substrate including a second surface layer that includes third and fourth electrodes, and directly bonded to the first substrate such that the second surface layer is in contact with the first surface layer; and a functional film provided between the second and fourth electrodes. The first and third electrodes are bonded together so as to be in contact with each other, and the second electrode, the functional film, and the fourth electrode constitute a passive element. |
| US09318469B2 |
Stack package and system-in-package including the same
A system-in-package includes first and second semiconductor chips disposed in a first region over a substrate, and a controller disposed in a second region over the substrate and selectively supplying a power supply voltage to the first or second semiconductor chip based on a data output operation of the first and second semiconductor chips, wherein each of the first and second semiconductor chips includes a first power supply region coupled with the controller through a first line and receiving the power supply voltage from the controller in common during an input/output operation of the first and second semiconductor chips, an output driver suitable for outputting data, and a second power supply region independently coupled with the controller through one of a second line and a third line and independently receiving the power supply voltage for an operation of the output driver from the controller during the data output operation. |
| US09318468B2 |
3-D integrated semiconductor device comprising intermediate heat spreading capabilities
In a three-dimensional chip configuration, a heat spreading material may be positioned between adjacent chips and also between a chip and a carrier substrate, thereby significantly enhancing heat dissipation capability. Furthermore, appropriately sized and positioned through holes in the heat spreading material may enable electrical chip-to-chip connections, while responding thermally conductive connectors may extend to the heat sink without actually contacting the corresponding chips. |
| US09318466B2 |
Method for electronic circuit assembly on a paper substrate
A methodology for a thin, flexible substrate having integrated passive circuit elements, and the resulting device are disclosed. Embodiments may include integrating one or more passive circuit components on a first or second surface of a substrate, and interconnecting one or more integrated circuit (IC) dies on a second surface of the interposer to the one or more passive circuit components with one or more metal-filled vias between the first and second surfaces, the first and second surfaces being opposite surfaces of the substrate. |
| US09318464B2 |
Variable temperature solders for multi-chip module packaging and repackaging
Various methods of mounting semiconductor chips on a substrate are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a first plurality of solder interconnect structures to a first semiconductor chip. The first solder interconnect structures have a first melting point. The first semiconductor chip may be tested. If the first semiconductor chip passes the testing, then a second semiconductor chip is coupled to the first semiconductor chip using a second plurality of solder interconnect structures that have a second melting point lower than the first melting point. |
| US09318450B1 |
Patterned conductive epoxy heat-sink attachment in a monolithic microwave integrated circuit (MMIC)
A monolithic microwave integrated circuit structure having: a semiconductor substrate structure having a plurality of active devices and a microwave transmission line having an input section, an output section and a interconnecting section electrically interconnecting the active devices on one surface of the substrate; a thermally conductive, electrically non-conductive heat sink; and a thermally conductive bonding layer for bonding the heat sink to the substrate, the thermally conductive bonding layer having an electrically conductive portion and an electrically non-conductive portion, the electrically conductive portion being disposed between the heat sink and an opposite surface of a portion of the substrate having the active devices and the electrically non-conductive portion being disposed on the opposite surface portion overlaying portion of the microwave transmission line section. |
| US09318443B2 |
Method for forming identification marks on refractory material single crystal substrate, and refractory material single crystal substrate
An identification mark formation method for forming an identification mark on a refractory material single crystal substrate that is made of one selected from the group consisting of sapphire, gallium nitride, aluminum nitride, diamond, boron nitride, zinc oxide, gallium oxide, and titanium dioxide is disclosed. The method includes: (a) scanning a principal surface of the refractory material single crystal substrate with a laser beam at a first energy density such that a groove is formed in the principal surface of the refractory material single crystal substrate, thereby forming an identification mark in the principal surface of the refractory material single crystal substrate; and (b) scanning an inside of the groove of the refractory material single crystal substrate with a laser beam at a second energy density that is lower than the first energy density. |
| US09318440B2 |
Formation of carbon-rich contact liner material
Conductive contact structure of a circuit structures and methods of fabrication thereof are provided. The fabrication includes, for instance, providing at least one contact opening disposed over a semiconductor substrate; forming a carbon-rich contact liner material having a set carbon content conformally within the at least one contact opening disposed over the semiconductor substrate. |
| US09318437B1 |
Moisture scavenging layer for thinner barrier application in beol integration
A method of forming a thinner barrier/liner stack for vias and metal lines and the resulting device are disclosed. Embodiments include forming a via through an interlayer dielectric (ILD) and capping layer, down to a first metal layer; forming a moisture scavenging layer precursor over the ILD and on side and bottom surfaces of the via; annealing the moisture scavenging layer precursor, forming a moisture scavenging layer; forming a barrier/liner stack over the moisture scavenging layer; and depositing a second metal layer over the barrier/liner stack and filling the via and trench. |
| US09318436B2 |
Copper based nitride liner passivation layers for conductive copper structures
One illustrative method disclosed herein includes forming a trench/via in a layer of insulating material, forming a barrier layer in the trench/via, forming a copper-based seed layer on the barrier layer, converting at least a portion of the copper-based seed layer into a copper-based nitride layer, depositing a bulk copper-based material on the copper-based nitride layer so as to overfill the trench/via and performing at least one chemical mechanical polishing process to remove excess materials positioned outside of the trench/via to thereby define a copper-based conductive structure. A device disclosed herein includes a layer of insulating material, a copper-based conductive structure positioned in a trench/via within the layer of insulating material and a copper-based silicon or germanium nitride layer positioned between the copper-based conductive structure and the layer of insulating material. |
| US09318430B2 |
Stack of horizontally extending and vertically overlapping features, methods of forming circuitry components, and methods of forming an array of memory cells
A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The stack has a primary portion and an end portion. At least some of the features extend farther in the horizontal direction in the end portion moving deeper into the stack in the end portion. Operative structures are formed vertically through the features in the primary portion and dummy structures are formed vertically through the features in the end portion. Horizontally elongated openings are formed through the features to form horizontally elongated and vertically overlapping lines from material of the features. The lines individually extend from the primary portion into the end portion, and individually laterally about sides of vertically extending portions of both the operative structures and the dummy structures. Sacrificial material that is elevationally between the lines is at least partially removed in the primary and end portions laterally between the horizontally elongated openings. Other aspects and implementations are disclosed. |
| US09318419B2 |
Conductive line structures and methods of forming the same
Conductive line structures, and methods of forming the same, include first and second pattern structures, insulation layer patterns and an insulating interlayer. The first pattern structure includes a conductive line pattern and a hard mask stacked, and extends in a first direction. The second pattern structure includes a second conductive line pattern and another hard mask stacked, and at least a portion of the pattern structure extends in the first direction. The insulation layer patterns contact end portions of the pattern structures. The first pattern structure and an insulation layer pattern form a closed curve shape in plan view, and the second pattern structure and another insulation layer pattern form another closed curve shape in plan view. The insulating interlayer covers upper portions of the pattern structures and the insulation layer patterns, an air gap between the pattern structures, and another air gap between the insulation layer patterns. |
| US09318416B2 |
Semiconductor device including conductive layer with conductive plug
Some embodiments include a semiconductor device which includes a first conductive layer formed on the semiconductor substrate and a first contact plug connected to the first conductive layer. The first conductive layer includes a plurality of loops of conductive material over the semiconductor substrate. Each of the plurality of loops comprises a first opening and a second opening, a first portion and a second portion sandwiching the first opening, a third portion and a fourth portion sandwiching the second opening, a first tab portion connected to the first portion and the third portion and having a first length in a first direction and a first width in a second direction perpendicular to the first direction, and a second tab portion connected to the second portion and the fourth portion and having a second length in the first direction and a second width in the second direction. |
| US09318410B2 |
Cooling assembly using heatspreader
Various embodiments relate to a microchip die cooling assembly comprising a circuit board; a microchip having an exposed die attached to the circuit board; a heatspreader having a top side and a bottom side; a heat sink having a bottom side and a top side comprising a cooling structure; a first thermal interface material in contact with the exposed die and the bottom side of the heatspreader; and a second thermal interface material in contact with the top side of the heat spreader and the bottom side of the heat sink. |
| US09318403B2 |
Integrated circuit packaging system with magnetic film and method of manufacture thereof
An integrated circuit packaging system including: connecting a first integrated circuit device and a package substrate; attaching a support bump to the package substrate; providing a second integrated circuit device having an inner encapsulation; applying a magnetic film on the inner encapsulation of the second integrated circuit device; and mounting the second integrated circuit device over the first integrated circuit device with the magnetic film on the first integrated circuit device and the support bump. |
| US09318401B2 |
Glass composition for protecting semiconductor junction, method of manufacturing semiconductor device and semiconductor device
Provided is a glass composition for protecting a semiconductor junction which contains at least SiO2, B2O3, Al2O3, ZnO and at least two oxides of alkaline earth metals selected from a group consisting of CaO, MgO and BaO, and substantially contains none of Pb, As, Sb, Li, Na and K, wherein an average linear expansion coefficient within a temperature range of 50° C. to 550° C. falls within a range of 3.33×10−6 to 4.13×10−6. A semiconductor device having high breakdown strength can be manufactured using such a glass material containing no lead in the same manner as a conventional case where “a glass material containing lead silicate as a main component” is used. |
| US09318396B1 |
Method of fabricating flash memory
A method of fabricating a flash memory includes providing a fin structure. The fin structure includes a floating gate material, an oxide layer and a semiconductive layer. An insulating layer is disposed at two sides of the fin structure. Then, a dielectric layer conformally covers the floating gate material and insulating layer. Later, a patterned first mask layer, a patterned second mask layer, and a control gate are stacked on the dielectric layer from bottom to top. The control gate crosses at least one fin structure. Next, at least one isotropic etching step is performed to entirely remove the exposed dielectric layer. |
| US09318393B2 |
Semiconductor device having test unit, electronic apparatus having the same, and method for testing the semiconductor device
A semiconductor device can detect a defective or faulty part caused by copper (Cu) ions migrated from a through silicon via (TSV), resulting in improvement of device characteristics and reliability. The semiconductor device includes: a semiconductor substrate including an active region defined by a device isolation region; a through silicon via (TSV) formed to pass through the semiconductor substrate; and a test unit formed in the vicinity of the TSV so as to determine the presence or absence of metal pollution caused by the TSV. |
| US09318391B2 |
Method for manufacturing semiconductor device including a MOS-type transistor
There is provided a semiconductor device and a method for manufacturing a semiconductor device. Within the N-type semiconductor layer formed from a high resistance N-type substrate, the P-type well diffusion layer and P-type extraction layer are formed and are fixed to ground potential. Due thereto, a depletion layer spreading on the P-type well diffusion layer side does not reach the interlayer boundary between the P-type well diffusion layer and the buried oxide film. Hence, the potential around the surface of the P-type well diffusion layer is kept at a ground potential. Accordingly, when the voltages are applied to the backside of the N-type semiconductor layer and a cathode electrode, a channel region at the MOS-type semiconductor formed as a P-type semiconductor layer is not activated. Due thereto, leakage current that may occur independently of a control due to the gate electrode of a transistor can be suppressed. |
| US09318388B2 |
Methods of forming substantially self-aligned isolation regions on FinFET semiconductor devices and the resulting devices
One method disclosed includes performing a selective etching process through a gate cavity to selectively remove a portion of a first semiconductor material relative to a second layer of a second semiconductor material and a substrate so as to thereby define a space between the second semiconducting material and the substrate, filling substantially all of the space with an insulating material so as to thereby define a substantially self-aligned channel isolation region positioned under at least what will become the channel region of the FinFET device. |
| US09318383B2 |
Integrated cluster to enable next generation interconnect
Embodiments of the present invention generally relate to methods for forming a metal structure and passivation layers. In one embodiment, metal columns are formed on a substrate. The metal columns are doped with manganese, aluminum, zirconium, or hafnium. A dielectric material is deposited over and between the metal columns and then cured to form a passivation layer on vertical surfaces of the metal columns. |
| US09318381B2 |
Method of fabricating conductive line of a semiconductor device
A method of fabricating a conductive line of a semiconductor device is disclosed. The method includes the steps of: sequentially forming a conductive material layer and a mask on a semiconductor substrate, wherein a thickness of the conductive material layer is between 30000 angstroms (Å) and 90000 angstrom (Å); performing a first etching process to remove a part of the conductive material layer to form at least an upper side; and performing a second etching process to remove a part of the conductive material layer to form at least a lower side, wherein a curvature of the upper side is different from a curvature of the lower side. |
| US09318380B2 |
Semiconductor device and method of forming stacked semiconductor die and conductive interconnect structure through an encapsulant
A semiconductor device has a first conductive layer formed over a first substrate. A second conductive layer is formed over a second substrate. A first semiconductor die is mounted to the first substrate and electrically connected to the first conductive layer. A second semiconductor die is mounted to the second substrate and electrically connected to the second conductive layer. The first semiconductor die is mounted over the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and the first and second substrates. A conductive interconnect structure is formed through the encapsulant to electrically connect the first and second semiconductor die to the second surface of the semiconductor device. Forming the conductive interconnect structure includes forming a plurality of conductive vias through the encapsulant and the first substrate outside a footprint of the first and second semiconductor die. |
| US09318378B2 |
Slot designs in wide metal lines
A method and structure for slots in wide lines to reduce stress. An example embodiment method and structure for is an interconnect structure comprising: interconnect comprising a wide line. The wide line has a first slot. The first slot is spaced a first distance from a via plug so that the first slot relieves stress on the wide line and the via plug. The via plug can contact the wide line from above or below. Another example embodiment is a dual damascene interconnect structure comprising: an dual damascene shaped interconnect comprising a via plug, a first slot and a wide line. The wide line has the first slot. The first slot is spaced a first distance from the via plug so that the first slot relieves stress on the wide line and the via plug. |
| US09318377B2 |
Etch damage and ESL free dual damascene metal interconnect
A method of forming a dual damascene metal interconnect for a semiconductor device. The method includes forming a layer of low-k dielectric, forming vias through the low-k dielectric layer, depositing a sacrificial layer, forming trenches through the sacrificial layer, filling the vias and trenches with metal, removing the sacrificial layer, then depositing an extremely low-k dielectric layer to fill between the trenches. The method allows the formation of an extremely low-k dielectric layer for the second level of the dual damascene structure while avoiding damage to that layer by such processes as trench etching and trench metal deposition. The method has the additional advantage of avoiding an etch stop layer between the via level dielectric and the trench level dielectric. |
| US09318371B2 |
Shallow trench isolation structure
A semiconductor device includes a semiconductor substrate, an active region and a trench isolation. The active region is formed in the semiconductor substrate. The trench isolation is disposed adjacent to the active region. The trench isolation includes a lower portion and an upper portion. The upper portion is located on the lower portion. The upper portion has a width gradually decreased from a junction between the upper portion and the lower portion toward a top of the trench isolation. In a method for fabricating the semiconductor device, at first, the semiconductor substrate is etched to form a trench in the semiconductor substrate. Then, an insulator fills the trench to form the trench isolation. Thereafter, the gate structure is formed on the semiconductor substrate. Then, the semiconductor substrate is etched to form a recess adjacent to the trench isolation. Thereafter, at least one doped epitaxial layer grows in the recess. |
| US09318364B2 |
Semiconductor device metallization systems and methods
Semiconductor device metallization systems and methods are disclosed. In some embodiments, a metallization system for semiconductor devices includes a mainframe, and a plurality of modules disposed proximate the mainframe. One of the plurality of modules comprises a physical vapor deposition (PVD) module and one of the plurality of modules comprises an ultraviolet light (UV) cure module. |
| US09318362B2 |
Die bonder and a method of cleaning a bond collet
A die bonder comprises a movable bond collet for holding an electronic device, and a platform which comprises a cleaning surface for cleaning the bond collet when the bond collet contacts the cleaning surface. The die bonder also comprises a cleaning agent supply, wherein the cleaning agent supply is operative to provide a cleaning agent to the cleaning surface to facilitate the cleaning of the bond collet. |
| US09318360B2 |
Linear high packing density for LED arrays
Apparatus for providing energy to a process chamber are provided herein. In one embodiment, the apparatus include a supporting substrate, a first plurality of solid state light sources disposed on a first surface of the supporting substrate, and a second plurality of solid state light sources disposed on the top surface of the supporting substrate, wherein the first and second plurality of solid state light sources are aligned and electrically isolated from each other, and the first plurality of solid state light sources is in physical contact with the second plurality of solid state light sources. |
| US09318357B2 |
Method for producing a multiplicity of optoelectronic semiconductor components
Optoelectronic semiconductor devices and methods for producing optoelectronic semiconductor devices are disclosed. In an embodiment the method includes applying a plurality of arrangements of electrically conductive first and second contact elements on an auxiliary carrier, applying an optoelectronic semiconductor chip on the second contact element of each arrangement and electrically conductively connecting the optoelectronic semiconductor chip to the first contact element for each arrangement. The method further includes encapsulating the first contact elements and the second contact elements with an encapsulation material to form an encapsulation body and singulating the encapsulation body into a plurality of optoelectronic semiconductor devices, wherein the encapsulation material finishes flush with an underside, facing the auxiliary carrier, of each first contact element, and wherein the encapsulation material finishes flush with an underside, facing the auxiliary carrier, of each second contact element. |
| US09318356B2 |
Substrate strip
Disclosed herein is a substrate strip including: a substrate region having a plurality of substrate units formed therein; a dummy region enclosing the substrate region; a plurality of metal patterns formed at a predetermined size in the dummy region; and rib patterns formed between the metal patterns. |
| US09318354B2 |
Semiconductor package and fabrication method thereof
A semiconductor package is disclosed, which includes: a substrate having a plurality of switching pads, a plurality of first conductive pads and a plurality of circuits formed between the switching pads and the first conductive pads; an insulating layer covering the circuits; a conductive layer formed on the insulating layer and extending to the switching pads and the first conductive pads; and a semiconductor element disposed on the substrate and electrically connected to the switching pads through a plurality of bonding wires. By electrically connecting the switching pads and the first conductive pads through the conductive layer, the invention dispenses with the conventional short bonding wires so as to prevent the conventional problem of short circuits caused by contact of the short bonding wires with other bonding wires. |
| US09318346B2 |
CMP polishing liquid and polishing method
The CMP polishing liquid containing a medium and silica particles as an abrasive grain dispersed into the medium. The silica particles have a silanol group density of 5.0/nm2 or less and the biaxial average primary particle diameter when arbitrary 20 silica particles are selected from an image obtained by scanning electron microscope observation is 25 to 55 nm. The association degree of the silica particles is 1.1 or more. The CMP polishing liquid has the high barrier film polishing speed, the favorable abrasive grain dispersion stability, and the high interlayer dielectric polishing speed. The CMP polishing liquid can provide a method of producing semiconductor substrates or the like, that have excellent microfabrication, thin film formation, dimension accuracy, electric property and high reliability with low cost. |
| US09318342B2 |
Methods of removing fins for finfet semiconductor devices
One illustrative method disclosed herein includes forming a plurality of initial fins in a substrate, wherein at least one of the initial fins is a to-be-removed fin, forming a material adjacent the initial fins, forming a fin removal masking layer above the plurality of initial fins, removing a desired portion of the at least one to-be-removed fin by: (a) performing a recess etching process on the material to remove a portion, but not all, of the material positioned adjacent the sidewalls of the at least one to-be-removed fin, (b) after performing the recess etching process, performing a fin recess etching process to remove a portion, but not all, of the at least one to be removed fin and (c) repeating steps (a) and (b) until the desired amount of the at least one to-be-removed fin is removed. |
| US09318337B2 |
Three dimensional three semiconductor high-voltage capacitors
An integrated circuit capacitor. The capacitor includes a substrate, a first conductor, and a first insulating region between the first conductor and the substrate. The capacitor also includes a second conductor, a second insulating region between the first conductor and the second conductor, a third conductor, and a third insulating region between the first conductor and the third conductor. The capacitor also includes a fourth conductor and a fourth insulating region between the first conductor and the fourth conductor. |
| US09318336B2 |
Non-volatile memory structure employing high-k gate dielectric and metal gate
A high dielectric constant (high-k) gate dielectric for a field effect transistor (FET) and a high-k tunnel dielectric for a non-volatile random access memory (NVRAM) device are simultaneously formed on a semiconductor substrate. A stack of at least one conductive material layer, a control gate dielectric layer, and a disposable material layer is subsequently deposited and lithographically patterned. A planarization dielectric layer is deposited and patterned, and disposable material portions are removed. A remaining portion of the control gate dielectric layer is preserved in the NVRAM device region, but is removed in the FET region. A conductive material is deposited in gate cavities to provide a control gate for the NVRAM device and a gate portion for the FET. Alternately, the control gate dielectric layer may replaced with a high-k control gate dielectric in the NVRAM device region. |
| US09318333B2 |
Dielectric extension to mitigate short channel effects
In patterning a transistor, some of a layer of gate dielectric material is allowed to remain over a semiconductor substrate upon which the transistor is formed. This remaining dielectric material retards the implantation of dopants into the underlying substrate, effectively lengthening a channel region of the transistor. This mitigates unwanted short channel effects, such as leakage currents, for example, and thus mitigates yield loss by establishing a transistor that performs in a more predictable or otherwise desirable manner. |
| US09318328B2 |
Method and apparatus for forming silicon film
A method of forming a silicon film includes a first film forming process, an etching process, a doping process, and a second film forming process. In the first film forming process, a silicon film doped with impurities containing boron is formed so as to embed a groove provided on an object to be processed. In the etching process, the silicon film formed in the first film forming process is etched. In the doping process, the silicon film etched in the etching process is doped with impurities containing boron. In the second film forming process, a silicon film doped with impurities containing boron is formed so as to embed the silicon film that is doped in the doping process. |
| US09318326B2 |
Dislocation and stress management by mask-less processes using substrate patterning and methods for device fabrication
Structures and methods for producing active layer stacks of lattice matched, lattice mismatched and thermally mismatched semiconductor materials, with low threading dislocation densities, no layer cracking and minimized wafer bowing, by using epitaxial growth onto elevated substrate regions in a mask-less process. |
| US09318323B2 |
Semiconductor devices with graphene nanoribbons
Semiconductor devices with graphene nanoribbons and methods of manufacture are disclosed. The method includes forming at least one layer of Si material on a substrate. The method further includes forming at least one layer of carbon based material adjacent to the at least one layer of Si. The method further includes patterning at least one of the at least one layer of Si material and the at least one layer of carbon based material. The method further includes forming graphene on the patterned carbon based material. |
| US09318321B2 |
Methods of fabricating memory devices having charged species
Methods for fabricating memory devices having charged species. In one such method, a dielectric material is formed adjacent to a semiconductor. A charged species is introduced into the dielectric material, wherein the charged species has an energy barrier in a range of greater than about 0.5 eV to about 3.0 eV. A control gate is formed adjacent to the dielectric material. |
| US09318320B2 |
Production method for active element substrate, active element substrate, and display device
The present invention provides a method of manufacturing an active element substrate aimed at reducing the production costs of an interlayer insulating film made from a spin-on glass material, for example. In the method of manufacturing an active element substrate, an interlayer insulating film is formed using a printing method that employs a plate. The plate includes: a main pattern that overlaps with signal lines that enclose openings; and fine line patterns that reduce, in the widthwise direction of the signal lines, the inclination of the edges of the printed pattern printed by the main pattern. |
| US09318318B1 |
3D atomic layer gate or junction extender
A method for fabricating a semiconductor device includes receiving a gated finned substrate comprising an isolation layer with a semiconductor fin formed thereon and a gate formed over the semiconductor fin, depositing an atomic layer of dopant on a portion of the semiconductor fin that is laterally adjacent to the gate, forming a lateral spacer on a sidewall of the gate and above a gate extension portion of the atomic layer of dopant, and epitaxially growing a raised source or drain region on the semiconductor fin, that is laterally adjacent to the lateral spacer, from the atomic layer of dopant. The method may also include conducting a low temperature annealing process to diffuse the atomic layer of dopant to the raised source or drain region of the semiconductor fin. A corresponding apparatus is also disclosed herein. |
| US09318317B2 |
Insulating film, method for manufacturing semiconductor device, and semiconductor device
In a semiconductor device including a transistor including an oxide semiconductor film and a protective film over the transistor, an oxide insulating film containing oxygen in excess of the stoichiometric composition is formed as the protective film under the following conditions: a substrate placed in a treatment chamber evacuated to a vacuum level is held at a temperature higher than or equal to 180° C. and lower than or equal to 260° C.; a source gas is introduced into the treatment chamber so that the pressure in the treatment chamber is set to be higher than or equal to 100 Pa and lower than or equal to 250 Pa; and a high-frequency power higher than or equal to 0.17 W/cm2 and lower than or equal to 0.5 W/cm2 is supplied to an electrode provided in the treatment chamber. |
| US09318308B2 |
MALDI imaging and ion source
An ion source for a mass spectrometer is disclosed comprising a lens and mirror arrangement which focuses a laser beam onto the upper surface of a target substrate. The lens has an effective focal length ≦300 mm. The laser beam is directed onto the target substrate at an angle θ with respect to the perpendicular to the target substrate, wherein θ≦3°. One or more ion guides receive ions released from the target substrate and onwardly transmit the ions along an ion path which substantially bypasses the lens and mirror. |
| US09318306B2 |
Interchangeable sputter gun head
In some embodiments, apparatus are provided that provide for flexible processing in both high productivity combinatorial (HPC) and full wafer modes. The apparatus allow for interchangeable functionality that includes deposition with different sizes of targets, plasma treatment, ion beam treatment, and in-situ metrology. The functional modules are designed so that the modules may be interchanged with minimal effort and reduced system downtime. |
| US09318304B2 |
Frequency tuning for dual level radio frequency (RF) pulsing
Methods and apparatus for frequency tuning in process chambers using dual level pulsed power are provided herein. In some embodiments, a method for frequency tuning may include providing a first pulsed power at a first frequency while the first frequency is adjusted to a second frequency, wherein the first frequency is a last known tuned frequency at the first pulsed power, storing the second frequency as the last known tuned frequency at the first pulsed power, providing a second pulsed power at a third frequency while the third frequency is adjusted to a fourth frequency, wherein the first pulsed power and the second pulsed power are different and non-zero, and wherein the third frequency is a last known tuned frequency at the second pulsed power, and storing the fourth frequency as the last known tuned frequency at the second pulsed power. |
| US09318303B2 |
Charged particle beam apparatus
A charged particle beam apparatus includes an electron beam irradiation unit that irradiates a sample with electron beams along a first irradiation axis. A rotation stage holds the sample and has a rotation axis in a direction perpendicular to the first irradiation axis. An ion beam irradiation unit irradiates the sample with ion beams along a second irradiation axis that is substantially parallel to the rotation axis to process the sample into a needle shape. A detection unit detects at least one of charged particles and X rays generated via the sample by the irradiation with the ion beams or the electron beams, and a gaseous ion beam irradiation unit irradiates the sample with gaseous ion beams. A control unit controls the apparatus to incrementally rotate the rotation stage repeatedly by a predetermined angle to rotate the rotation stage by 360° in conjunction with irradiating the entire surface of the needle-shaped sample in a circumferential direction with the gaseous ion beams to remove ions implanted during processing the sample by the ion beams. |
| US09318300B2 |
Charged particle beam instrument
A charged particle beam instrument is offered which can easily perform an in situ observation in a gaseous atmosphere. The charged particle beam instrument (100) is used to perform an observation of a specimen (S) placed in a gaseous atmosphere and has a specimen chamber (2), a gas supply portion (6) for supplying a gas into the specimen chamber (2), a venting portion (7) for venting the specimen chamber (2), a gaseous environment adjuster (4), and a gas controller (812) for controlling the gaseous environment adjuster (4). This adjuster (4) has a gas inflow rate adjusting valve (40) for adjusting the flow rate of the gas supplied into the specimen chamber (2) and a first vacuum gauge (CG1) for measuring the pressure of the gas supplied into the specimen chamber (2). The gas controller (812) sets a target value of pressure for the gas supplied into the specimen chamber (2) based on a predetermined relational expression indicating a relationship between the reading of the first vacuum gauge (CG1) and the pressure inside the specimen chamber (2) and on a corrective coefficient for correcting the reading of the first vacuum gauge (CG1) according to the species of the gas supplied into the specimen chamber (2) and controls the gas inflow rate adjusting valve (40) such that the reading of the first vacuum gauge (CG1) reaches the target value of pressure. |
| US09318297B2 |
Ion beam extraction by discrete ion focusing
An apparatus and methods are disclosed for ion beam extraction. In an implementation, the apparatus includes a plasma source (or plasma) and an ion extractor. The plasma source is adapted to generate ions and the ion extractor is immersed in the plasma source to extract a fraction of the generated ions. The ion extractor is surrounded by a space charge formed at least in part by the extracted ions. The ion extractor includes a biased electrode forming an interface with an insulator. The interface is customized to form a strongly curved potential distribution in the space-charge surrounding the ion extractor. The strongly curved potential distribution focuses the extracted ions towards an opening on a surface of the biased electrode thereby resulting in anion beam. |
| US09318296B2 |
Magnetron
A cathode of a magnetron having a radial extension to accommodate the cathode terminals is supported by arms which have a greater diameter over the region in which they are supported in the glass thimble than over the region of the free ends. This shifts any vibrations to a higher frequency band, which is less liable to be excited in the event the magnetron is moved rapidly as in a linac used for radiotherapy purposes. |
| US09318295B2 |
Carbon nanotube patterning on a metal substrate
A CNT electron source, a method of manufacturing a CNT electron source, and a solar cell utilizing a CNT patterned sculptured substrate are disclosed. Embodiments utilize a metal substrate which enables CNTs to be grown directly from the substrate. An inhibitor may be applied to the metal substrate to inhibit growth of CNTs from the metal substrate. The inhibitor may be precisely applied to the metal substrate in any pattern, thereby enabling the positioning of the CNT groupings to be more precisely controlled. The surface roughness of the metal substrate may be varied to control the density of the CNTs within each CNT grouping. Further, an absorber layer and an acceptor layer may be applied to the CNT electron source to form a solar cell, where a voltage potential may be generated between the acceptor layer and the metal substrate in response to sunlight exposure. |
| US09318290B2 |
High voltage control with digital MEMS logic
A complex logic gate comprising digital MEM switches, coupled to a high voltage MEMS buffer, to provide a high voltage depending upon gate and body voltages of the digital MEM switches. |
| US09318289B2 |
Switching contactor
A switching electrical power contactor having a bi-blade type switch, has ferrous plates attached to the blades to increase the current carrying capacity and reduce the resistance of the switch. The contactor is incorporated on the outside of a mains meter enclosure or in a wall box for a mains meter, within the space defined by the sprung jaws of the meter socket. |
| US09318288B2 |
Power saving method and power saving circuit thereof
A power saving circuit for an electronic device is disclosed. The power saving circuit includes a direct-current (DC) power supply, a sensing unit, and a control unit. The DC power supply is used for providing a DC current. The sensing unit, coupled to the DC power supply, is used for detecting the DC current and operating to generate a voltage signal according to the DC current. The control unit, coupled to the sensing unit, is used for determining whether a system circuit of the electronic device has a light load or a heavy load and generating an enable signal. |
| US09318281B2 |
Steering wheel assembly with user controls
A steering wheel assembly comprises a plurality of control elements disposed on a user-accessible surface of the steering wheel assembly. Each of the plurality of control elements has a plurality of user-selectable operational states and is electrically coupled to a corresponding branch of an electric circuit. The electric circuit defines an output node and is configured to produce a single output signal at the output node. Each of the plurality of control elements is configured for affecting the single output signal based on an active one of the plurality of user-selectable operational states of the respective one of the plurality of control elements. The single output signal is indicative of the active ones of the plurality of user-selectable operational states for each of the plurality of control elements. |
| US09318279B2 |
Button assembly and electronic device with the same
A button assembly includes a keycap, a washer, a positioning member, and a fixing member. The keycap includes a resisting member and an operating member. The operating member extends through a through hole of a sidewall of an electronic device and extends external to the sidewall of the electronic device. The washer is provided between the resisting member and the sidewall to seal a gap between the resisting member and the sidewall. The washer pivots on the operating member. The positioning member is fixed to a bottom of the electronic device. The positioning member separates from the sidewall of the electronic device by a preset distance. The fixing member affixes a flexible circuit board of the electronic device to the positioning member. The fixing member is provided to position a switch of the flexible circuit board abutting against the resisting member at a position opposite to the keycap. |
| US09318278B2 |
Driving rod for medium voltage switching element gear
A device for medium or high voltage switching element gear, the device having: a switching element for connecting two conductors: and a driving rod for operating the switch, wherein the driving rod comprises at least a surface layer of an electrically high resistance material. The electrically high resistance material ensures that a small current will flow through the material due to the present electrical field. This small current will cause a heating of the driving rod, such that condensation is reduced or prevented. |
| US09318275B2 |
Electrochemical device
An electrochemical device is provided with an electric storage element that is constituted by a first electrode sheet, a second electrode sheet, and a separator sheet installed between the two electrode sheets. The separator sheet includes: a first part (high liquid absorptivity part) sandwiched between the two electrode sheets; a second part (low liquid absorptivity part) extending outward from the two electrode sheets; and a third part (contact part) in contact with a rim surface of the second electrode sheet, whereby the electrochemical device can quickly and reliably resolve a phenomenon of the amount of electrolyte decreasing in the part of the separator sheet sandwiched between the two electrode sheets, even if the phenomenon occurs frequently. |
| US09318273B2 |
High voltage EDLC electrodes containing CO2 activated coconut char
A method for producing activated carbon includes heating a coconut shell carbon precursor at a carbonization temperature effective to form a carbon material, and reacting the carbon material with CO2 at an activation temperature effective to form the activated carbon. The resulting activated carbon can be incorporated into a carbon-based electrode of an EDLC. Such EDLC can exhibit a potential window and thus an attendant operating voltage of greater than 3V. |
| US09318270B2 |
Perovskite solar cell
An perovskite solar cell including a substrate; a first electrode provided on the substrate; an electron transport layer, including an electron transporting compound, provided on the first electrode; a perovskite compound layer, including a perovskite compound, provided on the electron transport layer; a hole transport layer, including a hole transport compound, provided on the perovskite compound layer; and a second electrode provided on the hole transport layer. The perovskite compound can be expressed by the general formula XαYβMγ, where X is a halogen atom, Y is an alkylamine compound, M includes a mixture of lead and antimony, and a ratio of α:β:γ is 3:1:1. |
| US09318269B2 |
Packaging structures of an energy storage device
The invention relates to a packaging structure of an energy storage device. At least one unit cell of capacitor is stacked and packaged into the energy storage device. The unit cell is a sandwich structure comprising a solid-state polymer electrolyte between two modified carbonaceous electrodes. An assembly of at least one unit cell of capacitor can be packaged by metallic cases to form a coin cell type or screw type of the packaging structure, packaged with a plastic case by compression molding or injection molding, or packaged by a plastic bag or an aluminum-foil bag and sealed by heat sealing or vacuum heat sealing. Manufacture processes for traditional capacitor modules, such as drilling, welding, screwing, and making scaffolds, are not required. Although the packaging process is simpler and less expensive, the packaged energy storage device can perform better than traditional capacitor modules. |
| US09318268B2 |
Solid electrolytic capacitor and manufacturing method therefor
A solid electrolyte capacitor in which a valve-acting metal substrate with a dielectric oxide film formed on the surface of an anode body is immersed alternately in a monomer solution and an oxidant solution to form a first conductive polymer layer on the surface of the dielectric oxide film. Thereafter, the capacitor element with the first conductive polymer layer is immersed in a soluble conductive polymer solution or a conductive polymer suspension to form a second conductive polymer layer that varies little in film thickness. Then, a cathode layer is formed on the conductive polymer layer. |
| US09318264B2 |
Multilayer ceramic device
Disclosed herein is a multilayer ceramic device, including a device body; an inner electrode arranged in the device body; and an external electrode arranged at outside of the device body and being electrically connected to the inner electrode; wherein the external electrode includes: an inner layer covering the device body; an outer layer covering the inner layer and being exposed to the outside; and an intermediate layer arranged between the inner layer and the outer layer, and made of a mixture of a copper metal and a resin, a surface of the copper metal being coated with an oxide film. |
| US09318263B2 |
Multilayer ceramic capacitor having a floating electrode
There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers, first and second external electrodes; first and second internal electrodes formed to be spaced apart from each other; and a first floating electrode disposed alternately with the first and second internal electrodes in the ceramic body in a thickness direction and having both end portions thereof overlapped with the first and second internal electrodes, respectively, wherein the first floating electrode is disposed so that a length of portion of the first internal electrode overlapped with one end portion of the first floating electrode and a length of portion of the second internal electrode overlapped with the other end portion of the first floating electrode in the ceramic body are different. |
| US09318262B2 |
Film capacitor
A film capacitor includes a capacitor element and first and second external electrodes. The capacitor element includes a dielectric film, a first and a second electrode films facing each other across the dielectric film. The first electrode film includes electrode segments arranged in a matrix form, first fuses connecting the electrode segments adjacent to each other in a first direction, and second fuses connecting the electrode segments adjacent to each other in a second direction perpendicular to the first direction. The second fuses are arranged dispersedly in columns constituted by the electrode segments disposed in the second direction. |
| US09318261B2 |
Power factor correction capacitors
An apparatus includes a case capable of receiving a plurality of capacitive elements, each capacitor element having at least two capacitors, and each capacitor having a capacitive value. The apparatus also includes a cover assembly with a peripheral edge secured to the case. The cover assembly includes, for each of the plurality of capacitive elements, a cover terminal that extends upwardly from the cover assembly generally at a central region of the cover assembly. Each cover terminal is connected to one of the at least two capacitors of the respective one of the plurality of capacitive elements. The cover assembly also includes, for each of the plurality of capacitive elements, a cover terminal that extends upwardly from the cover assembly at a position spaced apart from the cover terminal generally at the central region of the cover assembly. |
| US09318258B2 |
Antenna coil comprising plurality of coil portions
Provided is an antenna coil capable of forming a magnetic field in a desired direction in an efficient manner, while suppressing leakage of magnetic flux into a space other than the space in which the magnetic field is formed. The antenna coil includes a main coil portion formed by winding a length of conductor wire around a first reference axis and an auxiliary coil portion formed by winding the conductor wire around a second reference axis. The second reference axis is set to intersect the magnetic flux of the main coil portion at an axial end of the auxiliary coil portion. The main coil portion and the auxiliary coil portion are connected to together form a closed circuit. |
| US09318257B2 |
Wireless energy transfer for packaging
A packaged product includes a product, a product packaging at least partially covering the product, a device resonator integrated with the product packaging for receiving wireless energy from a source resonator and an electrical component coupled to the device resonator to receive the wireless energy from the device resonator. |
| US09318255B2 |
Coil component
A coil component that includes a drum-shaped core with an upper flange and a lower flange, a winding wound around the core, and an exterior resin between the upper flange and lower flange of the core. The exterior resin includes an inorganic filler at 91 to 95 mass % with respect to the exterior resin, and a resin that has more than one glass transition temperature and has a phase-separated structure. A flange spacing distance between the upper flange and the lower flange is 1.0 mm or less. |
| US09318253B2 |
Hybrid planar common-mode choke
A common-mode choke includes a plurality of hybrid core inductors and a printed circuit board. Each of the plurality of hybrid core inductors includes a first core made of a first material, a second core made of a second material, and at least one common coil configured to generate a magnetic field in both the first and second cores. The printed circuit board is configured to connect the plurality of hybrid core inductors in series. |
| US09318251B2 |
Method of manufacturing an electronic component
A method of manufacturing an electronic component including providing a wire having first and second ends and a pre-formed core, winding the wire about at least a portion of the pre-formed core and connecting the first and second wire ends to at least one terminal for mounting the component to a circuit, and using a wet press process to form a mixture of magnetic and/or non-magnetic material over at least a portion of the wire and pre-formed core, and harden the mixture without exposing the wire and pre-formed core to the damaging forces of a dry press process to form an electronic component with a generally planar top surface with which the component can be picked and placed on a circuit using conventional pick-and-place equipment. |
| US09318242B2 |
Superconducting power transmission system
In a thermally insulated double pipe, a structure is provided in which an inner pipe may be prevented from being appreciably offset relative to an outer pipe due to thermal contraction. The structure includes an inner pipe 101, within which a superconducting cable is mounted, an outer pipe 103 within which the inner pipe is housed, with the inner and outer pipes constituting a thermally insulated double pipe, and an inner pipe support member 104 supporting the inner pipe. The inner pipe support member 104 is secured to the inner and outer pipes. |
| US09318232B2 |
Matrix spectral factorization for data compression, filtering, wireless communications, and radar systems
A new apparatus, system, and technique for performing Matrix Spectral Factorization has been developed, which can factorize in real time high-dimensional matrices with high-order polynomial or non-rational entries. The method can be used for efficient implementation of engineering solutions to problems in Data Compression, Filtering, Wireless Communications, and Radar Systems, etc., which are computationally reducible to matrix spectral factorization. |
| US09318228B2 |
Production of radionuclide molybdenum 99 in a distributed and in situ fashion
A method and apparatus for producing Mo-99 from Mo-100 for the use of the produced Mo-99 in a Tc-99m generator without the use of uranium is presented. Both the method and apparatus employ high energy gamma rays for the transformation of Mo-100 to Mo-99. The high energy gamma rays are produced by exposing a metal target to a moderated neutron output of between 6 MeV and 14 MeV. The resulting Mo-99 spontaneously decays into Tc-99m and can therefore be used in a Tc-99m generator. |
| US09318223B2 |
Programming nonvolatile memory based on statistical analysis of charge level distributions of memory cells
A system including a read module, a delay buffer, and a least mean square module. The read module is configured to read charge levels of memory cells of a nonvolatile memory and to generate read signals based on the charge levels of the memory cells of the nonvolatile memory. The delay buffer is configured to delay the read signals and to generate delayed read signals. The least mean square module is configured to generate mean values of the charge levels used to program the memory cells based on (i) differences between the read signals and the delayed read signals and (ii) a scaling factor. The scaling factor is based on variations in the charge levels due to cycling of the memory cells of the nonvolatile memory. |
| US09318222B2 |
Hierarchical, distributed built-in self-repair solution
A built-in self-test (BIST) circuit to test one or more memory blocks on an integrated circuit. The one or more memory blocks further includes a first memory block and a second memory block A built-in soft-repair controller (BISoR) is provided to soft repair the one or more memory blocks. The BIST circuit in conjunction with the BISoR is configured to test and soft repair the first memory block before performing test and soft repair of the second memory block. |
| US09318221B2 |
Memory device with secure test mode
A method in a memory device that operates in a testing mode, includes receiving a vector to be written to the memory device. The vector is written to the memory device only if the vector belongs to a predefined set of test vectors. If the vector does not belong to the set of test vectors, the vector is converted to one of the test vectors, and the converted vector is written to the memory device. |
| US09318220B2 |
Memory cell coupling compensation
Methods for memory cell coupling compensation and apparatuses configured to perform the same are described. One or more methods for memory cell coupling compensation includes determining a state of a memory cell using a voltage that is changed in accordance with a first memory cell coupling compensation voltage, performing an error check on the state of the memory cell, and determining the state of the memory cell using a voltage that is changed in accordance with a second memory cell coupling compensation voltage in response to the error check failing. |
| US09318219B2 |
Shift register unit and display device
There are provided a shift register unit and a display device in embodiments of the present disclosure, for solving the problem that since two different transistors are used to respectively pull-up and pull-down a gate line connected to a conventional shift register unit, the conventional shift register unit occupies a large area, which causes a large consumption of materials when manufacturing the shift register unit, a high cost of the conventional shift register unit, and a high cost of a display device comprising the conventional shift register unit. The shift register unit comprises: a first capacitor, a first transistor, a pull-up module and a first pull-down module, wherein the first capacitor has a first electrode configured to receive a clock signal, a gate connected with one terminal of the first capacitor, the pull-up module and the first pull-down module, and a second electrode connected with the other terminal of the first capacitor. The first transistor in the shift register unit pull-up or pull-down the level at the gate line connected to the shift register unit. |
| US09318218B2 |
Shift register and driving circuit for liquid crystal display
A shift register for an LCD display includes N shift register units. Each shift register unit outputs a shift signal. An Nth shift register unit includes a waveform-shaping unit electrically coupled to an shift signal output terminal of the Nth register to perform a waveform-shaping operation on the Nth shift signal according to the (N+1)th shift signal output by an (N+1)th shift register, to reduce the feed-through effect which causes display flicker. |
| US09318217B1 |
Programming an electrical fuse with a silicon-controlled rectifier
Circuits for programming an electrical fuse, methods for programming an electrical fuse, and methods for designing a silicon-controlled rectifier for use in programming an electrical fuse. A programming current for the electrical fuse is directed through the electrical fuse and the silicon-controlled rectifier. Upon reaching a programmed resistance value for the electrical fuse, the silicon-controlled rectifier switches from a low-impedance state to a high-impedance state that interrupts the programming current. |
| US09318215B2 |
Systems and methods to update reference voltages of non-volatile memory
A data storage device includes non-volatile memory and a controller. The controller is configured to read first data from the non-volatile memory. The first data indicates a first count of storage elements of the group that have a first activation status when sensed with a first reference voltage at a first time. The controller is configured to read second data from the non-volatile memory. The second data indicates a second count of storage elements of the group that have the first activation status when sensed with the first reference voltage at a second time. The controller is configured to generate an updated first reference voltage at least partially based on a difference between the first count and the second count and based on one or more parameters corresponding to a distribution of threshold voltages of storage elements at the first time. |
| US09318214B2 |
Nonvolatile semiconductor memory device with a three-dimensional structure in which sub-blocks are independently erasable
A memory cell array includes a plurality of memory strings divided into a plurality of sub-blocks, each memory string including a plurality of memory cells which are connected to word lines and each sub-block being erasable independently with respect to the other sub-blocks. During writing, a control unit changes a verification level to be applied to a selected word line included in a selected sub-block depending on whether or not data has been written in a non-selected sub-block. |
| US09318213B2 |
Data storage device and flash memory control method
An overclocking process for a data storage device using a flash memory. A controller for the flash memory tests the flash memory using test clocks with various frequencies to determine at least one clock signal suitable to the flash memory. The clock candidates suitable to the flash memory are selected from the test clocks. The flash memory is operated in a variable-frequency manner by which the flash memory is switched between the clock candidates, such that electromagnetic interference is spread over different bands. |
| US09318211B2 |
Apparatuses and methods including memory array data line selection
Some embodiments include an apparatus having data lines coupled to memory cell strings and a selector configured to selectively couple one of the data lines to a node. The memory cell strings and the selector can be formed in the same memory array of the apparatus. Other embodiments including additional apparatus and methods are described. |
| US09318207B2 |
Nonvolatile semiconductor memory device and method of operating the same
A nonvolatile semiconductor memory device according to an embodiment comprises a control unit, during a data erase, applying at least to a word line connected to a memory cell disposed most to a source line side a lower control voltage than that applied to a word line connected to a memory cell disposed most to a bit line side, of a plurality of word lines connected to at least a plurality of memory cells mutually written with data of an identical number of bits in a cell string. |
| US09318205B2 |
Mapping between program states and data patterns
The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes: programming a group of G memory cells such that a combination of respective program states of the group maps to a constellation point corresponding to a received N unit data pattern, the group used to store N/G units of data per memory cell; wherein the constellation point is one of a number of constellation points of a constellation associated with mapping respective program state combinations of the group of memory cells to N unit data patterns; and wherein the constellation comprises a first mapping shell and a second mapping shell, the constellation points corresponding to the respective first and second mapping shells determined, at least partially, based on a polynomial expression of order equal to G. |
| US09318203B2 |
Semiconductor device being capable of improving program speed and program disturbance characteristics
A semiconductor device includes memory cells electrically coupled to word lines. In addition, the semiconductor device includes an operation circuit performing a program loop on memory cells electrically coupled to a selected word line. Further, the operation circuit increases a program permission voltage applied to a bit line of a program target memory cell when a number of times in which the program loop is performed exceeds a reference number. |
| US09318201B2 |
Semiconductor memory device including three-dimensional array structure
A semiconductor memory device may include source selection transistors coupled to a common source line, source side dummy memory cells coupled between the source selection transistors and the normal memory cells, and drain selection transistors coupled to a bit line. The semiconductor memory device may include drain side dummy memory cells coupled between the drain selection transistors and the normal memory cells. A number of the source side dummy memory cells is less than a number of the drain side dummy memory cells, and a number of the drain selection transistors may be greater than the source selection transistors. |
| US09318196B1 |
Non-volatile semiconductor memory device
In a non-volatile semiconductor memory device capable of programming SRAM data in an SRAM into a non-volatile memory unit while implementing a high-speed operation in the SRAM, a voltage required to program the SRAM data into the non-volatile memory unit can be lowered. Thus, the SRAM can be operated at high speed with a low power supply voltage because the thickness of a gate insulating film of each of a first access transistor, a second access transistor, a first load transistor, a second load transistor, a first drive transistor, and a second drive transistor constituting the SRAM connected to the non-volatile memory unit can be set to 4 [nm] or less. Therefore, the SRAM data in the SRAM can be programmed into the non-volatile memory unit while a high-speed operation in the SRAM can be implemented. |
| US09318191B2 |
Programming nonvolatile memory device using program voltage with variable offset between programming state distributions
A method of programming a nonvolatile memory device comprises applying at least one test program pulse to selected memory cells located in a scan read area, performing a scan read operation on the selected memory cells following application of the at least one test program pulse to detect at least one one-shot upper cell, calculating an offset voltage corresponding to a scan read region at which the scan read operation is performed, setting a program start bias using the offset voltage, and executing at least one program loop using the program start bias. |
| US09318189B2 |
Sense amplifier circuit
A sense amplifier circuit includes first and second lines and first and second inverters. Each inverter includes an input terminal, an output terminal, and a power source terminal. A second signal line potential is supplied to the first inverter input terminal. The second inverter input terminal is connected to the first inverter input terminal. A first signal line potential is supplied to the second inverter input terminal. A first switch transistor is connected to the first inverter power source terminal and has a gate connected to the second signal line. A switch second transistor is connected to the second inverter power source terminal and has a gate connected to the first signal line. |
| US09318188B2 |
Semiconductor memory with data line capacitive coupling
A semiconductor memory is disclosed that includes a first data line, a second data line, a first coupling line and a second coupling line. The first coupling line is configured to capacitively couple the first coupling line with the first data line. The second coupling line is configured to capacitively couple the second coupling line with the second data line. |
| US09318185B2 |
Memory module and memory system including the same
A memory module may include m memory devices. Each of the m memory devices may be divided into n regions each region including a plurality of rows corresponding to row addresses, where m and n are integers equal to or greater than 2. An address detector included in each of the m memory devices, wherein for each of the address detectors, the address detector may be configured to count a number of accesses to a particular row address included in one region of each of the m memory devices during a predetermined time period, and be configured to output a detect signal when the number of the counted accesses reaches a reference value. Each of the max-count address generators may be configured to count a number of accesses for a set of row addresses different from the sets of row addresses for which the other max-count address generators count accesses. |
| US09318183B2 |
Maintenance operations in a DRAM
A system includes a memory controller and a memory device having a command interface and a plurality of memory banks, each with a plurality of rows of memory cells. The memory controller transmits an auto-refresh command to the memory device. Responsive to the auto-refresh command, during a first time interval, the memory device performs refresh operations to refresh the memory cells and the command interface of the memory device is placed into a calibration mode for the duration of the first time interval. Concurrently, during at least a portion of the first time interval, the memory controller performs a calibration of the command interface of the memory device. The auto-refresh command may specify an order in which memory banks of the memory device are to be refreshed, such that the memory device sequentially refreshes a respective row in the plurality of memory banks in the specified bank order. |
| US09318179B2 |
Spin-transfer torque magnetic random access memory with perpendicular magnetic anisotropy multilayers
A spin-transfer torque magnetic random access memory (STTMRAM) element includes a composite fixed layer formed on top of a substrate and a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer. The magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate. The composite layers are made of multiple repeats of a bilayer unit which consists of a non-magnetic insulating layer and magnetic layer with thicknesses adjusted in a range that makes the magnetization having a preferred direction perpendicular to film plane. |
| US09318177B2 |
Semiconductor devices and semiconductor systems including the same
The semiconductor device includes an internal command generator and an internal address generator. The internal command generator generates first and second command latch signals from first and second internal clock signals in response to an external control signal and latches a command signal in response to the first and second command latch signals to generate a synthesized internal command signal. The internal address generator generates first and second address latch signals from the first and second internal clock signals in response to the external control signal and latches an address signal in response to the first and second address latch signals to generate a synthesized internal address signal. |
| US09318175B1 |
Word line driver circuit for semiconductor memory device
A word line driver circuit may include a first active region, a second active region spaced apart from the first active region in a first direction and spaced apart from the first active region in a first direction and spaced apart from the first active region in a second direction, which is substantially perpendicular to the first direction, first contacts formed at both ends of each of the first and second active regions, second contacts formed in the first and second active regions between the first contacts, a gate region between the first contact formed on a second end of the first active region and the second contact and between the first contact formed on a first end of the second active region and the second contact in a straight line, counterclockwise surrounding a part of the second contact formed in the first active region, and clockwise surrounding a part of the second contact formed in the second active region. |
| US09318174B1 |
Memory systems and methods involving high speed local address circuitry
Systems and methods of memory and memory operation are disclosed, such as providing a circuit including a local address driver voltage source for memory decoding. In one exemplary implementation, an illustrative circuit may comprise a first buffer and a capacitor. The first buffer may comprise a power input and a ground input. The capacitor may comprise a first terminal connected to the power input of the first buffer and a second terminal connected to the ground input of the first buffer. When the first buffer draws a current from the power input, at least a portion of the current may be supplied by the capacitor. |
| US09318173B2 |
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information based at least in part on the measurement of the electrical characteristic. An example apparatus includes a signal line model including a model signal line configured to model electrical characteristics of a signal line. The apparatus further includes a measurement circuit coupled to the signal line model and configured to measure the electrical characteristic of the model signal line responsive to an input signal provided to the model signal line. The measurement circuit is further configured to provide measurement information based at least in part on the measurement to set a signal applied to the signal line. |
| US09318168B2 |
Memory system for continuously mapping addresses of a memory module having defective locations
In one example embodiment, a memory system includes a memory module and a memory controller. The memory module is configured generate density information of the memory module based on a number of the bad pages of the memory module, the bad pages being pages that have a fault. The memory controller is configured to map a continuous physical address to a dynamic random access memory (dram) address of the memory module based on the density information received from the memory module. |
| US09318165B2 |
Method and apparatus for low-level input sense amplification
A sense amplifier is disclosed that includes an amplifier circuit configured to receive, at an input, an input signal including an input level, the amplifier circuit configured to provide an amplified output signal including a gain with respect to the input level; and a feedback circuit coupled to receive the amplified output signal from the amplifier circuit, the feedback circuit configured to provide, at the input of the amplifier circuit, an adjusted version of the amplified output signal including a modified output magnitude based on common mode feedback. |
| US09318164B2 |
Semiconductor memory device with power-saving signal
A semiconductor memory device includes a memory cell array, a voltage generator suitable for generating voltages used for controlling the memory cell array in response to a power-saving signal, and a control logic suitable for providing a power-saving signal to the voltage generator, based on a chip select signal. The control logic includes a delay block suitable for delaying the chip select signal and generating the power-saving signal based on the delayed chip select signal. |
| US09318157B2 |
Stacked device detection and identification
Various embodiments include apparatus and methods having circuitry to detect and/or assign identification information to dice arranged in a stack and coupled by conductive paths. |
| US09318152B2 |
Super share
A method and apparatus for sharing media content between electronic equipment includes transferring session data from a first electronic equipment to a second electronic equipment, said session data including a queue of media content executing or executable on the first electronic equipment, and transferring media content identified in the session data to the second electronic equipment. |
| US09318151B2 |
Mobile terminal and method for controlling the same
A method for controlling a mobile terminal includes displaying a preview image input by a camera in an augmented reality (AR) mode, displaying AR data corresponding to at least one object in the preview image, and providing a user interface for editing at least a portion of the preview image including the AR data in the AR mode in order to generate an edited preview image. |
| US09318149B2 |
Method and system of composite broadcast control
A method, a system, an apparatus, and a computer program product for composite broadcast control are provided. The apparatus or system presents broadcast control options to a user as a plurality of fundamental production elements, the plurality of fundamental production elements comprising at least one of a background an effect, a transition, and a stored clip, wherein the background can be combined with any of the effect, the transition, and the stored clip. The apparatus/system receives a selection from a user of fundamental production elements, and thereafter builds a composited scene by layering the selected production elements. The apparatus may display a preview of the composited scene prior to selection of the composited scene for output. |
| US09318146B2 |
Method and apparatus for writing and using servo correction data
Methods and apparatuses for generating and using servo correction data are disclosed. In one embodiment, an apparatus may comprise a data storage medium having a first track and a second track, servo correction data for the first track and the second track stored on the first track, and no servo correction data stored on the second track, and a controller configured to correct servo errors based on the servo correction data. In another embodiment a method may comprise receiving servo information related to a first data storage medium having a first track and a second track, generating one or more position error signals (PES) based on the servo information, generating servo correction data based on the one or more PES, and storing the servo correction data for the first track and the second track on the first track. |
| US09318145B2 |
Method for decoding under optical and electronic noise
The present techniques provide systems and methods for decoding an optical data signal in an optical system to retrieve source information while decreasing errors resulting from optical and electronic noise in the optical system. The techniques involve using decoding algorithms to estimate the a posteriori state probabilities and the a posteriori transition probabilities of the data encoding, and estimating bit state probabilities. The probability density function used to estimate bit states is parameterized by the expected optical and electronic noise in the optical system. Different optical and electronic noise variances, or different probability densities, may be stored in registers or look-up tables to be accessed by a decoder while decoding the optical data signal. |
| US09318140B2 |
Exchange enhanced cap manufactured with argon and oxygen implantation
A magnetic media having a novel cap layer that allows the cap layer having improved exchange coupling and reduced thickness. The cap layer is doped with a non-reactive element such as Ar, Kr, Xe, Ne or He preferably Ar. This doping reduces increases exchange coupling and reduces the dead layer, allowing the cap layer to be made thinner for reduced magnetic spacing and improved data recording performance. |
| US09318135B2 |
Method of manufacturing piezoelectric element
An method of manufacturing a piezoelectric element easily and surely forms polymer coatings on peripheral end faces of the piezoelectric element without deteriorating a yield of the piezoelectric element. The method includes steps of cutting a piezoelectric element out from a base piezoelectric material plate so that peripheral end faces are formed to define a peripheral shape of the piezoelectric element, and forming polymer coatings on at least objective areas of the peripheral end faces of the piezoelectric element by vapor deposition polymerization, respectively. |
| US09318129B2 |
System and method for enhancing speech activity detection using facial feature detection
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for processing audio. A system configured to practice the method monitors, via a processor of a computing device, an image feed of a user interacting with the computing device and identifies an audio start event in the image feed based on face detection of the user looking at the computing device or a specific region of the computing device. The image feed can be a video stream. The audio start event can be based on a head size, orientation or distance from the computing device, eye position or direction, device orientation, mouth movement, and/or other user features. Then the system initiates processing of a received audio signal based on the audio start event. The system can also identify an audio end event in the image feed and end processing of the received audio signal based on the end event. |
| US09318128B1 |
Methods and systems for determining instructions for applications that are recognizable by a voice interface
Methods and systems for facilitating development of voice-enabled applications are provided. The method may comprise receiving, at a computing device, a plurality of actions associated with a given application, parameters associated with each respective action, and example instructions responsive to respective actions. The method may also comprise determining candidate instructions based on the actions, parameters, and example instructions. Each candidate instruction may comprise one or more grammars recognizable by a voice interface for the given application. The method may further comprise the computing device receiving respective acceptance information for each candidate instruction, and comparing at least a portion of the respective acceptance information with a stored acceptance information log comprising predetermined acceptance information so as to determine a correlation. Still further, the method may comprise determining a set of instructions comprising one or more of the candidate instructions based on the determined correlation. |
| US09318127B2 |
Device and method for improved magnitude response and temporal alignment in a phase vocoder based bandwidth extension method for audio signals
An apparatus for generating a bandwidth extended audio signal from an input signal, includes a patch generator for generating one or more patch signals from the input signal, wherein the patch generator is configured for performing a time stretching of subband signals from an analysis filterbank, and wherein the patch generator further includes a phase adjuster for adjusting phases of the subband signals using a filterbank-channel dependent phase correction. |
| US09318126B2 |
Voice clarification apparatus
The voice clarification apparatus includes a plurality of band-pass filters that respectively extract a plurality of band components, which are included in a voice band, from an input audio signal; a gain determination unit that determines a gain according to the level of a signal of a band component which is extracted by at least one band-pass filter of the plurality of band-pass filters; a level adjustment unit that adjusts the levels of signals of the plurality of band components which are extracted by the plurality of band-pass filters using the gain; and a first addition unit that adds a signal which is based on the audio signal to a signal in which the gain is adjusted by the level adjustment unit, and outputs a signal obtained through the addition. |
| US09318125B2 |
Noise reduction devices and noise reduction methods
A noise reduction device may be provided. The noise reduction device may include: an input configured to receive an input signal including a representation in a frequency domain of an audio signal, wherein the representation includes a plurality of time frames and a plurality of coefficients for each time frame; a noise detection circuit configured to determine a first indicator being indicative of a bandwidth of a coefficient over at least two time; a noise reduction circuit configured to reduce based on the first indicator a noise component in the audio signal; and an output configured to output an output signal including a representation in the frequency domain of the audio signal with the reduced noise component. |
| US09318119B2 |
Noise suppression using integrated frequency-domain signals
To provide a noise suppressing method and apparatus capable of achieving high-quality noise suppression using a lower amount of operations. Noise contained in an input signal is suppressed by transforming the input signal into frequency-domain signals; integrating bands of the frequency-domain signals to determine integrated frequency-domain signals; determining estimated noise based on the integrated frequency-domain signals; determining spectral gains based on the estimated noise and said integrated frequency-domain signals; and weighting said frequency-domain signals by the spectral gains. |
| US09318115B2 |
Efficient coding of binary strings for low bit rate entropy audio coding
It is inter alia disclosed to apply a function on a string in accordance with a rule of a set of rules, the string comprising first and second representatives, wherein the function ensures that the string comprises at least one of a predetermined representative at an end of the string after the function has been applied; and to determine a representation of the string, wherein said representation comprises at least one encoded representative, each of said at least one encoded representative being associated with at least one representative of the string, wherein said representation does not comprise an encoded representative being associated with at least one of the at least one predetermined representative at the end of the string. |
| US09318110B2 |
Audio transcription generator and editor
A system for correcting errors in automatically generated audio transcriptions includes an audio recorder, a computerized transcription generator, a voice recording, a collection of link data, transcription text, an audio player, a system of cross linking, and a text editor including a text display with a cursor. The system permits a user to correct transcription errors using techniques of jump to position; show position; and track playback. |
| US09318103B2 |
System and method for recognizing a user voice command in noisy environment
An automatic speech recognition system for recognizing a user voice command in noisy environment, including: matching means for matching elements retrieved from speech units forming said command with templates in a template library; characterized by processing means including a MultiLayer Perceptron for computing posterior templates (P(Otemplate(q))) stored as said templates in said template library; means for retrieving posterior vectors (P(Otest(q))) from said speech units, said posterior vectors being used as said elements. The present invention relates also to a method for recognizing a user voice command in noisy environments. |
| US09318100B2 |
Supplementing audio recorded in a media file
Methods, systems, and computer program products are provided for supplementing audio recorded in a media file. Embodiments include receiving a media file; identifying the subject matter of audio portion of the media file; identifying supplemental content for supplementing the subject matter recorded in the audio portion of the media file; and inserting in the media file markup for rendering the supplemental content. |
| US09318095B2 |
Active vibration noise control device
The disclosed active vibration noise control device is suitable for use in cancelling out vibration noise by outputting control noise from a plurality of speakers. When a vibration noise frequency is in a dip bandwidth, the active vibration noise control device alters the step size parameters used to update the filter coefficient at at least one filter coefficient update means from among a plurality of filter coefficient update means. Thus, the filter coefficient update speed can be retarded in unstable dip bandwidths, enabling loss in silencing effect which occurs during dip characteristics to be appropriately reduced. |
| US09318094B2 |
Adaptive noise canceling architecture for a personal audio device
A personal audio device, such as a wireless telephone, includes an adaptive noise canceling (ANC) circuit that adaptively generates an anti-noise signal from a reference microphone signal that measures the ambient audio and an error microphone signal that measures the output of an output transducer plus any ambient audio at that location and injects the anti-noise signal at the transducer output to cause cancellation of ambient audio sounds. A processing circuit uses the reference and error microphone to generate the anti-noise signal, which can be generated by an adaptive filter operating at a multiple of the ANC coefficient update rate. Downlink audio can be combined with the high data rate anti-noise signal by interpolation. High-pass filters in the control paths reduce DC offset in the ANC circuits, and ANC coefficient adaptation can be halted when downlink audio is not detected. |
| US09318093B2 |
Active noise-reduction apparatus and method
According to an embodiment, an active noise-reduction apparatus includes following elements. The microphone converts a sound including a target sound into an error signal. The control filter generates a control signal in accordance with a control characteristic. The first control effect estimation filter converts the control signal into a first signal in accordance with an estimated secondary path characteristic. The second control effect estimation filter converts the control signal into a second signal in accordance with a processed secondary path characteristic obtained by shortening a delay of the estimated secondary path characteristic. The updating unit updates the control characteristic based on the error signal, the first signal, and the second signal. |
| US09318085B2 |
Automatic player musical instrument, automatic playing system incorporated therein and overheat protector for automatic playing system
An automatic player piano is equipped with solenoid-operated actuators for moving keys in automatic performance without fingering of a human player, and an overheat protector is provided for the solenoid-operated actuators so as to prevent the solenoid-operated actuators from overheat; the overheat protector includes not only a temperature sensor and a rescuer but also an information processor, and a computer program runs on the information processor so as to realize a temperature rise estimator for estimating a solenoid temperature on the basis of the amount of current flowing through the solenoid and an environmental temperature determined through the temperature sensor estimator and an overheat detector so as to find an overheated solenoid, thereby making the rescuer interrupt the current for preventing the solenoid-operated actuator from the overheat. |
| US09318081B2 |
Constant tension device
A support is configured to support and apply a constant or near-constant tension onto a wire or string, such as a musical string of a stringed musical instrument. The wire is attached to a carrier that moves axially. One or more springs operate between the carrier and a point that is fixed relative to the carrier and apply a transverse spring force to the carrier. A spring angle is defined between a line normal to the axis and a line of action of each spring. The transverse spring force can have an axial force component and an axial spring rate that is a function of the spring angle. The carrier can be positioned so that the axial spring rate is zero, negative or positive. A primary spring can apply a primary force directed coaxial with the wire. If the wire changes in length the primary force will correspondingly change, as will the axial force component. The transverse spring can be selected so that the axial force component of the transverse spring approximates the change in the force applied by the primary spring so that the axial force applied to the carrier and wire remains generally constant. |
| US09318080B1 |
Guitar having a compartment to ergonomically hold portable computing devices
A guitar having a compartment for a portable computing device, said compartment comprising of a rectangular opening being embedded on said guitar body to fit said portable computing device, a built-in recharger and an adaptor or a guitar interface; a cover being connected to said bottom of said opening pivotally coupled to said opening and being adjusted by a user, said cover having an inner surface and outer surface; a case being connected to said inner surface of said cover to receive said portable computing device; and a securing means to secure said cover to said opening in a specific angle; wherein by placing said portable computing device on said cover, the user can adjust the angle of said cover to see said portable computing device. |
| US09318078B2 |
Intelligent memory management system and method for visualization of information
A computer system and method removes or changes graphic content not discernable from the rendering tree stored in memory. The content modified depends on its redraw area in a physical monitor or a pane, which is contained within a layout in a frame. One or more frames are defined as part of a logical monitor. A physical monitor may have one or more logical monitors. Each redraw area is determined and graphic content is modified with different graphic having a memory use less than the original graphic that is determined not to be discernable based on the resolution and zoom information. |
| US09318075B2 |
Image driving using color-compensated image data that has been color-scheme converted
An image driving method includes receiving basic image data including a first set of primary colors. The basic image data is transformed into output image data including a second set of primary colors. Luminance values of the second set of primary colors of the output image data is reduced to compensate the luminance values of the second set of primary colors of the output image data when a luminance value of the first set of primary color of the basic image data is saturated. Image distortion is thereby minimized or prevented. |
| US09318074B2 |
Portable terminal capable of controlling backlight and method for controlling backlight thereof
Disclosed is a method for controlling a backlight of a portable terminal, which includes the steps of storing preset backlight brightness values so as to correspond to the backlight brightness values to backlight steps, detecting a backlight brightness value stored so as to correspond to the backlight step required by a user in backlight regulation mode, and regulating the backlight brightness according to the detected backlight brightness value. Further, since the present invention can regulate the backlight brightness at night, the illumination intensity of which is low, the consumption of the battery can be reduced. |
| US09318066B2 |
Display panel having a boosting voltage applied to a subpixel electrode, and method of driving the same
A display panel comprises a plurality of pixels. A first pixel among the plurality of pixels comprises a first subpixel which further comprises a first subpixel electrode, a first switching element configured to apply a data voltage to the first subpixel electrode, and a second switching element applying a boosting voltage to the first subpixel electrode. The first pixel further comprises a second subpixel comprising a second subpixel electrode and a third switching element applying the data voltage to the low pixel electrode. Accordingly, the display quality and the reliability of the display panel may be improved. |
| US09318062B2 |
Liquid crystal display device and method of driving the same
According to one embodiment, a liquid crystal display device includes a driving module configured to apply a DC bias to a voltage corresponding to a gradation which is displayed on a pixel and to supply a resultant voltage to a pixel electrode, the driving module being configured to apply a higher DC bias in a white display state in which a potential difference is produced between a pixel electrode and a common electrode than in a black display state in which no potential difference is produced between the pixel electrode and the common electrode. |
| US09318061B2 |
Method and device for mapping input grayscales into output luminance
A method for mapping an input grayscale into an output luminance includes selecting a first reference grayscale, a first reference luminance, a second reference grayscale and a second reference luminance according to an input grayscale, generating a middle reference grayscale and a middle luminance, replacing a value of the first or second reference grayscale by a value of the middle reference grayscale, and replacing a value of the first or second reference luminance by a value of the middle luminance according to the middle reference grayscale and the input grayscale, and generating an output luminance by computing a linear transformation equation. |
| US09318055B2 |
Stage circuit and organic light emitting display including the same
A stage circuit including a plurality of stages connected to each other, where each of the stages includes: an output unit configured to output a voltage of a first power source or a signal of a third input terminal to an output terminal, based on a voltage applied to a first node or a second node; a first driver configured to control a voltage at a third node, based on signals of a first input terminal, a second input terminal and the third input terminal; a second driver configured to control the voltage at the first node, based on the signal of the second input terminal and the voltage at the third node; and a first transistor connected between the second node and the third node and maintained in a turn-on state. |
| US09318053B2 |
Semiconductor device and driving method thereof
The semiconductor device includes a plurality of pixels each including a plurality of sub-pixels, a power supply line and a plurality of signal lines for operating the plurality of pixels, a driver circuit for outputting signals to the plurality of signal lines, a signal input circuit for controlling the driver circuit, a compensation circuit which determines if a pixel has a normal state, a defective bright spot, or a point defect in the case where a current value detected shows an abnormal value, and accordingly outputs a compensation signal to the signal input circuit, and a current value detection circuit which detects a current value flowing through the power supply line when each sub-pixel is lighted. Thus, a pixel including a sub-pixel which shows an abnormal current value when lighted is compensated by a signal output from the driver circuit. |
| US09318052B2 |
Compensating organic light emitting diode display device and method for driving the same using two adjacent gate lines per pixel
Disclosed is an organic light emitting diode display device and a method for driving the same. The device includes a display panel having a plurality of sub-pixels wherein the sub-pixels formed on each horizontal line are connected to a gate line on the same horizontal line and are further connected to a gate line on a next horizontal line to further receive a gate on signal from the gate line on the next horizontal line so as to display an image, a power supply supplying first and second power signals to power lines of the display panel and supplying a compensation voltage to a compensation power line, and a timing controller for arranging external input video data suitably for driving of the display panel and controlling gate and data drivers such that the image is displayed based on a data voltage compensated for by the compensation voltage. |
| US09318051B2 |
Display device and driving method thereof
A display device includes a pixel, a data line, a scan line, a data driver, and a scan driver. The pixel is configured to display an image. The data line is configured to transmit data voltages to the pixel. The scan line is configured to transmit a scan signal to the pixel. The data driver is configured to: float the data line during a first period of a frame, apply, after the first period, a first data voltage to the data line during a second period of the frame, and apply, after the second period, a voltage waveform to the data line that varies the applied voltage from the first data voltage to a target voltage during a third period of the frame. The scan driver is configured to selectively apply the scan signal to the scan line. |
| US09318050B2 |
Organic light emitting display with pixel sensing circuit and driving method thereof
An organic light emitting display that can stably extract information from pixels. A driving method of the organic light emitting display includes: generating first digital values by sensing deterioration information of organic light emitting diodes respectively included in a plurality of pixels coupled to a data line during two or more continuous frame periods; storing the first digital values in a memory; generating second digital values by sensing threshold voltage and mobility information of driving transistors respectively included in the pixels during two or more continuous frame periods; storing the second digital values in the memory; converting input data into calibration data according to the information stored in the memory to display an image having a uniform brightness, irrespective of the deterioration information of the organic light emitting diodes and the threshold voltage and mobility information of the driving transistors; and supplying a data signal in accordance with the calibration data to the data line. |
| US09318046B2 |
Power supply circuit and display apparatus
A power supply circuit and display apparatus, comprising power source (1), charging/discharging module (2), detecting module (3), the detecting module detects detecting parameter on power-supply path, feeds back corresponding mode signal to the power source according to the detected detecting parameter, and outputs preset operation voltage to load (4); the power source receives the mode signal fed back from the detecting module, outputs power supply voltage corresponding to the mode signal, and charges the charging/discharging module when the mode signal is the low power signal; and the charging/discharging module is discharged to the detecting module when the power source outputs the supply voltage corresponding to the high power signal, and is charged when the power source outputs the supply voltage corresponding to the low power signal. The circuit can avoid effectively that the consumption of the power source fluctuates significantly with the power consumption changing of the load thereby the power source operates stably. |
| US09318045B2 |
Electro-optical device, method for driving electro-optical device, and electronic apparatus
An electro-optical device includes a display unit in which a plurality of pixel circuits is arranged; and a driving circuit that is disposed to be distanced from the display unit and outputs a signal for driving the plurality of pixel circuits. The display unit and the driving circuit are formed on a first surface of a semiconductor substrate. Each of the pixel circuits has a first transistor, the driving circuit has a second transistor, and the first transistor is formed in a first well and a first substrate potential is supplied. The second transistor is formed in a second well, the first well has the same conductivity type as the second well has, and the first well and the second well are separated from each other. |
| US09318042B2 |
Display device and control method thereof
A display device for sequentially displaying a plurality of subframes (images) within one frame period according to an image source signal, the device including: a pixel array including a plurality of pixels; a scale factor generator configured to separately calculate electric current values of the electric to be consumed by each of the plurality of respective subframes (per frame period), and to calculate an initial scale factor by comparing the electric current value with a threshold electric current value, and to generate a correction scale factor (for each among the plurality of subframes) of the first frame by using the initial scale factor and a correction scale factor of a previous frame (previous to the first frame) (and of the same subframe index) corresponding to the initial scale factor; and an image processor configured to convert a gray data of the image source signal of the first frame. |
| US09318040B1 |
Display panel
A display panel includes a plurality of sub-pixels, scanning lines and data lines. The sub-pixels are disposed on a first substrate and include a plurality of rows and columns, and each sub-pixel of a first row of two adjoining rows is shifted by a predetermined distance along a first direction with respect to each sub-pixel of a second row of two adjoining rows. The scanning lines extend in the first direction and corresponding to the sub-pixels of the rows respectively. Each data line includes a plurality of first data segments and second data segments connected alternately. The first data segment extends along a second direction and partially overlaps the scanning line in a vertical direction. Each second data segment is disposed on one side of the scanning line, and at least a portion of the second data segments extends along a third direction different from the first and second directions. |
| US09318039B2 |
Method of operating an organic light emitting display device, and organic light emitting display device
A method of operating an organic light emitting diode (OLED) display device and an OLED display using the method are disclosed. In one aspect, input data is received, the input data is converted into mapped data based on random data mapping information, one sub-frame pattern is selected from a plurality of sub-frame patterns based on the random data mapping information, and an image is formed for the display device based on the mapped data and the selected sub-frame pattern. |
| US09318037B2 |
Apparatus for eliminating image sticking, display device and method for eliminating image sticking
An apparatus for eliminating image sticking, a display device and a method for eliminating image sticking. The apparatus for eliminating image sticking comprises a Multi-Level Gate (MLG) circuit (1) and a gate driving module (2), the MLG circuit (1) is configured to receive a gate ON voltage unmodulated and output a modulated gate ON voltage according to an enable signal; the gate driving module (2) receives the gate ON voltage unmodulated and the modulated gate ON voltage outputted from the MLG circuit, and outputs one of the gate ON voltage unmodulated and the modulated gate ON voltage for each layer of gate lines among different layers of gate lines. No change in process on a panel side is required and a short period of time is taken to eliminate the image sticking. The image sticking eliminating effect is controllable because a gate signal and its falling time are controllable, and the image sticking eliminating is more flexible. |
| US09318036B2 |
Method of compensating image data and display apparatus for performing the same
A method of compensating image data, the method includes generating a compensation data of an image data in accordance with a temperature value by using a compensation data of a previous frame and a compensation data generated through a look-up table which is mapped with corresponding to a compensation data of a previous frame and a set temperature value which is smaller than and closest to the temperature value or which is greater than and closest to the temperature value among set temperature values. |
| US09318028B1 |
Breaching training door
A training door for breaching tools has a frame on which the door is hung by hinges at a hinge edge, while at an opposite edge being retained to a jamb by one or more non-shearing bolts. When the door is forced by a breaching tool at the bolt location, the jamb is forced laterally away from the door edge, against rubber mounts that allow limited jamb movement. As the door is forced in (or out, depending on its swing direction), with the jamb spread away somewhat the bolt will bend and fail pulling out of its socket. Replaceable sleeves are secured to the door edge, in several sections of the door to avoid breach tool damage on the door itself. |
| US09318021B2 |
Vehicle mounted traffic light and system
The vehicle mounted traffic light adds a mini-signal light located inside a vehicle on the deck behind the back seat of the vehicle, to enable its signaling units, such as signal lights, to be visible to other vehicles, such as cars, behind the vehicle. A wireless signal from a wireless transmitter associated with an originating signal system unit associated with a traffic signal light transmits the signal light state of the traffic signal light to a receiver associated with the vehicle, such located as inside the vehicle. The receiver relays the received signal light state information to a processor associated with the vehicle mounted traffic light, such as located inside the vehicle, which issues commands to the signaling units of the vehicle mounted traffic light to mimic or correspond to the received signal light state of the traffic signal light. |
| US09318019B2 |
Traffic-related information dictionary creating device, traffic-related information dictionary creating method, and traffic-related information dictionary creating program
Devices, methods, and programs acquire provided information and position information that corresponds to the provided information from a provided information storage unit. The provided information has been provided to the provided information storage unit by an information provider and stored in the provided information unit with the position information. The position information specifies a position at which the provided information was provided by the information provider. The devices, methods, and programs acquire traffic-related information from a traffic-related information distribution unit. The traffic-related information includes information that specifies an occurring traffic-related event and information that specifies a range of the occurring traffic-related event. Based on the acquired position information and the acquired traffic-related information, the devices, methods, and programs identify the provided information that is provided within the range of the occurring traffic-related event, and associate and store a phrase included in the identified provided information with the occurring traffic-related event. |
| US09318018B2 |
User interface method for terminal for vehicle and apparatus thereof
A user interface method for a terminal for a vehicle is provided. The terminal obtains position information to detect a point of a road. A road image of a driving direction is obtained, a lanes of the road represented on the obtained road image is recognized, and a point of a road and lane in which the vehicle having the terminal arranged therein is detected. A virtual road image regarding the recognized lanes is generated, and the generated virtual lanes are added to the road image of the driving direction of the vehicle, and displayed. Traffic information for each lane and surrounding information (i.e. lane closure, construction, accident, etc.,) at the detected point of the relevant road are obtained, and the obtained information is displayed for each virtual lane. |
| US09318016B2 |
Mobile terminal and device control method for the same
A mobile terminal and device control method for the same are disclosed. The device control method for a mobile terminal having a touch screen, includes: downloading, during registration of a device capable of short-range wireless communication operating in a short-range communication mode, a user interface (UI) of the device; finding a list of registered devices, displaying the found list, selecting a device from the displayed list, calling the selected device, and connecting to the selected device; and displaying a device UI of the connected device on the touch screen, and controlling the connected device through the displayed device UI according to a touch operation. Electronic devices within a range can be easily and accurately controlled using a mobile terminal having a touch screen. In particular, the use of a user interface downloaded from an electronic device enables easy control of full functions of the device, enhancing user convenience. |
| US09318013B2 |
Vibrating, pulse-monitored, alarm bracelet
A vibrating pulse monitored alarm bracelet consists of control panel/display/capacitive touchscreen, a flash memory to collect and communicate data, two rechargeable batteries which serve as the power source for the device, sensors to collect pulse rate data, vibrating pads to provide silent, electric pulse stimuli, and a neoprene band to secure the device to its wearer. |
| US09318012B2 |
Noise correcting patient fall risk state system and method for predicting patient falls
A patient fall prediction system from noise corrected surveillance video by identifying patient fall risk states. A hierarchy of discrete patient fall risk states, from no risk, to intermediate risk to critical risk, describe a patient fall risk. The system transitions from state to state based on changes detected in corresponding areas between a current video frame and a background frame. A set of fall risk state transition rules govern the entry into new fall risk states. A video frame is subdivided into multiple predetermined areas, at least two contain images of the patient. The number of false alarms are reduced by accurately defining fall risk state transition rules and by reducing the opportunity for noise to impact the state transition results. Frames that contain new changes are excluded from fall risk state processing, i.e., the first video frame that might cause an erroneous elevated fall risk state is culled. |
| US09318005B2 |
Methods, systems, and products for security services
Security systems notify of alarms. Two separate communications paths are established from an alarm controller. One of the communications paths is selected based on performance, cost, or urgency. |
| US09318003B2 |
Gaming system with failover and takeover capability
Managing failover and takeover of a game session in a computerized gaming system adapted for operating a plurality of client gaming machine terminals communicatively coupled to one of a plurality of game application servers, comprising: sending a request of a game session from a client gaming machine to a first game application server; determining in the client gaming machine non-responsiveness to the request; re-transmitting the request from the client gaming machine to a second game application server; constructing the game session state in the second game application server; processing the request in the second game application server; and sending a response dependent on the request from the game application server to the client gaming machine. |
| US09318002B2 |
Gaming system and method for providing a game which populates symbols along a path
In various embodiments, the present disclosure relates generally to a game including a path of different symbol display positions. The gaming system generates one or more symbols (and/or one or more awards) at one or more of the symbol display positions of a matrix or grid. The gaming system then randomly forms a path including a plurality of the symbol display positions and determines an award for the player based on which symbol display positions are included in the formed path. |
| US09318001B2 |
Methods and apparatus for a distributed bonus scheme using simulated scatter reactions
Methods and apparatus for a distributed bonus scheme using simulated scatter reactions are disclosed. An example method of operating a gaming device in a gaming system includes receiving a trigger that initiates a first bonus decision in a first gaming device. Further, the example method includes calculating, using a programmed processor, an accumulated value that defines a range. Further, the example method includes generating a random number. Further, the example method includes, when the random number falls within the range, granting a bonus to the first gaming device. Further, the example method includes determining whether the first bonus decision is to initiate a second bonus decision in a second gaming device of the gaming system. |
| US09317998B2 |
System and method of selecting real-world wagers on behalf of users in an integrated wagering and interactive media platform
The invention relates to systems and methods of selecting and placing real-world wagers responsive to one or more wager triggers, obtaining outcomes of the real-world wagers, facilitating user interactions with interactive media, and revealing the outcomes through the interactive media to give an appearance that the outcomes of the real-world wagers resulted from the user interactions even though the outcomes resulted from the real-world wagers and were determined before the user interactions. The system may select a real-world wager based on one or more wager parameters that specify one or more aspects of the wager. In some instances, the user may directly specify some of the foregoing parameters and the system may select other ones of the foregoing parameters. For example, the user may identify a particular horse race on which to place the real-world wager and the system may select the winner, an amount of the wager, etc. |
| US09317996B2 |
Method for authenticating a wager using a system and method for interacting with virtual geographic zones
A system and method for user interaction includes a network, a server connected to the network, a supervisor device receiving information from a global positioning system and connected to the network, a user device receiving information from the global positioning system and connected to the network. The supervisor, having the supervisor device, defines a set of virtual geographic zones and sub-zones in which the user device is tracked, and saves the set of virtual geographic zones and sub-zones to a supervisor account on the server. The user downloads a user application, sets-up a user account, and downloads the set of virtual geographic zones and sub-zones. As the user, having the user device, moves through the virtual geographic zones and sub-zones the location of the user device is determined and a set of supervisor-defined actions are executed on the user device based on the location of the user device. |
| US09317994B2 |
Networked gaming system communication protocols and methods
A system, method and apparatus for a gaming system is provided. The gaming system includes a rewards server and a separate gaming or slot accounting server. The system may further include a separate player tracking server. The system further includes one or more game machines. The game machines may include a base game, rewards tracking module, and a game management module. Further details will be apparent from the description, drawings and claims. |
| US09317993B2 |
Method and apparatus for providing player incentives
A system and method is provided for incentivizing players to visit a gambling location. In one aspect, a qualified person is invited to play an electronic game which has a plurality of outcomes, at least one of which is a winning outcome. In one embodiment, the qualified person may be required to redeem the outcome at the gambling location. In another embodiment, the person may be required to redeem the outcome at a redemption location. In another aspect, a method is provided for permitting a person to take one or more actions within a gambling location and in response inviting the person to play an electronic game separate from the games offered in a gambling environment at the gambling location, where the game has a plurality of outcomes, at least one of which is a winning outcome, and if the person obtains a winning outcome, requiring the person to redeem the at least one outcome at the gambling location. In one embodiment, the method includes the acts of qualifying a person. Qualification may require specific acts, for example, referring another person, and/or providing an invitation to play an electronic game to another person. Various systems and method assist in tracking and maintaining such referrals. Additionally group gaming in and amongst referrals and/or designated groups may be performed, and in some embodiment required for qualification and/or redemption. Further, another aspect relates to providing special incentives, for example for referral of a new player, for providing casino affiliation or membership information, among others. |
| US09317977B2 |
Mobile communication interface, system having a mobile communication interface, and method for identifying, diagnosing, maintaining, and repairing a vehicle
A method for identifying and diagnosing a vehicle includes: storing customer, vehicle, and repair shop order data of the vehicle in a work data memory device of a mobile communication interface; connecting the mobile communication interface to the vehicle and connecting a first vehicle inspection device at least to the mobile communication interface at a first work station; carrying out a first set of inspections on the vehicle using the first vehicle inspection device and/or the mobile communication interface; carrying out a second set of inspections on the vehicle using a second vehicle inspection device and/or the mobile communication interface on the basis of the first inspection results; and storing the customer, vehicle, and repair shop order data as well as the first and second inspection results of the vehicle into the central customer database. |
| US09317976B2 |
Fare collection using wireless beacons
Systems and techniques are presented for processing a user through a paid entry gate using a mobile device. The mobile device receives a beacon packet from a first wireless beacon and wakes up an application. The application wakes up by transitioning to an active or background execution state. The application transmits validation data to a computer server system and the computer server system validates an account of the user. The mobile device receives a beacon packet including a gate identifier that is a unique identification of the paid entry gate from a second wireless beacon and transmits the gate identifier to the computer server system. The computer server system receives the gate identifier, debits the account of the user, and transmits a signal to a gate entry device associated with the gate identifier to grant the user passage through the paid entry gate. |
| US09317969B2 |
Constructive anatomic geometry
A method involving an image of an anatomy, includes: obtaining an image of an anatomy; obtaining a program instruction from a user for creating an object in the image; and executing the program instruction to create the object in the image, wherein the act of executing the program instruction is performed using a processor. A computer product having a non-transitory medium storing a set of instructions, an execution of which causes a method to be performed, the method includes: obtaining an image of an anatomy; obtaining a program instruction from a user for creating an object in the image; and executing the program instruction to create the object in the image. |
| US09317968B2 |
System and method for multiple hypotheses testing for surface orientation during 3D point cloud extraction from 2D imagery
The system and methods described herein operate on a plurality of images that include multiple views of the same scene, typically from slightly different viewing angles and/or lighting conditions. One of the images is selected as a reference image. For each image ray in a non-reference image, the system and methods resample a local region from the non-reference image's space to the reference image's space. The resampling is performed multiple times, each time with a different surface orientation hypothesis. The system and methods run cross-correlation style correlators on the resampled images, evaluate correlation scores for each of the resampled images, and select the surface orientation hypothesis associated with the highest correlation score. The system and methods project a peak of the correlation surface back through a geometry model for the selected surface orientation hypothesis to determine a three-dimensional (ground) location for the image ray. |
| US09317965B2 |
Uniform point cloud decimation
A method, apparatus, system, article of manufacture, and computer readable medium provide the ability to create a point cloud indexed file. A grid (of cells that are divided into subcells) is mapped over points in a point cloud dataset. An occupancy value, that indicates whether a subcell contains a point, is computed for each subcell. A surface area contribution factor is computed for each cell and identifies a count of subcells that are occupied divided by a total number of subcells. The surface area contribution factor for each cell and points for each cell are written to the point cloud indexed file. |
| US09317961B2 |
Prioritizing node requests based on tile distance to reduce perceptual scene time
An exemplary method for reducing user-perceived scene resolution time to render a node tree in a three-dimensional environment includes identifying a first cache node in the node tree at a first level of detail. The exemplary method also includes computing a first priority score based at least on a depth in the node tree of the first level of detail and a first tile distance. The exemplary method further includes identifying a second cache node in the node tree at a second level of detail different from the first level of detail. The exemplary method also include computing a second priority score based at least on a depth in the node tree of the second level of detail and a second tile distance. The exemplary method further includes ordering cache node requests based at least on the relative values of the first and second priority scores. |
| US09317960B2 |
Top-to bottom path rendering with opacity testing
One embodiment of the present invention sets forth a technique for rendering paths by first generating a stencil buffer indicating pixels of the path that should be covered and then covering the path. The paths may be filled or stroked without tessellating the paths. Path rendering may be accelerated when a graphics processing unit or other processor that is configured to perform operations to generate the stencil buffer and cover the path to fill or stroke the path. When the paths are rendered in a top-to-bottom (front-to-back) order, an opacity stencil may be generated and used to avoid determining path coverage and shading for pixels that are opaque. |
| US09317955B1 |
Automatic breakdown of animation variables
In an animation authoring system wherein knots along curves are provided in only selected frames, a method of breaking down knots in adjacent poses is automated without causing discontinuities in curves between poses by setting a first pose as a guarded frame for an object so that at least some of the values for animation variables (avars) in the guarded frame are protected and an animation variable (avar) having no knot at the guarded frame is merely implicit, then introducing a new knot for that avar position at a non-guarded frame, and introducing an implicit knot by setting its avar for the guarded frame at its previous implicit value. The new position can be effected by either adding a knot or removing a knot at a non-guarded frame. The invention provides a predictable workflow that cannot be changed retroactively when adjacent animation variables on a curve are changed. |
| US09317951B2 |
Assisted conversion of biological and chemical pathway information to three-dimensional animations
This specification relates to computer animations, and more particularly to computer animations of biological and chemical pathways in which information defining the molecular assets, interactions and sequence of events involved in the pathway is combined with graphical information to generate a three-dimensional animation of the pathway. |
| US09317945B2 |
Detail-in-context lenses for navigation
A method in a computer system in a vessel for generating a presentation of a region-of-interest in an original chart image for display on a display screen, the computer system displaying a representation of the vessel moving along a course in the original chart image, the region-of-interest being located along the course proximate to the representation of the vessel, the method comprising: establishing a lens for the region-of-interest, the lens having a magnified focal region for the region-of-interest at least partially surrounded by a shoulder region having a diminishing magnification, the focal region having a size, a shape, and an orientation with respect to the course; receiving one or more signals to adjust at least one of the size, shape, and orientation of the focal region; and, applying the lens to the original chart image to produce the presentation. |
| US09317944B2 |
Alignment of start and end of dashed curves
Disclosed is a computer-implemented method of vectorizing a curve. The method determines a reference point distanced from the curve and a first point on the curve associated with the reference point, and a line running through the reference point from a tangent to the curve at the first point, where the line and tangent are parallel. A shift point is then determined on the determined line, and the curve is vectorized by a path formed from a plurality of linear segments, the plurality of segments comprising at least a segment joining the reference point and the shift point. From the vectorization of the curve the curve can be rendered, particularly using dashed strokes. |
| US09317941B2 |
Method of image reconstruction for a filtered back projection in limited angle tomography
The present invention is directed to a limited angle tomography in combination with a filtered back projection using a special filter operator X. The filter operator X used within the present invention makes it possible to perform region of interest reconstructions although delivering high quality reconstruction images as generated by high effort SART methods. The used filter operator is purely and solely mathematically determined and defined by the spatial geometry which is used for the limited angle tomography. Without having the need to perform several iterations, the present invention directly calculates a solution, i.e. reconstructed image, equivalent to known iteratively construction methods. Although, incomplete projection data p may only be used, the present invention provides for a high image quality. |
| US09317936B2 |
Information terminal and display controlling method
A mobile phone is capable of displaying data of a website stored in a server through a browsing function. The mobile phone is also capable of detecting a line-of-sight of a user with utilizing an infrared light. In a case where the user is reading a website, a keyword is acquired from a content of the website based on the line-of-sight of the user. Thereafter, if a search result screen on a search site is displayed, a plurality of index information are listed such that the index information of the website related to an acquired keyword becomes a higher rank. |
| US09317931B2 |
F-stop weighted waveform with picture monitor markers
A waveform monitor for generating a modified image from an original image includes a brightness measuring system to generate brightness values that are then converted to f-stop equivalents. A selector is used to create a range of f-stop values and a modifier changes the original image for selected pixels that fall within the range of f-stop values. The original image may be modified by replacing or blending certain pixels with colorized pixels, i.e., by falsely coloring the original image. Methods of modifying images in this manner are also described. |
| US09317929B2 |
Decomposition apparatus and method for refining composition of mixed pixels in remote sensing images
To achieve space correlation of pixel decomposition results and reduce noise problem caused by isolation, there is provided a decomposition apparatus and method for refining composition of mixed pixels in remote sensing images, including: a preprocessing step for temporarily determining the provability value of the composition ratio of the different land cover types of each pixel in the image, based on a received remote sensing image and spectral information, to obtain first material composition information; and a neighborhood correlation calculation step for analyzing the correlation between a main pixel and the neighboring areas by using the first material composition information of each of the pixels present in the neighboring areas within a predetermined range in which the pixels are adjacent to each other, and optimizing the first material composition information of the main pixel by the result of the correlation analysis, to obtain second material composition information. |
| US09317928B2 |
Detecting and tracking point features with primary colors
A feature tracking technique for detecting and tracking feature points with primary colors. An energy value may be computed for each color channel of a feature. If the energy of all the channels is above a threshold, then the feature may be tracked according to a feature tracking method using all channels. Otherwise, if the energy of all of the channels is below the threshold, then the feature is not tracked. If the energy of at least one (but not all) of the channels is below the threshold, then the feature is considered to have primary color, and the feature may be tracked according to the feature tracking method using only the one or more channels with energy above the threshold. The feature tracking techniques may, for example, be used to establish point trajectories in an image sequence for various Structure from Motion (SFM) techniques. |
| US09317927B2 |
Methods and systems for interactive 3D image segmentation
Methods and systems for interactively segmenting 3D image data are provided. An initial segmentation of the 3D image data is obtained, and for each of a plurality of image regions, a segmentation uncertainty indicator for the initial image segmentation is associated with the image region and a strength is assigned to the segmentation uncertainty indicator. A low-confidence region in the 3D image data is identified based at least in part on proximity of the low-confidence region to the image regions and strengths of the corresponding segmentation uncertainty indicators. An optimization routine may be applied to an objective function whose value depends at least in part on proximity of the candidate region to the image regions and the strengths of the corresponding uncertainty indicators to identify the low-confidence region from among a plurality of candidate regions. |
| US09317924B2 |
Information processing apparatus, three-dimensional position calculation method, and program
An information processing apparatus includes a region segmentation unit configured to segment each of a plurality of images shot by an imaging apparatus for shooting an object from a plurality of viewpoints, into a plurality of regions based on colors of the object, an attribute determination unit configured to determine, based on regions in proximity to intersections between scanning lines set on the each image and boundary lines of the regions segmented by the region segmentation unit in the each image, attributes of the intersections, a correspondence processing unit configured to obtain corresponding points between the images based on the determined intersections' attributes, and a three-dimensional position calculation unit configured to calculate a three-dimensional position of the object based on the obtained corresponding points. |
| US09317921B2 |
Speed-up template matching using peripheral information
A method for template matching is described. In one implementation, an image including a target object is captured by a camera. A pose of the camera is estimated based, at least in part, on peripheral information from the image. Pre-selecting is performed on a set of pose templates by matching the pose of the camera to poses associated with pose templates to identify a set of matching pose templates. The template matching for the target object is then performed using the set of matching pose templates. |
| US09317917B2 |
Method, reconstruction device, and magnetic resonance apparatus for reconstructing magnetic resonance raw data
In a method and a reconstruction device for reconstructing an image from MR raw data acquired with multiple coils and entered at sample points on a grid in k-space, the sample points are arranged on data entry trajectories, respectively, along one-dimensional edges in an equidistant grid dimension characteristic for the respective edge. If raw data were acquired at all sample points, k-space would be sufficiently scanned, but the raw data are entered only on a portion of the sample points so that sufficient scanning exists only in an internal region of k-space, with undersampling existing in an external region of k-space. Reconstruction of the missing raw data is performed by reconstructing raw data for a specific coil for the non-sampled sample points in the internal region using the raw data acquired with that coil for other sample points in the internal region, without using raw data acquired with other coils, and for the non-sampled sample points in the external region, using the raw data acquired for the internal region, as well as reconstructed raw data, and using raw data acquired with different coils. |
| US09317915B2 |
Computed-tomography system and method for determining volume information for a body
A tomogram of a body is provided. Projection-image data obtained by a radiation-based projection method is used for providing the tomogram. Initial voxel data are first specified for a plurality of voxels of the body. Synthetic projection-image data are generated based upon a projection rule modeling a course of the projection method. Projection-error data is determined by comparing the synthetic projection-image data with the real projection-image data. The projection-error data are imaged on the basis of a back-projection rule dependent on the projection rule so that voxel-error data are produced. Correction data is generated from the voxel-error data by a gradient-based optimizing algorithm, wherein corrected voxel data are generated using the correction data. |
| US09317913B2 |
Method for measuring the absorption of fluid in an absorbent product
A method for measuring the absorption of fluid in an absorbent product includes at least the following steps performed by a mobile device having an image capturing device: capturing at least one image of a used absorbent product; determining a measure of absorption of fluid by the product based on image information in the captured image; and displaying information relating to the use of the absorbent product based the measure of absorption of fluid on the mobile device. The method can aid a user of absorbent product to choose the right type of product for the user's individual needs. |
| US09317911B2 |
Automatic assessment of confidence in imaging data
A system and method are provided to automatically assess a confidence in imaging data based on a proposed diagnostic task or treatment decision, by determining one or more imaging quality indicators relating to the imaging data corresponding to a confidence of the proposed diagnostic task or treatment decision, comparing those imaging quality indicators with confidence benchmark values, and determining a confidence value indicative of the confidence in the imaging data for purposes of performing the proposed diagnostic task or making the proposed treatment decision. |
| US09317909B2 |
Image subsystem including image feature detection hardware component and image processing system including the same
An image processing system includes a hardware block and a central processing unit (CPU). The hardware block receives a first image and generates a first feature value and a first segmented image from the first image. The CPU generates a first transformation matrix based on the first segmented image and the first feature value. The hardware block also generates a first transformed image by applying the first transformation matrix to the first image. |
| US09317905B2 |
Device, method, and computer readable medium for restoring an image
An image processing device, which uses a dictionary which stores data of two or over sets which associate a blurred patch of a blurred image generated by blurring a predetermined image with a restoration patch of the predetermined image. The device includes a processor that processes instructions to generate a tentative restored image from the restoration patch selected based on values indicating similarities between plural input patches generated by dividing an inputted input image and the blurred patch. The processor also processes the instructions to generate a tentative patch by dividing the tentative restored image. The processor further processes the instructions to generate a restored image from the restoration patch selected based on a sum of the value indicating the similarity between the input patch and the blurred patch and a value indicating the similarity between the tentative patch and the restoration patch. |
| US09317900B2 |
Three-dimensional image processing device, and three-dimensional image processing method
A three-dimensional image processing device for visually applying a special effect by subjecting raw data that has been acquired by imaging to image processing, and creating image data capable of being viewed stereoscopically. The device comprises a tone conversion section for tone converting the raw data in accordance with the special effect, a three-dimensional image data processing section for carrying out at least one of clipping image data that has been tone converted by the tone conversion section as image data to be viewed stereoscopically, or carrying out geometric processing, to create three-dimensional image data, and a special effect image processing section for subjecting the three-dimensional image data to special image processing to apply a special effect that is analogous to an image that has been formed optically or formed by photographic film or by development and printing processing, and creating a three-dimensional special-effect image. |
| US09317894B2 |
Method for image registration
A method (30) for image registration of sections, in particular for image registration of histological sections, is described. The method comprises reading in (32) of a data set for at least two sections, wherein each of the data sets comprises m images of each section in m resolution levels (11, 12, 13), wherein each image of the resolution levels 1 to m−1 is divided into at least two cells, wherein each image has a different image resolution, wherein the image with the highest image resolution is associated with the resolution level 1 and the image with the lowest image resolution is associated with the resolution level m; registering (33) of the two mth images of the two sections on the resolution level m and determining of a global transformation for the resolution level m; aligning (34) of the two images of the resolution level m−1 using the global transformation of the resolution level m; and registering (35) of a subgroup of cells from all cells of the two images of the resolution level m−1. |
| US09317893B2 |
Methods and systems for correcting a document image
Aspects of the present invention relate to methods and systems for fitting a mesh to an image of a document page and correcting a distortion in the image of the document page using the mesh. A rectangular-form mesh may be overlaid on a displayed document image. Corner points in the rectangular-form mesh may be moved to coincide with corner points of a document page in the displayed document image, and a corner-aligned mesh may be overlaid on the displayed document image. A cubic Bezier curve may be fit to the top edge of the document page, a cubic Bezier curve may be fit to the bottom edge of the document page and an edge-aligned mesh may be overlaid on the displayed image. An inverse projective transformation may be applied to the patches of the mesh to correct the distortion in the image of the document page. |
| US09317892B2 |
Method and device to augment volatile memory in a graphics subsystem with non-volatile memory
Methods and devices to augment volatile memory in a graphics subsystem with certain types of non-volatile memory are described. In one embodiment, includes storing one or more static or near-static graphics resources in a non-volatile random access memory (NVRAM). The NVRAM is directly accessible by a graphics processor using at least memory store and load commands. The method also includes a graphics processor executing a graphics application. The graphics processor sends a request using a memory load command for an address corresponding to at least one static or near-static graphics resources stored in the NVRAM. The method also includes directly loading the requested graphics resource from the NVRAM into a cache for the graphics processor in response to the memory load command. |
| US09317890B2 |
Image curation
Image curation techniques are described. In one or more implementations, one or more modules are launched for execution on a computing device. Responsive to the launch, criteria are generated automatically and without user intervention through execution of the one or more modules by a computing device. Images are curated using the generated criteria automatically and without user intervention through execution of the one or more modules, the curated images identified from a plurality of different image sources that are associated with a user. The curated images are caused to be displayed by a display device of the computing device automatically and without user intervention through execution of the one or more modules. |
| US09317886B2 |
Facilitation of payments between counterparties by a central counterparty
A system for moving money between accounts of traders by a central counterparty to facilitate payments, i.e. the movement of funds, there between is disclosed which provides a flexible mechanism which supports simpler accounting, new types of derivatives contracts as well new types fees. The disclosed futures contract, referred to as a “payer” contract, comprises a “no-uncertainty” futures contract, i.e. the initial value and settlement value parameters are defined, that leverages the mechanisms of the clearing system to, for example, accommodate related payments. Accordingly, a 1-to-many relationship between contracts and prices is provided whereby each price component may be assigned its own payer contract. The function of the payer contract may be to guarantee the movement of money from related positions. In one embodiment, payer contracts are dynamically created whenever a payment is needed. |
| US09317882B2 |
Smart order management
An approach is provided for smart order management. Smart utensils measure consumption of a meal by a customer. The smart utensils include at least one processor to perform the measuring and a transmitter that transmits data corresponding to the measured consumption. The smart utensils transmit the measurement to a restaurant data collection device. The approach predicts, based on the measuring, a completion time of the meal by the customer and notifies restaurant staff members of the predicted completion time. |
| US09317881B1 |
Systems and methods for generating interactive content for in-page purchasing
The present solution relates to an improved system and method for providing interactive content. The present solution can provide a first content object for display in a content slot of an information resource of a content provider. The first content object can include one or more tags that can each be linked to a respective second content object of a plurality of second content object. When an interaction is received with a first tag the system can identify a second content object corresponding to the first tag. The second content object can be provided for display in the same content slot of the information resource. In some implementations, the second content object can include a transaction interface to purchase an item identified in the second content object. |
| US09317880B2 |
Information communication terminal, information distribution apparatus, information distribution system, content management method, broadcast reception method, information distribution method, programs and storage medium
A data distribution component, system, and method. The data distribution component includes circuitry and a memory. The circuitry is configured to communicate with a plurality of devices, provide content identification data specifying a content item, provide an opportunity to purchase the content item to the plurality of devices, provide the content item to a first one of the devices of a user, after a purchase process, and provide the content item which is purchased at the first one of the devices of the user to a second one of the devices of the user for download. The memory is configured to store the content identification data and the content item. |
| US09317879B1 |
Associating collections with subjects
Disclosed are various embodiments for presenting collections of items related to subjects in a performance to viewers. The collections are assumed to be identified prior to the performance by individuals with knowledge of subjects expected to appear in the performance. The subject's appearance may be detected based on a user input indicating the appearance or by a subject recognition algorithm. The collections may be presented to a customer in a display also rendering the performance or in a separate display. The customer may select the collections and/or items therein for performing an action with the item, such as, for example purchasing the item. |
| US09317877B2 |
Enabling third-party E-store with carrier billing for a mobile device
Techniques and equipment are described for enabling an application developer to provide mobile device users, using the developer's application, an option to purchase digital content items within the application and have the cost of the purchased content billed directly to their respective mobile communications service accounts. The mobile service account for a user or user's mobile device is maintained by a wireless carrier or operator of the mobile communication network to which the user subscribes for mobile communication services. The charges and other transaction details related to the content purchased by a mobile device user via the mobile application on the user's device appear in a billing or account statement periodically provided to the user by the carrier or operator of the mobile communication network. |
| US09317873B2 |
Automatic verification of advertiser identifier in advertisements
Systems and methods for automatically verifying an identifier of a content provider are provided. A first identifier, a content item, and a uniform resource locator are received from a content provider. The domain of the uniform resource locator is determined. A plurality of second resources under the domain are accessed and stored in memory. From the plurality of second resources, a plurality of second identifiers are detected. A map of domain and a plurality of second identifiers is created. Using the map, the first identifier is compared to each of the plurality of second identifiers. If there is a match, the first identifier is approved to be used with the content item. The first identifier may be displayed on a user device with the content item. |
| US09317864B2 |
Method and system for recommending target object information
Embodiments of the present application relate to a method for recommending target object information, a system for recommending target object information, a client for recommending target object information, a server for recommending target object information, and a computer program product for recommending target object information. A method for recommending target object information is provided. The method includes receiving a target object informational recommendation request including information pertaining to a plurality of short-listed objects selected, determining historical selection information on the plurality of short-listed objects, the historical selection information including a historical count, a selection count, or both, and sending the part or all of the short-listed object historical selection information to a client. |
| US09317858B2 |
Casino gaming exchange market
In a cashless gaming environment, a gaming patron has accounts and may accumulate winnings as well as different types of awards. Methods for efficiently exchanging the awards are disclosed. A secondary market is established for trading different goods and services. Liquidity of credits and awards is established. |
| US09317851B2 |
Secure transaction personal computer
A personal computer is provided comprising a network communication interface configured to communicate with the Internet. The computer further includes a memory device configured to store information and computer-executable program code. The computer further includes a processor operatively coupled to the network communication interface and the memory device. The processor and the computer-executable program code are both configured to provide enhanced security features for safeguarding financial transactions conducted over the Internet and for safeguarding non-public information stored in the memory from being retrieved over the Internet by an unauthorized entity. The computer further includes indicia attached to the computer. The indicia is visible to a potential user of the computer and is configured to portray to the potential user of the computer that the computer is specifically designed and built to provide increased security for financial transactions handled over the Internet. |
| US09317848B2 |
Integration of verification tokens with mobile communication devices
Apparatuses, methods, and systems pertaining to the verification of portable consumer devices are disclosed. In one implementation, a verification token is communicatively coupled to a computer by a USB connection so as to use the computer's networking facilities. The verification token reads identification information from a user's portable consumer device (e.g., credit card) and sends the information to a validation entry over a communications network using the computer's networking facilities. The validation entity applies one or more validation tests to the information that it receives from the verification token. If a selected number of tests are passed, the validation entity sends a device verification value to the verification token, and optionally to a payment processing network. The verification token may enter the device verification value into a CVV field of a web page appearing on the computer's display, or may display the value to the user using the computer's display. |
| US09317846B2 |
Point of sale for mobile transactions
Devices, systems, and methods are disclosed which relate to using a remote scanner for mobile transactions. A point of sale (POS) terminal communicates with a remote scanner that is removably coupled to the POS terminal. Logic on the POS terminal generates a request for a transaction information and transmits the request along with a restriction to the remote scanner. Logic on the remote scanner receives the request and the restriction, transmits the request to a mobile device, receives the transaction information while monitoring the restriction, and transmits the transaction information to the POS terminal for processing. The transaction information may be provided subject to the restriction. |
| US09317842B2 |
Dynamic allocation of video resources
Video transaction machines (VTMs) facilitate communications and transactions between customers of a financial institution and video transaction resources, such as video agents, by establishing a video session between a VTM and a video agent workstation. After a computing device of the financial institution receives information identifying the customer, VTM, or VTM location requesting the services of a video agent, the computing device may place the customer in one or more virtual queues based on an overall visit time at the VTM location. In order to maintain a visit time at the VTM location below a predetermined visit time threshold, the controller may prioritize transactions at VTMs with longer visit times over transactions at VTMs with shorter visit times. |
| US09317838B2 |
System and method for managing calendaring events
An indication of a meeting being scheduled between a plurality of attendees is received. A first one of the attendees is designated an owner of the meeting. Ownership privileges for the meeting are associated with at least a second one of the meeting attendees. The ownership privileges associated with at least a second one of the meeting attendees are associated based upon, at least in part, an organizational structure. |
| US09317835B2 |
Populating budgets and/or wish lists using real-time video image analysis
System, method, and computer program product are provided for using real-time video analysis, such as augmented reality to provide the user of a mobile device with real-time budgeting and wish lists. Through the use of real-time vision object recognition objects, logos, artwork, products, locations, and other features that can be recognized in the real-time video stream can be matched to data associated with such to provide the user with real-time budget impact and wish list updates based on the products and budget data determined as being the object. In this way, the objects, which may be products and/or budget data in the real-time video stream, may be included into a user's budget and/or wish list, such that the user receives real-time budget and/or wish list updates incorporating product and/or budget data located in a real-time video stream. |
| US09317831B2 |
System and method for processing package delivery
A method for processing packages is provided. A package is received at an intermediate shipping site and a delivery authorization status corresponding to the package is determined based on a threshold of some characteristic of the package. The package is delivered if the authorization status is that delivery is acceptable and the package is not delivered if the authorization status is that delivery is not acceptable. The acceptability of the package for delivery is determined by a response that an addressee provides to an electronic message notification of package availability. The electronic response preferably contains some authenticating information regarding the package. |
| US09317826B2 |
Providing a requisite level of service for an electronic meeting
Providing a requisite level of service for an electronic meeting. An embodiment can include receiving a request to schedule a first electronic meeting in a time slot, identifying an electronic meeting system to host the first electronic meeting, identifying a second electronic meeting scheduled to be hosted by the electronic meeting system in the time slot, determining an estimate of resource usage within the electronic meeting system during the time slot at least based on the second electronic meeting being scheduled to be hosted by the electronic meeting system in the time slot, comparing the estimate of resource usage with a threshold value, responsive to determining that the estimate of resource usage exceeds the threshold value, providing the requisite level of service to the first electronic meeting in the time slot by reducing anticipated resource usage of the electronic meeting system by the second electronic meeting. |
| US09317822B2 |
Workflow centered mechatronic objects
A method for generating workflows for product development or for the design or the operation of industrial systems, wherein the workflow comprises activities, inputs, outputs, attributes, and time dependencies for the activities, wherein the method comprises providing software objects representing parts, functions and/or artifacts of the product or the industrial systems, assembling the software objects by interconnecting them via the interfaces to design a product or an industrial system, generating the workflow for product development or for the design or operation of an industrial system based on the workflow information. |
| US09317821B2 |
System for analyzing device performance data
A system for analyzing performance data associated with a mail processing device includes a reporting module operable to receive, over a network, first data related to the operation of a mail processing device at one of a plurality of mail processing sites, wherein each of the plurality of mail processing sites is associated with a database accessible over the network, store the first data in a database associated with the mail processing site of the mail processing device, receive, over the network, second data identifying filter criteria for the first data, filter, using a processor, the first data with the second data, generate, using a processor, a report based on the filtered first data, and communicate the report over the network. |
| US09317820B1 |
System and method for configuring a cloud computing space
A system, computer-implemented method, and a computer program product for configuring a requirements model for a cloud computing space includes defining a list of available system capabilities within the cloud computing space. A user is allowed to define one or more user requirements chosen from the list of available system capabilities. The one or more user requirements are associated with one or more hardware/software requirements. A cloud computing solution is configured based, at least in part, upon the one or more user requirements and the one or more hardware/software requirements. |
| US09317819B2 |
Method and system for using a component business model to transform warranty claims processing in the automotive industry
A method, system and service for using a component business model to transform a business process. The invention uses a component business model of a business to prioritize business changes affecting key performance indicators for the business process, defines an information technology architecture to support the business changes, and specifies a roadmap for implementing the supporting information technology architecture. In a particular application of the invention to the automobile manufacturing business, the business process is the warranty claims process, and a length of time to process a warranty claim is a key performance indicator. |
| US09317818B1 |
System and method for using a hybrid single-pass electronic ticket
Provided is a system for generating and validating a hybrid single-pass electronic ticket. The system includes a physical ticket having at least one Electronic Article Surveillance (EAS) Radio Frequency (RF) tag and a two dimensional code; at least one validator having an Electronic Article Surveillance (EAS) Radio Frequency (RF) transceiver and a scanner for reading the two dimensional code. The system generates the hybrid single-pass electronic ticket by printing the two dimensional code containing associated ticket information on the electronic ticket and validates the electronic ticket by reading the EAS RF tag and the two dimensional code on the ticket. |
| US09317817B2 |
Liability intervention logistical innovation system and method
A system and method are disclosed that are able to identify and distinguish persons as soon as they enter or exit a hospital room or any room occupied by a patient who is receiving medical or dental services. After a person who has entered a hospital room has been identified, this person may be required to sanitize his/her hands in order to comply with an established protocol. Therefore, a second identification may take place at the hand sanitization station. The system may confirm that the same person was identified by a first read by the RFID antennas upon entering the room and by a second read by the RFID antennas upon completing the hand sanitization procedure. If no hand sanitization takes place, visual and/or auditory stimuli may be generated as a reminder. Persons and their hand sanitization performances may be used diagnostically to identify and remedy potential contamination events and/or determine the source and mode of transmission of a nosocomial infection. This information may be returned in real-time as well as stored in a database. |
| US09317816B2 |
Email optimization for predicted recipient behavior: suggesting changes that are more likely to cause a target behavior to occur
Techniques are described herein for predicting one or more behaviors by an email recipient and, more specifically, to machine learning techniques for predicting one or more behaviors of an email recipient, changing one or more components in the email to increase the likelihood of a behavior, and determining and/or scheduling an optimal time to send the email. Some advantages of the embodiments disclosed herein may include, without limitation, the ability to predict the behavior of the email recipient and suggest the characteristics of an email which will increase the likelihood of a positive behavior, such as a reading or responding to the email, visiting a website, calling a sales representative, or opening an email attachment. |
| US09317814B2 |
Automatically generating an ontology and axioms from a business-process model
A method and associated systems for automatically generating an ontology and a set of axioms from a business-process model that represents the operations of a business. This ontology and set of axioms may be used to create the knowledgebase of an artificially intelligent expert system that emulates the business operations. A processor parses a representation of business processes stored in the business-process model, deriving a set of axioms and a set of entity classes from the parsed data. The processor uses these axioms and classes to identify concept nodes and process nodes, which it organizes into the ontology of the knowledgebase. The processor further identifies information derived from the parsed data to create a set of triple data items, each of which represents the information represented by one or more of the derived axioms. These triples are stored in the knowledgebase as a triple store data structure. |
| US09317813B2 |
Mobile device with predictive routing engine
Some embodiments of the invention provide a mobile device with a novel route prediction engine that (1) can formulate predictions about current or future destinations and/or routes to such destinations for the device's user, and (2) can relay information to the user about these predictions. In some embodiments, this engine includes a machine-learning engine that facilitates the formulation of predicted future destinations and/or future routes to destinations based on stored, user-specific data. The user-specific data is different in different embodiments. In some embodiments, the stored, user-specific data includes data about any combination of the following (1) previous destinations traveled to by the user, (2) previous routes taken by the user, (3) locations of calendared events in the user's calendar, (4) locations of events for which the user has electronic tickets, and (5) addresses parsed from recent e-mails and/or messages sent to the user. The device's prediction engine only relies on user-specific data stored on the device in some embodiments, relies only on user-specific data stored outside of the device by external devices/servers in other embodiments, and relies on user-specific data stored both by the device and by other devices/servers in other embodiments. |
| US09317809B1 |
Highly scalable memory-efficient parallel LDA in a shared-nothing MPP database
Latent Dirichlet allocation (LDA) analysis on a dataset is performed on an MPP relational database by distributing subsets of said dataset to a plurality of segments of the MPP database, and performing LDA analysis in parallel on the respective subsets on the plurality of segments using Gibbs sampling. An object library on each segment provides executable objects of user defined functions that can be called by an SQL query when the query requires functionality provided by an object. |
| US09317808B2 |
Predictive system for designing enterprise applications
Predictive systems for designing enterprise applications include memory structures that output predictions to a user. The predictive system may include an HTM structure that comprises a tree-shaped hierarchy of memory nodes, wherein each memory node has a learning and memory function, and is hierarchical in space and time that allows them to efficiently model the structure of the world. The memory nodes learn causes, predicts with probability values, and form beliefs based on the input data, where the learning algorithm stores likely sequence of patterns in the nodes. By combining memory of likely sequences with current input data, the nodes may predict the next event. The predictive system may employ an HHMM structure comprising states, wherein each state is itself an HHMM. The states of the HHMM generate sequences of observation symbols for making predictions. |
| US09317805B1 |
System and method of performing modular quantitative analysis with nodes that have contextual labels
Quantitative analysis is provided through the implementation of a graph that includes nodes having edges therebetween representing data dependencies between the nodes. The nodes include calculation objects such as programs, data, libraries, and/or other objects. The nodes provide for modular computation that provides for transparency, record-keeping, experimentation, and/or other functionalities. |
| US09317800B2 |
Non-contact IC label and nameplate
A non-contact IC label includes a magnetic sheet, an IC chip arranged on the magnetic sheet, a first antenna portion including a first connection portion connected to the IC chip and arranged on the magnetic sheet to extend in a first direction from the first connection portion, and a second antenna portion including a second connection portion connected to the IC chip and arranged on the magnetic sheet to extend in a second direction from the second connection portion, wherein each of the first direction and the second direction is along one side of the magnetic sheet, the first direction and the second direction differ from each other, and each of a length of the first antenna portion in a direction perpendicular to the first direction and a length of the second antenna portion in a direction perpendicular to the second direction ranges from 2 mm to 15 mm. |
| US09317796B2 |
RF probe alignment with passive tag
A passive tag embedded in a package includes multiple conductive coils. A first coil receives radio frequency (RF) energy used to power the tag. Additional coils receive and/or transmit data signals, clock signals, and carrier signals. The RF energy and other signals may be at different frequencies. An RF probe includes a first coil to emit the RF energy to power the tag. The RF probe includes additional coils corresponding to the additional coils in the tag. The RF probe may turn off the RF signal used for power during communication. The RF energy may be rectified to provide DC power to circuits in the tag, or may be used directly for adiabatic circuits. The RF probe and the package may have complementary shapes to facilitate alignment of the coils. |
| US09317793B2 |
Product with applied, visible product information and method for applying visible product information to a product
A product has applied visible product information. In order to be able to undertake updates of the product information of such a product in a relatively simple manner, the product is equipped with an electronic monitor or screen for displaying the product information. A method for applying visible product information to a product is also provided. |
| US09317791B2 |
Information processing apparatus and control method for information processing apparatus
An information processing apparatus includes a first control unit that outputs a command for driving an electric part, a detection unit that detects an abnormality of the first control unit, and a second control unit that controls whether or not supply of a drive signal based on the command for driving the electric part to the electric part can be performed, in which the first control unit outputs instruction signals for instructing execution and stop of the detection by the detection unit, and the second control unit cuts off the supply of the drive signal to the electric part in a case where the detection unit detects the abnormality of the first control unit and a case where the instruction signal for instructing the stop of the detection by the detection unit is output from the first control unit. |
| US09317784B2 |
Image processing apparatus, image processing method, and program
An image processing apparatus includes an object detection unit configured to detect a position of an object based on an input image, and a segmentation unit configured to segment, according to a result of detection by the object detection unit, the image into a plurality of regions, each of which includes adjacent similar pixels and has a size determined for each position in the image. |
| US09317782B2 |
Incremental category embedding for categorization
There are provided systems and methods of incremental category embedding for categorization. One method including selecting one or more input categories from a plurality of input categories to be added to learned categories, determining at least one representative category from the learned categories for each input category from the one or more input categories, the at least one representative category representing the input category, and approximating the input category using the at least one representative category. |
| US09317778B2 |
Interactive content generation
Generation of interactive content. In an embodiment, a representation of candidate object(s) in content of a digital media asset are received. For each of the candidate object(s), feature(s) of the candidate object are compared to corresponding feature(s) of a plurality of reference objects to identify reference object(s) that match the candidate object. For each of the matched candidate object(s), a hotspot package is generated. The hotspot package may comprise a visual overlay which comprises information associated with the reference object(s) matched to the respective candidate object. |
| US09317773B2 |
Patch-based synthesis techniques using color and color gradient voting
Methods, apparatus, and computer-readable storage media for patch-based image synthesis using color and color gradient voting. A patch matching technique provides an extended patch search space that encompasses geometric and photometric transformations, as well as color and color gradient domain features. The photometric transformations may include gain and bias. The patch-based image synthesis techniques may also integrate image color and color gradients into the patch representation and replace conventional color averaging with a technique that performs voting for colors and color gradients and then solves a screened Poisson equation based on values for colors and color gradients when blending patch(es) with a target image. |
| US09317772B2 |
Method for improving tracking using dynamic background compensation with centroid compensation
A method for tracking an object across a number of image frames comprises identifying a region containing the object in a first image frame to be stored as an exemplar view of the object. An appearance model (modified Exemplar View histogram is created based on the region in the first image frame and a background region in a second image frame, and the method determines at least one of a location and size of a predicted region for tracking the object in the second image frame using the appearance model. The method corrects at least one of the determined location and size of the predicted region in the second image frame in accordance with at least one of the location and size of the region in the first image frame corresponding to the exemplar view of the object. |
| US09317768B2 |
Techniques for improved feature detection
Techniques for improved feature detection are described. In one embodiment, for example, a device may include a processor circuit and a feature detection module, and the feature detection module may be operative on the processor circuit to perform a first feature detection iteration for a graphics information element using an integral pixel value array, determine a scaling factor, recalculate the integral pixel value array based on the scaling factor, and perform a second feature detection iteration for the graphics information element using the recalculated integral pixel value array. Other embodiments are described and claimed. |
| US09317763B2 |
System and method to automatically discriminate between different data types
There is described a system and method for automatically discriminating between different types of data with an image reader. In brief overview of one embodiment, the automatic discrimination feature of the present image reader allows a human operator to aim a hand held image reader at a target that can contain a dataform and actuate the image reader. An autodiscrimination module in the image reader in one embodiment analyzes image data representative of the target and determines a type of data represented in the image data. |
| US09317761B2 |
Method and an apparatus for determining vein patterns from a colour image
The present invention is directed to a method of determining vein patterns from a color image for personal identification, the method comprising forming a counterpart of the color image by applying a functional relationship obtained from optimization on the color image, wherein the counterpart of the color image comprises the vein patterns. An apparatus for determining vein patterns from a color image is also disclosed. |
| US09317759B2 |
Driving assistance device and driving assistance method
A current sensor includes: a magneto electric conversion element; and a magnetic field concentrating core applying a magnetic field caused by a measurement object current to the magneto electric conversion element. A planar shape of the magnetic field concentrating core perpendicular to a current flowing direction is a ring shape with a gap. The magneto electric conversion element is arranged in the gap. A part of a conductor for flowing the current is surrounded by the magnetic field concentrating core. The magnetic field concentrating core includes two first magnetic members and at least one second magnetic member, which are stacked alternately in the current flowing direction. Parts of the two first magnetic members adjacent to each other via the one second magnetic member are opposed to each other through a clearance or an insulator. |
| US09317751B2 |
Video processing system with video to text description generation, search system and methods for use therewith
A system for searching at least one video signal based on an input text string includes a video processing system that processes the at least one video signal by decoding the at least one video signal, encoding the at least one video signal or transcoding the at least one video signal. The video processing system generates a plurality of text strings that describe the video signal in conjunction with the processing. A memory stores a searchable index that includes the plurality of text strings. A search module identifies at least one matching video of the at least one video signal by comparing the input text string to the plurality of text strings of the searchable index. |
| US09317750B2 |
Imaging device
An imaging device includes an imaging unit configured to generate image data, an image data analyzing unit configured to analyze the image data to determine an age group or a sex of an image of a person included in the image data, a voice data generating unit configured to generate voice data, a voice data analyzing unit configured to analyze the voice data, a shooting condition information generating unit configured to generate shooting condition information based on a result of an analysis by the voice data analyzing unit and the age group or the sex of the image of the person determined by the image data analyzing unit, an image data recording unit, and a recording controller configured to record the image data and the shooting condition information in the image data recording unit. |
| US09317749B2 |
Collision detection system, robotic system, collision detection method and program
A collision detection system includes a processing section, a drawing section, and a depth buffer. Depth information of an object is set to the depth buffer as depth map information. The drawing section performs a first drawing process of performing a depth test, and drawing a primitive surface on a reverse side when viewed from a predetermined viewpoint out of primitive surfaces constituting a collision detection target object with reference to the depth buffer. Further, the drawing section performs a second drawing process of drawing the primitive surface on the reverse side when viewed from a predetermined viewpoint out of the primitive surfaces constituting the collision detection target object without performing the depth test. The processing section determines whether or not the collision detection target object collides with the object on the target side based on the result of the first drawing process and the second drawing process. |
| US09317747B2 |
Determining an orientation of a mobile device
Methods, systems, and devices are described for determining an orientation of a mobile device. One method includes capturing, at the mobile device, an image of at least one illuminated object defining an illuminated reference axis; determining a first angle between the illuminated reference axis and a device reference axis of the mobile device; determining a second angle between the illuminated reference axis and a common reference axis; estimating a third angle between the device reference axis and the common reference axis; and determining an orientation of the mobile device based at least in part on the first angle, the second angle, and the third angle. |
| US09317746B2 |
Techniques for occlusion accomodation
Techniques may be used to accommodate occlusion. An occlusion accommodation application may determine a display position of a display of a computing device, an eye position of an eye of a user and an object position of an object. The object may be positioned between the display and the eye of the user. The occlusion accommodation application may identify, in real-time, an occluded area based on the display position, object position and the eye position. |
| US09317745B2 |
Data lifting for exception processing
Embodiments of the invention include systems, methods, and computer-program products for lifting metadata from financial documents to allow for automated exception processing. As such, allowing for automated decisions for exception processing to systematically be resolved base on matches between lifted metadata. The exceptions may include one or more irregularities such as bad micro line reads, outdated check stork, or misrepresentative checks that may result in a failure to match the check to an associated account for processing. As such, once an exception is identified during the processing the metadata lifted from the document with the exception may be utilized to search financial records at the financial institution to attempt to identify the correct version of the document. Subsequently, the system may correct the irregularity systematically and automatically. |
| US09317744B2 |
Device and method for determining gesture and operation method of gesture determining device
A device for determining a gesture includes a light emitting unit, an image sensing device and a processing circuit. The light emitting unit emits a light beam. The image sensing device captures an image of a hand reflecting the light beam. The processing circuit obtains the image and determines a gesture of the hand by performing an operation on the image; wherein the operation includes: selecting pixels in the image having a brightness greater than or equal to a brightness threshold; dividing the selected pixels; and determining the gesture of the hand according to a number of group of divided pixels. A method for determining a gesture and an operation method of the aforementioned device are also provided. |
| US09317743B2 |
System and method for automatically discovering, characterizing, classifying and semi-automatically labeling animal behavior and quantitative phenotyping of behaviors in animals
A method for studying the behavior of an animal in an experimental area including stimulating the animal using a stimulus device; collecting data from the animal using a data collection device; analyzing the collected data; and developing a quantitative behavioral primitive from the analyzed data. A system for studying the behavior of an animal in an experimental area including a stimulus device for stimulating the animal; a data collection device for collecting data from the animal; a device for analyzing the collected data; and a device for developing a quantitative behavioral primitive from the analyzed data. A computer implemented method, a computer system and a nontransitory computer readable storage medium related to the same. Also, a method and apparatus for automatically discovering, characterizing and classifying the behavior of an animal in an experimental area. Further, use of a depth camera and/or a touch sensitive device related to the same. |
| US09317740B2 |
Demographic analysis of facial landmarks
A set of training vectors may be identified. Each training vector may be mapped to either a male gender or a female gender, and each training vector may represent facial landmarks derived from a respective facial image. An input vector of facial landmarks may also be identified. The facial landmarks of the input vector may be derived from a particular facial image. A feature vector may containing a subset of the facial landmarks may be selected from the input vector. A weighted comparison may be performed between the feature vector and each of the training vectors. Based on a result of the weighted comparison, the particular facial image may be classified as either the male gender or the female gender. |
| US09317739B2 |
Information processing device and information processing method
An information processing device includes an image acquirer that acquires a shot image of a user, a registered user information holder that holds face identification data of a registered user, and a first authentication section that detects a face image of a registered user existing in the shot image by using face identification data held in the registered user information holder. The information processing device further includes a second authentication section that detects an image of an object having a predetermined positional relationship with a region of the face image detected by the first authentication section, and an information processing section that executes information processing based on detection results by the first authentication section and the second authentication section. The second authentication section uses information obtained in detection processing by the first authentication section for detection processing of the image of the object. |
| US09317737B2 |
Input apparatus, output apparatus, and storage medium for setting input and/or output mode based on user attribute
There is provided an input apparatus including an estimation unit configured to automatically estimate an attribute of a user, a setting unit configured to set an input mode based on the attribute of the user estimated by the estimation unit, and a control unit configured to control input based on the set input mode. |
| US09317735B2 |
Information processing apparatus, information processing method, and program to calculate position and posture of an object having a three-dimensional shape
An information processing apparatus includes a first setting unit setting a relative position-posture relationship between a 3D-shaped model of an object and a viewpoint from which the model is observed as a base position-posture, a detector detecting geometric features of the model observed from the viewpoint in the base position-posture as base geometric features, a second setting unit setting a relative position-posture relationship between the model and a viewpoint as a reference position-posture, a retrieval unit retrieving reference geometric features corresponding to the base geometric features of the model observed from the viewpoint in the reference position-posture, a first calculation unit calculating similarity degrees between the base geometric features and the reference geometric features, and a second calculation unit calculating evaluation values of correspondences between the base geometric features and the reference geometric features in accordance with the similarity degrees. |
| US09317730B1 |
Tuning process for a handheld scanner
Methods and systems for auto-tuning a handheld scanning device that can account for changes in the orientation between the handheld scanning device and a presented symbol can include capturing a first image containing a presented symbol, recording an orientation parameter and parameters associated with capturing the first image containing the presented symbol, capturing a subsequent image containing the presented symbol, recording an orientation parameter of the presented symbol contained in the subsequent image, comparing the orientation parameter of the symbol contained in the subsequent images to the orientation parameter of the presented symbol contained in the subsequent image, determining if the orientation parameter of the presented symbol contained in the subsequent images is substantially similar to the orientation parameter of the symbol contained in the first image, and recording parameters associated with capturing the subsequent images containing the presented symbol. |
| US09317729B2 |
RFID-based sensing of changed condition
RFID-based sensors, RFID readers and software sense a changed condition. In one embodiment, an RFID-based sensor includes a base that may be placed at a location where a condition may change. The sensor includes an RFID tag that is coupled to the base. The sensor also includes a detector that can be electrically coupled to the RFID tag. If the condition changes, an electrical property of the detector also changes, impacting an operation of the RFID tag. The impacted operation can be detected by an RFID reader/interrogator so as to provide a notification. An advantage over the prior art is that the condition change can be sensed wirelessly over a domain that can be laborious or hazardous to access otherwise. Moreover, RFID based sensors can be made by modifying common RFID tags. |
| US09317723B2 |
Passive RF tag with power cycling
A passive tag embedded in a package includes multiple conductive coils. A first coil receives radio frequency (RF) energy used to power the tag. Additional coils receive and/or transmit data signals, clock signals, and carrier signals. The RF energy and other signals may be at different frequencies. An RF probe includes a first coil to emit the RF energy to power the tag. The RF probe includes additional coils corresponding to the additional coils in the tag. The RF probe may turn off the RF signal used for power during communication. The RF energy may be rectified to provide DC power to circuits in the tag, or may be used directly for adiabatic circuits. The RF probe and the package may have complementary shapes to facilitate alignment of the coils. |
| US09317720B2 |
Method, system, and program for securely providing keys to encode and decode data in a storage cartridge
Provided is a method, system, and program for enabling access to data in a storage medium within one of a plurality of storage cartridges capable of being mounted into a interface device. An association is provided of at least one coding key to a plurality of storage cartridges. A determination is made of one coding key associated with one target storage cartridge, wherein the coding key is capable of being used to access data in the storage medium within the target storage cartridge. The determined coding key is encrypted. The coding key is subsequently decrypted to use to decode and code data stored in the storage medium. |
| US09317716B2 |
Privacy protection-type data providing system
An information providing apparatus for collecting data including personal information and distributing the data to a user terminal performs anonymization processing for converting data, which an individual who is an owner of personal information allows to use, into data with which the individual cannot be identified using multiple parameters, thus generating multiple anonymized data protecting the, privacy of the individual. Since each of the anonymized data is anonymized using a different parameter, the amount of information of each of the anonymized data is different. Then, when a request is received from a user terminal, anonymized data that can be provided to the user are identified from among multiple generated anonymized data on the basis of the reliability of the user who uses the user terminal. |
| US09317714B2 |
Storing user data in a service provider cloud without exposing user-specific secrets to the service provider
Subscriber (user) data is encrypted and stored in a service provider cloud in a manner such that the service provider is unable to decrypt and, as a consequence, to view, access or copy the data. Only the user knows a user-specific secret (e.g., a password) that is the basis of the encryption. The techniques herein enable the user to share his or her data, privately or publicly, without exposing the user-specific secret with anyone or any entity (such as the service provider). |
| US09317710B2 |
System and method for specification and enforcement of a privacy policy in online services
A method for implementing a privacy policy includes receiving code for an application which includes definitions for a set of classes of records and for each of the record classes in the set, a definition of at least one field. A user selects one or more of the record classes and fields of the application as sensitive. A records manager is generated for identifying an associated minimization service for generating a minimized value of data in the sensitive field. A mapping aspect identifies joins in the application code where the minimization service is to be called. When the records manager and mapping aspect are deployed with the application, the minimization service generates a minimized value of data in the respective sensitive field. |
| US09317709B2 |
System and method for detecting and integrating with native applications enabled for web-based storage
A cloud storage system provides remote access to a file associated with the cloud storage system. In response to a request to access the file, the cloud storage system identifies applications available to the request generator and capable of accessing the file, which may include both online web-based applications and applications installed on a device with which the user is accessing the file. The cloud storage system determines an application type of an identified application, and provides file access to the identified application based on the application type. |
| US09317708B2 |
Hardware trust anchors in SP-enabled processors
A trust system and method is disclosed for use in computing devices, particularly portable devices, in which a central Authority shares secrets and sensitive data with users of the respective devices. The central Authority maintains control over how and when shared secrets and data are used. In one embodiment, the secrets and data are protected by hardware-rooted encryption and cryptographic hashing, and can be stored securely in untrusted storage. The problem of transient trust and revocation of data is reduced to that of secure key management and keeping a runtime check of the integrity of the secure storage areas containing these keys (and other secrets). These hardware-protected keys and other secrets can further protect the confidentiality and/or integrity of any amount of other information of arbitrary size (e.g., files, programs, data) by the use of strong encryption and/or keyed-hashing, respectively. In addition to secrets the Authority owns, the system provides access to third party secrets from the computing devices. In one embodiment, the hardware-rooted encryption and hashing each use a single hardware register fabricated as part of the computing device's processor or System-on-Chip (SoC) and protected from external probing. The secret data is protected while in the device even during operating system malfunctions and becomes non-accessible from storage according to various rules, one of the rules being the passage of a certain time period. The use of the keys (or other secrets) can be bound to security policies that cannot be separated from the keys (or other secrets). The Authority is also able to establish remote trust and secure communications to the devices after deployment in the field using a special tamper-resistant hardware register in the device, to enable, disable or update the keys or secrets stored securely by the device. |
| US09317705B2 |
Secure data parser method and system
A secure data parser is provided that may be integrated into any suitable system for securely storing and communicating data. The secure data parser parses data and then splits the data into multiple portions that are stored or communicated distinctly. Encryption of the original data, the portions of data, or both may be employed for additional security. The secure data parser may be used to protect data in motion by splitting original data into portions of data, that may be communicated using multiple communications paths. |
| US09317703B2 |
Enhanced security setup for media encryption
Systems and methods for enhanced security of media are provided. Media security may be enhanced by improving the setup of encryption and/or decryption, by improving the performance of encryption and/or decryption, or by improving both. The calls related to enhanced security of media from an application in an emulated environment to a security module in the operating system hosting the emulated environment may be combined to reduce the overhead of accessing a security module. An application handling secure shell (SSH) communications may execute multiple calls to a cryptographic module in the host operating system. Because many calls to the cryptographic module during SSH communications follow patterns, two or more related calls may be combined into a single combined call to the cryptographic module. For example, a call to generate a server-to-client key and a call to generate a client-to-server key may be combined into a single call. |
| US09317702B2 |
System and method for providing secure inter-process communications
A user device provides a mechanism for securing messages communicated between trusted processes along an established Inter-Process Communication (IPC) channel. The mechanism permits the trusted processes to determine which messages to protect, and executes independently of platform-dependent IPC mechanisms. |
| US09317699B2 |
Preventing malicious observance of private information
A technique for preventing malicious observance of private information includes receiving an instruction of entering a mode of inputting private information; determining a correspondence between actual inputs and expected inputs; receiving an actual user input; and converting the actual input into an expected input as private information inputted by the user according to the correspondence. This security technique can prevent discovery of the private information of a user through observation. |
| US09317696B2 |
Data detection and protection policies for e-mail
Systems and/or methods for deploying and implementing data loss prevention (DLP) policy definition that may encapsulate the requirements, control objectives and directives, and/or the definitions of sensitive data types as stipulated directly or indirectly by the regulatory policy are disclosed. In one embodiment, DLP policies may be identified by an organization to run on top of a set of electronic file systems (e.g., email systems, file systems, web servers and the like). Organizations and their administrators may implement a set of DLP policy instance which are derived from DLP policy templates. DLP policy templates may comprise both structure and meaning—and may acquire a given DLP policy by the replacement of parameterized expressions with desired parameter values. In another embodiment, the state of the DLP policy instance may change according to the lifecycle of the policy instance deployment. |
| US09317695B2 |
System and method for automated remedying of security vulnerabilities
In a binary patching system for alleviating security vulnerabilities in a binary representation of a software application, a binary code portion determined to be associated with a security vulnerability is replaced with a replacement binary code that can avoid such vulnerability without substantially changing the functionality of the code portion that was replaced. The replacement binary code can be selected based on properties and/or context of the code portion to be replaced. |
| US09317691B2 |
Pre-boot software verification
Methods and systems for implementing pre-boot software verification may involve using an embedded controller (EC) and a basic input/output system (BIOS) to confirm each other's firmware using hash values. The hash values may be generated from certain portions of the firmware, which may overlap and may be specific to a particular firmware version. |
| US09317690B2 |
System and method for firmware based anti-malware security
A system for securing an electronic device includes a non-volatile memory, a processor coupled to the non-volatile memory, a resource of the electronic device, firmware residing in the non-volatile memory and executed by the processor, and a firmware security agent residing in the firmware. The firmware is communicatively coupled to the resource of an electronic device. The firmware security agent is configured to, at a level below all of the operating systems of the electronic device accessing the resource, intercept a request for the resource and determine whether the request is indicative of malware. |
| US09317688B2 |
Method and apparatus for providing machine-to-machine service
A method and an apparatus for providing service are provided. A method of providing service by a Machine-to-Machine (M2M) device includes transmitting a request for a first authentication to a Network Security Capability (NSEC), the request for the first authentication including an identifier of the M2M device, performing an Extensible Authentication Protocol (EAP) authentication with the NSEC, and generating, if the first authentication is successful, a secret key using at least one of a Master Session Key (MSK) and the identifier of the M2M device. |
| US09317682B1 |
Library-based method for information flow integrity enforcement and robust information flow policy development
Described is a system, method, and computer program product for preventing security flaws in untrusted computer source code by implementing information flow security in an existing programming language through use of an information flow security library. Confidentiality and integrity are encoded separately into the security information flow library. A security policy written in the host programming language is typechecked with a host programming language typechecker algorithm. Additionally, an untrusted module written in a restricted subset of the host programming language is typechecked with the host programming language typechecker algorithm. The untrusted modules cannot access confidential data in the host programming language. Typechecking of the untrusted modules enforces the security policy with the security information flow library. |
| US09317680B2 |
Method and system for protecting against unknown malicious activities by determining a reputation of a link
A method and system for protecting against unknown malicious activities by determining a reputation of a link are disclosed. A reputation server queries a database including reputation information associated with a plurality of links to retrieve a reputation of a redirected link. The reputation information may indicate whether the links are associated with a malicious activity. The reputation of the redirected link may be associated with the original link to create a reputation of the original link. |
| US09317679B1 |
Systems and methods for detecting malicious documents based on component-object reuse
A computer-implemented method for detecting malicious documents based on component-object reuse may include (1) identifying a plurality of malicious documents, (2) identifying a plurality of component objects that are contained within at least one malicious document from the plurality of malicious documents, (3) receiving an unknown document, (4) determining that at least one component object from the plurality of component objects was used to create the unknown document, and (5) performing a security action on the unknown document in response to determining that the component object was used to create the unknown document. Various other methods, systems, and computer-readable media are also disclosed. |
| US09317678B2 |
System and method for managing logins in a network interface
A system and method for managing logins and/or conducting data storage transactions, for example in a network interface. One exemplary embodiment comprises a method for interfacing a mass storage target system with a plurality of initiators. The method includes creating a data structure in local memory of a network interface chip to, at least in part, manage one or more logins; storing information comprising service parameter information m the data structure; and receiving a login request for a login comprising service parameter information. The method further includes comparing the service parameter information of the login request to the service parameter information stored in the data structure; determining, based at least in part on said comparing, to utilize the data structure to manage the login; and managing the login with the network interface chip using at least the data structure. |
| US09317675B2 |
Smartcard, smartcard system and method for configuring a smartcard
According to an aspect of the invention, a smartcard is conceived that comprises at least two pre-installed applications and an application user interface selector, wherein said application user interface selector is arranged to select and configure a specific authentication user interface corresponding to a specific one of the pre-installed applications in dependence on encoded information received from a host application. |
| US09317674B2 |
User authentication based on fob/indicia scan
Embodiments of the invention are directed to systems, methods and computer program products for receiving a request from a user for access to at least one function associated with a first application; determining that access to at least one function requires user authentication; initiating sensing of an authentication validating carrier comprising a first credential; determining the first credential based at least in part on the sensed authentication validating carrier; validating the first credential, thereby resulting in a first successful user authentication; and granting access to at least one function associated with the first application based on the validation of the first successful user authentication. |
| US09317673B2 |
Providing authentication using previously-validated authentication credentials
Embodiments of the invention are directed to systems, methods and computer program products for providing authentication using previously-validated authentication credentials. An exemplary apparatus is configured to receive a request to access a framework application, request, from a user, one or more authentication credentials corresponding to a primary level of user authentication, receive and validate the one or more authentication credentials, create, using the framework application, an authentication token based at least partially on the validation of the primary level of user authentication, wherein the authentication token is accessible by a plurality of applications, receive a request, from the user, to access one or more non-framework applications; and authenticate the one or more non-framework applications, where authenticating the non-framework applications requires accessing the authentication token created by the framework application such that the authentication is at least partially based on the primary level of user authentication. |
| US09317671B2 |
System and method for shared folder creation in a network enviornment
A method includes receiving a request over a network from a user to mount a shared folder, which is configured to store electronic data to be selectively accessed based on a policy. The method also includes evaluating whether the user is authenticated. The method also includes generating a random mount point for mounting the shared folder, and redirecting the user to the random mount point if the user is authenticated. |
| US09317670B2 |
Security based on usage activity associated with user device
A method includes receiving usage data associated with a user device. The usage data includes information based on at least one usage activity associated with one or more applications on the user device. The method may also include analyzing the usage data based on predetermined criteria and determining a security question and a corresponding answer based on the usage data. The security question and the corresponding answer are stored in an associated database. The method further includes providing the security question and the corresponding answer in response to a request for the security question and the corresponding answer. Access is provided to a system based on an input of the corresponding answer in response to the security question. |
| US09317667B2 |
Automatic computer program obfuscation system
A computer program obfuscating system including a processor to provide a computer program including at least one computer program variable, and add an opaque predicate to the computer program to obfuscate the computer program so that the opaque predicate added to the computer program comprises at least one polynomial including a polynomial P, during execution of the obfuscated computer program, the polynomial P is evaluated yielding at least one result including a first result R1, and during execution of the obfuscated computer program, the opaque predicate is evaluated based on the at least one result R1 such that a decision as to whether or not to perform the first command is dependent upon comparing the first result R1 to at least one value in accordance with a predetermined mathematical relationship. Related apparatus and methods are also included. |
| US09317661B2 |
Automatic implant detection from image artifacts
A computer-implemented method of implant detection includes receiving a three-dimensional (3D) image of an anatomy portion of a patient from computed tomography (CT) projections of the patient in an image processing computing system. A cluster of voxels forming an implant candidate is identified on a CT slice of the 3D image and the identified implant candidate is compared with artifacts of implants from an implant database stored in a memory of the computing system. A best-fit implant is selected from the implant database and a graphical image of the best-fit implant is overlaid on the CT slice on a display of the computing system. |
| US09317660B2 |
Group performance monitoring system and method
The present invention provides a group monitoring device for monitoring a plurality of individuals engaged in an athletic activity, the device including a display configured to display, during an athletic activity: a metric relating to each of a plurality of individuals engaged in the athletic activity, and a status of a system component used to monitor the athletic activity. The group monitoring device may also include an input configured to allow manipulation of the display. |
| US09317657B2 |
Method, system, and computer program product for tracking of blood glucose variability in diabetes
An embodiment may be in the field of glycemic analysis and control. More specifically, an embodiment or approach may provide a novel method, system, and computer program for the visual and quantitative tracking of blood glucose variability in diabetes from self-monitoring blood glucose (SMBG) data and/or continuous glucose monitoring (CGM) data. More particularly, an embodiment or aspects thereof may use glucose measurements obtained from self-monitoring data and/or CGM data of an individual or a group of individuals to track and analyze blood glucose variability. |
| US09317652B1 |
Computer implemented system for quantifying stability and flexibility relationships in macromolecules
A computer-implemented system and method is provided for analyzing thermodynamic and mechanical properties and relationships between these properties for a molecule or collection of molecules within a chemical environment under given thermodynamic conditions. The system is based on user-defined rules for a free energy decomposition and its reconstitution, explicit solute and implicit solvent specifications, and a selection of thermodynamic condition. |
| US09317648B2 |
Circuit board design and correction method determining a difference between groupings of layers
A board design aid device includes a calculating and correcting units. The calculating unit groups a plurality of layers in a multi-layer board into a plurality of pairs of layers based on design information of the multi-layer board, the plurality of layers being stacked and derives a difference of total amounts in respect to a board design element, each of the total amounts being related to each layer of a pair of layers of the plurality of pairs of layers, the board design element being related to a warp of the multi-layer board. The correcting units, based on the difference of the total amounts, corrects an amount of the board design element for at least one of layers among at least one of the plurality of the pairs of layers so that the difference of the total amounts of the board design element is maintained within a certain range. |
| US09317641B2 |
Gate substitution based system and method for integrated circuit power and timing optimization
A processing device can identify gates of an integrated circuit design having a slack value less than a predefined slack threshold. The processing device can further, for each of the identified gates, determine (i) a number of nodes of the integrated circuit design that experience a timing slack improvement if the gate is swapped with an alternative implementation having a reduced delay or (ii) a sum of timing slack improvements experienced by nodes of the integrated circuit design if the gate is swapped with the alternative implementation having a reduced delay. The processing device can still further swap the gate with the alternative implementation having the reduced delay if the determined number or sum is greater than a corresponding predetermined threshold. |
| US09317639B1 |
System for reducing power consumption of integrated circuit
A method for reducing dynamic power consumption of an integrated circuit design having flip-flops with an EDA tool that initiates clock gating by gating a clock signal received by the flip-flops. A first set of positive-edge triggered flip-flops and a second set of negative-edge triggered flip-flops, and a first set of OR-type clock gating cells and a second set of AND-type clock gating cells are selected from a technology library. The OR-type clock gating cells are connected to clock input terminals of the first set of positive-edge triggered flip-flops and the AND-type clock gating cells to clock terminals of the second set of negative-edge triggered flip-flops. |
| US09317635B2 |
Processes and systems for predicting corrosion
Systems and methods for evaluating the corrosion risk in operations with equipment for the handling an acid gas-containing solutes, e.g., an amine unit for the removal of acid gases such as H2S, CO2, etc., are provided. Input parameter values corresponding to geometrical parameters of at least an equipment (or a portion of an equipment) susceptible to corrosion risk, operating parameters, fluid dynamic properties, and properties of the solute are received by the system. Based on the input values, the systems and methods derive a minimum pressure above which acid gas flashing occurs given the localized pressure drop, causing corrosion in the identified location. In one embodiment, the systems and methods provide an assessment correlating acid gas loadings with the corrosion risk. |
| US09317633B2 |
Simulation method for determining aerodynamic coefficients of an aircraft
A computer method of simulating a fluid flow in an aircraft environment to determine at least one aerodynamic coefficient, comprising obtaining a first series of values of the aerodynamic coefficient. The method also includes defining a criterion for convergence of said aerodynamic coefficient, selecting a determined set of terms belonging to said first series, defining a monotonic function configured to make a relatively expanding transformation in said determined set relative to the complement of said set, applying said monotonic function on said first series to form a second series of values of the aerodynamic coefficient, determining said aerodynamic coefficient by plotting a variation curve representative of said second series of values of the aerodynamic coefficient, and displaying said variation curve including an intrinsic zoom of the convergence zone of said aerodynamic coefficient. |
| US09317631B2 |
Surgical guide with cut resistant inserts
A resection guide can be configured to guide a resection tool toward a graft source, and can include a resection guide body made from a first material, and a guide member made from a second material. The second material is harder than the first material. |
| US09317629B1 |
Automatic comparison and performance analysis between different implementations
The present invention provides a method and system for automatic verification of automatically generated standalone code intended for execution on a target computing platform against its original design simulated in a simulation environment. The present invention also applies to execution comparisons between two implementations, such as two simulations, one simulation and one standalone code implementation, or two standalone code implementations. Block diagrams can be used to create a comparison model that compares two implementations. The comparison of different implementations can be performed at a block level, a subsystem level, a model level, or multi-model level. The present invention allows automatic comparison once a user supplies the intermediate outputs and/or signals that the user wants to compare and monitor. Reports can be generated to show the statistics of the comparison results. |
| US09317620B2 |
Server device
The server device includes an index file generating unit, and a transferring unit. The index file generating unit generates an index file with respect to a prescribed directory in a hypertext format. The prescribed directory is a part of the hierarchy structure. The index file includes a list of identification information that identifies a file or a first subdirectory in the prescribed directory, and location information navigating to the file or the first subdirectory. The transferring unit transfers the index file to the client device in response to the command received at the receiving unit instructing to transfer the index file, whereas the transferring unit transfers the file stored in the storing unit in response to the command received at the receiving unit instructing to transfer the file other than the index file. |
| US09317615B2 |
Multi-domain co-browsing utilizing localized state management
A master and a slave computing device within a co-browsing session can be identified. The devices can be associated with a first Unified Resource Identifier (URI) where a portion of the URI is a fully qualified domain name of a Domain Name System (DNS) hierarchy. The devices can be associated with a co-browsing application. A request associated with a second URI from the master computing device can be detected. The second URI can share a root domain with the first URI. A portion of a master artifact associated with the master device can be conveyed to the slave device. The master artifact can be associated with state information of the session. A portion of a slave artifact linked to the slave device can be modified with the portion of the master artifact. The devices can be navigated to the second URI in response to the request. |
| US09317612B1 |
System and method for managing multiple content feeds
A system and method for enabling networked computer users to manage multiple content feeds is disclosed. A particular embodiment includes collecting digital content from a plurality of content feeds; receiving a subscriber-provided affinity indicator from a subscriber; filtering the digital content based on the subscriber-provided affinity indicator to produce filtered content; identifying portions of the filtered content not previously delivered to the subscriber; and notifying the subscriber of the filtered content not previously delivered using one of a plurality of subscriber-configured delivery mechanisms. |
| US09317610B2 |
Building a social graph with sharing activity between users of the open web and inferring interest of a node based on edges between first-degree and second-degree nodes
A social graph is built which includes interactions, sharing activity, and connections between the users of the open Web and can be used to improve ad targeting and content personalization. Sharing activity between two users will affect ads or content that both users will be presented while surfing the Web. This sharing activity includes sending of links, sending of videos, sending of files, cutting and pasting of content, sending text messages, and sending of e-mails. Interest of a node can be inferred based on edges between first-degree and second-degree nodes. |
| US09317606B1 |
Spell correcting long queries
A computer implemented method and system for spell correcting terms within a string of terms that a computer system receives from a computer readable data string representative of a user search query. |
| US09317598B2 |
Method and apparatus for generating a compilation of media items
In an exemplary embodiment, an approach is provided for dynamically generating a compilation of media items during playback of one or more media items. A plurality of media items is received from a plurality of mobile devices. Respective context vectors for the media items are determined. The context vectors include, at least in part, orientation information, geo-location information, timing information, or a combination thereof associated with the creation of the respective media items. A compilation of at least a portion of the media items is dynamically generated during playback of one or more of the media items based, at least in part, on the context vectors. |
| US09317596B2 |
Function-based method for classifying and fusing system behavior information in product development
A method of automatically developing an ontology for product function and failure mode documentation for an apparatus. The apparatus is identified. A function-flow model is generated for the identified apparatus for identifying a composite structure of the apparatus. Functions and failure modes associated with the identified apparatus are enumerated. Failure data is obtained from a plurality of heterogeneous data sources. A semantic similarity module is applied to the enumerated failures by comparing a plurality of documents between the data sources. The semantic similarity module bridges a variety of terms used in the heterogeneous data to describe a respective failure. Failures associated with the enumerated apparatus functions are extracted from the plurality of documents between heterogeneous data sources. A composite of related terminology is generated for each identified failure mode. A failure mode information document is generated utilizing the composite of related terminology for each identified failure mode. |
| US09317595B2 |
Fast title/summary extraction from long descriptions
Techniques are described herein for automatic generation of a title or summary from a long body of text. A grammatical tree representing one or more sentences of the long body of text is generated. One or more nodes from the grammatical tree are selected to be removed. According to one embodiment, a particular node is selected to be removed based on its position in the grammatical tree and its node-type, where the node type represents a grammatical element of the sentence. Once the particular node is selected, a branch of the tree is cut at the node. After branch has been cut, one or more sub-sentences are generated from the remaining nodes in the grammatical tree. The one or more sub-sentences may be returned as a title or summary. |
| US09317590B2 |
Search method, search device and storage medium
Disclosed are a search method, a search device and a storage medium. The method comprises obtaining all relevant documents of information to be sought; calculating a relevancy between each relevant document and the information to be sought based on a word matching algorithm and a semantics matching algorithm; performing sequencing processing on all the relevant documents according to the relevancy obtained through calculation, and displaying a sequencing result. Further disclosed is a search device. The present invention comprehensively considers matching between words, and matching of the semantics relationship between words, obtains an accurate relevancy calculation result, provides an ideal search result to a user, and improves satisfaction of the user. |
| US09317583B2 |
Dynamic captions from social streams
Architecture that augments a search result entry caption with keywords related to topics currently being shared and discussed in other social network information sources. This can provide a much better idea of the content of the website or webpage. The architecture obtains a link from updates of social topics of social network information sources (e.g., social networks for people places professionals, etc.), extracts title content of a document title associated with the link, compares the title content to document text for similarity to create non-duplicative content, creates keywords related to popular social topics from the non-duplicative content, and then augments a search result entry of a search result page with the keywords of the popular social topics. |
| US09317581B2 |
Categorizing an object
An object may be categorized upon distribution of the object from a sender system to a recipient system. The object may be assigned to at least one recipient category in a recipient category hierarchy according to a first predefined mapping from a sender category hierarchy to the recipient category hierarchy. The object is initially assigned to a sender category in the sender category hierarchy. There is applied to the object a second predefined mapping from the recipient category hierarchy to the sender category hierarchy. It is determined whether the first and second predefined mappings converge. If the first and second predefined mappings do not converge, there may be executed a rule-based reassignment algorithm to make the first and second predefined mappings converge. |
| US09317580B2 |
Imaging protocol update and/or recommender
A method includes obtaining electronically formatted information about previously performed imaging procedures, classifying the information into groups of protocols based on initially selected protocols for the previously performed imaging procedures and generating data indicative thereof, identifying deviations between the classified information and the corresponding initially selected protocols for the previously performed imaging procedures, and generating a signal indicative of the deviations. A method includes recommending at least one of a plurality of protocols for an imaging procedure based on at least one of a score, a probability, or a pre-determined rule, which is based on extracted medical concepts from patient information and extracted medical concepts from previously imaged patient information, and generating a signal indicative of the recommendation. |
| US09317574B1 |
System and method for managing and identifying subject matter experts
In one embodiment, a method includes collecting communications from a plurality of sources. The method further includes selecting a set of topics and a set of users. In addition, the method includes, for each user, identifying, from the collected communications, conversations in which the user has participated. Moreover, the method includes, for each topic, for each user: measuring a proportion of the identified conversations that contain content suggestive of the topic; analyzing timing of the identified conversations; and examining relationships among data attributes of the identified conversations. Further, the method includes generating multidimensional expertise data. The multidimensional expertise data is representative of the user's expertise on the topic. The multidimensional expertise data includes a topical dimension, an expertise-scope dimension, and a timeline dimension. The method also includes, for each topic, ranking the set of users by expertise index. Also, the method includes providing a searchable interface. |
| US09317572B2 |
Configuring a system to collect and aggregate datasets
Methods for configuring a system to collect and aggregate datasets are disclosed. One embodiment includes, identifying a data source in the system from where dataset is to be collected, configuring a machine in the system that generates the dataset to be collected, to send the dataset to the data source, identifying an arrival location where the dataset that is collected is to be aggregated or written, and/or configuring an agent node by specifying a source for the agent node as the data source in the system and specifying a sink for the agent node as the arrival location. |
| US09317569B2 |
Displaying search results with edges/entity relationships in regions/quadrants on a display device
Methods and systems for Web-scale entity relationship extraction are usable to build large-scale entity relationship graphs from any data corpora stored on a computer-readable medium or accessible through a network. Such entity relationship graphs may be used to navigate previously undiscoverable relationships among entities within data corpora. Additionally, the entity relationship extraction may be configured to utilize discriminative models to jointly model correlated data found within the selected corpora. |
| US09317565B2 |
Alerting system based on newly disambiguated features
The present disclosure relates to a method of alerting users regarding newly disambiguated features. More specifically, a newly disambiguated feature may pass through different filters/restrictions, such as, the known knowledge base. The disclosed known knowledge base may filter the newly disambiguated feature, comparing the newly disambiguated features to the existing features to discover a new feature of interest. Particularly, the disclosed new feature of interest may include a new person, a new phone number, a new place, a new company, among others. Finally, if there is a new feature that did not match with the existing disambiguated features in the known knowledge base, then an alert may be emitted to a user. |
| US09317564B1 |
Construction of text classifiers
Methods, systems, and apparatus, including computer program products, for constructing text classifiers. The method includes receiving a collection of candidate phrases for a given topic; filtering the received candidate phrases to remove erroneously included candidate phrases; assigning weights to the candidate phrases including scoring each candidate phrase using an initial classifier and assigning weights to the candidate phrases based on the scores; and generating a linear classifier using the filtered and weighted candidate phrases, where the linear classifier varies the weights for each phrase candidate depending on the length of the document being classified. |
| US09317559B1 |
Sentiment detection as a ranking signal for reviewable entities
A method, a system and a computer program product for ranking reviewable entities based on sentiment expressed about the entities. A plurality of review texts are identified wherein each review text references an entity. A plurality of sentiment scores associated with the plurality of review texts are generated, wherein each sentiment score for a review text indicates a sentiment directed to the entity referenced by the review text. A plurality of ranking scores for the plurality of entities are generated wherein each ranking score is based at least in part on one or more sentiment scores associated with one or more review texts referencing the entity. A plurality of search results associated with the plurality of entities are displayed based at least in part on the ranking scores. |
| US09317558B2 |
Intelligent unmasking in an in-memory database
Database data is unmasked in order to facilitate its efficient handling by a database engine. In response to a request for data of a masked table including a masked element, an engine identifies a mask interval, and then performs a first join with unmasked elements sharing a common key. The table resulting from this first join is then grouped according to a highest level location of the mask. A second join is then performed between the results of this grouping and the mask interval, to produce a corresponding unmasked table including a plurality of unmasked elements corresponding to the masked element. Unmasking according to embodiments may be particularly useful in leveraging processing power of an in-memory database engine, allowing it to efficiently perform batch processing of requests for masked data received from software of an overlying application layer. |
| US09317557B2 |
Answering relational database queries using graph exploration
Embodiments are directed to processing queries using schema graph traversal and to establishing a schema graph that allows queries to be answered by traversing graph nodes. In one scenario, a computer system receives a query which specifies relational tables and corresponding relationships that are to be retrieved from a relational database. The computer system accesses a schema graph that includes graph nodes representing relational tables, as well as edges that identify relationships between the relational tables. The graph nodes include relational data that was loaded from one storage area (e.g. a non-volatile storage area), and the schema graph is stored in a second storage area (e.g. a volatile storage area). The computer system then traverses the schema graph, beginning at a set of graph nodes and continuing along the edges to other graph nodes until the query has been satisfied, and then reports the results of the graph traversal. |
| US09317555B2 |
Query method for a distributed database system and query apparatus
A method, system, and/or computer program product queries a distributed database system. In one embodiment, the query method comprises: parsing a query request; generating an access plan for the query request, wherein the access plan specifies therein a database table related to the query request, and the database table has a plurality of copies stored in different database devices respectively; selecting, based on status information of each of the plurality of copies of the specified database table, one copy from the plurality of copies as a target database table; and executing a query operation in the target database table according to the access plan. |
| US09317554B2 |
SQL generation for assert, update and delete relational trees
Presented is a system and method for evaluating relational database queries in a distributed system. An optimized query plan is received by a control node. The query plan is decoded to a SQL statement that is semantically equivalent to the query plan, even though the query plan contains elements that have no direct analog in SQL. The decoded SQL is transmitted to a compute node for execution. |
| US09317552B2 |
Reusing existing query plans in a database system
A system and method for executing query plans preprocesses a user's queries to identify and extract select parameters of the query, creates a skeletal query with reference to the extracted parameters, creates and compiles an executable version of the skeletal query, then executes the compiled version of the skeletal query using the particular parameters in the current query. The compiled version of the parameterized skeletal query is stored, and when another query is submitted that matches the skeletal query (but with potentially different parameters), the previously compiled skeleton query is executed with the parameters of this latter query. |
| US09317551B1 |
Transforming a search query into a format understood by a technical computing environment (TCE)-based search engine
A device provides for display a technical computing environment (TCE)-based search engine user interface, and receives a query from a user via the TCE-based search engine user interface. The device divides the query into one or more query elements, and processes the one or more query elements based on at least one of query content, information requested by the query, a model associated with the query, or an execution result of the model. The device transforms the query into another query, different than the query, based on the processed one or more query elements, and provides the other query to the TCE-based search engine for further processing. |
| US09317542B2 |
Declarative specification of data integration workflows for execution on parallel processing platforms
A method for receiving a declarative specification including a plurality of stages. Each stage specifies an atomic operation, a data input to the atomic operation, and a data output from the atomic operation. The data input is characterized by a data type. Links between at least two of the stages are generated to create a data integration workflow. The data integration workflow is compiled to generate computer code for execution on a parallel processing platform. The computer code configured to perform at least one of data preparation and data analysis. |
| US09317540B2 |
Method, system and aggregation engine for providing structural representations of physical entities
The present disclosure relates to a method a system and an aggregation engine for providing a structural representation of a physical entity. Processing units provide representation of elements composing the physical entity. Processing units comprise a label, which represent the elements, and a state. Links are established between the processing units. By iteration in the aggregation engine, the states and labels of the processing units are updated based on states and labels of linked processing units. A graphical representation of the physical entity is obtained based on the labels, on the states, and on the links. |
| US09317539B2 |
Time-series database setup automatic generation method, setup automatic generation system and monitoring server
If the operations manager makes configuration changes of the log database through configuration management interface, the configuration management interface records configuration information thereof on an management database. Furthermore, when log data of a monitoring target device are collected in a log collection unit through the log database, a log data volume analysis unit reads utilization information of data volume of the log database, and records the reading on a management database. A configuration changes proposal generating unit automatically generates configuration changes proposal of the log database based on the information recorded on the management database. Moreover, a metrics value for evaluating time required for configuration changes, a metrics value for evaluating performance in connection with the configuration changes, and a metrics value for evaluating the data volume in connection with the configuration changes are calculated, and an effect and an influence of changes proposal are presented to the operations manager. |
| US09317537B2 |
Database and method for evaluating data therefrom
A computer system for calculating a quantity from a set of input values is disclosed. The computer system comprises a database that is configured to store a sequence of first input values xn wherein n=1, 2, . . . i, wherein for any value of n, xn lies between xn+1 and xn−1 in the sequence. Each value of x has associated with it a second input value yn, a conversion value pn that is calculated from yn according to a conversion algorithm, and an output value zn, wherein zn=zn−1+pn. The database is configured to store the plurality of output values zn. |
| US09317535B2 |
Cumulative image recognition method and application program for the same
A cumulative image recognition method performs a matching analysis on frame and matching data in a mobile device when the mobile device focuses on a recognition target and captures frame of the image of the recognition target. The method obtains the feature value of each matching data according to the matching result, and determines if one of the matching data has an optimal result matching the recognition target according to several entries of feature values. If no optimal result, then the method respectively sums up the feature value of each matching data into a summing feature value and determines if the plurality of the matching data has a candidate result similar to the recognition target according to several entries of the summing feature values. If no candidate result, the mobile device captures the next frame on the recognition target, and performs next matching analysis on the next frame. |
| US09317532B2 |
Organizing nearby picture hotspots
A method of accessing an image database containing location data and determining one or more clusters of the digital images based on their location data. A hotspot location is determined for representing the cluster of the digital images and the results are stored for later access. The computer is connected to a network and receives data from a device including data identifying a current location. After determining that the device is within a selected notification distance from the hotspot location, a notification is transmitted over the network. |
| US09317524B2 |
Location assignment daemon (LAD) for a distributed storage system
A system and method for generating replication requests for objects in a distributed storage system is provided. For a respective object in a distributed storage system the following is performed. Replication policies for the object that have not been satisfied are determined. Replication requests are ranked for the object whose replication policies have not been satisfied based on a number of replicas of the object that need to be created in order to satisfy the replication policies for the object. Replication requests are generated for the object based at least in part on the replication policies for the object that have not been satisfied and on a current state of the distributed storage system. At least a subset of the replication requests for the objects in the distributed storage system are distributed to respective instances of the distributed storage system corresponding to the replication requests for execution. |
| US09317523B2 |
Composing objects in hosted storage
A hosted storage system includes a namespace that contains object identifiers. A first object containing a first data component is stored. A first object identifier in the namespace uniquely identifies the first object. A second object containing a second data component is stored. A second object identifier in the namespace uniquely identifies the second object. A compose object request that designating the first object identifier, the second object identifier, and a third object identifier in the namespace is received. A third object that includes the first data component and the second data component without duplicating the first data component and the second data component is created. The third object identifier is associated with the third object such that the third object identifier uniquely identifies the third object. |
| US09317522B2 |
Saving files from third-party systems directly to a cloud storage system
A method for saving a file stored on a third-party system directly to a cloud storage system includes providing a third-party system with an embeddable user interface for saving a plurality of files stored on the third-party system to a server hosting the cloud storage system. The method further includes receiving at the server a save request from a user on a client computer using the embeddable user interface to select the first file to be stored on the server, where the save request comprises information identifying a first file in the plurality of files. The method further includes authenticating the save request, downloading the first file from the third-party system directly to the server using the information identifying the first file, and saving the first file on the server. |
| US09317521B1 |
Cloud object store for checkpoints of high performance computing applications using decoupling middleware
Cloud object storage is enabled for checkpoints of high performance computing applications using a middleware process. A plurality of files, such as checkpoint files, generated by a plurality of processes in a parallel computing system are stored by obtaining said plurality of files from said parallel computing system; converting said plurality of files to objects using a log structured file system middleware process; and providing said objects for storage in a cloud object storage system. The plurality of processes may run, for example, on a plurality of compute nodes. The log structured file system middleware process may be embodied, for example, as a Parallel Log-Structured File System (PLFS). The log structured file system middleware process optionally executes on a burst buffer node. |
| US09317514B2 |
Synthesized identifiers for system information database
Techniques for managing system information are disclosed. In one embodiment, a piece of system information is received, a synthesized link is created linking a system information identifier corresponding to the system information to a synthesized group identifier, the synthesized group identifier represents a group to which the synthesized information/synthesized information identifier belongs. |
| US09317513B1 |
Content database for storing extracted content
Systems and methods for a content database storing extracted content. A content manager engine executing on a computer system performs various functions in relation to the content database. The content manager engine may extract content fragments from documents of different document types and store the content fragments to content entries of the content database. The content manager engine may reproduce a selected document using the content database, allow direct modification of content entries, and merge two documents of different types into a single document. The content manager engine may also be configured to produce a solution document using the content database based on one or more received user selections. A solution document may be provided to address issues or queries regarding computer system hardware or software. The solution document may comprise a description of any services, products, and/or technologies related to the issue or query. |
| US09317512B2 |
Assured federated records management
A record is managed by obtaining from an external system on which a stored object comprising the record is stored a property of the stored object as stored on the external system. A stored property associated with the record is compared with the obtained property of the stored object. In the event the comparison does not match, responsive action is taken. |
| US09317511B2 |
System and method for managing filesystem objects
A system and method of operating a filesystem for managing filesystem objects is disclosed. The filesystem objects are characterized by metadata parameters included in a global directory object arranged in a plurality of global directory object (GDO) pages. Responsive to receiving a request for creating a new filesystem object, a parent key is obtained. The parent key is indicative of an identifier of a direct parent directory requested for hosting the new filesystem object. A target page that corresponds to the parent key is located within the plurality of GDO pages. The target page further includes a direct parent directory metadata record associated with the direct parent key and includes metadata parameters related to the direct parent directory. An object key is created as corresponding to the same target page, thereby enabling accommodation of an object metadata record, related to the new filesystem object, on the target page. |
| US09317507B2 |
Method and system for updating file segments of content on a portable media player device
A method and system includes a storage device 32 having an interface 57, a portable media player 36 in communication with the storage device through the interface 57. The portable media player 36 stores a file having a plurality of segments therein. The storage device 32 updates a first segment of the plurality of segments in the portable media player 36 through the interface 57. |
| US09317506B2 |
Accelerated data transfer using common prior data segments
Accelerating data transfers is described herein. When a second computing system is requested to transfer a file to a first computing system, a data segment is sent to the first computing system instead of the entire file. The data segment is then compared to data stored within a data store on the first computing system. If the data segment and data within the data store match, then the file does not need to be transferred, and a pointer points to the file already located on the first computing system. If the data segment does not match any data stored in the data store, then the file is transferred from the second computing system to the first computing system. By comparing only the data segment instead of sending an entire file, data transfer is able to be greatly expedited in situations where the data is common between systems. |
| US09317504B2 |
Method for searching for flash video tag in bitstream and searching apparatus thereof
A method for searching for a flash video (FLV) tag in a bitstream includes the following steps: setting a first start position and a first search length related to a first search process, wherein the first search length indicates a bitstream length of the first search process performed upon the bitstream; starting the first search process upon the bitstream from the first start position to search for the FLV tag; when the FLV tag is not found in the first search length, setting a second start position related to a second search process immediately following the first search process, wherein the first start position and the second start position are separated by a time period equaling a sum of the first search length and a first skip length corresponding to the first search process; and starting the second search process upon the bitstream from the second start position to search for the FLV tag. |
| US09317502B2 |
System and method for monitoring items
Systems, software, and methods for improved monitoring and identification systems for items and units to be serviced and reported, such as seal tags and other information from items or units to be serviced. |
| US09317501B2 |
Data security system for natural language translation
A method, computer system, and computer program product for translating information. The computer system receives the information for a translation. The computer system identifies portions of the information based on a set of rules for security for the information in response to receiving the information. The computer system sends the portions of the information to a plurality of translation systems. In response to receiving translation results from the plurality of translation systems for respective portions of the information, the computer system combines the translation results for the respective portions to form a consolidated translation of the information. |
| US09317496B2 |
Workflow system and method for creating, distributing and publishing content
Disclosed in some examples are systems, methods and machine readable media for the management of content creation. In some examples the system includes a content management component configured to store portions of an electronic content work and to implement version control of the electronic content work; a defect tracking component configured to store a defect record related to a stored portion of the electronic content work; a publication pipeline component configured to format the electronic content work for publication; and a integration component configured to present a graphical user interface which allows for editing the stored portions of the electronic content work, editing the defect record, and instructing the publication pipeline to format the electronic content work for publication. |
| US09317494B2 |
Graphical hierarchy conversion
Embodiments of the invention generate a primary interface to display data in a flat format. A secondary interface is generated at the request of a user to display the same data in a tree or similar hierarchical format. The secondary interface is initiated from the primary interface. A user selects data in the secondary interface and thereby navigates to the corresponding data in the primary interface. This system improves user productivity by increasing the speed at which a user finds and interacts with stored data in the supply chain management system. |