| Document | Document Title |
|---|---|
| US09281610B2 |
Tray type card connector having a front cover with a sealing member
Provided is a tray type card connector that is compatible with waterproof electronic devices and that can easily perform the insertion and removal of a card into/from the electronic devices. A tray type card connector includes a card tray; a housing having a tray insertion portion; a plurality of contacts arranged in the housing so as to project within the tray insertion portion; a front cover portion fitting in a casing opening portion opened at a lateral surface portion of a casing of an electronic device A, at a front end portion of the card tray; a ring-shaped cover water-sealing member made of an elastic material at an outer periphery portion of the front cover portion. |
| US09281606B2 |
Connector for automobile wiring harness
A connector includes: a terminal; a housing; a rear holder; and a rubber plug. A terminal receiving chamber of the housing is provided with: a first receiving portion receiving a wire connecting portion, an electric wire connected to the wire connecting portion, and a rubber plug; a second receiving portion; and a step wall interposed between the first and second receiving portions and allowing a flange portion formed on the wire connecting portion to abut on the step wall. The rubber plug is composed of a ring-shaped packing attached to the electric wire and keeping a space between an outer peripheral wall of the electric wire and an inner wall of the first receiving portion watertight, and a resin member. The resin member is provided with a buried portion buried in the packing, and a cylinder portion extended from the buried portion and interposed between the flange and the packing. |
| US09281600B2 |
Connector with retainer having reinforced escaping portion
A connector (10) includes a housing (30) with a terminal accommodating portion (31) into which a plurality of differently dimensioned terminals (20) are to be accommodated, and a retainer (60) retains the terminals (20) by being inserted through a side surface of the housing (30). The retainer (60) is moved laterally by operating an operating portion (63) and is held at a partial locking position and a full locking position by locking pieces (65) of the retainer (60) that engage locked portions (44) of the housing (30). The terminals (20) include medium terminals (20M) locked by medium locking lances (56) fit into an escaping portion (68) between the operating portion (63) and the locking pieces (65) in the retainer (60). The escaping portion (68) includes a reinforcement (69) for preventing deformation of the escaping portion (68). |
| US09281598B2 |
Contact element
A contact element for making electrical contact with a contact area of a mating contact element, wherein a contact region forms at least two contact points, and wherein the two contact points are distinguished from one another in the new state in respect of the distance from the contact area of the mating contact element, so that, in the new state, a first of the contact points makes contact with the contact area and, after a defined amount of wear of the first contact point, the second contact point makes contact with the contact area. |
| US09281593B2 |
Connector which is reduced in possibility of damage due to warping of a connection object without decreasing the insertability of the connection object
A connector is for connection to a plate-like connection object. The connector includes contacts, a housing holding the contacts, and an operating member for connecting the connection object to the contacts. The operating member has a pair of rotating shaft portions spaced apart from each other in a right-left direction and is rotatably supported by the housing so as to be displaceable between an initial position and a connecting position. The housing has a receiving portion which is open upward. The receiving portion is adapted to receive, from obliquely front, insertion of the connection object and to receive the operating member when the operating member is in the connecting position. The housing further has protruding portions in the rear part of the receiving portion for preventing upward warping of the connection object. The protruding portions are located between the pair of rotating shaft portions. |
| US09281592B2 |
Female connector and card edge connector
A female connector has a plurality of contacts to be connected to a card member having a card edge portion with a plurality of card edge terminals formed on a substrate, and a housing disposed with contact housing portions, and the housing has a flat opening portion on one side into which the card edge portion is inserted, an insertion port on the other side, and an inner space therein communicating with the flat opening portion and disposed with the card edge portion, and the contact housing portion has at least two stages of first contact housing portions formed on one side relative to the inner space of the housing and communicating with the insertion port, and a stage of second contact housing portions formed on the other side relative to the inner space of the housing and communicating with the insertion port. |
| US09281590B1 |
Electrical connector having improved resonance
An electrical connector includes an insulative housing having a longitudinal slot and at least one row of contacts retained in the housing. Each of the contacts defines a retention portion, a resilient contacting arm extending from the retention portion with a contacting portion protruding into the longitudinal slot, and a soldering tail extending out of the housing. The contacts include at least two differential pairs adjacent to each other and at least one grounding contact sandwiched therebetween in the longitudinal direction. The contacting portions of each differential pairs are closer to the mating face than the contacting portion of the grounding contact in the mating direction, which can improve resonance of the electrical connector during transferring high-speed signals. |
| US09281589B2 |
Electrical connector having better high-frequency performance
An electrical connector includes an insulative housing and a plurality of conductive terminals fixed in the insulative housing. The conductive terminals includes a first terminal group, the first terminal group includes a plurality of signal terminals and a plurality of grounding terminals. The insulative housing defines a cured conductive adhesive, the cured conductive adhesive makes the grounding terminals of the first terminal group shorted to each other. |
| US09281584B2 |
Connector
A connector reduced in height without reducing contact reliability. A contact of the connector includes a first spring portion that supports a contact portion, a second spring portion that supports a connection portion, and an integral connection portion that integrally connects the first spring portion and the second spring portion. The first spring portion and the second spring portion are arranged on an imaginary straight line that extends through the contact portion and is parallel to a connection direction, and the integral connection portion is made away from the imaginary straight line in a direction orthogonal to the connection direction. |
| US09281583B2 |
Electrical connector having improved insulative housing
An electrical connector includes a first insulative housing having a first mating port and a second mating port arranged side by side, a plurality of first contacts retained to the first mating port, and a plurality of second contacts retained to the second mating port. The first mating port includes first and second mating tongues providing corresponding first and second mating faces opposite to each other. The second mating port defines a first strengthen arm adjacent to the first mating port to connect with the first and second mating tongues, the first contacts provide first contacting portions exposed upon both the first mating face and the second mating face. |
| US09281581B2 |
Wiring module for a battery module that has detection terminal for detecting state of electric cells
A wiring module includes first detection terminals for detecting a state of electric cells, and a resin protector that retains the first detection terminals. The first detection terminals each include a first plate-shaped portion having a plate shape, and a first electric wire connecting portion continuous with the first plate-shaped portion and connected to a terminal portion of an electric wire W. The first plate-shaped portion is provided with projecting pieces for discriminating the front and back sides of the corresponding first detection terminal. |
| US09281579B2 |
Electrical connectors having leadframes
An electrical connector includes a contact module having a leadframe and a dielectric frame surrounding the leadframe. The leadframe has signal conductors having transition contacts encased in the dielectric frame. The transition contacts are coplanar such that the transition contacts are arranged within a contact plane of the leadframe. The signal conductors have mating contacts extending from the corresponding transition contacts. Each of the mating contacts have a mating interface configured to be electrically connected to a corresponding mating contact of a mating connector. The mating contacts are arranged in pairs with the corresponding mating interfaces aligned in rows along corresponding row axes. Each of the pairs of mating contacts are arranged in different rows. |
| US09281575B2 |
Terminal
A terminal is formed by bending a plate of electrically conductive metal and is received in a connector housing. The terminal includes a box-shaped body part, a terminal contact part provided on a front side of the body part, and an electrical wire connecting part provided on a rear side of the body part. When the plate before bending is viewed from the thickness direction, a conductor section having a cross-section having constant width and thickness extends from the terminal contact part to the electrical wire connecting part. |
| US09281573B2 |
Electrical plug connector for electrical connection by means of ultrasonic welding
An electrical plug connector in the form of a solid contact pin that has a contact portion, a transition portion adjoining the contact portion, and a connection portion adjoining the transition portion for electrical connection to an electrical line by ultrasonic welding. The connection portion is formed from a first leg and a second leg and has at least one geometric wave refraction element for refracting waves during ultrasonic welding. |
| US09281572B2 |
Aperture synthesis communications system
A method and apparatus are provided for improving capacity in wireless communications systems for use in areas having a high user traffic density. For reception, signals received from an antenna array are processed by performing a transformation comprising aperture synthesis to map signal content received from the antenna array to at least one element of a plurality of elements in an image plane storage to produce a time series of values for the at least one element, and then by assigning the at least one element to at least one radio access transceiver of a plurality of radio access transceivers for receiving the time series of values from the at least one element. For transmission, at least one radio access transceiver of a plurality of radio access transceivers is assigned to at least one element of a plurality of elements in an image plane storage, the assignment providing for the at least one element to receive a time series of values from the at least one radio access transceiver, and then a transformation is performed comprising antenna synthesis to map the time series of values from the at least one element to the signals for transmission by the antenna array. |
| US09281568B1 |
Apparatus and method for improving the gain and bandwidth of a microstrip patch antenna
A method for improving bandwidth and gain of a microstrip patch antenna and a microstrip patch antenna are provided. The method includes forming a highly anisotropic superstrate, and positioning the highly anisotropic superstrate at a predetermined distance away from the ground plane side of the microstrip patch antenna, increasing the bandwidth of the microstrip patch antenna. The antenna provides a microstrip patch antenna having a highly anisotropic superstrate. The highly anisotropic superstrate can include a spacing layer, a dielectric material positioned on the spacing layer and a plurality of conductive strips disposed on the dielectric layer. |
| US09281565B2 |
Multi-frequency antenna
A multi-frequency antenna includes a first antenna element, a second antenna element, a connection element, a third antenna element and a shorted element. The connection element is connected between the first antenna element and a neighborhood portion of the third antenna element. A feeding point is located in or nearby a first junction between the connection element and the first antenna element or located in the connection element. The shorted element is connected between the second antenna element and the grounding plane. The shorted element extends from a second junction between the second antenna element and the third antenna element to the grounding plane. The first conductive path that extends from the feeding point to the other end of the shorted element is substantially equal to a second conductive length that extends from the feeding point to the free end of the first antenna element. |
| US09281562B2 |
Apparatus with antenna and method for wireless communication
An apparatus including a first port configured to couple to a first location on an antenna; a second port configured to couple to a second location on the antenna; a switch configured to switch between a first electrical configuration in which the first port is coupled to radio circuitry, and a second electrical configuration in which the second port is coupled to the radio circuitry; first reactive circuitry configured to impedance match the antenna with the radio circuitry at a first operational resonant frequency band; and second reactive circuitry, different to the first reactive circuitry, and configured to impedance match the antenna with the radio circuitry at a second operational resonant frequency band, different to the first operational resonant frequency band. |
| US09281558B2 |
High isolation electromagnetic transmitter and receiver
A high isolation electromagnetic transmitter and receiver is revealed. An isolation portion, a first antenna body and a second antenna body are extended from and formed over a grounding portion. The isolation portion is extended to and formed between the first antenna body and the second antenna body. A parasitic element corresponding to the isolation portion is disposed between the first antenna body and the second antenna body. The isolation portion is T-shaped. The parasitic element is reverse T-shaped and arranged over the grounding portion. The structure is simple and able to be applied to the design of planar printed antennas. The production is easy and the cost is reduced. The volume is minimized to be used in various mini wireless mobile communication devices. No interference occurs even that the first and the second antennas are close due to good isolation. |
| US09281554B1 |
Balloon with pressure mechanism to passively steer antenna
Methods and apparatus are disclosed for passively steering an antenna disposed on a balloon in a balloon network. An example balloon involves: (a) an antenna and (b) a pressure-sensitive mechanism in mechanical communication with the antenna such that a change in the balloon's altitude causes at least an element of the antenna to rotate upward or downward, a separation distance between two or more radiating elements to increase or decrease, or a separation distance between the two or more radiating elements and a reflector to increase or decrease. |
| US09281550B2 |
Wave mode converter
Wave mode converters, and methods of using wave mode converters are disclosed. The wave mode converters include a radial waveguide including a generally disk-like structure to receive a radially propagating field derived from rectangular TE10 waveguide mode, and a body including a plurality of spaced apart apertures. |
| US09281546B2 |
Battery pack case having novel structure
Disclosed herein is a battery pack case in which a battery module having a plurality of stacked battery cells or unit modules (‘unit cells’) is mounted, wherein the battery pack case is provided at the upper part and the lower part thereof with a coolant inlet port and a coolant outlet port, respectively, which are directed in opposite directions such that a coolant to cool the unit cells can flow from one side to the other side of the battery module in a direction perpendicular to a cell stacking direction, the battery pack case is further provided with a flow space (‘coolant introduction part’) extending from the coolant inlet port to the battery module and another flow space (‘coolant discharge part’) extending from the battery module to the coolant outlet port, and the flow channel width of the coolant introduction part and/or the flow channel width of the coolant discharge part is greater than that of each of the unit cells, thereby achieving uniform distribution of the coolant. |
| US09281544B2 |
Battery pack test system
A battery pack test system is provided. The system includes a battery charging device that monitors an output voltage level of the vehicle battery pack. The system further includes a switch electrically coupled between an igniter and a voltage source. The system further includes a first video camera that generates a first plurality of images of an interior of the vehicle battery pack. The switch has a closed operational state at a first time in response to the output voltage level of a battery cell in the vehicle battery pack being greater than a threshold voltage level, to induce the igniter to generate a spark to generate a fire within an interior region of the vehicle battery pack. |
| US09281541B2 |
Nonaqueous electrolyte for secondary battery and nonaqueous-electrolyte secondary battery employing the same
An object is to provide a nonaqueous electrolyte and a nonaqueous-electrolyte secondary battery which have excellent discharge load characteristics and are excellent in high-temperature storability, cycle characteristics, high capacity, continuous-charge characteristics, storability, gas evolution inhibition during continuous charge, high-current-density charge/discharge characteristics, discharge load characteristics, etc. The object has been accomplished with a nonaqueous electrolyte which comprises: a monofluorophosphate and/or a difluorophosphate; and further a compound having a specific chemical structure or specific properties. |
| US09281539B2 |
Electrical storage device including fiber electrode, and method of fabricating the same
An object of the present invention is to provide a highly efficient electrical storage device that uses a fiber positive electrode and a fiber negative electrode and in which lithium ion is used as an intercalating species, and to provide a method of fabricating the electrical storage device. The electrical storage device according to the present invention includes: a fiber positive electrode including an electrically conductive fiber, the fiber having a surface on which a positive electrode active material coating is formed, the positive electrode active material coating containing a transition metal oxide represented by a chemical formula 1 which is (Li1-xAx)aMbXcOd; a fiber negative electrode including an electrically conductive fiber, the fiber having a surface on which a negative electrode active material coating is formed; a separator; and an electrolyte (in the chemical formula 1, A is at least one kind of alkali metal selected from the group consisting of Na, K, Rb, and Cs; M is at least one kind of transition metal selected from the group consisting of Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Nb, Mo, Ru, Pd, Ag, Ta, W, Ce, Pr, Sm, Eu, and Pb; X is at least one kind of typical elements selected from the group consisting of B, Al, Si, P, S, Ga, and Ge; and 0 |
| US09281536B2 |
Material design to enable high mid-temperature performance of a fuel cell with ultrathin electrodes
A fuel cell including at least one of a hydrophilic interlayer and a flow field treated to impart hydrophilic properties is disclosed, wherein the hydrophilic interlayer and the treated flow field militate against water accumulation in ultrathin electrodes of the fuel cell, particularly for cool-start operating conditions (i.e. about 0° C. to about 60° C.). |
| US09281529B2 |
Protective edge seal having alkali metal ions for membrane ion exchange
A unitized electrode assembly (10; 110; 210; 310; 410) for a fuel cell includes, in addition to an anode catalyst layer (54; 254) and a cathode catalyst layer (56; 256), a polymer electrolyte membrane (52) having an acid functional group normally including H+ ions and an edge seal (66; 166; 266, 366, 466) containing alkali metal ions in a form, concentration, and/or location for delivery and dispersion into the membrane. The edge seal of the unitized electrode assembly is proximate, and typically contacts, the peripheral edge region (68) of the membrane in ion-transfer relation therewith, and alkali metal ions leach into the membrane during fuel cell operation to provide a desired ion exchange in the membrane. The alkali metal ions contained by the edge seal may be Li+, Na+, K+, Rb+, and/or Cs+, and may be included as a dopant with the material of the edge seal during its formation, or may be included as a discrete component of the edge seal, as by an ion-doped strip of membrane material contained by the edge seal. The edge seal thus serves as a “reservoir” of the alkali metal ions for release to the polymer electrolyte membrane for increased durability. |
| US09281524B2 |
Metal air battery
The invention provides a metal air battery with improved discharge characteristics compared to conventional ones. This is achieved by a metal air battery including a positive electrode layer, a negative electrode layer, and an electrolyte layer positioned between the positive electrode layer and the negative electrode layer, wherein the positive electrode layer includes an electroconductive material, a binder, and a SiO2 particle, and wherein the SiO2 particle has a specific surface area of 16.7 m2/g or less. |
| US09281516B2 |
Cathode material of lithium ion secondary battery and method for manufacturing the same
A cathode material of a lithium ion secondary battery is provided, which includes a cathode active material and a glassy material coating on a surface of the cathode active material. The glassy material is capable of selectively allowing lithium ions to pass therethrough. The lithium ion secondary battery using the cathode material has the long cycle life and the high safety performance. |
| US09281508B2 |
Separator for nonaqueous secondary battery, and nonaqueous secondary battery
An object of the invention is to provide a separator for a nonaqueous secondary battery, which has good adhesion to electrodes and is also capable of ensuring sufficient ion permeability even after attachment to electrodes. The separator for a nonaqueous secondary battery of the invention includes a porous substrate and an adhesive porous layer that is formed on at least one side of the porous substrate and contains a polyvinylidene-fluoride-based resin. The separator for a nonaqueous secondary battery is characterized in that the adhesive porous layer has a crystal size of 1 to 13 nm. |
| US09281504B2 |
Method for fabricating battery shell
A non-contact input apparatus for computer peripheral includes an induction module and a pointing module. The induction module includes an electric supply coil and an induction element, and the pointing module includes an energy coil and a non-linear element. The electric supply coil is used to send a first oscillation signal. The energy coil receives the first oscillation signal. The non-linear element converts the first oscillation signal to be a second oscillation signal having multiple higher harmonics. The induction element generates a control signal based on the second oscillation signal. |
| US09281498B2 |
Organic EL device
An organic EL device that efficiently extracts light includes an organic EL element formed by laminating a first electrode layer, functional layer, and second electrode layer on a substrate and a sealing member sealing the organic EL element. The organic EL device has a first electrode communicating part electrically connected to the first electrode layer at one side of the substrate and a second electrode communicating part electrically connected to the second electrode layer at the other side of the substrate. The organic EL device has first cross grooves crossing the organic EL element from the second electrode layer located at the one side to the second electrode layer that is located at the other side. The first cross groove is formed by removing the first electrode layer, functional layer, and second electrode layer. The sealing member and the substrate are connected outside of the first cross grooves. |
| US09281494B2 |
Display device and organic light emitting diode display
A display device includes: a display substrate; a display unit formed on the display substrate and a sealing substrate affixed to the display substrate by an adhering layer that surrounds the display unit. The sealing substrate includes a composite member including a resin and a plurality of carbon fibers and an insulating member attached to the composite member. The insulating member includes a through hole. A metal film is disposed at one side of the sealing substrate, facing the display substrate; and a conductive connection portion contact the metal film through the through hole. |
| US09281492B2 |
Electro-optic device and method for manufacturing same
According to the present invention, an electro-optic device comprises: a substrate which is split into a light emitting unit and a non-light emitting unit, wherein said light emitting unit is divided into a plurality of driving regions; an electrode pad which is formed in the non-light emitting unit of the substrate; and an electrode unit which comprises a plurality of supplementary electrodes each of which has one end connected to the electrode pad and has the other end connected to the centers of each of the plurality of driving regions, and transparent electrodes formed on the upper sides of the plurality of supplementary electrodes in the light emitting unit, wherein the area of each of the plurality of driving regions is set to an area in which no voltage drop occurs, and the plurality of supplementary electrodes are manufactured in the same length. Thus, according to the present invention, if power is supplied to each one end of the plurality of supplementary electrodes by using the electrode pad, the power is transmitted, at the same time, to the other ends of each of the plurality of supplementary electrodes. Therefore, the power is simultaneously supplied to each center of the plurality of driving regions regardless of the distance between the electrode pad and the driving regions. Further, as mentioned above, a voltage drop phenomenon is prevented since the light emitting unit is divided into the plurality of driving regions in which no voltage drop occurs. That is to say, uniform currents can flow on the front side of each driving region irrespective of the distance between the supplementary electrodes and the driving regions. Consequently, a large-scaled organic light emitting device which can show uniform brightness properties in the overall light emitting unit can be manufactured. |
| US09281485B2 |
Light-receiving device
For simplification of a structure and a manufacturing process of an element, and reduction of manufacturing cost, the present disclosure provides a light-receiving device including: a photoelectric conversion element; and an active element, wherein the active element includes at least one of a reset element configured to reset the photoelectric conversion element, an amplifier element configured to amplify a detection signal based on the photoelectric conversion element, or a selection element configured to selectively output the detection signal based on the photoelectric conversion element, and the photoelectric conversion element and at least part of the active element are formed by using an identical organic semiconductor material or an identical high molecular functional material. |
| US09281479B2 |
Apparatus and method for fabricating organic light emitting display
An apparatus for fabricating an organic light emitting display includes a chamber, a stage having a hollow portion, a displacement sensor on the stage and configured to measure a distance between the stage and a measurement target that is on or over an upper part of the stage, and a controller. The controller includes an input unit configured to receive distance information obtained by the displacement sensor, a memory unit configured to store reference distance information, a determination unit configured to compare the distance information received by the input unit with the reference distance information, and an output unit configured to output a variable control signal according to whether or not the determination unit determines that the distance information between the stage and the measurement target corresponds to the reference distance information. A method for fabricating an organic light emitting display using the apparatus is also provided. |
| US09281478B2 |
Phase change memory cell with constriction structure
Some embodiments include methods of forming memory cells. Such methods can include forming a first electrode, a second electrode, and a memory element directly contacting the first and second electrodes. Forming the memory element can include forming a programmable portion of the memory element isolated from the first electrode by a first portion of the memory element and isolated from the second electrode by a second portion of the memory element. Other embodiments are described. |
| US09281475B2 |
Resistive random-access memory (RRAM) with multi-layer device structure
A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a multi-layer resistance-switching network disposed between the pair of electrodes. The multi-layer resistance-switching network comprises a pair of carbon doping layers and a group-IV element doping layer disposed between the pair of carbon doping layers. Each carbon doping layer comprises silicon oxide doped with carbon. The group-IV doping layer comprises silicon oxide doped with a group-IV element. A method of fabricating a resistive memory cell is also disclosed. The method comprises forming a first carbon doping layer on a first electrode using sputtering, forming a group-IV element doping layer on the first carbon doping layer using sputtering, forming a second carbon doping layer on the group-IV element doping layer using sputtering, and forming a second electrode on the second carbon doping layer using sputtering. |
| US09281468B2 |
Magnetic memory element
The disclosed technology generally relates to semiconductor devices, and more particularly spin transfer torque magnetic random access memory (STTMRAM) elements having perpendicular magnetic anisotropy (PMA). In one aspect, a magnetic element comprises a metal underlayer and a seed layer on the underlayer, the seed layer comprising alternating layers of a first metal and a second metal. The alternating layers of a first metal and a second metal are repeated n times with, 2<=n<=20. Also a spin transfer torque magnetic random access memory element is disclosed having a perpendicular magnetic orientation comprising a metal underlayer on a substrate, a seed layer on the metal underlayer; the seed layer comprising alternating layers of a first metal and a second metal, a magnetic tunnel junction (MTJ) element with a perpendicular orientation including: a reference layer formed on the seed layer, a tunnel barrier layer formed on the reference layer, a storage layer formed on the tunnel barrier layer and a top electrode and a bottom electrode. |
| US09281463B2 |
Atomic layer deposition of metal-oxide tunnel barriers using optimized oxidants
Metal oxide tunnel barrier layers for superconducting tunnel junctions are formed by atomic layer deposition. Both precursors include a metal (which may be the same metal or may be different). The first precursor is a metal alkoxide with oxygen bonded to the metal, and the second precursor is an oxygen-free metal precursor with an alkyl-reactive ligand such as a halogen or methyl group. The alkyl-reactive ligand reacts with the alkyl group of the alkoxide, forming a detached by-product and leaving a metal oxide monolayer. The temperature is selected to promote the reaction without causing the metal alkoxide to self-decompose. The oxygen in the alkoxide precursor is bonded to a metal before entering the chamber and remains bonded throughout the reaction that forms the monolayer. Therefore, the oxygen used in this process has no opportunity to oxidize the underlying superconducting electrode. |
| US09281462B2 |
Thermo-electric power harvesting bearing configuration
A power generating bearing assembly (100) comprises a bearing subassembly (120) retained by a bearing housing (110). During operation, friction and other factors increase a temperature of the bearing assembly (100). The housing (110) can optionally include a bearing cooling passage system comprising at least one liquid cooling passage (134) formed internally therein. The liquid cooling passage (134) would be routed proximate the bearing subassembly (120) to remove heat therefrom. A thermo-generator cavity (180) extends inward from an exterior surface of the housing (110), terminating at a cavity end wall (182). The cavity (180) is formed at a location identified having a higher temperature. A Thermo-Electric Generator (TEG) (200) is inserted within the cavity (180) and thermally coupled to the end wall (182). The Thermo-Electric Generator (TEG) (200) utilizes a temperature difference between the end wall (182) and the ambient air to generated electric power. The power can be used to operate electrically powered devices, such as condition sensors (150), communication devices, and the like. |
| US09281461B2 |
Thermoelectric devices and applications for the same
High performance thin film thermoelectric couples and methods of making the same are disclosed. Such couples allow fabrication of at least microwatt to watt-level power supply devices operating at voltages greater than one volt even when activated by only small temperature differences. |
| US09281459B2 |
Light-emitting device
A light-emitting device includes a substrate; a stacked structure including a first type semiconductor layer positioned on the substrate, a light-emitting structure positioned on the first type semiconductor layer, and a second type semiconductor layer positioned on the light-emitting structure, wherein the stacked structure includes a depression exposing the first type semiconductor layer; a first electrode positioned on the first type semiconductor layer in the depression, the first electrode including at least one first pad and at least one first extending wire with one end connected to the first pad; a second electrode positioned on the second type semiconductor layer, the second electrode including at least one second pad and at least one second extending wire with one end connected to the second pad; wherein the distance between the first pad and the second pad is greater than 70% of the width of the light-emitting device. |
| US09281458B2 |
Optoelectronic semiconductor component and method for the production thereof
An optoelectronic semiconductor device including a carrier substrate and at least one semiconductor chip arranged thereon, wherein the semiconductor chip includes an active layer that generates radiation, conductor tracks electrically contacting the semiconductor chip arranged on the carrier substrate, the semiconductor chip is enclosed in a potting material, and the potting material includes at least a first potting layer, a second potting layer and a third potting layer, which differ from one another in at least one of: their material composition, their optical properties and their chemical properties. |
| US09281456B2 |
Light emitting device and fabricating method thereof
A light-emitting device includes a light-emitting element for emitting primary light, and a wavelength conversion unit for absorbing part of the primary light and emitting secondary light having a wavelength longer than that of the primary light, wherein the wavelength conversion unit includes plural kinds of phosphors having light absorption characteristics different from each other, and then at least one kind of phosphor among the plural kinds of phosphors has an absorption characteristic that can absorb the secondary light emitted from at least another kind of phosphor among the plural kinds of phosphors. |
| US09281454B2 |
Thin film light emitting diode
Light emitting devices comprise a substrate having a surface and a side surface; a semiconductor structure on the surface of the substrate, the semiconductor structure having a first surface, a second surface and a side surface, wherein the second surface is opposite the first surface, wherein the first surface, relative to the second surface, is proximate to the substrate, and wherein the semiconductor structure comprises a first-type layer, a light emitting layer and a second-type layer; a first and a second electrodes; and a wavelength converting element arranged on the side surface of the semiconductor structure, wherein the wavelength converting element has an open space, and wherein the open space is a portion not covered by the wavelength converting element. |
| US09281452B2 |
Method for manufacturing a can package-type optical device, and optical device manufactured thereby
The present invention relates to a method for manufacturing an optical device, and to an optical device manufactured thereby, which involve using a substrate itself as a heat-dissipating plate, and adopting a substrate with vertical insulation layers formed thereon, such that electrode terminals do not have to be extruded out from a sealed space, and thus enabling the overall structure and manufacturing process for an optical device to be simplified.According to the present invention, a method for manufacturing a can package-type optical device comprises the steps of: (a) preparing a metal plate and a metal substrate with vertical insulation layers, wherein more than one vertical insulation layer crossing the substrate from the top surface to the bottom surface thereof are formed; (b) bonding the metal plate on the top surface of the metal substrate with vertical insulation layers; (c) forming a cavity on an intermediate product that has undergone step (b) in a form of a cylindrical pit having a predetermined depth reaching the surface of said metal substrate with vertical insulation layers by passing through said metal plate and the adhesive layers formed by said bonding, wherein said cavity contains said vertical insulation layer in the bottom wall thereof; (e) connecting a wire, which electrically connects an optical device and an electrode of the optical device together, to either side of the surface of the bottom wall of the vertical insulation layers of the cavity, respectively; and (g) sealing the cavity by means of a protective plate made from a light-transmitting material; and a can cap, formed as a picture frame whose top central portion and the bottom are open and encompassing the perimeter of the protective plate. |
| US09281448B2 |
Light emitting apparatus
A light emitting device including a contact layer, a blocking layer over the contact layer, a protection layer adjacent the blocking layer, a light emitter over the blocking layer, and an electrode layer coupled to the light emitter. The electrode layer overlaps the blocking layer and protection layer, and the blocking layer has an electrical conductivity that substantially blocks flow of current from the light emitter in a direction towards the contact layer. In addition, the protection layer may be conductive to allow current to flow to the light emitter or non-conductive to block current from flowing from the light emitter towards the contact layer. |
| US09281437B2 |
Light emitting device, and method for fabricating the same
Disclosed are a light emitting device, a method of fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, an electron blocking layer on the active layer, and a second conductive semiconductor layer on the electron blocking layer. The electron blocking layer includes a first electron blocking layer and an interrupted diffusion layer on the first electron blocking layer. |
| US09281435B2 |
Light to current converter devices and methods of manufacturing the same
Light to current converter devices, such as solar cells, are disclosed. The devices may include via holes extending through the cell substrate and may include through-hole electrodes within the via holes. The through-hole electrodes may be made from one or more materials and may be hollow, partially hollow, or fully filled. Front and rear electrodes may also be formed on the device and can be made of the same or different materials as the through-hole electrode. The devices may include emitters located only on the top surface of the cell, located on the top surface and symmetrically or asymmetrically along a portion of the inner surface of the via holes, or located on the top surface and full inner surface of the via holes. Processes for making light to current converter devices are also disclosed. |
| US09281432B2 |
Photoelectric conversion element, method for manufacturingthe same, optical sensor, and solar cell
A photoelectric conversion element includes a PN junction formed between an N-type oxide layer and a P-type oxide layer, in which the N-type oxide layer is formed of an oxide having a perovskite structure containing titanium and strontium, a part of strontium is substituted with a +3 valence metal element or a part of titanium is substituted with a +5 valence metal element, and the amount of the metal element substituted in the N-type oxide layer is 0.01 mass % to 0.75 mass %. |
| US09281429B2 |
Module level solutions to solar cell polarization
A solar cell module includes interconnected solar cells, a transparent cover over the front sides of the solar cells, and a backsheet on the backsides of the solar cells. The solar cell module includes an electrical insulator between the transparent cover and the front sides of the solar cells. An encapsulant protectively packages the solar cells. To prevent polarization, the insulator has resistance suitable to prevent charge from leaking from the front sides of the solar cells to other portions of the solar cell module by way of the transparent cover. The insulator may be attached (e.g., by coating) directly on an underside of the transparent cover or be a separate layer formed between layers of the encapsulant. The solar cells may be back junction solar cells. |
| US09281428B2 |
Mounting system for photovoltaic panels
A mounting system for mounting photovoltaic panels on a support structure. The mounting system comprises photovoltaic panel frames in which the photovoltaic panels are mounted, panel support rails, and mounting brackets or cross beams for supporting the panel support rails. The panel frames have inwardly extending panel frame extensions on their back side. The panel support rails are mounted on the support structure with either pivoting brackets or cross beams. In either case, the support rails have pairs of stationary clamps and movable clamps with clamp lips that engage the panel frame extensions of the panel frames. |
| US09281425B2 |
Method for producing an optoelectronic semiconductor component and such a semiconductor component
A method for producing a semiconductor component is disclosed. A carrier substrate includes a mounting region and an opening, which is formed in the mounting region of the carrier substrate. After mounting a semiconductor chip, an electrically insulating layer is applied to the carrier substrate in such a way that the electrically insulating layer completely fills the first opening in the carrier substrate. A second opening is formed in the electrically insulating layer. An electrically conductive layer is then applied to the electrically insulating layer in such a way that the second opening is filled with the electrically conductive layer in the form of a via. A semiconductor component produced in this way is also provided. |
| US09281423B2 |
Image pickup apparatus, endoscope and image pickup apparatus manufacturing method
An image pickup apparatus includes: a cover glass portion having a function of a right angle prism; an image pickup device substrate portion including an image pickup device on a first principal surface and a back-face electrode on a second principal surface, the back-face electrode being connected to the image pickup device via a through-wiring; and a bonding layer that bonds the cover glass portion and the image pickup device substrate portion that have a same outer dimension. |
| US09281417B1 |
GaN-based schottky diode having large bond pads and reduced contact resistance
A semiconductor device includes a first active layer disposed over a substrate. The second active layer is disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer. The first electrode establishes a Schottky junction with the second active layer. The first electrode includes a first electrode pad and a first series of fingers in electrical contact with the first electrode pad. The second electrode establishes an ohmic junction with the first active layer. The second electrode includes a second electrode pad and a second series of fingers in electrical contact with the second electrode pad. The first and second series of electrode fingers form an interdigitated pattern. The first electrode pad is located over the first and second series of electrode fingers. |
| US09281416B2 |
Trench MOSFET with integrated Schottky barrier diode
A Schottky diode includes first and second trenches formed in a semiconductor layer where the first and second trenches are lined with a thin dielectric layer and filled partially with a trench conductor layer with the remaining portion being filled with a first dielectric layer. Well regions are formed spaced-apart in a top portion of the semiconductor layer between the first and second trenches. A Schottky metal layer is formed on a top surface of the semiconductor layer between the first and second trenches. The Schottky diode is formed with the Schottky metal layer as the anode and the semiconductor layer between the first and second trenches as the cathode. The trench conductor layer in the first and second trenches is electrically connected to the anode of the Schottky diode. In one embodiment, the Schottky diode is formed integrated with a trench field effect transistor on the same semiconductor substrate. |
| US09281414B2 |
Vertical cell-type semiconductor device having protective pattern
According to example embodiments of inventive concepts, a semiconductor device includes: a substrate, and a stacked structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate. The stacked structure defines a through-hole over the substrate. The gate electrodes each include a first portion between the through-hole and a second portion of the gate electrodes. A channel pattern may be in the through-hole. A tunneling layer may surround the channel pattern. A charge trap layer may surround the tunneling layer, and protective patterns may surround the first portions of the gate electrodes. The protective patterns may be between the first portions of the gate electrodes and the charge trap layer. |
| US09281413B2 |
Enhancement mode device
An enhancement mode device includes a floating gate structure. The floating gate structure includes a first bottom dielectric layer, a second bottom dielectric layer on the first bottom dielectric layer and a conductive floating gate on the second bottom dielectric layer. |
| US09281410B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device including an oxide semiconductor includes the steps of forming an oxide semiconductor film, forming a gate insulating film provided over the oxide semiconductor film, forming a gate electrode in contact with the gate insulating film, a sidewall insulating film in contact with the gate electrode, and forming a source electrode and a drain electrode in contact with the oxide semiconductor film. In the method, the gate insulating film and the sidewall insulating film are formed at a temperature at which oxygen contained in the oxide semiconductor film is inhibited from being eliminated, preferably at a temperature lower than a temperature at which oxygen contained in the oxide semiconductor film is eliminated. |
| US09281408B2 |
Semiconductor device
A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer. |
| US09281402B2 |
Methods of fabricating fin structures
There is provided fin methods for fabricating fin structures. More specifically, fin structures are formed in a substrate. The fin structures may include two fins separated by a channel, wherein the fins may be employed as fins of a field effect transistor. The fin structures are formed below the upper surface of the substrate, and may be formed without utilizing a photolithographic mask to etch the fins. |
| US09281401B2 |
Techniques and configurations to reduce transistor gate short defects
Embodiments of the present disclosure describe techniques and configurations to reduce transistor gate short defects. In one embodiment, a method includes forming a plurality of lines, wherein individual lines of the plurality of lines comprise a gate electrode material, depositing an electrically insulative material to fill regions between the individual lines and subsequent to depositing the electrically insulative material, removing a portion of at least one of the individual lines to isolate gate electrode material of a first transistor device from gate electrode material of a second transistor device. Other embodiments may be described and/or claimed. |
| US09281398B2 |
Semiconductor structure and method for manufacturing the same
The present invention discloses a semiconductor device, which comprises a substrate, a gate stack structure on the substrate, a channel region in the substrate under the gate stack structure, and source and drain regions at both sides of the channel region, wherein there is a stressed layer under and at both sides of the channel region, in which the source and drain regions are formed. According to the semiconductor device and the method for manufacturing the same of the present invention, a stressed layer is formed at both sides of and under the channel region made of a silicon-based material so as to act on the channel region, thereby effectively increasing the carrier mobility of the channel region and improving the device performance. |
| US09281396B2 |
Semiconductor device
A trench structure which is capable of promoting extension of a depletion layer and hardly causes thermal stress is provided. A semiconductor device includes a semiconductor substrate. A plurality of loop trenches is formed on the surface of the semiconductor substrate. Each loop trench is configured to extend so as to surround a region smaller than the region where a plurality of gate trenches is formed. Each loop trench is separated from other loop trenches. A second insulating layer is located in each loop trench. P-type fourth regions are formed in the semiconductor substrate. Each fourth region is in contact with a bottom surface of corresponding one of the loop trenches and is configured to extend along the corresponding one of the loop trenches. |
| US09281395B2 |
Semiconductor device and fabrication method thereof
A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a P type well region and an N type well region formed in a substrate, a gate insulating layer having a non-uniform thickness and formed on the P type well region and the N type well region, a gate electrode formed on the gate insulating layer, a P type well pick-up region formed in the P type well region, and a field relief oxide layer formed in the N type well region between the gate electrode and the drain region. |
| US09281393B2 |
Super junction semiconductor device and associated fabrication method
A semiconductor device with a substrate, an epitaxy layer formed on the substrate, a plurality of deep wells formed in the epitaxy layer, a plurality of trench gate MOSFET units each of which is formed in top of the epitaxy layer between two adjacent deep well, wherein a trench gate of the trench gate MOSFET unit is shallower than half of the distance between two adjacent deep wells, which may reduce the product of on-state resistance and the gate charge of the semiconductor device. |
| US09281392B2 |
Charge compensation structure and manufacturing therefor
A charge-compensation semiconductor device includes a semiconductor body including a first surface, a second surface arranged opposite to the first surface, an edge delimiting the semiconductor body in a horizontal direction substantially parallel to the first surface, a drain region of a of a first conductivity type extending to the second surface, an active area, and a peripheral area arranged between the active area and the edge, a source metallization arranged on the first surface, and a drain metallization arranged on the drain region and in Ohmic contact with the drain region. In a vertical cross-section substantially orthogonal to the first surface the charge-compensation semiconductor device further includes: an equipotential region in Ohmic contact with the drain metallization and arranged in the peripheral area and next to the first surface, a low-doped semiconductor region arranged in the peripheral area and having a first concentration of dopants, and a plurality of first pillar regions alternating with second pillar regions in the active area and the peripheral area. The first pillar regions having a second concentration of dopants of the first conductivity type higher than the first concentration and are in Ohmic contact with the drain region. The second pillar regions are of a second conductivity type and in Ohmic contact with the source metallization. At least one of an outermost of the first pillar regions and an outermost of the second pillar regions forms an interface with the low-doped semiconductor region. A horizontal distance between the interface and the equipotential region divided by a vertical distance between the first surface and the drain region is in a range from about 0.5 to about 3. |
| US09281391B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device is disclosed. The semiconductor device includes an insulating layer formed selectively on a semiconductor layer; a lower electrode, formed on the insulating layer, having an end portion at a position spaced apart by a predetermined distance inward from a periphery of the insulating layer; a dielectric film formed on the lower electrode; an upper electrode, formed on the dielectric film, facing the lower electrode with the dielectric film interposed between the upper electrode and the lower electrode; and a passivation film, formed to cover the insulating layer, starting from the end portion of the lower electrode and extending toward the periphery of the insulating layer. The passivation film includes an insulating material having an etching selectivity with respect to the insulating layer. |
| US09281389B2 |
Semiconductor device
Disclosed herein is a semiconductor device including: a source electrode formed on one side of an N-type AlGaN layer; N-type and P-type AlGaN layers formed on the other side of the P-type AlGaN layer and formed in a direction perpendicular to the source electrode; a gate electrode formed on one side of the N-type and P-type AlGaN layers; and a drain electrode formed on the other side of the N-type and P-type AlGaN layers. |
| US09281383B2 |
Method for fabricating a semiconductor device
A method for fabricating a semiconductor device according to an embodiment, includes forming a silicon (Si) film containing carbon (C) in an upper portion thereof above a semiconductor substrate, performing element isolation of the Si film and the semiconductor substrate to make a width dimension of the Si film narrow in a first region and a width dimension of the Si film wide in a second region, after the element isolation, exposing a side face of the Si film in at least the first region, and diffusing boron (B) into the Si film from the side face of the Si film in the first region. |
| US09281379B1 |
Gate-all-around fin device
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type. |
| US09281376B2 |
Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced. |
| US09281372B2 |
Metal gate structure and manufacturing method thereof
The present disclosure provides a semiconductor structure includes a gate structure disposed over a substrate, wherein the gate structure includes a high-k dielectric layer and a work function structure. The high-k dielectric layer includes a base portion and a side portion, the side portion is extended from an end of the base portion, the side portion is substantially orthogonal to the base portion. The work function structure includes a first metal disposed over the high-k dielectric layer and a second metal disposed over the first metal and including a bottom portion and a sidewall portion extended from an end of the bottom portion, wherein the first metal includes different materials from the second metal, and a length of an interface between the sidewall portion and the bottom portion to a length of the bottom portion within the high-k dielectric layer is in a predetermined ratio. |
| US09281364B2 |
Semiconductor device and method of manufacturing the same
In a semiconductor substrate preparation step, a semiconductor substrate which is made of SiC and in which a first semiconductor region of a first conductivity type is formed is prepared. In a second semiconductor region forming step, a second semiconductor region is formed by implanting an impurity of a second conductivity type into a first semiconductor region through multiple ion implantation steps while varying implantation depths of the respective multiple ion implantation steps. In the second semiconductor region forming step, a dose amount of the impurity when an implantation energy of multiple ion implantation steps is the largest is smaller than a dose amount of impurity when the implantation energy is not the largest. |
| US09281353B2 |
Organic thin film transistor array substrate, method for manufacturing the same and display device
According to embodiments of the present invention, there are provided an organic semiconductor array substrate, a method for manufacturing the same and a display device. The organic thin film transistor array substrate comprises a pixel structure formed on a transparent substrate; the pixel structure includes: a gate line, a data line, an organic thin film transistor, a pixel electrode, a common electrode line and a common electrode; the organic thin film transistor includes a gate electrode, a gate insulating layer, an organic semiconductor layer, a source electrode and a drain electrode; above the data line, the source electrode, the drain electrode and the pixel electrode, there are disposed in order a first bank insulating layer and a second bank insulating layer from bottom to top; and at openings and through holes of the first bank insulating layer and the second bank insulating layer, the pixel structure is formed by printing. |
| US09281351B2 |
Organic light-emitting display apparatus
An organic light-emitting display apparatus may include a substrate; a thin-film transistor (TFT) disposed on the substrate, and having an active layer, a gate electrode, a source electrode and a drain electrode; a signal line formed on the same layer as the source electrode and the drain electrode; a first insulating layer covers the signal line, the source electrode, and the drain electrode; a pixel electrode formed on the first insulating layer, and electrically connected to the TFT; a pixel-defining layer formed on the first insulating layer, includes an opening exposing the pixel electrode; an intermediate layer formed on the pixel electrode, and includes a light-emitting layer; and an opposite electrode formed on the intermediate layer. The intermediate layer is formed on the pixel-defining layer so as to overlap with the signal line. |
| US09281350B2 |
Thin film transistor substrate and display
An embodiment of the invention provides a thin film transistor substrate includes: a substrate; and a plurality of transistors, wherein each of the transistors includes a gate electrode disposed on the substrate; a first diffusion barrier layer disposed on the substrate and covering an upper surface and a ring sidewall of the gate electrode; a gate insulating layer disposed on the first diffusion barrier layer; an active layer disposed on the gate insulating layer and over the gate electrode; a source electrode disposed on the substrate and electrically connected to the active layer; a drain electrode disposed on the substrate and electrically connected to the active layer; and a protective layer covering the source electrode and the drain electrode. |
| US09281349B2 |
Organic light-emitting display device
The organic light emitting display device includes a substrate including a thin film transistor (TFT) formed thereon, the TFT including a first insulating layer disposed between an active layer and a gate electrode, and a second insulating layer disposed between the gate electrode and source and drain electrodes; a pad electrode including a first pad layer disposed on a same layer as that where the source and drain electrodes are formed, and a second pad layer on the first pad layer; a bonding assistant layer on the substrate; a third insulating layer on the bonding assistant layer and including a first opening; a pixel electrode disposed in the first opening and electrically coupled to one of the source and drain electrodes; and a fourth insulating layer on the pixel electrode to cover a peripheral end portion of the pixel electrode and defining a pixel through a second opening. |
| US09281348B2 |
Display panel and fabricating method thereof
A display panel and a fabricating method thereof are provided, and the display panel (100) comprises: a first substrate (11); a second substrate (12), arranged parallel to the first substrate; an anode/cathode (41), formed on the first substrate; a cathode/anode (42), formed on the second substrate; a first alignment layer (31), provided on the anode/cathode and comprising a plurality of first sub-alignment layers (311) having a first alignment direction and a plurality of second sub-alignment layers (312) having a second alignment direction alternately arranged in a first direction, and a angle between the first alignment direction and the second alignment direction being 90 degrees; a second alignment layer (32), provided on the cathode/anode and comprising a plurality of third sub-alignment layers (323) having the first alignment direction and a plurality of fourth sub-alignment layers (324) having the second alignment direction alternately arranged in the first direction, and the first sub-alignment layers corresponding to the third sub-alignment layers in a position, and the second sub-alignment layers corresponding to the fourth sub-alignment layers in a position; and a light emitting layer (40), provided between the first alignment layer and the second alignment layer, which comprises a liquid crystal polymer doped with organic light emitting material and is configured to emit a polarized light. |
| US09281346B1 |
Display device
A display device includes an array substrate including a display area and a non-display area, a driving circuit chip disposed on the non-display area and including a bottom surface, a top surface, a first pair of side surfaces extending in a first direction, and a second pair of side surfaces extending in a second direction perpendicular to the first direction, and first, second, and dummy bumps, each disposed on the bottom surface in a single column along the first direction, in which the dummy bumps include first and second dummy bump groups disposed between the first and second bumps along the first direction, the dummy bumps in the first dummy bump group are spaced apart from each other by a first pitch, and the dummy bumps in the second dummy bump group are spaced apart from each other by a second pitch different from the first pitch. |
| US09281345B2 |
Resistance change type memory device with three-dimensional structure
According to an embodiment, a non-volatile memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction orthogonal to the first direction. The device includes third wirings, and a first and a second memory. The third wirings extend in a third direction crossing the first direction and orthogonal to the second direction, and aligned in the second direction on both sides of the second wiring. The first memory is provided between one of third wiring pair and the second wiring, the pair of third wirings facing each other across the second wiring. The second memory is provided between another one of the third wiring pair and the second wiring. The second wiring has a block portion between a first portion in contact with the first memory and a second portion in contact with the second memory. |
| US09281344B2 |
Magnetic memory device
The magnetic memory device includes a plurality of source lines arranged in parallel in a second direction orthogonal to a first direction while extending in the first direction on a substrate, a plurality of word lines arranged in parallel in the first direction while extending in the second direction on the substrate, a plurality of bit lines arranged in parallel in the second direction while extending in the first direction on the substrate to alternate with the plurality of source lines, and a plurality of active regions arranged to extend at an oblique angle with respect to the first direction and arranged so that one memory cell is selected when one of the plurality of word lines and one of the plurality of source lines or the plurality of bit lines are selected. |
| US09281343B2 |
Thin film transistor display panel and method of manufacturing the same
A thin film transistor display panel includes: a gate electrode, a source electrode and a drain electrode which are included in a thin film transistor on a substrate; a data line connected to the source electrode; a pixel link member connecting the drain electrode to a pixel electrode; and a gate pad connected to the gate electrode through a gate line and including a first gate subpad, a second gate subpad and a gate pad link member, in which the pixel link member and the gate pad link member are substantially same in thickness. |
| US09281342B2 |
Light emitting device and light emitting device package
A light emitting device according to the embodiment includes a first electrode; a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer on the first electrode; a second electrode on the light emitting structure; and a control switch installed on the light emitting structure to control the light emitting structure. |
| US09281340B2 |
Manufacturing method for photoelectric conversion apparatus and photoelectric conversion apparatus
A manufacturing method for a photoelectric conversion apparatus in which a microlens is arranged for multiple electric charge accumulation regions formed on a semiconductor substrate, includes forming a first impurity region of a first conductive type on the semiconductor substrate; and forming a second impurity region of a second conductive type that is opposite the first conductive type in a part of the first impurity region to isolate the first impurity region into multiple regions such that each of the multiple electric charge accumulation regions includes isolated first impurity regions. |
| US09281338B2 |
Semiconductor image sensor device having back side illuminated image sensors with embedded color filters
A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. The radiation-sensing regions are separated by a plurality of gaps. A plurality of radiation-blocking structures is disposed over the second side of the substrate. Each of the radiation-blocking structures is aligned with a respective one of the gaps. A plurality of color filters are disposed in between the radiation-blocking structures. |
| US09281335B2 |
Alignment marks and alignment methods for aligning backside components to frontside components in integrated circuits
An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes. |
| US09281334B2 |
Pickup device structure within a device isolation region
A device includes a device isolation region formed into a semiconductor substrate, a doped pickup region formed into the device isolation region, a dummy gate structure that includes at least one structure that partially surrounds the doped pickup region, and a via connected to the doped pickup region. |
| US09281328B2 |
Image sensor that includes a boundary region formed between a logic circuit region and an image-sensing element region and manufacturing method thereof
According to one embodiment, an image sensor includes an image-sensing element region formed by arranging a plurality of image-sensing elements on a semiconductor substrate and element isolation portions formed to isolate the image-sensing elements, and a logic circuit region formed in a region different from the image-sensing element region on the substrate and including a plurality of gate patterns. Further, dummy element isolation portions are arranged with a constant pitch in the boundary region between the image-sensing element region and the logic circuit region. |
| US09281326B2 |
Array substrate and manufacturing method thereof and display panel
The invention provides an array substrate, a method for manufacturing the array substrate, and a display panel, the array substrate includes a plurality of thin film transistors, and the method includes: S1. preparing a base substrate on which sources and drains of the thin film transistors are formed; S2. forming an insulation layer on the base substrate such that the insulation layer includes spacer regions and a plurality of strip-shaped electrode regions, and every two adjacent strip-shaped electrode regions are separated from each other by the spacer region; S3. forming a spacer layer on the spacer regions of the insulation layer; S4. forming a pattern including strip-shaped electrodes on the strip-shaped electrode regions of the insulation layer; S5. peeling off the spacer layer on the spacer region. The invention can prevent every two adjacent strip-shaped electrodes from interconnecting due to etching residues, so as to improve product performance. |
| US09281323B2 |
Array substrate, display panel and display device
An array substrate is disclosed. The array substrate includes a non-display region surrounding a display region. The array substrate also includes gate lines in the display region, and a gate drive circuit and a bus electrically insulated from the gate lines and a gate drive circuit in the non-display region. The gate lines extend into the non-display region and are electrically connected to the gate drive circuit, and each of the gate lines crosses the bus in a first overlap region. The array substrate also includes auxiliary electrode line segments between the bus and the display region. The auxiliary electrode line segments are electrically insulated from one another and from the gate lines, and the auxiliary electrode line segments are disposed in either of a same conductive layer as the bus, or a layer between the conductive layer of the bus and a conductive layer of the gate lines are disposed. |
| US09281322B2 |
Thin film transistor array panel and method for manufacturing the same
A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon. |
| US09281321B2 |
TFT array substrate, display panel and display device
A TFT array substrate includes a first electrode layer and a second electrode layer disposed below the first electrode layer. The first electrode layer includes a strip-like first electrode, and the second electrode layer is a sheet-like electrode. The strip-like first electrode includes a bent portion. The second electrode layer includes at least one opening, the opening is located below the bent portion. |
| US09281320B2 |
Array substrate and liquid crystal display apparatus having the same
An array substrate includes a substrate, a switching element, a pixel electrode, and a common electrode. The substrate includes a plurality of gate lines, data lines insulated from the gate lines, and the data lines extend in a direction crossing the gate lines. The switching element is connected to the gate lines and data lines. The pixel electrode is arranged in a pixel area which is defined on the substrate, and is connected to an output electrode of the switching element. The common electrode corresponds to the pixel area and is insulated from the pixel electrode, and the common electrode has at least one first slit corresponding to the data line. |
| US09281318B2 |
Three dimensional memory structure
A method to fabricate a three dimensional memory structure includes forming an array stack, creating a layer of sacrificial material above the array stack, etching a hole through the layer of sacrificial material and the array stack, creating a pillar of semiconductor material in the hole to form at least two vertically stacked flash memory cells that use the pillar as a common body, removing at least some of the layer of sacrificial material around the pillar to expose a portion of the pillar, and forming a field effect transistor (FET) using the portion of the pillar as the body of the FET. |
| US09281317B2 |
3D non-volatile memory with metal silicide interconnect
A stacked non-volatile memory cell array include cell areas with rows of vertical columns of NAND cells, and an interconnect area, e.g., midway in the array and extending a length of the array. The interconnect area includes at least one metal silicide interconnect extending between insulation-filled slits, and does not include vertical columns of NAND cells. The metal silicide interconnect can route power and control signals from below the stack to above the stack. The metal silicide interconnect can also be formed in a peripheral region of the substrate. Contact structures can extend from a terraced portion of the interconnect to at least one upper metal layer, above the stack, to complete a conductive path from circuitry below the stack to the upper metal layer. Subarrays can be provided in a plane of the array without word line hook-up and transfer areas between the subarrays. |
| US09281313B2 |
Single poly non-volatile memory cells
A non-volatile memory cell that includes a semiconductor substrate; a coupling capacitor located in a first active region of the semiconductor substrate; and at a shared second active region of the semiconductor substrate, a sense transistor and a tunnelling capacitor configured in parallel with the gate of the sense transistor. The coupling capacitor, sense transistor and tunnelling capacitor share a common floating gate electrode and the sense transistor includes source and drain regions arranged such that the tunnelling capacitor is defined by an overlap between the floating gate electrode and the drain region of the sense transistor. Word-line contacts may be to a separate active area from the coupling capacitor. This and/or other features can help to reduce Frenkel-Poole conduction. |
| US09281310B2 |
Semiconductor device including gate structure for threshold voltage modulation in transistors and method for fabricating the same
A method for fabricating a semiconductor device includes forming an NMOS region and a PMOS region in a substrate, forming a first stack layer including a first gate dielectric layer and a first work function layer that is disposed over the first gate dielectric layer and contains aluminum, over the PMOS region of the substrate, forming a second stack layer including a second gate dielectric layer, a threshold voltage modulation layer that is disposed over the second gate dielectric layer and contains lanthanum, and a second work function layer that is disposed over the threshold voltage modulation layer, over the NMOS region of the substrate, and annealing the first stack layer and the second stack layer, thereby forming a first dipole-interface by diffusion of the aluminum in the first gate dielectric layer and a second dipole-interface by diffusion of the lanthanum in the second gate dielectric layer, respectively. |
| US09281309B2 |
Cross-hair cell wordline formation
Methods and devices depicting fabrication of non-planar access devices having fins and narrow trenches, among which is a method that includes wet etching a conductor to form a recessed region and subsequently etching the conductor to form gates on the fins. The wet etching may include formation of recesses which are may be backfilled with a fill material to form spacers on the conductor. Portions of a plug may be removed during the wet etch to form overhanging spacers to provide further protection of the conductor during the dry etch. |
| US09281308B2 |
Method to tune narrow width effect with raised S/D structure
A method (and semiconductor device) of fabricating a semiconductor device adjusts gate threshold (Vt) of a field effect transistor (FET) with raised source/drain (S/D) regions. A halo region is formed in a two-step process that includes implanting dopants using conventional implantation techniques and implanting dopants at a specific twist angle. The dopant concentration in the halo region near the active edge of the raised S/D regions is higher and extends deeper than the dopant concentration within the interior region of the raised S/D regions. As a result, Vt near the active edge region is adjusted and different from the Vt at the active center regions, thereby achieving same or similar Vt for a FET with different width. |
| US09281307B2 |
Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure
A semiconductor device which includes a first gate structure on a substrate and a second gate structure on the substrate is provided. The semiconductor device further includes an inter-level dielectric (ILD) layer on the substrate between the first gate structure and the second gate structure, wherein a top portion of the ILD layer has a different etch selectivity than a bottom portion of the ILD layer. |
| US09281305B1 |
Transistor device structure
A transistor device structure includes a substrate, a first transistor layer and a second transistor layer. The second transistor layer is disposed between the substrate and the first transistor layer. The first transistor layer includes an insulating structure and a first transistor unit. The insulating structure is disposed on the second transistor layer and has a protruding portion. The first transistor unit includes a gate structure, a source/drain structure, an embedded source/drain structure and a channel. The source/drain structure is disposed beside the gate structure and over the insulating structure. The embedded source/drain structure is disposed underneath the source/drain structure and in the insulating structure. The channel is defined between the protruding portion and the gate structure. |
| US09281304B2 |
Transistor assisted ESD diode
An integrated circuit includes a diode/bipolar ESD protection device. The diode/bipolar ESD device includes at least one gate separated ESD diode and at least one gate spaced ESD bipolar transistor coupled in parallel between a fixed voltage and an input/output pin. |
| US09281296B2 |
Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
A microelectronic package can include a substrate comprising a dielectric element having first and second opposite surfaces, and a microelectronic element having a face extending parallel to the first surface. The substrate can also include a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate. The substrate can further include a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces. The microelectronic elements can have a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate. Each edge of the microelectronic element can be oriented at an oblique angle with respect to the peripheral edges of the substrate. |
| US09281295B2 |
Embedded heat spreader for package with multiple microelectronic elements and face-down connection
A microelectronic package includes a substrate, first and second microelectronic elements, and a heat spreader. The substrate has terminals thereon configured for electrical connection with a component external to the package. The first microelectronic element is adjacent the substrate and the second microelectronic element is at least partially overlying the first microelectronic element. The heat spreader is sheet-like, separates the first and second microelectronic elements, and includes an aperture. Connections extend through the aperture and electrically couple the second microelectronic element with the substrate. |
| US09281294B2 |
Multi-chip semiconductor device
A multi-chip semiconductor device includes a plate-shaped first semiconductor chip having a first connection portion in which a first semiconductor chip electrode is formed on a first main surface of the first semiconductor chip or on a first side surface vertical to the first main surface, and a plate-shaped second semiconductor chip having a second connection portion in which a second semiconductor chip electrode is formed on a second side surface vertical to a second main surface of the second semiconductor chip. Each of the first and second connection portions includes at least an inclined surface that is inclined with respect to each of the first and second main surfaces. The first connection portion and the second connection portion are connected to each other such that the first main surface of the first semiconductor chip and the second main surface of the second semiconductor chip are vertical to each other. |
| US09281293B2 |
Microelectronic packages having layered interconnect structures and methods for the manufacture thereof
Microelectronic packages having layered interconnect structures are provided, as are methods for the fabrication thereof. In one embodiment, the method includes forming a first plurality of interconnect lines in ohmic contact with a first bond pad row provided on a semiconductor. A dielectric layer is deposited over the first plurality of interconnect lines, the first bond pad row, and a second bond pad row adjacent the first bond pad row. A trench via is then formed in the dielectric layer to expose at least the second bond pad row therethrough. A second plurality of interconnect lines is formed in ohmic contact with the second bond pad row within the trench via. The second plurality of interconnect lines extends over the first bond pad row and is electrically isolated therefrom by the dielectric layer to produce at least a portion of the layered interconnect structure. |
| US09281292B2 |
Single layer low cost wafer level packaging for SFF SiP
In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board. |
| US09281289B2 |
Semiconductor device and method of manufacturing the same
To enhance the reliability of a semiconductor device. The semiconductor device includes a wiring substrate having a plurality of bonding fingers (terminal) formed on a chip-mounting surface, a semiconductor chip mounted on the wiring substrate, a plurality of wires having a ball part and a stitch part respectively. The bonding fingers have a first bonding finger to which the stitch part of the first wire is coupled respectively, and the second bonding finger to which a ball part of the second wire is coupled. In addition, in plan view, the second bonding finger is arranged at a position different from the arrangement of a plurality of first bonding fingers, and the width of the second bonding finger is larger than the width of the first bonding finger. |
| US09281285B1 |
Input/output termination for ripple prevention
Aspects of this disclosure relate to a termination circuit configured to mitigate crosstalk from a radio frequency (RF) input/output (I/O) path to a second I/O path, such as a digital I/O path. Such crosstalk can be due to coupling between adjacent bond wires, for example. The termination circuit can include a low impedance loss path, such as a series RC shunt circuit. According to certain embodiments, an electrostatic discharge (ESD) protection circuit can be in parallel with the termination circuit. |
| US09281284B2 |
System-in-packages having vertically-interconnected leaded components and methods for the fabrication thereof
System-in-Packages (SiPs) and methods for producing SiPs are provided. In one embodiment, the above-described SiP fabrication method includes the step or process of forming a through-hole in a core package, the core package containing an electrically-conducive routing feature exposed at a sidewall surface of the through-hole. A leaded component is positioned adjacent the core package such that an elongated lead of the leaded component extends into the through-hole. An electrically-conductive material, such as solder, is then applied into the through hole to electrically couple the elongated lead of the leaded component to the electrically-conductive routing feature of the core package. |
| US09281282B2 |
Substrate capable of electrostatic self-protection and manufacturing method thereof
A substrate capable of electrostatic self-protection and a manufacturing method thereof, and the substrate (1) comprises: a panel area (2); and a first gate metal layer (3) and a source/drain metal layer (5) disposed on at least one side of the panel area (2). The first gate metal layer (3) and the source/drain metal layer (5) are arranged parallel to each other in a longitudinal direction and adjacent to each other; at least one tip (31) is protruded from the first gate metal layer (3) towards the source/drain metal layer (5); and/or at least one tip (31) is protruded from the source/drain metal layer (5) towards the first gate metal layer (3). |
| US09281272B2 |
Semiconductor device including conductor patterns as electrodes of a capacitive element and manufacturing method thereof
The present invention is capable of suppressing a variation in the characteristics of a semiconductor device. In a conductor pattern CPA and a conductor pattern CPB arranged so as to run side by side with each other, the conductor pattern CPA is divided into a first portion P1 (A) and a second portion P2 (A), and the conductor pattern CPB is also divided into a first portion P1 (B) and a second portion P2 (B). The first portion P1 (A) of the conductor pattern CPA and the second portion P2 (B) of the conductor pattern CPB are formed by first patterning using the same first mask, while the second portion P2 (A) of the conductor pattern CPA and the first portion P1 (B) of the conductor pattern CPB are formed by second patterning using the same second mask. |
| US09281270B2 |
Method for making contact with a semiconductor and contact arrangement for a semiconductor
The invention relates to a method for making contact with a semiconductor (10), and to a contact arrangement (1) for a semiconductor (10), wherein the semiconductor (10) is a really connected to a first contact partner (20) at at least one first area by the formation of a first soldering layer (30) having a predefined thickness. According to the invention, a polyimide layer (14) is applied as delimiting means on the semiconductor (10), said polyimide layer predefining the dimensions and/or the form of at least one soldering area (12) of the semiconductor (10). |
| US09281267B1 |
Semiconductor package having overhang portion
A semiconductor package may include a substrate, and a structural body disposed over the substrate. The semiconductor package may include a semiconductor chip stacked over the structural body, and having an overhang portion projecting over a side surface of the structural body and overhanging out over the side surface of the structural body. The semiconductor package may include one or more bonding pads disposed on the overhang portion, and one or more wires electrically coupling the bonding pads to the substrate. The semiconductor package may include a wire fixing film attached onto the structural body, and overhanging out over the side surface of the structural body to fix the one or more wires. |
| US09281265B2 |
Packaging structure of a semiconductor device
A method of making a semiconductor packaged device comprises mounting onto a lead frame a bottom of a molded semiconductor chip having a first plastic package body covering a top face of a semiconductor chip, encapsulating the lead frame and the semiconductor chip with a second plastic package body with top surfaces of conductive contact bodies electrically connected to electrodes on the top surface of the semiconductor chip exposed and plating conductive pads on a top surface of the assembly structure to provide external electrical connections to the electrodes through the conductive contact bodies. |
| US09281262B2 |
Semiconductor device including a structure for screening connectivity of a TSV
A semiconductor device is provided to check through silicon via (TSV) connectivity at a wafer level. The semiconductor device includes a first metal layer formed over a through silicon via (TSV), a second metal layer and a third metal layer formed at both sides of the first metal layer to be electrically coupled to the TSV, and a fourth metal layer formed over the first metal layer to be electrically coupled to the first metal layer. |
| US09281261B2 |
Intelligent chip placement within a three-dimensional chip stack
An integrated circuit (IC) stack device for thermal management is disclosed. The IC stack device can include a primary IC having a first set of cores with a ratio of first enabled cores and first disabled cores. The IC stack device can also have a supplementary IC interfaced with the primary IC, and having a second set of cores with a second ratio of second enabled cores and second disabled cores, with the second ratio being less than the first ratio. The integrated circuit stack device can also include a cooling element located such that the primary integrated circuit is between the cooling element and the supplementary integrated circuit. The cooling element can be designed to facilitate heat dissipation of the first and second enabled cores of the primary integrated circuit and the supplementary integrated circuit. |
| US09281257B2 |
Semiconductor package including a connecting member
The semiconductor package according to an exemplary embodiment in the present disclosure includes: at least one electronic device; a lead frame including a plurality of leads electrically connected to the electronic device; a lead connecting member coupled to at least one of the leads; and a molded portion sealing the electronic device and the lead connecting member. |
| US09281255B2 |
Underfill composition and semiconductor device and manufacturing method thereof
To provide a solid preapplication underfill material that has excellent workability, has a high degree of freedom for solder bonding processes, and enables the formation of a solder bond with high reliability. (Resolution Means) The underfill composition of the present disclosure contains a hardened epoxy resin and has a viscosity of 1000 Pa·s or more at 30° C. The hardening epoxy resin includes a crystalline epoxy resin at not less than 50 wt % relative to an entire resin composition. |
| US09281252B1 |
Method comprising applying an external mechanical stress to a semiconductor structure and semiconductor processing tool
A method includes providing a semiconductor structure. An external mechanical stress is applied to the semiconductor structure. One or more semiconductor manufacturing processes are performed while the external mechanical stress is applied to the semiconductor structure. The one or more semiconductor manufacturing processes provide one or more material layers having an intrinsic stress at the semiconductor structure. After performing the one or more semiconductor manufacturing processes, the external mechanical stress is removed from the semiconductor structure. The removal of the external mechanical stress at least partially relaxes the intrinsic stress of the one or more material layers. |
| US09281242B2 |
Through silicon via stacked structure and a method of manufacturing the same
A through silicon via (TSV) stacked structure made of stacked substrates. Each substrate includes multiple tapered through silicon vias, wherein the wider end of each tapered through silicon via is provided with a recessed portion and the narrower end of each tapered through silicon via protrudes from the substrate. The substrates are stacked one after another with the narrower end of each tapered through silicon via being fitting and jointing into a corresponding recessed portion of the tapered through silicon via. |
| US09281240B2 |
Methods of manufacturing semiconductor devices
In a method of manufacturing a semiconductor device, an insulating interlayer is formed on a substrate. The insulating interlayer is partially removed to form an opening. A barrier conductive layer is formed on a sidewall and a bottom of the opening. An RF sputtering process and a DC sputtering process are performed independently on the barrier conductive layer to form a seed layer. A plated layer is formed on the seed layer. |
| US09281239B2 |
Biocompatible electrodes and methods of manufacturing biocompatible electrodes
A biocompatible electrode is manufactured by depositing filling metal 36 and etching back the filling metal to the surface of the surrounding insulator 30. Then, a further etch forms a recess 38 at the top of the via 32. An electrode metal 40 is then deposited and etched back to fill the recess 38 and form biocompatible electrode 42. In this way, a planar biocompatible electrode is achieved. The step of etching to form the recess may be carried out in the same CMP tool as is used to etch back the filling metal 36. A hydrogen peroxide etch may be used. |
| US09281238B2 |
Method for fabricating interlayer dielectric layer
A method for fabricating interlayer dielectric (ILD) layer is disclosed. The method includes the steps of first forming a first tensile dielectric layer on a substrate, and then forming a second tensile dielectric layer on the first tensile dielectric layer. |
| US09281235B2 |
Semiconductor packages and methods of forming the same
A semiconductor package may include a substrate including a substrate connection terminal, at least one semiconductor chip stacked on the substrate and having a chip connection terminal, a first insulating layer covering at least portions of the substrate and the at least one semiconductor chip, and/or an interconnection penetrating the first insulating layer to connect the substrate connection terminal to the chip connection terminal. A semiconductor package may include stacked semiconductor chips, edge portions of the semiconductor chips constituting a stepped structure, and each of the semiconductor chips including a chip connection terminal; at least one insulating layer covering at least the edge portions of the semiconductor chips; and/or an interconnection penetrating the at least one insulating layer to connect to the chip connection terminal of each of the semiconductor chips. |
| US09281230B2 |
Apparatus for manufacturing a hierarchical structure
The present invention relates to an apparatus for massive manufacturing a hierarchical structure that can hierarchically form high performance micro units one a flexible substrate. For this purpose, an apparatus for manufacturing a hierarchical structure according to the present invention is provided to layer micro units provided on a dummy substrate that is made of a hard material on a target substrate that is made of a flexible material by releasing the micro units from the dummy substrate. The apparatus includes: a transfer stage flat-transferring the dummy substrate by supporting the same and a main roller rolling the target substrate by winding the same as the transfer stage proceeds and layering the micro unit of the dummy substrate on the target substrate. |
| US09281223B2 |
Coupling system
In a transfer system for wafers, etc., a coupling chamber corresponding to a port is formed only when a transfer box comes in tight contact with an apparatus as a transfer target in the transfer box is transferred into the apparatus, so that the transfer target will be transferred into the apparatus together with the coupling chamber, thereby simplifying the structures of the transfer box and apparatus and also allowing the transfer target to be transferred into the apparatus without fail. |
| US09281220B2 |
Liquid processing apparatus, liquid processing method and storage medium
Disclosed are a liquid processing device, and a liquid processing method. The liquid processing method includes a first process that includes supplying a first processing liquid to the substrate and discharging the first processing liquid within the processing space from a first discharge path, a second process that includes supplying a second processing liquid to the substrate and discharging the second processing liquid within the processing space from the second discharge path, and after stop supplying of the first processing liquid and prior to beginning of the second process, a nozzle switching operation switching from the first nozzle to the second nozzle and a discharge mechanism switching operation switching from the first discharge path to the second discharge path are performed. A longer one of a time to switch the nozzle and a time to switch the discharge mechanism is determined as a maximum preparation time and the switching operations begin at an earlier time than the completion time of the first process by the maximum preparation time or more. |
| US09281213B2 |
High precision capacitor dielectric
A process of forming an integrated circuit forms a high precision capacitor bottom plate with a metallic surface and performs a plasma treatment of the metallic surface. A high precision capacitor dielectric is formed by depositing a first layer of the capacitor dielectric on the high precision capacitor bottom plate wherein the first layer is silicon nitride, depositing a second layer of the capacitor dielectric on the first layer wherein the second portion is silicon dioxide, and depositing a third layer of the capacitor dielectric on the second portion wherein the third layer is silicon nitride. Plasma treatments may also be performed on the layers of capacitor dielectric pre- and/or post-deposition. A metallic high precision capacitor top plate is formed on the high precision capacitor dielectric. |
| US09281212B1 |
Dielectric tone inversion materials
A process for patterning a hard mask material with line-space patterns below a 30 nm pitch and a 15 nm critical dimension by employing a spin-on titanium-silicon (TiSi) polymer or oligomer as a tone inversion material is provided. The spin-on TiSi material is spin-coated over a patterned OPL that includes a first pattern generated from a DSA based process. The spin-on TiSi material fill trenches within the patterned OPL to form a tone inverted pattern by removing the patterned OPL selective to the spin-on TiSi material. The inverted pattern is a complementary pattern to the first pattern, and is transferred into the underlying hard mask material by an anisotropic etch. |
| US09281210B2 |
Wet-process ceria compositions for polishing substrates, and methods related thereto
Disclosed are a chemical-mechanical polishing composition and a method of polishing a substrate. The polishing composition comprises low average particle size (e.g., 30 nm or less) wet-process ceria abrasive particles, at least one alcohol amine, and water, wherein said polishing composition has a pH of about 6. The polishing composition can be used, e.g., to polish any suitable substrate, such as a polysilicon wafer used in the semiconductor industry. |
| US09281208B2 |
Methods of forming semiconductor devices using hard mask layers
A method of forming a semiconductor structure can include forming a photolithography mask on a silicon fin having a hard mask layer thereon extending in a first direction. A trench can be formed through the hard mask layer into the silicon fin using the photolithography mask, where the trench extends in a second direction to separate the silicon fin into first and second fin structures extending end-to-end in the first direction. A portion of the trench formed by the hard mask layer can be widened relative to a lower portion of the trench defined by the first and second fin structures. |
| US09281206B2 |
Semiconductor processing by magnetic field guided etching
Methods, systems, and devices are described for slicing and shaping materials using magnetically guided chemical etching. In one aspect, a method includes forming a pattern on a substrate by a mask, depositing a catalytic etcher layer on the patterned substrate, a magnetic guide layer on the etcher layer, and a protection layer on the guide layer, etching the substrate by applying an etching solution to the substrate that chemically reacts with the etcher layer and etches material from the substrate at exposed regions not covered by the mask, steering the composite etching structure into the substrate during the etching by an applied magnetic field that creates a force on the guide layer to direct the etching, in which the steering defines the shape of the sliced regions of the etched substrate, and removing the etched material, the mask, and the composite etching structure to produce a sliced material structure. |
| US09281201B2 |
Method of manufacturing semiconductor device having metal gate
A method of manufacturing a semiconductor device having a metal gate is provided. A substrate having a first conductive type transistor and a second conductive type transistor formed thereon is provided. The first conductive type transistor has a first trench and the second conductive type transistor has a second trench. A first work function layer is formed in the first trench. A hardening process is performed for the first work function layer. A softening process is performed for a portion of the first work function layer. A pull back step is performed to remove the portion of the first work function layer. A second work function layer is formed in the second trench. A low resistive metal layer is formed in the first trench and the second trench. |
| US09281200B2 |
Enhanced patterning uniformity of gate electrodes of a semiconductor device by late gate doping
When forming sophisticated semiconductor-based gate electrode structures of transistors, the pre-doping of one type of gate electrode structure may be accomplished after the actual patterning of the electrode material by using an appropriate mask or fill material for covering the active regions and using a lithography mask. In this manner, a high degree of flexibility is provided with respect to selecting an appropriate patterning regime, while at the same time a uniform and superior cross-sectional shape for any type of gate electrode structure is obtained. |
| US09281198B2 |
Method of fabricating a semiconductor device including embedded crystalline back-gate bias planes
A method of forming a semiconductor device is disclosed. The method includes forming a first dielectric layer on a substrate; forming a set of bias lines on the first dielectric layer; covering the set of bias lines with a second dielectric layer; forming a semiconductor layer on the second dielectric layer; and forming a set of devices on the semiconductor layer above the set of bias lines. |
| US09281192B2 |
CMP-friendly coatings for planar recessing or removing of variable-height layers
An IC device manufacturing process effectuates a planar recessing of material that initially varies in height across a substrate. The method includes forming a polymer coating, CMP to form a planar surface, then plasma etching to effectuate a planar recessing of the polymer coating. The material can be recessed together with the polymer coating, or subsequently with the recessed polymer coating providing a mask. Any of the material above a certain height is removed. Structures that are substantially below that certain height can be protected from contamination and left intact. The polymer can be a photoresist. The polymer can be provided with suitable adhesion and uniformity for the CMP process through a two-step baking process and by exhausting the baking chamber from below the substrate. |
| US09281189B2 |
Wafer and method of fabricating the same
Disclosed is a method of manufacturing a thin film, the method including: growing an epitaxial layer on a surface of a wafer at a growth temperature, wherein the growing of the epitaxial layer comprises controlling a defect present on a surface of the wafer. Also, disclosed is a wafer including: a substrate; and an epitaxial layer located on the substrate, wherein a basal dislocation density of the epitaxial layer is equal to or less than 1/cm2. |
| US09281188B2 |
Apparatus and method for fabricating wafer
A method for fabricating a wafer according to the embodiment comprises the steps of depositing an epi layer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part connected to the annealing part; and cooling the wafer in the cooling part, wherein the depositing of the wafer, the annealing of the wafer and the cooling of the wafer are continuously performed. An apparatus for fabricating a wafer according to the embodiment comprises an epi deposition part; an annealing part connected to the epi deposition part; and a cooling part connected to the annealing part. |
| US09281187B2 |
Method for manufacturing nitride semiconductor device
The invention provides a method for manufacturing a nitride semiconductor device that grows a multilayer film of a III-V group nitride semiconductor in a reaction furnace into which a III group element raw material gas and a V group element raw material gas are introduced, the method including: growing a first nitride semiconductor layer at a first raw material gas flow rate of the V group element raw material gas and a first carrier gas flow rate; and growing a second nitride semiconductor layer at a second raw material gas flow rate of the V group element raw material gas lower than the first raw material gas flow rate and a second carrier gas flow rate higher than the first carrier gas flow rate, wherein the first nitride semiconductor layer and the second nitride semiconductor layer are stacked. |
| US09281186B2 |
Colored photovoltaic modules and methods of construction
A colored photovoltaic module and method for its production, where the module includes: a photovoltaic cell; and an appearance modifying film, encapsulant or glazing; where the appearance modifying film, encapsulant or glazing includes: a light-control film; graphic material; a phosphor; a dichroic film; nano-particles; micro-dots; metal flakes; paint; an additive material for 3-D printing, Selective Laser Augmentation (SLA) or Selective Laser Sintering (SLS); or any combination thereof. |
| US09281183B2 |
Metalorganic chemical vapor deposition of oxide dielectrics on N-polar III-nitride semiconductors with high interface quality and tunable fixed interface charge
A method of fabricating a III-nitride semiconductor device, including growing an III-nitride semiconductor and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor. |
| US09281181B2 |
Film forming method and recording medium for performing the method
A method of manufacturing a semiconductor device includes forming a laminated film on a substrate by performing a cycle a predetermined number of times. The cycle includes forming a first film which contains a predetermined element, boron, and nitrogen and which does not contain a borazine ring skeleton, and forming a second film which contains the predetermined element and a borazine ring skeleton. The first film and the second film are laminated to form the laminated film. |
| US09281177B2 |
Methods and apparatus for cleaning semiconductor wafers
An apparatus for cleaning a surface of wafer or substrate includes a plate being positioned with a gap to surface of the wafer or substrate, and the plate being rotated around an axis vertical to surface of wafer or substrate. The rotating plate surface facing surface of the wafer or substrate has grooves, regular patterns, and irregular patterns to enhance the cleaning efficiency. Another embodiment further includes an ultra sonic or mega sonic transducer vibrating the rotating plate during cleaning process. |
| US09281174B2 |
System and method for rapid evaporative ionization of liquid phase samples
According to some embodiments, systems and methods for rapid evaporation of liquid phase samples are provided. The method includes directing liquid samples to a thermal evaporation ionizing device, thermally evaporating the liquid samples to create gaseous molecular ions, and directing the gaseous molecular ions to an ion analyzer to analyze and provide information regarding the chemical composition of the liquid samples. |
| US09281168B2 |
Reducing switching variation in magnetoresistive devices
The magnetic characteristics of a magnetoresistive device are improved by rendering magnetic debris non-magnetic during processing operations. Further improvement is realized by annealing the partially- or fully-formed device in the presence of a magnetic field in order to eliminate or stabilize magnetic micro-pinning sites or other magnetic abnormalities within the magnetoresistive stack for the device. Such improvement in magnetic characteristics decreases deviation in switching characteristics in arrays of such magnetoresistive devices such as those present in MRAMs. |
| US09281164B2 |
Method and apparatus for inspection of scattered hot spot areas on a manufactured substrate
One embodiment relates to a method of automated inspection of scattered hot spot areas on a manufactured substrate using an electron beam apparatus. A stage holding the substrate is moved along a swath path so as to move a field of view of the electron beam apparatus such that the moving field of view covers a target area on the substrate. Off-axis imaging of the hot spot areas within the moving field of view is performed. A number of hot spot areas within the moving field of view may be determined, and the speed of the stage movement may be adjusted based on the number of hot spot areas within the moving field of view. Another embodiment relates to an electron beam apparatus for inspecting scattered areas on a manufactured substrate. Other embodiments, aspects and features are also disclosed. |
| US09281161B2 |
Electron beam writing apparatus and electron beam writing method
An electron beam writing apparatus includes: a first aperture plate that shapes an electron beam emitted from an electron gun assembly; a second aperture plate onto which an electron beam of an aperture plate image passing through the first aperture plate is projected; and a first shaping deflector and a second shaping deflector which are provided between the first aperture plate and the second aperture plate, respectively, deflect an electron beam, control an irradiation position of the aperture plate image on the second aperture plate, and determine a shot shape and a shot size. The first shaping deflector deflects an electron beam such that the aperture plate image is positioned at a determined position in accordance with a shot shape and a shot size. The second shaping deflector deflects an electron beam deflected by the first shaping deflector and controls formation of a desirable shot size. |
| US09281160B2 |
Insulation structure and insulation method
An insulation structure provided among a plurality of electrodes for extraction of an ion beam from a plasma generating section is provided. The insulation structure includes an insulation member including a first part connected to a first electrode and a second part connected to a second electrode and configured to support the first electrode to the second electrode, a first cover surrounding at least a part of the first part to protect the first part from contamination particles, and a second cover surrounding at least a part of the second part to protect the second part from contamination particles. At least one of the first part and the second part is made of a machinable ceramic or a porous ceramic. |
| US09281158B2 |
X-ray emitting target and X-ray emitting device
An X-ray emitting target including a diamond substrate, a first layer disposed on the diamond substrate and including a first metal, and a second layer disposed on the first layer and including a second metal whose atomic number is 42 or more and which has a thermal conductivity higher than that of the first metal. Carbide of the first metal is present at a boundary between the diamond substrate and the first layer. The target is prevented from overheating, so that output variation due to rising temperature is suppressed. Thus it is possible to emit stable and high output X-rays. |
| US09281154B2 |
Microwave introducing mechanism, microwave plasma source and microwave plasma processing apparatus
The microwave introducing mechanism includes an antenna unit having a planar antenna radiating a microwave into a chamber; a tuner for performing impedance matching; and a heat dissipation device for dissipating a heat from the antenna unit. The tuner has a tuner main body including a tubular outer conductor and a tubular inner conductor to serve as a part of a microwave transmission line; slugs provided between the outer conductor and the inner conductor to be movable along a longitudinal direction of the inner conductor; and a driving device for moving the slugs. The heat dissipation device has a heat pipe configured to transfer the heat of the antenna unit from its heat input end to its heat dissipation end. |
| US09281152B2 |
Fuse with carbon fiber fusible element
A fuse includes a body, a first conductive terminal coupled with a first end of the body, and a second conductive terminal coupled with a second end of the body. The body, the first conductive terminal, and the second conductive terminal define an exterior of the fuse. The fuse also includes an interruption assembly including a fusible element. The fusible element includes carbon fiber, is disposed on a conductive path between the first conductive terminal and the second conductive terminal, and is configured to break when a current through the fusible element exceeds a predetermined current. |
| US09281151B2 |
Lever arm for a shunt trip device
A shunt trip device for a circuit breaker having a trip bar for tripping the circuit breaker. The device includes a housing having a slot and a bottom wall having a pivot pocket. The device also includes a lever arm having a lever projection portion and a pivot portion. The pivot portion is located in the pivot pocket to enable rotation of the lever arm in the slot about a lever rotation axis between first and second positions. When the lever arm is in the second position, the lever projection portion moves the trip bar and trips the circuit breaker. The device further includes an actuation device that moves the lever arm to the second position. The pivot portion and pivot pocket form a configuration that increases a perpendicular distance between a force generated by the actuation device and the lever rotation axis. |
| US09281150B2 |
Circuit breaker trip blocking apparatus, systems, and methods of operation
Embodiments disclose a trip blocking apparatus of a circuit breaker exhibiting no trip at OFF functionality. The trip blocking apparatus effectively blocks tripping of a trip bar when the circuit breaker is in the OFF configuration. The trip blocking apparatus has a trip blocking arm and a blocking lever. A first projection of the blocking lever is configured to contact a handle arm, and a second projection is configured to interfere with the trip blocking arm to block tripping of the trip bar responsive to handle arm motion. Actuator resetting and blocking apparatus and trip blocking assemblies and methods of operating the trip blocking assembly are provided, as are other aspects. |
| US09281145B2 |
Vacuum interrupter
A vacuum interrupter, including: an insulating housing; a movable end cap; a stationary end cap; a pair of movable and stationary contacts; and a pair of shields. The pair of shields is fixed on the movable end cap and the stationary end cap, respectively. The insulating housing, the movable end cap, and the stationary end cap cooperate to form a closed space. The closed space includes a movable fracture and a stationary fracture. The movable fracture is formed by the pair of movable and stationary contacts for carrying rated current and disconnecting capacitive load whereby achieving breaking performance of the vacuum interrupter. The stationary fracture is formed by the pair of shields. When the pair of stationary and movable contacts reaches a full open position, the stationary contact and the movable contact enter the pair of shields, respectively. |
| US09281144B2 |
Circuit breaker contact assembly and cam lever
A contact apparatus of a circuit breaker is disclosed. The contact apparatus has an outer carrier, an inner carrier, one or more contact fingers pivotally mounted to the inner carrier, a cam lever pivotally mounted to the outer carrier, and a cam and cam profile formed on respective ones of the cam lever and inner carrier. Circuit breakers and electrical contact assemblies having the contact apparatus, and methods of operating the contact apparatus and electrical contact assemblies are disclosed, as are other aspects. |
| US09281143B2 |
Limit switch
The invention relates to a limit switch comprising: a body (1) produced along a main axis (X) and containing a switching device, a head (2) that is removable and orientable with respect to the body (1) so that it can adopt several distinct angular positions about the main axis (X), said head (2) comprising actuating means arranged to act on the switching device, fixing means for fixing the limit switch to a support (S), the fixing means being arranged on the head (2) of the limit switch, the head (2) having at least two separate bearing planes, said fixing means being arranged to fix the head so that it bears against the support via one or other of its two bearing planes. |
| US09281140B2 |
Lighted switch
The invention is directed to a switch comprising an LED for indicating when a connected electrical device is activated or not. In certain examples, the electrical device is a water pump. In certain examples, the invention is drawn to a circuit comprising a switch, a logic circuit, an electrical device, and an LED subcircuit, whereby the electrical device is turned on by closing the switch, and whereby the LED functions as an indicator light remaining on while the electrical device remains on, and turning off when the electrical device is turned off. |
| US09281139B2 |
Cover assembly for an electrical switch
A cover assembly for a first electrical switch and a second electrical switch. The cover assembly includes an alignment plate configured to be removably coupled to the first electrical switch. The alignment plate includes a first alignment feature that receives a portion of the first electrical switch to align the alignment plate with the first electrical switch, and a second alignment feature that receives a portion of the second electrical switch to align the alignment plate with the second electrical switch and to align the second electrical switch with the first electrical switch. The assembly further includes a faceplate that is removably coupled to the alignment plate. |
| US09281132B2 |
Method for sealing a liquid within a glass package and the resulting glass package
A method for sealing a liquid within a glass package and the resulting sealed glass package are described herein where the sealed glass package can be, for example, a dye solar cell, an electro-wetting display or an organic emitting light diode (OLED) display. |
| US09281131B2 |
Electrolyte-comprising polymer nanofibers fabricated by electrospinning method and high performance dye-sensitized solar cells device using same
A polymer electrolyte including a polymer fiber having a nanoscale diameter, wherein the polymer fiber is fabricated by an electrospinning method and a solar cell device exhibiting high energy conversion efficiency using the same. The solid-state electrolyte comprising such nanosized polymer fiber does not need a sealing agent and further simplifies the entire process compared to a conventional dye-sensitized solar cell using liquid electrolytes. Specifically, the energy conversion efficiency of the present dye-sensitized solar cell is significantly superior to that of a dye-sensitized solar cell using a polymer film electrolyte fabricated by a spin coating method. Further, the present dye-sensitized solar cell device can be obtained by using a scattering layer and compensating the surface effect. |
| US09281130B2 |
Electrolytic solution for aluminum electrolyte capacitor, and aluminum electrolyte capacitor using the same
The invention provides an electrolytic solution for an aluminum electrolyte capacitor with which there is little deterioration of the electrolytic solution properties, the sparking voltage is high, and shorting does not occur, even when the voltage used is high. The invention also provides an electrolyte (C) formed from anions of at least one phosphoric acid alkyl ester (A) and amidinium cations (B), at least one boric acid compound (F) selected from the group consisting of boric acid and boric acid esters, a C2-15 carboxylic acid (D) formed from carbon atoms, oxygen atoms, and hydrogen atoms only, and an organic solvent (E). |
| US09281129B2 |
Silicon oxide particles, making method, lithium ion secondary battery, and electrochemical capacitor
Silicon oxide particles each comprising an inner portion having an iron content of 10-1,000 ppm and an outer portion having an iron content of up to 30 ppm are suitable as negative electrode active material in nonaqueous electrolyte secondary batteries. Using a negative electrode comprising the silicon oxide particles as active material, a lithium ion secondary battery or electrochemical capacitor having a high capacity and improved cycle performance can be constructed. |
| US09281128B2 |
Switchable capacitor
A switchable capacitor having: a dielectric; a pair of electrodes, a first one of the electrodes having the dielectric thereon and a second, flexible one of the electrodes being suspended over the dielectric when the switchable capacitor is in an de-activated state; and top plate disposed between the dielectric and the second, flexible electrode and connected to a reference potential. When the switchable capacitor is electrostatically driven to an activated state, the second one of the electrodes contacts the top plate and when the switchable capacitor is returned to the de-activated state, charge on the top plate is discharged to the reference potential. |
| US09281127B2 |
Electronic component and method for manufacturing the same
In a method for manufacturing an electronic component, when conductive paste used to form outer electrodes is applied to a component body, a side surface of the component body is subjected to an affinity-reducing process to reduce an affinity for solvent, and then an end surface of the component body is dipped into the conductive paste. Accordingly, spreading of the conductive paste stops at ridge portions of the component body, and the conductive paste is applied to a large thickness. After that, the end surface of the component body is dipped deeper into the conductive paste. Also in this step, the affinity-reducing process prevents upward spreading of the conductive paste along the side surface. |
| US09281125B2 |
Dielectric ceramic, multi-layer ceramic capacitor and method of manufacturing the same
A dielectric ceramic is formed with sintered grains constituting the dielectric have an average grain size of 0.2 to 1.0 μm and an oxygen defect concentration of 0.2 to 0.5%. An acceptor element is added to the dielectric ceramic by no more than 0.5 mol per 100 mol of the primary component of BaTiO3. The oxygen defect concentration is temporarily increased by reduction and sintering, after which the oxygen defect concentration is reduced through the subsequent re-oxidization process. Crystal strain generated in the re-oxidization process increases the dielectric constant. |
| US09281123B2 |
Metalized film capacitor
A metalized film capacitor includes metalized films, each of which is formed of an insulating film made of dielectric, and a vapor deposited metal electrode formed on an upper surface of the insulating film. An end of the vapor deposited metal electrode extends together with an end of the insulating film, and both the ends are connected to an electrode terminal. The vapor deposited metal electrode of the metalized film includes a center region and a low resistance section that is made of Al—Zn—Mg alloy. The low resistance section is disposed at an end of the electrode and is thicker than the center region. This metalized film capacitor has high humidity resistance. |
| US09281122B2 |
Electrode structure of a laminated metallization film capacitor
An electrode structure of a laminated metallization film capacitor includes at least two laminated metallization films. Each metallization film is further disposed with a plurality of metal-uncoated curved gap strips with a certain width on the plane of section of the laminated metallization film capacitor core to separate two adjacent metal coating units partially or totally. A center of the curved gas strip is concaved with a notch. Both sides of the notch form like misaligned shoulders. A projection forms opposite to the open of the notch; in two adjacent curve gap strips. An extreme point of the projection of one curve gap strip is disposed inside the notch of the other one in any event. |
| US09281117B2 |
Magnetic core structure and electric reactor
The present application discloses a magnetic core structure and an electric reactor. The magnetic core structure includes an upper cover plate and a lower cover plate which are arranged oppositely and at least one wrapping post having two ends connected to the upper cover plate and lower cover plate, respectively. A cross-sectional area of the upper cover plate and/or of the lower cover plate is larger than that of the wrapping post. The upper cover plate, the lower cover plate and the wrapping post are made of a magnetic powder core material, an amorphous material, a nanocrystalline material or a silicon steel material. Since the cross-sectional area of the upper cover plate and/or of the lower cover plate is larger than that of the wrapping post, this may bring excellent DC-Bias characteristic to an electric reactor or inductor, and make the electric reactor or inductor have lower magnetic core loss. |
| US09281114B2 |
Stator for electronic fuel injector
A stator assembly for a fuel valve comprising a magnetic E-core of stacked E-shaped laminations, a plastic bobbin proportioned to surround a central leg of the core, a magnetic wire coil on the bobbin, a non-magnetic metal plate having an O-shaped profile adjacent an end of the bobbin and distal ends of central and outer legs of the E-core, the core, bobbin, coil and plate encapsulated in a block, the block having a pair of vent channels overlying portions of the plate disposed between the outer core legs and the central core leg, the plate being proportioned to pre-stress the outer core legs outwardly prior to encapsulation whereby cyclic strain on the block due to hydraulic forces imposed by high pressure fuel pulses tending to spread the outer core legs is reduced and resistance of the block to cracking due to said fuel pressure pulses is increased. |
| US09281107B2 |
Rare-earth permanent magnet and method for manufacturing rare-earth permanent magnet
There are provided a rare-earth permanent magnet and a manufacturing method thereof capable of preventing deterioration of magnet properties. In the method, magnet material is milled into magnet powder. Next, a mixture is prepared by mixing the magnet powder and a binder made of long-chain hydrocarbon and/or of a polymer or a copolymer consisting of monomers having no oxygen atoms. Next, the mixture is formed into a sheet-like shape so as to obtain a green sheet. After that, the green sheet is held for a predetermined length of time at binder decomposition temperature in a non-oxidizing atmosphere so as to remove the binder by causing depolymerization reaction or the like to the binder, which turns into monomer. The green sheet from which the binder has been removed is sintered by raising temperature up to sintering temperature. Thereby a permanent magnet 1 is obtained. |
| US09281105B2 |
Permanent magnet and method of producing permanent magnet
A permanent magnet has a grain structure that includes a main phase and a grain boundary phase that is primarily composed of a first metal. A second metal that enhances the coercivity of the permanent magnet and a third metal that has a lower standard free energy of oxide formation than the first metal and the second metal are diffused in the permanent magnet, and the third metal is present in the form of an oxide in the grain boundary phase. |
| US09281104B2 |
Conductive thin film comprising silicon-carbon composite as printable thermistors
A method of fabricating a temperature sensing device based on printed silicon-carbon nanocomposite film is disclosed. This method includes high-crystal-quality Si nanoparticles (NPs) homogeneously mixed with carbon NPs and Si—C nanocomposites printed as negative temperature coefficient (NTC) thermistor. These mixtures of Si and C NPs are formulated into screen printing paste with acrylic polymer binder and ethylene glycol (EG) as solvent. This composite paste can be successfully printed on flexible substrates, such as paper or plastics, eventually making printable NTC thermistors quite low-cost. Si and carbon powders have size range of 10 nanometers to 100 micrometers and are mixed together with weight ratios of 100:1 to 10:1. More carbon content, higher conductivity of printed Si—C nanocomposite films keeping similar sensitivity of high-quality Si NPs. With homogeneous distribution of carbon particles in printed films, electrons can tunnel from silicon to carbon and high-conductivity carbon microclusters enhanced hopping process of electrons in printed nanocomposite film. The measured sensitivity 7.23%/° C. of printed Si—C nanocomposite NTC thermistor is approaching the reported value of 8.0-9.5%/° C. for intrinsic silicon bulk material near room temperature, with the quite low resistance of 10 kΩ-100 kΩ. This NTC thermistor is quite suitable for low-cost readout circuits and the integrated systems target to be disposable temperature sensors. |
| US09281103B2 |
Polymer locally comprising conductive areas
A method for producing a conductive area in a polymer material comprises: providing a polymer layer comprising conductive particles with a density such that the polymer layer is insulating, heating the polymer material to a temperature higher than or equal to the glass transition temperature of the polymer material, compressing a portion of the polymer layer using a stamp, in order to obtain a density of conductive particles such that the portion becomes conductive, and removing the stamp from the polymer layer. |
| US09281097B2 |
Anisotropic conductive film, composition for the same, and apparatus including the same
An anisotropic conductive film includes a binder part, a curing part, an initiator, and conductive particles, wherein the binder part includes at least one of a nitrile butadiene rubber (NBR) resin and a urethane resin, the anisotropic conductive film has a halogen ion content of more than 0 ppm to about 100 ppm. |
| US09281095B2 |
Alumina composite, method for manufacturing alumina composite, and polymer composition containing alumina composite
For the purpose of producing an alumina composite in which the integrity between alumina and an inorganic material is further improved, a dispersion liquid preparation step, a solidification step and a burning step are performed, wherein the dispersion liquid preparation step comprises preparing a dispersion liquid in which an inorganic material such as a carbon material is homogeneously dispersed in an alumina raw material solution having an organic additive dissolved therein, the solidification step comprises drying the dispersion liquid to produce a solid raw material, and burning step comprises burning the solid raw material in a non-acidic atmosphere while contacting hydrogen chloride with the solid raw material. In this manner, an alumina composite can be produced, in which at least a portion of an inorganic material such as a carbon material is embedded in the inside of each of α-alumina single crystal particles the constitute alumina particles. |
| US09281083B2 |
Traveling wave nuclear fission reactor, fuel assembly, and method of controlling burnup therein
A traveling wave nuclear fission reactor, fuel assembly, and a method of controlling burnup therein. In a traveling wave nuclear fission reactor, a nuclear fission reactor fuel assembly comprises a plurality of nuclear fission fuel rods that are exposed to a deflagration wave burnfront that, in turn, travels through the fuel rods. The excess reactivity is controlled by a plurality of movable neutron absorber structures that are selectively inserted into and withdrawn from the fuel assembly in order to control the excess reactivity and thus the location, speed and shape of the burnfront. Controlling location, speed and shape of the burnfront manages neutron fluence seen by fuel assembly structural materials in order to reduce risk of temperature and irradiation damage to the structural materials. |
| US09281079B2 |
Dynamic hard error detection
An apparatus for detecting hard errors in a circuit includes a storage device and a processing circuit. The storage has stored therein test data and normal data. The processing circuit includes combinational logic in series with at least one set of input latches and at least one set of output latches. The apparatus includes a test control module configured to control the processing circuit to halt a flow of normal data through the processing circuit and run the test data through the processing circuit while subjecting the processing circuit to a stress condition. |
| US09281077B2 |
Shift register and display device
A shift register includes series-connection circuits to transmit a shift pulse. The series-connection circuits include a continuous stage group with continuous stages. Each stage of the continuous stage group includes a first output transistor, a first capacitor, an input gate, a first switching element, a second switching element, a third switching element, and a fourth switching element. |
| US09281072B2 |
Flash memory device and flash memory system including the same
A flash memory device including: a memory cell array; a signal generator inputting a first data fetch signal and outputting a second data fetch signal; and an output buffer circuit configured to output data from the memory cell array in sync with rising and falling edges of the second data fetch signal, wherein second data fetch signal is output along with data output from the output buffer circuit. |
| US09281069B2 |
Method of programming a nonvolatile memory device
In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data. |
| US09281065B2 |
Low-power nonvolatile memory cells with select gates
Technologies are generally described for low-power nonvolatile memory cells configured with select gates. A nonvolatile memory cell may have a transistor body, a select gate and a floating gate both coupled to the body, and a control gate coupled to the floating gate. Charge stored on the floating gate may indicate the data stored on the memory cell, and the control gate may be configured to adjust the charge stored on the floating gate. The select gate may be used to adjust the state of the transistor body to facilitate the adjustment of charge on the floating gate, and may also be used to render the memory cell unresponsive to the control gate. |
| US09281064B2 |
Fast programming memory device
In an embodiment of a memory device including a matrix of memory cells wherein the memory cells are arranged in a plurality of memory cells strings each one including at least two serially-connected memory cells, groups of at least two memory cells strings being connected to a respective bit line, and wherein said memory cells are adapted to be programmed into at least a first programming state and a second programming state, a method of storing data comprising exploiting a single memory cell for each of the memory cells string for writing the data, wherein said exploiting includes bringing the single memory cell to the second programming state, the remaining memory cells of the string being left in the first programming state. |
| US09281059B2 |
Thyristor memory cell integrated circuit
A semiconductor memory device including an array of memory cells (MC) formed on a substrate each realized from a load element and thyristor that define a switchable current path whose state represents a volatile bit value stored by the MC. At least one word line corresponding to a respective row of the array is formed on the substrate and coupled to MC current paths for the corresponding row. Bit lines corresponding to respective columns of the array are formed on the substrate and can be coupled to a modulation doped QW interface of the MC thyristors for the corresponding column. Circuitry is configured to apply an electrical signal to the word line(s) in order to generate current that programs phase change material of the MC load elements into one of a high or low resistive state according to state of the current path of the MCs for non-volatile backup purposes. |
| US09281058B2 |
Semiconductor memory device and a reading method thereof
A semiconductor memory device may include a common source line controller configured to provide a channel current to a cell string via a common source line during a read operation and a page buffer configured to detect data stored in a selected memory cell by detecting a current of the bit line when the channel current is provided. The page buffer may selectively bias the bit line to maintain a voltage of the bit line to be the same as or higher than a reference voltage. |
| US09281056B2 |
Static random access memory and method of using the same
A static random access memory (SRAM) including a bit cell, wherein the bit cell includes at least two p-type pass gates. The SRAM further includes a bit line connected to the bit cell, and a bit line bar connected to the bit cell. The SRAM further includes a pre-discharge circuit connected to the bit line and to the bit line bar, wherein the pre-discharge circuit includes at least two n-type transistors. The SRAM further includes cross-coupled transistors connected to the bit line and to the bit line bar, wherein each transistor of the cross-coupled transistors is an n-type transistor. The SRAM further includes a write multiplexer connected to the bit line and to the bit line bar, wherein the write multiplexer includes two p-type transistors. |
| US09281055B2 |
Memory sense amplifier and column pre-charger
A memory includes a number of storage elements connected to a pair of bit-lines, a bit-line pre-charging circuit, a sense amplifier connected to the pair of bit-lines through a column-select switch, a transition detection circuit connected to an output of the sense amplifier, and a local pre-charge control circuit connected to the transition detection circuit and having a local pre-charge control signal output connected to the bit-line pre-charging circuit. |
| US09281054B2 |
Technique for optimizing static random-access memory passive power consumption
A static read-only memory (SRAM) includes one or more bit cell rows that each includes a collection of bit cells. Each bit cell row is coupled to two or more different wordlines, where each wordline associated with a given bit cell row provides memory access to a different subset of bit cells within that bit cell row. |
| US09281053B2 |
Memory system and an apparatus
A memory system (1) comprising a control logic (2) adapted to receive a number n of write requests (WRs) from input ports and to receive a read request (RR) from an output port within a clock cycle of a clock signal (CLK) applied to said memory system (1), wherein n is a natural number; and n+1 memory banks (4) of a shared memory (3) adapted to store data, wherein the control logic (2) is adapted to control a memory bank occupancy level MBOL of each memory bank (4) such that the differences between memory bank occupancy levels MBOLs of the memory banks (4) are minimized. |
| US09281051B2 |
Semiconductor package
A semiconductor package may include a first die and a second die disposed adjacent to the first die. The semiconductor package may include a plurality of pads configured for receiving and outputting data mask addresses. The semiconductor package may include mapping blocks configured to map data mask signals among the first die, the second die, and the plurality of pads in response to a received address. |
| US09281049B1 |
Read clock forwarding for multiple source-synchronous memory interfaces
Systems, devices, and circuits for source-synchronous memory interfaces are disclosed. For example, a device includes a first NAND gate with an input for receiving a serial mode enable signal. In addition, the device also includes a second NAND gate with an input for receiving a forwarded strobe signal and an input for receiving an output of the first NAND gate. The device also includes a third NAND gate with an input for receiving a data strobe signal, and an XNOR gate with an input for receiving an output of the second NAND gate and an input for receiving an output of the third NAND gate. |
| US09281044B2 |
Apparatuses having a ferroelectric field-effect transistor memory array and related method
An apparatus comprises field-effect transistor (FET) structures stacked horizontally and vertically in a three-dimensional memory array architecture, gates extending vertically and spaced horizontally between the plurality of FET structures, and a ferroelectric material separating the FET structures and the gates. Individual ferroelectric FETs (FeFETs) are formed at intersections of the FET structures, the gates, and the ferroelectric material. Another apparatus comprises a plurality of bit lines and word lines. Each bit line has at least two sides that are coupled with a ferroelectric material such that each bit line is shared by neighboring gates to faun a plurality of FeFETs. A method of operating a memory array comprises applying a combination of voltages to a plurality of word lines and digit lines for a desired operation for a plurality of FeFET memory cells, at least one digit line having plurality of FeFET memory cells accessible by neighboring gates. |
| US09281043B1 |
Resistive memory write circuitry with bit line drive strength based on storage cell line resistance
An apparatus is described that includes a bit line. The apparatus also includes first and second storage cells coupled to the bit line. The first storage cell has a first access transistor. The first access transistor is coupled to a first line resistance. The second storage cell has a second access transistor. The second access transistor is coupled to a second line resistance. The second line resistance is greater than the first line resistance. The apparatus also includes first and second drivers that are coupled to the bit line. The second driver is a stronger driver than the first driver. The apparatus also includes circuitry to select the first driver to write information into the first storage cell and select the second driver to write information into the second storage cell. |
| US09281041B1 |
Delay-based read system for a magnetoresistive random access memory (MRAM) bit
In one example, the disclosure is directed to a memory system comprising a control module. The memory system further includes a first circuit and a second circuit that each receives a control signal from the control module. Each circuit includes a resistor (MRAM element or a fixed resistor) and a capacitor situated between the resistor and a reference voltage. The first circuit is configured to output a data signal after the first capacitor is charged. The second circuit is configured to output a reference signal after the second capacitor is charged. The memory system further includes an arbiter configured to receive the data signal from the first circuit and the reference signal from the second circuit, determine whether the data signal arrived before the reference signal, and determine whether the MRAM is in a high or low state based on whether the data signal or the reference signal arrived first. |
| US09281040B2 |
Spin transfer torque magnetic memory device
A spin transfer torque magnetic memory device is disclosed. In one aspect, the spin transfer torque magnetic memory device comprises a first layered structure stacked in a vertical direction and comprising alternating topological insulator layers and insulator layers. The memory device additionally includes a second layered structure stacked in the vertical direction and comprising alternating topological insulator layers and insulator layers. The memory device further includes a magnetic material interposing the first and second layered structures in a horizontal direction different from the vertical direction such that the magnetic material is in contact with a first side surface of the first layered structure and in contact with a first side surface of the second layered structure. Additionally, the magnetic material is configured to have a magnetization direction that can change in response to a current flowing through the magnetic material. |
| US09281039B2 |
System and method to provide a reference cell using magnetic tunnel junction cells
An apparatus includes a group of data cells and a reference cell coupled to the group of data cells. The reference cell includes four magnetic tunnel junction (MTJ) cells. |
| US09281036B2 |
Memory device having an adaptable number of open rows
A memory device comprises a memory array, at least one row address buffer, a set of row data buffers, a row decoder, an array of sense amplifiers, and a demultiplexer. The memory array comprises data elements organized into rows and columns. Each of the rows is addressable by a row address. Each of the data elements in each of the rows is addressable by a column address. The at least one row address buffer holds a selected row address of a set of successive selected row addresses. The set of row data buffers holds respective contents of selected rows that correspond to the set of successive selected row addresses. The row decoder decodes the selected row address to access a selected row. The array of sense amplifier reads the selected row and transmits content of the selected row to one of the row data buffers through the demultiplexer, and writes the content of the selected row back to the selected row. |
| US09281032B2 |
Memory timing circuit
A memory circuit including a memory cell configured to provide a charge, voltage, or current to an associated bit-line; a sense amplifier configured to sense the charge, voltage, or current on the bit-line; a word-line circuit configured to control a word-line of the memory cell; and a tracking circuit configured to track one or more conditions of the memory circuit and provide a timing control signal at an output operative to adaptively control the word-line circuit. |
| US09281030B2 |
Controlling timing of negative charge injection to generate reliable negative bitline voltage
Embodiments relate to preventing or mitigating excessive drop in the negative voltage level of a bitline of memory bitcells by controlling the delay of a trigger signal for initiating injection of negative charge into the bitline. A write assist circuit causes negative charge to drop gradually in response to receiving a data input indicating a negative value of the bitline. When supply voltage is high, the timed delay of trigger signal is reduced, thereby causing negative charge to be injected into the bitline while bitline voltage remains at a higher voltage level and before the bitline voltage drops close to ground voltage. Since the negative charge is injected while the bitline voltage level is relatively high, the bitline is prevented from being pulled down to an excessively negative voltage level even when the supply voltage is relatively high. |
| US09281026B2 |
Parallel processing computer systems with reduced power consumption and methods for providing the same
A parallel processing computing system includes an ordered set of m memory banks and a processor core. The ordered set of m memory banks includes a first and a last memory bank, wherein m is an integer greater than 1. The processor core implements n virtual processors, a pipeline having p ordered stages, including a memory operation stage, and a virtual processor selector function. |
| US09281024B2 |
Write/read priority blocking scheme using parallel static address decode path
A write block read apparatus for a memory device includes a dynamic read address decoder that receives static read address bits as inputs thereto and having an output used to implement a read operation of a memory location corresponding to the read address bits; a dynamic write address decoder that receives static write address bits as inputs thereto and having an output used to implement a write operation of a memory location corresponding to the write address bits; and a static write address decoder, configured in parallel with the dynamic write address decoder, the static write address decoder configured to receive a portion of the static write address bits as inputs thereto, and wherein the static write address decoder is coupled to the dynamic read address decoder so as to block the read operation upon an address conflict with the write operation. |
| US09281023B2 |
Single ended sensing circuits for signal lines
Disclosed are single-ended sensing circuits. Each of the sensing circuits comprises at least a sense amplifier connected to a sense node, an isolation field effect transistor (FET) connected in series between the sense node and a signal line node, and a pre-charged device connected to the sense node. In order to achieve a relatively fast pre-charge of both the sense and signal line nodes and to also achieve a relatively fast and accurate sense of the sense node, the single-ended circuits further incorporate a variable reference voltage generator connected to the gate of the isolation FET for selectively applying different reference voltages to the gate during pre-charging and sensing operations, respectively, and/or a second pre-charge device connected to the signal line node for facilitating pre-charging of that signal line node. |
| US09281022B2 |
Systems and methods for reducing standby power in floating body memory devices
Methods, devices, arrays and systems for reducing standby power for a floating body memory array. One method includes counting bits of data before data enters the array, wherein the counting includes counting at least one of: a total number of bits at state 1 and a total number of all bits; a total number of bits at state 0 and the total number of all bits; or the total number of bits at state 1 and the total number of bits at state 0. This method further includes detecting whether the total number of bits at state 1 is greater than the total number of bits at state 0; setting an inversion bit when the total number of bits at state 1 is greater than the total number of bits at state 0; and inverting contents of all the bits of data before writing the bits of data to the memory array when the inversion bit has been set. |
| US09281016B2 |
3D stacked semiconductor memory devices with sense amplifier electrically connected to a selecting circuit
According to an embodiment, a semiconductor memory device comprises: a semiconductor substrate; a memory cell array configured having a plurality of memory units, each of the memory units including a plurality of memory cells connected in series, the plurality of memory cells being stacked, the plurality of memory units involving a first memory unit and a second memory unit; and a plurality of bit lines connected to ends of each of the memory units in the memory cell array. The first memory unit and the second memory unit are arranged in a staggered manner by the first memory unit being displaced in a row direction with respect to the second memory unit by an amount less than an arrangement pitch in a row direction of the first memory unit or the second memory unit. |
| US09281015B1 |
Storage media conversion device and server using the same
A storage media conversion device includes a mounting bracket (100) and a holder (200). The mounting bracket (100) includes a first baseplate (110) and two corresponding side plates (120) extending perpendicularly from the first baseplate (110). The first baseplate (110) and the two side plates (120) enclose a first loading space (130). Any of the side plates (120) includes a first resilient positioning portion (150) for positioning a first size hard disk (A). A holder (200) includes a pivot shaft (210) pivotally connected to one side of the first baseplate (110), a handle (220) rotatable with respect to the pivot shaft (210), and a contact portion (230) disposed close to the pivot shaft (210). The length from the handle (220) to the pivot shaft (210) is greater than the length from the contact portion (230) to the pivot shaft (210). |
| US09281014B2 |
Image processing apparatus and computer program
An image processing apparatus according to an embodiment includes: an interface configured to obtain management information that has been generated along with movie data generated; and a controller configured to generate, as a representative picture representing the movie data, image information including characters or an icon to be determined by reference to the management information. When selected by a user, the representative picture is presented on a display device in order to start playing back movie data represented by the representative picture. |
| US09281013B2 |
Systems and methods for transmission of media content
A method provide a selection option to the at least one portable device, the selection option relating to selection of the first audio content and retrieving a selection from the at least one portable device based on the selection option. The method further retrieves a selection of the second audio content and synchronizing the first audio content, the second audio content, and the video content by embedding a synchronizing signal in the first audio content, the second audio content, and the video content. The method further outputs the second audio content and the video content to an output device according to the synchronizing signal. Responsive to the selection of the first audio content, the first audio content with the embedded synchronizing signal is transmitted to the least one portable device, wherein the at least one portable device outputs the first audio content according to the synchronizing signal. |
| US09281010B2 |
Timeline-based content control method and apparatus using dynamic distortion of timeline bar, and method and apparatus for controlling video and audio clips using the same
A method and apparatus for controlling content based on a timeline in a timeline-based content control apparatus with a touch screen. The method includes generating and displaying a linear timeline bar on the touch screen regardless of the size of content; detecting contact on the timeline bar; nonlinearly distorting a predetermined section of the timeline bar being displayed around the touch-detected position on the timeline bar; and performing a fine search and shifting the distorted section depending on a direction of the user's touch. |
| US09281009B1 |
Data storage device employing variable size interleave written track segments
A data storage device is disclosed comprising a head actuated over a disk comprising a plurality of data tracks. Data is encoded into a first number of codewords, and the first number of codewords are interleave written to a first segment of a first data track. Data is encoded into a second number of codewords, and the second number of codewords are interleave written to a second segment of the first data track. The first number of codewords is different than the second number of codewords, and a size of the first segment is different than a size of the second segment. |
| US09281007B2 |
Read channel sampling utilizing two quantization modules for increased sample bit width
A communication channel structure and a decoding method supported by such a communication channel structure are disclosed. Such a communication channel includes a digital filter configured for filtering an input signal and two quantizer configured for quantizing the filtered signal. A first quantizer is utilized to quantize the filtered signal to produce a first quantized sample having a first precision and a second quantizer is utilized to quantize the filtered signal to produce a second quantized sample having a second precision, wherein the second precision is different from the first precision. The communication channel also includes an iterative decoder configured for utilizing the first quantized sample for a first global iteration of a decoding process and utilizing the second quantized sample for at least one subsequent global iteration of the decoding process. |
| US09281003B2 |
Devices including near field transducer and adhesion layers
A device including a near field transducer (NFT); a write pole; at least one dielectric material positioned between the NFT and the write pole; and an adhesion layer positioned between the NFT and the at least one dielectric material. |
| US09280998B1 |
Acidic post-sputter wash for magnetic recording media
A recording medium having an outer surface relatively free of magnetic particulates is achievable by, after forming a magnetic recording layer with which magnetic contamination is associated, removing magnetic contamination from the medium by immersing the medium in an acidic water solution. For example, a post-sputter wash process utilizing a mildly acidic water solution having a pH less than around 5 may remove cobalt particle contaminants from the surface of the medium. The water solution may be acidized by introducing into deionized water a pre-diluted strong acid such as nitric acid or a weak acid such as carbonic acid. |
| US09280995B2 |
Locking a disk-locked clock using timestamps of successive servo address marks in a spiral servo track
Described embodiments provide a magnetic mass storage device with a system clock phase-locked to servo address marks on the magnetic disk. A head sequentially reads multiple adjacent servo address marks in a spiral track of servo address marks. When a servo address mark detector detects a mark, the count value of a counter driven by the system clock is sampled and held by a latch. A system clock synthesizer calculates differences in value between successively sampled count values from the latch, averages the differences in value to create an average difference value, and normalizes a difference between the average difference value and a target value to create a phase error value. The phase of the system clock is updated using the phase error value. |
| US09280994B1 |
Thermally assisted magnetic recording head with optical spot-size converter attached two dimensional thin waveguide
One embodiment generally relates to a magnetic recording head. The magnetic recording head has a body having an upper surface and a media bearing surface, a spot size converter disposed in the body and extending from the upper surface to the media bearing surface. The spot size converter has a core, comprising a first portion having a rectangular wall extending below the upper surface; and a second portion having a trapezoidal wall extending below the first portion. The magnetic recording head additionally has a first cladding adjacent to the spot size converter in an in-surface direction of the spot size converter, wherein the first cladding has a first refractive index lower than a refractive index of the spot size converter. |
| US09280990B1 |
Method for fabricating a magnetic writer using multiple etches
A method and system provide a magnetic transducer having an air-bearing surface (ABS) location. The method includes forming a trench in the intermediate layer using a plurality of etches. A first etch substantially provides a first portion of the trench having a first sidewall angle. The second etch substantially provides a second portion of the trench having a second sidewall angle. The second sidewall angle is greater than the first sidewall angle. The second portion of the trench includes the ABS location. The method also includes providing a main pole in the trench. The main pole has a plurality of sidewalls. The sidewalls having the first sidewall angle in the first portion of the trench and the second sidewall angle in the second portion of the trench. |
| US09280986B2 |
Acoustic signal processing device and acoustic signal processing method
Provided is an acoustic signal processing device for producing an output sound meeting listener's preferences by adjusting attack sound, reverberation, and noise component. The device includes: an FFT section for transforming an input audio signal from a time-domain to a frequency-domain to calculate a frequency spectrum signal and for generating a first amplitude spectrum signal and a phase spectrum signal; an attack component controller (10) for controlling an attack component of the first amplitude spectrum signal to generate a second amplitude spectrum signal; a reverberation component controller (20) for controlling a reverberation component of the first amplitude spectrum signal to generate a third amplitude spectrum signal; a first adding section (40) for synthesizing the first amplitude spectrum signal, the second amplitude spectrum signal, and the third amplitude spectrum signal to generate a fourth amplitude spectrum signal; and an IFFT section for generating an audio signal transformed from a frequency domain to a time domain based on the fourth amplitude spectrum signal and the phase spectrum signal generated by the FFT section. |
| US09280985B2 |
Noise suppression apparatus and control method thereof
A noise suppression apparatus selectively uses an adaptive beamformer and fixed beamformer for each frequency. A direction of a null of the fixed beamformer is determined from a direction of a null automatically formed by the adaptive beamformer. Filter coefficients of the adaptive beamformer based on an output power minimization rule are calculated by a minimum norm method using a norm of the filter coefficients as a constraint. The above selection is made based on, for example, a depth of a null automatically formed by the adaptive beamformer in the selection. |
| US09280984B2 |
Noise cancellation method
An embodiment of the invention provides a noise cancellation method for an electronic device. The method comprises: receiving an audio signal; applying a Fast Fourier Transform operation on the audio signal to generate a sound spectrum; acquiring a first spectrum corresponding to a noise and a second spectrum corresponding to a human voice signal from the sound spectrum; estimating a center frequency according to the first spectrum and the second spectrum; and applying a high pass filtering operation to the sound spectrum according to the center frequency. |
| US09280983B2 |
Acoustic echo cancellation (AEC) for a close-coupled speaker and microphone system
Embodiments are directed towards providing acoustic echo cancellation in a closely-coupled microphone/speaker system. A speaker may produce an audible signal from a reference signal, which may be captured with a microphone. Full band cancellation (FBC) may modify the captured signal to suppress an echo of the reference signal caused by a direct acoustic path between the microphone and speaker. FBC may include a fixed filter and an adaptive filter. The fixed filter may modify the captured signal based on the reference signal. The adaptive filter may automatically adapt based on the captured signal and the reference signal. If a comparison of a performance of the adaptive filter and the fixed filter is above a threshold, then the fixed filter may be updated based on the adaptive filter. Subband acoustic echo cancellation may generate an output signal that suppresses residual echoes of the reference signal based on the modified signal. |
| US09280981B2 |
Method and apparatus for voice control of a mobile device
A method and apparatus for voice control of a mobile device are provided. The method establishes a connection between the mobile device and a voice-control module. Responsive to establishing the connection, the mobile device enters into an intermediate mode; and the voice-control module monitors for verbal input comprising a verbal command from among a set of predetermined verbal commands. The voice-control module sends instructions to the mobile device related to the verbal command received; and the mobile device acts on the received instructions. An apparatus/voice control module (VCM) for voice control of a mobile device, wherein the VCM includes a connection module configured for establishing a connection between the VCM and the mobile device; a monitoring module configured for monitoring for a verbal command from among a set of predetermined verbal commands; and a communications module configured for sending instructions to the mobile device related to the verbal command received. |
| US09280980B2 |
Efficient encoding/decoding of audio signals
A method for encoding of an audio signal comprises performing (214) of a transform of the audio signal. An energy offset is selected (216) for each of the first subbands. An energy measure of a first reference band within a low band of an encoding of a synthesis signal is obtained (212). The first high band is encoded (220) by providing quantization indices representing a respective scalar quantization of a spectrum envelope in the first subbands of the first high band relative to the energy measure of the first reference band by use of the selected energy offset. An encoder apparatus comprises means for carrying out the steps of the method. Corresponding decoder methods and apparatuses are also described. |
| US09280978B2 |
Packet loss concealment for bandwidth extension of speech signals
Disclosed is a speech receiving apparatus. A low-band PLC module and a synthesis filter reconstructs a low-band speech signal of a lost frame from a previous good frame. A high-band PLC module reconstructs a high-band speech signal of the lost frame from the previous good frame. A transforming part transforms the low-band speech signal into a frequency range. A bandwidth extending part generates at least an extended MDCT coefficient as information for the high-band speech signal from the low-band speech signal transformed by the transforming part. A smoothing part smoothes the extended MDCT coefficient. An inverse transforming part inversely transforms the extended MDCT coefficient smoothed by the smoothing part to a time domain. A synthesizing part synthesizes the low-band speech signal, and the high-band speech signal which is inverse-transformed by the inverse transforming part and reconstructed, to output a wideband speech signal. |
| US09280976B2 |
Audio signal encoder
An apparatus comprising: a coding rate determiner configured to determine a first coding bitrate for at least one first frame audio signal multi-channel parameter and a second coding bitrate for at least one second frame audio signal multi-channel parameter, wherein the combined first and second coding bitrate is less than a bitrate limit; a channel analyser configured to determine for a first frame the at least one first frame audio signal multi-channel parameter and configured to determine for a second frame the at least one second frame audio signal multi-channel parameter; a multi-channel parameter determiner configured to generate an encoded first frame audio signal multi-channel parameter within the first coding bitrate from the at least one first frame audio signal multi-channel parameter and configured to generate an encoded at least one second frame audio signal parameter within the second coding bitrate from the at least one second frame audio signal multi-channel parameter; and a multiplexer configured to combine the encoded at least one first frame audio signal multi-channel parameter and the encoded at least one second frame audio signal multi-channel parameter. |
| US09280972B2 |
Speech to text conversion
Embodiments that relate to converting audio inputs from an environment into text are disclosed. For example, in one disclosed embodiment a speech conversion program receives audio inputs from a microphone array of a head-mounted display device. Image data is captured from the environment, and one or more possible faces are detected from image data. Eye-tracking data is used to determine a target face on which a user is focused. A beamforming technique is applied to at least a portion of the audio inputs to identify target audio inputs that are associated with the target face. The target audio inputs are converted into text that is displayed via a transparent display of the head-mounted display device. |
| US09280971B2 |
Mobile wireless communications device with speech to text conversion and related methods
A mobile wireless communications device may include a housing and a wireless transceiver carried by the housing. The mobile wireless communications device may also include audio transducer carried by the housing, and a controller cooperating with the wireless transceiver to perform at least one wireless communications function. The controller may also cooperate with the at least one audio transducer to convert speech input through the audio transducer to converted text, determine a proposed modification for the converted text, and output from the audio output transducer the proposed modification for the converted text. |
| US09280970B1 |
Lattice semantic parsing
A language processing system uses a lattice parser that semantically parses a command input represented by a lattice. The parser receives a hypotheses space of outputs as encoded in a lattice. Annotations of the input are projected back into the lattice and then lattice parsing is performed to rectify with the annotations. Parsing rules are applied to path fragments in the lattice. The rules that successfully parse from the start node to the end node of the lattice are used to determine whether the command input sentence invokes a specific action, and if so, what arguments are to be passed to the invocation of the action. |
| US09280968B2 |
System and method of using neural transforms of robust audio features for speech processing
A system and method for processing speech includes receiving a first information stream associated with speech, the first information stream comprising micro-modulation features and receiving a second information stream associated with the speech, the second information stream comprising features. The method includes combining, via a non-linear multilayer perceptron, the first information stream and the second information stream to yield a third information stream. The system performs automatic speech recognition on the third information stream. The third information stream can also be used for training HMMs. |
| US09280967B2 |
Apparatus and method for estimating utterance style of each sentence in documents, and non-transitory computer readable medium thereof
According to one embodiment, an apparatus for supporting reading of a document includes a model storage unit, a document acquisition unit, a feature information extraction, and an utterance style estimation unit. The model storage unit is configured to store a model which has trained a correspondence relationship between first feature information and an utterance style. The first feature information is extracted from a plurality of sentences in a training document. The document acquisition unit is configured to acquire a document to be read. The feature information extraction unit is configured to extract second feature information from each sentence in the document to be read. The utterance style estimation unit is configured to compare the second feature information of a plurality of sentences in the document to be read with the model, and to estimate an utterance style of the each sentence of the document to be read. |
| US09280964B2 |
Device and method for processing signals associated with sound
A method and device may color or modify the tone or sound quality of audio input signals. A processor such as a DSP, may apply two or more filters to the audio input signal, each filter comprising a set of filter coefficients. The processor may combine finite impulse response (FIR) filters of the two or more filters into a power-saving filter. A speaker or sound emitter may emitting an output audio signal from the filtered audio input signal. The output audio signal has a different tone quality than that of the input audio signal. |
| US09280963B1 |
Pad generating rhythmic sound waves
A pad for generating rhythmic sound waves according to an embodiment of the present disclosure comprises: at least two first patterns configured to generate a first sound wave in response to friction; and at least two second patterns configured to generate a second sound wave in response to the friction, wherein each of the first patterns is spaced and positioned in a constant distance, the at least two second patterns are positioned between the spaced first patterns, and for each of specific directions between the spaced first patterns, the first patterns and the second patterns are spaced and positioned in a different distance. |
| US09280962B1 |
Sound preview device and program
Provided is a sound preview device including, in an electronic musical instrument which includes a keyboard 2 and an operation button 1 to perform tone selection or a sound setting and in which tone selection or a sound setting corresponding to a key is performed in advance by pressing the operation button 1 while pressing one of the keys in the keyboard 2, a changed state recognizing unit 3 that recognizes from a pressed key a changed state of tone selection or a sound setting determined corresponding to the key in advance, a phrase storing unit 4 in which phrases of sounds by which an influence of the changed state is easily known are stored in plural numbers according to the changed state, and a sound emitting unit 5 that emits a phrase corresponding to the changed state. |
| US09280961B2 |
Audio signal analysis for downbeats
Apparatus for audio processing comprises: a beat tracking module for identifying beat time instants in an audio signal and a downbeat identifier for identifying downbeats occurring at beat time instants, each downbeat corresponding to the start of a musical bar or measure. A pattern identifier identifies two or more adjacent bars or measures containing musical characteristics which repeat within the audio signal, the pattern identifier being configured to: generate for each downbeat a plurality of scores using respective analysis methods for indicating different characteristics within the audio signal at the downbeat; combine the scores for each downbeat; and identify based on the combined scores non-adjacent downbeats that correspond to the start of a musical pattern. |
| US09280959B2 |
Practice pad for percussion instrument
The present invention is directed to an apparatus providing a removable playing surface to a percussion instrument. The apparatus includes a mount assembly for fixing the apparatus to the percussion instrument and a paddle providing a playing surface. The paddle can movable between a playing position over the head of the percussion instrument and in a non-playing position away from the head of the percussion instrument. |
| US09280958B2 |
Adaptor for drum
An adaptor for coupling to a drum having a drum head, shell, and rim, the rim having an outer diameter and configured to interface with a ring coupled to the drum head to hold the drum head in place on the shell, includes a monolithic body having a clip portion and an interface, the clip portion configured to extend around an outer section of the rim between a top surface of the drum head and a bottom portion of the rim, the clip portion having a clip end and the ring having an outer diameter, wherein the clip end is configured to extend to a position that is inward of the outer diameter of the ring when the clip portion is coupled to the drum; and wherein a substantial portion of the interface is configured to extend radially from the rim when the clip portion is coupled to the drum. |
| US09280955B2 |
Automatic waveform linking in an electrophoretic display controller
In a linked waveform update mode, an impulse-driven, particle-based electrophoretic display may be updated using a first waveform and then automatically up-dated using a second drive scheme when the update using the first waveform finishes. The display may be automatically up-dated using a third drive scheme when the update using the second drive scheme finishes. The automatic updating using a subsequent drive scheme may be interrupted if the desired display states for the region changes after performing the first update. Waveforms may be selected using: (a) the desired display state of a pixel if the desired display state is a valid display state for the specified drive scheme, or (b) a mapped display state of the pixel if the desired display state is an invalid display state for the drive scheme. |
| US09280952B2 |
Selective display of OCR'ed text and corresponding images from publications on a client device
Text is extracted from a source image of a publication using an Optical Character Recognition (OCR) process. A document is generated containing text segments of the extracted text. The document includes a control module that responds to user interactions with the displayed document. Responsive to a user selection of a displayed text segment, a corresponding image segment from the source image containing the text is retrieved and rendered in place of the selected text segment. The user can select again to toggle the display back to the text segment. Each text segment can be tagged with a garbage score indicating its quality. If the garbage score of a text segment exceeds a threshold value, the corresponding image segment can be automatically displayed instead. |
| US09280950B2 |
Display device, method for driving display device, and electronic apparatus
A display device includes an illumination unit that delivers a first light, a second light and a third light. The display also includes a driving circuit that supplies a pixel with a first data signal for displaying a first image by illuminating the first light, the driving circuit supplying the pixel with a second data signal for displaying a second image by illuminating the second light, the driving circuit supplying the pixel with a third data signal for displaying a third image by illuminating the third light. |
| US09280945B2 |
Liquid crystal display device and method of driving the same
An LCD device is disclosed which includes: a liquid crystal display panel in which there are a plurality of gate lines and a plurality of data lines; a data driver configured to apply data voltages to the data lines; a gate driver configured to apply gate pulses to the gate lines; and a charge share device configured to selectively perform a charge share operation by storing charges corresponding to a data voltage applied to one of the data lines during a first interval and providing the stored charges to said one or another one of the data lines during a second interval based on a comparison of first video data corresponding to said one of the data lines in the first interval with second video data corresponding to said one or another one of the data lines in the second interval. |
| US09280941B2 |
Liquid crystal display device with direct type backlight and method of driving thereof
A direct type liquid crystal display device according to an embodiment of the present disclosure may enhance the brightness uniformity. |
| US09280940B2 |
Liquid crystal display device, four-color converter, and conversion method for converting RGB data to RGBW data
An LCD device includes a four-color converter for converting an original RGB data into three grayscale values, executing a white balance process to the three grayscale values, and confirming a maximum value MAX (Ri, Gi, Bi) and a minimum value of the three white-balanced grayscale values Ri, Gi, and Bi, wherein, when the minimum value is greater than 0, determining that if the three data of the original RGB data are equal, and when they are equal, utilizing a formula Wo=Bi; Ro=Ri×Wo/MAX(Ri, Gi, Bi)+Ri−Wo; Go=Gi×Wo/MAX(Ri, Gi, Bi)+Gi−Wo; Bo=0 to calculate the output grayscale values Ro, Go, Bo, and Wo in the RGBW data. The device also includes a data driver for processing the RGBW data provided by the four-color converter to generate analog type data signals, a scanning driver for sequentially generating scanning signals, and an LCD panel for displaying colors. |
| US09280938B2 |
Timed sequence mixed color display
In embodiments of mixed sequential color display, a light source sequentially generates different colors of light in a timed sequence. A display panel is implemented with multiple sub-pixel combinations, where each pixel of the display panel is a combination of sub-pixels that emit a color based on a color of the light that illuminates a sub-pixel combination. The emitted color from a sub-pixel combination is generated as a product of the color of the light and a combination of sub-pixel colors (to include clear and/or colored sub-pixels). The clear and/or different colored sub-pixels in a sub-pixel combination are a spatial aspect of the emitted color, and the sequentially generated different colors of light are a temporal aspect of the emitted color. The pixel combination and the light source together enhance the luminescence of the emitted color over the chrominescence of the emitted color. |
| US09280934B2 |
Electroluminescent display device with combined analog and digital driving
To reduce the number of sub-frames and perform high resolution display with low power consumption, each of the pixels has a digital emission period Td and an analog emission period Ta, and is driven in a time-divided fashion in a digital manner or in an analog manner. Each of the pixels performs high resolution display when being driven in an analog manner, and performs display with low power consumption when being driven in a digital manner. |
| US09280930B2 |
Back to back pre-charge scheme
A circuit for a flat panel display, capable of displaying images, is provided. The circuit includes an image storage block for storing the images to be displayed, a display and timing controller block controlling the display operation, an image pixel matrix containing a multitude of rows and columns arranged pixel elements. The circuit also includes one or more controlled row driver blocks, one or more controlled column driver blocks, and a pixel pre-charge mechanism for pre-charging the pixel elements employing a back to back pre-charge operation applied to a row and/or column drive activated pixel element display operation. The back to back pre-charge operation signifies that during every other operating sequence a pre-charge operation is replaced by an activated pixel element display operation. |
| US09280929B2 |
Display device and method for driving the same
Each pixel of a display device includes: an organic light emitting diode between a first and a second power supply; a first transistor to transmit a drive current based on data signals; a second transistor to couple a gate electrode of the first transistor to the data line in response to a scan signal; a first capacitor between the first power supply and the gate electrode of the first transistor; a light receiving element coupled to a third power supply; a second capacitor between the light receiving element and a fourth power supply; a third transistor between the data line and a first electrode of the second capacitor, the third transistor including a gate electrode coupled to a selection signal line; and a fourth transistor between the fourth power supply and the third transistor, the fourth transistor including a gate electrode coupled to the first electrode of the second capacitor. |
| US09280924B2 |
Display device and method that divides one frame period into a plurality of subframe periods and that displays screens of different colors in accordance with the subframe periods
A display device that adopts a field sequential method and that is capable of achieving desired luminance while suppressing mixing of colors is provided. With respect to display of each color by a liquid crystal display device adopting a field sequential method, a period is provided for which light sources of each color remain turned on until a turning-off delay time has elapsed since an end timing of a subframe period. The turning-off delay time relating to LEDs for which an off state begins in a preceding subframe period is configured in such a way as to be shorter than a turning-on delay time relating to LEDs for which an on state begins in a succeeding subframe period. As a result, an all-off period, in which LEDs of all colors are in the off state, is provided between on periods of two colors. |
| US09280923B2 |
Display device operating in 2D and 3D display modes and method for driving the same
A display device includes a first scan line, a second scan line, a third scan line, a data line, a pixel, a low color-shifting circuit, and a black zone generation circuit. In the low color-shifting circuit, a low color-shifting switch receives a third scan signal from the third scan line to selectively couple a compensating capacitor to the second sub-pixel electrode. The black zone generation circuit receives a black zone generation signal to selectively couple either the first sub-pixel electrode or the second sub-pixel electrode to a common node such that either the first sub-pixel or the second sub-pixel becomes a black zone. |
| US09280915B1 |
Spinal injection trainer and methods therefor
For use in training needle techniques such as spinal anesthesia and or lumbar epidural steroid injections, a spinal model includes a complete natural bone vertebral column that is embedded in a matrix of crystal clear ballistic gel. The synthetic gel does not harbor bacteria, can be reused and does not require refrigeration. Natural bone offers significantly better image contrast over radiopaque replicas. A transparent synthetic gel matrix permits observation of needle progression by both the trainee and the trainer and provides unique opportunities for coaching and intercession to prevent poor needle placement prior to its occurrence. |
| US09280903B2 |
In-aircraft flight planning with datalink integration
In one embodiment an in-aircraft system that implements a flight planning module is provided. The flight planning module is configured to display on the display unit a pending flight plan and implement a first button associated with a display of the pending flight plan. The first button, if selected, directs the one or more processing units to convert the pending flight plan to a format for sending in a datalink message, and to cause the pending flight plan to be sent to a ground station in a downlink datalink message without human input to a message applications module, the message applications module including instructions to display information corresponding to datalink messages on a display unit and to maintain a message log of datalink messages. |
| US09280893B2 |
Communication systems and methods to broadcast audio or control to a remotely located device
This disclosure enables a respective user to show support to a person of interest. One configuration includes a network (e.g., phone network, Internet, etc.) configured to receive input from a respective user (e.g., family member, friend, etc.) and control a remotely located device. The remote device can be located at any suitable locations such as a gravesite of a deceased party, a hospital room in which a disabled patient resides, etc. Via input from a respective user, the respective user can control different functions of a remote target device such as audibly communicate one or more messages in a vicinity of the gravesite, control a remote device such as light source (such as a candle, light emitting diode, etc.), etc. |
| US09280889B2 |
Alert network and method for transmitting and propagating alerts
An alert network is described. The alert network has a plurality of individual monitoring systems, a plurality of user terminals respectively associated with the individual monitoring systems, alert transmitters in the monitoring systems, for transmitting primary alerts to selected user terminals and/or to other monitoring systems in accordance with parameterized transmission rules, alert receivers in said terminals, and alert propagators in the terminals, capable of selectively propagating received primary alerts to other terminals and or to other monitoring systems as secondary alerts, in accordance with parameterized propagation rules. A method for transmitting and propagating alerts according to corresponding parameters in such a network is also described. |
| US09280886B2 |
Circuit monitoring device
The circuit monitoring device is disclosed. The device is for monitoring circuit resistance. At configurable thresholds digital flags are triggered, the device can be used as a Security/Building management system. The device uses open technology is fully scaleable and allows programmable logic controllers to be used as security management systems. Using a soft logic option a PC could take the place of the PLC. |
| US09280884B1 |
Environmental sensor device with alarms
An environmental sensor device with alarms comprises a data bus, a multitude of sensors, at least one processing unit, a communications interface, and memory. The multitude of sensors may include particle counter(s), pressure sensor(s) and/or the like. The memory is configured to hold data and machine executable instructions. The machine executable instructions are configured to cause at least one processing unit to: collect sensor data from at least one of the multitude of sensors, generate processed sensor data from the sensor data, and set alarm(s) based, at least in part on processed sensor data. The communications interface is configured to communicate the report to at least one external device. |
| US09280883B2 |
Method and apparatus for visually and audibly indicating the setup and maintenance of a system
Example embodiments of the present invention relate to a method and apparatus for visually and audibly indicating the setup and maintenance of a system. |
| US09280880B1 |
Method and system for generating alternative identification payment cards
A method for generating alternative identification payment cards includes: storing, in a database, a plurality of payment account numbers, wherein each payment account number is associated with a payment account; generating, by a processing device, an alternative identification number for each payment account number of the plurality of payment account numbers, wherein the alternative identification number includes at least a program identifier, a unique identifier, and a check value; generating, by the processing device, a data file including each payment account number of the plurality of payment account numbers and the generated alternative identification number for each respective payment account number; and transmitting, by a transmitting device, the generated data file for printing a plurality of payment cards. |
| US09280878B2 |
Reel band, reel assembly, and gaming machine
In a reel band, the transmittance of the light emitted from a backlight is adjusted without using a sheet for decreasing the transmittance, and the reel band is decorated without resort to printing. A reel band M32 includes: a translucent base layer M320; a symbol print layer M322 laminated on an outer side of the base layer M320 with respect to a direction of a thickness of the base layer M320 to form a plurality of symbols 501; and a mesh pattern layer M321 having rough texture and laminated on a portion of the base layer which portion is different from portions on which at least the plurality of symbols 501 are formed when viewed from a direction in which the layer is laminated, the mesh pattern layer M321 including a shield area M3211 configured to attenuate applied light and a non-laminated area M3212 configured to pass applied light. |
| US09280877B2 |
Method of gaming, a game controller and a gaming system
A method of gaming comprising: awarding a plurality of game rounds in response to occurrence of a trigger event; and conducting at least two of the plurality of game rounds concurrently in separate display areas. |
| US09280875B2 |
Virtual playing chips in a multiuser online game network
In various embodiments, virtual currency is used within a multiplayer online game in a restricted manner. |
| US09280874B2 |
Gaming system and method employing a player-selected feature for a play of a game or using the player-selected feature to modify another feature for a subsequent play of the game
Various embodiments of the present disclosure are directed to a gaming system and method providing a game employing a player-selected one of a plurality of different features. In one embodiment, the gaming system is configured to operate a game associated with a set of a plurality of different features, and enables a player to select one of the features for a play of the game. In certain instances, the gaming system provides the play of the game in accordance with the selected feature. In other instances, the gaming system provides the play of the game without the selected feature, and uses the selected feature to modify one of the other, non-selected features that has a designated relationship with the selected feature. The gaming system subsequently enables the player to select the modified feature for a subsequent play of the game. |
| US09280872B2 |
Progressive jackpot alerts in a gaming system
Various embodiments are directed to a gaming system capable of providing progressive level alerts or promotions when a progressive jackpot reaches a predetermined value. In one embodiment, the user is able to register for a progressive level alert. In another embodiment, the progressive level alert is presented on an affiliated or third party website. By providing progressive jackpot amount information, the user, who may not otherwise patronize a casino, is encouraged to visit the particular casino offering games capable of awarding a progressive jackpot prize of a predetermined amount. |
| US09280871B2 |
Gaming systems with authentication token support
Techniques for providing authentication functionality in a gaming system are disclosed. In one aspect, a gaming system is configured such that, at a given point during a current session of a game in progress that involves at least one user previously granted access by the system to participate in the current session, information available from an authentication token associated with the user is obtained prior to allowing the user to take a particular action in the game. A determination is made as to whether or not the user will be allowed to take the particular action in the game, based on the obtained information. The obtained information may comprise, for example, at least a portion of a one-time password generated by a hardware or software authentication token. |
| US09280866B2 |
System and method for analyzing and predicting casino key play indicators
A gaming system and method is set forth which provides for the predictive analysis of gaming machine performance. In one embodiment, a user may obtain useful predictions of gaming asset performance and may determine assets which should be replaced by using Microsoft® Analysis Services as a component of a predictive. |
| US09280865B2 |
Identifying defects in a roulette wheel
Systems and methods for identifying defects in a roulette wheel are described. A first trajectory of a roulette ball may be determined after launch of the roulette ball by capturing movement of the roulette ball on the roulette wheel. The roulette wheel has a region where the roulette ball orbits and spins around before the roulette ball falls into a roulette number pocket. The determining step may be repeated to determine additional trajectories, and a plurality of areas that the roulette ball avoided during travel along the trajectories may be identified. A graphical representation of the plurality of avoided areas may be generated to identify regions of the roulette wheel that include defects. |
| US09280863B2 |
Automated dispensing system for pharmaceuticals and other medical items
A system for dispensing a plurality of customized doses of pharmaceuticals includes: a housing; a customer interaction station; a customized packaging station configured to selectively package individual doses of medication into customized packaging, the medications being selected responsive to input from the customer input station; and a controller connected to the customer interaction station and the customized packaging station, the controller configured to control the customized packaging based on customer input from the customer interaction station. |
| US09280861B2 |
Paper-sheet handling apparatus and paper-sheet handling method
A paper-sheet handling apparatus (10) includes: a recognition unit (14) configured to obtain recognition information of a paper sheet by recognizing the paper sheet, and to obtain an image of the paper sheet so as to obtain paper-sheet information from the acquired image of the paper sheet; a reject unit (18) to which a paper sheet, which is other than a paper sheet that has been recognized as a normal paper sheet by the recognition unit (14), is sent; and a control unit (30) configured to output display information about the paper-sheet information of each paper sheet sent to the reject unit (18). The display information output by the control unit (30) is displayed on a display unit (22) disposed on the paper-sheet handling apparatus (10), or transmitted to an external apparatus (40), which is other than the paper-sheet handling apparatus (10), through an interface unit (39) so as to be displayed on a display unit disposed on the external apparatus (40). |
| US09280859B2 |
Enhanced vehicle onboard diagnostic system and method
The invention includes methods and devices for an improved onboard vehicle diagnostic system. The methods and devices provide for more detailed information and presentation of diagnostic and vehicle performance data for a user. In one example, real time diagnostic and trip system performance data is gathered and displayed relative to time for improved understanding of vehicle performance and operation by a user. |
| US09280857B2 |
Dynamic uploading protocol
A dynamic uploading protocol comprises an input interface configured to receive a manifest comprising a plurality of events which may be uploaded; wherein the manifest additionally comprises sensor information relating to each of the plurality of events. The system for a dynamic uploading protocol additionally comprises a processor configured to determine whether to upload additional information about each event, wherein determining whether to upload additional information about each event is based at least in part on the sensor information and contextual information. The system for a dynamic uploading protocol additionally comprises an output interface configured to request the additional information. The system for a dynamic uploading protocol additionally comprises a memory coupled to the processor and configured to provide the processor with instructions. |
| US09280855B2 |
Remote recognition processing system and method
A computerized method for intelligently distributing computer processing of mail piece scan images across a plurality of mail piece scan image processors. The method can include receiving a mail piece scan image from a mail piece scan image job requestor and selecting one of a plurality of scan mail piece scan image processors to process said mail piece scan image. The mail piece scan image can be transmitted to said one of a plurality of plurality of mail piece scan image processors and a mail piece scan image processing result can be received from said one of a plurality of plurality of mail piece scan image processors. Post-processing operations can be performed based on said mail piece scan image processing result. The mail piece scan image processing result can be transmitted to said mail piece scan image processing requestor. |
| US09280853B2 |
Virtual and augmented reality
Technologies are generally described for systems, devices and methods effective to implement virtual and augmented reality. In an example, a first device may send data to a second device. The first device may include a processor and a memory. The processor may receive first image data based on a first real image from a third device. The first real image may include a fourth device image that relates to a fourth device. The processor may receive second image based on a second real image from the fourth device. The processor may send the first image data to the second device. The processor may receive a first request from the second device to receive the second image data. The processor may send a second request to the fourth device for the second image data, receive the second image data, and send the second image data to the second device. |
| US09280851B2 |
Augmented reality system for supplementing and blending data
A system, method, and computer program product for automatically combining computer-generated imagery with real-world imagery in a portable electronic device by retrieving, manipulating, and sharing relevant stored videos, preferably in real time. A video is captured with a hand-held device and stored. Metadata including the camera's physical location and orientation is appended to a data stream, along with user input. The server analyzes the data stream and further annotates the metadata, producing a searchable library of videos and metadata. Later, when a camera user generates a new data stream, the linked server analyzes it, identifies relevant material from the library, retrieves the material and tagged information, adjusts it for proper orientation, then renders and superimposes it onto the current camera view so the user views an augmented reality. |
| US09280850B2 |
Augmented reality system for communicating tagged video and data on a network
A system, method, and computer program product for automatically combining computer-generated imagery with real-world imagery in a portable electronic device by retrieving, manipulating, and sharing relevant stored videos, preferably in real time. A video is captured with a hand-held device and stored. Metadata including the camera's physical location and orientation is appended to a data stream, along with user input. The server analyzes the data stream and further annotates the metadata, producing a searchable library of videos and metadata. Later, when a camera user generates a new data stream, the linked server analyzes it, identifies relevant material from the library, retrieves the material and tagged information, adjusts it for proper orientation, then renders and superimposes it onto the current camera view so the user views an augmented reality. |
| US09280848B1 |
Rendering images with volumetric shadows using rectified height maps for independence in processing camera rays
Rendering a scene with participating media is done by generating a depth map from a camera viewpoint and a shadow map from a light source, converting the shadow map using epipolar rectification to form a rectified shadow map (or generating the rectified shadow map directly), generating an approximation to visibility terms in a scattering integral, then computing a 1D min-max mipmap or other acceleration data structure for rectified shadow map rows and traversing that mipmap/data structure to find lit segments to accumulate values for the scattering integral for specific camera rays, and generating rendered pixel values that take into account accumulated values for the scattering integral for the camera rays. The scattering near an epipole of the rectified shadow map might be done using brute force ray marching when the epipole is on or near the screen. The process can be implemented using a GPU for parallel operations. |
| US09280846B2 |
Method, apparatus, and computer-readable recording medium for depth warping based occlusion culling
A method for performing occlusion queries is disclosed. The method includes steps of: (a) a graphics processing unit (GPU) using a first depth buffer of a first frame to thereby predict a second depth buffer of a second frame; and (b) the GPU performing occlusion queries for the second frame by using the predicted second depth buffer, wherein the first frame is a frame predating the second frame. In accordance with the present invention, a configuration for classifying the objects into the occluders and the occludees is not required and the occlusion queries for the predicted second frame are acquired in advance at the last of the first frame or the first of the second frame. |
| US09280843B1 |
Hybrid images for maps combining low frequency map data and high frequency satellite image data
Hybrid images merge the benefits of map views and satellite images. A geographic information system includes a geographic information server and at least one database containing a plurality of map views and satellite images. A decomposition module of the geographic information server decomposes the map views and the satellite images into at least high frequency components and low frequency components. A map view and satellite image hybridization module blends the high frequency components from the map view and the high frequency components from the satellite image. Then, the hybridization module combines the low frequency components of the map view with the blended high frequency components from both the map view and the satellite image to form a hybrid image. The hybrid image can subsequently be stored in a database of the geographic information system and/or served to a client device via a network. |
| US09280840B2 |
Figure display device, figure display method and storage medium storing a figure display program
A figure display device, a figure display method and a storage medium having a figure display program are described. According to one implementation, a figure display device includes a figure display section; an assumed equation input section; and a figure assumed portion discrimination display control section. The figure display section displays a figure. The assumed equation input section is used to input an assumed equation of the figure according to user operation. The figure assumed portion discrimination display control section deforms a corresponding portion of the assumed equation in the figure to match a figure portion obtained by the assumed equation, and illustrates a content represented by the assumed equation in the figure displayed with discrimination. |
| US09280837B2 |
Angiographic image acquisition system and method with automatic shutter adaptation for yielding a reduced field of view covering a segmented target structure or lesion for decreasing X-radiation dose in minimally invasive X-ray-guided interventions
The present invention refers to an angiographic image acquisition system and method which can beneficially be used in the scope of minimally invasive image-guided interventions. In particular, the present invention relates to a system and method for graphically visualizing a pre-interventionally virtual 3D representation of a patient's coronary artery tree's vessel segments in a region of interest of a patient's cardiovascular system to be three-dimensionally reconstructed. Optionally, this 3D representation can then be fused with an intraoperatively acquired fluoroscopic 2D live image of an interventional tool. According to the present invention, said method comprises the steps of subjecting the image data set of the 3D representation associated with the precalculated optimal viewing angle to a 3D segmentation algorithm (S4) in order to find the contours of a target structure or lesion to be examined and interventionally treated within a region of interest and automatically adjusting (S5) a collimator wedge position and/or aperture of a shutter mechanism used for collimating an X-ray beam emitted by an X-ray source of a C-arm-based 3D rotational angiography device or rotational gantry-based CT imaging system to which the patient is exposed during an image-guided radiographic examination procedure based on data obtained as a result of said segmentation which indicate the contour and size of said target structure or lesion. The aim is to reduce the region of interest to a field of view that covers said target structure or lesion together with a user-definable portion of the surrounding vasculature. |
| US09280835B2 |
Method for coding and an apparatus based on a DC prediction value
The disclosure relates to encoding and decoding image information. The encoding comprises receiving a block of pixels; determining a set of potential reference samples for the block of pixels; selecting a subset of the set of potential reference samples to be used as reference samples for the block of pixels; and using the selected reference samples to determine a DC prediction value for the block of pixels. A prediction error is determined for a pixel in the block of pixels on the basis of the DC prediction value. The decoding comprises receiving an encoded block of pixels; determining reference samples for the encoded block of pixels; and using the determined reference samples to define a DC prediction value for the block of pixels. A prediction error is received for a pixel of the encoded block of pixels. The pixel value is reconstructed on the basis of the DC prediction value. |
| US09280830B2 |
Image processing apparatus and segmentation method
An image processing apparatus for extracting an area of a detection target from an image includes an image input section that acquires an image, an image generation section that generates a plurality of images with different resolutions from the image, and a segmentation section that performs segmentation using the plurality of images with the different resolutions. The segmentation section segments an image with a low resolution and then segmenting an image with a high resolution using, as a processing target area, an area in the image with the high resolution corresponding to an area near a boundary resulting from processing of the segmentation of the image with the low resolution. |
| US09280824B2 |
Vehicle-surroundings monitoring device
A camera-orientation estimation unit estimates the amount of change in camera orientation on the basis of vehicle speed changes obtained from a vehicle-information acquirer. A distance-information update decision unit decides, on the basis of the amount of change in camera orientation, whether to update distance information by computing new distance information in a distance-computation unit or to update distance information using distance information stored in a distance-information memory unit. If the distance-information update decision unit has decided to update distance information by computing new distance information, a display device displays distance information that the distance-computation unit computes from a real-time image. If the distance-information update decision unit has decided to update using past stored distance information, the display device displays past distance information read from the distance-information memory unit. |
| US09280821B1 |
3-D reconstruction and registration
Generating three-dimensional information can include obtaining multiple different images of an object taken by camera(s), each image having a near-planar surface depiction of the object; registering the images in two-dimensions by identifying one or more features of each image and generating a two-dimensional representation of each feature; selecting first and second images from the registered images; generating one or more correspondences between one or more features of the first and second images; estimating a camera parameter set for each of the first and second images within respective ones of the identified features; reconstructing a three-dimensional structure of the object in Euclidean space responsive to the one or more correspondences and the estimated camera parameter sets; refining the estimated camera parameter sets using the three-dimensional structure; and refining the three-dimensional structure using the refined camera parameter sets. Camera parameter sets can include a rotation matrix, translation vector, and focal length. |
| US09280816B2 |
Adaptation of a 3D-surface model to boundaries of an anatomical structure in a 3D-image data set
The invention relates to the adaptation of a 3D-surface model to boundaries of an anatomical structure, especially the right ventricle. A first viewing plane is defined corresponding to a default view, especially a four chamber view. A long axis is defined. Then a second, third and optionally a fourth viewing plane are represented intersecting the axis in predefined distances from the starting point and end point thereof. On the viewing planes different markers are represented, controlled and, if required, the position thereof is adapted, especially the position of the intersection points of the axis with the second and third viewing planes, as well as the position of a characteristic line, which together with the end point of the axis spans a characteristic plane of the structure. The 3D-surface model is adapted to the structure by way of the long axis and the position of the characteristic plane. |
| US09280814B2 |
Charged particle beam apparatus that performs image classification assistance
The charged particle beam apparatus automatically judges the good or bad of an observation object on the basis of information obtained from an image of the observation object on a wafer; displays a judgment result on a screen; displays the observation object, extracted from the judgment result, that requires to be corrected on the basis of the good or bad of the observation object from a user; and corrects the judgment result to the extracted and displayed observation object on the basis of an instruction from the user. |
| US09280813B2 |
Blur measurement
An image is partitioned into a foreground area, a background area, and optionally a transitional area. The partitioning may be pre-defined, or it may be based on user inputs and configuration data. The partitioning may also be refined based on an initial partitioning. Blur measures are determined respectively for the partitioned areas. A blur measure for the whole image can then be determined from a weighted average of the blur measures for the partitioned areas. The blur measure for the image can be used in a video quality monitor. |
| US09280804B2 |
Rotation of an image based on image content to correct image orientation
In some implementations, a method rotates images based on image content to correct image orientation. In some implementations, a method includes obtaining one or more identifications of content depicted in an image and determining a current orientation of the content depicted in the image. The current orientation is determined based on the one or more identifications of the content. An amount of rotation for the image is determined that orients the content closer to a predetermined reference orientation than to the current orientation. The image is rotated by the determined amount. |
| US09280802B2 |
Method and apparatus for storing information of a picture
Disclosed are method and apparatus for storing information of a picture. The method includes presenting a picture file to be edited, which at least includes original picture data; editing the picture file with an interface engine; integrating rendering information of the edited picture file according to a preset picture file format; and storing the original picture data and the rendering information. According to the invention, the interface engine is improved, and thus may directly edit a picture in use, and integrate the rendering information of the edited picture file according to a preset picture format. Therefore, during development, it is not required to store rendering information of a picture into codes, so that no programmer is required to intervene in rendering and setting of the picture. An art-designer may directly operate on the interface engine to change rendering effects, meanwhile, final rendering effects may be observed without running a program. |
| US09280801B2 |
Method of searching for pixels in a matrix and circuit implementing the method
A pixel matrix is arranged in line of pixels. Each pixel is either in a first state or in a second state. The matrix mainly contains pixels in the second state. Each line of pixels is tested in order to determine whether it contains or not a pixel in a first state. The result from this test for each line is sent into a receiver. The lines including at least one pixel in the first state are more accurately analyzed in order to determine the position of this or these pixel in the line. |
| US09280794B2 |
Providing access to documents in an online document sharing community
Provided are computer program product, system, and method for providing access to documents in an online document sharing community in a network environment including a plurality of participant computers operated by participants in the online document sharing community and a storage system. Document content is processed to add search terms for the document and a document identifier to a search index accessible through a search engine over the network to participants not under an obligation of confidentiality to the owner with respect to the document. Access is provided to the content of the document to the participants in the online document sharing community. A determination is made of a publication time the document was included in the search index and made accessible to the participant computers operated by participants not under the obligation of confidentiality to the owner of the document content. |
| US09280789B2 |
Recommending native applications
In one implementation, a computer-implemented method includes accessing, by a computer system, information that describes use of one or more computer-based services by a particular user from one or more computing devices that are associated with the particular user; identifying one or more native applications that are associated with the one or more services, wherein the one or more native applications are configured to be installed and executed by one or more types of mobile computing devices; determining whether to recommend the one or more native applications based on the information and one or more threshold levels of use of the one or more computer-based services; and providing, based on the determining, a recommendation that is associated with the particular user and that identifies at least one of the one or more native applications. |
| US09280786B2 |
Product-based advertising
A method and a system that identify seller ads to potential buyers within a network-based commerce system are provided. The method and system may operate to receive a request including a product identification from a seller, and assign to the seller, based on a distance function and the product identification, a matching identification entry included in a set of identification entries. The request may also include financial metrics. The method and system may further include operations to identify one or more seller ads associated with the matching identification entry, as determined by a distance measured between the matching identification entry and at least one extracted identification entry extracted from a selected content page and included in the set of identification entries. The identification of the one or more seller ads may also be determined by a relevance function based on the financial metrics. |
| US09280783B2 |
System and method for providing customized on-line shopping and/or manufacturing
A system and method for providing a customized on-line shopping interface and/or manufacturing is disclosed. The system uses customer's computer, location, URL, IP address, email domain, embedded promotion code, or other predetermined criteria to provide special product offerings and pricing for a particular class or subclass of customers. If an unauthorized user attempts to access the system, a series of screens containing non-customized pricing is presented to the intruder so as not to alert the intruder that he or she has reached the restricted content. Based on the authentication information, automated manufacturing processes and equipment may be utilized to produce the customized products. |
| US09280782B1 |
Deal based communications via multiple channel options
Architectures and techniques are described to provide a number of options to exchange information related to deals via a plurality of channels. Each of the communication channels may be utilized to exchange communications about different aspects of acquiring and redeeming deals. The channel options may be related to categories of computing devices, operating systems executed by computing devices, one or more sites, various forms of communication, client device applications, etc. A service provider that offers deals on behalf of merchants may determine one or more options for each communication channel with respect to merchants offering deals and with respect individuals that may participate in deals offered by the service provider. After determining the channel options for a deal offered by a particular merchant and for individuals designated to receive information about the deal, communications with respect to the deal may be exchanged over the channels via certain channel options. |
| US09280781B1 |
Referral system and method
A system comprising a referral acceptor; a referral coordinator coupled to the referral acceptor; a referral calculator coupled to the referral calculator; and an input/output (I/O) device coupled to the referral coordinator. The referral acceptor is configured to accept a referral card. The referral card has a referrer identifier which identifiers a referrer of a holder of the referral card. |
| US09280772B2 |
Security token for mobile near field communication transactions
Devices, systems, and methods are disclosed which relate to an NFC-enabled security token that is removably coupled to a mobile device. The security token may be provisioned with the information by the mobile device, then decoupled from the mobile device and used to authenticate the user or perform a transaction at a POS terminal equipped with an NFC reader. The security token includes logic for user-controlled restrictions on allowable purchases, such as payment limits, timeouts, vendor identifiers, allowed purchases, and location-based restrictions. The security token is further equipped with “self-destruct” security features, such as deactivating itself or erasing any sensitive information upon being unable to contact the mobile device for a specified duration, or being subject to an unauthorized or restricted transaction, until such time as it is re-coupled to the mobile device. |
| US09280771B2 |
Secure personal information profile
A method, programmed medium and system are provided for implementing a prebuilt and encrypted personal identification information (PII) profile which resides only on a user's computer and is prevented from being permanently stored in a server's database. When a user visits a web site and creates a new account, the site submits a request to query the user's profile using an extension to the HTTP protocol. The user is prompted by the user's browser to grant the site permission to do so and the site automatically uploads a non-personal identifying number (ID) to the user's system to create an account. User-selected fields of the PII are transmitted to the server for processing a user-requested transaction. All personal information remains on the user's computer within the user's encrypted PII profile and is deleted at the server after the completion of the requested transaction. |
| US09280770B2 |
Secure point of sale presentation of a barcode at an information handling system display
Unauthorized copying of a transaction barcode is prevented by including a sensed condition or other publicly-accessible data with the transaction barcode for use as a comparison with the publicly accessible data determined at a barcode reader. If the sensed condition included in the transaction barcode indicates that the transaction barcode was generated for a different transaction, then the barcode reader invalidates the transaction. For instance, if the barcode was generated too distant in time, position, or sequential transactions, then the barcode reader invalidates the transaction barcode as an unauthorized copy of a transaction barcode generated for a different transaction. |
| US09280769B2 |
Mobile commerce payment system
A mobile commerce system and components thereof are provided in which multiple wireless mobile communications devices (mobile devices) each has a unique electronic identification and processing circuit capable of encrypting data utilizing an encryption key and a first software application providing connectivity to commercial webpage servers for purposes that include the conduct of selected transactions involving a payment for goods or services. Each mobile device is independently enabled to conduct financial transactions in real time by communication with a financial institution. Each mobile device further has a second software application termed mobile payment application adapted to interact with the first application to receive data as to a payment required to conclude a transaction conducted by way of a commercial webpage server. The mobile payment application initiates an instruction to the financial institution to make a payment to a payee designated by way of such data wherein the instruction is encrypted utilizing the unique electronic identification and processing circuit. |
| US09280768B2 |
Payment systems and methodologies
A transaction system including at least two transaction communicators, at least one of which is a mobile communicator, at least one of the at least two transaction communicators having sequential visually sensible indicia generation functionality operative to generate a time sequence of indicia which provides at least transaction data and at least one of the at least two transaction communicators having sequential visually sensible indicia receiving functionality and transaction data extraction functionality capable of extracting at least the transaction data from the time sequence of particular indicia, whereby a time sequence of indicia which provides at least transaction data is transmitted from one of the at least two transaction communicators to another of the at least two transaction communicators. |
| US09280766B2 |
Cascading definition and support of EDI rules
Electronic data interchange (EDI) documents are validated by creating an inventory of all rules, dynamically adjusting the inventory based upon entity specific rules derived from a plurality of companion guides, determining a profile containing pointers to select rules in the inventory for each companion guide and storing the profile for each companion guide in a storage. A runtime checker can then be used to check a received EDI document with a corresponding rule set, forward the EDI document if the EDI document matches its current rule set and return the EDI document if the EDI document does not match its current rule set. EDI rules may be enforced, for example, by determining entity-specific rules from corresponding companion guides, by expressing each rule in a neutral and machine readable format, by classifying the rules and/or by creating an inventory of rules and pointers to entity-specific rules. |
| US09280763B2 |
Method and system of automating data capture from electronic correspondence
In some embodiments, electronic data may be automatically captured to provide a user with a universal Internet identity and e-mail address, comprehensive e-mail filtering and forwarding services, and e-receipt identification and data extraction. Detailed user e-mail preferences data stored at a central server may be selectively altered such that incoming correspondence is redirected in accordance with the user's preferences. Computer program code at the central server may parse incoming e-mail header information and data content, selectively extract data from identified types of correspondence, and forward the extracted data in accordance with the user's preferences. Additional computer program code may manipulate the extracted data in accordance with format requirements and display the manipulated data to a user in a desired format. |
| US09280761B2 |
Systems and methods for improved interactive content sharing in video communication systems
Systems and methods for interactively sharing and annotating visual information over a communication network between at least a first and a second endpoint are disclosed. The system includes a display coupled to the first endpoint and a user interaction device coupled to the first endpoint and associated with the display, wherein the first endpoint is configured to: receive visual information from, and transmit visual information to, at least the second endpoint over the communication network; show visual information received from at least the second endpoint on the display; obtain a copy of the visual information shown on the display when instructed by the user interaction device; add an annotation, if any, as indicated by the user interaction device; and transmit the annotated copy to the second endpoint. |
| US09280757B2 |
Automated inventory management
A method comprising determining an inventory exception inference associated with a product, determining an inventory inspection directive for the product based, at least in part, on the inventory exception inference, receiving the inspected inventory state data based, at least in part, on the inventory inspection directive, and determining that an actual inventory exception exists for the product based, at least in part, on the inspected inventory state data is disclosed. |
| US09280756B2 |
Managing individual item sequencing from a storage area to a packing station in a materials handling facility
Various embodiments of a system and method for managing shipment release from a storage area in a materials handling facility are described. Embodiments may include a system configured to determine that a shipment including multiple units is expected to be conveyed from a storage area to a packing station in a materials handling facility. The system may also be configured to evaluate each respective unit of the shipment according to one or more criteria related to physical characteristics of the unit in order to generate an order in which the units of the shipment are to be provided to the packing station. The system may also be configured to generate an instruction to provide the units of the shipment to the packing station according to the generated order. |
| US09280753B2 |
Translating a language in a crowdsourced environment
Program code on one or more computers receives a request from a first end-user to join a crowdsourced network of language translators (crowdsourced network). The program code determines the first end-user is a registered member of the crowdsourced network. The program code adds the first end-user as a language translator within the crowdsourced network. The program code receives from a second end-user a request for language translation service to translate plain text from the second end-user. The program code selects one of the language translators from the crowdsourced network who is qualified to perform the language translation service requested. The program code generates an interactive chat session to connect the language translator selected with the second end-user, wherein the language translator selected translates the plain text, via the interactive chat session that allows plain text to be translated at least more frequently than on an hourly basis. |
| US09280752B2 |
Method, system and computer-readable medium for E-form information extraction template creation
Certain example embodiments described herein relate to techniques for enabling a business process model (BPM) to be transparent (in whole or in part) from the source of data that triggers it. More particularly, certain example embodiments relate to techniques enabling transparent composition and decomposition of e-form data from one or more e-form formats into data that is directly usable by a Business Process Model Engine. Information from an e-form may, for example, be used in a business process, e.g., after a template or document type is created that represents the e-form in a format that the BPM Engine understands, and the e-form may be transparently composed into and decomposed out from the business data in certain example embodiments. |
| US09280751B2 |
Methods and systems for validating real time network communications
Methods and systems for managing network communications are described. An example resource management system includes a communications manager configured to access information regarding communication protocols used by corresponding broker systems and to provide message translations based on an origin and/or destination of the message to be transmitted. A message processor is coupled to the communications manager and is configured to serialize incoming and/or outgoing broker messages and to facilitate queuing of incoming and outgoing message traffic with broker systems. A communications configurer is configured to track one or more communication attributes of broker systems and changes thereto to ensure communications between the resource management systems are broker systems are conducted in accordance with the communication attributes of the broker systems. A communications rules provider is configured to determine which broker system is to be communicated with in order to fulfill a resource request. |
| US09280749B1 |
Determining an attribute of an online user using user device data
A computer-implemented method for determining an attribute for an online user of a candidate computing device is provided. The method implemented uses a host computing device. The method includes identifying a first set of model data including device data from a plurality of model computing devices including location data and access data, and a plurality of categories for an attribute of a population segment including an online user. Each category defines a segment of the attribute. The method further includes training a classification model by the host computing device with at least the first set of model data and the plurality of categories. The method also includes identifying device data associated with the candidate computing device. The method further includes applying the device data of the candidate computing device to the classification model to determine a category of the plurality of categories for the online user. |
| US09280746B2 |
Posterior probability of diagnosis index
The likelihood of a disorder can be determined using a variety of techniques. One or more exhibited symptoms may be obtained for a patient. The likelihood that each symptom will be exhibited for the disorder can be computed, and a posterior probability of the disorder given the exhibited symptoms can be computed from the likelihood of the symptoms. Based on the resulting posterior probability of the disorder, a more accurate determination can be made of whether the patient is suffering from the disorder. |
| US09280744B2 |
System and method for optimal power flow analysis
A method determines a power flow of a power grid by optimizing an objective function representing an operation of the power grid using a spatial branch and bound (BB) framework for determining iteratively upper and lower bounds of the objective function. During the optimization, the lower bounds are determined using a semi-definite programming (SDP) relaxation of an optimal power flow (OPF) problem. |
| US09280735B2 |
Data processing apparatus that processes information based on data processing in connection with user information
An image formation apparatus configured to execute print processing, includes an information storage configured to store print-limit information and notification-destination information set for each user. The print-limit information includes at least one of a print condition and a limit on a printable amount. A user-information acquisition unit is configured to acquire print-instructing-user information, which is information on a print-instructing user instructing a print-executing user to execute printing. An information-acquisition unit is configured to acquire, from the information storage, the print-limit information and the notification-destination information corresponding to the print-instructing-user information acquired by the user-information acquisition unit, and a notification unit is configured to notify the print-instructing user of a result of print control by the print controller, based on the notification-destination information acquired by the information-acquisition unit. |
| US09280734B2 |
Image forming apparatus that performs highly-accurate calibration, calibration program, and calibration system
An image forming apparatus includes a print device, a tone correction unit, a peripheral light quantity drop detecting unit, and a color value correction unit. The tone correction unit corrects a tone characteristic of the print device based on color values of a plurality of color patches of each of a reference chart and a test chart in an image. The image is generated by simultaneously taking a reference sheet and a test sheet by an imaging device. The reference chart is drawn on the reference sheet. The test chart is printed on the test sheet by the print device. The peripheral light quantity drop detecting unit detects the amount of the peripheral light quantity drop in each of the patches based on the positions and luminances of the plurality of reference regions in the image and the positions of the patches in the image. |
| US09280732B2 |
Printing device, printing control method and recording medium capable of interruption printing with high security
A LAN control unit receives print data from a client device or the like. An input job storage unit registered on a hard disk a series of PDL commands included in the print data received. An input job queue management unit registers print job specifying information specifying a print job represented by the print data received to the end of an input job queue. A PDL interpretation/execution unit successively executes from the head of the series of PDL commands stored on the hard disk device. When it is determined that the PDL command that has been executed is a re-execution unnecessary command, the PDL interpretation/execution unit overwrites the PDL command stored on the hard disk with a NOP command. |
| US09280730B2 |
Printing apparatus and method of controlling the same, and storage medium
There are provided a printing apparatus which holds a job, determines whether attribution information of a sheet to be used by the stored job is registered for a sheet storage unit, judges whether a sheet exists in a sheet storage unit to be used by the job, and notifies a result of the determination and a result of the judgment. |
| US09280727B2 |
Information processing unit, printing control method for printer driver, and computer program product
A information processing unit includes: a control unit configured to control operation processing of individual units through a user interface; a print set value storage unit configured to store a print set value that is set by operation of an operation unit on a basic setting screen displayed on a display unit on which setting relating to the color printing is performed at a basic level and a print detail set value that is set by operation of the operation unit on a detail setting screen as another dialog on which the setting is performed at a detail level under operation control of the control unit; and a print data creating unit configured to create print data of the color printing based on the print set value and the print detail set value under operation control of the control unit. |
| US09280725B2 |
Information processing apparatus, information processing method, and non-transitory computer readable medium
An information processing apparatus includes a network creating unit that creates a network in which respective characters of plural character recognition results are represented as nodes, and in which nodes of adjacent character images are connected with a link, a first determining unit that determines a first candidate boundary in the network, a second determining unit that determines a second candidate boundary different from the first candidate boundary in the network, and an extracting unit that extracts, as to-be-searched objects, plural candidate character strings from a set of candidate character strings each formed of nodes between the first candidate boundary and the second candidate boundary. |
| US09280724B2 |
Pose classification apparatus and method
A pose classification apparatus is provided. The apparatus includes a first image analyzer and a second image analyzer configured to estimate a body part for each pixel of an input image including a human body, a body part decider configured to calculate reliabilities of analysis results of the first image analyzer and the second image analyzer, and configured to decide the body part for each pixel of the input image based on the calculated reliabilities, and a pose estimator configured to estimate a pose of the human body included in the input image, based on the decided body part for each pixel. |
| US09280712B2 |
Apparatus and method for recognizing a lane
An apparatus for recognizing a lane is provided. The apparatus performs a near-field white line recognition process and calculates road parameters (lane position, lane inclination, lane curvature and lane width) near the vehicle. The road parameters are calculated using the extended Kalman filter. In the calculation, the calculated lane curvature is used as a lane curvature to be included in predicted values. The apparatus outputs the calculated road parameters to a warning/vehicle-control apparatus. |
| US09280710B1 |
Bus detection for an autonomous vehicle
Methods and systems are provided that may allow an autonomous vehicle to discern a school bus from image data. An example method may include receiving image data indicative of a vehicles operating in an environment. The image data may depict sizes of the vehicles. The method may also include, based on relative sizes of the vehicles, determining a vehicle that is larger in size as compared the other vehicles. The method may additionally include comparing a size of the determined vehicle to a size of a school bus and based on the size of vehicle being within a threshold size of the school bus, comparing a color of the vehicle to a color of the school bus. The method may further include based on the vehicle being substantially the same color as the school bus, determining that the vehicle is representative of the school bus. |
| US09280705B2 |
Image quality evaluation method, system, and computer readable storage medium based on an alternating current component differential value
Disclosed is a picture quality evaluation method that evaluates the quality of a second image based on alternating current component measurements for a pixel set in a first image and alternating current component measurements for a pixel set in a second image in the same location as the pixel set in the first image. |
| US09280704B2 |
Communicating wireless pairing information for pairing an electronic device to a host system
During a pairing procedure between an electronic device and a host system, the host system may output audiovisual data that communicates wireless pairing information. The electronic device may detect the audiovisual data and determine the wireless pairing information by processing the audiovisual data that it detects. The wireless pairing information may facilitate pairing the electronic device to the host system in accordance with the short-range wireless communication protocol. |
| US09280703B2 |
Apparatus and method for tracking hand
Disclosed are an apparatus for tracking a location of a hand, includes: a skin color image detector for detecting a skin color region from an image input from an image device using a predetermined skin color of a user; a face tracker for tracking a face using the detected skin color image; a motion detector for setting a ROI using location information of the tracked face, and detecting a motion image from the set ROI; a candidate region extractor for extracting a candidate region with respect to a hand of the user using the skin color image detected by the skin color image detector and the motion image detected by the motion detector; and a hand tracker for tracking a location of the hand in the extracted candidate region to find out a final location of the hand. |
| US09280700B2 |
Method and apparatus for online signature verification using proximity touch
A method and apparatus for verifying an input signature are provided. The method includes generating signature data based on a real touch event and a proximity touch event that occur on a touch input unit of and apparatus, extracting a feature of the input signature based on the signature data, and determining whether to authenticate the input signature based on a similarity between the feature of the input signature and a corresponding feature of a previously stored reference signature. |
| US09280698B2 |
Image processing apparatus, method, and program
An image processing apparatus, a method, and a program for allowing cells to be quantitatively observed. A computer obtains a cell membrane image obtained by performing fluorescent observation on a cell membrane of a cell serving as a sample and a tricellular tight junction (tTJ) image obtained by performing fluorescent observation on a protein localized in a tTJ of the cell. The computer derives the size of area of a region of the cell by identifying the region of each cell from the cell membrane image, derives the size of area of the region of the protein localized in the cell from the tTJ image, and dividing the obtained size of area of the region of the protein by the size of area of the region of the cell, thus calculating an index of adhesion strength of the cells. The invention can be applied to an observation system. |
| US09280697B2 |
Authentication device including template validation and related methods
An authentication device may include a housing and a finger sensor carried by the housing and including first processing circuitry and a finger sensing area coupled thereto. The first processing circuitry may be configured to generate finger image data based upon a finger positioned adjacent the finger sensing area, and generate and store a first template based upon the finger image data. The authentication device may include second processing circuitry carried by the housing and configured to obtain the finger image data from the first processing circuitry. The second processing circuitry may be configured to generate a second template based upon the finger image data. The first processing circuitry may further be configured to obtain the second template from second processing circuitry, and validate the second template against the first template. |
| US09280694B2 |
Decoding machine-readable optical codes with aesthetic component
Techniques are provided for decoding machine-readable optical codes that have an aesthetic component that is integrated into the codes themselves. In this manner, the machine-readable optical codes can be designed to be aesthetically pleasing and/or can convey information to human viewers, and can even be disguised so that they do not appear to be machine-readable optical codes at all. Such information can be (but need not be) distinct from the information encoded for reading by a machine, even when the information is integrated into the code itself. The techniques described herein can be applied to any type of machine-readable optical code. |
| US09280692B2 |
Method and RFID reader for evaluating a data stream signal in respect of data and/or collision
A method for evaluating, by an radio frequency identification reader (1), a data stream signal (DS) in respect of data and/or collision, comprises comparing the data stream signal (DS) with at least one threshold level, particularly a data bit level and/or a collision level, and evaluating the results of the comparison, wherein both the threshold level and its adaptation speed (α(n)) are adapted in dependence of the course of the data stream signal (DS) and/or the course of said threshold level. |
| US09280690B2 |
Writing apparatus, writing system, and writing method
A writing apparatus to which an external writing unit is connected comprises a writing unit that write, to a write object provided to a conveyed item, identification information thereof; a first reading unit in downstream side in a conveying direction than the writing unit, that reads identification information from the write object; a determination unit that determines whether the read identification information is consistent with identification information having to be written to the write object; and a notification unit configured to, when it is determined that identification information written to a first write object and read by the first reading unit is inconsistent with identification information having to be written to the first write object, notify the external writing unit of recovery information including the identification information having to be written to the first write object and/or a write content thereof. |
| US09280688B2 |
Apparatus and method for limiting and analyzing stress corrosion cracking in pressurized water reactors
A method to assess and predict pressurized water stress corrosion cracking in operational nuclear power plants and the effect of adding zinc compounds into a reactor coolant system of the nuclear power plant. |
| US09280680B2 |
Photobook with augmented social capability
Method and system for providing an augmented photobook that includes at least one interactive feature. An image of a symbology printed on a page of a photobook is captured, and address information contained therein is decoded. A web browser of an electronic device is directed to a website identified by the address information, and additional information related to the photobook is received from a remote computing device associated with the website. The additional information related to the photobook is displayed on the electronic device. Additionally, a level of access to the website is determined for a user of the electronic device. A user request to transmit new content to the website is received it is determined whether the level of access corresponds to permission rights for the website. If the level of access corresponds to the permission rights then the new content is transmitted and aggregated at the website. |
| US09280674B2 |
Information processing apparatus and method of controlling same
An information processing apparatus includes a memory and a processor coupled to the memory and configured to receive an instruction to transfer a first application to an execution environment, detect a second application that shares a resource with the first application, the resource being information used upon executing the first application and the second application, provide information for causing a user to determine whether to prohibit transferring the second application to the execution environment when the second application is detected, and invalidate a state in which the second application shares the resource with the first application when instruction to prohibit transferring the second application to the execution environment is received. |
| US09280673B2 |
Selectively allowing execution of a control command associated with a page description language in an image forming apparatus
Disclosed is an image forming apparatus that connects to a device. The image forming apparatus includes a storage unit that stores, for each types of page description languages for describing printing data, permission information indicating whether execution of a control command described in the corresponding page description language is allowed; a receiving unit that receives the control command transmitted from the device; a determination unit that determines whether the execution of the control command is allowed for the image forming apparatus, based on the permission information being stored in the storage unit; and a controller that controls the image forming apparatus. When the execution of the image forming apparatus is disallowed for the image forming apparatus, the controller prevents the image forming apparatus from executing the control command. |
| US09280671B2 |
Semiconductor device and encryption key writing method
A semiconductor device includes a CPU, an EEPROM, and a ROM. The ROM includes an encryption area and a non-encryption area and the encrypted firmware is stored in the encryption area. The semiconductor device includes a decrypter which holds the encryption key, decrypts the encrypted firmware, and supplies the decrypted firmware to the CPU. The EEPROM includes a system area to which an access from the CPU is forbidden in a user mode. The encryption key is divided into split keys of plural bit strings, and stored in the distributed address areas in the system area. An encryption key reading program which is not encrypted is stored in the non-encryption area of the ROM. Executing the encryption key reading program, the CPU reads and reconfigures plural split keys stored in the EEPROM in a distributed manner to restore the encryption key and supplies the restored encryption key to the decrypter. |
| US09280669B2 |
Systems, methods and computer readable media for calculating a security index of an application hosted in a cloud environment
The present invention provides a method and system for calculating a security index of an application hosted in a cloud environment. The application is mapped to a cloud service provider of the cloud environment, and a set of security controls and a set of security metrics applicable for the application are identified. The set of security controls and the set of security metrics are encapsulated into a security profile object by a security control module. A set of values of the set of security metrics are retrieved from the cloud service provider, by a cloud probe module, and the security index of the application is calculated. |
| US09280656B2 |
Device and method for providing security channel interface
A security channel interface providing device is provided. The device includes a sensor unit that comprises at least two sensors configured to sense a motion of a user, and a control unit that determines whether or not at least two sensing values sensed by the sensors satisfy a security channel interface activation condition, and activates or inactivates a security channel interface according to a result of the determination. When the security channel interface is activated, the control unit provides a security channel to the user. |
| US09280655B2 |
Application authentication method and electronic device supporting the same
A method for operating an electronic device is provided. The method includes executing, by a processor of the electronic device operable in a first mode (e.g. a trusted execution environment (TEE)) or a second mode (e.g. a non-trusted execution environment (NTEE)), wherein the first mode is more secure than the second mode; receiving, by the processor operating in the first mode, data or information related to a first software program stored in a first memory region; and authenticating, by the processor operating in the first mode, at least a portion of the data or information using a second software program stored in a second memory region. |
| US09280653B2 |
Security access method for automotive electronic control units
A system and method for employing a mechanism for unlocking a vehicle ECU. The ECU stores a unique ECU identification value that identifies the particular ECU and a secure server stores the ECU identification value and a unique ECU security key value, where the identification value identifies the security key value in the server, and where the secure server stores the unique ECU identification value and the unique security key value for many ECUs. A service tool that wants to gain access to the ECU for software reprogramming or service requests the ECU identification value and a challenge from the ECU and sends them to the secure server, which then identifies the security key value associated with that ECU identification value and the response for the challenge. The secure server then sends the response to the service tool, which provides it to the ECU to unlock it for programming. |
| US09280652B1 |
Secure device unlock with gaze calibration
An unlock procedure for an electronic device can be based at least in part upon a determined gaze direction or viewing location of a user. During a device unlock process, the user can be directed to follow an element or path on a display element with the user's eyes. Image information captured of the user during this process can be used to correlate the user's eye position in the image with the corresponding gaze location on the device, in order to calibrate the gaze tracking in a way that is substantially transparent to the user. Further, certain devices can also utilize captured image information during the unlock process to authenticate the user using a process such as iris recognition or retinal scanning. Such an approach enables secure access to the device without requiring the user to manually enter identifying information, and re-authentication can be performed without distracting the user. |
| US09280649B2 |
Apparatus and method for detecting an object from an image
A user detecting apparatus includes: a memory; and a processor that executes a procedure, the procedure including: obtaining a first image and a second image, extracting a user-associated area from the first image according to a given condition, dividing the user-associated area into a plurality of areas, storing a histogram of each of the plurality of areas in the memory, detecting from the second image a corresponding area that corresponds to an area that is one of the plurality of areas and has a first reference histogram according to similarity, and changing a reference histogram used for a third image from the first reference histogram to a second reference histogram. |
| US09280647B2 |
Methods, systems, and products for identity verification
Methods, systems, and products verify identity of a person. A signature, representing the presence of a device, is acquired. The signature is compared to a reference signature. When the signature favorably compares to the reference signature, then the identity of a user associated with the device is verified. |
| US09280644B2 |
Methods for restricting resources used by a program based on entitlements
In response to a request for launching a program, a list of one or more application frameworks to be accessed by the program during execution of the program is determined. Zero or more entitlements representing one or more resources entitled by the program during the execution are determined. A set of one or more rules based on the entitlements of the program is obtained from at least one of the application frameworks. The set of one or more rules specifies one or more constraints of resources associated with the at least one application framework. A security profile is dynamically compiled for the program based on the set of one or more rules associated with the at least one application framework. The compiled security profile is used to restrict the program from accessing at least one resource of the at least one application frameworks during the execution of the program. |
| US09280643B2 |
Establishing access to a secure network based on user-created credential indicia
In various aspects, code-based indicia contain secured network access credentials. In some aspects, a computer processor receives user input that specifies secured network access credentials, and the computer processor creates or modifies credentials for establishing a secured network connection. In these aspects, the computer processor generates code-based indicia that contain at least part of the secured network access credentials. In other aspects, a computer processor scans the code-based indicia and extracts the network access credentials. In these aspects, the computer processor employs the network access credentials to establish the secured network connection. In additional aspects, a network router apparatus renders the code-based indicia to an active display. In further aspects, a network router apparatus conditions grant of network access to a device on receipt from the device of an answer to a security question included in the secured network access credentials. |
| US09280642B2 |
Method of managing clinical testing apparatus, clinical testing system, and maintenance management apparatus
A management system connected with a clinical testing apparatus is disclosed. The system acquires, from the clinical testing apparatus, a parameter that varies according to deterioration of the unit at a plurality of points of time, stores the parameters and/or analysis results that are obtained by analyzing the parameters, and provides a screen data for showing the stored parameters and/or the stored analysis results in a time-series format. A method for managing a clinical testing apparatus and a clinical testing system for the method are also disclosed. |
| US09280638B2 |
Image processing apparatus and method, and non-transitory computer readable medium
An image processing apparatus includes a deleted differential image generator and a region specifying unit. The deleted differential image generator generates, from first image data generated by reading an image of an unfilled or filled-in sheet and second image data generated by reading an image of a sheet being in a format identical to the unfilled or filled-in sheet and having a superimposed sheet superimposed thereon, deleted differential image data representing an image that is not represented in the second image data but is represented in the first image data. The region specifying unit specifies a region where the superimposed sheet is represented in the second image data, based on a region where the deleted differential image data is. |
| US09280637B2 |
Multi-action button for mobile devices
Systems, methods, and computer-readable media for providing a multi-action button for mobile devices are provided. Alerts are received and multi-action buttons are determined corresponding to the alerts and clinicians associated with mobile devices. The multi-action buttons are displayed on the mobile devices. |
| US09280636B2 |
Electronic medical record distribution, systems and methods
Systems and methods for distributing Electronic Medical Records (EMR) from a private practice to authorized mobile devices are presented. EMR data can be exchanged from a private practice with a remote mobile device via an intermediary mobile access service. The service can include one or more servers that tunnel EMR data between the mobile devices and the practice, where a relay server located at the service communicates via an a priori instantiated persistent session with a relay client installed at the practice. The persistent session can be maintained by the relay client thus reducing the burden on the practice to configure or change local network infrastructure. |
| US09280633B2 |
Content addressable memory
A method of designing a content-addressable memory (CAM) includes associating CAM cells with a summary circuit. The summary circuit includes a first level of logic gates and a second level of logic gates. The first level of logic gates have inputs each configured to receive an output of a corresponding one of the plurality of CAM cell. The second level of logic gates have inputs each configured to receive an output of a corresponding one of the first level of logic gates. Logic gates in at least one of the first level of logic gates or the second level of logic gates are selected to have an odd number of input pins so that an input pin and an output pin share a layout sub-slot. |
| US09280627B1 |
GUI based verification at multiple abstraction levels
A system and method that implement an object-oriented model for requirements of a hardware design in order to verify the design. The object-oriented model abstractly captures the design topology, capability, control, and status of the design. An object-oriented model or definition of a hardware design is based on one or more specifications or standards implemented with the design. With the object-oriented model, a system and method for storing and displaying data captured during a test run is implemented. Graphical displays are defined to show run information for abstract objects of the design. Predefined graphical displays may be altered to accommodate the features of the object-oriented model and new graphical displays may be defined for objects in the model. |
| US09280626B2 |
Efficiently determining Boolean satisfiability with lazy constraints
A mechanism is provided for efficiently determining Boolean satisfiability (SAT) using lazy constraints. A determination is made as to whether a SAT problem is satisfied without constraints in a list of constraints. Responsive to the SAT problem being satisfied without constraints, a set of variable assignments that are determined in satisfying the SAT problem without constraints are fixed. For each constraint in the list of constraints, a determination is made as to whether the SAT problem with the constraint results in the set of variable assignments remaining constant. Responsive to the SAT problem with the constraint resulting in the set of variable assignments remaining constant, the constraint is added to a list of non-affecting constraints and a satisfied result is returned. |
| US09280625B2 |
Incremental slack margin propagation
Techniques and systems are described for improving the efficiency of timing calculations in numerical sequential cell sizing and for improving the efficiency of incremental slack margin propagation. Some embodiments cache timing-related information associated with a source driver that drives an input of a sequential cell that is being sized, and/or timing-related information for each output of the sequential cell that is being sized. The cached timing-related information for the source driver can be reused when sizing a different sequential cell. The cached timing-related information for the outputs of the sequential cell can be reused when evaluating alternatives for replacing the sequential cell. Some embodiments incrementally propagate slack margins in a lazy fashion (i.e., only when it is necessary to do so for correctness or accuracy reasons) while sizing gates in the circuit design in a reverse-levelized processing order. |
| US09280622B2 |
Circuit verifying apparatus, circuit verifying method, and circuit verifying program
A circuit verifying apparatus, which calculates code coverage of a measurement-target logic circuit written in a hardware description language, including: a coverage observing unit which measures whether a code corresponding to a measurement-target signal extracted from each of plural observation points, which are arranged inside the measurement-target logic circuit, is carried out or not; and a coverage collecting unit which collects measurement results acquired by the coverage observing unit, and measures quantitatively a ratio of tested codes to whole codes which describe the measurement-target logic circuit, and outputs the ratio. |
| US09280621B1 |
Methods, systems, and articles of manufacture for analyzing a multi-fabric electronic design and displaying analysis results for the multi-fabric electronic design spanning and displaying simulation results across multiple design fabrics
Disclosed are techniques to analyze multi-fabric designs. These techniques generate a cross-fabric analysis model by at least identifying first design data in a first design fabric of a multi-fabric electronic design using a first session of a first electronic design automation (EDA) tool, update the cross-fabric simulation model by at least identifying second design data in a second design fabric using a second session of a second EDA tool, and determine analysis results for the multi-fabric electronic design using at least the cross-fabric simulation model. Analysis results may be determined using parasitic, electrical, or performance information. Various EDA tools access their respective native design data in their respective domains or design fabrics and have no access to or visibility of non-native design data while these techniques automatically cross the boundaries between multiple design fabrics to accomplish the tasks of analyzing multi-fabric electronic designs or displaying analysis results therefor. |
| US09280618B1 |
Systems and methods for control strategy criteria selection
The systems and methods perform simulations in a systematic way as to minimize redundant data fetching and computations and reduce run-time. The systems and methods can cache information that can be used across multiple control strategies and speed up the process of simulation by several orders of magnitude. A business analyst can first generate a set of matching criteria that meets business intuition for the specific initiative and set of stores under analysis. A systematic approach in building similar sites models from control strategies that are combinations of this set of matching criteria can be applied to minimize data extraction and processing. The similarity function allows for the distance of each criterion to be combined linearly. Data for each matching criteria only needs to be extracted once but can be used in all control strategies that uses that criteria. |
| US09280611B2 |
Data classification
The present disclosure provides a method and an apparatus for storing data classification structure. Based on an initial classification structure tree, a reorganized classification structure tree that stores data classifications structure differently from that of the initial classification structure is generated. As the reorganized classification structure tree is flexible, when maintaining data and searching data by using the search engine, the present techniques may quickly find the desired data, thereby reducing the heavy burden of the search engine under the conventional techniques to conduct data search and high pressure of conducting data maintenance and data search. Further, the present techniques may not only reduce the burden of the search engine, but also relieve the pressure for maintaining data and searching data. |
| US09280610B2 |
Crowd sourcing information to fulfill user requests
A user request is received from a mobile client device, where the user request includes at least a speech input and seeks an informational answer or performance of a task. A failure to provide a satisfactory response to the user request is detected. In response to detection of the failure, information relevant to the user request is crowd-sourced by querying one or more crowd sourcing information sources. One or more answers are received from the crowd sourcing information sources, and the response to the user request is generated based on at least one of the one or more answers received from the one or more crowd sourcing information sources. |
| US09280609B2 |
Exact match lookup scheme
An exact match lookup system includes a hash function that generates a hash value in response to an input hash key. The hash value is used to retrieve a hash bucket index value from a hash bucket index table. The hash bucket index value is used to retrieve a plurality of hash keys from a plurality of hash bucket tables, in parallel. The retrieved hash keys are compared with the input hash key to identify a match. Hit logic generates an output index by concatenating the hash bucket index value with an address associated with the hash bucket table that provides the matching hash key. An exact match result is provided in response to the output index. A content addressable memory (CAM) may store hash keys that do not fit in the hash bucket tables. |
| US09280599B1 |
Interface for real-time audio recognition
An audio recognition service recognizes an audio sample across multiple content types. At least a partial set of results generated by the service are returned to a client while the audio sample is still being recorded and/or transmitted. The client additionally displays the results in real-time or near real-time to the user. The audio sample can be sent over a first HTTP connection and the results can be returned over a second HTTP connection. The audio recognition service further processes check-in selections received from the client for content items indicated by the results. Responsive to receiving the check-in selections, the service determines whether a user is eligible for a reward. If the user is eligible, the service provides the reward. |
| US09280598B2 |
Systems and methods for sound recognition
Systems and methods for recognizing sounds are provided herein. User input relating to one or more sounds is received from a computing device. Instructions, which are stored in memory, are executed by a processor to discriminate the one or more sounds, extract music features from the one or more sounds, analyze the music features using one or more databases, and obtain information regarding the music features based on the analysis. Further, information regarding the music features of the one or more sounds may be transmitted to display on the computing device. |
| US09280591B1 |
Efficient replication of system transactions for read-only nodes of a distributed database
A distributed database system may efficiently replicate system transactions one or more read-only nodes. An update to a distributed database may be received. One or more system transactions may be performed to apply the update. For each system transaction, one or more change notifications may be generated which indicate changes to be applied in order to perform the system transaction. A particular one of the change notifications may be identified as the last change to be applied in order to complete the system transaction. The change notifications may be sent to one or more read-only nodes. The read-only nodes may process read requests for the distributed database system. The identified change notification may indicate to the read-only nodes the last change to be applied prior to presenting a state of the database that includes the system transaction when servicing read requests. |
| US09280587B2 |
Mailbox search engine using query multi-modal expansion and community-based smoothing
A retrieval method on a database of documents including text and names of participants associated with the documents includes: receiving a text query facet of keywords and a persons query facet of participant names; computing an enriched text query as an aggregation of the text query facet, a monomodal expansion of the text query facet based on the keywords, a cross-modal expansion of the text query facet based on the participant names, and a topic expansion of the text query facet based on a topic model associating words and topics; computing an enriched persons query as an aggregation of the persons query facet, a monomodal expansion of the persons query facet based on the participant names, a cross-modal expansion of the persons query facet based on the keywords, and a community expansion of the persons query facet based on a community model associating persons and communities. |
| US09280585B2 |
Method and apparatus for optimizing the evaluation of semantic web queries
A semantic query over an RDF database is received with RDF database statistics and access methods for evaluating triple patterns in the query. The semantic query is expressed as a parse tree containing triple patterns and logical relationships among the triple patterns. The parse tree and access methods create a data flow graph containing a plurality of triple pattern and access method pair nodes connected by a plurality of edges, and an optimal flow tree through the data flow graph is determined such that costs are minimized and all triple patterns in the semantic query are contained in the optimal flow tree. A structure independent execution tree defining a sequence of evaluation through the optimal flow tree is created and is transformed into a database structure dependent query plan. This is used to create an SQL query that is used to evaluate the semantic query over the RDF database. |
| US09280582B2 |
Optimization of join queries for related data
Embodiments of the present invention disclose a method, computer program product, and system for optimizing execution of a query that includes a JOIN against a system utilizing data relationship concepts. A computer determines whether one or more data structures in JOIN include a parent/child relationship. The one or more data structures can be one or more tables. Responsive to determining that the one or more data structures in JOIN include a parent/child relationship, the computer determines whether the query that includes the JOIN includes a filter applied on one or more data structures in the JOIN with an OR condition between filters. Responsive to determining that the query that includes the JOIN does not include the filter applied on one or more data structures in JOIN with an OR condition between filters, the computer modifies the query that includes the JOIN into a query utilizing relationship constructs. |
| US09280580B1 |
Customizing search
Techniques for customizing search may include the following operations: outputting, to a computing device of a user, a Web page that enables selection of signals that are usable to generate search results; during a search session, receiving, through the Web page, a query and a selection corresponding to one or more of the signals, where the selection differs from a default set of search signals used by the search system for searching; obtaining, for output to the computing device, search results that are based on the query and the selection; and following the search session, configuring the search system to use the default set of search signals for searching. |
| US09280575B2 |
Indexing hierarchical data
A system includes generation of an encoding for each of a hierarchy of nodes, each of the nodes associated with one or more attributes, and the encoding for each node including a first pointer and a second pointer, and generation of an order tree comprising a hierarchy of entries, where each pointer of the encoding points to a respective one of the entries, wherein the encoding and the order tree indicate a position of each node in the hierarchy of nodes. |
| US09280568B2 |
Zero downtime schema evolution
A method for updating a database schema may include maintaining a database, database schema and a first version of an application. The method may include generating application schema for the first version of the application, the application schema including a mapping of one or more classes of the application to a respective table in the database. The method may include executing the first version of the application and storing an application data object in the database in accordance with the application schema. While the first version of the application is executing, the method may include receiving a request to update the first version of the application to a different version, identifying application metadata for the different version of the application, comparing the application metadata for the different version of the application with the database schema for the database, and updating the database schema based on the comparison. |
| US09280567B2 |
Technique for structuring a navigation database
A technique of structuring a navigation database is provided, wherein the navigation database includes at least route link data for a predetermined geographic area. A method implementation of the technique includes organizing route link data associated with the predetermined geographic area into at least one routing cluster; providing the at least one routing cluster with a cluster identifier; and storing the at least one routing cluster together with the cluster identifier in the navigation database. |
| US09280553B2 |
Method to delay locking of server files on edit
A server is implemented with a modified file open action, which, when a user performs the modified open, initially opens a file without locking the file. When a user indicates (either explicitly or implicitly) that the user is attempting to or intending to open the file, the file can then be locked for editing. In this way, the default action when a user requests a file is to open the file without denying other users access to the file. Then, when the user indicates that editing should occur, the lock for the file is obtained. |
| US09280547B2 |
System and method for displaying and operating multi-layered item list in browser with supporting of concurrent users
Support of end-user to view and operate computing resources through logically organized and graphically represented multi-layered item list (“hierarchical list”) has been fully realized on native window based computer user work environment with modern operating system such as Windows Explore of Microsoft. The present invention has implemented such a hierarchical list to represent structured resources, such as for a central controlled distributed scalable virtual machine (CCDSVM), and to be displayable and operable via a browser on an end-user device for user to access and manage the actual structured resources. The implementation of the hierarchical list is accomplished by creating the hierarchical list in memory to mirror the actual structure resource, where the mirrored hierarchical list is sent to the end-user device, where the end-user device executes the browser to display the hierarchical list to allow the user to access the actual structured resources via the displayed hierarchical list. |
| US09280544B2 |
Methods, systems, and computer program products for automatically associating data with a resource as metadata based on a characteristic of the resource
Methods, systems, and computer program products for automatically associating data with a resource as metadata based on a characteristic of the resource are disclosed. According to one method, a metadata association rule is defined for a metadata associator. The metadata association rule specifies a data value to be associated with a resource as metadata based on a characteristic of the resource. A user interface is provided for associating at least one resource with a metadata associator. In response to a resource being associated with the metadata associator via a user interface, the data value is associated with the resource as metadata based on the metadata association rule. The specified data value may be defined prior to the resource being associated with the metadata and independently of both the resource and a file system with which the resource is associated. |
| US09280535B2 |
Natural language querying with cascaded conditional random fields
A natural language query tool comprising cascaded conditional random fields (CRFs) (e.g., a linear-chain CRF and a skip-chain CRF applied sequentially) processes natural language input to produce output that can be used in database searches. For example, cascaded CRFs extract entities from natural language input that correspond to column names or column values in a database, and identify relationships between the extracted entities. A search engine can execute queries based on output from the cascaded CRFs over an inverted index of a database, which can be based on one or more materialized views of the database. Results can be sorted (e.g., according to relevance scores) and presented in a user interface. |
| US09280532B2 |
System and method for accessing rich objects via spreadsheets
One embodiment of the present invention sets forth a method for providing access to a data object from within a spreadsheet included in a spreadsheet application. The method includes associating the data object with a first cell of the spreadsheet, wherein the data object is related to a parameter, and the first cell is identified by a cell reference, receiving an input that is related to a second cell of the spreadsheet and includes an expression that specifies the parameter and the first cell reference, and replacing the first cell reference specified by the expression with the data object, wherein a value for the second cell may be determined by applying the parameter to the data object specified in the expression. |
| US09280519B1 |
Methods and systems for early stop simulated likelihood ratio test
A method for modeling a set of observed data comprises selecting a reference model and an alternative model as possible descriptions of the set of observed data, and storing an index function for measuring fit of models to data. The method further includes performing, by one or more processors, a simulated threshold-fitting for a first of the two models, deriving an initial simulated index for the second model for fitting the second model to the simulated data, and deriving an initial boundary for simulated index difference including calculating a difference between the threshold-fit simulated index for the first model and the initial simulated index for the second model. The method further includes determining, based on a comparison, whether to update a counter used in calculating a simulated p-value, and selecting, based on the simulated p-value, one of the reference and alternative models for modeling the set of observed data. |
| US09280512B2 |
Computerized system and method for remote access to a computer program
A computerized system for remote access to a computer program, the system comprising a computerized segmenting tool to create a segmented representation of a computer program by creating virtual objects that correspond to objects of the program and clustering the virtual objects to segments of the segmented representation and a remote access application to receive information about the segmented representation from the segmenting tool and to display the segments of the segmented representation, wherein each segment is controllable separately. |
| US09280503B2 |
Round robin arbiter handling slow transaction sources and preventing block
In an embodiment, an arbiter may implement a deficit-weighted round-robin scheme having a delayed weight-reload mechanism. The delay may be greater than or equal to a ratio of the fabric clock to a slower clock associated with one or more sources that have no transactions but that have unconsumed weights (or another measure of difference in transaction rate). If a transaction is provided from the one or more sources during the delay, the reload of the weights may be prevented. In some embodiments, the arbiter may be augmented to improve usage of the bandwidth on an interface in which some transactions may be limited for a period of time. The arbiter may implement a first pointer that performs round robin arbitration. If the first pointer is indicating a source whose transaction is temporarily blocked, a second pointer may search forward from the current position of the main pointer to locate a non-blocked transaction. |
| US09280500B2 |
Method and apparatus for preventing stack overflow in embedded system
Provided is a method and apparatus for preventing a stack overflow in an embedded system. The method of preventing a stack overflow includes: reading a maximum stack usage of at least one function for executing a requested operation from maximum stack usages of functions provided from a kernel, which are stored in advance; and processing the requested operation on the basis of the read maximum stack usage of the at least one function and a size of a usable region in a stack for the requested operation. Accordingly, the stack overflow can be prevented without generating a run-time overhead. |
| US09280499B2 |
Memory arbitrator for electronics communications devices
Embodiments of the invention include electronic communications devices having a memory in near field communication device, a memory arbitrator and a host processor. The near field communication (NFC) devices are configured to receive data and drive power from the communication signal. The memory arbitrator is connected to the NFC device and the memory. The memory arbitrator is also configured to access the memory in response to an access request from the NFC device. Additionally, the memory is configurable to be accessed by both the host processor and the NFC device according to embodiments of the present invention. |
| US09280496B2 |
Formal verification of arbiters
A computer-implement method, computerized apparatus and computer program product for formal verification of an arbiter design. The method comprising: performing formal verification of an arbiter design, wherein the arbiter design is based on an original arbiter design comprising a fairness logic and an arbitration logic, wherein the arbiter design comprising the arbitration logic and a portion of the fairness logic; and wherein the formal verification is performed with respect to a multi-dimensional Complete Random Sequence (CRS) having two or more dimensions. |
| US09280494B2 |
System method for associating an application runnng on computing system by selectively altering an attribute of the input and output of connected peripheral device
A method on a computing system for associating an output of a coupled peripheral device to an input of the peripheral device is provided. A computing system configured to be coupled to a peripheral device comprising an input and an associated output is provided. The computing system comprises an input logical layer configured to receive descriptor configuration information from the peripheral device and build interface sets including attributes of the input of the peripheral device and the associated output. The input logical layer uses the interface sets to select and set attributes of the output of the peripheral device. |
| US09280492B2 |
System and method for a load instruction with code conversion having access permissions to indicate failure of load content from registers
Embodiments of an invention for a load instruction for code conversion are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction having a source operand to indicate a source location and a destination operand to indicate a destination location. The execution unit is to execute the instruction. Execution of the instruction includes checking the access permissions of the source location and loading content from the source location into the destination location if the access permissions of the source location indicate that the content is executable. |
| US09280491B2 |
System and method for regulating access to memory mapping information at a memory management unit
A first storage location at a memory management unit stores physical address information mapping logical physical addresses to actual physical addresses. A second storage location stores an allowed address range of actual physical addresses. A memory management unit determines whether a write access to the first storage location is allowable. The access is to store memory mapping information relating to a first actual physical address. The memory management unit prevents the write access if the first actual physical address is not in the allowed address range, and does not prevent the write access if the first actual physical address is in the allowed address range. The memory management unit prevents a write access to the second storage location by a process that is not running in a hypervisor mode. |
| US09280489B2 |
Wait-free parallel data cache
A system and method for managing a data cache in a central processing unit (CPU) of a database system. A method executed by a system includes the processing steps of adding an ID of a page p into a page holder queue of the data cache, executing a memory barrier store-load operation on the CPU, and looking-up page p in the data cache based on the ID of the page p in the page holder queue. The method further includes the steps of, if page p is found, accessing the page p from the data cache, and adding the ID of the page p into a least-recently-used queue. |
| US09280486B2 |
Managing memory pages based on free page hints
A host selects a memory page that has been allocated to a guest for eviction. The host may be a host machine that hosts a plurality of virtual machines. The host accesses a bitmap maintained by the guest to determine a state of a bit in the bitmap associated with the memory page. The host determines whether content of the memory page is to be preserved based on the state of the bit. In response to determining that the content of the memory page is not to be preserved, the host discards the content of the memory page. |
| US09280485B2 |
Efficient cache volume sit scans
A processor, operable in a computing storage environment, allocates portions of a Scatter Index Table (SIT) disproportionately between a larger portion dedicated for meta data tracks, and a smaller portion dedicated for user data tracks, and processes a storage operation through the disproportionately allocated portions of the SIT using an allocated number of Task Control Blocks (TCB). |
| US09280483B1 |
Rebranding a portable electronic device while maintaining user data
A portable electronic device may be rebranded, this rebranding may cause a plurality of data files in a user memory partition on the portable electronic device to be deleted when the device is returned to factory settings or otherwise wiped during the rebranding. Rebranding may be desirable in order for the user to receive better and/or more cost-effective services from a telecommunications service provider. Therefore, a user may want to rebrand their device without losing the data in the user memory partition. The user may specify or configure the device to copy or move the plurality of data to a carrier memory partition or a system memory partition on the device, or to a remote server, or to a removable memory such as an SD card. |
| US09280480B2 |
Extract target cache attribute facility and instruction therefor
A facility and cache machine instruction of a computer architecture for specifying a target cache cache-level and a target cache attribute of interest for obtaining a cache attribute of one or more target caches. The requested cache attribute of the target cache(s) is saved in a register. |
| US09280479B1 |
Multi-level store merging in a cache and memory hierarchy
A memory system having increased throughput is disclosed. Specifically, the memory system includes a first level write combining queue that reduces the number of data transfers between a level one cache and a level two cache. In addition, a second level write merging buffer can further reduce the number of data transfers within the memory system. The first level write combining queue receives data from the level one cache. The second level write merging buffer receives data from the first level write combining queue. The level two cache receives data from both the first level write combining queue and the second level write merging buffer. Specifically, the first level write combining queue combines multiple store transactions from the load store units to associated addresses. In addition, the second level write merging buffer merges data from the first level write combining queue. |
| US09280477B2 |
Data storage management in a memory device
The disclosure is related to systems and methods of managing data storage in a memory device. In a particular embodiment, a method is disclosed that includes receiving, in a data storage device, at least one data packet that has a size that is different from an allocated storage capacity of at least one physical destination location on a data storage medium in the data storage device for the at least one data packet. The method also includes storing the at least one received data packet in a non-volatile cache memory prior to transferring the at least one received data packet to the at least one physical destination location. |
| US09280476B2 |
Hardware stream prefetcher with dynamically adjustable stride
An apparatus may include a first memory, a control circuit, a first address comparator and a second address comparator. The first memory may store a table, which may include an expected address of a next memory access and an offset to increment a value of the expected address. The control circuit may read data at a predicted address in a second memory and store the read data in a cache. The first and second address comparators may determine if a value of a received address is between the value of the expected address and the value of the expected address minus a value of the offset. The control circuit may also modify the value of the offset responsive to determining the value of the received address is between the value of the expected address and the value of the expected address minus the value of the offset. |
| US09280475B2 |
Variable updating device and variable updating method
A procedure, which is performed by a processor of a variable updating device, includes: (a) judging whether or not the cache set is a cache set selected in advance; (b) in a case in which the corresponding cache set is judged to be the cache set selected in advance, judging which of (1) a hit and (2) a miss has occurred; and (c) carrying out a first processing that, in a case in which it is judged that the miss has occurred, updates a miss variable that expresses a number of times that misses have occurred and stores the address information in the storage portion, and a second processing that, in a case in which it is judged that the hit has occurred, updates a hit variable that expresses a number of times that hits have occurred. |
| US09280474B2 |
Adaptive data prefetching
A system and method for adaptive data prefetching in a processor enables adaptive modification of parameters associated with a prefetch operation. A stride pattern in successive addresses of a memory operation may be detected, including determining a stride length (L). Prefetching of memory operations may be based on a prefetch address determined from a base memory address, the stride length L, and a prefetch distance (D). A number of prefetch misses may be counted at a miss prefetch count (C). Based on the value of the miss prefetch count C, the prefetch distance D may be modified. As a result of adaptive modification of the prefetch distance D, an improved rate of cache hits may be realized. |
| US09280470B2 |
Cache replacement for shared memory caches
An information processing system and computer program storage product for managing objects stored in a shared memory cache. The system includes at least a plurality of cache readers accessing data from the shared memory cache. The system updates data in the shared memory cache using a cache writer. The system maintains a cache replacement process collocated with a cache writer. The cache replacement process makes a plurality of decisions on objects to store in the shared memory cache. Each of the plurality of cache readers maintains information on frequencies with which it accesses cached objects. Each of the plurality of cache readers communicates the maintained information to the cache replacement process. The cache replacement process uses the communicated information on frequencies to make at least one decision on replacing at least one object currently stored in the shared memory cache. |
| US09280468B2 |
Three channel cache-coherency socket protocol
A system and method are disclosed for communicating coherency information between initiator and target agents on semiconductor chips. Sufficient information communication to support full coherency is performed through a socket interface using only three channels. Transaction requests are issued on one channel with responses given on a second. Intervention requests are issued on the same channel as transaction responses. Intervention responses are given on a third channel. Such an approach drastically reduces the complexity of cache coherent socket interfaces compared to conventional approaches. The net effect is faster logic, smaller silicon area, improved architecture performance, and a reduced probability of bugs by the designers of coherent initiators and targets. |
| US09280467B1 |
Metadata flushing using additive increase and multiplicitive decrease to determine a number of IO processes used
A method and a system to dynamically determine how much of the total IO bandwidth may be used for flushing dirty metadata from the cache to the main memory without increasing the host memory access latency time, includes increasing the number of IO processes by adding a number of IO processes at short intervals and measuring host latency. If the host latency is acceptable, then increasing the number of IO processes again by the same number, and repeating until the host latency period reaches a limit. When the limit has been reached, reducing the number of IO processes by a multiplicative factor, and repeating the additive process from the reduced number of IO processes. The number of IO processes used for flushing dirty metadata may resemble a series of saw teeth, rising gradually and declining rapidly in response to the number of host IO processes needed. |
| US09280466B2 |
Information processing device including memory management device managing access from processor to memory and memory management method
A device according to an example of the invention comprises a section which accepts a write destination logical address and write target data from a processor, the write destination logical address indicating a write position to write the write target data into a composite memory which includes a first memory and a nonvolatile second memory, a section which determines a write destination physical address corresponding to the write destination logical address so that the number of times of access to the second memory is smaller than the number of times of access to the first memory, a section which stores, in a storage section, address conversion data associating the write destination logical address with the write destination physical address, and a section which writes the write target data into a position in the composite memory indicated by the write destination physical address. |
| US09280460B2 |
Data writing method, memory control circuit unit and memory storage apparatus
A data writing method for a rewritable non-volatile memory module having a plurality of physical erasing units, and a memory control circuit unit and the memory storage apparatus are provided. The method includes grouping the physical erasing units into at least a data area, a backup area and a spare area; and setting a value obtained by summing a minimum threshold and a predetermined number as a garbage collecting threshold. The data writing method also includes getting at least one physical erasing unit from the spare area, writing data into the gotten physical erasing unit, associating the gotten physical erasing unit with the backup area and re-adjusting the garbage collecting threshold according to the number of physical erasing units associated with the backup area and the minimum threshold. |
| US09280458B2 |
Reclaiming memory pages in a computing system hosting a set of virtual machines
A technique reclaims memory pages in a virtualization platform. The technique involves receiving, by a virtual machine of the virtualization platform, an inflate command which directs a balloon driver of the virtual machine to inflate. The technique further involves issuing, by the virtual machine and in response to the inflate command, a sweep request to a hypervisor. The sweep request directs the hypervisor to (i) perform a scan of memory pages allocated to the virtual machine for a predetermined pattern of characters, (ii) de-allocate memory pages having the predetermined pattern of characters from the virtual machine (e.g., zeroed pages), the de-allocated memory pages including super pages and regular pages, and (iii) update a list of memory page mappings to reflect the de-allocated memory pages. The technique further involves completing balloon driver inflation after the list of memory page mappings is updated. |
| US09280456B2 |
Mapping between program states and data patterns
The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes mapping a data pattern to a number of program state combinations L corresponding to a group of memory cells configured to store a fractional number of data units per cell. The mapping can be based, at least partially, on a recursive expression performed in a number of operations, the number of operations based on a number of memory cells N within the group of memory cells and the number of program state combinations L. |
| US09280455B2 |
Memory control device, non-volatile memory, and memory control method
Provided is a memory control device, including a write control unit that sequentially designates a memory block, a write processing unit that writes write data in the designated memory block, a verifying unit that reads read data from the memory block and verifies whether or not the read data matches the write data for each of a plurality of memory cells, a retry inhibiting unit that inhibits a retry process from being performed in a memory cell in which the read data matches the write data among the plurality of memory cells, and a retry control unit that designates at least some memory blocks among the plurality of memory blocks and simultaneously executes the retry process when the read data does not match the write data in any one of the plurality of memory cells in which all the write data is written. |
| US09280454B1 |
Method and system for re-ordering bits in a memory system
A method and system for re-ordering bits in a memory system is disclosed. The memory system includes a system on a chip (SoC) coupled to a plurality of memory chips. Each of the memory chips including a memory array, multipurpose registers (MPRs) coupled to the memory array; and a data bus coupled between the SoC and the memory array. The method and system comprise utilizing the MPRs within each of the plurality of memory chips to determine bit ordering within each byte lane of memory array of the associated memory chip. The method and system further includes providing the determined bit ordering to the SoC. |
| US09280453B1 |
Method and system for test automation framework for backup and recovery applications
A method and system for test automation framework for backup and recovery applications is described. Initial data states are prepared for corresponding system components for a test host. A backup and recovery application is executed to store backup copies corresponding to the system components to a storage device. The initial data states are modified to modified data states corresponding to the system components. The backup and recovery application is executed to recover the backup copies from the storage device. The test host is rebooted based on recovering the backup copies. A comparison is output, via an output device, of the system components in the test host to the initial data states. |
| US09280452B1 |
Systems and methods for generating test cases
This disclosure relates to systems and methods for generating test cases. In one embodiment, a method is provided that may include identifying, by a computer including one or more processors, a first test event associated with a first user interaction with a first test device. The first user interaction may include interaction with a first display displaying a plurality of applications on the first test device. The method may also include determining, by the computer, at least one first view in which the first test event occurs. Furthermore, the method may include determining, based at least in part on the first test event, a first state of the first test device. Additionally, the method may include storing information about the first test event, the at least one first view, and the first state of the first test device in a first test case. |
| US09280451B2 |
Testing device
A testing device for evaluating operations of software installed in a mobile terminal includes a scenario selecting unit configured to select a scenario that includes information for causing the mobile terminal to execute a function that should be operated by the mobile terminal, a scenario execution determining unit configured to determine whether the scenario selected by the scenario selecting unit is executable, a scenario execution unit configured to execute the scenario determined to be executable by the scenario execution determining unit, and a scenario execution result determining unit configured to determine whether an execution result of the scenario executed by the scenario execution unit is the same as a result expected beforehand. The scenario execution determining unit determines whether the scenario selected by the scenario selecting unit is executable based on the execution result of the scenario executed by the scenario execution unit in the past. |
| US09280448B2 |
Controlling operation of a run-time instrumentation facility from a lesser-privileged state
Aspects relate to enabling and disabling execution of a run-time instrumentation facility. An instruction for execution by the processor in a lesser privileged state is fetched by the processor. It is determined, by the processor, that the run-time instrumentation facility permits execution of the instruction in the lesser-privileged state and that controls associated with the run-time instrumentation facility are valid. The run-time instrumentation facility is disabled based on the instruction being a run-time instrumentation facility off (RIOFF) instruction. The disabling includes updating a bit in a program status word (PSW) of the processor to indicate that run-time instrumentation data should not be captured by the processor. The run-time instrumentation facility is enabled based on the instruction being a run-time instrumentation facility on (RION) instruction. The enabling includes updating the bit in the PSW to indicate that run-time instrumentation data should be captured by the processor. |
| US09280444B2 |
System and method for identifying contention of shared resources in a runtime system
A system and computer-implemented method for determining a runtime of a thread of an application. Synchronization events for a first thread of an application executing on the computer system are received, the synchronization events including at least a first synchronization event and a second synchronization event for the first thread. A first difference between a synchronization event timestamp of the first synchronization event and the synchronization event timestamp of the second synchronization event is calculated. A second difference between an accumulated timestamp of the first synchronization event and the accumulated timestamp of the second synchronization event is calculated. A runtime of the first thread of the application is calculated as a difference between the first difference and the second difference. |
| US09280443B2 |
Dashboard performance analyzer
Described herein is a technology for a dashboard used for visualizing data. In some implementations, a dashboard with one or more dashboard item is provided. Performance of the dashboard is evaluated to determine a load time of the dashboard. Possible suggestions for improving performance of the dashboard are provided if performance issues are determined from evaluating performance of the dashboard. |
| US09280437B2 |
Dynamically scalable real-time system monitoring
Methods, computer readable media, and apparatuses for dynamically scalable real-time system monitoring are presented. For example, according to one aspect, multiple performance metrics are received from multiple performance metric collection agents. At least some of the performance metrics are identified based on an association with a common entity. The identified performance metrics are utilized to evaluate whether performance conditions specified by rules associated with the common entity have been satisfied. Responsive to evaluating that a performance condition has been satisfied, an alert is generated and communicated to one or more subscriber devices associated with the common entity. |
| US09280430B2 |
Deferred replication of recovery information at site switchover
Methods, systems, and computer program products for providing deferred replication of recovery information at site switchover are disclosed. A computer-implemented method may include receiving a first copy of logged data for storage volumes of a disaster recovery (DR) partner at a remote site from the DR partner, receiving a request to perform a site switchover from the remote site to the local site, receiving a second copy of logged data for the storage volumes from a local high availability (HA) partner in response to the switchover, and recovering the storage volumes locally by applying one or more of the copies of logged data to corresponding mirrored storage volumes at the local site. |
| US09280429B2 |
Power fail latching based on monitoring multiple power supply voltages in a storage device
The various embodiments described herein include systems, methods and/or devices used to enable power fail latching based on monitoring multiple power supply voltages in a storage device. In one aspect, the method includes: (1) determining whether a first power supply voltage provided to the storage device is out of range for a first time period, (2) determining whether a second power supply voltage provided to the storage device is out of range for a second time period, and (3) in accordance with a determination that at least one of the first power supply voltage is out of range for the first time period and the second power supply voltage is out of range for the second time period, latching a power fail condition. |
| US09280428B2 |
Method for designing a hyper-visor cluster that does not require a shared storage device
A system for storing and processing information comprises a plurality of nodes, each node comprising: a local information storage medium; a data connection configured to connect to at least one linked client; and a processor configured to process information in the local information storage medium and send processed information to the at least one linked client, and a secondary shared storage medium connected to the plurality of nodes via a shared data connection and configured to store information copied from the local information storage medium of each of the plurality of nodes, wherein each of the nodes in the plurality of nodes is configured, in the event of failure of a failed one of the plurality of nodes, to connect to the at least one linked client corresponding to the failed one of the plurality of nodes. |
| US09280426B2 |
System and method for server redundancy
A system is provided. The system includes a plurality of nodes. One of the plurality of nodes is designated as a server node, and the others of the plurality of nodes are designated as Human Machine Interface (HMI) client nodes. The designated server node comprises a network interface configured to communicate with a Programmable Logic Controller (PLC) either directly or through a network switch. Each of the designated HMI client nodes includes a network interface configured to communicate with the designated server node through one or more of a network switch, and another designated HMI client node. Also, the each of the designated HMI client nodes includes a failover module configured to detect a failure of the designated server node and designate a new server node from among the designated HMI client nodes based on detecting the failure of the designated server node. |
| US09280424B2 |
Methods for synchronizing storage system data
In accordance with one example, a method for comparing data units is disclosed comprising generating a first digest representing a first data unit stored in a first memory. A first encoded value is generated based, at least in part, on the first digest and a predetermined value. A second digest representing a second data unit stored in a second memory different from the first memory, is generated. A second encoded value is derived based, at least in part, on the second digest and the predetermined value. It is determined whether the first data unit and the second data unit are the same based, at least in part, on the first digest, the first predetermined value, the first encoded value, and the second digest, by first processor. If the second data unit is not the same as the first data unit, the first data unit is stored in the second memory. |
| US09280415B2 |
Semiconductor device, semiconductor system and control method of semiconductor device
A semiconductor device includes a mode register set suitable for generating a first internal control signal and a second internal control signal, a per-DRAM addressability (PDA) driving unit suitable for resetting the mode register set in response to the first internal control signal and an input value of data inputted through a data pad, and a cycle redundancy check (CRC) driving unit suitable for performing a CRC operation by checking whether or not data are correctly inputted through the data pad without an error in response to the first internal control signal and the second internal control signal. |
| US09280414B2 |
Combination of error correction and error detection for transmitting digital data
The invention relates to a method for transmitting digital data, in particular in automation technology, in which a digital code word (R) received via a channel is corrected and verified as to its validity by means of a channel decoder (7), and an invalid code word is rejected and optionally requested once again, while a valid code word (C″) is further processed. If a metric (8) is cumulatively used with an encoding process, the probability of remaining bit errors in the whole method can be significantly reduced, thus making it possible to use the method in automation technology. |
| US09280411B2 |
Method to identify unique host applications running within a storage controller
A method for operating a controller includes receiving a command associated with at least one operation, determining a CPU channel path based on the received command, determining a unique job identifier based on the received command, and determining a state based on the received command. In addition, the method includes updating at least one data matrix based on the determined state, unique job identifier and CPU channel path and operating the controller based on the updated data matrix. |
| US09280410B2 |
Method and system for non-intrusive monitoring of library components
Embodiments of the present invention provide a method for monitoring components in a library by tracking the movement of library components. By tracking the movement of library components, the degradation of library components can be monitored and the reliability of library components determined, allowing unreliable components to be bypassed or replaced, enhancing the reliability of the library and preventing data loss. |
| US09280409B2 |
Method and system for single point of failure analysis and remediation
Embodiments of the present invention disclose a method and system for single point of failure analysis (SPOF) and remediation. According to one embodiment, a SPOF analysis is performed based on component configuration information associated with a plurality of system components. Based on the SPOF analysis, at least one SPOF component is identified. In addition, remediation information for the identified SPOF is computed based on the component configuration information. The result of the SPOF analysis and the remediation information are then displayed to an operating user. |
| US09280408B2 |
System and method for subscribing for internet protocol multimedia subsystems (IMS) services registration status
A system and method that allows mobile device applications to receive changes in registration status from application services that are accessed via an Internet Protocol Multimedia Subsystem (IMS). Applications on a mobile device subscribe to receive notifications of changes in registration status for requested services. When a change to the registration status of a service occurs, a notification message is transmitted to the application on the mobile device. Notifications of changes in status are thereby received by each application on a per-application-service basis. In some embodiments, when a request to register with an application service fails, the corresponding notification message includes a reason for the failure. In some embodiments, notification messages are originated by a registration manager that operates in the IMS and transmitted to an IMS client operating on a mobile device. In some embodiments, notification messages are originated by each application service and transmitted directly to subscribed applications. |
| US09280405B2 |
Error correction for powerline communication modem interface
A powerline communication (PLC) power supply and modem interface can be implemented using a power supply processing unit coupled with a PLC modem unit. The power supply processing unit generates a composite PLC signal comprising a PLC signal and a DC power signal modulated with a zero cross signal (all determined from an AC powerline signal). High-powered components of the PLC modem unit can cause signal distortion in the zero cross signal component of the composite PLC signal making it difficult to extract zero cross information. An error correction unit can be implemented at the PLC modem unit to minimize the signal distortion and generate a zero cross signal with little or no error. The PLC modem unit also extracts the PLC signal and the DC power signal from the composite PLC signal, and processes the PLC signal using the zero cross information extracted from the corrected zero cross signal. |
| US09280403B2 |
Node including a CPU which is connected to other nodes constituting a computer system
To facilitate changing a system configuration and allow having high redundancy in a computer system connecting a plurality of nodes. A node includes a CPU and constitutes a computer system. The node executes one or more processes and including predetermined functions. The node includes a shared memory that stores system information including process information related to each process executed by each node, in a state accessible from each process of its own node. In the node, the system information including the process information related to each process of its own node is multicast to the other nodes. A shared memory control process of the node receives the system information multicast from the other nodes and stores the system information in the shared memory. |
| US09280402B2 |
System and method for updating a dual layer browser
A method and system are provided for updating a dual layer browser which displays a hierarchy of nodes. The method or system provides a first layer or “browser provider” which receives various changed data notifications, determines which changed data notifications affect the current browser display, and sends the required notifications to a second layer or “browser.” The browser then makes the necessary adjustments to the current display. |
| US09280399B2 |
Detecting, monitoring, and configuring services in a netwowk
A services tool can detect, monitor, and manage software providing services in and for the network. The services tool can identify different types of software that provides services for the network (“services software”) and types of software that provide support (“support software”) to the services software. The services tool can determine configuration data for both the services software and the support software. The services tool can automatically identify when particular services software needs to be linked to particular support software. The services tool can configure the services software and/or support software to link the two according to the rules. |
| US09280398B2 |
Major branch instructions
Major branch instructions are provided that enable execution of a computer program to branch from one segment of code to another segment of code. These instructions also create a new stream of processing at the other segment of code enabling execution of the other segment of code to be performed in parallel with the segment of code from which the branch was taken. In one example, the other stream of processing starts a transaction for processing instructions of the other stream of processing. |
| US09280396B2 |
Lock state synchronization for non-disruptive persistent operation
Techniques for synchronization between data structures for original locks and mirror lock data structures are disclosed herein. The mirror lock data structures are being maintained during various scenarios including volume move and aggregate relocation, in order to preserve the non-disruptive persistent operation on storage initiated by clients. According to one embodiment, a storage node determines a plurality of data container locks to be synchronized to a partner node of the storage node and transfers metadata that indicates states of variables that represent the plurality of data container locks to the partner node in a batch. When a client initiates a data access operation that causes an attempt to modify a data container lock of the plurality of data container locks, the storage node sends a retry code to a client that prompts the client to retry the data access operation after a predetermined time period. |
| US09280395B2 |
Runtime dispatching among a heterogeneous group of processors
Systems, apparatus, articles, and methods are described including operations for runtime dispatching among a heterogeneous group of processors. |
| US09280393B2 |
Processor provisioning by a middleware processing system for a plurality of logical processor partitions
A middleware processor provisioning process provisions a plurality of processors in a multi-processor environment. The processing capability of the multiprocessor environment is subdivided and multiple instances of service applications start protected processes to service a plurality of user processing requests, where the number of protected processes may exceed the number of processors. A single processing queue is created for each processor. User processing requests are portioned and dispatched across the plurality of processing queues and are serviced by protected processes from corresponding service applications, thereby efficiently using available processing resources while servicing the user processing requests in a desired manner. |
| US09280389B1 |
Preemptive operating system without context switching
A device, such as a constrained device that includes a processing device and memory, schedules user-defined independently executable functions to execute from a single stack common to all user-defined independently executable functions according to availability and priority of the user-defined independently executable functions relative to other user-defined independently executable functions and preempts currently running user-defined independently executable function by placing the particular user-defined independently executable function on a single stack that has register values for the currently running user-defined independently executable function. |
| US09280387B2 |
Systems and methods for assigning code lines to clusters with storage and other constraints
In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for assigning code lines to clusters with storage and other constraints in an on-demand service environment including, for example, receiving as input, a plurality of code lines for test within a host organization; determining available resource capacity for each of a plurality of clusters within the host organization; determining required resource capacity for each of the plurality of code lines for test within the host organization; sorting the plurality of clusters according to the determined available resource capacity for each; sorting the plurality of code lines according to the determined required resource capacity for each; and allocating the plurality of code lines amongst the plurality of clusters based on the sorting of the plurality of clusters and based further on the sorting of the plurality of code lines. Other related embodiments are disclosed. |
| US09280384B2 |
Method, server and system for processing task data
Various embodiments provide methods, servers, and systems for processing task data. In an exemplary method, a task-data-processing request sent by a client can be received. The task-data-processing request can contain a type identifier of task data. The type identifier of the task data can include a daily-task-data identifier, a mainline-task-data identifier, a random-task-data identifier, or a combination thereof. The task data corresponding to the type identifier of the task data can be processed to generate processing results, according to the type identifier of the task data and a preset processing scheme corresponding to each type of the task data. The processing results can be returned to the client. |
| US09280383B2 |
Checkpointing for a hybrid computing node
According to an aspect, a method for checkpointing in a hybrid computing node includes executing a task in a processing accelerator of the hybrid computing node. A checkpoint is created in a local memory of the processing accelerator. The checkpoint includes state data to restart execution of the task in the processing accelerator upon a restart operation. Execution of the task is resumed in the processing accelerator after creating the checkpoint. The state data of the checkpoint are transferred from the processing accelerator to a main processor of the hybrid computing node while the processing accelerator is executing the task. |
| US09280381B1 |
Execution framework for a distributed file system
A computer program product, apparatus and method comprising representing a worldwide job tracker, and representing worldwide task trackers; the worldwide task trackers communicatively coupled to the worldwide job tracker; wherein the worldwide job tracker is enabled to execute a worldwide job by distributing the job across the world wide task trackers. |
| US09280378B2 |
Adjustment during migration to a different virtualization environment
An installer installing an operating system on a host computer system detects that the operating system is to be run under a hypervisor, and causes at least one configuration parameter of the operating system to be adjusted based on the hypervisor. A migration tool migrating a virtual machine from one hypervisor to another hypervisor, identifies the types of the two hypervisors, the operating system used by the virtual machine, and causes at least one configuration parameter of the operating system to be adjusted based on the target hypervisor. |
| US09280373B1 |
Data transfer guide
Techniques to create and use a data transfer guide are disclosed. In various embodiments, at least a portion of application code comprising an application is executed in a virtual machine execution environment. An interaction between the application code executing in the virtual machine execution environment with a data entity included in a set of production data is observed programmatically. A data that represents the data entity is included in a data transfer guide at least in part programmatically. |
| US09280371B2 |
Utilizing client resources during mobility operations
A mechanism is provided n a data processing system for logical partition migration. Responsive to a virtual machine monitor initiating a logical partition migration operation to move a logical partition from a source system to a destination system, the mechanism reallocates a portion of processing resources from the logical partition to the virtual machine monitor. The virtual machine monitor uses the portion of processing resources to effect the logical partition migration operation. Responsive to completion of the logical partition migration operation, the mechanism returns the portion of processing resources to the logical partition. |
| US09280368B2 |
Function expanding method and mobile device adapted thereto
An expanded function supporting method and a mobile device adapted thereto are provided. The method includes receiving input signals for activating a user function related to a system installed to a mobile device, establishing a basic function supporting path used to operate the system when the user function is activated, and an expanded function supporting path to operate an expanded function of the system when an input signal for operating the expanded function is received, and transferring, when receiving an input signal for operating the expanded function, a command for operating the expanded function via the expanded function supporting path. |
| US09280366B2 |
Adaptive application of accessory device settings
A system for adaptive application of device settings is disclosed. In the system, a first device may receive information identifying settings that are applied to one or more second devices. The settings may correspond to interactions, by a user, with the one or more second devices over a period of time. The one or more second devices be may non-mobile devices associated with one or more facilities. The first device may determine information identifying one or more conditions, associated with environmental conditions or conditions associated with the user's mood or physical state, under which the settings are applied to the one or more second devices; store information that correlates the settings of the one or more second devices with the one or more conditions; determine that at least one of the one or more conditions is met; and apply the settings to the one or more second devices. |
| US09280363B1 |
Automatic mapping for cross-platform display
Mapping logic information associating a particular type of input with a particular response may be stored in memory. Data including information regarding a display of the host device may be received. Such information may be used to identify multiple descriptions of the host device display. Each description is mapped to a response based on the stored mapping logic. For example, a status bar may be used by the host device to show status updates. The map allows for a different type of response to status updates on the client device, such as a translucent pop-up window. Instructions may be generated for the client device, such that the client device response to input information is based on the mapped description. |
| US09280359B2 |
System and method for selecting a least cost path for performing a network boot in a data center network environment
A method is provided in one example embodiment and includes logging in to a multipath target via first and second boot devices instantiated on a network device, the first and second boot devices respectively connected to the multipath target via first and second paths; determining which of the first and second paths comprises a least cost path; and booting the operating system via the least cost path. The determining may include comparing network statistics of the first path with network statistics of the second path, the network statistics comprising at least one of packet loss on the path, errors encountered via the path, and congestion on the path. |
| US09280357B2 |
Configuration based on chassis identifications
Techniques for configuration are provided. A chassis ID identifies a chassis type. A device, such as a circuit board, may receive the chassis ID from the chassis. The device may be configured based on the chassis type. |
| US09280356B2 |
Live initialization of a boot device
Embodiments of the present invention are provided that include executing, by a processor, a software stack received from a first boot image, and retrieving and executing, by the processor, a second software stack. A writeable boot device such as a storage device with a removable medium is detected, and the second software stack is saved by replacing, on the writeable boot device, the first boot image with a second boot image comprising the second software stack. |
| US09280355B2 |
System with manual actuator for asserting physical presence across multiple compute nodes
A system includes a multi-node chassis including a chassis management module, a plurality of compute nodes, and a physical presence manual actuator for transmitting a physical presence signal to each compute node in response to manual actuation. Each server has a firmware interface, a trusted platform module, and an AND gate. The firmware interface has a general purpose input output pin for providing an enabling signal in response to a user instruction to a firmware interface setup program that communicates with the firmware interface. The AND gate has a first input receiving the enabling signal, a second input receiving the physical presence signal, and an output coupled to the trusted platform module, wherein the AND gate for a selected compute node asserts physical presence to the trusted platform module of the selected compute node in response to receiving both the enabling signal and the physical presence signal. |
| US09280352B2 |
Lookahead scanning and cracking of microcode instructions in a dispatch queue
An apparatus and method for avoiding bubbles and maintaining a maximum instruction throughput rate when cracking microcode instructions. A lookahead pointer scans the newest entries of a dispatch queue for microcode instructions. A detected microcode instruction is conveyed to a microcode engine to be cracked into a sequence of micro-ops. Then, the sequence of micro-ops is placed in a queue, and when the original microcode instruction entry in the dispatch queue is selected for dispatch, the sequence of micro-ops is dispatched to the next stage of the processor pipeline. |
| US09280351B2 |
Second-level branch target buffer bulk transfer filtering
Embodiments relate to second-level branch target buffer bulk transfer filtering. An aspect includes a system for second-level branch target buffer bulk transfer filtering. The system includes a first-level branch target buffer and a second-level branch target buffer coupled to a processing circuit. The processing circuit is configured to perform a method. The method includes receiving branch target buffer miss indicators, receiving instruction cache miss indicators, and recording information about the branch target buffer miss indicators and the instruction cache miss indicators in search trackers. Based on detecting, by the processing circuit, a search tracker representing a correlated pair of the branch target buffer miss indicators and the instruction cache miss indicators, the search tracker is activated by the processing circuit to perform a bulk transfer from the second-level branch target buffer to the first-level branch target buffer. |
| US09280350B2 |
Methods and apparatus to perform adaptive pre-fetch operations in managed runtime environments
Methods and apparatus to perform adaptive pre-fetch operations in managed runtime environments are disclosed herein. An example disclosed method includes determining an object size associated with a pre-fetch operation; comparing the object size to a first one of a series of thresholds having increasing respective values; when the object size is less than the first one of the series of thresholds, pre-fetching a first amount of stored data assigned to the first one of the series of thresholds; and when the object size is greater than the first one of the plurality of thresholds, comparing the object size to a next one of the series of thresholds. |
| US09280348B2 |
Decode time instruction optimization for load reserve and store conditional sequences
A technique is provided for replacing an atomic sequence. A processing circuit receives the atomic sequence. The processing circuit detects the atomic sequence. The processing circuit generates an internal atomic operation to replace the atomic sequence. |
| US09280346B2 |
Run-time instrumentation reporting
Embodiments of the invention relate to run-time instrumentation reporting. An instruction stream is executed by a processor. Run-time instrumentation information of the executing instruction stream is captured by the processor. Run-time instrumentation records are created based on the captured run-time instrumentation information. A run-time instrumentation sample point of the executing instruction stream on the processor is detected. A reporting group is stored in a run-time instrumentation program buffer. The storing is based on the detecting and the storing includes: determining a current address of the run-time instrumentation program buffer, the determining based on instruction accessible run-time instrumentation controls; and storing the reporting group into the run-time instrumentation program buffer based on an origin address and the current address of the run-time instrumentation program buffer, the reporting group including the created run-time instrumentation records. |
| US09280344B2 |
Repeated execution of instruction with field indicating trigger event, additional instruction, or trigger signal destination
A processor includes a plurality of execution units. At least one of the execution units is configured to repeatedly execute a first instruction based on a first field of the first instruction indicating that the first instruction is to be iteratively executed. |
| US09280340B2 |
Dynamically building an unstructured information management architecture (UIMA) pipeline
A pipeline development environment includes a toolset that includes a visual design editor. The editor comprises a display interface having a palette of known Annotators that may be selected by a developer. The pipeline development environment also includes or has associated therewith a data repository. The data repository stores datasets. A particular dataset is associated with an Annotator and comprises dependency data generated from execution of a pipeline (or some portion thereof). The repository typically stores datasets from many pipeline runs, including runs of other pipelines, multiple runs of a given pipeline with different inputs, etc. Using the editor, a developer creates a visual representation of the pipeline. As Annotators are added into the pipeline, system tooling dynamically generates the descriptor files and other configuration parameters (for the new pipeline), preferably based on the dependency data associated with the individual Annotators and retrieved from the repository. |
| US09280338B1 |
Dynamic application updates
In an application runtime environment, an application may have multiple components that are loaded at or prior to execution of the application. An online storage service is used to store up-to-date versions of the components, along with a source manifest that indicates version numbers of the up-to-date versions. Upon application startup, the application retrieves the source manifest to determine whether updated versions are available. Upon identifying updated versions, the application downloads the updated versions and loads or reloads them into the runtime environment prior to initiating the main functionality of the application. |
| US09280335B2 |
Semantically rich composable software image bundles
A composable software bundle is created by retrieving a semantic representation of a set of software modules. A functional representation of a set of operations is retrieved. Each operation in the set of operations is to be performed on the set of software modules during at least one virtual image life-cycle phase in a set of virtual image life-cycle phases. A set of artifacts including a set of executable instructions associated with the set of operations is identified. The semantic representation, the functional representation, and the set of artifacts, are stored in a composable software bundle. |
| US09280334B2 |
System, method and program product to manage installation of programs
A method for controlling execution of a script program programmed to install a computer program is disclosed. An installation computer begins execution of the script program, and before a line or stanza of the script program is executed to initiate installation of the computer program, the installation computer determines that the line or stanza is programmed to initiate installation of the computer program. In response, the installation computer determines if the computer program is already installed. If the computer program is already installed, the installation computer skips the line or stanza of the script program so the script program will not attempt to install the computer program. However, if not, the installation computer continues to execute the script program including the line or stanza programmed to initiate installation of the computer program, such that the script program attempts to install the computer program. |
| US09280330B2 |
Apparatus and method for executing code
An apparatus and method for executing code are provided. The apparatus includes a memory manager that allocates a stack in memory to store processed data that needs to be retained; a loop generator that divides program code programmed to be processed in parallel into regions based on a barrier function, transforms a region that includes the processed data that needs to be retained in the stack into a first coalescing loop, and transforms a region that uses the processed data stored in the stack into a second coalescing loop such that the transformed program code may be serially processed; and a loop changer that reverses a processing order of the second coalescing loop in comparison to a processing order of the first coalescing loop. |
| US09280328B2 |
Method for optimizing binary code in language having access to binary coded decimal variable, and computer and computer program
A method for optimizing binary code in a language having access to binary coded decimal variable. The method includes: generating a first compiler expression of the binary code; analyzing a use-definition and/or a definition-use for the first compiler expression; generating a second compiler expression by identifying logical binary coded decimal (BCD) variables in the first compiler expression; assigning temporary variables to the logical BCD variables, wherein the second compiler expression includes packed decimal operations and the assigned temporary variables; and converting a packed decimal operation in the second compiler expression and an assigned temporary variable to a decimal floating point (DFP) if sign information and precision information are not lost during conversion from BCD to DFP, wherein identifying logical BCD variables includes: in the use-definition and/or definition-use of operands, regarding an operand of definition and an operand of use as the same logical BCD variables. |
| US09280327B2 |
Simplifying development of user interfaces of applications
An aspect of the present invention simplifies development of user interfaces of applications. In one embodiment, specifications of user interfaces provided by applications are maintained, each specification containing interface definitions of UI elements in the corresponding user interface. A first user interface of a first application and a second user interface of a second application are displayed on a display unit. In response to receiving from a developer, an indication that a first UI element from the first user interface and a second UI element from the second user interface elements are to be included in a new user interface of a new application, a new specification for the new user interface incorporating the interface definitions of the first and second UI elements is created. |
| US09280316B2 |
Fast normalization in a mixed precision floating-point unit
A hardware circuit for returning single precision denormal results to double precision. A hardware circuit component configured to count leading zeros of an unrounded single precision denormal result. A hardware circuit component configured to pre-compute a first exponent and a second exponent for the unrounded single precision denormal result. A hardware circuit component configured to perform a second normalization of the rounded single precision denormal result back to architected format. |
| US09280315B2 |
Vector processor having instruction set with vector convolution function for fir filtering
A vector processor is provided having an instruction set with a vector convolution function. The disclosed vector processor performs a convolution function between an input signal and a filter impulse response by obtaining a vector comprised of at least N1+N2-1 input samples; obtaining N2 time shifted versions of the vector (including a zero shifted version), wherein each time shifted version comprises N1 samples; and performing a weighted sum of the time shifted versions of the vector by a vector of N1 coefficients; and producing an output vector comprising one output value for each of the weighted sums. The vector processor performs the method, for example, in response to one or more vector convolution software instructions having a vector input. The vector can comprise a plurality of real or complex input samples and the filter impulse response can be expressed using a plurality of coefficients that are real or complex. |
| US09280312B2 |
Smartpad—power management
A multi-display device is adapted to be dockable or otherwise associatable with an additional device. In accordance with one exemplary embodiment, the multi-display device is dockable with a smartpad. The exemplary smartpad can include a screen, a touch sensitive display, a configurable area, a gesture capture region(s) and a camera. The smartpad can also include a port adapted to receive the device. The exemplary smartpad is able to cooperate with the device such that information displayable on the device is also displayable on the smartpad. Furthermore, any one or more of the functions on the device are extendable to the smartpad, with the smartpad capable of acting as an input/output interface or extension of the smartpad. Therefore, for example, information from one or more of the displays on the multi-screen device is displayable on the smartpad. |
| US09280311B2 |
Communication system, information processing system, image forming apparatus and portable information terminal device
An image forming apparatus includes a first wireless communication unit that receives data from a mobile phone, and a reader-writer that transmits an address of the first wireless communication unit to the mobile phone. The mobile phone includes a contact/non-contact IC card that receives the address, and a second wireless communication unit that transmits image data to the first wireless communication unit utilizing the address. When communication is made between the mobile phone and the image forming apparatus, the address of the first wireless communication unit is transmitted to the contact/non-contact IC card through the reader-writer, and the second wireless communication unit transmits data to the first wireless communication unit utilizing the address. |
| US09280310B2 |
Information processing device and computer-readable recording medium providing first and second display screens with different background images
An information processing device may cause a display unit to display a first screen, in response to accepting an instruction for displaying the first screen. The first screen may include M pieces of first images indicating M pieces of data stored in a first storage unit of the information processing device and include a first background image. The information processing device may cause the display unit to display a second screen, in response to receiving, from a server device, N pieces of identification information for identifying N pieces of data stored in a second storage unit of the server device. The second screen may include N pieces of second images indicating the N pieces of identification information and include a second background image which is different from the first background image. |
| US09280309B2 |
Print function limiting method and print control apparatus
A setting information editing unit of a printer driver changes the print setting of an input print job. Upon changing the print setting, a print function is limited by inhibiting selection of the print function provided by the printer driver in accordance with a print authorization processed by a print authorization processing unit. Since the resetting process after inputting the print job to a print control apparatus is also subjected to print function limitation, the print function can be limited upon print job input. Hence, consistent print function limitation can be done. |
| US09280307B2 |
Information processing system, apparatus, and method
An information processing system includes first and second information processing apparatuses. The first information processing apparatus transmits a request for status notification to the second information processing apparatus, which transmits a response of the status notification to the first information processing apparatus. The second information processing apparatus transmits a header of the response to the first information processing apparatus when receiving the request for the status notification from the first information processing apparatus, and transmits a part of a body of the response to the first information processing apparatus in response to the occurrence of a status change to be reported in the second information apparatus. The part of the body includes information on the status change. The second information processing apparatus transmits a last part of the body of the response to the first information processing apparatus when the status notification becomes unnecessary. |
| US09280306B2 |
Generating image data in accordance with identification information
An information processing system includes an information management apparatus that accepts image generation requests and an image generation section that generates image data, which is provided independently of the information management apparatus. The information management apparatus issues a job ID in response to a print request from a client, and transmits the job ID and a URL of the image generation apparatus to the client. Based on the URL, the client directly requests the image generation apparatus for image data corresponding to the job ID. |
| US09280304B2 |
Method and system for configuring network printers
A print control system includes one or more first printers each having a print unit that can print on print media, a second printer that communicates with the first printers via a first network and has a print unit that can print on print media, and a print control server that connects to the second printer through a second network. The control print server sends, to the second printer, configuration control data containing attribute information that can be used to identify one of the first printers. The second printer forwards the configuration control data to the identified first printer and the identified first printer executes a configuration process in response to the configuration control data. |
| US09280302B2 |
Image forming apparatus that generates log image, image forming system, and non-transitory recording medium
An image forming apparatus of the present disclosure includes an image output unit, a nonvolatile storage unit, an original-image generating device, and a log-image generating device. The image output unit outputs an image. The nonvolatile storage unit stores information even in the event of a power interruption. The original-image generating device generates an original image in the nonvolatile storage unit. The log-image generating device generates a log image based on the original image. Further, when the image forming apparatus is started, if the original image is stored in the nonvolatile storage unit, the log-image generating device generates the log image based on the original image stored in the nonvolatile storage unit. |
| US09280301B2 |
Method and device for recovering erroneous data
A method for recovering erroneous data is disclosed, the method includes: when data in a storage block that is included in a solid state disk (SSD) is read, performing a first error check on data on a certain page of the storage block to acquire erroneous data on the page; if a first number of pieces of the erroneous data on the page is smaller than or equal to a preset first threshold, performing an error checking and correction (ECC) recovery on the data on the page; and if the first number is greater than the preset first threshold, acquiring data from spare space according to a storage position of the erroneous data on the page and a fixed entry corresponding to the storage block, and replacing the erroneous data on the page with the acquired data, where the fixed entry includes a storage position of each data stored in the spare space. |
| US09280299B2 |
Memory management schemes for non-volatile memory devices
A method includes storing data in a non-volatile memory that includes multiple memory blocks. At least first and second regions are defined in the non-volatile memory. A definition is made of a first over-provisioning ratio between a first logical address space and a first physical memory space of the first region, and a second over-provisioning ratio, different from the first over-provisioning ratio, between a second logical address space and a second physical memory space of the second region. Portions of the data are compacted, individually within each of the first and second regions and independently of the other region, by copying the portions from one or more source memory blocks to one or more destination memory blocks using the first and second over-provisioning ratios, respectively. |
| US09280291B2 |
Method for data accessing and memory writing for logic analyzer
A method of fetching digital data and writing the digital data into a memory of a logic analyzer, which comprises the steps: designate at least a first region and a second region in a memory; set a first triggering condition and a second triggering condition; fetch digital data continuously and write it into the memory while analyzing; and then write first test data which have an identification to satisfy the first triggering condition into the first region, and write second test data which have an identification to satisfy the second triggering condition into the second region. And once the first test data or the second test data are found, stop writing the digital data into the corresponding regions. |
| US09280290B2 |
Method for steering DMA write requests to cache memory
A system may include a processor which may include a cache memory and a Direct Memory Access (DMA) controller, a peripheral device on an I/O expansion bus, and a bus interface coupled to the I/O expansion bus and the processor. The bus controller may determine if data packets sent from the peripheral device to the processor include a DMA write instruction to the cache memory with an optional desired cache location. Upon determining a DMA write instruction to the cache memory is included in the data packet, the bus controller may format the data in the data packet for storage in the cache and either receive the desired cache location or determine an appropriate location within the cache to store the formatted data. The bus controller may determine an alternate location within the cache if the desired location within the cache cannot accept more data from the peripheral device. |
| US09280288B2 |
Using logical block addresses with generation numbers as data fingerprints for network deduplication
The technique introduced here involves using a block address and a corresponding generation number as a “fingerprint” to uniquely identify a sequence of data within a given storage domain. Each block address has an associated generation number which indicates the number of times that data at that block address has been modified. This technique can be employed, for example, to determine whether a given storage server already has the data, and to avoid sending the data to that storage server over a network if it already has the data. It can also be employed to maintain cache coherency among multiple storage nodes. |
| US09280286B2 |
Managing GUI control auto-advancing
Embodiments of the present invention provide a method, system and computer program product for preventing unintentional GUI control advances. In an embodiment of the invention, a method for preventing unintentional graphical user interface (GUI) control advancing associated with an auto-advance feature can be provided. The method can include defining a threshold time period, selecting a GUI control in a GUI for which auto-advancement is enabled, receiving complete input for the selected GUI control, and suppressing a manual directive to advance to a next ordered GUI control in the GUI responsive to the manual directive being received within the threshold time period between the receipt of the complete input and the manual directive. |
| US09280285B2 |
Keeping focus during desktop reveal
Systems and methods are provides for adjusting focus during a desktop reveal. A window has focus before the desktop is revealed. After the window is returned and the desktop hidden, the focus is again placed on the window. Further, a configurable area associated with the screen that displays the window is maintained during the desktop reveal and the return of the window. |
| US09280284B2 |
Method, apparatus and computer readable medium for polygon gesture detection and interaction
A method, an apparatus, and a computer readable medium for polygon gesture detection and interaction, adapted to an electronic apparatus having an input unit, are provided. In the method, a gesture moving from a starting point to an end point is received by using the input unit and sampling points thereof are collected. A trajectory of the sampling points is analyzed to obtain a center of the gesture. A surrounding area of the center is divided into equal label areas. A distance and an angle relative to an origin of each sampling point in the label areas are calculated and used as a vertical axis and a horizontal axis to draw a waveform diagram. A shape formed by the trajectory is determined according to characteristics of the waveform diagram and a specific function corresponding to the shape is performed. |
| US09280279B2 |
User-defined gesture enablement protocols for touch input devices
A user interface method is disclosed. For a particular interface, such as a touch input device, the method involves defining an enablement protocol for a function and recording and retaining the enablement protocol of said function, such that a user enables the function by substantially reproducing the enablement protocol in the absence of spatial or temporal indication of at least a portion of the enablement protocol. |
| US09280278B2 |
Electronic apparatus and method to organize and manipulate information on a graphical user interface via multi-touch gestures
According to an aspect, a portable electronic apparatus includes a display unit for displaying an image; an input detection unit for detecting contact with an area in which the image is displayed by the display unit as input; and a control unit for causing the display unit to display a plurality of item objects and a group object surrounding the item objects. If the input detection unit detects first input of coming into contact with two different points in an area in which the group object is displayed and moving the contact with at least one of the two different points in a direction away from the other while maintaining the contact, the control unit causes the display unit to display the item objects in an aligned manner in a direction in which the distance between the two points increases. |
| US09280275B2 |
Device, method, and storage medium storing program
According to an aspect, a device includes a touch screen display and a controller. The controller displays a home screen in a layer on the touch screen display. The controller displays a different home screen in the same layer when a first gesture is performed on the home screen displayed on the touch screen display. The controller displays a home screen in a different layer when a second gesture is performed on the home screen displayed on the touch screen display. |
| US09280269B2 |
Electronic manifest of underground facility locate marks
Methods and apparatus for generating a searchable electronic record of a locate operation in which one or more physical locate marks are applied by a technician to identify a presence or an absence of at least one underground facility within a dig area. A digital image of a geographic area comprising the dig area is electronically received, and at least a portion of the received digital image is displayed on a display device. One or more digital representations of the physical locate mark(s) applied by the locate technician are added to the displayed digital image so as to generate a marked-up digital image. Information relating to the marked-up digital image is electronically transmitted and/or electronically stored so as to generate the searchable electronic record of the locate operation. |
| US09280266B2 |
Apparatus and method for displaying information as background of user interface
Apparatus and method for displaying information as a background of a user interface. In order to display the information as the background of a user interface, information such as user interest information may be received from a user. Based on the received information, contents may be retrieved. Then, the background of the user interface may be formed with at least one image. Each image of the at least one image may represent a respective one of the retrieved contents. The user interface having the background formed with the at least one image may be displayed. |
| US09280265B2 |
Input control device, input control method, and input control program for controlling display target upon receiving input on display screen of display device
A game device includes: a display control unit that displays a plurality of display targets on a display screen of a display device; an input acquiring unit that acquires a position of input from a front touch panel or a rear touch panel, which can detect input on the display screen; and a movement control unit that defines as a target to be moved a display target displayed by the display control unit on the display screen at a position corresponding to the position of a first input entry acquired by the input acquiring unit, and operative to scroll a display target other than the target to be moved in accordance with a second input entry acquired by the input acquiring unit while keeping the display position of the target to be moved at the position of the first input entry. |
| US09280260B2 |
Provision of a graphical layout of semi-structured data based on properties of the semi-structured data and user input
In an embodiment, a method is provided for organizing semi-structured data having properties. In this method, the semi-structured data are accessed and rendered on a graphical user interface. A user input defining a first graphical layout of a first subset of the semi-structured data is received. A second subset of the semi-structured data is identified as having properties similar to the properties of the first subset of the semi-structured data. A second graphical layout of the second subset of the semi-structured data is then provided. The second graphical layout matches the first graphical layout. |
| US09280259B2 |
System and method for manipulating an object in a three-dimensional desktop environment
An electronic device, method and interface for the device, for performing an action with a processor through a three-dimensional desktop environment is disclosed. A three-dimensional desktop environment is generated by a display and projected into a real space. At least one ultrasonic transducer propagates an ultrasonic pulse into the real space and receives a reflection of the ultrasonic pulse from a user object in the real space. A user action of the user object within the three-dimensional desktop environment is determined using the reflection of the ultrasonic pulse. The processor performs the action based on the determined user action. |
| US09280256B1 |
Swirl interface display for a hierarchical organization
A system for displaying a hierarchical organization comprises a processor, memory, a data source, and a network interface. The processor is configured to receive an indication of a selected individual and provide a display. The display includes the selected individual within a group represented by a first circle. The display comprises one or more groups in the hierarchy, each represented by one of a set of circles above or below a level of the group that includes the individual. The memory is coupled to the processor and is configured to provide the processor with instructions. The data source comprises detailed information about the hierarchical organization and its members. The network interface is configured to communicate with remote devices requesting displays comprising selected individuals. |
| US09280255B2 |
Structured displaying of visual elements
Presentation descriptions are provided to an operating system of a computing device to present outputs associated with the applications in an organized and intuitive manner to the user. The presentation descriptions provide the operating system with information about the structure and meaning of the output element. The task of organizing at least part of the output elements associated with applications is delegated to the operating system. The operating system analyzes the presentation descriptions, and organizes the output elements associated with the applications at least partly based on the presentation descriptions. |
| US09280254B2 |
Method of synchronizing multiple views of multiple displayed documents
There is provided a method of synchronizing multiple views of multiple displayed documents. The method includes displaying a first document in a first viewing window. The method includes displaying a second document in a second viewing window. The method includes determining from the viewing windows an active window. The method includes determining for the active window a scale value and an offset value associated with the display of the associated one of the documents. The method includes redisplaying each document associated with the viewing window that is not the active window by using the determined scale and offset values. |
| US09280250B2 |
Method, storage medium, and electronic apparatus for calibrating touch screen
The present invention provides a calibration method of a touch screen which comprises a display module and a sensor module. The calibration method comprises the following steps: receiving coordinate values of multiple display points shown on the display module; receiving coordinate values of multiple sensing points received by the sensor module, wherein the multiple sensing points are corresponding to the multiple display points, respectively, for forming at least four multiple correspondences; calculating a first set of calibration formulas according to the multiple correspondences; adjusting the multiple sensing points according to the first set of calibration formulas; and calculating a second set of calibration formulas according to the adjusted sensing points. |
| US09280249B2 |
Position detecting method for touchscreen panel, touchscreen panel, and electronic apparatus
A position detecting method for a touchscreen panel includes the steps of (a) determining the presence or absence of contact with the touchscreen panel on a conductive film divided into multiple conductive regions; (b) measuring a time after the detection of the absence of the contact and determining whether the measured time is less than a predetermined time if step (a) determines the absence of the contact; and (c) determining the continuance of the contact if the measured time is less than the predetermined time. |
| US09280246B2 |
Line spacing in mesh designs for touch sensors
In one embodiment, an apparatus includes a touch sensor that includes a mesh of conductive material configured to extend across a display that includes multiple pixels that each include sub-pixels. The mesh includes multiple first and second lines of conductive material. The first lines are substantially parallel to each other, and the second lines are substantially parallel to each other. Each of the pixels has a first pixel pitch (PPx) along a first axis and a second pixel pitch (PPy) along a second axis that is substantially perpendicular to the first axis. The first pixel pitch is a distance between corresponding features of two adjacent pixels along the first axis, and the second pixel pitch is a distance between corresponding features of two adjacent pixels along the second axis. The first lines extend across the display at a first angle relative to the first axis. |
| US09280244B2 |
Touch unit array and a display panel having the same
A touch unit array including a plurality of first strip electrodes, a plurality of second strip electrodes, and a plurality of electrode pad units is provided. Each first strip electrode has at least one first opening. The second strip electrodes are orthogonally arranged to the plurality of first strip electrodes. Each electrode pad unit includes at least one electrode pad, and the electrode pads are respectively disposed in the plurality of first openings, wherein each electrode pad unit receives a first driving signal. |
| US09280241B2 |
Touch panel and method for manufacturing
The present disclosure relates to a touch panel, and more particularly, to a touch panel having no or a reduced number of frames. The touch panel includes a substrate, a plurality of first electrodes, and second electrodes, wherein the first electrodes and the second electrodes are disposed on two opposite sides of the substrate, respectively. The first electrodes extend along an initial direction from initial positions and divert from the initial direction to terminate in first termination positions. The second electrodes extend from second initial positions and terminate in second termination positions along a second direction. |
| US09280233B1 |
Routing for touch sensor electrodes
An input device for capacitive sensing. The input device includes a plurality of sensor electrodes for capacitive sensing disposed in a first layer and within a sensor electrode region comprising an areal extent of the plurality of sensor electrodes. The input device also includes a plurality of routings disposed in a second layer and within a border region of the sensor electrode region, the plurality of routings layered with a first set of two or more of the plurality of sensor electrodes in the border region and electrically coupled to a second set of two or more of the plurality of sensor electrodes, wherein the second set of two or more of the plurality of sensor electrodes includes zero, one, or two of the sensor electrodes included in the first set of two or more of the plurality of sensor electrodes. |
| US09280231B2 |
Disabling display lines during input sensing periods
Embodiments of the present invention generally provide a processing system for a display device having an integrated sensing device. The processing system includes a driver module coupled to a plurality of transmitter electrodes. Each transmitter electrode includes one or more common electrodes configured for display updating and input sensing. The driver module is configured for selecting a first display line set for display updating during a first display update period and driving the first display line set for display updating during the first display update period. The driver module is further configured for driving one or more transmitter electrodes of the plurality of transmitter electrodes for input sensing during a non-display update period and selecting a second display line set for display updating during a restart period. |
| US09280224B2 |
Dynamic tactile interface and methods
A dynamic tactile interface includes: a substrate including a first transparent material and defining an attachment surface, an open channel opposite the attachment surface, and a fluid conduit intersecting the open channel and passing through the attachment surface; a tactile layer including a second transparent material and defining a tactile surface, a peripheral region bonded to the attachment surface opposite the tactile surface, and a deformable region adjacent the fluid conduit and disconnected from the attachment surface; a closing panel bonded to the substrate opposite the attachment surface and enclosing the open channel to define a fluid channel; a working fluid; and a displacement device configured to displace the working fluid into the fluid channel and through the fluid conduit to transition the deformable region from a retracted setting to an expanded setting. |
| US09280222B2 |
Touch electrode structure and a method for manufacturing the same
The present disclosure discloses a touch panel, a touch electrode structure, and a manufacturing method thereof. The touch electrode structure comprises a plurality of first-axis sensing lines and at least one first laser etching line. The plurality of first-axis sensing lines are formed by laser etching a first conducting layer, wherein each first-axis sensing line at least has a first output pin. The first laser etching line is formed around the corresponding first output pin by laser etching the first conducting layer. Thus, the present disclosure can reduce overall production time by using a simplified manufacturing process in a laser etching process to form an improved touch electrode structure. |
| US09280216B2 |
Writing device having light emitting diode display panel
A writing device includes a writing pen and a light emitting diode display panel. The writing pen emits three different-colored optical signals. The light emitting diode display panel includes a control module and a plurality of pixels. Each pixel includes first, second and third light sources, first, second and third light sensing elements, and a touch element. The first to third light sensing elements are configured to receive the three optical signals and generate first, second and third selective signals, respectively. The touch element generates a control signal when touched by the writing pen. According to the three selective signals and the control signal, the control module selectively turns on the first light source, the second light source, and the third light source. |
| US09280209B2 |
Method for generating 3D coordinates and mobile terminal for generating 3D coordinates
A method of generating 3D coordinates includes: acquiring a target image including a finger region with a camera of a terminal; detecting the finger region in the target image using an image processing technique; detecting a fingertip region in the finger region; and calculating 3D coordinate values using the fingertip region. Also provided is a terminal suitable for performing such a method. |
| US09280206B2 |
System and method for perceiving images with multimodal feedback
A method, system and computer-readable medium for providing feedback effects for an image. The method includes identifying one or more features in an area of the image. The method also includes mapping the one or more identified features to at least one of multiple modalities of feedback effects. Additionally, the method includes generating parameters for feedback effect output and storing the generated parameters in association with the image such that, in response to coordinates of an input of a user corresponding to the area of the image, a user interface associated with the image is configured to provide at least one of the multiple modalities of feedback effects to the user. The multiple modalities of feedback effects include one or more visual feedback effects, one or more haptic feedback effects and one or more audio feedback effects. |
| US09280203B2 |
Gesture recognizer system architecture
Systems, methods and computer readable media are disclosed for a gesture recognizer system architecture. A recognizer engine is provided, which receives user motion data and provides that data to a plurality of filters. A filter corresponds to a gesture, that may then be tuned by an application receiving information from the gesture recognizer so that the specific parameters of the gesture—such as an arm acceleration for a throwing gesture—may be set on a per-application level, or multiple times within a single application. Each filter may output to an application using it a confidence level that the corresponding gesture occurred, as well as further details about the user motion data. |
| US09280202B2 |
Vehicle vision system
A vision system of a vehicle includes an interior monitoring system operable to determine a gaze direction of the driver of the vehicle. A plurality of cameras is disposed at a vehicle and the cameras have respective fields of view exterior of the vehicle. A heads up display system is operable to display virtual images for viewing by the driver of the vehicle, with the displayed virtual images being displayed in the driver's gaze direction, such as via heads up display glasses worn by the driver. Responsive to a determination of the driver gazing in a direction towards a non-transparent portion of the vehicle, the heads up display system displays an image derived from image data captured by at least one of the plurality of cameras to display a virtual image representative of the driver's view as it would be through the non-transparent portion of the vehicle. |
| US09280200B1 |
Automatic peak current throttle of tiered storage elements
Powering a data storage device (DSD) including at least a first storage tier and a second storage tier. A current used by the DSD is monitored and it is determined whether the current exceeds a current threshold. A throttle signal is asserted to reduce power used by the first storage tier when it is determined that the current exceeds the current threshold. |
| US09280199B2 |
Image processing apparatus, printing apparatus and controlling method in image processing apparatus
This invention is directed to reducing power consumption even when there is a great amount of power consumed by a root complex in a printing apparatus that employs a PCI Express architecture. To accomplish this, a printing apparatus that includes a controller capable of switching between a root complex and an endpoint and an accelerator controller serving as a root complex performs the following processing. More specifically, in the power saving mode, the power source of the accelerator controller is turned off and the controller is set as a root complex. Power consumption in the power saving mode can be greatly reduced, and a return sequence from the power saving mode can be executed. |
| US09280195B2 |
Method for automatically generating user program code for a programmable logic controller for controlling a machine
A method for automatically generating user program code for a programmable logic controller configured to control a machine, includes providing, at a first earlier time, a plurality of selectable program code parts for the programmable logic controller; and automatically generating the user program code at, a second later time, by combining at least two of the plurality of selectable program code parts that have been selected by a user. At least one of the plurality of selectable program code parts is configured to activate at least one energy-saving function of an energy consumer of the machine. The at least one energy-saving function has energy-saving function properties. |
| US09280194B2 |
Dynamic link width modulation
Described herein are embodiments of an apparatus configured for dynamic link width modulation, a system including an apparatus configured for dynamic link width modulation, a method for dynamic link width modulation, and computer-readable media having instructions that, if executed by one or more processors, cause an apparatus to perform a dynamic link width modulation method. An apparatus configured for dynamic link width modulation may include a first counter for determining a length of a queue of packets at a source of a link, a second counter for determining a rate of utilization of the link, and a power control unit configured to modify a width of the link based at least in part on the length of the queue and the rate of utilization. Other embodiments may be described and/or claimed. |
| US09280190B2 |
Method and systems for energy efficiency and energy conservation including on-off keying for power control
Systems and a method for controlling power of a device with power management software are described. In one embodiment, a computer implemented method initiates power control having ON-OFF keying to control power consumption of a device for energy efficiency and energy conservation. An ON-OFF period of the ON-OFF keying for the device is computed. The method sets a target frequency, a target supply voltage, and a power gate control for the device based on the ON-OFF keying. |