| Document | Document Title |
|---|---|
| US09257807B2 |
Tool for installing wires in a wire harness conduit
A wire handheld tool including a handle contiguous to a shank with a wire securing portion. The wire securing portion may be a relatively flat portion with one or more wire passageways used to secure one or more wires thereto. The wire handheld tool can be used to insert, remove, and/or replace wires contained in wire harness conduits. Some embodiments can include a plurality of passageways traversing the relatively wire securing portion in non-parallel diagonal directions relative to each other. In some embodiments, one wire passageway can be included and configured for a wire to traverse a length of the wire securing portion securing itself thereto. The handle of the tool can be ergonomically designed for comfort and practicality, and additionally, may include non-conductive components or coatings to prevent electrically shocking a user. |
| US09257800B2 |
Cable connector assembly with a shorter size and method of assembling the same
A cable connector assembly for mating with a mating connector, including: a printed circuit board (PCB), a mating member mounded on the PCB, an insulative housing receiving the PCB, and a cable extended from the insulative housing. The PCB includes a first portion made of flexible material, a second portion bent and extended from one side of the first portion, and a third portion bent and extended from another side of the first portion. The mating member is soldered on the first portion. The cable is soldered with the second portion and the third portion. |
| US09257789B2 |
Connector with force multiplying mechanism and connector assembly provided therewith
A slider (19) to be slid by rotating a lever (20) is mounted in a first lever-side connector (L1). The slider (19) is held at an initial position where cam followers (17) provided on the first lever-side connector (L1) can be received into cam grooves (29). When the slider (19) is at the initial position, a part of the slider (19) projects out from the connector. Lever plates (20A) of the lever (20) are so configured that protecting edge portions (38) formed on parts of side edges of the lever plates (20A) are located substantially at the same position as or behind a projecting end part of the slider (19) when the slider (19) is at the initial position. Further, the protecting edge portions (38) are located closer in distance to rotary shafts (34) than an operating portion (20B). |
| US09257787B2 |
Interface device
In a preferred embodiment, the present invention is an interface device comprising a receiver and a test adapter. The receiver has on each outer side a groove or ridge for use in initial engagement of the test adapter with the receiver. The test adapter has an engagement member having a plurality of clips arranged such that at least one clip engages with the groove or ridge on a side of the receiver. The test adapter further has a screw mechanism for drawing the engagement in and out of the test adapter to engage and disengage the test adapter with the receiver. |
| US09257785B2 |
Electronic devices and fool-proof methods
An electronic device having a fool-proof feature is provided, including a first magnet, an output terminal, a hall sensor and a power supply unit. The first magnet generates a magnetic field. The output terminal is disposed in the range of the magnetic field and is mated with an input terminal of a second electronic device. The hall sensor generates a hall voltage according to the magnetic field. The power supply unit is coupled to the output terminal and provides power to the output terminal according a control signal outputted from the hall sensor, in which the hall sensor outputs the control signal when the output terminal is coupled to the input terminal and the hall voltage exceeds a specific voltage, such that the power supply unit provides power to the output terminal according to the control signal, and the second electronic device receives power from the output terminal. |
| US09257782B2 |
Electrical connector with moisture absorbing pin
An electrical connector has a casing configured to define a chamber when mated with a mating connector, a plurality of contact pins projecting from the casing into the chamber when mated with the mating connector, and a moisture-absorbing pin retained by the casing for movement between a retracted position wherein the moisture-absorbing pin is substantially enclosed by the casing and an extended position wherein the moisture-absorbing pin extends into the chamber. A fluid is contained within the casing that is compressed by a movement of at least one of the contact pins during engagement of the electrical connector with the mating connector, compression of the fluid urging the moisture absorbing pin from the retracted position to the extended position. |
| US09257780B2 |
Coaxial cable connector with weather seal
A connector is attachable to a coaxial cable. The connector, in one embodiment, has a connector body, a sleeve, a fastener and a seal assembly. At least part of the seal assembly is configured to be removeably coupled to the sleeve. |
| US09257774B2 |
Connector
A connector (10) has a terminal accommodating portion (31) with a plurality of cavities (34) into which terminals (20) are accommodated from behind and a front holder (50) is mounted into the terminal accommodating portion (31). The front holder (50) includes locks (53) that move onto locked portions (49) on the upper surface of a narrow portion (45) of the terminal accommodating portion (31) when the front holder (50) is mounted into the terminal accommodating portion (31). The narrow portion (45) includes deformation preventing recesses (47) that fit to deformation preventing ribs (57) on the front holder (50) in a convexo-concave manner. The deformation preventing ribs (57) and the deformation preventing recesses (47) contact each other in a vertical direction when the locks (53) move onto the locked portions (49), thereby suppressing excessive deflection of the front holder (50) or the narrow portion (45). |
| US09257768B2 |
Electrical connector with robust heat-dissipation structures
An electrical connector includes an insulative housing and two rows of power contacts received in the insulative housing. The insulative housing includes a main body and a mating port extending from the main body. Each power contact includes a mating portion protruding into the mating port, a Z-shaped intermediate portion extending rearwardly from the mating portion and a termination portion. The insulative housing includes a first heat dissipation path extending along a first direction, a second heat dissipation path extending along a second direction perpendicular to the first direction, and a third heat dissipation path extending along a third direction perpendicular to the first direction and the second direction. The first heat dissipation path, the second heat dissipation path and the third heat dissipation path are surrounding the power contacts for heat dissipation. |
| US09257765B2 |
Connector pin on springs
An electronic device includes a printed circuit board (PCB) with a first conductive element and having a first side opposite a second side. The electronic device includes a wall disposed on the first side of the PCB and having a channel through the wall. The electronic device includes a supporting structure disposed on the second side of the PCB. The electronic device includes a connector which includes an electrically conductive based configured to provide a conductive path between the first conductive element and the channel and also includes a spring structure disposed between the electrically conductive base and the supporting structure. |
| US09257764B2 |
Low insertion force connector utilizing directional adhesion
An electrically conductive connector includes a columnar structure with a slanted contact surface. The columnar structure is electrically coupled to a first circuit member. An electrical conduction path is established between the first circuit member and a second circuit member when the slanted contact surface of the columnar structure mates with a contact surface of the second circuit member via van der Waals forces. |
| US09257761B2 |
Electrical coaxial connector
An electrical coaxial connector comprising a signal-joining contacting conductor and a grounding contacting conductor each supported by an insulating base member, wherein a body portion of the signal-joining contacting conductor has a press-contacting part with a contacting protrusion for contacting with a signal-joining conductor in a mating connector and a first base part in such a manner that a measure of thickness of the press-contacting part including the contacting protrusion is not more than the maximum measure of thickness of the first base part, and an annular portion of the grounding contacting conductor has an engaging part with an engaging protrusion for engaging with a grounding conductor in the mating connector and a second base part in such a manner that a measure of thickness of the engaging part including the engaging protrusion is not more than to the maximum measure of thickness of the second base part. |
| US09257756B2 |
Dual band directive/reflective antenna
A dual band antenna having a directive element and a reflective element is disclosed. A first and second antennas are arranged substantially parallel to each other and spaced between approximately 0.5-0.8 times the wavelength of the first antenna. The dual band antenna provides high gain at the zenith and at the horizon and enable v variation in the antenna beam shape as well as a reduction in cross polarization. |
| US09257751B2 |
Integration of microstrip antenna with CMOS transceiver
A monolithic antenna element comprises a microstrip patch antenna and a ground plane, with a substrate between the patch antenna and the ground plane. A feeding via extends from the ground plane layer through the substrate to the patch antenna, connecting to the antenna distal from lateral edges of the antenna. A coplanar waveguide (CPW) feed line is formed in the ground plane layer, and interrupts and is electrically distinct from the ground plane. The CPW extends from a lateral edge of the ground layer to the feeding via. The antenna can be flip chip bonded to a CMOS die, reducing cost of millimeter wave transceivers, e.g. 57-64 GHz. The antenna is fabricated using standard PCB technology and a single substrate for the antenna. Antenna arrays can be fabricated. Appropriately designed antenna feeds, flip chip interconnects and antenna shape provide suitably broad antenna bandwidth, with relatively high efficiency. |
| US09257750B2 |
Electronic device with multiband antenna
An electronic device may have an antenna for providing coverage in wireless communications bands of interest. The wireless communications bands may include first, second, third, and fourth communications bands. The antenna may have an antenna resonating element with first, second, and third arms and may have an antenna ground. The antenna ground may be formed form metal housing structures and other conductive structures in the electronic device. The first arm may be configured to exhibit an antenna resonance in the first and third communications bands. The second arm may be configured to exhibit an antenna resonance in the second communications band. The third arm may be configured to exhibit an antenna resonance in the fourth communications band. The third arm may be located between the first arm and the ground. A diagonal crossover path may pass over a return path and may couple the second and third arms. |
| US09257746B2 |
Phased-array transceiver for millimeter-wave frequencies
A phased-array receiver that may be effectively implemented on a silicon substrate. A receiver includes multiple radio frequency (RF) front-ends, each configured to receive a signal with a given delay relative to the others such that the gain of the received signal is highest in a given direction. The receiver also includes a power combination network configured to accept an RF signal from each of the RF front-ends and to pass a combined RF signal to a down-conversion element, where the power distribution network includes a combination of active and passive components. Each RF front-end includes a phase shifter configured to delay the signal in accordance with the given direction and a variable amplifier configured to adjust the gain of the signal. |
| US09257742B2 |
Mandrel-wound magnetic antenna and method of making same
An antenna includes an electrical excitation component and a core component. The electrical excitation component has and input, an output and a conducting component. The conducting component is disposed between the input and the output and can conduct current from the input to the output. The core component has a concentrically wound magnetic film having a substrate and a magnetic material layer. The core component can have a magnetic current loop induced therein. The electrical excitation component is arranged such that concentric magnetic fields associated with current conducted through the electrical excitation component are additionally associated with a magnetic current loop within the core component. |
| US09257741B2 |
Directional antenna structure with dipole antenna element
An antenna structure includes a dipole antenna element, a closed-loop conductor, and a reflection plane. The dipole antenna element is configured to transmit an electromagnetic signal. The closed-loop conductor is disposed adjacent to the dipole antenna element. The dipole antenna element is substantially between the closed-loop conductor and the reflection plane, or the closed-loop conductor is substantially between the dipole antenna element and the reflection plane. The reflection plane is configured to reflect the electromagnetic signal from the dipole antenna element so as to enhance the total gain of the antenna structure. The mutual coupling effect between the closed-loop conductor and the dipole antenna element effectively causes the distance between the dipole antenna element and the reflection plane to be shorter. |
| US09257736B1 |
Broadband spiral transmission line power splitter
The present invention features a broadband radio frequency (RF) device in the form of a power splitter. A broadband spiral transmission line power divider is used to divide power into two powers with a constant phase difference between the two divided powers. The power divider produces large bandwidths. |
| US09257735B2 |
Reconfigurable waveguide interface assembly for transmit and receive orientations
An antenna apparatus comprises a lower assembly and an upper assembly, which together forming a cavity to contain an RF circuit device. The upper assembly comprises a waveguide flange interface at an external surface of the upper assembly. The waveguide flange interface comprises a waveguide channel extending from the external surface to an internal surface forming a surface of the cavity. An opening of the waveguide channel at the internal surface is substantially centered about a first centerline of the upper assembly parallel with the external surface and offset from a second centerline of the upper assembly parallel with the external surface, whereby the second centerline perpendicular is to the first centerline. The upper assembly is removably attachable to the lower assembly in either of a first orientation or a second orientation, whereby the second orientation represents a 180 degree rotation of the upper assembly relative to the first orientation. |
| US09257733B2 |
Oxygen permeable membrane for air secondary battery, armouring material for air secondary battery and secondary battery
Provided is an oxygen permeable membrane for use in an air secondary battery, which excels in oxygen permeability, barrier performance to water, being capable of preventing electrolyte from leaking out. Such an oxygen permeable membrane includes a thermoplastic resin membrane and inorganic particles having pores having pore diameter of 10 Å or less contained in the thermoplastic resin membrane, in which the thermoplastic resin membrane has one surface on which hydrophobic treatment is effected. |
| US09257726B2 |
Battery assembly with enhanced properties
A battery assembly for use in an aircraft. The battery assembly may include a battery and a circuit configured to monitor the battery in situ. The circuit may include at least one sensor positioned to sense at least one property of the battery and a processor in communication with the sensor. The battery assembly may also include a battery housing, wherein the battery and the circuit are positioned within the battery housing. A method for evaluating a battery in an electric device. The method may include collecting operational information from the battery. The operational information may be collected without removing the battery from the electric device. The method may also include comparing the operational information to a degradation routine describing a property of the battery and calculating a capacity of the battery. |
| US09257724B2 |
Reaction chamber arrangement and a method for forming a reaction chamber arrangement
A reaction chamber arrangement is provided, the reaction chamber arrangement including a first chemical reaction chamber; a second chemical reaction chamber; an isolation member between the first chemical reaction chamber and the second chemical reaction chamber, wherein a first electrode is mounted on a first side of the isolation member, an exposed surface of the first electrode facing into the first chemical reaction chamber and wherein a second electrode is mounted on a second side of the isolation member, an exposed surface of the second electrode facing into the second chemical reaction chamber; and an electronic component configured to measure or control at least one of the first chemical reaction chamber and the second chemical reaction chamber, wherein the electronic component is arranged between and connected to the first electrode and the second electrode, and at least partially surrounded by an isolation material of the isolation member. |
| US09257722B2 |
Accumulator and method for the production of an accumulator
The invention relates to an accumulator (10), particularly a prismatic lead accumulator, comprising a housing and (a) at least one stack (29) of plates, (b) which has a plurality of spaced-apart pole plates (14, 16) that are entirely suspended by a fixing element (28) in at least one circumferential direction (U). According to the invention, the fixing element (28) is fixedly connected to the housing (19). |
| US09257719B1 |
Electrolyte additives for lithium-ion batteries
This invention employs a diamine electrolyte additive that enhances performance of lithium-ion batteries both at high and low temperatures, thereby minimizing the conventional performance gap across a wide temperature range, such as −30° C. to 60° C. At low temperatures, diamine additives can enhances cycling kinetics. At high temperatures, diamine additives can minimize capacity fading. In some variations, a lithium-ion battery electrolyte composition comprises a non-aqueous solvent, a lithium salt soluble in the non-aqueous solvent, and a diamine additive having the formula H2N—R—NH2, wherein R is an organic group such as (—CH2—)n, n=2-12. |
| US09257714B2 |
Organic electrolyte solution and redox flow battery including the same
An organic electrolyte solution including a solvent; an electrolyte including a metal-ligand coordination compound; and an additive including a hydrophobic group and a metal affinic group. |
| US09257712B2 |
Fuel cell system and operation method thereof
In a fuel cell system of the present invention, a reformed gas generated in a reformer (R1) being activated is supplied to a fuel cell stack (F1), and an off-gas discharged from the fuel cell stack (F1) is supplied to a heat supply device (B2) provided for a reformer (R2) being deactivated. By activating at least one reformer (Rn), all of a plurality of reformers (Rn) can be warmed-up. Therefore, energy consumption in a standby state can be suppressed, and the fuel cell system can be started-up quickly in emergencies. The reformed gas may be supplied to the heat supply device (B2) instead of the off-gas. |
| US09257709B2 |
Paper-based fuel cell
The present disclosure provides biological fuel cells comprising a paper-based fuel delivery layer which delivery fuel to the biological anode and cathode via capillary action and/or evaporation. In some embodiments the paper-based fuel delivery layer incorporates an outwardly extending fan-shaped region which enables a constant volumetric flow rate through the cell. |
| US09257705B2 |
Method for producing Pt-free electrocatalysts for fuel cells and batteries
A method for synthesizing a nitrogen-doped carbon electrocatalyst by performing selective catalytic oxidative polymerization of solid aniline salt on a carbon support with a catalytic system containing Fe3+/H2O2 to obtain a mixture, and then heat treating the mixture under a nitrogen atmosphere at 900° C. |
| US09257694B2 |
Rechargeable battery having a lead tab with injection material
A rechargeable battery including an electrode assembly that performs a charge and discharge operation; a case that houses the electrode assembly; a cap plate coupled to an opening of the case; an electrode terminal installed in the cap plate; and a lead tab that connects the electrode assembly to the electrode terminal, wherein the lead tab includes a current collecting connection portion that is connected to the electrode assembly; a terminal connection portion that is bent from the current collecting connection portion to be connected to the electrode terminal; and an injection material that embeds the terminal connection portion in which a fuse is formed, and wherein the injection material includes an exposing hole therein, the exposing hole exposing at least one side of the fuse. |
| US09257692B2 |
Flat-type battery
Disclosed is a flat battery which includes power generating element 18 accommodated in an inner space formed by sealing outer peripheral edges of package members 16 and 17, collector 11a, 13a connected to an electrode plate of power generating element 18 and an electrode tab 14, 15 taken out from the outer peripheral edges of package members 16 and 17. Electrode tab 14, 15 has conducting portion 151 overlapping and joined to collector 11a, 13a and stress relieving portion 152 formed of a material having higher elasticity than that of conducting portion 151. It is thus possible to prevent the occurrence of wrinkles in collector 11a, 13a or electrode tab 14, 15 and separations in weld joints due to a difference in expansion/contraction rate between collector 11a, 13a and electrode tab 14, 15. |
| US09257682B2 |
Method for manufacturing external cladding for laminate battery
In method for manufacturing an external cladding for a laminate battery according to the present invention, austenitic stainless steel foil having a thermoplastic resin layer on one of a front surface and a rear surface and a lubricating film on the other surface is used as a material, the stainless steel foil is disposed such that the surface provided with the thermoplastic resin layer opposes a punch, and drawing is implemented on the stainless steel foil without using lubricating oil in a condition where an annular region of the stainless steel foil, which is contacted by a shoulder portion of the punch, is set at a temperature of 20° C. or lower, and an exterior region on an exterior of the annular region is set at a temperature between 40° C. and 100° C. |
| US09257680B2 |
Method to make organic electroluminescent element material
In the present invention, provided is an organic electroluminescent element material having a high externally taking-out quantum efficiency, which is suitable for manufacturing an element exhibiting long light emission lifetime, and also provided is an organic electroluminescent element possessing the material, a method of manufacturing the organic electroluminescent element, and a display as well as an illuminating device fitted with the organic electroluminescent element. |
| US09257678B2 |
Organic luminescent display device
An organic electroluminescent display device of the invention includes an element substrate, an organic electroluminescent light-emitting element disposed on the element substrate, and a sealing film disposed on the organic electroluminescent light-emitting element, wherein the organic electroluminescent light-emitting element includes an anode formed of metal and disposed on the element substrate, a light-emitting layer disposed on the anode, and a transparent cathode disposed on the light-emitting layer, and the sealing film includes a light-transmittance-reducing layer colored in black. |
| US09257674B2 |
Organic light emitting diode display and manufacturing method thereof
An OLED display includes: a substrate; an organic light emitting element formed on the substrate and including a first electrode, an emission layer, and a second electrode; and an encapsulation layer formed on the substrate while covering the organic light emitting element. The encapsulation layer includes an organic layer and an inorganic layer, and a protrusion and depression structure is formed in an interface between the organic layer and the inorganic layer. |
| US09257672B2 |
Organic light-emitting display apparatus
An organic light emitting display apparatus, including a first electrode; a second electrode on the first electrode, the second electrode including silver and magnesium; an organic emission layer between the first electrode and the second electrode; a metal layer between the organic emission layer and the second electrode; and a barrier layer between the organic emission layer and the second electrode. |
| US09257670B2 |
Display device
A novel display device with higher reliability having a structure of blocking moisture and oxygen, which deteriorate the characteristics of the display device, from penetrating through a sealing region and a method of manufacturing thereof is provided. According to the present invention, a display device and a method of manufacturing the same comprising: a display portion formed by aligning a light-emitting element using an organic light-emitting material between a pair of substrate, wherein the display portion is formed on an insulating layer formed on any one of the substrates, the pair of substrates is bonded to each other with a sealing material formed over the insulating layer while surrounding a periphery of the display portion, at least one layer of the insulating layer is made of an organic resin material, the periphery has a first region and a second region, the insulating layer in the first region has an opening covered with a protective film, the sealing material is formed in contact with the opening and the protective film, an outer edge portion of the insulating layer in the second region is covered with the protective film or the sealing material. |
| US09257669B2 |
Display panel and method for fabrication thereof
A display panel is provided. The display panel includes a substrate, a pixel array, a peripheral circuit, and a protective layer. The substrate includes a display region and a non-display region. The pixel array is located in the display region of the substrate. The peripheral circuit is located in the non-display region. The protective layer is located in the display region and the non-display region. The peripheral circuit and the pixel array are covered by the protective layer. The protective layer in the non-display region has a plurality of openings, which expose the substrate. The apertures of the openings is between 1 μm and 1 mm, and the spacing between the openings is 10 μm and 1 cm. |
| US09257665B2 |
Lifetime OLED display
Light emitting devices including sub-pixels having different numbers of emissive layers are provided. At least one sub-pixel of a first color may include a single emissive layer, and at least one sub-pixel of a second color may include multiple emissive layers disposed in a vertical stack. Light emitting devices in which different voltages are applied to each sub-pixel or group of sub-pixels are also provided. In some configurations, the voltage to be applied to a sub-pixel may be selected based upon the number of emissive layers in the sub-pixel. |
| US09257664B2 |
Organic electroluminescent display device
An organic EL display device includes an organic EL element having a first light-emitting portion, a second light-emitting portion, an n-type charge-generation layer, and a p-type charge-generation layer. The first light-emitting portion has a first light-emitting layer and a hole-injection layer. The first light-emitting layer is formed between an anode and a cathode. The hole-injection layer is made of amorphous carbon and in contact with the anode. The second light-emitting portion has a second light-emitting layer, which is formed between the first light-emitting portion and the cathode. The n-type charge-generation layer is formed between the first and second light-emitting portions. The n-type charge-generation layer is in contact with the first light-emitting portion. The p-type charge-generation layer is made of amorphous carbon and formed between the n-type charge-generation layer and the second light-emitting portion. The p-type charge-generation layer is in contact with the second light-emitting portion. |
| US09257660B2 |
Method for fabricating single electron transistor having nanoparticles of uniform pattern arrangement
A transistor and a fabrication method thereof. A transistor includes a channel region including linkers, formed on a substrate, and metallic nanoparticles grown from metal ions bonded to the linkers, a source region disposed at one end of the channel region, a drain region disposed at the other end of the channel region opposite of the source region, and a gate coupled to the channel region and serving to control migration of charges in the channel region. The metallic nanoparticles have a substantially uniform pattern arrangement in the channel region. |
| US09257658B2 |
Method of making organic electroluminescent materials
A method of making ligands for producing novel heteroleptic iridium complexes is provided. The method includes reacting the condensation product of an aryl 1,2-diamine and an aryl aldehyde with manganese dioxide in a solvent. The novel iridium complexes produced using the ligands are useful compounds in OLED devices. |
| US09257655B2 |
Light-emitting element, light-emitting device, electronic device, and lighting device
Provided is a light-emitting element which has high emission efficiency and a long lifetime and is driven at low voltage. The light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes a compound which gives a first peak at a m/z of around 266.10 in a mass spectrum. |
| US09257653B2 |
Organic light-emitting diode including multi-layered hole transporting layer, and flat display device including the organic light-emitting diode
An organic light-emitting diode including: a first mixed layer between an emission layer and a first electrode and including first and second compounds; a second mixed layer between the emission layer and the first mixed layer and including third and fourth compounds; a first charge generation layer between the first mixed layer and the first electrode and including the first and second compounds and a first charge generation material; a second charge generation layer between the first mixed layer and the second mixed layer and including the third and fourth compounds and a second charge generation material; and a buffer layer between the emission layer and the second mixed layer, the first and the third compounds are each independently a compound represented by Formula 1 below, and the second compound and fourth compounds are each independently a compound represented by Formula 2 below: |
| US09257651B2 |
Organic electroluminescence element and method for manufacturing organic electroluminescence element
Disclosed are: an organic electroluminescent element which has high power efficiency, excellent resistance to luminance decrease due to continuous operation and excellent storage stability at high temperatures, while being reduced in chromatically change of color developing light; and a method for manufacturing the organic electroluminescent element. Specifically disclosed is an organic electroluminescent element that has a positive electrode and a negative electrode on a supporting substrate, while comprising an organic layer, which contains at least one light-emitting layer, between the positive electrode and the negative electrode. The organic electroluminescent element is characterized in that at least one layer in the organic layer contains a crown ether compound and a compound having a dibenzofuran skeleton. |
| US09257649B2 |
Method of manufacturing organic layer on a substrate while fixed to electrostatic chuck and charging carrier using contactless power supply module
An organic layer deposition apparatus, a method of manufacturing an organic light-emitting display device by using the same, and an organic light-emitting display device manufactured using the method, and in particular, an organic layer deposition apparatus that is suitable for use in the mass production of a large substrate and enables high-definition patterning, a method of manufacturing an organic light-emitting display device by using the same, and an organic light-emitting display device manufactured using the method. |
| US09257646B2 |
Methods of forming memory cells having regions containing one or both of carbon and boron
Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells. |
| US09257642B1 |
Protective sidewall techniques for RRAM
Some embodiments relate to a resistive random access memory (RRAM). The RRAM includes a RRAM bottom metal electrode, a variable resistance dielectric layer arranged over the RRAM bottom metal electrode, and a RRAM top metal electrode arranged over the variable resistance dielectric layer. A capping layer is arranged over the RRAM top metal electrode. A lower surface of the capping layer and an upper surface of the RRAM top metal electrode meet at an interface. Protective sidewalls are adjacent to outer sidewalls of the RRAM top metal electrode. The protective sidewalls have upper surfaces at least substantially aligned to the interface at which the upper surface of the RRAM top metal electrode meets the lower surface of the capping layer. |
| US09257640B2 |
Memory device and method for manufacturing the same
A memory device according to an embodiment includes an ion metal layer, an opposing electrode, and a resistance change layer. The ion metal layer contains a first metal and a second metal. The resistance change layer is disposed between the ion metal layer and the opposing electrode. The first metal is able to move repeatedly through an interior of the resistance change layer. The concentration of the first metal in a central portion of the ion metal layer is higher than the concentration of the first metal in an end portion of the ion metal layer. |
| US09257637B2 |
Method of manufacturing MRAM memory elements
A STT-MRAM comprises a method to form magnetic random access memory (MRAM) element array having ultra small dimensions using double photo exposures and etch of their hard masks. The memory cells are located at the cross section of two ultra-narrow photo-resist lines suspended between two large photo-resist bases. Array of MRAM cells with small dimension is formed by a third magnetic etch. |
| US09257635B2 |
Memory element and memory device
Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least alloy of CoPt, FePt, and Ru. |
| US09257634B2 |
Piezoelectric element, liquid ejecting head, liquid ejecting apparatus, actuator, sensor, and piezoelectric material
A piezoelectric element 300 includes a first electrode 60, a piezoelectric layer 70 which is provided on the first electrode, and a second electrode 80 which is provided on the piezoelectric layer, and the piezoelectric layer is made of a piezoelectric material expressed as a mixed crystal including a first component formed of a complex oxide containing Bi and Fe and having a rhombohedral perovskite structure and a complex oxide containing Ba and Ti and having a tetragonal perovskite structure, a second component formed of a complex oxide containing Bi, K, and Ti and having a tetragonal perovskite structure, and a third component formed of a complex oxide containing Bi, Mg, and Ti and having a rhombohedral perovskite structure. |
| US09257625B2 |
Semiconductor light emitting device
Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, a metal support layer having a plurality of protrusions disposed under the second conductive semiconductor layer, an insulating layer disposed between the second conductive semiconductor layer and the metal support layer, and a stepped conductive layer disposed between the second conductive semiconductor layer and the metal support layer. The stepped conductive layer includes a lower parts and an upper parts. The upper parts are directly contacted with the second conductive semiconductor layer. The lower parts are disposed between the insulating layer and the metal support layer. The insulating layer is laterally disposed between the plurality of upper parts. |
| US09257624B2 |
Light emitting diode package
A light emitting diode package includes a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes. |
| US09257623B2 |
Light-emitting diode package
A light-emitting diode package includes a light-emitting structure, a first electrode pad and a second electrode pad connected with the light-emitting structure, an insulating pattern layer in contact with a bottom surface of the light-emitting structure and abutting the first and second electrode pads, a substrate including via-holes in contact with a bottom surface of the insulating pattern layer and exposing a portion of the first electrode pad and a portion of the second electrode pad, a first penetrating electrode and a second penetrating electrode that are disposed in the via-holes and respectively connected with the first and second electrode pads, a fluorescent material layer disposed on the light-emitting structure, a glass disposed on and spaced apart from the light-emitting structure with the fluorescent material layer therebetween. |
| US09257619B2 |
Light-emitting device and manufacturing method thereof
To provide a light-emitting device that is provided with an optical member firmly bonded to a semiconductor light-emitting element and has a high light extraction efficiency, the light-emitting device includes a light-emitting element having a semiconductor layer and an optical member bonded to the light-emitting surface of the light-emitting element with a metal film being interposed therebetween wherein the metal film has a thickness in a film-forming rate conversion not less than 0.05 nm nor more than 2 times of an atomic diameter of the metal atoms forming the metal film. |
| US09257618B2 |
LED package and method of manufacturing the same
The present invention provides a Light Emitting Diode (LED) package, comprising a Printed Circuit Board (PCB), an LED mounted on the PCB, a pillar placed higher than the LED around the LED on the PCB, a transparent plate disposed on the pillar, spaced apart from the LED, and configured to transmit light emitted from the LED, and a fluorescent layer formed on a surface of the transparent plate, facing the LED, and conformably coated with a substance for converting the light emitted from the LED into white light by changing a wavelength of the light, wherein an electrical pad of the LED and an electrical pad of the PCB are electrically connected to each other, and the LED and the fluorescent layer are spaced apart from each other. |
| US09257616B2 |
Molded LED package and method of making same
Packaged light emitting diodes (LEDs) and methods of packaging a LED include providing a first lead having a first recess in a bottom surface and a second lead having a second recess in a bottom surface, placing a LED die over a top surface of at least one of the first and the second leads, electrically connecting the LED die to the first lead and to the second lead, forming a package around the LED die that includes an opening in its upper surface exposing at least the LED die, and separating the package containing the LED die, the first lead and the second lead from a lead frame such that the package contains a first castellation and a second castellation in a side surface of the package, such that the castellations expose the leads and/or a first platable metal which is electrically connected to the leads. |
| US09257610B2 |
Light emitting diode and manufacturing method thereof
A light emitting diode includes: a substrate; an n-type semiconductor layer disposed on the substrate; an active layer disposed on the n-type semiconductor layer; a p-type semiconductor layer disposed on the active layer; a first electrode disposed on the p-type semiconductor layer and made of a metal oxide; a second electrode disposed on the first electrode and made of graphene; a p-type electrode disposed on the second electrode; and an n-type electrode disposed on the n-type semiconductor layer, wherein a work function of the first electrode is less than a work function of the p-type semiconductor layer, but is greater than a work function of the second electrode. |
| US09257604B2 |
Light-emitting device having a patterned surface
The disclosure provides a light-emitting device. The light-emitting device comprises: a substrate having a first patterned unit; and a light-emitting stack on the substrate and having an active layer with a first surface; wherein the first patterned unit, protruding in a direction from the substrate to the light-emitting stack, has side surfaces abutting with each other and substantially non-parallel to the first surface in cross-sectional view, and has a non-polygon shape in top view. |
| US09257602B2 |
Substrate having hetero-structure, method for manufacturing the same and nitride semiconductor light emitting device using the same
Provided is a hetero-substrate that may include a base substrate, a buffer layer disposed on the base substrate, and a first semiconductor layer disposed on the buffer layer, the first semiconductor layer including a nitride semiconductor. A defect blocking layer is disposed on the first semiconductor layer. The defect blocking layer may include a plurality of metal droplets. A second semiconductor layer may be disposed on the defect blocking layer, the second semiconductor layer including a nitride semiconductor. |
| US09257595B2 |
Nitride light-emitting diode element and method of manufacturing same
A nitride LED having improved light extraction efficiency and/or axial luminous intensity is provided. The nitride LED contains a nitride semiconductor substrate having, on a front face thereof, a light-emitting structure made of a nitride semiconductor, wherein a roughened region is provided on a back face of the substrate, the roughened region has a plurality of protrusions, each of the plurality of protrusions has a top point or top plane and has a horizontal cross-section which is circular, except in areas where the protrusion is tangent to other neighboring protrusions, and which has a surface area that decreases on approaching the top point or top plane, the plurality of protrusions are arranged such that any one protrusion is in contact with six other protrusions, and light generated in the light-emitting structure is output to the exterior through the roughened region. |
| US09257594B2 |
Thin film transistor with an oxide semiconductor layer
An object is to provide a semiconductor device including a thin film transistor with excellent electrical characteristics and high reliability and a method for manufacturing the semiconductor device with high mass productivity. A main point is to form a low-resistance oxide semiconductor layer as a source or drain region after forming a drain or source electrode layer over a gate insulating layer and to form an oxide semiconductor film thereover as a semiconductor layer. It is preferable that an oxygen-excess oxide semiconductor layer be used as a semiconductor layer and an oxygen-deficient oxide semiconductor layer be used as a source region and a drain region. |
| US09257591B2 |
Photocoupler semiconductor device
According to an embodiment, a semiconductor device includes a primary side lead, a light-emitting element electrically connected to the primary side lead, and a thyristor-type light-receiving element. The light-receiving element includes a first face for detecting light emitted from the light-emitting element, and a second face provided on an opposite side of the first face. The light-receiving element includes an anode electrode, a cathode electrode, and a gate electrode that are provided on the first face. The device further includes a secondary side first lead electrically connected to the anode electrode, a secondary side second lead electrically connected to the cathode electrode, and a secondary side third lead electrically connected to the gate electrode. The secondary side third lead is connected to the second face of the light-receiving element. |
| US09257589B2 |
Single photon avalanche diode with second semiconductor layer burried in epitaxial layer
A first semiconductor layer serves as a first implanted layer of a first conductivity type. A second semiconductor layer of a second conductivity type is provided under the first semiconductor layer. The second conductivity type is opposite to the first conductivity type. The second semiconductor layer is buried in an epitaxial layer grown above a substrate. The second semiconductor layer becomes fully depleted when an appropriate bias voltage is applied to the device. |
| US09257588B2 |
Microchannel avalanche photodiode (variants)
The invention is directed to an avalanche photodiode containing a substrate and semiconductor layers with various electro-physical properties having common interfaces both between themselves and with the substrate. The avalanche photodiode may be characterized by the presence in the device of at least one matrix consisting of separate solid-state areas with enhanced conductivity surrounded by semiconductor material with the same type of conductivity. The solid-state areas are located between two additional semiconductor layers, which have higher conductivity in comparison to the semiconductor layers with which they have common interfaces. The solid-state areas are generally made of the same material as the semiconductor layers surrounding them but with conductivity type that is opposite with respect to them. The solid-state areas may be made of a semiconductor with a narrow forbidden zone with respect to the semiconductor layers with which they have common interfaces. |
| US09257587B2 |
Suspension and absorber structure for bolometer
A semiconductor device includes a substrate having an upper surface that defines a sensing region. A fixed beam structure is supported at a first level above the sensing region. The fixed beam structure includes fixed beam supports that extend upwardly from the upper surface of the substrate to position the fixed beam structure at the first level above the sensing region. An absorber structure is supported above the fixed beam structure at a second level above the sensing region. The absorber structure includes a pillar support that extends upwardly from the fixed beam structure to position the absorber structure at the second level above the sensing region. |
| US09257584B2 |
Solar cell interconnects and method of fabricating same
A solar cell device and a method of fabricating the device is described. The solar cell is fabricated by providing a substructure comprising an absorber over a back contact having a P1 line therein and scribing a P2 line in the absorber by mechanical scribing and laser scribing after the mechanical scribing. The scribing can be performed with an integrated scriber, including a scribing tip and a light source mounted adjacent the scribing tip and operable concurrently with the scribing tip. |
| US09257583B2 |
Solar cell
A solar cell including a substrate 1, a nanopillar 11 having diameter D1 connected to the substrate 1, and a nanopillar 12 having diameter D2 connected to the substrate 1 is characterized in that D2 is greater than D1 in order to realize a solar cell having, as the surface structure, a nanopillar array structure with which it is possible to prevent reflection within the broad wavelength region of solar light. A nanopillar array structure 21 formed from two types of nanopillars having different diameters has a point of minimum reflectivity of a nanopillar array structure formed from the nanopillar 11 having diameter D1 and a point of minimum reflectivity of a nanopillar array structure formed from the nanopillar 12 having diameter D2 and therefore, is capable of preventing reflection within the broad wavelength region of solar light. |
| US09257582B2 |
Photodetectors and photovoltaics based on semiconductor nanocrystals
A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons. |
| US09257577B1 |
Light receiving element
A light receiving element includes a substrate of a first conduction type, a light absorbing layer of the first conduction type formed on the substrate, a diffusion layer of a second conduction type formed on a portion of the light absorbing layer, a window layer of the first conduction type formed on the light absorbing layer so as to surround the diffusion layer and having a bandgap larger than that of the light absorbing layer, an anode electrode formed on the diffusion layer, and a cathode electrode provided on the substrate so as to contact the substrate without contacting each of the window layer and the light absorbing layer, wherein a groove is formed which surrounds a boundary between the diffusion layer and the window layer as viewed in plan and extends through the window layer and the light absorbing layer as viewed in section. |
| US09257576B2 |
Amino acid generator and polysiloxane composition containing the same
A coating film forming composition includes an amino acid generator including a protecting group that is eliminated to generate an amino acid. A coating film forming composition includes a component (A): the amino acid generator; a component (B): a hydrolyzable silane, a hydrolysis product thereof, a hydrolysis-condensation product thereof, or a mixture thereof; and a component (C): a solvent. |
| US09257572B2 |
Vertical type memory device
A semiconductor device, comprising: a plurality of memory cell strings; a bitline; and an interconnection coupling at least two of the memory cell strings to the bitline. Memory cell strings can be coupled to corresponding bitlines through corresponding interconnections. Alternate memory cell strings can be coupled to different bitlines through corresponding different interconnections. |
| US09257571B1 |
Memory gate first approach to forming a split gate flash memory cell device
A split gate flash memory cell device with a line-shaped charge trapping dielectric structure is provided. A semiconductor substrate includes a first source/drain region and a second source/drain region. A select gate and a memory gate are spaced over the semiconductor substrate between the first and second source/drain regions. A line-shaped charge trapping dielectric structure is arranged between the semiconductor substrate and the memory gate. A method for manufacturing the split gate flash memory cell device is also provided. |
| US09257570B2 |
Semiconductor memory device and method for manufacturing the same
A semiconductor memory device according to an embodiment includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a plurality of first electrodes provided on the first insulating film, a second insulating film provided on a side surface of the first electrodes and on an upper surface of the first electrodes, and a second electrode insulated from the first electrodes by the second insulating film. The second electrode includes an interconnect portion provided on the second insulating film, and a downward-extending portion extending into a space between the first electrodes from the interconnect portion. A lower end portion of the downward-extending portion is not covered with the second insulating film. |
| US09257569B2 |
Semiconductor device
A semiconductor device includes an oxide layer, a source electrode layer in contact with the oxide layer, a first drain electrode layer in contact with the oxide layer, a second drain electrode layer in contact with the oxide layer, a gate insulating film in contact with the oxide layer, a first gate electrode layer overlapping with the source electrode layer and the first drain electrode layer and overlapping with a top surface of the oxide layer with the gate insulating film interposed therebetween, a second gate electrode layer overlapping with the source electrode layer and the second drain electrode layer and overlapping with the top surface of the oxide layer with the gate insulating film interposed therebetween, and a third gate electrode layer overlapping with a side surface of the oxide layer with the gate insulating film interposed therebetween. |
| US09257567B2 |
Semiconductor device and manufacturing method thereof
In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion. |
| US09257563B2 |
Thin film transistor array panel and method of manufacturing the same
A thin film transistor array panel includes a substrate, a gate electrode on the substrate, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, a source electrode and a drain electrode on the semiconductor layer and facing each other, a floating metal layer between the source electrode and the drain electrode, and a passivation layer covering the source electrode, the drain electrode, and the floating metal layer. The floating metal layer is electrically floating. |
| US09257560B2 |
Method of semiconductor device including step of cutting substrate at opening of insulating layer
Provided is a flexible device with fewer defects caused by a crack or a flexible device having high productivity. A semiconductor device including: a display portion over a flexible substrate, including a transistor and a display element; a semiconductor layer surrounding the display portion; and an insulating layer over the transistor and the semiconductor layer. When seen in a direction perpendicular to a surface of the flexible substrate, an end portion of the substrate is substantially aligned with an end portion of the semiconductor layer, and an end portion of the insulating layer is positioned over the semiconductor layer. |
| US09257553B2 |
Vertical transistor and method to form vertical transistor contact node
A vertical transistor structure includes a substrate with a protruding structure, an offset layer covering a top surface of the protruding structure, a conductive layer disposed on the offset layer, and an interlayer disposed between the offset layer and the conductive layer to serve as a contact node. |
| US09257549B2 |
Semiconductor field effect power switching device
A semiconductor device having a semiconductor body, a source metallization arranged on a first surface of the semiconductor body and a trench including a first trench portion and a second trench portion and extending from the first surface into the semiconductor body is provided. The semiconductor body further includes a pn-junction formed between a first semiconductor region and a second semiconductor region. The first trench portion includes an insulated gate electrode which is connected to the source metallization, and the second trench portion includes a conductive plug which is connected to the source metallization and to the second semiconductor region. |
| US09257543B2 |
Reverse-conducting insulated gate bipolar transistor and diode with one structure semiconductor device
In the reverse-conducting IGBT according to the present invention, an n-type buffer layer surrounds a p-type collector layer. A p-type separation layer surrounds an n-type cathode layer. The n-type buffer layer separates the p-type collector layer and the p-type separation layer from each other. The p-type separation layer separates the n-type cathode layer and the n-type buffer layer from each other. Therefore, the present invention makes it possible to reduce snapback. |
| US09257542B2 |
Power semiconductor device with resistance control structure
A power semiconductor device includes a resistance control structure disposed in a central portion of a semiconductor substrate having a resistance to a current higher than in a peripheral portion of the substrate surrounding the central portion. The semiconductor includes a first semiconductor layer of a first conductivity type which extends laterally to run across the central portion and the peripheral portion, and a second semiconductor layer of a second conductivity type which faces the first semiconductor layer in a thickness direction and extends laterally to run across the central portion and the peripheral portion. A lifetime control layer is provided in the first semiconductor layer, extends laterally to run across the central portion and the peripheral portion and has a higher lifetime killer concentration in the central portion than the peripheral portion. The resistance control structure includes the lifetime control layer. |
| US09257540B2 |
Magnetic field effect transistor
A magnetic field effect transistor is presented. A magnetic field effect transistor comprises a current control part and a magnetic field applying part. A current control part comprises multiple electrodes and a current flowing material region located between multiple electrodes and in which the amount of current flowing between the electrodes is changed, and a magnetic field applying part applying a magnetic field generating from a magnetization state, which changes according to external input, of a pre-set material. By controlling current by using magnetic fields, high speed operation is possible as charging time is not required, and calculation results may be stored without external power supply because magnetic field is supplied by altering magnetization state of a material according to external input. |
| US09257538B2 |
Fin-type field effect transistor and manufacturing method thereof
A FinFET device includes a gate dielectric layer on a substrate, a fin on the gate dielectric layer having a middle section and source and drain regions at opposite ends, and a gate structure on the middle section of the fin. The FinFET device also includes a trench in a portion of the source and drain regions and a multi-layered epitaxial structure in the trench. The multi-layered epitaxial structure includes a first epitaxial layer in direct contact with the bottom of the trench, a second epitaxial layer on the first epitaxial layer, and a third epitaxial layer on the second epitaxial layer. The first epitaxial layer is a carbon-doped silicon layer having a carbon dopant concentration of less than 4 percent by weight, the second epitaxial layer is a barrier metal layer, and the third epitaxial layer is a metal layer. |
| US09257537B2 |
Finfet including improved epitaxial topology
A semiconductor device includes a semiconductor substrate having a plurality of semiconductor fins formed on an upper surface thereof. An epitaxial material is formed on the upper surface of the semiconductor substrate and on an outer surface of the semiconductor fins. The epitaxial material includes an epi upper surface having a lower region that contacts the semiconductor fins and an upper region formed above the lower region. The upper region extends parallel with an upper surface of the semiconductor fins. |
| US09257533B2 |
Method of making an insulated gate bipolar transistor structure
A method for fabricating a high voltage semiconductor transistor includes growing a first well region over a substrate having a first conductivity type, the first well region having a second type of conductivity. First, second and third portions of a second well region having the first type of conductivity are doped into the first well region. A first insulating layer is grown in and over the first well portion within the second well region. A second insulating layer is grown on the substrate over the third portion of the second well region. An anti-punch through region is doped into the first well region. A gate structure is formed on the substrate. A source region is formed in the first portion of the second well region on an opposite side of the gate structure from the first insulating layer. A drain region is formed in the first well region. |
| US09257532B2 |
Method for forming a semiconductor device with a trench and an isolation
A method for forming a semiconductor device. One embodiment provides a semiconductor substrate having a trench with a sidewall isolation. The sidewall isolation is removed in a portion of the trench. A gate dielectric is formed on the laid open sidewall. A gate electrode is formed adjacent to the date dielectric. The upper surface of the gate electrode is located at a depth d1 below the surface of the semiconductor substrate. The gate oxide is removed above the gate electrode. An isolation is formed simultaneously on the gate electrode and the semiconductor substrate such that the absolute value of height difference d2 between the isolation over the gate electrode and the isolation over the semiconductor substrate is smaller than the depth d1. |
| US09257530B1 |
Methods of making integrated circuits and components thereof
One exemplary embodiment provides a method of making an integrated circuit. The method includes forming a dummy gate structure above a semiconductor substrate, etching an exposed semiconductor substrate outside the dummy gate structure, depositing silicon oxide over the dummy gate structure and the semiconductor substrate to form a silicon oxide layer, etching source and drain contact vias through the silicon oxide layer, implanting source and drain dopants through the source and drain contact vias, removing the dummy gate structure, forming a final gate structure, etching substantially all of the silicon oxide layer, and depositing an ultra low K dielectric to form an ultra low K dielectric layer. |
| US09257529B2 |
Method of forming self-aligned contacts using a replacement metal gate process in a semiconductor device
Techniques disclosed herein provide a gate pitch scaling solution for creating source/drain contacts in a replacement metal gate fabrication scheme. Such techniques provide a self-aligned contact process that protects gate electrodes from shorts due to etching from misaligned patterns. Techniques herein provide a dual layer cap formed by making a semi conformal material deposition over a non-planar topography of RMG formation structures, and using selective etching and planarization to yield a dual layer protective cap that does not excessively increase an aspect ratio. |
| US09257522B2 |
Memory architectures having dense layouts
Some embodiments relate to a memory cell to store one or more bits of data. The memory cell includes a capacitor including first and second capacitor plates which are separated from one another by a dielectric. The first capacitor plate corresponds to a doped region disposed in a semiconductor substrate, and the second capacitor plate is a polysilicon or metal layer arranged over the doped region. The memory cell also includes a transistor laterally spaced apart from the capacitor and including a gate electrode arranged between first and second source/drain regions. An interconnect structure is disposed over the semiconductor substrate and couples the gate electrode of the transistor to the second capacitor plate. |
| US09257519B2 |
Semiconductor device including graded gate stack, related method and design structure
A semiconductor device is disclosed. The semiconductor device includes a substrate; and a gate structure disposed directly on the substrate, the gate structure including: a graded region with a varied material concentration profile; and a metal layer disposed on the graded region. |
| US09257518B2 |
Method for producing a metal-gate MOS transistor, in particular a PMOS transistor, and corresponding integrated circuit
At least one MOS transistor is produced by forming a dielectric region above a substrate and forming a gate over the dielectric region. The gate is formed to include a metal gate region. Formation of the metal gate region includes: forming a layer of a first material configured to reduce an absolute value of a threshold voltage of the transistor, and configuring a part of the metal gate region so as also to form a diffusion barrier above the layer of the first material. Then, doped source and drain regions are formed using a dopant activation anneal. |
| US09257516B2 |
Reduction of oxide recesses for gate height control
An intermediate semiconductor structure in fabrication includes a substrate. A plurality of gate structures is disposed over the substrate, with at least two of the gate structures separated by a sacrificial material between adjacent gate structures. A portion of the sacrificial material is removed to form openings within the sacrificial material, which are filled with a filler material having a high aspect ratio oxide. The excess filler material is removed. A portion of the gate structures is removed to form gate openings within the gate structures. The gate openings are filled with gate cap material and the excess gate cap material is removed to create a substantially planar surface overlaying the gate structures and the sacrificial material to control sacrificial oxide recess and gate height. |
| US09257513B1 |
Semiconductor component and method
In accordance with an embodiment, a method for manufacturing a semiconductor component includes providing a semiconductor material having a surface and forming a passivation layer on the semiconductor material Portions of the passivation layer are removed and portions of the semiconductor material exposed by removing the portions of the passivation layer are also removed. A layer of dielectric material is formed on the passivation layer and the exposed portions of the semiconductor material and first and second cavities are formed in the layer of dielectric material. The first cavity exposes a first portion of the semiconductor material and has at least one step shaped sidewall and the second cavity exposes a second portion of the semiconductor material. A first electrode is formed in the first cavity and a second electrode is formed in the second cavity. |
| US09257512B2 |
Semiconductor component with dynamic behavior
One embodiment provides a semiconductor component including a semiconductor body having a first side and a second side and a drift zone; a first semiconductor zone doped complementarily to the drift zone and adjacent to the drift zone in a direction of the first side; a second semiconductor zone of the same conduction type as the drift zone adjacent to the drift zone in a direction of the second side; at least two trenches arranged in the semiconductor body and extending into the semiconductor body and arranged at a distance from one another; and a field electrode arranged in the at least two trenches adjacent to the drift zone. The at least two trenches are arranged at a distance from the second semiconductor zone in the vertical direction, a distance between the trenches and the second semiconductor zone is greater than 1.5 times the mutual distance between the trenches, and a doping concentration of the drift zone in a section between the trenches and the second semiconductor zone differs by at most 35% from a minimum doping concentration in a section between the trenches. |
| US09257510B2 |
Electronic device having graphene channels
A graphene electronic device includes a substrate, a first electrode and a second electrode provided on the substrate and spaced apart from each other, and graphene channels connecting the first electrode with the second electrode. Each of the graphene channels is separated from the substrate to have a cylindrical structure. |
| US09257509B2 |
Electrical devices with graphene on boron nitride
Methods of forming and resulting devices are described that include graphene devices on boron nitride. Selected methods of forming and resulting devices include graphene field effect transistors (GFETs) including boron nitride. |
| US09257501B2 |
Semiconductor device
A semiconductor substrate of a semiconductor device includes a first conductive body region that is formed in the element region; a second conductive drift region that is formed in the element region; a gate electrode that is formed in the element region, that is arranged in a gate trench, and that faces the body region; an insulating body that is formed in the element region and is arranged between the gate electrode and an inside wall of the gate trench; a first conductive floating region that is formed in the element region and that is surrounded by the drift region; a first voltage-resistance retaining structure that is formed in the peripheral region and that surrounds the element region; and a gate pad that is formed in the peripheral region, and is electrically connected to the gate electrode in a position on the element region-side of the first voltage-resistance retaining structure. |
| US09257497B2 |
Metal-insulator-metal (MIM) capacitor techniques
Some embodiments relate to a metal-insulator-metal (MIM) capacitor. The MIM capacitor includes a capacitor bottom metal (CBM) electrode, a high-k dielectric layer arranged over the CBM electrode, and a capacitor top metal (CTM) electrode arranged over the high-k dielectric layer. A capping layer is arranged over the CTM electrode. A lower surface of the capping layer and an upper surface of the CTM electrode meet at an interface. Protective sidewalls are adjacent to outer sidewalls of the CTM electrode. The protective sidewalls have upper surfaces at least substantially aligned to the interface at which the upper surface of the CTM electrode meets the lower surface of the capping layer. |
| US09257496B2 |
Method of fabricating capacitor structure
A method of fabricating a capacitor structure includes the following steps. Firstly, a substrate is provided. A first conductive layer, a first insulation layer, a second conductive layer and a second insulation layer are sequentially formed over the substrate. A hard mask material layer is formed on the second insulation layer. Then, the hard mask material layer is defined with a photo resist pattern, so that a hard mask is formed. After the photo resist pattern is removed, the second conductive layer is defined with the hard mask, so that a first electrode of the capacitor structure is formed. |
| US09257493B2 |
Organic light-emitting diode display device
The present invention discloses an organic light-emitting diode display device. More particularly, the present invention relates to the structure of an organic light-emitting diode display device for suppressing a vertical crosstalk phenomenon in the organic light-emitting diode display device having an internal compensation structure for threshold voltage variations in driving transistors. According to an embodiment of the present invention, a shield electrode may be formed using the same metal layer as that of scan lines or data lines, thereby providing an organic light-emitting diode display device in which the effect of coupling between the gate electrode of driving thin-film transistors and the data lines is minimized. |
| US09257492B2 |
Method for producing a passive electronic component, method for producing an optoelectronic assembly and passive electronic component
Various embodiments may relate to a method for producing a passive electronic component, including forming a first electrically conductive layer on a substrate, forming a second electrically conductive layer on the first electrically conductive layer, forming a first trench in the first and second electrically conductive layers such that the substrate is exposed in the first trench, wherein the first trench separates a first contact region from a second contact region, applying a dielectric in a structured fashion to the second electrically conductive layer in the first contact region and at least partly to the substrate in the first trench such that the dielectric electrically insulates the first contact region from the second contact region, and applying an electrically conductive electrode layer in a structured fashion to the dielectric above the first contact region and to the second contact region. |
| US09257486B2 |
RRAM array having lateral RRAM cells and vertical conducting structures
An RRAM array is provided. The RRAM array includes a plurality of horizontal electrode lines elongated in a horizontal direction. The RRAM array also includes a plurality of conducting structures elongated in a vertical direction. Each of the conducting structures includes a plurality of electrode blocks and a plurality of contact vias which are alternately arranged. The electrode blocks and the electrode lines are on the same horizontal planes. The RRAM array further includes a plurality of resistance variable elements sandwiched between the electrode lines and the electrode blocks. |
| US09257484B2 |
Non-volatile memory device and method of manufacturing the same
According to one embodiment, there are provided a memory cell forming region, a first wiring hookup region in which first wirings extending in a first direction are formed by being drawn outside of the memory cell forming region, a second wiring hookup region which is disposed in a layer above the first wirings and in which second wirings extending in a second direction are formed by being drawn outside of the memory cell forming region, and a first dummy wiring connected to each of the second wirings. The first dummy wiring is disposed so that a sum of the area of the second wiring and the area of the first dummy wiring becomes the same in the respective second wirings. |
| US09257481B2 |
LED arrray including light-guiding structure
An LED array includes: a first LED unit having a first active layer and a first side; a second LED unit having a second active layer and a second side facing the first side; a trench separating the first LED unit from the second LED unit; and a light-guiding structure formed between the first LED unit and the second LED unite for guiding the light emitted by the first active layer and the second active layer away from the LED array. |
| US09257474B2 |
Solid-state image sensor and electronic device
There is provided a solid-state imaging device including a substrate having a surface over which a plurality of photodiodes are formed, and a protection film that is transparent, has a water-proofing property, and includes a side wall part vertical to the surface of the substrate and a ceiling part covering a region surrounded by the side wall part, the side wall part and the ceiling part surrounding a region where the plurality of photodiodes are arranged over the substrate. |
| US09257470B2 |
Imaging lens and solid state imaging device
According to one embodiment, an imaging lens includes a first optical system and a microlens array. The first optical system includes an optical axis. The microlens array is provided between the first optical system and an imaging element. The microlens array includes microlens units provided in a first plane. The imaging element includes pixel groups. Each of the pixel groups includes pixels. The microlens units respectively overlap the pixel groups when projected onto the first plane. The first optical system includes an aperture stop, and first, second, and third lenses. The first lens is provided between the aperture stop and the microlens array, and has a positive refractive power. The second lens is provided between the first lens and the microlens array, and has a negative refractive power. The third lens is provided between the second lens and the microlens array, and has a positive refractive power. |
| US09257468B2 |
Solid-state imaging device, imaging device, and signal reading medium that accumulates an amplified signal without digitization
This solid-state imaging device includes a first substrate and a second substrate which have circuit elements constituting pixels disposed therein are electrically connected to each other. The pixels includes: a photoelectric conversion element disposed in the first substrate; an amplifier circuit that amplifies a signal generated in the photoelectric conversion element to output the amplified signal; a signal accumulation circuit which is disposed in the second substrate and accumulates the amplified signal which is output from the amplifier circuit; and an output circuit that outputs the amplified signal accumulated in the signal accumulation circuit from the pixel. |
| US09257467B2 |
Image sensor modules, methods of manufacturing the same, and image processing systems including the image sensor modules
An image sensor module is provided. The image sensor module includes a printed circuit board (PCB), an image sensor chip disposed on a first plane of the PCB and electrically connected to the PCB, and an image signal processing chip disposed on the first plane of the PCB and electrically connected to the PCB. An aspect ratio of the image signal processing chip is at least two times greater than an aspect ratio of the image sensor chip. A minimum feature size of a metal line implemented in the image sensor chip is at least 1.5 times greater than a minimum feature size of a metal line implemented in the image signal processing chip. |
| US09257466B2 |
Solid state imaging device and method for manufacturing solid state imaging device
Certain embodiments provide a solid state imaging device including a plurality of pixels. Each of the pixels has a semiconductor layer which has a charge accumulating layer at a front surface thereof and a filter layer provided above a rear surface of the semiconductor layer. Transmissive wavelength bands of the filter layers included in the pixels are different from each other, and thicknesses which a plurality of the semiconductor layers included in the pixels and including a plurality of the charge accumulating layers have are different from each other. |
| US09257463B2 |
Self-aligned implantation process for forming junction isolation regions
A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation. |
| US09257462B2 |
CMOS image sensor for increasing conversion gain
In one embodiment, the image sensor includes a first photodiode configured to convert an optical signal into a photocharge, a sensing node configured to store the photocharge of the first photodiode, and a circuit configured to selectively output an electrical signal corresponding to the photocharge at the sensing node on an output line. The circuit is connected to at least a first conductive contact, and the output line is disposed between the sensing node and the first conductive contact. |
| US09257461B2 |
Image device including dynamic vision sensor, ambient light sensor and proximity sensor function
An image device including a pixel array and a controller, The pixel array having first pixels and second pixels and corresponding channel drivers. The controller may perform operations of a dynamic vision sensor (DVS), an ambient light sensor (ALS) and a proximity sensor (PS). |
| US09257458B2 |
Liquid crystal display device and manufacturing method thereof
A method of manufacturing a liquid crystal display device including a TFT substrate with display and peripheral regions. The display region has pixels each having a pixel electrode and a TFT. A counter substrate opposes the TFT substrate and has a color filter formed at a position corresponding to a position at which the pixel electrode is formed above the TFT substrate. The method includes coating, outside of the display region of the TFT substrate, a second alignment film in the shape of a frame, and coating, in the display region, a first alignment film that dries more slowly than the second alignment film. The first and second alignment films are in contact, and the second alignment film is thicker than the first alignment film. |
| US09257456B2 |
Method of forming a metal pattern and method of manufacturing a display substrate
A method of forming a metal pattern includes disposing a gate metal layer on a substrate; disposing a photoresist layer on the gate metal layer; etching portions of the photoresist layer to form a first photo pattern; etching portions of the gate metal layer to form a gate pattern including a gate electrode, in which the gate metal layer is patterned using the first photo pattern as a mask; ashing an end portion of the first photo pattern to form a second photo pattern; disposing a first gate insulating layer over the substrate and the second photo pattern; removing the second photo pattern and a portion of the first gate insulating layer disposed over the second photo pattern; and disposing a second insulating layer over the gate pattern and the remaining portions of the first gate insulating layer. |
| US09257453B2 |
Display device including first to sixth transistors and light-emitting element
In view of the problem that a reduced thickness of an EL film causes a short circuit between an anode and a cathode and malfunction of a transistor, the invention provides a display device that has a light emitting element including an electrode and an electroluminescent layer, a wire electrically connected to the electrode of the light emitting element, a transistor provided with an active layer including a source, a drain and a channel forming region, and a power supply line electrically connected to one of the source and the drain of the transistor, wherein the wire is electrically connected to the other of the source and the drain of the transistor, and the width of a part of the electrode in the vicinity of a portion where the electrode is electrically connected to the wire is smaller than that of the electrode in the other portion. |
| US09257450B2 |
Semiconductor device including groups of stacked nanowires and related methods
A method for making a semiconductor device may include forming, above a substrate, a stack of alternating layers of first and second semiconductor materials. The second semiconductor material may be different than the first semiconductor material. The method may further include forming fins from the stack, with each fin having alternating layers of the first and second semiconductor materials, and selectively removing sidewall portions of the second semiconductor material from the fins to define recesses therein. The method may also include forming a dielectric material within the recesses, forming additional first semiconductor material on sidewall portions of the first semiconductor material in the fins, and forming a dielectric layer overlying the fins to define nanowires including the first semiconductor material within the dielectric layer. |
| US09257445B2 |
Method of making a split gate non-volatile memory (NVM) cell and a logic transistor
Semiconductor structures and methods for making semiconductor structures include a split gate non-volatile memory (NVM) cell in an NVM region. A charge storage layer, a first conductive layer, and a capping layer are formed over the substrate, which are patterned to form a control gate stack in the NVM region of the substrate. A high-k dielectric layer, a metal layer, and a second conductive layer are formed over the substrate. The second conductive layer and the metal layer are patterned to form remaining portions of the second conductive layer and the metal layer over and adjacent to a first side of the control gate stack. The remaining portion of the second conductive layer is removed to form a select gate stack, which includes the remaining portion of the metal layer. A stressor layer is formed over the substrate. |
| US09257444B2 |
Method of fabricating semiconductor devices having vertical cells
According to example embodiments, a method of fabricating a semiconductor device includes: forming a preliminary stack structure including upper and lower preliminary stack structures by alternately stacking a plurality of interlayer insulating and sacrificial layers on a cell, first pad area, dummy area and second pad area of a substrate; removing an entire portion of the upper preliminary stack structure on the second pad area; forming a first mask defining openings over parts of the first and second pad areas; etching an etch depth corresponding to ones of the plurality of interlayer insulating and sacrificial layers through a remaining part of the preliminary stack structure exposed by the first mask; and repetitively performing a first staircase forming process that includes shrinking sides of the first mask and etching the etch depth through remaining parts of the plurality of interlayer insulating and sacrificial layers exposed by the shrunken first mask. |
| US09257434B2 |
Semiconductor device including a reservoir capacitor
A semiconductor device includes: a Through Silicon Via (TSV) region extending in a first direction and crossing a center portion of a semiconductor device; a plurality of cell regions disposed at both sides of the TSV region in a second direction crossing the first direction; a plurality of peripheral circuit regions each disposed between the TSV region and a corresponding cell region or between two neighboring cell regions in the first direction; a plurality of test pad regions each disposed at an edge portion of the semiconductor device and having a plurality of test pads, wherein the plurality of test pad regions encloses the cell regions, the peripheral circuit regions, and the TSV region; and a reservoir capacitor disposed below corresponding test pads in a test pad regions. |
| US09257431B2 |
Memory cell with independently-sized electrode
Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode. |
| US09257428B2 |
Structure and method for FinFET device
The present disclosure provides an embodiment of a fin-like field-effect transistor (FinFET) device. The device includes a plurality of first fin structures over a substrate. The first fin structure includes a first semiconductor material layer, a second semiconductor material layer disposed over the first semiconductor material layer, being at least partially surrounded by a semiconductor oxide feature. The device also includes a third semiconductor material layer disposed over the second semiconductor material layer and a second fin structures over the substrate and adjacent to one of the first fin structures. The second fin structure includes the first semiconductor material layer and the third semiconductor material layer disposed over the dielectric layer. |
| US09257424B2 |
Semiconductor device
A semiconductor device is provided that includes a composite semiconductor body including a high voltage depletion-mode transistor and a low voltage enhancement-mode transistor. The high voltage depletion-mode transistor is stacked on the low voltage enhancement-mode transistor so that an interface is formed between the high voltage depletion-mode transistor and the low voltage enhancement-mode transistor. The low voltage enhancement-mode transistor includes a current path coupled in series with a current path of the high voltage depletion-mode transistor, and a control electrode is arranged at the interface. |
| US09257423B2 |
Method to provide the thinnest and variable substrate thickness for reliable plastic and flexible electronic device
An electronic device is formed by depositing polyimide on a glass substrate. A conductive material is deposited on the polyimide and patterned to form electrodes and signal traces. Remaining portions of the electronic device are formed on the polyimide. A second polyimide layer is then formed on the first polyimide layer. The glass substrate is then removed, exposing the electrodes and the top surface of the electronic device. |
| US09257422B2 |
Signal processing circuit and method for driving signal processing circuit
A memory element capable of operating at high speed and reducing power consumption and a signal processing circuit including the memory element are provided. As a writing transistor, a transistor which is formed using an oxide semiconductor and has significantly high off-state resistance is used. In a memory element in which a source of the writing transistor is connected to an input terminal of an inverter, a control terminal of a transfer gate, or the like, the threshold voltage of the writing transistor is lower than a low-level potential. The highest potential of a gate of the writing transistor can be a high-level potential. When the potential of data is the high-level potential, there is no potential difference between a channel and the gate; thus, even when the writing transistor is subsequently turned off, a potential on the source side hardly changes. |
| US09257414B2 |
Stacked semiconductor structure and method
A method for forming a stacked semiconductor structure comprises providing a first chip comprising a plurality of first active circuits and a first aluminum connection pad, depositing a first dielectric layer on a first side of the first chip, forming a first copper bonding pad on the first aluminum connection pad, providing a second chip comprising a plurality of second active circuits, depositing a second dielectric layer on a first side of the second chip, forming a second copper bonding pad in the second dielectric layer, stacking the first chip on the second chip, wherein the first copper bonding pad is in direct contact with the second copper bonding pad and bonding the first chip and the second chip to form a uniform bonded feature. |
| US09257409B2 |
Decoupling MIM capacitor designs for interposers and methods of manufacture thereof
Decoupling metal-insulator-metal (MIM) capacitor designs for interposers and methods of manufacture thereof are disclosed. In one embodiment, a method of forming a decoupling capacitor includes providing a packaging device, and forming a decoupling MIM capacitor in at least two metallization layers of the packaging device. |
| US09257406B2 |
On-chip interconnects with reduced capacitance and method of fabrication thereof
An electronics interconnection system is provided with reduced capacitance between a signal line and the surrounding dielectric material. By using a non-homogenous dielectric, the effective dielectric loss of the material is reduced. This reduction results in less power loss from the signal line to the dielectric material, which reduces the number of buffers needed on the signal line. This increases the speed of the signal, and reduces the power consumed by the interconnection system. The fabrication techniques provided are advantageous because they can be fabricated using today's standard IC fabrication techniques. |
| US09257404B2 |
Semiconductor device, having through electrodes, a manufacturing method thereof, and an electronic apparatus
A semiconductor device includes a semiconductor substrate and a through electrode provided in a through hole formed in the semiconductor substrate. The through electrode partially protrudes from a back surface of the semiconductor substrate, which is opposite to an active surface thereof. The through electrode includes a resin core and a conductive film covering at least a part of the resin core. |
| US09257402B2 |
Terminal structure, and semiconductor element and module substrate comprising the same
A preferred terminal structure comprises a base material; an electrode formed on the base material; an insulating covering layer formed on the base material and on the electrode and having an opening exposing at least part of the electrode; an under bump metal layer containing Ni, formed in a region in the opening on the electrode so that an upper surface of the metal layer is at a position lower than an upper surface of the insulating covering layer in a peripheral edge portion of the opening; and a dome-shaped bump containing Sn and Ti, formed in a region in the opening on the under bump metal layer, wherein an end portion of a boundary between the under bump metal layer and the bump is in contact with an inner wall of the opening portion in the insulating covering layer. |
| US09257401B2 |
Method of fabricating bump structure and bump structure
A method of forming a semiconductor device includes forming an under-bump metallurgy (UBM) layer overlying a portion of a metal pad region within an opening of an encapsulating layer over a semiconductor substrate, and forming a bump layer overlying the UBM layer to fill the opening of the encapsulating layer. A removal process is initiated on an upper surface of the encapsulating layer and a coplanar top surface of the bump layer to remove the upper surface of the encapsulating layer until a top portion of the bump layer protrudes from the encapsulating layer. |
| US09257400B2 |
Semiconductor device
A semiconductor device has a chip mounting part, a first semiconductor chip, and a second semiconductor chip. The first semiconductor chip is mounted over the chip mounting part in a direction in which its first principal plane faces the chip mounting part. A part of the second semiconductor chip is mounted over the chip mounting part in a direction in which its third principal plane faces the first semiconductor chip. The element mounting part has a notch part. A part of the second semiconductor chip overlaps the notch part. In a region of the third principal plane of the second semiconductor chip that overlaps the notch part, a second electrode pad is provided. |
| US09257399B2 |
3D integrated circuit and methods of forming the same
An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer. |
| US09257396B2 |
Compact semiconductor package and related methods
A method of forming a semiconductor package includes providing a substrate having one or more conductive elements disposed therein. Each conductive element extends from a first surface of the substrate toward a second surface of the substrate extending beyond the second surface. The second surface comprises one or more substrate regions not occupied by a conductive element. A first die is attached within a substrate region, and the first die is coupled to at least one of the conductive elements. The first die may be coupled to at least one of the conductive elements by a wire bond connection. Alternatively, an RDL is formed over the second surface, and the first die is coupled to at least one conductive element through the RDL. A second die may be attached to an outer surface of the RDL, and the second die is electrically coupled to the first die through the RDL. |
| US09257387B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device has a resistor area and wiring area selectively disposed on a semiconductor substrate. In this semiconductor device, a second interlayer insulating film is formed above the semiconductor substrate, and a thin-film resistor is disposed on the second interlayer insulating film in the resistor area. Vias that contact the thin-film resistor from below are formed in the second interlayer insulating film. A wiring line is disposed on the second interlayer insulating film in the wiring area. A dummy wiring line that covers the thin-film resistor from above is disposed in a third wiring layer that is in the same layer as the wiring line, and an insulating film is interposed between the thin-film resistor and the dummy wiring line. |
| US09257385B2 |
Landing areas of bonding structures
A device includes a first and a second package component. A metal trace is disposed on a surface of the first package component. The metal trace has a lengthwise direction. The metal trace includes a portion having an edge, wherein the edge is not parallel to the lengthwise direction of the metal trace. The second package component includes a metal pillar, wherein the second package component is disposed over the first package component. A solder region bonds the metal pillar to the metal trace, wherein the solder region contacts a top surface and the edge of the portion of the metal trace. |
| US09257384B2 |
Integrated circuit packaging system with substrate and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; mounting a stack substrate over the base substrate with an inter-substrate connector directly on the stack substrate and the base substrate, the inter-substrate connector having an inter-substrate connector pitch; mounting an integrated circuit over the stack substrate, the integrated circuit having an internal connector directly on the stack substrate; and attaching an external connector directly on the base substrate, the external connector having an external connector pitch greater than the inter-substrate connector pitch. |
| US09257380B2 |
Forming functionalized carrier structures with coreless packages
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a die to a carrier material, wherein the carrier material comprises a top layer and a bottom layer separated by an etch stop layer; forming a dielectric material adjacent the die, forming a coreless substrate by building up layers on the dielectric material, and then removing the top layer carrier material and etch stop layer from the bottom layer carrier material. |
| US09257379B2 |
Coreless packaging substrate and method of fabricating the same
A coreless packaging substrate is provided which includes: a circuit buildup structure having at least a dielectric layer, at least a wiring layer and a plurality of conductive elements, a plurality of electrical pads embedded in the lowermost one of the at least a dielectric layer, a plurality of metal bumps formed on the uppermost one of the at least a wiring layer, and a dielectric passivation layer formed on the surface of the uppermost one of the circuit buildup structure and the metal bumps, with the metal bumps exposed from the dielectric passivation layer. The metal bumps each have a metal column portion and a wing portion integrally connected to the metal column portion, such that the bonding force between the metal bumps and a semiconductor chip is enhanced by the entire top surface of the wing portions of the metal bumps being completely exposed. |
| US09257372B2 |
Surface mount package for a semiconductor integrated device, related assembly and manufacturing process
A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed for mechanical coupling to the circuit board to increase a resonant frequency of the mounted package. The coupling features envisage at least a first coupling recess defined within the encapsulation starting from the main face, designed to be engaged by a corresponding coupling element fixed to the circuit board, thereby restricting movements of the mounted package. |
| US09257371B2 |
Semiconductor device
A semiconductor device is reduced in size. The semiconductor device includes a die pad, a plurality of leads arranged around the die pad, a memory chip and a power source IC chip mounted over the die pad, a logic chip mounted over the memory chip, a plurality of down bonding wires for connecting the semiconductor chip to the die pad, a plurality of lead wires for connecting the semiconductor chip to leads, and a plurality of inter-chip wires. Further, the logic chip is arranged at the central part of the die pad in a plan view, and the power source IC chip is arranged in a corner part region of the die pad in the plan view. This reduces the size of the QFN. |
| US09257370B2 |
Cavity package with pre-molded cavity leadframe
A cavity package is disclosed comprising a metal leadframe, a metal ring connected to the metal leadframe, a plastic body molded to the metal leadframe forming a substrate cavity including an exposed die attach pad of the leadframe for affixing a semiconductor device, exposed lead fingers of the leadframe for wire bonding to the semiconductor device and an external circuit, and an exposed top surface of the metal ring, and a metal cap for closing and encapsulating the substrate cavity. The metal ring is integrated into the pre-molded cavity leadframe for providing an electrical ground path from the metal cap to the die attach pad and permitting attachment of the metal cap to the pre-molded leadframe using solder reflow. |
| US09257368B2 |
Microelectric package utilizing multiple bumpless build-up structures and through-silicon vias
A microelectronic package having a first bumpless build-up layer structure adjacent an active surface and sides of a microelectronic device and a second bumpless build-up layer structure adjacent a back surface of the microelectronic device, wherein conductive routes are formed through the first bumpless build-up layer from the microelectronic device active surface to conductive routes in the second bumpless build-up layer structure and wherein through-silicon vias adjacent the microelectronic device back surface and extending into the microelectronic device are electrically connected to the second bumpless build-up layer structure conductive routes. |
| US09257366B2 |
Auto-compensating temperature valve controller for electro-rheological fluid micro-channel cooled integrated circuit
A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature. |
| US09257363B2 |
Semiconductor device and method of manufacturing the same
A base plate has a mounting surface on which a semiconductor element is mounted and a heat-radiation surface for radiating heat to a cooler. The cover has a portion that seals the semiconductor element on the mounting surface of the base plate. The cover has a projecting portion arranged outside the heat-radiation surface and projecting from a level of the heat-radiation surface in a thickness direction. The intermediate layer is arranged on the heat-radiation surface of the base plate, projects from the level of the projecting portion of the cover in a thickness direction, and is made of a thermoplastic material in a solid-phase state. |
| US09257359B2 |
System and method to process horizontally aligned graphite nanofibers in a thermal interface material used in 3D chip stacks
The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip. The method includes creating a first chip with circuitry on a first side and creating a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The method further includes placing a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip. |
| US09257355B2 |
Method for embedding a chipset having an intermediary interposer in high density electronic modules
A method for creating a high density electronic module including the steps of coupling a die to an interposer for form a chipset, mounting the chipset to a substrate, coupling a wafer to the substrate so that the chipset is within a window formed in the wafer, filling the window with encapsulant to encapsulate the chipset, removing the substrate to create a reconstructed wafer, and providing an interconnection structure on the interposer to form the high density electronic module. |
| US09257349B2 |
Method of scavenging impurities in forming a gate stack having an interfacial layer
A multi-layer scavenging metal gate stack, and methods of manufacturing the same, are disclosed. In an example, a gate stack disposed over a semiconductor substrate includes an interfacial dielectric layer disposed over the semiconductor substrate, a high-k dielectric layer disposed over the interfacial dielectric layer, a first conductive layer disposed over the high-k dielectric layer, and a second conductive layer disposed over the first conductive layer. The first conductive layer includes a first metal layer disposed over the high-k dielectric layer, a second metal layer disposed over the first metal layer, and a third metal layer disposed over the second metal layer. The first metal layer includes a material that scavenges oxygen impurities from the interfacial dielectric layer, and the second metal layer includes a material that adsorbs oxygen impurities from the third metal layer and prevents oxygen impurities from diffusing into the first metal layer. |
| US09257348B2 |
Methods of forming replacement gate structures for transistors and the resulting devices
Disclosed herein are illustrative methods and devices that involve forming spacers with internally trimmed internal surfaces to increase the width of the upper portions of a gate cavity. In some embodiments, the internal surface of the spacer has a stepped cross-sectional configuration or a tapered cross-sectional configuration. In one example, a device is disclosed wherein the P-type work function metal for a PMOS device is positioned only within the lateral space defined by the untrimmed internal surfaces of the spacers, while the work function adjusting metal for the NMOS device is positioned laterally between the lateral spaces defined by both the trimmed and untrimmed internal surfaces of the sidewall spacers. |
| US09257340B2 |
Wafer and method for forming the same
A wafer and a method for forming the same are disclosed. The wafer forming method can separate respective chips from others by performing a Deep Reactive Ion Etching (DRIE) process on a wafer including a plurality of chips. The wafer includes a plurality of chips configured to be arranged in row and column directions on the wafer, a scribe line configured to be formed among the plurality of chips so as to separate each chip, and an align key line configured to be formed in one side of the wafer so as to form an align key pattern. |
| US09257339B2 |
Techniques for forming optoelectronic devices
Embodiments relate to use of a particle accelerator beam to form thin films of material from a bulk substrate are described. In particular embodiments, a bulk substrate having a top surface is exposed to a beam of accelerated particles. In certain embodiments, this bulk substrate may comprise GaN; in other embodiments this bulk substrate may comprise (111) single crystal silicon. Then, a thin film or wafer of material is separated from the bulk substrate by performing a controlled cleaving process along a cleave region formed by particles implanted from the beam. In certain embodiments this separated material is incorporated directly into an optoelectronic device, for example a GaN film cleaved from GaN bulk material. In some embodiments, this separated material may be employed as a template for further growth of semiconductor materials (e.g. GaN) that are useful for optoelectronic devices. |
| US09257338B2 |
TSV substrate structure and the stacked assembly thereof
The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively. |
| US09257337B2 |
Semiconductor structure and manufacturing method thereof
A method for fabricating a semiconductor device is provided. The method includes: providing a first wafer having a first active surface and a first rear surface opposite to the first active surface, the first wafer comprising a first circuit formed therein; providing a second wafer having a second active surface and a second rear surface opposite to the second active surface, the second wafer comprising a second circuit formed therein; bonding the first active surface of the first wafer with the second active surface of the second wafer so as to electrically connecting the first circuit and the second circuit; thinning the second wafer from the second rear surface; and forming at least a conductive through via in the second wafer, wherein the conductive through via is electrically connected to the first circuit through the second circuit. |
| US09257334B2 |
Double self-aligned via patterning
A method including forming a penta-layer hardmask above a substrate, the penta-layer hardmask comprising a first hardmask layer above a second hardmask layer; forming a trench pattern in the first hardmask layer; transferring a first via bar pattern from a first photo-resist layer above the penta-layer hardmask into the second hardmask layer resulting in a first via pattern, the first via pattern in the second hardmask layer overlapping the trench pattern and being self-aligned on two sides by the trench pattern in the first hardmask layer; and transferring the first via pattern from the second hardmask layer into the substrate resulting in a self-aligned via opening, the self-aligned via opening being self-aligned on all sides by the first via pattern in the second hardmask layer. |
| US09257324B2 |
Forming structures on resistive substrates
A substrate includes a first region having a first resistivity, for optimizing a field effect transistor, a second region having a second resistivity, for optimizing an npn subcollector of a bipolar transistor device and triple well, a third region having a third resistivity, with a high resistivity for a passive device, a fourth region, substantially without implantation, to provide low perimeter capacitance for devices. |
| US09257323B2 |
Semiconductor device and method for forming the same
A semiconductor device includes a substrate and a gate structure formed over the substrate. The semiconductor device further includes an insulator feature formed in the substrate. The insulator feature includes an insulating layer and a capping layer over the insulating layer. |
| US09257319B2 |
Parallel single substrate processing system with alignment features on a process section frame
A system for fluid processing substrate surfaces arrayed in a fluid having a process section with a frame having a plurality of process elements to process the substrate surfaces without contacting the substrate surfaces and a substrate holder assembly having a number of substrate holders and configured for transporting substrates as a unit. The substrate holder assembly and each of the substrate holders are configured for removable coupling to the process section frame, each substrate holder configured to hold at least one of the substrates. The process section frame has alignment features disposed so that, on coupling of the substrate holder assembly with the process section frame, the alignment features interface with each substrate holder of the substrate holder assembly and locate each substrate holder in repeatable alignment, at corresponding coupling of each substrate holder and the process section frame, with respect to a predetermined feature of the process section. |
| US09257318B2 |
Operation method for vacuum processing apparatus
A method for operating a vacuum processing apparatus, the vacuum processing apparatus including: a plurality of cassette stands on which a cassette capable of housing a plurality of wafers therein can be placed; a plurality of vacuum processing vessels each having a processing chamber arranged therein, wherein the wafer is arranged and processed in the processing chamber; and at least one transport robot transporting the wafer on a transport path between either one of the plurality of cassettes and the plurality of vacuum processing vessels, the vacuum processing apparatus sequentially transporting in a predetermined transport order the plurality of wafers from either one of the plurality of cassettes to a predetermined one of the plurality of vacuum processing vessels and processing the plurality of wafers. The method includes a number determining step, a remaining-time determining step and a transport order skip step. |
| US09257317B2 |
Overhead hoist transport system
The present invention provides an overhead hoist transport system, which includes a rail, a stocker disposed under the rails, wherein the stocker can move along the direction of the rail, and a cleaning station, disposed on the rail to clean the stocker directly when the stocker is moving. |
| US09257315B2 |
Cooling plate, method for manufacturing the same, and member for semiconductor manufacturing apparatus
A member for a semiconductor manufacturing apparatus includes an AlN electrostatic chuck, a cooling plate, and a cooling plate-chuck bonding layer. The cooling plate includes first to third substrates, a first metal bonding layer between the first and second substrates, a second metal bonding layer between the second and third substrates, and a refrigerant path. The first to third substrates are formed of a dense composite material containing SiC, Ti3SiC2, and TiC. The metal bonding layers are formed by thermal compression bonding of the substrates with an Al—Si—Mg metal bonding material interposed between the first and second substrates and between the second and third substrates. |
| US09257313B2 |
Substrate processing and positioning apparatus, substrate processing and positioning method and storage medium recording program for processing and positioning a substrate
Disclosed is a substrate processing apparatus including: a substrate processing unit that performs substrate processing by supplying a processing liquid to a substrate to be processed; a positioning mechanism that contacts the sides of the substrate to determine the position of the substrate; a positioning driver that drives the positioning mechanism; a detector that detects the position of the positioning mechanism; a storage unit that stores the position of the positioning mechanism with respect to a reference substrate serving as a reference of the substrate as a reference position information; and an operator that calculates a difference between the reference position information and the position information of the positioning mechanism detected in the detector and calculates measurement information on the processed substrate based on the difference. |
| US09257308B2 |
Thermal interface material on package
A packaged assembly is disclosed, including thermal interface material dispensed on an organic package and methods of manufacturing. The method includes dispensing a thermal interface material (TIM) on an electronic assembly. The method further includes removing volatile species of the TIM, prior to lid placement on the electronic assembly. The method further includes placing the lid on the TIM, over the electronic assembly. The method further includes pressing the lid onto the electronic assembly. |
| US09257303B2 |
Selective formation of metallic films on metallic surfaces
Metallic layers can be selectively deposited on surfaces of a substrate relative to a second surface of the substrate. In preferred embodiments, the metallic layers are selectively deposited on copper instead of insulating or dielectric materials. In preferred embodiments, a first precursor forms a layer or adsorbed species on the first surface and is subsequently reacted or converted to form a metallic layer. Preferably the deposition temperature is selected such that a selectivity of above about 90% is achieved. |
| US09257299B2 |
Method of manufacturing semiconductor device and semiconductor manufacturing apparatus
According to one embodiment, a method of manufacturing a semiconductor device includes forming a resist and a layer to be etched on a substrate, forming a non-cured layer on the resist by supplying a metal compound containing Ru, forming a cured layer on a surface layer of the resist by using the non-cured layer, and etching the layer to be etched by reactive ion etching using the cured layer and the resist as a mask. |
| US09257297B2 |
Method of forming a fine pattern of a semiconductor device
A method of forming a fine pattern includes forming first line mask patterns on a mask layer to extend along a direction, forming second line mask patterns to extend along a diagonal direction with respect to the first line mask patterns, anisotropically etching the mask layer exposed by the first and second line mask patterns to form elliptical openings, and isotropically etching the mask layer provided with the openings to form a mask pattern with enlarged openings. |
| US09257295B2 |
Ion beam etching system
The disclosed embodiments relate to methods and apparatus for removing material from a substrate. In various implementations, conductive material is removed from a sidewall of a previously etched feature such as a trench, hole or pillar on a semiconductor substrate. In practicing the techniques herein, a substrate is provided in a reaction chamber that is divided into an upper plasma generation chamber and a lower processing chamber by a corrugated ion extractor plate with apertures therethrough. The extractor plate is corrugated such that the plasma sheath follows the shape of the extractor plate, such that ions enter the lower processing chamber at an angle relative to the substrate. As such, during processing, ions are able to penetrate into previously etched features and strike the substrate on the sidewalls of such features. Through this mechanism, the material on the sidewalls of the features may be removed. |
| US09257292B2 |
Etch system and method for single substrate processing
Provided is a method and system for increasing etch rate and etch selectivity of a masking layer on a substrate in an etch treatment system, the etch treatment system configured for single substrate processing. The method comprises obtaining a supply of steam water vapor mixture at elevated pressure, obtaining a supply of treatment liquid for selectively etching the masking layer over the silicon or silicon oxide at a set etch selectivity ratio, placing the substrate into the etch processing chamber, combining the treatment liquid and the steam water vapor mixture, and injecting the combined treatment liquid and the steam water vapor mixture into the etch processing chamber, wherein the flow of the combined treatment liquid and the steam water vapor mixture is controlled to maintain a set etch rate and a set etch selectivity ratio of the masking layer to silicon or silicon oxide. |
| US09257291B2 |
Method for forming a silicide layer at the bottom of a hole and device for implementing said method
A method for manufacturing a silicide layer in a hole formed across the entire thickness of a layer of a material deposited on a silicon layer, including: a first step of bombarding of the hole with particles to sputter the silicon at the bottom of the hole and deposit sputtered silicon on lateral walls of the hole; a second step of deposition in the hole of a layer of silicide precursor; a second step of bombarding of the hole with particles to sputter the silicon precursor at the bottom of the hole and deposit sputtered precursor on the internal walls of the hole; a second step of deposition in the hole of a layer of silicide precursor; and an anneal step to form a silicide layer in the hole. |
| US09257290B2 |
Low temperature poly-silicon thin film transistor and manufacturing method thereof
The present disclosure relates to a low temperature poly-silicon thin film transistor which possesses electrical characteristics and reliability, and a method of manufacturing the thin film transistor. The low temperature poly-silicon thin film transistor at least includes a gate insulating layer which is a composite insulating layer comprising at least three dielectric layers, wherein the compactness of each dielectric layer successively increases in order of the formation sequence thereof in the manufacturing process. Because the relation between the compactness of each layer of the composite insulating layer and that of the others thereof is taken into account according to the present disclosure, each layer in the composite insulating layer of the low temperature poly-silicon thin film transistor manufactured by the method according to the present disclosure can have enhanced surface contact characteristic and thin film continuity. The thickness of each layer in the composite insulating layer is further considered, so that the parasitic capacitance can be effectively reduced, and thus the response rate of the transistor can be improved. Namely, by improving the GI film forming quality, the electrical characteristic and reliability of the low temperature poly-silicon thin film transistor can be improved. |
| US09257288B2 |
Method and system for monitoring crystallization of amorphous silicon thin film, and method of manufacturing thin film transistor by using the method and system
A method and system for monitoring crystallization of an amorphous silicon (a-Si) thin film, and a method of manufacturing a thin film transistor (TFT) by using the method and system are disclosed. The method of monitoring the crystallization of the a-Si thin film includes: irradiating light from a light source onto a monitoring a-Si thin film to anneal the monitoring a-Si thin film; annealing the monitoring a-Si thin film and concurrently measuring a Raman scattering spectrum of light scattered by the monitoring a-Si thin film at set time intervals; and calculating a crystallization characteristic value of the monitoring a-Si thin film based on the Raman scattering spectrum. |
| US09257285B2 |
Ion source devices and methods
An ion source includes a chamber defining an interior cavity for ionization, an electron beam source at a first end of the interior cavity, an inlet for introducing ionizable gas into the chamber, and an arc slit for extracting ions from the chamber. The chamber includes an electrically conductive ceramic. |
| US09257280B2 |
Mitigation of asymmetrical profile in self aligned patterning etch
A method which is particularly advantageous for improving a Self-Aligned Pattern (SAP) etching process. In such a process, facets formed on a spacer layer can cause undesirable lateral etching in an underlying layer beneath the spacer layer when the underlying layer is to be etched. This detracts from the desired vertical form of the etch. The etching of the underlying layer is performed in at least two steps, with a passivation layer or protective layer formed between the etch steps, so that sidewalls of the underlying layer that was partially etched during the initial etching are protected. After the protective layer is formed, the etching of the remaining portions of the underlying layer can resume. |
| US09257273B2 |
Charged particle beam apparatus, thin film forming method, defect correction method and device forming method
A charged particle beam apparatus is provided that enables faster semiconductor film deposition than the conventional deposition that uses silicon hydrides and halides as source gases. The charged particle beam apparatus includes a charged particle source 1, a condenser lens electrode 2, a blanking electrode 3, a scanning electrode 4, a sample stage 10 on which a sample 9 is mounted, a secondary charged particle detector 8 that detects a secondary charged particle 7 generated from the sample 9 in response to the charged particle beam irradiation, a reservoir 14 that accommodates cyclopentasilane as a source gas, and a gas gun 11 that supplies the source gas to the sample 9. |
| US09257272B2 |
Deposited material and method of formation
A system and method for manufacturing a semiconductor device is provided. An embodiment comprises forming a deposited layer using an atomic layer deposition (ALD) process. The ALD process may utilize a first precursor for a first time period, a first purge for a second time period longer than the first time period, a second precursor for a third time period longer than the first time period, and a second purge for a fourth time period longer than the third time period. |
| US09257270B2 |
Method and composition for removing resist, etch residue, and copper oxide from substrates having copper, metal hardmask and low-k dielectric material
A semiconductor processing composition and method for removing photoresist, polymeric materials, etching residues and copper oxide from a substrate comprising copper, low-k dielectric material and TiN, TiNxOy or W wherein the composition includes water, at least one halide anion selected from Cl− or Br−, and, where the metal hard mask comprises only TiN or TiNxOy, optionally at least one hydroxide source. |
| US09257269B2 |
Methods and apparatus for the ion mobility based separation and collection of molecules
This invention describes an apparatus and method with a combined primary electrospray and secondary electrospray ionization source used to enhance ionization efficiency. The solid phase as well as liquid phase sampling, ionization, and detection is described. |
| US09257268B2 |
Imaging mass spectrometer and a method of mass spectrometry
An imaging mass spectrometer comprising an energy source adapted to substantially simultaneously provide energy to multiple spots on a sample to produce ions from the sample by a desorption process; and an analyzer adapted to detect the arrival time and spot origin of ions resulting from said desorption process. |
| US09257267B2 |
Composition, method, and kit for calibrating a mass spectrometer
A composition, method, and kit for calibrating a mass spectrometer including a predetermined concentration of a calibrant having a mixture of amino acid polyethylene glycol compounds and a solvent for dissolving the calibrant. The calibrant can be used in either positive or negative ionization mode, and it can be used in calibrating an atmospheric pressure chemical ionization or an electrospray mass spectrometer. The calibrant can include a mixture to enable calibration across a broad range of masses. |
| US09257266B2 |
Micro-channel plate, method for manufacturing micro-channel plate, and image intensifier
In a micro-channel plate, an electron emission film and an ion barrier film formed on a substrate are integrally formed by the same film formation step. In this structure, the electron emission film and the ion barrier film are made as continuous and firm films and the ion barrier film can be made thinner. Since the ion barrier film is formed on the back side of an organic film, the organic film is exposed during removal of the organic film. This prevents the organic film from remaining and thus suppresses degradation of performance of the ion barrier film due to the residual organic film, so as to suppress ion feedback from the micro-channel plate and achieve a sufficient improvement in life characteristics of an image intensifier. |
| US09257263B2 |
Rectangular filtered vapor plasma source and method of controlling vapor plasma flow
The invention provides an arc coating apparatus having a steering magnetic field source comprising steering conductors (62, 64, 66, 68) disposed along the short sides (32c, 32d) of a rectangular target (32) behind the target, and a magnetic focusing system disposed along the long sides (32a, 32b) of the target (32) in front of the target which confines the flow of plasma between magnetic fields generated on opposite long sides (32a, 32b) of the target (32). The plasma focusing system can be used to deflect the plasma flow off of the working axis of the cathode. Each steering conductor (62, 64, 66, 68) can be controlled independently. In a further embodiment, electrically independent steering conductors (62, 64, 66, 68) are disposed along opposite long sides (32a, 32b) of the cathode plate (32), and by selectively varying a current through one conductor, the path of the arc spot shifts to widen the erosion corridor. The invention also provides a plurality of internal anodes, and optionally a surrounding anode for deflecting the plasma flow. |
| US09257262B2 |
Lithography apparatus, lithography method, and method of manufacturing article
A lithography apparatus for performing pattern formation on a substrate includes a stage configured to hold the substrate and be movable, an optical system configured to irradiate the substrate with an energy beam for the pattern formation, and a controller configured to set an arrangement of first and second marks for overlay inspection, which is variable with respect to a first substrate for condition setting, and control the stage and the optical system so that first processing for forming the first mark on the first substrate without the pattern formation and second processing for forming the second mark on the first substrate with the pattern formation are performed based on the set arrangement. |
| US09257257B2 |
Electron beam control method, electron beam generating apparatus, apparatus using the same, and emitter
Provided is a Schottky emitter having the conical end with a radius of curvature of 2.0 μm on the emission side of an electron beam. Since a radius of curvature is 1 μm or more, a focal length of an electron gun can be longer than in a conventional practice wherein a radius of curvature is in the range of from 0.5 μm to not more than 0.6 μm. The focal length was found to be roughly proportional to the radius of the curvature. Since the angular current intensity (the beam current per unit solid angle) is proportional to square of the electron gun focal length, the former can be improved by an order of magnitude within a practicable increase in the emitter radius. A higher angular current intensity means a larger beam current available from the electron gun and the invention enables the Schottky emitters to be used in applications which require relatively high beam current of microampere regime such as microfocus X-ray tube, electron probe micro-analyzer, and electron beam lithography system. |
| US09257256B2 |
Templates including self-assembled block copolymer films
Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer. |
| US09257251B2 |
Mechanical latching hybrid switches and method for operating hybrid switches
Method and apparatus for a mechanical latching of at least one pole of an hybrid switch selected from SPST, SPDT, DPDT, reversing DPDT, multi pole MPST and MPDT including the integration of one of a single and plurality of hybrid SPDT or DPDT switches using springy element to maintain the engagement between the poles and one of the contacts including PCB assembly, for operating electrical loads via the switch manual key including the introduction of a key-plunger combination into the latching hybrid switch and remotely by powering the coil by a power pulse, including a CPU program for providing any of the manual keys of each SPDT or DPDT connected in a traveler lines to the integrated switch-relay to switch on-off group of loads and all the loads of home automation network or grid via optical cable, RF, IR in line of sight and bus line. |
| US09257245B2 |
Switch and folding structure thereof, and electronic device using the switch
An electronic device includes a housing, a support member coupled to the housing, a trigger member coupled to the support member, a sliding member, a first magnet member coupled to the sliding member, and a second magnet member coupled to the support member. The first magnet member includes two first magnets and a second magnet coupled to the corresponding first magnet. The magnetic pole of the first magnets is opposite to the magnetic pole of the second magnet. The second magnet member includes a third magnet and two fourth magnets. The magnetic pole of the third magnet is same as the magnetic pole of the second magnet. The magnetic pole of the fourth magnets is same as the magnetic pole of the first magnets. |
| US09257241B2 |
Falling-off structure of operational switch for vehicle
A switch body portion attached to a center console includes a dial switch. The switch body portion is held on the side of the enter console for attachment through engaging of front engagement portions and a rear engagement portion. When an external force having a specified magnitude or greater acts on the dial switch from the rear, the engaging of the front engagement portions is released, so that the switch body portion falls off downward, rotating around the rear engagement portion. Accordingly, an impact which may occur when some object hits against the dial switch projecting upward from an upper face of the center console from the rear can be properly absorbed. |
| US09257240B2 |
Key assembly and electronic device having the same
A key assembly which is configured to provide improved click feeling to a user and an electronic device having the same are provided. The key assembly includes a key body of elastic materials and contact projections, each of the contact projections which is protruded and formed from the key body and presses a switch device spaced apart from the key body by a gap providing a certain interval, wherein the key body is installed such that a contact surface of each of the contact projections is in contact with and pushed back by a certain distance by a pre-loading force of the switch device. |
| US09257238B2 |
Electrode and method of manufacturing the same
A method of fabricating a device is disclosed. The method comprises coating a solid structure by nanostructures selected from the group consisting of peptides and amino acids, under conditions that at least partially prevent assembly of the nanostructures into supramolecular structures. |
| US09257237B2 |
Dye-sensitized solar cell module and manufacturing method for same
The present invention is a dye-sensitized solar cell module provided with a pair of mutually opposed electrodes, partitions that connect the pair of electrodes and form a plurality of cell spaces together with the pair of electrodes, and an electrolyte filled into the cell spaces, wherein one electrode of the pair of electrodes has oxide semiconductor portions that face each of the plurality of cell spaces and are loaded with a photosensitizing dye, at least one electrode of the pair of electrodes is composed of at least two layers, the thickest layer is a metal substrate having a thickness of 100 μm or less or a resin film having a thickness of 500 μm or less, and the electrode containing the metal substrate or the resin film has a bending portion that bends so as to protrude towards the opposing electrode. |
| US09257234B2 |
Multilayer ceramic capacitor and board having the same mounted thereon
A multilayer ceramic capacitor may include: an active part including a plurality of first and second internal electrodes; upper and lower cover layers; and first and second external electrodes including head parts and band parts. When a thickness of the upper or lower cover layer is defined as C, a width of a margin portion of the ceramic body in a width direction is defined as M, a cross-sectional area of the ceramic body in a width-thickness direction is defined as Ac, a cross-sectional area of the active part in a width-thickness direction in a portion thereof in which the first and second internal electrodes are overlapped with each other in a thickness direction is defined as Aa, and a width of the band part of the first or second external electrode is defined as B, 1.826≦C/M≦4.686, 0.2142≦Aa/Ac≦0.4911, and 0.5050≦C/B≦0.9094 may be satisfied. |
| US09257220B2 |
Magnetization device and method
A magnetizer for a tissue-penetrating medical tool such as a needle, cannula, stylet, or catheter consist of a magnetic flux generator which generates a magnetic field in a tool-receiving space. The tool can be passed through or into and out of the space to magnetize it. Optionally the space can be defined by a disposable plastics tube, with a closed end, so that a defined length of the tool is magnetized. The magnetic flux generator can be a permanent magnet or electromagnet. Alternatively a conveyor belt can be used to transport a tissue-penetrating medical tool through a magnetic field generated by an electromagnet with the belt and the electromagnetic being controlled in response to an optical sensor for detecting the position of the tissue-penetrating medical tool. The device is suitable for magnetizing tools for use in surgical procedures where the tool is to be magnetically tracked. |
| US09257216B2 |
Metal powder and electronic component
Metal powder has composite particles each coated with a Zn-based ferrite film not containing Ni. |
| US09257215B2 |
Star quad cable with shield
A star-quad cable for transmitting electrical signals with at least two pairs of electrical conductors, wherein each conductor has an electrically conductive core and a conductor sheath of an electrically insulating material which surrounds the core radially, the conductors being arranged at the corners of a square in a cross section of the star-quad cable, wherein the conductors of a pair are arranged at diagonally opposite corners of the square, and in each case the four conductors are twisted with one another in accordance with a star-quad arrangement with a predetermined stranding factor, wherein an electrically conducive shield surrounds the two pairs of conductors radially on the outside. An additional insulator sheath (of an electrically insulating material is arranged between the conductors and the shield. |
| US09257213B2 |
Dielectric insulation medium
A dielectric insulation medium including sulphur hexafluoride (SF6) and/or tetrafluoro methane (CF4), in a mixture with at least one further component being an at least partially fluorinated fluoroketone. |
| US09257210B2 |
Lanthanum boride sintered body and method for producing the same
A lanthanum boride sintered body includes a phase including lanthanum and silicon at grain boundaries between crystal grains of lanthanum boride. In this lanthanum boride sintered body, the phase exists in various configurations such as a phase present at a triple point of grain boundary, and a phase present along the grain boundary. This phase is based on a lanthanum silicide (represented by the composition formula LaSix (0 |
| US09257209B2 |
Electromagnetic wave generator and bit generator using oscillation of charged particles
An electromagnetic wave generator includes first and second electrodes facing each other and spaced apart from each other; a chargeable particle disposed between the first and second electrodes; a voltage source which applies a voltage between the first and second electrodes; and an antenna electrically connected to one of the first and second electrodes and which radiates an electromagnetic wave due to induced current oscillation based on the applied voltage. |
| US09257208B2 |
Variable angle collimator
A system for producing a controllable beam of radiation is controllable electronically, and includes no parts that must move relative to one another while in operation to form the beam. The direction and cross-section of the beam may be controlled electronically by controlling an electron beam. Various embodiments provide an X-ray collimator that allows forming a scanning X-ray beam of desired size and flux independently of the aperture material thickness without requiring movement of the aperture or physical components that create the aperture. Some embodiments provide an X-ray collimator that allows forming a scanning X-ray beam of desired size and flux independently of the beam angle. |
| US09257205B2 |
Radiation detector module, radiation detector and radiation imaging apparatus
A detector module for a radiation detector in a radiation imaging apparatus is provided. The detector module includes a detecting element array including a plurality of detecting elements arranged in a matrix form in first and second directions orthogonal to each other, the detecting element array configured to allow radiation to penetrate through spaces defined between the detecting elements, an electronic circuit arranged on a radiation emission side of the detecting element array, and a radiation shielding body arranged on a radiation incident side of the detecting element array. The radiation shielding body includes a base material having radiation permeability and formed with a plurality of grooves extending in the first direction at respective positions corresponding to spaces between the detecting elements in the second direction, and a plurality of radiation shielding materials each inserted in a respective groove of the plurality of grooves. |
| US09257203B2 |
Setting a default read signal based on error correction
Apparatuses and methods related to setting a default read signal based on error correction include reading a page of data from a group of memory cells with a first discrete read signal and error correcting at least one codeword of the page of data as read with the first discrete read signal. Methods can include reading a page of data from the group of memory cells with a second discrete read signal different than the first discrete read signal and error correcting at least one codeword of the page of data as read with the second discrete read signal. One of the first and the second discrete read signals can be set as a default read signal based at least in part on the respective error corrections. |
| US09257202B2 |
Semiconductor devices
A semiconductor device includes a normal test signal generator and a termination signal generator. The normal test signal generator is suitable for generating a first enablement signal and a first pulse signal in response to an external command signal when a first code signal and a second code signal have a predetermined logic combination. Further, the normal test signal generator is suitable for decoding a first test address signal and a second test address signal to generate first to fourth normal test signals. The termination signal generator is suitable for receiving the first pulse signal during an enablement period of the first enablement signal to generate a first termination signal which is enabled when a predetermined signal among the first to fourth normal test signals is generated. |
| US09257201B2 |
Memory testing method and apparatus
A method and an apparatus for testing a memory are provided, where the memory includes a plurality of sectors each of which includes a plurality of bytes, and the testing is performed to the memory byte by byte. The method includes: during the testing, once a first byte in a first sector fails the testing, stopping testing the rest bytes in the first sector which haven't been tested, and skipping the testing to a second byte in a second sector. Accordingly, if one byte of the first sector fails the testing, the testing will be skipped to a second sector, and the remained bytes of the first sector will not be tested any more, and other testing items will not be implemented to the first sector within the whole testing flow. Therefore, redundant testing steps can be avoided and testing efficiency can be improved. |
| US09257200B2 |
Bit error testing and training in double data rate (DDR) memory system
DDR PHY interface bit error testing and training is provided for Double Data Rate memory systems. An integrated circuit comprises a bit error test (BERT) controller that provides a bit pattern; and a physical interface having a plurality of byte lanes. A first byte lane is connected by a loopback path to a second byte lane and the BERT controller writes the bit pattern that is obtained using the loopback path to evaluate the physical interface. The evaluation comprises (i) a verification that the bit pattern was properly written and read; (ii) a gate training process to position an internal gate signal; (iii) a read leveling training process to position both edges of a strobe signal; and/or (iv) a write bit de-skew training process to align a plurality of bits within a given byte lane. |
| US09257198B2 |
Shift register unit, shift register, gate drive circuit and display apparatus
To provide a shift register unit, which comprises a positive control signal input terminal, a reverse control signal input terminal, a first thin film transistor, a second thin film transistor, a positive input terminal, a reverse input terminal, a pull-up module and a first reset module, a gate of the first thin film transistor is connected with the positive input terminal, a first electrode of the first thin film transistor is connected with the positive control signal input terminal, a second electrode of the first thin film transistor is connected with a pull-up node of the pull-up module, a gate of the second thin film transistor is connected with the reverse input terminal, a first electrode of the second thin film transistor is connected with the pull-up node of the pull-up module, a second electrode of the second thin film transistor is connected with the reverse control signal input terminal. |
| US09257196B2 |
Semiconductor devices including E-fuse arrays
Semiconductor systems are provided. The semiconductor system includes a boot-up operation circuit and a timing sensor. The boot-up operation circuit transmits control data stored in a fuse array portion to a first data latch unit and a second data latch unit. The timing sensor detects timings of internal control signals to generate a restart signal. The boot-up operation circuit re-transmits the control data to the first and second data latch units. |
| US09257195B2 |
Memory controller operating method and memory system including memory controller
A method of operating a memory controller in a memory system including a nonvolatile memory device includes; erasing memory cells of a target memory block of the non-volatile memory device on a block basis, and then searching for a bad memory cell by a performing an erase verifying operation, comparing a threshold voltage of the bad memory cell to a reference voltage to generate comparison results, and designating as a bad area one of the entire target memory block, and a sub-block of the target memory block in response to the comparison results. |
| US09257194B1 |
Drain regulator for NOR flash memory
A drain regulator for a NOR flash memory includes a pump source, a pass transistor, a voltage divider, a Y-path gate, an amplifier, and a current detector. The pump source is configured to pump a supply voltage to a high voltage at a HV node. The pass transistor is coupled between the HV node and a bit line. The pass transistor is controlled by a control signal to generate a bit-line voltage at the bit line. The voltage divider divides the bit-line voltage by a factor to generate a feedback voltage at a feedback node. The Y-path gate biases the selected cell with a drain voltage. The amplifier supplied with the HV voltage compares the feedback voltage with a reference voltage to generate the control signal. The current detector senses a current flowing through the Y-path gate to generate a sense signal to the feedback node. |
| US09257192B2 |
Memory system performing multi-step erase operation based on stored metadata
A memory system, including a flash memory including multiple memory blocks, and a controller configured to erase each of the memory blocks using multiple steps. The controller stores, for each of the memory blocks, metadata indicating which of the multiple steps have been completed, and erases each of the memory blocks based on the stored metadata. |
| US09257191B1 |
Charge redistribution during erase in charge trapping memory
Techniques are provided to accelerate the redistribution of the holes in connection with an erase operation, so that there will be a reduced amount of redistribution of the holes after programming. As a result, short-term charge loss after programming is reduced. In one aspect, a positive control gate voltage is applied to a set of memory cells after erase and before programming. The positive control gate voltage has a relatively low amplitude and a long duration, compared to a programming voltage. The positive control gate voltage can be adjusted based on the erase depth of the memory cells and factors such as a count of program-erase cycles, a count of erase-verify iterations, sensing of a position of the lower tail, and a cross-sectional width of a vertical pillar of a memory hole. |
| US09257187B2 |
Data storing method, memory control circuit unit and memory storage apparatus
A data writing method, and a memory control circuit unit and a memory storage apparatus using the method are provided. The method including: programming data to several memory cells on a first word line of the rewritable non-volatile memory module of the memory storage apparatus, and a first predetermined reading voltage is initially configured for the first word line. The data storing method further includes: adjusting the first predetermined reading voltage to obtain a first available reading voltage for the first word line, and applying the first available reading voltage to the first word line to read first page data. The storing method further includes: if the difference value between the first available reading voltage and the first predetermined reading voltage is larger than a predetermined threshold value, performing a protection operation for the first page data. |
| US09257186B2 |
Memory access techniques for a memory having a three-dimensional memory configuration
A data storage device includes a memory having a three-dimensional (3D) memory configuration. A method includes writing first data at a first physical page that is disposed within the memory at a first distance from a substrate of the memory. The first data is written at the first physical page using a first write technique. The method further includes writing second data at a second physical page that is disposed within the memory at a second distance from the substrate. The second distance is greater than the first distance. The second data is written at the second physical page using a second write technique that is different than the first write technique. |
| US09257179B2 |
Semiconductor memory having volatile and multi-bit non-volatile functionality and method of operating
A semiconductor memory cell, semiconductor memory devices comprising a plurality of the semiconductor memory cells, and methods of using the semiconductor memory cell and devices are described. A semiconductor memory cell includes a substrate having a first conductivity type; a first region embedded in the substrate at a first location of the substrate and having a second conductivity type; a second region embedded in the substrate at a second location of the substrate and have the second conductivity type, such that at least a portion of the substrate having the first conductivity type is located between the first and second locations and functions as a floating body to store data in volatile memory; a trapping layer positioned in between the first and second locations and above a surface of the substrate; the trapping layer comprising first and second storage locations being configured to store data as nonvolatile memory independently of one another; and a control gate positioned above the trapping layer. |
| US09257173B2 |
Arithmetic processing unit and driving method thereof
An arithmetic processing unit including an SRAM with low power consumption and performing backup and recovery operation with no burden on circuits. One embodiment is a memory device including a plurality of memory cells. The memory cells include inverters in which capacitors for backing up data are provided. When data of all the memory cells in a region is not rewritten after data is returned from the capacitors to the inverters, data in the region is not transferred from the inverters to the capacitors and the inverters are turned off. When data of at least one of the memory cells in the region is rewritten, data in the region is transferred from the inverters to the capacitors and then power of the inverters are turned off. In this manner, backup is selectively performed to reduce power consumption. Other embodiments are described and claimed. |
| US09257172B2 |
Multi-port memory cell
A circuit includes a first data line, a second data line, a reference node, and a memory cell. The reference node is configured to have a reference voltage level corresponding to a first logical value. The memory cell includes a data node, a first transistor and a second transistor connected in series between the first data line and the reference node, and a third transistor between the data node and the second data line. A gate of the first transistor is coupled to the data node, and the first transistor is configured to be turned off when the gate of the first transistor has a voltage level corresponding to the first logical value. The third transistor is configured to be turned off when a gate of the third transistor has a voltage level corresponding to a second logical value different from the first logical value. |
| US09257167B2 |
Resistance change memory
According to one embodiment, a resistance change memory comprises a memory cell array, a write and read circuit, a temperature sensor, and a memory controller. The memory cell array comprises memory cells including magnetic tunnel junction (MTJ) elements. The write and read circuit performs a write operation and a read operation for the memory cells. The temperature sensor outputs temperature information corresponding to a temperature of the memory cell array. The memory controller controls the write operation and the read operation by the write and read circuit in accordance with the temperature information. |
| US09257166B2 |
Current sense amplifying circuit in semiconductor memory device
Disclosed is a current sense amplifier suitable for a nonvolatile memory device such as a magnetic random access memory. In the current sense amplifier, a reference memory cell for sensing is implemented by a memory cell equal to a normal memory cell without fabricating different reference memory cells. The current sense amplifier is formed of first and second cross coupled differential amplifiers being covalent bonded. The current sense amplifier compares a current flowing to a sensing node of a memory cell directly with currents flowing to reference sensing nodes. |
| US09257162B2 |
Alternate control settings
An integrated circuit, that may be a part of an electronic system, may include a first set of storage cells to store settings and a second set of storage cells to store alternate settings. At least one control cell may also be included in the integrated circuit. The at least one control cell may indicate whether to use the settings stored in the first set of storage cells, or the alternate settings stored in the second set of storage cells, to control one or more operating parameters of the integrated circuit. Methods for using the alternate setting are also described. |
| US09257151B2 |
Printed-circuit board supporting memory systems with multiple data-bus configurations
Described is a printed-circuit board (PCB) that supports memory systems in which the memory core organization changes with device width. The PCB includes a memory-controller mounting location and module connectors to receive respective memory modules. Each module connector connects directly to the controller mounting location via a respective set of system data lines that does not connect to any other module connector. System data lines also extend directly between module connectors to support memory configurations with different numbers of modules. The memory systems support one memory module of a wide data width or multiple memory modules of narrower data widths. The number of physical memory banks accessed reduces with device data width, resulting in reduced power usage for relatively narrow memory configurations. Increasing the number of logic memory banks for narrow memory widths reduces the likelihood of bank conflicts, and consequently improves speed performance. |
| US09257150B2 |
Techniques for analyzing operations of one or more restaurants
Embodiments of the invention provide techniques for using operational data and/or video footage to identify and diagnose operational issues. In some embodiments, business metrics represented in data produced by a restaurant's operational systems are identified and stored, conditions which warrant attention are identified, and the metrics that may indicate potential causes for those conditions are identified. Video footage may be correlated with business metric data to assist in diagnosing and remediating issues. |
| US09257148B2 |
System and method for synchronization of selectably presentable media streams
A system for synchronizing audio and video of selectably presentable multimedia content includes a memory for storing a plurality of selectably presentable multimedia content segments. Each content segment defines a portion of one or more content paths and includes a decision period during which a user may select a subsequent content segment as the content segment is playing. An assembly engine seamlessly assembles a subset of the content segments into one of the content paths, ultimately forming a multimedia presentation. A configuration manager determines an audio file and a video file to be played based on a content segment that is selected to be played immediately following the currently playing content segment. An audio engine processes the audio file for playback, and a video engine synchronizes playback of the video file with the playback of the audio file. |
| US09257144B1 |
Shingled magnetic record hard disk drive and method for creating a logical disk from physical tracks
A system for writing data to overlapping physical tracks of a shingled magnetic record (SMR) hard disk drive (HDD) and a method for creating a logical disk from overlapping physical tracks of the SMR HDD. The system comprises a write header and a memory identifying the overlapping physical tracks which are accessible through the logical disk. The physical tracks are spaced from each other by at least the width of the write header. The method comprises mapping in a memory the logical disk to writeable tracks of the overlapping physical tracks, the writeable tracks spaced from each other by at least the width of the write header. |
| US09257136B1 |
Magnetic tunnel junctions
A magnetic tunnel junction comprises a conductive first magnetic electrode comprising magnetic recording material. A conductive second magnetic electrode is spaced from the first electrode and comprises magnetic reference material. A non-magnetic tunnel insulator material is between the first and second electrodes. The magnetic recording material of the first electrode comprises a first crystalline magnetic region, in one embodiment comprising Co and Fe. In one embodiment, the first electrode comprises a second amorphous region comprising amorphous XN, where X is one or more of W, Mo, Cr, V, Nb, Ta, Al, and Ti. In one embodiment, the first electrode comprises a second region comprising Co, Fe, and N. |
| US09257131B2 |
Speech signal processing apparatus and method
A speech signal processing apparatus includes an amplitude and phase signal generation section that, based on an analyzing signal expressed by a complex signal generated from a speech signal applied with pitch marks every 1 pitch cycle, generates an amplitude signal and a phase signal on the time axis of the speech signal, a phase signal conversion section that converts the phase signal into a phase signal of a target pitch cycle width for each section of the 1 pitch cycle width based on the pitch marks, and a pitch conversion speech signal generation section that generates a speech signal in which pitch cycle is converted to the target pitch cycle based on an amplitude signal of the target pitch cycle width of a section corresponding to the section of the amplitude signal and based on a phase signal of the target pitch cycle width. |
| US09257124B2 |
Apparatus and method for coding and decoding multi-object audio signal with various channel
Provided are an apparatus and method for coding and decoding a multi-object audio signal. The apparatus includes a down-mixer for down-mixing the audio signals into one down-mixed audio signal and extracting supplementary information including header information and spatial cue information for each of the audio signals, a coder for coding the down-mixed audio signal, and a supplementary information coder for generating the supplementary information as a bit stream. The header information includes identification information for each of the audio signals and channel information for the audio signals. |
| US09257121B2 |
Device and method for pass-phrase modeling for speaker verification, and verification system
A device and method for pass-phrase modeling for speaker verification and a speaker verification system are provided. The device comprises a front end which receives enrollment speech from a target speaker, and a template generation unit which generates a pass-phrase template with a general speaker model based on the enrollment speech. With the device, method and system of the present disclosure, by taking the rich variations contained in a general speaker model into account, the robust pass-phrase modeling is ensured even the enrollment data is insufficient, even just one pass-phrase is available from a target speaker. |
| US09257118B2 |
Method and apparatus for performing speech keyword retrieval
A method and an apparatus are provided for retrieving keyword. The apparatus configures at least two types of language models in a model file, where each type of language model includes a recognition model and a corresponding decoding model; the apparatus extracts a speech feature from the to-be-processed speech data; performs language matching on the extracted speech feature by using recognition models in the model file one by one, and determines a recognition model based on a language matching rate; and determines a decoding model corresponding to the recognition model; decoding the extracted speech feature by using the determined decoding model, and obtains a word recognition result after the decoding; and matches a keyword in a keyword dictionary and the word recognition result, and outputs a matched keyword. |
| US09257116B2 |
System and dialog manager developed using modular spoken-dialog components
A dialog manager and spoken dialog service having a dialog manager generated according to a method comprising selecting a top level flow controller based on application type, selecting available reusable subdialogs for each application part, developing a subdialog for each application part not having an available subdialog and testing and deploying the spoken dialog service using the selected top level flow controller, selected reusable subdialogs and developed subdialogs. The dialog manager capable of handling context shifts in a spoken dialog with a user. Application dependencies are established in the top level flow controller thus enabling the subdialogs to be reusable and to be capable of managing context shifts and mixed initiative dialogs. |
| US09257115B2 |
Device for extracting information from a dialog
Computer-implemented systems and methods for extracting information during a human-to-human mono-lingual or multi-lingual dialog between two speakers are disclosed. Information from either the recognized speech (or the translation thereof) by the second speaker and/or the recognized speech by the first speaker (or the translation thereof) is extracted. The extracted information is then entered into an electronic form stored in a data store. |
| US09257112B2 |
Single coil parallel tapped magnetic pickup
A parallel tapped magnetic pickup for an electrical stringed musical instrument is provided. The parallel tapped magnetic pickup comprises a coil formed with at least two parallel connected wound wires. A guitar in combination with the parallel tapped pickup is additionally provided. |
| US09257108B2 |
Music box for reducing misalignment of wheels
A music box includes a star wheel, a stopper, a sun wheel, a motor, a sensor, and a controller. The star wheel is configured to rotate about a first shaft. The sun wheel is fixed on a second shaft and engages the star wheel. The motor is configured to rotate the first shaft and the second shaft. The sensor is configured to detect a rotation state of the sun wheel. The controller is configured to: read a music data; control the motor to rotate at a rotational speed based on a temp; determine a start timing at which the stopper starts to release the star wheel based on a sound output timing and the rotation state; calibrate the start timing to a calibrated start timing based on a value related to the rotational speed; and control the stopper to release the star wheel at the calibrated start timing. |
| US09257106B2 |
Digital bass drum kick
Embodiments of a digital bass drum kick for a bass drum are provided. A digital bass drum kick includes an acoustic unit, a connection unit, and a support member. The acoustic unit has a first primary side and a second primary side. The first primary side is configured to receive impacts by a bass drum beater of a bass drum pedal. The second primary side is configured to conformably contact a drumhead of a bass drum, the acoustic unit configured to output a digital bass drum signal representative of a sound of the bass drum in response to the first primary side receiving an impact. The connection unit is configured to couple to a hoop of a bass drum. The support member is coupled between the acoustic unit and the connection unit, and is configured to elevate the acoustic unit a predefined distance from the connection unit. |
| US09257099B2 |
Voltage generator and display device having the same
A display device including a voltage generator is disclosed. The voltage generator includes an analog driving voltage generator to convert a source voltage from an external source to an analog driving voltage and to output the analog driving voltage through an output terminal, a capacitor connected between the output terminal and a ground voltage node, and a discharge circuit connected between the output terminal and the ground voltage node to discharge a current at the output terminal in response to a blank synchronization signal. |
| US09257098B2 |
Apparatus and methods for displaying second content in response to user inputs
An apparatus is configured to detect one or more particular user inputs from respective one or more positions, each position associated with a respective edge region of a display; and upon detection of the one or more particular user inputs, modify at least a portion of a foreground view on the display to create a peep-hole within the foreground view in the portion, the foreground view comprising first content data associated with a foreground application and the peep-hole comprising second content data. In this way, the peep-hole may be considered to replace parts of the foreground view with second content data. Corresponding methods and computer programs are also described. |
| US09257096B2 |
Display system
The embodiments of the present invention disclose a display system comprising: a display panel; a backlight module for supplying backlight to the display panel; a drive module for driving the backlight module to emit light; and a control module for controlling the drive module to drive the backlight module to emit light, wherein the backlight module comprises first light emitting diodes and second light emitting diodes, and a spectral intensity of blue light of light emitted by the first light emitting diode is less than a spectral intensity of each of red light and green light of the light emitted by the first light emitting diode; wherein the drive module comprises a first drive unit for driving the first light emitting diodes to emit light under the control of the control module, and a second drive unit for driving the second light emitting diodes to emit light under the control of the control module. |
| US09257091B2 |
In-vehicle display device, method for displaying image information of mobile information terminal on vehicular display, and non-transitory tangible computer-readable medium for the same
An in-vehicle display device communicates with a mobile information terminal and displays image information of the mobile information terminal on a vehicular display. The in-vehicle display device includes: a mode detecting device that detects whether the mobile information terminal is in a normal operation mode or a power saving mode; and a display control device that changes a display mode of the vehicular display from a normal display mode to a power saving display mode for reducing an electric power consumption relating to the image display under a condition that the mobile information terminal is switched from the normal operation mode to the power saving mode. |
| US09257090B2 |
Graphical display of content on a display device in a spiral pattern
Graphical display content on a display of an electronic device includes retrieving a plurality of objects comprising the content; and displaying the plurality of objects within a plurality of panels tiled in a spiral, wherein the panels are tiled so that a size of each of the panels changes with geometric progression, and wherein relative sizes of the panels indicates an order or relevance of the plurality of objects. |
| US09257089B2 |
Augmented reality presentations
Technology is generally disclosed for augmented-reality presentations. In some embodiments, the technology can receive an indication of a user's sensitivity to an aspect of a presentation, receive general content relating to the presentation, receive overlay content relating to the presentation, combine the received general content and the received overlay content to create the presentation, and render the presentation. The overlay content may respond to the user's sensitivity. |
| US09257087B2 |
Display devices and pixel driving methods therefor
A display device is provided. The display device includes a pixel driving circuit including a liquid crystal capacitor coupled to a first node, a first storage capacitor, and a first voltage control unit. The first storage capacitor has a first terminal directly connected to a second node and a second terminal coupled to a common electrode. The first voltage control unit has first and second output terminals coupled to the first and second nodes, respectively. In a first period, the first voltage control unit feeds a first data voltage to the first node according to a first scan signal. In a second period later than the first period, the first voltage control unit feeds the first data voltage to the second node according to a second scan signal, such that a voltage level at the first node is changed to a first pixel voltage from the first data voltage. |
| US09257081B2 |
Two-screen display device
A two-screen display device, in which an increase of production cost can be suppressed while the same resolution as an image of a usual (one-screen display) device is maintained, is provided. In a liquid crystal display panel of the two-screen display device, each of a first sub-pixel for first image and a second sub-pixel for second image has an aspect ratio of about 6:1. A source line supplies an image signal to both the first sub-pixel and the second sub-pixel. Each row of the sub-pixel includes a gate line (first gate line) that drives the first sub-pixel and a gate line (second gate line) that drives the second sub-pixel. An opening of a parallax barrier is disposed in a region between the first sub-pixel and the second sub-pixel. |
| US09257079B2 |
Data driving system and chip for liquid crystal panel as well as liquid crystal display device
A data driving system and a data driving chip for a liquid crystal panel as well as a liquid crystal display (LCD) device comprising the same are disclosed. The data driving system comprises a data driving chip, a timing controller and a first interface connected to the data driving chip and the timing controller. The first interface comprises a terminating resistor for converting a current signal transmitted through the first interface into a voltage signal, and the terminating resistor is disposed inside the data driving chip. By having the terminating resistor disposed inside the chip, the present disclosure can eliminate the need of additional electric tests, thus saving the cost of the additional electric tests. |
| US09257078B2 |
LED backlight driving circuit having divider units and method for driving the LED backlight driving circuit
A light emitting diode (LED) backlight driving circuit includes a power supply, an LED light bar coupled to the power supply, a constant current driving chip that drives the LED light bar to light, and a comparing unit. The constant current driving chip includes an under-voltage protection pin that receives an under-voltage protection signal. An overvoltage collecting unit of the LED backlight driving circuit and an under-voltage collecting unit of the LED backlight driving circuit are coupled to an input end of the power supply, and an output voltage of the under-voltage collecting unit is directly input to the under-voltage protection pin. A reference voltage is input to a first input end of the comparing unit, and a second input end of the comparing unit is coupled to the overvoltage collecting unit. When an output voltage of the overvoltage collecting unit exceeds the reference voltage, the comparing unit sends the under-voltage protection signal to the under-voltage protection pin. |
| US09257074B2 |
Pixel compensation circuit
A pixel compensation circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a switch unit and a light emitting diode. The first transistor, the third transistor, the fourth transistor, the fifth transistor, and the switch unit are used to receive a respective switch signal. The pixel compensation circuit can compensate a threshold voltage of transistor automatically; and consequentially a driving current of light emitting diode is prevented from being affected by the change of the threshold voltage or the voltage drop of the light emitting diode. |
| US09257070B2 |
Image display method and display system
A display panel is provided. The display panel includes: a white-light organic light-emitting diode (WOLED) array, having a plurality of pixels, wherein the pixels are divided into multiple light groups and the light groups emit light according to a driving signal; a lens layer, configured to receive light from the WOLED array; a color filter layer, having color filters in different colors to filter the light from the lens layer; and a driving circuit, configured to receive a light group control signal and generate a driving signal to control the emission of the light groups, wherein the lens layer is placed between the color filter layer and the WOLED array, and is configured to refract the light emitted from each light group of the WOLED array, so that the light passes through the color filter layer to form images. |
| US09257066B2 |
Methods and devices for controlling operations of an organic light-emitting diode display
In one example embodiment, a method of operating an image data processing circuit which controls an operation of an organic light-emitting diode (OLED) display includes transforming at least one first RGB value into at least one luminance value and at least one chroma value. The method further includes adjusting the at least one luminance value and the at least one chroma value based on at least one first control value. The method further includes generating at least one second RGB value based on the at least one adjusted luminance value and the at least one adjusted chroma value. The method further includes outputting the second RGB values to the OLED display. |
| US09257063B2 |
Display unit
A display unit includes: a display panel; an illumination device illuminating the display panel; and a drive circuit driving the display panel and the illumination device. The illumination device includes a light modulation layer, and a first electrode and a second electrode sandwiching the light modulation layer therebetween, the first electrode and the second electrode each include a plurality of strip-like electrodes. The strip-like electrodes of the first electrode and the strip-like electrodes of the second electrode extend in directions intersecting with each other, and the drive circuit drives the respective strip-like electrodes to allow an in-plane distribution of a potential difference between the strip-like electrodes of the first electrode and the strip-like electrodes of the second electrode to be constant within one frame period, when a two-dimensional image, a three-dimensional image, or an image including a two-dimensional image and a three-dimensional image is displayed on the display panel. |
| US09257061B2 |
Display devices
A display device includes a base structure, a plurality of modules coupled to the base structure, where each of the modules include a plurality of actuator assemblies. Each of the actuator assemblies is individually controllable to move the actuator assemblies between a retracted state and a plurality of extended states. A controller is coupled to each of the modules and is programmed to control the actuator assemblies to move the actuator assemblies between the retracted state and the plurality of extended states. |
| US09257058B2 |
Anti-counterfeit method and apparatus for a document
An anti-counterfeiting apparatus for a document (10, 70, 90), in particular a credit title, an insurance document, a permit or a transport document (10, 70, 90), comprises a means for printing (25) on said document (10, 70, 90) at least one printed data field in visible characters (12, 14, 17, 19, 72, 92), means for reading (30, 30′) the data of said printed data field (12, 14, 17, 19, 72, 92) and means for generating a cutting signal (45) responsive to said reading step (30, 30′) of the data of the printed data field (12, 14, 17, 19, 72, 92). Furthermore, it comprises a cutting means of the document (10, 70, 90) in a predetermined zone thereof on the basis of said cutting signal (45). In particular, the cutting means is configured to make on the document, near the printed data field (12, 14, 17, 19, 72, 92), a cut data field (12a, 14a, 17a, 19a, 72a, 92a) in an inerasable and visible way. The cut data field (12a, 14a, 17a, 19a, 72a, 92a) consists of visible cut characters that are a duplication of the data shown of said printed data field (12, 14, 17, 19, 72, 92), that are arranged to allow a visual comparison by a user between said cut data field and said printed data field. |
| US09257054B2 |
Sport ball athletic activity monitoring methods and systems
A method for monitoring a ball used for an athletic activity includes detecting movement of the ball at a first time, using a sensor module coupled to the ball, determining that the movement of the ball corresponds to a predetermined activation movement, entering an active state of the sensor module in response to the determination that the movement of the ball corresponds to the predetermined activation movement, and detecting movement of the ball at a second time, using the sensor module in the active state. |
| US09257053B2 |
System and method for providing audio for a requested note using a render cache
A method for providing audio data corresponding to a requested musical note is disclosed, the method comprising: (a) providing a render cache having a plurality of cache entries, each of the cache entries corresponding to a different note; (b) receiving a request for a first note from a client; (c) identifying a first cache entry corresponding to the first note; (d) determining that a first audio segment corresponding to the first cache entry is not available; (e) identifying a second audio segment corresponding to a near-hit cache entry in the render cache; and (f) processing the second audio segment into a third audio segment that is substantially similar to the first audio segment. |
| US09257047B2 |
Computation of new aircraft trajectory using time factor
A time factor corresponding to an airspace delay or acceleration is communicated to an aircraft. A flight management computer or other computational device of the aircraft calculates a proposed change in trajectory in order to accommodate the time factor in an optimum or nearly optimum manner. One or more proposed changes in trajectory are subject to review by the pilot or other flight personnel. An operator-selected change in trajectory is then implemented in order to accommodate a new arrival time of the aircraft at its destination or a positional point. |
| US09257042B2 |
Learning road feature delay times based on aggregate driver behavior
Techniques are described for generating and using information regarding road traffic in various ways, including by obtaining and analyzing road traffic information regarding actual behavior of drivers of vehicles on a network of roads. Obtained actual driver behavior information may in some situations be analyzed to determine actual delays for vehicles encountering various particular road features in the network of roads, such as for identified decision points at which drivers face choices corresponding to possible alternative routes through the network of roads (e.g., intersections, highway exits and/or entrances, etc.) and/or for other traffic flow impediments. The identified and determined information from the analysis may then be used in various manners, including in some situations to assist in determining particular recommended or preferred routes of vehicles through the network of roads based at least in part on actual driver behavior information. |
| US09257041B2 |
Predicting expected road traffic conditions based on historical and current data
Techniques are described for determining and using information regarding expected road traffic flow conditions information for vehicles traveling on roads. The expected road traffic flow conditions for a particular portion of a road may be generated by combining historical representative information about road traffic flow conditions for that road portion with current information about actual traffic flow on or near that road portion. The combination may, for example, provide benefits for estimating expected traffic flow conditions information for roads with structural flow obstructions that cause reduced traffic flow at certain road locations and times—for example, the expected traffic flow conditions information may be based at least in part on fitting or otherwise adapting partial actual traffic flow information about a vehicle's actual travel path to a historical travel profile for a road that includes representative traffic flow information for various combinations of road locations and time periods. |
| US09257039B2 |
Method for detecting time synchronization ability of real-time measuring device based on time variable
A method for detecting a time synchronization ability of the real-time measuring device based on a time variable is provided. On a premise that the real-time measuring device correctly receives time service signals, the method aims at detecting time synchronization signal application ability of the real-time measuring device, and involves a purely resistive loop comprising a value transferring device and a time controllable switch. The method, via a time synchronization performance thereof, relatively completely reflects the time synchronization signal application ability of the device within a value transfer requirement. The method is a development upon power station time synchronization time service signals and transmission accuracy detection and an improvement of power station time synchronization detection procedures. The method facilitates improving real-time analysis and monitoring abilities of a power station and a power grid to a primary device and a primary system. |
| US09257038B2 |
Fluids testing apparatus and methods of use
The invention is directed to a mobile hand held miniature laboratory system in general, and to fluid testing apparatus for performing a parameter measurement in a fluid sample and methods of use in particular. The apparatus comprising: a strip adapted to absorb a fluid sample and to produce a signal indicative of the parameter level in the sample; and adaptor adapted to connect the strip to a smart phone to allow delivery of the produced signal or a correlated signal to the smart phone for obtaining a measurement of the fluid parameter displayed on the smart phone, wherein the testing apparatus relies on the smart phone at least for power supply and display device. The fluid may be a physiological fluid such as blood, urine, saliva or amniotic fluid, or a non-physiological fluid such as fluid obtained from industrial pools for fish or algae growth, or entertainment swimming pools. |
| US09257036B2 |
Long lifespan wireless sensors and sensor network
Methods, systems, and apparatuses for managing sensor information are disclosed. An example apparatus can comprise a power unit configured to collect energy, a sensor unit configured to receive sensor data from a sensor, a memory unit configured to store the sensor data, a communication unit configured to wirelessly broadcast the sensor data to one or more sensor nodes in a network of sensor nodes, and a processing unit. The processing unit can be configured to operate at least one of the sensor unit, the memory unit, and the communication unit after the energy collected in the power unit reaches a threshold value. |
| US09257035B2 |
Remote control device, remote control system, and storage medium storing control program, and medium to be attached to electrical device
According to an aspect, a remote control device includes a display unit, an operation detecting unit, a reading unit, a control unit, and a code transmitting unit. The operation detecting unit detects an operation. The reading unit reads information used for remotely controlling an electrical device from the electrical device. The control unit causes the display unit to display a control screen used for remotely controlling the electrical device based on the information read by the reading unit. The code transmitting unit transmits a control code acquired based on the information read by the reading unit to the electrical device in response to an operation detected by the operation detecting unit while the control screen is displayed on the display unit. |
| US09257030B2 |
Electronic device with environmental monitoring
A mounting system for an electronic device is described. This mounting system includes a base that can be rigidly mounted on or underneath a wall. Moreover, the base can be remateably coupled to the electronic device. The remateable coupling may involve pins that are inserted into corresponding holes and rotated into a lock position. Alternatively, the remateable coupling may involve magnets that mechanically couple to each other so long as the electronic device and the base are within a predefined distance. The electronic device may receive power via the remateable coupling or via inductive charging. In addition, the electronic device may monitor a spatial parameter, such as: a location of the electronic device, a velocity of the electronic device and/or an acceleration of the electronic device. If this spatial parameter changes without the electronic device first receiving a security code, the electronic device provides an alert. |
| US09257029B1 |
System and method of remote monitoring and diagnostics for health conditions and emergency interventions
An automated healthcare intervention system includes biometric and activity sensors in a residential area. A server stores base data for an associated healthcare subject in a data storage network, and leverages the base data to infer temporal relationships with respect to potential conditions for the subject. The server determines that an event requiring intervention has occurred by comparing combinations of base data and inferred temporal relationships with associated time ranges and threshold values, and delivers an intervention prompt to an associated healthcare provider. Post-event monitoring allows for predictive analysis with respect to future occurrences of a similar event, and further enables determination of a severity of the event, for example a fall. Defined sleeping areas or food storage areas may be monitored over time and with respect to defined patterns and healthcare conditions of the subject to identify sleeping or eating disorders. |
| US09257026B2 |
Personal self-defense device
A self-defense device includes a housing structure, a spray apparatus and a sound generating mechanism. The housing structure includes an interior space accessible though an opening within a first end portion thereof. The spray apparatus is attached to a first end portion of the housing structure. The spray apparatus allows a substance configured for impairing at least one of sight and respiratory function of a person to be selectively sprayed therefrom. The sound generating mechanism within the interior space of the housing structure. Actuation of the sound generating mechanism causes a sound recognizable as that of a firearm being mechanically charged to be created thereby. |
| US09257025B2 |
Method to drive an antenna coil maintaining limited power source output
Electronic article surveillance system includes an antenna system comprised of two or more of resonant circuits. Each resonant circuit includes an exciter coil having at least one wire turn aligned on a common coil axis. A transmitter is coupled to the antenna system and is arranged to generate an antenna system composite exciter signal. The composite exciter signal is comprised of a plurality of co-exciter signals having the same predetermined frequency. The composite exciter signal is capable of exciting an EAS security tag when applied to the antenna system. The transmitter has two or more transmitter output ports, each independently coupled to one of the plurality of resonant circuits. Each of the plurality of co-exciter signals is respectively provided separately from a transmitter output port to one of the of resonant circuits. |
| US09257024B2 |
Theft deterrent device
A system and method for protecting a merchandise item is presented. An alarm system for protecting the merchandise item includes: an alarm logic, a cable, and a switch. The cable has first and second ends with the first end adapted to be plugged into the alarm system. The switch is located at the second end of the cable and indicates when the second end of the cable is attached to the merchandise item and when the second end of the cable is not connected to the merchandise item. The second end of the cable can be connected to a standard port located on the merchandise item. The alarm system generates an alarm when the second end of the cable is not connected to the merchandise item. |
| US09257016B1 |
Poker game player tracking device
A poker game player tracking device for tracking status of multiple players to facilitate efficient continuation of game play. The device includes a panel having a top surface. Each of a plurality of status indicators is positioned on the top surface of the panel. Each status indicator is associated with a specific condition relevant to playing poker. The status indicators are grouped into arrays of status indicators to indicate information about a specific player during a poker game. Each of a plurality of status markers is coupled to the panel. Each status marker is positioned to selectively cover an associated one of the status indicators. |
| US09257015B2 |
Systems and methods for advanced wagering
Included are systems and methods for advanced wagering. Some embodiments may include determining a desired wagering event for placing a wager, providing a user interface that includes a wager field for a user to indicate a wager and a payout field for the user to enter a desired payout that is based on the wager, calculating a wager amount to achieve the desired payout, and providing the wager amount to the user. |
| US09257009B2 |
Gaming system, jackpot controller, and a jackpot triggering method
A jackpot triggering method comprising: determining a jackpot trigger value from a current value of at least one jackpot trigger parameter; generating a submission value in response to receipt of a contribution associated with a gaming device participating in the jackpot, by using a value of at least one contribution parameter associated with the contribution as a seed value to randomly generate the submission value; and making a jackpot award if the submission value corresponds to the jackpot trigger value. |
| US09257008B2 |
Apparatus, system and method for awarding progressive or jackpot prizes
Gaming methods and apparatus are described for providing a plurality of progressive prizes for a gaming system. Separate progressive prizes are maintained for each of a plurality of different wager options for a game playable on the gaming system. The progressive prizes can be maintained so as to reduce the difference in contribution to the expected return to player between the wager options. |
| US09257007B2 |
Customizing offers for sales of combinations of virtual items
A method of customizing offers for sales of combinations of virtual items at discounted prices is disclosed. A combination of virtual items of a computer-implemented game is selected such that the sum of the values of each of the combination of virtual items has a proportion to an amount of currency in an account of a user of the computer-implemented game, the selecting being performed by a processor. An offer for a sale of the combination of the virtual items at a discounted price is generated for the user of the computer-implemented game. The offer for the sale of the combination of virtual items at the discounted price is presented to the user. |
| US09257004B2 |
Reel basket encoder
A motorized reel assembly for a gaming machine includes a reel assembly, and an encoder disc. The reel assembly includes a central hub defining a central opening and a pair of flange-receiving apertures on opposing sides of the central opening. The encoder disc includes a disc hub, a flagged exterior ring, and coupling flanges. The disc hub defines a disc cavity extending through a center of the disc hub. The flagged exterior ring is concentrically positioned and extends around the disc hub. The coupling flanges each protrude from the disc hub toward the central hub on opposite sides of the disc cavity. Each of the coupling flanges extends through a different flange-receiving aperture of the pair of flange-receiving apertures of the central hub and interfaces with a surface of the reel assembly facing away from the disc hub to at least partially secure the encoder disc to the reel assembly. |
| US09257003B2 |
Gaming machine with screen split and merge feature
A gaming machine includes a display device and a processor coupled to the display device. The processor is configured to cause the display device to display a game using a first frame. The processor is also configured to divide the first frame into a plurality of second frames during play of the game in the first frame, cause the display device to display the plurality of second frames, and enable continued play of the game separately within each second frame. In addition, the processor is configured to merge the plurality of second frames into the first frame, cause the display device to display the first frame, and enable continued play of the game within the first frame. |
| US09256999B2 |
Gaming device having an award distributor and an award accumulator bonus game
A gaming device that enables players to accumulate awards by activating an award distributor having a plurality of award symbols and at least one selection group activator symbol. The gaming device provides the player with a plurality of activations where an award is associated with each award symbol indicated in each activation. When a selection group activator symbol is indicated, the gaming device displays at least one selection set having a plurality of selections associated with selection awards. The gaming device enables a player to select one selection and provides the associated selection award to the player. The number of available selections in the selection set decreases by one after the player picks a selection. If the selection group activator symbol is subsequently indicated, the player picks from the remaining available selections in the selection set. |
| US09256997B2 |
Secure repair kiosk system and method
A secure repair kiosk system is provided for receiving items/devices for repair. The secure repair kiosk system includes a kiosk that receives items for repair. The kiosk includes multiple holding slots that each contains a transfer box used as a secure and traceable means for transferring devices to and from a remote repair site. A customer interacts with a user interface of the Kiosk to generate repair drop-off request and gain access to an empty transfer box. An empty particular transfer box is presented to a user during drop-off of the device that will typically accompany the device during transfer to the repair site, during repair of the device, during transfer back to the Kiosk, and delivery to the user. The customer interacts with the user interface of the Kiosk to generate repair pick-off request and gain access to a transfer box that contains that customers repaired device. |
| US09256994B2 |
Unmanned aerial vehicle authorization and geofence envelope determination
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for unmanned aerial vehicle authorization and geofence envelope determination. One of the methods includes maintaining, by a cloud system in wireless communication with Unmanned Aerial Vehicles (UAVs), allocated geofence envelopes for one or more of the UAVs, with each geofence envelope being a virtual barrier for a real-world geographic area. A request for approval of an updated geofence envelope is received from a first UAV in flight. The cloud system determines that the updated geofence envelope has not been allocated and/or the updated geofence envelope does not interfere with allocated geofence envelopes. In response to the determination, a response indicating approval of the request is generated. The generated response is provided to the first UAV. |
| US09256992B2 |
Systems and methods for assessing vehicle handling
Various embodiments of the present invention are directed to a fleet management computer system configured for assessing vehicle backing According to various embodiments, the fleet management computer system is configured to assess operational data associated with one or more vehicles and identify vehicle backing events occurring during a particular time period. In various embodiments, the fleet management computer system is also configured to determine one or more backing characteristics for the identified backing events and generate a graphical display providing backing information indicative of the backing characteristics. |
| US09256982B2 |
Medical image rendering
Medical image rendering is described. In an embodiment a medical image visualization engine receives results from an organ recognition system which provide estimated organ centers, bounding boxes and organ classification labels for a given medical image. In examples the visualization engine uses the organ recognition system results to select appropriate transfer functions, bounding regions, clipping planes and camera locations in order to optimally view an organ. For example, a rendering engine uses the selections to render a two-dimensional image of medical diagnostic quality with minimal user input. In an embodiment a graphical user interface populates a list of organs detected in a medical image and a clinician is able to select one organ and immediately be presented with the optimal view of that organ. In an example opacity of background regions of the medical image may be adjusted to provide context for organs presented in a foreground region. |
| US09256979B2 |
Storage medium having stored thereon image display program, image display system, image display method, and image display apparatus
A computer-readable storage medium has stored thereon an program that is executed in a display apparatus that takes an image of a virtual three-dimensional space in which a first object and a second object are present, by a virtual camera and renders the virtual three-dimensional space. The program allows the apparatus to generate a silhouette image for representing a silhouette of the first object, in which silhouette image, gradation information changes in accordance with a distance from the second object to each part of the first object; to generate an image of the second object that is seen from the virtual camera; and to synthesize the silhouette image on the image of the second object that is seen from the virtual camera, such that the silhouette image is darker at a portion thereof corresponding to a part of the first object closer to the second object. |
| US09256978B2 |
Image processing apparatus and method
An image processing apparatus and method. The image processing method includes a data obtaining unit for obtaining volume data that contains a target image; a depth-data obtaining unit for obtaining depth data that indicates a depth to the surface of the target image from an image plane; an image processing unit for processing the volume data into a processed volume data based on the depth-data, and obtaining a rendered image based on the processed volume data; and a display unit for displaying the rendered image. |
| US09256977B2 |
System for reconstruction of virtual frequency selective inversion MR images
A virtual frequency selective inversion (VFSI) method receives at least one MR image representative dataset and an associated phase reference dataset, and classifies anatomical material into a first component representing anatomical material having a first range of resonance frequencies associated with a first range of phase differences between the MR image representative dataset and the associated phase reference image dataset, and a second component representing anatomical material having a second range of resonance frequencies associated with a second range of phase differences between the MR image representative dataset and the associated phase reference image dataset. The method assigns different visual attributes to first and second components derived using phase differences between the MR image representative dataset and the reference image dataset and displays an image. |
| US09256974B1 |
3-D motion-parallax portable display software application
A video recording that includes rotation around a central point within a desired range of motion is used to generate a set of frames that is cropped by use of a centering reference and a cropping template registered to each frame by using the centering reference in each of the frames. The centering reference is an interocular distance of the photographic subject (which may be a live person or a mannequin) so that a vertical centerline established at a midpoint of the interocular distance is centered laterally by the cropping template. The images obtained can be displayed in a portable computer device to give an illusion of viewing a photographic subject as a solid 3-D object on the screen and additional product images can be merged to give the further illusion that the subject is wearing the product. |
| US09256973B2 |
Controlling animated character expression
A system includes a computer system capable of representing one or more animated characters. The computer system includes a blendshape manager that combines multiple blendshapes to produce the animated character. The computer system also includes an expression manager to respectively adjust one or more control parameters associated with each of the plurality of blendshapes for adjusting an expression of the animated character. The computer system also includes a corrective element manager that applies one or more corrective elements to the combined blendshapes based upon at least one of the control parameters. The one or more applied corrective elements are adjustable based upon one or more of the control parameters absent the introduction of one or more additional control parameters. |
| US09256970B2 |
Visual analytics of multivariate session data using concentric rings with overlapping periods
Visual analytics for multivariate session data using concentric rings with overlapping periods includes displaying an interactive graph in a display. The interactive graph includes at least a portion of multiple concentric rings where each one of at least some of the multiple concentric rings represents periodic time units. At least some of the multiple concentric rings are divided into cells where the cells represent smaller time periods than the time units. A color of each of the cells represents a value of a metric. Also, an overlapping period ring displayed with the multiple concentric rings where the overlapping period ring comprises segments that represent overlapping metrics from the cells of the concentric rings that correspond with the segments. |
| US09256969B2 |
Transformation function insertion for dynamically displayed tracer data
A visualization system for a tracer may include a processing pipeline that may generate tracing data, preprocess the data, and visualize the data. The preprocessing step may include a mechanism to process user-defined expressions or other executable code. The executable code may perform various functions including mathematical, statistical, aggregation with other data, and others. The preprocessor may perform malware analysis, test the functionality, then implement the executable code. A user may be presented with an editor or other text based user interface component to enter and edit the executable code. The executable code may be saved and later recalled as a selectable transformation for use with other data streams. |
| US09256968B2 |
Method for modeling using sketches
Three methods for converting sketch shapes into semantic elements by way of a semantic editor are disclosed. First, a method for conversion of a sketch shape that is part of a nested shape combination, which includes a sketch shape either hosting or nested within a semantic element. Second, a method for conversion of sketch shapes to semantic elements by storing sketch shape names and sketch shape descriptions in correlation with specific semantic elements and properties. The stored correlation is referenced for subsequent sketch shapes names or descriptions that are the same or a subset of the stored sketch shape name or description. Third, a method of conversion of one or more sketch shapes into a semantic template containing a plurality of semantic elements. Each of the one or more sketch shapes is mapped to a specific semantic element within the semantic template. |
| US09256963B2 |
Skin diagnostic and image processing systems, apparatus and articles
Skin diagnostic techniques employed in conjunction with image processing techniques. For example, a user information module captures a user skin image. A graphical user interface enables selection of a skin-related application from a plurality of skin-related applications. A processor determines user skin image data from the user skin image, and identifies one or more sets of skin image data in the skin image database that correspond to the user skin image data based on one or more parameters specified by the skin-related application. The processor applies at least one image processing filter that corresponds to the one or more identified sets of skin image data from the skin image database to the user skin image to generate a simulated user skin image. An output display displays the simulated user skin image. |
| US09256959B1 |
Systems and methods for color lens shading correction
System and methods are provided for performing color lens shading correction. A plurality of mesh points are generated. Mesh gain parameters associated with the mesh points are determined. The mesh gain parameters are applied to an input image for color lens shading correction. A color entropy related to color distribution of the corrected input image is obtained. The mesh gain parameters are adjusted to reduce the color entropy. |
| US09256953B2 |
Expression estimation device, control method, control program, and recording medium
An expression estimation device configured to estimate an expression of a person from an image has an expression determination unit that analyzes the image of the person to generate first expression information indicating an expression of the person, a motion determination unit that analyzes the image of the person to determine a type of motion of the person, and an expression estimation unit that generates second expression information indicating the expression of the person according to the first expression information generated by the expression determination unit and the type of motion determined by the motion determination unit. |
| US09256951B2 |
System for rapid and accurate quantitative assessment of traumatic brain injury
A system and method for automatic segmentation, performed by selecting a deformable model of an anatomical structure of interest imaged in a volumetric image, the deformable model formed of a plurality of polygons including vertices and edges, displaying the deformable model on a display, detecting a feature point of the anatomical structure of interest corresponding to each of the plurality of polygons and adapting the deformable model by moving each of the vertices toward the corresponding feature points until the deformable model morphs to a boundary of the anatomical structure of interest, forming a segmentation of the anatomical structure of interest. |
| US09256948B1 |
Depth map generation using bokeh detection
In one aspect, one or more computing devices receive a set of image frames. Each image frame includes pixels. The computing devices align image frames in order to identify flows of the pixels in the set of image frames. Regions of bokeh effect are identified in each image frame by measuring the sizes of areas of expansion across image frames using a set of assumptions and the identified flows. The computing devices adjust the alignment of the set of image frames based at least in part on the identified regions of bokeh effect. For each image frame, the computing devices generates an index map of focus values for each of the pixels that image frame using the improved alignment. A depth map is generated by the computing devices based at least in part on the index maps. |
| US09256942B1 |
Method for determining variations among multiple three-dimensional stone images extracorporeally and computer program using the same
A method for determining variations among multiple three-dimensional stone images extracorporeally and a computer program product using the method are disclosed. The method involves during a lithotripsy process performed on a human body, multiple three-dimensional stone images taken from a stone location in the human body are processed outside the human body using the following steps: using a processing unit to execute a computing process for the multiple three-dimensional stone images one by one in an order from the first taken said image to the last taken said image, wherein the computing process involves using an entropy texture equation or an inverse difference moment (IDM) texture equation to calculate a texture feature value for each said three-dimensional stone image; and when the texture feature values calculated using the entropy texture equation or the inverse difference moment (IDM) texture equation substantively stop changing, making the processing unit output a prompt signal. |
| US09256939B1 |
System and method for aligning mammography images
A method and system of aligning plurality of physically scaled mammography images within at least one viewport comprising: categorizing each mammography image to a corresponding mammography view; determining the image dimensions of each image based on the pixel spacing; choosing a first mammography image for each mammographic view based on the image dimensions; centering the first mammography image of each mammographic view within the at least one viewport; generating a virtual line across the at least one viewport along a boundary of the first mammography image; and aligning subsequent mammography images of the same mammographic view such that a boundary of the mammography image is aligned to the virtual line. |
| US09256936B2 |
Method and apparatus for tracking objects in a target area of a moving organ
A method for tracking position of features of a moving organ from at least one sequence of image frames of the moving organ involves identifying at least a first feature and a second feature of the organ in a reference image frame. Positions of the first and second features in other image frames are tracked in order to learn motion patterns of the first and second features. A dynamic geometric relation between the first and second features is determined. In the event that the first feature of the organ is obscured in a given image frame, position of the first feature in the given image frame is determined using position of the second feature in the given image frame and the dynamic geometric relation between the first and second features. |
| US09256935B2 |
Mapping transfer function for automated biological sample processing system
A gripping element may be commanded to move to pre-determined robot-frame locations, and markings may be punched into a calibration sample capture substrate at each location. A calibration image may be obtained, and fiducial markings on the gripping element may be detected. A set of calibration regions of interest may be predicted, and the previously punched markings may be detected. A sampling system may then create a mapping transfer function between detected image locations and real-world locations resulting from the commanded locations of the gripping element when the markings were punched. An indication may subsequently be received that a biological sample capture substrate is ready to be processed. An image of the sample capture substrate may be obtained, and the fiducial markings may be detected. Based on those image locations and the mapping transfer function, biological sample portions may be automatically taken from the sample capture substrate. |
| US09256932B1 |
System and method for automatically measuring the dimensions of and identifying the type of exterior siding
Methods, systems, and computer readable media are disclosed for determining a pixel-to-length ratio between a number of pixels disposed over a predetermined length of a reference object within an image of a siding sample and the predetermined length of the reference object. A first and second distance between respective first and second pairs of points within the image corresponding to respective first and second length measurements of the siding sample are determined, as well as a first and second number of pixels disposed between the first and second pair of points, respectively. Furthermore, the method, system, and computer readable medium disclose determining the first length measurement based on the pixel-to-length ratio and the first number of pixels, determining the second length measurement based on the pixel-to-length ratio and the second number of pixels, and identifying a siding product associated with the first and second length measurements. |
| US09256929B2 |
Filtering method and apparatus for recovering an anti-aliasing edge
Embodiments provide a filtering method and apparatus for recovering an anti-aliasing edge. The method includes: calculating, for a nonlinearly filtered image, a variance value of an area surrounding a current pixel used for identifying an edge of the image; and re-filtering the current pixel when the variance value is greater than a predefined first threshold value, so as to recover an anti-aliasing edge. With the embodiments of the present application, aliasing noises resulted from nonlinear transform may be alleviated, thereby recovering an anti-aliasing edge of a natural object. |
| US09256928B2 |
Image processing apparatus, image processing method, and storage medium capable of determining a region corresponding to local light from an image
An image processing apparatus includes an input unit configured to input image data to be processed, an determination unit configured to determine a region corresponding to local light in the image data input by the input unit, and a specification unit configured to determine a characteristic of the image data input by the input unit, wherein the determination unit changes, according to the characteristic of the image data specified by the specification unit, an determination criterion of the region corresponding to the local light. |
| US09256927B2 |
Method and apparatus for enhancing a digital photographic image
A method and apparatus for enhancing a digital photographic image uses a combination of global and content-specific operations. Image data is analyzed to detect one or more content items in the image to be separately enhanced. Then a content-specific enhancement operation is performed on data representing at least one detected content item, separately from the remainder of the image data. Several such content-specific operations may be performed for different types of content item. The content-specific enhancement operation comprises manipulating data, and the manipulation applies different adjustments to different pixels in the detected content item and the determination of the adjustments is based solely on analysis of the image data. Then a different enhancement operation is performed on at least the remaining image data excluding said one or more detected content items. |
| US09256925B2 |
Angle-dependent deghosting of seismic data
A method for generating a seismic image, comprising the steps of providing an input trace corresponding to seismic signals received at a receiver at a known receiver depth, using the input trace to generate a series of angle traces, each having a known time dip, for each angle trace, determining a filter H, for each angle trace, correcting the data by using the inverse of the filter H to generate a plurality of deghosted angle traces, copying each deghosted angle trace to a plurality of output locations and applying in each case the time dip for that angle trace so as to generate a plurality of corrected angle traces, at each output location summing a plurality of the corrected angle traces at that output location so as to generate a replacement trace; and using the replacement trace, preferably in combination with other replacement traces, to generate a seismic image. |
| US09256924B2 |
Image processing device, moving-image processing device, video processing device, image processing method, video processing method, television receiver, program, and recording medium
A video processing device (100) includes: an edge histogram generating section (141) and a noise reducing section (150). The generating section (141) generates an edge histogram of a decoded image obtained from a video signal. The noise reducing section (150) (i) determines whether or not a ratio of a sum of frequencies of classes higher than a predetermined class of an edge histogram to a sum of all frequencies the edge histogram is equal to or greater than a predetermined threshold value and (ii) performs a smoothing process on the decoded image with a smoothing intensity adjusted in accordance with whether or not the ratio is equal to or greater than the predetermined threshold value. |
| US09256921B2 |
Image generation device, image generation method, image generation program, and recording medium
An image generation device generates a mosaic image which is suitable for users to see even if sufficient images are not acquired to complete the mosaic image. The image generation device specifies, in units of divided areas, an image area in which an image is drawn in each layer of a plurality of layers divided into the plurality of divided areas, allocates the acquired image to the divided areas in the image area of one of the layers, based on color information of the acquired image and color information of each of the divided areas in the specified image area, and generates a mosaic image by superimposing, between layers, the image allocated in the image area of two or more layers of the plurality of layers in which an image is allocated to at least one of all of the divided areas in the image area of each of the layers and the divided areas of another layer having a display position which overlaps the divided areas. |
| US09256920B1 |
Image enhancement using a patch based technique
A system for determining a high resolution output image that includes receiving a low resolution image having a first resolution and determining an intermediate high resolution image having a second resolution based upon the low resolution image, where the second resolution is greater than the first resolution. The system determines a set of matches between a patch of the intermediate high resolution image and each of a plurality of degraded high resolution images, then selecting a subset of the set of matches and determining a corresponding reside patch for each of the subset of the set of patches. The system modifies the intermediate high resolution image based upon the corresponding reside patches to determine the high resolution output image. |
| US09256918B2 |
Method and apparatus for adapting media content for presentation
A method that incorporates teachings of the subject disclosure may include, for example, mapping image pixels of media content to a first portion of display pixels of a display to create mapped pairs having a mapped image pixel and a mapped display pixel, where the display has at least one of a greater number of horizontal or vertical pixels than the media content and for each mapped pair, one or more values associated with the mapped image pixel are assigned to the mapped display pixel, assigning blended mapped values to unmapped display pixels in a second portion of the display pixels, where, for each unmapped display pixel, the blended mapped value is a statistical compilation of one or more values assigned to the mapped display pixels that are adjacent to the unmapped display pixels, and presenting the mapped and unmapped display pixels at the display. The method includes other embodiments. |
| US09256917B1 |
Nested zoom in windows on a touch sensitive device
Certain aspects of the present disclosure relate to a technique for generating nested zoom in windows on a touch sensitive device. A first portion of the user content is zooming into by touching the display screen in a proximity of the first portion using the touch input device while retaining an original zoom size of a remaining portion of the user content. A second portion of a zoomed in first portion of the user content is zooming into by touching the display screen in a proximity of the second portion using the touch input device while retaining an original zoom size of the zoomed in first portion. |
| US09256915B2 |
Graphics processing unit buffer management
The techniques are generally related to management of buffers with a management unit that resides within an integrated circuit that includes a graphics processing unit (GPU). The management unit may ensure proper access to the buffers by the programmable compute units of the GPU to allow the GPU to execute kernels on the programmable compute units in a pipeline fashion. |
| US09256912B2 |
Method of measuring measurement target
In order to measure a measurement target on a PCB, height information of the PCB is acquired by using a first image photographed by illuminating a grating pattern light onto the PCB. Then, a first area protruding on the PCB by greater than a reference height is determined as the measurement target by using the height information. Thereafter, color information of the PCB is acquired by using a second image photographed by illuminating light onto the PCB. Then, the first color information of the first area determined as the measurement target out of the color information of the PCB is set as reference color information. Thereafter, the reference color information is compared with color information of an area except for the first area to judge whether the measurement target is formed in the area except for the first area. Thus, the measurement target may be accurately measured. |
| US09256911B1 |
Method for providing health care service to a patient utilizing an electronic display
An electronic display and lighting arrangement for viewing by, and illumination for, a person in a resting position includes: an electronic display assembly including a first carriage movable along a translation axis, a first pivot arm coupled to the first carriage with the first pivot arm pivotable about a first pivot axis, and an electronic display coupled to the first pivot arm; and a lighting assembly including a second carriage movable in a direction parallel to the translation axis, and a light coupled to the second carriage and adjustably positionable by movement of the second carriage. The electronic display is adjustably positionable both along the translation axis by movement of the first carriage, and about the first pivot axis by movement of the first pivot arm about the first pivot axis. |
| US09256908B2 |
Utility consumption disaggregation using low sample rate smart meters
Utility meter readings generated at low sampling rates are disaggregated to identify consumer usage activities. Time intervals between readings can include a plurality of consumer usage activities. By employing a model which recognizes associations among consumer usage activities, effective disaggregation is possible using only aggregated consumption data and interval start times. Consumers and utility managers can design and assess conservation programs based on the disaggregated consumption usage activities. |
| US09256905B2 |
Intelligent routing of electric power
A method and system for dynamically routing electric power in real time in accordance with parameters submitted by buyers and sellers of electric power using a feedback control scheme. A control node is arranged for receiving the parameters via a wide area network and to generate a route plan based on the parameters as well as current supply and demand in a network. The control node is also connected to the transmission and distribution systems to dynamically route electric power between matched buyers and sellers to effect the route plan. |
| US09256890B1 |
Framework for geolocation-based customer-to-product matching hosted in a cloud-computing environment
The present disclosure describes methods, systems, and computer program products for providing an on-demand, cloud-based platform exposing a geolocation service. One computer-implemented method includes storing, in a persistence, customer master data received as part of a customer registration process, storing, in the persistence, customer preferences received in a customer-created product preferences list, receiving geolocation updates from a customer mobile device, determining if there is a match between a particular customer preference and a product in a product catalog based on received customer preferences and the customer location based on the received geolocation updates, transmitting generated determined matches to display on a map to the customer mobile device, and transmitting online navigation data to the customer mobile device. |
| US09256888B2 |
Matching advertising to game play content
An advertisement is associated with a particular user move in a gaming environment where playing of the user move by a user results in the advertisement being displayed at the user's gaming device. With multiple users, each play of a unique user move results in a corresponding uniquely targeted advertisement being displayed at the respective gaming device of each user. User moves and associated advertisements are bound to one another based on a frequency of use of the user move in game play and the desirability of the advertiser to associate the advertisement with the user move. |
| US09256881B2 |
Authenticating and managing item ownership and authenticity
A system for authenticating and managing the ownership of an item comprises a tagging device affixed to the item, wherein the tagging device comprises tagging device data, an item information system receiving the tagging device data and associated item data and storing the tagging device data and the item data, an owner registration and transfer system receiving owner registration data and ownership change requests and storing the ownership history, and an authentication system receiving authentication requests and generating a response based upon the information stored in the system or a connected system. |
| US09256878B2 |
Method and apparatus for data recipient storage and retrieval of data using a network communication device
A system and method for data recipient invoked electronic commerce allowing data subjects to provide information over a network and data recipients to receive such information relating to the needs of a data subject such as purchases, distribution of application information and the like. The system includes a server having software which gathers the information from a data subject to complete a transaction over a network. The system has a data subject data structure that stores information for registered data subjects. The software is able to access the data subject data structure and enter the data subject's information during subsequent transactions. Having the software obtain and enter the data subject's purchasing information, the data subject does not have to enter the same information every time the data subject desires to effect a transaction over the network. In alternate embodiments, the same technology can be applied to other arenas where a user may have to enter the same repetitive information. |
| US09256877B2 |
Method for updating a user profile
The invention provides a method for updating a user profile on a server (2) based on user content items on a client (1), the server (2) being able to communicate with the client (1) via a communication network (3), comprising the following steps: a) for each of at least a part of said user content items on the client (1), providing characteristic information suitable to identify a respective user content item; b) transferring the characteristic information of the user content items from the client (1) to the server (2); c) comparing the characteristic information of the user content items with characteristic information suitable to identify the server content items; and d) updating the user profile on the server (2) based on the comparison carried out in c). |
| US09256872B2 |
System and method for payment card industry enterprise account number elimination
A system and method replaces credit card numbers in systems that are customer facing with token Ids to thereby reduce exposure to credit card number theft. |
| US09256871B2 |
Configurable payment tokens
Methods and systems are disclosed for the generation and use of merchant-customizable token formats that define tokens that represent credit card and other payment numbers in online transactions. The tokens, which are used instead of the card numbers themselves for security, can be specified by the token format to have a certain number of characters, have certain fields reserved for major card identifiers, use encryption and/or randomization, be alphanumeric, and have other formatting. The customized tokens can be used with legacy equipment that uses longer or shorter card numbers than the standard sixteen-digit payment card number format and can be less likely to be recognized as related to card numbers by identify thieves. |
| US09256862B2 |
Multi-tiered approach to E-mail prioritization
A method of automating incoming message prioritization. The method including training a global classifier of a computer system using training data. Dynamically training a user-specific classifier of the computer system based on a plurality of feedback instances. Inferring a topic of the incoming message received by the computer system based on a topic-based user model. Computing a plurality of contextual features of the incoming message. Determining a priority classification strategy for assigning a priority level to the incoming message based on the computed contextual features of the incoming message and a weighted combination of the global classifier and the user specific classifier. Classifying the incoming message based on the priority classification strategy. |
| US09256861B2 |
Modifying avatar behavior based on user action or mood
Techniques are described for enabling the selection of wallpaper to modify the mood projected by an avatar. The mood projected by an avatar may be modified, for example, by modifying behaviors and/or appearance of the avatar to characterize a mood to be projected. The mood projected by an avatar also may be modified based on user action, such as user input of a mood to be projected by the avatar. |
| US09256853B2 |
Portable RFID reading terminal with visual indication of scan trace
A portable radio-frequency identifier (RFID) reading terminal can comprise a microprocessor, a memory, an RFID reading device, and a display. The portable RFID reading terminal can be configured to display a scan trace provided by a line comprising a plurality of time varying points. Each point can be defined by a projection of a radio frequency (RF) signal coverage shape of the RFID reading device onto a chosen plane at a given moment in time. |
| US09256851B2 |
Intelligent cloning of a business object graph
Embodiments of the present invention provide a method, system and computer program product for context sensitive cloning of a business object graph. In an embodiment of the invention, a method for context sensitive cloning of a business object graph is provided. The method includes selecting a business object of an application executing in memory of a computer for cloning and ascertaining a contemporaneous state of the selected business object. The method also includes applying a cloning rule to the state of the selected business object to determine a business object graph from amongst a set of pre-determined business object graphs to be used when cloning the selected business object. Finally, the method includes cloning the determined business object graph in the memory of the computer. |
| US09256850B2 |
Orphan token management during in-flight process system migration
A method, apparatus, and computer-readable storage media for managing orphan tokens in a business process system. The method may include a first business process system template being compared by computer to a second business process system template. The method may include predicting by computer at least one predicted orphan token that would be orphaned if the business process system is migrated to the second business process system template from the first business process system template. The method may include further generating by computer an orphan token policy file to manage orphan tokens, and modifying a migration file using the orphan token policy file. |
| US09256847B2 |
Detection, identification and integration of office squatters
A computer receives a reservation for a location. The computer detects if a user is present in the location. The computer then determines if the user is allowed to be present in the location by comparing identification information of the user with identification information of the reservation. |
| US09256846B2 |
System and method for performance monitoring of a population of equipment
A system and method obtain a database stored on a storage device containing information on multiple assets, the information including measurements taken from devices monitoring each asset, and context information corresponding to the environment the items are subjected to. The system and method groups assets via a computer system into a homogenous group as a function of selected context information and performs analytics via the computer system on the grouped assets to manage the assets. |
| US09256844B2 |
Passive RFID postage stamps and method of using the same
A system and method for postage payment utilizes passive RFID tags as postage “stamps”, with the amount of the postage automatically billed to a previously-established customer account. The tags are stored in a separate stamp database and are “enabled” by linking the individual tag to a customer account. The use of the RFID stamps eliminates the need for the customer to know the proper postage beforehand. The existence of a customer account with a proper return address reduces the likelihood of a dead letter. Also, a special category of stamps may be used for automatic reply mail. By virtue of using an RFID tag, the mailed item's progress through the postal delivery system may be tracked from dispatch to delivery. |
| US09256842B2 |
Determining fuel economy by fuel source location
A method, system or computer usable program product for computing fuel economy for a vehicle by fuel source location including monitoring a fuel level for the vehicle, responsive to determining a first increase of the fuel level at a first fuel source location, computing a first fuel economy based on the first increase of the fuel level and a first distance travelled by the vehicle since a previous fuel source location, and allocating the first fuel economy to the previous fuel source location in a database. |
| US09256841B2 |
Information technology governance and controls methods and apparatuses
Embodiments of the present invention provide methods and systems for automated change audit of an enterprise's IT infrastructure, including independent detection of changes, reconciliation of detected changes and independent reporting, to effectuate a triad of controls on managing changes within the IT infrastructure, preventive controls, detective controls and corrective controls. |
| US09256839B2 |
Business object based navigation
In one embodiment the present invention relates to a method for navigating within a database containing business objects. The method includes the steps of providing a preconfigured model comprising preconfigured business object types and preconfigured associations of the business object types, identifying a reference to a business object instance within a software object and determining a primary business object type corresponding to the business object instance, providing links to at least one secondary business object type associated with the primary business object type in accordance with the preconfigured business model, and retrieving from the database at least one attribute of at least one business object instance within the secondary business object type associated to the primary business object type in accordance with the preconfigured model. In this manner, a user may more easily navigate the database. |
| US09256833B2 |
Fuzzy inference deduction using rules and hierarchy-based item assignments
Some embodiments disclosed herein relate to generating fuzzy inferences of procedure types based on fuzzy logic. Membership functions can be used to relate item variables to a degree of correspondence to various item types. Fuzzy rules can specify processing to be conducted using membership values produced by evaluations of membership functions. An output of the processing can include an inference that a content object corresponding to the item variables relates to one or more procedure types. Further, some embodiments disclosed herein relate to querying hierarchical data structures to identify related items. A hierarchical data structure can associate each of a set of procedure types with one or more item types and/or item identifiers or characteristics. |
| US09256828B2 |
Alarm correlation analysis method, apparatus and system
According to an alarm correlation analysis method, apparatus, and system, alarm analysis rules are grouped according to a certain policy; each alarm analysis rule group is correlated with one analysis engine, and the analysis engine performs, according to an alarm analysis rule in the alarm analysis rule group corresponding to the analysis engine, correlation analysis for an alarm that has a correlation with the alarm analysis rule group, so that multiple analysis engines implement concurrent analysis on a large quantity of alarms, thereby fully utilizing a multi-core resource, and improving efficiency of alarm correlation analysis. |
| US09256821B2 |
Method for manufacturing inserts for electronic passports
A method for manufacturing inserts provided with an electronic module supporting a chip and an antenna includes supplying top and bottom substrate sheets for a plurality of inserts, said substrates being provided with cavities for subsequently inserting an electronic module in each cavity; providing an antenna for each insert; providing at least one layer of adhesive; providing stacking and assembling by lamination a bottom substrate sheet, a first layer of adhesive, a plurality of antennas, a second layer of adhesive and a top substrate sheet; cutting the laminated assembly to obtain inserts each provided with an antenna; inserting electronic modules in the cavities after the step of laminating the substrate sheets, antennas and layers of adhesive. The method also includes printing the inner surface of at least one of the substrate sheets with a thickness-compensation layer, outside the substrate area intended for receiving the antenna. |
| US09256818B2 |
Printing apparatus, method, and storage medium for controlling discharge orientation
A printing apparatus is provided that, in a case where copy numbers are printed on the single-sheet document and the sheets are then discharged, prevents the copy numbers from going out of order while preventing the time it takes to complete printing from being extended. A method for controlling such a printing apparatus includes performing control such that, in a case where processing of printing an image on a single sheet per copy is carried out for a plurality of copies, the sheet on which the image is printed is discharged in a face-up state or in a face-down state depending on printing of the copy number. |
| US09256817B1 |
Image forming apparatus, method and computer readable medium specifying condition for converting printing colors into multi-color component data with special color added
Certain embodiments provide an image forming apparatus, including: an image forming part to form an image made of plural pixels by using plural printing colors and a special color different from the plural printing colors; an input part of image data of the image; an image processing part to output component data of the plural printing colors from the image data for each of the pixels; a user interface to specify a condition for converting the component data of the plural printing colors into component data of a multi color in which the special color is added to the plural printing colors; and a conversion part to convert the component data of the plural printing colors from the image processing part into the component data of the multi color to the image forming part based on the condition of the user interface. |
| US09256816B2 |
Color converting device and method performing color conversions using a first color conversion table when first color value satisfies a preset condition and using a second color conversion table when first color value does not satisfy the preset condition
An image forming apparatus is a color converting device for converting a first color value acquired from printing data to a second color value. A color position calculating section calculates a hue plane and a chroma of the first color value. A color value converting section converts the first color value to the second color value using a K-monochrome color conversion table in which achromatic colors are set as monochromatic colors when the chroma of the first color value calculated by the color position calculating section is greater than a chroma threshold value γ, and using a hue plane color conversion table in which the achromatic colors are set as mixed colors of a plurality of colors when the chroma is not greater than the chroma threshold value γ. |
| US09256813B2 |
Automatic print job ticket settings based on raster images of previously printed document
Exemplary methods and devices herein receive the images of a previously printed document (through scanning, raster image processing, etc.), a second document to be printed, and instructions to use print settings of the previously printed document to print the second document. These methods and devices automatically detect page boundaries, detect page orientation, and detect page sequencing within the images of the previously printed document to identify previous layout parameters used to print the previously printed document. With this, these methods and devices automatically prepare a print job ticket for the second document that has job ticket layout parameters that match the previous layout parameters. After this, these methods and devices output (e.g., print or transmit for additional revisions/processing) the second document using the newly created print job ticket to cause the second document to match the previous layout parameters of the previously printed document. |
| US09256800B2 |
Target line detection device and method
A target line detection device includes a processor configured to execute a process. The process includes: detecting transition points in a brightness image obtained from a brightness component of an input image between pixels with a luminosity gradient in a first direction and pixels with a luminosity gradient in a second direction opposite to the first direction; and, based on a shape or a length or a combination thereof, of lines connecting together transition points that are within a specific distance of each other, extracting a line representing a detection target from the lines connecting together the transition points. |
| US09256799B2 |
Marking system for computer-aided detection of breast abnormalities
An embodiment method for marking an anomaly in an image comprises generating an initial boundary description representing a size, a shape and a location of the anomaly in the image, dilating the initial boundary description to generate a dilated boundary description representing the shape, the location and an enlarged size of the initial boundary description, and saving, on a non-transitory computer-readable medium, the dilated boundary description as an overlay plane object in an output format compliant with a industry standard digital image format. |
| US09256798B2 |
Document alteration based on native text analysis and OCR
Example embodiments relate to document alteration based on native text analysis and optical character recognition (OCR). In example embodiments, a system analyzes native text obtained from a native document to identify a text entity in the native document. At this stage, the system may use a native application interface to convert the native document to a document image and perform OCR on the document image to identify a text location of the text entity. The system may then generate an alteration box (e.g., redaction box, highlight box) at the text location in the document image to alter a presentation of the text entity. |
| US09256796B2 |
Terminal device, information processing device, object identifying method, program, and object identifying system
A device, apparatus, and method provide logic for processing information. In one implementation, a device may include an image acquisition unit configured to acquire an image, and a transmission unit configured to transmit information associated with the image to an information processing apparatus, such as a server. The server may be associated with a first feature quantity dictionary. The device also may include a receiving unit configured to receive a second feature quantity dictionary from the server in response to the transmission. The second feature quantity dictionary may include less information than the first feature quantity dictionary, and the server may generate the second feature quantity dictionary based on the image information and the first feature quantity dictionary. The device may include an identification unit configured to identify an object within the image using the second feature quantity dictionary. |
| US09256792B2 |
Image processing apparatus, image processing method, and program
To make it easier to grasp characters that appear across different images by determining a pair of character area images to be a combination target based on a degree of similarity or a position of each character area image extracted from different images, and connecting and combining overlapping area images that are the determined pair of character area images and that have a similar image feature amount. |
| US09256789B2 |
Estimating motion of an event captured using a digital video camera
An event aware video system (EAVS) is to capture video frames during a first time period and process events in the video frames before transferring the processed data to a central computing system. The EAVS may establish a present no-event frame from the video frames by marking the last frame as the present no-event frame if the difference between adjacent pair of video frames is less than a threshold value. The EAVS may establish an event frame, wherein a present frame captured after establishing the no-event frame is marked as the event frame if the difference between the present frame and a previous frame is greater than the threshold value. The EAVS may provide event information including motion vectors to a central computing system by performing one-dimensional search on a moving object of the event frame, wherein the motion vectors may represent displacement of objects moving within the moving object. |
| US09256784B1 |
Eye event detection
The techniques and systems described herein track gaze movement of a user while eyes of the user read a document on a computing device. The techniques may then analyze or evaluate the gaze movement to determine if a reading interruption occurs (e.g., a reading pause or irregularity in a regular reading rate for the user). The reading interruption may occur when the user, while reading, encounters or notices a problem in the text. The reading interruption may also occur when the user encounters or notices text that the user has a strong interest in. When the reading interruption occurs, the techniques may evaluate a gaze direction and associate the reading interruption with a text that is currently displayed (e.g., word, sentence, paragraph, page, etc.). Moreover, the techniques may map the displayed text to a location in the document (e.g., a page or other identifiable section), and report the location to a centralized entity where statistical analysis can be performed to determine if there is a problem in the document. |
| US09256782B2 |
Apparatus and method for processing document image to estimate luminance image from luminance component image adjusted according to estimated or largest luminance values and predetermined criterion
An apparatus for and a method of processing a document image are provided. The method comprises: generating a luminance component image from the document image; estimating a luminance image from the luminance component image; and adjusting the luminance component image according to the estimated luminance image. Luminance values of pixels at least in horizontal edge areas of the luminance component image are estimated according to luminance values of pixels in a part of background of the luminance component image. If the estimated luminance values are acceptable according to a predetermined criterion, the luminance image is estimated according to the estimated luminance values. If the estimated luminance values are unacceptable, the luminance image is estimated by using the largest one of the luminance values of the pixels in each column of pixels in the luminance component image as the luminance values of all of the pixels in the column. |
| US09256781B2 |
System and method for computer vision based tracking of an object
A system and method for computer vision based tracking of a human form may include receiving a sequence of images, the images including at least one object having a shape of a human form. A first selected feature is tracked from within the human form shaped object. Shape recognition algorithms are applied at a suspected location of the human form shaped object in an image from the sequence of images to detect a shape of a human form in the image and a second feature from within the detected shape of the human form is then selected and tracked, thereby providing verification and updating of the location of the human form shaped object. |
| US09256777B2 |
Method for recognizing gesture and electronic device
A method for recognizing a gesture adopted by an electronic device to recognize a gesture of at least a hand. In the method, a hand image of the hand is captured and the hand image includes a hand region. A geometric center of the hand region is calculated. At least a concentric circle is disposed on the hand region with the geometric center as the center of the concentric circles. A number of intersection points of each concentric circle and the hand region is calculated respectively to determine a feature vector of the gesture. According to the feature vector, a hand recognition is performed to recognize the gesture of the hand. |
| US09256776B2 |
Method and apparatus for identification
A method and system for de-identifying a video sequence are provided. The method may include the steps of capturing a video sequence, comprising a number of individual frames, including one or more users performing one or more actions, and using activity recognition to recognize one of the one or more actions. One or more of the plurality of frames may be defined as comprising the recognized one or more actions, and a portion of the one or more of the plurality of frames may be identified to remain visible. The non-identified portions of the one or more of the plurality of frames and the non-defined frames may be de-identified. This method may be applied to the determine of whether a user has ingested a medication pill. |
| US09256774B1 |
Using quick response codes to generate an electronic consent database
Electronic consent for telemarketing calls can be obtained by soliciting consent from an individual using two-dimensional barcodes, such as quick response (“QR”) codes. The QR code can be printed on an advertisement and read by a smart phone. The reading of the QR code causes communication to be originated from the individual's smart phone for the purpose of requesting the individual to be contacted for a particular purpose. The communication can be construed by the enterprise as providing electronic consent for the enterprise to contact the individual with a subsequent telemarketing call. The sender's telephone number and other relevant information can be stored in an electronic consent database used to ensure compliance with appropriate marketing regulations. |
| US09256771B2 |
System for simultaneously identifying massive RFID tags using HF band
A tag of an apparatus for simultaneously identifying massive tags according to the present invention may include an analog circuit unit to communicate with a reader through an analog signal and to receive energy via magnetic coupling with the reader. Further, the tag may include a digital circuit unit to be supplied with power from the analog circuit unit. The digital circuit unit may support a sleep mode for the tag to stand by in a low power state after transmitting an identifier (ID) to the reader and a wait mode for controlling random access to the reader. |
| US09256770B1 |
Terminal case with integrated reader and shortened base
Aspects of the technology provide a case for a mobile device, wherein the case includes a body, and a base configured to be mechanically coupled to the body. In certain aspects, the base includes a reader configured for reading financial information from a payment card for facilitating a financial transaction between a buyer and a merchant, a card slot disposed within the base, the card slot configured to receive the payment card, and wherein the card reader comprises a tip-ring-ring-sleeve (TRRS) connector having a protruding portion and a modified base portion, and wherein the modified base portion provides not more than two electrical connections between the TRRS connector and the reader. |
| US09256766B1 |
Systems and methods for collecting thief-identifying information on stolen computing devices
A computer-implemented method for collecting thief-identifying information on stolen computing devices may include (1) receiving an indication that a computing device has been stolen, (2) detecting an attempt by a thief of the stolen computing device to access a user account of the thief via the stolen computing device, (3) collecting, based at least in part on detecting the attempt by the thief of the stolen computing device to access the user account of the thief via the stolen computing device, information capable of identifying the thief, and (4) reporting, to a remote computing device, the information capable of identifying the thief. Various other methods, systems, and computer-readable media are also disclosed. |
| US09256765B2 |
System and method for identifying software changes
An enterprise trust server (ETS) can include a user interface configured to initiate generation of a first file signature associated with a first file accessed from a file system associated with a computer system at a first time and generation of a second file signature associated with a second file accessed from the file system at a second time subsequent to the first time. The ETS also includes a file signature comparator configured to compare the first and second file signatures to determine a difference set of file signatures. The ETS can be configured to send a request comprising the difference set of file signatures to a trust repository and to receive a response that identifies a software product associated with the first and second files that changed between the first and second times based on the difference set of file signatures. |
| US09256761B1 |
Data storage service for personalization system
A data storage system or service is provided for the data that is generated by the personalization system. The data storage system can be configured to support storing, retrieving or querying, and updating of data such as user information, personalized content such as personalized business information and collection information, statistics information related to users, collections, businesses, and the like. The data model design of the data storage system may be configured to optimize performance associated with specific features of the personalized system such as following and/or sharing of collections. Additionally, the data storage system may be configured to detect and provide user notifications of trigger events. |
| US09256755B2 |
Notification of application permissions
Methods, systems, and computer-readable media for granting application permissions and providing notifications of API activity are provided. An example method may include receiving a first API call by an installed application. The method may further include determining a sensitivity level of the received first API call. The method may further include when the determined sensitivity level of the received first API call is associated with a restricted API classification, determining whether an author of the installed application is an authorized author, and when the author of the installed application is determined to be an authorized author, allowing the received first API call access to its associated API. An example system may include instructions that, when executed by the one or more processors, cause the one or more processors to detect an API call by an application, the API call for accessing data associated with a computing device, determine a sensitivity level of the API call based on the associated data, and provide an indication of the API call based on the determined sensitivity level. |
| US09256751B2 |
Public exposed objects
A system, a method, and a computer program product for public exposed objects in packaged interfaces of business process applications are provided. A service provider of a service registers a public exposed object for use by a client of the service provider by identifying the public exposed object and associating a predetermined access protocol for accessing the registered public exposed object by the client. The registered public exposed object is accessible from the service provider only. The service provider provides the registered public exposed object to the client during a transaction. The client accesses the registered public exposed object using an identifier, an attribute, an access location of the registered public exposed object, and the predetermined access protocol. |
| US09256750B2 |
Secure credential unlock using trusted execution environments
Computing devices utilizing trusted execution environments as virtual smart cards are designed to support expected credential recovery operations when a user credential, e.g., personal identification number (PIN), password, etc. has been forgotten or is unknown. A computing device generates a cryptographic key that is protected with a PIN unlock key (PUK) provided by an administrative entity. If the user PIN cannot be input to the computing device the PUK can be input to unlock the locked cryptographic key and thereby provide access to protected data. A computing device can also, or alternatively, generate a group of challenges and formulate responses thereto. The formulated responses are each used to secure a computing device cryptographic key. If the user PIN cannot be input to the computing device an entity may request a challenge. The computing device issues a challenge from the set of generated challenges. Upon receiving a valid response back, the computing device can unlock the secured computing device cryptographic key associated with the issued challenge and subsequently provide access to protected data. |
| US09256749B2 |
Method for invoking application in screen lock environment
A method for invoking an application in a Screen Lock screen is disclosed herein. The method for invoking an application in a user equipment includes the steps of selecting at least one unlock application that is to be displayed on a Screen Lock screen among multiple applications, and displaying an unlock application icon respective to each of the select at least one unlock application on the Screen Lock screen. |
| US09256748B1 |
Visual based malicious activity detection
Methods for preventing the transmission of sensitive information to locations outside of a secure network by a person who has legitimate access to the sensitive information are described. In some embodiments, in order for an end user of a computing device to establish a secure connection with a secure network and access data stored on the secure network, a client application running on the computing device may be required by the secure network. The client application may monitor visual cues (e.g., facial expressions and gestures) associated with the end user, detect suspicious activity performed by the end user based on the visual cues, and in response to detecting suspicious activity may perform mitigating actions to prevent the transmission of sensitive information such as alerting human resources personnel or requiring authorization prior to sending information to locations outside of the secure network. |
| US09256745B2 |
Protecting operating system configuration values using a policy identifying operating system configuration settings
In a pre-operating system environment on a device prior to loading and running an operating system on the device, a policy identifying configuration settings for the operating system is obtained. The operating system itself is prevented from changing this policy, but the policy can be changed under certain circumstances by components of the pre-operating system environment. The policy is compared to configuration values used by the operating system, and the operating system is allowed to boot with the configuration values if the configuration values satisfy the policy. However, if the configuration values do not satisfy the policy, then a responsive action is taken. |
| US09256744B2 |
System-on-chip and booting method thereof
A system-on-chip (SoC) and a booting method thereof are disclosed. The SoC is coupled to an external memory and includes a read only memory (ROM) and a processor. The ROM stores a first firmware image. The processor is coupled to the ROM. The processor reads the first firmware image from the ROM and verifies the state of the first firmware image. If the first firmware image is damaged, the processor reads a second firmware image from the external memory and verifies whether the second firmware image is legal. If the verification of the second firmware image succeeds, the processor reads and executes the second firmware image to perform a booting process. |
| US09256741B2 |
Method and device for determining propagation relationship of Trojan horse files
A method performed by a computer system determines propagation relationships of Trojan horse files. A current Trojan horse file is stored into a corresponding current level of a propagation relationship tree. A condition of the current Trojan horse file or of the propagation relationship tree is assessed. The following steps are repeated until the condition is satisfied: search Trojan horse files for a parent, child or sibling relative to the current Trojan horse file, identify one of the Trojan horse files as the current Trojan horse file, and store the current Trojan horse file into a corresponding current level of the propagation relationship tree. When the condition is satisfied, the propagation relationship tree is displayed. The storing of the current Trojan horse file may include storing an identifier of the current Trojan horse file, which may include data abstraction output, and/or a downloading address of the current Trojan horse file. |
| US09256733B2 |
Retrieving content from website through sandbox
A client system interacts with a sandbox environment to host a web browser control within the sandbox. A webpage URL, a URL to a script file to be injected into the webpage, a name of the script method to be invoked, and the event to look for to trigger the script method sent to the sandbox environment from the client. The sandbox environment downloads the script file from the cloud using the script URL and loads a rendering engine with the specified webpage URL. The specified script file is subsequently injected into the loaded webpage at the sandbox environment. After the specified event is fired, the sandbox environment triggers the specified script method and stores the results within a results array, accessible to the client system. |
| US09256729B2 |
Address translation/specification field for hardware accelerator
Embodiments relate an address translation/specification (ATS) field. An aspect includes receiving a work queue entry from a work queue in a main memory by a hardware accelerator, the work queue entry corresponding to an operation of the hardware accelerator that is requested by user-space software, the work queue entry comprising a first ATS field that describes a structure of the work queue entry. Another aspect includes, based on determining that the first ATS field is consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, executing the operation corresponding to the work queue entry by the hardware accelerator. Another aspect includes, based on determining that the first ATS field is not consistent with the operation corresponding to the work queue entry and the structure of the work queue entry, rejecting the work queue entry by the hardware accelerator. |
| US09256725B2 |
Credential recovery with the assistance of trusted entities
There is disclosed a method for use in credential recovery. In one exemplary embodiment, the method comprises determining a policy that requires at least one trusted entity to verify the identity of a first entity in order to facilitate credential recovery. The method also comprises receiving at least one communication that confirms verification of the identity of the first entity by at least one trusted entity. The method further comprises permitting credential recovery based on the received verification. |
| US09256721B2 |
Mobile wireless hand-held biometric capture, processing and communication system and method for biometric identification
A mobile, wireless biometric identification system includes a biometric capture device, associated software and processes which enable a commercially available wireless communication device, such as a smartphone, using a commercially established wireless communication networks, to capture a digital image of a human biometric (iris, fingerprint, etc.) for transmission via a secure connection to a central server. The capture device is designed to focus on the difficult task of capturing the highest possible quality image for encoding and comparison, while the overall system is designed to leverage the existing cellular communication network. At the server level, the server system receives the image, encodes the image to a biometric template, and compares the encoded template to a plurality of reference templates stored in a database to identify the individual. Identification data is then transmitted back to the smartphone device and displayed. |
| US09256718B2 |
Systems and methods for licensing of mobile applications
System and methods for licensing of dynamic mobile applications are disclosed herein. In one embodiment, a non-transitory computer readable medium storing executable instructions is provided. The instructions, when executed by a processor, cause the processor to communicatively couple to a mobile device and to receive a user login, a user password, and a client identification from the mobile device. The instructions additionally cause the processor to validate a client as a licensed client based on the based on the user login, user password, and client identification and to derive a connectivity data based on the user login, user password, and client identification if the client is a valid licensed client, wherein the connectivity data comprises a first connectivity data configured to communicatively couple the mobile device to a first system; and wherein the mobile device is configured to download a first API from the first system. |
| US09256715B2 |
Authentication using physical interaction characteristics
User physical interaction characteristics information or the way a user physically interacts with a device is analyzed to aid in authenticating a user of a device. User physical interaction characteristics information such as swipe speed, finger area, finger conductivity, finger angle, device angle, movement patterns, acceleration, etc., provide signatures that are distinctive for particular individuals and possibly unique if measured to a sufficiently high level of precision. In some examples, a device measures finger positions, finger pad sizes, moisture level, acceleration, displacement, and changes in finger pad size for a particular user and compares the measurements to physical interaction characteristics measured during subsequent usage of the device to verify that a user is an authorized user. |
| US09256714B2 |
Preserving integrity of messages in a messaging oriented middleware system
Message integrity in a messaging oriented middleware system is preserved by determining a message producer's level of message integrity by examination of connection details between the message producer and a messaging engine. The message producer's level of integrity is stored in a memory of the messaging engine. The message is then stored in the designated destination using the message producer's level of integrity. The message is sent from the designated destination to a consumer when it is determined that the consumer conforms to the integrity levels. |
| US09256704B2 |
Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture
A method (and program) for conducting numerical analysis, includes defining a plurality of components in a system and a condition to be analyzed, performing a table look-up for components of the plurality of components, if a component of the plurality of components is defined in the table, acquiring a result for the condition to be analyzed based on the table information, and conducting the analysis of the system using the result based on the table information for the component. |
| US09256702B2 |
Systems and methods for determining an appropriate model parameter order
Systems and methods for determining an appropriate parameter order for a building energy use model are provided. A described method includes receiving an energy use model for a building site, obtaining a plurality of data points, calculating a first regression statistic indicating a fit of the energy use model to the plurality of data points under a null hypothesis and a second regression statistic indicating a fit of the energy use model to the plurality of data points under an alternative hypothesis, and comparing a test statistic to a threshold value. The test statistic is a function of the first regression statistic and the second regression statistic. The method further includes determining an appropriate parameter order for the energy use model based on a result of the comparison. |
| US09256699B2 |
Method and system for low-redundancy e-mail handling
A method of low-redundancy e-mail handling, wherein: e-mail data is selected, attachments of e-mails comprised in the e-mail data are detached, stored and replaced with references accordingly, and wherein further e-mail threads comprised in the e-mail data are identified and split in separate e-mails, duplicates of e-mails are deleted while maintaining their e-mail references, differences between a first e-mail and an immediately preceding second e-mail of the same thread are identified, generating difference data, the first e-mail is replaced by the difference data, and a reference to the second e-mail is inserted therein, the e-mails and references to their predecessors and successors in the same thread are stored in a data storage, and a graph-based interface is generated for the stored e-mails and references, and an e-mail server computer device, e-mail client computer device, data processing program, computer program product, and computer data signal therefor. |
| US09256697B2 |
Bidirectional mapping between applications and network content
A bidirectional mapping is established between network content and application programs, based on declarations at both the network content and at the application. Additionally, bidirectional mapping can provide for deep links, which can associate specific network content with a specific presentation of data in an application program. The identification format for such deep links can conform to a predetermined standard or it can be custom implemented according to a format declared either as part of the network content or the application program. The bidirectional mapping is then utilized by a lookup service to provide functionality to a third-party entity. The lookup service can identify, to the entity, application programs associated with network content specified by that entity and network content associated with application programs specified by that entity. |
| US09256696B2 |
Dynamic selection of one of many available web browsers
A user selection of an item corresponding to a Web page can be received. The user selection can represents a request to open the Web page within an instantiated one of a set of Web browser applications installed on a computing device. A set of Web page elements unique to the Web page can be identified through an analysis conducted by the computing device. The identified set of Web page elements can be utilized to determine at the computing device one of the installed Web browser applications for the Web page. The determination of the one installed Web browser application can varies from Web page-to-Web page. At the computing device, the determined one of the Web browser applications can be instantiated. The Web page can be opened within the instantiated one of the Web browser applications. |
| US09256686B2 |
Using a bloom filter in a web analytics application
Embodiments of the present invention are directed to the use of a Bloom Filter in a web analytics application. Large sets of data, obtained from on and offline sources, may be analyzed using a Bloom Filter to find desired patterns within the data. The use of a Bloom Filter in the analysis allows for a more efficient use of resources to perform the analysis. |
| US09256669B2 |
Stochastic document clustering using rare features
Systems, methods, and apparatus for clustering resources using rare features are provided. For example, an environment includes an extraction module, an index module, and a cluster module. The extractions module identifies a set of resources and extracts a plurality of features from the resources. The plurality of features may be rare features. The index module identifies and generates a rare features index. The cluster module identifies at least two resources that share rare features, creates one or more clusters based on the identified at least two resources, and associates resources that share similar features with the one or more clusters. Resources that do not share similar features are not associated with the one or more clusters. Identifying at least two resources that share rare features is based at least upon a threshold. |
| US09256665B2 |
Creation of inverted index system, and data processing method and apparatus
The present disclosure relate to techniques for establishing an inverted indexing system and related data processing. The techniques may include writing, by a computing device, inverted indexes of a massive amount of data records into at least one inverted file. The computing device may then write description information of the written inverted file into a description file associated with the inverted file, and establish the inverted indexing system based on the inverted file and the description file of the inverted file. The techniques enhance efficiency in establishing the inverted indexing system and in processing data using the systems. |
| US09256664B2 |
System and method for news events detection and visualization
Systems and methods are disclosed for news events detection and visualization. In accordance with one implementation, a method is provided for news events detection and visualization. The method includes, for example, obtaining a document, obtaining from the document a plurality of tokens, obtaining a document vector based on a plurality of frequencies associated with the plurality of tokens, obtaining one or more clusters of documents, each cluster associated with a plurality of documents and a cluster vector, determining a matching cluster from the one or more clusters based at least on the similarity between the document vector and the cluster vector of the matching cluster, and updating a database to associate the document with the matching cluster. |
| US09256657B1 |
Tracking data communicated between services
Techniques are described for tracking data objects transferred among multiple services in a computing environment. Services that are involved in the transfer of data objects may be instrumented to generate recordings that describe outbound and inbound transfers of data objects. The recordings may be analyzed to identify key-value pairs included in the transferred data objects, where the key corresponds to a data attribute that stores a particular value in a data object. For each pair of keys that are associated with a same or substantially similar value, a correlation metric may be updated for each instance of association. Over time, the correlation metric may indicate a higher degree of correlation for those pairs of keys that frequently share a same value. Pairs of keys exhibiting an above-threshold correlation count may be designated as related in that they are involved in the transfer of data objects. |
| US09256656B2 |
Determining reliability of data reports
A computer implemented system for automatically determining a reliability score of a data report. The system includes a data structure indicative of data lineage that includes data assets flowing into a data report. The system further includes a processor configured to calculate trust scores for data assets based on characteristics of the data assets as well as a data report trust density score indicative of the reliability score of the report based on the calculated trust scores. The system further includes an output device configured to output the calculated data report trust density score. |
| US09256655B2 |
Dynamic access of data
A heterogeneous information technology system in which compatible and incompatible client systems are able to dynamically access master data stored in a master database maintained by a master data server. An integration server communicates with the client systems and the master data server, and in response to a request for data from a client system, maps the master data in the master database to mapped data based on a set of mapping rules associated with the client system, and sends the mapped data to the client system. |
| US09256648B2 |
Data handling in a cloud computing environment
The present invention relates to a method for data handling in a computing environment. A data access request is generated to access data by a requesting VM. VMs of an ordered list are sequentially checked for data cache hit corresponding to the data in an order given by a ranking. The data is read from the checked VM in response to at least one data cache hit of a checked VM being found, and thereafter a ranking value of the checked VM is updated, thereby updating ranking based on the ranking value. The data is requested from the at least one storage server in response to no data cache hot being found. |
| US09256647B2 |
Apparatus and method for controlling display of a search result and recording medium therefor
An information processing apparatus allows a user to easily find information about search targets which the user is likely to desire. Pieces of information about a plurality of searched search targets displayed as a search result include attribute values of search targets. The information processing apparatus specifies information selected by the user from displayed information, and compares an attribute value of a selected search target, with attribute values of search targets associated with display rankings which are higher than a display ranking of the selected search target associated with the specified information. When the attribute value of the selected search target is more advantageous for the user, the information processing apparatus performs control such that information about search targets whose attribute values are more advantageous for the user than that of the selected search target changes to a display mode which is more easily visually checked than the information about search targets whose attribute values are more disadvantageous for the user than that of the selected search target. |
| US09256642B2 |
Techniques for recommending parallel execution of SQL statements
Techniques for automatically recommending parallel execution of a SQL statement. In one set of embodiments, a first determination can be made regarding whether a SQL statement can be executed in parallel. Further, a second determination can be made regarding whether executing the SQL statement in parallel is faster than executing the statement in serial by a predetermined factor. If the first determination and second determination are positive (i.e., the statement can be executed in parallel and parallel execution is faster by the predetermined factor), a recommendation can be provided indicating that the SQL statement should be executed in parallel. In some embodiments, the recommendation can include a report specifying the degree of performance improvement gained from parallel execution, additional system resources consumed by parallel execution, and other statistics pertaining to the recommended parallel execution plan. |
| US09256638B2 |
Instance management of code in a database
The compiled code of a computer program is stored in multiple pieces within a database. Each piece is optionally stored within a separate data record. Execution of the computer program includes using database queries to retrieve pieces of the compiled code for execution. The database and associated database management logic are used to provide numerous advantages in execution and management of the computer program. For example, in some embodiments, database queries are used to help facilitate program flow logic. In another example, database queries are based on a command line or universal resource locator. These queries may be used to select functionality of a computer program in response to the command line or universal resource locator. |
| US09256637B2 |
Suggesting media content based on an image capture
A method and/or system for suggesting media content based on an image capture may include receiving, from an electronic device, a request for recommendations based on an image capture, wherein the request comprises data associated with the image capture. One or more search objects may be determined based on an analysis of the request. A particular user associated with the electronic device and one or more search interest associated with the particular user may be determined. One or more custom recommendations for the particular user may be determined based on the one or more search objects and/or based on the one or more search interests. Recommendation data comprising the one or more custom recommendations may be sent to the electronic device. |
| US09256636B2 |
Device and related method for application identification
A function is provided for identifying computer applications running on a network. Information obtained from frames having content associated with computer applications is examined and compared to information stored on the network. The stored information is obtained from a plurality of mechanisms including computer application signatures. An application identification engine of the function compares examined content with the known application information and determines an indication of the likely computer application associated with the examined frames. The determination output may include a level of confidence in the accuracy of the determination. The function includes an application programming interface to allow the introduction into the engine of custom mechanisms for application identification. The different mechanisms may be weighted. The function may be provided in one or more devices of the network including a standalone appliance. |
| US09256635B2 |
Determining whether a data storage is encrypted
A method, program and/or system for determining whether a data storage is encrypted. A file is written through a first path to the data storage. The file is read through a second path from the data storage. First data known to have been written in the file is compared to second data that has been read from the file. When the first data matches the second data, the first path is determined not to have encrypted the file when writing to the data storage. When the first data does not match the second data, the first path is determined to have encrypted the file when writing to the data storage. |
| US09256630B2 |
Managing ownership of redundant data
According to one embodiment, a method includes storing instances of a file in a first storage tier and a second storage tier of a storage system, wherein the second storage tier uses less expensive and/or slower-to-access storage media than the first storage tier. Each instance of the file on the first and second storage tier is associated with a unique program identifier (UPI). A request to access the file or instance thereof is received from a user in a group of users, and a UPI associated with an instance of the file that exists on the first storage tier is searched for. Remote access to the instance of the file on the first storage tier is provided to the user requesting access to the file. Additional embodiments are also presented. |
| US09256627B2 |
System and method for configurable trading system
A system dynamically integrates, into an application program that implements rules for controlling business operations, changes in parameters and parameter groupings that are used by or in conjunction with the rules. A dynamic business logic rule integrator provides the rules to the application software as executable routines, and a dynamic parameter manager organizes and manages the parameters. The manager integrates changes to the parameters, groups and/or links the parameters, and makes the parameters available to the rules through a dynamically configurable system database—using a set of static tables and related dynamically configurable tables, in which certain database fields or sub-fields correspond to the parameters and the tables, fields and sub-fields are established and linked together in accordance with user-defined “instances.” When parameters and their groupings are changed the manager updates, creates and/or removes database tables, and the revised tables are made available to the rules. |
| US09256625B2 |
Cleaner with computer monitoring
A cleaning application that can monitor one or more characteristics of a computer, and that can clean at least one of one or more files or a registry of the computer, is provided. The cleaning application can include a cleaning module. The cleaning module can monitor one or more characteristics of the computer. The cleaning module can further detect an occurrence of pre-defined criteria involving the one or more characteristics. The cleaning module can further perform a pre-defined action in response to the pre-defined criteria. The pre-defined action can include cleaning at least one of one or more files or a registry associated with the computer. |
| US09256624B2 |
System, method and software for providing persistent entity identification and linking entity information in a data repository
The present invention provides a system, method and software for linking persistent and unique business identifiers, associated with business entities, for associating corresponding business records without a loss of historical records, regardless of subsequent changes, updates, and mergers. In the various embodiments, a first business record, of the plurality of business records, is associated with a first business identifier; and a second business record, which does not match the first record, is associated with a second business identifier. Subsequently, when the first business identifier and the second business identifier are determined to correspond to a singular business entity, the first business identifier and the second business identifier are linked, and respective associations of the first business record and the second business record with the linked first business identifier and second business identifier are maintained, with corresponding source references, and collectively utilized in subsequent search and match determinations. |
| US09256622B2 |
Systems and methods to confirm replication data accuracy for data backup in data storage systems
A data storage system, according to certain aspects, automatically determines the accuracy of replication data when performing data backup operations. For instance, the system performs data backup using replication data rather than source data to reduce the processing load on the source system. The backup data is then associated with the source data as if the backup had been performed on the source data. If the replication system fails, then backing up replication data results in backup data that does not accurately reflect the source data. The system automatically determines the accuracy of replication data during data backup. |
| US09256621B2 |
Claims-based querying in an online system
A social networking system allows its users to perform a structured search that returns objects (e.g., other users and pages) in the social networking system. A searching user may remove or add objects to the search by interacting with the returned objects. Adding or removing an object generates a claim stored by the social networking system that an object has or does not have, respectively, characteristics based on the search query. Additionally, the searching user may also request presentation of the search query to other users, which may be selected by the social networking system based on their predicted expertise. A dialog between the searching user and a selected other user may be provided to allow the searching user to provide the search query to the selected other user and to receive a response. |
| US09256619B2 |
Method for detecting and recognizing boats
Method for recognizing boats in a port includes: establishing land/water boundaries from an image of the port including one or more boats, using a land mask and image statistics, without requiring a site model; utilizing the established land/water boundaries to determine thresholds and normalization parameters; detecting one or more bow candidates for the boats in the image; computing an orientation of each of the boats with detected bows; computing features along the bow candidates to eliminate false bow candidates; fitting boat models to the detected one or more bow candidates; determining one or more best fit models from the fitted boat models; calculating features in an interior, exterior and outline of the best fit models; applying a statistical classifier to score each of the one or more best fit models and to eliminate false alarms; and eliminating lower scoring best fit models. |
| US09256616B2 |
Image processing apparatus and image processing method
An image processing apparatus comprises a storage unit configured to store feature information of a predetermined object, a determination unit configured to detect feature information of an object from an image to be searched and determine a similarity to the feature information of the predetermined object stored in the storage unit, a search unit configured to search a candidate image containing the predetermined object as a result of the determination by the determination unit, and a control unit configured to control, based on attribute information associated with image-shooting conditions, the order in which images are subjected to the determination processing by the determination unit. |
| US09256611B2 |
System and method for multi-scale navigation of data
A system configured to generate a macro-fingerprint from at least one predefined set of summaries is provided. The system includes data storage storing a first predefined set of summaries associated with a first region of data, each member of the first predefined set of summaries characterizing data within the first region of data; and at least one processor coupled to the data storage and configured to: read the first predefined set of summaries; select at least one first member from the first predefined set of summaries based on a value of the at least one first member; and store the at least one first member within a first macro-fingerprint. The first region of data may have a first size indicative of a quantity of data included in the first region of data. The macro fingerprints are created from previously created smaller (micro) fingerprints without having to reread the data. |
| US09256608B2 |
Mapping user content to folders in a file system
Embodiments of the present invention provide a computer system, comprising a personal file system module for determining a file system folder structure based upon a user profile and mapping user content stored on one or more storage devices to one or more folders of the file system. |
| US09256605B1 |
Reading and writing to an unexposed device
In one aspect, a method includes replicating a storage entity which is not accessible though a storage area network by using a data protection appliance (DPA) coupled to a storage area network and a data protection agent installed on a host which can access the storage entity.In another aspect, a non-transitory machine-readable medium stores executable instructions. The instructions cause a machine to replicate a storage entity which is not accessible though a storage area network by using a data protection appliance (DPA) coupled to a storage area network and a data protection agent installed on a host which can access the storage entity. |
| US09256604B2 |
Method and system for transformation of logical data objects for storage
There are provided a method of transforming a non-transformed stored logical data object (LO) device into a transformed LO and system thereof. The method comprises: a) in response to a respective transformation request, logically dividing the non-transformed LO in a first segment and one or more non-transformed subsequent segments, the segments having predefined size; b) generating a header for the respective transformed LO; c) processing said first segment; d) overwriting said first segment by said generated header and said transformed first segment; e) indexing said first transformed segment and said one or more non-transformed subsequent segments as constituting a part of said transformed LO; f) generating at least one index section; and g) updating the indication in the header to point that the non-transformed LO has been transformed in the transformed LO comprising said generated header, said first transformed segment, said one or more subsequent segments comprising data in non-transformed form and said at least one index section. |
| US09256602B2 |
System and method for distributing and providing recommendations related to playable content to a user based on information extracted from one or more playback devices of the user
A system and method for distributing playable content and for recommending playable content to a user where the recommendations are generated at a wide area network content server considering information extracted from one or more playback devices of the user by means of an intelligent agent resident on a processing device. The intelligent agent functions to scan the memory devices associated with the processing device and/or other devices in communication with the processing device for the purpose of determining what playable content is resident on the memory devices so scanned. Data related to the playable content uncovered during a scan is uploaded to the wide area network content server where the data is usable by a recommendation engine to make more informed recommendations for that user. |
| US09256591B2 |
Document handling method
If a top-level document refers to a second document as a template, a first method specified by said top-level document is executed to yield a presentation that is used as an argument for a second method specified by the second document. If the top-level document does not refer to another document as a template, the first method is executed to yield a final presentation. |
| US09256589B2 |
Web-based spreadsheet interaction with large data set
A computer-implemented method for presenting data is disclosed. The method includes receiving at a data server sub-system, from a browser on a remote client computing system, a request for data stored in a central data store; retrieving the requested data from the central data store and providing data corresponding to the requested data to a spreadsheet presentation sub-system that is in communication with the data server sub-system and with the browser on the remote client computing system; and providing a document key to the browser on the remote client computing system so that the browser can request from the presentation sub-system a spreadsheet document that displays the data corresponding to the requested data. |
| US09256586B2 |
Visual editor for electronic mail
A visual editor for generating a custom email message. An editor interface may display an approximation of an email message. A user may customize content and layout of an email message through the editor interface. A user interface system may track such customizations to enable faster remote operations to be performed on content of the email message. A plurality of substantially modular renderers may enable a plurality of different output representations to be generated from a single stored representation of the email message. |
| US09256585B2 |
Non-transitory computer readable medium storing document creation support program, document creation support device, and document creation support method
Provided is a non-transitory computer readable medium storing a document creation support program causing a computer to function as a receiving unit that receives a defined text and edition process information having recorded therein an operation history when creating the defined text including a sentence associated with the operation, a revision range extraction unit that extracts, as a revision range, an operation history corresponding to a preset operation and a sentence associated with the operation history from the edition process information, a document feature quantity extraction unit that extracts first and second feature quantities, and a sentence example information search unit that searches for a sentence example associated with a sentence in sentence example information having a sentence example registered in advance in association with feature quantity information of the sentence example on the basis of information of the first and second feature quantities. |
| US09256583B2 |
Conversion of a presentation to Darwin Information Typing Architecture (DITA)
One embodiment of the present invention discloses a method, computer program product, and system for converting a Microsoft® PowerPoint® file to Darwin Information Typing Architecture (DITA). A document converter receiving a command from a client device to convert one or more PowerPoint slides to DITA, wherein the PowerPoint has been formatted for conversion to DITA. Starting with the first PowerPoint slide, metadata tags, PowerPoint slide and notes text, and file names of grouped images are compiled into a string parsed with DITA markup. If the next slide does not begin a new topic, then that slide's metadata tags, PowerPoint slide and notes text, and grouped image file names are compiled into a string parsed with DITA markup and appended to the previous slides string. If the next slide begins a new topic, then the string is exported to a DITA topic. This process is repeated throughout the PowerPoint presentation. |
| US09256577B2 |
Apparatuses and related methods for overflow detection and clamping with parallel operand processing
A method and apparatus for overflow detection and clamping with parallel operand processing for fixed-point multipliers is disclosed. The disclosure predicts when a multiplication of a number of operands will exceed a pre-determined number of bits based upon the fixed-point format of the operands. The prediction is performed in parallel with the multiplication of the operands. The multiplication need not be completed in full, but only to the extent to determine whether overflow exists. If an overflow detection occurs, clamping is instituted. The parallel operation of the overflow detection and the multiplication provides a faster clamping circuit than would otherwise be available from a serial multiplication followed by a clamping analysis. |
| US09256575B2 |
Data processor chip with flexible bus system
A data processor chip having a two-dimensional array of arithmetic logic units and memory where the arithmetic logic units are in communication with memory units in one dimension and with other arithmetic units in a second. |
| US09256574B2 |
Dynamic thread status retrieval using inter-thread communication
A circuit arrangement, method, and program product for dynamically providing a status of a hardware thread/hardware resource independent of the operation of the hardware thread/hardware resource using an inter-thread communication protocol. A master hardware thread may be configured to communicate status requests to associated slave hardware threads and/or hardware resources. Each slave hardware thread/hardware resource may be configured with hardware logic configured to automatically determine status information for the slave hardware thread/hardware resource and communicate a status response to the master hardware thread independent of the operation of the slave hardware thread/hardware resource. |
| US09256570B2 |
I2C isolated, bidirectional communication system with isolated domain current source pull-ups
This disclosure describes a circuit implementation providing the functions necessary to implement an isolated I2C bidirectional port. The technique implements a current source as a pull up device on at least one side of the isolation system. The circuit manages and communicates bidirectional data across an isolation barrier. A method of communicating bidirectional signals and an I2C acknowledge (ACK) or clock stretching through an isolation channel is disclosed. |
| US09256563B2 |
Dual-operating-system architecture for sharing USB devices, and method thereof
A dual-operating-system architecture for sharing USB apparatus in provided. The apparatus includes: a first operating system; a second operating system; a USB hub, connected to at least one USB apparatus; and a switch, for disconnecting the first operating system from the USB hub and connecting the second operating system to the USB hub for gaining control over the at least one USB apparatus when the first operating system is switched to the second operating system. |
| US09256561B2 |
Communication control apparatus and method of controlling the same
A communication control apparatus includes a first interface, a second interface, a determination unit, and a control unit. The first interface is connected to a detachable recording medium. The second interface is connected to an external device. The second interface includes a first bus controlled by a first bus controller and a second bus controlled by a second bus controller. The second bus has a maximum transfer rate less than that of the first bus. The determination unit is configured to determine a data transfer rate of the detachable recording medium when the detachable recording medium is connected to the first interface. The control unit is configured to establish a connection to the external device via the first bus when the determined data transfer rate exceeds a predetermined threshold, and via the second bus when the determined data transfer rate does not exceed the predetermined threshold. |
| US09256560B2 |
Controller integration
Roughly described, a data processing system comprises a central processing unit and a split network interface functionality, the split network interface functionality comprising: a first sub-unit collocated with the central processing unit and configured to at least partially form a series of network data packets for transmission to a network endpoint by generating data link layer information for each of those packets; and a second sub-unit external to the central processing unit and coupled to the central processing unit via an interconnect, the second sub-unit being configured to physically signal the series of network data packets over a network. |
| US09256555B2 |
Method and system for queue descriptor cache management for a host channel adapter
A method for managing a queue descriptor cache of a host channel adaptor (HCA) includes obtaining a queue descriptor from memory. The queue descriptor includes data describing a queue and the memory is located in a host system. The method further includes storing a copy of the queue descriptor in the queue descriptor cache of the HCA. The HCA accesses the copy of the queue descriptor to obtain the plurality of data, accesses the queue using the data, and updates the data to reflect the access to the queue. The method further includes calculating, using the data, a value corresponding to utilization of the queue, comparing the value against a threshold, fetching, if the value exceeds the threshold, a new copy of the queue descriptor from memory, and replacing the copy of the queue descriptor in the queue descriptor cache with the new copy obtained from the memory. |
| US09256554B2 |
Progress recording method and recovering method for encoding operation on storage device
A progress recording method and a corresponding recovering method adapted to an encoding operation performed on a storage area of a storage device are provided. The progress recording method includes the following steps. A variable set is initialized and stored. The encoding operation includes a plurality of sub-operations, and each of the sub-operations is corresponding to at least one flag variable in the variable set. The flag variables are used for recording execution progresses of the sub-operations. When each of the sub-operations is executed, the corresponding flag variable in the variable set is updated according to the execution progress of the sub-operation. |
| US09256552B2 |
Selective access to executable memory
In an embodiment, a data processing method comprises, in a computer executing a supervisor program: the supervisor program establishing a plurality of different memory access permissions comprising any combination of read, write, and execute permissions for one or more different regions of memory of a first domain; setting the memory access permissions of a first set of the regions of memory to execute only; in response to a request from a process to read or write a particular region of memory in the first set, performing one or more responsive actions that prevent the process from reading or modifying one or more instructions or one or more embedded immediate values of the particular region of memory. Embodiments provide selective access to executable memory. |
| US09256551B2 |
Embedded encryption/secure memory management unit for peripheral interface controller
In an embodiment, a peripheral interface controller may include an inline cryptographic engine which may encrypt data being sent over a peripheral interface and decrypt data received from the peripheral interface. The encryption may be transparent to the device connected to the peripheral interface that is receiving/supplying the data. In an embodiment, the peripheral interface controller is included in a system on a chip (SOC) that also includes a memory controller configured to couple to a memory. The memory may be mounted on the SOC in a chip-on-chip or package-on-package configuration. The unencrypted data may be stored in the memory for use by other parts of the SOC (e.g. processors, on-chip peripherals, etc.). The keys used for the encryption/decryption of data may remain within the SOC. |
| US09256550B2 |
Hybrid address translation
Embodiments of the invention relate to hybrid address translation. An aspect of the invention includes receiving a first address, the first address referencing a location in a first address space. The computer searches a segment lookaside buffer (SLB) for a SLB entry corresponding to the first address; the SLB entry comprising a type field and an address field and determines whether a value of the type field in the SLB entry indicates a hashed page table (HPT) search or a radix tree search. Based on determining that the value of the type field indicates the HPT search, a HPT is searched to determine a second address, the second address comprising a translation of the first address into a second address space; and based on determining that the value of the type field indicates the radix tree search, a radix tree is searched to determine the second address. |
| US09256549B2 |
Set-associative hash table organization for efficient storage and retrieval of data in a storage system
In one embodiment, an extent key reconstruction technique is provided for use with a set of hash tables embodying metadata. The metadata includes an extent key associated with a storage location on storage devices for write data of one or more write requests organized into an extent. Each hash table has a plurality of entries, and each entry includes a plurality of slots. A first field of the extent key is recreated implicitly from an entry in a first address space portion of a hash table. A second field of the extent key is stored in the slot. A third field of the extent key is stored in the slot. A fourth field of the extent key is recreated implicitly from the hash table of the set of hash tables. |
| US09256547B2 |
Memory switching protocol when switching optically-connected memory
Data is collected by an active node from passive nodes and arranges and stores the collected data on receiving nodes. A source node extracts the data format, and a remote memory blade identification (ID), a remote memory blade address, and ranges of the RMMA space, and composes and sends metadata to the receiving nodes and receiving racks. |
| US09256535B2 |
Conditional notification mechanism
The described embodiments comprise a computing device with a first processor core and a second processor core. In some embodiments, during operations, the first processor core receives, from the second processor core, an indication of a memory location and a flag. The first processor core then stores the flag in a first cache line in a cache in the first processor core and stores the indication of the memory location separately in a second cache line in the cache. Upon encountering a predetermined result when evaluating a condition for the indicated memory location, the first processor core updates the flag in the first cache line. Based on the update of the flag, the first processor core causes the second processor core to perform an operation. |
| US09256532B2 |
Method and computer system for memory management on virtual machine
A method and a computer system for memory management on a virtual machine system are provided. The memory management method includes the following steps. A least recently used (LRU) list is maintained by at least one processor according to a last access time, wherein the LRU list includes a plurality of memory pages. A first portion of the memory pages are stored in a virtual memory, a second portion of the memory pages are stored in a zram driver, and a third portion of the memory pages are stored in at least one swap disk. A space in the zram driver is set by the at least one processor. The space in the zram driver is adjusted by the processor according to a plurality of access probabilities of the memory pages in the zram driver, an overhead of a pseudo page fault, and an overhead of a true page fault. |
| US09256527B2 |
Logical to physical address mapping in storage systems comprising solid state memory devices
The present idea provides a high read and write performance from/to a solid state memory device. The main memory of the controller is not blocked by a complete address mapping table covering the entire memory device. Instead such table is stored in the memory device itself, and only selected portions of address mapping information are buffered in the main memory in a read cache and a write cache. A separation of the read cache from the write cache enables an address mapping entry being evictable from the read cache without the need to update the related flash memory page storing such entry in the flash memory device. By this design, the read cache may advantageously be stored on a DRAM even without power down protection, while the write cache may preferably be implemented in nonvolatile or other fail-safe memory. This leads to a reduction of the overall provisioning of nonvolatile or fail-safe memory and to an improved scalability and performance. |
| US09256523B2 |
Semiconductor storage device and control method thereof
A memory includes a cell array including memory cells storing data, and a write driver writing data to the cells. A write driver performs or does not perform writing of write data according to write mask data input along with the write data. A multiplexer selectively outputs a write protect signal or the write mask data. The write protect signal is fixed to a command prohibiting the write data from being written. The command is included in the write mask data. A write protect controller controls the multiplexer to output the write protect signal when an address of a write protect area in the cell array matches an address of the write data. The write protect controller controls the multiplexer to output the write mask data as it is when the address of the write protect area in the cell array does not match the address of the write data. |
| US09256519B2 |
Using linked data to determine package quality
Arrangements described herein relate to determining a quality of a software package. Via linked data, the software package can be linked to at least one test plan and a requirement collection. The software package can be executed in accordance with the test plan using at least one test case. At least one test result of the execution of the software package can be generated. A score can be assigned to the test result and a score can be assigned to the test based at least on the test result. Based at least on the scores assigned to the test result and the test case, a package quality score can be assigned to the software package. |
| US09256518B2 |
Automated data collection, computation and reporting of content space coverage metrics for software products
One or more test results and one or more user stories are received. For each test result in the one or more test results a set of content space coordinates of the one or more test results is compared to a set of content space coordinates of the one or more user stories. Based on the comparison it is determined if one or more user stories have been tested. One or more results of the comparison are then stored. |
| US09256517B1 |
Display of aggregated stack traces in a source code viewer
Embodiments described herein relate to systems and methods for displaying aggregated stack traces in a source code viewer. One or more execution identifiers are received in response to an execution of a first program executing on one or more client computing devices. Each execution identifier can include one or more slack frames, which correspond to a function call within the first program. An error-likeliness score is identified for each execution identifier. An error-weight is determined for each of the execution identifiers based on the identified error-likeliness scores for instances of the execution identifiers. |
| US09256515B2 |
Stack trace compression
Exemplary methods, apparatuses, and systems generate a plurality of possible stack traces for a computer program. Each possible stack trace represents functions that may be active while the computer program is running. Each function has a corresponding function identifier. A value for at least one of the plurality of possible stack traces is generated. Generating the value for each stack trace includes performing a series of one or more mathematical or logical operations between the function identifiers of the possible stack trace. A stack trace is generated as an output based upon a match between a run-time stack trace value and the at least one generated stack trace value. |
| US09256512B1 |
Quality analysis for embedded software code
The disclosure includes technology for analyzing software code for embedded systems using a plurality of analysis tools. The technology includes an example system including a processor and a memory storing instructions that when executed cause the system to determine a falseness rate for each of two or more analysis tools; analyze software code using the two or more analysis tools to generate two or more tool-output results; generate an analysis result based on the two or more tool-output results, the analysis result characterizing one or more faults and one or more validations identified in the two or more tool-output results; determine a fault expectation for the software code based on the analysis result and the falseness rate of each of the two or more analysis tools; and perform a quality assurance analysis for the software code based on the fault expectation. |
| US09256507B2 |
Computer system and its event notification method
If a failure occurs in physical resources constituting a virtual volume, a management server device is notified of information required by a user. A computer system includes a server device for managing a plurality of virtual volumes, a storage apparatus having a storage unit equipped with a plurality of storage devices, and a controller for controlling data input to, or output from, the storage unit, a management server device which is an access target of a user terminal, and an event management device for managing an event(s) generated by the server device or the storage apparatus, wherein when the event management device receives the event, it judges the content of the event and identifies a virtual volume to be affected by the event; and if a service level that should be satisfied by the identified virtual volume is defined for the identified virtual volume, the event management device identifies, based on the content of the received event, whether an incident in violation of the service level has occurred or not, and then notifies the management server device of the identified content as an event based on an event filter. |
| US09256504B2 |
Semiconductor integrated circuit including a state machine
A state machine; a BIST circuit including a test pattern generator and an expected value comparison circuit; a state monitoring circuit configured to monitor whether or not a state of the state machine is a specific state; and a transition request detection circuit configured to detect a transition request signal from the specific state to a next state, are held. When the state monitoring circuit decides that the state of the state machine is the specific state, the state machine outputs a signal indicating the specific state as a state output of the state machine, and the BIST circuit performs a test of the state machine. When the transition request detection circuit detects the transition request signal while the test is performed, the BIST circuit stops the test of the state machine. |
| US09256497B2 |
Checkpoints associated with an out of order architecture
A checkpoint technique associated with an out of order based architecture of a processing device is described. An instruction may be received by its retirement unit and an identification as to whether the instruction is associated with a speculative error is performed. If the instruction is associated with the speculative error, then a first operation may be performed to replace state values of a first checkpoint of the processing device with state values of a second checkpoint. If the instruction is not associated with the speculative error, then the second checkpoint state may be updated based on the instruction. |
| US09256496B1 |
System and method for hybrid kernel—and user-space incremental and full checkpointing
A system includes a multi-process application that runs on primary hosts and is checkpointed by a checkpointer comprised of a kernel-mode checkpointer module and one or more user-space interceptors providing at least one of barrier synchronization, checkpointing thread, resource flushing, and an application virtualization space. Checkpoints may be written to storage and the application restored from said stored checkpoint at a later time. Checkpointing may be incremental using Page Table Entry (PTE) pages and Virtual Memory Areas (VMA) information. Checkpointing is transparent to the application and requires no modification to the application, operating system, networking stack or libraries. In an alternate embodiment the kernel-mode checkpointer is built into the kernel. |
| US09256495B2 |
Processing unit and error processing method
A processing unit of the embodiments includes an instruction memory that holds a plurality of instructions specified by addresses, and that cannot execute read and write operations concurrently, an error correction circuit that detects and corrects an error in the instruction, a program counter, an instruction buffer that holds the instruction corrected as a corrected instruction, a program counter buffer that holds an address of the instruction where an error has been detected, a selector that selects and outputs any of the output of the error correction circuit and the output of the instruction buffer, and a control unit that controls the read and write of the instruction specified by the address from and into the instruction memory. The control unit writes the corrected instruction in the instruction memory using an address held in the program counter buffer when a predetermined condition is satisfied after the occurrence of the error. |
| US09256494B2 |
Memory system and operating method thereof
A memory system and an operating method thereof are provided. The memory system includes a semiconductor memory device configured to perform a read operation and a controller configured to control the read operation of the semiconductor memory device, and the controller, by determining programmed states of memory cells located nearby selected memory cells, divides the selected memory cells into a plurality of groups depending on an amount of interference, and corrects data of one of the groups having a great amount of interference. |
| US09256491B1 |
Method and system for data integrity
A device having a storage location for receiving an original data and a corresponding original error correction code (ECC) is provided. The device includes ECC modification pattern generator logic for comparing modified data and the original data for generating a pattern for modifying the original ECC and ECC modification logic for modifying the original ECC based on the pattern. |
| US09256487B1 |
Optimizing error floor performance of finite-precision layered decoders of low-density parity-check (LDPC) codes
Systems and methods are provided for selecting precisions during iterative decoding with a low-density parity check (LDPC) decoder in order to maximize LDPC code's performance in the error floor region. The selection of the precision of the messages may be done in such a way as to avoid catastrophic errors and to minimize the number of near-codeword errors during the decoding process. Another system and method to avoid catastrophic errors in the layered (serial) LDPC decoder is provided. Lastly, a system and method that select precisions and provide circuitry that optimizes the exchange of information between a soft-input, soft-output (SISO) channel detector and an error correction code (ECC) decoder for channels with memory is provided. |
| US09256485B1 |
System and method for generating message sequence diagrams from graphical programs
A system and method automatically generating one or more message sequence diagrams based on an analysis of the execution behavior of a model, such as a computer-generated, executable graphical model. A model analyzer examines execution instructions generated for the model. A filtering unit identifies execution instructions that concern designated elements of the model. An auto diagram builder generates one or more message sequence diagrams. The diagrams may include display features that represent activities involving the designated model elements. The diagrams may show the relative execution time order of the activities. |
| US09256481B2 |
Dynamic user interface aggregation through smart eventing with non-instantiated content
A published event from a first content element executing within a framework may be detected. In response, a registry may be searched for one or more registered events that match the published event, and if a matching registered event is found, a second content element that registered said matching registered event may be instantiated to start executing within the framework. The second content element is dynamically aggregated into the framework based on the published event without the first content element needing to have previous knowledge of the second content element, and without the second content element needing to have previous knowledge of the first content element. The framework also does not need to be designed initially to deploy the second content element. Which one or more content elements to aggregate into the framework may be determined at run time rather than at design time. |
| US09256480B2 |
Computer architecture with a hardware accumulator reset
A processor with an accumulator. An event is selected to produce one or more selected events. A reset signal to the accumulator is generated responsive to the selected event. Responsive to the reset signal, the accumulator is reset to zero or another initial value while avoiding breaking pipelined execution of the processor. |
| US09256479B2 |
App icon processing method and communication terminal
The present invention relates to the technical field of communications, and provides an app icon processing method and a communication terminal. The processing method comprises the steps of: determining whether or not an existing application is supported by the current operating environment, the current operating environment comprising the current network environment and/or the current terminal environment, etc.; then, inactivating the app icon corresponding to the existing application not supported by the current operating environment, or, downloading and displaying an application supported by the current operating environment. Preferably, the inactivated app icon is removed or displayed in an inactive state. In this way, in the present invention, the app icons of a plurality of inactive applications can be hidden on the communication terminal so that app icons are cleared automatically, thus aiding the user to find quickly the needed and active app icons. |
| US09256478B2 |
System for scalable configuration and context
Instance properties are defined for instances of an application. During episodes of the instances, the values of the instance properties are populated. Other instances read the values of the instance properties without requiring the instance to run. If the value of an instance property is not populated, then a new episode of the instance is executed to populate the missing values. Instance properties may be grouped into property bags. An instance may populate the values of instance properties in a property bag atomically during one episode using a multi-set message. Other instances may read the values of the property bag instance properties using a multi-get request. |
| US09256476B2 |
Expedited module unloading for kernel modules that execute read-copy update callback processing code
A technique for expediting the unloading of an operating system kernel module that executes read-copy update (RCU) callback processing code in a computing system having one or more processors. According to embodiments of the disclosed technique, an RCU callback is enqueued so that it can be processed by the kernel module's callback processing code following completion of a grace period in which each of the one or more processors has passed through a quiescent state. An expediting operation is performed to expedite processing of the RCU callback. The RCU callback is then processed and the kernel module is unloaded. |
| US09256475B1 |
Method and system for handling ownership transfer in a virtualization environment
A method for handling storage in a virtualization environment including identifying a situation in which a storage controller ownership change is to occur for a virtual disk, identifying a candidate replacement owner for the virtual disk and transferring ownership of the virtual disk to the candidate replacement owner. |
| US09256466B2 |
Data processing systems
When an atomic operation is to be executed for a thread group by an execution stage of a data processing system, it is determined whether there is a set of threads for which the atomic operation for the threads accesses the same memory location. If so, the arithmetic operation for the atomic operation is performed for the first thread in the set of threads using an identity value for the arithmetic operation for the atomic operation and the first thread's register value for the atomic operation, and is performed for each other thread in the set of threads using the thread's register value for the atomic operation and the result of the arithmetic operation for the preceding thread in the set of threads, to thereby generate for the final thread in the identified set of threads a combined result of the arithmetic operation for the set of threads. |
| US09256464B2 |
Method and apparatus to replicate stateful virtual machines between clouds
A method including replicating a first virtual machine (VM) in a first cloud and putting the replicated VM in a second cloud. Activating the first VM and pausing the replicated VM. First processing, at the first VM, traffic from VMs in the first cloud, wherein the first processing occurs when the first VM is activated and the replicated VM is paused. Buffering, at a hypervisor of the replicated VM, traffic from VMs in the second cloud, wherein the buffering occurs when the first VM is activated and the replicated VM is paused. Activating the replicated VM in response to state information of the first VM and pausing the first VM. Second processing, at the replicated VM, the buffered traffic according to the state information of the first VM, wherein the second processing occurs when the replicated VM is activated and the first VM is paused. |
| US09256462B2 |
Contextually interacting with applications
The present discussion relates to contextually interacting with applications. One example can include a computer that has a set of applications installed thereon. This example can also include a URI manager configured to receive a context-defining URI, the URI manager can be configured to run a sub-set of the applications specified by the context-defining URI and to set a common context for the sub-set of the applications as specified by the context-defining URI. |
| US09256458B2 |
Conditionally updating shared variable directory (SVD) information in a parallel computer
Methods, parallel computers, and computer program products for conditionally updating shared variable directory (SVD) information in a parallel computer are provided. Embodiments include a runtime optimizer receiving a broadcast reduction operation header. The broadcast reduction operation header includes an SVD key and a first SVD address. The first SVD address is associated with the SVD key in a first SVD associated with a first task. Embodiments also include the runtime optimizer retrieving from a remote address cache associated with the second task, a second SVD address indicating a location within a memory partition associated with the first SVD, in response to receiving the broadcast reduction operation header. Embodiments also include the runtime optimizer determining that the first SVD address does not match the second SVD address and updating the remote address cache with the first SVD address. |
| US09256457B1 |
Interactive response system for hosted services
A system for providing an interactive response system for hosted services may include a processor and a memory. The processor may facilitate steps of receiving data streams from participant devices, such as devices participating in a multimedia conference, and transmitting, in response to receiving the data streams from the participant devices, the data streams to the other of the participant devices. The steps may further include receiving, from one of the participant devices, a request to initiate communication with an invitee device, processing the data streams to determine a language associated with the data streams, and providing, to the invitee device, a communication in the determined language. The communication provided to the invitee device may be an initial communication of an interactive response system, such as an interactive voice response system or an interactive messaging response system. |
| US09256453B2 |
Extensible web-based 3D modeling
A system for extending the functionality of a web-based, three-dimensional modeling in a browser application is stored as instructions on a computer-readable medium. The instructions include an interface module that may receive user commands from the browser application that define a script including functions to modify or create a 3D model. The script instructions may cause a rendering of the 3D model to be displayed in a window controlled by the browser application. A modeling engine as a compiled browser plug-in may extends the functionality of the browser application. Further, the modeling engine may include functions to interpret model data corresponding to a 3D model and render the 3D model in accordance with the script. Further instructions include a script interface layer that may expose the modeling engine functions to the interface module for use by the script functions. The script functions extend the modeling engine functions. |
| US09256445B2 |
Dynamic extension view with multiple levels of expansion
Application extension management may be provided. A plurality of related documents may be scanned to determine whether an activation trigger associated with an application extension has been triggered. In response to determining that the activation trigger associated with the application extension has been triggered, the application extension may be triggered and a user interface element associated with the application extension may be displayed according to a display rule. |
| US09256443B2 |
Electronic device having updatable bios and bios updating method thereof
An electronic device having updatable BIOS is used to perform a BIOS updating method. The electronic device electrically connects to a server, in which update data is stored. The electronic device includes a Basic Input/Output System (BIOS), a network connection module and a switch. A BIOS program is stored in the BIOS, and a connecting program is stored in the network connection module for connecting to the server. When the electronic device is updating, the BIOS switches to electrically connect to the network connection module via the switch, and the network connection module connects to the server by executing the connecting program, downloads the update data applying to the BIOS, and overwrites the update data to the BIOS to update the BIOS program. |
| US09256441B2 |
System and method providing forward compatibility between a driver module and a network interface
Generally, this disclosure provides systems and methods for providing forward compatibility between a driver module and one or more present or future versions of a network interface. The system may include a network interface configured to transfer data between a host system and a network; and a programmable circuit module associated with the network interface, the programmable circuit module configured to provide compatibility between the network interface and a driver module associated with the host system, wherein the driver module includes a first set of capabilities and the network interface includes a second set of capabilities. |
| US09256440B1 |
Facilitating device driver interactions
Techniques are described for facilitating interactions with device driver modules. In at least some situations, the techniques include managing interactions between device driver modules and other programs or hardware devices so as to minimize disruptions related to the device driver modules, including when changes to existing device driver modules are made. Such device driver module changes may have various forms and may occur for various reasons, including to install new versions of device driver modules or otherwise upgrade existing device driver modules. Furthermore, the interactions with device driver modules may be managed in various manners, including to allow changes to occur to a device driver module while that device driver module is in use on a computing system, but without causing other programs on the computing system to be restarted or to lose existing connections to the device driver module being changed. |
| US09256439B2 |
Parallel processing of two-dimensional data, storage of plural data of the processing results in a cache line and transfer of the data to a memory as in the cache line
A data processing apparatus causes multiple processors to process in parallel input data that is arrayed two-dimensionally, and stores the data of the processing results in a cache line of a cache memory, where the data of the processing results includes a plurality of pieces of data of a predetermined width that is smaller than a cache line width of the cache memory. The data stored in the cache memory is then transferred together to a main memory as in the cache line. |
| US09256438B2 |
Mechanism for increasing the effective capacity of the working register file
A computer processor pipeline has both an architectural register file and a working register file. The lifetime of an entry in the working register file is determined by a predetermined number of instructions passing through a specified stage in the pipeline after the location in the working register file is allocated for an instruction. The size of the working register file is selected based upon performance characteristics. A working register file creditor indicator is coupled to the front end pipeline portion and to the back end pipeline portion. The working register file credit indicator is monitored to prevent a working register file overflow. When the a location in the architectural register file is read early, the location is monitored to determine whether the location is written to prior to issuance of the instruction associated with the early read. |
| US09256437B2 |
Code generation method, and information processing apparatus
A computer-readable recording medium having stored therein a program for causing a computer to execute a digital signature process includes determining that a first specific instruction for executing parallel calculations of the same type, each calculation operating on a different piece of data, is generated by combining first and second instructions included in a first code, retrieving, from the first code, a third instruction for calculating data referenced by the first instruction and a fourth instruction for calculating data referenced by the second instruction, and selecting the third and fourth instructions as candidates of instructions to be combined with each other preferentially to generate a second specific instruction which is different from the first specific instruction. |
| US09256436B2 |
Branch prediction table install source tracking
Embodiments relate to branch prediction table install source tracking. An aspect includes a computer-implemented method for branch prediction table install source tracking. The method includes receiving at a branch target buffer a request to install a branch target buffer entry corresponding to a branch instruction for branch prediction. The method further includes identifying, by a computer, a source of the request as an install source of the branch target buffer entry. The method also includes storing, by the computer, an install source identifier in the branch target buffer based on the install source. |
| US09256433B2 |
Systems and methods for move elimination with bypass multiple instantiation table
Systems and methods for move operation elimination with bypass Multiple Instantiation Table (MIT) logic. An example processing system may comprise a first data structure configured to store a plurality of physical register values; a second data structure configured to store a plurality of pointers, each pointer referencing an element of the first data structure; a third data structure including a plurality of move elimination sets, each move elimination set comprising a plurality of bits representing a plurality of logical registers; and a logic configured to perform a data manipulation operation by causing an element of the second data structure to reference an element of the first data structure, the logic further configured to reflect results of two or more data manipulation operations by performing a single update of the third data structure. |
| US09256430B2 |
Instruction scheduling approach to improve processor performance
A processor instruction scheduler comprising an optimization engine which uses an optimization model for a processor architecture with: means to generate an optimization model for the optimization engine from a design of a processor and data representing optimization goals and constraints and a code stream, wherein the processor has at least two execution pipes and at least two registers, and wherein the code stream comprises processor instructions with corresponding register selections; and reordering means to generate an optimized code stream from the code stream with the optimal solution provided by the optimization engine for the optimization model by reordering the code stream, such that optimum values for the optimization goals under the given constraints are achieved without affecting the operation results of the code stream. |
| US09256429B2 |
Selectively activating a resume check operation in a multi-threaded processing system
This disclosure describes techniques for selectively activating a resume check operation in a single instruction, multiple data (SIMD) processing system. A processor is described that is configured to selectively enable or disable a resume check operation for a particular instruction based on information included in the instruction that indicates whether a resume check operation is to be performed for the instruction. A compiler is also described that is configured to generate compiled code which, when executed, causes a resume check operation to be selectively enabled or disabled for particular instructions. The compiled code may include one or more instructions that each specify whether a resume check operation is to be performed for the respective instruction. The techniques of this disclosure may be used to reduce the power consumption of and/or improve the performance of a SIMD system that utilizes a resume check operation to manage the reactivation of deactivated threads. |
| US09256423B2 |
Software product licensing based on a content space
A computer-implemented method for generating software license types, includes collecting, by a processor, a plurality of software product functions, creating, by the processor, a plurality of content space specification files that includes the plurality of software product functions, processing, by the processor, the plurality of content space specification files to generate a plurality of software license types and outputting, by the processor, the plurality of software license types. |
| US09256419B2 |
Dynamic software updates
A method, and a corresponding system, for dynamically updating software while the software is running by automatically dividing a patch into a plurality of micro-updates using compiler analysis. The method includes providing the patch which includes updates to several variable units of the software, including functions, type definitions, and data stores. Next, an interference graph of the patch is generated by creating a node corresponding to each variable unit of the patch and creating connected components by adding edges connecting variable units having an impact expression with a non-zero intersection. The patch is divided into the micro-updates, where each micro-update corresponds to a connected component. The micro-updates are then applied to the software when the variable units of the micro-update are at a safepoint, and at least two of the micro-updates are applied at different times while the software is running. |
| US09256418B2 |
Dynamic application identifier for use in an update workflow
During an update technique, an update for the software application is received from a provider of the software application. Then, update information is either received from the provider or is generated. This update information specifies an update relationship between the update and at least a previous version of the software application. Next, inventory information associated with a portable electronic device is accessed (such as whether the previous version of the software application is currently installed on the portable electronic device). In response to the accessed inventory information, an identifier associated with the update is dynamically generated, and the update and the dynamically generated identifier are provided to the portable electronic device. Using the dynamically generated identifier, an application management system or the operating system installed on the portable electronic device determines whether an update workflow is executed. |
| US09256416B1 |
Methods and apparatus for automatic session validation for distributed access points
In some embodiments, a method includes installing at an access point that (1) includes a first software image and (2) is operatively coupled to a network controller via network, a second software image different from the first software image. The method includes defining in response to the installation, a virtual client disposed in the access point. The virtual client is configured to send to the network controller via the network a first validation data unit that causes the network controller to send a second validation data unit to the access point if the first validation data unit is received by the network controller. The method also includes installing at the access point that includes the second software image, the first software image and uninstalling the second software image if the access point does not receive the second validation data unit in response to the first validation data unit. |
| US09256415B2 |
Script generation engine
The present invention is an installation script generation engine. An application component distribution system can include a repository of semantic models for interdependent ones of application components. A mapping of individual listings in the semantic models to target platform specific installation instructions further can be included. Finally, a script generation engine can be configured to produce a target specific set of instructions for a specified application component based upon a mapping of at least one of the semantic models in the repository. Notably, each of the semantic models can include a listing of component relationships, target platform requirements and platform neutral installation instructions. Moreover, the component relationships can include at least one component relationship selected from the group consisting of a containment relationship, a usage relationship, a contradiction relationship, and an equivalence relationship. Finally, a Web services interface to the repository can be configured to permit remote access to the repository. |
| US09256412B2 |
Scheduled and quarantined software deployment based on dependency analysis
A request to deploy a next version of a software component in a cloud environment is received. An analysis of a number of dependencies among software components of the cloud environment is received. Deployment of the next version of the component is scheduled based on the analysis. The next version of the software component is deployed in the cloud environment in accordance with the scheduled deployment. The next version of the software component is quarantined until a predefined criteria is satisfied. In one aspect, the predefined criteria is defined based on error rate of the next version of the software component. In a further aspect, the predefined criteria is defined based on received analysis among the components. Upon satisfying the predefined criteria, the next version of the software component is released from the quarantine. |
| US09256411B2 |
Strength reduction compiler optimizations
An optimizing compiler includes a strength reduction mechanism that optimizes a computer program that includes conditional operations by analyzing the instructions in the computer program in a single pass, determining whether instruction substitution is profitable for original instructions in the code, and performing instruction substitution for one or more original instructions for which instruction substitution is deemed profitable, including conditional operations. The substituted instructions result in strength reduction in the computer program. |
| US09256410B2 |
Failure profiling for continued code optimization
A method and an apparatus to continuously re-compile a code are described. The code can be compiled in a speculatively optimized manner from a source code to access an untyped variable according to a type prediction of runtime values for the untyped variable. Failures of the type prediction during the execution can be dynamically tracked. Each failure may be associated a runtime value with a type outside of the type prediction. The type prediction may be adjusted according to the failures tracked for future runtime values of the untyped variable. The source code can be recompiled for execution to optimize the access to the untyped variable for the future runtime values according to the adjusted type prediction. |
| US09256405B1 |
Code generation based on regional upsampling-based delay insertion
A device is configured to receive optimization information associated with a model, determine an amount of delay to be inserted into the model, and determine a sampling factor by which a first data rate associated with a signal is to be modified into a second data rate. The device is configured to determine a region of interest, insert an upsampling block that upsamples the signal entering the region of interest based on the sampling factor, and insert a downsampling block, associated with a unit of delay, which downsamples the signal exiting the region of interest based on the sampling factor. The device is configured to convert the unit of delay into a fast delay block, corresponding to the amount of delay, and insert the fast delay block in the region of interest. The device is configured to generate code associated with the model, and provide the code. |
| US09256398B2 |
Device and method of increasing dynamically-typed software efficiency
According to an aspect of an embodiment, a method of increasing efficiency of a software program may include executing a software program that is developed based on a dynamically-typed programming language. The method may also include determining, during execution of the software program, type information for variables included in the software program. Additionally, the method may include generating a modified software program based on the software program and the type information and distributing the modified software program. |
| US09256396B2 |
Speech recognition for context switching
Various embodiments provide techniques for implementing speech recognition for context switching In at least some embodiments, the techniques can enable a user to switch between different contexts and/or user interfaces of an application via speech commands. In at least some embodiments, a context menu is provided that lists available contexts for an application that may be navigated to via speech commands. In implementations, the contexts presented in the context menu include a subset of a larger set of contexts that are filtered based on a variety of context filtering criteria. A user can speak one of the contexts presented in the context menu to cause a navigation to a user interface associated with one of the contexts. |
| US09256391B2 |
Method, system, and storage media for global synchronization of time
A method for synchronizing time in a plurality of graphical displays provided within a human-machine interface (HMI) includes displaying stored data via the plurality of graphical displays, receiving data refresh configuration parameters via a configuration tool within the HMI, and storing the data refresh configuration parameters in a memory. The method also includes generating, by the HMI, a data refresh message that includes the data refresh configuration parameters, and refreshing, by at least a portion of the plurality of graphical displays, display of the stored data based on the data refresh configuration parameters. |
| US09256384B2 |
Method and system for reducing write latency in a data storage system by using a command-push model
A data storage system is provided that implements a command-push model that reduces latencies. The host system has access to a nonvolatile memory (NVM) device of the memory controller to allow the host system to push commands into a command queue located in the NVM device. The host system completes each IO without the need for intervention from the memory controller, thereby obviating the need for synchronization, or handshaking, between the host system and the memory controller. For write commands, the memory controller does not need to issue a completion interrupt to the host system upon completion of the command because the host system considers the write command completed at the time that the write command is pushed into the queue of the memory controller. The combination of all of these features results in a large reduction in overall latency. |
| US09256382B2 |
Interface for management of data movement in a thin provisioned storage system
A computational device receives a request to copy a source logical block of a thin provisioned source logical unit to a target logical block of a thin provisioned target logical unit, wherein in thin provisioned logical units physical storage space is allocated in response to a write operation being performed but not during creation of the thin provisioned logical units. The computational device generates metadata that stores a correspondence between the source logical block and the target logical block, while avoiding allocating any physical storage space for the target logical block in the thin provisioned target logical unit. |
| US09256379B2 |
Apparatus containing photoisomerization compound
Technologies are generally described for controlling temperature using compounds capable of photoisomerization. In some examples, a temperature control apparatus includes a first receiving unit configured to contain a compound capable of photoisomerization, a second receiving unit configured to contain the compound capable of photoisomerization, a first filter configured to pass first light from a first light source, and a second filter configured to pass second light from a second light source. Further, the first and second receiving units are coupled to each other so that the compound capable of photoisomerization may be circulated between the first and second receiving units, and the compound capable of photoisomerization in the first receiving unit and the second receiving unit is photoisomerized by at least one of the first light and the second light. |
| US09256375B2 |
Level placement in solid-state memory
Methods and apparatus are provided for determining level placement in q-level cells of solid-state memory, where q>2. A group cells is read, where each cell is programmed to a respective programming level, at a series of time instants to obtain a sequence of read metric values for that cell. Statistical data as a function of time for each level is derived by processing the sequence of read metric values for the group of cells. At least one parameter of a model defining variation with time of the statistical data is determined. Calculating a set of q programming levels which has a pre-determined property over time based on a variation of the parameter as a function of level and the model. |
| US09256374B1 |
Metadata for managing I/O and storage for a virtualization environment
Disclosed is an improved approach for using advanced metadata to implement an architecture for managing I/O operations and storage devices for a virtualization environment. According to some embodiments, a Service VM is employed to control and manage any type of storage device, including directly attached storage in addition to networked and cloud storage. The advanced metadata is used to track data within the storage devices. A lock-free approach is implemented in some embodiments to access and modify the metadata. |
| US09256373B1 |
Invulnerable data movement for file system upgrade
A single virtual storage device file system that abstracts multiple RAID groups of physical storage devices into one virtual device and one first blockset having a plurality of data blocks in a contiguous linear address space is converted into a multiple virtual device file system that abstracts the multiple RAID groups of physical storage devices as separate multiple virtual storage devices each having a separate second blockset and address space, by migrating data in allocated blocks at boundaries of the physical storage device groups to free blocks, partitioning the first blockset at the boundaries into the multiple second blocksets, updating the block metadata of each block, and rebuilding the file system using the block metadata to generate second blockset metadata. |
| US09256372B2 |
Storage device and method of controlling storage device
It is an object of the present invention to suppress inconsistency of mount information necessary for mounting a volume in a storage device having a primary volume and a secondary volume.The storage device according to the present invention creates a memory region storing the mount information necessary for mounting the secondary volume, saves a snapshot thereof, and presents a virtual volume which has been created by using the snapshot and the data in the secondary volume to an external device. |
| US09256371B2 |
Implementing reinforcement learning based flash control
A method and system are provided for implementing enhanced flash storage control using reinforcement learning to provide enhanced performance metrics. A flash controller, such as a Reinforcement Learning (RL) flash controller, is coupled to a flash storage. The flash controller defines a feature set of flash parameters determined by a predefined one of a plurality of optimization metrics. The optimization metric is adapted dynamically based upon system workload and system state. The flash controller employing the feature set including at least one feature responsive to erase operations; computes a current system state responsive to the employed feature set; selects actions at each time step by sensing the computed current system state for performing an action to maximize a long term reward, and moves to another state in the system while obtaining a short-term reward for the performed action. |
| US09256370B2 |
Average response time improvement from a file system for a tape library
A mechanism is provided for improving the average response time of a tape library. Prior to receiving a next access request for data from one of a set of tape mediums, a determination is made as to whether a number of tape drives that are unoccupied is less than a predetermined minimum open tape drive threshold (N). Responsive to the number of tape drives that are unoccupied being less than the predetermined minimum open tape drive threshold (N), a least recently used idle tape medium is unmounted and unloaded from an associated tape drive. |
| US09256366B2 |
Systems and methods for touch-based two-stage text input
Embodiments relate to systems and methods for touch-based two-stage text input. An electronic device (102), such as a wearable wireless device, can be configured with a two-stage input interface (116) on a display (104). A first stage can include a seek area (120), which displays a subset of letters or other symbols to represent the full range of symbolic elements that are available, in a compressed form. The user can identify an intended target range (128) by touching an area at or around the letter or other symbol of interest. That input triggers the display of a second stage of the interface in a separate selection area (122), in which all letters or other symbols in the target range are expanded and displayed. The user can then touch and lift off the letter or other symbol they wish to choose, for example, to insert in a message or application. |
| US09256360B2 |
Single touch process to achieve dual touch user interface
A process to experience a two touch interface with single touch functionality is disclosed. Use of two fingers simultaneously presents a degree of freedom constraint on the hand. In an embodiment of the present invention, the simultaneous two touch interface is simulated using a single touch process. In a special input mode, a mechanism is used to first fix a point of reference. A second and subsequent single touch with respect to the fixed point of reference is then made. The time skewed touches enable free use of the index finger for both touches. Closed figures are easily drawn and zoom in and zoom out functions are similarly implemented by a point of reference and a line traced away from or to the object. Limitations of the dual touch are overcome, while maintaining full interface capability of the dual touch. |
| US09256359B2 |
Touch control method and electronic device using the same
A touch control method, adapted for an electronic device with a touch screen is provided. The method includes the step of displaying a touch cursor on the touch screen, wherein the touch cursor includes a positioning point; detecting whether a dragging object exists around the positioning point; and moving the dragging object to be associated with the positioning point of the touch cursor and moving the dragging object according to a movement of the positioning point when determined that the dragging object exists around the positioning point and an operating signal corresponding to a dragging action of the touch cursor is received from the touch screen. |
| US09256357B2 |
Provisioning a portlet viewer for viewing drag-and-drop content in a portal environment
Embodiments of the present invention address deficiencies of the art in respect to drag-and-drop operations for content in a portal view and provide a method, system and computer program product for provisioning a portlet viewer for viewing drag-and-drop content in a portal environment. In one embodiment, a computer-implemented method for provisioning a portlet viewer for viewing drag-and-drop content in a portal page can include determining a content type for content selected externally to the portal page subsequent to rendering the portal page, locating a portlet viewer associated with the determined content type, provisioning the located portlet viewer in the portal page, and rendering the provisioned portlet viewer in the portal page with the content. |
| US09256351B2 |
Method and electronic device for facilitating user control of a menu
An electronic device comprising a display and means for receiving user input, a method of operation thereof and computer software, the method comprising, while receiving a first user input, displaying a menu in a first configuration, the menu in a first configuration having one or more menu elements; and on receiving a second user input continuous from the first user input, displaying the menu in a second configuration, wherein at least one element of the menu in a first configuration is represented in the menu in a second configuration. |
| US09256348B2 |
Posture creation with tool pickup
Computer simulation generates improved 3D images of human movement involving an object associated with the human character. A set of axes in 3 dimensional space is originally defined for tracking orientation of the human character in a 3D image. This set of axes is subsequently automatically applied to and used for object(s) carried by the human character. The object is displayed at a constant (same, unchanged) orientation while the human character is illustrated moving in certain ways in succeeding 3D images. |
| US09256347B2 |
Routing a teleportation request based on compatibility with user contexts
A teleportation proxy and teleportation proxy service which monitors the usage of a networked computer or terminal to determine contextual metadata for a user reflecting current usage of the networked computer or terminal. A search engine then searches metadata of virtual universe locations in accordance with at least a portion of said contextual metadata and candidate matches are compared against the contextual metadata to determine suggested teleportation destinations in a virtual universe. |
| US09256346B2 |
Managing ephemeral locations in a virtual universe
Systems and methods for advertising, and, more particularly, systems and methods for managing ephemeral locations in a virtual universe. A method for managing ephemeral locations in a virtual universe (VU) includes causing a computer infrastructure to: render an ephemeral location upon a triggering in the VU; teleport a VU user avatar to the ephemeral location; permit the user avatar to interact in the ephemeral location; teleport the user avatar out of the ephemeral location; and un-render the ephemeral location. |
| US09256342B2 |
Methods of interfacing with multi-input devices and multi-input display systems employing interfacing techniques
Methods and systems for interfacing with multi-input devices employ various techniques for controlling the window framing of images. Such techniques provide control, including moving, sizing, and orientating, of one or more displayed window frames in which one or more images are displayed. |
| US09256341B2 |
Tracking changes in collaborative authoring environment
Change tracking and collaborative communication are provided in authoring content in a collaborative environment. Monitored changes, comments, and similar input by the collaborating authors may be presented on demand or automatically to each author based on changes and/or comments that affect a particular author, that author's portion of collaborated content, type of changes/comments, or similar criteria. Change and/or comments notification may be provided in a complementary user interface of the collaborative authoring application or through a separate communication application such as email or text messaging. |
| US09256338B2 |
Backlight module with low electromagnetic interference and display device using the same
A display device includes a display panel, an electromagnetic touch panel, and a backlight module overlapping one another. The backlight module has a light guide plate and a light source module consisting of a flexible circuit board strip. The flexible circuit board strip includes a light source section and a signal transmission section extending along a light entrance edge and a side edge adjacent to the light entrance edge of the light guide plate, respectively. Two ends of a connection section are connected to the light source section and the signal transmission section, respectively. The connection section includes at least one first fold making the light source disposing plane of the light source section and the wiring disposing plane of the signal transmission section be non-coplanar and also makes the wiring disposing plane be parallel to the plane of the side edge of the light guide plate. |
| US09256337B2 |
Coordinate detection apparatus
In a coordinate detection apparatus, a resistance-film is formed on a substrate made of an insulating material. A common electrode applies a voltage to the resistance-film, the common electrode extending along a plurality of a resistance-film removal areas formed by removing portions of the resistance-film. A voltage application part applies the voltage to the common electrode. The voltage is applied from the voltage application part to the resistance-film through the common electrode to generate a potential distribution in the resistance-film. A coordinate position of a contact position at which the resistance-film is contacted is detected by detecting a potential of the resistance-film at the contact position. |
| US09256334B2 |
Injection molded product and method of manufacturing the same
An injection molded product in which an electrical connection between a contact pin and an electrode pattern is sufficient, and a method of manufacturing the same, are provided. The injection molded product comprises: a base film; an electrode pattern, which is formed on the base film; an electrically conductive adhesive, which is formed on an upper surface of the electrode pattern; a contact pin, which contacts the electrically conductive adhesive, is electrically connected to the electrode pattern via the electrically conductive adhesive, and is electrically conductive; and a molded resin, which is injection molded along the base film such that the electrically conductive adhesive and part of the contact pin are embedded. |
| US09256333B2 |
Method and apparatus for reducing noise in capacitive touch interfaces
A method for controlling a capacitive touch panel includes filtering differential capacitance data. The filtered data is integrated in a first direction of the touch panel to generate a first set of integrated data, and integrated in a second direction of the touch panel to generate a second set of integrated data. The first and second sets of integrated data are averaged, and a touch on the touch panel is detected based on the average of the first and second sets of integrated touch data. |
| US09256325B2 |
Curved display apparatus for vehicle
A curved display apparatus includes a projector, first and second mirrors, a curved screen, an infrared illuminator, an infrared camera, and a controller. The projector is configured to project an image onto a projection area. The first mirror is configured to reflect the image projected from the projector. The second mirror is configured to reflect the image reflected from the first mirror. The curved screen is configured to display the image reflected from the second mirror. The infrared illuminator is configured to output infrared rays onto the curved screen. The infrared camera is configured to capture an infrared image of the curved screen. The controller is configured to determine the image displayed on the curved screen and control the projector according to the determined image, determine a light reflection area based on the infrared image, and control the projector to rearrange an image displayed in the light reflection area. |
| US09256324B2 |
Interactive operation method of electronic apparatus
An interactive operation method of an electronic apparatus is provided. An image sequence is captured by an image capturing unit. An image pre-processing is executed on an image of the image sequence. A fingertip candidate region is obtained from the image. Whether the fingertip candidate region is connected with a hand region is determined. If the fingertip candidate region is connected with the hand region, the fingertip candidate region serves as a target fingertip region. Whether a click event occurs is determined by continuously tracking the target fingertip region. When the click event occurs, a corresponding function is executed. |
| US09256318B2 |
Input device
An input device for controlling a device is provided. The input device comprises a sensor surface sensitive to being touched by a foreign body, and an evaluation unit, which is equipped to sense the positions of successively touched points of the sensor surface, and convert them into a control command for the device. The evaluation unit is connected to means for estimating an acceleration acting on the sensor surface and equipped, when converting into the control command, to weight a point touched at a time of intense acceleration change lower than a point touched at a time of slight acceleration change. |
| US09256305B2 |
Remote control apparatus and method of audio video navigation system
Provided are a remote control apparatus and method that remotely control an operation of an AVN system through a virtual touch panel generated by using a stylus pen and a sensor equipped in the AVN system. Therefore, the AVN system is remotely controlled by using the virtual touch panel generated in a vehicle, thus enhancing a user's convenience. |
| US09256302B2 |
Stylus pen
A stylus pen having a plurality of writing tips for writing on a plurality of dissimilar public surfaces, an ink tip configured for dispensing ink while writing on paper, a resistive stylus tip configured for writing on an electronic pad or use on a pin pad and a capacitive stylus tip for writing on a touch screen, all three tips in one stylus pen, for use by an individual, replacing a public pen, a public resistive stylus and eliminating touching a public touch screen with a finger. In one embodiment, each tip has an overcap with an antimicrobial sponge disposed therein, the sponge sanitizing the writing tip when not in use. Stylus pen housing is composed from antimicrobial material such as copper that is sanitary when the stylus pen is in use. An LED (light-emitting diode) light emitting UV light is provided on one overcap. |
| US09256300B2 |
Remote controller with touch panel
A remote controller with touch panel comprises a case, a circuit board, a power supply, and signal emitter. The circuit board, the power supply, and the signal emitter are accommodated in the case. The touch panel comprises a cover lens, and a carbon nanotube film is located on an inner surface of the cover lens. A number of touching and sensing electrodes are electrically connected to the carbon nanotube to supply signals. The carbon nanotube film comprises a plurality of carbon nanotubes oriented along the same direction. |
| US09256299B2 |
Client device orientation
Systems and methods are provided for determining an orientation of one or more client devices relative to a computing device. In various embodiments a method and system is provided for receiving, via a client device, data being displayed on a computing device. The data is used to determine an orientation of the client device relative to a computing device. The determined orientation of the client device is used to orient a user interface of a computing device. |
| US09256295B2 |
Outwardly decreasing height keys for a handheld electronic device keyboard
A handheld wireless communication device includes features that make it easier to differentiate among various keys and to correctly select a desired key. It also includes features that make the device more comfortable to use. In particular, corner keys have decreasing height profiles to make above-adjacent keys easier to reach and distinguish. Additionally, lowermost, outermost portions of the corner keys may be somewhat truncated. Flanking keys in a navigation row slant toward and are flush with peripheral edges of a navigation tool assembly and have outer edges that are higher than inner edges of adjacent outer keys. The outer edges of the flanking keys may be hump-shaped or crowned. The longitudinally central portion of the device is narrower than the ends of the device, and the corners of the device are contoured to enhance comfort in a user's hand. Soft-touch materials are employed in hand-contacting portions of the device. |
| US09256294B2 |
Self aligning minimal gap keycaps
Keyboard keys are outfitted with alignment features whose configuration, placement and geometry on a key serve to allow the key to automatically self-locate when the key returns from a pressed down, accessed, position, to its home, resting, position. In this manner, keyboards can be designed with keys with minimal keycap gaps that reduce the perceptible variance in the keycap spacing to be ascetically pleasing with minimal manufacturing costs. |
| US09256293B2 |
Button key assembly, operation panel, and image forming apparatus
A button key assembly of an operation panel includes button key units. Each button key unit includes button keys and a frame member. The button keys are arranged corresponding to switches on a substrate provided at the operation panel. The frame member supports the button keys via elastic arm members. The button key units are superposed one over the other to form the button key assembly. At least one of the button key units includes a supporting space having a width sufficient for supporting the button keys via the elastic arm members, and a vacant space disposed adjacent to the supporting space on a side closer to the elastic arm members and having a width narrower than the width of the supporting space. A button key of another button key unit superposed on the at least one button key unit is arranged in the vacant space. |
| US09256292B2 |
Information processing apparatus, information processing method and program to recognize an object from a captured image
There is provided an information processing apparatus, which includes an input unit and a control unit. The input unit is configured to serially input an image captured by a capturing device. The control unit is configured to detect a user's hand from the input image, to recognize a position, a posture and a size of the hand detected while moving. A predetermined area of a surface on which the hand is moved as an operation area is defined based on the position, the posture and the size of the hand recognized. A virtual three dimensional object for operation by the user is produced disposed on the operation area. Also, an information processing method and a program are provided for the information processing apparatus. |